e1000: Use C99 bool types
Approved by: imp MFC after: 1 week
This commit is contained in:
parent
984d1616be
commit
1bbdc25fc1
@ -219,14 +219,14 @@ static s32 e1000_init_mac_params_80003es2lan(struct e1000_hw *hw)
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/* Set rar entry count */
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/* Set rar entry count */
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mac->rar_entry_count = E1000_RAR_ENTRIES;
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mac->rar_entry_count = E1000_RAR_ENTRIES;
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/* Set if part includes ASF firmware */
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/* Set if part includes ASF firmware */
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mac->asf_firmware_present = TRUE;
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mac->asf_firmware_present = true;
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/* FWSM register */
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/* FWSM register */
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mac->has_fwsm = TRUE;
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mac->has_fwsm = true;
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/* ARC supported; valid only if manageability features are enabled. */
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/* ARC supported; valid only if manageability features are enabled. */
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mac->arc_subsystem_valid = !!(E1000_READ_REG(hw, E1000_FWSM) &
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mac->arc_subsystem_valid = !!(E1000_READ_REG(hw, E1000_FWSM) &
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E1000_FWSM_MODE_MASK);
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E1000_FWSM_MODE_MASK);
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/* Adaptive IFS not supported */
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/* Adaptive IFS not supported */
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mac->adaptive_ifs = FALSE;
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mac->adaptive_ifs = false;
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/* Function pointers */
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/* Function pointers */
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@ -891,8 +891,8 @@ static s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw)
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reg_data &= ~0x00100000;
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reg_data &= ~0x00100000;
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E1000_WRITE_REG_ARRAY(hw, E1000_FFLT, 0x0001, reg_data);
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E1000_WRITE_REG_ARRAY(hw, E1000_FFLT, 0x0001, reg_data);
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/* default to TRUE to enable the MDIC W/A */
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/* default to true to enable the MDIC W/A */
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hw->dev_spec._80003es2lan.mdic_wa_enable = TRUE;
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hw->dev_spec._80003es2lan.mdic_wa_enable = true;
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ret_val =
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ret_val =
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e1000_read_kmrn_reg_80003es2lan(hw, E1000_KMRNCTRLSTA_OFFSET >>
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e1000_read_kmrn_reg_80003es2lan(hw, E1000_KMRNCTRLSTA_OFFSET >>
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@ -900,7 +900,7 @@ static s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw)
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if (!ret_val) {
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if (!ret_val) {
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if ((i & E1000_KMRNCTRLSTA_OPMODE_MASK) ==
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if ((i & E1000_KMRNCTRLSTA_OPMODE_MASK) ==
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E1000_KMRNCTRLSTA_OPMODE_INBAND_MDIO)
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E1000_KMRNCTRLSTA_OPMODE_INBAND_MDIO)
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hw->dev_spec._80003es2lan.mdic_wa_enable = FALSE;
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hw->dev_spec._80003es2lan.mdic_wa_enable = false;
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}
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}
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/* Clear all of the statistics registers (clear on read). It is
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/* Clear all of the statistics registers (clear on read). It is
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@ -230,7 +230,7 @@ static s32 e1000_init_mac_params_82541(struct e1000_hw *hw)
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/* Set rar entry count */
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/* Set rar entry count */
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mac->rar_entry_count = E1000_RAR_ENTRIES;
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mac->rar_entry_count = E1000_RAR_ENTRIES;
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/* Set if part includes ASF firmware */
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/* Set if part includes ASF firmware */
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mac->asf_firmware_present = TRUE;
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mac->asf_firmware_present = true;
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/* Function Pointers */
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/* Function Pointers */
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@ -611,11 +611,11 @@ static s32 e1000_check_for_link_82541(struct e1000_hw *hw)
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goto out;
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goto out;
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if (!link) {
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if (!link) {
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ret_val = e1000_config_dsp_after_link_change_82541(hw, FALSE);
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ret_val = e1000_config_dsp_after_link_change_82541(hw, false);
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goto out; /* No link detected */
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goto out; /* No link detected */
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}
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}
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mac->get_link_status = FALSE;
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mac->get_link_status = false;
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/*
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/*
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* Check if there was DownShift, must be checked
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* Check if there was DownShift, must be checked
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@ -632,7 +632,7 @@ static s32 e1000_check_for_link_82541(struct e1000_hw *hw)
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goto out;
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goto out;
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}
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}
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ret_val = e1000_config_dsp_after_link_change_82541(hw, TRUE);
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ret_val = e1000_config_dsp_after_link_change_82541(hw, true);
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/*
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/*
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* Auto-Neg is enabled. Auto Speed Detection takes care
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* Auto-Neg is enabled. Auto Speed Detection takes care
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@ -937,7 +937,7 @@ static s32 e1000_get_cable_length_igp_82541(struct e1000_hw *hw)
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* Success returns 0, Failure returns 1
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* Success returns 0, Failure returns 1
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*
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*
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* The low power link up (lplu) state is set to the power management level D3
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* The low power link up (lplu) state is set to the power management level D3
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* and SmartSpeed is disabled when active is TRUE, else clear lplu for D3
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* and SmartSpeed is disabled when active is true, else clear lplu for D3
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* and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU
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* and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU
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* is used during Dx states where the power conservation is most important.
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* is used during Dx states where the power conservation is most important.
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* During driver activity, SmartSpeed should be enabled so performance is
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* During driver activity, SmartSpeed should be enabled so performance is
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@ -256,7 +256,7 @@ static s32 e1000_init_mac_params_82543(struct e1000_hw *hw)
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/* Set tbi compatibility */
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/* Set tbi compatibility */
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if ((hw->mac.type != e1000_82543) ||
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if ((hw->mac.type != e1000_82543) ||
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(hw->phy.media_type == e1000_media_type_fiber))
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(hw->phy.media_type == e1000_media_type_fiber))
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e1000_set_tbi_compatibility_82543(hw, FALSE);
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e1000_set_tbi_compatibility_82543(hw, false);
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return E1000_SUCCESS;
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return E1000_SUCCESS;
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}
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}
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@ -286,7 +286,7 @@ void e1000_init_function_pointers_82543(struct e1000_hw *hw)
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static bool e1000_tbi_compatibility_enabled_82543(struct e1000_hw *hw)
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static bool e1000_tbi_compatibility_enabled_82543(struct e1000_hw *hw)
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{
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{
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struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543;
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struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543;
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bool state = FALSE;
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bool state = false;
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DEBUGFUNC("e1000_tbi_compatibility_enabled_82543");
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DEBUGFUNC("e1000_tbi_compatibility_enabled_82543");
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@ -338,7 +338,7 @@ void e1000_set_tbi_compatibility_82543(struct e1000_hw *hw, bool state)
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bool e1000_tbi_sbp_enabled_82543(struct e1000_hw *hw)
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bool e1000_tbi_sbp_enabled_82543(struct e1000_hw *hw)
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{
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{
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struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543;
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struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543;
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bool state = FALSE;
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bool state = false;
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DEBUGFUNC("e1000_tbi_sbp_enabled_82543");
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DEBUGFUNC("e1000_tbi_sbp_enabled_82543");
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@ -379,7 +379,7 @@ static void e1000_set_tbi_sbp_82543(struct e1000_hw *hw, bool state)
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* @hw: pointer to the HW structure
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* @hw: pointer to the HW structure
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*
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*
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* Returns the current status of whether PHY initialization is disabled.
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* Returns the current status of whether PHY initialization is disabled.
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* True if PHY initialization is disabled else FALSE.
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* True if PHY initialization is disabled else false.
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**/
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**/
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static bool e1000_init_phy_disabled_82543(struct e1000_hw *hw)
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static bool e1000_init_phy_disabled_82543(struct e1000_hw *hw)
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{
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{
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@ -389,7 +389,7 @@ static bool e1000_init_phy_disabled_82543(struct e1000_hw *hw)
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DEBUGFUNC("e1000_init_phy_disabled_82543");
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DEBUGFUNC("e1000_init_phy_disabled_82543");
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if (hw->mac.type != e1000_82543) {
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if (hw->mac.type != e1000_82543) {
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ret_val = FALSE;
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ret_val = false;
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goto out;
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goto out;
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}
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}
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@ -913,7 +913,7 @@ static s32 e1000_reset_hw_82543(struct e1000_hw *hw)
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E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP);
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E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP);
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E1000_WRITE_FLUSH(hw);
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E1000_WRITE_FLUSH(hw);
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e1000_set_tbi_sbp_82543(hw, FALSE);
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e1000_set_tbi_sbp_82543(hw, false);
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/*
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/*
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* Delay to allow any outstanding PCI transactions to complete before
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* Delay to allow any outstanding PCI transactions to complete before
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@ -1217,7 +1217,7 @@ static s32 e1000_check_for_copper_link_82543(struct e1000_hw *hw)
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if (!link)
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if (!link)
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goto out; /* No link detected */
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goto out; /* No link detected */
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mac->get_link_status = FALSE;
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mac->get_link_status = false;
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e1000_check_downshift_generic(hw);
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e1000_check_downshift_generic(hw);
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@ -1299,7 +1299,7 @@ static s32 e1000_check_for_copper_link_82543(struct e1000_hw *hw)
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* If we previously were in the mode,
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* If we previously were in the mode,
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* turn it off.
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* turn it off.
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*/
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*/
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e1000_set_tbi_sbp_82543(hw, FALSE);
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e1000_set_tbi_sbp_82543(hw, false);
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rctl = E1000_READ_REG(hw, E1000_RCTL);
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rctl = E1000_READ_REG(hw, E1000_RCTL);
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rctl &= ~E1000_RCTL_SBP;
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rctl &= ~E1000_RCTL_SBP;
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E1000_WRITE_REG(hw, E1000_RCTL, rctl);
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E1000_WRITE_REG(hw, E1000_RCTL, rctl);
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@ -1313,7 +1313,7 @@ static s32 e1000_check_for_copper_link_82543(struct e1000_hw *hw)
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* will look like CRC errors to the hardware.
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* will look like CRC errors to the hardware.
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*/
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*/
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if (!e1000_tbi_sbp_enabled_82543(hw)) {
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if (!e1000_tbi_sbp_enabled_82543(hw)) {
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e1000_set_tbi_sbp_82543(hw, TRUE);
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e1000_set_tbi_sbp_82543(hw, true);
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rctl = E1000_READ_REG(hw, E1000_RCTL);
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rctl = E1000_READ_REG(hw, E1000_RCTL);
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rctl |= E1000_RCTL_SBP;
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rctl |= E1000_RCTL_SBP;
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E1000_WRITE_REG(hw, E1000_RCTL, rctl);
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E1000_WRITE_REG(hw, E1000_RCTL, rctl);
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@ -1356,7 +1356,7 @@ static s32 e1000_check_for_fiber_link_82543(struct e1000_hw *hw)
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(!(status & E1000_STATUS_LU)) &&
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(!(status & E1000_STATUS_LU)) &&
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(!(rxcw & E1000_RXCW_C))) {
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(!(rxcw & E1000_RXCW_C))) {
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if (!mac->autoneg_failed) {
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if (!mac->autoneg_failed) {
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mac->autoneg_failed = TRUE;
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mac->autoneg_failed = true;
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ret_val = 0;
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ret_val = 0;
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goto out;
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goto out;
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}
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}
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@ -1387,7 +1387,7 @@ static s32 e1000_check_for_fiber_link_82543(struct e1000_hw *hw)
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E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw);
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E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw);
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E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & ~E1000_CTRL_SLU));
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E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & ~E1000_CTRL_SLU));
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mac->serdes_has_link = TRUE;
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mac->serdes_has_link = true;
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}
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}
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out:
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out:
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@ -285,7 +285,7 @@ static s32 e1000_init_mac_params_82571(struct e1000_hw *hw)
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struct e1000_mac_info *mac = &hw->mac;
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struct e1000_mac_info *mac = &hw->mac;
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u32 swsm = 0;
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u32 swsm = 0;
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u32 swsm2 = 0;
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u32 swsm2 = 0;
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bool force_clear_smbi = FALSE;
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bool force_clear_smbi = false;
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DEBUGFUNC("e1000_init_mac_params_82571");
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DEBUGFUNC("e1000_init_mac_params_82571");
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@ -327,9 +327,9 @@ static s32 e1000_init_mac_params_82571(struct e1000_hw *hw)
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/* Set rar entry count */
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/* Set rar entry count */
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mac->rar_entry_count = E1000_RAR_ENTRIES;
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mac->rar_entry_count = E1000_RAR_ENTRIES;
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/* Set if part includes ASF firmware */
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/* Set if part includes ASF firmware */
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mac->asf_firmware_present = TRUE;
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mac->asf_firmware_present = true;
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/* Adaptive IFS supported */
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/* Adaptive IFS supported */
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mac->adaptive_ifs = TRUE;
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mac->adaptive_ifs = true;
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/* Function pointers */
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/* Function pointers */
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@ -369,7 +369,7 @@ static s32 e1000_init_mac_params_82571(struct e1000_hw *hw)
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mac->ops.blink_led = e1000_blink_led_generic;
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mac->ops.blink_led = e1000_blink_led_generic;
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/* FWSM register */
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/* FWSM register */
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mac->has_fwsm = TRUE;
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mac->has_fwsm = true;
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/* ARC supported; valid only if manageability features are
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/* ARC supported; valid only if manageability features are
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* enabled.
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* enabled.
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*/
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*/
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@ -388,7 +388,7 @@ static s32 e1000_init_mac_params_82571(struct e1000_hw *hw)
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mac->ops.blink_led = e1000_blink_led_generic;
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mac->ops.blink_led = e1000_blink_led_generic;
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/* FWSM register */
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/* FWSM register */
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mac->has_fwsm = TRUE;
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mac->has_fwsm = true;
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break;
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break;
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}
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}
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@ -407,13 +407,13 @@ static s32 e1000_init_mac_params_82571(struct e1000_hw *hw)
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/* Only do this for the first interface on this card */
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/* Only do this for the first interface on this card */
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E1000_WRITE_REG(hw, E1000_SWSM2, swsm2 |
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E1000_WRITE_REG(hw, E1000_SWSM2, swsm2 |
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E1000_SWSM2_LOCK);
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E1000_SWSM2_LOCK);
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force_clear_smbi = TRUE;
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force_clear_smbi = true;
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} else {
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} else {
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force_clear_smbi = FALSE;
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force_clear_smbi = false;
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}
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}
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break;
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break;
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default:
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default:
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force_clear_smbi = TRUE;
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force_clear_smbi = true;
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break;
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break;
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}
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}
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@ -563,7 +563,7 @@ e1000_put_hw_semaphore_82574(struct e1000_hw *hw)
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/**
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/**
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* e1000_set_d0_lplu_state_82574 - Set Low Power Linkup D0 state
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* e1000_set_d0_lplu_state_82574 - Set Low Power Linkup D0 state
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* @hw: pointer to the HW structure
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* @hw: pointer to the HW structure
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* @active: TRUE to enable LPLU, FALSE to disable
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* @active: true to enable LPLU, false to disable
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*
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*
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* Sets the LPLU D0 state according to the active flag.
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* Sets the LPLU D0 state according to the active flag.
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* LPLU will not be activated unless the
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* LPLU will not be activated unless the
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@ -593,7 +593,7 @@ static s32 e1000_set_d0_lplu_state_82574(struct e1000_hw *hw, bool active)
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* @active: boolean used to enable/disable lplu
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* @active: boolean used to enable/disable lplu
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*
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*
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* The low power link up (lplu) state is set to the power management level D3
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* The low power link up (lplu) state is set to the power management level D3
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* when active is TRUE, else clear lplu for D3. LPLU
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* when active is true, else clear lplu for D3. LPLU
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* is used during Dx states where the power conservation is most important.
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* is used during Dx states where the power conservation is most important.
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* During driver activity, SmartSpeed should be enabled so performance is
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* During driver activity, SmartSpeed should be enabled so performance is
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* maintained.
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* maintained.
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@ -860,7 +860,7 @@ static s32 e1000_get_cfg_done_82571(struct e1000_hw *hw)
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/**
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/**
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* e1000_set_d0_lplu_state_82571 - Set Low Power Linkup D0 state
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* e1000_set_d0_lplu_state_82571 - Set Low Power Linkup D0 state
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* @hw: pointer to the HW structure
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* @hw: pointer to the HW structure
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* @active: TRUE to enable LPLU, FALSE to disable
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* @active: true to enable LPLU, false to disable
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*
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*
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* Sets the LPLU D0 state according to the active flag. When activating LPLU
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* Sets the LPLU D0 state according to the active flag. When activating LPLU
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* this function also disables smart speed and vice versa. LPLU will not be
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* this function also disables smart speed and vice versa. LPLU will not be
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@ -1051,7 +1051,7 @@ static s32 e1000_reset_hw_82571(struct e1000_hw *hw)
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if (ret_val)
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if (ret_val)
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return ret_val;
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return ret_val;
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e1000_set_laa_state_82571(hw, TRUE);
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e1000_set_laa_state_82571(hw, true);
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}
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}
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/* Reinitialize the 82571 serdes link state machine */
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/* Reinitialize the 82571 serdes link state machine */
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@ -1327,8 +1327,8 @@ static void e1000_clear_vfta_82571(struct e1000_hw *hw)
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* e1000_check_mng_mode_82574 - Check manageability is enabled
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* e1000_check_mng_mode_82574 - Check manageability is enabled
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* @hw: pointer to the HW structure
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* @hw: pointer to the HW structure
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*
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*
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* Reads the NVM Initialization Control Word 2 and returns TRUE
|
* Reads the NVM Initialization Control Word 2 and returns true
|
||||||
* (>0) if any manageability is enabled, else FALSE (0).
|
* (>0) if any manageability is enabled, else false (0).
|
||||||
**/
|
**/
|
||||||
static bool e1000_check_mng_mode_82574(struct e1000_hw *hw)
|
static bool e1000_check_mng_mode_82574(struct e1000_hw *hw)
|
||||||
{
|
{
|
||||||
@ -1339,7 +1339,7 @@ static bool e1000_check_mng_mode_82574(struct e1000_hw *hw)
|
|||||||
|
|
||||||
ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, 1, &data);
|
ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, 1, &data);
|
||||||
if (ret_val)
|
if (ret_val)
|
||||||
return FALSE;
|
return false;
|
||||||
|
|
||||||
return (data & E1000_NVM_INIT_CTRL2_MNGM) != 0;
|
return (data & E1000_NVM_INIT_CTRL2_MNGM) != 0;
|
||||||
}
|
}
|
||||||
@ -1392,18 +1392,18 @@ bool e1000_check_phy_82574(struct e1000_hw *hw)
|
|||||||
ret_val = hw->phy.ops.read_reg(hw, E1000_RECEIVE_ERROR_COUNTER,
|
ret_val = hw->phy.ops.read_reg(hw, E1000_RECEIVE_ERROR_COUNTER,
|
||||||
&receive_errors);
|
&receive_errors);
|
||||||
if (ret_val)
|
if (ret_val)
|
||||||
return FALSE;
|
return false;
|
||||||
if (receive_errors == E1000_RECEIVE_ERROR_MAX) {
|
if (receive_errors == E1000_RECEIVE_ERROR_MAX) {
|
||||||
ret_val = hw->phy.ops.read_reg(hw, E1000_BASE1000T_STATUS,
|
ret_val = hw->phy.ops.read_reg(hw, E1000_BASE1000T_STATUS,
|
||||||
&status_1kbt);
|
&status_1kbt);
|
||||||
if (ret_val)
|
if (ret_val)
|
||||||
return FALSE;
|
return false;
|
||||||
if ((status_1kbt & E1000_IDLE_ERROR_COUNT_MASK) ==
|
if ((status_1kbt & E1000_IDLE_ERROR_COUNT_MASK) ==
|
||||||
E1000_IDLE_ERROR_COUNT_MASK)
|
E1000_IDLE_ERROR_COUNT_MASK)
|
||||||
return TRUE;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
return FALSE;
|
return false;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -1556,10 +1556,10 @@ static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw)
|
|||||||
*/
|
*/
|
||||||
mac->serdes_link_state =
|
mac->serdes_link_state =
|
||||||
e1000_serdes_link_autoneg_progress;
|
e1000_serdes_link_autoneg_progress;
|
||||||
mac->serdes_has_link = FALSE;
|
mac->serdes_has_link = false;
|
||||||
DEBUGOUT("AN_UP -> AN_PROG\n");
|
DEBUGOUT("AN_UP -> AN_PROG\n");
|
||||||
} else {
|
} else {
|
||||||
mac->serdes_has_link = TRUE;
|
mac->serdes_has_link = true;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
|
||||||
@ -1576,10 +1576,10 @@ static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw)
|
|||||||
(ctrl & ~E1000_CTRL_SLU));
|
(ctrl & ~E1000_CTRL_SLU));
|
||||||
mac->serdes_link_state =
|
mac->serdes_link_state =
|
||||||
e1000_serdes_link_autoneg_progress;
|
e1000_serdes_link_autoneg_progress;
|
||||||
mac->serdes_has_link = FALSE;
|
mac->serdes_has_link = false;
|
||||||
DEBUGOUT("FORCED_UP -> AN_PROG\n");
|
DEBUGOUT("FORCED_UP -> AN_PROG\n");
|
||||||
} else {
|
} else {
|
||||||
mac->serdes_has_link = TRUE;
|
mac->serdes_has_link = true;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
|
||||||
@ -1593,7 +1593,7 @@ static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw)
|
|||||||
mac->serdes_link_state =
|
mac->serdes_link_state =
|
||||||
e1000_serdes_link_autoneg_complete;
|
e1000_serdes_link_autoneg_complete;
|
||||||
DEBUGOUT("AN_PROG -> AN_UP\n");
|
DEBUGOUT("AN_PROG -> AN_UP\n");
|
||||||
mac->serdes_has_link = TRUE;
|
mac->serdes_has_link = true;
|
||||||
} else {
|
} else {
|
||||||
/* Autoneg completed, but failed. */
|
/* Autoneg completed, but failed. */
|
||||||
mac->serdes_link_state =
|
mac->serdes_link_state =
|
||||||
@ -1619,7 +1619,7 @@ static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw)
|
|||||||
}
|
}
|
||||||
mac->serdes_link_state =
|
mac->serdes_link_state =
|
||||||
e1000_serdes_link_forced_up;
|
e1000_serdes_link_forced_up;
|
||||||
mac->serdes_has_link = TRUE;
|
mac->serdes_has_link = true;
|
||||||
DEBUGOUT("AN_PROG -> FORCED_UP\n");
|
DEBUGOUT("AN_PROG -> FORCED_UP\n");
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
@ -1635,13 +1635,13 @@ static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw)
|
|||||||
~E1000_CTRL_SLU));
|
~E1000_CTRL_SLU));
|
||||||
mac->serdes_link_state =
|
mac->serdes_link_state =
|
||||||
e1000_serdes_link_autoneg_progress;
|
e1000_serdes_link_autoneg_progress;
|
||||||
mac->serdes_has_link = FALSE;
|
mac->serdes_has_link = false;
|
||||||
DEBUGOUT("DOWN -> AN_PROG\n");
|
DEBUGOUT("DOWN -> AN_PROG\n");
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
} else {
|
} else {
|
||||||
if (!(rxcw & E1000_RXCW_SYNCH)) {
|
if (!(rxcw & E1000_RXCW_SYNCH)) {
|
||||||
mac->serdes_has_link = FALSE;
|
mac->serdes_has_link = false;
|
||||||
mac->serdes_link_state = e1000_serdes_link_down;
|
mac->serdes_link_state = e1000_serdes_link_down;
|
||||||
DEBUGOUT("ANYSTATE -> DOWN\n");
|
DEBUGOUT("ANYSTATE -> DOWN\n");
|
||||||
} else {
|
} else {
|
||||||
@ -1657,7 +1657,7 @@ static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw)
|
|||||||
continue;
|
continue;
|
||||||
|
|
||||||
if (rxcw & E1000_RXCW_IV) {
|
if (rxcw & E1000_RXCW_IV) {
|
||||||
mac->serdes_has_link = FALSE;
|
mac->serdes_has_link = false;
|
||||||
mac->serdes_link_state =
|
mac->serdes_link_state =
|
||||||
e1000_serdes_link_down;
|
e1000_serdes_link_down;
|
||||||
DEBUGOUT("ANYSTATE -> DOWN\n");
|
DEBUGOUT("ANYSTATE -> DOWN\n");
|
||||||
@ -1671,7 +1671,7 @@ static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw)
|
|||||||
E1000_WRITE_REG(hw, E1000_TXCW, txcw);
|
E1000_WRITE_REG(hw, E1000_TXCW, txcw);
|
||||||
mac->serdes_link_state =
|
mac->serdes_link_state =
|
||||||
e1000_serdes_link_autoneg_progress;
|
e1000_serdes_link_autoneg_progress;
|
||||||
mac->serdes_has_link = FALSE;
|
mac->serdes_has_link = false;
|
||||||
DEBUGOUT("ANYSTATE -> AN_PROG\n");
|
DEBUGOUT("ANYSTATE -> AN_PROG\n");
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -1728,7 +1728,7 @@ bool e1000_get_laa_state_82571(struct e1000_hw *hw)
|
|||||||
DEBUGFUNC("e1000_get_laa_state_82571");
|
DEBUGFUNC("e1000_get_laa_state_82571");
|
||||||
|
|
||||||
if (hw->mac.type != e1000_82571)
|
if (hw->mac.type != e1000_82571)
|
||||||
return FALSE;
|
return false;
|
||||||
|
|
||||||
return hw->dev_spec._82571.laa_is_present;
|
return hw->dev_spec._82571.laa_is_present;
|
||||||
}
|
}
|
||||||
|
@ -128,7 +128,7 @@ static const u16 e1000_82580_rxpbs_table[] = {
|
|||||||
static bool e1000_sgmii_uses_mdio_82575(struct e1000_hw *hw)
|
static bool e1000_sgmii_uses_mdio_82575(struct e1000_hw *hw)
|
||||||
{
|
{
|
||||||
u32 reg = 0;
|
u32 reg = 0;
|
||||||
bool ext_mdio = FALSE;
|
bool ext_mdio = false;
|
||||||
|
|
||||||
DEBUGFUNC("e1000_sgmii_uses_mdio_82575");
|
DEBUGFUNC("e1000_sgmii_uses_mdio_82575");
|
||||||
|
|
||||||
@ -348,16 +348,16 @@ static s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
|
|||||||
|
|
||||||
/* Enable EEE default settings for EEE supported devices */
|
/* Enable EEE default settings for EEE supported devices */
|
||||||
if (mac->type >= e1000_i350)
|
if (mac->type >= e1000_i350)
|
||||||
dev_spec->eee_disable = FALSE;
|
dev_spec->eee_disable = false;
|
||||||
|
|
||||||
/* Allow a single clear of the SW semaphore on I210 and newer */
|
/* Allow a single clear of the SW semaphore on I210 and newer */
|
||||||
if (mac->type >= e1000_i210)
|
if (mac->type >= e1000_i210)
|
||||||
dev_spec->clear_semaphore_once = TRUE;
|
dev_spec->clear_semaphore_once = true;
|
||||||
|
|
||||||
/* Set if part includes ASF firmware */
|
/* Set if part includes ASF firmware */
|
||||||
mac->asf_firmware_present = TRUE;
|
mac->asf_firmware_present = true;
|
||||||
/* FWSM register */
|
/* FWSM register */
|
||||||
mac->has_fwsm = TRUE;
|
mac->has_fwsm = true;
|
||||||
/* ARC supported; valid only if manageability features are enabled. */
|
/* ARC supported; valid only if manageability features are enabled. */
|
||||||
mac->arc_subsystem_valid =
|
mac->arc_subsystem_valid =
|
||||||
!!(E1000_READ_REG(hw, E1000_FWSM) & E1000_FWSM_MODE_MASK);
|
!!(E1000_READ_REG(hw, E1000_FWSM) & E1000_FWSM_MODE_MASK);
|
||||||
@ -716,7 +716,7 @@ static s32 e1000_phy_hw_reset_sgmii_82575(struct e1000_hw *hw)
|
|||||||
DEBUGFUNC("e1000_phy_hw_reset_sgmii_82575");
|
DEBUGFUNC("e1000_phy_hw_reset_sgmii_82575");
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* This isn't a TRUE "hard" reset, but is the only reset
|
* This isn't a true "hard" reset, but is the only reset
|
||||||
* available to us at this time.
|
* available to us at this time.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
@ -746,7 +746,7 @@ static s32 e1000_phy_hw_reset_sgmii_82575(struct e1000_hw *hw)
|
|||||||
/**
|
/**
|
||||||
* e1000_set_d0_lplu_state_82575 - Set Low Power Linkup D0 state
|
* e1000_set_d0_lplu_state_82575 - Set Low Power Linkup D0 state
|
||||||
* @hw: pointer to the HW structure
|
* @hw: pointer to the HW structure
|
||||||
* @active: TRUE to enable LPLU, FALSE to disable
|
* @active: true to enable LPLU, false to disable
|
||||||
*
|
*
|
||||||
* Sets the LPLU D0 state according to the active flag. When
|
* Sets the LPLU D0 state according to the active flag. When
|
||||||
* activating LPLU this function also disables smart speed
|
* activating LPLU this function also disables smart speed
|
||||||
@ -832,7 +832,7 @@ static s32 e1000_set_d0_lplu_state_82575(struct e1000_hw *hw, bool active)
|
|||||||
/**
|
/**
|
||||||
* e1000_set_d0_lplu_state_82580 - Set Low Power Linkup D0 state
|
* e1000_set_d0_lplu_state_82580 - Set Low Power Linkup D0 state
|
||||||
* @hw: pointer to the HW structure
|
* @hw: pointer to the HW structure
|
||||||
* @active: TRUE to enable LPLU, FALSE to disable
|
* @active: true to enable LPLU, false to disable
|
||||||
*
|
*
|
||||||
* Sets the LPLU D0 state according to the active flag. When
|
* Sets the LPLU D0 state according to the active flag. When
|
||||||
* activating LPLU this function also disables smart speed
|
* activating LPLU this function also disables smart speed
|
||||||
@ -883,7 +883,7 @@ static s32 e1000_set_d0_lplu_state_82580(struct e1000_hw *hw, bool active)
|
|||||||
* Success returns 0, Failure returns 1
|
* Success returns 0, Failure returns 1
|
||||||
*
|
*
|
||||||
* The low power link up (lplu) state is set to the power management level D3
|
* The low power link up (lplu) state is set to the power management level D3
|
||||||
* and SmartSpeed is disabled when active is TRUE, else clear lplu for D3
|
* and SmartSpeed is disabled when active is true, else clear lplu for D3
|
||||||
* and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU
|
* and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU
|
||||||
* is used during Dx states where the power conservation is most important.
|
* is used during Dx states where the power conservation is most important.
|
||||||
* During driver activity, SmartSpeed should be enabled so performance is
|
* During driver activity, SmartSpeed should be enabled so performance is
|
||||||
@ -1139,7 +1139,7 @@ static s32 e1000_check_for_link_media_swap(struct e1000_hw *hw)
|
|||||||
/* Determine if a swap needs to happen. */
|
/* Determine if a swap needs to happen. */
|
||||||
if (port && (hw->dev_spec._82575.media_port != port)) {
|
if (port && (hw->dev_spec._82575.media_port != port)) {
|
||||||
hw->dev_spec._82575.media_port = port;
|
hw->dev_spec._82575.media_port = port;
|
||||||
hw->dev_spec._82575.media_changed = TRUE;
|
hw->dev_spec._82575.media_changed = true;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (port == E1000_MEDIA_PORT_COPPER) {
|
if (port == E1000_MEDIA_PORT_COPPER) {
|
||||||
@ -1217,7 +1217,7 @@ static s32 e1000_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw,
|
|||||||
* The link up bit determines when link is up on autoneg.
|
* The link up bit determines when link is up on autoneg.
|
||||||
*/
|
*/
|
||||||
if (pcs & E1000_PCS_LSTS_LINK_OK) {
|
if (pcs & E1000_PCS_LSTS_LINK_OK) {
|
||||||
mac->serdes_has_link = TRUE;
|
mac->serdes_has_link = true;
|
||||||
|
|
||||||
/* Detect and store PCS speed */
|
/* Detect and store PCS speed */
|
||||||
if (pcs & E1000_PCS_LSTS_SPEED_1000)
|
if (pcs & E1000_PCS_LSTS_SPEED_1000)
|
||||||
@ -1246,7 +1246,7 @@ static s32 e1000_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw,
|
|||||||
}
|
}
|
||||||
|
|
||||||
} else {
|
} else {
|
||||||
mac->serdes_has_link = FALSE;
|
mac->serdes_has_link = false;
|
||||||
*speed = 0;
|
*speed = 0;
|
||||||
*duplex = 0;
|
*duplex = 0;
|
||||||
}
|
}
|
||||||
@ -1527,13 +1527,13 @@ static s32 e1000_setup_serdes_link_82575(struct e1000_hw *hw)
|
|||||||
switch (ctrl_ext & E1000_CTRL_EXT_LINK_MODE_MASK) {
|
switch (ctrl_ext & E1000_CTRL_EXT_LINK_MODE_MASK) {
|
||||||
case E1000_CTRL_EXT_LINK_MODE_SGMII:
|
case E1000_CTRL_EXT_LINK_MODE_SGMII:
|
||||||
/* sgmii mode lets the phy handle forcing speed/duplex */
|
/* sgmii mode lets the phy handle forcing speed/duplex */
|
||||||
pcs_autoneg = TRUE;
|
pcs_autoneg = true;
|
||||||
/* autoneg time out should be disabled for SGMII mode */
|
/* autoneg time out should be disabled for SGMII mode */
|
||||||
reg &= ~(E1000_PCS_LCTL_AN_TIMEOUT);
|
reg &= ~(E1000_PCS_LCTL_AN_TIMEOUT);
|
||||||
break;
|
break;
|
||||||
case E1000_CTRL_EXT_LINK_MODE_1000BASE_KX:
|
case E1000_CTRL_EXT_LINK_MODE_1000BASE_KX:
|
||||||
/* disable PCS autoneg and support parallel detect only */
|
/* disable PCS autoneg and support parallel detect only */
|
||||||
pcs_autoneg = FALSE;
|
pcs_autoneg = false;
|
||||||
/* FALLTHROUGH */
|
/* FALLTHROUGH */
|
||||||
default:
|
default:
|
||||||
if (hw->mac.type == e1000_82575 ||
|
if (hw->mac.type == e1000_82575 ||
|
||||||
@ -1545,7 +1545,7 @@ static s32 e1000_setup_serdes_link_82575(struct e1000_hw *hw)
|
|||||||
}
|
}
|
||||||
|
|
||||||
if (data & E1000_EEPROM_PCS_AUTONEG_DISABLE_BIT)
|
if (data & E1000_EEPROM_PCS_AUTONEG_DISABLE_BIT)
|
||||||
pcs_autoneg = FALSE;
|
pcs_autoneg = false;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
@ -1637,8 +1637,8 @@ static s32 e1000_get_media_type_82575(struct e1000_hw *hw)
|
|||||||
u32 link_mode = 0;
|
u32 link_mode = 0;
|
||||||
|
|
||||||
/* Set internal phy as default */
|
/* Set internal phy as default */
|
||||||
dev_spec->sgmii_active = FALSE;
|
dev_spec->sgmii_active = false;
|
||||||
dev_spec->module_plugged = FALSE;
|
dev_spec->module_plugged = false;
|
||||||
|
|
||||||
/* Get CSR setting */
|
/* Get CSR setting */
|
||||||
ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
|
ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
|
||||||
@ -1657,7 +1657,7 @@ static s32 e1000_get_media_type_82575(struct e1000_hw *hw)
|
|||||||
/* Get phy control interface type set (MDIO vs. I2C)*/
|
/* Get phy control interface type set (MDIO vs. I2C)*/
|
||||||
if (e1000_sgmii_uses_mdio_82575(hw)) {
|
if (e1000_sgmii_uses_mdio_82575(hw)) {
|
||||||
hw->phy.media_type = e1000_media_type_copper;
|
hw->phy.media_type = e1000_media_type_copper;
|
||||||
dev_spec->sgmii_active = TRUE;
|
dev_spec->sgmii_active = true;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
/* fall through for I2C based SGMII */
|
/* fall through for I2C based SGMII */
|
||||||
@ -1675,7 +1675,7 @@ static s32 e1000_get_media_type_82575(struct e1000_hw *hw)
|
|||||||
|
|
||||||
if (link_mode == E1000_CTRL_EXT_LINK_MODE_SGMII) {
|
if (link_mode == E1000_CTRL_EXT_LINK_MODE_SGMII) {
|
||||||
hw->phy.media_type = e1000_media_type_copper;
|
hw->phy.media_type = e1000_media_type_copper;
|
||||||
dev_spec->sgmii_active = TRUE;
|
dev_spec->sgmii_active = true;
|
||||||
}
|
}
|
||||||
|
|
||||||
break;
|
break;
|
||||||
@ -1746,14 +1746,14 @@ static s32 e1000_set_sfp_media_type_82575(struct e1000_hw *hw)
|
|||||||
/* Check if there is some SFP module plugged and powered */
|
/* Check if there is some SFP module plugged and powered */
|
||||||
if ((tranceiver_type == E1000_SFF_IDENTIFIER_SFP) ||
|
if ((tranceiver_type == E1000_SFF_IDENTIFIER_SFP) ||
|
||||||
(tranceiver_type == E1000_SFF_IDENTIFIER_SFF)) {
|
(tranceiver_type == E1000_SFF_IDENTIFIER_SFF)) {
|
||||||
dev_spec->module_plugged = TRUE;
|
dev_spec->module_plugged = true;
|
||||||
if (eth_flags->e1000_base_lx || eth_flags->e1000_base_sx) {
|
if (eth_flags->e1000_base_lx || eth_flags->e1000_base_sx) {
|
||||||
hw->phy.media_type = e1000_media_type_internal_serdes;
|
hw->phy.media_type = e1000_media_type_internal_serdes;
|
||||||
} else if (eth_flags->e100_base_fx) {
|
} else if (eth_flags->e100_base_fx) {
|
||||||
dev_spec->sgmii_active = TRUE;
|
dev_spec->sgmii_active = true;
|
||||||
hw->phy.media_type = e1000_media_type_internal_serdes;
|
hw->phy.media_type = e1000_media_type_internal_serdes;
|
||||||
} else if (eth_flags->e1000_base_t) {
|
} else if (eth_flags->e1000_base_t) {
|
||||||
dev_spec->sgmii_active = TRUE;
|
dev_spec->sgmii_active = true;
|
||||||
hw->phy.media_type = e1000_media_type_copper;
|
hw->phy.media_type = e1000_media_type_copper;
|
||||||
} else {
|
} else {
|
||||||
hw->phy.media_type = e1000_media_type_unknown;
|
hw->phy.media_type = e1000_media_type_unknown;
|
||||||
@ -2224,11 +2224,11 @@ static s32 e1000_reset_hw_82580(struct e1000_hw *hw)
|
|||||||
|
|
||||||
DEBUGFUNC("e1000_reset_hw_82580");
|
DEBUGFUNC("e1000_reset_hw_82580");
|
||||||
|
|
||||||
hw->dev_spec._82575.global_device_reset = FALSE;
|
hw->dev_spec._82575.global_device_reset = false;
|
||||||
|
|
||||||
/* 82580 does not reliably do global_device_reset due to hw errata */
|
/* 82580 does not reliably do global_device_reset due to hw errata */
|
||||||
if (hw->mac.type == e1000_82580)
|
if (hw->mac.type == e1000_82580)
|
||||||
global_device_reset = FALSE;
|
global_device_reset = false;
|
||||||
|
|
||||||
/* Get current control state. */
|
/* Get current control state. */
|
||||||
ctrl = E1000_READ_REG(hw, E1000_CTRL);
|
ctrl = E1000_READ_REG(hw, E1000_CTRL);
|
||||||
@ -2252,7 +2252,7 @@ static s32 e1000_reset_hw_82580(struct e1000_hw *hw)
|
|||||||
/* Determine whether or not a global dev reset is requested */
|
/* Determine whether or not a global dev reset is requested */
|
||||||
if (global_device_reset && hw->mac.ops.acquire_swfw_sync(hw,
|
if (global_device_reset && hw->mac.ops.acquire_swfw_sync(hw,
|
||||||
swmbsw_mask))
|
swmbsw_mask))
|
||||||
global_device_reset = FALSE;
|
global_device_reset = false;
|
||||||
|
|
||||||
if (global_device_reset && !(E1000_READ_REG(hw, E1000_STATUS) &
|
if (global_device_reset && !(E1000_READ_REG(hw, E1000_STATUS) &
|
||||||
E1000_STAT_DEV_RST_SET))
|
E1000_STAT_DEV_RST_SET))
|
||||||
@ -2572,7 +2572,7 @@ s32 e1000_read_emi_reg(struct e1000_hw *hw, u16 addr, u16 *data)
|
|||||||
{
|
{
|
||||||
DEBUGFUNC("e1000_read_emi_reg");
|
DEBUGFUNC("e1000_read_emi_reg");
|
||||||
|
|
||||||
return __e1000_access_emi_reg(hw, addr, data, TRUE);
|
return __e1000_access_emi_reg(hw, addr, data, true);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -2930,7 +2930,7 @@ s32 e1000_get_eee_status_i354(struct e1000_hw *hw, bool *status)
|
|||||||
goto out;
|
goto out;
|
||||||
|
|
||||||
*status = phy_data & (E1000_PCS_STATUS_TX_LPI_RCVD |
|
*status = phy_data & (E1000_PCS_STATUS_TX_LPI_RCVD |
|
||||||
E1000_PCS_STATUS_RX_LPI_RCVD) ? TRUE : FALSE;
|
E1000_PCS_STATUS_RX_LPI_RCVD) ? true : false;
|
||||||
|
|
||||||
out:
|
out:
|
||||||
return ret_val;
|
return ret_val;
|
||||||
@ -3032,7 +3032,7 @@ s32 e1000_read_i2c_byte_generic(struct e1000_hw *hw, u8 byte_offset,
|
|||||||
u32 retry = 1;
|
u32 retry = 1;
|
||||||
u16 swfw_mask = 0;
|
u16 swfw_mask = 0;
|
||||||
|
|
||||||
bool nack = TRUE;
|
bool nack = true;
|
||||||
|
|
||||||
DEBUGFUNC("e1000_read_i2c_byte_generic");
|
DEBUGFUNC("e1000_read_i2c_byte_generic");
|
||||||
|
|
||||||
@ -3299,7 +3299,7 @@ static s32 e1000_get_i2c_ack(struct e1000_hw *hw)
|
|||||||
u32 i = 0;
|
u32 i = 0;
|
||||||
u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
|
u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
|
||||||
u32 timeout = 10;
|
u32 timeout = 10;
|
||||||
bool ack = TRUE;
|
bool ack = true;
|
||||||
|
|
||||||
DEBUGFUNC("e1000_get_i2c_ack");
|
DEBUGFUNC("e1000_get_i2c_ack");
|
||||||
|
|
||||||
|
@ -421,10 +421,10 @@ s32 e1000_set_mac_type(struct e1000_hw *hw)
|
|||||||
/**
|
/**
|
||||||
* e1000_setup_init_funcs - Initializes function pointers
|
* e1000_setup_init_funcs - Initializes function pointers
|
||||||
* @hw: pointer to the HW structure
|
* @hw: pointer to the HW structure
|
||||||
* @init_device: TRUE will initialize the rest of the function pointers
|
* @init_device: true will initialize the rest of the function pointers
|
||||||
* getting the device ready for use. FALSE will only set
|
* getting the device ready for use. false will only set
|
||||||
* MAC type and the function pointers for the other init
|
* MAC type and the function pointers for the other init
|
||||||
* functions. Passing FALSE will not generate any hardware
|
* functions. Passing false will not generate any hardware
|
||||||
* reads or writes.
|
* reads or writes.
|
||||||
*
|
*
|
||||||
* This function must be called by a driver in order to use the rest
|
* This function must be called by a driver in order to use the rest
|
||||||
@ -656,7 +656,7 @@ bool e1000_check_mng_mode(struct e1000_hw *hw)
|
|||||||
if (hw->mac.ops.check_mng_mode)
|
if (hw->mac.ops.check_mng_mode)
|
||||||
return hw->mac.ops.check_mng_mode(hw);
|
return hw->mac.ops.check_mng_mode(hw);
|
||||||
|
|
||||||
return FALSE;
|
return false;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -1186,7 +1186,7 @@ s32 e1000_phy_commit(struct e1000_hw *hw)
|
|||||||
* Success returns 0, Failure returns 1
|
* Success returns 0, Failure returns 1
|
||||||
*
|
*
|
||||||
* The low power link up (lplu) state is set to the power management level D0
|
* The low power link up (lplu) state is set to the power management level D0
|
||||||
* and SmartSpeed is disabled when active is TRUE, else clear lplu for D0
|
* and SmartSpeed is disabled when active is true, else clear lplu for D0
|
||||||
* and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU
|
* and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU
|
||||||
* is used during Dx states where the power conservation is most important.
|
* is used during Dx states where the power conservation is most important.
|
||||||
* During driver activity, SmartSpeed should be enabled so performance is
|
* During driver activity, SmartSpeed should be enabled so performance is
|
||||||
@ -1208,7 +1208,7 @@ s32 e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active)
|
|||||||
* Success returns 0, Failure returns 1
|
* Success returns 0, Failure returns 1
|
||||||
*
|
*
|
||||||
* The low power link up (lplu) state is set to the power management level D3
|
* The low power link up (lplu) state is set to the power management level D3
|
||||||
* and SmartSpeed is disabled when active is TRUE, else clear lplu for D3
|
* and SmartSpeed is disabled when active is true, else clear lplu for D3
|
||||||
* and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU
|
* and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU
|
||||||
* is used during Dx states where the power conservation is most important.
|
* is used during Dx states where the power conservation is most important.
|
||||||
* During driver activity, SmartSpeed should be enabled so performance is
|
* During driver activity, SmartSpeed should be enabled so performance is
|
||||||
|
@ -140,11 +140,11 @@ u32 e1000_translate_register_82542(u32 reg);
|
|||||||
* Typical use:
|
* Typical use:
|
||||||
* ...
|
* ...
|
||||||
* if (TBI_ACCEPT) {
|
* if (TBI_ACCEPT) {
|
||||||
* accept_frame = TRUE;
|
* accept_frame = true;
|
||||||
* e1000_tbi_adjust_stats(adapter, MacAddress);
|
* e1000_tbi_adjust_stats(adapter, MacAddress);
|
||||||
* frame_length--;
|
* frame_length--;
|
||||||
* } else {
|
* } else {
|
||||||
* accept_frame = FALSE;
|
* accept_frame = false;
|
||||||
* }
|
* }
|
||||||
* ...
|
* ...
|
||||||
*/
|
*/
|
||||||
|
@ -275,7 +275,7 @@ enum e1000_mac_type {
|
|||||||
e1000_i211,
|
e1000_i211,
|
||||||
e1000_vfadapt,
|
e1000_vfadapt,
|
||||||
e1000_vfadapt_i350,
|
e1000_vfadapt_i350,
|
||||||
e1000_num_macs /* List is 1-based, so subtract 1 for TRUE count. */
|
e1000_num_macs /* List is 1-based, so subtract 1 for true count. */
|
||||||
};
|
};
|
||||||
|
|
||||||
enum e1000_media_type {
|
enum e1000_media_type {
|
||||||
|
@ -552,14 +552,14 @@ s32 e1000_update_nvm_checksum_i210(struct e1000_hw *hw)
|
|||||||
bool e1000_get_flash_presence_i210(struct e1000_hw *hw)
|
bool e1000_get_flash_presence_i210(struct e1000_hw *hw)
|
||||||
{
|
{
|
||||||
u32 eec = 0;
|
u32 eec = 0;
|
||||||
bool ret_val = FALSE;
|
bool ret_val = false;
|
||||||
|
|
||||||
DEBUGFUNC("e1000_get_flash_presence_i210");
|
DEBUGFUNC("e1000_get_flash_presence_i210");
|
||||||
|
|
||||||
eec = E1000_READ_REG(hw, E1000_EECD);
|
eec = E1000_READ_REG(hw, E1000_EECD);
|
||||||
|
|
||||||
if (eec & E1000_EECD_FLASH_DETECTED_I210)
|
if (eec & E1000_EECD_FLASH_DETECTED_I210)
|
||||||
ret_val = TRUE;
|
ret_val = true;
|
||||||
|
|
||||||
return ret_val;
|
return ret_val;
|
||||||
}
|
}
|
||||||
|
@ -242,7 +242,7 @@ static bool e1000_phy_is_accessible_pchlan(struct e1000_hw *hw)
|
|||||||
}
|
}
|
||||||
|
|
||||||
if (ret_val)
|
if (ret_val)
|
||||||
return FALSE;
|
return false;
|
||||||
out:
|
out:
|
||||||
if (hw->mac.type >= e1000_pch_lpt) {
|
if (hw->mac.type >= e1000_pch_lpt) {
|
||||||
/* Only unforce SMBus if ME is not active */
|
/* Only unforce SMBus if ME is not active */
|
||||||
@ -260,7 +260,7 @@ static bool e1000_phy_is_accessible_pchlan(struct e1000_hw *hw)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
return TRUE;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -324,7 +324,7 @@ static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw)
|
|||||||
/* Gate automatic PHY configuration by hardware on managed and
|
/* Gate automatic PHY configuration by hardware on managed and
|
||||||
* non-managed 82579 and newer adapters.
|
* non-managed 82579 and newer adapters.
|
||||||
*/
|
*/
|
||||||
e1000_gate_hw_phy_config_ich8lan(hw, TRUE);
|
e1000_gate_hw_phy_config_ich8lan(hw, true);
|
||||||
|
|
||||||
/* It is not possible to be certain of the current state of ULP
|
/* It is not possible to be certain of the current state of ULP
|
||||||
* so forcibly disable it.
|
* so forcibly disable it.
|
||||||
@ -439,7 +439,7 @@ static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw)
|
|||||||
if ((hw->mac.type == e1000_pch2lan) &&
|
if ((hw->mac.type == e1000_pch2lan) &&
|
||||||
!(fwsm & E1000_ICH_FWSM_FW_VALID)) {
|
!(fwsm & E1000_ICH_FWSM_FW_VALID)) {
|
||||||
msec_delay(10);
|
msec_delay(10);
|
||||||
e1000_gate_hw_phy_config_ich8lan(hw, FALSE);
|
e1000_gate_hw_phy_config_ich8lan(hw, false);
|
||||||
}
|
}
|
||||||
|
|
||||||
return ret_val;
|
return ret_val;
|
||||||
@ -699,7 +699,7 @@ static s32 e1000_init_nvm_params_ich8lan(struct e1000_hw *hw)
|
|||||||
|
|
||||||
/* Clear shadow ram */
|
/* Clear shadow ram */
|
||||||
for (i = 0; i < nvm->word_size; i++) {
|
for (i = 0; i < nvm->word_size; i++) {
|
||||||
dev_spec->shadow_ram[i].modified = FALSE;
|
dev_spec->shadow_ram[i].modified = false;
|
||||||
dev_spec->shadow_ram[i].value = 0xFFFF;
|
dev_spec->shadow_ram[i].value = 0xFFFF;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -743,13 +743,13 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
|
|||||||
if (mac->type == e1000_ich8lan)
|
if (mac->type == e1000_ich8lan)
|
||||||
mac->rar_entry_count--;
|
mac->rar_entry_count--;
|
||||||
/* Set if part includes ASF firmware */
|
/* Set if part includes ASF firmware */
|
||||||
mac->asf_firmware_present = TRUE;
|
mac->asf_firmware_present = true;
|
||||||
/* FWSM register */
|
/* FWSM register */
|
||||||
mac->has_fwsm = TRUE;
|
mac->has_fwsm = true;
|
||||||
/* ARC subsystem not supported */
|
/* ARC subsystem not supported */
|
||||||
mac->arc_subsystem_valid = FALSE;
|
mac->arc_subsystem_valid = false;
|
||||||
/* Adaptive IFS supported */
|
/* Adaptive IFS supported */
|
||||||
mac->adaptive_ifs = TRUE;
|
mac->adaptive_ifs = true;
|
||||||
|
|
||||||
/* Function pointers */
|
/* Function pointers */
|
||||||
|
|
||||||
@ -833,7 +833,7 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
|
|||||||
|
|
||||||
/* Enable PCS Lock-loss workaround for ICH8 */
|
/* Enable PCS Lock-loss workaround for ICH8 */
|
||||||
if (mac->type == e1000_ich8lan)
|
if (mac->type == e1000_ich8lan)
|
||||||
e1000_set_kmrn_lock_loss_workaround_ich8lan(hw, TRUE);
|
e1000_set_kmrn_lock_loss_workaround_ich8lan(hw, true);
|
||||||
|
|
||||||
return E1000_SUCCESS;
|
return E1000_SUCCESS;
|
||||||
}
|
}
|
||||||
@ -880,7 +880,7 @@ s32 e1000_read_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 *data)
|
|||||||
{
|
{
|
||||||
DEBUGFUNC("e1000_read_emi_reg_locked");
|
DEBUGFUNC("e1000_read_emi_reg_locked");
|
||||||
|
|
||||||
return __e1000_access_emi_reg_locked(hw, addr, data, TRUE);
|
return __e1000_access_emi_reg_locked(hw, addr, data, true);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -895,7 +895,7 @@ s32 e1000_write_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 data)
|
|||||||
{
|
{
|
||||||
DEBUGFUNC("e1000_read_emi_reg_locked");
|
DEBUGFUNC("e1000_read_emi_reg_locked");
|
||||||
|
|
||||||
return __e1000_access_emi_reg_locked(hw, addr, &data, FALSE);
|
return __e1000_access_emi_reg_locked(hw, addr, &data, false);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -1112,7 +1112,7 @@ static u64 e1000_ltr2ns(u16 ltr)
|
|||||||
* GbE MAC in the Lynx Point PCH based on Rx buffer size and link speed
|
* GbE MAC in the Lynx Point PCH based on Rx buffer size and link speed
|
||||||
* when link is up (which must not exceed the maximum latency supported
|
* when link is up (which must not exceed the maximum latency supported
|
||||||
* by the platform), otherwise specify there is no LTR requirement.
|
* by the platform), otherwise specify there is no LTR requirement.
|
||||||
* Unlike TRUE-PCIe devices which set the LTR maximum snoop/no-snoop
|
* Unlike true-PCIe devices which set the LTR maximum snoop/no-snoop
|
||||||
* latencies in the LTR Extended Capability Structure in the PCIe Extended
|
* latencies in the LTR Extended Capability Structure in the PCIe Extended
|
||||||
* Capability register set, on this device LTR is set by writing the
|
* Capability register set, on this device LTR is set by writing the
|
||||||
* equivalent snoop/no-snoop latencies in the LTRV register in the MAC and
|
* equivalent snoop/no-snoop latencies in the LTRV register in the MAC and
|
||||||
@ -1410,8 +1410,8 @@ s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx)
|
|||||||
* If not on an ME enabled system, un-configure the ULP mode by software.
|
* If not on an ME enabled system, un-configure the ULP mode by software.
|
||||||
*
|
*
|
||||||
* During nominal operation, this function is called when link is acquired
|
* During nominal operation, this function is called when link is acquired
|
||||||
* to disable ULP mode (force=FALSE); otherwise, for example when unloading
|
* to disable ULP mode (force=false); otherwise, for example when unloading
|
||||||
* the driver or during Sx->S0 transitions, this is called with force=TRUE
|
* the driver or during Sx->S0 transitions, this is called with force=true
|
||||||
* to forcibly disable ULP.
|
* to forcibly disable ULP.
|
||||||
*/
|
*/
|
||||||
s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force)
|
s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force)
|
||||||
@ -1745,7 +1745,7 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
|
|||||||
fextnvm6 &= ~E1000_FEXTNVM6_K1_OFF_ENABLE;
|
fextnvm6 &= ~E1000_FEXTNVM6_K1_OFF_ENABLE;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (hw->dev_spec.ich8lan.disable_k1_off == TRUE)
|
if (hw->dev_spec.ich8lan.disable_k1_off == true)
|
||||||
fextnvm6 &= ~E1000_FEXTNVM6_K1_OFF_ENABLE;
|
fextnvm6 &= ~E1000_FEXTNVM6_K1_OFF_ENABLE;
|
||||||
|
|
||||||
E1000_WRITE_REG(hw, E1000_FEXTNVM6, fextnvm6);
|
E1000_WRITE_REG(hw, E1000_FEXTNVM6, fextnvm6);
|
||||||
@ -1754,7 +1754,7 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
|
|||||||
if (!link)
|
if (!link)
|
||||||
return E1000_SUCCESS; /* No link detected */
|
return E1000_SUCCESS; /* No link detected */
|
||||||
|
|
||||||
mac->get_link_status = FALSE;
|
mac->get_link_status = false;
|
||||||
|
|
||||||
switch (hw->mac.type) {
|
switch (hw->mac.type) {
|
||||||
case e1000_pch2lan:
|
case e1000_pch2lan:
|
||||||
@ -2209,7 +2209,7 @@ static void e1000_update_mc_addr_list_pch2lan(struct e1000_hw *hw,
|
|||||||
static s32 e1000_check_reset_block_ich8lan(struct e1000_hw *hw)
|
static s32 e1000_check_reset_block_ich8lan(struct e1000_hw *hw)
|
||||||
{
|
{
|
||||||
u32 fwsm;
|
u32 fwsm;
|
||||||
bool blocked = FALSE;
|
bool blocked = false;
|
||||||
int i = 0;
|
int i = 0;
|
||||||
|
|
||||||
DEBUGFUNC("e1000_check_reset_block_ich8lan");
|
DEBUGFUNC("e1000_check_reset_block_ich8lan");
|
||||||
@ -2217,11 +2217,11 @@ static s32 e1000_check_reset_block_ich8lan(struct e1000_hw *hw)
|
|||||||
do {
|
do {
|
||||||
fwsm = E1000_READ_REG(hw, E1000_FWSM);
|
fwsm = E1000_READ_REG(hw, E1000_FWSM);
|
||||||
if (!(fwsm & E1000_ICH_FWSM_RSPCIPHY)) {
|
if (!(fwsm & E1000_ICH_FWSM_RSPCIPHY)) {
|
||||||
blocked = TRUE;
|
blocked = true;
|
||||||
msec_delay(10);
|
msec_delay(10);
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
blocked = FALSE;
|
blocked = false;
|
||||||
} while (blocked && (i++ < 30));
|
} while (blocked && (i++ < 30));
|
||||||
return blocked ? E1000_BLK_PHY_RESET : E1000_SUCCESS;
|
return blocked ? E1000_BLK_PHY_RESET : E1000_SUCCESS;
|
||||||
}
|
}
|
||||||
@ -2435,7 +2435,7 @@ static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link)
|
|||||||
if (status_reg == (BM_CS_STATUS_LINK_UP |
|
if (status_reg == (BM_CS_STATUS_LINK_UP |
|
||||||
BM_CS_STATUS_RESOLVED |
|
BM_CS_STATUS_RESOLVED |
|
||||||
BM_CS_STATUS_SPEED_1000))
|
BM_CS_STATUS_SPEED_1000))
|
||||||
k1_enable = FALSE;
|
k1_enable = false;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (hw->phy.type == e1000_phy_82577) {
|
if (hw->phy.type == e1000_phy_82577) {
|
||||||
@ -2451,7 +2451,7 @@ static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link)
|
|||||||
if (status_reg == (HV_M_STATUS_LINK_UP |
|
if (status_reg == (HV_M_STATUS_LINK_UP |
|
||||||
HV_M_STATUS_AUTONEG_COMPLETE |
|
HV_M_STATUS_AUTONEG_COMPLETE |
|
||||||
HV_M_STATUS_SPEED_1000))
|
HV_M_STATUS_SPEED_1000))
|
||||||
k1_enable = FALSE;
|
k1_enable = false;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Link stall fix for link up */
|
/* Link stall fix for link up */
|
||||||
@ -2688,7 +2688,7 @@ static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw)
|
|||||||
/* Configure the K1 Si workaround during phy reset assuming there is
|
/* Configure the K1 Si workaround during phy reset assuming there is
|
||||||
* link so that it disables K1 if link is in 1Gbps.
|
* link so that it disables K1 if link is in 1Gbps.
|
||||||
*/
|
*/
|
||||||
ret_val = e1000_k1_gig_workaround_hv(hw, TRUE);
|
ret_val = e1000_k1_gig_workaround_hv(hw, true);
|
||||||
if (ret_val)
|
if (ret_val)
|
||||||
return ret_val;
|
return ret_val;
|
||||||
|
|
||||||
@ -3033,7 +3033,7 @@ static s32 e1000_k1_workaround_lv(struct e1000_hw *hw)
|
|||||||
/**
|
/**
|
||||||
* e1000_gate_hw_phy_config_ich8lan - disable PHY config via hardware
|
* e1000_gate_hw_phy_config_ich8lan - disable PHY config via hardware
|
||||||
* @hw: pointer to the HW structure
|
* @hw: pointer to the HW structure
|
||||||
* @gate: boolean set to TRUE to gate, FALSE to ungate
|
* @gate: boolean set to true to gate, false to ungate
|
||||||
*
|
*
|
||||||
* Gate/ungate the automatic PHY configuration via hardware; perform
|
* Gate/ungate the automatic PHY configuration via hardware; perform
|
||||||
* the configuration via software instead.
|
* the configuration via software instead.
|
||||||
@ -3136,14 +3136,14 @@ static s32 e1000_post_phy_reset_ich8lan(struct e1000_hw *hw)
|
|||||||
return ret_val;
|
return ret_val;
|
||||||
|
|
||||||
/* Configure the LCD with the OEM bits in NVM */
|
/* Configure the LCD with the OEM bits in NVM */
|
||||||
ret_val = e1000_oem_bits_config_ich8lan(hw, TRUE);
|
ret_val = e1000_oem_bits_config_ich8lan(hw, true);
|
||||||
|
|
||||||
if (hw->mac.type == e1000_pch2lan) {
|
if (hw->mac.type == e1000_pch2lan) {
|
||||||
/* Ungate automatic PHY configuration on non-managed 82579 */
|
/* Ungate automatic PHY configuration on non-managed 82579 */
|
||||||
if (!(E1000_READ_REG(hw, E1000_FWSM) &
|
if (!(E1000_READ_REG(hw, E1000_FWSM) &
|
||||||
E1000_ICH_FWSM_FW_VALID)) {
|
E1000_ICH_FWSM_FW_VALID)) {
|
||||||
msec_delay(10);
|
msec_delay(10);
|
||||||
e1000_gate_hw_phy_config_ich8lan(hw, FALSE);
|
e1000_gate_hw_phy_config_ich8lan(hw, false);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Set EEE LPI Update Timer to 200usec */
|
/* Set EEE LPI Update Timer to 200usec */
|
||||||
@ -3176,7 +3176,7 @@ static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw)
|
|||||||
/* Gate automatic PHY configuration by hardware on non-managed 82579 */
|
/* Gate automatic PHY configuration by hardware on non-managed 82579 */
|
||||||
if ((hw->mac.type == e1000_pch2lan) &&
|
if ((hw->mac.type == e1000_pch2lan) &&
|
||||||
!(E1000_READ_REG(hw, E1000_FWSM) & E1000_ICH_FWSM_FW_VALID))
|
!(E1000_READ_REG(hw, E1000_FWSM) & E1000_ICH_FWSM_FW_VALID))
|
||||||
e1000_gate_hw_phy_config_ich8lan(hw, TRUE);
|
e1000_gate_hw_phy_config_ich8lan(hw, true);
|
||||||
|
|
||||||
ret_val = e1000_phy_hw_reset_generic(hw);
|
ret_val = e1000_phy_hw_reset_generic(hw);
|
||||||
if (ret_val)
|
if (ret_val)
|
||||||
@ -3188,7 +3188,7 @@ static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw)
|
|||||||
/**
|
/**
|
||||||
* e1000_set_lplu_state_pchlan - Set Low Power Link Up state
|
* e1000_set_lplu_state_pchlan - Set Low Power Link Up state
|
||||||
* @hw: pointer to the HW structure
|
* @hw: pointer to the HW structure
|
||||||
* @active: TRUE to enable LPLU, FALSE to disable
|
* @active: true to enable LPLU, false to disable
|
||||||
*
|
*
|
||||||
* Sets the LPLU state according to the active flag. For PCH, if OEM write
|
* Sets the LPLU state according to the active flag. For PCH, if OEM write
|
||||||
* bit are disabled in the NVM, writing the LPLU bits in the MAC will not set
|
* bit are disabled in the NVM, writing the LPLU bits in the MAC will not set
|
||||||
@ -3220,7 +3220,7 @@ static s32 e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active)
|
|||||||
/**
|
/**
|
||||||
* e1000_set_d0_lplu_state_ich8lan - Set Low Power Linkup D0 state
|
* e1000_set_d0_lplu_state_ich8lan - Set Low Power Linkup D0 state
|
||||||
* @hw: pointer to the HW structure
|
* @hw: pointer to the HW structure
|
||||||
* @active: TRUE to enable LPLU, FALSE to disable
|
* @active: true to enable LPLU, false to disable
|
||||||
*
|
*
|
||||||
* Sets the LPLU D0 state according to the active flag. When
|
* Sets the LPLU D0 state according to the active flag. When
|
||||||
* activating LPLU this function also disables smart speed
|
* activating LPLU this function also disables smart speed
|
||||||
@ -3316,7 +3316,7 @@ static s32 e1000_set_d0_lplu_state_ich8lan(struct e1000_hw *hw, bool active)
|
|||||||
/**
|
/**
|
||||||
* e1000_set_d3_lplu_state_ich8lan - Set Low Power Linkup D3 state
|
* e1000_set_d3_lplu_state_ich8lan - Set Low Power Linkup D3 state
|
||||||
* @hw: pointer to the HW structure
|
* @hw: pointer to the HW structure
|
||||||
* @active: TRUE to enable LPLU, FALSE to disable
|
* @active: true to enable LPLU, false to disable
|
||||||
*
|
*
|
||||||
* Sets the LPLU D3 state according to the active flag. When
|
* Sets the LPLU D3 state according to the active flag. When
|
||||||
* activating LPLU this function also disables smart speed
|
* activating LPLU this function also disables smart speed
|
||||||
@ -4054,7 +4054,7 @@ static s32 e1000_write_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
|
|||||||
nvm->ops.acquire(hw);
|
nvm->ops.acquire(hw);
|
||||||
|
|
||||||
for (i = 0; i < words; i++) {
|
for (i = 0; i < words; i++) {
|
||||||
dev_spec->shadow_ram[offset + i].modified = TRUE;
|
dev_spec->shadow_ram[offset + i].modified = true;
|
||||||
dev_spec->shadow_ram[offset + i].value = data[i];
|
dev_spec->shadow_ram[offset + i].value = data[i];
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -4203,7 +4203,7 @@ static s32 e1000_update_nvm_checksum_spt(struct e1000_hw *hw)
|
|||||||
|
|
||||||
/* Great! Everything worked, we can now clear the cached entries. */
|
/* Great! Everything worked, we can now clear the cached entries. */
|
||||||
for (i = 0; i < E1000_SHADOW_RAM_WORDS; i++) {
|
for (i = 0; i < E1000_SHADOW_RAM_WORDS; i++) {
|
||||||
dev_spec->shadow_ram[i].modified = FALSE;
|
dev_spec->shadow_ram[i].modified = false;
|
||||||
dev_spec->shadow_ram[i].value = 0xFFFF;
|
dev_spec->shadow_ram[i].value = 0xFFFF;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -4356,7 +4356,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw)
|
|||||||
|
|
||||||
/* Great! Everything worked, we can now clear the cached entries. */
|
/* Great! Everything worked, we can now clear the cached entries. */
|
||||||
for (i = 0; i < E1000_SHADOW_RAM_WORDS; i++) {
|
for (i = 0; i < E1000_SHADOW_RAM_WORDS; i++) {
|
||||||
dev_spec->shadow_ram[i].modified = FALSE;
|
dev_spec->shadow_ram[i].modified = false;
|
||||||
dev_spec->shadow_ram[i].value = 0xFFFF;
|
dev_spec->shadow_ram[i].value = 0xFFFF;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -5009,9 +5009,9 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
|
|||||||
return ret_val;
|
return ret_val;
|
||||||
|
|
||||||
if (kum_cfg & E1000_NVM_K1_ENABLE)
|
if (kum_cfg & E1000_NVM_K1_ENABLE)
|
||||||
dev_spec->nvm_k1_enabled = TRUE;
|
dev_spec->nvm_k1_enabled = true;
|
||||||
else
|
else
|
||||||
dev_spec->nvm_k1_enabled = FALSE;
|
dev_spec->nvm_k1_enabled = false;
|
||||||
}
|
}
|
||||||
|
|
||||||
ctrl = E1000_READ_REG(hw, E1000_CTRL);
|
ctrl = E1000_READ_REG(hw, E1000_CTRL);
|
||||||
@ -5028,7 +5028,7 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
|
|||||||
*/
|
*/
|
||||||
if ((hw->mac.type == e1000_pch2lan) &&
|
if ((hw->mac.type == e1000_pch2lan) &&
|
||||||
!(E1000_READ_REG(hw, E1000_FWSM) & E1000_ICH_FWSM_FW_VALID))
|
!(E1000_READ_REG(hw, E1000_FWSM) & E1000_ICH_FWSM_FW_VALID))
|
||||||
e1000_gate_hw_phy_config_ich8lan(hw, TRUE);
|
e1000_gate_hw_phy_config_ich8lan(hw, true);
|
||||||
}
|
}
|
||||||
ret_val = e1000_acquire_swflag_ich8lan(hw);
|
ret_val = e1000_acquire_swflag_ich8lan(hw);
|
||||||
|
|
||||||
@ -5537,8 +5537,8 @@ static s32 e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw)
|
|||||||
* @hw: pointer to the HW structure
|
* @hw: pointer to the HW structure
|
||||||
* @state: boolean value used to set the current Kumeran workaround state
|
* @state: boolean value used to set the current Kumeran workaround state
|
||||||
*
|
*
|
||||||
* If ICH8, set the current Kumeran workaround state (enabled - TRUE
|
* If ICH8, set the current Kumeran workaround state (enabled - true
|
||||||
* /disabled - FALSE).
|
* /disabled - false).
|
||||||
**/
|
**/
|
||||||
void e1000_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,
|
void e1000_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,
|
||||||
bool state)
|
bool state)
|
||||||
@ -5769,7 +5769,7 @@ void e1000_suspend_workarounds_ich8lan(struct e1000_hw *hw)
|
|||||||
e1000_gig_downshift_workaround_ich8lan(hw);
|
e1000_gig_downshift_workaround_ich8lan(hw);
|
||||||
|
|
||||||
if (hw->mac.type >= e1000_pchlan) {
|
if (hw->mac.type >= e1000_pchlan) {
|
||||||
e1000_oem_bits_config_ich8lan(hw, FALSE);
|
e1000_oem_bits_config_ich8lan(hw, false);
|
||||||
|
|
||||||
/* Reset PHY to activate OEM bits on 82577/8 */
|
/* Reset PHY to activate OEM bits on 82577/8 */
|
||||||
if (hw->mac.type == e1000_pchlan)
|
if (hw->mac.type == e1000_pchlan)
|
||||||
|
@ -115,13 +115,13 @@ s32 e1000_null_link_info(struct e1000_hw E1000_UNUSEDARG *hw,
|
|||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* e1000_null_mng_mode - No-op function, return FALSE
|
* e1000_null_mng_mode - No-op function, return false
|
||||||
* @hw: pointer to the HW structure
|
* @hw: pointer to the HW structure
|
||||||
**/
|
**/
|
||||||
bool e1000_null_mng_mode(struct e1000_hw E1000_UNUSEDARG *hw)
|
bool e1000_null_mng_mode(struct e1000_hw E1000_UNUSEDARG *hw)
|
||||||
{
|
{
|
||||||
DEBUGFUNC("e1000_null_mng_mode");
|
DEBUGFUNC("e1000_null_mng_mode");
|
||||||
return FALSE;
|
return false;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -741,7 +741,7 @@ s32 e1000_check_for_copper_link_generic(struct e1000_hw *hw)
|
|||||||
if (!link)
|
if (!link)
|
||||||
return E1000_SUCCESS; /* No link detected */
|
return E1000_SUCCESS; /* No link detected */
|
||||||
|
|
||||||
mac->get_link_status = FALSE;
|
mac->get_link_status = false;
|
||||||
|
|
||||||
/* Check if there was DownShift, must be checked
|
/* Check if there was DownShift, must be checked
|
||||||
* immediately after link-up
|
* immediately after link-up
|
||||||
@ -804,7 +804,7 @@ s32 e1000_check_for_fiber_link_generic(struct e1000_hw *hw)
|
|||||||
if ((ctrl & E1000_CTRL_SWDPIN1) && !(status & E1000_STATUS_LU) &&
|
if ((ctrl & E1000_CTRL_SWDPIN1) && !(status & E1000_STATUS_LU) &&
|
||||||
!(rxcw & E1000_RXCW_C)) {
|
!(rxcw & E1000_RXCW_C)) {
|
||||||
if (!mac->autoneg_failed) {
|
if (!mac->autoneg_failed) {
|
||||||
mac->autoneg_failed = TRUE;
|
mac->autoneg_failed = true;
|
||||||
return E1000_SUCCESS;
|
return E1000_SUCCESS;
|
||||||
}
|
}
|
||||||
DEBUGOUT("NOT Rx'ing /C/, disable AutoNeg and force link.\n");
|
DEBUGOUT("NOT Rx'ing /C/, disable AutoNeg and force link.\n");
|
||||||
@ -833,7 +833,7 @@ s32 e1000_check_for_fiber_link_generic(struct e1000_hw *hw)
|
|||||||
E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw);
|
E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw);
|
||||||
E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & ~E1000_CTRL_SLU));
|
E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & ~E1000_CTRL_SLU));
|
||||||
|
|
||||||
mac->serdes_has_link = TRUE;
|
mac->serdes_has_link = true;
|
||||||
}
|
}
|
||||||
|
|
||||||
return E1000_SUCCESS;
|
return E1000_SUCCESS;
|
||||||
@ -869,7 +869,7 @@ s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw)
|
|||||||
/* (ctrl & E1000_CTRL_SWDPIN1) == 1 == have signal */
|
/* (ctrl & E1000_CTRL_SWDPIN1) == 1 == have signal */
|
||||||
if (!(status & E1000_STATUS_LU) && !(rxcw & E1000_RXCW_C)) {
|
if (!(status & E1000_STATUS_LU) && !(rxcw & E1000_RXCW_C)) {
|
||||||
if (!mac->autoneg_failed) {
|
if (!mac->autoneg_failed) {
|
||||||
mac->autoneg_failed = TRUE;
|
mac->autoneg_failed = true;
|
||||||
return E1000_SUCCESS;
|
return E1000_SUCCESS;
|
||||||
}
|
}
|
||||||
DEBUGOUT("NOT Rx'ing /C/, disable AutoNeg and force link.\n");
|
DEBUGOUT("NOT Rx'ing /C/, disable AutoNeg and force link.\n");
|
||||||
@ -898,7 +898,7 @@ s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw)
|
|||||||
E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw);
|
E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw);
|
||||||
E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & ~E1000_CTRL_SLU));
|
E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & ~E1000_CTRL_SLU));
|
||||||
|
|
||||||
mac->serdes_has_link = TRUE;
|
mac->serdes_has_link = true;
|
||||||
} else if (!(E1000_TXCW_ANE & E1000_READ_REG(hw, E1000_TXCW))) {
|
} else if (!(E1000_TXCW_ANE & E1000_READ_REG(hw, E1000_TXCW))) {
|
||||||
/* If we force link for non-auto-negotiation switch, check
|
/* If we force link for non-auto-negotiation switch, check
|
||||||
* link status based on MAC synchronization for internal
|
* link status based on MAC synchronization for internal
|
||||||
@ -909,11 +909,11 @@ s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw)
|
|||||||
rxcw = E1000_READ_REG(hw, E1000_RXCW);
|
rxcw = E1000_READ_REG(hw, E1000_RXCW);
|
||||||
if (rxcw & E1000_RXCW_SYNCH) {
|
if (rxcw & E1000_RXCW_SYNCH) {
|
||||||
if (!(rxcw & E1000_RXCW_IV)) {
|
if (!(rxcw & E1000_RXCW_IV)) {
|
||||||
mac->serdes_has_link = TRUE;
|
mac->serdes_has_link = true;
|
||||||
DEBUGOUT("SERDES: Link up - forced.\n");
|
DEBUGOUT("SERDES: Link up - forced.\n");
|
||||||
}
|
}
|
||||||
} else {
|
} else {
|
||||||
mac->serdes_has_link = FALSE;
|
mac->serdes_has_link = false;
|
||||||
DEBUGOUT("SERDES: Link down - force failed.\n");
|
DEBUGOUT("SERDES: Link down - force failed.\n");
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -926,18 +926,18 @@ s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw)
|
|||||||
rxcw = E1000_READ_REG(hw, E1000_RXCW);
|
rxcw = E1000_READ_REG(hw, E1000_RXCW);
|
||||||
if (rxcw & E1000_RXCW_SYNCH) {
|
if (rxcw & E1000_RXCW_SYNCH) {
|
||||||
if (!(rxcw & E1000_RXCW_IV)) {
|
if (!(rxcw & E1000_RXCW_IV)) {
|
||||||
mac->serdes_has_link = TRUE;
|
mac->serdes_has_link = true;
|
||||||
DEBUGOUT("SERDES: Link up - autoneg completed successfully.\n");
|
DEBUGOUT("SERDES: Link up - autoneg completed successfully.\n");
|
||||||
} else {
|
} else {
|
||||||
mac->serdes_has_link = FALSE;
|
mac->serdes_has_link = false;
|
||||||
DEBUGOUT("SERDES: Link down - invalid codewords detected in autoneg.\n");
|
DEBUGOUT("SERDES: Link down - invalid codewords detected in autoneg.\n");
|
||||||
}
|
}
|
||||||
} else {
|
} else {
|
||||||
mac->serdes_has_link = FALSE;
|
mac->serdes_has_link = false;
|
||||||
DEBUGOUT("SERDES: Link down - no sync.\n");
|
DEBUGOUT("SERDES: Link down - no sync.\n");
|
||||||
}
|
}
|
||||||
} else {
|
} else {
|
||||||
mac->serdes_has_link = FALSE;
|
mac->serdes_has_link = false;
|
||||||
DEBUGOUT("SERDES: Link down - autoneg failed\n");
|
DEBUGOUT("SERDES: Link down - autoneg failed\n");
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -1140,7 +1140,7 @@ s32 e1000_poll_fiber_serdes_link_generic(struct e1000_hw *hw)
|
|||||||
|
|
||||||
DEBUGFUNC("e1000_poll_fiber_serdes_link_generic");
|
DEBUGFUNC("e1000_poll_fiber_serdes_link_generic");
|
||||||
|
|
||||||
/* If we have a signal (the cable is plugged in, or assumed TRUE for
|
/* If we have a signal (the cable is plugged in, or assumed true for
|
||||||
* serdes media) then poll for a "Link-Up" indication in the Device
|
* serdes media) then poll for a "Link-Up" indication in the Device
|
||||||
* Status Register. Time-out if a link isn't seen in 500 milliseconds
|
* Status Register. Time-out if a link isn't seen in 500 milliseconds
|
||||||
* seconds (Auto-negotiation should complete in less than 500
|
* seconds (Auto-negotiation should complete in less than 500
|
||||||
@ -1154,7 +1154,7 @@ s32 e1000_poll_fiber_serdes_link_generic(struct e1000_hw *hw)
|
|||||||
}
|
}
|
||||||
if (i == FIBER_LINK_UP_LIMIT) {
|
if (i == FIBER_LINK_UP_LIMIT) {
|
||||||
DEBUGOUT("Never got a valid link from auto-neg!!!\n");
|
DEBUGOUT("Never got a valid link from auto-neg!!!\n");
|
||||||
mac->autoneg_failed = TRUE;
|
mac->autoneg_failed = true;
|
||||||
/* AutoNeg failed to achieve a link, so we'll call
|
/* AutoNeg failed to achieve a link, so we'll call
|
||||||
* mac->check_for_link. This routine will force the
|
* mac->check_for_link. This routine will force the
|
||||||
* link up if we detect a signal. This will allow us to
|
* link up if we detect a signal. This will allow us to
|
||||||
@ -1165,9 +1165,9 @@ s32 e1000_poll_fiber_serdes_link_generic(struct e1000_hw *hw)
|
|||||||
DEBUGOUT("Error while checking for link\n");
|
DEBUGOUT("Error while checking for link\n");
|
||||||
return ret_val;
|
return ret_val;
|
||||||
}
|
}
|
||||||
mac->autoneg_failed = FALSE;
|
mac->autoneg_failed = false;
|
||||||
} else {
|
} else {
|
||||||
mac->autoneg_failed = FALSE;
|
mac->autoneg_failed = false;
|
||||||
DEBUGOUT("Valid Link Found\n");
|
DEBUGOUT("Valid Link Found\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -2074,7 +2074,7 @@ void e1000_reset_adaptive_generic(struct e1000_hw *hw)
|
|||||||
mac->ifs_step_size = IFS_STEP;
|
mac->ifs_step_size = IFS_STEP;
|
||||||
mac->ifs_ratio = IFS_RATIO;
|
mac->ifs_ratio = IFS_RATIO;
|
||||||
|
|
||||||
mac->in_ifs_mode = FALSE;
|
mac->in_ifs_mode = false;
|
||||||
E1000_WRITE_REG(hw, E1000_AIT, 0);
|
E1000_WRITE_REG(hw, E1000_AIT, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -2098,7 +2098,7 @@ void e1000_update_adaptive_generic(struct e1000_hw *hw)
|
|||||||
|
|
||||||
if ((mac->collision_delta * mac->ifs_ratio) > mac->tx_packet_delta) {
|
if ((mac->collision_delta * mac->ifs_ratio) > mac->tx_packet_delta) {
|
||||||
if (mac->tx_packet_delta > MIN_NUM_XMITS) {
|
if (mac->tx_packet_delta > MIN_NUM_XMITS) {
|
||||||
mac->in_ifs_mode = TRUE;
|
mac->in_ifs_mode = true;
|
||||||
if (mac->current_ifs_val < mac->ifs_max_val) {
|
if (mac->current_ifs_val < mac->ifs_max_val) {
|
||||||
if (!mac->current_ifs_val)
|
if (!mac->current_ifs_val)
|
||||||
mac->current_ifs_val = mac->ifs_min_val;
|
mac->current_ifs_val = mac->ifs_min_val;
|
||||||
@ -2113,7 +2113,7 @@ void e1000_update_adaptive_generic(struct e1000_hw *hw)
|
|||||||
if (mac->in_ifs_mode &&
|
if (mac->in_ifs_mode &&
|
||||||
(mac->tx_packet_delta <= MIN_NUM_XMITS)) {
|
(mac->tx_packet_delta <= MIN_NUM_XMITS)) {
|
||||||
mac->current_ifs_val = 0;
|
mac->current_ifs_val = 0;
|
||||||
mac->in_ifs_mode = FALSE;
|
mac->in_ifs_mode = false;
|
||||||
E1000_WRITE_REG(hw, E1000_AIT, 0);
|
E1000_WRITE_REG(hw, E1000_AIT, 0);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -2235,17 +2235,17 @@ s32 e1000_get_hw_semaphore(struct e1000_hw *hw)
|
|||||||
/* In rare circumstances, the SW semaphore may already be held
|
/* In rare circumstances, the SW semaphore may already be held
|
||||||
* unintentionally. Clear the semaphore once before giving up.
|
* unintentionally. Clear the semaphore once before giving up.
|
||||||
*/
|
*/
|
||||||
if (hw->dev_spec._82575.clear_semaphore_once) {
|
if (hw->dev_spec._82575.clear_semaphore_once) {
|
||||||
hw->dev_spec._82575.clear_semaphore_once = FALSE;
|
hw->dev_spec._82575.clear_semaphore_once = false;
|
||||||
e1000_put_hw_semaphore(hw);
|
e1000_put_hw_semaphore(hw);
|
||||||
for (i = 0; i < fw_timeout; i++) {
|
for (i = 0; i < fw_timeout; i++) {
|
||||||
swsm = E1000_READ_REG(hw, E1000_SWSM);
|
swsm = E1000_READ_REG(hw, E1000_SWSM);
|
||||||
if (!(swsm & E1000_SWSM_SMBI))
|
if (!(swsm & E1000_SWSM_SMBI))
|
||||||
break;
|
break;
|
||||||
|
|
||||||
usec_delay(50);
|
usec_delay(50);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Get the FW semaphore. */
|
/* Get the FW semaphore. */
|
||||||
for (i = 0; i < fw_timeout; i++) {
|
for (i = 0; i < fw_timeout; i++) {
|
||||||
|
@ -108,8 +108,8 @@ s32 e1000_mng_enable_host_if_generic(struct e1000_hw *hw)
|
|||||||
* e1000_check_mng_mode_generic - Generic check management mode
|
* e1000_check_mng_mode_generic - Generic check management mode
|
||||||
* @hw: pointer to the HW structure
|
* @hw: pointer to the HW structure
|
||||||
*
|
*
|
||||||
* Reads the firmware semaphore register and returns TRUE (>0) if
|
* Reads the firmware semaphore register and returns true (>0) if
|
||||||
* manageability is enabled, else FALSE (0).
|
* manageability is enabled, else false (0).
|
||||||
**/
|
**/
|
||||||
bool e1000_check_mng_mode_generic(struct e1000_hw *hw)
|
bool e1000_check_mng_mode_generic(struct e1000_hw *hw)
|
||||||
{
|
{
|
||||||
@ -139,11 +139,11 @@ bool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw)
|
|||||||
|
|
||||||
DEBUGFUNC("e1000_enable_tx_pkt_filtering_generic");
|
DEBUGFUNC("e1000_enable_tx_pkt_filtering_generic");
|
||||||
|
|
||||||
hw->mac.tx_pkt_filtering = TRUE;
|
hw->mac.tx_pkt_filtering = true;
|
||||||
|
|
||||||
/* No manageability, no filtering */
|
/* No manageability, no filtering */
|
||||||
if (!hw->mac.ops.check_mng_mode(hw)) {
|
if (!hw->mac.ops.check_mng_mode(hw)) {
|
||||||
hw->mac.tx_pkt_filtering = FALSE;
|
hw->mac.tx_pkt_filtering = false;
|
||||||
return hw->mac.tx_pkt_filtering;
|
return hw->mac.tx_pkt_filtering;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -152,7 +152,7 @@ bool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw)
|
|||||||
*/
|
*/
|
||||||
ret_val = e1000_mng_enable_host_if_generic(hw);
|
ret_val = e1000_mng_enable_host_if_generic(hw);
|
||||||
if (ret_val != E1000_SUCCESS) {
|
if (ret_val != E1000_SUCCESS) {
|
||||||
hw->mac.tx_pkt_filtering = FALSE;
|
hw->mac.tx_pkt_filtering = false;
|
||||||
return hw->mac.tx_pkt_filtering;
|
return hw->mac.tx_pkt_filtering;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -171,13 +171,13 @@ bool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw)
|
|||||||
* take the safe route of assuming Tx filtering is enabled.
|
* take the safe route of assuming Tx filtering is enabled.
|
||||||
*/
|
*/
|
||||||
if ((hdr_csum != csum) || (hdr->signature != E1000_IAMT_SIGNATURE)) {
|
if ((hdr_csum != csum) || (hdr->signature != E1000_IAMT_SIGNATURE)) {
|
||||||
hw->mac.tx_pkt_filtering = TRUE;
|
hw->mac.tx_pkt_filtering = true;
|
||||||
return hw->mac.tx_pkt_filtering;
|
return hw->mac.tx_pkt_filtering;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Cookie area is valid, make the final check for filtering. */
|
/* Cookie area is valid, make the final check for filtering. */
|
||||||
if (!(hdr->status & E1000_MNG_DHCP_COOKIE_STATUS_PARSING))
|
if (!(hdr->status & E1000_MNG_DHCP_COOKIE_STATUS_PARSING))
|
||||||
hw->mac.tx_pkt_filtering = FALSE;
|
hw->mac.tx_pkt_filtering = false;
|
||||||
|
|
||||||
return hw->mac.tx_pkt_filtering;
|
return hw->mac.tx_pkt_filtering;
|
||||||
}
|
}
|
||||||
@ -348,12 +348,12 @@ bool e1000_enable_mng_pass_thru(struct e1000_hw *hw)
|
|||||||
DEBUGFUNC("e1000_enable_mng_pass_thru");
|
DEBUGFUNC("e1000_enable_mng_pass_thru");
|
||||||
|
|
||||||
if (!hw->mac.asf_firmware_present)
|
if (!hw->mac.asf_firmware_present)
|
||||||
return FALSE;
|
return false;
|
||||||
|
|
||||||
manc = E1000_READ_REG(hw, E1000_MANC);
|
manc = E1000_READ_REG(hw, E1000_MANC);
|
||||||
|
|
||||||
if (!(manc & E1000_MANC_RCV_TCO_EN))
|
if (!(manc & E1000_MANC_RCV_TCO_EN))
|
||||||
return FALSE;
|
return false;
|
||||||
|
|
||||||
if (hw->mac.has_fwsm) {
|
if (hw->mac.has_fwsm) {
|
||||||
fwsm = E1000_READ_REG(hw, E1000_FWSM);
|
fwsm = E1000_READ_REG(hw, E1000_FWSM);
|
||||||
@ -362,7 +362,7 @@ bool e1000_enable_mng_pass_thru(struct e1000_hw *hw)
|
|||||||
if (!(factps & E1000_FACTPS_MNGCG) &&
|
if (!(factps & E1000_FACTPS_MNGCG) &&
|
||||||
((fwsm & E1000_FWSM_MODE_MASK) ==
|
((fwsm & E1000_FWSM_MODE_MASK) ==
|
||||||
(e1000_mng_mode_pt << E1000_FWSM_MODE_SHIFT)))
|
(e1000_mng_mode_pt << E1000_FWSM_MODE_SHIFT)))
|
||||||
return TRUE;
|
return true;
|
||||||
} else if ((hw->mac.type == e1000_82574) ||
|
} else if ((hw->mac.type == e1000_82574) ||
|
||||||
(hw->mac.type == e1000_82583)) {
|
(hw->mac.type == e1000_82583)) {
|
||||||
u16 data;
|
u16 data;
|
||||||
@ -371,18 +371,18 @@ bool e1000_enable_mng_pass_thru(struct e1000_hw *hw)
|
|||||||
factps = E1000_READ_REG(hw, E1000_FACTPS);
|
factps = E1000_READ_REG(hw, E1000_FACTPS);
|
||||||
ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &data);
|
ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &data);
|
||||||
if (ret_val)
|
if (ret_val)
|
||||||
return FALSE;
|
return false;
|
||||||
|
|
||||||
if (!(factps & E1000_FACTPS_MNGCG) &&
|
if (!(factps & E1000_FACTPS_MNGCG) &&
|
||||||
((data & E1000_NVM_INIT_CTRL2_MNGM) ==
|
((data & E1000_NVM_INIT_CTRL2_MNGM) ==
|
||||||
(e1000_mng_mode_pt << 13)))
|
(e1000_mng_mode_pt << 13)))
|
||||||
return TRUE;
|
return true;
|
||||||
} else if ((manc & E1000_MANC_SMBUS_EN) &&
|
} else if ((manc & E1000_MANC_SMBUS_EN) &&
|
||||||
!(manc & E1000_MANC_ASF_EN)) {
|
!(manc & E1000_MANC_ASF_EN)) {
|
||||||
return TRUE;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
return FALSE;
|
return false;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -404,7 +404,7 @@ static s32 e1000_check_for_ack_vf(struct e1000_hw *hw,
|
|||||||
* @hw: pointer to the HW structure
|
* @hw: pointer to the HW structure
|
||||||
* @mbx_id: id of mailbox to check
|
* @mbx_id: id of mailbox to check
|
||||||
*
|
*
|
||||||
* returns TRUE if the PF has set the reset done bit or else FALSE
|
* returns true if the PF has set the reset done bit or else false
|
||||||
**/
|
**/
|
||||||
static s32 e1000_check_for_rst_vf(struct e1000_hw *hw,
|
static s32 e1000_check_for_rst_vf(struct e1000_hw *hw,
|
||||||
u16 E1000_UNUSEDARG mbx_id)
|
u16 E1000_UNUSEDARG mbx_id)
|
||||||
|
@ -63,7 +63,7 @@
|
|||||||
#define E1000_VFMAILBOX_SIZE 16 /* 16 32 bit words - 64 bytes */
|
#define E1000_VFMAILBOX_SIZE 16 /* 16 32 bit words - 64 bytes */
|
||||||
|
|
||||||
/* If it's a E1000_VF_* msg then it originates in the VF and is sent to the
|
/* If it's a E1000_VF_* msg then it originates in the VF and is sent to the
|
||||||
* PF. The reverse is TRUE if it is E1000_PF_*.
|
* PF. The reverse is true if it is E1000_PF_*.
|
||||||
* Message ACK's are the value or'd with 0xF0000000
|
* Message ACK's are the value or'd with 0xF0000000
|
||||||
*/
|
*/
|
||||||
/* Msgs below or'd with this are the ACK */
|
/* Msgs below or'd with this are the ACK */
|
||||||
|
@ -115,8 +115,6 @@ safe_pause_ms(int x) {
|
|||||||
#define DEBUGFUNC(F) DEBUGOUT(F "\n")
|
#define DEBUGFUNC(F) DEBUGOUT(F "\n")
|
||||||
|
|
||||||
#define STATIC static
|
#define STATIC static
|
||||||
#define FALSE 0
|
|
||||||
#define TRUE 1
|
|
||||||
#define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */
|
#define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */
|
||||||
#define PCI_COMMAND_REGISTER PCIR_COMMAND
|
#define PCI_COMMAND_REGISTER PCIR_COMMAND
|
||||||
|
|
||||||
|
@ -776,7 +776,7 @@ static s32 __e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data,
|
|||||||
**/
|
**/
|
||||||
s32 e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data)
|
s32 e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data)
|
||||||
{
|
{
|
||||||
return __e1000_read_phy_reg_igp(hw, offset, data, FALSE);
|
return __e1000_read_phy_reg_igp(hw, offset, data, false);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -790,7 +790,7 @@ s32 e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data)
|
|||||||
**/
|
**/
|
||||||
s32 e1000_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data)
|
s32 e1000_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data)
|
||||||
{
|
{
|
||||||
return __e1000_read_phy_reg_igp(hw, offset, data, TRUE);
|
return __e1000_read_phy_reg_igp(hw, offset, data, true);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -844,7 +844,7 @@ static s32 __e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data,
|
|||||||
**/
|
**/
|
||||||
s32 e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data)
|
s32 e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data)
|
||||||
{
|
{
|
||||||
return __e1000_write_phy_reg_igp(hw, offset, data, FALSE);
|
return __e1000_write_phy_reg_igp(hw, offset, data, false);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -858,7 +858,7 @@ s32 e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data)
|
|||||||
**/
|
**/
|
||||||
s32 e1000_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 data)
|
s32 e1000_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 data)
|
||||||
{
|
{
|
||||||
return __e1000_write_phy_reg_igp(hw, offset, data, TRUE);
|
return __e1000_write_phy_reg_igp(hw, offset, data, true);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -918,7 +918,7 @@ static s32 __e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data,
|
|||||||
**/
|
**/
|
||||||
s32 e1000_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data)
|
s32 e1000_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data)
|
||||||
{
|
{
|
||||||
return __e1000_read_kmrn_reg(hw, offset, data, FALSE);
|
return __e1000_read_kmrn_reg(hw, offset, data, false);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -933,7 +933,7 @@ s32 e1000_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data)
|
|||||||
**/
|
**/
|
||||||
s32 e1000_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data)
|
s32 e1000_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data)
|
||||||
{
|
{
|
||||||
return __e1000_read_kmrn_reg(hw, offset, data, TRUE);
|
return __e1000_read_kmrn_reg(hw, offset, data, true);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -989,7 +989,7 @@ static s32 __e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data,
|
|||||||
**/
|
**/
|
||||||
s32 e1000_write_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 data)
|
s32 e1000_write_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 data)
|
||||||
{
|
{
|
||||||
return __e1000_write_kmrn_reg(hw, offset, data, FALSE);
|
return __e1000_write_kmrn_reg(hw, offset, data, false);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -1003,7 +1003,7 @@ s32 e1000_write_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 data)
|
|||||||
**/
|
**/
|
||||||
s32 e1000_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data)
|
s32 e1000_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data)
|
||||||
{
|
{
|
||||||
return __e1000_write_kmrn_reg(hw, offset, data, TRUE);
|
return __e1000_write_kmrn_reg(hw, offset, data, true);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -1390,7 +1390,7 @@ s32 e1000_copper_link_setup_igp(struct e1000_hw *hw)
|
|||||||
*/
|
*/
|
||||||
if (phy->type == e1000_phy_igp) {
|
if (phy->type == e1000_phy_igp) {
|
||||||
/* disable lplu d3 during driver init */
|
/* disable lplu d3 during driver init */
|
||||||
ret_val = hw->phy.ops.set_d3_lplu_state(hw, FALSE);
|
ret_val = hw->phy.ops.set_d3_lplu_state(hw, false);
|
||||||
if (ret_val) {
|
if (ret_val) {
|
||||||
DEBUGOUT("Error Disabling LPLU D3\n");
|
DEBUGOUT("Error Disabling LPLU D3\n");
|
||||||
return ret_val;
|
return ret_val;
|
||||||
@ -1399,7 +1399,7 @@ s32 e1000_copper_link_setup_igp(struct e1000_hw *hw)
|
|||||||
|
|
||||||
/* disable lplu d0 during driver init */
|
/* disable lplu d0 during driver init */
|
||||||
if (hw->phy.ops.set_d0_lplu_state) {
|
if (hw->phy.ops.set_d0_lplu_state) {
|
||||||
ret_val = hw->phy.ops.set_d0_lplu_state(hw, FALSE);
|
ret_val = hw->phy.ops.set_d0_lplu_state(hw, false);
|
||||||
if (ret_val) {
|
if (ret_val) {
|
||||||
DEBUGOUT("Error Disabling LPLU D0\n");
|
DEBUGOUT("Error Disabling LPLU D0\n");
|
||||||
return ret_val;
|
return ret_val;
|
||||||
@ -1678,7 +1678,7 @@ s32 e1000_copper_link_autoneg(struct e1000_hw *hw)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
hw->mac.get_link_status = TRUE;
|
hw->mac.get_link_status = true;
|
||||||
|
|
||||||
return ret_val;
|
return ret_val;
|
||||||
}
|
}
|
||||||
@ -1863,7 +1863,7 @@ s32 e1000_phy_force_speed_duplex_m88(struct e1000_hw *hw)
|
|||||||
return ret_val;
|
return ret_val;
|
||||||
|
|
||||||
if (!link) {
|
if (!link) {
|
||||||
bool reset_dsp = TRUE;
|
bool reset_dsp = true;
|
||||||
|
|
||||||
switch (hw->phy.id) {
|
switch (hw->phy.id) {
|
||||||
case I347AT4_E_PHY_ID:
|
case I347AT4_E_PHY_ID:
|
||||||
@ -1872,11 +1872,11 @@ s32 e1000_phy_force_speed_duplex_m88(struct e1000_hw *hw)
|
|||||||
case M88E1543_E_PHY_ID:
|
case M88E1543_E_PHY_ID:
|
||||||
case M88E1512_E_PHY_ID:
|
case M88E1512_E_PHY_ID:
|
||||||
case I210_I_PHY_ID:
|
case I210_I_PHY_ID:
|
||||||
reset_dsp = FALSE;
|
reset_dsp = false;
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
if (hw->phy.type != e1000_phy_m88)
|
if (hw->phy.type != e1000_phy_m88)
|
||||||
reset_dsp = FALSE;
|
reset_dsp = false;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -2075,7 +2075,7 @@ void e1000_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl)
|
|||||||
* Success returns 0, Failure returns 1
|
* Success returns 0, Failure returns 1
|
||||||
*
|
*
|
||||||
* The low power link up (lplu) state is set to the power management level D3
|
* The low power link up (lplu) state is set to the power management level D3
|
||||||
* and SmartSpeed is disabled when active is TRUE, else clear lplu for D3
|
* and SmartSpeed is disabled when active is true, else clear lplu for D3
|
||||||
* and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU
|
* and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU
|
||||||
* is used during Dx states where the power conservation is most important.
|
* is used during Dx states where the power conservation is most important.
|
||||||
* During driver activity, SmartSpeed should be enabled so performance is
|
* During driver activity, SmartSpeed should be enabled so performance is
|
||||||
@ -2190,7 +2190,7 @@ s32 e1000_check_downshift_generic(struct e1000_hw *hw)
|
|||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
/* speed downshift not supported */
|
/* speed downshift not supported */
|
||||||
phy->speed_downgraded = FALSE;
|
phy->speed_downgraded = false;
|
||||||
return E1000_SUCCESS;
|
return E1000_SUCCESS;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -2723,7 +2723,7 @@ s32 e1000_get_phy_info_igp(struct e1000_hw *hw)
|
|||||||
return -E1000_ERR_CONFIG;
|
return -E1000_ERR_CONFIG;
|
||||||
}
|
}
|
||||||
|
|
||||||
phy->polarity_correction = TRUE;
|
phy->polarity_correction = true;
|
||||||
|
|
||||||
ret_val = e1000_check_polarity_igp(hw);
|
ret_val = e1000_check_polarity_igp(hw);
|
||||||
if (ret_val)
|
if (ret_val)
|
||||||
@ -3131,7 +3131,7 @@ s32 e1000_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data)
|
|||||||
/* Page 800 works differently than the rest so it has its own func */
|
/* Page 800 works differently than the rest so it has its own func */
|
||||||
if (page == BM_WUC_PAGE) {
|
if (page == BM_WUC_PAGE) {
|
||||||
ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data,
|
ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data,
|
||||||
FALSE, false);
|
false, false);
|
||||||
goto release;
|
goto release;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -3191,7 +3191,7 @@ s32 e1000_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data)
|
|||||||
/* Page 800 works differently than the rest so it has its own func */
|
/* Page 800 works differently than the rest so it has its own func */
|
||||||
if (page == BM_WUC_PAGE) {
|
if (page == BM_WUC_PAGE) {
|
||||||
ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data,
|
ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data,
|
||||||
TRUE, FALSE);
|
true, false);
|
||||||
goto release;
|
goto release;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -3250,7 +3250,7 @@ s32 e1000_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data)
|
|||||||
/* Page 800 works differently than the rest so it has its own func */
|
/* Page 800 works differently than the rest so it has its own func */
|
||||||
if (page == BM_WUC_PAGE) {
|
if (page == BM_WUC_PAGE) {
|
||||||
ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data,
|
ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data,
|
||||||
TRUE, FALSE);
|
true, false);
|
||||||
goto release;
|
goto release;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -3295,7 +3295,7 @@ s32 e1000_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data)
|
|||||||
/* Page 800 works differently than the rest so it has its own func */
|
/* Page 800 works differently than the rest so it has its own func */
|
||||||
if (page == BM_WUC_PAGE) {
|
if (page == BM_WUC_PAGE) {
|
||||||
ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data,
|
ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data,
|
||||||
FALSE, false);
|
false, false);
|
||||||
goto release;
|
goto release;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -3430,7 +3430,7 @@ s32 e1000_disable_phy_wakeup_reg_access_bm(struct e1000_hw *hw, u16 *phy_reg)
|
|||||||
* Steps 1 and 2 are done by e1000_enable_phy_wakeup_reg_access_bm() and
|
* Steps 1 and 2 are done by e1000_enable_phy_wakeup_reg_access_bm() and
|
||||||
* step 5 is done by e1000_disable_phy_wakeup_reg_access_bm().
|
* step 5 is done by e1000_disable_phy_wakeup_reg_access_bm().
|
||||||
*
|
*
|
||||||
* Assumes semaphore is already acquired. When page_set==TRUE, assumes
|
* Assumes semaphore is already acquired. When page_set==true, assumes
|
||||||
* the PHY page is set to BM_WUC_PAGE (i.e. a function in the call stack
|
* the PHY page is set to BM_WUC_PAGE (i.e. a function in the call stack
|
||||||
* is responsible for calls to e1000_[enable|disable]_phy_wakeup_reg_bm()).
|
* is responsible for calls to e1000_[enable|disable]_phy_wakeup_reg_bm()).
|
||||||
**/
|
**/
|
||||||
@ -3556,13 +3556,13 @@ static s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data,
|
|||||||
/* Page 800 works differently than the rest so it has its own func */
|
/* Page 800 works differently than the rest so it has its own func */
|
||||||
if (page == BM_WUC_PAGE) {
|
if (page == BM_WUC_PAGE) {
|
||||||
ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data,
|
ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data,
|
||||||
TRUE, page_set);
|
true, page_set);
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (page > 0 && page < HV_INTC_FC_PAGE_START) {
|
if (page > 0 && page < HV_INTC_FC_PAGE_START) {
|
||||||
ret_val = e1000_access_phy_debug_regs_hv(hw, offset,
|
ret_val = e1000_access_phy_debug_regs_hv(hw, offset,
|
||||||
data, TRUE);
|
data, true);
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -3606,7 +3606,7 @@ static s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data,
|
|||||||
**/
|
**/
|
||||||
s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data)
|
s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data)
|
||||||
{
|
{
|
||||||
return __e1000_read_phy_reg_hv(hw, offset, data, FALSE, false);
|
return __e1000_read_phy_reg_hv(hw, offset, data, false, false);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -3620,7 +3620,7 @@ s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data)
|
|||||||
**/
|
**/
|
||||||
s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 *data)
|
s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 *data)
|
||||||
{
|
{
|
||||||
return __e1000_read_phy_reg_hv(hw, offset, data, TRUE, FALSE);
|
return __e1000_read_phy_reg_hv(hw, offset, data, true, false);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -3634,7 +3634,7 @@ s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 *data)
|
|||||||
**/
|
**/
|
||||||
s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 *data)
|
s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 *data)
|
||||||
{
|
{
|
||||||
return __e1000_read_phy_reg_hv(hw, offset, data, TRUE, true);
|
return __e1000_read_phy_reg_hv(hw, offset, data, true, true);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -3666,13 +3666,13 @@ static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data,
|
|||||||
/* Page 800 works differently than the rest so it has its own func */
|
/* Page 800 works differently than the rest so it has its own func */
|
||||||
if (page == BM_WUC_PAGE) {
|
if (page == BM_WUC_PAGE) {
|
||||||
ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data,
|
ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data,
|
||||||
FALSE, page_set);
|
false, page_set);
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (page > 0 && page < HV_INTC_FC_PAGE_START) {
|
if (page > 0 && page < HV_INTC_FC_PAGE_START) {
|
||||||
ret_val = e1000_access_phy_debug_regs_hv(hw, offset,
|
ret_val = e1000_access_phy_debug_regs_hv(hw, offset,
|
||||||
&data, FALSE);
|
&data, false);
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -3691,7 +3691,7 @@ static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data,
|
|||||||
u16 data2 = 0x7EFF;
|
u16 data2 = 0x7EFF;
|
||||||
ret_val = e1000_access_phy_debug_regs_hv(hw,
|
ret_val = e1000_access_phy_debug_regs_hv(hw,
|
||||||
(1 << 6) | 0x3,
|
(1 << 6) | 0x3,
|
||||||
&data2, FALSE);
|
&data2, false);
|
||||||
if (ret_val)
|
if (ret_val)
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
@ -3732,7 +3732,7 @@ static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data,
|
|||||||
**/
|
**/
|
||||||
s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data)
|
s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data)
|
||||||
{
|
{
|
||||||
return __e1000_write_phy_reg_hv(hw, offset, data, FALSE, false);
|
return __e1000_write_phy_reg_hv(hw, offset, data, false, false);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -3746,7 +3746,7 @@ s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data)
|
|||||||
**/
|
**/
|
||||||
s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data)
|
s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data)
|
||||||
{
|
{
|
||||||
return __e1000_write_phy_reg_hv(hw, offset, data, TRUE, FALSE);
|
return __e1000_write_phy_reg_hv(hw, offset, data, true, false);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -3760,7 +3760,7 @@ s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data)
|
|||||||
**/
|
**/
|
||||||
s32 e1000_write_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 data)
|
s32 e1000_write_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 data)
|
||||||
{
|
{
|
||||||
return __e1000_write_phy_reg_hv(hw, offset, data, TRUE, true);
|
return __e1000_write_phy_reg_hv(hw, offset, data, true, true);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -3975,7 +3975,7 @@ s32 e1000_get_phy_info_82577(struct e1000_hw *hw)
|
|||||||
return -E1000_ERR_CONFIG;
|
return -E1000_ERR_CONFIG;
|
||||||
}
|
}
|
||||||
|
|
||||||
phy->polarity_correction = TRUE;
|
phy->polarity_correction = true;
|
||||||
|
|
||||||
ret_val = e1000_check_polarity_82577(hw);
|
ret_val = e1000_check_polarity_82577(hw);
|
||||||
if (ret_val)
|
if (ret_val)
|
||||||
@ -4118,7 +4118,7 @@ s32 e1000_read_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 *data)
|
|||||||
s32 e1000_read_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 *data)
|
s32 e1000_read_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 *data)
|
||||||
{
|
{
|
||||||
u32 mphy_ctrl = 0;
|
u32 mphy_ctrl = 0;
|
||||||
bool locked = FALSE;
|
bool locked = false;
|
||||||
bool ready;
|
bool ready;
|
||||||
|
|
||||||
DEBUGFUNC("e1000_read_phy_reg_mphy");
|
DEBUGFUNC("e1000_read_phy_reg_mphy");
|
||||||
@ -4131,7 +4131,7 @@ s32 e1000_read_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 *data)
|
|||||||
/* Check if mPHY access is disabled and enable it if so */
|
/* Check if mPHY access is disabled and enable it if so */
|
||||||
mphy_ctrl = E1000_READ_REG(hw, E1000_MPHY_ADDR_CTRL);
|
mphy_ctrl = E1000_READ_REG(hw, E1000_MPHY_ADDR_CTRL);
|
||||||
if (mphy_ctrl & E1000_MPHY_DIS_ACCESS) {
|
if (mphy_ctrl & E1000_MPHY_DIS_ACCESS) {
|
||||||
locked = TRUE;
|
locked = true;
|
||||||
ready = e1000_is_mphy_ready(hw);
|
ready = e1000_is_mphy_ready(hw);
|
||||||
if (!ready)
|
if (!ready)
|
||||||
return -E1000_ERR_PHY;
|
return -E1000_ERR_PHY;
|
||||||
@ -4180,7 +4180,7 @@ s32 e1000_write_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 data,
|
|||||||
bool line_override)
|
bool line_override)
|
||||||
{
|
{
|
||||||
u32 mphy_ctrl = 0;
|
u32 mphy_ctrl = 0;
|
||||||
bool locked = FALSE;
|
bool locked = false;
|
||||||
bool ready;
|
bool ready;
|
||||||
|
|
||||||
DEBUGFUNC("e1000_write_phy_reg_mphy");
|
DEBUGFUNC("e1000_write_phy_reg_mphy");
|
||||||
@ -4193,7 +4193,7 @@ s32 e1000_write_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 data,
|
|||||||
/* Check if mPHY access is disabled and enable it if so */
|
/* Check if mPHY access is disabled and enable it if so */
|
||||||
mphy_ctrl = E1000_READ_REG(hw, E1000_MPHY_ADDR_CTRL);
|
mphy_ctrl = E1000_READ_REG(hw, E1000_MPHY_ADDR_CTRL);
|
||||||
if (mphy_ctrl & E1000_MPHY_DIS_ACCESS) {
|
if (mphy_ctrl & E1000_MPHY_DIS_ACCESS) {
|
||||||
locked = TRUE;
|
locked = true;
|
||||||
ready = e1000_is_mphy_ready(hw);
|
ready = e1000_is_mphy_ready(hw);
|
||||||
if (!ready)
|
if (!ready)
|
||||||
return -E1000_ERR_PHY;
|
return -E1000_ERR_PHY;
|
||||||
@ -4242,7 +4242,7 @@ bool e1000_is_mphy_ready(struct e1000_hw *hw)
|
|||||||
{
|
{
|
||||||
u16 retry_count = 0;
|
u16 retry_count = 0;
|
||||||
u32 mphy_ctrl = 0;
|
u32 mphy_ctrl = 0;
|
||||||
bool ready = FALSE;
|
bool ready = false;
|
||||||
|
|
||||||
while (retry_count < 2) {
|
while (retry_count < 2) {
|
||||||
mphy_ctrl = E1000_READ_REG(hw, E1000_MPHY_ADDR_CTRL);
|
mphy_ctrl = E1000_READ_REG(hw, E1000_MPHY_ADDR_CTRL);
|
||||||
@ -4251,7 +4251,7 @@ bool e1000_is_mphy_ready(struct e1000_hw *hw)
|
|||||||
retry_count++;
|
retry_count++;
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
ready = TRUE;
|
ready = true;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -104,11 +104,11 @@ static s32 e1000_init_mac_params_vf(struct e1000_hw *hw)
|
|||||||
hw->phy.media_type = e1000_media_type_unknown;
|
hw->phy.media_type = e1000_media_type_unknown;
|
||||||
|
|
||||||
/* No ASF features for the VF driver */
|
/* No ASF features for the VF driver */
|
||||||
mac->asf_firmware_present = FALSE;
|
mac->asf_firmware_present = false;
|
||||||
/* ARC subsystem not supported */
|
/* ARC subsystem not supported */
|
||||||
mac->arc_subsystem_valid = FALSE;
|
mac->arc_subsystem_valid = false;
|
||||||
/* Disable adaptive IFS mode so the generic funcs don't do anything */
|
/* Disable adaptive IFS mode so the generic funcs don't do anything */
|
||||||
mac->adaptive_ifs = FALSE;
|
mac->adaptive_ifs = false;
|
||||||
/* VF's have no MTA Registers - PF feature only */
|
/* VF's have no MTA Registers - PF feature only */
|
||||||
mac->mta_reg_count = 128;
|
mac->mta_reg_count = 128;
|
||||||
/* VF's have no access to RAR entries */
|
/* VF's have no access to RAR entries */
|
||||||
@ -442,7 +442,7 @@ void e1000_update_mc_addr_list_vf(struct e1000_hw *hw,
|
|||||||
* e1000_vfta_set_vf - Set/Unset vlan filter table address
|
* e1000_vfta_set_vf - Set/Unset vlan filter table address
|
||||||
* @hw: pointer to the HW structure
|
* @hw: pointer to the HW structure
|
||||||
* @vid: determines the vfta register and bit to set/unset
|
* @vid: determines the vfta register and bit to set/unset
|
||||||
* @set: if TRUE then set bit, else clear bit
|
* @set: if true then set bit, else clear bit
|
||||||
**/
|
**/
|
||||||
void e1000_vfta_set_vf(struct e1000_hw *hw, u16 vid, bool set)
|
void e1000_vfta_set_vf(struct e1000_hw *hw, u16 vid, bool set)
|
||||||
{
|
{
|
||||||
@ -450,7 +450,7 @@ void e1000_vfta_set_vf(struct e1000_hw *hw, u16 vid, bool set)
|
|||||||
|
|
||||||
msgbuf[0] = E1000_VF_SET_VLAN;
|
msgbuf[0] = E1000_VF_SET_VLAN;
|
||||||
msgbuf[1] = vid;
|
msgbuf[1] = vid;
|
||||||
/* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
|
/* Setting the 8 bit field MSG INFO to true indicates "add" */
|
||||||
if (set)
|
if (set)
|
||||||
msgbuf[0] |= E1000_VF_SET_VLAN_ADD;
|
msgbuf[0] |= E1000_VF_SET_VLAN_ADD;
|
||||||
|
|
||||||
@ -549,7 +549,7 @@ static s32 e1000_check_for_link_vf(struct e1000_hw *hw)
|
|||||||
|
|
||||||
/* If we were hit with a reset or timeout drop the link */
|
/* If we were hit with a reset or timeout drop the link */
|
||||||
if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout)
|
if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout)
|
||||||
mac->get_link_status = TRUE;
|
mac->get_link_status = true;
|
||||||
|
|
||||||
if (!mac->get_link_status)
|
if (!mac->get_link_status)
|
||||||
goto out;
|
goto out;
|
||||||
@ -581,7 +581,7 @@ static s32 e1000_check_for_link_vf(struct e1000_hw *hw)
|
|||||||
|
|
||||||
/* if we passed all the tests above then the link is up and we no
|
/* if we passed all the tests above then the link is up and we no
|
||||||
* longer need to check for link */
|
* longer need to check for link */
|
||||||
mac->get_link_status = FALSE;
|
mac->get_link_status = false;
|
||||||
|
|
||||||
out:
|
out:
|
||||||
return ret_val;
|
return ret_val;
|
||||||
|
@ -160,7 +160,7 @@ enum e1000_mac_type {
|
|||||||
e1000_undefined = 0,
|
e1000_undefined = 0,
|
||||||
e1000_vfadapt,
|
e1000_vfadapt,
|
||||||
e1000_vfadapt_i350,
|
e1000_vfadapt_i350,
|
||||||
e1000_num_macs /* List is 1-based, so subtract 1 for TRUE count. */
|
e1000_num_macs /* List is 1-based, so subtract 1 for true count. */
|
||||||
};
|
};
|
||||||
|
|
||||||
struct e1000_vf_stats {
|
struct e1000_vf_stats {
|
||||||
|
@ -184,7 +184,7 @@ em_tso_setup(struct adapter *adapter, if_pkt_info_t pi, u32 *txd_upper, u32 *txd
|
|||||||
E1000_TXD_CMD_IP | /* Do IP csum */
|
E1000_TXD_CMD_IP | /* Do IP csum */
|
||||||
E1000_TXD_CMD_TCP | /* Do TCP checksum */
|
E1000_TXD_CMD_TCP | /* Do TCP checksum */
|
||||||
(pi->ipi_len - hdr_len)); /* Total len */
|
(pi->ipi_len - hdr_len)); /* Total len */
|
||||||
txr->tx_tso = TRUE;
|
txr->tx_tso = true;
|
||||||
|
|
||||||
if (++cur == scctx->isc_ntxd[0]) {
|
if (++cur == scctx->isc_ntxd[0]) {
|
||||||
cur = 0;
|
cur = 0;
|
||||||
@ -318,7 +318,7 @@ em_isc_txd_encap(void *arg, if_pkt_info_t pi)
|
|||||||
txd_flags = pi->ipi_flags & IPI_TX_INTR ? E1000_TXD_CMD_RS : 0;
|
txd_flags = pi->ipi_flags & IPI_TX_INTR ? E1000_TXD_CMD_RS : 0;
|
||||||
i = first = pi->ipi_pidx;
|
i = first = pi->ipi_pidx;
|
||||||
do_tso = (csum_flags & CSUM_TSO);
|
do_tso = (csum_flags & CSUM_TSO);
|
||||||
tso_desc = FALSE;
|
tso_desc = false;
|
||||||
ntxd = scctx->isc_ntxd[0];
|
ntxd = scctx->isc_ntxd[0];
|
||||||
/*
|
/*
|
||||||
* TSO Hardware workaround, if this packet is not
|
* TSO Hardware workaround, if this packet is not
|
||||||
@ -326,16 +326,16 @@ em_isc_txd_encap(void *arg, if_pkt_info_t pi)
|
|||||||
* it follows a TSO burst, then we need to add a
|
* it follows a TSO burst, then we need to add a
|
||||||
* sentinel descriptor to prevent premature writeback.
|
* sentinel descriptor to prevent premature writeback.
|
||||||
*/
|
*/
|
||||||
if ((!do_tso) && (txr->tx_tso == TRUE)) {
|
if ((!do_tso) && (txr->tx_tso == true)) {
|
||||||
if (nsegs == 1)
|
if (nsegs == 1)
|
||||||
tso_desc = TRUE;
|
tso_desc = true;
|
||||||
txr->tx_tso = FALSE;
|
txr->tx_tso = false;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Do hardware assists */
|
/* Do hardware assists */
|
||||||
if (do_tso) {
|
if (do_tso) {
|
||||||
i = em_tso_setup(sc, pi, &txd_upper, &txd_lower);
|
i = em_tso_setup(sc, pi, &txd_upper, &txd_lower);
|
||||||
tso_desc = TRUE;
|
tso_desc = true;
|
||||||
} else if (csum_flags & EM_CSUM_OFFLOAD) {
|
} else if (csum_flags & EM_CSUM_OFFLOAD) {
|
||||||
i = em_transmit_checksum_setup(sc, pi, &txd_upper, &txd_lower);
|
i = em_transmit_checksum_setup(sc, pi, &txd_upper, &txd_lower);
|
||||||
}
|
}
|
||||||
|
@ -509,12 +509,12 @@ SYSCTL_INT(_hw_em, OID_AUTO, rx_abs_int_delay, CTLFLAG_RDTUN,
|
|||||||
&em_rx_abs_int_delay_dflt, 0,
|
&em_rx_abs_int_delay_dflt, 0,
|
||||||
"Default receive interrupt delay limit in usecs");
|
"Default receive interrupt delay limit in usecs");
|
||||||
|
|
||||||
static int em_smart_pwr_down = FALSE;
|
static int em_smart_pwr_down = false;
|
||||||
SYSCTL_INT(_hw_em, OID_AUTO, smart_pwr_down, CTLFLAG_RDTUN, &em_smart_pwr_down,
|
SYSCTL_INT(_hw_em, OID_AUTO, smart_pwr_down, CTLFLAG_RDTUN, &em_smart_pwr_down,
|
||||||
0, "Set to true to leave smart power down enabled on newer adapters");
|
0, "Set to true to leave smart power down enabled on newer adapters");
|
||||||
|
|
||||||
/* Controls whether promiscuous also shows bad packets */
|
/* Controls whether promiscuous also shows bad packets */
|
||||||
static int em_debug_sbp = FALSE;
|
static int em_debug_sbp = false;
|
||||||
SYSCTL_INT(_hw_em, OID_AUTO, sbp, CTLFLAG_RDTUN, &em_debug_sbp, 0,
|
SYSCTL_INT(_hw_em, OID_AUTO, sbp, CTLFLAG_RDTUN, &em_debug_sbp, 0,
|
||||||
"Show bad packets in promiscuous mode");
|
"Show bad packets in promiscuous mode");
|
||||||
|
|
||||||
@ -967,7 +967,7 @@ em_if_attach_pre(if_ctx_t ctx)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* Do Shared Code initialization */
|
/* Do Shared Code initialization */
|
||||||
error = e1000_setup_init_funcs(hw, TRUE);
|
error = e1000_setup_init_funcs(hw, true);
|
||||||
if (error) {
|
if (error) {
|
||||||
device_printf(dev, "Setup of Shared code failed, error %d\n",
|
device_printf(dev, "Setup of Shared code failed, error %d\n",
|
||||||
error);
|
error);
|
||||||
@ -1002,17 +1002,17 @@ em_if_attach_pre(if_ctx_t ctx)
|
|||||||
DEFAULT_ITR);
|
DEFAULT_ITR);
|
||||||
|
|
||||||
hw->mac.autoneg = DO_AUTO_NEG;
|
hw->mac.autoneg = DO_AUTO_NEG;
|
||||||
hw->phy.autoneg_wait_to_complete = FALSE;
|
hw->phy.autoneg_wait_to_complete = false;
|
||||||
hw->phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
|
hw->phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
|
||||||
|
|
||||||
if (hw->mac.type < em_mac_min) {
|
if (hw->mac.type < em_mac_min) {
|
||||||
e1000_init_script_state_82541(hw, TRUE);
|
e1000_init_script_state_82541(hw, true);
|
||||||
e1000_set_tbi_compatibility_82543(hw, TRUE);
|
e1000_set_tbi_compatibility_82543(hw, true);
|
||||||
}
|
}
|
||||||
/* Copper options */
|
/* Copper options */
|
||||||
if (hw->phy.media_type == e1000_media_type_copper) {
|
if (hw->phy.media_type == e1000_media_type_copper) {
|
||||||
hw->phy.mdix = AUTO_ALL_MODES;
|
hw->phy.mdix = AUTO_ALL_MODES;
|
||||||
hw->phy.disable_polarity_correction = FALSE;
|
hw->phy.disable_polarity_correction = false;
|
||||||
hw->phy.ms_type = EM_MASTER_SLAVE;
|
hw->phy.ms_type = EM_MASTER_SLAVE;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1094,7 +1094,7 @@ em_if_attach_pre(if_ctx_t ctx)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* Disable ULP support */
|
/* Disable ULP support */
|
||||||
e1000_disable_ulp_lpt_lp(hw, TRUE);
|
e1000_disable_ulp_lpt_lp(hw, true);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Get Wake-on-Lan and Management info for later use
|
* Get Wake-on-Lan and Management info for later use
|
||||||
@ -1304,7 +1304,7 @@ em_if_init(if_ctx_t ctx)
|
|||||||
* the interface continues to function.
|
* the interface continues to function.
|
||||||
*/
|
*/
|
||||||
if (adapter->hw.mac.type == e1000_82571) {
|
if (adapter->hw.mac.type == e1000_82571) {
|
||||||
e1000_set_laa_state_82571(&adapter->hw, TRUE);
|
e1000_set_laa_state_82571(&adapter->hw, true);
|
||||||
e1000_rar_set(&adapter->hw, adapter->hw.mac.addr,
|
e1000_rar_set(&adapter->hw, adapter->hw.mac.addr,
|
||||||
E1000_RAR_ENTRIES - 1);
|
E1000_RAR_ENTRIES - 1);
|
||||||
}
|
}
|
||||||
@ -1376,9 +1376,9 @@ em_if_init(if_ctx_t ctx)
|
|||||||
if (adapter->hw.mac.type >= igb_mac_min &&
|
if (adapter->hw.mac.type >= igb_mac_min &&
|
||||||
adapter->hw.phy.media_type == e1000_media_type_copper) {
|
adapter->hw.phy.media_type == e1000_media_type_copper) {
|
||||||
if (adapter->hw.mac.type == e1000_i354)
|
if (adapter->hw.mac.type == e1000_i354)
|
||||||
e1000_set_eee_i354(&adapter->hw, TRUE, TRUE);
|
e1000_set_eee_i354(&adapter->hw, true, true);
|
||||||
else
|
else
|
||||||
e1000_set_eee_i350(&adapter->hw, TRUE, TRUE);
|
e1000_set_eee_i350(&adapter->hw, true, true);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1621,7 +1621,7 @@ em_if_media_change(if_ctx_t ctx)
|
|||||||
adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
|
adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
|
||||||
break;
|
break;
|
||||||
case IFM_100_TX:
|
case IFM_100_TX:
|
||||||
adapter->hw.mac.autoneg = FALSE;
|
adapter->hw.mac.autoneg = false;
|
||||||
adapter->hw.phy.autoneg_advertised = 0;
|
adapter->hw.phy.autoneg_advertised = 0;
|
||||||
if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
|
if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
|
||||||
adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL;
|
adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL;
|
||||||
@ -1629,7 +1629,7 @@ em_if_media_change(if_ctx_t ctx)
|
|||||||
adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF;
|
adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF;
|
||||||
break;
|
break;
|
||||||
case IFM_10_T:
|
case IFM_10_T:
|
||||||
adapter->hw.mac.autoneg = FALSE;
|
adapter->hw.mac.autoneg = false;
|
||||||
adapter->hw.phy.autoneg_advertised = 0;
|
adapter->hw.phy.autoneg_advertised = 0;
|
||||||
if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
|
if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
|
||||||
adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL;
|
adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL;
|
||||||
@ -1794,7 +1794,7 @@ em_if_update_admin_status(if_ctx_t ctx)
|
|||||||
if (link_check) /* ESB2 fix */
|
if (link_check) /* ESB2 fix */
|
||||||
e1000_cfg_on_link_up(hw);
|
e1000_cfg_on_link_up(hw);
|
||||||
} else {
|
} else {
|
||||||
link_check = TRUE;
|
link_check = true;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case e1000_media_type_fiber:
|
case e1000_media_type_fiber:
|
||||||
@ -2629,7 +2629,7 @@ em_reset(if_ctx_t ctx)
|
|||||||
else
|
else
|
||||||
hw->fc.pause_time = EM_FC_PAUSE_TIME;
|
hw->fc.pause_time = EM_FC_PAUSE_TIME;
|
||||||
|
|
||||||
hw->fc.send_xon = TRUE;
|
hw->fc.send_xon = true;
|
||||||
|
|
||||||
/* Device specific overrides/settings */
|
/* Device specific overrides/settings */
|
||||||
switch (hw->mac.type) {
|
switch (hw->mac.type) {
|
||||||
@ -2701,7 +2701,7 @@ em_reset(if_ctx_t ctx)
|
|||||||
em_disable_aspm(adapter);
|
em_disable_aspm(adapter);
|
||||||
}
|
}
|
||||||
if (adapter->flags & IGB_MEDIA_RESET) {
|
if (adapter->flags & IGB_MEDIA_RESET) {
|
||||||
e1000_setup_init_funcs(hw, TRUE);
|
e1000_setup_init_funcs(hw, true);
|
||||||
e1000_get_bus_info(hw);
|
e1000_get_bus_info(hw);
|
||||||
adapter->flags &= ~IGB_MEDIA_RESET;
|
adapter->flags &= ~IGB_MEDIA_RESET;
|
||||||
}
|
}
|
||||||
@ -3377,9 +3377,9 @@ em_initialize_receive_unit(if_ctx_t ctx)
|
|||||||
}
|
}
|
||||||
} else if (hw->mac.type >= e1000_pch2lan) {
|
} else if (hw->mac.type >= e1000_pch2lan) {
|
||||||
if (if_getmtu(ifp) > ETHERMTU)
|
if (if_getmtu(ifp) > ETHERMTU)
|
||||||
e1000_lv_jumbo_workaround_ich8lan(hw, TRUE);
|
e1000_lv_jumbo_workaround_ich8lan(hw, true);
|
||||||
else
|
else
|
||||||
e1000_lv_jumbo_workaround_ich8lan(hw, FALSE);
|
e1000_lv_jumbo_workaround_ich8lan(hw, false);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Make sure VLAN Filters are off */
|
/* Make sure VLAN Filters are off */
|
||||||
@ -3505,7 +3505,7 @@ em_if_vlan_filter_write(struct adapter *adapter)
|
|||||||
if (adapter->shadow_vfta[i] != 0) {
|
if (adapter->shadow_vfta[i] != 0) {
|
||||||
/* XXXKB: incomplete VF support, we return early above */
|
/* XXXKB: incomplete VF support, we return early above */
|
||||||
if (adapter->vf_ifp)
|
if (adapter->vf_ifp)
|
||||||
e1000_vfta_set_vf(hw, adapter->shadow_vfta[i], TRUE);
|
e1000_vfta_set_vf(hw, adapter->shadow_vfta[i], true);
|
||||||
else
|
else
|
||||||
e1000_write_vfta(hw, i, adapter->shadow_vfta[i]);
|
e1000_write_vfta(hw, i, adapter->shadow_vfta[i]);
|
||||||
}
|
}
|
||||||
@ -3719,10 +3719,10 @@ em_is_valid_ether_addr(u8 *addr)
|
|||||||
char zero_addr[6] = { 0, 0, 0, 0, 0, 0 };
|
char zero_addr[6] = { 0, 0, 0, 0, 0, 0 };
|
||||||
|
|
||||||
if ((addr[0] & 1) || (!bcmp(addr, zero_addr, ETHER_ADDR_LEN))) {
|
if ((addr[0] & 1) || (!bcmp(addr, zero_addr, ETHER_ADDR_LEN))) {
|
||||||
return (FALSE);
|
return (false);
|
||||||
}
|
}
|
||||||
|
|
||||||
return (TRUE);
|
return (true);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
@ -3761,7 +3761,7 @@ em_get_wakeup(if_ctx_t ctx)
|
|||||||
break;
|
break;
|
||||||
case e1000_82573:
|
case e1000_82573:
|
||||||
case e1000_82583:
|
case e1000_82583:
|
||||||
adapter->has_amt = TRUE;
|
adapter->has_amt = true;
|
||||||
/* FALLTHROUGH */
|
/* FALLTHROUGH */
|
||||||
case e1000_82571:
|
case e1000_82571:
|
||||||
case e1000_82572:
|
case e1000_82572:
|
||||||
@ -3791,7 +3791,7 @@ em_get_wakeup(if_ctx_t ctx)
|
|||||||
case e1000_vfadapt:
|
case e1000_vfadapt:
|
||||||
case e1000_vfadapt_i350:
|
case e1000_vfadapt_i350:
|
||||||
apme_mask = E1000_WUC_APME;
|
apme_mask = E1000_WUC_APME;
|
||||||
adapter->has_amt = TRUE;
|
adapter->has_amt = true;
|
||||||
eeprom_data = E1000_READ_REG(&adapter->hw, E1000_WUC);
|
eeprom_data = E1000_READ_REG(&adapter->hw, E1000_WUC);
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
|
@ -480,7 +480,7 @@ igb_isc_rxd_pkt_get(void *arg, if_rxd_info_t ri)
|
|||||||
if (++cidx == scctx->isc_nrxd[0])
|
if (++cidx == scctx->isc_nrxd[0])
|
||||||
cidx = 0;
|
cidx = 0;
|
||||||
#ifdef notyet
|
#ifdef notyet
|
||||||
if (rxr->hdr_split == TRUE) {
|
if (rxr->hdr_split == true) {
|
||||||
ri->iri_frags[i].irf_flid = 1;
|
ri->iri_frags[i].irf_flid = 1;
|
||||||
ri->iri_frags[i].irf_idx = cidx;
|
ri->iri_frags[i].irf_idx = cidx;
|
||||||
if (++cidx == scctx->isc_nrxd[0])
|
if (++cidx == scctx->isc_nrxd[0])
|
||||||
|
Loading…
Reference in New Issue
Block a user