powerpc64/powernv: Add opal NVRAM driver for PowerNV systems

Add a very basic NVRAM driver for OPAL which can be used by the IBM
powerpc-utils nvram utility, not to be confused with the base nvram utility,
which only operates on powermac_nvram.

The IBM utility handles all partitions itself, treating the nvram device as
a plain store.

An alternative would be to manage partitions in the kernel, and augment the
base nvram utility to deal with different backing stores, but that
complicates the driver significantly.  Instead, present the same interface
IBM's utlity expects, and we get the usage for free.

Tested by:	bdragon

sys/conf/files.powerpc

@@ -192,6 +192,7 @@ powerpc/powernv/opal_flash.c	optional	powernv opalflash
 powerpc/powernv/opal_hmi.c	optional	powernv
 powerpc/powernv/opal_i2c.c	optional	iicbus fdt powernv
 powerpc/powernv/opal_i2cm.c	optional	iicbus fdt powernv
+powerpc/powernv/opal_nvram.c	optional	powernv nvram
 powerpc/powernv/opal_pci.c	optional	powernv pci
 powerpc/powernv/opal_sensor.c	optional	powernv
 powerpc/powernv/opalcall.S	optional	powernv

sys/modules/Makefile

@@ -762,10 +762,11 @@ _wi=		wi
 
 .if ${MACHINE_ARCH} == "powerpc64"
 _ipmi=		ipmi
+_nvram=		opal_nvram
 .endif
 .if ${MACHINE_ARCH} == "powerpc64" || ${MACHINE_ARCH} == "powerpc"
 # Don't build powermac_nvram for powerpcspe, it's never supported.
-_nvram=		powermac_nvram
+_nvram+=	powermac_nvram
 .endif
 
 .if ${MACHINE_CPUARCH} == "sparc64"

sys/modules/opal_nvram/Makefile

@@ -0,0 +1,10 @@
+# $FreeBSD$
+
+.PATH: ${SRCTOP}/sys/powerpc/powernv
+
+KMOD=	opal_nvram
+SRCS=	opal_nvram.c
+SRCS+=	bus_if.h device_if.h
+SRCS+=	ofw_bus_if.h
+
+.include <bsd.kmod.mk>

sys/powerpc/powernv/opal.h

@@ -45,6 +45,8 @@ int opal_call(uint64_t token, ...);
 #define OPAL_RTC_WRITE			4
 #define	OPAL_CEC_POWER_DOWN		5
 #define	OPAL_CEC_REBOOT			6
+#define	OPAL_READ_NVRAM			7
+#define	OPAL_WRITE_NVRAM		8
 #define	OPAL_HANDLE_INTERRUPT		9
 #define	OPAL_POLL_EVENTS		10
 #define	OPAL_PCI_CONFIG_READ_BYTE	13

sys/powerpc/powernv/opal_hmi.c

@@ -81,6 +81,26 @@ opal_hmi_event_handler(void *unused, struct opal_msg *msg)
 	return;
 }
 
+static int
+opal_hmi_handler2(struct trapframe *frame)
+{
+	uint64_t flags;
+	int err;
+
+	flags = 0;
+	err = opal_call(OPAL_HANDLE_HMI2, vtophys(&flags));
+
+	if (flags & OPAL_HMI_FLAGS_TOD_TB_FAIL)
+		panic("TOD/TB recovery failure");
+
+	if (err == OPAL_SUCCESS)
+		return (0);
+
+	printf("HMI handler failed!  OPAL error code: %d\n", err);
+
+	return (-1);
+}
+
 static int
 opal_hmi_handler(struct trapframe *frame)
 {
@@ -88,10 +108,8 @@ opal_hmi_handler(struct trapframe *frame)
 
 	err = opal_call(OPAL_HANDLE_HMI);
 
-	if (err == OPAL_SUCCESS) {
-		mtspr(SPR_HMER, 0);
+	if (err == OPAL_SUCCESS)
 		return (0);
-	}
 
 	printf("HMI handler failed!  OPAL error code: %d\n", err);
 
@@ -105,7 +123,9 @@ opal_setup_hmi(void *data)
 	if (opal_check() != 0)
 		return;
 
-	if (opal_call(OPAL_CHECK_TOKEN, OPAL_HANDLE_HMI) == OPAL_TOKEN_PRESENT)
+	if (opal_call(OPAL_CHECK_TOKEN, OPAL_HANDLE_HMI2) == OPAL_TOKEN_PRESENT)
+		hmi_handler = opal_hmi_handler2;
+	else if (opal_call(OPAL_CHECK_TOKEN, OPAL_HANDLE_HMI) == OPAL_TOKEN_PRESENT)
 		hmi_handler = opal_hmi_handler;
 	else {
 		printf("Warning: No OPAL HMI handler found.\n");

sys/powerpc/powernv/opal_nvram.c

@@ -0,0 +1,276 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2019 Justin Hibbits
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/module.h>
+#include <sys/bus.h>
+#include <sys/conf.h>
+#include <sys/disk.h>
+#include <sys/kernel.h>
+#include <sys/uio.h>
+
+#include <dev/ofw/openfirm.h>
+#include <dev/ofw/ofw_bus.h>
+#include <dev/ofw/ofw_bus_subr.h>
+
+#include <machine/bus.h>
+#include <machine/md_var.h>
+#include <machine/pio.h>
+#include <machine/resource.h>
+
+#include "opal.h"
+
+#include <sys/rman.h>
+
+#include <vm/vm.h>
+#include <vm/pmap.h>
+
+#define	NVRAM_BUFSIZE	(65536)	/* 64k blocks */
+
+struct opal_nvram_softc {
+	device_t	 sc_dev;
+	uint32_t	 sc_size;
+	uint8_t		*sc_buf;
+	vm_paddr_t	 sc_buf_phys;
+
+	struct cdev 	*sc_cdev;
+	int		 sc_isopen;
+};
+
+/*
+ * Device interface.
+ */
+static int		opal_nvram_probe(device_t);
+static int		opal_nvram_attach(device_t);
+static int		opal_nvram_detach(device_t);
+
+/*
+ * Driver methods.
+ */
+static device_method_t	opal_nvram_methods[] = {
+	/* Device interface */
+	DEVMETHOD(device_probe,		opal_nvram_probe),
+	DEVMETHOD(device_attach,	opal_nvram_attach),
+	DEVMETHOD(device_detach,	opal_nvram_detach),
+
+	{ 0, 0 }
+};
+
+static driver_t	opal_nvram_driver = {
+	"opal_nvram",
+	opal_nvram_methods,
+	sizeof(struct opal_nvram_softc)
+};
+
+static devclass_t opal_nvram_devclass;
+
+DRIVER_MODULE(opal_nvram, opal, opal_nvram_driver, opal_nvram_devclass, 0, 0);
+
+/*
+ * Cdev methods.
+ */
+
+static	d_open_t	opal_nvram_open;
+static	d_close_t	opal_nvram_close;
+static	d_read_t	opal_nvram_read;
+static	d_write_t	opal_nvram_write;
+static	d_ioctl_t	opal_nvram_ioctl;
+
+static struct cdevsw opal_nvram_cdevsw = {
+	.d_version =	D_VERSION,
+	.d_flags =	D_NEEDGIANT,
+	.d_open =	opal_nvram_open,
+	.d_close =	opal_nvram_close,
+	.d_read =	opal_nvram_read,
+	.d_write =	opal_nvram_write,
+	.d_ioctl =	opal_nvram_ioctl,
+	.d_name =	"nvram",
+};
+
+static int
+opal_nvram_probe(device_t dev)
+{
+
+	if (!ofw_bus_is_compatible(dev, "ibm,opal-nvram"))
+		return (ENXIO);
+
+	device_set_desc(dev, "OPAL NVRAM");
+	return (BUS_PROBE_DEFAULT);
+}
+
+static int
+opal_nvram_attach(device_t dev)
+{
+	struct opal_nvram_softc *sc;
+	phandle_t node;
+	int err;
+
+	node = ofw_bus_get_node(dev);
+	sc = device_get_softc(dev);
+
+	sc->sc_dev = dev;
+
+	err = OF_getencprop(node, "#bytes", &sc->sc_size,
+	    sizeof(sc->sc_size));
+
+	if (err < 0)
+		return (ENXIO);
+
+	sc->sc_buf = contigmalloc(NVRAM_BUFSIZE, M_DEVBUF, M_WAITOK,
+	    0, BUS_SPACE_MAXADDR, PAGE_SIZE, 0);
+	if (sc->sc_buf == NULL) {
+		device_printf(dev, "No memory for buffer.\n");
+		return (ENXIO);
+	}
+	sc->sc_buf_phys = pmap_kextract((vm_offset_t)sc->sc_buf);
+	sc->sc_cdev = make_dev(&opal_nvram_cdevsw, 0, 0, 0, 0600,
+	    "nvram");
+	sc->sc_cdev->si_drv1 = sc;
+
+	return (0);
+}
+
+static int
+opal_nvram_detach(device_t dev)
+{
+	struct opal_nvram_softc *sc;
+
+	sc = device_get_softc(dev);
+
+	if (sc->sc_cdev != NULL)
+		destroy_dev(sc->sc_cdev);
+	if (sc->sc_buf != NULL)
+		contigfree(sc->sc_buf, NVRAM_BUFSIZE, M_DEVBUF);
+	
+	return (0);
+}
+
+static int
+opal_nvram_open(struct cdev *dev, int flags, int fmt, struct thread *td)
+{
+	struct opal_nvram_softc *sc = dev->si_drv1;
+
+	if (sc->sc_isopen)
+		return EBUSY;
+	sc->sc_isopen = 1;
+	return (0);
+}
+
+static int
+opal_nvram_close(struct cdev *dev, int fflag, int devtype, struct thread *td)
+{
+	struct opal_nvram_softc *sc = dev->si_drv1;
+
+	sc->sc_isopen = 0;
+	return (0);
+}
+
+static int
+opal_nvram_read(struct cdev *dev, struct uio *uio, int ioflag)
+{
+	struct opal_nvram_softc *sc = dev->si_drv1;
+	int rv, amnt;
+
+	rv = 0;
+	while (uio->uio_resid > 0) {
+		amnt = MIN(uio->uio_resid, sc->sc_size - uio->uio_offset);
+		amnt = MIN(amnt, NVRAM_BUFSIZE);
+		if (amnt == 0)
+			break;
+
+		rv = opal_call(OPAL_READ_NVRAM, sc->sc_buf_phys,
+		    amnt, uio->uio_offset);
+		if (rv != OPAL_SUCCESS) {
+			switch (rv) {
+			case OPAL_HARDWARE:
+				rv = EIO;
+				break;
+			case OPAL_PARAMETER:
+				rv = EINVAL;
+				break;
+			}
+			break;
+		}
+		rv = uiomove(sc->sc_buf, amnt, uio);
+		if (rv != 0)
+			break;
+	}
+	return (rv);
+}
+
+static int
+opal_nvram_write(struct cdev *dev, struct uio *uio, int ioflag)
+{
+	off_t offset;
+	int rv, amnt;
+	struct opal_nvram_softc *sc = dev->si_drv1;
+
+	rv = 0;
+	while (uio->uio_resid > 0) {
+		amnt = MIN(uio->uio_resid, sc->sc_size - uio->uio_offset);
+		amnt = MIN(amnt, NVRAM_BUFSIZE);
+		if (amnt == 0) {
+			rv = ENOSPC;
+			break;
+		}
+		offset = uio->uio_offset;
+		rv = uiomove(sc->sc_buf, amnt, uio);
+		if (rv != 0)
+			break;
+		rv = opal_call(OPAL_WRITE_NVRAM, sc->sc_buf_phys, amnt,
+		    offset);
+		if (rv != OPAL_SUCCESS) {
+			switch (rv) {
+			case OPAL_HARDWARE:
+				rv = EIO;
+				break;
+			case OPAL_PARAMETER:
+				rv = EINVAL;
+				break;
+			}
+			break;
+		}
+	}
+	return (rv);
+}
+
+static int
+opal_nvram_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag,
+    struct thread *td)
+{
+	struct opal_nvram_softc *sc = dev->si_drv1;
+
+	switch (cmd) {
+	case DIOCGMEDIASIZE:
+		*(off_t *)data = sc->sc_size;
+		return (0);
+	}
+	return (EINVAL);
+}