Remove the riscv64sf architecture.

Reviewed by:	jrtc27, arichardson, br, kp, imp, emaste
Differential Revision:	https://reviews.freebsd.org/D39496
This commit is contained in:
John Baldwin 2023-04-12 11:09:27 -07:00
parent 29e3a06510
commit 1ca12bd927
8 changed files with 8 additions and 21 deletions

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@ -525,7 +525,7 @@ _UNIVERSE_TARGETS= ${TARGETS}
TARGET_ARCHES_arm?= armv6 armv7 TARGET_ARCHES_arm?= armv6 armv7
TARGET_ARCHES_arm64?= aarch64 TARGET_ARCHES_arm64?= aarch64
TARGET_ARCHES_powerpc?= powerpc powerpc64 powerpc64le ${EXTRA_ARCHES_powerpc} TARGET_ARCHES_powerpc?= powerpc powerpc64 powerpc64le ${EXTRA_ARCHES_powerpc}
TARGET_ARCHES_riscv?= riscv64 riscv64sf TARGET_ARCHES_riscv?= riscv64
.for target in ${TARGETS} .for target in ${TARGETS}
TARGET_ARCHES_${target}?= ${target} TARGET_ARCHES_${target}?= ${target}
.endfor .endfor

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@ -148,8 +148,7 @@ KNOWN_ARCHES?= aarch64/arm64 \
powerpc64/powerpc \ powerpc64/powerpc \
powerpc64le/powerpc \ powerpc64le/powerpc \
powerpcspe/powerpc \ powerpcspe/powerpc \
riscv64/riscv \ riscv64/riscv
riscv64sf/riscv
.if ${TARGET} == ${TARGET_ARCH} .if ${TARGET} == ${TARGET_ARCH}
_t= ${TARGET} _t= ${TARGET}

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@ -97,7 +97,6 @@ release to support each architecture.
.It powerpc64 Ta 9.0 .It powerpc64 Ta 9.0
.It powerpc64le Ta 13.0 .It powerpc64le Ta 13.0
.It riscv64 Ta 12.0 .It riscv64 Ta 12.0
.It riscv64sf Ta 12.0
.El .El
.Pp .Pp
Discontinued architectures are shown in the following table. Discontinued architectures are shown in the following table.
@ -117,6 +116,7 @@ Discontinued architectures are shown in the following table.
.It mips64elhf Ta 12.0 Ta 13.x .It mips64elhf Ta 12.0 Ta 13.x
.It mips64hf Ta 12.0 Ta 13.x .It mips64hf Ta 12.0 Ta 13.x
.It pc98 Ta 2.2 Ta 11.4 .It pc98 Ta 2.2 Ta 11.4
.It riscv64sf Ta 12.0 Ta 13.x
.It sparc64 Ta 5.0 Ta 12.x .It sparc64 Ta 5.0 Ta 12.x
.El .El
.Ss Type sizes .Ss Type sizes
@ -205,7 +205,6 @@ Machine-dependent type sizes:
.It powerpc64 Ta 8 Ta 8 Ta 8 .It powerpc64 Ta 8 Ta 8 Ta 8
.It powerpc64le Ta 8 Ta 8 Ta 8 .It powerpc64le Ta 8 Ta 8 Ta 8
.It riscv64 Ta 8 Ta 16 Ta 8 .It riscv64 Ta 8 Ta 16 Ta 8
.It riscv64sf Ta 8 Ta 16 Ta 8
.El .El
.Pp .Pp
.Sy time_t .Sy time_t
@ -223,7 +222,6 @@ is 8 bytes on all supported architectures except i386.
.It powerpc64 Ta big Ta unsigned .It powerpc64 Ta big Ta unsigned
.It powerpc64le Ta little Ta unsigned .It powerpc64le Ta little Ta unsigned
.It riscv64 Ta little Ta signed .It riscv64 Ta little Ta signed
.It riscv64sf Ta little Ta signed
.El .El
.Ss Page Size .Ss Page Size
.Bl -column -offset indent "Architecture" "Page Sizes" .Bl -column -offset indent "Architecture" "Page Sizes"
@ -238,7 +236,6 @@ is 8 bytes on all supported architectures except i386.
.It powerpc64 Ta 4K .It powerpc64 Ta 4K
.It powerpc64le Ta 4K .It powerpc64le Ta 4K
.It riscv64 Ta 4K, 2M, 1G .It riscv64 Ta 4K, 2M, 1G
.It riscv64sf Ta 4K, 2M, 1G
.El .El
.Ss Floating Point .Ss Floating Point
.Bl -column -offset indent "Architecture" "float, double" "long double" .Bl -column -offset indent "Architecture" "float, double" "long double"
@ -253,7 +250,6 @@ is 8 bytes on all supported architectures except i386.
.It powerpc64 Ta hard Ta hard, double precision .It powerpc64 Ta hard Ta hard, double precision
.It powerpc64le Ta hard Ta hard, double precision .It powerpc64le Ta hard Ta hard, double precision
.It riscv64 Ta hard Ta hard, quad precision .It riscv64 Ta hard Ta hard, quad precision
.It riscv64sf Ta soft Ta soft, quad precision
.El .El
.Ss Default Tool Chain .Ss Default Tool Chain
.Fx .Fx
@ -285,7 +281,7 @@ or similar things like boot sequences.
.It arm Ta arm Ta armv6, armv7 .It arm Ta arm Ta armv6, armv7
.It i386 Ta i386 Ta i386 .It i386 Ta i386 Ta i386
.It powerpc Ta powerpc Ta powerpc, powerpcspe, powerpc64, powerpc64le .It powerpc Ta powerpc Ta powerpc, powerpcspe, powerpc64, powerpc64le
.It riscv Ta riscv Ta riscv64, riscv64sf .It riscv Ta riscv Ta riscv64
.El .El
.Ss Predefined Macros .Ss Predefined Macros
The compiler provides a number of predefined macros. The compiler provides a number of predefined macros.
@ -322,7 +318,6 @@ Architecture-specific macros:
.It powerpc64 Ta Dv __powerpc__ , Dv __powerpc64__ .It powerpc64 Ta Dv __powerpc__ , Dv __powerpc64__
.It powerpc64le Ta Dv __powerpc__ , Dv __powerpc64__ .It powerpc64le Ta Dv __powerpc__ , Dv __powerpc64__
.It riscv64 Ta Dv __riscv , Dv __riscv_xlen == 64 .It riscv64 Ta Dv __riscv , Dv __riscv_xlen == 64
.It riscv64sf Ta Dv __riscv , Dv __riscv_xlen == 64 , Dv __riscv_float_abi_soft
.El .El
.Pp .Pp
Compilers may define additional variants of architecture-specific macros. Compilers may define additional variants of architecture-specific macros.

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@ -17,7 +17,7 @@ MK_INSTALL_AS_USER= yes
TARGET_ARCHES_arm?= arm armv6 armv7 TARGET_ARCHES_arm?= arm armv6 armv7
TARGET_ARCHES_arm64?= aarch64 TARGET_ARCHES_arm64?= aarch64
TARGET_ARCHES_powerpc?= powerpc powerpc64 powerpc64le powerpcspe TARGET_ARCHES_powerpc?= powerpc powerpc64 powerpc64le powerpcspe
TARGET_ARCHES_riscv?= riscv64 riscv64sf TARGET_ARCHES_riscv?= riscv64
# some corner cases # some corner cases
BOOT_MACHINE_DIR.amd64 = boot/i386 BOOT_MACHINE_DIR.amd64 = boot/i386

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@ -13,7 +13,7 @@ unix ?= We run FreeBSD, not UNIX.
# and/or endian. This is called MACHINE_CPU in NetBSD, but that's used # and/or endian. This is called MACHINE_CPU in NetBSD, but that's used
# for something different in FreeBSD. # for something different in FreeBSD.
# #
__TO_CPUARCH=C/arm(v[67])?/arm/:C/powerpc(64|64le|spe)/powerpc/:C/riscv64(sf)?/riscv/ __TO_CPUARCH=C/arm(v[67])?/arm/:C/powerpc(64|64le|spe)/powerpc/:C/riscv64/riscv/
MACHINE_CPUARCH=${MACHINE_ARCH:${__TO_CPUARCH}} MACHINE_CPUARCH=${MACHINE_ARCH:${__TO_CPUARCH}}
.endif .endif

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@ -331,5 +331,4 @@ LD_EMULATION_powerpcspe= elf32ppc_fbsd
LD_EMULATION_powerpc64= elf64ppc_fbsd LD_EMULATION_powerpc64= elf64ppc_fbsd
LD_EMULATION_powerpc64le= elf64lppc_fbsd LD_EMULATION_powerpc64le= elf64lppc_fbsd
LD_EMULATION_riscv64= elf64lriscv LD_EMULATION_riscv64= elf64lriscv
LD_EMULATION_riscv64sf= elf64lriscv
LD_EMULATION=${LD_EMULATION_${MACHINE_ARCH}} LD_EMULATION=${LD_EMULATION_${MACHINE_ARCH}}

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@ -48,16 +48,10 @@
#define MACHINE "riscv" #define MACHINE "riscv"
#endif #endif
#ifndef MACHINE_ARCH #ifndef MACHINE_ARCH
/* Always use the hard-float arch for the kernel. */
#if !defined(_KERNEL) && defined(__riscv_float_abi_soft)
#define MACHINE_ARCH "riscv64sf"
#else
#define MACHINE_ARCH "riscv64" #define MACHINE_ARCH "riscv64"
#endif #endif
#endif
#ifdef _KERNEL #ifdef _KERNEL
#define MACHINE_ARCHES "riscv64 riscv64sf" #define MACHINE_ARCHES "riscv64"
#endif #endif
#ifdef SMP #ifdef SMP

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@ -5,7 +5,7 @@
# #
# Full list of all arches we don't build. # Full list of all arches we don't build.
# #
# powerpc/powerpcspe riscv/riscv64sf arm/armv6 # powerpc/powerpcspe arm/armv6
# #
# This script is expected to be run in stand (though you could run it anywhere # This script is expected to be run in stand (though you could run it anywhere
# in the tree). It does a full clean build. For stand you can do all the archs in # in the tree). It does a full clean build. For stand you can do all the archs in