powerpc/mmu: Don't use the cache instructions to zero pages

A page (even physmem) can be marked as cache-inhibited.  Attempting to use
'dcbz' to zero a page mapped cache-inhibited triggers an alignment
exception, which is fatal in kernel.  This was seen when testing hardware
acceleration with X on POWER9.

At some point in the future, this should be changed to a more straight
forward zero loop instead of bzero(), and a similar change be made to the
other pmaps.

Reported by:	pkubaj@

sys/powerpc/aim/mmu_radix.c

@@ -909,10 +909,8 @@ static void
 pagezero(vm_offset_t va)
 {
 	va = trunc_page(va);
-	int off;
 
-	for (off = 0; off < PAGE_SIZE; off += cacheline_size)
-		__asm __volatile("dcbz 0,%0" :: "r"(va + off));
+	bzero((void *)va, PAGE_SIZE);
 }
 
 static uint64_t