Various fixes and improvements- some from the folks at Sitara Networks (thx)
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6f7f1280f6
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1e82da53f5
@ -36,6 +36,12 @@
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* Bill Paul's work in other FreeBSD network drivers.
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*/
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/*
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* Many bug fixes gratefully acknowledged from:
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*
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* The folks at Sitara Networks
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*/
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/*
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* Options
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*/
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@ -254,11 +260,14 @@ wx_attach(device_t dev)
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error = ENXIO;
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goto out;
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}
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val = pci_read_config(dev, PCIR_CACHELNSZ, 1);
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if (val != 0x10) {
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pci_write_config(dev, PCIR_CACHELNSZ, 0x10, 1);
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}
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/*
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* Let the BIOS do it's job- but check for sanity.
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*/
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val = pci_read_config(dev, PCIR_CACHELNSZ, 1);
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if (val < 4 || val > 32) {
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pci_write_config(dev, PCIR_CACHELNSZ, 8, 1);
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}
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/*
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* Map control/status registers.
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@ -702,12 +711,12 @@ static void
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wx_start(struct ifnet *ifp)
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{
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wx_softc_t *sc = SOFTC_IFP(ifp);
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u_int16_t cidx, nactv;
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u_int16_t widx = WX_MAX_TDESC, cidx, nactv;
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WX_LOCK(sc);
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DPRINTF(sc, ("%s: wx_start\n", sc->wx_name));
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nactv = sc->tactive;
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while (nactv < WX_MAX_TDESC) {
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while (nactv < WX_MAX_TDESC - 1) {
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int ndesc;
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int gctried = 0;
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struct mbuf *m, *mb_head;
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@ -827,13 +836,10 @@ wx_start(struct ifnet *ifp)
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sc->tnxtfree = cidx;
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sc->tactive = nactv;
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ifp->if_timer = 10;
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if (IS_WISEMAN(sc)) {
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WRITE_CSR(sc, WXREG_TDT, cidx);
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} else {
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WRITE_CSR(sc, WXREG_TDT_LIVENGOOD, cidx);
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}
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if (ifp->if_bpf)
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bpf_mtap(WX_BPFTAP_ARG(ifp), mb_head);
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/* defer xmit until we've got them all */
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widx = cidx;
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continue;
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}
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@ -883,7 +889,15 @@ wx_start(struct ifnet *ifp)
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goto again;
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}
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if (sc->tactive == WX_MAX_TDESC) {
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if (widx < WX_MAX_TDESC) {
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if (IS_WISEMAN(sc)) {
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WRITE_CSR(sc, WXREG_TDT, widx);
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} else {
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WRITE_CSR(sc, WXREG_TDT_LIVENGOOD, widx);
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}
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}
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if (sc->tactive == WX_MAX_TDESC - 1) {
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sc->wx_xmitblocked++;
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ifp->if_flags |= IFF_OACTIVE;
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}
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@ -918,6 +932,9 @@ wx_intr(void *arg)
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wx_handle_link_intr(sc);
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}
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wx_handle_rxint(sc);
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if (sc->wx_icr & WXISR_TXQE) {
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wx_gc(sc);
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}
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if (sc->wx_if.if_snd.ifq_head != NULL) {
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wx_start(&sc->wx_if);
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}
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@ -1285,7 +1302,7 @@ wx_gc(wx_softc_t *sc)
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sc->tbsyf = txpkt->next;
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txpkt = sc->tbsyf;
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}
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if (sc->tactive < WX_MAX_TDESC) {
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if (sc->tactive < WX_MAX_TDESC - 1) {
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ifp->if_timer = 0;
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ifp->if_flags &= ~IFF_OACTIVE;
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}
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@ -1660,7 +1677,10 @@ wx_init(void *xsc)
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WRITE_CSR(sc, WXREG_RDH0, 0);
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WRITE_CSR(sc, WXREG_RDT0, (WX_MAX_RDESC - RXINCR));
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} else {
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WRITE_CSR(sc, WXREG_RDTR0_LIVENGOOD, WXRDTR_FPD);
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/*
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* The delay should yield ~10us receive interrupt delay
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*/
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WRITE_CSR(sc, WXREG_RDTR0_LIVENGOOD, WXRDTR_FPD | 0x40);
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WRITE_CSR(sc, WXREG_RDBA0_LO_LIVENGOOD,
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vtophys((vm_offset_t)&sc->rdescriptors[0]));
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WRITE_CSR(sc, WXREG_RDBA0_HI_LIVENGOOD, 0);
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@ -303,7 +303,7 @@ typedef struct {
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#define WXISR_GPI_EN3 0x4000
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#define WXIENABLE_DEFAULT \
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(WXISR_RXO | WXISR_RXT0 | WXISR_RXDMT0 | WXISR_RXSEQ | \
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(WXISR_RXO | WXISR_RXT0 | WXISR_RXDMT0 | WXISR_RXSEQ | WXISR_TXQE |\
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WXISR_LSC | WXISR_PCIE | WXISR_GPI_EN1)
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#define WXDISABLE 0xffffffff
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