- Bring in code removed from /sys/pccard/pcic.c, including DEVICE IDs, and
more bootverbose code. - Style nits. No significant functional changes.
This commit is contained in:
parent
9256ef9675
commit
1e8e653cda
@ -39,9 +39,11 @@
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#include <pci/pcic_p.h>
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static u_long pcic_pci_count = 0;
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static char *pcic_pci_probe __P((pcici_t, pcidi_t));
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static void pd6832_legacy_init __P((pcici_t tag, int unit));
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static void pcic_pci_attach __P((pcici_t, int));
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static char *pcic_pci_probe(pcici_t, pcidi_t);
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static void pcic_pci_attach(pcici_t, int);
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static void pd6832_legacy_init(pcici_t tag, int unit);
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static struct pci_device pcic_pci_driver = {
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"pcic",
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@ -51,104 +53,35 @@ static struct pci_device pcic_pci_driver = {
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NULL
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};
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DATA_SET (pcidevice_set, pcic_pci_driver);
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DATA_SET(pcidevice_set, pcic_pci_driver);
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/*
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* Return the ID string for a PD6832 if the vendor/product id matches,
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* NULL otherwise.
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* Return the ID string for the controller if the vendor/product id
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* matches, NULL otherwise.
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*/
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static char*
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static char *
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pcic_pci_probe(pcici_t tag, pcidi_t type)
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{
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switch(type) {
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case PCI_DEVICE_ID_PCIC_PD6832:
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return "Cirrus Logic CL-PD6832 CardBus Adapter";
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break;
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default:
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break;
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}
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return NULL;
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}
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/*
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* Set up the CL-PD6832 to look like a ISA based PCMCIA chip (a
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* PD672X). This routine is called once per PCMCIA socket.
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*/
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static void
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pd6832_legacy_init(pcici_t tag, int unit)
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{
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u_long bcr; /* to set interrupts */
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u_short io_port; /* the io_port to map this slot on */
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/*
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* I think this should be a call to pci_map_port, but that
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* routine won't map regiaters above 0x28, and the register we
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* need to map is 0x44
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*/
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io_port = pci_conf_read(tag, PD6832_LEGACY_16BIT_IOADDR)
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& ~PCI_MAP_IO;
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/*
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* Configure the first I/O window to contain PD6832_NUM_REGS
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* words and deactivate the second by setting the limit lower
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* than the base
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*/
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pci_conf_write(tag, PD6832_IO_BASE0, io_port | 1);
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pci_conf_write(tag, PD6832_IO_LIMIT0, (io_port + PD6832_NUM_REGS) | 1);
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pci_conf_write(tag, PD6832_IO_BASE1, (io_port +0x20) | 1);
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pci_conf_write(tag, PD6832_IO_LIMIT1, io_port | 1 );
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/*
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* Set default operating mode (I/O port space) and allocate
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* this socket to the current unit
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*/
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pci_conf_write(tag, PCI_COMMAND_STATUS_REG, PD6832_COMMAND_DEFAULTS );
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pci_conf_write(tag, PD6832_SOCKET, unit);
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/*
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* Set up the card inserted/card removed interrupts to come
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* through the isa IRQ
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*/
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bcr = pci_conf_read(tag, PD6832_BRIDGE_CONTROL);
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bcr |= (PD6832_BCR_ISA_IRQ|PD6832_BCR_MGMT_IRQ_ENA);
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pci_conf_write(tag, PD6832_BRIDGE_CONTROL, bcr);
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if (bootverbose) {
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printf("CardBus: Legacy PC-card 16bit I/O address [0x%x]\n",
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io_port);
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#ifdef PCIC_DEBUG
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{
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int i,j;
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printf ("PCI Config space:\n");
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for (j = 0; j < 0x98; j += 16) {
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printf("%02x: ", j);
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for (i = 0; i < 16; i += 4) {
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printf(" %08x",
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pci_conf_read(tag, i+j));
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}
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printf("\n");
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}
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}
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#endif
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switch (type) {
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case PCI_DEVICE_ID_PCIC_CLPD6729:
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return ("Cirrus Logic PD6729/6730 PC-Card Controller");
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case PCI_DEVICE_ID_PCIC_CLPD6832:
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return ("Cirrus Logic PD6832 CardBus Adapter");
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case PCI_DEVICE_ID_PCIC_TI1130:
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return ("TI 1130 PCMCIA/CardBus Bridge");
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case PCI_DEVICE_ID_PCIC_TI1131:
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return ("TI 1131 PCI to PCMCIA/CardBus bridge");
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default:
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break;
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}
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return (NULL);
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}
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/*
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* This will be a general PCI based card dispatch routine. Right now
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* it only understands the CL-PD6832
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* General PCI based card dispatch routine. Right now
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* it only understands the CL-PD6832.
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*/
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static void
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pcic_pci_attach(pcici_t config_id, int unit)
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{
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@ -157,11 +90,85 @@ pcic_pci_attach(pcici_t config_id, int unit)
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pcic_type = pci_conf_read(config_id, PCI_ID_REG);
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switch (pcic_type) {
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case PCI_DEVICE_ID_PCIC_PD6832:
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pd6832_legacy_init(config_id,unit);
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break;
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case PCI_DEVICE_ID_PCIC_CLPD6832:
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pd6832_legacy_init(config_id,unit);
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break;
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}
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if (bootverbose) {
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int i, j;
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u_char *p;
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u_long *pl;
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printf("PCI Config space:\n");
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for (j = 0; j < 0x98; j += 16) {
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printf("%02x: ", j);
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for (i = 0; i < 16; i += 4)
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printf(" %08x", pci_conf_read(tag, i+j));
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printf("\n");
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}
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p = (u_char *)pmap_mapdev(pci_conf_read(tag, 0x10), 0x1000);
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pl = (u_long *)p;
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printf("Cardbus Socket registers:\n");
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printf("00: ");
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for (i = 0; i < 4; i += 1)
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printf(" %08x:", pl[i]);
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printf("\n10: ");
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for (i = 4; i < 8; i += 1)
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printf(" %08x:", pl[i]);
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printf("\nExCa registers:\n");
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for (i = 0; i < 0x40; i += 16)
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printf("%02x: %16D\n", i, p + 0x800 + i, " ");
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}
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return;
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}
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/*
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* Set up the CL-PD6832 to look like a ISA based PCMCIA chip (a
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* PD672X). This routine is called once per PCMCIA socket.
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*/
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static void
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pd6832_legacy_init(pcici_t tag, int unit)
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{
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u_long bcr; /* to set interrupts */
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u_short io_port; /* the io_port to map this slot on */
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/*
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* I think this should be a call to pci_map_port, but that
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* routine won't map regiaters above 0x28, and the register we
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* need to map is 0x44.
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*/
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io_port = pci_conf_read(tag, CLPD6832_LEGACY_16BIT_IOADDR)
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& ~PCI_MAP_IO;
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/*
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* Configure the first I/O window to contain CLPD6832_NUM_REGS
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* words and deactivate the second by setting the limit lower
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* than the base.
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*/
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pci_conf_write(tag, CLPD6832_IO_BASE0, io_port | 1);
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pci_conf_write(tag, CLPD6832_IO_LIMIT0,
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(io_port + CLPD6832_NUM_REGS) | 1);
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pci_conf_write(tag, CLPD6832_IO_BASE1, (io_port +0x20) | 1);
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pci_conf_write(tag, CLPD6832_IO_LIMIT1, io_port | 1 );
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/*
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* Set default operating mode (I/O port space) and allocate
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* this socket to the current unit.
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*/
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pci_conf_write(tag, PCI_COMMAND_STATUS_REG, CLPD6832_COMMAND_DEFAULTS );
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pci_conf_write(tag, CLPD6832_SOCKET, unit);
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/*
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* Set up the card inserted/card removed interrupts to come
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* through the isa IRQ.
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*/
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bcr = pci_conf_read(tag, CLPD6832_BRIDGE_CONTROL);
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bcr |= (CLPD6832_BCR_ISA_IRQ|CLPD6832_BCR_MGMT_IRQ_ENA);
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pci_conf_write(tag, CLPD6832_BRIDGE_CONTROL, bcr);
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if (bootverbose)
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printf("CardBus: Legacy PC-card 16bit I/O address [0x%x]\n",
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io_port);
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}
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#endif /* NPCI > 0 */
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@ -25,25 +25,30 @@
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id$
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*/
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/* PCI/CardBus Device IDs */
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#define PCI_DEVICE_ID_PCIC_CLPD6729 0x11001013ul
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#define PCI_DEVICE_ID_PCIC_CLPD6832 0x11101013ul
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#define PCI_DEVICE_ID_PCIC_O2MICRO 0x673A1217ul
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#define PCI_DEVICE_ID_PCIC_TI1130 0xAC12104Cul
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#define PCI_DEVICE_ID_PCIC_TI1131 0xAC15104Cul
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/* CL-PD6832 CardBus defines */
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#define PCI_DEVICE_ID_PCIC_PD6832 0x11101013ul
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/* PCI configuration registers */
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#define PD6832_IO_BASE0 0x002c
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#define PD6832_IO_LIMIT0 0x0030
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#define PD6832_IO_BASE1 0x0034
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#define PD6832_IO_LIMIT1 0x0038
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#define PD6832_BRIDGE_CONTROL 0x003c
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#define PD6832_LEGACY_16BIT_IOADDR 0x0044
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#define PD6832_SOCKET 0x004c
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#define CLPD6832_IO_BASE0 0x002c
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#define CLPD6832_IO_LIMIT0 0x0030
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#define CLPD6832_IO_BASE1 0x0034
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#define CLPD6832_IO_LIMIT1 0x0038
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#define CLPD6832_BRIDGE_CONTROL 0x003c
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#define CLPD6832_LEGACY_16BIT_IOADDR 0x0044
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#define CLPD6832_SOCKET 0x004c
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/* Configuration constants */
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#define PD6832_BCR_MGMT_IRQ_ENA 0x08000000
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#define PD6832_BCR_ISA_IRQ 0x00800000
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#define PD6832_COMMAND_DEFAULTS 0x00000045
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#define PD6832_NUM_REGS 4
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#define CLPD6832_BCR_MGMT_IRQ_ENA 0x08000000
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#define CLPD6832_BCR_ISA_IRQ 0x00800000
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#define CLPD6832_COMMAND_DEFAULTS 0x00000045
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#define CLPD6832_NUM_REGS 4
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/* End of CL-PD6832 defines */
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195
sys/pci/pcic_p.c
195
sys/pci/pcic_p.c
@ -39,9 +39,11 @@
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#include <pci/pcic_p.h>
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static u_long pcic_pci_count = 0;
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static char *pcic_pci_probe __P((pcici_t, pcidi_t));
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static void pd6832_legacy_init __P((pcici_t tag, int unit));
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static void pcic_pci_attach __P((pcici_t, int));
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static char *pcic_pci_probe(pcici_t, pcidi_t);
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static void pcic_pci_attach(pcici_t, int);
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static void pd6832_legacy_init(pcici_t tag, int unit);
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static struct pci_device pcic_pci_driver = {
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"pcic",
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@ -51,104 +53,35 @@ static struct pci_device pcic_pci_driver = {
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NULL
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};
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DATA_SET (pcidevice_set, pcic_pci_driver);
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DATA_SET(pcidevice_set, pcic_pci_driver);
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/*
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* Return the ID string for a PD6832 if the vendor/product id matches,
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* NULL otherwise.
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* Return the ID string for the controller if the vendor/product id
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* matches, NULL otherwise.
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*/
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static char*
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static char *
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pcic_pci_probe(pcici_t tag, pcidi_t type)
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{
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switch(type) {
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case PCI_DEVICE_ID_PCIC_PD6832:
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return "Cirrus Logic CL-PD6832 CardBus Adapter";
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break;
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default:
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break;
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}
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return NULL;
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}
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/*
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* Set up the CL-PD6832 to look like a ISA based PCMCIA chip (a
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* PD672X). This routine is called once per PCMCIA socket.
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*/
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static void
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pd6832_legacy_init(pcici_t tag, int unit)
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{
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u_long bcr; /* to set interrupts */
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u_short io_port; /* the io_port to map this slot on */
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/*
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* I think this should be a call to pci_map_port, but that
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* routine won't map regiaters above 0x28, and the register we
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* need to map is 0x44
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*/
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io_port = pci_conf_read(tag, PD6832_LEGACY_16BIT_IOADDR)
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& ~PCI_MAP_IO;
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/*
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* Configure the first I/O window to contain PD6832_NUM_REGS
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* words and deactivate the second by setting the limit lower
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* than the base
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*/
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pci_conf_write(tag, PD6832_IO_BASE0, io_port | 1);
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pci_conf_write(tag, PD6832_IO_LIMIT0, (io_port + PD6832_NUM_REGS) | 1);
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pci_conf_write(tag, PD6832_IO_BASE1, (io_port +0x20) | 1);
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pci_conf_write(tag, PD6832_IO_LIMIT1, io_port | 1 );
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/*
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* Set default operating mode (I/O port space) and allocate
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* this socket to the current unit
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*/
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pci_conf_write(tag, PCI_COMMAND_STATUS_REG, PD6832_COMMAND_DEFAULTS );
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pci_conf_write(tag, PD6832_SOCKET, unit);
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/*
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* Set up the card inserted/card removed interrupts to come
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* through the isa IRQ
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*/
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bcr = pci_conf_read(tag, PD6832_BRIDGE_CONTROL);
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bcr |= (PD6832_BCR_ISA_IRQ|PD6832_BCR_MGMT_IRQ_ENA);
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pci_conf_write(tag, PD6832_BRIDGE_CONTROL, bcr);
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if (bootverbose) {
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printf("CardBus: Legacy PC-card 16bit I/O address [0x%x]\n",
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io_port);
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#ifdef PCIC_DEBUG
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{
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int i,j;
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printf ("PCI Config space:\n");
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for (j = 0; j < 0x98; j += 16) {
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printf("%02x: ", j);
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for (i = 0; i < 16; i += 4) {
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printf(" %08x",
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pci_conf_read(tag, i+j));
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}
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printf("\n");
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}
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}
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#endif
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switch (type) {
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case PCI_DEVICE_ID_PCIC_CLPD6729:
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return ("Cirrus Logic PD6729/6730 PC-Card Controller");
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case PCI_DEVICE_ID_PCIC_CLPD6832:
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return ("Cirrus Logic PD6832 CardBus Adapter");
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case PCI_DEVICE_ID_PCIC_TI1130:
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return ("TI 1130 PCMCIA/CardBus Bridge");
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case PCI_DEVICE_ID_PCIC_TI1131:
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return ("TI 1131 PCI to PCMCIA/CardBus bridge");
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default:
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break;
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}
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return (NULL);
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}
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/*
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* This will be a general PCI based card dispatch routine. Right now
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* it only understands the CL-PD6832
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* General PCI based card dispatch routine. Right now
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* it only understands the CL-PD6832.
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*/
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static void
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pcic_pci_attach(pcici_t config_id, int unit)
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{
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@ -157,11 +90,85 @@ pcic_pci_attach(pcici_t config_id, int unit)
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pcic_type = pci_conf_read(config_id, PCI_ID_REG);
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switch (pcic_type) {
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case PCI_DEVICE_ID_PCIC_PD6832:
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pd6832_legacy_init(config_id,unit);
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break;
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case PCI_DEVICE_ID_PCIC_CLPD6832:
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pd6832_legacy_init(config_id,unit);
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break;
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}
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if (bootverbose) {
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int i, j;
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u_char *p;
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u_long *pl;
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printf("PCI Config space:\n");
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for (j = 0; j < 0x98; j += 16) {
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printf("%02x: ", j);
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for (i = 0; i < 16; i += 4)
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printf(" %08x", pci_conf_read(tag, i+j));
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printf("\n");
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}
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p = (u_char *)pmap_mapdev(pci_conf_read(tag, 0x10), 0x1000);
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pl = (u_long *)p;
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printf("Cardbus Socket registers:\n");
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printf("00: ");
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for (i = 0; i < 4; i += 1)
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printf(" %08x:", pl[i]);
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printf("\n10: ");
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for (i = 4; i < 8; i += 1)
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printf(" %08x:", pl[i]);
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printf("\nExCa registers:\n");
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for (i = 0; i < 0x40; i += 16)
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printf("%02x: %16D\n", i, p + 0x800 + i, " ");
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}
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return;
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}
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/*
|
||||
* Set up the CL-PD6832 to look like a ISA based PCMCIA chip (a
|
||||
* PD672X). This routine is called once per PCMCIA socket.
|
||||
*/
|
||||
static void
|
||||
pd6832_legacy_init(pcici_t tag, int unit)
|
||||
{
|
||||
u_long bcr; /* to set interrupts */
|
||||
u_short io_port; /* the io_port to map this slot on */
|
||||
|
||||
/*
|
||||
* I think this should be a call to pci_map_port, but that
|
||||
* routine won't map regiaters above 0x28, and the register we
|
||||
* need to map is 0x44.
|
||||
*/
|
||||
io_port = pci_conf_read(tag, CLPD6832_LEGACY_16BIT_IOADDR)
|
||||
& ~PCI_MAP_IO;
|
||||
|
||||
/*
|
||||
* Configure the first I/O window to contain CLPD6832_NUM_REGS
|
||||
* words and deactivate the second by setting the limit lower
|
||||
* than the base.
|
||||
*/
|
||||
pci_conf_write(tag, CLPD6832_IO_BASE0, io_port | 1);
|
||||
pci_conf_write(tag, CLPD6832_IO_LIMIT0,
|
||||
(io_port + CLPD6832_NUM_REGS) | 1);
|
||||
|
||||
pci_conf_write(tag, CLPD6832_IO_BASE1, (io_port +0x20) | 1);
|
||||
pci_conf_write(tag, CLPD6832_IO_LIMIT1, io_port | 1 );
|
||||
|
||||
/*
|
||||
* Set default operating mode (I/O port space) and allocate
|
||||
* this socket to the current unit.
|
||||
*/
|
||||
pci_conf_write(tag, PCI_COMMAND_STATUS_REG, CLPD6832_COMMAND_DEFAULTS );
|
||||
pci_conf_write(tag, CLPD6832_SOCKET, unit);
|
||||
|
||||
/*
|
||||
* Set up the card inserted/card removed interrupts to come
|
||||
* through the isa IRQ.
|
||||
*/
|
||||
bcr = pci_conf_read(tag, CLPD6832_BRIDGE_CONTROL);
|
||||
bcr |= (CLPD6832_BCR_ISA_IRQ|CLPD6832_BCR_MGMT_IRQ_ENA);
|
||||
pci_conf_write(tag, CLPD6832_BRIDGE_CONTROL, bcr);
|
||||
|
||||
if (bootverbose)
|
||||
printf("CardBus: Legacy PC-card 16bit I/O address [0x%x]\n",
|
||||
io_port);
|
||||
}
|
||||
#endif /* NPCI > 0 */
|
||||
|
@ -25,25 +25,30 @@
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* $Id$
|
||||
*/
|
||||
|
||||
/* PCI/CardBus Device IDs */
|
||||
#define PCI_DEVICE_ID_PCIC_CLPD6729 0x11001013ul
|
||||
#define PCI_DEVICE_ID_PCIC_CLPD6832 0x11101013ul
|
||||
#define PCI_DEVICE_ID_PCIC_O2MICRO 0x673A1217ul
|
||||
#define PCI_DEVICE_ID_PCIC_TI1130 0xAC12104Cul
|
||||
#define PCI_DEVICE_ID_PCIC_TI1131 0xAC15104Cul
|
||||
|
||||
/* CL-PD6832 CardBus defines */
|
||||
#define PCI_DEVICE_ID_PCIC_PD6832 0x11101013ul
|
||||
|
||||
/* PCI configuration registers */
|
||||
#define PD6832_IO_BASE0 0x002c
|
||||
#define PD6832_IO_LIMIT0 0x0030
|
||||
#define PD6832_IO_BASE1 0x0034
|
||||
#define PD6832_IO_LIMIT1 0x0038
|
||||
#define PD6832_BRIDGE_CONTROL 0x003c
|
||||
#define PD6832_LEGACY_16BIT_IOADDR 0x0044
|
||||
#define PD6832_SOCKET 0x004c
|
||||
#define CLPD6832_IO_BASE0 0x002c
|
||||
#define CLPD6832_IO_LIMIT0 0x0030
|
||||
#define CLPD6832_IO_BASE1 0x0034
|
||||
#define CLPD6832_IO_LIMIT1 0x0038
|
||||
#define CLPD6832_BRIDGE_CONTROL 0x003c
|
||||
#define CLPD6832_LEGACY_16BIT_IOADDR 0x0044
|
||||
#define CLPD6832_SOCKET 0x004c
|
||||
|
||||
/* Configuration constants */
|
||||
#define PD6832_BCR_MGMT_IRQ_ENA 0x08000000
|
||||
#define PD6832_BCR_ISA_IRQ 0x00800000
|
||||
#define PD6832_COMMAND_DEFAULTS 0x00000045
|
||||
#define PD6832_NUM_REGS 4
|
||||
#define CLPD6832_BCR_MGMT_IRQ_ENA 0x08000000
|
||||
#define CLPD6832_BCR_ISA_IRQ 0x00800000
|
||||
#define CLPD6832_COMMAND_DEFAULTS 0x00000045
|
||||
#define CLPD6832_NUM_REGS 4
|
||||
|
||||
/* End of CL-PD6832 defines */
|
||||
|
Loading…
Reference in New Issue
Block a user