dtrace: add register bindings for RISC-V
Reviewed by: mhorne, markj MFC after: 1 week Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D39611
This commit is contained in:
Christos Margiolis
Mark Johnston
parent
75081b9ed8
commit
1fef7abdc7
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@ -128,6 +128,7 @@ DSRCS+= regs_x86.d
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.if ${MACHINE_CPUARCH} == "riscv"
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SRCS+= instr_size.c
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DSRCS+= regs_riscv.d
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.endif
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YFLAGS+=-d
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74
cddl/lib/libdtrace/regs_riscv.d
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74
cddl/lib/libdtrace/regs_riscv.d
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@ -0,0 +1,74 @@
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/*
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* SPDX-License-Identifier: CDDL 1.0
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*
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* Copyright 2023 Christos Margiolis <christos@FreeBSD.org>
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*/
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inline int R_ZERO = 0;
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#pragma D binding "1.13" R_ZERO
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inline int R_RA = 1;
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#pragma D binding "1.13" R_RA
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inline int R_SP = 2;
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#pragma D binding "1.13" R_SP
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inline int R_GP = 3;
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#pragma D binding "1.13" R_GP
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inline int R_TP = 4;
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#pragma D binding "1.13" R_TP
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inline int R_T0 = 5;
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#pragma D binding "1.13" R_T0
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inline int R_T1 = 6;
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#pragma D binding "1.13" R_T1
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inline int R_T2 = 7;
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#pragma D binding "1.13" R_T2
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inline int R_S0 = 8;
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#pragma D binding "1.13" R_S0
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inline int R_FP = 8;
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#pragma D binding "1.13" R_FP
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inline int R_S1 = 9;
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#pragma D binding "1.13" R_S1
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inline int R_A0 = 10;
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#pragma D binding "1.13" R_A0
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inline int R_A1 = 11;
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#pragma D binding "1.13" R_A1
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inline int R_A2 = 12;
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#pragma D binding "1.13" R_A2
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inline int R_A3 = 13;
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#pragma D binding "1.13" R_A3
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inline int R_A4 = 14;
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#pragma D binding "1.13" R_A4
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inline int R_A5 = 15;
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#pragma D binding "1.13" R_A5
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inline int R_A6 = 16;
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#pragma D binding "1.13" R_A6
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inline int R_A7 = 17;
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#pragma D binding "1.13" R_A7
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inline int R_S2 = 18;
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#pragma D binding "1.13" R_S2
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inline int R_S3 = 19;
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#pragma D binding "1.13" R_S3
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inline int R_S4 = 20;
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#pragma D binding "1.13" R_S4
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inline int R_S5 = 21;
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#pragma D binding "1.13" R_S5
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inline int R_S6 = 22;
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#pragma D binding "1.13" R_S6
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inline int R_S7 = 23;
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#pragma D binding "1.13" R_S7
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inline int R_S8 = 24;
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#pragma D binding "1.13" R_S8
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inline int R_S9 = 25;
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#pragma D binding "1.13" R_S9
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inline int R_S10 = 26;
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#pragma D binding "1.13" R_S10
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inline int R_S11 = 27;
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#pragma D binding "1.13" R_S11
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inline int R_T3 = 28;
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#pragma D binding "1.13" R_T3
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inline int R_T4 = 29;
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#pragma D binding "1.13" R_T4
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inline int R_T5 = 30;
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#pragma D binding "1.13" R_T5
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inline int R_T6 = 31;
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#pragma D binding "1.13" R_T6
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inline int R_PC = 32;
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#pragma D binding "1.13" R_PC
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@ -311,10 +311,34 @@ dtrace_getstackdepth(int aframes)
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ulong_t
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dtrace_getreg(struct trapframe *rp, uint_t reg)
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{
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printf("IMPLEMENT ME: %s\n", __func__);
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return (0);
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switch (reg) {
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case REG_ZERO:
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return (0);
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case REG_RA:
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return (rp->tf_ra);
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case REG_SP:
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return (rp->tf_sp);
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case REG_GP:
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return (rp->tf_gp);
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case REG_TP:
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return (rp->tf_tp);
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case REG_T0 ... REG_T2:
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return (rp->tf_t[reg - REG_T0]);
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case REG_S0 ... REG_S1:
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return (rp->tf_s[reg - REG_S0]);
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case REG_A0 ... REG_A7:
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return (rp->tf_a[reg - REG_A0]);
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case REG_S2 ... REG_S11:
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return (rp->tf_s[reg - REG_S2 + 2]);
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case REG_T3 ... REG_T6:
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return (rp->tf_t[reg - REG_T3 + 3]);
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case REG_PC:
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return (rp->tf_sepc);
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default:
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DTRACE_CPUFLAG_SET(CPU_DTRACE_ILLOP);
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return (0);
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}
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/* NOTREACHED */
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}
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static int
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@ -42,7 +42,40 @@
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extern "C" {
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#endif
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/* Place here */
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#define REG_ZERO 0
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#define REG_RA 1
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#define REG_SP 2
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#define REG_GP 3
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#define REG_TP 4
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#define REG_T0 5
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#define REG_T1 6
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#define REG_T2 7
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#define REG_S0 8
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#define REG_FP 8
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#define REG_S1 9
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#define REG_A0 10
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#define REG_A1 11
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#define REG_A2 12
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#define REG_A3 13
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#define REG_A4 14
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#define REG_A5 15
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#define REG_A6 16
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#define REG_A7 17
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#define REG_S2 18
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#define REG_S3 19
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#define REG_S4 20
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#define REG_S5 21
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#define REG_S6 22
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#define REG_S7 23
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#define REG_S8 24
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#define REG_S9 25
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#define REG_S10 26
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#define REG_S11 27
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#define REG_T3 28
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#define REG_T4 29
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#define REG_T5 30
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#define REG_T6 31
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#define REG_PC 32
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#ifdef __cplusplus
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}
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