Merge Perforce changeset 219933 and portions of 219962 (omits changes to
unmerged BERI DTS files) to head: Use the OFW compatible string "mips,mips4k" rather than "mips4k,cp0" for interrupt control using MIPS4k CP0. Suggested by: thompsa Implement a MIPS FDT PIC decode routine to use when no PIC has been configured, which assumes a cascade back to the nexus bus (e.g., the on-board CP0 interrupt management parts on the MIPS). If the soc bus in a MIPS DTS file is declared as "mips4k,cp0"-compatible, then this will be enabled. This is sufficient to allow IRQs to be configured on BERI. Sponsored by: DARPA, AFRL
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=245335
@ -49,8 +49,26 @@ struct fdt_fixup_entry fdt_fixup_table[] = {
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{ NULL, NULL }
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};
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/*
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* For PIC-free boards, provide a PIC decoder to be used with mips4k CP0
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* interrupt control directly.
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*/
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static int
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fdt_pic_decode_mips4k_cp0(phandle_t node, pcell_t *intr, int *interrupt,
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int *trig, int *pol)
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{
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if (!fdt_is_compatible(node, "mips,mips4k"))
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return (ENXIO);
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*interrupt = fdt32_to_cpu(intr[0]);
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*trig = INTR_TRIGGER_CONFORM;
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*pol = INTR_POLARITY_CONFORM;
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return (0);
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}
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fdt_pic_decode_t fdt_pic_table[] = {
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NULL,
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NULL,
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&fdt_pic_decode_mips4k_cp0,
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NULL
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};
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