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Merge Perforce changeset 219933 and portions of 219962 (omits changes to

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unmerged BERI DTS files) to head:

  Use the OFW compatible string "mips,mips4k" rather than
  "mips4k,cp0" for interrupt control using MIPS4k CP0.

  Suggested by:   thompsa

  Implement a MIPS FDT PIC decode routine to use when no PIC has been
  configured, which assumes a cascade back to the nexus bus (e.g.,
  the on-board CP0 interrupt management parts on the MIPS).  If the
  soc bus in a MIPS DTS file is declared as "mips4k,cp0"-compatible,
  then this will be enabled.  This is sufficient to allow IRQs to be
  configured on BERI.

Sponsored by:	DARPA, AFRL
This commit is contained in:
Robert Watson 2013-01-12 16:09:33 +00:00
parent 31e85bd9cd
commit 2029d071db
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=245335
1 changed files with 20 additions and 2 deletions
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22
sys/dev/fdt/fdt_mips.c
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@ -49,8 +49,26 @@ struct fdt_fixup_entry fdt_fixup_table[] = {
{ NULL, NULL }
};
/*
* For PIC-free boards, provide a PIC decoder to be used with mips4k CP0
* interrupt control directly.
*/
static int
fdt_pic_decode_mips4k_cp0(phandle_t node, pcell_t *intr, int *interrupt,
int *trig, int *pol)
{
if (!fdt_is_compatible(node, "mips,mips4k"))
return (ENXIO);
*interrupt = fdt32_to_cpu(intr[0]);
*trig = INTR_TRIGGER_CONFORM;
*pol = INTR_POLARITY_CONFORM;
return (0);
}
fdt_pic_decode_t fdt_pic_table[] = {
NULL,
NULL,
&fdt_pic_decode_mips4k_cp0,
NULL
};