qlnxr: cleanup secondary effects from EOL purge
DEFINE_ALLOC_MR became unconditionally true, but it isn't used anywhere now. Several places depended upon DEFINE_IB_FAST_REG, but that is now always false. Similarly DEFINE_IB_UMEM_WITH_CHUNK became always false/undefined. DEFINE_IB_AH_ATTR_WITH_DMAC is now unconditionally true. Reviewed by: imp Pull Request: https://github.com/freebsd/freebsd-src/pull/603 Differential Revision: https://reviews.freebsd.org/D35560
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@ -498,9 +498,6 @@ qlnxr_gsi_build_header(struct qlnxr_dev *dev,
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int ip_ver = 0;
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bool has_udp = false;
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#if !DEFINE_IB_AH_ATTR_WITH_DMAC
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u8 mac[ETH_ALEN];
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#endif
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int i;
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send_size = 0;
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@ -525,12 +522,7 @@ qlnxr_gsi_build_header(struct qlnxr_dev *dev,
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}
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/* ENET + VLAN headers*/
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#if DEFINE_IB_AH_ATTR_WITH_DMAC
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memcpy(udh->eth.dmac_h, ah_attr->dmac, ETH_ALEN);
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#else
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qlnxr_get_dmac(dev, ah_attr, mac);
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memcpy(udh->eth.dmac_h, mac, ETH_ALEN);
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#endif
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memcpy(udh->eth.smac_h, dev->ha->primary_mac, ETH_ALEN);
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if (has_vlan) {
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udh->eth.type = htons(ETH_P_8021Q);
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@ -623,15 +623,6 @@ struct mr_info {
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u32 completed_handled;
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};
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#define DEFINE_ALLOC_MR
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#ifdef DEFINE_IB_FAST_REG
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struct qlnxr_fast_reg_page_list {
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struct ib_fast_reg_page_list ibfrpl;
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struct qlnxr_dev *dev;
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struct mr_info info;
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};
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#endif
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struct qlnxr_qp {
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struct ib_qp ibqp; /* must be first */
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struct qlnxr_dev *dev;
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@ -675,9 +666,6 @@ struct qlnxr_qp {
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bool signaled;
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dma_addr_t icrc_mapping;
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u32 *icrc;
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#ifdef DEFINE_IB_FAST_REG
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struct qlnxr_fast_reg_page_list *frmr;
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#endif
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struct qlnxr_mr *mr;
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} *wqe_wr_id;
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@ -828,14 +816,6 @@ static inline bool qlnxr_qp_has_rq(struct qlnxr_qp *qp)
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return 1;
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}
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#ifdef DEFINE_IB_FAST_REG
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static inline struct qlnxr_fast_reg_page_list *get_qlnxr_frmr_list(
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struct ib_fast_reg_page_list *ifrpl)
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{
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return container_of(ifrpl, struct qlnxr_fast_reg_page_list, ibfrpl);
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}
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#endif
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#define SET_FIELD2(value, name, flag) \
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do { \
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(value) |= ((flag) << (name ## _SHIFT)); \
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@ -887,8 +867,6 @@ extern int qlnx_rdma_ll2_set_mac_filter(void *rdma_ctx, uint8_t *old_mac_address
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#define QLNXR_ROCE_PKEY_TABLE_LEN 1
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#define QLNXR_ROCE_PKEY_DEFAULT 0xffff
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#define DEFINE_IB_AH_ATTR_WITH_DMAC (1)
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#define QLNX_IS_IWARP(rdev) IS_IWARP(ECORE_LEADING_HWFN(rdev->cdev))
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#define QLNX_IS_ROCE(rdev) IS_ROCE(ECORE_LEADING_HWFN(rdev->cdev))
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@ -1293,13 +1293,7 @@ qlnxr_populate_pbls(struct qlnxr_dev *dev, struct ib_umem *umem,
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struct scatterlist *sg;
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int shift, pg_cnt, pages, pbe_cnt, total_num_pbes = 0;
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qlnx_host_t *ha;
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#ifdef DEFINE_IB_UMEM_WITH_CHUNK
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int i;
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struct ib_umem_chunk *chunk = NULL;
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#else
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int entry;
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#endif
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ha = dev->ha;
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@ -1333,53 +1327,42 @@ qlnxr_populate_pbls(struct qlnxr_dev *dev, struct ib_umem *umem,
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shift = ilog2(umem->page_size);
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#ifndef DEFINE_IB_UMEM_WITH_CHUNK
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for_each_sg(umem->sg_head.sgl, sg, umem->nmap, entry) {
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#else
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list_for_each_entry(chunk, &umem->chunk_list, list) {
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/* get all the dma regions from the chunk. */
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for (i = 0; i < chunk->nmap; i++) {
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sg = &chunk->page_list[i];
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#endif
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pages = sg_dma_len(sg) >> shift;
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for (pg_cnt = 0; pg_cnt < pages; pg_cnt++) {
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/* store the page address in pbe */
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pbe->lo =
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cpu_to_le32(sg_dma_address(sg) +
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(umem->page_size * pg_cnt));
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pbe->hi =
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cpu_to_le32(upper_32_bits
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((sg_dma_address(sg) +
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umem->page_size * pg_cnt)));
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pages = sg_dma_len(sg) >> shift;
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for (pg_cnt = 0; pg_cnt < pages; pg_cnt++) {
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/* store the page address in pbe */
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pbe->lo =
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cpu_to_le32(sg_dma_address(sg) +
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(umem->page_size * pg_cnt));
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pbe->hi =
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cpu_to_le32(upper_32_bits
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((sg_dma_address(sg) +
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umem->page_size * pg_cnt)));
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QL_DPRINT12(ha,
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"Populate pbl table:"
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" pbe->addr=0x%x:0x%x "
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" pbe_cnt = %d total_num_pbes=%d"
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" pbe=%p\n", pbe->lo, pbe->hi, pbe_cnt,
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total_num_pbes, pbe);
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QL_DPRINT12(ha,
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"Populate pbl table:"
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" pbe->addr=0x%x:0x%x "
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" pbe_cnt = %d total_num_pbes=%d"
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" pbe=%p\n", pbe->lo, pbe->hi, pbe_cnt,
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total_num_pbes, pbe);
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pbe_cnt ++;
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total_num_pbes ++;
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pbe++;
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pbe_cnt ++;
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total_num_pbes ++;
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pbe++;
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if (total_num_pbes == pbl_info->num_pbes)
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return;
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if (total_num_pbes == pbl_info->num_pbes)
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return;
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/* if the given pbl is full storing the pbes,
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* move to next pbl.
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*/
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if (pbe_cnt ==
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(pbl_info->pbl_size / sizeof(u64))) {
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pbl_tbl++;
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pbe = (struct regpair *)pbl_tbl->va;
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pbe_cnt = 0;
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}
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/* if the given pbl is full storing the pbes,
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* move to next pbl.
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*/
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if (pbe_cnt ==
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(pbl_info->pbl_size / sizeof(u64))) {
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pbl_tbl++;
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pbe = (struct regpair *)pbl_tbl->va;
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pbe_cnt = 0;
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}
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#ifdef DEFINE_IB_UMEM_WITH_CHUNK
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}
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#endif
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}
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QL_DPRINT12(ha, "exit\n");
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return;
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@ -2346,9 +2329,6 @@ qlnxr_init_srq_user_params(struct ib_ucontext *ib_ctx,
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struct qlnxr_create_srq_ureq *ureq,
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int access, int dmasync)
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{
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#ifdef DEFINE_IB_UMEM_WITH_CHUNK
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struct ib_umem_chunk *chunk;
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#endif
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struct scatterlist *sg;
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int rc;
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struct qlnxr_dev *dev = srq->dev;
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@ -2376,13 +2356,7 @@ qlnxr_init_srq_user_params(struct ib_ucontext *ib_ctx,
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return PTR_ERR(srq->prod_umem);
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}
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#ifdef DEFINE_IB_UMEM_WITH_CHUNK
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chunk = container_of((&srq->prod_umem->chunk_list)->next,
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typeof(*chunk), list);
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sg = &chunk->page_list[0];
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#else
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sg = srq->prod_umem->sg_head.sgl;
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#endif
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srq->hw_srq.phy_prod_pair_addr = sg_dma_address(sg);
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QL_DPRINT12(ha, "exit\n");
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