Replace the two almost-exactly-identical AIM and Book-E clock.c
implementations with a single one after the application of a very small amount of #ifdef.
This commit is contained in:
parent
1cfdc97153
commit
228f09b3ef
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=256793
@ -85,7 +85,6 @@ libkern/qdivrem.c optional powerpc
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libkern/ucmpdi2.c optional powerpc
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libkern/ucmpdi2.c optional powerpc
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libkern/udivdi3.c optional powerpc
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libkern/udivdi3.c optional powerpc
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libkern/umoddi3.c optional powerpc
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libkern/umoddi3.c optional powerpc
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powerpc/aim/clock.c optional aim
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powerpc/aim/copyinout.c optional aim
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powerpc/aim/copyinout.c optional aim
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powerpc/aim/interrupt.c optional aim
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powerpc/aim/interrupt.c optional aim
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powerpc/aim/locore.S optional aim no-obj
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powerpc/aim/locore.S optional aim no-obj
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@ -101,7 +100,6 @@ powerpc/aim/swtch32.S optional aim powerpc
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powerpc/aim/swtch64.S optional aim powerpc64
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powerpc/aim/swtch64.S optional aim powerpc64
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powerpc/aim/trap.c optional aim
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powerpc/aim/trap.c optional aim
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powerpc/aim/uma_machdep.c optional aim
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powerpc/aim/uma_machdep.c optional aim
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powerpc/booke/clock.c optional booke
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powerpc/booke/copyinout.c optional booke
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powerpc/booke/copyinout.c optional booke
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powerpc/booke/interrupt.c optional booke
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powerpc/booke/interrupt.c optional booke
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powerpc/booke/locore.S optional booke no-obj
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powerpc/booke/locore.S optional booke no-obj
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@ -178,6 +176,7 @@ powerpc/powerpc/autoconf.c standard
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powerpc/powerpc/bcopy.c standard
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powerpc/powerpc/bcopy.c standard
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powerpc/powerpc/bus_machdep.c standard
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powerpc/powerpc/bus_machdep.c standard
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powerpc/powerpc/busdma_machdep.c standard
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powerpc/powerpc/busdma_machdep.c standard
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powerpc/powerpc/clock.c standard
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powerpc/powerpc/copystr.c standard
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powerpc/powerpc/copystr.c standard
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powerpc/powerpc/cpu.c standard
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powerpc/powerpc/cpu.c standard
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powerpc/powerpc/db_disasm.c optional ddb
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powerpc/powerpc/db_disasm.c optional ddb
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@ -646,14 +646,6 @@ cpu_flush_dcache(void *ptr, size_t len)
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/* TBD */
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/* TBD */
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}
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}
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void
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cpu_initclocks(void)
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{
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decr_tc_init();
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cpu_initclocks_bsp();
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}
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/*
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/*
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* Shutdown the CPU as much as possible.
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* Shutdown the CPU as much as possible.
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*/
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*/
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@ -1,280 +0,0 @@
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/*-
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* Copyright (C) 1995, 1996 Wolfgang Solfrank.
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* Copyright (C) 1995, 1996 TooLs GmbH.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
|
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
|
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by TooLs GmbH.
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* 4. The name of TooLs GmbH may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $NetBSD: clock.c,v 1.9 2000/01/19 02:52:19 msaitoh Exp $
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*/
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/*
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* Copyright (C) 2001 Benno Rice.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/sysctl.h>
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#include <sys/bus.h>
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#include <sys/interrupt.h>
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#include <sys/ktr.h>
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#include <sys/pcpu.h>
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#include <sys/timeet.h>
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#include <sys/timetc.h>
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#include <machine/clock.h>
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#include <machine/intr_machdep.h>
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#include <machine/platform.h>
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#include <machine/psl.h>
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#include <machine/spr.h>
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#include <machine/cpu.h>
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#include <machine/md_var.h>
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/*
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* Initially we assume a processor with a bus frequency of 12.5 MHz.
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*/
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static int initialized = 0;
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static u_long ns_per_tick = 80;
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static u_long ticks_per_sec = 12500000;
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static u_long *decr_counts[MAXCPU];
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#define DIFF19041970 2082844800
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static int decr_et_start(struct eventtimer *et,
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sbintime_t first, sbintime_t period);
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static int decr_et_stop(struct eventtimer *et);
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static timecounter_get_t decr_get_timecount;
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struct decr_state {
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int mode; /* 0 - off, 1 - periodic, 2 - one-shot. */
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int32_t div; /* Periodic divisor. */
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};
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static DPCPU_DEFINE(struct decr_state, decr_state);
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static struct eventtimer decr_et;
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static struct timecounter decr_timecounter = {
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decr_get_timecount, /* get_timecount */
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0, /* no poll_pps */
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~0u, /* counter_mask */
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0, /* frequency */
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"timebase" /* name */
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};
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/*
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* Decrementer interrupt handler.
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*/
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void
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decr_intr(struct trapframe *frame)
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{
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struct decr_state *s = DPCPU_PTR(decr_state);
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if (!initialized)
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return;
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(*decr_counts[curcpu])++;
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/*
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* Interrupt handler must reset DIS to avoid getting another
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* interrupt once EE is enabled.
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*/
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mtspr(SPR_TSR, TSR_DIS);
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CTR1(KTR_INTR, "%s: DEC interrupt", __func__);
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if (s->mode == 2)
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decr_et_stop(NULL);
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if (decr_et.et_active)
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decr_et.et_event_cb(&decr_et, decr_et.et_arg);
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}
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void
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cpu_initclocks(void)
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{
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decr_tc_init();
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cpu_initclocks_bsp();
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}
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/*
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* BSP early initialization.
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*/
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void
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decr_init(void)
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{
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struct cpuref cpu;
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char buf[32];
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if (platform_smp_get_bsp(&cpu) != 0)
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platform_smp_first_cpu(&cpu);
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ticks_per_sec = platform_timebase_freq(&cpu);
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ns_per_tick = 1000000000 / ticks_per_sec;
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set_cputicker(mftb, ticks_per_sec, 0);
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snprintf(buf, sizeof(buf), "cpu%d:decrementer", curcpu);
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intrcnt_add(buf, &decr_counts[curcpu]);
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decr_et_stop(NULL);
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initialized = 1;
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}
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#ifdef SMP
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/*
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* AP early initialization.
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*/
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void
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decr_ap_init(void)
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{
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char buf[32];
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snprintf(buf, sizeof(buf), "cpu%d:decrementer", curcpu);
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intrcnt_add(buf, &decr_counts[curcpu]);
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decr_et_stop(NULL);
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}
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#endif
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/*
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* Final initialization.
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*/
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void
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decr_tc_init(void)
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{
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decr_timecounter.tc_frequency = ticks_per_sec;
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tc_init(&decr_timecounter);
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decr_et.et_name = "decrementer";
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decr_et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT |
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ET_FLAGS_PERCPU;
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decr_et.et_quality = 1000;
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decr_et.et_frequency = ticks_per_sec;
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decr_et.et_min_period = (0x00000002LLU << 32) / ticks_per_sec;
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decr_et.et_max_period = (0xfffffffeLLU << 32) / ticks_per_sec;
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decr_et.et_start = decr_et_start;
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decr_et.et_stop = decr_et_stop;
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decr_et.et_priv = NULL;
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et_register(&decr_et);
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}
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/*
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* Event timer start method.
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*/
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static int
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decr_et_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
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{
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struct decr_state *s = DPCPU_PTR(decr_state);
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uint32_t fdiv, tcr;
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if (period != 0) {
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s->mode = 1;
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s->div = (decr_et.et_frequency * period) >> 32;
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} else {
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s->mode = 2;
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s->div = 0;
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}
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if (first != 0)
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fdiv = (decr_et.et_frequency * first) >> 32;
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else
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fdiv = s->div;
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tcr = mfspr(SPR_TCR);
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tcr |= TCR_DIE;
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if (s->mode == 1) {
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mtspr(SPR_DECAR, s->div);
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tcr |= TCR_ARE;
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} else
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tcr &= ~TCR_ARE;
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mtdec(fdiv);
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mtspr(SPR_TCR, tcr);
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return (0);
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}
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/*
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* Event timer stop method.
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||||||
*/
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static int
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decr_et_stop(struct eventtimer *et)
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{
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struct decr_state *s = DPCPU_PTR(decr_state);
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uint32_t tcr;
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||||||
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s->mode = 0;
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||||||
s->div = 0xffffffff;
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tcr = mfspr(SPR_TCR);
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|
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tcr &= ~(TCR_DIE | TCR_ARE);
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|
||||||
mtspr(SPR_TCR, tcr);
|
|
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return (0);
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|
||||||
}
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|
||||||
|
|
||||||
/*
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|
||||||
* Timecounter get method.
|
|
||||||
*/
|
|
||||||
static unsigned
|
|
||||||
decr_get_timecount(struct timecounter *tc)
|
|
||||||
{
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|
||||||
quad_t tb;
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|
|
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tb = mftb();
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|
||||||
return (tb);
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|
||||||
}
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|
||||||
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|
||||||
/*
|
|
||||||
* Wait for about n microseconds (at least!).
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|
||||||
*/
|
|
||||||
void
|
|
||||||
DELAY(int n)
|
|
||||||
{
|
|
||||||
u_quad_t start, end, now;
|
|
||||||
|
|
||||||
start = mftb();
|
|
||||||
end = start + (u_quad_t)ticks_per_sec / (1000000ULL / n);
|
|
||||||
do {
|
|
||||||
now = mftb();
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|
||||||
} while (now < end || (now > start && end < start));
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|
||||||
}
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||||||
|
|
@ -119,6 +119,14 @@ decr_intr(struct trapframe *frame)
|
|||||||
|
|
||||||
(*decr_counts[curcpu])++;
|
(*decr_counts[curcpu])++;
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||||||
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|
||||||
|
#ifdef BOOKE
|
||||||
|
/*
|
||||||
|
* Interrupt handler must reset DIS to avoid getting another
|
||||||
|
* interrupt once EE is enabled.
|
||||||
|
*/
|
||||||
|
mtspr(SPR_TSR, TSR_DIS);
|
||||||
|
#endif
|
||||||
|
|
||||||
if (s->mode == 1) {
|
if (s->mode == 1) {
|
||||||
/*
|
/*
|
||||||
* Based on the actual time delay since the last decrementer
|
* Based on the actual time delay since the last decrementer
|
||||||
@ -141,6 +149,14 @@ decr_intr(struct trapframe *frame)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void
|
||||||
|
cpu_initclocks(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
decr_tc_init();
|
||||||
|
cpu_initclocks_bsp();
|
||||||
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* BSP early initialization.
|
* BSP early initialization.
|
||||||
*/
|
*/
|
||||||
@ -207,11 +223,13 @@ decr_tc_init(void)
|
|||||||
* Event timer start method.
|
* Event timer start method.
|
||||||
*/
|
*/
|
||||||
static int
|
static int
|
||||||
decr_et_start(struct eventtimer *et,
|
decr_et_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
|
||||||
sbintime_t first, sbintime_t period)
|
|
||||||
{
|
{
|
||||||
struct decr_state *s = DPCPU_PTR(decr_state);
|
struct decr_state *s = DPCPU_PTR(decr_state);
|
||||||
uint32_t fdiv;
|
uint32_t fdiv;
|
||||||
|
#ifdef BOOKE
|
||||||
|
uint32_t tcr;
|
||||||
|
#endif
|
||||||
|
|
||||||
if (period != 0) {
|
if (period != 0) {
|
||||||
s->mode = 1;
|
s->mode = 1;
|
||||||
@ -220,12 +238,25 @@ decr_et_start(struct eventtimer *et,
|
|||||||
s->mode = 2;
|
s->mode = 2;
|
||||||
s->div = 0;
|
s->div = 0;
|
||||||
}
|
}
|
||||||
if (first != 0) {
|
if (first != 0)
|
||||||
fdiv = (decr_et.et_frequency * first) >> 32;
|
fdiv = (decr_et.et_frequency * first) >> 32;
|
||||||
} else
|
else
|
||||||
fdiv = s->div;
|
fdiv = s->div;
|
||||||
|
|
||||||
|
#ifdef BOOKE
|
||||||
|
tcr = mfspr(SPR_TCR);
|
||||||
|
tcr |= TCR_DIE;
|
||||||
|
if (s->mode == 1) {
|
||||||
|
mtspr(SPR_DECAR, s->div);
|
||||||
|
tcr |= TCR_ARE;
|
||||||
|
} else
|
||||||
|
tcr &= ~TCR_ARE;
|
||||||
mtdec(fdiv);
|
mtdec(fdiv);
|
||||||
|
mtspr(SPR_TCR, tcr);
|
||||||
|
#else
|
||||||
|
mtdec(fdiv);
|
||||||
|
#endif
|
||||||
|
|
||||||
return (0);
|
return (0);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -236,10 +267,19 @@ static int
|
|||||||
decr_et_stop(struct eventtimer *et)
|
decr_et_stop(struct eventtimer *et)
|
||||||
{
|
{
|
||||||
struct decr_state *s = DPCPU_PTR(decr_state);
|
struct decr_state *s = DPCPU_PTR(decr_state);
|
||||||
|
#ifdef BOOKE
|
||||||
|
uint32_t tcr;
|
||||||
|
#endif
|
||||||
|
|
||||||
s->mode = 0;
|
s->mode = 0;
|
||||||
s->div = 0x7fffffff;
|
s->div = 0x7fffffff;
|
||||||
|
#ifdef BOOKE
|
||||||
|
tcr = mfspr(SPR_TCR);
|
||||||
|
tcr &= ~(TCR_DIE | TCR_ARE);
|
||||||
|
mtspr(SPR_TCR, tcr);
|
||||||
|
#else
|
||||||
mtdec(s->div);
|
mtdec(s->div);
|
||||||
|
#endif
|
||||||
return (0);
|
return (0);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -249,10 +289,7 @@ decr_et_stop(struct eventtimer *et)
|
|||||||
static unsigned
|
static unsigned
|
||||||
decr_get_timecount(struct timecounter *tc)
|
decr_get_timecount(struct timecounter *tc)
|
||||||
{
|
{
|
||||||
register_t tb;
|
return (mftb());
|
||||||
|
|
||||||
__asm __volatile("mftb %0" : "=r"(tb));
|
|
||||||
return (tb);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
Loading…
Reference in New Issue
Block a user