Correct spelling in comments.
Submitted by: brucec
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=221344
@ -39,7 +39,7 @@ __FBSDID("$FreeBSD$");
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*
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*
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* The Broadcom BCM5700 is based on technology originally developed by
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* The Broadcom BCM5700 is based on technology originally developed by
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* Alteon Networks as part of the Tigon I and Tigon II gigabit ethernet
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* Alteon Networks as part of the Tigon I and Tigon II gigabit ethernet
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* MAC chips. The BCM5700, sometimes refered to as the Tigon III, has
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* MAC chips. The BCM5700, sometimes referred to as the Tigon III, has
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* two on-board MIPS R4000 CPUs and can have as much as 16MB of external
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* two on-board MIPS R4000 CPUs and can have as much as 16MB of external
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* SSRAM. The BCM5700 supports TCP, UDP and IP checksum offload, jumbo
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* SSRAM. The BCM5700 supports TCP, UDP and IP checksum offload, jumbo
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* frames, highly configurable RX filtering, and 16 RX and TX queues
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* frames, highly configurable RX filtering, and 16 RX and TX queues
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@ -3419,7 +3419,7 @@ bge_reset(struct bge_softc *sc)
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pci_write_config(dev, sc->bge_pcixcap + PCIXR_COMMAND,
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pci_write_config(dev, sc->bge_pcixcap + PCIXR_COMMAND,
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devctl, 2);
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devctl, 2);
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}
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}
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/* Re-enable MSI, if neccesary, and enable the memory arbiter. */
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/* Re-enable MSI, if necessary, and enable the memory arbiter. */
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if (BGE_IS_5714_FAMILY(sc)) {
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if (BGE_IS_5714_FAMILY(sc)) {
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/* This chip disables MSI on reset. */
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/* This chip disables MSI on reset. */
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if (sc->bge_flags & BGE_FLAG_MSI) {
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if (sc->bge_flags & BGE_FLAG_MSI) {
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