Slight cleanups of the Cyrix 5530 UDMA code.
Also includes a workaround fro an apparent chip bug where UDMA mode 2 can overpower the UDMA engine enough that it will hog the PCI bus to the exclusion of the processor.
This commit is contained in:
julian
parent
c778c9d8cb
commit
248a78cc0d
@ -26,7 +26,7 @@
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: ide_pci.c,v 1.34 1999/05/09 17:06:47 peter Exp $
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* $Id: ide_pci.c,v 1.35 1999/07/03 18:34:04 peter Exp $
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*/
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#include "wd.h"
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@ -189,12 +189,16 @@ extern struct isa_driver wdcdriver;
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/*
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* PRD_ALLOC_SIZE should be something that will not be allocated across a 64k
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* boundary.
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* DMA_PG_SZ is the size of the chunks that each DMA scatter gather element
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* represents. In some systems there can be reasons to make this smaller than
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* a pagesize (usually due to broken hardware).
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* PRD_MAX_SEGS is defined to be the maximum number of segments required for
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* a transfer on an IDE drive, for an xfer that is linear in virtual memory.
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* PRD_BUF_SIZE is the size of the buffer needed for a PRD table.
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*/
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#define PRD_ALLOC_SIZE PAGE_SIZE
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#define PRD_MAX_SEGS ((256 * 512 / PAGE_SIZE) + 1)
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#define DMA_PG_SZ PAGE_SIZE
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#define PRD_MAX_SEGS ((256 * 512 / DMA_PG_SZ) + 1)
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#define PRD_BUF_SIZE PRD_MAX_SEGS * 8
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static void *prdbuf = 0;
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@ -391,7 +395,6 @@ via_571_dmainit(struct ide_pci_cookie *cookie,
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int(*wdcmd)(int, void *),
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void *wdinfo)
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{
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int r;
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u_long pci_revision;
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int unitno;
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@ -426,8 +429,7 @@ via_571_dmainit(struct ide_pci_cookie *cookie,
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/* Set UDMA mode 2 on drive */
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if (bootverbose)
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printf("via_571_dmainit: setting ultra DMA mode 2\n");
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r = wdcmd(WDDMA_UDMA2, wdinfo);
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if (!r) {
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if (!wdcmd(WDDMA_UDMA2, wdinfo)) {
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printf("via_571_dmainit: setting DMA mode failed\n");
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return 0;
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}
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@ -445,8 +447,7 @@ via_571_dmainit(struct ide_pci_cookie *cookie,
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/* Set multiword DMA mode 2 on drive */
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if (bootverbose)
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printf("via_571_dmainit: setting multiword DMA mode 2\n");
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r = wdcmd(WDDMA_MDMA2, wdinfo);
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if (!r) {
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if (!wdcmd(WDDMA_MDMA2, wdinfo)) {
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printf("via_571_dmainit: setting DMA mode failed\n");
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return 0;
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}
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@ -558,13 +559,6 @@ cyrix_5530_status(struct ide_pci_cookie *cookie)
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unitno = ctlr * 2 + unit;
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/* set some values the BIOS should have set */
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printf("Using 0x%x\n", cookie->iobase_bm);
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outl(iobase_bm + (unit * 0x10) + 0x20, 0x00040010);
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outl(iobase_bm + (unit * 0x10) + 0x24, 0x00911030);
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/* if ((ctlr == 0) && (unit == 0)) */ /* XXX */
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/* outb(iobase_bm + (unit * 0x10) + BMISTA_PORT, 0xe6);*/
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PIO_config = inl(iobase_bm + (unit * 0x10) + 0x20);
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DMA_config = inl(iobase_bm + (unit * 0x10) + 0x24);
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@ -586,11 +580,13 @@ cyrix_5530_dmainit(struct ide_pci_cookie *cookie,
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int(*wdcmd)(int, void *),
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void *wdinfo)
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{
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int r;
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u_long pci_revision;
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int unitno;
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int iobase_bm;
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int unit;
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int drivemode;
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int mode;
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int regval;
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/*cookie->unit = 0; */ /* XXX */
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unit = cookie->unit;
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@ -603,8 +599,6 @@ cyrix_5530_dmainit(struct ide_pci_cookie *cookie,
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printf("Setting using 0x%x\n", iobase_bm);
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if ((cookie->ctlr == 0) && (unit == 0)) /* XXX */
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outb(iobase_bm + (unit * 0x10) + BMISTA_PORT, 0xe6);
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outl(iobase_bm + (unit * 0x10) + 0x20, 0x00040010);
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outl(iobase_bm + (unit * 0x10) + 0x24, 0x00911030);
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/* If it's a UDMA drive on a '5530, set it up */
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/*
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* depending on what the drive can do,
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@ -614,20 +608,47 @@ cyrix_5530_dmainit(struct ide_pci_cookie *cookie,
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unitno,
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mwdma_mode(wp), pio_mode(wp),
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pci_revision, udma_mode(wp));
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if (/* pci_revision >= 1 && */ udma_mode(wp) >= 2) {
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/*outl(iobase_bm + 0x20 + (cookie->unit * 16), 0x00100010);*/
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outl(iobase_bm + 0x24 + (cookie->unit * 16), 0x00911030);
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if (/* pci_revision >= 1 && */ udma_mode(wp) >= 0) {
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switch(udma_mode(wp)) {
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case 0:
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mode = 0;
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drivemode = WDDMA_UDMA0;
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regval = 0x00921250;
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break;
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default: /* newer modes not supported */
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case 2:
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#if 0
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/*
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* XXX The 5530 can do mode 2 but if you do use it, it will block all
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* access to the PCI bus (and thus the ISA bus, PICs, PIT, etc. etc.) until the
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* transfer is complete. Mode 2 swamps the 5530 so much it can't really cope
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* with any other operations. Therefore, use mode 1 for drives that can
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* do mode 2 (or more). (FALL THROUGH)
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*/
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mode = 2;
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drivemode = WDDMA_UDMA2;
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regval = 0x00911030;
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break;
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#endif
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case 1:
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mode = 1;
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drivemode = WDDMA_UDMA1;
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regval = 0x00911140;
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break;
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}
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/*
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* With the Cx5530, drive configuration should come *after* the
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* controller configuration, to make sure the controller sees
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* With the Cx5530, drive configuration
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* should come *after* the controller configuration,
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* to make sure the controller sees
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* the command and does the right thing.
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*/
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/* Set UDMA mode 2 on drive */
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/* Set UDMA mode on drive */
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if (bootverbose)
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printf("cyrix_5530_dmainit: setting ultra DMA mode 2\n");
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r = wdcmd(WDDMA_UDMA2, wdinfo);
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if (!r) {
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printf("cyrix_5530_dmainit: set UDMA mode %d\n", mode);
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outl(iobase_bm+0x24 + (unit * 16), regval);
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if (!wdcmd(drivemode, wdinfo)) {
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printf("cyrix_5530_dmainit: setting DMA mode failed\n");
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return 0;
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}
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@ -639,21 +660,39 @@ cyrix_5530_dmainit(struct ide_pci_cookie *cookie,
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}
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/* otherwise, try and program it for MW DMA mode 2 */
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else if (mwdma_mode(wp) >= 2 && pio_mode(wp) >= 4) {
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else if (mwdma_mode(wp) >= 0 && pio_mode(wp) >= 4) {
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switch(mwdma_mode(wp)) {
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case 0:
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mode = 0;
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drivemode = WDDMA_MDMA0;
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regval = 0x00017771;
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break;
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case 1:
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mode = 1;
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drivemode = WDDMA_MDMA1;
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regval = 0x00012121;
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break;
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default: /* newer modes not supported */
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case 2:
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mode = 2;
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drivemode = WDDMA_MDMA2;
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regval = 0x00002020;
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break;
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}
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/* Set multiword DMA mode 2 on drive */
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if (bootverbose)
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printf("cyrix_5530_dmainit: setting multiword DMA mode 2\n");
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r = wdcmd(WDDMA_MDMA2, wdinfo);
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if (!r) {
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printf("cyrix_5530_dmainit: multiword DMA mode %d\n",
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mode);
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if (!wdcmd(drivemode, wdinfo)) {
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printf("cyrix_5530_dmainit: setting DMA mode failed\n");
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return 0;
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}
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/* Configure the controller appropriately for MWDMA mode 2 */
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/* Configure the controller appropriately for MWDMA mode */
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/*outl(iobase_bm + 0x20 + (cookie->unit * 16), 0x00100010);*/
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outl(iobase_bm + 0x24 + (cookie->unit * 16), 0x00002020);
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outl(iobase_bm + 0x24 + (unit * 16), regval);
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if (bootverbose)
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cyrix_5530_status(cookie);
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@ -661,6 +700,40 @@ cyrix_5530_dmainit(struct ide_pci_cookie *cookie,
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return 1;
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}
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/*
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* Always set the PIO mode values.
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*/
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switch(pio_mode(wp)) {
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case 0:
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mode = 0;
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drivemode = WDDMA_MDMA0;
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regval = 0x0000E132;
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break;
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case 1:
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mode = 1;
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drivemode = WDDMA_MDMA1;
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regval = 0x00001812;
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break;
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case 2:
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mode = 2;
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drivemode = WDDMA_MDMA1;
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regval = 0x00024020;
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break;
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case 3:
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mode = 3;
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drivemode = WDDMA_MDMA1;
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regval = 0x00032010;
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break;
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default: /* newer modes not supported */
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case 4:
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mode = 4;
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drivemode = WDDMA_MDMA2;
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regval = 0x00040010;
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break;
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}
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outl(iobase_bm + 0x20 + (unit * 16), regval);
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printf("cyrix_5530_dmainit: setting PIO mode %d\n", mode);
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return 0;
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}
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@ -867,7 +940,6 @@ intel_piix_dmainit(struct ide_pci_cookie *cookie,
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int(*wdcmd)(int, void *),
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void *wdinfo)
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{
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int r;
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/* If it's a UDMA drive and a PIIX4, set it up */
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if (cookie->type == 0x71118086 && udma_mode(wp) >= 2) {
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@ -877,9 +949,7 @@ intel_piix_dmainit(struct ide_pci_cookie *cookie,
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if (bootverbose)
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printf("intel_piix_dmainit: setting ultra DMA mode 2\n");
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r = wdcmd(WDDMA_UDMA2, wdinfo);
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if (!r) {
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if (!wdcmd(WDDMA_UDMA2, wdinfo)) {
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printf("intel_piix_dmainit: setting DMA mode failed\n");
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return 0;
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}
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@ -924,8 +994,7 @@ intel_piix_dmainit(struct ide_pci_cookie *cookie,
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/* Set multiword DMA mode 2 on drive */
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if (bootverbose)
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printf("intel_piix_dmainit: setting multiword DMA mode 2\n");
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r = wdcmd(WDDMA_MDMA2, wdinfo);
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if (!r) {
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if (!wdcmd(WDDMA_MDMA2, wdinfo)) {
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printf("intel_piix_dmainit: setting DMA mode failed\n");
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return 0;
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}
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@ -976,9 +1045,7 @@ intel_piix_dmainit(struct ide_pci_cookie *cookie,
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if (bootverbose)
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printf("intel_piix_dmainit: setting multiword DMA mode 2\n");
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r = wdcmd(WDDMA_MDMA2, wdinfo);
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if (!r) {
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if (!wdcmd(WDDMA_MDMA2, wdinfo)) {
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printf("intel_piix_dmainit: setting DMA mode failed\n");
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return 0;
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}
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@ -1754,9 +1821,6 @@ ide_pci_dmasetup(void *xcp, char *vaddr, u_long vcount, int dir)
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u_long nbase, ncount, nend;
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int iobase_bm;
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u_long count;
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#ifdef DIAGNOSTIC
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u_long checkcount;
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#endif
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prd = cp->prd;
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@ -1774,7 +1838,7 @@ ide_pci_dmasetup(void *xcp, char *vaddr, u_long vcount, int dir)
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/* Generate first PRD entry, which may be non-aligned. */
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firstpage = PAGE_SIZE - ((uintptr_t)vaddr & PAGE_MASK);
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firstpage = DMA_PG_SZ - ((uintptr_t)vaddr & DMA_PG_SZ);
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prd_base = vtophys(vaddr);
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prd_count = MIN(count, firstpage);
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@ -1782,32 +1846,17 @@ ide_pci_dmasetup(void *xcp, char *vaddr, u_long vcount, int dir)
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vaddr += prd_count;
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count -= prd_count;
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/* Step through virtual pages, coalescing as needed. */
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/*
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* Step through virtual pages.
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* Note that it is not worth trying to coalesce pages that are
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* next to each other physically, and some DMA engines (e.g.
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* Cyrix Cx5530) actually blow up if you do.
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*/
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while (count) {
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nbase = vtophys(vaddr);
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ncount = MIN(count, PAGE_SIZE);
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ncount = MIN(count, DMA_PG_SZ);
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nend = nbase + ncount;
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/*
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* Coalesce if physically contiguous and not crossing
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* 64k boundary.
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*/
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#if 0
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/*
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* Aggregation is NOT an optimisation worth doing,
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* and the Cyrix UDMA controller screws itself
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* in some aggregated situations.
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* We might as well just assign each 4K page a DMA entry
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* as this doesn't really gain us anything to aggregate them.
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* This was basically copied from my agregation code in the aha
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* driver, but I doubt it helped much there either. [JRE]
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*/
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if ((prd_base + prd_count == nbase) &&
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((((nend - 1) ^ prd_base) & ~0xffff) == 0)) {
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prd_count += ncount;
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} else
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#endif
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{
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prd[i].prd_base = prd_base;
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prd[i].prd_count = (prd_count & 0xffff);
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i++;
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@ -1817,7 +1866,6 @@ ide_pci_dmasetup(void *xcp, char *vaddr, u_long vcount, int dir)
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}
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prd_base = nbase;
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prd_count = ncount;
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}
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vaddr += ncount;
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count -= ncount;
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}
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@ -1826,29 +1874,6 @@ ide_pci_dmasetup(void *xcp, char *vaddr, u_long vcount, int dir)
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prd[i].prd_base = prd_base;
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prd[i].prd_count = (prd_count & 0xffff) | PRD_EOT_BIT;
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#ifdef DIAGNOSTIC
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/* sanity check the transfer for length and page-alignment, at least */
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checkcount = 0;
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for (i = 0;; i++) {
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unsigned int modcount;
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modcount = prd[i].prd_count & 0xffffe;
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if (modcount == 0) modcount = 0x10000;
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checkcount += modcount;
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if (i != 0 && ((prd[i].prd_base & PAGE_MASK) != 0)) {
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printf("ide_pci: dmasetup() diagnostic fails-- unaligned page\n");
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return 1;
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}
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if (prd[i].prd_count & PRD_EOT_BIT)
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break;
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}
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if (checkcount != vcount) {
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printf("ide_pci: dmasetup() diagnostic fails-- bad length\n");
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return 1;
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}
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#endif
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/* Set up PRD base register */
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outl(iobase_bm + BMIDTP_PORT, vtophys(prd));
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