Don't simulate PBA access if the PBA is in a separate BAR.
bhyve has to virtualize the MSI-X table to trap reads and writes to that table and map those to virtual interrupts that it maps real host interrupts on to. For the pending-bit-array (PBA), bhyve passes accesses from the guest directly to the hardware. bhyve's virtualization of the MSI-X table is done by intercepting all reads and writes to the BAR holding the MSI-X table. However, if the PBA is stored in the same BAR as the MSI-X table, accesses to the PBA portion of this BAR have to be forwarded to the real BAR. However, in the case that the PBA was stored in a separate BAR and it's offset in that separate BAR overlapped with the portion of the MSI-X table BAR that the table used, the handlers for the table BAR would incorrectly think that some accesses were PBA reads and writes. This caused a crash in bhyve when it indirected a NULL pointer. Fix this case by never trying to handle PBA access if the PBA lives in a separate BAR. Reported by: gallatin Tested by: gallatin Reviewed by: markj, Patrick Mooney MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D20523
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=348694
@ -295,7 +295,7 @@ msix_table_read(struct passthru_softc *sc, uint64_t offset, int size)
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int index;
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int index;
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pi = sc->psc_pi;
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pi = sc->psc_pi;
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if (offset >= pi->pi_msix.pba_offset &&
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if (pi->pi_msix.pba_page != NULL && offset >= pi->pi_msix.pba_offset &&
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offset < pi->pi_msix.pba_offset + pi->pi_msix.pba_size) {
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offset < pi->pi_msix.pba_offset + pi->pi_msix.pba_size) {
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switch(size) {
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switch(size) {
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case 1:
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case 1:
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@ -374,7 +374,7 @@ msix_table_write(struct vmctx *ctx, int vcpu, struct passthru_softc *sc,
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int index;
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int index;
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pi = sc->psc_pi;
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pi = sc->psc_pi;
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if (offset >= pi->pi_msix.pba_offset &&
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if (pi->pi_msix.pba_page != NULL && offset >= pi->pi_msix.pba_offset &&
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offset < pi->pi_msix.pba_offset + pi->pi_msix.pba_size) {
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offset < pi->pi_msix.pba_offset + pi->pi_msix.pba_size) {
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switch(size) {
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switch(size) {
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case 1:
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case 1:
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