Make llvm-tblgen and clang-tblgen build.

svn path=/projects/clang700-import/; revision=336989

lib/clang/libllvmminimal/Makefile

@@ -22,6 +22,7 @@ SRCS+=		Support/FormattedStream.cpp
 SRCS+=		Support/Hashing.cpp
 SRCS+=		Support/Host.cpp
 SRCS+=		Support/IntEqClasses.cpp
+SRCS+=		Support/JSON.cpp
 SRCS+=		Support/Locale.cpp
 SRCS+=		Support/LowLevelType.cpp
 SRCS+=		Support/MD5.cpp
@@ -50,6 +51,7 @@ SRCS+=		Support/ToolOutputFile.cpp
 SRCS+=		Support/Triple.cpp
 SRCS+=		Support/Twine.cpp
 SRCS+=		Support/Unicode.cpp
+SRCS+=		Support/WithColor.cpp
 SRCS+=		Support/circular_raw_ostream.cpp
 SRCS+=		Support/raw_ostream.cpp
 SRCS+=		Support/regcomp.c
@@ -58,6 +60,7 @@ SRCS+=		Support/regexec.c
 SRCS+=		Support/regfree.c
 SRCS+=		Support/regstrlcpy.c
 SRCS+=		TableGen/Error.cpp
+SRCS+=		TableGen/JSONBackend.cpp
 SRCS+=		TableGen/Main.cpp
 SRCS+=		TableGen/Record.cpp
 SRCS+=		TableGen/SetTheory.cpp

usr.bin/clang/llvm-tblgen/Makefile

@@ -32,7 +32,9 @@ SRCS+=		InstrDocsEmitter.cpp
 SRCS+=		InstrInfoEmitter.cpp
 SRCS+=		IntrinsicEmitter.cpp
 SRCS+=		OptParserEmitter.cpp
+SRCS+=		PredicateExpander.cpp
 SRCS+=		PseudoLoweringEmitter.cpp
+SRCS+=		RISCVCompressInstEmitter.cpp
 SRCS+=		RegisterBankEmitter.cpp
 SRCS+=		RegisterInfoEmitter.cpp
 SRCS+=		SDNodeProperties.cpp
@@ -41,6 +43,7 @@ SRCS+=		SubtargetEmitter.cpp
 SRCS+=		SubtargetFeatureInfo.cpp
 SRCS+=		TableGen.cpp
 SRCS+=		Types.cpp
+SRCS+=		WebAssemblyDisassemblerEmitter.cpp
 SRCS+=		X86DisassemblerTables.cpp
 SRCS+=		X86EVEX2VEXTablesEmitter.cpp
 SRCS+=		X86FoldTablesEmitter.cpp