From 264017312035762853de9fc469ab76e42ab5e87f Mon Sep 17 00:00:00 2001 From: Konstantin Belousov Date: Fri, 5 Dec 2008 21:17:54 +0000 Subject: [PATCH] Unconditionally use locked addition of zero to tip of the stack for memory barriers on i386. It works as a serialization instruction on all IA32 CPUs. Alternative solution of using {s,l,}fence requires run-time checking of the presense of the corresponding SSE or SSE2 extensions, and possible boot-time patching of the kernel text. Suggested by: many --- sys/i386/include/atomic.h | 17 +++-------------- 1 file changed, 3 insertions(+), 14 deletions(-) diff --git a/sys/i386/include/atomic.h b/sys/i386/include/atomic.h index f6bcf0c1650b..e800d0ee6b85 100644 --- a/sys/i386/include/atomic.h +++ b/sys/i386/include/atomic.h @@ -32,20 +32,9 @@ #error this file needs sys/cdefs.h as a prerequisite #endif - -#if defined(I686_CPU) -#define mb() __asm__ __volatile__ ("mfence;": : :"memory") -#define wmb() __asm__ __volatile__ ("sfence;": : :"memory") -#define rmb() __asm__ __volatile__ ("lfence;": : :"memory") -#else -/* - * do we need a serializing instruction? - */ -#define mb() -#define wmb() -#define rmb() -#endif - +#define mb() __asm __volatile("lock;addl $0,(%esp)") +#define wmb() __asm __volatile("lock;addl $0,(%esp)") +#define rmb() __asm __volatile("lock;addl $0,(%esp)") /* * Various simple operations on memory, each of which is atomic in the