[atheros] teach these two boards about the new hints location as well.

This commit is contained in:
Adrian Chadd 2018-02-01 22:00:38 +00:00
parent 118c9d516e
commit 2786bc9951
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=328756
2 changed files with 11 additions and 18 deletions

View File

@ -106,22 +106,12 @@ hint.arge.1.pll_1000=0x03000101
# MAC for arge1 is the second 6 bytes of the ART
hint.arge.1.eeprommac=0x1fff0006
# ath0: Where the ART is - last 64k in the flash
hint.ath.0.eepromaddr=0x1fff0000
hint.ath.0.eepromsize=16384
# Where the ART is - last 64k in the first 8MB of flash
hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000
hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384
# ath1: it's different; it's a PCIe attached device, so
# we instead need to teach the PCIe bridge code about it
# (ie, the 'early pci fixup' stuff that programs the PCIe
# host registers on the NIC) and then we teach ath where
# to find it.
# ath1 hint - pcie slot 0
# hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff4000
# hint.pcib.0.bus.0.0.0.ath_fixup_size=16384
# ath0 - eeprom comes from here
# hint.ath.1.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware"
# And now tell the ath(4) driver where to look!
hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware"
# flash layout:
#

View File

@ -24,9 +24,12 @@ hint.arge.1.phymask=0x0 # No directly mapped PHYs
hint.arge.1.media=1000
hint.arge.1.fduplex=1
# ath0: Where the ART is - last 64k in the flash
hint.ath.0.eepromaddr=0x1fff0000
hint.ath.0.eepromsize=16384
# Where the ART is - last 64k in the first 8MB of flash
hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000
hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384
# And now tell the ath(4) driver where to look!
hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware"
# The AP121 4MB flash layout:
#