arm64: Shave off two instructions in exceptions
This patch shaves off up to two three instructions in save_registers_head in exception.S for arm64, which would make more space for instructions that could be added in CheriBSD. This is done by: 1. Combining pointer arithmetic with pre-incrementing STP instructions 2. Removing the instruction that sets the frame pointer (x29) as its content is unused Differential Revision: https://reviews.freebsd.org/D34631
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@ -41,35 +41,34 @@ __FBSDID("$FreeBSD$");
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.macro save_registers_head el
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.macro save_registers_head el
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.if \el == 1
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.if \el == 1
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mov x18, sp
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mov x18, sp
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sub sp, sp, #128
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stp x0, x1, [sp, #(TF_X - TF_SIZE - 128)]!
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.else
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stp x0, x1, [sp, #(TF_X - TF_SIZE)]!
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.endif
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.endif
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sub sp, sp, #(TF_SIZE)
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stp x2, x3, [sp, #(2 * 8)]
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stp x28, x29, [sp, #(TF_X + 28 * 8)]
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stp x4, x5, [sp, #(4 * 8)]
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stp x26, x27, [sp, #(TF_X + 26 * 8)]
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stp x6, x7, [sp, #(6 * 8)]
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stp x24, x25, [sp, #(TF_X + 24 * 8)]
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stp x8, x9, [sp, #(8 * 8)]
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stp x22, x23, [sp, #(TF_X + 22 * 8)]
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stp x10, x11, [sp, #(10 * 8)]
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stp x20, x21, [sp, #(TF_X + 20 * 8)]
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stp x12, x13, [sp, #(12 * 8)]
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stp x18, x19, [sp, #(TF_X + 18 * 8)]
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stp x14, x15, [sp, #(14 * 8)]
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stp x16, x17, [sp, #(TF_X + 16 * 8)]
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stp x16, x17, [sp, #(16 * 8)]
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stp x14, x15, [sp, #(TF_X + 14 * 8)]
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stp x18, x19, [sp, #(18 * 8)]
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stp x12, x13, [sp, #(TF_X + 12 * 8)]
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stp x20, x21, [sp, #(20 * 8)]
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stp x10, x11, [sp, #(TF_X + 10 * 8)]
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stp x22, x23, [sp, #(22 * 8)]
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stp x8, x9, [sp, #(TF_X + 8 * 8)]
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stp x24, x25, [sp, #(24 * 8)]
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stp x6, x7, [sp, #(TF_X + 6 * 8)]
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stp x26, x27, [sp, #(26 * 8)]
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stp x4, x5, [sp, #(TF_X + 4 * 8)]
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stp x28, x29, [sp, #(28 * 8)]
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stp x2, x3, [sp, #(TF_X + 2 * 8)]
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stp x0, x1, [sp, #(TF_X + 0 * 8)]
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mrs x10, elr_el1
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mrs x11, spsr_el1
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mrs x12, esr_el1
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.if \el == 0
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.if \el == 0
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mrs x18, sp_el0
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mrs x18, sp_el0
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.endif
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.endif
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mrs x10, elr_el1
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mrs x11, spsr_el1
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mrs x12, esr_el1
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stp x18, lr, [sp, #(TF_SP - TF_X)]!
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str x10, [sp, #(TF_ELR)]
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str x10, [sp, #(TF_ELR)]
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stp w11, w12, [sp, #(TF_SPSR)]
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stp w11, w12, [sp, #(TF_SPSR)]
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stp x18, lr, [sp, #(TF_SP)]
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mrs x18, tpidr_el1
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mrs x18, tpidr_el1
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add x29, sp, #(TF_SIZE)
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.endm
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.endm
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.macro save_registers el
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.macro save_registers el
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