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Fill in some gaps in the cpuid features list..

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bit 10 is the old bit for MTRR (presumably this changed, an older P5 I
have has got it, the newer cpus have the new MTRR bit set)
bit 11 is SEP (fast syscalls),  bit 23 is MMX
Fill in the other reserved ones with a stub so that we can see them if
they turn up.

Obtained from: Intel AP-485 rev.06
This commit is contained in:
Peter Wemm 1997-06-02 18:55:44 +00:00
parent d778c2c01b
commit 2895de58f2
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=26388
2 changed files with 38 additions and 6 deletions
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22
sys/amd64/amd64/identcpu.c
View File

@ -36,7 +36,7 @@
* SUCH DAMAGE.
*
* from: Id: machdep.c,v 1.193 1996/06/18 01:22:04 bde Exp
* $Id: identcpu.c,v 1.22 1997/05/31 08:45:23 kato Exp $
* $Id: identcpu.c,v 1.23 1997/06/02 08:19:02 dfr Exp $
*/
#include "opt_cpu.h"
@ -387,12 +387,28 @@ printcpuinfo(void)
"\010MCE"
"\011CX8"
"\012APIC"
"\013<b10>"
"\014<b11>"
"\013oldMTRR"
"\014SEP"
"\015MTRR"
"\016PGE"
"\017MCA"
"\020CMOV"
"\021<b16>"
"\022<b17>"
"\023<b18>"
"\024<b19>"
"\025<b20>"
"\026<b21>"
"\027<b22>"
"\030MMX"
"\031<b24>"
"\032<b25>"
"\033<b26>"
"\034<b27>"
"\035<b28>"
"\036<b29>"
"\037<b30>"
"\040<b31>"
);
}
} else if (strcmp(cpu_vendor, "CyrixInstead") == 0) {

22
sys/i386/i386/identcpu.c
View File

@ -36,7 +36,7 @@
* SUCH DAMAGE.
*
* from: Id: machdep.c,v 1.193 1996/06/18 01:22:04 bde Exp
* $Id: identcpu.c,v 1.22 1997/05/31 08:45:23 kato Exp $
* $Id: identcpu.c,v 1.23 1997/06/02 08:19:02 dfr Exp $
*/
#include "opt_cpu.h"
@ -387,12 +387,28 @@ printcpuinfo(void)
"\010MCE"
"\011CX8"
"\012APIC"
"\013<b10>"
"\014<b11>"
"\013oldMTRR"
"\014SEP"
"\015MTRR"
"\016PGE"
"\017MCA"
"\020CMOV"
"\021<b16>"
"\022<b17>"
"\023<b18>"
"\024<b19>"
"\025<b20>"
"\026<b21>"
"\027<b22>"
"\030MMX"
"\031<b24>"
"\032<b25>"
"\033<b26>"
"\034<b27>"
"\035<b28>"
"\036<b29>"
"\037<b30>"
"\040<b31>"
);
}
} else if (strcmp(cpu_vendor, "CyrixInstead") == 0) {