From 298c3e8d6b6405cbea13a7a1a1fbc1ad5a45c378 Mon Sep 17 00:00:00 2001 From: Dimitry Andric Date: Sun, 27 Feb 2022 13:53:19 +0100 Subject: [PATCH] Apply lld fixes for internal errors building perl on 32-bit PowerPC Merge commit f457863ae345 from llvm git (by Fangrui Song): [ELF] Support REL-format R_AARCH64_NONE relocation -fprofile-use=/-fprofile-sample-use= compiles may produce REL-format .rel.llvm.call-graph-profile even if the prevailing format is RELA on AArch64. Add R_AARCH64_NONE to getImplicitAddend to fix this linker error: ``` ld.lld: error: internal linker error: cannot read addend for relocation R_AARCH64_NONE PLEASE submit a bug report to https://crbug.com and run tools/clang/scripts/process_crashreports.py (only works inside Google) which will upload a report and include the crash backtrace. ``` Merge commit 53fc5d9b9a01 from llvm git (by Fangrui Song): [ELF] Support R_PPC_NONE/R_PPC64_NONE in getImplicitAddend Similar to f457863ae345d2635026501f5383e0e625869639 Merge commit 767e64fc11d7 from llvm git (by Fangrui Song): [ELF] Support some absolute/PC-relative relocation types for REL format ctfconvert seems to use REL-format `.rel.SUNW_dof` for 32-bit architectures. ``` Binary file usr/ports/lang/perl5.32/work/perl-5.32.1/dtrace_mini.o matches [alfredo.junior@dell-a ~/tmp/llvm-bug]$ readelf -r dtrace_mini.o Relocation section (.rel.SUNW_dof): r_offset r_info r_type st_value st_name 00000184 0000281a R_PPC_REL32 00000000 $dtrace1772974259.Perl_dtrace_probe_load ``` Support R_PPC_REL32 to fix `ld.lld: error: drti.c:(.SUNW_dof+0x4E4): internal linker error: cannot read addend for relocation R_PPC_REL32`. While here, add some common relocation types for AArch64, PPC, and PPC64. We perform minimum tests. Reviewed By: adalava, arichardson Differential Revision: https://reviews.llvm.org/D120535 Requested by: alfredo MFC after: 3 days --- contrib/llvm-project/lld/ELF/Arch/AArch64.cpp | 7 +++++++ contrib/llvm-project/lld/ELF/Arch/PPC.cpp | 15 +++++++++++++++ contrib/llvm-project/lld/ELF/Arch/PPC64.cpp | 17 +++++++++++++++++ 3 files changed, 39 insertions(+) diff --git a/contrib/llvm-project/lld/ELF/Arch/AArch64.cpp b/contrib/llvm-project/lld/ELF/Arch/AArch64.cpp index c1ab0e97efe2..0d03617ecf76 100644 --- a/contrib/llvm-project/lld/ELF/Arch/AArch64.cpp +++ b/contrib/llvm-project/lld/ELF/Arch/AArch64.cpp @@ -199,6 +199,13 @@ int64_t AArch64::getImplicitAddend(const uint8_t *buf, RelType type) const { switch (type) { case R_AARCH64_TLSDESC: return read64(buf + 8); + case R_AARCH64_NONE: + return 0; + case R_AARCH64_PREL32: + return SignExtend64<32>(read32(buf)); + case R_AARCH64_ABS64: + case R_AARCH64_PREL64: + return read64(buf); default: internalLinkerError(getErrorLocation(buf), "cannot read addend for relocation " + toString(type)); diff --git a/contrib/llvm-project/lld/ELF/Arch/PPC.cpp b/contrib/llvm-project/lld/ELF/Arch/PPC.cpp index aaecef6ee94f..583cb3afda4c 100644 --- a/contrib/llvm-project/lld/ELF/Arch/PPC.cpp +++ b/contrib/llvm-project/lld/ELF/Arch/PPC.cpp @@ -27,6 +27,7 @@ class PPC final : public TargetInfo { RelExpr getRelExpr(RelType type, const Symbol &s, const uint8_t *loc) const override; RelType getDynRel(RelType type) const override; + int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override; void writeGotHeader(uint8_t *buf) const override; void writePltHeader(uint8_t *buf) const override { llvm_unreachable("should call writePPC32GlinkSection() instead"); @@ -274,6 +275,20 @@ RelType PPC::getDynRel(RelType type) const { return R_PPC_NONE; } +int64_t PPC::getImplicitAddend(const uint8_t *buf, RelType type) const { + switch (type) { + case R_PPC_NONE: + return 0; + case R_PPC_ADDR32: + case R_PPC_REL32: + return SignExtend64<32>(read32(buf)); + default: + internalLinkerError(getErrorLocation(buf), + "cannot read addend for relocation " + toString(type)); + return 0; + } +} + static std::pair fromDTPREL(RelType type, uint64_t val) { uint64_t dtpBiasedVal = val - 0x8000; switch (type) { diff --git a/contrib/llvm-project/lld/ELF/Arch/PPC64.cpp b/contrib/llvm-project/lld/ELF/Arch/PPC64.cpp index a0c2d1617caa..cd626acb8c60 100644 --- a/contrib/llvm-project/lld/ELF/Arch/PPC64.cpp +++ b/contrib/llvm-project/lld/ELF/Arch/PPC64.cpp @@ -369,6 +369,7 @@ class PPC64 final : public TargetInfo { RelExpr getRelExpr(RelType type, const Symbol &s, const uint8_t *loc) const override; RelType getDynRel(RelType type) const override; + int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override; void writePltHeader(uint8_t *buf) const override; void writePlt(uint8_t *buf, const Symbol &sym, uint64_t pltEntryAddr) const override; @@ -1067,6 +1068,22 @@ RelType PPC64::getDynRel(RelType type) const { return R_PPC64_NONE; } +int64_t PPC64::getImplicitAddend(const uint8_t *buf, RelType type) const { + switch (type) { + case R_PPC64_NONE: + return 0; + case R_PPC64_REL32: + return SignExtend64<32>(read32(buf)); + case R_PPC64_ADDR64: + case R_PPC64_REL64: + return read64(buf); + default: + internalLinkerError(getErrorLocation(buf), + "cannot read addend for relocation " + toString(type)); + return 0; + } +} + void PPC64::writeGotHeader(uint8_t *buf) const { write64(buf, getPPC64TocBase()); }