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Add back in CPU detection copde from 1.1.5. As an added bonus, the

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hw.model MIB variable is now declared correctly.
This commit is contained in:
Garrett Wollman 1994-08-10 03:51:18 +00:00
parent 28b5c68f2f
commit 29c0a86011
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=1998
7 changed files with 227 additions and 76 deletions
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83
sys/amd64/amd64/locore.S
View File

@ -34,7 +34,7 @@
* SUCH DAMAGE.
*
* from: @(#)locore.s 7.3 (Berkeley) 5/13/91
* $Id: locore.s,v 1.15 1994/02/01 04:08:54 davidg Exp $
* $Id: locore.s,v 1.18 1994/06/06 14:12:48 davidg Exp $
*/
/*
@ -101,8 +101,10 @@ _esym: .long 0 /* ptr to end of syms */
.globl _boothowto,_bootdev,_curpcb
.globl _cpu,_cold,_atdevbase
.globl _cpu,_cold,_atdevbase,_cpu_vendor,_cpu_id
_cpu: .long 0 /* are we 386, 386sx, or 486 */
_cpu_id: .long 0 /* stepping ID */
_cpu_vendor: .space 17 /* CPU origin code */
_cold: .long 1 /* cold till we are not */
_atdevbase: .long 0 /* location of start of iomem in virtual */
_atdevphys: .long 0 /* location of device mapping ptes (phys) */
@ -168,26 +170,67 @@ NON_GPROF_ENTRY(btext)
movsb
#endif
/* find out our CPU type. */
pushfl
popl %eax
movl %eax,%ecx
xorl $0x40000,%eax
pushl %eax
popfl
pushfl
popl %eax
xorl %ecx,%eax
shrl $18,%eax
andl $1,%eax
push %ecx
popfl
/* Find out our CPU type. */
cmpl $0,%eax
jne 1f
movl $CPU_386,_cpu-KERNBASE
/* Try to toggle alignment check flag; does not exist on 386. */
pushfl
popl %eax
movl %eax,%ecx
orl $PSL_AC,%eax
pushl %eax
popfl
pushfl
popl %eax
xorl %ecx,%eax
andl $PSL_AC,%eax
pushl %ecx
popfl
testl %eax,%eax
jnz 1f
movl $CPU_386,_cpu-KERNBASE
jmp 2f
1: movl $CPU_486,_cpu-KERNBASE
1: /* Try to toggle identification flag; does not exist on early 486s. */
pushfl
popl %eax
movl %eax,%ecx
xorl $PSL_ID,%eax
pushl %eax
popfl
pushfl
popl %eax
xorl %ecx,%eax
andl $PSL_ID,%eax
pushl %ecx
popfl
testl %eax,%eax
jnz 1f
movl $CPU_486,_cpu-KERNBASE
jmp 2f
1: /* Use the `cpuid' instruction. */
xorl %eax,%eax
.byte 0x0f,0xa2 # cpuid 0
movl %ebx,_cpu_vendor-KERNBASE # store vendor string
movl %edx,_cpu_vendor+4-KERNBASE
movl %ecx,_cpu_vendor+8-KERNBASE
movb $0,_cpu_vendor+12-KERNBASE
movl $1,%eax
.byte 0x0f,0xa2 # cpuid 1
movl %eax,_cpu_id-KERNBASE # store cpu_id
rorl $8,%eax # extract family type
andl $15,%eax
cmpl $5,%eax
jae 1f
/* less than Pentium; must be 486 */
movl $CPU_486,_cpu-KERNBASE
jmp 2f
1: movl $CPU_586,_cpu-KERNBASE
2:
/*

83
sys/amd64/amd64/locore.s
View File

@ -34,7 +34,7 @@
* SUCH DAMAGE.
*
* from: @(#)locore.s 7.3 (Berkeley) 5/13/91
* $Id: locore.s,v 1.15 1994/02/01 04:08:54 davidg Exp $
* $Id: locore.s,v 1.18 1994/06/06 14:12:48 davidg Exp $
*/
/*
@ -101,8 +101,10 @@ _esym: .long 0 /* ptr to end of syms */
.globl _boothowto,_bootdev,_curpcb
.globl _cpu,_cold,_atdevbase
.globl _cpu,_cold,_atdevbase,_cpu_vendor,_cpu_id
_cpu: .long 0 /* are we 386, 386sx, or 486 */
_cpu_id: .long 0 /* stepping ID */
_cpu_vendor: .space 17 /* CPU origin code */
_cold: .long 1 /* cold till we are not */
_atdevbase: .long 0 /* location of start of iomem in virtual */
_atdevphys: .long 0 /* location of device mapping ptes (phys) */
@ -168,26 +170,67 @@ NON_GPROF_ENTRY(btext)
movsb
#endif
/* find out our CPU type. */
pushfl
popl %eax
movl %eax,%ecx
xorl $0x40000,%eax
pushl %eax
popfl
pushfl
popl %eax
xorl %ecx,%eax
shrl $18,%eax
andl $1,%eax
push %ecx
popfl
/* Find out our CPU type. */
cmpl $0,%eax
jne 1f
movl $CPU_386,_cpu-KERNBASE
/* Try to toggle alignment check flag; does not exist on 386. */
pushfl
popl %eax
movl %eax,%ecx
orl $PSL_AC,%eax
pushl %eax
popfl
pushfl
popl %eax
xorl %ecx,%eax
andl $PSL_AC,%eax
pushl %ecx
popfl
testl %eax,%eax
jnz 1f
movl $CPU_386,_cpu-KERNBASE
jmp 2f
1: movl $CPU_486,_cpu-KERNBASE
1: /* Try to toggle identification flag; does not exist on early 486s. */
pushfl
popl %eax
movl %eax,%ecx
xorl $PSL_ID,%eax
pushl %eax
popfl
pushfl
popl %eax
xorl %ecx,%eax
andl $PSL_ID,%eax
pushl %ecx
popfl
testl %eax,%eax
jnz 1f
movl $CPU_486,_cpu-KERNBASE
jmp 2f
1: /* Use the `cpuid' instruction. */
xorl %eax,%eax
.byte 0x0f,0xa2 # cpuid 0
movl %ebx,_cpu_vendor-KERNBASE # store vendor string
movl %edx,_cpu_vendor+4-KERNBASE
movl %ecx,_cpu_vendor+8-KERNBASE
movb $0,_cpu_vendor+12-KERNBASE
movl $1,%eax
.byte 0x0f,0xa2 # cpuid 1
movl %eax,_cpu_id-KERNBASE # store cpu_id
rorl $8,%eax # extract family type
andl $15,%eax
cmpl $5,%eax
jae 1f
/* less than Pentium; must be 486 */
movl $CPU_486,_cpu-KERNBASE
jmp 2f
1: movl $CPU_586,_cpu-KERNBASE
2:
/*

21
sys/amd64/amd64/machdep.c
View File

@ -35,7 +35,7 @@
* SUCH DAMAGE.
*
* from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
* $Id: machdep.c,v 1.46 1994/08/04 06:10:27 davidg Exp $
* $Id: machdep.c,v 1.47 1994/08/06 09:15:14 davidg Exp $
*/
#include "npx.h"
@ -96,8 +96,8 @@ static void initcpu(void);
static int test_page(int *, int);
extern int grow(struct proc *,u_int);
const char machine[] = "PC-Class";
const char *cpu_model;
char machine[] = "PC-Class";
char cpu_model[sizeof("Pentium") + 1];
#ifndef PANIC_REBOOT_WAIT_TIME
#define PANIC_REBOOT_WAIT_TIME 15 /* default to 15 seconds */
@ -351,17 +351,20 @@ struct cpu_nameclass i386_cpus[] = {
{ "i386DX", CPUCLASS_386 }, /* CPU_386 */
{ "i486SX", CPUCLASS_486 }, /* CPU_486SX */
{ "i486DX", CPUCLASS_486 }, /* CPU_486 */
{ "i586", CPUCLASS_586 }, /* CPU_586 */
{ "Pentium", CPUCLASS_586 }, /* CPU_586 */
};
static void
identifycpu()
{
extern u_long cpu_id;
extern char cpu_vendor[];
printf("CPU: ");
if (cpu >= 0 && cpu < (sizeof i386_cpus/sizeof(struct cpu_nameclass))) {
if (cpu >= 0
&& cpu < (sizeof i386_cpus/sizeof(struct cpu_nameclass))) {
printf("%s", i386_cpus[cpu].cpu_name);
cpu_class = i386_cpus[cpu].cpu_class;
cpu_model = i386_cpus[cpu].cpu_name;
strncpy(cpu_model, i386_cpus[cpu].cpu_name, sizeof cpu_model);
} else {
printf("unknown cpu type %d\n", cpu);
panic("startup: bad cpu id");
@ -378,12 +381,16 @@ identifycpu()
printf("486");
break;
case CPUCLASS_586:
printf("586");
printf("Pentium");
break;
default:
printf("unknown"); /* will panic below... */
}
printf("-class CPU)");
if(cpu_id)
printf(" Id = 0x%x",cpu_id);
if(*cpu_vendor)
printf(" Origin = \"%s\"",cpu_vendor);
printf("\n"); /* cpu speed would be nice, but how? */
/*

6
sys/amd64/include/psl.h
View File

@ -34,7 +34,7 @@
* SUCH DAMAGE.
*
* from: @(#)psl.h 5.2 (Berkeley) 1/18/91
* $Id: psl.h,v 1.3 1993/11/07 17:43:04 wollman Exp $
* $Id: psl.h,v 1.4 1994/02/24 00:21:12 hsu Exp $
*/
#ifndef _MACHINE_PSL_H_
@ -56,6 +56,10 @@
#define PSL_NT 0x00004000 /* nested task bit */
#define PSL_RF 0x00010000 /* restart flag bit */
#define PSL_VM 0x00020000 /* virtual 8086 mode bit */
#define PSL_AC 0x00040000 /* alignment checking */
#define PSL_VIF 0x00080000 /* virtual interrupt enable */
#define PSL_VIP 0x00100000 /* virtual interrupt pending */
#define PSL_ID 0x00200000 /* identification bit */
#define PSL_MBZ 0xffc08028 /* must be zero bits */
#define PSL_MBO 0x00000002 /* must be one bits */

83
sys/i386/i386/locore.s
View File

@ -34,7 +34,7 @@
* SUCH DAMAGE.
*
* from: @(#)locore.s 7.3 (Berkeley) 5/13/91
* $Id: locore.s,v 1.15 1994/02/01 04:08:54 davidg Exp $
* $Id: locore.s,v 1.18 1994/06/06 14:12:48 davidg Exp $
*/
/*
@ -101,8 +101,10 @@ _esym: .long 0 /* ptr to end of syms */
.globl _boothowto,_bootdev,_curpcb
.globl _cpu,_cold,_atdevbase
.globl _cpu,_cold,_atdevbase,_cpu_vendor,_cpu_id
_cpu: .long 0 /* are we 386, 386sx, or 486 */
_cpu_id: .long 0 /* stepping ID */
_cpu_vendor: .space 17 /* CPU origin code */
_cold: .long 1 /* cold till we are not */
_atdevbase: .long 0 /* location of start of iomem in virtual */
_atdevphys: .long 0 /* location of device mapping ptes (phys) */
@ -168,26 +170,67 @@ NON_GPROF_ENTRY(btext)
movsb
#endif
/* find out our CPU type. */
pushfl
popl %eax
movl %eax,%ecx
xorl $0x40000,%eax
pushl %eax
popfl
pushfl
popl %eax
xorl %ecx,%eax
shrl $18,%eax
andl $1,%eax
push %ecx
popfl
/* Find out our CPU type. */
cmpl $0,%eax
jne 1f
movl $CPU_386,_cpu-KERNBASE
/* Try to toggle alignment check flag; does not exist on 386. */
pushfl
popl %eax
movl %eax,%ecx
orl $PSL_AC,%eax
pushl %eax
popfl
pushfl
popl %eax
xorl %ecx,%eax
andl $PSL_AC,%eax
pushl %ecx
popfl
testl %eax,%eax
jnz 1f
movl $CPU_386,_cpu-KERNBASE
jmp 2f
1: movl $CPU_486,_cpu-KERNBASE
1: /* Try to toggle identification flag; does not exist on early 486s. */
pushfl
popl %eax
movl %eax,%ecx
xorl $PSL_ID,%eax
pushl %eax
popfl
pushfl
popl %eax
xorl %ecx,%eax
andl $PSL_ID,%eax
pushl %ecx
popfl
testl %eax,%eax
jnz 1f
movl $CPU_486,_cpu-KERNBASE
jmp 2f
1: /* Use the `cpuid' instruction. */
xorl %eax,%eax
.byte 0x0f,0xa2 # cpuid 0
movl %ebx,_cpu_vendor-KERNBASE # store vendor string
movl %edx,_cpu_vendor+4-KERNBASE
movl %ecx,_cpu_vendor+8-KERNBASE
movb $0,_cpu_vendor+12-KERNBASE
movl $1,%eax
.byte 0x0f,0xa2 # cpuid 1
movl %eax,_cpu_id-KERNBASE # store cpu_id
rorl $8,%eax # extract family type
andl $15,%eax
cmpl $5,%eax
jae 1f
/* less than Pentium; must be 486 */
movl $CPU_486,_cpu-KERNBASE
jmp 2f
1: movl $CPU_586,_cpu-KERNBASE
2:
/*

21
sys/i386/i386/machdep.c
View File

@ -35,7 +35,7 @@
* SUCH DAMAGE.
*
* from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
* $Id: machdep.c,v 1.46 1994/08/04 06:10:27 davidg Exp $
* $Id: machdep.c,v 1.47 1994/08/06 09:15:14 davidg Exp $
*/
#include "npx.h"
@ -96,8 +96,8 @@ static void initcpu(void);
static int test_page(int *, int);
extern int grow(struct proc *,u_int);
const char machine[] = "PC-Class";
const char *cpu_model;
char machine[] = "PC-Class";
char cpu_model[sizeof("Pentium") + 1];
#ifndef PANIC_REBOOT_WAIT_TIME
#define PANIC_REBOOT_WAIT_TIME 15 /* default to 15 seconds */
@ -351,17 +351,20 @@ struct cpu_nameclass i386_cpus[] = {
{ "i386DX", CPUCLASS_386 }, /* CPU_386 */
{ "i486SX", CPUCLASS_486 }, /* CPU_486SX */
{ "i486DX", CPUCLASS_486 }, /* CPU_486 */
{ "i586", CPUCLASS_586 }, /* CPU_586 */
{ "Pentium", CPUCLASS_586 }, /* CPU_586 */
};
static void
identifycpu()
{
extern u_long cpu_id;
extern char cpu_vendor[];
printf("CPU: ");
if (cpu >= 0 && cpu < (sizeof i386_cpus/sizeof(struct cpu_nameclass))) {
if (cpu >= 0
&& cpu < (sizeof i386_cpus/sizeof(struct cpu_nameclass))) {
printf("%s", i386_cpus[cpu].cpu_name);
cpu_class = i386_cpus[cpu].cpu_class;
cpu_model = i386_cpus[cpu].cpu_name;
strncpy(cpu_model, i386_cpus[cpu].cpu_name, sizeof cpu_model);
} else {
printf("unknown cpu type %d\n", cpu);
panic("startup: bad cpu id");
@ -378,12 +381,16 @@ identifycpu()
printf("486");
break;
case CPUCLASS_586:
printf("586");
printf("Pentium");
break;
default:
printf("unknown"); /* will panic below... */
}
printf("-class CPU)");
if(cpu_id)
printf(" Id = 0x%x",cpu_id);
if(*cpu_vendor)
printf(" Origin = \"%s\"",cpu_vendor);
printf("\n"); /* cpu speed would be nice, but how? */
/*

6
sys/i386/include/psl.h
View File

@ -34,7 +34,7 @@
* SUCH DAMAGE.
*
* from: @(#)psl.h 5.2 (Berkeley) 1/18/91
* $Id: psl.h,v 1.3 1993/11/07 17:43:04 wollman Exp $
* $Id: psl.h,v 1.4 1994/02/24 00:21:12 hsu Exp $
*/
#ifndef _MACHINE_PSL_H_
@ -56,6 +56,10 @@
#define PSL_NT 0x00004000 /* nested task bit */
#define PSL_RF 0x00010000 /* restart flag bit */
#define PSL_VM 0x00020000 /* virtual 8086 mode bit */
#define PSL_AC 0x00040000 /* alignment checking */
#define PSL_VIF 0x00080000 /* virtual interrupt enable */
#define PSL_VIP 0x00100000 /* virtual interrupt pending */
#define PSL_ID 0x00200000 /* identification bit */
#define PSL_MBZ 0xffc08028 /* must be zero bits */
#define PSL_MBO 0x00000002 /* must be one bits */