diff --git a/sys/conf/options.i386 b/sys/conf/options.i386 index 0ecfd466eee9..2f6768146816 100644 --- a/sys/conf/options.i386 +++ b/sys/conf/options.i386 @@ -72,7 +72,6 @@ NO_F00F_HACK opt_cpu.h NO_MEMORY_HOLE opt_cpu.h # The CPU type affects the endian conversion functions all over the kernel. -I386_CPU opt_global.h I486_CPU opt_global.h I586_CPU opt_global.h I686_CPU opt_global.h diff --git a/sys/conf/options.pc98 b/sys/conf/options.pc98 index 7a147de00c11..677704190248 100644 --- a/sys/conf/options.pc98 +++ b/sys/conf/options.pc98 @@ -61,7 +61,6 @@ NO_F00F_HACK opt_cpu.h NO_MEMORY_HOLE opt_cpu.h # The CPU type affects the endian conversion functions all over the kernel. -I386_CPU opt_global.h I486_CPU opt_global.h I586_CPU opt_global.h I686_CPU opt_global.h diff --git a/sys/crypto/blowfish/arch/i386/bf_enc.S b/sys/crypto/blowfish/arch/i386/bf_enc.S index a261e5517b7d..bcee9c542354 100644 --- a/sys/crypto/blowfish/arch/i386/bf_enc.S +++ b/sys/crypto/blowfish/arch/i386/bf_enc.S @@ -10,7 +10,7 @@ * XXX Should use CPP symbols defined as a result of * XXX `cc -mcpu=pentiumpro'. */ -#if defined(I386_CPU) || defined(I486_CPU) || defined(I586_CPU) +#if defined(I486_CPU) || defined(I586_CPU) #include "bf_enc_586.S" #else #include "bf_enc_686.S" diff --git a/sys/i386/conf/NOTES b/sys/i386/conf/NOTES index 75533f0e04aa..2ceb7362781f 100644 --- a/sys/i386/conf/NOTES +++ b/sys/i386/conf/NOTES @@ -29,8 +29,6 @@ profile 2 # # Notes: # -# Be sure to disable 'cpu I386_CPU' for SMP kernels. -# # By default, mixed mode is used to route IRQ0 from the AT timer via # the 8259A master PIC through the ExtINT pin on the first I/O APIC. # This can be disabled via the NO_MIXED_MODE option. In that case, @@ -65,10 +63,7 @@ options NO_MIXED_MODE # Disable use of mixed mode # You must specify at least one CPU (the one you intend to run on); # deleting the specification for CPUs you don't need to use may make # parts of the system run faster. -# I386_CPU is mutually exclusive with the other CPU types. -# I386_CPU is deprecated and will be removed in 6.0-RELEASE. # -#cpu I386_CPU cpu I486_CPU cpu I586_CPU # aka Pentium(tm) cpu I686_CPU # aka Pentium Pro(tm) diff --git a/sys/i386/i386/identcpu.c b/sys/i386/i386/identcpu.c index 284b7e25566b..1b1836fd66c9 100644 --- a/sys/i386/i386/identcpu.c +++ b/sys/i386/i386/identcpu.c @@ -596,11 +596,9 @@ printcpuinfo(void) case CPUCLASS_286: printf("286"); break; -#if defined(I386_CPU) case CPUCLASS_386: printf("386"); break; -#endif #if defined(I486_CPU) case CPUCLASS_486: printf("486"); @@ -742,23 +740,18 @@ panicifcpuunsupported(void) { #if !defined(lint) -#if !defined(I386_CPU) && !defined(I486_CPU) && !defined(I586_CPU) && !defined(I686_CPU) +#if !defined(I486_CPU) && !defined(I586_CPU) && !defined(I686_CPU) #error This kernel is not configured for one of the supported CPUs #endif #else /* lint */ #endif /* lint */ -#if defined(I386_CPU) && (defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)) -#error I386_CPU is mutually exclusive with the other cpu types. -#endif /* * Now that we have told the user what they have, * let them know if that machine type isn't configured. */ switch (cpu_class) { case CPUCLASS_286: /* a 286 should not make it this far, anyway */ -#if !defined(I386_CPU) case CPUCLASS_386: -#endif #if !defined(I486_CPU) case CPUCLASS_486: #endif diff --git a/sys/i386/i386/machdep.c b/sys/i386/i386/machdep.c index 8cb54a6bdfe7..d7a02a684eea 100644 --- a/sys/i386/i386/machdep.c +++ b/sys/i386/i386/machdep.c @@ -1177,10 +1177,7 @@ cpu_setregs(void) * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the * BSP. See the comments there about why we set them. */ - cr0 |= CR0_MP | CR0_NE | CR0_TS; -#ifndef I386_CPU - cr0 |= CR0_WP | CR0_AM; -#endif + cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM; load_cr0(cr0); load_gs(_udatasel); } diff --git a/sys/i386/i386/mp_machdep.c b/sys/i386/i386/mp_machdep.c index eeb39f372454..a79484fa5981 100644 --- a/sys/i386/i386/mp_machdep.c +++ b/sys/i386/i386/mp_machdep.c @@ -36,9 +36,6 @@ __FBSDID("$FreeBSD$"); #error How did you get here? #endif -#if defined(I386_CPU) && !defined(COMPILING_LINT) -#error SMP not supported with I386_CPU -#endif #ifndef DEV_APIC #error The apic device is required for SMP, add "device apic" to your config file. #endif diff --git a/sys/i386/i386/pmap.c b/sys/i386/i386/pmap.c index c44a87877f3e..c5c8dc2dbdd7 100644 --- a/sys/i386/i386/pmap.c +++ b/sys/i386/i386/pmap.c @@ -557,34 +557,6 @@ pmap_track_modified(vm_offset_t va) return 0; } -#ifdef I386_CPU -/* - * i386 only has "invalidate everything" and no SMP to worry about. - */ -PMAP_INLINE void -pmap_invalidate_page(pmap_t pmap, vm_offset_t va) -{ - - if (pmap == kernel_pmap || pmap->pm_active) - invltlb(); -} - -PMAP_INLINE void -pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) -{ - - if (pmap == kernel_pmap || pmap->pm_active) - invltlb(); -} - -PMAP_INLINE void -pmap_invalidate_all(pmap_t pmap) -{ - - if (pmap == kernel_pmap || pmap->pm_active) - invltlb(); -} -#else /* !I386_CPU */ #ifdef SMP /* * For SMP, these functions have to use the IPI mechanism for coherence. @@ -728,7 +700,6 @@ pmap_invalidate_all(pmap_t pmap) invltlb(); } #endif /* !SMP */ -#endif /* !I386_CPU */ /* * Are we current address space or kernel? N.B. We return FALSE when @@ -788,11 +759,8 @@ pmap_pte_release(pt_entry_t *pte) static __inline void invlcaddr(void *caddr) { -#ifdef I386_CPU - invltlb(); -#else + invlpg((u_int)caddr); -#endif } /* @@ -2189,11 +2157,7 @@ pmap_kenter_temporary(vm_paddr_t pa, int i) va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE); pmap_kenter(va, pa); -#ifndef I386_CPU invlpg(va); -#else - invltlb(); -#endif return ((void *)crashdumpmap); } @@ -2523,12 +2487,8 @@ pmap_copy_page(vm_page_t src, vm_page_t dst) if (*sysmaps->CMAP2) panic("pmap_copy_page: CMAP2 busy"); sched_pin(); -#ifdef I386_CPU - invltlb(); -#else invlpg((u_int)sysmaps->CADDR1); invlpg((u_int)sysmaps->CADDR2); -#endif *sysmaps->CMAP1 = PG_V | VM_PAGE_TO_PHYS(src) | PG_A; *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(dst) | PG_A | PG_M; bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE); diff --git a/sys/i386/i386/support.s b/sys/i386/i386/support.s index 0af77e05c121..300aa91aaca0 100644 --- a/sys/i386/i386/support.s +++ b/sys/i386/i386/support.s @@ -709,7 +709,7 @@ ENTRY(memcpy) */ /* - * copyout(from_kernel, to_user, len) - MP SAFE (if not I386_CPU) + * copyout(from_kernel, to_user, len) - MP SAFE */ ENTRY(copyout) MEXITCOUNT @@ -749,58 +749,6 @@ ENTRY(generic_copyout) cmpl $VM_MAXUSER_ADDRESS,%eax ja copyout_fault -#ifdef I386_CPU - -/* - * We have to check each PTE for user write permission. - * The checking may cause a page fault, so it is important to set - * up everything for return via copyout_fault before here. - */ - /* compute number of pages */ - movl %edi,%ecx - andl $PAGE_MASK,%ecx - addl %ebx,%ecx - decl %ecx - shrl $IDXSHIFT+2,%ecx - incl %ecx - - /* compute PTE offset for start address */ - movl %edi,%edx - shrl $IDXSHIFT,%edx - andb $0xfc,%dl - -1: - /* check PTE for each page */ - leal PTmap(%edx),%eax - shrl $IDXSHIFT,%eax - andb $0xfc,%al - testb $PG_V,PTmap(%eax) /* PTE page must be valid */ - je 4f - movb PTmap(%edx),%al - andb $PG_V|PG_RW|PG_U,%al /* page must be valid and user writable */ - cmpb $PG_V|PG_RW|PG_U,%al - je 2f - -4: - /* simulate a trap */ - pushl %edx - pushl %ecx - shll $IDXSHIFT,%edx - pushl %edx - call trapwrite /* trapwrite(addr) */ - popl %edx - popl %ecx - popl %edx - - testl %eax,%eax /* if not ok, return EFAULT */ - jnz copyout_fault - -2: - addl $4,%edx - decl %ecx - jnz 1b /* check next page */ -#endif /* I386_CPU */ - /* bcopy(%esi, %edi, %ebx) */ movl %ebx,%ecx @@ -1284,7 +1232,7 @@ fusufault: /* * Store a 32-bit word, a 16-bit word, or an 8-bit byte to user memory. - * All these functions are MPSAFE unless I386_CPU is configured. + * All these functions are MPSAFE. */ ALTENTRY(suword32) @@ -1293,34 +1241,6 @@ ENTRY(suword) movl $fusufault,PCB_ONFAULT(%ecx) movl 4(%esp),%edx -#ifdef I386_CPU - - /* XXX - page boundary crossing is still not handled */ - movl %edx,%eax - shrl $IDXSHIFT,%edx - andb $0xfc,%dl - - leal PTmap(%edx),%ecx - shrl $IDXSHIFT,%ecx - andb $0xfc,%cl - testb $PG_V,PTmap(%ecx) /* PTE page must be valid */ - je 4f - movb PTmap(%edx),%dl - andb $PG_V|PG_RW|PG_U,%dl /* page must be valid and user writable */ - cmpb $PG_V|PG_RW|PG_U,%dl - je 1f - -4: - /* simulate a trap */ - pushl %eax - call trapwrite - popl %edx /* remove junk parameter from stack */ - testl %eax,%eax - jnz fusufault -1: - movl 4(%esp),%edx -#endif - cmpl $VM_MAXUSER_ADDRESS-4,%edx /* verify address validity */ ja fusufault @@ -1336,34 +1256,6 @@ ENTRY(suword16) movl $fusufault,PCB_ONFAULT(%ecx) movl 4(%esp),%edx -#ifdef I386_CPU - - /* XXX - page boundary crossing is still not handled */ - movl %edx,%eax - shrl $IDXSHIFT,%edx - andb $0xfc,%dl - - leal PTmap(%edx),%ecx - shrl $IDXSHIFT,%ecx - andb $0xfc,%cl - testb $PG_V,PTmap(%ecx) /* PTE page must be valid */ - je 4f - movb PTmap(%edx),%dl - andb $PG_V|PG_RW|PG_U,%dl /* page must be valid and user writable */ - cmpb $PG_V|PG_RW|PG_U,%dl - je 1f - -4: - /* simulate a trap */ - pushl %eax - call trapwrite - popl %edx /* remove junk parameter from stack */ - testl %eax,%eax - jnz fusufault -1: - movl 4(%esp),%edx -#endif - cmpl $VM_MAXUSER_ADDRESS-2,%edx /* verify address validity */ ja fusufault @@ -1379,33 +1271,6 @@ ENTRY(subyte) movl $fusufault,PCB_ONFAULT(%ecx) movl 4(%esp),%edx -#ifdef I386_CPU - - movl %edx,%eax - shrl $IDXSHIFT,%edx - andb $0xfc,%dl - - leal PTmap(%edx),%ecx - shrl $IDXSHIFT,%ecx - andb $0xfc,%cl - testb $PG_V,PTmap(%ecx) /* PTE page must be valid */ - je 4f - movb PTmap(%edx),%dl - andb $PG_V|PG_RW|PG_U,%dl /* page must be valid and user writable */ - cmpb $PG_V|PG_RW|PG_U,%dl - je 1f - -4: - /* simulate a trap */ - pushl %eax - call trapwrite - popl %edx /* remove junk parameter from stack */ - testl %eax,%eax - jnz fusufault -1: - movl 4(%esp),%edx -#endif - cmpl $VM_MAXUSER_ADDRESS-1,%edx /* verify address validity */ ja fusufault diff --git a/sys/i386/i386/trap.c b/sys/i386/i386/trap.c index f1de1ad30e00..1a49784a9131 100644 --- a/sys/i386/i386/trap.c +++ b/sys/i386/i386/trap.c @@ -97,9 +97,6 @@ __FBSDID("$FreeBSD$"); #endif extern void trap(struct trapframe frame); -#ifdef I386_CPU -extern int trapwrite(unsigned addr); -#endif extern void syscall(struct trapframe frame); static int trap_pfault(struct trapframe *, int, vm_offset_t); @@ -838,53 +835,6 @@ dblfault_handler() panic("double fault"); } -#ifdef I386_CPU -/* - * Compensate for 386 brain damage (missing URKR). - * This is a little simpler than the pagefault handler in trap() because - * it the page tables have already been faulted in and high addresses - * are thrown out early for other reasons. - */ -int trapwrite(addr) - unsigned addr; -{ - struct thread *td; - struct proc *p; - vm_offset_t va; - struct vmspace *vm; - int rv; - - va = trunc_page((vm_offset_t)addr); - /* - * XXX - MAX is END. Changed > to >= for temp. fix. - */ - if (va >= VM_MAXUSER_ADDRESS) - return (1); - - td = curthread; - p = td->td_proc; - vm = p->p_vmspace; - - PROC_LOCK(p); - ++p->p_lock; - PROC_UNLOCK(p); - - /* - * fault the data page - */ - rv = vm_fault(&vm->vm_map, va, VM_PROT_WRITE, VM_FAULT_DIRTY); - - PROC_LOCK(p); - --p->p_lock; - PROC_UNLOCK(p); - - if (rv != KERN_SUCCESS) - return 1; - - return (0); -} -#endif - /* * syscall - system call request C handler * diff --git a/sys/i386/include/atomic.h b/sys/i386/include/atomic.h index a1f4acb8e334..5b9ef4270635 100644 --- a/sys/i386/include/atomic.h +++ b/sys/i386/include/atomic.h @@ -118,7 +118,7 @@ extern void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v) #if defined(__GNUC__) || defined(__INTEL_COMPILER) -#if defined(I386_CPU) || defined(CPU_DISABLE_CMPXCHG) +#if defined(CPU_DISABLE_CMPXCHG) static __inline int atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src) @@ -144,7 +144,7 @@ atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src) return (res); } -#else /* defined(I386_CPU) */ +#else /* defined(CPU_DISABLE_CMPXCHG) */ static __inline int atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src) @@ -166,7 +166,7 @@ atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src) return (res); } -#endif /* defined(I386_CPU) */ +#endif /* defined(CPU_DISABLE_CMPXCHG) */ #endif /* defined(__GNUC__) || defined(__INTEL_COMPILER) */ diff --git a/sys/i386/include/cpu.h b/sys/i386/include/cpu.h index fb1017f3d1ae..ec9ecd3c33b8 100644 --- a/sys/i386/include/cpu.h +++ b/sys/i386/include/cpu.h @@ -99,7 +99,7 @@ void swi_vm(void *); static __inline u_int64_t get_cyclecount(void) { -#if defined(I386_CPU) || defined(I486_CPU) || defined(KLD_MODULE) +#if defined(I486_CPU) || defined(KLD_MODULE) struct bintime bt; if (!tsc_present) { diff --git a/sys/i386/include/endian.h b/sys/i386/include/endian.h index 6cc225c57526..13d596a9ce70 100644 --- a/sys/i386/include/endian.h +++ b/sys/i386/include/endian.h @@ -98,20 +98,10 @@ __extension__ ({ register __uint32_t __X = (x); \ #endif /* __OPTIMIZE__ */ -#if defined(_KERNEL) && (defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)) && !defined(I386_CPU) - #define __byte_swap_int_var(x) \ __extension__ ({ register __uint32_t __X = (x); \ __asm ("bswap %0" : "+r" (__X)); \ __X; }) -#else - -#define __byte_swap_int_var(x) \ -__extension__ ({ register __uint32_t __X = (x); \ - __asm ("xchgb %h0, %b0\n\trorl $16, %0\n\txchgb %h0, %b0" \ - : "+q" (__X)); \ - __X; }) -#endif #ifdef __OPTIMIZE__ diff --git a/sys/pc98/conf/GENERIC b/sys/pc98/conf/GENERIC index 801ae1ce58c1..af087172705e 100644 --- a/sys/pc98/conf/GENERIC +++ b/sys/pc98/conf/GENERIC @@ -19,7 +19,6 @@ # $FreeBSD$ machine pc98 -#cpu I386_CPU # Do not enable with other cpu types cpu I486_CPU cpu I586_CPU cpu I686_CPU diff --git a/sys/pc98/conf/NOTES b/sys/pc98/conf/NOTES index 1345cc76645c..91c03cb799fa 100644 --- a/sys/pc98/conf/NOTES +++ b/sys/pc98/conf/NOTES @@ -30,8 +30,6 @@ profile 2 # # Notes: # -# Be sure to disable 'cpu I386_CPU' for SMP kernels. -# # By default, mixed mode is used to route IRQ0 from the AT timer via # the 8259A master PIC through the ExtINT pin on the first I/O APIC. # This can be disabled via the NO_MIXED_MODE option. In that case, @@ -55,10 +53,7 @@ options NO_MIXED_MODE # Disable use of mixed mode # You must specify at least one CPU (the one you intend to run on); # deleting the specification for CPUs you don't need to use may make # parts of the system run faster. -# I386_CPU is mutually exclusive with the other CPU types. -# I386_CPU is deprecated and will be removed in 6.0-RELEASE. # -#cpu I386_CPU cpu I486_CPU cpu I586_CPU # aka Pentium(tm) cpu I686_CPU # aka Pentium Pro(tm) diff --git a/sys/pc98/i386/machdep.c b/sys/pc98/i386/machdep.c index 83abbb30ff13..5296ef51e68f 100644 --- a/sys/pc98/i386/machdep.c +++ b/sys/pc98/i386/machdep.c @@ -1194,10 +1194,7 @@ cpu_setregs(void) * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the * BSP. See the comments there about why we set them. */ - cr0 |= CR0_MP | CR0_NE | CR0_TS; -#ifndef I386_CPU - cr0 |= CR0_WP | CR0_AM; -#endif + cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM; load_cr0(cr0); load_gs(_udatasel); } diff --git a/sys/pc98/pc98/machdep.c b/sys/pc98/pc98/machdep.c index 83abbb30ff13..5296ef51e68f 100644 --- a/sys/pc98/pc98/machdep.c +++ b/sys/pc98/pc98/machdep.c @@ -1194,10 +1194,7 @@ cpu_setregs(void) * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the * BSP. See the comments there about why we set them. */ - cr0 |= CR0_MP | CR0_NE | CR0_TS; -#ifndef I386_CPU - cr0 |= CR0_WP | CR0_AM; -#endif + cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM; load_cr0(cr0); load_gs(_udatasel); }