xen/intr: move x86 PIC interface to xen_arch_intr.c, introduce wrappers
The x86 PIC interface is very much x86-specific and not used by other architectures. Since most of xen_intr.c can be shared with other architectures, the PIC interface needs to be broken off. Introduce wrappers for calls into the architecture-dependent interrupt layer. All architectures need roughly the same functionality, but the interface is slightly different between architectures. Due to the wrappers being so thin, all of them are implemented as inline in arch-intr.h. The original implementation was done by Julien Grall in 2015, but this has required major updating. Removal of PVHv1 meant substantial portions disappeared. The original implementation took care of moving interrupt allocation to xen_arch_intr.c, but this has required massive rework and was broken off. In the original implementation the wrappers were normal functions. Some had empty stubs in xen_intr.c and were removed. Reviewed by: royger Submitted by: Elliott Mitchell <ehem+freebsd@m5p.com> Original implementation: Julien Grall <julien@xen.org>, 2015-10-20 09:14:56 Differential Revision: https://reviews.freebsd.org/D30909
This commit is contained in:
Julien Grall
Roger Pau Monné
parent
373301019f
commit
2d795ab1ea
@ -60,4 +60,34 @@ struct xenisrc {
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volatile u_int xi_refcount;
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};
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/***************** Functions called by the architecture code *****************/
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extern void xen_intr_resume(void);
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extern void xen_intr_enable_source(struct xenisrc *isrc);
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extern void xen_intr_disable_source(struct xenisrc *isrc);
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extern void xen_intr_enable_intr(struct xenisrc *isrc);
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extern void xen_intr_disable_intr(struct xenisrc *isrc);
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extern int xen_intr_assign_cpu(struct xenisrc *isrc, u_int to_cpu);
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/******************* Functions implemented by each architecture **************/
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#if 0
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/*
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* These are sample prototypes, the architecture should include its own in
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* <machine/xen/arch-intr.h>. The architecture may implement these as inline.
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*/
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void xen_arch_intr_init(void);
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u_long xen_arch_intr_execute_handlers(struct xenisrc *isrc,
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struct trapframe *frame);
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int xen_arch_intr_add_handler(const char *name,
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driver_filter_t filter, driver_intr_t handler, void *arg,
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enum intr_type flags, struct xenisrc *isrc,
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void **cookiep);
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int xen_arch_intr_describe(struct xenisrc *isrc, void *cookie,
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const char *descr);
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int xen_arch_intr_remove_handler(struct xenisrc *isrc,
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void *cookie);
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int xen_arch_intr_event_bind(struct xenisrc *isrc, u_int cpu);
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#endif
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#endif /* _XEN_INTR_INTERNAL_H_ */
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@ -36,6 +36,51 @@ typedef struct {
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u_int vector; /* Global isrc vector number */
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} xen_arch_isrc_t;
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extern struct pic xen_intr_pic;
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#include <dev/xen/bus/intr-internal.h>
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/******************************* ARCH wrappers *******************************/
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extern void xen_arch_intr_init(void);
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static inline u_long
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xen_arch_intr_execute_handlers(struct xenisrc *isrc, struct trapframe *frame)
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{
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intr_execute_handlers(&isrc->xi_arch.intsrc, frame);
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return (0);
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}
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static inline int
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xen_arch_intr_add_handler(const char *name, driver_filter_t filter,
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driver_intr_t handler, void *arg, enum intr_type flags,
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struct xenisrc *isrc, void **cookiep)
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{
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return (intr_add_handler(name, isrc->xi_arch.vector, filter, handler,
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arg, flags, cookiep, 0));
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}
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static inline int
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xen_arch_intr_describe(struct xenisrc *isrc, void *cookie, const char *descr)
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{
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return (intr_describe(isrc->xi_arch.vector, cookie, descr));
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}
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static inline int
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xen_arch_intr_remove_handler(struct xenisrc *isrc, void *cookie)
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{
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return (intr_remove_handler(cookie));
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}
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static inline int
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xen_arch_intr_event_bind(struct xenisrc *isrc, u_int cpu)
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{
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return (intr_event_bind(isrc->xi_arch.intsrc.is_event, cpu));
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}
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#endif /* _MACHINE__XEN_ARCH_INTR_H_ */
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@ -1,6 +1,7 @@
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/*-
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* SPDX-License-Identifier: MIT OR GPL-2.0-only
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*
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* Copyright © 2015 Julien Grall
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* Copyright © 2013 Spectra Logic Corporation
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* Copyright © 2018 John Baldwin/The FreeBSD Foundation
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* Copyright © 2019 Roger Pau Monné/Citrix Systems R&D
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@ -32,8 +33,14 @@
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/limits.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/interrupt.h>
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#include <sys/pcpu.h>
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#include <sys/proc.h>
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#include <sys/smp.h>
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@ -41,8 +48,8 @@ __FBSDID("$FreeBSD$");
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#include <xen/xen-os.h>
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#include <xen/xen_intr.h>
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#include <machine/xen/arch-intr.h>
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#include <x86/intr_machdep.h>
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#include <x86/apicvar.h>
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/************************ Xen x86 interrupt interface ************************/
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@ -101,3 +108,165 @@ xen_arch_intr_handle_upcall(struct trapframe *trap_frame)
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critical_exit();
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}
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/******************************** EVTCHN PIC *********************************/
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static void
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xen_intr_pic_enable_source(struct intsrc *isrc)
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{
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_Static_assert(offsetof(struct xenisrc, xi_arch.intsrc) == 0,
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"xi_arch MUST be at top of xenisrc for x86");
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xen_intr_enable_source((struct xenisrc *)isrc);
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}
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/*
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* Perform any necessary end-of-interrupt acknowledgements.
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*
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* \param isrc The interrupt source to EOI.
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*/
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static void
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xen_intr_pic_disable_source(struct intsrc *isrc, int eoi)
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{
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_Static_assert(offsetof(struct xenisrc, xi_arch.intsrc) == 0,
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"xi_arch MUST be at top of xenisrc for x86");
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xen_intr_disable_source((struct xenisrc *)isrc);
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}
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static void
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xen_intr_pic_eoi_source(struct intsrc *isrc)
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{
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/* Nothing to do on end-of-interrupt */
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}
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static void
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xen_intr_pic_enable_intr(struct intsrc *isrc)
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{
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_Static_assert(offsetof(struct xenisrc, xi_arch.intsrc) == 0,
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"xi_arch MUST be at top of xenisrc for x86");
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xen_intr_enable_intr((struct xenisrc *)isrc);
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}
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static void
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xen_intr_pic_disable_intr(struct intsrc *isrc)
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{
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_Static_assert(offsetof(struct xenisrc, xi_arch.intsrc) == 0,
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"xi_arch MUST be at top of xenisrc for x86");
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xen_intr_disable_intr((struct xenisrc *)isrc);
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}
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/**
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* Determine the global interrupt vector number for
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* a Xen interrupt source.
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*
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* \param isrc The interrupt source to query.
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*
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* \return The vector number corresponding to the given interrupt source.
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*/
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static int
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xen_intr_pic_vector(struct intsrc *isrc)
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{
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_Static_assert(offsetof(struct xenisrc, xi_arch.intsrc) == 0,
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"xi_arch MUST be at top of xenisrc for x86");
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return (((struct xenisrc *)isrc)->xi_arch.vector);
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}
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/**
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* Determine whether or not interrupt events are pending on the
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* the given interrupt source.
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*
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* \param isrc The interrupt source to query.
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*
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* \returns 0 if no events are pending, otherwise non-zero.
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*/
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static int
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xen_intr_pic_source_pending(struct intsrc *isrc)
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{
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/*
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* EventChannels are edge triggered and never masked.
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* There can be no pending events.
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*/
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return (0);
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}
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/**
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* Prepare this PIC for system suspension.
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*/
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static void
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xen_intr_pic_suspend(struct pic *pic)
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{
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/* Nothing to do on suspend */
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}
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static void
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xen_intr_pic_resume(struct pic *pic, bool suspend_cancelled)
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{
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if (!suspend_cancelled)
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xen_intr_resume();
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}
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/**
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* Perform configuration of an interrupt source.
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*
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* \param isrc The interrupt source to configure.
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* \param trig Edge or level.
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* \param pol Active high or low.
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*
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* \returns 0 if no events are pending, otherwise non-zero.
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*/
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static int
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xen_intr_pic_config_intr(struct intsrc *isrc, enum intr_trigger trig,
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enum intr_polarity pol)
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{
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/* Configuration is only possible via the evtchn apis. */
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return (ENODEV);
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}
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static int
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xen_intr_pic_assign_cpu(struct intsrc *isrc, u_int apic_id)
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{
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_Static_assert(offsetof(struct xenisrc, xi_arch.intsrc) == 0,
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"xi_arch MUST be at top of xenisrc for x86");
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return (xen_intr_assign_cpu((struct xenisrc *)isrc,
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apic_cpuid(apic_id)));
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}
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/**
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* PIC interface for all event channel port types except physical IRQs.
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*/
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struct pic xen_intr_pic = {
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.pic_enable_source = xen_intr_pic_enable_source,
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.pic_disable_source = xen_intr_pic_disable_source,
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.pic_eoi_source = xen_intr_pic_eoi_source,
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.pic_enable_intr = xen_intr_pic_enable_intr,
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.pic_disable_intr = xen_intr_pic_disable_intr,
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.pic_vector = xen_intr_pic_vector,
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.pic_source_pending = xen_intr_pic_source_pending,
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.pic_suspend = xen_intr_pic_suspend,
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.pic_resume = xen_intr_pic_resume,
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.pic_config_intr = xen_intr_pic_config_intr,
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.pic_assign_cpu = xen_intr_pic_assign_cpu,
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};
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/******************************* ARCH wrappers *******************************/
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void
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xen_arch_intr_init(void)
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{
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int error;
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error = intr_register_pic(&xen_intr_pic);
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if (error != 0)
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panic("%s(): failed registering Xen/x86 PIC, error=%d\n",
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__func__, error);
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}
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@ -117,37 +117,6 @@ DPCPU_DECLARE(struct vcpu_info *, vcpu_info);
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#define INVALID_EVTCHN (~(evtchn_port_t)0) /* Invalid event channel */
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#define is_valid_evtchn(x) ((uintmax_t)(x) < NR_EVENT_CHANNELS)
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static void xen_intr_suspend(struct pic *);
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static void xen_intr_resume(struct pic *, bool suspend_cancelled);
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static void xen_intr_enable_source(struct intsrc *isrc);
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static void xen_intr_disable_source(struct intsrc *isrc, int eoi);
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static void xen_intr_eoi_source(struct intsrc *isrc);
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static void xen_intr_enable_intr(struct intsrc *isrc);
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static void xen_intr_disable_intr(struct intsrc *isrc);
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static int xen_intr_vector(struct intsrc *isrc);
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static int xen_intr_source_pending(struct intsrc *isrc);
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static int xen_intr_config_intr(struct intsrc *isrc,
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enum intr_trigger trig, enum intr_polarity pol);
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static int xen_intr_assign_cpu(struct intsrc *isrc, u_int to_cpu);
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static int xen_intr_pic_assign_cpu(struct intsrc *isrc, u_int apic_id);
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/**
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* PIC interface for all event channel port types except physical IRQs.
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*/
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struct pic xen_intr_pic = {
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.pic_enable_source = xen_intr_enable_source,
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.pic_disable_source = xen_intr_disable_source,
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.pic_eoi_source = xen_intr_eoi_source,
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.pic_enable_intr = xen_intr_enable_intr,
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.pic_disable_intr = xen_intr_disable_intr,
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.pic_vector = xen_intr_vector,
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.pic_source_pending = xen_intr_source_pending,
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.pic_suspend = xen_intr_suspend,
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.pic_resume = xen_intr_resume,
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.pic_config_intr = xen_intr_config_intr,
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.pic_assign_cpu = xen_intr_pic_assign_cpu,
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};
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/*
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* Lock for interrupt core data.
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*
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@ -413,8 +382,7 @@ xen_intr_bind_isrc(struct xenisrc **isrcp, evtchn_port_t local_port,
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* unless specified otherwise, so shuffle them to balance
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* the interrupt load.
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*/
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xen_intr_assign_cpu(&isrc->xi_arch.intsrc,
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apic_cpuid(intr_next_cpu(0)));
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xen_intr_assign_cpu(isrc, apic_cpuid(intr_next_cpu(0)));
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}
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#endif
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@ -544,8 +512,7 @@ xen_intr_handle_upcall(void *unused __unused)
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("Received unexpected event on vCPU#%u, event bound to vCPU#%u",
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PCPU_GET(cpuid), isrc->xi_cpu));
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intr_execute_handlers(&isrc->xi_arch.intsrc,
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trap_frame);
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xen_arch_intr_execute_handlers(isrc, trap_frame);
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/*
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* If this is the final port processed,
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@ -609,7 +576,7 @@ xen_intr_init(void *dummy __unused)
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for (i = 0; i < nitems(s->evtchn_mask); i++)
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atomic_store_rel_long(&s->evtchn_mask[i], ~0);
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intr_register_pic(&xen_intr_pic);
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xen_arch_intr_init();
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if (bootverbose)
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printf("Xen interrupt system initialized\n");
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@ -629,13 +596,6 @@ xen_intr_alloc_irqs(void)
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}
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/*--------------------------- Common PIC Functions ---------------------------*/
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/**
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* Prepare this PIC for system suspension.
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*/
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static void
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xen_intr_suspend(struct pic *unused)
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{
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}
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static void
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xen_rebind_ipi(struct xenisrc *isrc)
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@ -699,7 +659,7 @@ xen_intr_rebind_isrc(struct xenisrc *isrc)
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#ifdef SMP
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isrc->xi_cpu = 0;
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error = xen_intr_assign_cpu(&isrc->xi_arch.intsrc, cpu);
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error = xen_intr_assign_cpu(isrc, cpu);
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if (error)
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panic("%s(): unable to rebind Xen channel %u to vCPU%u: %d",
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__func__, isrc->xi_port, cpu, error);
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@ -713,16 +673,13 @@ xen_intr_rebind_isrc(struct xenisrc *isrc)
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/**
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* Return this PIC to service after being suspended.
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*/
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static void
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xen_intr_resume(struct pic *unused, bool suspend_cancelled)
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void
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xen_intr_resume(void)
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{
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shared_info_t *s = HYPERVISOR_shared_info;
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u_int isrc_idx;
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int i;
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if (suspend_cancelled)
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return;
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/* Reset the per-CPU masks */
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CPU_FOREACH(i) {
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struct xen_intr_pcpu_data *pcpu;
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@ -767,65 +724,13 @@ xen_intr_resume(struct pic *unused, bool suspend_cancelled)
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*
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* \param isrc The interrupt source to disable.
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*/
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static void
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xen_intr_disable_intr(struct intsrc *base_isrc)
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void
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xen_intr_disable_intr(struct xenisrc *isrc)
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{
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struct xenisrc *isrc = (struct xenisrc *)base_isrc;
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evtchn_mask_port(isrc->xi_port);
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}
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/**
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* Determine the global interrupt vector number for
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* a Xen interrupt source.
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*
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* \param isrc The interrupt source to query.
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*
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* \return The vector number corresponding to the given interrupt source.
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*/
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static int
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xen_intr_vector(struct intsrc *base_isrc)
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{
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struct xenisrc *isrc = (struct xenisrc *)base_isrc;
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return (isrc->xi_arch.vector);
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}
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/**
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* Determine whether or not interrupt events are pending on the
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* the given interrupt source.
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*
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* \param isrc The interrupt source to query.
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*
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* \returns 0 if no events are pending, otherwise non-zero.
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*/
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static int
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xen_intr_source_pending(struct intsrc *isrc)
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{
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/*
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* EventChannels are edge triggered and never masked.
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* There can be no pending events.
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*/
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return (0);
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}
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/**
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* Perform configuration of an interrupt source.
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*
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* \param isrc The interrupt source to configure.
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* \param trig Edge or level.
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* \param pol Active high or low.
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*
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* \returns 0 if no events are pending, otherwise non-zero.
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*/
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static int
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xen_intr_config_intr(struct intsrc *isrc, enum intr_trigger trig,
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enum intr_polarity pol)
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{
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/* Configuration is only possible via the evtchn apis. */
|
||||
return (ENODEV);
|
||||
}
|
||||
|
||||
/**
|
||||
* Configure CPU affinity for interrupt source event delivery.
|
||||
*
|
||||
@ -834,12 +739,11 @@ xen_intr_config_intr(struct intsrc *isrc, enum intr_trigger trig,
|
||||
*
|
||||
* \returns 0 if successful, otherwise an errno.
|
||||
*/
|
||||
static int
|
||||
xen_intr_assign_cpu(struct intsrc *base_isrc, u_int to_cpu)
|
||||
int
|
||||
xen_intr_assign_cpu(struct xenisrc *isrc, u_int to_cpu)
|
||||
{
|
||||
#ifdef SMP
|
||||
struct evtchn_bind_vcpu bind_vcpu;
|
||||
struct xenisrc *isrc;
|
||||
u_int vcpu_id = XEN_CPUID_TO_VCPUID(to_cpu);
|
||||
int error, masked;
|
||||
|
||||
@ -847,7 +751,6 @@ xen_intr_assign_cpu(struct intsrc *base_isrc, u_int to_cpu)
|
||||
return (EOPNOTSUPP);
|
||||
|
||||
mtx_lock(&xen_intr_isrc_lock);
|
||||
isrc = (struct xenisrc *)base_isrc;
|
||||
if (!is_valid_evtchn(isrc->xi_port)) {
|
||||
mtx_unlock(&xen_intr_isrc_lock);
|
||||
return (EINVAL);
|
||||
@ -894,28 +797,15 @@ xen_intr_assign_cpu(struct intsrc *base_isrc, u_int to_cpu)
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Wrapper of xen_intr_assign_cpu to use as pic callbacks */
|
||||
static int
|
||||
xen_intr_pic_assign_cpu(struct intsrc *isrc, u_int apic_id)
|
||||
{
|
||||
|
||||
return (xen_intr_assign_cpu(isrc, apic_cpuid(apic_id)));
|
||||
}
|
||||
|
||||
/*------------------- Virtual Interrupt Source PIC Functions -----------------*/
|
||||
/*
|
||||
* Mask a level triggered interrupt source.
|
||||
*
|
||||
* \param isrc The interrupt source to mask (if necessary).
|
||||
* \param eoi If non-zero, perform any necessary end-of-interrupt
|
||||
* acknowledgements.
|
||||
*/
|
||||
static void
|
||||
xen_intr_disable_source(struct intsrc *base_isrc, int eoi)
|
||||
void
|
||||
xen_intr_disable_source(struct xenisrc *isrc)
|
||||
{
|
||||
struct xenisrc *isrc;
|
||||
|
||||
isrc = (struct xenisrc *)base_isrc;
|
||||
|
||||
/*
|
||||
* NB: checking if the event channel is already masked is
|
||||
@ -933,36 +823,22 @@ xen_intr_disable_source(struct intsrc *base_isrc, int eoi)
|
||||
*
|
||||
* \param isrc The interrupt source to unmask (if necessary).
|
||||
*/
|
||||
static void
|
||||
xen_intr_enable_source(struct intsrc *base_isrc)
|
||||
void
|
||||
xen_intr_enable_source(struct xenisrc *isrc)
|
||||
{
|
||||
struct xenisrc *isrc;
|
||||
|
||||
isrc = (struct xenisrc *)base_isrc;
|
||||
|
||||
if (isrc->xi_masked == 0)
|
||||
evtchn_unmask_port(isrc->xi_port);
|
||||
}
|
||||
|
||||
/*
|
||||
* Perform any necessary end-of-interrupt acknowledgements.
|
||||
*
|
||||
* \param isrc The interrupt source to EOI.
|
||||
*/
|
||||
static void
|
||||
xen_intr_eoi_source(struct intsrc *base_isrc)
|
||||
{
|
||||
}
|
||||
|
||||
/*
|
||||
* Enable and unmask the interrupt source.
|
||||
*
|
||||
* \param isrc The interrupt source to enable.
|
||||
*/
|
||||
static void
|
||||
xen_intr_enable_intr(struct intsrc *base_isrc)
|
||||
void
|
||||
xen_intr_enable_intr(struct xenisrc *isrc)
|
||||
{
|
||||
struct xenisrc *isrc = (struct xenisrc *)base_isrc;
|
||||
|
||||
evtchn_unmask_port(isrc->xi_port);
|
||||
}
|
||||
@ -1091,7 +967,7 @@ xen_intr_bind_virq(device_t dev, u_int virq, u_int cpu,
|
||||
|
||||
#ifdef SMP
|
||||
if (error == 0)
|
||||
error = intr_event_bind(isrc->xi_arch.intsrc.is_event, cpu);
|
||||
error = xen_arch_intr_event_bind(isrc, cpu);
|
||||
#endif
|
||||
|
||||
if (error != 0) {
|
||||
@ -1111,7 +987,7 @@ xen_intr_bind_virq(device_t dev, u_int virq, u_int cpu,
|
||||
* masks manually so events can't fire on the wrong cpu
|
||||
* during AP startup.
|
||||
*/
|
||||
xen_intr_assign_cpu(&isrc->xi_arch.intsrc, cpu);
|
||||
xen_intr_assign_cpu(isrc, cpu);
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -1167,7 +1043,7 @@ xen_intr_alloc_and_bind_ipi(u_int cpu, driver_filter_t filter,
|
||||
* masks manually so events can't fire on the wrong cpu
|
||||
* during AP startup.
|
||||
*/
|
||||
xen_intr_assign_cpu(&isrc->xi_arch.intsrc, cpu);
|
||||
xen_intr_assign_cpu(isrc, cpu);
|
||||
}
|
||||
|
||||
/*
|
||||
@ -1195,7 +1071,7 @@ xen_intr_describe(xen_intr_handle_t port_handle, const char *fmt, ...)
|
||||
va_start(ap, fmt);
|
||||
vsnprintf(descr, sizeof(descr), fmt, ap);
|
||||
va_end(ap);
|
||||
return (intr_describe(isrc->xi_arch.vector, isrc->xi_cookie, descr));
|
||||
return (xen_arch_intr_describe(isrc, isrc->xi_cookie, descr));
|
||||
}
|
||||
|
||||
void
|
||||
@ -1219,7 +1095,7 @@ xen_intr_unbind(xen_intr_handle_t *port_handlep)
|
||||
mtx_unlock(&xen_intr_isrc_lock);
|
||||
|
||||
if (isrc->xi_cookie != NULL)
|
||||
intr_remove_handler(isrc->xi_cookie);
|
||||
xen_arch_intr_remove_handler(isrc, isrc->xi_cookie);
|
||||
xen_intr_release_isrc(isrc);
|
||||
}
|
||||
|
||||
@ -1262,8 +1138,8 @@ xen_intr_add_handler(const char *name, driver_filter_t filter,
|
||||
if (isrc == NULL || isrc->xi_cookie != NULL)
|
||||
return (EINVAL);
|
||||
|
||||
error = intr_add_handler(name, isrc->xi_arch.vector, filter, handler,
|
||||
arg, flags|INTR_EXCL, &isrc->xi_cookie, 0);
|
||||
error = xen_arch_intr_add_handler(name, filter, handler, arg,
|
||||
flags | INTR_EXCL, isrc, &isrc->xi_cookie);
|
||||
if (error != 0)
|
||||
printf("%s: %s: add handler failed: %d\n", name, __func__,
|
||||
error);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user