Implement basic support for EHCI interrupt pipes. This is unlikely
to be particularly correct or optimal, but it seems to be enough to allow the attachment of USB2 hubs and USB2 devices connected via USB2 hubs. None of the split transaction support is implemented in our USB stack, so USB1 peripherals will definitely not work when connected via USB2 hubs.
This commit is contained in:
Ian Dowse
parent
228a86bf7d
commit
2dacb7cc04
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=132964
@ -156,7 +156,9 @@ struct ehci_pipe {
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/*ehci_soft_qtd_t *setup, *data, *stat;*/
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} ctl;
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/* Interrupt pipe */
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/* XXX */
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struct {
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u_int length;
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} intr;
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/* Bulk pipe */
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struct {
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u_int length;
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@ -245,6 +247,9 @@ Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *,
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Static usbd_status ehci_device_request(usbd_xfer_handle xfer);
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Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *,
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int ival);
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Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
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Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
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ehci_soft_qh_t *);
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@ -422,6 +427,8 @@ ehci_init(ehci_softc_t *sc)
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if (err)
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return (err);
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DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize));
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sc->sc_flist = KERNADDR(&sc->sc_fldma, 0);
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EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
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/* Set up the bus struct. */
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sc->sc_bus.methods = &ehci_bus_methods;
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@ -434,6 +441,49 @@ ehci_init(ehci_softc_t *sc)
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sc->sc_eintrs = EHCI_NORMAL_INTRS;
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/*
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* Allocate the interrupt dummy QHs. These are arranged to give
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* poll intervals that are powers of 2 times 1ms.
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* XXX this probably isn't the most sensible arrangement, and it
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* would be better if we didn't leave all the QHs in the periodic
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* schedule all the time.
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*/
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for (i = 0; i < EHCI_INTRQHS; i++) {
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sqh = ehci_alloc_sqh(sc);
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if (sqh == NULL) {
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err = USBD_NOMEM;
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goto bad1;
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}
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sc->sc_islots[i].sqh = sqh;
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}
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for (i = 0; i < EHCI_INTRQHS; i++) {
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sqh = sc->sc_islots[i].sqh;
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if (i == 0) {
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/* The last (1ms) QH terminates. */
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sqh->qh.qh_link = EHCI_NULL;
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sqh->next = NULL;
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} else {
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/* Otherwise the next QH has half the poll interval */
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sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh;
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sqh->qh.qh_link = htole32(sqh->next->physaddr |
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EHCI_LINK_QH);
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}
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sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
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sqh->qh.qh_link = EHCI_NULL;
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sqh->qh.qh_curqtd = EHCI_NULL;
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sqh->next = NULL;
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sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
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sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
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sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
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sqh->sqtd = NULL;
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}
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/* Point the frame list at the last level (128ms). */
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for (i = 0; i < sc->sc_flsize / 4; i++) {
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sc->sc_flist[i] = htole32(EHCI_LINK_QH |
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sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1,
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i)].sqh->physaddr);
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}
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/* Allocate dummy QH that starts the async list. */
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sqh = ehci_alloc_sqh(sc);
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if (sqh == NULL) {
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@ -474,7 +524,7 @@ ehci_init(ehci_softc_t *sc)
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EHCI_CMD_ITC_8 | /* 8 microframes */
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(EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
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EHCI_CMD_ASE |
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/* EHCI_CMD_PSE | */
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EHCI_CMD_PSE |
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EHCI_CMD_RS);
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/* Take over port ownership */
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@ -1248,7 +1298,7 @@ ehci_open(usbd_pipe_handle pipe)
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ehci_soft_qh_t *sqh;
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usbd_status err;
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int s;
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int speed, naks;
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int ival, speed, naks;
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DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
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pipe, addr, ed->bEndpointAddress, sc->sc_addr));
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@ -1295,9 +1345,9 @@ ehci_open(usbd_pipe_handle pipe)
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EHCI_QH_SET_NRL(naks)
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);
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sqh->qh.qh_endphub = htole32(
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EHCI_QH_SET_MULT(1)
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EHCI_QH_SET_MULT(1) |
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/* XXX TT stuff */
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/* XXX interrupt mask */
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EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x01 : 0)
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);
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sqh->qh.qh_curqtd = EHCI_NULL;
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/* Fill the overlay qTD */
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@ -1330,7 +1380,10 @@ ehci_open(usbd_pipe_handle pipe)
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break;
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case UE_INTERRUPT:
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pipe->methods = &ehci_device_intr_methods;
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return (USBD_INVAL);
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ival = pipe->interval;
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if (ival == USBD_DEFAULT_INTERVAL)
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ival = ed->bInterval;
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return (ehci_device_setintr(sc, sqh, ival));
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case UE_ISOCHRONOUS:
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pipe->methods = &ehci_device_isoc_methods;
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return (USBD_INVAL);
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@ -2843,11 +2896,213 @@ ehci_device_bulk_done(usbd_xfer_handle xfer)
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/************************/
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Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
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Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
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Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { }
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Static void ehci_device_intr_close(usbd_pipe_handle pipe) { }
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Static void ehci_device_intr_done(usbd_xfer_handle xfer) { }
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Static usbd_status
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ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival)
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{
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struct ehci_soft_islot *isp;
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int islot, lev;
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/* Find a poll rate that is large enough. */
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for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--)
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if (EHCI_ILEV_IVAL(lev) <= ival)
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break;
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/* Pick an interrupt slot at the right level. */
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/* XXX, could do better than picking at random. */
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islot = EHCI_IQHIDX(lev, arc4random());
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sqh->islot = islot;
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isp = &sc->sc_islots[sqh->islot];
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ehci_add_qh(sqh, isp->sqh);
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return (USBD_NORMAL_COMPLETION);
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}
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Static usbd_status
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ehci_device_intr_transfer(usbd_xfer_handle xfer)
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{
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usbd_status err;
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/* Insert last in queue. */
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err = usb_insert_transfer(xfer);
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if (err)
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return (err);
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/*
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* Pipe isn't running (otherwise err would be USBD_INPROG),
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* so start it first.
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*/
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return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
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}
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Static usbd_status
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ehci_device_intr_start(usbd_xfer_handle xfer)
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{
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#define exfer EXFER(xfer)
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struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
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usbd_device_handle dev = xfer->pipe->device;
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ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
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ehci_soft_qtd_t *data, *dataend;
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ehci_soft_qh_t *sqh;
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usbd_status err;
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int len, isread, endpt;
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int s;
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DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n",
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xfer, xfer->length, xfer->flags));
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if (sc->sc_dying)
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return (USBD_IOERROR);
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#ifdef DIAGNOSTIC
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if (xfer->rqflags & URQ_REQUEST)
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panic("ehci_device_intr_start: a request");
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#endif
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len = xfer->length;
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endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
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isread = UE_GET_DIR(endpt) == UE_DIR_IN;
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sqh = epipe->sqh;
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epipe->u.intr.length = len;
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err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
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&dataend);
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if (err) {
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DPRINTFN(-1,("ehci_device_intr_start: no memory\n"));
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xfer->status = err;
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usb_transfer_complete(xfer);
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return (err);
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}
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#ifdef EHCI_DEBUG
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if (ehcidebug > 5) {
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DPRINTF(("ehci_device_intr_start: data(1)\n"));
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ehci_dump_sqh(sqh);
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ehci_dump_sqtds(data);
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}
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#endif
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/* Set up interrupt info. */
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exfer->sqtdstart = data;
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exfer->sqtdend = dataend;
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#ifdef DIAGNOSTIC
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if (!exfer->isdone) {
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printf("ehci_device_intr_start: not done, ex=%p\n", exfer);
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}
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exfer->isdone = 0;
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#endif
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s = splusb();
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ehci_set_qh_qtd(sqh, data);
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if (xfer->timeout && !sc->sc_bus.use_polling) {
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usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
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ehci_timeout, xfer);
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}
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ehci_add_intr_list(sc, exfer);
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xfer->status = USBD_IN_PROGRESS;
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splx(s);
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#ifdef EHCI_DEBUG
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if (ehcidebug > 10) {
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DPRINTF(("ehci_device_intr_start: data(2)\n"));
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delay(10000);
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DPRINTF(("ehci_device_intr_start: data(3)\n"));
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ehci_dump_regs(sc);
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printf("sqh:\n");
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ehci_dump_sqh(sqh);
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ehci_dump_sqtds(data);
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}
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#endif
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if (sc->sc_bus.use_polling)
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ehci_waitintr(sc, xfer);
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return (USBD_IN_PROGRESS);
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#undef exfer
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}
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Static void
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ehci_device_intr_abort(usbd_xfer_handle xfer)
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{
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DPRINTFN(1,("ehci_device_intr_abort: xfer=%p\n", xfer));
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if (xfer->pipe->intrxfer == xfer) {
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DPRINTFN(1,("ehci_device_intr_abort: remove\n"));
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xfer->pipe->intrxfer = NULL;
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}
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ehci_abort_xfer(xfer, USBD_CANCELLED);
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}
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Static void
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ehci_device_intr_close(usbd_pipe_handle pipe)
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{
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ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
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struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
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struct ehci_soft_islot *isp;
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isp = &sc->sc_islots[epipe->sqh->islot];
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ehci_close_pipe(pipe, isp->sqh);
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}
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Static void
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ehci_device_intr_done(usbd_xfer_handle xfer)
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{
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#define exfer EXFER(xfer)
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struct ehci_xfer *ex = EXFER(xfer);
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ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
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struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
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ehci_soft_qtd_t *data, *dataend;
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ehci_soft_qh_t *sqh;
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usbd_status err;
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int len, isread, endpt, s;
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DPRINTFN(10,("ehci_device_intr_done: xfer=%p, actlen=%d\n",
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xfer, xfer->actlen));
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if (xfer->pipe->repeat) {
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ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
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len = epipe->u.intr.length;
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xfer->length = len;
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endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
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isread = UE_GET_DIR(endpt) == UE_DIR_IN;
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sqh = epipe->sqh;
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err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
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&dataend);
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if (err) {
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DPRINTFN(-1,("ehci_device_intr_done: no memory\n"));
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xfer->status = err;
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return;
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}
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/* Set up interrupt info. */
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exfer->sqtdstart = data;
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exfer->sqtdend = dataend;
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#ifdef DIAGNOSTIC
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if (!exfer->isdone) {
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printf("ehci_device_intr_done: not done, ex=%p\n",
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exfer);
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}
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exfer->isdone = 0;
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#endif
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s = splusb();
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ehci_set_qh_qtd(sqh, data);
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if (xfer->timeout && !sc->sc_bus.use_polling) {
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usb_callout(xfer->timeout_handle,
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MS_TO_TICKS(xfer->timeout), ehci_timeout, xfer);
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}
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splx(s);
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xfer->status = USBD_IN_PROGRESS;
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} else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
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ehci_del_intr_list(ex); /* remove from active list */
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ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
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}
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#undef exfer
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}
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/************************/
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@ -53,6 +53,7 @@ typedef struct ehci_soft_qh {
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struct ehci_soft_qh *next;
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struct ehci_soft_qtd *sqtd;
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ehci_physaddr_t physaddr;
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int islot; /* Interrupt list slot. */
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} ehci_soft_qh_t;
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#define EHCI_SQH_SIZE ((sizeof (struct ehci_soft_qh) + EHCI_QH_ALIGN - 1) / EHCI_QH_ALIGN * EHCI_QH_ALIGN)
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#define EHCI_SQH_CHUNK (EHCI_PAGE_SIZE / EHCI_SQH_SIZE)
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@ -69,6 +70,19 @@ struct ehci_xfer {
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};
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#define EXFER(xfer) ((struct ehci_xfer *)(xfer))
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/*
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* Information about an entry in the interrupt list.
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*/
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struct ehci_soft_islot {
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ehci_soft_qh_t *sqh; /* Queue Head. */
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};
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#define EHCI_FRAMELIST_MAXCOUNT 1024
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#define EHCI_IPOLLRATES 8 /* Poll rates (1ms, 2, 4, 8 ... 128) */
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#define EHCI_INTRQHS ((1 << EHCI_IPOLLRATES) - 1)
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#define EHCI_IQHIDX(lev, pos) \
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((((pos) & ((1 << (lev)) - 1)) | (1 << (lev))) - 1)
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#define EHCI_ILEV_IVAL(lev) (1 << (lev))
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#define EHCI_HASH_SIZE 128
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#define EHCI_COMPANION_MAX 8
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@ -99,8 +113,11 @@ typedef struct ehci_softc {
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struct usbd_bus *sc_comps[EHCI_COMPANION_MAX];
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usb_dma_t sc_fldma;
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ehci_link_t *sc_flist;
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u_int sc_flsize;
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struct ehci_soft_islot sc_islots[EHCI_INTRQHS];
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LIST_HEAD(, ehci_xfer) sc_intrhead;
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ehci_soft_qh_t *sc_freeqhs;
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