Merge commit e578d0fd2 from llvm git (by Simon Atanasyan):
[mips] Fix `__mips_isa_rev` macros value for Octeon CPU This is one of the upstream changes needed for adding support for the OCTEON+ CPU type, so that we can test Clang builds using the most commonly available FreeBSD/mips64 reference platform, the Edge Router Lite. Requested by: kevans MFC after: 1 month X-MFC-With: r353358
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=354983
@ -62,7 +62,7 @@ void MipsTargetInfo::fillValidCPUList(
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unsigned MipsTargetInfo::getISARev() const {
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return llvm::StringSwitch<unsigned>(getCPU())
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.Cases("mips32", "mips64", 1)
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.Cases("mips32r2", "mips64r2", 2)
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.Cases("mips32r2", "mips64r2", "octeon", 2)
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.Cases("mips32r3", "mips64r3", 3)
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.Cases("mips32r5", "mips64r5", 5)
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.Cases("mips32r6", "mips64r6", 6)
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