Explicitly acknowledge MSI completion, as required by SiI3124 datasheet.
It makes MSI working there. Later (and cheaper) PCIe chips (3132/3531) still randomly crashing system in few seconds of high MSI rates, generating something inaporopriate, like NMI or "Fatal trap 30".
This commit is contained in:
parent
f1a6fd5d07
commit
3005368137
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=200223
@ -143,6 +143,7 @@ siis_attach(device_t dev)
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if (!(ctlr->r_gmem = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
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&ctlr->r_grid, RF_ACTIVE)))
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return (ENXIO);
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ctlr->gctl = ATA_INL(ctlr->r_gmem, SIIS_GCTL);
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/* Channels memory */
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ctlr->r_rid = PCIR_BAR(2);
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if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
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@ -221,7 +222,8 @@ siis_suspend(device_t dev)
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bus_generic_suspend(dev);
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/* Put controller into reset state. */
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ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, SIIS_GCTL_GRESET);
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ctlr->gctl |= SIIS_GCTL_GRESET;
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ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl);
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return 0;
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}
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@ -231,10 +233,13 @@ siis_resume(device_t dev)
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struct siis_controller *ctlr = device_get_softc(dev);
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/* Put controller into reset state. */
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ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, SIIS_GCTL_GRESET);
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ctlr->gctl |= SIIS_GCTL_GRESET;
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ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl);
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DELAY(10000);
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/* Get controller out of reset state and enable port interrupts. */
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ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, 0x0000000f);
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ctlr->gctl &= ~(SIIS_GCTL_GRESET | SIIS_GCTL_I2C_IE);
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ctlr->gctl |= 0x0000000f;
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ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl);
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return (bus_generic_resume(dev));
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}
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@ -288,6 +293,11 @@ siis_intr(void *data)
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ctlr->interrupt[unit].function(arg);
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}
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}
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/* Acknowledge interrupt, if MSI enabled. */
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if (ctlr->irq.r_irq_rid) {
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ATA_OUTL(ctlr->r_gmem, SIIS_GCTL,
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ctlr->gctl | SIIS_GCTL_MSIACK);
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}
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}
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static struct resource *
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@ -403,6 +403,7 @@ struct siis_controller {
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} irq;
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int quirks;
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int channels;
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uint32_t gctl;
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struct {
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void (*function)(void *);
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void *argument;
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