Bit mask definitions for firmware versioning.
Added versioning info to the MIB sizes array so that both raycontrol and if_ray have a better chance of not sending duff data to the ECF.
This commit is contained in:
Duncan Barclay
parent
e1a7927f55
commit
307c64c7d4
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=59599
@ -32,6 +32,15 @@
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*
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*/
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/*
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* Bit mask definitions for firmware versioning
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*/
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#define RAY_V4 0x1
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#define RAY_V5 0x2
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/*
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* MIB stuctures
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*/
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struct ray_mib_common_head { /*Offset*/ /*Size*/
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u_int8_t mib_net_type; /*00*/
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u_int8_t mib_ap_status; /*01*/
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@ -221,9 +230,9 @@ struct ray_mib_5 {
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"Scan mode", \
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"APM mode", \
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"MAC address", \
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"FRAG_THRESH", \
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"DWELL_TIME", \
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"BEACON_PERIOD", \
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"Fragmentation threshold", \
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"Dwell tIME", \
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"Beacon period", \
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"DTIM_INTERVAL", \
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"MAX_RETRY", \
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"ACK_TIMO", \
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@ -336,7 +345,7 @@ struct ray_mib_5 {
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"", \
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"Current PRIV_START", \
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"Current PRIV_JOIN", \
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"N/A", \
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"", \
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"N/A", \
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"Desired DEF_TXRATE", \
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"Desired ENCRYPT", \
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@ -347,72 +356,82 @@ struct ray_mib_5 {
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}
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/*
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* Sizes for each MIB element
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* Applicable versions and work size for each MIB element
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*/
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#define RAY_MIB_SIZES { \
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1, /* RAY_MIB_NET_TYPE */ \
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1, /* RAY_MIB_AP_STATUS */ \
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IEEE80211_NWID_LEN, /* RAY_MIB_SSID */ \
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1, /* RAY_MIB_SCAN_MODE */ \
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1, /* RAY_MIB_APM_MODE */ \
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ETHER_ADDR_LEN,/* RAY_MIB_MAC_ADDR */ \
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2, /* RAY_MIB_FRAG_THRESH */ \
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2, /* RAY_MIB_DWELL_TIME */ \
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2, /* RAY_MIB_BEACON_PERIOD */ \
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1, /* RAY_MIB_DTIM_INTERVAL */ \
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1, /* RAY_MIB_MAX_RETRY */ \
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1, /* RAY_MIB_ACK_TIMO */ \
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1, /* RAY_MIB_SIFS */ \
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1, /* RAY_MIB_DIFS */ \
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1, /* RAY_MIB_PIFS */ \
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2, /* RAY_MIB_RTS_THRESH */ \
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2, /* RAY_MIB_SCAN_DWELL */ \
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2, /* RAY_MIB_SCAN_MAX_DWELL */ \
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1, /* RAY_MIB_ASSOC_TIMO */ \
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1, /* RAY_MIB_ADHOC_SCAN_CYCLE */ \
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1, /* RAY_MIB_INFRA_SCAN_CYCLE */ \
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1, /* RAY_MIB_INFRA_SUPER_SCAN_CYCLE */ \
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1, /* RAY_MIB_PROMISC */ \
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2, /* RAY_MIB_UNIQ_WORD */ \
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1, /* RAY_MIB_SLOT_TIME */ \
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1, /* RAY_MIB_ROAM_LOW_SNR_THRESH */ \
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1, /* RAY_MIB_LOW_SNR_COUNT */ \
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1, /* RAY_MIB_INFRA_MISSED_BEACON_COUNT */ \
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1, /* RAY_MIB_ADHOC_MISSED_BEACON_COUNT */ \
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1, /* RAY_MIB_COUNTRY_CODE */ \
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1, /* RAY_MIB_HOP_SEQ */ \
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1, /* RAY_MIB_HOP_SEQ_LEN */ \
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2, /* RAY_MIB_CW_MAX */ \
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2, /* RAY_MIB_CW_MIN */ \
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1, /* RAY_MIB_NOISE_FILTER_GAIN */ \
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1, /* RAY_MIB_NOISE_LIMIT_OFFSET */ \
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1, /* RAY_MIB_RSSI_THRESH_OFFSET */ \
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1, /* RAY_MIB_BUSY_THRESH_OFFSET */ \
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1, /* RAY_MIB_SYNC_THRESH */ \
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1, /* RAY_MIB_TEST_MODE */ \
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1, /* RAY_MIB_TEST_MIN_CHAN */ \
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1, /* RAY_MIB_TEST_MAX_CHAN */ \
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1, /* RAY_MIB_ALLOW_PROBE_RESP */ \
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1, /* RAY_MIB_PRIVACY_MUST_START */ \
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1, /* RAY_MIB_PRIVACY_CAN_JOIN */ \
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8, /* RAY_MIB_BASIC_RATE_SET */ \
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1, /* RAY_MIB_VERSION */ \
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ETHER_ADDR_LEN, /* RAY_MIB_CUR_BSSID */ \
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1, /* RAY_MIB_CUR_INITED */ \
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1, /* RAY_MIB_CUR_DEF_TXRATE */ \
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1, /* RAY_MIB_CUR_ENCRYPT */ \
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1, /* RAY_MIB_CUR_NET_TYPE */ \
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IEEE80211_NWID_LEN, /* RAY_MIB_CUR_SSID */ \
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1, /* RAY_MIB_CUR_PRIV_START */ \
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1, /* RAY_MIB_CUR_PRIV_JOIN */ \
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ETHER_ADDR_LEN, /* RAY_MIB_DES_BSSID */ \
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1, /* RAY_MIB_DES_INITED */ \
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1, /* RAY_MIB_DES_DEF_TXRATE */ \
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1, /* RAY_MIB_DES_ENCRYPT */ \
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1, /* RAY_MIB_DES_NET_TYPE */ \
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IEEE80211_NWID_LEN, /* RAY_MIB_DES_SSID */ \
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1, /* RAY_MIB_DES_PRIV_START */ \
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1 /* RAY_MIB_DES_PRIV_JOIN */ \
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#define RAY_MIB_INFO_SIZ4 1
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#define RAY_MIB_INFO_SIZ5 2
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#define RAY_MIB_SIZE(info, mib, version) \
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info[(mib)][(version & RAY_V4)?RAY_MIB_INFO_SIZ4:RAY_MIB_INFO_SIZ5]
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#define RAY_MIB_INFO { \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_NET_TYPE */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_AP_STATUS */ \
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{RAY_V4|RAY_V5, IEEE80211_NWID_LEN, \
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IEEE80211_NWID_LEN},/* RAY_MIB_SSID */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_SCAN_MODE */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_APM_MODE */ \
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{RAY_V4|RAY_V5, ETHER_ADDR_LEN, \
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ETHER_ADDR_LEN},/* RAY_MIB_MAC_ADDR */ \
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{RAY_V4|RAY_V5, 2, 2}, /* RAY_MIB_FRAG_THRESH */ \
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{RAY_V4|RAY_V5, 2, 2}, /* RAY_MIB_DWELL_TIME */ \
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{RAY_V4|RAY_V5, 2, 2}, /* RAY_MIB_BEACON_PERIOD */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_DTIM_INTERVAL */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_MAX_RETRY */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_ACK_TIMO */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_SIFS */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_DIFS */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_PIFS */ \
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{RAY_V4|RAY_V5, 2, 2}, /* RAY_MIB_RTS_THRESH */ \
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{RAY_V4|RAY_V5, 2, 2}, /* RAY_MIB_SCAN_DWELL */ \
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{RAY_V4|RAY_V5, 2, 2}, /* RAY_MIB_SCAN_MAX_DWELL */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_ASSOC_TIMO */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_ADHOC_SCAN_CYCLE */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_INFRA_SCAN_CYCLE */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_INFRA_SUPER_SCAN_CYCLE */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_PROMISC */ \
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{RAY_V4|RAY_V5, 2, 2}, /* RAY_MIB_UNIQ_WORD */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_SLOT_TIME */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_ROAM_LOW_SNR_THRESH */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_LOW_SNR_COUNT */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_INFRA_MISSED_BEACON_COUNT */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_ADHOC_MISSED_BEACON_COUNT */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_COUNTRY_CODE */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_HOP_SEQ */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_HOP_SEQ_LEN */ \
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{RAY_V4|RAY_V5, 1, 2}, /* RAY_MIB_CW_MAX */ \
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{RAY_V4|RAY_V5, 1, 2}, /* RAY_MIB_CW_MIN */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_NOISE_FILTER_GAIN */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_NOISE_LIMIT_OFFSET */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_RSSI_THRESH_OFFSET */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_BUSY_THRESH_OFFSET */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_SYNC_THRESH */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_TEST_MODE */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_TEST_MIN_CHAN */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_TEST_MAX_CHAN */ \
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{ RAY_V5, 0, 1}, /* RAY_MIB_ALLOW_PROBE_RESP */ \
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{ RAY_V5, 0, 1}, /* RAY_MIB_PRIVACY_MUST_START */ \
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{ RAY_V5, 0, 1}, /* RAY_MIB_PRIVACY_CAN_JOIN */ \
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{ RAY_V5, 0, 8}, /* RAY_MIB_BASIC_RATE_SET */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_VERSION */ \
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{RAY_V4|RAY_V5, ETHER_ADDR_LEN, \
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ETHER_ADDR_LEN},/* RAY_MIB_CUR_BSSID */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_CUR_INITED */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_CUR_DEF_TXRATE */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_CUR_ENCRYPT */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_CUR_NET_TYPE */ \
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{RAY_V4|RAY_V5, IEEE80211_NWID_LEN, \
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IEEE80211_NWID_LEN}, /* RAY_MIB_CUR_SSID */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_CUR_PRIV_START */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_CUR_PRIV_JOIN */ \
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{RAY_V4|RAY_V5, ETHER_ADDR_LEN, \
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ETHER_ADDR_LEN},/* RAY_MIB_DES_BSSID */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_DES_INITED */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_DES_DEF_TXRATE */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_DES_ENCRYPT */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_DES_NET_TYPE */ \
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{RAY_V4|RAY_V5, IEEE80211_NWID_LEN, \
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IEEE80211_NWID_LEN}, /* RAY_MIB_DES_SSID */ \
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{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_DES_PRIV_START */ \
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{RAY_V4|RAY_V5, 1, 1} /* RAY_MIB_DES_PRIV_JOIN */ \
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}
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/*
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@ -999,10 +1018,6 @@ struct ray_stats_req {
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/* device can possibly return up to 255 */
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#define RAY_FAILCAUSE_EDEVSTOP 256
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#ifdef KERNEL
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#define RAY_FAILCAUSE_WAITING 257
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#endif
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/* Get a param the data is a ray_param_req structure */
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#define SIOCSRAYPARAM SIOCSIFGENERIC
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#define SIOCGRAYPARAM SIOCGIFGENERIC
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