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Switch BERI Programmable Interrupt Controller to INTRNG.

Browse Source 
Sponsored by:	DARPA, AFRL
This commit is contained in:
Ruslan Bukin 2017-04-18 17:20:03 +00:00
parent 99b8bccddc
commit 31cfa79fab
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=317095
9 changed files with 329 additions and 1341 deletions
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41
sys/boot/fdt/dts/mips/beri-netfpga.dts
View File

@ -87,30 +87,35 @@
reg = <0x0 0x0FFFFFFF>; // ~256M at 0x0
};
cpuintc: cpuintc@0 {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
compatible = "mti,cpu-interrupt-controller";
};
beripic: beripic@7f804000 {
compatible = "sri-cambridge,beri-pic";
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
reg = <0x7f804000 0x400
0x7f806000 0x10
0x7f806080 0x10
0x7f806100 0x10>;
interrupts = < 2 3 4 5 6 >;
hard-interrupt-sources = <64>;
soft-interrupt-sources = <64>;
interrupt-parent = <&cpuintc>;
};
soc {
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <1>;
/*
* Declare mips,mips4k since BERI doesn't (yet) have a PIC, so
* we use mips4k coprocessor 0 interrupt management directly.
*/
compatible = "simple-bus", "mips,mips4k";
beripic: beripic@7f804000 {
compatible = "sri-cambridge,beri-pic";
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
reg = <0x7f804000 0x400
0x7f806000 0x10
0x7f806080 0x10
0x7f806100 0x10>;
interrupts = <0 1 2 3 4>;
hard-interrupt-sources = <64>;
soft-interrupt-sources = <64>;
};
ranges;
serial0: serial@7f000000 {
compatible = "altera,jtag_uart-11_0";

41
sys/boot/fdt/dts/mips/beri-sim.dts
View File

@ -85,30 +85,35 @@
reg = <0x0 0x4000000>; // 64M at 0x0
};
cpuintc: cpuintc@0 {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
compatible = "mti,cpu-interrupt-controller";
};
beripic0: beripic@7f804000 {
compatible = "sri-cambridge,beri-pic";
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
reg = <0x7f804000 0x400
0x7f806000 0x10
0x7f806080 0x10
0x7f806100 0x10>;
interrupts = < 2 3 4 5 6 >;
hard-interrupt-sources = <64>;
soft-interrupt-sources = <64>;
interrupt-parent = <&cpuintc>;
};
soc {
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <1>;
/*
* Declare mips,mips4k since BERI doesn't (yet) have a PIC, so
* we use mips4k coprocessor 0 interrupt management directly.
*/
compatible = "simple-bus", "mips,mips4k";
beripic0: beripic@7f804000 {
compatible = "sri-cambridge,beri-pic";
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
reg = <0x7f804000 0x400
0x7f806000 0x10
0x7f806080 0x10
0x7f806100 0x10>;
interrupts = <0 1 2 3 4>;
hard-interrupt-sources = <64>;
soft-interrupt-sources = <64>;
};
ranges;
serial@7f000000 {
compatible = "altera,jtag_uart-11_0";

41
sys/boot/fdt/dts/mips/beripad-de4.dts
View File

@ -85,30 +85,35 @@
reg = <0x0 0x40000000>; // 1G at 0x0
};
cpuintc: cpuintc@0 {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
compatible = "mti,cpu-interrupt-controller";
};
beripic0: beripic@7f804000 {
compatible = "sri-cambridge,beri-pic";
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
reg = <0x7f804000 0x400
0x7f806000 0x10
0x7f806080 0x10
0x7f806100 0x10>;
interrupts = < 2 3 4 5 6 >;
hard-interrupt-sources = <64>;
soft-interrupt-sources = <64>;
interrupt-parent = <&cpuintc>;
};
soc {
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <1>;
/*
* Declare mips,mips4k since BERI doesn't (yet) have a PIC, so
* we use mips4k coprocessor 0 interrupt management directly.
*/
compatible = "simple-bus", "mips,mips4k";
beripic0: beripic@7f804000 {
compatible = "sri-cambridge,beri-pic";
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
reg = <0x7f804000 0x400
0x7f806000 0x10
0x7f806080 0x10
0x7f806100 0x10>;
interrupts = <0 1 2 3 4>;
hard-interrupt-sources = <64>;
soft-interrupt-sources = <64>;
};
ranges;
serial@7f002100 {
compatible = "ns16550";

41
sys/boot/fdt/dts/mips/beripad-sockit.dts
View File

@ -83,30 +83,35 @@
reg = <0x0 0x10000000>; /* 256MB at 0x0 */
};
cpuintc: cpuintc@0 {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
compatible = "mti,cpu-interrupt-controller";
};
beripic0: beripic@7f804000 {
compatible = "sri-cambridge,beri-pic";
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
reg = <0x0 0x7f804000 0x0 0x400
0x0 0x7f806000 0x0 0x10
0x0 0x7f806080 0x0 0x10
0x0 0x7f806100 0x0 0x10>;
interrupts = < 2 3 4 5 6 >;
hard-interrupt-sources = <64>;
soft-interrupt-sources = <64>;
interrupt-parent = <&cpuintc>;
};
soc {
#address-cells = <2>;
#size-cells = <2>;
#interrupt-cells = <1>;
/*
* Declare mips,mips4k since BERI doesn't (yet) have a PIC, so
* we use mips4k coprocessor 0 interrupt management directly.
*/
compatible = "simple-bus", "mips,mips4k";
beripic0: beripic@7f804000 {
compatible = "sri-cambridge,beri-pic";
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
reg = <0x0 0x7f804000 0x0 0x400
0x0 0x7f806000 0x0 0x10
0x0 0x7f806080 0x0 0x10
0x0 0x7f806100 0x0 0x10>;
interrupts = <0 1 2 3 4>;
hard-interrupt-sources = <64>;
soft-interrupt-sources = <64>;
};
ranges;
pio0: pio@7f020000 {
compatible = "altr,pio";

807
sys/mips/beri/beri_pic.c
View File

@ -1,4 +1,5 @@
/*-
* Copyright (c) 2017 Ruslan Bukin <br@bsdpad.com>
* Copyright (c) 2013 SRI International
* All rights reserved.
*
@ -28,6 +29,8 @@
* SUCH DAMAGE.
*/
#include "opt_platform.h"
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
@ -37,221 +40,118 @@ __FBSDID("$FreeBSD$");
#include <sys/malloc.h>
#include <sys/module.h>
#include <sys/mutex.h>
#include <sys/proc.h>
#include <sys/systm.h>
#include <sys/bus.h>
#include <machine/bus.h>
#include <machine/intr_machdep.h>
#include <machine/intr.h>
#ifdef SMP
#include <mips/beri/beri_mp.h>
#endif
#include <dev/fdt/fdt_common.h>
#include <dev/ofw/openfirm.h>
#include <dev/ofw/ofw_bus.h>
#include <dev/ofw/ofw_bus_subr.h>
#include <dev/fdt/fdt_common.h>
#include "pic_if.h"
#include "fdt_ic_if.h"
#define BP_NUM_HARD_IRQS 5
#define BP_NUM_IRQS 32
/* We use hard irqs 15-31 as soft */
#define BP_FIRST_SOFT 16
#define BP_CFG_IRQ_S 0
#define BP_CFG_IRQ_M (0xf << BP_CFG_IRQ_S)
#define BP_CFG_TID_S 8
#define BP_CFG_TID_M (0x7FFFFF << BP_CFG_TID_S)
#define BP_CFG_ENABLE (1 << 31)
enum {
BP_CFG,
BP_IP_READ,
BP_IP_SET,
BP_IP_CLEAR
};
struct beripic_softc;
static uint64_t bp_read_cfg(struct beripic_softc *, int);
static void bp_write_cfg(struct beripic_softc *, int, uint64_t);
static void bp_detach_resources(device_t);
static char *bp_strconfig(uint64_t, char *, size_t);
static void bp_config_source(device_t, int, int, u_long, u_long);
#ifdef __mips__
static void bp_set_counter_name(device_t, device_t, int);
#endif
struct beri_pic_isrc {
struct intr_irqsrc isrc;
u_int irq;
uint32_t mips_hard_irq;
};
static int beripic_fdt_probe(device_t);
static int beripic_fdt_attach(device_t);
static int beripic_activate_intr(device_t, struct resource *);
static struct resource *
beripic_alloc_intr(device_t, device_t, int *, u_long, u_int);
static int beripic_config_intr(device_t, int, enum intr_trigger,
enum intr_polarity);
static int beripic_release_intr(device_t, struct resource *);
static int beripic_setup_intr(device_t, device_t, struct resource *,
int, driver_filter_t *, driver_intr_t *, void *, void **);
static int beripic_teardown_intr(device_t, device_t, struct resource *,
void *);
static int beripic_filter(void *);
static void beripic_intr(void *);
#define BP_MAX_HARD_IRQS 6
#define BP_FIRST_SOFT 64
struct hirq {
uint32_t irq;
struct beripic_softc *sc;
};
struct beripic_softc {
device_t bp_dev;
struct resource *bp_cfg_res;
struct resource *bp_read_res;
struct resource *bp_set_res;
struct resource *bp_clear_res;
int bp_cfg_rid;
int bp_read_rid;
int bp_set_rid;
int bp_clear_rid;
bus_space_tag_t bp_cfg_bst;
bus_space_tag_t bp_read_bst;
bus_space_tag_t bp_set_bst;
bus_space_tag_t bp_clear_bst;
bus_space_handle_t bp_cfg_bsh;
bus_space_handle_t bp_read_bsh;
bus_space_handle_t bp_set_bsh;
bus_space_handle_t bp_clear_bsh;
struct resource *bp_irqs[BP_MAX_HARD_IRQS];
int bp_irq_rids[BP_MAX_HARD_IRQS];
int bp_nirqs;
int bp_next_irq;
int bp_next_tid;
int bp_nthreads;
int bp_nhard;
int bp_nsoft;
int bp_nsrcs;
struct rman bp_src_rman;
#ifdef __mips__
mips_intrcnt_t *bp_counters;
#endif
struct mtx bp_cfgmtx;
device_t dev;
uint32_t nirqs;
struct beri_pic_isrc irqs[BP_NUM_IRQS];
struct resource *res[4 + BP_NUM_HARD_IRQS];
void *ih[BP_NUM_HARD_IRQS];
struct hirq hirq[BP_NUM_HARD_IRQS];
uint8_t mips_hard_irq_idx;
};
struct beripic_intr_arg {
driver_filter_t *filter;
driver_intr_t *intr;
void *arg;
struct resource *irq;
#ifdef __mips__
mips_intrcnt_t counter;
#endif
static struct resource_spec beri_pic_spec[] = {
{ SYS_RES_MEMORY, 0, RF_ACTIVE },
{ SYS_RES_MEMORY, 1, RF_ACTIVE },
{ SYS_RES_MEMORY, 2, RF_ACTIVE },
{ SYS_RES_MEMORY, 3, RF_ACTIVE },
{ SYS_RES_IRQ, 0, RF_ACTIVE },
{ SYS_RES_IRQ, 1, RF_ACTIVE },
{ SYS_RES_IRQ, 2, RF_ACTIVE },
{ SYS_RES_IRQ, 3, RF_ACTIVE },
{ SYS_RES_IRQ, 4, RF_ACTIVE },
{ -1, 0 }
};
struct beripic_cookie {
struct beripic_intr_arg *bpia;
struct resource *hirq;
void *cookie;
};
#define BP_CFG_MASK_E 0x80000000ull
#define BP_CFG_SHIFT_E 31
#define BP_CFG_MASK_TID 0x7FFFFF00ull /* Depends on CPU */
#define BP_CFG_SHIFT_TID 8
#define BP_CFG_MASK_IRQ 0x0000000Full
#define BP_CFG_SHIFT_IRQ 0
#define BP_CFG_VALID (BP_CFG_MASK_E|BP_CFG_MASK_TID|BP_CFG_MASK_IRQ)
#define BP_CFG_RESERVED ~BP_CFG_VALID
#define BP_CFG_ENABLED(cfg) (((cfg) & BP_CFG_MASK_E) >> BP_CFG_SHIFT_E)
#define BP_CFG_TID(cfg) (((cfg) & BP_CFG_MASK_TID) >> BP_CFG_SHIFT_TID)
#define BP_CFG_IRQ(cfg) (((cfg) & BP_CFG_MASK_IRQ) >> BP_CFG_SHIFT_IRQ)
MALLOC_DEFINE(M_BERIPIC, "beripic", "beripic memory");
static uint64_t
bp_read_cfg(struct beripic_softc *sc, int irq)
{
KASSERT((irq >= 0 && irq < sc->bp_nsrcs),
("IRQ of of range %d (0-%d)", irq, sc->bp_nsrcs - 1));
return (bus_space_read_8(sc->bp_cfg_bst, sc->bp_cfg_bsh, irq * 8));
}
static void
bp_write_cfg(struct beripic_softc *sc, int irq, uint64_t config)
{
KASSERT((irq >= 0 && irq < sc->bp_nsrcs),
("IRQ of of range %d (0-%d)", irq, sc->bp_nsrcs - 1));
bus_space_write_8(sc->bp_cfg_bst, sc->bp_cfg_bsh, irq * 8, config);
}
static void
bp_detach_resources(device_t dev)
{
struct beripic_softc *sc;
int i;
sc = device_get_softc(dev);
if (sc->bp_cfg_res != NULL) {
bus_release_resource(dev, SYS_RES_MEMORY, sc->bp_cfg_rid,
sc->bp_cfg_res);
sc->bp_cfg_res = NULL;
}
if (sc->bp_read_res != NULL) {
bus_release_resource(dev, SYS_RES_MEMORY, sc->bp_read_rid,
sc->bp_read_res);
sc->bp_read_res = NULL;
}
if (sc->bp_set_res != NULL) {
bus_release_resource(dev, SYS_RES_MEMORY, sc->bp_set_rid,
sc->bp_set_res);
sc->bp_set_res = NULL;
}
if (sc->bp_clear_res != NULL) {
bus_release_resource(dev, SYS_RES_MEMORY, sc->bp_clear_rid,
sc->bp_clear_res);
sc->bp_clear_res = NULL;
}
for (i = sc->bp_nirqs - 1; i >= 0; i--) {
bus_release_resource(dev, SYS_RES_IRQ, sc->bp_irq_rids[i],
sc->bp_irqs[i]);
}
sc->bp_nirqs = 0;
}
static char *
bp_strconfig(uint64_t config, char *configstr, size_t len)
{
if (snprintf(configstr, len, "%s tid: %llu hardintr %llu",
BP_CFG_ENABLED(config) ? "enabled" : "disabled",
BP_CFG_TID(config), BP_CFG_IRQ(config)) > len - 1)
return (NULL);
return (configstr);
}
static void
bp_config_source(device_t ic, int src, int enable, u_long tid, u_long irq)
{
struct beripic_softc *sc;
uint64_t config;
sc = device_get_softc(ic);
config = 0;
config |= enable << BP_CFG_SHIFT_E;
config |= tid << BP_CFG_SHIFT_TID;
config |= irq << BP_CFG_SHIFT_IRQ;
bp_write_cfg(sc, src, config);
}
#ifdef __mips__
static void
bp_set_counter_name(device_t ic, device_t child, int src)
{
struct beripic_softc *sc;
char name[MAXCOMLEN + 1];
sc = device_get_softc(ic);
if (snprintf(name, sizeof(name), "bp%dsrc%d%s%s%s",
device_get_unit(ic), src, src < sc->bp_nhard ? "" : "s",
child == NULL ? "" : " ",
child == NULL ? " " : device_get_nameunit(child)) >= sizeof(name))
name[sizeof(name) - 2] = '+';
mips_intrcnt_setname(sc->bp_counters[src], name);
}
#endif
static int
beripic_fdt_probe(device_t dev)
beri_pic_intr(void *arg)
{
struct beripic_softc *sc;
struct intr_irqsrc *isrc;
struct hirq *h;
uint64_t intr;
uint64_t reg;
int i;
h = arg;
sc = h->sc;
intr = bus_read_8(sc->res[BP_IP_READ], 0);
while ((i = fls(intr)) != 0) {
i--;
intr &= ~(1u << i);
isrc = &sc->irqs[i].isrc;
reg = bus_read_8(sc->res[BP_CFG], i * 8);
if ((reg & BP_CFG_IRQ_M) != h->irq) {
continue;
}
if ((reg & (BP_CFG_ENABLE)) == 0) {
continue;
}
if (intr_isrc_dispatch(isrc, curthread->td_intr_frame) != 0) {
device_printf(sc->dev, "Stray interrupt %u detected\n", i);
}
bus_write_8(sc->res[BP_IP_CLEAR], 0, (1 << i));
}
return (FILTER_HANDLED);
}
static int
beripic_probe(device_t dev)
{
if (!ofw_bus_status_okay(dev))
@ -261,443 +161,208 @@ beripic_fdt_probe(device_t dev)
return (ENXIO);
device_set_desc(dev, "BERI Programmable Interrupt Controller");
return (BUS_PROBE_DEFAULT);
}
static int
beripic_fdt_attach(device_t dev)
beripic_attach(device_t dev)
{
char configstr[64];
struct beripic_softc *sc;
struct fdt_ic *fic;
pcell_t nhard, nsoft;
phandle_t ph;
int error, i, src;
uint64_t config;
struct beri_pic_isrc *pic_isrc;
const char *name;
struct intr_irqsrc *isrc;
intptr_t xref;
uint32_t unit;
int err;
int i;
sc = device_get_softc(dev);
sc->bp_dev = dev;
sc->dev = dev;
mtx_init(&sc->bp_cfgmtx, "beripic config lock", NULL, MTX_DEF);
/*
* FDT lists CONFIG, IP_READ, IP_SET, and IP_CLEAR registers as
* seperate memory regions in that order.
*/
sc->bp_cfg_rid = 0;
sc->bp_cfg_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
&sc->bp_cfg_rid, RF_ACTIVE);
if (sc->bp_cfg_res == NULL) {
device_printf(dev, "failed to map config memory");
error = ENXIO;
goto err;
}
if (bootverbose)
device_printf(sc->bp_dev, "config region at mem %p-%p\n",
(void *)rman_get_start(sc->bp_cfg_res),
(void *)(rman_get_start(sc->bp_cfg_res) +
rman_get_size(sc->bp_cfg_res)));
sc->bp_read_rid = 1;
sc->bp_read_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
&sc->bp_read_rid, RF_ACTIVE);
if (sc->bp_read_res == NULL) {
device_printf(dev, "failed to map IP read memory");
error = ENXIO;
goto err;
}
if (bootverbose)
device_printf(sc->bp_dev, "IP read region at mem %p-%p\n",
(void *)rman_get_start(sc->bp_read_res),
(void *)(rman_get_start(sc->bp_read_res) +
rman_get_size(sc->bp_read_res)));
sc->bp_set_rid = 2;
sc->bp_set_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
&sc->bp_set_rid, RF_ACTIVE);
if (sc->bp_set_res == NULL) {
device_printf(dev, "failed to map IP read memory");
error = ENXIO;
goto err;
}
if (bootverbose)
device_printf(sc->bp_dev, "IP set region at mem %p-%p\n",
(void *)rman_get_start(sc->bp_set_res),
(void *)(rman_get_start(sc->bp_set_res) +
rman_get_size(sc->bp_set_res)));
sc->bp_clear_rid = 3;
sc->bp_clear_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
&sc->bp_clear_rid, RF_ACTIVE);
if (sc->bp_clear_res == NULL) {
device_printf(dev, "failed to map IP read memory");
error = ENXIO;
goto err;
}
if (bootverbose)
device_printf(sc->bp_dev, "IP clear region at mem %p-%p\n",
(void *)rman_get_start(sc->bp_clear_res),
(void *)(rman_get_start(sc->bp_clear_res) +
rman_get_size(sc->bp_clear_res)));
i = 0;
for (i = 0; i < BP_MAX_HARD_IRQS; i++) {
sc->bp_irq_rids[i] = i;
sc->bp_irqs[i] = bus_alloc_resource_any(dev, SYS_RES_IRQ,
&sc->bp_irq_rids[i], RF_ACTIVE | RF_SHAREABLE);
if (sc->bp_irqs[i] == NULL)
break;
}
if (i == 0) {
device_printf(dev, "failed to allocate any parent IRQs!");
error = ENXIO;
goto err;
}
sc->bp_nirqs = i;
ph = ofw_bus_gen_get_node(device_get_parent(dev), dev);
#ifndef SMP
sc->bp_nthreads = 1;
#else
sc->bp_nthreads = 1;
/* XXX: get nthreads from cpu(s) somehow */
#endif
if (OF_getprop(ph, "hard-interrupt-sources", &nhard, sizeof(nhard))
<= 0) {
device_printf(dev, "failed to get number of hard sources");
error = ENXIO;
goto err;
}
if (OF_getprop(ph, "soft-interrupt-sources", &nsoft, sizeof(nsoft))
<= 0) {
device_printf(dev, "failed to get number of soft sources");
error = ENXIO;
goto err;
if (bus_alloc_resources(dev, beri_pic_spec, sc->res)) {
device_printf(dev, "could not allocate resources\n");
return (ENXIO);
}
sc->bp_nhard = nhard;
sc->bp_nsoft = nsoft;
sc->bp_nsrcs = sc->bp_nhard + sc->bp_nsoft;
/* XXX: should deal with gap between hard and soft */
KASSERT(sc->bp_nhard <= BP_FIRST_SOFT,
("too many hard sources"));
KASSERT(rman_get_size(sc->bp_cfg_res) / 8 == sc->bp_nsrcs,
("config space size does not match sources"));
KASSERT(sc->bp_nhard % 64 == 0,
("Non-multiple of 64 intr counts not supported"));
KASSERT(sc->bp_nsoft % 64 == 0,
("Non-multiple of 64 intr counts not supported"));
if (bootverbose)
device_printf(dev, "%d hard and %d soft sources\n",
sc->bp_nhard, sc->bp_nsoft);
xref = OF_xref_from_node(ofw_bus_get_node(dev));
name = device_get_nameunit(dev);
unit = device_get_unit(dev);
sc->nirqs = BP_NUM_IRQS;
#ifdef __mips__
sc->bp_counters = malloc(sizeof(*sc->bp_counters) * sc->bp_nsrcs,
M_BERIPIC, M_WAITOK|M_ZERO);
for (i = 0; i < sc->bp_nsrcs; i++) {
sc->bp_counters[i] = mips_intrcnt_create("");
bp_set_counter_name(dev, NULL, i);
}
#endif
sc->bp_src_rman.rm_start = 0;
sc->bp_src_rman.rm_end = sc->bp_nsrcs - 1;
sc->bp_src_rman.rm_type = RMAN_ARRAY;
sc->bp_src_rman.rm_descr = "Interrupt source";
if (rman_init(&(sc->bp_src_rman)) != 0 ||
rman_manage_region(&(sc->bp_src_rman), 0, sc->bp_nsrcs - 1) != 0) {
device_printf(dev, "Failed to set up sources rman");
error = ENXIO;
goto err;
}
for (i = 0; i < sc->nirqs; i++) {
sc->irqs[i].irq = i;
isrc = &sc->irqs[i].isrc;
sc->bp_cfg_bst = rman_get_bustag(sc->bp_cfg_res);
sc->bp_cfg_bsh = rman_get_bushandle(sc->bp_cfg_res);
sc->bp_read_bst = rman_get_bustag(sc->bp_read_res);
sc->bp_read_bsh = rman_get_bushandle(sc->bp_read_res);
sc->bp_set_bst = rman_get_bustag(sc->bp_set_res);
sc->bp_set_bsh = rman_get_bushandle(sc->bp_set_res);
sc->bp_clear_bst = rman_get_bustag(sc->bp_clear_res);
sc->bp_clear_bsh = rman_get_bushandle(sc->bp_clear_res);
for (src = 0; src < sc->bp_nsrcs; src++) {
config = bp_read_cfg(sc, src);
if (config == 0)
continue;
if (bootverbose) {
device_printf(dev, "initial config: src %d: %s\n", src,
bp_strconfig(config, configstr, sizeof(configstr)));
if (config & BP_CFG_RESERVED)
device_printf(dev,
"reserved bits not 0: 0x%016jx\n",
(uintmax_t) config);
/* Assign mips hard irq number. */
pic_isrc = (struct beri_pic_isrc *)isrc;
pic_isrc->mips_hard_irq = sc->mips_hard_irq_idx++;
/* Last IRQ is used for IPIs. */
if (sc->mips_hard_irq_idx >= (BP_NUM_HARD_IRQS - 1)) {
sc->mips_hard_irq_idx = 0;
}
bp_config_source(dev, src, 0, 0, 0);
err = intr_isrc_register(isrc, sc->dev,
0, "pic%d,%d", unit, i);
bus_write_8(sc->res[BP_CFG], i * 8, 0);
}
fic = malloc(sizeof(*fic), M_BERIPIC, M_WAITOK|M_ZERO);
fic->iph = ph;
fic->dev = dev;
SLIST_INSERT_HEAD(&fdt_ic_list_head, fic, fdt_ics);
/*
* Now, when everything is initialized, it's right time to
* register interrupt controller to interrupt framefork.
*/
if (intr_pic_register(dev, xref) == NULL) {
device_printf(dev, "could not register PIC\n");
return (ENXIO);
}
/* Last IRQ is used for IPIs. */
for (i = 0; i < (BP_NUM_HARD_IRQS - 1); i++) {
sc->hirq[i].sc = sc;
sc->hirq[i].irq = i;
if (bus_setup_intr(dev, sc->res[4+i], INTR_TYPE_CLK,
beri_pic_intr, NULL, &sc->hirq[i], sc->ih[i])) {
device_printf(dev, "could not setup irq handler\n");
intr_pic_deregister(dev, xref);
return (ENXIO);
}
}
return (0);
err:
bp_detach_resources(dev);
return (error);
}
static struct resource *
beripic_alloc_intr(device_t ic, device_t child, int *rid, u_long irq,
u_int flags)
static void
beri_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
{
struct beri_pic_isrc *pic_isrc;
struct beripic_softc *sc;
uint64_t reg;
sc = device_get_softc(dev);
pic_isrc = (struct beri_pic_isrc *)isrc;
reg = BP_CFG_ENABLE;
reg |= (pic_isrc->mips_hard_irq << BP_CFG_IRQ_S);
bus_write_8(sc->res[BP_CFG], pic_isrc->irq * 8, reg);
}
static void
beri_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
{
struct beri_pic_isrc *pic_isrc;
struct beripic_softc *sc;
uint64_t reg;
sc = device_get_softc(dev);
pic_isrc = (struct beri_pic_isrc *)isrc;
reg = bus_read_8(sc->res[BP_CFG], pic_isrc->irq * 8);
reg &= ~BP_CFG_ENABLE;
bus_write_8(sc->res[BP_CFG], pic_isrc->irq * 8, reg);
}
static int
beri_pic_map_intr(device_t dev, struct intr_map_data *data,
struct intr_irqsrc **isrcp)
{
struct beripic_softc *sc;
struct resource *rv;
struct intr_map_data_fdt *daf;
uint32_t irq;
sc = device_get_softc(ic);
sc = device_get_softc(dev);
daf = (struct intr_map_data_fdt *)data;
rv = rman_reserve_resource(&(sc->bp_src_rman), irq, irq, 1, flags,
child);
if (rv == NULL)
printf("%s: could not reserve source interrupt for %s\n",
__func__, device_get_nameunit(child));
rman_set_rid(rv, *rid);
if ((flags & RF_ACTIVE) &&
beripic_activate_intr(ic, rv) != 0) {
printf("%s: could not activate interrupt\n", __func__);
rman_release_resource(rv);
return (NULL);
}
return (rv);
}
static int
beripic_release_intr(device_t ic, struct resource *r)
{
return (rman_release_resource(r));
}
static int
beripic_activate_intr(device_t ic, struct resource *r)
{
return (rman_activate_resource(r));
}
static int
beripic_deactivate_intr(device_t ic, struct resource *r)
{
return (rman_deactivate_resource(r));
}
static int
beripic_config_intr(device_t dev, int irq, enum intr_trigger trig,
enum intr_polarity pol)
{
if (trig != INTR_TRIGGER_CONFORM || pol != INTR_POLARITY_CONFORM)
if (data == NULL || data->type != INTR_MAP_DATA_FDT ||
daf->ncells != 1 || daf->cells[0] >= sc->nirqs)
return (EINVAL);
irq = daf->cells[0];
*isrcp = &sc->irqs[irq].isrc;
return (0);
}
static int
beripic_setup_intr(device_t ic, device_t child, struct resource *irq,
int flags, driver_filter_t *filter, driver_intr_t *intr, void *arg,
void **cookiep)
static void
beri_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
{
beri_pic_enable_intr(dev, isrc);
}
static void
beri_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
{
beri_pic_disable_intr(dev, isrc);
}
#ifdef SMP
void
beripic_setup_ipi(device_t dev, u_int tid, u_int ipi_irq)
{
struct beripic_softc *sc;
struct beripic_intr_arg *bpia;
struct beripic_cookie *bpc;
int error;
u_long hirq, src, tid;
uint64_t reg;
sc = device_get_softc(ic);
sc = device_get_softc(dev);
src = rman_get_start(irq);
KASSERT(src < sc->bp_nsrcs, ("source (%lu) out of range 0-%d",
src, sc->bp_nsrcs - 1));
bpia = malloc(sizeof(*bpia), M_BERIPIC, M_WAITOK|M_ZERO);
bpia->filter = filter;
bpia->intr = intr;
bpia->arg = arg;
bpia->irq = irq;
#ifdef __mips__
bpia->counter = sc->bp_counters[src];
bp_set_counter_name(ic, child, src);
#endif
bpc = malloc(sizeof(*bpc), M_BERIPIC, M_WAITOK|M_ZERO);
bpc->bpia = bpia;
mtx_lock(&(sc->bp_cfgmtx));
bpc->hirq = sc->bp_irqs[sc->bp_next_irq];
hirq = rman_get_start(bpc->hirq);
tid = sc->bp_next_tid;
error = BUS_SETUP_INTR(device_get_parent(ic), ic, bpc->hirq, flags,
beripic_filter, intr == NULL ? NULL : beripic_intr, bpia,
&(bpc->cookie));
if (error != 0)
goto err;
#ifdef NOTYET
#ifdef SMP
/* XXX: bind ithread to cpu */
sc->bp_next_tid++;
if (sc->bp_next_tid >= sc->bp_nthreads)
sc->bp_next_tid = 0;
#endif
#endif
if (sc->bp_next_tid == 0) {
sc->bp_next_irq++;
if (sc->bp_next_irq >= sc->bp_nirqs)
sc->bp_next_irq = 0;
}
mtx_unlock(&(sc->bp_cfgmtx));
*cookiep = bpc;
bp_config_source(ic, rman_get_start(irq), 1, tid, hirq);
return (0);
err:
free(bpc, M_BERIPIC);
free(bpia, M_BERIPIC);
return (error);
reg = (BP_CFG_ENABLE);
reg |= (ipi_irq << BP_CFG_IRQ_S);
reg |= (tid << BP_CFG_TID_S);
bus_write_8(sc->res[BP_CFG], ((BP_FIRST_SOFT + tid) * 8), reg);
}
static int
beripic_teardown_intr(device_t dev, device_t child, struct resource *irq,
void *cookie)
{
struct beripic_cookie *bpc;
int error;
bpc = cookie;
bp_config_source(dev, rman_get_start(irq), 0, 0, 0);
free(bpc->bpia, M_BERIPIC);
error = BUS_TEARDOWN_INTR(device_get_parent(dev), dev, bpc->hirq,
bpc->cookie);
free(bpc, M_BERIPIC);
return (error);
}
static int
beripic_filter(void *arg)
{
struct beripic_intr_arg *bpic;
bpic = arg;
#ifdef __mips__
mips_intrcnt_inc(bpic->counter);
#endif
/* XXX: Add a check that our source is high */
if (bpic->filter == NULL)
return (FILTER_SCHEDULE_THREAD);
return (bpic->filter(bpic->arg));
}
static void
beripic_intr(void *arg)
{
struct beripic_intr_arg *bpic;
bpic = arg;
KASSERT(bpic->intr != NULL,
("%s installed, but no child intr", __func__));
bpic->intr(bpic->arg);
}
#ifdef SMP
static void
beripic_setup_ipi(device_t ic, u_int tid, u_int ipi_irq)
{
bp_config_source(ic, BP_FIRST_SOFT + tid, 1, tid, ipi_irq);
}
static void
beripic_send_ipi(device_t ic, u_int tid)
void
beripic_send_ipi(device_t dev, u_int tid)
{
struct beripic_softc *sc;
uint64_t bit;
sc = device_get_softc(ic);
sc = device_get_softc(dev);
KASSERT(tid < sc->bp_nsoft, ("tid (%d) too large\n", tid));
bit = (BP_FIRST_SOFT + tid);
KASSERT(bit < BP_NUM_IRQS, ("tid (%d) to large\n", tid));
bit = 1ULL << (tid % 64);
bus_space_write_8(sc->bp_set_bst, sc->bp_set_bsh,
(BP_FIRST_SOFT / 8) + (tid / 64), bit);
bus_write_8(sc->res[BP_IP_SET], 0x0, (1 << bit));
}
static void
beripic_clear_ipi(device_t ic, u_int tid)
void
beripic_clear_ipi(device_t dev, u_int tid)
{
struct beripic_softc *sc;
uint64_t bit;
sc = device_get_softc(ic);
sc = device_get_softc(dev);
KASSERT(tid < sc->bp_nsoft, ("tid (%d) to large\n", tid));
bit = (BP_FIRST_SOFT + tid);
KASSERT(bit < BP_NUM_IRQS, ("tid (%d) to large\n", tid));
bit = 1ULL << (tid % 64);
bus_space_write_8(sc->bp_clear_bst, sc->bp_clear_bsh,
(BP_FIRST_SOFT / 8) + (tid / 64), bit);
bus_write_8(sc->res[BP_IP_CLEAR], 0x0, (1 << bit));
}
#endif
devclass_t beripic_devclass;
static device_method_t beripic_fdt_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, beripic_fdt_probe),
DEVMETHOD(device_attach, beripic_fdt_attach),
DEVMETHOD(device_probe, beripic_probe),
DEVMETHOD(device_attach, beripic_attach),
DEVMETHOD(fdt_ic_activate_intr, beripic_activate_intr),
DEVMETHOD(fdt_ic_alloc_intr, beripic_alloc_intr),
DEVMETHOD(fdt_ic_config_intr, beripic_config_intr),
DEVMETHOD(fdt_ic_deactivate_intr, beripic_deactivate_intr),
DEVMETHOD(fdt_ic_release_intr, beripic_release_intr),
DEVMETHOD(fdt_ic_setup_intr, beripic_setup_intr),
DEVMETHOD(fdt_ic_teardown_intr, beripic_teardown_intr),
/* Interrupt controller interface */
DEVMETHOD(pic_enable_intr, beri_pic_enable_intr),
DEVMETHOD(pic_disable_intr, beri_pic_disable_intr),
DEVMETHOD(pic_map_intr, beri_pic_map_intr),
DEVMETHOD(pic_post_ithread, beri_pic_post_ithread),
DEVMETHOD(pic_pre_ithread, beri_pic_pre_ithread),
#ifdef SMP
DEVMETHOD(fdt_ic_setup_ipi, beripic_setup_ipi),
DEVMETHOD(fdt_ic_clear_ipi, beripic_clear_ipi),
DEVMETHOD(fdt_ic_send_ipi, beripic_send_ipi),
#endif
{ 0, 0 },
DEVMETHOD_END
};
static driver_t beripic_fdt_driver = {
devclass_t beripic_devclass;
static driver_t beripic_driver = {
"beripic",
beripic_fdt_methods,
sizeof(struct beripic_softc)
};
DRIVER_MODULE(beripic, simplebus, beripic_fdt_driver, beripic_devclass, 0, 0);
EARLY_DRIVER_MODULE(beripic, ofwbus, beripic_driver, beripic_devclass, 0, 0,
BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);

429
sys/mips/beri/beri_simplebus.c
View File

@ -1,429 +0,0 @@
/*-
* Copyright (c) 2009-2010 The FreeBSD Foundation
* All rights reserved.
*
* This software was developed by Semihalf under sponsorship from
* the FreeBSD Foundation.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include "opt_platform.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/ktr.h>
#include <sys/kernel.h>
#include <sys/module.h>
#include <sys/bus.h>
#include <sys/rman.h>
#include <sys/malloc.h>
#include <dev/ofw/ofw_bus.h>
#include <dev/ofw/ofw_bus_subr.h>
#include <dev/ofw/openfirm.h>
#include <dev/fdt/fdt_common.h>
#include "fdt_ic_if.h"
#include "ofw_bus_if.h"
#ifdef DEBUG
#define debugf(fmt, args...) do { printf("%s(): ", __func__); \
printf(fmt,##args); } while (0)
#else
#define debugf(fmt, args...)
#endif
static MALLOC_DEFINE(M_SIMPLEBUS, "simplebus", "simplebus devices information");
struct simplebus_softc {
int sc_addr_cells;
int sc_size_cells;
};
struct simplebus_devinfo {
struct ofw_bus_devinfo di_ofw;
struct resource_list di_res;
/* Interrupts sense-level info for this device */
struct fdt_sense_level di_intr_sl[DI_MAX_INTR_NUM];
};
/*
* Prototypes.
*/
static int simplebus_probe(device_t);
static int simplebus_attach(device_t);
static int simplebus_print_child(device_t, device_t);
static int simplebus_setup_intr(device_t, device_t, struct resource *, int,
driver_filter_t *, driver_intr_t *, void *, void **);
static int simplebus_teardown_intr(device_t, device_t, struct resource *,
void *);
static int simplebus_activate_resource(device_t, device_t, int, int,
struct resource *);
static struct resource *simplebus_alloc_resource(device_t, device_t, int,
int *, rman_res_t, rman_res_t, rman_res_t, u_int);
static int simplebus_deactivate_resource(device_t, device_t, int, int,
struct resource *);
static int simplebus_release_resource(device_t, device_t, int, int,
struct resource *);
static device_t simplebus_get_interrupt_parent(device_t);
static struct resource_list *simplebus_get_resource_list(device_t, device_t);
static ofw_bus_get_devinfo_t simplebus_get_devinfo;
/*
* Bus interface definition.
*/
static device_method_t simplebus_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, simplebus_probe),
DEVMETHOD(device_attach, simplebus_attach),
DEVMETHOD(device_detach, bus_generic_detach),
DEVMETHOD(device_shutdown, bus_generic_shutdown),
DEVMETHOD(device_suspend, bus_generic_suspend),
DEVMETHOD(device_resume, bus_generic_resume),
/* Bus interface */
DEVMETHOD(bus_print_child, simplebus_print_child),
DEVMETHOD(bus_alloc_resource, simplebus_alloc_resource),
DEVMETHOD(bus_release_resource, simplebus_release_resource),
DEVMETHOD(bus_activate_resource, simplebus_activate_resource),
DEVMETHOD(bus_deactivate_resource, simplebus_deactivate_resource),
DEVMETHOD(bus_setup_intr, simplebus_setup_intr),
DEVMETHOD(bus_teardown_intr, simplebus_teardown_intr),
DEVMETHOD(bus_get_resource_list, simplebus_get_resource_list),
/* OFW bus interface */
DEVMETHOD(ofw_bus_get_devinfo, simplebus_get_devinfo),
DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
{ 0, 0 }
};
static driver_t simplebus_driver = {
"simplebus",
simplebus_methods,
sizeof(struct simplebus_softc)
};
devclass_t simplebus_devclass;
DRIVER_MODULE(beri_simplebus, ofwbus, simplebus_driver, simplebus_devclass, 0,
0);
DRIVER_MODULE(beri_simplebus, simplebus, simplebus_driver, simplebus_devclass,
0, 0);
static int
simplebus_probe(device_t dev)
{
if (!ofw_bus_status_okay(dev))
return (ENXIO);
if (!ofw_bus_is_compatible(dev, "simple-bus"))
return (ENXIO);
device_set_desc(dev, "Flattened device tree simple bus (BERI version)");
return (BUS_PROBE_SPECIFIC);
}
static int
simplebus_attach(device_t dev)
{
device_t dev_child;
struct simplebus_devinfo *di;
struct simplebus_softc *sc;
phandle_t dt_node, dt_child;
sc = device_get_softc(dev);
/*
* Walk simple-bus and add direct subordinates as our children.
*/
dt_node = ofw_bus_get_node(dev);
for (dt_child = OF_child(dt_node); dt_child != 0;
dt_child = OF_peer(dt_child)) {
/* Check and process 'status' property. */
if (!(fdt_is_enabled(dt_child)))
continue;
if (!(fdt_pm_is_enabled(dt_child)))
continue;
di = malloc(sizeof(*di), M_SIMPLEBUS, M_WAITOK | M_ZERO);
if (ofw_bus_gen_setup_devinfo(&di->di_ofw, dt_child) != 0) {
free(di, M_SIMPLEBUS);
device_printf(dev, "could not set up devinfo\n");
continue;
}
resource_list_init(&di->di_res);
if (fdt_reg_to_rl(dt_child, &di->di_res)) {
device_printf(dev,
"%s: could not process 'reg' "
"property\n", di->di_ofw.obd_name);
ofw_bus_gen_destroy_devinfo(&di->di_ofw);
free(di, M_SIMPLEBUS);
continue;
}
if (ofw_bus_intr_to_rl(dev, dt_child, &di->di_res, NULL)) {
device_printf(dev, "%s: could not process "
"'interrupts' property\n", di->di_ofw.obd_name);
resource_list_free(&di->di_res);
ofw_bus_gen_destroy_devinfo(&di->di_ofw);
free(di, M_SIMPLEBUS);
continue;
}
/* Add newbus device for this FDT node */
dev_child = device_add_child(dev, NULL, -1);
if (dev_child == NULL) {
device_printf(dev, "could not add child: %s\n",
di->di_ofw.obd_name);
resource_list_free(&di->di_res);
ofw_bus_gen_destroy_devinfo(&di->di_ofw);
free(di, M_SIMPLEBUS);
continue;
}
#ifdef DEBUG
device_printf(dev, "added child: %s\n\n", di->di_ofw.obd_name);
#endif
device_set_ivars(dev_child, di);
}
return (bus_generic_attach(dev));
}
static int
simplebus_print_child(device_t dev, device_t child)
{
device_t ip;
struct simplebus_devinfo *di;
struct resource_list *rl;
int rv;
di = device_get_ivars(child);
rl = &di->di_res;
rv = 0;
rv += bus_print_child_header(dev, child);
rv += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx");
rv += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd");
if ((ip = simplebus_get_interrupt_parent(child)) != NULL)
rv += printf(" (%s)", device_get_nameunit(ip));
rv += bus_print_child_footer(dev, child);
return (rv);
}
static struct resource *
simplebus_alloc_resource(device_t bus, device_t child, int type, int *rid,
rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
{
device_t ic;
struct simplebus_devinfo *di;
struct resource_list_entry *rle;
/*
* Request for the default allocation with a given rid: use resource
* list stored in the local device info.
*/
if (RMAN_IS_DEFAULT_RANGE(start, end)) {
if ((di = device_get_ivars(child)) == NULL)
return (NULL);
if (type == SYS_RES_IOPORT)
type = SYS_RES_MEMORY;
rle = resource_list_find(&di->di_res, type, *rid);
if (rle == NULL) {
if (bootverbose)
device_printf(bus, "no default resources for "
"rid = %d, type = %d\n", *rid, type);
return (NULL);
}
start = rle->start;
end = rle->end;
count = rle->count;
}
if (type == SYS_RES_IRQ &&
(ic = simplebus_get_interrupt_parent(child)) != NULL)
return(FDT_IC_ALLOC_INTR(ic, child, rid, start, flags));
return (bus_generic_alloc_resource(bus, child, type, rid, start, end,
count, flags));
}
static int
simplebus_activate_resource(device_t dev, device_t child, int type, int rid,
struct resource *r)
{
device_t ic;
if (type == SYS_RES_IRQ &&
(ic = simplebus_get_interrupt_parent(child)) != NULL)
return (FDT_IC_ACTIVATE_INTR(ic, r));
return (bus_generic_activate_resource(dev, child, type, rid, r));
}
static int
simplebus_deactivate_resource(device_t dev, device_t child, int type, int rid,
struct resource *r)
{
device_t ic;
if (type == SYS_RES_IRQ &&
(ic = simplebus_get_interrupt_parent(child)) != NULL)
return (FDT_IC_DEACTIVATE_INTR(ic, r));
return (bus_generic_deactivate_resource(dev, child, type, rid, r));
}
static int
simplebus_release_resource(device_t dev, device_t child, int type, int rid,
struct resource *r)
{
device_t ic;
if (type == SYS_RES_IRQ &&
(ic = simplebus_get_interrupt_parent(child)) != NULL)
return (FDT_IC_RELEASE_INTR(ic, r));
return (bus_generic_release_resource(dev, child, type, rid, r));
}
static struct resource_list *
simplebus_get_resource_list(device_t bus, device_t child)
{
struct simplebus_devinfo *di;
di = device_get_ivars(child);
return (&di->di_res);
}
static device_t
simplebus_get_interrupt_parent(device_t dev)
{
struct simplebus_devinfo *di;
struct fdt_ic *ic;
device_t ip;
phandle_t ph, iph;
ip = NULL;
di = device_get_ivars(dev);
if (di == NULL)
return (NULL);
if (OF_getencprop(di->di_ofw.obd_node, "interrupt-parent", &iph,
sizeof(iph)) > 0) {
ph = OF_node_from_xref(iph);
SLIST_FOREACH(ic, &fdt_ic_list_head, fdt_ics) {
if (ic->iph == ph) {
ip = ic->dev;
break;
}
}
}
return (ip);
}
static int
simplebus_setup_intr(device_t bus, device_t child, struct resource *res,
int flags, driver_filter_t *filter, driver_intr_t *ihand, void *arg,
void **cookiep)
{
struct simplebus_devinfo *di;
device_t ic;
enum intr_trigger trig;
enum intr_polarity pol;
int error, irq, rid;
di = device_get_ivars(child);
if (di == NULL)
return (ENXIO);
if (res == NULL)
return (EINVAL);
rid = rman_get_rid(res);
if (rid >= DI_MAX_INTR_NUM)
return (ENOENT);
ic = simplebus_get_interrupt_parent(child);
trig = di->di_intr_sl[rid].trig;
pol = di->di_intr_sl[rid].pol;
if (trig != INTR_TRIGGER_CONFORM || pol != INTR_POLARITY_CONFORM) {
irq = rman_get_start(res);
if (ic != NULL)
error = FDT_IC_CONFIG_INTR(ic, irq, trig, pol);
else
error = bus_generic_config_intr(bus, irq, trig, pol);
if (error)
return (error);
}
if (ic != NULL)
error = FDT_IC_SETUP_INTR(ic, child, res, flags, filter,
ihand, arg, cookiep);
else
error = bus_generic_setup_intr(bus, child, res, flags, filter,
ihand, arg, cookiep);
return (error);
}
static int
simplebus_teardown_intr(device_t bus, device_t child, struct resource *res,
void *cookie)
{
device_t ic;
if ((ic = simplebus_get_interrupt_parent(child)) != NULL)
return (FDT_IC_TEARDOWN_INTR(ic, child, res, cookie));
return (bus_generic_teardown_intr(bus, child, res, cookie));
}
static const struct ofw_bus_devinfo *
simplebus_get_devinfo(device_t bus, device_t child)
{
struct simplebus_devinfo *di;
di = device_get_ivars(child);
return (&di->di_ofw);
}

266
sys/mips/beri/fdt_ic_if.m
View File

@ -1,266 +0,0 @@
#-
# Copyright (c) 2013 SRI International
# Copyright (c) 1998-2004 Doug Rabson
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
# SUCH DAMAGE.
#
# $FreeBSD$
#
#include <sys/types.h>
#include <sys/systm.h>
#include <sys/bus.h>
/**
* @defgroup FST_IC fdt_ic - KObj methods for interrupt controllers
* @brief A set of methods required device drivers that are interrupt
* controllers. Derived from sys/kern/bus_if.m.
* @{
*/
INTERFACE fdt_ic;
/**
* @brief Allocate an interrupt resource
*
* This method is called by child devices of an interrupt controller to
* allocate an interrup. The meaning of the resource-ID field varies
* from bus to bus and is opaque to the interrupt controller. If a
* resource was allocated and the caller did not use the RF_ACTIVE
* to specify that it should be activated immediately, the caller is
* responsible for calling FDT_IC_ACTIVATE_INTR() when it actually uses
* the interupt.
*
* @param _dev the interrupt-parent device of @p _child
* @param _child the device which is requesting an allocation
* @param _rid a pointer to the resource identifier
* @param _irq interrupt source to allocate
* @param _flags any extra flags to control the resource
* allocation - see @c RF_XXX flags in
* <sys/rman.h> for details
*
* @returns the interrupt which was allocated or @c NULL if no
* resource could be allocated
*/
METHOD struct resource * alloc_intr {
device_t _dev;
device_t _child;
int *_rid;
u_long _irq;
u_int _flags;
};
/**
* @brief Activate an interrupt
*
* Activate an interrupt previously allocated with FDT_IC_ALLOC_INTR().
*
* @param _dev the parent device of @p _child
* @param _r interrupt to activate
*/
METHOD int activate_intr {
device_t _dev;
struct resource *_r;
};
/**
* @brief Deactivate an interrupt
*
* Deactivate a resource previously allocated with FDT_IC_ALLOC_INTR().
*
* @param _dev the parent device of @p _child
* @param _r the interrupt to deactivate
*/
METHOD int deactivate_intr {
device_t _dev;
struct resource *_r;
};
/**
* @brief Release an interrupt
*
* Free an interupt allocated by the FDT_IC_ALLOC_INTR.
*
* @param _dev the parent device of @p _child
* @param _r the resource to release
*/
METHOD int release_intr {
device_t _dev;
struct resource *_res;
};
/**
* @brief Install an interrupt handler
*
* This method is used to associate an interrupt handler function with
* an irq resource. When the interrupt triggers, the function @p _intr
* will be called with the value of @p _arg as its single
* argument. The value returned in @p *_cookiep is used to cancel the
* interrupt handler - the caller should save this value to use in a
* future call to FDT_IC_TEARDOWN_INTR().
*
* @param _dev the interrupt-parent device of @p _child
* @param _child the device which allocated the resource
* @param _irq the resource representing the interrupt
* @param _flags a set of bits from enum intr_type specifying
* the class of interrupt
* @param _intr the function to call when the interrupt
* triggers
* @param _arg a value to use as the single argument in calls
* to @p _intr
* @param _cookiep a pointer to a location to recieve a cookie
* value that may be used to remove the interrupt
* handler
*/
METHOD int setup_intr {
device_t _dev;
device_t _child;
struct resource *_irq;
int _flags;
driver_filter_t *_filter;
driver_intr_t *_intr;
void *_arg;
void **_cookiep;
};
/**
* @brief Uninstall an interrupt handler
*
* This method is used to disassociate an interrupt handler function
* with an irq resource. The value of @p _cookie must be the value
* returned from a previous call to FDT_IC_SETUP_INTR().
*
* @param _dev the interrupt-parent device of @p _child
* @param _child the device which allocated the resource
* @param _irq the resource representing the interrupt
* @param _cookie the cookie value returned when the interrupt
* was originally registered
*/
METHOD int teardown_intr {
device_t _dev;
device_t _child;
struct resource *_irq;
void *_cookie;
};
/**
* @brief Allow drivers to request that an interrupt be bound to a specific
* CPU.
*
* @param _dev the interrupt-parent device of @p _child
* @param _child the device which allocated the resource
* @param _irq the resource representing the interrupt
* @param _cpu the CPU to bind the interrupt to
*/
METHOD int bind_intr {
device_t _dev;
device_t _child;
struct resource *_irq;
int _cpu;
};
/**
* @brief Allow drivers to specify the trigger mode and polarity
* of the specified interrupt.
*
* @param _dev the interrupt-parent device
* @param _irq the interrupt number to modify
* @param _trig the trigger mode required
* @param _pol the interrupt polarity required
*/
METHOD int config_intr {
device_t _dev;
int _irq;
enum intr_trigger _trig;
enum intr_polarity _pol;
};
/**
* @brief Allow drivers to associate a description with an active
* interrupt handler.
*
* @param _dev the interrupt-parent device of @p _child
* @param _child the device which allocated the resource
* @param _irq the resource representing the interrupt
* @param _cookie the cookie value returned when the interrupt
* was originally registered
* @param _descr the description to associate with the interrupt
*/
METHOD int describe_intr {
device_t _dev;
device_t _child;
struct resource *_irq;
void *_cookie;
const char *_descr;
};
/**
* @brief Notify an ic that specified child's IRQ should be remapped.
*
* @param _dev the interrupt-parent device
* @param _child the child device
* @param _irq the irq number
*/
METHOD int remap_intr {
device_t _dev;
device_t _child;
u_int _irq;
};
/**
* @brief Enable an IPI source.
*
* @param _dev the interrupt controller
* @param _tid the thread ID (relative to the interrupt controller)
* to enable IPIs for
* @param _ipi_irq hardware IRQ to send IPIs to
*/
METHOD void setup_ipi {
device_t _dev;
u_int _tid;
u_int _irq;
};
/**
* @brief Send an IPI to the specified thread.
*
* @param _dev the interrupt controller
* @param _tid the thread ID (relative to the interrupt controller)
* to send IPIs to
*/
METHOD void send_ipi {
device_t _dev;
u_int _tid;
};
/**
* @brief Clear the IPI on the specfied thread. Only call with the
* local hardware thread or interrupts may be lost!
*
* @param _dev the interrupt controller
* @param _tid the thread ID (relative to the interrupt controller)
* to clear the IPI on
*/
METHOD void clear_ipi {
device_t _dev;
u_int _tid;
};

3
sys/mips/beri/files.beri
View File

@ -22,7 +22,4 @@ dev/terasic/mtl/terasic_mtl_text.c optional terasic_mtl
dev/terasic/mtl/terasic_mtl_vt.c optional terasic_mtl vt
mips/beri/beri_machdep.c standard
mips/beri/beri_pic.c optional fdt
mips/beri/beri_simplebus.c optional fdt
mips/beri/fdt_ic_if.m optional fdt
mips/mips/intr_machdep.c standard
mips/mips/tick.c standard

1
sys/mips/conf/std.BERI
View File

@ -34,6 +34,7 @@ options CAPABILITIES
options COMPAT_FREEBSD10
options COMPAT_FREEBSD11
options INTRNG
options SCHED_ULE
options FFS #Berkeley Fast Filesystem