Attach arm generic interrupt and timer drivers in the middle of
BUS_PASS_INTERRUPT and BUS_PASS_TIMER, respectively.
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parent
5ec70ad261
commit
333b6dcede
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=269605
@ -343,7 +343,8 @@ static driver_t arm_tmr_driver = {
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static devclass_t arm_tmr_devclass;
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DRIVER_MODULE(timer, simplebus, arm_tmr_driver, arm_tmr_devclass, 0, 0);
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EARLY_DRIVER_MODULE(timer, simplebus, arm_tmr_driver, arm_tmr_devclass, 0, 0,
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BUS_PASS_TIMER + BUS_PASS_ORDER_MIDDLE);
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void
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DELAY(int usec)
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@ -264,7 +264,8 @@ static driver_t arm_gic_driver = {
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static devclass_t arm_gic_devclass;
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DRIVER_MODULE(gic, simplebus, arm_gic_driver, arm_gic_devclass, 0, 0);
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EARLY_DRIVER_MODULE(gic, simplebus, arm_gic_driver, arm_gic_devclass, 0, 0,
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BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
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static void
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gic_post_filter(void *arg)
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@ -382,7 +382,8 @@ static driver_t arm_tmr_driver = {
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static devclass_t arm_tmr_devclass;
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DRIVER_MODULE(mp_tmr, simplebus, arm_tmr_driver, arm_tmr_devclass, 0, 0);
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EARLY_DRIVER_MODULE(mp_tmr, simplebus, arm_tmr_driver, arm_tmr_devclass, 0, 0,
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BUS_PASS_TIMER + BUS_PASS_ORDER_MIDDLE);
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/*
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* Handle a change in clock frequency. The mpcore timer runs at half the CPU
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@ -152,7 +152,8 @@ static driver_t pl190_intc_driver = {
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static devclass_t pl190_intc_devclass;
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DRIVER_MODULE(intc, simplebus, pl190_intc_driver, pl190_intc_devclass, 0, 0);
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EARLY_DRIVER_MODULE(intc, simplebus, pl190_intc_driver, pl190_intc_devclass,
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0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
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int
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arm_get_next_irq(int last_irq)
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