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SMP Natoma motherboards cannot know if you are booting a UP or SMP OS. This

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mod makes sure that the Natoma chipset is set into the correct mode.  In
the case of my P6DNF, when booting a UP kernel, I see a substantial improvement
in the latency of certain operations.   It appears that the cache hit
latency is curiously improved the most, per lat_mem_rd.
This commit is contained in:
dyson 1997-08-16 07:18:51 +00:00
parent be82b729b0
commit 33e09befea
1 changed files with 24 additions and 1 deletions
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25
sys/pci/pcisupport.c
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@ -1,6 +1,6 @@
/**************************************************************************
**
** $Id: pcisupport.c,v 1.51 1997/08/08 21:11:40 phk Exp $
** $Id: pcisupport.c,v 1.52 1997/08/10 09:33:21 phk Exp $
**
** Device driver for DEC/INTEL PCI chipsets.
**
@ -131,6 +131,28 @@ fixbushigh_i1225(pcici_t tag)
tag->secondarybus = tag->subordinatebus = sublementarybus +1;
}
static void
fixwsc_natoma(pcici_t tag)
{
int pmccfg;
pmccfg = pci_cfgread(tag, 0x50, 2);
#if defined(SMP)
if (pmccfg & 0x8000) {
printf("Correcting Natoma config for SMP\n");
pmccfg &= ~0x8000;
pci_cfgwrite(tag, 0x50, 2, pmccfg);
}
#else
if ((pmccfg & 0x8000) == 0) {
printf("Correcting Natoma config for non-SMP\n");
pmccfg |= 0x8000;
pci_cfgwrite(tag, 0x50, 2, pmccfg);
}
#endif
}
static char*
chipset_probe (pcici_t tag, pcidi_t type)
{
@ -200,6 +222,7 @@ chipset_probe (pcici_t tag, pcidi_t type)
case 0x70308086:
return ("Intel 82437VX PCI cache memory controller");
case 0x12378086:
fixwsc_natoma(tag);
return ("Intel 82440FX (Natoma) PCI and memory controller");
case 0x84c48086:
fixbushigh_orion(tag);