Implement WOL capability.
- Turn on WOL bits in suspend/shutdown method. - WOL is disabled in resume routine as WOL can interfere normal Rx operation. - Move stge_reset() to stge_init_locked() as resetting hardware clears configured Rx information which in turn results in non-working Rx module after suspend/shutdown operation.
This commit is contained in:
parent
6180b9de75
commit
346de09f2a
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=175315
@ -187,6 +187,7 @@ static int stge_init_rx_ring(struct stge_softc *);
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static void stge_poll(struct ifnet *, enum poll_cmd, int);
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#endif
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static void stge_setwol(struct stge_softc *);
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static int sysctl_int_range(SYSCTL_HANDLER_ARGS, int, int);
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static int sysctl_hw_stge_rxint_nframe(SYSCTL_HANDLER_ARGS);
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static int sysctl_hw_stge_rxint_dmawait(SYSCTL_HANDLER_ARGS);
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@ -736,6 +737,7 @@ stge_attach(device_t dev)
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ifp->if_hwassist = 0;
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ifp->if_capabilities = 0;
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}
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ifp->if_capabilities |= IFCAP_WOL_MAGIC;
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ifp->if_capenable = ifp->if_capabilities;
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/*
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@ -1121,15 +1123,33 @@ stge_dma_free(struct stge_softc *sc)
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static int
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stge_shutdown(device_t dev)
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{
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struct stge_softc *sc;
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sc = device_get_softc(dev);
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return (stge_suspend(dev));
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}
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STGE_LOCK(sc);
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stge_stop(sc);
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STGE_UNLOCK(sc);
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static void
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stge_setwol(struct stge_softc *sc)
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{
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struct ifnet *ifp;
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uint8_t v;
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return (0);
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STGE_LOCK_ASSERT(sc);
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ifp = sc->sc_ifp;
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v = CSR_READ_1(sc, STGE_WakeEvent);
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/* Disable all WOL bits. */
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v &= ~(WE_WakePktEnable | WE_MagicPktEnable | WE_LinkEventEnable |
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WE_WakeOnLanEnable);
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if ((ifp->if_capenable & IFCAP_WOL_MAGIC) != 0)
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v |= WE_MagicPktEnable | WE_WakeOnLanEnable;
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CSR_WRITE_1(sc, STGE_WakeEvent, v);
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/* Reset Tx and prevent transmission. */
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CSR_WRITE_4(sc, STGE_AsicCtrl,
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CSR_READ_4(sc, STGE_AsicCtrl) | AC_TxReset);
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/*
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* TC9021 automatically reset link speed to 100Mbps when it's put
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* into sleep so there is no need to try to resetting link speed.
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*/
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}
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static int
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@ -1142,6 +1162,7 @@ stge_suspend(device_t dev)
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STGE_LOCK(sc);
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stge_stop(sc);
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sc->sc_suspended = 1;
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stge_setwol(sc);
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STGE_UNLOCK(sc);
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return (0);
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@ -1152,10 +1173,19 @@ stge_resume(device_t dev)
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{
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struct stge_softc *sc;
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struct ifnet *ifp;
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uint8_t v;
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sc = device_get_softc(dev);
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STGE_LOCK(sc);
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/*
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* Clear WOL bits, so special frames wouldn't interfere
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* normal Rx operation anymore.
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*/
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v = CSR_READ_1(sc, STGE_WakeEvent);
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v &= ~(WE_WakePktEnable | WE_MagicPktEnable | WE_LinkEventEnable |
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WE_WakeOnLanEnable);
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CSR_WRITE_1(sc, STGE_WakeEvent, v);
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ifp = sc->sc_ifp;
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if (ifp->if_flags & IFF_UP)
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stge_init_locked(sc);
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@ -1450,6 +1480,11 @@ stge_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
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else
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ifp->if_hwassist = 0;
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}
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if ((mask & IFCAP_WOL) != 0 &&
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(ifp->if_capabilities & IFCAP_WOL) != 0) {
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if ((mask & IFCAP_WOL_MAGIC) != 0)
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ifp->if_capenable ^= IFCAP_WOL_MAGIC;
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}
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if ((mask & IFCAP_VLAN_HWTAGGING) != 0) {
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ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
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if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) {
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@ -2096,6 +2131,11 @@ stge_init_locked(struct stge_softc *sc)
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*/
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stge_stop(sc);
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/*
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* Reset the chip to a known state.
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*/
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stge_reset(sc, STGE_RESET_FULL);
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/* Init descriptors. */
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error = stge_init_rx_ring(sc);
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if (error != 0) {
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@ -2308,11 +2348,6 @@ stge_stop(struct stge_softc *sc)
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callout_stop(&sc->sc_tick_ch);
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sc->sc_watchdog_timer = 0;
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/*
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* Reset the chip to a known state.
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*/
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stge_reset(sc, STGE_RESET_FULL);
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/*
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* Disable interrupts.
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*/
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@ -314,6 +314,14 @@ struct stge_rfd {
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#define STGE_ExpRomData 0x50 /* 8-bit */
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#define STGE_WakeEvent 0x51 /* 8-bit */
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#define WE_WakePktEnable (1U << 0)
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#define WE_MagicPktEnable (1U << 1)
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#define WE_LinkEventEnable (1U << 2)
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#define WE_WakePolarity (1U << 3)
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#define WE_WakePktEvent (1U << 4)
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#define WE_MagicPktEvent (1U << 5)
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#define WE_LinkEvent (1U << 6)
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#define WE_WakeOnLanEnable (1U << 7)
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#define STGE_Countdown 0x54
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#define CD_Count(x) ((x) & 0xffff)
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