Set RK3568 specific pin mux for GMAC1.
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@ -767,6 +767,10 @@ struct rk_pinctrl_conf rk3399_conf = {
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.get_bias_value = rk3399_get_bias_value,
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};
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#define GRF_IOFUNC_SEL0 0x0300
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#define GMAC1_IOMUX_SEL_M0 0x01000000
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#define GMAC1_IOMUX_SEL_M1 0x01000100
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static struct rk_pinctrl_gpio rk3568_gpio_bank[] = {
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RK_GPIO(0, "gpio0"),
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RK_GPIO(1, "gpio1"),
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@ -1239,6 +1243,17 @@ rk_pinctrl_configure_pin(struct rk_pinctrl_softc *sc, uint32_t *pindata)
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* without hi-word write mask.
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*/
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SYSCON_MODIFY_4(syscon, reg, mask, function << bit | (mask << 16));
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/* RK3568 specific pin mux for various functionalities */
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if (ofw_bus_node_is_compatible(ofw_bus_get_node(sc->dev),
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"rockchip,rk3568-pinctrl")) {
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if (bank == 3 && pin == 9 && function == 3)
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SYSCON_WRITE_4(sc->grf,
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GRF_IOFUNC_SEL0, GMAC1_IOMUX_SEL_M0);
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if (bank == 4 && pin == 7 && function == 3)
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SYSCON_WRITE_4(sc->grf,
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GRF_IOFUNC_SEL0, GMAC1_IOMUX_SEL_M1);
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}
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}
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static int
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