if_smsc: set MII BUSY bit to read/write PHY regs

Per the datasheet, the BUSY bit must be set when reading or writing PHY
registers.  From Linux commit 80928805babf.

Submitted by:	Arshan Khanifar
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D15217
This commit is contained in:
Ed Maste 2018-04-30 02:18:19 +00:00
parent 8c9b26c3c4
commit 361558a60f
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=333096

View File

@ -452,7 +452,7 @@ smsc_miibus_readreg(device_t dev, int phy, int reg)
goto done;
}
addr = (phy << 11) | (reg << 6) | SMSC_MII_READ;
addr = (phy << 11) | (reg << 6) | SMSC_MII_READ | SMSC_MII_BUSY;
smsc_write_reg(sc, SMSC_MII_ADDR, addr);
if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0)
@ -505,7 +505,7 @@ smsc_miibus_writereg(device_t dev, int phy, int reg, int val)
val = htole32(val);
smsc_write_reg(sc, SMSC_MII_DATA, val);
addr = (phy << 11) | (reg << 6) | SMSC_MII_WRITE;
addr = (phy << 11) | (reg << 6) | SMSC_MII_WRITE | SMSC_MII_BUSY;
smsc_write_reg(sc, SMSC_MII_ADDR, addr);
if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0)