Add quirk to override default BAR(5) rid for AHCI.
Use it for Cavium AHCI. Submitted by: Michaе┌ Stanek Reviewed by: imp (previous version) MFC after: 1 week
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=277100
@ -572,6 +572,7 @@ enum ahci_err_type {
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#define AHCI_Q_ATI_PMP_BUG 0x2000
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#define AHCI_Q_MAXIO_64K 0x4000
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#define AHCI_Q_SATA1_UNIT0 0x8000 /* need better method for this */
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#define AHCI_Q_ABAR0 0x10000
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#define AHCI_Q_BIT_STRING \
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"\020" \
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@ -287,6 +287,7 @@ static const struct {
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{0x11841039, 0x00, "SiS 966", 0},
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{0x11851039, 0x00, "SiS 968", 0},
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{0x01861039, 0x00, "SiS 968", 0},
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{0xa01c177d, 0x00, "ThunderX SATA", AHCI_Q_ABAR0},
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{0x00000000, 0x00, NULL, 0}
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};
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@ -386,12 +387,16 @@ ahci_pci_attach(device_t dev)
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pci_get_subvendor(dev) == 0x1043 &&
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pci_get_subdevice(dev) == 0x81e4)
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ctlr->quirks |= AHCI_Q_SATA1_UNIT0;
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/* if we have a memory BAR(5) we are likely on an AHCI part */
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ctlr->vendorid = pci_get_vendor(dev);
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ctlr->deviceid = pci_get_device(dev);
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ctlr->subvendorid = pci_get_subvendor(dev);
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ctlr->subdeviceid = pci_get_subdevice(dev);
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ctlr->r_rid = PCIR_BAR(5);
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/* Default AHCI Base Address is BAR(5), Cavium uses BAR(0) */
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if (ctlr->quirks & AHCI_Q_ABAR0)
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ctlr->r_rid = PCIR_BAR(0);
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else
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ctlr->r_rid = PCIR_BAR(5);
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if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
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&ctlr->r_rid, RF_ACTIVE)))
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return ENXIO;
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