diff --git a/Makefile.inc1 b/Makefile.inc1 index 66a6b9fa76ab..36f760949765 100644 --- a/Makefile.inc1 +++ b/Makefile.inc1 @@ -1421,7 +1421,9 @@ _cat= bin/cat _lex= usr.bin/lex .endif -.if ${BOOTSTRAPPING} < 1001507 +# r277259 crunchide: Correct 64-bit section header offset +# r281674 crunchide: always include both 32- and 64-bit ELF support +.if ${BOOTSTRAPPING} < 1100071 _crunch= usr.sbin/crunch .endif @@ -1485,6 +1487,9 @@ _kerberos5_bootstrap_tools= \ .ORDER: ${_kerberos5_bootstrap_tools:C/^/${_bt}-/g} .endif +# Rebuild up-to-date libmd for xinstall +${_bt}-usr.bin/xinstall: ${_bt}-lib/libmd + bootstrap-tools: .PHONY # Please document (add comment) why something is in 'bootstrap-tools'. @@ -1587,11 +1592,6 @@ kernel-tools: .MAKE _btxld= usr.sbin/btxld .endif .endif -.if ${TARGET_ARCH} != ${MACHINE_ARCH} -.if ${MK_RESCUE} != "no" -_crunchide= usr.sbin/crunch/crunchide -.endif -.endif # If we're given an XAS, don't build binutils. .if ${XAS:M/*} == "" @@ -1626,6 +1626,9 @@ _clang_libs= lib/clang _cc= gnu/usr.bin/cc .endif .endif +.if ${MK_USB} != "no" +_usb_tools= sys/boot/usb/tools +.endif cross-tools: .MAKE .for _tool in \ @@ -1636,7 +1639,7 @@ cross-tools: .MAKE ${_cc} \ ${_btxld} \ ${_crunchide} \ - sys/boot/usb/tools + ${_usb_tools} ${_+_}@${ECHODIR} "===> ${_tool} (obj,depend,all,install)"; \ cd ${.CURDIR}/${_tool} && \ ${MAKE} DIRPRFX=${_tool}/ obj && \ @@ -1781,13 +1784,7 @@ _prereq_libs= gnu/lib/libssp/libssp_nonshared gnu/lib/libgcc lib/libcompiler_rt # all shared libraries for ELF. # _startup_libs= gnu/lib/csu -.if exists(${.CURDIR}/lib/csu/${MACHINE_ARCH}-elf) -_startup_libs+= lib/csu/${MACHINE_ARCH}-elf -.elif exists(${.CURDIR}/lib/csu/${MACHINE_ARCH}) -_startup_libs+= lib/csu/${MACHINE_ARCH} -.else -_startup_libs+= lib/csu/${MACHINE_CPUARCH} -.endif +_startup_libs+= lib/csu _startup_libs+= gnu/lib/libgcc _startup_libs+= lib/libcompiler_rt _startup_libs+= lib/libc @@ -1806,7 +1803,7 @@ _prebuild_libs= ${_kerberos5_lib_libasn1} \ ${_kerberos5_lib_libhdb} \ ${_kerberos5_lib_libheimbase} \ ${_kerberos5_lib_libheimntlm} \ - ${_kerberos5_lib_libheimsqlite} \ + ${_libsqlite3} \ ${_kerberos5_lib_libheimipcc} \ ${_kerberos5_lib_libhx509} ${_kerberos5_lib_libkrb5} \ ${_kerberos5_lib_libroken} \ @@ -1883,6 +1880,13 @@ cddl/lib/libzfs_core__L: cddl/lib/libnvpair__L cddl/lib/libzfs__L: lib/libgeom__L cddl/lib/libctf__L: lib/libz__L .endif +# cddl/lib/libdtrace requires lib/libproc and lib/librtld_db; it's only built +# on select architectures though (see cddl/lib/Makefile) +.if ${MACHINE_ARCH} == "amd64" || ${MACHINE_ARCH} == "i386" || \ + ${MACHINE_CPUARCH} == "mips" || ${MACHINE_CPUARCH} == "powerpc" || \ + ${MACHINE_CPUARCH} == "arm" +_prebuild_libs+= lib/libproc lib/librtld_db +.endif .if ${MK_CRYPT} != "no" .if ${MK_OPENSSL} != "no" @@ -1913,7 +1917,7 @@ _secure_lib= secure/lib kerberos5/lib/libasn1__L: lib/libcom_err__L kerberos5/lib/libroken__L kerberos5/lib/libhdb__L: kerberos5/lib/libasn1__L lib/libcom_err__L \ kerberos5/lib/libkrb5__L kerberos5/lib/libroken__L \ - kerberos5/lib/libwind__L kerberos5/lib/libheimsqlite__L + kerberos5/lib/libwind__L lib/libsqlite3__L kerberos5/lib/libheimntlm__L: secure/lib/libcrypto__L kerberos5/lib/libkrb5__L \ kerberos5/lib/libroken__L lib/libcom_err__L kerberos5/lib/libhx509__L: kerberos5/lib/libasn1__L lib/libcom_err__L \ @@ -1926,7 +1930,7 @@ kerberos5/lib/libroken__L: lib/libcrypt__L kerberos5/lib/libwind__L: kerberos5/lib/libroken__L lib/libcom_err__L kerberos5/lib/libheimbase__L: lib/libthr__L kerberos5/lib/libheimipcc__L: kerberos5/lib/libroken__L kerberos5/lib/libheimbase__L lib/libthr__L -kerberos5/lib/libheimsqlite__L: lib/libthr__L +lib/libsqlite3__L: lib/libthr__L .endif .if ${MK_GSSAPI} != "no" @@ -1942,7 +1946,7 @@ _kerberos5_lib_libkrb5= kerberos5/lib/libkrb5 _kerberos5_lib_libhx509= kerberos5/lib/libhx509 _kerberos5_lib_libroken= kerberos5/lib/libroken _kerberos5_lib_libheimntlm= kerberos5/lib/libheimntlm -_kerberos5_lib_libheimsqlite= kerberos5/lib/libheimsqlite +_libsqlite3= lib/libsqlite3 _kerberos5_lib_libheimipcc= kerberos5/lib/libheimipcc _kerberos5_lib_libwind= kerberos5/lib/libwind _libcom_err= lib/libcom_err @@ -1956,6 +1960,16 @@ _lib_libypclnt= lib/libypclnt lib/libradius__L: lib/libmd__L .endif +lib/libproc__L: \ + ${_cddl_lib_libctf:D${_cddl_lib_libctf}__L} lib/libelf__L lib/librtld_db__L lib/libutil__L +.if ${MK_CXX} != "no" +.if ${MK_LIBCPLUSPLUS} != "no" +lib/libproc__L: lib/libcxxrt__L +.else # This implies MK_GNUCXX != "no"; see lib/libproc +lib/libproc__L: gnu/lib/libsupc++__L +.endif +.endif + gnu/lib/libdialog__L: lib/msun__L lib/ncurses/ncursesw__L .for _lib in ${_prereq_libs} diff --git a/ObsoleteFiles.inc b/ObsoleteFiles.inc index 1f762f4c93cc..a3b9fdcda0ec 100644 --- a/ObsoleteFiles.inc +++ b/ObsoleteFiles.inc @@ -38,6 +38,81 @@ # xargs -n1 | sort | uniq -d; # done +# 20150525: new clang import which bumps version from 3.6.0 to 3.6.1. +OLD_FILES+=usr/lib/clang/3.6.0/include/__stddef_max_align_t.h +OLD_FILES+=usr/lib/clang/3.6.0/include/__wmmintrin_aes.h +OLD_FILES+=usr/lib/clang/3.6.0/include/__wmmintrin_pclmul.h +OLD_FILES+=usr/lib/clang/3.6.0/include/adxintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/altivec.h +OLD_FILES+=usr/lib/clang/3.6.0/include/ammintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/arm_acle.h +OLD_FILES+=usr/lib/clang/3.6.0/include/arm_neon.h +OLD_FILES+=usr/lib/clang/3.6.0/include/avx2intrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/avx512bwintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/avx512erintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/avx512fintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/avx512vlbwintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/avx512vlintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/avxintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/bmi2intrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/bmiintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/cpuid.h +OLD_FILES+=usr/lib/clang/3.6.0/include/emmintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/f16cintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/fma4intrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/fmaintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/ia32intrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/immintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/lzcntintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/mm3dnow.h +OLD_FILES+=usr/lib/clang/3.6.0/include/mm_malloc.h +OLD_FILES+=usr/lib/clang/3.6.0/include/mmintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/module.modulemap +OLD_FILES+=usr/lib/clang/3.6.0/include/nmmintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/pmmintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/popcntintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/prfchwintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/rdseedintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/rtmintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/shaintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/smmintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/tbmintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/tmmintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/wmmintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/x86intrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/xmmintrin.h +OLD_FILES+=usr/lib/clang/3.6.0/include/xopintrin.h +OLD_DIRS+=usr/lib/clang/3.6.0/include +OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.asan-i386.a +OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.asan-x86_64.a +OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.asan_cxx-i386.a +OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.asan_cxx-x86_64.a +OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.profile-arm.a +OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.profile-i386.a +OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.profile-x86_64.a +OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.san-i386.a +OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.san-x86_64.a +OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.ubsan-i386.a +OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.ubsan-x86_64.a +OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.ubsan_cxx-i386.a +OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.ubsan_cxx-x86_64.a +OLD_DIRS+=usr/lib/clang/3.6.0/lib/freebsd +OLD_DIRS+=usr/lib/clang/3.6.0/lib +OLD_DIRS+=usr/lib/clang/3.6.0 +# 20150521 +OLD_FILES+=usr/bin/demandoc +OLD_FILES+=usr/share/man/man1/demandoc.1.gz +OLD_FILES+=usr/share/man/man3/mandoc.3.gz +OLD_FILES+=usr/share/man/man3/mandoc_headers.3.gz +# 20150520 +OLD_FILES+=usr/lib/libheimsqlite.a +OLD_FILES+=usr/lib/libheimsqlite.so +OLD_LIBS+=usr/lib/libheimsqlite.so.11 +OLD_FILES+=usr/lib/libheimsqlite_p.a +OLD_FILES+=usr/lib32/libheimsqlite.a +OLD_FILES+=usr/lib32/libheimsqlite.so +OLD_LIBS+=usr/lib32/libheimsqlite.so.11 +OLD_FILES+=usr/lib32/libheimsqlite_p.a # 20150506 OLD_FILES+=usr/share/man/man9/NDHASGIANT.9.gz # 20150504 @@ -448,6 +523,33 @@ OLD_LIBS+=usr/lib32/libopie.so.7 OLD_FILES+=usr/bin/otp-sha OLD_FILES+=usr/share/man/man1/otp-sha.1.gz # 20140807: Remove private lib files that should not be installed. +OLD_FILES+=usr/lib32/private/libatf-c.a +OLD_FILES+=usr/lib32/private/libatf-c.so +OLD_FILES+=usr/lib32/private/libatf-c_p.a +OLD_FILES+=usr/lib32/private/libatf-c++.a +OLD_FILES+=usr/lib32/private/libatf-c++.so +OLD_FILES+=usr/lib32/private/libatf-c++_p.a +OLD_FILES+=usr/lib32/private/libbsdstat.a +OLD_FILES+=usr/lib32/private/libbsdstat.so +OLD_FILES+=usr/lib32/private/libbsdstat_p.a +OLD_FILES+=usr/lib32/private/libheimipcc.a +OLD_FILES+=usr/lib32/private/libheimipcc.so +OLD_FILES+=usr/lib32/private/libheimipcc_p.a +OLD_FILES+=usr/lib32/private/libheimipcs.a +OLD_FILES+=usr/lib32/private/libheimipcs.so +OLD_FILES+=usr/lib32/private/libheimipcs_p.a +OLD_FILES+=usr/lib32/private/libldns.a +OLD_FILES+=usr/lib32/private/libldns.so +OLD_FILES+=usr/lib32/private/libldns_p.a +OLD_FILES+=usr/lib32/private/libssh.a +OLD_FILES+=usr/lib32/private/libssh.so +OLD_FILES+=usr/lib32/private/libssh_p.a +OLD_FILES+=usr/lib32/private/libunbound.a +OLD_FILES+=usr/lib32/private/libunbound.so +OLD_FILES+=usr/lib32/private/libunbound_p.a +OLD_FILES+=usr/lib32/private/libucl.a +OLD_FILES+=usr/lib32/private/libucl.so +OLD_FILES+=usr/lib32/private/libucl_p.a OLD_FILES+=usr/lib/private/libatf-c.a OLD_FILES+=usr/lib/private/libatf-c.so OLD_FILES+=usr/lib/private/libatf-c_p.a @@ -468,7 +570,7 @@ OLD_FILES+=usr/lib/private/libldns.so OLD_FILES+=usr/lib/private/libldns_p.a OLD_FILES+=usr/lib/private/libssh.a OLD_FILES+=usr/lib/private/libssh.so -OLD_FILES+=usr/lib/private/libssh.p.a +OLD_FILES+=usr/lib/private/libssh_p.a OLD_FILES+=usr/lib/private/libunbound.a OLD_FILES+=usr/lib/private/libunbound.so OLD_FILES+=usr/lib/private/libunbound_p.a @@ -620,8 +722,12 @@ OLD_FILES+=usr/libexec/bsdconfig/070.usermgmt/groupinput # 20140223: Remove libyaml OLD_FILES+=usr/lib/private/libyaml.a OLD_FILES+=usr/lib/private/libyaml.so -OLD_FILES+=usr/lib/private/libyaml.so.1 +OLD_LIBS+=usr/lib/private/libyaml.so.1 OLD_FILES+=usr/lib/private/libyaml_p.a +OLD_FILES+=usr/lib32/private/libyaml.a +OLD_FILES+=usr/lib32/private/libyaml.so +OLD_LIBS+=usr/lib32/private/libyaml.so.1 +OLD_FILES+=usr/lib32/private/libyaml_p.a # 20140216: new clang import which bumps version from 3.3 to 3.4. OLD_FILES+=usr/bin/llvm-prof OLD_FILES+=usr/bin/llvm-ranlib diff --git a/UPDATING b/UPDATING index 12b554c1d373..637dc7826b44 100644 --- a/UPDATING +++ b/UPDATING @@ -31,6 +31,24 @@ NOTE TO PEOPLE WHO THINK THAT FreeBSD 11.x IS SLOW: disable the most expensive debugging functionality run "ln -s 'abort:false,junk:false' /etc/malloc.conf".) +20150525: + Clang and llvm have been upgraded to 3.6.1 release. Please see the + 20141231 entry below for information about prerequisites and upgrading, + if you are not already using 3.5.0 or higher. + +20150521: + TI platform code switched to using vendor DTS files and this update + may break existing systems running on Beaglebone, Beaglebone Black, + and Pandaboard: + + - dtb files should be regenerated/reinstalled. Filenames are the + same but content is different now + - GPIO addressing was changed, now each GPIO bank (32 pins per bank) + has its own /dev/gpiocX device, e.g. pin 121 on /dev/gpioc0 in old + addressing scheme is now pin 25 on /dev/gpioc3. + - Pandaboard: /etc/ttys should be updated, serial console device is + now /dev/ttyu2, not /dev/ttyu0 + 20150501: soelim(1) from gnu/usr.bin/groff has been replaced by usr.bin/soelim. If you need the GNU extension from groff soelim(1), install groff diff --git a/bin/pax/ar_subs.c b/bin/pax/ar_subs.c index 4a3e5e7b01c4..bcab2fce24cb 100644 --- a/bin/pax/ar_subs.c +++ b/bin/pax/ar_subs.c @@ -48,7 +48,6 @@ __FBSDID("$FreeBSD$"); #include #include #include -#include #include "pax.h" #include "extern.h" diff --git a/bin/pax/buf_subs.c b/bin/pax/buf_subs.c index 995e34c88809..4922fc80ffa0 100644 --- a/bin/pax/buf_subs.c +++ b/bin/pax/buf_subs.c @@ -44,7 +44,6 @@ __FBSDID("$FreeBSD$"); #include #include #include -#include #include #include "pax.h" #include "extern.h" diff --git a/bin/pax/cache.c b/bin/pax/cache.c index 358707d362c3..f6e52b49378e 100644 --- a/bin/pax/cache.c +++ b/bin/pax/cache.c @@ -45,7 +45,6 @@ __FBSDID("$FreeBSD$"); #include #include #include -#include #include #include "pax.h" #include "cache.h" diff --git a/bin/pax/cpio.c b/bin/pax/cpio.c index 0d9cc9fdc326..f385a5988313 100644 --- a/bin/pax/cpio.c +++ b/bin/pax/cpio.c @@ -45,8 +45,6 @@ __FBSDID("$FreeBSD$"); #include #include #include -#include -#include #include "pax.h" #include "cpio.h" #include "extern.h" diff --git a/bin/pax/file_subs.c b/bin/pax/file_subs.c index 5e4cce151a0b..f18227e40b6a 100644 --- a/bin/pax/file_subs.c +++ b/bin/pax/file_subs.c @@ -48,7 +48,6 @@ __FBSDID("$FreeBSD$"); #include #include #include -#include #include "pax.h" #include "options.h" #include "extern.h" diff --git a/bin/pax/gen_subs.c b/bin/pax/gen_subs.c index 708e8af5ba29..232ee779e489 100644 --- a/bin/pax/gen_subs.c +++ b/bin/pax/gen_subs.c @@ -45,8 +45,6 @@ __FBSDID("$FreeBSD$"); #include #include #include -#include -#include #include #include "pax.h" #include "extern.h" diff --git a/bin/pax/getoldopt.c b/bin/pax/getoldopt.c index 28717215aec0..838ff54d4a88 100644 --- a/bin/pax/getoldopt.c +++ b/bin/pax/getoldopt.c @@ -19,8 +19,7 @@ __FBSDID("$FreeBSD$"); #include #include -#include "pax.h" -#include "extern.h" +int getoldopt(int, char **, const char *); int getoldopt(int argc, char **argv, const char *optstring) diff --git a/bin/pax/pat_rep.c b/bin/pax/pat_rep.c index 7b0797525745..e8d17db363be 100644 --- a/bin/pax/pat_rep.c +++ b/bin/pax/pat_rep.c @@ -43,9 +43,7 @@ __FBSDID("$FreeBSD$"); #include #include #include -#include #include -#include #ifdef NET2_REGEX #include #else diff --git a/bin/pax/pax.c b/bin/pax/pax.c index 0a53f9a53651..4e97610e954a 100644 --- a/bin/pax/pax.c +++ b/bin/pax/pax.c @@ -58,7 +58,6 @@ __FBSDID("$FreeBSD$"); #include #include #include -#include #include "pax.h" #include "extern.h" static int gen_init(void); diff --git a/bin/pax/sel_subs.c b/bin/pax/sel_subs.c index fe131f7329ca..e9cc759e2403 100644 --- a/bin/pax/sel_subs.c +++ b/bin/pax/sel_subs.c @@ -47,7 +47,6 @@ __FBSDID("$FreeBSD$"); #include #include #include -#include #include #include "pax.h" #include "sel_subs.h" diff --git a/bin/pax/tar.c b/bin/pax/tar.c index 4ee2786a8082..32bdd6e1ad0e 100644 --- a/bin/pax/tar.c +++ b/bin/pax/tar.c @@ -44,8 +44,6 @@ __FBSDID("$FreeBSD$"); #include #include #include -#include -#include #include "pax.h" #include "extern.h" #include "tar.h" diff --git a/bin/pax/tty_subs.c b/bin/pax/tty_subs.c index b3d140eb41cc..b63da86eb8db 100644 --- a/bin/pax/tty_subs.c +++ b/bin/pax/tty_subs.c @@ -44,7 +44,6 @@ __FBSDID("$FreeBSD$"); #include #include #include -#include #include #include "pax.h" #include "extern.h" diff --git a/bin/ps/Makefile b/bin/ps/Makefile index 30dbdc9c360e..79e9fc6cf0ec 100644 --- a/bin/ps/Makefile +++ b/bin/ps/Makefile @@ -11,6 +11,6 @@ SRCS= fmt.c keyword.c nlist.c print.c ps.c # on large systems. # CFLAGS+=-DLAZY_PS -LIBADD= m kvm jail +LIBADD= m kvm jail xo .include diff --git a/bin/ps/keyword.c b/bin/ps/keyword.c index 38a993475401..b802c37143ea 100644 --- a/bin/ps/keyword.c +++ b/bin/ps/keyword.c @@ -47,6 +47,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include "ps.h" @@ -64,116 +65,170 @@ static int vcmp(const void *, const void *); /* PLEASE KEEP THE TABLE BELOW SORTED ALPHABETICALLY!!! */ static VAR var[] = { - {"%cpu", "%CPU", NULL, 0, pcpu, 0, CHAR, NULL, 0}, - {"%mem", "%MEM", NULL, 0, pmem, 0, CHAR, NULL, 0}, - {"acflag", "ACFLG", NULL, 0, kvar, KOFF(ki_acflag), USHORT, "x", 0}, - {"acflg", "", "acflag", 0, NULL, 0, CHAR, NULL, 0}, - {"args", "COMMAND", NULL, COMM|LJUST|USER, arguments, 0, - CHAR, NULL, 0}, - {"blocked", "", "sigmask", 0, NULL, 0, CHAR, NULL, 0}, - {"caught", "", "sigcatch", 0, NULL, 0, CHAR, NULL, 0}, - {"class", "CLASS", NULL, LJUST, loginclass, 0, CHAR, NULL, 0}, - {"comm", "COMMAND", NULL, LJUST, ucomm, 0, CHAR, NULL, 0}, - {"command", "COMMAND", NULL, COMM|LJUST|USER, command, 0, - CHAR, NULL, 0}, - {"cow", "COW", NULL, 0, kvar, KOFF(ki_cow), UINT, "u", 0}, - {"cpu", "CPU", NULL, 0, kvar, KOFF(ki_estcpu), UINT, "d", 0}, - {"cputime", "", "time", 0, NULL, 0, CHAR, NULL, 0}, - {"dsiz", "DSIZ", NULL, 0, kvar, KOFF(ki_dsize), PGTOK, "ld", 0}, - {"egid", "", "gid", 0, NULL, 0, CHAR, NULL, 0}, - {"egroup", "", "group", 0, NULL, 0, CHAR, NULL, 0}, - {"emul", "EMUL", NULL, LJUST, emulname, 0, CHAR, NULL, 0}, - {"etime", "ELAPSED", NULL, USER, elapsed, 0, CHAR, NULL, 0}, - {"etimes", "ELAPSED", NULL, USER, elapseds, 0, CHAR, NULL, 0}, - {"euid", "", "uid", 0, NULL, 0, CHAR, NULL, 0}, - {"f", "F", NULL, 0, kvar, KOFF(ki_flag), INT, "x", 0}, - {"f2", "F2", NULL, 0, kvar, KOFF(ki_flag2), INT, "08x", 0}, - {"fib", "FIB", NULL, 0, kvar, KOFF(ki_fibnum), INT, "d", 0}, - {"flags", "", "f", 0, NULL, 0, CHAR, NULL, 0}, - {"flags2", "", "f2", 0, NULL, 0, CHAR, NULL, 0}, - {"gid", "GID", NULL, 0, kvar, KOFF(ki_groups), UINT, UIDFMT, 0}, - {"group", "GROUP", NULL, LJUST, egroupname, 0, CHAR, NULL, 0}, - {"ignored", "", "sigignore", 0, NULL, 0, CHAR, NULL, 0}, - {"inblk", "INBLK", NULL, USER, rvar, ROFF(ru_inblock), LONG, "ld", 0}, - {"inblock", "", "inblk", 0, NULL, 0, CHAR, NULL, 0}, - {"jid", "JID", NULL, 0, kvar, KOFF(ki_jid), INT, "d", 0}, - {"jobc", "JOBC", NULL, 0, kvar, KOFF(ki_jobc), SHORT, "d", 0}, - {"ktrace", "KTRACE", NULL, 0, kvar, KOFF(ki_traceflag), INT, "x", 0}, - {"label", "LABEL", NULL, LJUST, label, 0, CHAR, NULL, 0}, - {"lim", "LIM", NULL, 0, maxrss, 0, CHAR, NULL, 0}, - {"lockname", "LOCK", NULL, LJUST, lockname, 0, CHAR, NULL, 0}, - {"login", "LOGIN", NULL, LJUST, logname, 0, CHAR, NULL, 0}, - {"logname", "", "login", 0, NULL, 0, CHAR, NULL, 0}, - {"lstart", "STARTED", NULL, LJUST|USER, lstarted, 0, CHAR, NULL, 0}, - {"lwp", "LWP", NULL, 0, kvar, KOFF(ki_tid), UINT, LWPFMT, 0}, - {"majflt", "MAJFLT", NULL, USER, rvar, ROFF(ru_majflt), LONG, "ld", 0}, - {"minflt", "MINFLT", NULL, USER, rvar, ROFF(ru_minflt), LONG, "ld", 0}, - {"msgrcv", "MSGRCV", NULL, USER, rvar, ROFF(ru_msgrcv), LONG, "ld", 0}, - {"msgsnd", "MSGSND", NULL, USER, rvar, ROFF(ru_msgsnd), LONG, "ld", 0}, - {"mwchan", "MWCHAN", NULL, LJUST, mwchan, 0, CHAR, NULL, 0}, - {"ni", "", "nice", 0, NULL, 0, CHAR, NULL, 0}, - {"nice", "NI", NULL, 0, kvar, KOFF(ki_nice), CHAR, "d", 0}, - {"nivcsw", "NIVCSW", NULL, USER, rvar, ROFF(ru_nivcsw), LONG, "ld", 0}, - {"nlwp", "NLWP", NULL, 0, kvar, KOFF(ki_numthreads), UINT, NLWPFMT, 0}, - {"nsignals", "", "nsigs", 0, NULL, 0, CHAR, NULL, 0}, - {"nsigs", "NSIGS", NULL, USER, rvar, ROFF(ru_nsignals), LONG, "ld", 0}, - {"nswap", "NSWAP", NULL, USER, rvar, ROFF(ru_nswap), LONG, "ld", 0}, - {"nvcsw", "NVCSW", NULL, USER, rvar, ROFF(ru_nvcsw), LONG, "ld", 0}, - {"nwchan", "NWCHAN", NULL, LJUST, nwchan, 0, CHAR, NULL, 0}, - {"oublk", "OUBLK", NULL, USER, rvar, ROFF(ru_oublock), LONG, "ld", 0}, - {"oublock", "", "oublk", 0, NULL, 0, CHAR, NULL, 0}, - {"paddr", "PADDR", NULL, 0, kvar, KOFF(ki_paddr), KPTR, "lx", 0}, - {"pagein", "PAGEIN", NULL, USER, pagein, 0, CHAR, NULL, 0}, - {"pcpu", "", "%cpu", 0, NULL, 0, CHAR, NULL, 0}, - {"pending", "", "sig", 0, NULL, 0, CHAR, NULL, 0}, - {"pgid", "PGID", NULL, 0, kvar, KOFF(ki_pgid), UINT, PIDFMT, 0}, - {"pid", "PID", NULL, 0, kvar, KOFF(ki_pid), UINT, PIDFMT, 0}, - {"pmem", "", "%mem", 0, NULL, 0, CHAR, NULL, 0}, - {"ppid", "PPID", NULL, 0, kvar, KOFF(ki_ppid), UINT, PIDFMT, 0}, - {"pri", "PRI", NULL, 0, pri, 0, CHAR, NULL, 0}, - {"re", "RE", NULL, INF127, kvar, KOFF(ki_swtime), UINT, "d", 0}, - {"rgid", "RGID", NULL, 0, kvar, KOFF(ki_rgid), UINT, UIDFMT, 0}, - {"rgroup", "RGROUP", NULL, LJUST, rgroupname, 0, CHAR, NULL, 0}, - {"rss", "RSS", NULL, 0, kvar, KOFF(ki_rssize), PGTOK, "ld", 0}, - {"rtprio", "RTPRIO", NULL, 0, priorityr, KOFF(ki_pri), CHAR, NULL, 0}, - {"ruid", "RUID", NULL, 0, kvar, KOFF(ki_ruid), UINT, UIDFMT, 0}, - {"ruser", "RUSER", NULL, LJUST, runame, 0, CHAR, NULL, 0}, - {"sid", "SID", NULL, 0, kvar, KOFF(ki_sid), UINT, PIDFMT, 0}, - {"sig", "PENDING", NULL, 0, kvar, KOFF(ki_siglist), INT, "x", 0}, - {"sigcatch", "CAUGHT", NULL, 0, kvar, KOFF(ki_sigcatch), UINT, "x", 0}, - {"sigignore", "IGNORED", NULL, 0, kvar, KOFF(ki_sigignore), - UINT, "x", 0}, - {"sigmask", "BLOCKED", NULL, 0, kvar, KOFF(ki_sigmask), UINT, "x", 0}, - {"sl", "SL", NULL, INF127, kvar, KOFF(ki_slptime), UINT, "d", 0}, - {"ssiz", "SSIZ", NULL, 0, kvar, KOFF(ki_ssize), PGTOK, "ld", 0}, - {"start", "STARTED", NULL, LJUST|USER, started, 0, CHAR, NULL, 0}, - {"stat", "", "state", 0, NULL, 0, CHAR, NULL, 0}, - {"state", "STAT", NULL, LJUST, state, 0, CHAR, NULL, 0}, - {"svgid", "SVGID", NULL, 0, kvar, KOFF(ki_svgid), UINT, UIDFMT, 0}, - {"svuid", "SVUID", NULL, 0, kvar, KOFF(ki_svuid), UINT, UIDFMT, 0}, - {"systime", "SYSTIME", NULL, USER, systime, 0, CHAR, NULL, 0}, - {"tdaddr", "TDADDR", NULL, 0, kvar, KOFF(ki_tdaddr), KPTR, "lx", 0}, - {"tdev", "TDEV", NULL, 0, tdev, 0, CHAR, NULL, 0}, - {"tdnam", "TDNAM", NULL, LJUST, tdnam, 0, CHAR, NULL, 0}, - {"time", "TIME", NULL, USER, cputime, 0, CHAR, NULL, 0}, - {"tpgid", "TPGID", NULL, 0, kvar, KOFF(ki_tpgid), UINT, PIDFMT, 0}, - {"tracer", "TRACER", NULL, 0, kvar, KOFF(ki_tracer), UINT, PIDFMT, 0}, - {"tsid", "TSID", NULL, 0, kvar, KOFF(ki_tsid), UINT, PIDFMT, 0}, - {"tsiz", "TSIZ", NULL, 0, kvar, KOFF(ki_tsize), PGTOK, "ld", 0}, - {"tt", "TT ", NULL, 0, tname, 0, CHAR, NULL, 0}, - {"tty", "TTY", NULL, LJUST, longtname, 0, CHAR, NULL, 0}, - {"ucomm", "UCOMM", NULL, LJUST, ucomm, 0, CHAR, NULL, 0}, - {"uid", "UID", NULL, 0, kvar, KOFF(ki_uid), UINT, UIDFMT, 0}, - {"upr", "UPR", NULL, 0, upr, 0, CHAR, NULL, 0}, - {"uprocp", "UPROCP", NULL, 0, kvar, KOFF(ki_paddr), KPTR, "lx", 0}, - {"user", "USER", NULL, LJUST, uname, 0, CHAR, NULL, 0}, - {"usertime", "USERTIME", NULL, USER, usertime, 0, CHAR, NULL, 0}, - {"usrpri", "", "upr", 0, NULL, 0, CHAR, NULL, 0}, - {"vsize", "", "vsz", 0, NULL, 0, CHAR, NULL, 0}, - {"vsz", "VSZ", NULL, 0, vsize, 0, CHAR, NULL, 0}, - {"wchan", "WCHAN", NULL, LJUST, wchan, 0, CHAR, NULL, 0}, - {"xstat", "XSTAT", NULL, 0, kvar, KOFF(ki_xstat), USHORT, "x", 0}, - {"", NULL, NULL, 0, NULL, 0, CHAR, NULL, 0}, + {"%cpu", "%CPU", NULL, "percent-cpu", 0, pcpu, 0, CHAR, NULL, 0}, + {"%mem", "%MEM", NULL, "percent-memory", 0, pmem, 0, CHAR, NULL, 0}, + {"acflag", "ACFLG", NULL, "accounting-flag", 0, kvar, KOFF(ki_acflag), + USHORT, "x", 0}, + {"acflg", "", "acflag", NULL, 0, NULL, 0, CHAR, NULL, 0}, + {"args", "COMMAND", NULL, "arguments", COMM|LJUST|USER, arguments, 0, + CHAR, NULL, 0}, + {"blocked", "", "sigmask", NULL, 0, NULL, 0, CHAR, NULL, 0}, + {"caught", "", "sigcatch", NULL, 0, NULL, 0, CHAR, NULL, 0}, + {"class", "CLASS", NULL, "login-class", LJUST, loginclass, 0, CHAR, + NULL, 0}, + {"comm", "COMMAND", NULL, "command", LJUST, ucomm, 0, CHAR, NULL, 0}, + {"command", "COMMAND", NULL, "command", COMM|LJUST|USER, command, 0, + CHAR, NULL, 0}, + {"cow", "COW", NULL, "copy-on-write-faults", 0, kvar, KOFF(ki_cow), + UINT, "u", 0}, + {"cpu", "CPU", NULL, "cpu-usage", 0, kvar, KOFF(ki_estcpu), UINT, "d", + 0}, + {"cputime", "", "time", NULL, 0, NULL, 0, CHAR, NULL, 0}, + {"dsiz", "DSIZ", NULL, "data-size", 0, kvar, KOFF(ki_dsize), PGTOK, + "ld", 0}, + {"egid", "", "gid", NULL, 0, NULL, 0, CHAR, NULL, 0}, + {"egroup", "", "group", NULL, 0, NULL, 0, CHAR, NULL, 0}, + {"emul", "EMUL", NULL, "emulation-envirnment", LJUST, emulname, 0, + CHAR, NULL, 0}, + {"etime", "ELAPSED", NULL, "elapsed-time", USER, elapsed, 0, CHAR, + NULL, 0}, + {"etimes", "ELAPSED", NULL, "elapsed-times", USER, elapseds, 0, CHAR, + NULL, 0}, + {"euid", "", "uid", NULL, 0, NULL, 0, CHAR, NULL, 0}, + {"f", "F", NULL, "flags", 0, kvar, KOFF(ki_flag), INT, "x", 0}, + {"f2", "F2", NULL, "flags2", 0, kvar, KOFF(ki_flag2), INT, "08x", 0}, + {"fib", "FIB", NULL, "fib", 0, kvar, KOFF(ki_fibnum), INT, "d", 0}, + {"flags", "", "f", NULL, 0, NULL, 0, CHAR, NULL, 0}, + {"flags2", "", "f2", NULL, 0, NULL, 0, CHAR, NULL, 0}, + {"gid", "GID", NULL, "gid", 0, kvar, KOFF(ki_groups), UINT, UIDFMT, 0}, + {"group", "GROUP", NULL, "group", LJUST, egroupname, 0, CHAR, NULL, 0}, + {"ignored", "", "sigignore", NULL, 0, NULL, 0, CHAR, NULL, 0}, + {"inblk", "INBLK", NULL, "read-blocks", USER, rvar, ROFF(ru_inblock), + LONG, "ld", 0}, + {"inblock", "", "inblk", NULL, 0, NULL, 0, CHAR, NULL, 0}, + {"jid", "JID", NULL, "jail-id", 0, kvar, KOFF(ki_jid), INT, "d", 0}, + {"jobc", "JOBC", NULL, "job-control-count", 0, kvar, KOFF(ki_jobc), + SHORT, "d", 0}, + {"ktrace", "KTRACE", NULL, "ktrace", 0, kvar, KOFF(ki_traceflag), INT, + "x", 0}, + {"label", "LABEL", NULL, "label", LJUST, label, 0, CHAR, NULL, 0}, + {"lim", "LIM", NULL, "memory-limit", 0, maxrss, 0, CHAR, NULL, 0}, + {"lockname", "LOCK", NULL, "lock-name", LJUST, lockname, 0, CHAR, NULL, + 0}, + {"login", "LOGIN", NULL, "login-name", LJUST, logname, 0, CHAR, NULL, + 0}, + {"logname", "", "login", NULL, 0, NULL, 0, CHAR, NULL, 0}, + {"lstart", "STARTED", NULL, "start-time", LJUST|USER, lstarted, 0, + CHAR, NULL, 0}, + {"lwp", "LWP", NULL, "process-thread-id", 0, kvar, KOFF(ki_tid), UINT, + LWPFMT, 0}, + {"majflt", "MAJFLT", NULL, "major-faults", USER, rvar, ROFF(ru_majflt), + LONG, "ld", 0}, + {"minflt", "MINFLT", NULL, "minor-faults", USER, rvar, ROFF(ru_minflt), + LONG, "ld", 0}, + {"msgrcv", "MSGRCV", NULL, "received-messages", USER, rvar, + ROFF(ru_msgrcv), LONG, "ld", 0}, + {"msgsnd", "MSGSND", NULL, "sent-messages", USER, rvar, + ROFF(ru_msgsnd), LONG, "ld", 0}, + {"mwchan", "MWCHAN", NULL, "wait-channel", LJUST, mwchan, 0, CHAR, + NULL, 0}, + {"ni", "", "nice", NULL, 0, NULL, 0, CHAR, NULL, 0}, + {"nice", "NI", NULL, "nice", 0, kvar, KOFF(ki_nice), CHAR, "d", 0}, + {"nivcsw", "NIVCSW", NULL, "involuntary-context-switches", USER, rvar, + ROFF(ru_nivcsw), LONG, "ld", 0}, + {"nlwp", "NLWP", NULL, "threads", 0, kvar, KOFF(ki_numthreads), UINT, + NLWPFMT, 0}, + {"nsignals", "", "nsigs", NULL, 0, NULL, 0, CHAR, NULL, 0}, + {"nsigs", "NSIGS", NULL, "signals-taken", USER, rvar, + ROFF(ru_nsignals), LONG, "ld", 0}, + {"nswap", "NSWAP", NULL, "swaps", USER, rvar, ROFF(ru_nswap), LONG, + "ld", 0}, + {"nvcsw", "NVCSW", NULL, "voluntary-context-switches", USER, rvar, + ROFF(ru_nvcsw), LONG, "ld", 0}, + {"nwchan", "NWCHAN", NULL, "wait-channel-address", LJUST, nwchan, 0, + CHAR, NULL, 0}, + {"oublk", "OUBLK", NULL, "written-blocks", USER, rvar, + ROFF(ru_oublock), LONG, "ld", 0}, + {"oublock", "", "oublk", NULL, 0, NULL, 0, CHAR, NULL, 0}, + {"paddr", "PADDR", NULL, "process-address", 0, kvar, KOFF(ki_paddr), + KPTR, "lx", 0}, + {"pagein", "PAGEIN", NULL, "pageins", USER, pagein, 0, CHAR, NULL, 0}, + {"pcpu", "", "%cpu", NULL, 0, NULL, 0, CHAR, NULL, 0}, + {"pending", "", "sig", NULL, 0, NULL, 0, CHAR, NULL, 0}, + {"pgid", "PGID", NULL, "process-group", 0, kvar, KOFF(ki_pgid), UINT, + PIDFMT, 0}, + {"pid", "PID", NULL, "pid", 0, kvar, KOFF(ki_pid), UINT, PIDFMT, 0}, + {"pmem", "", "%mem", NULL, 0, NULL, 0, CHAR, NULL, 0}, + {"ppid", "PPID", NULL, "ppid", 0, kvar, KOFF(ki_ppid), UINT, PIDFMT, 0}, + {"pri", "PRI", NULL, "priority", 0, pri, 0, CHAR, NULL, 0}, + {"re", "RE", NULL, "residency-time", INF127, kvar, KOFF(ki_swtime), + UINT, "d", 0}, + {"rgid", "RGID", NULL, "real-gid", 0, kvar, KOFF(ki_rgid), UINT, + UIDFMT, 0}, + {"rgroup", "RGROUP", NULL, "real-group", LJUST, rgroupname, 0, CHAR, + NULL, 0}, + {"rss", "RSS", NULL, "rss", 0, kvar, KOFF(ki_rssize), PGTOK, "ld", 0}, + {"rtprio", "RTPRIO", NULL, "realtime-priority", 0, priorityr, + KOFF(ki_pri), CHAR, NULL, 0}, + {"ruid", "RUID", NULL, "real-uid", 0, kvar, KOFF(ki_ruid), UINT, + UIDFMT, 0}, + {"ruser", "RUSER", NULL, "real-user", LJUST, runame, 0, CHAR, NULL, 0}, + {"sid", "SID", NULL, "sid", 0, kvar, KOFF(ki_sid), UINT, PIDFMT, 0}, + {"sig", "PENDING", NULL, "signals-pending", 0, kvar, KOFF(ki_siglist), + INT, "x", 0}, + {"sigcatch", "CAUGHT", NULL, "signals-caught", 0, kvar, + KOFF(ki_sigcatch), UINT, "x", 0}, + {"sigignore", "IGNORED", NULL, "signals-ignored", 0, kvar, + KOFF(ki_sigignore), UINT, "x", 0}, + {"sigmask", "BLOCKED", NULL, "signal-mask", 0, kvar, KOFF(ki_sigmask), + UINT, "x", 0}, + {"sl", "SL", NULL, "sleep-time", INF127, kvar, KOFF(ki_slptime), UINT, + "d", 0}, + {"ssiz", "SSIZ", NULL, "stack-size", 0, kvar, KOFF(ki_ssize), PGTOK, + "ld", 0}, + {"start", "STARTED", NULL, "start-time", LJUST|USER, started, 0, CHAR, + NULL, 0}, + {"stat", "", "state", NULL, 0, NULL, 0, CHAR, NULL, 0}, + {"state", "STAT", NULL, "state", LJUST, state, 0, CHAR, NULL, 0}, + {"svgid", "SVGID", NULL, "saved-gid", 0, kvar, KOFF(ki_svgid), UINT, + UIDFMT, 0}, + {"svuid", "SVUID", NULL, "saved-uid", 0, kvar, KOFF(ki_svuid), UINT, + UIDFMT, 0}, + {"systime", "SYSTIME", NULL, "system-time", USER, systime, 0, CHAR, + NULL, 0}, + {"tdaddr", "TDADDR", NULL, "thread-address", 0, kvar, KOFF(ki_tdaddr), + KPTR, "lx", 0}, + {"tdev", "TDEV", NULL, "terminal-device", 0, tdev, 0, CHAR, NULL, 0}, + {"tdnam", "TDNAM", NULL, "terminal-device-name", LJUST, tdnam, 0, CHAR, + NULL, 0}, + {"time", "TIME", NULL, "cpu-time", USER, cputime, 0, CHAR, NULL, 0}, + {"tpgid", "TPGID", NULL, "terminal-process-gid", 0, kvar, + KOFF(ki_tpgid), UINT, PIDFMT, 0}, + {"tracer", "TRACER", NULL, "tracer", 0, kvar, KOFF(ki_tracer), UINT, + PIDFMT, 0}, + {"tsid", "TSID", NULL, "terminal-sid", 0, kvar, KOFF(ki_tsid), UINT, + PIDFMT, 0}, + {"tsiz", "TSIZ", NULL, "text-size", 0, kvar, KOFF(ki_tsize), PGTOK, + "ld", 0}, + {"tt", "TT ", NULL, "terminal-name", 0, tname, 0, CHAR, NULL, 0}, + {"tty", "TTY", NULL, "tty", LJUST, longtname, 0, CHAR, NULL, 0}, + {"ucomm", "UCOMM", NULL, "accounting-name", LJUST, ucomm, 0, CHAR, + NULL, 0}, + {"uid", "UID", NULL, "uid", 0, kvar, KOFF(ki_uid), UINT, UIDFMT, 0}, + {"upr", "UPR", NULL, "user-priority", 0, upr, 0, CHAR, NULL, 0}, + {"uprocp", "UPROCP", NULL, "process-address", 0, kvar, KOFF(ki_paddr), + KPTR, "lx", 0}, + {"user", "USER", NULL, "user", LJUST, uname, 0, CHAR, NULL, 0}, + {"usertime", "USERTIME", NULL, "user-time", USER, usertime, 0, CHAR, + NULL, 0}, + {"usrpri", "", "upr", NULL, 0, NULL, 0, CHAR, NULL, 0}, + {"vsize", "", "vsz", NULL, 0, NULL, 0, CHAR, NULL, 0}, + {"vsz", "VSZ", NULL, "virtual-size", 0, vsize, 0, CHAR, NULL, 0}, + {"wchan", "WCHAN", NULL, "wait-channel", LJUST, wchan, 0, CHAR, NULL, + 0}, + {"xstat", "XSTAT", NULL, "exit-status", 0, kvar, KOFF(ki_xstat), + USHORT, "x", 0}, + {"", NULL, NULL, NULL, 0, NULL, 0, CHAR, NULL, 0}, }; void @@ -185,16 +240,19 @@ showkey(void) i = 0; sep = ""; + xo_open_list("key"); for (v = var; *(p = v->name); ++v) { int len = strlen(p); if (termwidth && (i += len + 1) > termwidth) { i = len; sep = "\n"; } - (void) printf("%s%s", sep, p); + xo_emit("{P:/%s}{l:key/%s}", sep, p); sep = " "; } - (void) printf("\n"); + xo_emit("\n"); + xo_close_list("key"); + xo_finish(); } void diff --git a/bin/ps/print.c b/bin/ps/print.c index 40ecd07d0318..91daa444e03f 100644 --- a/bin/ps/print.c +++ b/bin/ps/print.c @@ -61,6 +61,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include "ps.h" @@ -85,15 +86,15 @@ printheader(void) v = vent->var; if (v->flag & LJUST) { if (STAILQ_NEXT(vent, next_ve) == NULL) /* last one */ - (void)printf("%s", vent->header); + xo_emit("{T:/%s}", vent->header); else - (void)printf("%-*s", v->width, vent->header); + xo_emit("{T:/%-*s}", v->width, vent->header); } else - (void)printf("%*s", v->width, vent->header); + xo_emit("{T:/%*s}", v->width, vent->header); if (STAILQ_NEXT(vent, next_ve) != NULL) - (void)putchar(' '); + xo_emit("{P: }"); } - (void)putchar('\n'); + xo_emit("\n"); } char * @@ -102,7 +103,7 @@ arguments(KINFO *k, VARENT *ve) char *vis_args; if ((vis_args = malloc(strlen(k->ki_args) * 4 + 1)) == NULL) - errx(1, "malloc failed"); + xo_errx(1, "malloc failed"); strvis(vis_args, k->ki_args, VIS_TAB | VIS_NL | VIS_NOSLASH); if (STAILQ_NEXT(ve, next_ve) != NULL && strlen(vis_args) > ARGUMENTS_WIDTH) @@ -130,7 +131,7 @@ command(KINFO *k, VARENT *ve) return (str); } if ((vis_args = malloc(strlen(k->ki_args) * 4 + 1)) == NULL) - errx(1, "malloc failed"); + xo_errx(1, "malloc failed"); strvis(vis_args, k->ki_args, VIS_TAB | VIS_NL | VIS_NOSLASH); if (STAILQ_NEXT(ve, next_ve) == NULL) { @@ -139,7 +140,7 @@ command(KINFO *k, VARENT *ve) if (k->ki_env) { if ((vis_env = malloc(strlen(k->ki_env) * 4 + 1)) == NULL) - errx(1, "malloc failed"); + xo_errx(1, "malloc failed"); strvis(vis_env, k->ki_env, VIS_TAB | VIS_NL | VIS_NOSLASH); } else @@ -215,7 +216,7 @@ state(KINFO *k, VARENT *ve __unused) buf = malloc(16); if (buf == NULL) - errx(1, "malloc failed"); + xo_errx(1, "malloc failed"); flag = k->ki_p->ki_flag; tdflags = k->ki_p->ki_tdflags; /* XXXKSE */ @@ -391,7 +392,7 @@ started(KINFO *k, VARENT *ve __unused) buf = malloc(buflen); if (buf == NULL) - errx(1, "malloc failed"); + xo_errx(1, "malloc failed"); then = k->ki_p->ki_start.tv_sec; tp = localtime(&then); @@ -416,7 +417,7 @@ lstarted(KINFO *k, VARENT *ve __unused) buf = malloc(buflen); if (buf == NULL) - errx(1, "malloc failed"); + xo_errx(1, "malloc failed"); then = k->ki_p->ki_start.tv_sec; (void)strftime(buf, buflen, "%c", localtime(&then)); @@ -762,7 +763,7 @@ printval(void *bp, VAR *v) (void)asprintf(&str, ofmt, ps_pgtok(*(u_long *)bp)); break; default: - errx(1, "unknown type %d", v->type); + xo_errx(1, "unknown type %d", v->type); } return (str); @@ -804,7 +805,7 @@ label(KINFO *k, VARENT *ve __unused) string = NULL; if (mac_prepare_process_label(&proclabel) == -1) { - warn("mac_prepare_process_label"); + xo_warn("mac_prepare_process_label"); goto out; } error = mac_get_pid(k->ki_p->ki_pid, proclabel); diff --git a/bin/ps/ps.1 b/bin/ps/ps.1 index 6eead7606890..c777a6be2800 100644 --- a/bin/ps/ps.1 +++ b/bin/ps/ps.1 @@ -29,7 +29,7 @@ .\" @(#)ps.1 8.3 (Berkeley) 4/18/94 .\" $FreeBSD$ .\" -.Dd December 9, 2014 +.Dd May 27, 2015 .Dt PS 1 .Os .Sh NAME @@ -37,6 +37,7 @@ .Nd process status .Sh SYNOPSIS .Nm +.Op Fl -libxo .Op Fl aCcdefHhjlmrSTuvwXxZ .Op Fl O Ar fmt | Fl o Ar fmt .Op Fl G Ar gid Ns Op , Ns Ar gid Ns Ar ... @@ -47,6 +48,7 @@ .Op Fl t Ar tty Ns Op , Ns Ar tty Ns Ar ... .Op Fl U Ar user Ns Op , Ns Ar user Ns Ar ... .Nm +.Op Fl -libxo .Op Fl L .Sh DESCRIPTION The @@ -348,6 +350,9 @@ the include file .In sys/proc.h : .Bl -column P2_INHERIT_PROTECTED 0x00000001 .It Dv "P2_INHERIT_PROTECTED" Ta No "0x00000001" Ta "New children get P_PROTECTED" +.It Dv "P2_NOTRACE" Ta No "0x00000002" Ta "No ptrace(2) attach or coredumps" +.It Dv "P2_NOTRACE_EXEC" Ta No "0x00000004" Ta "Keep P2_NOPTRACE on exec(2)" +.It Dv "P2_AST_SU" Ta No "0x00000008" Ta "Handles SU ast for kthreads" .El .It Cm label The MAC label of the process. @@ -733,7 +738,9 @@ Display information on all system processes: .Xr procstat 1 , .Xr w 1 , .Xr kvm 3 , +.Xr libxo 3 .Xr strftime 3 , +.Xr xo_parse_args 3 .Xr mac 4 , .Xr procfs 5 , .Xr pstat 8 , diff --git a/bin/ps/ps.c b/bin/ps/ps.c index 449367cd4f1b..0e5dd5622fc9 100644 --- a/bin/ps/ps.c +++ b/bin/ps/ps.c @@ -73,6 +73,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include "ps.h" @@ -184,7 +185,9 @@ main(int argc, char *argv[]) int all, ch, elem, flag, _fmt, i, lineno, linelen, left; int descendancy, nentries, nkept, nselectors; int prtheader, wflag, what, xkeep, xkeep_implied; + int fwidthmin, fwidthmax; char errbuf[_POSIX2_LINE_MAX]; + char fmtbuf[_POSIX2_LINE_MAX]; (void) setlocale(LC_ALL, ""); time(&now); /* Used by routines in print.c. */ @@ -221,6 +224,11 @@ main(int argc, char *argv[]) init_list(&uidlist, addelem_uid, sizeof(uid_t), "user"); memf = _PATH_DEVNULL; nlistf = NULL; + + argc = xo_parse_args(argc, argv); + if (argc < 0) + exit(1); + while ((ch = getopt(argc, argv, PS_ARGS)) != -1) switch (ch) { case 'A': @@ -363,7 +371,7 @@ main(int argc, char *argv[]) #endif case 'T': if ((optarg = ttyname(STDIN_FILENO)) == NULL) - errx(1, "stdin: not a terminal"); + xo_errx(1, "stdin: not a terminal"); /* FALLTHROUGH */ case 't': add_list(&ttylist, optarg); @@ -434,8 +442,7 @@ main(int argc, char *argv[]) argv++; } if (*argv) { - fprintf(stderr, "%s: illegal argument: %s\n", - getprogname(), *argv); + xo_warnx("illegal argument: %s\n", *argv); usage(); } if (optfatal) @@ -445,7 +452,7 @@ main(int argc, char *argv[]) kd = kvm_openfiles(nlistf, memf, NULL, O_RDONLY, errbuf); if (kd == 0) - errx(1, "%s", errbuf); + xo_errx(1, "%s", errbuf); if (!_fmt) parsefmt(dfmt, 0); @@ -453,7 +460,7 @@ main(int argc, char *argv[]) if (nselectors == 0) { uidlist.l.ptr = malloc(sizeof(uid_t)); if (uidlist.l.ptr == NULL) - errx(1, "malloc failed"); + xo_errx(1, "malloc failed"); nselectors = 1; uidlist.count = uidlist.maxcount = 1; *uidlist.l.uids = getuid(); @@ -515,11 +522,11 @@ main(int argc, char *argv[]) nentries = -1; kp = kvm_getprocs(kd, what, flag, &nentries); if ((kp == NULL && nentries > 0) || (kp != NULL && nentries < 0)) - errx(1, "%s", kvm_geterr(kd)); + xo_errx(1, "%s", kvm_geterr(kd)); nkept = 0; if (nentries > 0) { if ((kinfo = malloc(nentries * sizeof(*kinfo))) == NULL) - errx(1, "malloc failed"); + xo_errx(1, "malloc failed"); for (i = nentries; --i >= 0; ++kp) { /* * If the user specified multiple selection-criteria, @@ -629,13 +636,18 @@ main(int argc, char *argv[]) /* * Print header. */ + xo_open_container("process-information"); printheader(); + if (xo_get_style(NULL) != XO_STYLE_TEXT) + termwidth = UNLIMITED; /* * Output formatted lines. */ + xo_open_list("process"); for (i = lineno = 0; i < nkept; i++) { linelen = 0; + xo_open_instance("process"); STAILQ_FOREACH(vent, &varlist, next_ve) { if (vent->var->flag & LJUST) fmtstr = "%-*s"; @@ -645,21 +657,27 @@ main(int argc, char *argv[]) ks = STAILQ_FIRST(&kinfo[i].ki_ks); STAILQ_REMOVE_HEAD(&kinfo[i].ki_ks, ks_next); /* Truncate rightmost column if necessary. */ + fwidthmax = _POSIX2_LINE_MAX; if (STAILQ_NEXT(vent, next_ve) == NULL && termwidth != UNLIMITED && ks->ks_str != NULL) { left = termwidth - linelen; if (left > 0 && left < (int)strlen(ks->ks_str)) - ks->ks_str[left] = '\0'; + fwidthmax = left; } + str = ks->ks_str; if (str == NULL) str = "-"; /* No padding for the last column, if it's LJUST. */ - if (STAILQ_NEXT(vent, next_ve) == NULL && - vent->var->flag & LJUST) - linelen += printf(fmtstr, 0, str); - else - linelen += printf(fmtstr, vent->var->width, str); + fwidthmin = (xo_get_style(NULL) != XO_STYLE_TEXT || + (STAILQ_NEXT(vent, next_ve) == NULL && + (vent->var->flag & LJUST))) ? 0 : vent->var->width; + snprintf(fmtbuf, sizeof(fmtbuf), "{:%s/%%%s%d..%ds}", + vent->var->field ?: vent->var->name, + (vent->var->flag & LJUST) ? "-" : "", + fwidthmin, fwidthmax); + xo_emit(fmtbuf, str); + linelen += fwidthmin; if (ks->ks_str != NULL) { free(ks->ks_str); @@ -669,17 +687,22 @@ main(int argc, char *argv[]) ks = NULL; if (STAILQ_NEXT(vent, next_ve) != NULL) { - (void)putchar(' '); + xo_emit("{P: }"); linelen++; } } - (void)putchar('\n'); + xo_emit("\n"); + xo_close_instance("process"); if (prtheader && lineno++ == prtheader - 4) { - (void)putchar('\n'); + xo_emit("\n"); printheader(); lineno = 0; } } + xo_close_list("process"); + xo_close_container("process-information"); + xo_finish(); + free_list(&gidlist); free_list(&jidlist); free_list(&pidlist); @@ -705,9 +728,9 @@ addelem_gid(struct listinfo *inf, const char *elem) if (*elem == '\0' || strlen(elem) >= MAXLOGNAME) { if (*elem == '\0') - warnx("Invalid (zero-length) %s name", inf->lname); + xo_warnx("Invalid (zero-length) %s name", inf->lname); else - warnx("%s name too long: %s", inf->lname, elem); + xo_warnx("%s name too long: %s", inf->lname, elem); optfatal = 1; return (0); /* Do not add this value. */ } @@ -732,7 +755,7 @@ addelem_gid(struct listinfo *inf, const char *elem) if (grp == NULL) grp = getgrnam(elem); if (grp == NULL) { - warnx("No %s %s '%s'", inf->lname, nameorID, elem); + xo_warnx("No %s %s '%s'", inf->lname, nameorID, elem); optfatal = 1; return (0); } @@ -773,7 +796,7 @@ addelem_pid(struct listinfo *inf, const char *elem) long tempid; if (*elem == '\0') { - warnx("Invalid (zero-length) process id"); + xo_warnx("Invalid (zero-length) process id"); optfatal = 1; return (0); /* Do not add this value. */ } @@ -781,10 +804,10 @@ addelem_pid(struct listinfo *inf, const char *elem) errno = 0; tempid = strtol(elem, &endp, 10); if (*endp != '\0' || tempid < 0 || elem == endp) { - warnx("Invalid %s: %s", inf->lname, elem); + xo_warnx("Invalid %s: %s", inf->lname, elem); errno = ERANGE; } else if (errno != 0 || tempid > pid_max) { - warnx("%s too large: %s", inf->lname, elem); + xo_warnx("%s too large: %s", inf->lname, elem); errno = ERANGE; } if (errno == ERANGE) { @@ -855,19 +878,19 @@ addelem_tty(struct listinfo *inf, const char *elem) if (ttypath) { if (stat(ttypath, &sb) == -1) { if (pathbuf3[0] != '\0') - warn("%s, %s, and %s", pathbuf3, pathbuf2, + xo_warn("%s, %s, and %s", pathbuf3, pathbuf2, ttypath); else - warn("%s", ttypath); + xo_warn("%s", ttypath); optfatal = 1; return (0); } if (!S_ISCHR(sb.st_mode)) { if (pathbuf3[0] != '\0') - warnx("%s, %s, and %s: Not a terminal", + xo_warnx("%s, %s, and %s: Not a terminal", pathbuf3, pathbuf2, ttypath); else - warnx("%s: Not a terminal", ttypath); + xo_warnx("%s: Not a terminal", ttypath); optfatal = 1; return (0); } @@ -887,9 +910,9 @@ addelem_uid(struct listinfo *inf, const char *elem) if (*elem == '\0' || strlen(elem) >= MAXLOGNAME) { if (*elem == '\0') - warnx("Invalid (zero-length) %s name", inf->lname); + xo_warnx("Invalid (zero-length) %s name", inf->lname); else - warnx("%s name too long: %s", inf->lname, elem); + xo_warnx("%s name too long: %s", inf->lname, elem); optfatal = 1; return (0); /* Do not add this value. */ } @@ -899,12 +922,12 @@ addelem_uid(struct listinfo *inf, const char *elem) errno = 0; bigtemp = strtoul(elem, &endp, 10); if (errno != 0 || *endp != '\0' || bigtemp > UID_MAX) - warnx("No %s named '%s'", inf->lname, elem); + xo_warnx("No %s named '%s'", inf->lname, elem); else { /* The string is all digits, so it might be a userID. */ pwd = getpwuid((uid_t)bigtemp); if (pwd == NULL) - warnx("No %s name or ID matches '%s'", + xo_warnx("No %s name or ID matches '%s'", inf->lname, elem); } } @@ -961,7 +984,7 @@ add_list(struct listinfo *inf, const char *argp) while (*argp != '\0' && strchr(W_SEP T_SEP, *argp) == NULL) argp++; - warnx("Value too long: %.*s", (int)(argp - savep), + xo_warnx("Value too long: %.*s", (int)(argp - savep), savep); optfatal = 1; } @@ -1062,7 +1085,7 @@ descendant_sort(KINFO *ki, int items) continue; } if ((ki[src].ki_d.prefix = malloc(lvl * 2 + 1)) == NULL) - errx(1, "malloc failed"); + xo_errx(1, "malloc failed"); for (n = 0; n < lvl - 2; n++) { ki[src].ki_d.prefix[n * 2] = path[n / 8] & 1 << (n % 8) ? '|' : ' '; @@ -1100,7 +1123,7 @@ expand_list(struct listinfo *inf) newlist = realloc(inf->l.ptr, newmax * inf->elemsize); if (newlist == NULL) { free(inf->l.ptr); - errx(1, "realloc to %d %ss failed", newmax, inf->lname); + xo_errx(1, "realloc to %d %ss failed", newmax, inf->lname); } inf->maxcount = newmax; inf->l.ptr = newlist; @@ -1174,7 +1197,7 @@ format_output(KINFO *ki) str = (v->oproc)(ki, vent); ks = malloc(sizeof(*ks)); if (ks == NULL) - errx(1, "malloc failed"); + xo_errx(1, "malloc failed"); ks->ks_str = str; STAILQ_INSERT_TAIL(&ki->ki_ks, ks, ks_next); if (str != NULL) { @@ -1240,7 +1263,7 @@ saveuser(KINFO *ki) else asprintf(&ki->ki_args, "(%s)", ki->ki_p->ki_comm); if (ki->ki_args == NULL) - errx(1, "malloc failed"); + xo_errx(1, "malloc failed"); } else { ki->ki_args = NULL; } @@ -1251,7 +1274,7 @@ saveuser(KINFO *ki) else ki->ki_env = strdup("()"); if (ki->ki_env == NULL) - errx(1, "malloc failed"); + xo_errx(1, "malloc failed"); } else { ki->ki_env = NULL; } @@ -1372,7 +1395,7 @@ kludge_oldps_options(const char *optlist, char *origval, const char *nextarg) * original value. */ if ((newopts = ns = malloc(len + 3)) == NULL) - errx(1, "malloc failed"); + xo_errx(1, "malloc failed"); if (*origval != '-') *ns++ = '-'; /* add option flag */ @@ -1401,7 +1424,7 @@ pidmax_init(void) intsize = sizeof(pid_max); if (sysctlbyname("kern.pid_max", &pid_max, &intsize, NULL, 0) < 0) { - warn("unable to read kern.pid_max"); + xo_warn("unable to read kern.pid_max"); pid_max = 99999; } } @@ -1411,7 +1434,7 @@ usage(void) { #define SINGLE_OPTS "[-aCcde" OPT_LAZY_f "HhjlmrSTuvwXxZ]" - (void)fprintf(stderr, "%s\n%s\n%s\n%s\n", + (void)xo_error("%s\n%s\n%s\n%s\n", "usage: ps " SINGLE_OPTS " [-O fmt | -o fmt] [-G gid[,gid...]]", " [-J jid[,jid...]] [-M core] [-N system]", " [-p pid[,pid...]] [-t tty[,tty...]] [-U user[,user...]]", diff --git a/bin/ps/ps.h b/bin/ps/ps.h index 86aaeb0fe652..314fbf276994 100644 --- a/bin/ps/ps.h +++ b/bin/ps/ps.h @@ -65,6 +65,7 @@ typedef struct var { const char *name; /* name(s) of variable */ const char *header; /* default header */ const char *alias; /* aliases */ + const char *field; /* xo field name */ #define COMM 0x01 /* needs exec arguments and environment (XXX) */ #define LJUST 0x02 /* left adjust on output (trailing blanks) */ #define USER 0x04 /* needs user structure */ diff --git a/cddl/contrib/opensolaris/cmd/lockstat/lockstat.1 b/cddl/contrib/opensolaris/cmd/lockstat/lockstat.1 index a725c8ba203c..1aa73cc114ea 100644 --- a/cddl/contrib/opensolaris/cmd/lockstat/lockstat.1 +++ b/cddl/contrib/opensolaris/cmd/lockstat/lockstat.1 @@ -21,7 +21,7 @@ .\" .\" $FreeBSD$ .\" -.Dd October 8, 2014 +.Dd May 24, 2015 .Dt LOCKSTAT 1 .Os .Sh NAME @@ -29,7 +29,7 @@ .Nd report kernel lock and profiling statistics .Sh SYNOPSIS .Nm -.Op Fl ACEHI +.Op Fl ACEHIV .Op Fl e Ar event-list .Op Fl i Ar rate .Op Fl b | t | h | s Ar depth @@ -90,6 +90,10 @@ to is restricted to super-user by default. .Sh OPTIONS The following options are supported: +.Bl -tag -width indent +.It Fl V +Print the D program used to gather the requested data. +.El .Ss Event Selection If no event selection options are specified, the default is .Fl C . diff --git a/cddl/contrib/opensolaris/cmd/lockstat/lockstat.c b/cddl/contrib/opensolaris/cmd/lockstat/lockstat.c index ad512c1c92c4..4c0c0d48c9de 100644 --- a/cddl/contrib/opensolaris/cmd/lockstat/lockstat.c +++ b/cddl/contrib/opensolaris/cmd/lockstat/lockstat.c @@ -299,6 +299,8 @@ usage(void) { (void) fprintf(stderr, "Usage: lockstat [options] command [args]\n" + "\nGeneral options:\n\n" + " -V print the corresponding D program\n" "\nEvent selection options:\n\n" " -C watch contention events [on by default]\n" " -E watch error events [off by default]\n" diff --git a/cddl/contrib/opensolaris/common/ctf/ctf_create.c b/cddl/contrib/opensolaris/common/ctf/ctf_create.c index 1c0988a38783..a2ca81960f73 100644 --- a/cddl/contrib/opensolaris/common/ctf/ctf_create.c +++ b/cddl/contrib/opensolaris/common/ctf/ctf_create.c @@ -1328,15 +1328,28 @@ ctf_add_type(ctf_file_t *dst_fp, ctf_file_t *src_fp, ctf_id_t src_type) * we are looking for. This is necessary to permit ctf_add_type() to * operate recursively on entities such as a struct that contains a * pointer member that refers to the same struct type. + * + * In the case of integer and floating point types, we match using the + * type encoding as well - else we may incorrectly return a bitfield + * type, for instance. */ if (dst_type == CTF_ERR && name[0] != '\0') { for (dtd = ctf_list_prev(&dst_fp->ctf_dtdefs); dtd != NULL && CTF_TYPE_TO_INDEX(dtd->dtd_type) > dst_fp->ctf_dtoldid; dtd = ctf_list_prev(dtd)) { - if (CTF_INFO_KIND(dtd->dtd_data.ctt_info) == kind && - dtd->dtd_name != NULL && - strcmp(dtd->dtd_name, name) == 0) - return (dtd->dtd_type); + if (CTF_INFO_KIND(dtd->dtd_data.ctt_info) != kind || + dtd->dtd_name == NULL || + strcmp(dtd->dtd_name, name) != 0) + continue; + if (kind == CTF_K_INTEGER || kind == CTF_K_FLOAT) { + if (ctf_type_encoding(src_fp, src_type, + &src_en) != 0) + continue; + if (bcmp(&src_en, &dtd->dtd_u.dtu_enc, + sizeof (ctf_encoding_t)) != 0) + continue; + } + return (dtd->dtd_type); } } diff --git a/cddl/contrib/opensolaris/lib/libdtrace/common/dt_lex.l b/cddl/contrib/opensolaris/lib/libdtrace/common/dt_lex.l index 925f8a5875e9..192e1e20d82c 100644 --- a/cddl/contrib/opensolaris/lib/libdtrace/common/dt_lex.l +++ b/cddl/contrib/opensolaris/lib/libdtrace/common/dt_lex.l @@ -743,6 +743,7 @@ yyinit(dt_pcb_t *pcb) #ifdef illumos yysptr = yysbuf; #endif + YY_FLUSH_BUFFER; } /* diff --git a/cddl/contrib/opensolaris/lib/libdtrace/common/dt_link.c b/cddl/contrib/opensolaris/lib/libdtrace/common/dt_link.c index eaf0961c90c8..f9b9625d6af6 100644 --- a/cddl/contrib/opensolaris/lib/libdtrace/common/dt_link.c +++ b/cddl/contrib/opensolaris/lib/libdtrace/common/dt_link.c @@ -1785,17 +1785,11 @@ dtrace_program_link(dtrace_hdl_t *dtp, dtrace_prog_t *pgp, uint_t dflags, "failed to open %s: %s", file, strerror(errno))); } #else - if (dtp->dt_lazyload) { - if ((fd = open(file, O_RDWR | O_CREAT | O_TRUNC, 0666)) < 0) - return (dt_link_error(dtp, NULL, -1, NULL, - "failed to open %s: %s", file, strerror(errno))); - } else { - snprintf(tfile, sizeof(tfile), "%s.XXXXXX", file); - if ((fd = mkstemp(tfile)) == -1) - return (dt_link_error(dtp, NULL, -1, NULL, - "failed to create temporary file %s: %s", - tfile, strerror(errno))); - } + snprintf(tfile, sizeof(tfile), "%s.XXXXXX", file); + if ((fd = mkostemp(tfile, O_CLOEXEC)) == -1) + return (dt_link_error(dtp, NULL, -1, NULL, + "failed to create temporary file %s: %s", + tfile, strerror(errno))); #endif /* @@ -1868,23 +1862,9 @@ dtrace_program_link(dtrace_hdl_t *dtp, dtrace_prog_t *pgp, uint_t dflags, (void) snprintf(cmd, len, fmt, dtp->dt_ld_path, file, fd, drti); #else const char *fmt = "%s -o %s -r %s %s"; + dt_dirpath_t *dp = dt_list_next(&dtp->dt_lib_path); -#if defined(__amd64__) - /* - * Arches which default to 64-bit need to explicitly use - * the 32-bit library path. - */ - int use_32 = (dtp->dt_oflags & DTRACE_O_ILP32); -#else - /* - * Arches which are 32-bit only just use the normal - * library path. - */ - int use_32 = 0; -#endif - - (void) snprintf(drti, sizeof (drti), "/usr/lib%s/dtrace/drti.o", - use_32 ? "32" : ""); + (void) snprintf(drti, sizeof (drti), "%s/drti.o", dp->dir_path); len = snprintf(&tmp, 1, fmt, dtp->dt_ld_path, file, tfile, drti) + 1; @@ -1951,14 +1931,23 @@ dtrace_program_link(dtrace_hdl_t *dtp, dtrace_prog_t *pgp, uint_t dflags, } #endif } else { +#ifdef __FreeBSD__ + if (rename(tfile, file) != 0) { + ret = dt_link_error(dtp, NULL, fd, NULL, + "failed to rename %s to %s: %s", tfile, file, + strerror(errno)); + goto done; + } +#endif (void) close(fd); } done: dtrace_dof_destroy(dtp, dof); -#ifndef illumos - unlink(tfile); +#ifdef __FreeBSD__ + if (!dtp->dt_lazyload) + (void) unlink(tfile); #endif return (ret); } diff --git a/cddl/contrib/opensolaris/lib/libdtrace/common/dt_open.c b/cddl/contrib/opensolaris/lib/libdtrace/common/dt_open.c index c95224373bcd..80e4be9a32d9 100644 --- a/cddl/contrib/opensolaris/lib/libdtrace/common/dt_open.c +++ b/cddl/contrib/opensolaris/lib/libdtrace/common/dt_open.c @@ -792,6 +792,7 @@ const char *_dtrace_libdir = "/usr/lib/dtrace"; /* default library directory */ #ifdef illumos const char *_dtrace_provdir = "/dev/dtrace/provider"; /* provider directory */ #else +const char *_dtrace_libdir32 = "/usr/lib32/dtrace"; const char *_dtrace_provdir = "/dev/dtrace"; /* provider directory */ #endif @@ -1581,8 +1582,19 @@ dt_vopen(int version, int flags, int *errp, * compile, and to provide better error reporting (because the full * reporting of compiler errors requires dtrace_open() to succeed). */ +#ifdef __FreeBSD__ +#ifdef __LP64__ + if ((dtp->dt_oflags & DTRACE_O_ILP32) != 0) { + if (dtrace_setopt(dtp, "libdir", _dtrace_libdir32) != 0) + return (set_open_errno(dtp, errp, dtp->dt_errno)); + } +#endif if (dtrace_setopt(dtp, "libdir", _dtrace_libdir) != 0) return (set_open_errno(dtp, errp, dtp->dt_errno)); +#else + if (dtrace_setopt(dtp, "libdir", _dtrace_libdir) != 0) + return (set_open_errno(dtp, errp, dtp->dt_errno)); +#endif return (dtp); } diff --git a/cddl/lib/Makefile b/cddl/lib/Makefile index 955103e3e742..48a77abb5107 100644 --- a/cddl/lib/Makefile +++ b/cddl/lib/Makefile @@ -33,4 +33,11 @@ _drti= drti _libdtrace= libdtrace .endif +SUBDIR_DEPEND_libdtrace= libctf +SUBDIR_DEPEND_libzfs_core= libnvpair +SUBDIR_DEPEND_libzfs= libavl libnvpair libumem libuutil libzfs_core +SUBDIR_DEPEND_libzpool= libavl libnvpair libumem + +SUBDIR_PARALLEL= + .include diff --git a/cddl/lib/libdtrace/Makefile b/cddl/lib/libdtrace/Makefile index 7678db6329a8..128ccf5f9071 100644 --- a/cddl/lib/libdtrace/Makefile +++ b/cddl/lib/libdtrace/Makefile @@ -50,6 +50,7 @@ DSRCS= errno.d \ io.d \ ip.d \ psinfo.d \ + siftr.d \ signal.d \ tcp.d \ udp.d \ @@ -103,6 +104,8 @@ LFLAGS+=-l YFLAGS+=-d +LIBADD= ctf elf proc pthread rtld_db + CLEANFILES= dt_errtags.c dt_names.c dt_errtags.c: diff --git a/cddl/lib/libdtrace/siftr.d b/cddl/lib/libdtrace/siftr.d new file mode 100644 index 000000000000..a6ff844901dc --- /dev/null +++ b/cddl/lib/libdtrace/siftr.d @@ -0,0 +1,100 @@ +/* + * CDDL HEADER START + * + * The contents of this file are subject to the terms of the + * Common Development and Distribution License (the "License"). + * You may not use this file except in compliance with the License. + * + * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE + * or http://www.opensolaris.org/os/licensing. + * See the License for the specific language governing permissions + * and limitations under the License. + * + * When distributing Covered Code, include this CDDL HEADER in each + * file and include the License file at usr/src/OPENSOLARIS.LICENSE. + * If applicable, add the following below this CDDL HEADER, with the + * fields enclosed by brackets "[]" replaced with your own identifying + * information: Portions Copyright [yyyy] [name of copyright owner] + * + * CDDL HEADER END + * + * $FreeBSD$ + */ + +#pragma D depends_on module siftr +#pragma D depends_on provider tcp + +/* + * Convert a SIFTR direction value to a string + */ +#pragma D binding "1.12.1" SIFTR_IN +inline int SIFTR_IN = 1; +#pragma D binding "1.12.1" SIFTR_OUT +inline int SIFTR_OUT = 2; + +/* SIFTR direction strings. */ +#pragma D binding "1.12.1" siftr_dir_string +inline string siftr_dir_string[uint8_t direction] = + direction == SIFTR_IN ? "in" : + direction == SIFTR_OUT ? "out" : + "unknown" ; + +typedef struct siftrinfo { + struct timeval tval; + uint8_t direction; + uint8_t ipver; + uint32_t hash; + uint16_t tcp_localport; + uint16_t tcp_foreignport; + uint64_t snd_cwnd; + u_long snd_wnd; + u_long rcv_wnd; + u_long snd_bwnd; + u_long snd_ssthresh; + int conn_state; + u_int max_seg_size; + int smoothed_rtt; + u_char sack_enabled; + u_char snd_scale; + u_char rcv_scale; + u_int flags; + int rxt_length; + u_int snd_buf_hiwater; + u_int snd_buf_cc; + u_int rcv_buf_hiwater; + u_int rcv_buf_cc; + u_int sent_inflight_bytes; + int t_segqlen; + u_int flowid; + u_int flowtype; +} siftrinfo_t; + +#pragma D binding "1.12.1" translator +translator siftrinfo_t < struct pkt_node *p > { + direction = p == NULL ? 0 : p->direction; + ipver = p == NULL ? 0 : p->ipver; + hash = p == NULL ? 0 : p->hash; + tcp_localport = p == NULL ? 0 : ntohs(p->tcp_localport); + tcp_foreignport = p == NULL ? 0 : ntohs(p->tcp_foreignport); + snd_cwnd = p == NULL ? 0 : p->snd_cwnd; + snd_wnd = p == NULL ? 0 : p->snd_wnd; + rcv_wnd = p == NULL ? 0 : p->rcv_wnd; + snd_bwnd = p == NULL ? 0 : p->snd_bwnd; + snd_ssthresh = p == NULL ? 0 : p->snd_ssthresh; + conn_state = p == NULL ? 0 : p->conn_state; + max_seg_size = p == NULL ? 0 : p->max_seg_size; + smoothed_rtt = p == NULL ? 0 : p->smoothed_rtt; + sack_enabled = p == NULL ? 0 : p->sack_enabled; + snd_scale = p == NULL ? 0 : p->snd_scale; + rcv_scale = p == NULL ? 0 : p->rcv_scale; + flags = p == NULL ? 0 : p->flags; + rxt_length = p == NULL ? 0 : p->rxt_length; + snd_buf_hiwater = p == NULL ? 0 : p->snd_buf_hiwater; + snd_buf_cc = p == NULL ? 0 : p->snd_buf_cc; + rcv_buf_hiwater = p == NULL ? 0 : p->rcv_buf_hiwater; + rcv_buf_cc = p == NULL ? 0 : p->rcv_buf_cc; + sent_inflight_bytes = p == NULL ? 0 : p->sent_inflight_bytes; + t_segqlen = p == NULL ? 0 : p->t_segqlen; + flowid = p == NULL ? 0 : p->flowid; + flowtype = p == NULL ? 0 : p->flowtype; +}; diff --git a/cddl/lib/libdtrace/tcp.d b/cddl/lib/libdtrace/tcp.d index e642020d2d6b..4b826f175572 100644 --- a/cddl/lib/libdtrace/tcp.d +++ b/cddl/lib/libdtrace/tcp.d @@ -241,78 +241,3 @@ translator tcpinfoh_t < struct tcphdr *p > { translator tcplsinfo_t < int s > { tcps_state = s; }; - -/* - * Convert a SIFTR direction value to a string - */ -#pragma D binding "1.12.1" SIFTR_IN -inline int SIFTR_IN = 1; -#pragma D binding "1.12.1" SIFTR_OUT -inline int SIFTR_OUT = 2; - -/* SIFTR direction strings. */ -#pragma D binding "1.12.1" siftr_dir_string -inline string siftr_dir_string[uint8_t direction] = - direction == SIFTR_IN ? "in" : - direction == SIFTR_OUT ? "out" : - "unknown" ; - -typedef struct siftrinfo { - struct timeval tval; - uint8_t direction; - uint8_t ipver; - uint32_t hash; - uint16_t tcp_localport; - uint16_t tcp_foreignport; - uint64_t snd_cwnd; - u_long snd_wnd; - u_long rcv_wnd; - u_long snd_bwnd; - u_long snd_ssthresh; - int conn_state; - u_int max_seg_size; - int smoothed_rtt; - u_char sack_enabled; - u_char snd_scale; - u_char rcv_scale; - u_int flags; - int rxt_length; - u_int snd_buf_hiwater; - u_int snd_buf_cc; - u_int rcv_buf_hiwater; - u_int rcv_buf_cc; - u_int sent_inflight_bytes; - int t_segqlen; - u_int flowid; - u_int flowtype; -} siftrinfo_t; - -#pragma D binding "1.12.1" translator -translator siftrinfo_t < struct pkt_node *p > { - direction = p == NULL ? 0 : p->direction; - ipver = p == NULL ? 0 : p->ipver; - hash = p == NULL ? 0 : p->hash; - tcp_localport = p == NULL ? 0 : ntohs(p->tcp_localport); - tcp_foreignport = p == NULL ? 0 : ntohs(p->tcp_foreignport); - snd_cwnd = p == NULL ? 0 : p->snd_cwnd; - snd_wnd = p == NULL ? 0 : p->snd_wnd; - rcv_wnd = p == NULL ? 0 : p->rcv_wnd; - snd_bwnd = p == NULL ? 0 : p->snd_bwnd; - snd_ssthresh = p == NULL ? 0 : p->snd_ssthresh; - conn_state = p == NULL ? 0 : p->conn_state; - max_seg_size = p == NULL ? 0 : p->max_seg_size; - smoothed_rtt = p == NULL ? 0 : p->smoothed_rtt; - sack_enabled = p == NULL ? 0 : p->sack_enabled; - snd_scale = p == NULL ? 0 : p->snd_scale; - rcv_scale = p == NULL ? 0 : p->rcv_scale; - flags = p == NULL ? 0 : p->flags; - rxt_length = p == NULL ? 0 : p->rxt_length; - snd_buf_hiwater = p == NULL ? 0 : p->snd_buf_hiwater; - snd_buf_cc = p == NULL ? 0 : p->snd_buf_cc; - rcv_buf_hiwater = p == NULL ? 0 : p->rcv_buf_hiwater; - rcv_buf_cc = p == NULL ? 0 : p->rcv_buf_cc; - sent_inflight_bytes = p == NULL ? 0 : p->sent_inflight_bytes; - t_segqlen = p == NULL ? 0 : p->t_segqlen; - flowid = p == NULL ? 0 : p->flowid; - flowtype = p == NULL ? 0 : p->flowtype; -}; diff --git a/cddl/sbin/Makefile b/cddl/sbin/Makefile index f40f2a45e759..19daabd02b57 100644 --- a/cddl/sbin/Makefile +++ b/cddl/sbin/Makefile @@ -13,4 +13,6 @@ _zfs= zfs _zpool= zpool .endif +SUBDIR_PARALLEL= + .include diff --git a/cddl/usr.bin/Makefile b/cddl/usr.bin/Makefile index 533697d1ed00..69179c5545c8 100644 --- a/cddl/usr.bin/Makefile +++ b/cddl/usr.bin/Makefile @@ -26,4 +26,6 @@ _zstreamdump = zstreamdump .endif .endif +SUBDIR_PARALLEL= + .include diff --git a/cddl/usr.bin/ctfconvert/Makefile b/cddl/usr.bin/ctfconvert/Makefile index f50cecb43796..b1dd8a231f81 100644 --- a/cddl/usr.bin/ctfconvert/Makefile +++ b/cddl/usr.bin/ctfconvert/Makefile @@ -3,8 +3,6 @@ .PATH: ${.CURDIR}/../../../cddl/contrib/opensolaris/tools/ctf/common .PATH: ${.CURDIR}/../../../cddl/contrib/opensolaris/tools/ctf/cvt -DEBUG_FLAGS= -g - PROG= ctfconvert SRCS= alist.c \ ctf.c \ @@ -36,7 +34,6 @@ CFLAGS+= -I${.CURDIR}/../../../sys/cddl/compat/opensolaris \ -I${OPENSOLARIS_USR_DISTDIR}/tools/ctf/cvt \ -I${OPENSOLARIS_SYS_DISTDIR}/uts/common -DPADD= ${LIBDWARF} ${LIBELF} ${LIBZ} ${LIBPTHREAD} -LDADD= -ldwarf -lelf -lz -lpthread +LIBADD= dwarf elf z pthread .include diff --git a/cddl/usr.bin/ctfdump/Makefile b/cddl/usr.bin/ctfdump/Makefile index e87e7a0a6a5a..74adad254124 100644 --- a/cddl/usr.bin/ctfdump/Makefile +++ b/cddl/usr.bin/ctfdump/Makefile @@ -17,7 +17,6 @@ CFLAGS+= -I${OPENSOLARIS_USR_DISTDIR} \ -I${OPENSOLARIS_USR_DISTDIR}/tools/ctf/common \ -I${OPENSOLARIS_SYS_DISTDIR}/uts/common -DPADD= ${LIBPTHREAD} ${LIBELF} ${LIBZ} -LDADD= -lpthread -lelf -lz +LIBADD= elf z .include diff --git a/cddl/usr.sbin/Makefile b/cddl/usr.sbin/Makefile index 73315ffa1a69..d309075a4306 100644 --- a/cddl/usr.sbin/Makefile +++ b/cddl/usr.sbin/Makefile @@ -46,4 +46,6 @@ _dtruss= dtruss _lockstat= lockstat .endif +SUBDIR_PARALLEL= + .include diff --git a/cddl/usr.sbin/dtrace/Makefile b/cddl/usr.sbin/dtrace/Makefile index dfccf886e6af..8c5e3abe5a07 100644 --- a/cddl/usr.sbin/dtrace/Makefile +++ b/cddl/usr.sbin/dtrace/Makefile @@ -20,9 +20,6 @@ CFLAGS+= -I${.CURDIR}/../../../sys/cddl/compat/opensolaris \ #CFLAGS+= -DNEED_ERRLOC #YFLAGS+= -d -DPADD= ${LIBPTHREAD} ${LIBDTRACE} ${LIBY} ${LIBL} ${LIBPROC} \ - ${LIBCTF} ${LIBELF} ${LIBZ} ${LIBUTIL} ${LIBRTLD_DB} -LDADD= -lpthread -ldtrace -ly -ll -lproc -lctf -lelf -lz -lutil \ - -lrtld_db +LIBADD= dtrace .include diff --git a/cddl/usr.sbin/dtrace/tests/tools/exclude.sh b/cddl/usr.sbin/dtrace/tests/tools/exclude.sh index a42773daae37..33c9efca0f45 100755 --- a/cddl/usr.sbin/dtrace/tests/tools/exclude.sh +++ b/cddl/usr.sbin/dtrace/tests/tools/exclude.sh @@ -38,7 +38,6 @@ exclude EXFAIL common/ip/tst.ipv4localudp.ksh exclude EXFAIL common/mdb/tst.dtracedcmd.ksh exclude EXFAIL common/misc/tst.dofmax.ksh exclude EXFAIL common/misc/tst.include.ksh -exclude EXFAIL common/pragma/tst.libchain.ksh exclude EXFAIL common/safety/tst.copyin2.d exclude EXFAIL common/safety/tst.msgdsize.d exclude EXFAIL common/safety/tst.msgsize.d diff --git a/cddl/usr.sbin/lockstat/Makefile b/cddl/usr.sbin/lockstat/Makefile index 0668758c2f97..a4eb898e33de 100644 --- a/cddl/usr.sbin/lockstat/Makefile +++ b/cddl/usr.sbin/lockstat/Makefile @@ -21,10 +21,6 @@ CFLAGS+= -DNEED_ERRLOC -g #YFLAGS+= -d -DPADD= ${LIBPTHREAD} ${LIBDTRACE} ${LIBY} ${LIBL} ${LIBPROC} \ - ${LIBCTF} ${LIBELF} ${LIBZ} ${LIBRT} ${LIBUTIL} \ - ${LIBRTLD_DB} -LDADD= -lpthread -ldtrace -ly -ll -lproc -lctf -lelf -lz -lrt -lutil \ - -lrtld_db +LIBADD= elf dtrace rt .include diff --git a/cddl/usr.sbin/plockstat/Makefile b/cddl/usr.sbin/plockstat/Makefile index 059295898110..fc10b5679890 100644 --- a/cddl/usr.sbin/plockstat/Makefile +++ b/cddl/usr.sbin/plockstat/Makefile @@ -18,9 +18,6 @@ CFLAGS+= -I${.CURDIR}/../../../sys/cddl/compat/opensolaris \ -I${.CURDIR}/../../../cddl/lib/libdtrace \ -I${.CURDIR}/../../../sys -DPADD= ${LIBPTHREAD} ${LIBDTRACE} ${LIBY} ${LIBL} ${LIBPROC} ${LIBCTF}\ - ${LIBELF} ${LIBZ} ${LIBRT} ${LIBRTLD_DB} ${LIBUTIL} -LDADD= -lpthread -ldtrace -ly -ll -lproc -lctf -lelf -lz -lrt \ - -lrtld_db -lutil +LIBADD= dtrace proc .include diff --git a/contrib/atf/atf-sh/atf_check_test.sh b/contrib/atf/atf-sh/atf_check_test.sh index 163e905f1ab0..9e3cfb955f68 100644 --- a/contrib/atf/atf-sh/atf_check_test.sh +++ b/contrib/atf/atf-sh/atf_check_test.sh @@ -164,18 +164,22 @@ equal_body() grep '^failed: \${x} != \${y} (a != b)$' resfile } -atf_test_case flush_stdout_on_timeout -flush_stdout_on_timeout_body() +atf_test_case flush_stdout_on_death +flush_stdout_on_death_body() { - "$(atf_get_srcdir)/misc_helpers" -s "$(atf_get_srcdir)" atf_check_timeout \ - >out 2>err & + CONTROL_FILE="$(pwd)/done" "$(atf_get_srcdir)/misc_helpers" \ + -s "$(atf_get_srcdir)" atf_check_flush_stdout >out 2>err & pid="${!}" - sleep 1 - kill "${pid}" + while [ ! -f ./done ]; do + echo "Still waiting for helper to create control file" + ls + sleep 1 + done + kill -9 "${pid}" grep 'Executing command.*true' out \ || atf_fail 'First command not in output' - grep 'Executing command.*sleep 42' out \ + grep 'Executing command.*false' out \ || atf_fail 'Second command not in output' } @@ -187,7 +191,7 @@ atf_init_test_cases() atf_add_test_case null_stdout atf_add_test_case null_stderr atf_add_test_case equal - atf_add_test_case flush_stdout_on_timeout + atf_add_test_case flush_stdout_on_death } # vim: syntax=sh:expandtab:shiftwidth=4:softtabstop=4 diff --git a/contrib/atf/atf-sh/misc_helpers.sh b/contrib/atf/atf-sh/misc_helpers.sh index 62d658053640..ca0f4650d99b 100644 --- a/contrib/atf/atf-sh/misc_helpers.sh +++ b/contrib/atf/atf-sh/misc_helpers.sh @@ -139,16 +139,20 @@ atf_check_equal_eval_fail_body() atf_check_equal '${x}' '${y}' } -atf_test_case atf_check_timeout -atf_check_timeout_head() +atf_test_case atf_check_flush_stdout +atf_check_flush_stdout_head() { atf_set "descr" "Helper test case for the t_atf_check test program" - atf_set "timeout" 1 + atf_set "timeout" "30" } -atf_check_timeout_body() +atf_check_flush_stdout_body() { atf_check true - atf_check sleep 42 + atf_check -s exit:1 false + touch "${CONTROL_FILE:-done}" + while :; do + sleep 1 + done } # ------------------------------------------------------------------------- @@ -281,7 +285,7 @@ atf_init_test_cases() atf_add_test_case atf_check_equal_fail atf_add_test_case atf_check_equal_eval_ok atf_add_test_case atf_check_equal_eval_fail - atf_add_test_case atf_check_timeout + atf_add_test_case atf_check_flush_stdout # Add helper tests for t_config. atf_add_test_case config_get diff --git a/contrib/bmake/ChangeLog b/contrib/bmake/ChangeLog index 2fe736917f37..f46e95de9a03 100644 --- a/contrib/bmake/ChangeLog +++ b/contrib/bmake/ChangeLog @@ -1,3 +1,16 @@ +2015-05-05 Simon J. Gerraty + + * Makefile (MAKE_VERSION): 20150505 + Merge with NetBSD make, pick up + o cond.c: be strict about lhs of comparison when evaluating .if + but less so when called from variable expansion. + o unit-tests/cond2.mk: test various error conditions + +2015-05-04 Simon J. Gerraty + + * machine.sh (MACHINE): Add Bitrig + patch from joerg@netbsd.org + 2015-04-18 Simon J. Gerraty * Makefile (MAKE_VERSION): 20150418 diff --git a/contrib/bmake/FILES b/contrib/bmake/FILES index 81899731ec49..c46e74bd7a46 100644 --- a/contrib/bmake/FILES +++ b/contrib/bmake/FILES @@ -96,6 +96,8 @@ unit-tests/comment.exp unit-tests/comment.mk unit-tests/cond1.exp unit-tests/cond1.mk +unit-tests/cond2.exp +unit-tests/cond2.mk unit-tests/doterror.exp unit-tests/doterror.mk unit-tests/dotwait.exp diff --git a/contrib/bmake/Makefile b/contrib/bmake/Makefile index 9a0abc6ab613..803997a575e3 100644 --- a/contrib/bmake/Makefile +++ b/contrib/bmake/Makefile @@ -1,7 +1,7 @@ -# $Id: Makefile,v 1.36 2015/04/18 19:58:53 sjg Exp $ +# $Id: Makefile,v 1.38 2015/05/05 21:58:05 sjg Exp $ # Base version on src date -MAKE_VERSION= 20150418 +MAKE_VERSION= 20150505 PROG= bmake @@ -94,7 +94,7 @@ SUBDIR+= unit-tests # we skip a lot of this when building as part of FreeBSD etc. # list of OS's which are derrived from BSD4.4 -BSD44_LIST= NetBSD FreeBSD OpenBSD DragonFly +BSD44_LIST= NetBSD FreeBSD OpenBSD DragonFly MirBSD Bitrig # we are... OS!= uname -s # are we 4.4BSD ? diff --git a/contrib/bmake/cond.c b/contrib/bmake/cond.c index a1c6705df601..b05a56cbcc86 100644 --- a/contrib/bmake/cond.c +++ b/contrib/bmake/cond.c @@ -1,4 +1,4 @@ -/* $NetBSD: cond.c,v 1.67 2012/11/03 13:59:27 christos Exp $ */ +/* $NetBSD: cond.c,v 1.68 2015/05/05 21:51:09 sjg Exp $ */ /* * Copyright (c) 1988, 1989, 1990 The Regents of the University of California. @@ -70,14 +70,14 @@ */ #ifndef MAKE_NATIVE -static char rcsid[] = "$NetBSD: cond.c,v 1.67 2012/11/03 13:59:27 christos Exp $"; +static char rcsid[] = "$NetBSD: cond.c,v 1.68 2015/05/05 21:51:09 sjg Exp $"; #else #include #ifndef lint #if 0 static char sccsid[] = "@(#)cond.c 8.2 (Berkeley) 1/2/94"; #else -__RCSID("$NetBSD: cond.c,v 1.67 2012/11/03 13:59:27 christos Exp $"); +__RCSID("$NetBSD: cond.c,v 1.68 2015/05/05 21:51:09 sjg Exp $"); #endif #endif /* not lint */ #endif @@ -181,6 +181,15 @@ static Token condPushBack=TOK_NONE; /* Single push-back token used in static unsigned int cond_depth = 0; /* current .if nesting level */ static unsigned int cond_min_depth = 0; /* depth at makefile open */ +/* + * Indicate when we should be strict about lhs of comparisons. + * TRUE when Cond_EvalExpression is called from Cond_Eval (.if etc) + * FALSE when Cond_EvalExpression is called from var.c:ApplyModifiers + * since lhs is already expanded and we cannot tell if + * it was a variable reference or not. + */ +static Boolean lhsStrict; + static int istoken(const char *str, const char *tok, size_t len) { @@ -517,7 +526,7 @@ CondCvtArg(char *str, double *value) */ /* coverity:[+alloc : arg-*2] */ static char * -CondGetString(Boolean doEval, Boolean *quoted, void **freeIt) +CondGetString(Boolean doEval, Boolean *quoted, void **freeIt, Boolean strictLHS) { Buffer buf; char *cp; @@ -601,6 +610,16 @@ CondGetString(Boolean doEval, Boolean *quoted, void **freeIt) condExpr--; /* don't skip over next char */ break; default: + if (strictLHS && !qt && *start != '$' && + !isdigit((unsigned char) *start)) { + /* lhs must be quoted, a variable reference or number */ + if (*freeIt) { + free(*freeIt); + *freeIt = NULL; + } + str = NULL; + goto cleanup; + } Buf_AddByte(&buf, *condExpr); break; } @@ -648,7 +667,7 @@ compare_expression(Boolean doEval) * Parse the variable spec and skip over it, saving its * value in lhs. */ - lhs = CondGetString(doEval, &lhsQuoted, &lhsFree); + lhs = CondGetString(doEval, &lhsQuoted, &lhsFree, lhsStrict); if (!lhs) goto done; @@ -709,7 +728,7 @@ compare_expression(Boolean doEval) goto done; } - rhs = CondGetString(doEval, &rhsQuoted, &rhsFree); + rhs = CondGetString(doEval, &rhsQuoted, &rhsFree, FALSE); if (!rhs) goto done; @@ -1135,7 +1154,7 @@ CondE(Boolean doEval) *----------------------------------------------------------------------- */ int -Cond_EvalExpression(const struct If *info, char *line, Boolean *value, int eprint) +Cond_EvalExpression(const struct If *info, char *line, Boolean *value, int eprint, Boolean strictLHS) { static const struct If *dflt_info; const struct If *sv_if_info = if_info; @@ -1143,6 +1162,8 @@ Cond_EvalExpression(const struct If *info, char *line, Boolean *value, int eprin Token sv_condPushBack = condPushBack; int rval; + lhsStrict = strictLHS; + while (*line == ' ' || *line == '\t') line++; @@ -1359,7 +1380,7 @@ Cond_Eval(char *line) } /* And evaluate the conditional expresssion */ - if (Cond_EvalExpression(ifp, line, &value, 1) == COND_INVALID) { + if (Cond_EvalExpression(ifp, line, &value, 1, TRUE) == COND_INVALID) { /* Syntax error in conditional, error message already output. */ /* Skip everything to matching .endif */ cond_state[cond_depth] = SKIP_TO_ELSE; diff --git a/contrib/bmake/machine.sh b/contrib/bmake/machine.sh index 32a0f7a1d84d..2209eaa884bf 100755 --- a/contrib/bmake/machine.sh +++ b/contrib/bmake/machine.sh @@ -2,7 +2,7 @@ # derrived from /etc/rc_d/os.sh # RCSid: -# $Id: machine.sh,v 1.16 2010/10/17 00:05:51 sjg Exp $ +# $Id: machine.sh,v 1.17 2015/05/05 00:10:54 sjg Exp $ # # @(#) Copyright (c) 1994-2002 Simon J. Gerraty # @@ -49,6 +49,10 @@ OpenBSD) arch=`Which arch /usr/bin:/usr/ucb:$PATH` MACHINE_ARCH=`$arch -s`; ;; +Bitrig) + MACHINE=$OS$OSMAJOR.$machine + MACHINE_ARCH=`uname -m`; + ;; *BSD) MACHINE=$OS$OSMAJOR.$machine ;; diff --git a/contrib/bmake/mk/ChangeLog b/contrib/bmake/mk/ChangeLog index 597d81458827..9b4059e10674 100644 --- a/contrib/bmake/mk/ChangeLog +++ b/contrib/bmake/mk/ChangeLog @@ -1,3 +1,9 @@ +2015-04-30 Simon J. Gerraty + + * install-mk (MK_VERSION): 20150430 + + * dirdeps.mk: fix _count_dirdeps for non-cache case. + 2015-04-16 Simon J. Gerraty * install-mk (MK_VERSION): 20150411 diff --git a/contrib/bmake/mk/dirdeps.mk b/contrib/bmake/mk/dirdeps.mk index fd03c827578e..4186346336dc 100644 --- a/contrib/bmake/mk/dirdeps.mk +++ b/contrib/bmake/mk/dirdeps.mk @@ -1,4 +1,4 @@ -# $Id: dirdeps.mk,v 1.49 2015/03/11 21:39:28 sjg Exp $ +# $Id: dirdeps.mk,v 1.51 2015/05/06 06:07:30 sjg Exp $ # Copyright (c) 2010-2013, Juniper Networks, Inc. # All rights reserved. @@ -349,7 +349,7 @@ BUILD_DIRDEPS ?= yes .if !defined(NO_DIRDEPS) .if ${MK_DIRDEPS_CACHE} == "yes" # this is where we will cache all our work -DIRDEPS_CACHE?= ${_OBJDIR}/dirdeps.cache${.TARGETS:Nall:O:u:ts-:S,^,.,:N.} +DIRDEPS_CACHE?= ${_OBJDIR}/dirdeps.cache${.TARGETS:Nall:O:u:ts-:S,/,_,g:S,^,.,:N.} # just ensure this exists build-dirdeps: @@ -394,13 +394,14 @@ _count_dirdeps: .NOMETA @echo '.info $${.newline}$${TRACER}Makefiles read: total=${.MAKE.MAKEFILES:[#]} depend=${.MAKE.MAKEFILES:M*depend*:[#]} dirdeps=${.ALLTARGETS:M${SRCTOP}*:O:u:[#]}' >&3 .endif -.endif -.elif !target(_count_dirdeps) +.elif !make(dirdeps) && !target(_count_dirdeps) beforedirdeps: _count_dirdeps _count_dirdeps: .NOMETA @echo "${TRACER}Makefiles read: total=${.MAKE.MAKEFILES:[#]} depend=${.MAKE.MAKEFILES:M*depend*:[#]} dirdeps=${.ALLTARGETS:M${SRCTOP}*:O:u:[#]} seconds=`expr ${now_utc} - ${start_utc}`" .endif +.endif + .if ${BUILD_DIRDEPS} == "yes" .if ${DEBUG_DIRDEPS:@x@${DEP_RELDIR:M$x}${${DEP_RELDIR}.${DEP_MACHINE}:L:M$x}@} != "" _debug_reldir = 1 diff --git a/contrib/bmake/mk/install-mk b/contrib/bmake/mk/install-mk index 047fcfda9280..598cf393d9db 100644 --- a/contrib/bmake/mk/install-mk +++ b/contrib/bmake/mk/install-mk @@ -55,7 +55,7 @@ # Simon J. Gerraty # RCSid: -# $Id: install-mk,v 1.109 2015/04/16 16:59:00 sjg Exp $ +# $Id: install-mk,v 1.110 2015/05/01 06:37:49 sjg Exp $ # # @(#) Copyright (c) 1994 Simon J. Gerraty # @@ -70,7 +70,7 @@ # sjg@crufty.net # -MK_VERSION=20150411 +MK_VERSION=20150430 OWNER= GROUP= MODE=444 diff --git a/contrib/bmake/nonints.h b/contrib/bmake/nonints.h index b244f0bd89b0..9eaebc2e9b4b 100644 --- a/contrib/bmake/nonints.h +++ b/contrib/bmake/nonints.h @@ -1,4 +1,4 @@ -/* $NetBSD: nonints.h,v 1.67 2014/09/07 20:55:34 joerg Exp $ */ +/* $NetBSD: nonints.h,v 1.68 2015/05/05 21:51:09 sjg Exp $ */ /*- * Copyright (c) 1988, 1989, 1990, 1993 @@ -91,7 +91,7 @@ int Compat_Make(void *, void *); /* cond.c */ struct If; -int Cond_EvalExpression(const struct If *, char *, Boolean *, int); +int Cond_EvalExpression(const struct If *, char *, Boolean *, int, Boolean); int Cond_Eval(char *); void Cond_restore_depth(unsigned int); unsigned int Cond_save_depth(void); diff --git a/contrib/bmake/unit-tests/Makefile.in b/contrib/bmake/unit-tests/Makefile.in index f5f528c291e2..6974d48bb62b 100644 --- a/contrib/bmake/unit-tests/Makefile.in +++ b/contrib/bmake/unit-tests/Makefile.in @@ -1,6 +1,6 @@ -# $Id: Makefile.in,v 1.46 2014/11/06 01:47:57 sjg Exp $ +# $Id: Makefile.in,v 1.47 2015/05/05 21:58:06 sjg Exp $ # -# $NetBSD: Makefile,v 1.51 2014/10/20 23:21:11 sjg Exp $ +# $NetBSD: Makefile,v 1.52 2015/05/05 21:51:09 sjg Exp $ # # Unit tests for make(1) # The main targets are: @@ -27,6 +27,7 @@ UNIT_TESTS:= ${srcdir} TESTNAMES= \ comment \ cond1 \ + cond2 \ error \ export \ export-all \ diff --git a/contrib/bmake/unit-tests/cond2.exp b/contrib/bmake/unit-tests/cond2.exp new file mode 100644 index 000000000000..22e76a5b2c9e --- /dev/null +++ b/contrib/bmake/unit-tests/cond2.exp @@ -0,0 +1,7 @@ +make: Bad conditional expression ` == "empty"' in == "empty"?oops:ok +make: "cond2.mk" line 13: Malformed conditional ({TEST_TYPO} == "Ok") +TEST_NOT_SET is empty or not defined +make: "cond2.mk" line 20: Malformed conditional (${TEST_NOT_SET} == "empty") +make: Fatal errors encountered -- cannot continue +make: stopped in unit-tests +exit status 1 diff --git a/contrib/bmake/unit-tests/cond2.mk b/contrib/bmake/unit-tests/cond2.mk new file mode 100644 index 000000000000..d6a06202dcb5 --- /dev/null +++ b/contrib/bmake/unit-tests/cond2.mk @@ -0,0 +1,25 @@ +# $Id: cond2.mk,v 1.1.1.1 2015/05/05 21:53:13 sjg Exp $ + +TEST_UNAME_S= NetBSD + +# this should be ok +X:= ${${TEST_UNAME_S} == "NetBSD":?Ok:fail} +.if $X == "Ok" +Y= good +.endif +# expect: Bad conditional expression ` == "empty"' in == "empty"?oops:ok +X:= ${${TEST_NOT_SET} == "empty":?oops:ok} +# expect: Malformed conditional ({TEST_TYPO} == "Ok") +.if {TEST_TYPO} == "Ok" +Y= oops +.endif +.if empty(TEST_NOT_SET) +Y!= echo TEST_NOT_SET is empty or not defined >&2; echo +.endif +# expect: Malformed conditional (${TEST_NOT_SET} == "empty") +.if ${TEST_NOT_SET} == "empty" +Y= oops +.endif + +all: + @echo $@ diff --git a/contrib/bmake/var.c b/contrib/bmake/var.c index 2a94dee4196d..e15c301cf9cf 100644 --- a/contrib/bmake/var.c +++ b/contrib/bmake/var.c @@ -1,4 +1,4 @@ -/* $NetBSD: var.c,v 1.191 2014/09/14 02:32:51 dholland Exp $ */ +/* $NetBSD: var.c,v 1.192 2015/05/05 21:51:09 sjg Exp $ */ /* * Copyright (c) 1988, 1989, 1990, 1993 @@ -69,14 +69,14 @@ */ #ifndef MAKE_NATIVE -static char rcsid[] = "$NetBSD: var.c,v 1.191 2014/09/14 02:32:51 dholland Exp $"; +static char rcsid[] = "$NetBSD: var.c,v 1.192 2015/05/05 21:51:09 sjg Exp $"; #else #include #ifndef lint #if 0 static char sccsid[] = "@(#)var.c 8.3 (Berkeley) 3/19/94"; #else -__RCSID("$NetBSD: var.c,v 1.191 2014/09/14 02:32:51 dholland Exp $"); +__RCSID("$NetBSD: var.c,v 1.192 2015/05/05 21:51:09 sjg Exp $"); #endif #endif /* not lint */ #endif @@ -3261,7 +3261,7 @@ ApplyModifiers(char *nstr, const char *tstr, termc = *--cp; delim = '\0'; - if (Cond_EvalExpression(NULL, v->name, &value, 0) + if (Cond_EvalExpression(NULL, v->name, &value, 0, FALSE) == COND_INVALID) { Error("Bad conditional expression `%s' in %s?%s:%s", v->name, v->name, pattern.lhs, pattern.rhs); diff --git a/contrib/elftoolchain/addr2line/addr2line.1 b/contrib/elftoolchain/addr2line/addr2line.1 index 98edda50fb13..f000c2911d7b 100644 --- a/contrib/elftoolchain/addr2line/addr2line.1 +++ b/contrib/elftoolchain/addr2line/addr2line.1 @@ -22,7 +22,7 @@ .\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF .\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. .\" -.\" $Id: addr2line.1 2066 2011-10-26 15:40:28Z jkoshy $ +.\" $Id: addr2line.1 3195 2015-05-12 17:22:19Z emaste $ .\" .Dd July 25, 2010 .Os @@ -99,7 +99,7 @@ Print a help message. Print a version identifier and exit. .El .Sh OUTPUT FORMAT -If the +If the .Fl f option was not specified, .Nm @@ -156,4 +156,4 @@ its source file and line number use: The .Nm utility was written by -.An "Kai Wang" Aq kaiwang27@users.sourceforge.net . +.An Kai Wang Aq Mt kaiwang27@users.sourceforge.net . diff --git a/contrib/elftoolchain/addr2line/addr2line.c b/contrib/elftoolchain/addr2line/addr2line.c index d6f5d73e8d7a..cfdcc745f9fb 100644 --- a/contrib/elftoolchain/addr2line/addr2line.c +++ b/contrib/elftoolchain/addr2line/addr2line.c @@ -39,7 +39,7 @@ #include "_elftc.h" -ELFTC_VCSID("$Id: addr2line.c 3174 2015-03-27 17:13:41Z emaste $"); +ELFTC_VCSID("$Id: addr2line.c 3197 2015-05-12 21:01:31Z emaste $"); static struct option longopts[] = { {"target" , required_argument, NULL, 'b'}, @@ -84,6 +84,44 @@ version(void) exit(0); } +/* + * Handle DWARF 4 'offset from' DW_AT_high_pc. Although we don't + * fully support DWARF 4, some compilers (like FreeBSD Clang 3.5.1) + * generate DW_AT_high_pc as an offset from DW_AT_low_pc. + * + * "If the value of the DW_AT_high_pc is of class address, it is the + * relocated address of the first location past the last instruction + * associated with the entity; if it is of class constant, the value + * is an unsigned integer offset which when added to the low PC gives + * the address of the first location past the last instruction + * associated with the entity." + * + * DWARF4 spec, section 2.17.2. + */ +static int +handle_high_pc(Dwarf_Die die, Dwarf_Unsigned lopc, Dwarf_Unsigned *hipc) +{ + Dwarf_Error de; + Dwarf_Half form; + Dwarf_Attribute at; + int ret; + + ret = dwarf_attr(die, DW_AT_high_pc, &at, &de); + if (ret == DW_DLV_ERROR) { + warnx("dwarf_attr failed: %s", dwarf_errmsg(de)); + return (ret); + } + ret = dwarf_whatform(at, &form, &de); + if (ret == DW_DLV_ERROR) { + warnx("dwarf_whatform failed: %s", dwarf_errmsg(de)); + return (ret); + } + if (dwarf_get_form_class(2, 0, 0, form) == DW_FORM_CLASS_CONSTANT) + *hipc += lopc; + + return (DW_DLV_OK); +} + static void search_func(Dwarf_Debug dbg, Dwarf_Die die, Dwarf_Addr addr, const char **rlt_func) @@ -108,6 +146,8 @@ search_func(Dwarf_Debug dbg, Dwarf_Die die, Dwarf_Addr addr, if (dwarf_attrval_unsigned(die, DW_AT_low_pc, &lopc, &de) || dwarf_attrval_unsigned(die, DW_AT_high_pc, &hipc, &de)) goto cont_search; + if (handle_high_pc(die, lopc, &hipc) != DW_DLV_OK) + goto cont_search; if (addr < lopc || addr >= hipc) goto cont_search; @@ -202,6 +242,8 @@ translate(Dwarf_Debug dbg, const char* addrstr) * Check if the address falls into the PC range of * this CU. */ + if (handle_high_pc(die, lopc, &hipc) != DW_DLV_OK) + continue; if (addr < lopc || addr >= hipc) continue; } diff --git a/contrib/elftoolchain/common/_elftc.h b/contrib/elftoolchain/common/_elftc.h index 45f0abd80774..6769519a16d6 100644 --- a/contrib/elftoolchain/common/_elftc.h +++ b/contrib/elftoolchain/common/_elftc.h @@ -23,7 +23,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $Id: _elftc.h 3175 2015-03-27 17:21:24Z emaste $ + * $Id: _elftc.h 3209 2015-05-17 13:40:46Z kaiwang27 $ */ /** @@ -342,12 +342,13 @@ struct name { \ #if defined(__GLIBC__) || defined(__linux__) - +#ifndef _GNU_SOURCE /* * GLIBC based systems have a global 'char *' pointer referencing * the executable's name. */ extern const char *program_invocation_short_name; +#endif /* !_GNU_SOURCE */ #define ELFTC_GETPROGNAME() program_invocation_short_name diff --git a/contrib/elftoolchain/common/elfdefinitions.h b/contrib/elftoolchain/common/elfdefinitions.h index a53acde8b6ce..58554fef2ebf 100644 --- a/contrib/elftoolchain/common/elfdefinitions.h +++ b/contrib/elftoolchain/common/elfdefinitions.h @@ -23,7 +23,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $Id: elfdefinitions.h 3178 2015-03-30 18:29:13Z emaste $ + * $Id: elfdefinitions.h 3198 2015-05-14 18:36:19Z emaste $ */ /* @@ -565,6 +565,7 @@ _ELF_DEFINE_EM(EM_SPARC, 2, "SPARC") \ _ELF_DEFINE_EM(EM_386, 3, "Intel 80386") \ _ELF_DEFINE_EM(EM_68K, 4, "Motorola 68000") \ _ELF_DEFINE_EM(EM_88K, 5, "Motorola 88000") \ +_ELF_DEFINE_EM(EM_IAMCU, 6, "Intel MCU") \ _ELF_DEFINE_EM(EM_860, 7, "Intel 80860") \ _ELF_DEFINE_EM(EM_MIPS, 8, "MIPS I Architecture") \ _ELF_DEFINE_EM(EM_S370, 9, "IBM System/370 Processor") \ diff --git a/contrib/elftoolchain/common/native-elf-format b/contrib/elftoolchain/common/native-elf-format index 34d84bf28967..d36ab53806de 100755 --- a/contrib/elftoolchain/common/native-elf-format +++ b/contrib/elftoolchain/common/native-elf-format @@ -1,6 +1,6 @@ #!/bin/sh # -# $Id: native-elf-format 3167 2015-02-24 19:10:08Z emaste $ +# $Id: native-elf-format 3186 2015-04-16 22:16:40Z emaste $ # # Find the native ELF format for a host platform by compiling a # test object and examining the resulting object. @@ -33,7 +33,7 @@ $1 ~ "Data:" { $1 ~ "Machine:" { if (match($0, "Intel.*386")) { elfarch = "EM_386"; - } else if (match($0, ".*X86-64")) { + } else if (match($0, ".*[xX]86-64")) { elfarch = "EM_X86_64"; } else { elfarch = "unknown"; diff --git a/contrib/elftoolchain/cxxfilt/c++filt.1 b/contrib/elftoolchain/cxxfilt/c++filt.1 index 0a123c773c33..b191b44e8215 100644 --- a/contrib/elftoolchain/cxxfilt/c++filt.1 +++ b/contrib/elftoolchain/cxxfilt/c++filt.1 @@ -22,7 +22,7 @@ .\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF .\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. .\" -.\" $Id: c++filt.1 2175 2011-11-16 05:51:49Z jkoshy $ +.\" $Id: c++filt.1 3195 2015-05-12 17:22:19Z emaste $ .\" .Dd August 24, 2011 .Os @@ -106,4 +106,4 @@ and exit. The .Nm utility was written by -.An "Kai Wang" Aq kaiwang27@users.sourceforge.net . +.An Kai Wang Aq Mt kaiwang27@users.sourceforge.net . diff --git a/contrib/elftoolchain/elfcopy/elfcopy.1 b/contrib/elftoolchain/elfcopy/elfcopy.1 index ce8f120196ac..4889570ebc8e 100644 --- a/contrib/elftoolchain/elfcopy/elfcopy.1 +++ b/contrib/elftoolchain/elfcopy/elfcopy.1 @@ -21,7 +21,7 @@ .\" out of the use of this software, even if advised of the possibility of .\" such damage. .\" -.\" $Id: elfcopy.1 3173 2015-03-27 16:46:13Z emaste $ +.\" $Id: elfcopy.1 3195 2015-05-12 17:22:19Z emaste $ .\" .Dd March 27, 2015 .Os @@ -330,4 +330,4 @@ Do not copy symbols that are not needed for relocation processing. .Sh HISTORY .Nm has been implemented by -.An "Kai Wang" Aq kaiwang27@users.sourceforge.net . +.An Kai Wang Aq Mt kaiwang27@users.sourceforge.net . diff --git a/contrib/elftoolchain/elfcopy/elfcopy.h b/contrib/elftoolchain/elfcopy/elfcopy.h index b750246d850d..48574b55c65b 100644 --- a/contrib/elftoolchain/elfcopy/elfcopy.h +++ b/contrib/elftoolchain/elfcopy/elfcopy.h @@ -23,7 +23,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $Id: elfcopy.h 3173 2015-03-27 16:46:13Z emaste $ + * $Id: elfcopy.h 3221 2015-05-24 23:42:43Z kaiwang27 $ */ #include @@ -237,6 +237,7 @@ struct elfcopy { uint64_t *secndx; /* section index map. */ uint64_t *symndx; /* symbol index map. */ unsigned char *v_rel; /* symbols needed by relocation. */ + unsigned char *v_grp; /* symbols refered by section group. */ unsigned char *v_secsym; /* sections with section symbol. */ STAILQ_HEAD(, segment) v_seg; /* list of segments. */ STAILQ_HEAD(, sec_action) v_sac;/* list of section operations. */ diff --git a/contrib/elftoolchain/elfcopy/main.c b/contrib/elftoolchain/elfcopy/main.c index a48aea589748..cbd48d3fc4b9 100644 --- a/contrib/elftoolchain/elfcopy/main.c +++ b/contrib/elftoolchain/elfcopy/main.c @@ -39,7 +39,7 @@ #include "elfcopy.h" -ELFTC_VCSID("$Id: main.c 3174 2015-03-27 17:13:41Z emaste $"); +ELFTC_VCSID("$Id: main.c 3216 2015-05-23 21:16:36Z kaiwang27 $"); enum options { @@ -404,8 +404,19 @@ create_elf(struct elfcopy *ecp) * Insert SHDR table into the internal section list as a "pseudo" * section, so later it will get sorted and resynced just as "normal" * sections. + * + * Under FreeBSD, Binutils objcopy always put the section header + * at the end of all the sections. We want to do the same here. + * + * However, note that the behaviour is still different with Binutils: + * elfcopy checks the FreeBSD OSABI tag to tell whether it needs to + * move the section headers, while Binutils is probably configured + * this way when it's compiled on FreeBSD. */ - shtab = insert_shtab(ecp, 0); + if (oeh.e_ident[EI_OSABI] == ELFOSABI_FREEBSD) + shtab = insert_shtab(ecp, 1); + else + shtab = insert_shtab(ecp, 0); /* * Resync section offsets in the output object. This is needed @@ -485,6 +496,11 @@ free_elf(struct elfcopy *ecp) free(sec); } } + + if (ecp->secndx != NULL) { + free(ecp->secndx); + ecp->secndx = NULL; + } } /* Create a temporary file. */ diff --git a/contrib/elftoolchain/elfcopy/sections.c b/contrib/elftoolchain/elfcopy/sections.c index 077bb74b0f53..a407a4274718 100644 --- a/contrib/elftoolchain/elfcopy/sections.c +++ b/contrib/elftoolchain/elfcopy/sections.c @@ -34,7 +34,7 @@ #include "elfcopy.h" -ELFTC_VCSID("$Id: sections.c 3174 2015-03-27 17:13:41Z emaste $"); +ELFTC_VCSID("$Id: sections.c 3220 2015-05-24 23:42:39Z kaiwang27 $"); static void add_gnu_debuglink(struct elfcopy *ecp); static uint32_t calc_crc32(const char *p, size_t len, uint32_t crc); @@ -56,6 +56,7 @@ static void print_data(const char *d, size_t sz); static void print_section(struct section *s); static void *read_section(struct section *s, size_t *size); static void update_reloc(struct elfcopy *ecp, struct section *s); +static void update_section_group(struct elfcopy *ecp, struct section *s); int is_remove_section(struct elfcopy *ecp, const char *name) @@ -552,6 +553,14 @@ copy_content(struct elfcopy *ecp) (s->type == SHT_REL || s->type == SHT_RELA)) filter_reloc(ecp, s); + /* + * The section indices in the SHT_GROUP section needs + * to be updated since we might have stripped some + * sections and changed section numbering. + */ + if (s->type == SHT_GROUP) + update_section_group(ecp, s); + if (is_modify_section(ecp, s->name)) modify_section(ecp, s); @@ -571,6 +580,71 @@ copy_content(struct elfcopy *ecp) } } + +/* + * Update section group section. The section indices in the SHT_GROUP + * section need update after section numbering changed. + */ +static void +update_section_group(struct elfcopy *ecp, struct section *s) +{ + GElf_Shdr ish; + Elf_Data *id; + uint32_t *ws, *wd; + uint64_t n; + size_t ishnum; + int i, j; + + if (!elf_getshnum(ecp->ein, &ishnum)) + errx(EXIT_FAILURE, "elf_getshnum failed: %s", + elf_errmsg(-1)); + + if (gelf_getshdr(s->is, &ish) == NULL) + errx(EXIT_FAILURE, "gelf_getehdr() failed: %s", + elf_errmsg(-1)); + + if ((id = elf_getdata(s->is, NULL)) == NULL) + errx(EXIT_FAILURE, "elf_getdata() failed: %s", + elf_errmsg(-1)); + + if (ish.sh_size == 0) + return; + + if (ish.sh_entsize == 0) + ish.sh_entsize = 4; + + ws = id->d_buf; + + /* We only support COMDAT section. */ +#ifndef GRP_COMDAT +#define GRP_COMDAT 0x1 +#endif + if ((*ws & GRP_COMDAT) == 0) + return; + + if ((s->buf = malloc(ish.sh_size)) == NULL) + err(EXIT_FAILURE, "malloc failed"); + + s->sz = ish.sh_size; + + wd = s->buf; + + /* Copy the flag word as-is. */ + *wd = *ws; + + /* Update the section indices. */ + n = ish.sh_size / ish.sh_entsize; + for(i = 1, j = 1; (uint64_t)i < n; i++) { + if (ws[i] != SHN_UNDEF && ws[i] < ishnum && + ecp->secndx[ws[i]] != 0) + wd[j++] = ecp->secndx[ws[i]]; + else + s->sz -= 4; + } + + s->nocopy = 1; +} + /* * Filter relocation entries, only keep those entries whose * symbol is in the keep list. @@ -1028,8 +1102,11 @@ copy_shdr(struct elfcopy *ecp, struct section *s, const char *name, int copy, osh.sh_flags |= SHF_WRITE; if (sec_flags & SF_CODE) osh.sh_flags |= SHF_EXECINSTR; - } else + } else { osh.sh_flags = ish.sh_flags; + if (ish.sh_type == SHT_REL || ish.sh_type == SHT_RELA) + osh.sh_flags |= SHF_INFO_LINK; + } } if (name == NULL) @@ -1223,6 +1300,14 @@ update_shdr(struct elfcopy *ecp, int update_link) osh.sh_info != 0) osh.sh_info = ecp->secndx[osh.sh_info]; + /* + * sh_info of SHT_GROUP section needs to point to the correct + * string in the symbol table. + */ + if (s->type == SHT_GROUP && (ecp->flags & SYMTAB_EXIST) && + (ecp->flags & SYMTAB_INTACT) == 0) + osh.sh_info = ecp->symndx[osh.sh_info]; + if (!gelf_update_shdr(s->os, &osh)) errx(EXIT_FAILURE, "gelf_update_shdr() failed: %s", elf_errmsg(-1)); diff --git a/contrib/elftoolchain/elfcopy/segments.c b/contrib/elftoolchain/elfcopy/segments.c index 3ed6d93bbcd1..1e271a6f4347 100644 --- a/contrib/elftoolchain/elfcopy/segments.c +++ b/contrib/elftoolchain/elfcopy/segments.c @@ -34,7 +34,7 @@ #include "elfcopy.h" -ELFTC_VCSID("$Id: segments.c 3177 2015-03-30 18:19:41Z emaste $"); +ELFTC_VCSID("$Id: segments.c 3196 2015-05-12 17:33:48Z emaste $"); static void insert_to_inseg_list(struct segment *seg, struct section *sec); @@ -442,7 +442,7 @@ copy_phdr(struct elfcopy *ecp) s = seg->v_sec[i]; seg->msz = s->vma + s->sz - seg->addr; if (s->type != SHT_NOBITS) - seg->fsz = seg->msz; + seg->fsz = s->off + s->sz - seg->off; } } diff --git a/contrib/elftoolchain/elfcopy/symbols.c b/contrib/elftoolchain/elfcopy/symbols.c index 49bb23988657..05bcd7a8e2f8 100644 --- a/contrib/elftoolchain/elfcopy/symbols.c +++ b/contrib/elftoolchain/elfcopy/symbols.c @@ -33,7 +33,7 @@ #include "elfcopy.h" -ELFTC_VCSID("$Id: symbols.c 3174 2015-03-27 17:13:41Z emaste $"); +ELFTC_VCSID("$Id: symbols.c 3222 2015-05-24 23:47:23Z kaiwang27 $"); /* Symbol table buffer structure. */ struct symbuf { @@ -77,7 +77,8 @@ static int is_weak_symbol(unsigned char st_info); static int lookup_exact_string(hash_head *hash, const char *buf, const char *s); static int generate_symbols(struct elfcopy *ecp); -static void mark_symbols(struct elfcopy *ecp, size_t sc); +static void mark_reloc_symbols(struct elfcopy *ecp, size_t sc); +static void mark_section_group_symbols(struct elfcopy *ecp, size_t sc); static int match_wildcard(const char *name, const char *pattern); uint32_t str_hash(const char *s); @@ -160,6 +161,10 @@ is_needed_symbol(struct elfcopy *ecp, int i, GElf_Sym *s) if (BIT_ISSET(ecp->v_rel, i)) return (1); + /* Symbols refered by COMDAT sections are needed. */ + if (BIT_ISSET(ecp->v_grp, i)) + return (1); + /* * For relocatable files (.o files), global and weak symbols * are needed. @@ -207,7 +212,10 @@ is_remove_symbol(struct elfcopy *ecp, size_t sc, int i, GElf_Sym *s, return (1); if (ecp->v_rel == NULL) - mark_symbols(ecp, sc); + mark_reloc_symbols(ecp, sc); + + if (ecp->v_grp == NULL) + mark_section_group_symbols(ecp, sc); if (is_needed_symbol(ecp, i, s)) return (0); @@ -233,7 +241,7 @@ is_remove_symbol(struct elfcopy *ecp, size_t sc, int i, GElf_Sym *s, * Mark symbols refered by relocation entries. */ static void -mark_symbols(struct elfcopy *ecp, size_t sc) +mark_reloc_symbols(struct elfcopy *ecp, size_t sc) { const char *name; Elf_Data *d; @@ -311,6 +319,49 @@ mark_symbols(struct elfcopy *ecp, size_t sc) elf_errmsg(elferr)); } +static void +mark_section_group_symbols(struct elfcopy *ecp, size_t sc) +{ + const char *name; + Elf_Scn *s; + GElf_Shdr sh; + size_t indx; + int elferr; + + ecp->v_grp = calloc((sc + 7) / 8, 1); + if (ecp->v_grp == NULL) + err(EXIT_FAILURE, "calloc failed"); + + if (elf_getshstrndx(ecp->ein, &indx) == 0) + errx(EXIT_FAILURE, "elf_getshstrndx failed: %s", + elf_errmsg(-1)); + + s = NULL; + while ((s = elf_nextscn(ecp->ein, s)) != NULL) { + if (gelf_getshdr(s, &sh) != &sh) + errx(EXIT_FAILURE, "elf_getshdr failed: %s", + elf_errmsg(-1)); + + if (sh.sh_type != SHT_GROUP) + continue; + + if ((name = elf_strptr(ecp->ein, indx, sh.sh_name)) == NULL) + errx(EXIT_FAILURE, "elf_strptr failed: %s", + elf_errmsg(-1)); + if (is_remove_section(ecp, name)) + continue; + + if (sh.sh_info > 0 && sh.sh_info < sc) + BIT_SET(ecp->v_grp, sh.sh_info); + else if (sh.sh_info != 0) + warnx("invalid symbox index"); + } + elferr = elf_errno(); + if (elferr != 0) + errx(EXIT_FAILURE, "elf_nextscn failed: %s", + elf_errmsg(elferr)); +} + static int generate_symbols(struct elfcopy *ecp) { @@ -351,6 +402,8 @@ generate_symbols(struct elfcopy *ecp) ecp->symtab->buf = sy_buf; ecp->strtab->buf = st_buf; + gsym = NULL; + /* * Create bit vector v_secsym, which is used to mark sections * that already have corresponding STT_SECTION symbols. @@ -384,7 +437,7 @@ generate_symbols(struct elfcopy *ecp) /* Symbol table should exist if this function is called. */ if (symndx == 0) { warnx("can't find .strtab section"); - return (0); + goto clean; } /* Locate .symtab of input object. */ @@ -413,7 +466,6 @@ generate_symbols(struct elfcopy *ecp) * output object, it is used by update_reloc() later to update * relocation information. */ - gsym = NULL; sc = ish.sh_size / ish.sh_entsize; if (sc > 0) { ecp->symndx = calloc(sc, sizeof(*ecp->symndx)); @@ -427,7 +479,7 @@ generate_symbols(struct elfcopy *ecp) if (elferr != 0) errx(EXIT_FAILURE, "elf_getdata failed: %s", elf_errmsg(elferr)); - return (0); + goto clean; } } else return (0); @@ -523,7 +575,7 @@ generate_symbols(struct elfcopy *ecp) * check if that only local symbol is the reserved symbol. */ if (sy_buf->nls <= 1 && sy_buf->ngs == 0) - return (0); + goto clean; /* * Create STT_SECTION symbols for sections that do not already @@ -550,6 +602,7 @@ generate_symbols(struct elfcopy *ecp) sym.st_value = s->vma; sym.st_size = 0; sym.st_info = GELF_ST_INFO(STB_LOCAL, STT_SECTION); + sym.st_other = STV_DEFAULT; /* * Don't let add_to_symtab() touch sym.st_shndx. * In this case, we know the index already. @@ -583,6 +636,12 @@ generate_symbols(struct elfcopy *ecp) } return (1); + +clean: + free(gsym); + free_symtab(ecp); + + return (0); } void @@ -624,7 +683,9 @@ create_symtab(struct elfcopy *ecp) if (((ecp->flags & SYMTAB_INTACT) == 0) && !generate_symbols(ecp)) { TAILQ_REMOVE(&ecp->v_sec, ecp->symtab, sec_list); TAILQ_REMOVE(&ecp->v_sec, ecp->strtab, sec_list); + free(ecp->symtab->buf); free(ecp->symtab); + free(ecp->strtab->buf); free(ecp->strtab); ecp->symtab = NULL; ecp->strtab = NULL; @@ -697,6 +758,23 @@ free_symtab(struct elfcopy *ecp) } } } + + if (ecp->symndx != NULL) { + free(ecp->symndx); + ecp->symndx = NULL; + } + if (ecp->v_rel != NULL) { + free(ecp->v_rel); + ecp->v_rel = NULL; + } + if (ecp->v_grp != NULL) { + free(ecp->v_grp); + ecp->v_grp = NULL; + } + if (ecp->v_secsym != NULL) { + free(ecp->v_secsym); + ecp->v_secsym = NULL; + } } void @@ -1090,7 +1168,7 @@ str_hash(const char *s) { uint32_t hash; - for (hash = 2166136261; *s; s++) + for (hash = 2166136261UL; *s; s++) hash = (hash ^ *s) * 16777619; return (hash & (STHASHSIZE - 1)); diff --git a/contrib/elftoolchain/libdwarf/dwarf.3 b/contrib/elftoolchain/libdwarf/dwarf.3 index 5363034c45ae..dbb417908094 100644 --- a/contrib/elftoolchain/libdwarf/dwarf.3 +++ b/contrib/elftoolchain/libdwarf/dwarf.3 @@ -21,7 +21,7 @@ .\" out of the use of this software, even if advised of the possibility of .\" such damage. .\" -.\" $Id: dwarf.3 3130 2014-12-21 20:06:29Z jkoshy $ +.\" $Id: dwarf.3 3195 2015-05-12 17:22:19Z emaste $ .\" .Dd December 21, 2014 .Os @@ -44,7 +44,7 @@ is defined by the DWARF standard, see .Xr dwarf 4 . .Pp The -.Xr DWARF 3 +.Xr DWARF 3 API has two parts: .Bl -bullet .It @@ -349,7 +349,7 @@ Retrieve a debugging information entry given an offset. .It Fn dwarf_siblingof , Fn dwarf_siblingof_b Retrieve the sibling descriptor for a debugging information entry. .It Fn dwarf_srclang -Retrive the source language attribute for a debugging information +Retrieve the source language attribute for a debugging information entry. .It Fn dwarf_tag Retrieve the tag for a debugging information entry. @@ -742,12 +742,12 @@ The DWARF standard is defined by The DWARF(3) API originated at Silicon Graphics Inc. .Pp A BSD-licensed implementation of a subset of the API was written by -.An "John Birrell" Aq jb@FreeBSD.org +.An John Birrell Aq Mt jb@FreeBSD.org for the FreeBSD project. The implementation was subsequently revised and completed by -.An "Kai Wang" Aq kaiwang27@users.sourceforge.net . +.An Kai Wang Aq Mt kaiwang27@users.sourceforge.net . .Pp Manual pages for this implementation were written by -.An "Joseph Koshy" Aq jkoshy@users.sourceforge.net +.An Joseph Koshy Aq Mt jkoshy@users.sourceforge.net and -.An "Kai Wang" Aq kaiwang27@users.sourceforge.net . +.An Kai Wang Aq Mt kaiwang27@users.sourceforge.net . diff --git a/contrib/elftoolchain/libdwarf/dwarf_add_line_entry.3 b/contrib/elftoolchain/libdwarf/dwarf_add_line_entry.3 index 22377176245a..16e807512a44 100644 --- a/contrib/elftoolchain/libdwarf/dwarf_add_line_entry.3 +++ b/contrib/elftoolchain/libdwarf/dwarf_add_line_entry.3 @@ -22,7 +22,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $Id: dwarf_add_line_entry.3 2953 2013-06-30 20:21:38Z kaiwang27 $ +.\" $Id: dwarf_add_line_entry.3 3182 2015-04-10 16:08:10Z emaste $ .\" .Dd June 30, 2013 .Os @@ -66,7 +66,8 @@ Valid source file indices are those returned by the function .Pp Argument .Ar off -specifies a relocatable program address. The ELF symbol to be used +specifies a relocatable program address. +The ELF symbol to be used for relocation is set by a prior call to the function .Xr dwarf_lne_set_address 3 . .Pp diff --git a/contrib/elftoolchain/libdwarf/dwarf_def_macro.3 b/contrib/elftoolchain/libdwarf/dwarf_def_macro.3 index d4849b12d1ca..daa090f29f0a 100644 --- a/contrib/elftoolchain/libdwarf/dwarf_def_macro.3 +++ b/contrib/elftoolchain/libdwarf/dwarf_def_macro.3 @@ -22,7 +22,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $Id: dwarf_def_macro.3 2122 2011-11-09 15:35:14Z jkoshy $ +.\" $Id: dwarf_def_macro.3 3182 2015-04-10 16:08:10Z emaste $ .\" .Dd November 9, 2011 .Os @@ -72,7 +72,7 @@ Argument .Ar value should point to a NUL-terminated string containing the value of the macro. -If the macro doesn't have a value, argument +If the macro does not have a value, argument .Ar value should be set to NULL. .Pp diff --git a/contrib/elftoolchain/libdwarf/dwarf_expand_frame_instructions.3 b/contrib/elftoolchain/libdwarf/dwarf_expand_frame_instructions.3 index eaeb32039c30..7bcd105f030f 100644 --- a/contrib/elftoolchain/libdwarf/dwarf_expand_frame_instructions.3 +++ b/contrib/elftoolchain/libdwarf/dwarf_expand_frame_instructions.3 @@ -22,14 +22,14 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $Id: dwarf_expand_frame_instructions.3 2122 2011-11-09 15:35:14Z jkoshy $ +.\" $Id: dwarf_expand_frame_instructions.3 3181 2015-04-10 13:22:51Z emaste $ .\" .Dd November 9, 2011 .Os .Dt DWARF_EXPAND_FRAME_INSTRUCTIONS 3 .Sh NAME .Nm dwarf_expand_frame_instructions -.Nd expand frame instructions +.Nd expand frame instructions .Sh LIBRARY .Lb libdwarf .Sh SYNOPSIS diff --git a/contrib/elftoolchain/libdwarf/dwarf_formblock.3 b/contrib/elftoolchain/libdwarf/dwarf_formblock.3 index 4ae824f68e9a..1ffb6e6fec0d 100644 --- a/contrib/elftoolchain/libdwarf/dwarf_formblock.3 +++ b/contrib/elftoolchain/libdwarf/dwarf_formblock.3 @@ -22,7 +22,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $Id: dwarf_formblock.3 2073 2011-10-27 03:30:47Z jkoshy $ +.\" $Id: dwarf_formblock.3 3182 2015-04-10 16:08:10Z emaste $ .\" .Dd July 23, 2010 .Os @@ -69,7 +69,7 @@ the DWARF(3) library. The application should not attempt to free this memory area. Portable code may indicate that the memory area is to be freed by -by using +using .Xr dwarf_dealloc 3 . .Sh RETURN VALUES Function diff --git a/contrib/elftoolchain/libdwarf/dwarf_formflag.3 b/contrib/elftoolchain/libdwarf/dwarf_formflag.3 index 93d5902c860a..2e23b3301661 100644 --- a/contrib/elftoolchain/libdwarf/dwarf_formflag.3 +++ b/contrib/elftoolchain/libdwarf/dwarf_formflag.3 @@ -22,7 +22,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $Id: dwarf_formflag.3 2073 2011-10-27 03:30:47Z jkoshy $ +.\" $Id: dwarf_formflag.3 3181 2015-04-10 13:22:51Z emaste $ .\" .Dd June 21, 2010 .Os @@ -58,7 +58,7 @@ or If argument .Ar err is not NULL, it will be used to return an error descriptor in case -of an error. +of an error. .Sh RETURN VALUES Function .Fn dwarf_formflag diff --git a/contrib/elftoolchain/libdwarf/dwarf_formref.3 b/contrib/elftoolchain/libdwarf/dwarf_formref.3 index 9e3458face08..abde30cfb9e4 100644 --- a/contrib/elftoolchain/libdwarf/dwarf_formref.3 +++ b/contrib/elftoolchain/libdwarf/dwarf_formref.3 @@ -22,7 +22,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $Id: dwarf_formref.3 2073 2011-10-27 03:30:47Z jkoshy $ +.\" $Id: dwarf_formref.3 3181 2015-04-10 13:22:51Z emaste $ .\" .Dd June 21, 2010 .Os @@ -101,7 +101,7 @@ ELF section. If argument .Ar err is not NULL, it will be used to return an error descriptor in case -of an error. +of an error. .Sh RETURN VALUES These functions return .Dv DW_DLV_OK diff --git a/contrib/elftoolchain/libdwarf/dwarf_formsig8.3 b/contrib/elftoolchain/libdwarf/dwarf_formsig8.3 index 5445324dd7af..a76c1107d9eb 100644 --- a/contrib/elftoolchain/libdwarf/dwarf_formsig8.3 +++ b/contrib/elftoolchain/libdwarf/dwarf_formsig8.3 @@ -22,7 +22,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $Id: dwarf_formsig8.3 2073 2011-10-27 03:30:47Z jkoshy $ +.\" $Id: dwarf_formsig8.3 3181 2015-04-10 13:22:51Z emaste $ .\" .Dd July 24, 2010 .Os @@ -56,7 +56,7 @@ must be If argument .Ar err is not NULL, it will be used to return an error descriptor in case -of an error. +of an error. .Sh RETURN VALUES Function .Fn dwarf_formsig8 diff --git a/contrib/elftoolchain/libdwarf/dwarf_formudata.3 b/contrib/elftoolchain/libdwarf/dwarf_formudata.3 index f95fdead898c..9ed154eebb97 100644 --- a/contrib/elftoolchain/libdwarf/dwarf_formudata.3 +++ b/contrib/elftoolchain/libdwarf/dwarf_formudata.3 @@ -22,7 +22,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $Id: dwarf_formudata.3 2073 2011-10-27 03:30:47Z jkoshy $ +.\" $Id: dwarf_formudata.3 3181 2015-04-10 13:22:51Z emaste $ .\" .Dd June 21, 2010 .Os @@ -88,7 +88,7 @@ and If argument .Ar err is not NULL, it will be used to return an error descriptor in case -of an error. +of an error. .Sh RETURN VALUES These functions return .Dv DW_DLV_OK diff --git a/contrib/elftoolchain/libdwarf/dwarf_get_fde_info_for_all_regs.3 b/contrib/elftoolchain/libdwarf/dwarf_get_fde_info_for_all_regs.3 index 014d138a0e23..f55d3d68a5bb 100644 --- a/contrib/elftoolchain/libdwarf/dwarf_get_fde_info_for_all_regs.3 +++ b/contrib/elftoolchain/libdwarf/dwarf_get_fde_info_for_all_regs.3 @@ -22,7 +22,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $Id: dwarf_get_fde_info_for_all_regs.3 2071 2011-10-27 03:20:00Z jkoshy $ +.\" $Id: dwarf_get_fde_info_for_all_regs.3 3182 2015-04-10 16:08:10Z emaste $ .\" .Dd June 4, 2011 .Os @@ -90,7 +90,8 @@ typedef struct { For each of the register rules returned, the .Va dw_offset_relevant -field is set to 1 if the register rule has a offset value. The +field is set to 1 if the register rule has a offset value. +The .Va dw_regnum field is set to the register number associated with the regsiter rule. The diff --git a/contrib/elftoolchain/libdwarf/dwarf_get_fde_info_for_reg.3 b/contrib/elftoolchain/libdwarf/dwarf_get_fde_info_for_reg.3 index 3d468062602c..fd05814a3630 100644 --- a/contrib/elftoolchain/libdwarf/dwarf_get_fde_info_for_reg.3 +++ b/contrib/elftoolchain/libdwarf/dwarf_get_fde_info_for_reg.3 @@ -22,7 +22,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $Id: dwarf_get_fde_info_for_reg.3 2071 2011-10-27 03:20:00Z jkoshy $ +.\" $Id: dwarf_get_fde_info_for_reg.3 3181 2015-04-10 13:22:51Z emaste $ .\" .Dd June 4, 2011 .Os @@ -99,7 +99,7 @@ counter address associated with the register rule found. If argument .Ar err is not NULL, it will be used to return an error descriptor in case -of an error. +of an error. .Ss COMPATIBILITY Function .Fn dwarf_get_fde_info_for_reg diff --git a/contrib/elftoolchain/libdwarf/dwarf_get_ranges.3 b/contrib/elftoolchain/libdwarf/dwarf_get_ranges.3 index 37847a1a9c22..15bad4dfd7ac 100644 --- a/contrib/elftoolchain/libdwarf/dwarf_get_ranges.3 +++ b/contrib/elftoolchain/libdwarf/dwarf_get_ranges.3 @@ -22,7 +22,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $Id: dwarf_get_ranges.3 2122 2011-11-09 15:35:14Z jkoshy $ +.\" $Id: dwarf_get_ranges.3 3182 2015-04-10 16:08:10Z emaste $ .\" .Dd November 9, 2011 .Os @@ -137,7 +137,7 @@ For this type of entry, the field .Va dwr_addr1 is the value of the largest representable address offset, and .Va dwr_addr2 -is a base address for the begining and ending address offsets of +is a base address for the beginning and ending address offsets of subsequent address range entries in the list. .It Dv DW_RANGES_END An end of list mark. diff --git a/contrib/elftoolchain/libdwarf/dwarf_hasattr.3 b/contrib/elftoolchain/libdwarf/dwarf_hasattr.3 index 58758482d318..659887588563 100644 --- a/contrib/elftoolchain/libdwarf/dwarf_hasattr.3 +++ b/contrib/elftoolchain/libdwarf/dwarf_hasattr.3 @@ -22,7 +22,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $Id: dwarf_hasattr.3 3142 2015-01-29 23:11:14Z jkoshy $ +.\" $Id: dwarf_hasattr.3 3181 2015-04-10 13:22:51Z emaste $ .\" .Dd April 17, 2010 .Os @@ -64,7 +64,7 @@ If the named attribute is not present, a zero is written instead. If argument .Ar err is not NULL, it will be used to return an error descriptor in case -of an error. +of an error. .Sh RETURN VALUES On success, function .Fn dwarf_hasattr diff --git a/contrib/elftoolchain/libdwarf/dwarf_next_cu_header.3 b/contrib/elftoolchain/libdwarf/dwarf_next_cu_header.3 index f172322daa48..f68867d7f21e 100644 --- a/contrib/elftoolchain/libdwarf/dwarf_next_cu_header.3 +++ b/contrib/elftoolchain/libdwarf/dwarf_next_cu_header.3 @@ -22,7 +22,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $Id: dwarf_next_cu_header.3 3128 2014-12-21 20:06:22Z jkoshy $ +.\" $Id: dwarf_next_cu_header.3 3182 2015-04-10 16:08:10Z emaste $ .\" .Dd December 21, 2014 .Os @@ -220,8 +220,7 @@ unit in the section. .Ss Iterating Through Type Units in a Debug Context When a DWARF debug context is allocated using .Xr dwarf_init 3 , -an internal pointer assoicated with the context will point to the -fisrt +an internal pointer associated with the context will point to the first .Dq \&.debug_types section found in the debug object. The first call to function diff --git a/contrib/elftoolchain/libdwarf/dwarf_producer_init.3 b/contrib/elftoolchain/libdwarf/dwarf_producer_init.3 index 717335e45119..b8ca6a9ce657 100644 --- a/contrib/elftoolchain/libdwarf/dwarf_producer_init.3 +++ b/contrib/elftoolchain/libdwarf/dwarf_producer_init.3 @@ -22,7 +22,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $Id: dwarf_producer_init.3 2074 2011-10-27 03:34:33Z jkoshy $ +.\" $Id: dwarf_producer_init.3 3182 2015-04-10 16:08:10Z emaste $ .\" .Dd August 20, 2011 .Os @@ -58,7 +58,7 @@ descriptor representing a DWARF producer instance. .Pp The argument .Ar errhand -should contain the adddress of a function to be called in case of an +should contain the address of a function to be called in case of an error. If this argument is .Dv NULL , diff --git a/contrib/elftoolchain/libdwarf/dwarf_whatattr.3 b/contrib/elftoolchain/libdwarf/dwarf_whatattr.3 index a975d3ec7d8a..d7f6dd4e38b9 100644 --- a/contrib/elftoolchain/libdwarf/dwarf_whatattr.3 +++ b/contrib/elftoolchain/libdwarf/dwarf_whatattr.3 @@ -22,7 +22,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $Id: dwarf_whatattr.3 3142 2015-01-29 23:11:14Z jkoshy $ +.\" $Id: dwarf_whatattr.3 3181 2015-04-10 13:22:51Z emaste $ .\" .Dd May 22, 2010 .Os @@ -51,7 +51,7 @@ and writes it to the location pointed to by argument If argument .Ar err is not NULL, it will be used to return an error descriptor in case -of an error. +of an error. .Sh RETURN VALUES On success, function .Fn dwarf_whatattr diff --git a/contrib/elftoolchain/libdwarf/libdwarf_reloc.c b/contrib/elftoolchain/libdwarf/libdwarf_reloc.c index 96bb785845fe..4ae8f5c3eb70 100644 --- a/contrib/elftoolchain/libdwarf/libdwarf_reloc.c +++ b/contrib/elftoolchain/libdwarf/libdwarf_reloc.c @@ -26,7 +26,7 @@ #include "_libdwarf.h" -ELFTC_VCSID("$Id: libdwarf_reloc.c 3149 2015-02-15 19:00:06Z emaste $"); +ELFTC_VCSID("$Id: libdwarf_reloc.c 3198 2015-05-14 18:36:19Z emaste $"); Dwarf_Unsigned _dwarf_get_reloc_type(Dwarf_P_Debug dbg, int is64) @@ -75,6 +75,7 @@ _dwarf_get_reloc_size(Dwarf_Debug dbg, Dwarf_Unsigned rel_type) return (4); break; case EM_386: + case EM_IAMCU: if (rel_type == R_386_32) return (4); break; diff --git a/contrib/elftoolchain/libelf/elf.3 b/contrib/elftoolchain/libelf/elf.3 index 618b4f7d92ab..20cb9445535d 100644 --- a/contrib/elftoolchain/libelf/elf.3 +++ b/contrib/elftoolchain/libelf/elf.3 @@ -21,7 +21,7 @@ .\" out of the use of this software, even if advised of the possibility of .\" such damage. .\" -.\" $Id: elf.3 3142 2015-01-29 23:11:14Z jkoshy $ +.\" $Id: elf.3 3195 2015-05-12 17:22:19Z emaste $ .\" .Dd July 28, 2014 .Os @@ -555,7 +555,7 @@ flag on an ELF descriptor using .Xr elf_flagelf 3 , following which the library will use the data offsets and alignments specified by the application when laying out the file. -Application control of file layout is described further in the +Application control of file layout is described further in the .Xr elf_update 3 manual page. .Pp @@ -608,5 +608,4 @@ The current implementation of the ELF(3) API appeared in .Fx 7.0 . .Sh AUTHORS The ELF library was written by -.An "Joseph Koshy" -.Aq jkoshy@FreeBSD.org . +.An Joseph Koshy Aq Mt jkoshy@FreeBSD.org . diff --git a/contrib/elftoolchain/libelf/elf_begin.3 b/contrib/elftoolchain/libelf/elf_begin.3 index 960456afbd89..e6c11b60e865 100644 --- a/contrib/elftoolchain/libelf/elf_begin.3 +++ b/contrib/elftoolchain/libelf/elf_begin.3 @@ -21,7 +21,7 @@ .\" out of the use of this software, even if advised of the possibility of .\" such damage. .\" -.\" $Id: elf_begin.3 2313 2011-12-11 06:19:24Z jkoshy $ +.\" $Id: elf_begin.3 3182 2015-04-10 16:08:10Z emaste $ .\" .Dd December 11, 2011 .Os @@ -272,7 +272,7 @@ was created. .It Bq Er ELF_E_ARGUMENT An .Xr ar 1 -archive was opened with with +archive was opened with .Ar cmd set to .Dv ELF_C_RDWR . diff --git a/contrib/elftoolchain/libelf/elf_cntl.3 b/contrib/elftoolchain/libelf/elf_cntl.3 index 32649d1f955e..257897590db2 100644 --- a/contrib/elftoolchain/libelf/elf_cntl.3 +++ b/contrib/elftoolchain/libelf/elf_cntl.3 @@ -21,7 +21,7 @@ .\" out of the use of this software, even if advised of the possibility of .\" such damage. .\" -.\" $Id: elf_cntl.3 289 2009-01-08 08:26:08Z jkoshy $ +.\" $Id: elf_cntl.3 3181 2015-04-10 13:22:51Z emaste $ .\" .Dd August 9, 2006 .Os diff --git a/contrib/elftoolchain/libelf/elf_getdata.3 b/contrib/elftoolchain/libelf/elf_getdata.3 index 8816a5a0694f..68b28890b4d6 100644 --- a/contrib/elftoolchain/libelf/elf_getdata.3 +++ b/contrib/elftoolchain/libelf/elf_getdata.3 @@ -21,7 +21,7 @@ .\" out of the use of this software, even if advised of the possibility of .\" such damage. .\" -.\" $Id: elf_getdata.3 1766 2011-08-22 06:01:03Z jkoshy $ +.\" $Id: elf_getdata.3 3181 2015-04-10 13:22:51Z emaste $ .\" .Dd January 26, 2011 .Os @@ -174,7 +174,7 @@ These functions return a valid pointer to a data descriptor if successful, or NULL if an error occurs. .Sh ERRORS These functions may fail with the following errors: -.Bl -tag -width "[ELF_E_RESOURCE]" +.Bl -tag -width "[ELF_E_RESOURCE]" .It Bq Er ELF_E_ARGUMENT Either of the arguments .Ar scn diff --git a/contrib/elftoolchain/libelf/elf_open.3 b/contrib/elftoolchain/libelf/elf_open.3 index dad969e2a202..3dd1e36a03f4 100644 --- a/contrib/elftoolchain/libelf/elf_open.3 +++ b/contrib/elftoolchain/libelf/elf_open.3 @@ -21,11 +21,11 @@ .\" out of the use of this software, even if advised of the possibility of .\" such damage. .\" -.\" $Id: elf_open.3 2512 2012-05-31 06:15:57Z jkoshy $ +.\" $Id: elf_open.3 3181 2015-04-10 13:22:51Z emaste $ .\" .Dd May 31, 2012 .Os -.Dt ELF_OPEN 3 +.Dt ELF_OPEN 3 .Sh NAME .Nm elf_open .Nd open ELF objects and ar(1) archives diff --git a/contrib/elftoolchain/libelf/elf_update.c b/contrib/elftoolchain/libelf/elf_update.c index 70a7c2e21e25..6cc109daafcc 100644 --- a/contrib/elftoolchain/libelf/elf_update.c +++ b/contrib/elftoolchain/libelf/elf_update.c @@ -41,7 +41,7 @@ #include #endif -ELFTC_VCSID("$Id: elf_update.c 3013 2014-03-23 06:16:59Z jkoshy $"); +ELFTC_VCSID("$Id: elf_update.c 3190 2015-05-04 15:23:08Z jkoshy $"); /* * Layout strategy: @@ -271,8 +271,10 @@ _libelf_compute_section_extents(Elf *e, Elf_Scn *s, off_t rc) * offsets and alignment for sanity. */ if (e->e_flags & ELF_F_LAYOUT) { - if (scn_alignment > sh_align || sh_offset % sh_align || - sh_size < scn_size) { + if (scn_alignment > sh_align || + sh_offset % sh_align || + sh_size < scn_size || + sh_offset % _libelf_falign(elftype, ec)) { LIBELF_SET_ERROR(LAYOUT, 0); return (0); } diff --git a/contrib/elftoolchain/libelf/gelf.3 b/contrib/elftoolchain/libelf/gelf.3 index a5d68cefc4ab..d00d5b330980 100644 --- a/contrib/elftoolchain/libelf/gelf.3 +++ b/contrib/elftoolchain/libelf/gelf.3 @@ -21,7 +21,7 @@ .\" out of the use of this software, even if advised of the possibility of .\" such damage. .\" -.\" $Id: gelf.3 189 2008-07-20 10:38:08Z jkoshy $ +.\" $Id: gelf.3 3195 2015-05-12 17:22:19Z emaste $ .\" .Dd September 1, 2006 .Os @@ -197,5 +197,4 @@ This implementation of the API first appeared in .Fx 7.0 . .Sh AUTHORS The GElf API was implemented by -.An "Joseph Koshy" -.Aq jkoshy@FreeBSD.org . +.An Joseph Koshy Aq Mt jkoshy@FreeBSD.org . diff --git a/contrib/elftoolchain/libelftc/elftc_demangle.3 b/contrib/elftoolchain/libelftc/elftc_demangle.3 index bbe67e52df0d..44cf0073ca55 100644 --- a/contrib/elftoolchain/libelftc/elftc_demangle.3 +++ b/contrib/elftoolchain/libelftc/elftc_demangle.3 @@ -21,7 +21,7 @@ .\" out of the use of this software, even if advised of the possibility of .\" such damage. .\" -.\" $Id: elftc_demangle.3 2065 2011-10-26 15:24:47Z jkoshy $ +.\" $Id: elftc_demangle.3 3182 2015-04-10 16:08:10Z emaste $ .\" .Dd August 24, 2011 .Os @@ -88,7 +88,7 @@ To decode a name that uses an unknown encoding style use: .Bd -literal -offset indent char buffer[1024]; const char *funcname; - + funcname = ...; /* points to string to be demangled */ if (elftc_demangle(funcname, buffer, sizeof(buffer), 0) == 0) printf("Demangled name: %\\n", buffer); diff --git a/contrib/elftoolchain/libelftc/elftc_symbol_table_create.3 b/contrib/elftoolchain/libelftc/elftc_symbol_table_create.3 index 3ff2c3530201..76f90e9c643d 100644 --- a/contrib/elftoolchain/libelftc/elftc_symbol_table_create.3 +++ b/contrib/elftoolchain/libelftc/elftc_symbol_table_create.3 @@ -21,7 +21,7 @@ .\" out of the use of this software, even if advised of the possibility of .\" such damage. .\" -.\" $Id: elftc_symbol_table_create.3 2825 2012-12-29 14:25:33Z jkoshy $ +.\" $Id: elftc_symbol_table_create.3 3182 2015-04-10 16:08:10Z emaste $ .\" .Dd December 29, 2012 .Os @@ -224,7 +224,7 @@ should point to a location that will be updated with one of the following values: .Bl -tag -width indent -compact -offset indent .It Dv ELFTC_INSERT_ERROR -An error occured during insertion of the symbol. +An error occurred during insertion of the symbol. .It Dv ELFTC_INSERT_EXISTING The name in argument .Ar symbolname diff --git a/contrib/elftoolchain/libelftc/libelftc_dem_gnu3.c b/contrib/elftoolchain/libelftc/libelftc_dem_gnu3.c index 05a6302816c9..e8fd78fe0ded 100644 --- a/contrib/elftoolchain/libelftc/libelftc_dem_gnu3.c +++ b/contrib/elftoolchain/libelftc/libelftc_dem_gnu3.c @@ -36,7 +36,7 @@ #include "_libelftc.h" -ELFTC_VCSID("$Id: libelftc_dem_gnu3.c 3123 2014-12-21 05:46:19Z kaiwang27 $"); +ELFTC_VCSID("$Id: libelftc_dem_gnu3.c 3212 2015-05-17 13:40:55Z kaiwang27 $"); /** * @file cpp_demangle.c @@ -50,7 +50,7 @@ ELFTC_VCSID("$Id: libelftc_dem_gnu3.c 3123 2014-12-21 05:46:19Z kaiwang27 $"); enum type_qualifier { TYPE_PTR, TYPE_REF, TYPE_CMX, TYPE_IMG, TYPE_EXT, TYPE_RST, TYPE_VAT, - TYPE_CST + TYPE_CST, TYPE_VEC }; struct vector_type_qualifier { @@ -84,6 +84,7 @@ struct cpp_demangle_data { int func_type; const char *cur; /* current mangled name ptr */ const char *last_sname; /* last source name */ + int push_head; }; #define CPP_DEMANGLE_TRY_LIMIT 128 @@ -112,6 +113,8 @@ static int cpp_demangle_read_array(struct cpp_demangle_data *); static int cpp_demangle_read_encoding(struct cpp_demangle_data *); static int cpp_demangle_read_expr_primary(struct cpp_demangle_data *); static int cpp_demangle_read_expression(struct cpp_demangle_data *); +static int cpp_demangle_read_expression_flat(struct cpp_demangle_data *, + char **); static int cpp_demangle_read_expression_binary(struct cpp_demangle_data *, const char *, size_t); static int cpp_demangle_read_expression_unary(struct cpp_demangle_data *, @@ -123,8 +126,12 @@ static int cpp_demangle_read_function(struct cpp_demangle_data *, int *, static int cpp_demangle_local_source_name(struct cpp_demangle_data *ddata); static int cpp_demangle_read_local_name(struct cpp_demangle_data *); static int cpp_demangle_read_name(struct cpp_demangle_data *); +static int cpp_demangle_read_name_flat(struct cpp_demangle_data *, + char**); static int cpp_demangle_read_nested_name(struct cpp_demangle_data *); static int cpp_demangle_read_number(struct cpp_demangle_data *, long *); +static int cpp_demangle_read_number_as_string(struct cpp_demangle_data *, + char **); static int cpp_demangle_read_nv_offset(struct cpp_demangle_data *); static int cpp_demangle_read_offset(struct cpp_demangle_data *); static int cpp_demangle_read_offset_number(struct cpp_demangle_data *); @@ -138,6 +145,8 @@ static int cpp_demangle_read_tmpl_arg(struct cpp_demangle_data *); static int cpp_demangle_read_tmpl_args(struct cpp_demangle_data *); static int cpp_demangle_read_tmpl_param(struct cpp_demangle_data *); static int cpp_demangle_read_type(struct cpp_demangle_data *, int); +static int cpp_demangle_read_type_flat(struct cpp_demangle_data *, + char **); static int cpp_demangle_read_uqname(struct cpp_demangle_data *); static int cpp_demangle_read_v_offset(struct cpp_demangle_data *); static char *decode_fp_to_double(const char *, size_t); @@ -156,8 +165,6 @@ static int vector_type_qualifier_init(struct vector_type_qualifier *); static int vector_type_qualifier_push(struct vector_type_qualifier *, enum type_qualifier); -static int cpp_demangle_gnu3_push_head; - /** * @brief Decode the input string by IA-64 C++ ABI style. * @@ -190,7 +197,6 @@ cpp_demangle_gnu3(const char *org) if (!cpp_demangle_data_init(&ddata, org + 2)) return (NULL); - cpp_demangle_gnu3_push_head = 0; rtn = NULL; if (!cpp_demangle_read_encoding(&ddata)) @@ -277,6 +283,7 @@ cpp_demangle_data_init(struct cpp_demangle_data *d, const char *cur) d->func_type = 0; d->cur = cur; d->last_sname = NULL; + d->push_head = 0; return (1); @@ -309,17 +316,18 @@ cpp_demangle_push_fp(struct cpp_demangle_data *ddata, fp = ddata->cur; while (*ddata->cur != 'E') ++ddata->cur; - ++ddata->cur; if ((f = decoder(fp, ddata->cur - fp)) == NULL) return (0); rtn = 0; if ((len = strlen(f)) > 0) - rtn = cpp_demangle_push_str(ddata, f, len); + rtn = cpp_demangle_push_str(ddata, f, len); free(f); + ++ddata->cur; + return (rtn); } @@ -331,7 +339,7 @@ cpp_demangle_push_str(struct cpp_demangle_data *ddata, const char *str, if (ddata == NULL || str == NULL || len == 0) return (0); - if (cpp_demangle_gnu3_push_head > 0) + if (ddata->push_head > 0) return (vector_str_push(&ddata->output_tmp, str, len)); return (vector_str_push(&ddata->output, str, len)); @@ -403,7 +411,8 @@ cpp_demangle_push_type_qualifier(struct cpp_demangle_data *ddata, if (type_str != NULL) { if (!vector_str_push(&subst_v, "*", 1)) goto clean; - if (!cpp_demangle_push_subst_v(ddata, &subst_v)) + if (!cpp_demangle_push_subst_v(ddata, + &subst_v)) goto clean; } break; @@ -414,7 +423,8 @@ cpp_demangle_push_type_qualifier(struct cpp_demangle_data *ddata, if (type_str != NULL) { if (!vector_str_push(&subst_v, "&", 1)) goto clean; - if (!cpp_demangle_push_subst_v(ddata, &subst_v)) + if (!cpp_demangle_push_subst_v(ddata, + &subst_v)) goto clean; } break; @@ -425,7 +435,8 @@ cpp_demangle_push_type_qualifier(struct cpp_demangle_data *ddata, if (type_str != NULL) { if (!vector_str_push(&subst_v, " complex", 8)) goto clean; - if (!cpp_demangle_push_subst_v(ddata, &subst_v)) + if (!cpp_demangle_push_subst_v(ddata, + &subst_v)) goto clean; } break; @@ -434,23 +445,26 @@ cpp_demangle_push_type_qualifier(struct cpp_demangle_data *ddata, if (!cpp_demangle_push_str(ddata, " imaginary", 10)) goto clean; if (type_str != NULL) { - if (!vector_str_push(&subst_v, " imaginary", 10)) + if (!vector_str_push(&subst_v, " imaginary", + 10)) goto clean; - if (!cpp_demangle_push_subst_v(ddata, &subst_v)) + if (!cpp_demangle_push_subst_v(ddata, + &subst_v)) goto clean; } break; case TYPE_EXT: - if (e_idx > v->ext_name.size - 1) + if (v->ext_name.size == 0 || + e_idx > v->ext_name.size - 1) goto clean; - if ((e_len = strlen(v->ext_name.container[e_idx])) == 0) + if ((e_len = strlen(v->ext_name.container[e_idx])) == + 0) goto clean; - if ((buf = malloc(sizeof(char) * (e_len + 1))) == NULL) + if ((buf = malloc(e_len + 2)) == NULL) goto clean; - - memcpy(buf, " ", 1); - memcpy(buf + 1, v->ext_name.container[e_idx], e_len); + snprintf(buf, e_len + 2, " %s", + v->ext_name.container[e_idx]); if (!cpp_demangle_push_str(ddata, buf, e_len + 1)) { free(buf); @@ -463,7 +477,8 @@ cpp_demangle_push_type_qualifier(struct cpp_demangle_data *ddata, free(buf); goto clean; } - if (!cpp_demangle_push_subst_v(ddata, &subst_v)) { + if (!cpp_demangle_push_subst_v(ddata, + &subst_v)) { free(buf); goto clean; } @@ -478,7 +493,8 @@ cpp_demangle_push_type_qualifier(struct cpp_demangle_data *ddata, if (type_str != NULL) { if (!vector_str_push(&subst_v, " restrict", 9)) goto clean; - if (!cpp_demangle_push_subst_v(ddata, &subst_v)) + if (!cpp_demangle_push_subst_v(ddata, + &subst_v)) goto clean; } break; @@ -489,7 +505,8 @@ cpp_demangle_push_type_qualifier(struct cpp_demangle_data *ddata, if (type_str != NULL) { if (!vector_str_push(&subst_v, " volatile", 9)) goto clean; - if (!cpp_demangle_push_subst_v(ddata, &subst_v)) + if (!cpp_demangle_push_subst_v(ddata, + &subst_v)) goto clean; } break; @@ -500,11 +517,42 @@ cpp_demangle_push_type_qualifier(struct cpp_demangle_data *ddata, if (type_str != NULL) { if (!vector_str_push(&subst_v, " const", 6)) goto clean; - if (!cpp_demangle_push_subst_v(ddata, &subst_v)) + if (!cpp_demangle_push_subst_v(ddata, + &subst_v)) goto clean; } break; + case TYPE_VEC: + if (v->ext_name.size == 0 || + e_idx > v->ext_name.size - 1) + goto clean; + if ((e_len = strlen(v->ext_name.container[e_idx])) == + 0) + goto clean; + if ((buf = malloc(e_len + 12)) == NULL) + goto clean; + snprintf(buf, e_len + 12, " __vector(%s)", + v->ext_name.container[e_idx]); + if (!cpp_demangle_push_str(ddata, buf, e_len + 11)) { + free(buf); + goto clean; + } + if (type_str != NULL) { + if (!vector_str_push(&subst_v, buf, + e_len + 11)) { + free(buf); + goto clean; + } + if (!cpp_demangle_push_subst_v(ddata, + &subst_v)) { + free(buf); + goto clean; + } + } + free(buf); + ++e_idx; + break; }; --idx; } @@ -655,10 +703,14 @@ cpp_demangle_read_expr_primary(struct cpp_demangle_data *ddata) switch (*ddata->cur) { case 'b': + if (*(ddata->cur + 2) != 'E') + return (0); switch (*(++ddata->cur)) { case '0': + ddata->cur += 2; return (cpp_demangle_push_str(ddata, "false", 5)); case '1': + ddata->cur += 2; return (cpp_demangle_push_str(ddata, "true", 4)); default: return (0); @@ -707,7 +759,8 @@ cpp_demangle_read_expr_primary(struct cpp_demangle_data *ddata) ++ddata->cur; } ++ddata->cur; - return (cpp_demangle_push_str(ddata, num, ddata->cur - num)); + return (cpp_demangle_push_str(ddata, num, + ddata->cur - num - 1)); default: return (0); @@ -998,6 +1051,38 @@ cpp_demangle_read_expression(struct cpp_demangle_data *ddata) return (0); } +static int +cpp_demangle_read_expression_flat(struct cpp_demangle_data *ddata, char **str) +{ + struct vector_str *output; + size_t i, p_idx, idx, exp_len; + char *exp; + + output = ddata->push_head > 0 ? &ddata->output_tmp : + &ddata->output; + + p_idx = output->size; + + if (!cpp_demangle_read_expression(ddata)) + return (0); + + if ((exp = vector_str_substr(output, p_idx, output->size - 1, + &exp_len)) == NULL) + return (0); + + idx = output->size; + for (i = p_idx; i < idx; ++i) { + if (!vector_str_pop(output)) { + free(exp); + return (0); + } + } + + *str = exp; + + return (1); +} + static int cpp_demangle_read_expression_binary(struct cpp_demangle_data *ddata, const char *name, size_t len) @@ -1127,12 +1212,65 @@ cpp_demangle_read_function(struct cpp_demangle_data *ddata, int *ext_c, static int cpp_demangle_read_encoding(struct cpp_demangle_data *ddata) { + char *name, *type, *num_str; + long offset; + int rtn; if (ddata == NULL || *ddata->cur == '\0') return (0); /* special name */ switch (SIMPLE_HASH(*ddata->cur, *(ddata->cur + 1))) { + case SIMPLE_HASH('G', 'A'): + if (!cpp_demangle_push_str(ddata, "hidden alias for ", 17)) + return (0); + ddata->cur += 2; + if (*ddata->cur == '\0') + return (0); + return (cpp_demangle_read_encoding(ddata)); + + case SIMPLE_HASH('G', 'R'): + if (!cpp_demangle_push_str(ddata, "reference temporary #", 21)) + return (0); + ddata->cur += 2; + if (*ddata->cur == '\0') + return (0); + if (!cpp_demangle_read_name_flat(ddata, &name)) + return (0); + rtn = 0; + if (!cpp_demangle_read_number_as_string(ddata, &num_str)) + goto clean1; + if (!cpp_demangle_push_str(ddata, num_str, strlen(num_str))) + goto clean2; + if (!cpp_demangle_push_str(ddata, " for ", 5)) + goto clean2; + if (!cpp_demangle_push_str(ddata, name, strlen(name))) + goto clean2; + rtn = 1; + clean2: + free(num_str); + clean1: + free(name); + return (rtn); + + case SIMPLE_HASH('G', 'T'): + ddata->cur += 2; + if (*ddata->cur == '\0') + return (0); + switch (*ddata->cur) { + case 'n': + if (!cpp_demangle_push_str(ddata, + "non-transaction clone for ", 26)) + return (0); + case 't': + default: + if (!cpp_demangle_push_str(ddata, + "transaction clone for ", 22)) + return (0); + } + ++ddata->cur; + return (cpp_demangle_read_encoding(ddata)); + case SIMPLE_HASH('G', 'V'): /* sentry object for 1 time init */ if (!cpp_demangle_push_str(ddata, "guard variable for ", 20)) @@ -1154,14 +1292,49 @@ cpp_demangle_read_encoding(struct cpp_demangle_data *ddata) return (0); return (cpp_demangle_read_encoding(ddata)); + case SIMPLE_HASH('T', 'C'): + /* construction vtable */ + if (!cpp_demangle_push_str(ddata, "construction vtable for ", + 24)) + return (0); + ddata->cur += 2; + if (*ddata->cur == '\0') + return (0); + if (!cpp_demangle_read_type_flat(ddata, &type)) + return (0); + rtn = 0; + if (!cpp_demangle_read_number(ddata, &offset)) + goto clean3; + if (*ddata->cur++ != '_') + goto clean3; + if (!cpp_demangle_read_type(ddata, 0)) + goto clean3; + if (!cpp_demangle_push_str(ddata, "-in-", 4)) + goto clean3; + if (!cpp_demangle_push_str(ddata, type, strlen(type))) + goto clean3; + rtn = 1; + clean3: + free(type); + return (rtn); + case SIMPLE_HASH('T', 'D'): /* typeinfo common proxy */ break; + case SIMPLE_HASH('T', 'F'): + /* typeinfo fn */ + if (!cpp_demangle_push_str(ddata, "typeinfo fn for ", 16)) + return (0); + ddata->cur += 2; + if (*ddata->cur == '\0') + return (0); + return (cpp_demangle_read_type(ddata, 0)); + case SIMPLE_HASH('T', 'h'): /* virtual function non-virtual override thunk */ - if (cpp_demangle_push_str(ddata, - "virtual function non-virtual override ", 38) == 0) + if (!cpp_demangle_push_str(ddata, + "virtual function non-virtual override ", 38)) return (0); ddata->cur += 2; if (*ddata->cur == '\0') @@ -1170,24 +1343,51 @@ cpp_demangle_read_encoding(struct cpp_demangle_data *ddata) return (0); return (cpp_demangle_read_encoding(ddata)); - case SIMPLE_HASH('T', 'I'): - /* typeinfo structure */ - /* FALLTHROUGH */ - case SIMPLE_HASH('T', 'S'): - /* RTTI name (NTBS) */ - if (!cpp_demangle_push_str(ddata, "typeinfo for ", 14)) + case SIMPLE_HASH('T', 'H'): + /* TLS init function */ + if (!cpp_demangle_push_str(ddata, "TLS init function for ", + 22)) return (0); ddata->cur += 2; if (*ddata->cur == '\0') return (0); - return (cpp_demangle_read_type(ddata, 1)); + break; + + case SIMPLE_HASH('T', 'I'): + /* typeinfo structure */ + if (!cpp_demangle_push_str(ddata, "typeinfo for ", 13)) + return (0); + ddata->cur += 2; + if (*ddata->cur == '\0') + return (0); + return (cpp_demangle_read_type(ddata, 0)); + + case SIMPLE_HASH('T', 'J'): + /* java class */ + if (!cpp_demangle_push_str(ddata, "java Class for ", 15)) + return (0); + ddata->cur += 2; + if (*ddata->cur == '\0') + return (0); + return (cpp_demangle_read_type(ddata, 0)); + + case SIMPLE_HASH('T', 'S'): + /* RTTI name (NTBS) */ + if (!cpp_demangle_push_str(ddata, "typeinfo name for ", 18)) + return (0); + ddata->cur += 2; + if (*ddata->cur == '\0') + return (0); + return (cpp_demangle_read_type(ddata, 0)); case SIMPLE_HASH('T', 'T'): /* VTT table */ if (!cpp_demangle_push_str(ddata, "VTT for ", 8)) return (0); ddata->cur += 2; - return (cpp_demangle_read_type(ddata, 1)); + if (*ddata->cur == '\0') + return (0); + return (cpp_demangle_read_type(ddata, 0)); case SIMPLE_HASH('T', 'v'): /* virtual function virtual override thunk */ @@ -1208,7 +1408,17 @@ cpp_demangle_read_encoding(struct cpp_demangle_data *ddata) ddata->cur += 2; if (*ddata->cur == '\0') return (0); - return (cpp_demangle_read_type(ddata, 1)); + return (cpp_demangle_read_type(ddata, 0)); + + case SIMPLE_HASH('T', 'W'): + /* TLS wrapper function */ + if (!cpp_demangle_push_str(ddata, "TLS wrapper function for ", + 25)) + return (0); + ddata->cur += 2; + if (*ddata->cur == '\0') + return (0); + break; }; return (cpp_demangle_read_name(ddata)); @@ -1270,8 +1480,7 @@ cpp_demangle_read_name(struct cpp_demangle_data *ddata) if (ddata == NULL || *ddata->cur == '\0') return (0); - output = cpp_demangle_gnu3_push_head > 0 ? - &ddata->output_tmp : &ddata->output; + output = ddata->push_head > 0 ? &ddata->output_tmp : &ddata->output; subst_str = NULL; @@ -1326,6 +1535,38 @@ cpp_demangle_read_name(struct cpp_demangle_data *ddata) return (rtn); } +static int +cpp_demangle_read_name_flat(struct cpp_demangle_data *ddata, char **str) +{ + struct vector_str *output; + size_t i, p_idx, idx, name_len; + char *name; + + output = ddata->push_head > 0 ? &ddata->output_tmp : + &ddata->output; + + p_idx = output->size; + + if (!cpp_demangle_read_name(ddata)) + return (0); + + if ((name = vector_str_substr(output, p_idx, output->size - 1, + &name_len)) == NULL) + return (0); + + idx = output->size; + for (i = p_idx; i < idx; ++i) { + if (!vector_str_pop(output)) { + free(name); + return (0); + } + } + + *str = name; + + return (1); +} + static int cpp_demangle_read_nested_name(struct cpp_demangle_data *ddata) { @@ -1355,8 +1596,7 @@ cpp_demangle_read_nested_name(struct cpp_demangle_data *ddata) ++ddata->cur; } - output = cpp_demangle_gnu3_push_head > 0 ? - &ddata->output_tmp : &ddata->output; + output = ddata->push_head > 0 ? &ddata->output_tmp : &ddata->output; if (!vector_str_init(&v)) return (0); @@ -1452,6 +1692,24 @@ cpp_demangle_read_number(struct cpp_demangle_data *ddata, long *rtn) return (1); } +static int +cpp_demangle_read_number_as_string(struct cpp_demangle_data *ddata, char **str) +{ + long n; + + if (!cpp_demangle_read_number(ddata, &n)) { + *str = NULL; + return (0); + } + + if (asprintf(str, "%ld", n) < 0) { + *str = NULL; + return (0); + } + + return (1); +} + static int cpp_demangle_read_nv_offset(struct cpp_demangle_data *ddata) { @@ -1581,9 +1839,18 @@ static int cpp_demangle_read_sname(struct cpp_demangle_data *ddata) { long len; + int err; if (ddata == NULL || cpp_demangle_read_number(ddata, &len) == 0 || - len <= 0 || cpp_demangle_push_str(ddata, ddata->cur, len) == 0) + len <= 0) + return (0); + + if (len == 12 && (memcmp("_GLOBAL__N_1", ddata->cur, 12) == 0)) + err = cpp_demangle_push_str(ddata, "(anonymous namespace)", 21); + else + err = cpp_demangle_push_str(ddata, ddata->cur, len); + + if (err == 0) return (0); assert(ddata->output.size > 0); @@ -1732,8 +1999,7 @@ cpp_demangle_read_subst_std(struct cpp_demangle_data *ddata) ddata->cur += 2; - output = cpp_demangle_gnu3_push_head > 0 ? - &ddata->output_tmp : &ddata->output; + output = ddata->push_head > 0 ? &ddata->output_tmp : &ddata->output; p_idx = output->size; if (!cpp_demangle_read_uqname(ddata)) @@ -1783,8 +2049,7 @@ cpp_demangle_read_subst_stdtmpl(struct cpp_demangle_data *ddata, if (ddata == NULL || str == NULL || len == 0) return (0); - output = cpp_demangle_gnu3_push_head > 0 ? &ddata->output_tmp : - &ddata->output; + output = ddata->push_head > 0 ? &ddata->output_tmp : &ddata->output; p_idx = output->size; substr = NULL; @@ -1852,8 +2117,7 @@ cpp_demangle_read_tmpl_args(struct cpp_demangle_data *ddata) return (0); limit = 0; - v = cpp_demangle_gnu3_push_head > 0 ? - &ddata->output_tmp : &ddata->output; + v = ddata->push_head > 0 ? &ddata->output_tmp : &ddata->output; for (;;) { idx = v->size; if (!cpp_demangle_read_tmpl_arg(ddata)) @@ -1936,14 +2200,14 @@ cpp_demangle_read_type(struct cpp_demangle_data *ddata, int delimit) size_t p_idx, type_str_len; int extern_c, is_builtin; long len; - char *type_str; + char *type_str, *exp_str, *num_str; if (ddata == NULL) return (0); output = &ddata->output; if (!strncmp(ddata->output.container[ddata->output.size - 1], ">", 1)) { - cpp_demangle_gnu3_push_head++; + ddata->push_head++; output = &ddata->output_tmp; } else if (delimit == 1) { if (ddata->paren == false) { @@ -1978,7 +2242,7 @@ cpp_demangle_read_type(struct cpp_demangle_data *ddata, int delimit) extern_c = 0; is_builtin = 1; p_idx = output->size; - type_str = NULL; + type_str = exp_str = num_str = NULL; again: /* builtin type */ switch (*ddata->cur) { @@ -2024,6 +2288,82 @@ cpp_demangle_read_type(struct cpp_demangle_data *ddata, int delimit) ++ddata->cur; goto rtn; + case 'D': + ++ddata->cur; + switch (*ddata->cur) { + case 'd': + /* IEEE 754r decimal floating point (64 bits) */ + if (!cpp_demangle_push_str(ddata, "decimal64", 9)) + goto clean; + ++ddata->cur; + break; + case 'e': + /* IEEE 754r decimal floating point (128 bits) */ + if (!cpp_demangle_push_str(ddata, "decimal128", 10)) + goto clean; + ++ddata->cur; + break; + case 'f': + /* IEEE 754r decimal floating point (32 bits) */ + if (!cpp_demangle_push_str(ddata, "decimal32", 9)) + goto clean; + ++ddata->cur; + break; + case 'h': + /* IEEE 754r half-precision floating point (16 bits) */ + if (!cpp_demangle_push_str(ddata, "half", 4)) + goto clean; + ++ddata->cur; + break; + case 'i': + /* char32_t */ + if (!cpp_demangle_push_str(ddata, "char32_t", 8)) + goto clean; + ++ddata->cur; + break; + case 'n': + /* std::nullptr_t (i.e., decltype(nullptr)) */ + if (!cpp_demangle_push_str(ddata, "decltype(nullptr)", + 17)) + goto clean; + ++ddata->cur; + break; + case 's': + /* char16_t */ + if (!cpp_demangle_push_str(ddata, "char16_t", 8)) + goto clean; + ++ddata->cur; + break; + case 'v': + /* gcc vector_size extension. */ + ++ddata->cur; + if (*ddata->cur == '_') { + ++ddata->cur; + if (!cpp_demangle_read_expression_flat(ddata, + &exp_str)) + goto clean; + if (!vector_str_push(&v.ext_name, exp_str, + strlen(exp_str))) + goto clean; + } else { + if (!cpp_demangle_read_number_as_string(ddata, + &num_str)) + goto clean; + if (!vector_str_push(&v.ext_name, num_str, + strlen(num_str))) + goto clean; + } + if (*ddata->cur != '_') + goto clean; + ++ddata->cur; + if (!vector_type_qualifier_push(&v, TYPE_VEC)) + goto clean; + goto again; + default: + goto clean; + } + goto rtn; + case 'e': /* long double */ if (!cpp_demangle_push_str(ddata, "long double", 11)) @@ -2118,7 +2458,7 @@ cpp_demangle_read_type(struct cpp_demangle_data *ddata, int delimit) case 'o': /* unsigned __int128 */ - if (!cpp_demangle_push_str(ddata, "unsigned _;int128", 17)) + if (!cpp_demangle_push_str(ddata, "unsigned __int128", 17)) goto clean; ++ddata->cur; goto rtn; @@ -2189,6 +2529,8 @@ cpp_demangle_read_type(struct cpp_demangle_data *ddata, int delimit) if (!vector_str_push(&v.ext_name, ddata->cur, len)) return (0); ddata->cur += len; + if (!vector_type_qualifier_push(&v, TYPE_EXT)) + goto clean; goto again; case 'v': @@ -2253,14 +2595,16 @@ cpp_demangle_read_type(struct cpp_demangle_data *ddata, int delimit) goto clean; free(type_str); + free(exp_str); + free(num_str); vector_type_qualifier_dest(&v); - if (cpp_demangle_gnu3_push_head > 0) { + if (ddata->push_head > 0) { if (*ddata->cur == 'I' && cpp_demangle_read_tmpl_args(ddata) == 0) return (0); - if (--cpp_demangle_gnu3_push_head > 0) + if (--ddata->push_head > 0) return (1); if (!vector_str_push(&ddata->output_tmp, " ", 1)) @@ -2284,11 +2628,45 @@ cpp_demangle_read_type(struct cpp_demangle_data *ddata, int delimit) return (1); clean: free(type_str); + free(exp_str); + free(num_str); vector_type_qualifier_dest(&v); return (0); } +static int +cpp_demangle_read_type_flat(struct cpp_demangle_data *ddata, char **str) +{ + struct vector_str *output; + size_t i, p_idx, idx, type_len; + char *type; + + output = ddata->push_head > 0 ? &ddata->output_tmp : + &ddata->output; + + p_idx = output->size; + + if (!cpp_demangle_read_type(ddata, 0)) + return (0); + + if ((type = vector_str_substr(output, p_idx, output->size - 1, + &type_len)) == NULL) + return (0); + + idx = output->size; + for (i = p_idx; i < idx; ++i) { + if (!vector_str_pop(output)) { + free(type); + return (0); + } + } + + *str = type; + + return (1); +} + /* * read unqualified-name, unqualified name are operator-name, ctor-dtor-name, * source-name diff --git a/contrib/elftoolchain/libelftc/os.Linux.mk b/contrib/elftoolchain/libelftc/os.Linux.mk index 9730bf6a2788..d99117d491f5 100644 --- a/contrib/elftoolchain/libelftc/os.Linux.mk +++ b/contrib/elftoolchain/libelftc/os.Linux.mk @@ -1,3 +1,3 @@ -# $Id: os.Linux.mk 994 2010-06-13 10:39:19Z jkoshy $ +# $Id: os.Linux.mk 3210 2015-05-17 13:40:49Z kaiwang27 $ -CFLAGS+= -Wall +CFLAGS+= -Wall -D_GNU_SOURCE diff --git a/contrib/elftoolchain/nm/nm.1 b/contrib/elftoolchain/nm/nm.1 index 35439e47fa11..4cdd73745b60 100644 --- a/contrib/elftoolchain/nm/nm.1 +++ b/contrib/elftoolchain/nm/nm.1 @@ -22,7 +22,7 @@ .\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF .\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. .\" -.\" $Id: nm.1 3145 2015-02-15 18:04:37Z emaste $ +.\" $Id: nm.1 3195 2015-05-12 17:22:19Z emaste $ .\" .Dd February 15, 2015 .Os @@ -335,4 +335,4 @@ were specified. The .Nm utility and this manual page were written by -.An Hyogeol Lee Aq hyogeollee@gmail.com . +.An Hyogeol Lee Aq Mt hyogeollee@gmail.com . diff --git a/contrib/elftoolchain/readelf/readelf.1 b/contrib/elftoolchain/readelf/readelf.1 index 8419d95fbce8..701d50089515 100644 --- a/contrib/elftoolchain/readelf/readelf.1 +++ b/contrib/elftoolchain/readelf/readelf.1 @@ -22,7 +22,7 @@ .\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF .\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. .\" -.\" $Id: readelf.1 3059 2014-06-02 00:42:32Z kaiwang27 $ +.\" $Id: readelf.1 3219 2015-05-24 23:42:34Z kaiwang27 $ .\" .Dd September 13, 2012 .Os @@ -90,7 +90,7 @@ sections in the ELF object. .It Fl e | Fl -headers Print all program, file and section headers in the ELF object. .It Fl g | Fl -section-groups -This option is recognized, but is ignored. +Print the contents of the section groups in the ELF object. .It Fl h | Fl -file-header Print the file header of the ELF object. .It Fl l | Fl -program-headers @@ -194,4 +194,4 @@ separate lines. The .Nm utility was written by -.An "Kai Wang" Aq kaiwang27@users.sourceforge.net . +.An Kai Wang Aq Mt kaiwang27@users.sourceforge.net . diff --git a/contrib/elftoolchain/readelf/readelf.c b/contrib/elftoolchain/readelf/readelf.c index bca228cec135..b1b81a34d4f7 100644 --- a/contrib/elftoolchain/readelf/readelf.c +++ b/contrib/elftoolchain/readelf/readelf.c @@ -1,5 +1,5 @@ /*- - * Copyright (c) 2009-2014 Kai Wang + * Copyright (c) 2009-2015 Kai Wang * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -46,7 +46,7 @@ #include "_elftc.h" -ELFTC_VCSID("$Id: readelf.c 3178 2015-03-30 18:29:13Z emaste $"); +ELFTC_VCSID("$Id: readelf.c 3223 2015-05-25 20:37:57Z emaste $"); /* * readelf(1) options. @@ -302,6 +302,7 @@ static void dump_gnu_hash(struct readelf *re, struct section *s); static void dump_hash(struct readelf *re); static void dump_phdr(struct readelf *re); static void dump_ppc_attributes(uint8_t *p, uint8_t *pe); +static void dump_section_groups(struct readelf *re); static void dump_symtab(struct readelf *re, int i); static void dump_symtabs(struct readelf *re); static uint8_t *dump_unknown_tag(uint64_t tag, uint8_t *p); @@ -445,6 +446,7 @@ elf_machine(unsigned int mach) case EM_SPARC: return "Sun SPARC"; case EM_386: return "Intel i386"; case EM_68K: return "Motorola 68000"; + case EM_IAMCU: return "Intel MCU"; case EM_88K: return "Motorola 88000"; case EM_860: return "Intel i860"; case EM_MIPS: return "MIPS R3000 Big-Endian only"; @@ -1050,6 +1052,7 @@ r_type(unsigned int mach, unsigned int type) switch(mach) { case EM_NONE: return ""; case EM_386: + case EM_IAMCU: switch(type) { case 0: return "R_386_NONE"; case 1: return "R_386_32"; @@ -2381,6 +2384,7 @@ dwarf_reg(unsigned int mach, unsigned int reg) switch (mach) { case EM_386: + case EM_IAMCU: switch (reg) { case 0: return "eax"; case 1: return "ecx"; @@ -2673,7 +2677,7 @@ dump_phdr(struct readelf *re) { const char *rawfile; GElf_Phdr phdr; - size_t phnum; + size_t phnum, size; int i, j; #define PH_HDR "Type", "Offset", "VirtAddr", "PhysAddr", "FileSiz", \ @@ -2726,10 +2730,14 @@ dump_phdr(struct readelf *re) " 0x%16.16jx 0x%16.16jx %c%c%c" " %#jx\n", PH_CT); if (phdr.p_type == PT_INTERP) { - if ((rawfile = elf_rawfile(re->elf, NULL)) == NULL) { + if ((rawfile = elf_rawfile(re->elf, &size)) == NULL) { warnx("elf_rawfile failed: %s", elf_errmsg(-1)); continue; } + if (phdr.p_offset >= size) { + warnx("invalid program header offset"); + continue; + } printf(" [Requesting program interpreter: %s]\n", rawfile + phdr.p_offset); } @@ -4043,6 +4051,61 @@ dump_liblist(struct readelf *re) #undef Elf_Lib +static void +dump_section_groups(struct readelf *re) +{ + struct section *s; + const char *symname; + Elf_Data *d; + uint32_t *w; + int i, j, elferr; + size_t n; + + for (i = 0; (size_t) i < re->shnum; i++) { + s = &re->sl[i]; + if (s->type != SHT_GROUP) + continue; + (void) elf_errno(); + if ((d = elf_getdata(s->scn, NULL)) == NULL) { + elferr = elf_errno(); + if (elferr != 0) + warnx("elf_getdata failed: %s", + elf_errmsg(elferr)); + continue; + } + if (d->d_size <= 0) + continue; + + w = d->d_buf; + + /* We only support COMDAT section. */ +#ifndef GRP_COMDAT +#define GRP_COMDAT 0x1 +#endif + if ((*w++ & GRP_COMDAT) == 0) + return; + + if (s->entsize == 0) + s->entsize = 4; + + symname = get_symbol_name(re, s->link, s->info); + n = s->sz / s->entsize; + if (n-- < 1) + return; + + printf("\nCOMDAT group section [%5d] `%s' [%s] contains %ju" + " sections:\n", i, s->name, symname, (uintmax_t)n); + printf(" %-10.10s %s\n", "[Index]", "Name"); + for (j = 0; (size_t) j < n; j++, w++) { + if (*w >= re->shnum) { + warnx("invalid section index: %u", *w); + continue; + } + printf(" [%5u] %s\n", *w, re->sl[*w].name); + } + } +} + static uint8_t * dump_unknown_tag(uint64_t tag, uint8_t *p) { @@ -4378,13 +4441,22 @@ dump_mips_options(struct readelf *re, struct section *s) p = d->d_buf; pe = p + d->d_size; while (p < pe) { + if (pe - p < 8) { + warnx("Truncated MIPS option header"); + return; + } kind = re->dw_decode(&p, 1); size = re->dw_decode(&p, 1); sndx = re->dw_decode(&p, 2); info = re->dw_decode(&p, 4); + if (size < 8 || size - 8 > pe - p) { + warnx("Malformed MIPS option header"); + return; + } + size -= 8; switch (kind) { case ODK_REGINFO: - dump_mips_odk_reginfo(re, p, size - 8); + dump_mips_odk_reginfo(re, p, size); break; case ODK_EXCEPTIONS: printf(" EXCEPTIONS FPU_MIN: %#x\n", @@ -4435,7 +4507,7 @@ dump_mips_options(struct readelf *re, struct section *s) default: break; } - p += size - 8; + p += size; } } @@ -6825,6 +6897,8 @@ dump_elf(struct readelf *re) dump_phdr(re); if (re->options & RE_SS) dump_shdr(re); + if (re->options & RE_G) + dump_section_groups(re); if (re->options & RE_D) dump_dynamic(re); if (re->options & RE_R) @@ -7298,7 +7372,7 @@ Usage: %s [options] file...\n\ -c | --archive-index Print the archive symbol table for archives.\n\ -d | --dynamic Print the contents of SHT_DYNAMIC sections.\n\ -e | --headers Print all headers in the object.\n\ - -g | --section-groups (accepted, but ignored)\n\ + -g | --section-groups Print the contents of the section groups.\n\ -h | --file-header Print the file header for the object.\n\ -l | --program-headers Print the PHDR table for the object.\n\ -n | --notes Print the contents of SHT_NOTE sections.\n\ @@ -7352,8 +7426,8 @@ main(int argc, char **argv) re->options |= RE_AA; break; case 'a': - re->options |= RE_AA | RE_D | RE_H | RE_II | RE_L | - RE_R | RE_SS | RE_S | RE_VV; + re->options |= RE_AA | RE_D | RE_G | RE_H | RE_II | + RE_L | RE_R | RE_SS | RE_S | RE_VV; break; case 'c': re->options |= RE_C; @@ -7458,11 +7532,10 @@ main(int argc, char **argv) errx(EXIT_FAILURE, "ELF library initialization failed: %s", elf_errmsg(-1)); - for (i = 0; i < argc; i++) - if (argv[i] != NULL) { - re->filename = argv[i]; - dump_object(re); - } + for (i = 0; i < argc; i++) { + re->filename = argv[i]; + dump_object(re); + } exit(EXIT_SUCCESS); } diff --git a/contrib/elftoolchain/size/size.1 b/contrib/elftoolchain/size/size.1 index 70f3bfdcdf05..97f76c250d86 100644 --- a/contrib/elftoolchain/size/size.1 +++ b/contrib/elftoolchain/size/size.1 @@ -23,7 +23,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $Id: size.1 2043 2011-10-23 14:49:16Z jkoshy $ +.\" $Id: size.1 3195 2015-05-12 17:22:19Z emaste $ .\" .Dd August 25, 2011 .Dt SIZE 1 @@ -252,6 +252,6 @@ utility first appeared in The .Nm utility was re-written by -.An S. Sam Arun Raj Aq samarunraj@gmail.com +.An S. Sam Arun Raj Aq Mt samarunraj@gmail.com This manual page was written by -.An S. Sam Arun Raj Aq samarunraj@gmail.com +.An S. Sam Arun Raj Aq Mt samarunraj@gmail.com diff --git a/contrib/elftoolchain/size/size.c b/contrib/elftoolchain/size/size.c index 93133a99289d..40d75f8c43f7 100644 --- a/contrib/elftoolchain/size/size.c +++ b/contrib/elftoolchain/size/size.c @@ -38,7 +38,7 @@ #include "_elftc.h" -ELFTC_VCSID("$Id: size.c 3174 2015-03-27 17:13:41Z emaste $"); +ELFTC_VCSID("$Id: size.c 3183 2015-04-10 16:18:42Z emaste $"); #define BUF_SIZE 1024 #define ELF_ALIGN(val,x) (((val)+(x)-1) & ~((x)-1)) @@ -604,7 +604,7 @@ handle_elf(char const *name) arhdr->ar_name); continue; } - /* Core dumps are handled seperately */ + /* Core dumps are handled separately */ if (elfhdr.e_shnum == 0 && elfhdr.e_type == ET_CORE) { exit_code = handle_core(name, elf, &elfhdr); (void) elf_end(elf); diff --git a/contrib/elftoolchain/strings/strings.1 b/contrib/elftoolchain/strings/strings.1 index d6816494e886..15ad7a7f1eb3 100644 --- a/contrib/elftoolchain/strings/strings.1 +++ b/contrib/elftoolchain/strings/strings.1 @@ -22,7 +22,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $Id: strings.1 2352 2011-12-19 11:21:10Z jkoshy $ +.\" $Id: strings.1 3195 2015-05-12 17:22:19Z emaste $ .\" .Dd December 19, 2011 .Dt STRINGS 1 @@ -157,6 +157,6 @@ when i386-only a.out format was dropped in favor of ELF. The .Nm utility was re-written by -.An S.Sam Arun Raj Aq samarunraj@gmail.com . +.An S.Sam Arun Raj Aq Mt samarunraj@gmail.com . This manual page was written by -.An S.Sam Arun Raj Aq samarunraj@gmail.com . +.An S.Sam Arun Raj Aq Mt samarunraj@gmail.com . diff --git a/contrib/gcc/dwarf2.h b/contrib/gcc/dwarf2.h index 524d2bdb404e..ec37c8e2efca 100644 --- a/contrib/gcc/dwarf2.h +++ b/contrib/gcc/dwarf2.h @@ -547,6 +547,7 @@ enum dwarf_location_atom DW_OP_bit_piece = 0x9d, /* GNU extensions. */ DW_OP_GNU_push_tls_address = 0xe0, + DW_OP_GNU_uninit = 0xf0, /* HP extensions. */ DW_OP_HP_unknown = 0xe0, /* Ouch, the same as GNU_push_tls_address. */ DW_OP_HP_is_value = 0xe1, diff --git a/contrib/gdb/gdb/c-valprint.c b/contrib/gdb/gdb/c-valprint.c index 999aa8235ba9..913793a30901 100644 --- a/contrib/gdb/gdb/c-valprint.c +++ b/contrib/gdb/gdb/c-valprint.c @@ -559,6 +559,10 @@ c_value_print (struct value *val, struct ui_file *stream, int format, fprintf_filtered (stream, ") "); } } + + if (!value_initialized (val)) + fprintf_filtered (stream, " [uninitialized] "); + if (objectprint && (TYPE_CODE (VALUE_TYPE (val)) == TYPE_CODE_CLASS)) { /* Attempt to determine real type of object */ diff --git a/contrib/gdb/gdb/dwarf2expr.c b/contrib/gdb/gdb/dwarf2expr.c index 294afa06c63c..c7ae563d3db4 100644 --- a/contrib/gdb/gdb/dwarf2expr.c +++ b/contrib/gdb/gdb/dwarf2expr.c @@ -42,6 +42,8 @@ new_dwarf_expr_context (void) retval->stack_len = 0; retval->stack_allocated = 10; retval->stack = xmalloc (retval->stack_allocated * sizeof (CORE_ADDR)); + retval->num_pieces = 0; + retval->pieces = 0; return retval; } @@ -51,6 +53,7 @@ void free_dwarf_expr_context (struct dwarf_expr_context *ctx) { xfree (ctx->stack); + xfree (ctx->pieces); xfree (ctx); } @@ -100,6 +103,29 @@ dwarf_expr_fetch (struct dwarf_expr_context *ctx, int n) } +/* Add a new piece to CTX's piece list. */ +static void +add_piece (struct dwarf_expr_context *ctx, + int in_reg, CORE_ADDR value, ULONGEST size) +{ + struct dwarf_expr_piece *p; + + ctx->num_pieces++; + + if (ctx->pieces) + ctx->pieces = xrealloc (ctx->pieces, + (ctx->num_pieces + * sizeof (struct dwarf_expr_piece))); + else + ctx->pieces = xmalloc (ctx->num_pieces + * sizeof (struct dwarf_expr_piece)); + + p = &ctx->pieces[ctx->num_pieces - 1]; + p->in_reg = in_reg; + p->value = value; + p->size = size; +} + /* Evaluate the expression at ADDR (LEN bytes long) using the context CTX. */ @@ -230,6 +256,7 @@ execute_stack_op (struct dwarf_expr_context *ctx, unsigned char *op_ptr, unsigned char *op_end) { ctx->in_reg = 0; + ctx->initialized = 1; /* Default is initialized. */ while (op_ptr < op_end) { @@ -356,9 +383,12 @@ execute_stack_op (struct dwarf_expr_context *ctx, unsigned char *op_ptr, case DW_OP_reg29: case DW_OP_reg30: case DW_OP_reg31: - if (op_ptr != op_end && *op_ptr != DW_OP_piece) - error ("DWARF-2 expression error: DW_OP_reg operations must be " - "used either alone or in conjuction with DW_OP_piece."); + if (op_ptr != op_end + && *op_ptr != DW_OP_piece + && *op_ptr != DW_OP_bit_piece + && *op_ptr != DW_OP_GNU_uninit) + error (_("DWARF-2 expression error: DW_OP_reg operations must be " + "used either alone or in conjuction with DW_OP_piece.")); result = op - DW_OP_reg0; ctx->in_reg = 1; @@ -661,6 +691,30 @@ execute_stack_op (struct dwarf_expr_context *ctx, unsigned char *op_ptr, case DW_OP_nop: goto no_push; + case DW_OP_piece: + { + ULONGEST size; + CORE_ADDR addr_or_regnum; + + /* Record the piece. */ + op_ptr = read_uleb128 (op_ptr, op_end, &size); + addr_or_regnum = dwarf_expr_fetch (ctx, 0); + add_piece (ctx, ctx->in_reg, addr_or_regnum, size); + + /* Pop off the address/regnum, and clear the in_reg flag. */ + dwarf_expr_pop (ctx); + ctx->in_reg = 0; + } + goto no_push; + + case DW_OP_GNU_uninit: + if (op_ptr != op_end) + error (_("DWARF-2 expression error: DW_OP_GNU_unint must always " + "be the very last op.")); + + ctx->initialized = 0; + goto no_push; + default: error ("Unhandled dwarf expression opcode 0x%x", op); } diff --git a/contrib/gdb/gdb/dwarf2expr.h b/contrib/gdb/gdb/dwarf2expr.h index 0a60edb8237a..1892c90542dc 100644 --- a/contrib/gdb/gdb/dwarf2expr.h +++ b/contrib/gdb/gdb/dwarf2expr.h @@ -74,6 +74,51 @@ struct dwarf_expr_context /* Non-zero if the result is in a register. The register number will be on the expression stack. */ int in_reg; + /* Initialization status of variable: Non-zero if variable has been + initialized; zero otherwise. */ + int initialized; + + /* An array of pieces. PIECES points to its first element; + NUM_PIECES is its length. + + Each time DW_OP_piece is executed, we add a new element to the + end of this array, recording the current top of the stack, the + current in_reg flag, and the size given as the operand to + DW_OP_piece. We then pop the top value from the stack, clear the + in_reg flag, and resume evaluation. + + The Dwarf spec doesn't say whether DW_OP_piece pops the top value + from the stack. We do, ensuring that clients of this interface + expecting to see a value left on the top of the stack (say, code + evaluating frame base expressions or CFA's specified with + DW_CFA_def_cfa_expression) will get an error if the expression + actually marks all the values it computes as pieces. + + If an expression never uses DW_OP_piece, num_pieces will be zero. + (It would be nice to present these cases as expressions yielding + a single piece, with in_reg clear, so that callers need not + distinguish between the no-DW_OP_piece and one-DW_OP_piece cases. + But expressions with no DW_OP_piece operations have no value to + place in a piece's 'size' field; the size comes from the + surrounding data. So the two cases need to be handled + separately.) */ + int num_pieces; + struct dwarf_expr_piece *pieces; +}; + +/* A piece of an object, as recorded by DW_OP_piece or DW_OP_bit_piece. */ +struct dwarf_expr_piece +{ + /* If IN_REG is zero, then the piece is in memory, and VALUE is its address. + If IN_REG is non-zero, then the piece is in a register, and VALUE + is the register number. */ + int in_reg; + + /* This piece's address or register number. */ + CORE_ADDR value; + + /* The length of the piece, in bytes. */ + ULONGEST size; }; struct dwarf_expr_context *new_dwarf_expr_context (void); diff --git a/contrib/gdb/gdb/dwarf2loc.c b/contrib/gdb/gdb/dwarf2loc.c index 208e9d15d664..c81d46fc2ffe 100644 --- a/contrib/gdb/gdb/dwarf2loc.c +++ b/contrib/gdb/gdb/dwarf2loc.c @@ -206,6 +206,7 @@ dwarf2_evaluate_loc_desc (struct symbol *var, struct frame_info *frame, struct objfile *objfile) { CORE_ADDR result; + struct gdbarch *arch = get_frame_arch (frame); struct value *retval; struct dwarf_expr_baton baton; struct dwarf_expr_context *ctx; @@ -230,7 +231,32 @@ dwarf2_evaluate_loc_desc (struct symbol *var, struct frame_info *frame, dwarf_expr_eval (ctx, data, size); result = dwarf_expr_fetch (ctx, 0); - if (ctx->in_reg) + if (ctx->num_pieces > 0) + { + int i; + long offset = 0; + bfd_byte *contents; + + retval = allocate_value (SYMBOL_TYPE (var)); + contents = VALUE_CONTENTS_RAW (retval); + for (i = 0; i < ctx->num_pieces; i++) + { + struct dwarf_expr_piece *p = &ctx->pieces[i]; + if (p->in_reg) + { + bfd_byte regval[MAX_REGISTER_SIZE]; + int gdb_regnum = DWARF2_REG_TO_REGNUM (p->value); + get_frame_register (frame, gdb_regnum, regval); + memcpy (contents + offset, regval, p->size); + } + else /* In memory? */ + { + read_memory (p->value, contents + offset, p->size); + } + offset += p->size; + } + } + else if (ctx->in_reg) { int regnum = DWARF2_REG_TO_REGNUM (result); retval = value_from_register (SYMBOL_TYPE (var), regnum, frame); @@ -245,6 +271,8 @@ dwarf2_evaluate_loc_desc (struct symbol *var, struct frame_info *frame, VALUE_ADDRESS (retval) = result; } + set_value_initialized (retval, ctx->initialized); + free_dwarf_expr_context (ctx); return retval; @@ -322,6 +350,17 @@ dwarf2_loc_desc_needs_frame (unsigned char *data, unsigned short size) in_reg = ctx->in_reg; + if (ctx->num_pieces > 0) + { + int i; + + /* If the location has several pieces, and any of them are in + registers, then we will need a frame to fetch them from. */ + for (i = 0; i < ctx->num_pieces; i++) + if (ctx->pieces[i].in_reg) + in_reg = 1; + } + free_dwarf_expr_context (ctx); return baton.needs_frame || in_reg; diff --git a/contrib/gdb/gdb/dwarf2read.c b/contrib/gdb/gdb/dwarf2read.c index 852172b5241e..d3dd5609833d 100644 --- a/contrib/gdb/gdb/dwarf2read.c +++ b/contrib/gdb/gdb/dwarf2read.c @@ -7110,6 +7110,8 @@ dwarf_stack_op_name (unsigned op) /* GNU extensions. */ case DW_OP_GNU_push_tls_address: return "DW_OP_GNU_push_tls_address"; + case DW_OP_GNU_uninit: + return "DW_OP_GNU_uninit"; default: return "OP_"; } @@ -7634,6 +7636,9 @@ decode_locdesc (struct dwarf_block *blk, struct dwarf2_cu *cu) dwarf2_complex_location_expr_complaint (); break; + case DW_OP_GNU_uninit: + break; + default: complaint (&symfile_complaints, "unsupported stack op: '%s'", dwarf_stack_op_name (op)); diff --git a/contrib/gdb/gdb/value.h b/contrib/gdb/gdb/value.h index a01b438dda4d..9e547a3ff5b5 100644 --- a/contrib/gdb/gdb/value.h +++ b/contrib/gdb/gdb/value.h @@ -165,6 +165,9 @@ struct value /* The BFD section associated with this value. */ asection *bfd_section; + /* If value is a variable, is it initialized or not. */ + int initialized; + /* Actual contents of the value. For use of this value; setting it uses the stuff above. Not valid if lazy is nonzero. Target byte-order. We force it to be aligned properly for any diff --git a/contrib/gdb/gdb/values.c b/contrib/gdb/gdb/values.c index 87baf2144b9e..32e4b25e99db 100644 --- a/contrib/gdb/gdb/values.c +++ b/contrib/gdb/gdb/values.c @@ -101,6 +101,7 @@ allocate_value (struct type *type) VALUE_EMBEDDED_OFFSET (val) = 0; VALUE_POINTED_TO_OFFSET (val) = 0; val->modifiable = 1; + val->initialized = 1; /* Default to initialized. */ return val; } @@ -1311,6 +1312,22 @@ using_struct_return (struct type *value_type, int gcc_p) == RETURN_VALUE_STRUCT_CONVENTION); } +/* Set the initialized field in a value struct. */ + +void +set_value_initialized (struct value *val, int status) +{ + val->initialized = status; +} + +/* Return the initialized field in a value struct. */ + +int +value_initialized (struct value *val) +{ + return val->initialized; +} + void _initialize_values (void) { diff --git a/contrib/ipfilter/tools/ipf.c b/contrib/ipfilter/tools/ipf.c index dd601426debd..08cfb0a90191 100644 --- a/contrib/ipfilter/tools/ipf.c +++ b/contrib/ipfilter/tools/ipf.c @@ -296,7 +296,7 @@ static void packetlogon(opt) printf("set log flag: nomatch\n"); change = 1; } - if (strstr(opt, "block") || index(opt, 'd')) { + if (strstr(opt, "block") || strchr(opt, 'd')) { flag |= FF_LOGBLOCK; if (opts & OPT_VERBOSE) printf("set log flag: block\n"); diff --git a/contrib/libarchive/libarchive/archive_read.c b/contrib/libarchive/libarchive/archive_read.c index c7f4da16da41..9513729172a9 100644 --- a/contrib/libarchive/libarchive/archive_read.c +++ b/contrib/libarchive/libarchive/archive_read.c @@ -1395,6 +1395,8 @@ __archive_read_filter_consume(struct archive_read_filter * filter, { int64_t skipped; + if (request < 0) + return ARCHIVE_FATAL; if (request == 0) return 0; diff --git a/contrib/libarchive/libarchive/archive_read_support_format_cpio.c b/contrib/libarchive/libarchive/archive_read_support_format_cpio.c index d9c77e4ebef9..8038af892926 100644 --- a/contrib/libarchive/libarchive/archive_read_support_format_cpio.c +++ b/contrib/libarchive/libarchive/archive_read_support_format_cpio.c @@ -198,7 +198,7 @@ static int archive_read_format_cpio_read_data(struct archive_read *, static int archive_read_format_cpio_read_header(struct archive_read *, struct archive_entry *); static int archive_read_format_cpio_skip(struct archive_read *); -static int be4(const unsigned char *); +static int64_t be4(const unsigned char *); static int find_odc_header(struct archive_read *); static int find_newc_header(struct archive_read *); static int header_bin_be(struct archive_read *, struct cpio *, @@ -213,7 +213,7 @@ static int header_afiol(struct archive_read *, struct cpio *, struct archive_entry *, size_t *, size_t *); static int is_octal(const char *, size_t); static int is_hex(const char *, size_t); -static int le4(const unsigned char *); +static int64_t le4(const unsigned char *); static int record_hardlink(struct archive_read *a, struct cpio *cpio, struct archive_entry *entry); @@ -864,8 +864,11 @@ header_bin_le(struct archive_read *a, struct cpio *cpio, /* Read fixed-size portion of header. */ h = __archive_read_ahead(a, bin_header_size, NULL); - if (h == NULL) + if (h == NULL) { + archive_set_error(&a->archive, 0, + "End of file trying to read next cpio header"); return (ARCHIVE_FATAL); + } /* Parse out binary fields. */ header = (const unsigned char *)h; @@ -900,8 +903,11 @@ header_bin_be(struct archive_read *a, struct cpio *cpio, /* Read fixed-size portion of header. */ h = __archive_read_ahead(a, bin_header_size, NULL); - if (h == NULL) + if (h == NULL) { + archive_set_error(&a->archive, 0, + "End of file trying to read next cpio header"); return (ARCHIVE_FATAL); + } /* Parse out binary fields. */ header = (const unsigned char *)h; @@ -944,17 +950,17 @@ archive_read_format_cpio_cleanup(struct archive_read *a) return (ARCHIVE_OK); } -static int +static int64_t le4(const unsigned char *p) { - return ((p[0]<<16) + (p[1]<<24) + (p[2]<<0) + (p[3]<<8)); + return ((p[0] << 16) + (((int64_t)p[1]) << 24) + (p[2] << 0) + (p[3] << 8)); } -static int +static int64_t be4(const unsigned char *p) { - return ((p[0]<<24) + (p[1]<<16) + (p[2]<<8) + (p[3])); + return ((((int64_t)p[0]) << 24) + (p[1] << 16) + (p[2] << 8) + (p[3])); } /* diff --git a/contrib/llvm/include/llvm/Target/TargetCallingConv.h b/contrib/llvm/include/llvm/Target/TargetCallingConv.h index a0f26741a8f0..9071bfeec7ed 100644 --- a/contrib/llvm/include/llvm/Target/TargetCallingConv.h +++ b/contrib/llvm/include/llvm/Target/TargetCallingConv.h @@ -134,6 +134,8 @@ namespace ISD { /// Index original Function's argument. unsigned OrigArgIndex; + /// Sentinel value for implicit machine-level input arguments. + static const unsigned NoArgIndex = UINT_MAX; /// Offset in bytes of current input value relative to the beginning of /// original argument. E.g. if argument was splitted into four 32 bit @@ -147,6 +149,15 @@ namespace ISD { VT = vt.getSimpleVT(); ArgVT = argvt; } + + bool isOrigArg() const { + return OrigArgIndex != NoArgIndex; + } + + unsigned getOrigArgIndex() const { + assert(OrigArgIndex != NoArgIndex && "Implicit machine-level argument"); + return OrigArgIndex; + } }; /// OutputArg - This struct carries flags and a value for a diff --git a/contrib/llvm/include/llvm/Target/TargetLowering.h b/contrib/llvm/include/llvm/Target/TargetLowering.h index c5fed02e17b8..43d6f2772c5e 100644 --- a/contrib/llvm/include/llvm/Target/TargetLowering.h +++ b/contrib/llvm/include/llvm/Target/TargetLowering.h @@ -2806,6 +2806,11 @@ class TargetLowering : public TargetLoweringBase { virtual bool useLoadStackGuardNode() const { return false; } + + /// Returns true if arguments should be sign-extended in lib calls. + virtual bool shouldSignExtendTypeInLibCall(EVT Type, bool IsSigned) const { + return IsSigned; + } }; /// Given an LLVM IR type and return type attributes, compute the return value diff --git a/contrib/llvm/lib/Analysis/ScalarEvolutionExpander.cpp b/contrib/llvm/lib/Analysis/ScalarEvolutionExpander.cpp index 59f19a002ecc..7e9e35127a49 100644 --- a/contrib/llvm/lib/Analysis/ScalarEvolutionExpander.cpp +++ b/contrib/llvm/lib/Analysis/ScalarEvolutionExpander.cpp @@ -1776,9 +1776,12 @@ unsigned SCEVExpander::replaceCongruentIVs(Loop *L, const DominatorTree *DT, << *IsomorphicInc << '\n'); Value *NewInc = OrigInc; if (OrigInc->getType() != IsomorphicInc->getType()) { - Instruction *IP = isa(OrigInc) - ? (Instruction*)L->getHeader()->getFirstInsertionPt() - : OrigInc->getNextNode(); + Instruction *IP = nullptr; + if (PHINode *PN = dyn_cast(OrigInc)) + IP = PN->getParent()->getFirstInsertionPt(); + else + IP = OrigInc->getNextNode(); + IRBuilder<> Builder(IP); Builder.SetCurrentDebugLocation(IsomorphicInc->getDebugLoc()); NewInc = Builder. diff --git a/contrib/llvm/lib/CodeGen/MachineCopyPropagation.cpp b/contrib/llvm/lib/CodeGen/MachineCopyPropagation.cpp index cbd62728ace9..96111225db5f 100644 --- a/contrib/llvm/lib/CodeGen/MachineCopyPropagation.cpp +++ b/contrib/llvm/lib/CodeGen/MachineCopyPropagation.cpp @@ -75,10 +75,9 @@ MachineCopyPropagation::SourceNoLongerAvailable(unsigned Reg, I != E; ++I) { unsigned MappedDef = *I; // Source of copy is no longer available for propagation. - if (AvailCopyMap.erase(MappedDef)) { - for (MCSubRegIterator SR(MappedDef, TRI); SR.isValid(); ++SR) - AvailCopyMap.erase(*SR); - } + AvailCopyMap.erase(MappedDef); + for (MCSubRegIterator SR(MappedDef, TRI); SR.isValid(); ++SR) + AvailCopyMap.erase(*SR); } } } diff --git a/contrib/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/contrib/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index afb986f1d7c6..1df61e4fb1fe 100644 --- a/contrib/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/contrib/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -1160,13 +1160,6 @@ void DAGCombiner::Run(CombineLevel AtLevel) { LegalOperations = Level >= AfterLegalizeVectorOps; LegalTypes = Level >= AfterLegalizeTypes; - // Early exit if this basic block is in an optnone function. - AttributeSet FnAttrs = - DAG.getMachineFunction().getFunction()->getAttributes(); - if (FnAttrs.hasAttribute(AttributeSet::FunctionIndex, - Attribute::OptimizeNone)) - return; - // Add all the dag nodes to the worklist. for (SelectionDAG::allnodes_iterator I = DAG.allnodes_begin(), E = DAG.allnodes_end(); I != E; ++I) @@ -2788,9 +2781,13 @@ SDValue DAGCombiner::visitAND(SDNode *N) { SplatBitSize = SplatBitSize * 2) SplatValue |= SplatValue.shl(SplatBitSize); - Constant = APInt::getAllOnesValue(BitWidth); - for (unsigned i = 0, n = SplatBitSize/BitWidth; i < n; ++i) - Constant &= SplatValue.lshr(i*BitWidth).zextOrTrunc(BitWidth); + // Make sure that variable 'Constant' is only set if 'SplatBitSize' is a + // multiple of 'BitWidth'. Otherwise, we could propagate a wrong value. + if (SplatBitSize % BitWidth == 0) { + Constant = APInt::getAllOnesValue(BitWidth); + for (unsigned i = 0, n = SplatBitSize/BitWidth; i < n; ++i) + Constant &= SplatValue.lshr(i*BitWidth).zextOrTrunc(BitWidth); + } } } @@ -11043,7 +11040,9 @@ SDValue DAGCombiner::visitBUILD_VECTOR(SDNode *N) { } else if (VecInT.getSizeInBits() == VT.getSizeInBits() * 2) { // If the input vector is too large, try to split it. // We don't support having two input vectors that are too large. - if (VecIn2.getNode()) + // If the zero vector was used, we can not split the vector, + // since we'd need 3 inputs. + if (UsesZeroVector || VecIn2.getNode()) return SDValue(); if (!TLI.isExtractSubvectorCheap(VT, VT.getVectorNumElements())) @@ -11055,7 +11054,6 @@ SDValue DAGCombiner::visitBUILD_VECTOR(SDNode *N) { DAG.getConstant(VT.getVectorNumElements(), TLI.getVectorIdxTy())); VecIn1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, VecIn1, DAG.getConstant(0, TLI.getVectorIdxTy())); - UsesZeroVector = false; } else return SDValue(); } diff --git a/contrib/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp b/contrib/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp index 97fed230c536..c46539b71dbe 100644 --- a/contrib/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp +++ b/contrib/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp @@ -497,7 +497,7 @@ bool FastISel::selectGetElementPtr(const User *I) { OI != E; ++OI) { const Value *Idx = *OI; if (auto *StTy = dyn_cast(Ty)) { - unsigned Field = cast(Idx)->getZExtValue(); + uint64_t Field = cast(Idx)->getZExtValue(); if (Field) { // N = N + Offset TotalOffs += DL.getStructLayout(StTy)->getElementOffset(Field); @@ -518,8 +518,8 @@ bool FastISel::selectGetElementPtr(const User *I) { if (CI->isZero()) continue; // N = N + Offset - TotalOffs += - DL.getTypeAllocSize(Ty) * cast(CI)->getSExtValue(); + uint64_t IdxN = CI->getValue().sextOrTrunc(64).getSExtValue(); + TotalOffs += DL.getTypeAllocSize(Ty) * IdxN; if (TotalOffs >= MaxOffs) { N = fastEmit_ri_(VT, ISD::ADD, N, NIsKill, TotalOffs, VT); if (!N) // Unhandled operand. Halt "fast" selection and bail. diff --git a/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp b/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp index 4591e79316d8..b59671554348 100644 --- a/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp +++ b/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp @@ -658,7 +658,7 @@ SDValue DAGTypeLegalizer::SoftenFloatRes_XINT_TO_FP(SDNode *N) { NVT, N->getOperand(0)); return TLI.makeLibCall(DAG, LC, TLI.getTypeToTransformTo(*DAG.getContext(), RVT), - &Op, 1, false, dl).first; + &Op, 1, Signed, dl).first; } diff --git a/contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp index 8b54e6568b9e..5222de1063bb 100644 --- a/contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp +++ b/contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp @@ -1423,9 +1423,10 @@ SUnit *ScheduleDAGRRList::PickNodeToScheduleBottomUp() { // If one or more successors has been unscheduled, then the current // node is no longer available. - if (!TrySU->isAvailable) + if (!TrySU->isAvailable || !TrySU->NodeQueueId) CurSU = AvailableQueue->pop(); else { + // Available and in AvailableQueue AvailableQueue->remove(TrySU); CurSU = TrySU; } diff --git a/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 551da20ad46a..fe9e442234c7 100644 --- a/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -3399,30 +3399,21 @@ void SelectionDAGBuilder::visitGetElementPtr(const User &I) { Ty = StTy->getElementType(Field); } else { Ty = cast(Ty)->getElementType(); + MVT PtrTy = DAG.getTargetLoweringInfo().getPointerTy(AS); + unsigned PtrSize = PtrTy.getSizeInBits(); + APInt ElementSize(PtrSize, DL->getTypeAllocSize(Ty)); // If this is a constant subscript, handle it quickly. - const TargetLowering &TLI = DAG.getTargetLoweringInfo(); - if (const ConstantInt *CI = dyn_cast(Idx)) { - if (CI->isZero()) continue; - uint64_t Offs = - DL->getTypeAllocSize(Ty)*cast(CI)->getSExtValue(); - SDValue OffsVal; - EVT PTy = TLI.getPointerTy(AS); - unsigned PtrBits = PTy.getSizeInBits(); - if (PtrBits < 64) - OffsVal = DAG.getNode(ISD::TRUNCATE, getCurSDLoc(), PTy, - DAG.getConstant(Offs, MVT::i64)); - else - OffsVal = DAG.getConstant(Offs, PTy); - - N = DAG.getNode(ISD::ADD, getCurSDLoc(), N.getValueType(), N, - OffsVal); + if (const auto *CI = dyn_cast(Idx)) { + if (CI->isZero()) + continue; + APInt Offs = ElementSize * CI->getValue().sextOrTrunc(PtrSize); + SDValue OffsVal = DAG.getConstant(Offs, PtrTy); + N = DAG.getNode(ISD::ADD, getCurSDLoc(), N.getValueType(), N, OffsVal); continue; } // N = N + Idx * ElementSize; - APInt ElementSize = - APInt(TLI.getPointerSizeInBits(AS), DL->getTypeAllocSize(Ty)); SDValue IdxN = getValue(Idx); // If the index is smaller or larger than intptr_t, truncate or extend @@ -5727,6 +5718,11 @@ void SelectionDAGBuilder::LowerCallTo(ImmutableCallSite CS, SDValue Callee, // Skip the first return-type Attribute to get to params. Entry.setAttributes(&CS, i - CS.arg_begin() + 1); Args.push_back(Entry); + + // If we have an explicit sret argument that is an Instruction, (i.e., it + // might point to function-local memory), we can't meaningfully tail-call. + if (Entry.isSRet && isa(V)) + isTailCall = false; } // Check if target-independent constraints permit a tail call here. @@ -7353,6 +7349,10 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const { Entry.Alignment = Align; CLI.getArgs().insert(CLI.getArgs().begin(), Entry); CLI.RetTy = Type::getVoidTy(CLI.RetTy->getContext()); + + // sret demotion isn't compatible with tail-calls, since the sret argument + // points into the callers stack frame. + CLI.IsTailCall = false; } else { for (unsigned I = 0, E = RetTys.size(); I != E; ++I) { EVT VT = RetTys[I]; @@ -7638,7 +7638,8 @@ void SelectionDAGISel::LowerArguments(const Function &F) { ISD::ArgFlagsTy Flags; Flags.setSRet(); MVT RegisterVT = TLI->getRegisterType(*DAG.getContext(), ValueVTs[0]); - ISD::InputArg RetArg(Flags, RegisterVT, ValueVTs[0], true, 0, 0); + ISD::InputArg RetArg(Flags, RegisterVT, ValueVTs[0], true, + ISD::InputArg::NoArgIndex, 0); Ins.push_back(RetArg); } diff --git a/contrib/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/contrib/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 72e0aca84080..f12c035e7858 100644 --- a/contrib/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/contrib/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -96,18 +96,19 @@ TargetLowering::makeLibCall(SelectionDAG &DAG, for (unsigned i = 0; i != NumOps; ++i) { Entry.Node = Ops[i]; Entry.Ty = Entry.Node.getValueType().getTypeForEVT(*DAG.getContext()); - Entry.isSExt = isSigned; - Entry.isZExt = !isSigned; + Entry.isSExt = shouldSignExtendTypeInLibCall(Ops[i].getValueType(), isSigned); + Entry.isZExt = !shouldSignExtendTypeInLibCall(Ops[i].getValueType(), isSigned); Args.push_back(Entry); } SDValue Callee = DAG.getExternalSymbol(getLibcallName(LC), getPointerTy()); Type *RetTy = RetVT.getTypeForEVT(*DAG.getContext()); TargetLowering::CallLoweringInfo CLI(DAG); + bool signExtend = shouldSignExtendTypeInLibCall(RetVT, isSigned); CLI.setDebugLoc(dl).setChain(DAG.getEntryNode()) .setCallee(getLibcallCallingConv(LC), RetTy, Callee, std::move(Args), 0) .setNoReturn(doesNotReturn).setDiscardResult(!isReturnValueUsed) - .setSExtResult(isSigned).setZExtResult(!isSigned); + .setSExtResult(signExtend).setZExtResult(!signExtend); return LowerCallTo(CLI); } diff --git a/contrib/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldMachO.cpp b/contrib/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldMachO.cpp index 21893d2909ed..d75be2807862 100644 --- a/contrib/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldMachO.cpp +++ b/contrib/llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldMachO.cpp @@ -177,25 +177,30 @@ bool RuntimeDyldMachO::isCompatibleFile(const object::ObjectFile &Obj) const { } template -void RuntimeDyldMachOCRTPBase::finalizeLoad(const ObjectFile &ObjImg, +void RuntimeDyldMachOCRTPBase::finalizeLoad(const ObjectFile &Obj, ObjSectionToIDMap &SectionMap) { unsigned EHFrameSID = RTDYLD_INVALID_SECTION_ID; unsigned TextSID = RTDYLD_INVALID_SECTION_ID; unsigned ExceptTabSID = RTDYLD_INVALID_SECTION_ID; - ObjSectionToIDMap::iterator i, e; - for (i = SectionMap.begin(), e = SectionMap.end(); i != e; ++i) { - const SectionRef &Section = i->first; + for (const auto &Section : Obj.sections()) { StringRef Name; Section.getName(Name); - if (Name == "__eh_frame") - EHFrameSID = i->second; - else if (Name == "__text") - TextSID = i->second; + + // Force emission of the __text, __eh_frame, and __gcc_except_tab sections + // if they're present. Otherwise call down to the impl to handle other + // sections that have already been emitted. + if (Name == "__text") + TextSID = findOrEmitSection(Obj, Section, true, SectionMap); + else if (Name == "__eh_frame") + EHFrameSID = findOrEmitSection(Obj, Section, false, SectionMap); else if (Name == "__gcc_except_tab") - ExceptTabSID = i->second; - else - impl().finalizeSection(ObjImg, i->second, Section); + ExceptTabSID = findOrEmitSection(Obj, Section, true, SectionMap); + else { + auto I = SectionMap.find(Section); + if (I != SectionMap.end()) + impl().finalizeSection(Obj, I->second, Section); + } } UnregisteredEHFrameSections.push_back( EHFrameRelatedSections(EHFrameSID, TextSID, ExceptTabSID)); @@ -238,7 +243,8 @@ unsigned char *RuntimeDyldMachOCRTPBase::processFDE(unsigned char *P, } static int64_t computeDelta(SectionEntry *A, SectionEntry *B) { - int64_t ObjDistance = A->ObjAddress - B->ObjAddress; + int64_t ObjDistance = + static_cast(A->ObjAddress) - static_cast(B->ObjAddress); int64_t MemDistance = A->LoadAddress - B->LoadAddress; return ObjDistance - MemDistance; } diff --git a/contrib/llvm/lib/IR/ConstantFold.cpp b/contrib/llvm/lib/IR/ConstantFold.cpp index 9176bf2aeeea..39d9a1d0a282 100644 --- a/contrib/llvm/lib/IR/ConstantFold.cpp +++ b/contrib/llvm/lib/IR/ConstantFold.cpp @@ -1120,27 +1120,18 @@ Constant *llvm::ConstantFoldBinaryInstruction(unsigned Opcode, return ConstantInt::get(CI1->getContext(), C1V | C2V); case Instruction::Xor: return ConstantInt::get(CI1->getContext(), C1V ^ C2V); - case Instruction::Shl: { - uint32_t shiftAmt = C2V.getZExtValue(); - if (shiftAmt < C1V.getBitWidth()) - return ConstantInt::get(CI1->getContext(), C1V.shl(shiftAmt)); - else - return UndefValue::get(C1->getType()); // too big shift is undef - } - case Instruction::LShr: { - uint32_t shiftAmt = C2V.getZExtValue(); - if (shiftAmt < C1V.getBitWidth()) - return ConstantInt::get(CI1->getContext(), C1V.lshr(shiftAmt)); - else - return UndefValue::get(C1->getType()); // too big shift is undef - } - case Instruction::AShr: { - uint32_t shiftAmt = C2V.getZExtValue(); - if (shiftAmt < C1V.getBitWidth()) - return ConstantInt::get(CI1->getContext(), C1V.ashr(shiftAmt)); - else - return UndefValue::get(C1->getType()); // too big shift is undef - } + case Instruction::Shl: + if (C2V.ult(C1V.getBitWidth())) + return ConstantInt::get(CI1->getContext(), C1V.shl(C2V)); + return UndefValue::get(C1->getType()); // too big shift is undef + case Instruction::LShr: + if (C2V.ult(C1V.getBitWidth())) + return ConstantInt::get(CI1->getContext(), C1V.lshr(C2V)); + return UndefValue::get(C1->getType()); // too big shift is undef + case Instruction::AShr: + if (C2V.ult(C1V.getBitWidth())) + return ConstantInt::get(CI1->getContext(), C1V.ashr(C2V)); + return UndefValue::get(C1->getType()); // too big shift is undef } } diff --git a/contrib/llvm/lib/IR/GCOV.cpp b/contrib/llvm/lib/IR/GCOV.cpp index 245c500cf621..88e0cd094ec2 100644 --- a/contrib/llvm/lib/IR/GCOV.cpp +++ b/contrib/llvm/lib/IR/GCOV.cpp @@ -263,10 +263,12 @@ bool GCOVFunction::readGCDA(GCOVBuffer &Buff, GCOV::GCOVVersion Version) { // required to combine the edge counts that are contained in the GCDA file. for (uint32_t BlockNo = 0; Count > 0; ++BlockNo) { // The last block is always reserved for exit block - if (BlockNo >= Blocks.size()-1) { + if (BlockNo >= Blocks.size()) { errs() << "Unexpected number of edges (in " << Name << ").\n"; return false; } + if (BlockNo == Blocks.size() - 1) + errs() << "(" << Name << ") has arcs from exit block.\n"; GCOVBlock &Block = *Blocks[BlockNo]; for (size_t EdgeNo = 0, End = Block.getNumDstEdges(); EdgeNo < End; ++EdgeNo) { diff --git a/contrib/llvm/lib/Support/Unix/Memory.inc b/contrib/llvm/lib/Support/Unix/Memory.inc index 7ccde463459d..c421ee84c2b7 100644 --- a/contrib/llvm/lib/Support/Unix/Memory.inc +++ b/contrib/llvm/lib/Support/Unix/Memory.inc @@ -333,23 +333,12 @@ void Memory::InvalidateInstructionCache(const void *Addr, for (intptr_t Line = StartLine; Line < EndLine; Line += LineSize) asm volatile("icbi 0, %0" : : "r"(Line)); asm volatile("isync"); -# elif (defined(__arm__) || defined(__aarch64__)) && defined(__GNUC__) +# elif (defined(__arm__) || defined(__aarch64__) || defined(__mips__)) && \ + defined(__GNUC__) // FIXME: Can we safely always call this for __GNUC__ everywhere? const char *Start = static_cast(Addr); const char *End = Start + Len; __clear_cache(const_cast(Start), const_cast(End)); -# elif defined(__mips__) - const char *Start = static_cast(Addr); -# if defined(ANDROID) - // The declaration of "cacheflush" in Android bionic: - // extern int cacheflush(long start, long end, long flags); - const char *End = Start + Len; - long LStart = reinterpret_cast(const_cast(Start)); - long LEnd = reinterpret_cast(const_cast(End)); - cacheflush(LStart, LEnd, BCACHE); -# else - cacheflush(const_cast(Start), Len, BCACHE); -# endif # endif #endif // end apple diff --git a/contrib/llvm/lib/Support/Windows/explicit_symbols.inc b/contrib/llvm/lib/Support/Windows/explicit_symbols.inc index cd56b13c14c3..bbbf7ea6a777 100644 --- a/contrib/llvm/lib/Support/Windows/explicit_symbols.inc +++ b/contrib/llvm/lib/Support/Windows/explicit_symbols.inc @@ -10,9 +10,15 @@ #ifdef HAVE___CHKSTK EXPLICIT_SYMBOL(__chkstk) #endif +#ifdef HAVE___CHKSTK_MS + EXPLICIT_SYMBOL(__chkstk_ms) +#endif #ifdef HAVE____CHKSTK EXPLICIT_SYMBOL(___chkstk) #endif +#ifdef HAVE____CHKSTK_MS + EXPLICIT_SYMBOL(___chkstk_ms) +#endif #ifdef HAVE___MAIN EXPLICIT_SYMBOL(__main) // FIXME: Don't call it. #endif diff --git a/contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index 9b6a100c420f..6458d56c751f 100644 --- a/contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -2031,18 +2031,19 @@ SDValue AArch64TargetLowering::LowerFormalArguments( unsigned CurArgIdx = 0; for (unsigned i = 0; i != NumArgs; ++i) { MVT ValVT = Ins[i].VT; - std::advance(CurOrigArg, Ins[i].OrigArgIndex - CurArgIdx); - CurArgIdx = Ins[i].OrigArgIndex; - - // Get type of the original argument. - EVT ActualVT = getValueType(CurOrigArg->getType(), /*AllowUnknown*/ true); - MVT ActualMVT = ActualVT.isSimple() ? ActualVT.getSimpleVT() : MVT::Other; - // If ActualMVT is i1/i8/i16, we should set LocVT to i8/i8/i16. - if (ActualMVT == MVT::i1 || ActualMVT == MVT::i8) - ValVT = MVT::i8; - else if (ActualMVT == MVT::i16) - ValVT = MVT::i16; + if (Ins[i].isOrigArg()) { + std::advance(CurOrigArg, Ins[i].getOrigArgIndex() - CurArgIdx); + CurArgIdx = Ins[i].getOrigArgIndex(); + // Get type of the original argument. + EVT ActualVT = getValueType(CurOrigArg->getType(), /*AllowUnknown*/ true); + MVT ActualMVT = ActualVT.isSimple() ? ActualVT.getSimpleVT() : MVT::Other; + // If ActualMVT is i1/i8/i16, we should set LocVT to i8/i8/i16. + if (ActualMVT == MVT::i1 || ActualMVT == MVT::i8) + ValVT = MVT::i8; + else if (ActualMVT == MVT::i16) + ValVT = MVT::i16; + } CCAssignFn *AssignFn = CCAssignFnForCall(CallConv, /*IsVarArg=*/false); bool Res = AssignFn(i, ValVT, ValVT, CCValAssign::Full, Ins[i].Flags, CCInfo); diff --git a/contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp b/contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp index e4bea5f4d823..a3a76e650523 100644 --- a/contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -3092,8 +3092,11 @@ ARMTargetLowering::LowerFormalArguments(SDValue Chain, for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { CCValAssign &VA = ArgLocs[i]; - std::advance(CurOrigArg, Ins[VA.getValNo()].OrigArgIndex - CurArgIdx); - CurArgIdx = Ins[VA.getValNo()].OrigArgIndex; + if (Ins[VA.getValNo()].isOrigArg()) { + std::advance(CurOrigArg, + Ins[VA.getValNo()].getOrigArgIndex() - CurArgIdx); + CurArgIdx = Ins[VA.getValNo()].getOrigArgIndex(); + } // Arguments stored in registers. if (VA.isRegLoc()) { EVT RegVT = VA.getLocVT(); @@ -3173,7 +3176,7 @@ ARMTargetLowering::LowerFormalArguments(SDValue Chain, assert(VA.isMemLoc()); assert(VA.getValVT() != MVT::i64 && "i64 should already be lowered"); - int index = ArgLocs[i].getValNo(); + int index = VA.getValNo(); // Some Ins[] entries become multiple ArgLoc[] entries. // Process them only once. @@ -3186,6 +3189,8 @@ ARMTargetLowering::LowerFormalArguments(SDValue Chain, // Since they could be overwritten by lowering of arguments in case of // a tail call. if (Flags.isByVal()) { + assert(Ins[index].isOrigArg() && + "Byval arguments cannot be implicit"); unsigned CurByValIndex = CCInfo.getInRegsParamsProcessed(); ByValStoreOffset = RoundUpToAlignment(ByValStoreOffset, Flags.getByValAlign()); diff --git a/contrib/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/contrib/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index 7db5b34204c3..699dfae02fc9 100644 --- a/contrib/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/contrib/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -3667,43 +3667,44 @@ bool MipsAsmParser::parseDirectiveModule() { return false; } - if (Lexer.is(AsmToken::Identifier)) { - StringRef Option = Parser.getTok().getString(); - Parser.Lex(); - - if (Option == "oddspreg") { - getTargetStreamer().emitDirectiveModuleOddSPReg(true, isABI_O32()); - clearFeatureBits(Mips::FeatureNoOddSPReg, "nooddspreg"); - - if (getLexer().isNot(AsmToken::EndOfStatement)) { - reportParseError("unexpected token, expected end of statement"); - return false; - } - - return false; - } else if (Option == "nooddspreg") { - if (!isABI_O32()) { - Error(L, "'.module nooddspreg' requires the O32 ABI"); - return false; - } - - getTargetStreamer().emitDirectiveModuleOddSPReg(false, isABI_O32()); - setFeatureBits(Mips::FeatureNoOddSPReg, "nooddspreg"); - - if (getLexer().isNot(AsmToken::EndOfStatement)) { - reportParseError("unexpected token, expected end of statement"); - return false; - } - - return false; - } else if (Option == "fp") { - return parseDirectiveModuleFP(); - } - - return Error(L, "'" + Twine(Option) + "' is not a valid .module option."); + StringRef Option; + if (Parser.parseIdentifier(Option)) { + reportParseError("expected .module option identifier"); + return false; } - return false; + if (Option == "oddspreg") { + getTargetStreamer().emitDirectiveModuleOddSPReg(true, isABI_O32()); + clearFeatureBits(Mips::FeatureNoOddSPReg, "nooddspreg"); + + // If this is not the end of the statement, report an error. + if (getLexer().isNot(AsmToken::EndOfStatement)) { + reportParseError("unexpected token, expected end of statement"); + return false; + } + + return false; // parseDirectiveModule has finished successfully. + } else if (Option == "nooddspreg") { + if (!isABI_O32()) { + Error(L, "'.module nooddspreg' requires the O32 ABI"); + return false; + } + + getTargetStreamer().emitDirectiveModuleOddSPReg(false, isABI_O32()); + setFeatureBits(Mips::FeatureNoOddSPReg, "nooddspreg"); + + // If this is not the end of the statement, report an error. + if (getLexer().isNot(AsmToken::EndOfStatement)) { + reportParseError("unexpected token, expected end of statement"); + return false; + } + + return false; // parseDirectiveModule has finished successfully. + } else if (Option == "fp") { + return parseDirectiveModuleFP(); + } else { + return Error(L, "'" + Twine(Option) + "' is not a valid .module option."); + } } /// parseDirectiveModuleFP diff --git a/contrib/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/contrib/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp index da33f3b913cd..d42b948cc615 100644 --- a/contrib/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp +++ b/contrib/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp @@ -259,6 +259,11 @@ static DecodeStatus DecodeCacheOp(MCInst &Inst, uint64_t Address, const void *Decoder); +static DecodeStatus DecodeCacheOpR6(MCInst &Inst, + unsigned Insn, + uint64_t Address, + const void *Decoder); + static DecodeStatus DecodeCacheOpMM(MCInst &Inst, unsigned Insn, uint64_t Address, @@ -304,6 +309,10 @@ static DecodeStatus DecodeFMem3(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder); +static DecodeStatus DecodeFMemCop2R6(MCInst &Inst, unsigned Insn, + uint64_t Address, + const void *Decoder); + static DecodeStatus DecodeSpecial3LlSc(MCInst &Inst, unsigned Insn, uint64_t Address, @@ -1118,6 +1127,23 @@ static DecodeStatus DecodeCacheOpMM(MCInst &Inst, return MCDisassembler::Success; } +static DecodeStatus DecodeCacheOpR6(MCInst &Inst, + unsigned Insn, + uint64_t Address, + const void *Decoder) { + int Offset = fieldFromInstruction(Insn, 7, 9); + unsigned Hint = fieldFromInstruction(Insn, 16, 5); + unsigned Base = fieldFromInstruction(Insn, 21, 5); + + Base = getReg(Decoder, Mips::GPR32RegClassID, Base); + + Inst.addOperand(MCOperand::CreateReg(Base)); + Inst.addOperand(MCOperand::CreateImm(Offset)); + Inst.addOperand(MCOperand::CreateImm(Hint)); + + return MCDisassembler::Success; +} + static DecodeStatus DecodeSyncI(MCInst &Inst, unsigned Insn, uint64_t Address, @@ -1354,6 +1380,23 @@ static DecodeStatus DecodeFMem3(MCInst &Inst, return MCDisassembler::Success; } +static DecodeStatus DecodeFMemCop2R6(MCInst &Inst, + unsigned Insn, + uint64_t Address, + const void *Decoder) { + int Offset = SignExtend32<11>(Insn & 0x07ff); + unsigned Reg = fieldFromInstruction(Insn, 16, 5); + unsigned Base = fieldFromInstruction(Insn, 11, 5); + + Reg = getReg(Decoder, Mips::COP2RegClassID, Reg); + Base = getReg(Decoder, Mips::GPR32RegClassID, Base); + + Inst.addOperand(MCOperand::CreateReg(Reg)); + Inst.addOperand(MCOperand::CreateReg(Base)); + Inst.addOperand(MCOperand::CreateImm(Offset)); + + return MCDisassembler::Success; +} static DecodeStatus DecodeSpecial3LlSc(MCInst &Inst, unsigned Insn, uint64_t Address, diff --git a/contrib/llvm/lib/Target/Mips/Mips.td b/contrib/llvm/lib/Target/Mips/Mips.td index 3e1d047091a9..5ad56834607e 100644 --- a/contrib/llvm/lib/Target/Mips/Mips.td +++ b/contrib/llvm/lib/Target/Mips/Mips.td @@ -58,15 +58,15 @@ def MipsInstrInfo : InstrInfo; //===----------------------------------------------------------------------===// def FeatureNoABICalls : SubtargetFeature<"noabicalls", "NoABICalls", "true", - "Disable SVR4-style position-independent code.">; + "Disable SVR4-style position-independent code">; def FeatureGP64Bit : SubtargetFeature<"gp64", "IsGP64bit", "true", - "General Purpose Registers are 64-bit wide.">; + "General Purpose Registers are 64-bit wide">; def FeatureFP64Bit : SubtargetFeature<"fp64", "IsFP64bit", "true", - "Support 64-bit FP registers.">; + "Support 64-bit FP registers">; def FeatureFPXX : SubtargetFeature<"fpxx", "IsFPXX", "true", - "Support for FPXX.">; + "Support for FPXX">; def FeatureNaN2008 : SubtargetFeature<"nan2008", "IsNaN2008bit", "true", - "IEEE 754-2008 NaN encoding.">; + "IEEE 754-2008 NaN encoding">; def FeatureSingleFloat : SubtargetFeature<"single-float", "IsSingleFloat", "true", "Only supports single precision float">; def FeatureO32 : SubtargetFeature<"o32", "ABI", "MipsABIInfo::O32()", @@ -81,7 +81,7 @@ def FeatureNoOddSPReg : SubtargetFeature<"nooddspreg", "UseOddSPReg", "false", "Disable odd numbered single-precision " "registers">; def FeatureVFPU : SubtargetFeature<"vfpu", "HasVFPU", - "true", "Enable vector FPU instructions.">; + "true", "Enable vector FPU instructions">; def FeatureMips1 : SubtargetFeature<"mips1", "MipsArchVersion", "Mips1", "Mips I ISA Support [highly experimental]">; def FeatureMips2 : SubtargetFeature<"mips2", "MipsArchVersion", "Mips2", diff --git a/contrib/llvm/lib/Target/Mips/Mips16InstrInfo.cpp b/contrib/llvm/lib/Target/Mips/Mips16InstrInfo.cpp index 976beccfed9d..7e1fbfdcac46 100644 --- a/contrib/llvm/lib/Target/Mips/Mips16InstrInfo.cpp +++ b/contrib/llvm/lib/Target/Mips/Mips16InstrInfo.cpp @@ -293,6 +293,9 @@ void Mips16InstrInfo::adjustStackPtrBigUnrestricted( void Mips16InstrInfo::adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const { + if (Amount == 0) + return; + if (isInt<16>(Amount)) // need to change to addiu sp, ....and isInt<16> BuildAddiuSpImm(MBB, I, Amount); else diff --git a/contrib/llvm/lib/Target/Mips/Mips32r6InstrInfo.td b/contrib/llvm/lib/Target/Mips/Mips32r6InstrInfo.td index 185d12ec93fd..49c63226dc06 100644 --- a/contrib/llvm/lib/Target/Mips/Mips32r6InstrInfo.td +++ b/contrib/llvm/lib/Target/Mips/Mips32r6InstrInfo.td @@ -379,7 +379,6 @@ class JMP_IDX_COMPACT_DESC_BASE Pattern = []; bit isTerminator = 1; bit hasDelaySlot = 0; - string DecoderMethod = "DecodeSimm16"; } class JIALC_DESC : JMP_IDX_COMPACT_DESC_BASE<"jialc", calloffset16, @@ -550,6 +549,7 @@ class CACHE_HINT_DESC Pattern = []; + string DecoderMethod = "DecodeCacheOpR6"; } class CACHE_DESC : CACHE_HINT_DESC<"cache", mem_simm9, GPR32Opnd>; @@ -561,6 +561,7 @@ class COP2LD_DESC_BASE { string AsmString = !strconcat(instr_asm, "\t$rt, $addr"); list Pattern = []; bit mayLoad = 1; + string DecoderMethod = "DecodeFMemCop2R6"; } class LDC2_R6_DESC : COP2LD_DESC_BASE<"ldc2", COP2Opnd>; @@ -572,6 +573,7 @@ class COP2ST_DESC_BASE { string AsmString = !strconcat(instr_asm, "\t$rt, $addr"); list Pattern = []; bit mayStore = 1; + string DecoderMethod = "DecodeFMemCop2R6"; } class SDC2_R6_DESC : COP2ST_DESC_BASE<"sdc2", COP2Opnd>; diff --git a/contrib/llvm/lib/Target/Mips/MipsCCState.cpp b/contrib/llvm/lib/Target/Mips/MipsCCState.cpp index e18cc8b1f7b3..b8081295ca64 100644 --- a/contrib/llvm/lib/Target/Mips/MipsCCState.cpp +++ b/contrib/llvm/lib/Target/Mips/MipsCCState.cpp @@ -132,8 +132,8 @@ void MipsCCState::PreAnalyzeFormalArgumentsForF128( continue; } - assert(Ins[i].OrigArgIndex < MF.getFunction()->arg_size()); - std::advance(FuncArg, Ins[i].OrigArgIndex); + assert(Ins[i].getOrigArgIndex() < MF.getFunction()->arg_size()); + std::advance(FuncArg, Ins[i].getOrigArgIndex()); OriginalArgWasF128.push_back( originalTypeIsF128(FuncArg->getType(), nullptr)); diff --git a/contrib/llvm/lib/Target/Mips/MipsCallingConv.td b/contrib/llvm/lib/Target/Mips/MipsCallingConv.td index 90bf9f3f5835..dcd88f25d25c 100644 --- a/contrib/llvm/lib/Target/Mips/MipsCallingConv.td +++ b/contrib/llvm/lib/Target/Mips/MipsCallingConv.td @@ -123,7 +123,7 @@ def CC_MipsN_SoftFloat : CallingConv<[ ]>; def CC_MipsN : CallingConv<[ - CCIfType<[i8, i16, i32], + CCIfType<[i8, i16, i32, i64], CCIfSubtargetNot<"isLittle()", CCIfInReg>>>, @@ -159,6 +159,10 @@ def CC_MipsN : CallingConv<[ // N32/64 variable arguments. // All arguments are passed in integer registers. def CC_MipsN_VarArg : CallingConv<[ + CCIfType<[i8, i16, i32, i64], + CCIfSubtargetNot<"isLittle()", + CCIfInReg>>>, + // All integers are promoted to 64-bit. CCIfType<[i8, i16, i32], CCPromoteToType>, diff --git a/contrib/llvm/lib/Target/Mips/MipsISelLowering.cpp b/contrib/llvm/lib/Target/Mips/MipsISelLowering.cpp index c6045fe7d6df..37fc7849310b 100644 --- a/contrib/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/contrib/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -619,6 +619,33 @@ static SDValue performSELECTCombine(SDNode *N, SelectionDAG &DAG, return SDValue(); } +static SDValue performCMovFPCombine(SDNode *N, SelectionDAG &DAG, + TargetLowering::DAGCombinerInfo &DCI, + const MipsSubtarget &Subtarget) { + if (DCI.isBeforeLegalizeOps()) + return SDValue(); + + SDValue ValueIfTrue = N->getOperand(0), ValueIfFalse = N->getOperand(2); + + ConstantSDNode *FalseC = dyn_cast(ValueIfFalse); + if (!FalseC || FalseC->getZExtValue()) + return SDValue(); + + // Since RHS (False) is 0, we swap the order of the True/False operands + // (obviously also inverting the condition) so that we can + // take advantage of conditional moves using the $0 register. + // Example: + // return (a != 0) ? x : 0; + // load $reg, x + // movz $reg, $0, a + unsigned Opc = (N->getOpcode() == MipsISD::CMovFP_T) ? MipsISD::CMovFP_F : + MipsISD::CMovFP_T; + + SDValue FCC = N->getOperand(1), Glue = N->getOperand(3); + return DAG.getNode(Opc, SDLoc(N), ValueIfFalse.getValueType(), + ValueIfFalse, FCC, ValueIfTrue, Glue); +} + static SDValue performANDCombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget) { @@ -752,6 +779,9 @@ SDValue MipsTargetLowering::PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) return performDivRemCombine(N, DAG, DCI, Subtarget); case ISD::SELECT: return performSELECTCombine(N, DAG, DCI, Subtarget); + case MipsISD::CMovFP_F: + case MipsISD::CMovFP_T: + return performCMovFPCombine(N, DAG, DCI, Subtarget); case ISD::AND: return performANDCombine(N, DAG, DCI, Subtarget); case ISD::OR: @@ -2039,7 +2069,7 @@ SDValue MipsTargetLowering::lowerShiftLeftParts(SDValue Op, SDValue Or = DAG.getNode(ISD::OR, DL, VT, ShiftLeftHi, ShiftRightLo); SDValue ShiftLeftLo = DAG.getNode(ISD::SHL, DL, VT, Lo, Shamt); SDValue Cond = DAG.getNode(ISD::AND, DL, MVT::i32, Shamt, - DAG.getConstant(0x20, MVT::i32)); + DAG.getConstant(VT.getSizeInBits(), MVT::i32)); Lo = DAG.getNode(ISD::SELECT, DL, VT, Cond, DAG.getConstant(0, VT), ShiftLeftLo); Hi = DAG.getNode(ISD::SELECT, DL, VT, Cond, ShiftLeftLo, Or); @@ -2078,11 +2108,12 @@ SDValue MipsTargetLowering::lowerShiftRightParts(SDValue Op, SelectionDAG &DAG, SDValue ShiftRightHi = DAG.getNode(IsSRA ? ISD::SRA : ISD::SRL, DL, VT, Hi, Shamt); SDValue Cond = DAG.getNode(ISD::AND, DL, MVT::i32, Shamt, - DAG.getConstant(0x20, MVT::i32)); - SDValue Shift31 = DAG.getNode(ISD::SRA, DL, VT, Hi, DAG.getConstant(31, VT)); + DAG.getConstant(VT.getSizeInBits(), MVT::i32)); + SDValue Ext = DAG.getNode(ISD::SRA, DL, VT, Hi, + DAG.getConstant(VT.getSizeInBits() - 1, VT)); Lo = DAG.getNode(ISD::SELECT, DL, VT, Cond, ShiftRightHi, Or); Hi = DAG.getNode(ISD::SELECT, DL, VT, Cond, - IsSRA ? Shift31 : DAG.getConstant(0, VT), ShiftRightHi); + IsSRA ? Ext : DAG.getConstant(0, VT), ShiftRightHi); SDValue Ops[2] = {Lo, Hi}; return DAG.getMergeValues(Ops, DL); @@ -2902,13 +2933,16 @@ MipsTargetLowering::LowerFormalArguments(SDValue Chain, for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { CCValAssign &VA = ArgLocs[i]; - std::advance(FuncArg, Ins[i].OrigArgIndex - CurArgIdx); - CurArgIdx = Ins[i].OrigArgIndex; + if (Ins[i].isOrigArg()) { + std::advance(FuncArg, Ins[i].getOrigArgIndex() - CurArgIdx); + CurArgIdx = Ins[i].getOrigArgIndex(); + } EVT ValVT = VA.getValVT(); ISD::ArgFlagsTy Flags = Ins[i].Flags; bool IsRegLoc = VA.isRegLoc(); if (Flags.isByVal()) { + assert(Ins[i].isOrigArg() && "Byval arguments cannot be implicit"); unsigned FirstByValReg, LastByValReg; unsigned ByValIdx = CCInfo.getInRegsParamsProcessed(); CCInfo.getInRegsParamInfo(ByValIdx, FirstByValReg, LastByValReg); @@ -3029,6 +3063,15 @@ MipsTargetLowering::CanLowerReturn(CallingConv::ID CallConv, return CCInfo.CheckReturn(Outs, RetCC_Mips); } +bool +MipsTargetLowering::shouldSignExtendTypeInLibCall(EVT Type, bool IsSigned) const { + if (Subtarget.hasMips3() && Subtarget.abiUsesSoftFloat()) { + if (Type == MVT::i32) + return true; + } + return IsSigned; +} + SDValue MipsTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, diff --git a/contrib/llvm/lib/Target/Mips/MipsISelLowering.h b/contrib/llvm/lib/Target/Mips/MipsISelLowering.h index 4132de6dbcad..4da337a61dad 100644 --- a/contrib/llvm/lib/Target/Mips/MipsISelLowering.h +++ b/contrib/llvm/lib/Target/Mips/MipsISelLowering.h @@ -472,6 +472,8 @@ namespace llvm { const SmallVectorImpl &OutVals, SDLoc dl, SelectionDAG &DAG) const override; + bool shouldSignExtendTypeInLibCall(EVT Type, bool IsSigned) const override; + // Inline asm support ConstraintType getConstraintType(const std::string &Constraint) const override; diff --git a/contrib/llvm/lib/Target/Mips/MipsInstrFPU.td b/contrib/llvm/lib/Target/Mips/MipsInstrFPU.td index 2aa83289a106..ed97cb461923 100644 --- a/contrib/llvm/lib/Target/Mips/MipsInstrFPU.td +++ b/contrib/llvm/lib/Target/Mips/MipsInstrFPU.td @@ -458,42 +458,42 @@ def FSUB_S : MMRel, ADDS_FT<"sub.s", FGR32Opnd, II_SUB_S, 0, fsub>, defm FSUB : ADDS_M<"sub.d", II_SUB_D, 0, fsub>, ADDS_FM<0x01, 17>; def MADD_S : MMRel, MADDS_FT<"madd.s", FGR32Opnd, II_MADD_S, fadd>, - MADDS_FM<4, 0>, ISA_MIPS32R2_NOT_32R6_64R6; + MADDS_FM<4, 0>, INSN_MIPS4_32R2_NOT_32R6_64R6; def MSUB_S : MMRel, MADDS_FT<"msub.s", FGR32Opnd, II_MSUB_S, fsub>, - MADDS_FM<5, 0>, ISA_MIPS32R2_NOT_32R6_64R6; + MADDS_FM<5, 0>, INSN_MIPS4_32R2_NOT_32R6_64R6; let AdditionalPredicates = [NoNaNsFPMath] in { def NMADD_S : MMRel, NMADDS_FT<"nmadd.s", FGR32Opnd, II_NMADD_S, fadd>, - MADDS_FM<6, 0>, ISA_MIPS32R2_NOT_32R6_64R6; + MADDS_FM<6, 0>, INSN_MIPS4_32R2_NOT_32R6_64R6; def NMSUB_S : MMRel, NMADDS_FT<"nmsub.s", FGR32Opnd, II_NMSUB_S, fsub>, - MADDS_FM<7, 0>, ISA_MIPS32R2_NOT_32R6_64R6; + MADDS_FM<7, 0>, INSN_MIPS4_32R2_NOT_32R6_64R6; } def MADD_D32 : MMRel, MADDS_FT<"madd.d", AFGR64Opnd, II_MADD_D, fadd>, - MADDS_FM<4, 1>, ISA_MIPS32R2_NOT_32R6_64R6, FGR_32; + MADDS_FM<4, 1>, INSN_MIPS4_32R2_NOT_32R6_64R6, FGR_32; def MSUB_D32 : MMRel, MADDS_FT<"msub.d", AFGR64Opnd, II_MSUB_D, fsub>, - MADDS_FM<5, 1>, ISA_MIPS32R2_NOT_32R6_64R6, FGR_32; + MADDS_FM<5, 1>, INSN_MIPS4_32R2_NOT_32R6_64R6, FGR_32; let AdditionalPredicates = [NoNaNsFPMath] in { def NMADD_D32 : MMRel, NMADDS_FT<"nmadd.d", AFGR64Opnd, II_NMADD_D, fadd>, - MADDS_FM<6, 1>, ISA_MIPS32R2_NOT_32R6_64R6, FGR_32; + MADDS_FM<6, 1>, INSN_MIPS4_32R2_NOT_32R6_64R6, FGR_32; def NMSUB_D32 : MMRel, NMADDS_FT<"nmsub.d", AFGR64Opnd, II_NMSUB_D, fsub>, - MADDS_FM<7, 1>, ISA_MIPS32R2_NOT_32R6_64R6, FGR_32; + MADDS_FM<7, 1>, INSN_MIPS4_32R2_NOT_32R6_64R6, FGR_32; } -let isCodeGenOnly=1 in { +let DecoderNamespace = "Mips64" in { def MADD_D64 : MADDS_FT<"madd.d", FGR64Opnd, II_MADD_D, fadd>, - MADDS_FM<4, 1>, ISA_MIPS32R2_NOT_32R6_64R6, FGR_64; + MADDS_FM<4, 1>, INSN_MIPS4_32R2_NOT_32R6_64R6, FGR_64; def MSUB_D64 : MADDS_FT<"msub.d", FGR64Opnd, II_MSUB_D, fsub>, - MADDS_FM<5, 1>, ISA_MIPS32R2_NOT_32R6_64R6, FGR_64; + MADDS_FM<5, 1>, INSN_MIPS4_32R2_NOT_32R6_64R6, FGR_64; } let AdditionalPredicates = [NoNaNsFPMath], - isCodeGenOnly=1 in { + DecoderNamespace = "Mips64" in { def NMADD_D64 : NMADDS_FT<"nmadd.d", FGR64Opnd, II_NMADD_D, fadd>, - MADDS_FM<6, 1>, ISA_MIPS32R2_NOT_32R6_64R6, FGR_64; + MADDS_FM<6, 1>, INSN_MIPS4_32R2_NOT_32R6_64R6, FGR_64; def NMSUB_D64 : NMADDS_FT<"nmsub.d", FGR64Opnd, II_NMSUB_D, fsub>, - MADDS_FM<7, 1>, ISA_MIPS32R2_NOT_32R6_64R6, FGR_64; + MADDS_FM<7, 1>, INSN_MIPS4_32R2_NOT_32R6_64R6, FGR_64; } //===----------------------------------------------------------------------===// diff --git a/contrib/llvm/lib/Target/Mips/MipsRegisterInfo.td b/contrib/llvm/lib/Target/Mips/MipsRegisterInfo.td index 2b3b6c1e5242..1eb8d9ad821d 100644 --- a/contrib/llvm/lib/Target/Mips/MipsRegisterInfo.td +++ b/contrib/llvm/lib/Target/Mips/MipsRegisterInfo.td @@ -388,6 +388,8 @@ def MSA128W: RegisterClass<"Mips", [v4i32, v4f32], 128, (sequence "W%u", 0, 31)>; def MSA128D: RegisterClass<"Mips", [v2i64, v2f64], 128, (sequence "W%u", 0, 31)>; +def MSA128WEvens: RegisterClass<"Mips", [v4i32, v4f32], 128, + (decimate (sequence "W%u", 0, 31), 2)>; def MSACtrl: RegisterClass<"Mips", [i32], 32, (add MSAIR, MSACSR, MSAAccess, MSASave, MSAModify, MSARequest, MSAMap, MSAUnmap)>; diff --git a/contrib/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp b/contrib/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp index cb7ac40a9159..8c2620ca7f02 100644 --- a/contrib/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp +++ b/contrib/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp @@ -258,8 +258,12 @@ SDNode *MipsSEDAGToDAGISel::selectAddESubE(unsigned MOp, SDValue InFlag, CurDAG->getTargetConstant(Mips::sub_32, VT)); } - SDNode *AddCarry = CurDAG->getMachineNode(ADDuOp, DL, VT, - SDValue(Carry, 0), RHS); + // Generate a second addition only if we know that RHS is not a + // constant-zero node. + SDNode *AddCarry = Carry; + ConstantSDNode *C = dyn_cast(RHS); + if (!C || C->getZExtValue()) + AddCarry = CurDAG->getMachineNode(ADDuOp, DL, VT, SDValue(Carry, 0), RHS); return CurDAG->SelectNodeTo(Node, MOp, VT, MVT::Glue, LHS, SDValue(AddCarry, 0)); diff --git a/contrib/llvm/lib/Target/Mips/MipsSEISelLowering.cpp b/contrib/llvm/lib/Target/Mips/MipsSEISelLowering.cpp index 3f865af56568..2c033ce61c16 100644 --- a/contrib/llvm/lib/Target/Mips/MipsSEISelLowering.cpp +++ b/contrib/llvm/lib/Target/Mips/MipsSEISelLowering.cpp @@ -2883,10 +2883,21 @@ emitCOPY_FW(MachineInstr *MI, MachineBasicBlock *BB) const{ unsigned Ws = MI->getOperand(1).getReg(); unsigned Lane = MI->getOperand(2).getImm(); - if (Lane == 0) - BuildMI(*BB, MI, DL, TII->get(Mips::COPY), Fd).addReg(Ws, 0, Mips::sub_lo); - else { - unsigned Wt = RegInfo.createVirtualRegister(&Mips::MSA128WRegClass); + if (Lane == 0) { + unsigned Wt = Ws; + if (!Subtarget.useOddSPReg()) { + // We must copy to an even-numbered MSA register so that the + // single-precision sub-register is also guaranteed to be even-numbered. + Wt = RegInfo.createVirtualRegister(&Mips::MSA128WEvensRegClass); + + BuildMI(*BB, MI, DL, TII->get(Mips::COPY), Wt).addReg(Ws); + } + + BuildMI(*BB, MI, DL, TII->get(Mips::COPY), Fd).addReg(Wt, 0, Mips::sub_lo); + } else { + unsigned Wt = RegInfo.createVirtualRegister( + Subtarget.useOddSPReg() ? &Mips::MSA128WRegClass : + &Mips::MSA128WEvensRegClass); BuildMI(*BB, MI, DL, TII->get(Mips::SPLATI_W), Wt).addReg(Ws).addImm(Lane); BuildMI(*BB, MI, DL, TII->get(Mips::COPY), Fd).addReg(Wt, 0, Mips::sub_lo); @@ -2948,7 +2959,9 @@ MipsSETargetLowering::emitINSERT_FW(MachineInstr *MI, unsigned Wd_in = MI->getOperand(1).getReg(); unsigned Lane = MI->getOperand(2).getImm(); unsigned Fs = MI->getOperand(3).getReg(); - unsigned Wt = RegInfo.createVirtualRegister(&Mips::MSA128WRegClass); + unsigned Wt = RegInfo.createVirtualRegister( + Subtarget.useOddSPReg() ? &Mips::MSA128WRegClass : + &Mips::MSA128WEvensRegClass); BuildMI(*BB, MI, DL, TII->get(Mips::SUBREG_TO_REG), Wt) .addImm(0) diff --git a/contrib/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp b/contrib/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp index 74f291f609fd..180b04327fc9 100644 --- a/contrib/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp +++ b/contrib/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp @@ -364,6 +364,9 @@ void MipsSEInstrInfo::adjustStackPtr(unsigned SP, int64_t Amount, unsigned ADDu = STI.isABI_N64() ? Mips::DADDu : Mips::ADDu; unsigned ADDiu = STI.isABI_N64() ? Mips::DADDiu : Mips::ADDiu; + if (Amount == 0) + return; + if (isInt<16>(Amount))// addi sp, sp, amount BuildMI(MBB, I, DL, get(ADDiu), SP).addReg(SP).addImm(Amount); else { // Expand immediate that doesn't fit in 16-bit. diff --git a/contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 5c52bb19b0d1..e580c811d71f 100644 --- a/contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -2688,9 +2688,10 @@ PPCTargetLowering::LowerFormalArguments_64SVR4( unsigned ObjSize = ObjectVT.getStoreSize(); unsigned ArgSize = ObjSize; ISD::ArgFlagsTy Flags = Ins[ArgNo].Flags; - std::advance(FuncArg, Ins[ArgNo].OrigArgIndex - CurArgIdx); - CurArgIdx = Ins[ArgNo].OrigArgIndex; - + if (Ins[ArgNo].isOrigArg()) { + std::advance(FuncArg, Ins[ArgNo].getOrigArgIndex() - CurArgIdx); + CurArgIdx = Ins[ArgNo].getOrigArgIndex(); + } /* Respect alignment of argument on the stack. */ unsigned Align = CalculateStackSlotAlignment(ObjectVT, OrigVT, Flags, PtrByteSize); @@ -2704,6 +2705,8 @@ PPCTargetLowering::LowerFormalArguments_64SVR4( // FIXME the codegen can be much improved in some cases. // We do not have to keep everything in memory. if (Flags.isByVal()) { + assert(Ins[ArgNo].isOrigArg() && "Byval arguments cannot be implicit"); + // ObjSize is the true size, ArgSize rounded up to multiple of registers. ObjSize = Flags.getByValSize(); ArgSize = ((ObjSize + PtrByteSize - 1)/PtrByteSize) * PtrByteSize; @@ -3064,9 +3067,10 @@ PPCTargetLowering::LowerFormalArguments_Darwin( unsigned ObjSize = ObjectVT.getSizeInBits()/8; unsigned ArgSize = ObjSize; ISD::ArgFlagsTy Flags = Ins[ArgNo].Flags; - std::advance(FuncArg, Ins[ArgNo].OrigArgIndex - CurArgIdx); - CurArgIdx = Ins[ArgNo].OrigArgIndex; - + if (Ins[ArgNo].isOrigArg()) { + std::advance(FuncArg, Ins[ArgNo].getOrigArgIndex() - CurArgIdx); + CurArgIdx = Ins[ArgNo].getOrigArgIndex(); + } unsigned CurArgOffset = ArgOffset; // Varargs or 64 bit Altivec parameters are padded to a 16 byte boundary. @@ -3087,6 +3091,8 @@ PPCTargetLowering::LowerFormalArguments_Darwin( // FIXME the codegen can be much improved in some cases. // We do not have to keep everything in memory. if (Flags.isByVal()) { + assert(Ins[ArgNo].isOrigArg() && "Byval arguments cannot be implicit"); + // ObjSize is the true size, ArgSize rounded up to multiple of registers. ObjSize = Flags.getByValSize(); ArgSize = ((ObjSize + PtrByteSize - 1)/PtrByteSize) * PtrByteSize; diff --git a/contrib/llvm/lib/Target/R600/AMDGPU.td b/contrib/llvm/lib/Target/R600/AMDGPU.td index 1df4448abf05..03f2bbe4820e 100644 --- a/contrib/llvm/lib/Target/R600/AMDGPU.td +++ b/contrib/llvm/lib/Target/R600/AMDGPU.td @@ -97,6 +97,11 @@ def FeatureVGPRSpilling : SubtargetFeature<"vgpr-spilling", "true", "Enable spilling of VGPRs to scratch memory">; +def FeatureSGPRInitBug : SubtargetFeature<"sgpr-init-bug", + "SGPRInitBug", + "true", + "VI SGPR initilization bug requiring a fixed SGPR allocation size">; + class SubtargetFeatureFetchLimit : SubtargetFeature <"fetch"#Value, "TexVTXClauseSize", diff --git a/contrib/llvm/lib/Target/R600/AMDGPUAlwaysInlinePass.cpp b/contrib/llvm/lib/Target/R600/AMDGPUAlwaysInlinePass.cpp index b545b456161f..0b426bc63dd5 100644 --- a/contrib/llvm/lib/Target/R600/AMDGPUAlwaysInlinePass.cpp +++ b/contrib/llvm/lib/Target/R600/AMDGPUAlwaysInlinePass.cpp @@ -40,7 +40,8 @@ bool AMDGPUAlwaysInline::runOnModule(Module &M) { std::vector FuncsToClone; for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I) { Function &F = *I; - if (!F.hasLocalLinkage() && !F.isDeclaration() && !F.use_empty()) + if (!F.hasLocalLinkage() && !F.isDeclaration() && !F.use_empty() && + !F.hasFnAttribute(Attribute::NoInline)) FuncsToClone.push_back(&F); } @@ -54,7 +55,7 @@ bool AMDGPUAlwaysInline::runOnModule(Module &M) { for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I) { Function &F = *I; - if (F.hasLocalLinkage()) { + if (F.hasLocalLinkage() && !F.hasFnAttribute(Attribute::NoInline)) { F.addFnAttr(Attribute::AlwaysInline); } } diff --git a/contrib/llvm/lib/Target/R600/AMDGPUAsmPrinter.cpp b/contrib/llvm/lib/Target/R600/AMDGPUAsmPrinter.cpp index 6185e367ff50..1fae26e18a44 100644 --- a/contrib/llvm/lib/Target/R600/AMDGPUAsmPrinter.cpp +++ b/contrib/llvm/lib/Target/R600/AMDGPUAsmPrinter.cpp @@ -343,6 +343,13 @@ void AMDGPUAsmPrinter::getSIProgramInfo(SIProgramInfo &ProgInfo, ProgInfo.NumVGPR = MaxVGPR + 1; ProgInfo.NumSGPR = MaxSGPR + 1; + if (STM.hasSGPRInitBug()) { + if (ProgInfo.NumSGPR > AMDGPUSubtarget::FIXED_SGPR_COUNT_FOR_INIT_BUG) + llvm_unreachable("Too many SGPRs used with the SGPR init bug"); + + ProgInfo.NumSGPR = AMDGPUSubtarget::FIXED_SGPR_COUNT_FOR_INIT_BUG; + } + ProgInfo.VGPRBlocks = (ProgInfo.NumVGPR - 1) / 4; ProgInfo.SGPRBlocks = (ProgInfo.NumSGPR - 1) / 8; // Set the value to initialize FP_ROUND and FP_DENORM parts of the mode diff --git a/contrib/llvm/lib/Target/R600/AMDGPUISelDAGToDAG.cpp b/contrib/llvm/lib/Target/R600/AMDGPUISelDAGToDAG.cpp index 15112c7e54d4..68d557a1cf70 100644 --- a/contrib/llvm/lib/Target/R600/AMDGPUISelDAGToDAG.cpp +++ b/contrib/llvm/lib/Target/R600/AMDGPUISelDAGToDAG.cpp @@ -439,6 +439,31 @@ SDNode *AMDGPUDAGToDAGISel::Select(SDNode *N) { break; } + case ISD::STORE: { + // Handle i64 stores here for the same reason mentioned above for loads. + StoreSDNode *ST = cast(N); + SDValue Value = ST->getValue(); + if (Value.getValueType() != MVT::i64 || ST->isTruncatingStore()) + break; + + SDValue NewValue = CurDAG->getNode(ISD::BITCAST, SDLoc(N), + MVT::v2i32, Value); + SDValue NewStore = CurDAG->getStore(ST->getChain(), SDLoc(N), NewValue, + ST->getBasePtr(), ST->getMemOperand()); + + CurDAG->ReplaceAllUsesOfValueWith(SDValue(N, 0), NewStore); + + if (NewValue.getOpcode() == ISD::BITCAST) { + Select(NewStore.getNode()); + return SelectCode(NewValue.getNode()); + } + + // getNode() may fold the bitcast if its input was another bitcast. If that + // happens we should only select the new store. + N = NewStore.getNode(); + break; + } + case AMDGPUISD::REGISTER_LOAD: { if (ST.getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) break; @@ -761,6 +786,8 @@ SDNode *AMDGPUDAGToDAGISel::SelectADD_SUB_I64(SDNode *N) { return CurDAG->SelectNodeTo(N, AMDGPU::REG_SEQUENCE, MVT::i64, Args); } +// We need to handle this here because tablegen doesn't support matching +// instructions with multiple outputs. SDNode *AMDGPUDAGToDAGISel::SelectDIV_SCALE(SDNode *N) { SDLoc SL(N); EVT VT = N->getValueType(0); @@ -770,19 +797,12 @@ SDNode *AMDGPUDAGToDAGISel::SelectDIV_SCALE(SDNode *N) { unsigned Opc = (VT == MVT::f64) ? AMDGPU::V_DIV_SCALE_F64 : AMDGPU::V_DIV_SCALE_F32; - const SDValue Zero = CurDAG->getTargetConstant(0, MVT::i32); - const SDValue False = CurDAG->getTargetConstant(0, MVT::i1); - SDValue Ops[] = { - Zero, // src0_modifiers - N->getOperand(0), // src0 - Zero, // src1_modifiers - N->getOperand(1), // src1 - Zero, // src2_modifiers - N->getOperand(2), // src2 - False, // clamp - Zero // omod - }; + // src0_modifiers, src0, src1_modifiers, src1, src2_modifiers, src2, clamp, omod + SDValue Ops[8]; + SelectVOP3Mods0(N->getOperand(0), Ops[1], Ops[0], Ops[6], Ops[7]); + SelectVOP3Mods(N->getOperand(1), Ops[3], Ops[2]); + SelectVOP3Mods(N->getOperand(2), Ops[5], Ops[4]); return CurDAG->SelectNodeTo(N, Opc, VT, MVT::i1, Ops); } diff --git a/contrib/llvm/lib/Target/R600/AMDGPUISelLowering.cpp b/contrib/llvm/lib/Target/R600/AMDGPUISelLowering.cpp index 2adcdf1c299e..b137053fbbc2 100644 --- a/contrib/llvm/lib/Target/R600/AMDGPUISelLowering.cpp +++ b/contrib/llvm/lib/Target/R600/AMDGPUISelLowering.cpp @@ -141,9 +141,6 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) : setOperationAction(ISD::STORE, MVT::v2f32, Promote); AddPromotedToType(ISD::STORE, MVT::v2f32, MVT::v2i32); - setOperationAction(ISD::STORE, MVT::i64, Promote); - AddPromotedToType(ISD::STORE, MVT::i64, MVT::v2i32); - setOperationAction(ISD::STORE, MVT::v4f32, Promote); AddPromotedToType(ISD::STORE, MVT::v4f32, MVT::v4i32); @@ -162,9 +159,6 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) : // Custom lowering of vector stores is required for local address space // stores. setOperationAction(ISD::STORE, MVT::v4i32, Custom); - // XXX: Native v2i32 local address space stores are possible, but not - // currently implemented. - setOperationAction(ISD::STORE, MVT::v2i32, Custom); setTruncStoreAction(MVT::v2i32, MVT::v2i16, Custom); setTruncStoreAction(MVT::v2i32, MVT::v2i8, Custom); @@ -832,11 +826,9 @@ SDValue AMDGPUTargetLowering::LowerGlobalAddress(AMDGPUMachineFunction* MFI, SDValue AMDGPUTargetLowering::LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const { SmallVector Args; - SDValue A = Op.getOperand(0); - SDValue B = Op.getOperand(1); - DAG.ExtractVectorElements(A, Args); - DAG.ExtractVectorElements(B, Args); + for (const SDUse &U : Op->ops()) + DAG.ExtractVectorElements(U.get(), Args); return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(Op), Op.getValueType(), Args); } @@ -881,9 +873,6 @@ SDValue AMDGPUTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, return LowerIntrinsicIABS(Op, DAG); case AMDGPUIntrinsic::AMDGPU_lrp: return LowerIntrinsicLRP(Op, DAG); - case AMDGPUIntrinsic::AMDGPU_fract: - case AMDGPUIntrinsic::AMDIL_fraction: // Legacy name. - return DAG.getNode(AMDGPUISD::FRACT, DL, VT, Op.getOperand(1)); case AMDGPUIntrinsic::AMDGPU_clamp: case AMDGPUIntrinsic::AMDIL_clamp: // Legacy name. @@ -913,10 +902,9 @@ SDValue AMDGPUTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, } case Intrinsic::AMDGPU_div_fmas: - // FIXME: Dropping bool parameter. Work is needed to support the implicit - // read from VCC. return DAG.getNode(AMDGPUISD::DIV_FMAS, DL, VT, - Op.getOperand(1), Op.getOperand(2), Op.getOperand(3)); + Op.getOperand(1), Op.getOperand(2), Op.getOperand(3), + Op.getOperand(4)); case Intrinsic::AMDGPU_div_fixup: return DAG.getNode(AMDGPUISD::DIV_FIXUP, DL, VT, diff --git a/contrib/llvm/lib/Target/R600/AMDGPUInstrInfo.h b/contrib/llvm/lib/Target/R600/AMDGPUInstrInfo.h index e28ce0f03acc..202183c18a8d 100644 --- a/contrib/llvm/lib/Target/R600/AMDGPUInstrInfo.h +++ b/contrib/llvm/lib/Target/R600/AMDGPUInstrInfo.h @@ -140,6 +140,12 @@ class AMDGPUInstrInfo : public AMDGPUGenInstrInfo { /// not exist. If Opcode is not a pseudo instruction, this is identity. int pseudoToMCOpcode(int Opcode) const; + /// \brief Return the descriptor of the target-specific machine instruction + /// that corresponds to the specified pseudo or native opcode. + const MCInstrDesc &getMCOpcodeFromPseudo(unsigned Opcode) const { + return get(pseudoToMCOpcode(Opcode)); + } + //===---------------------------------------------------------------------===// // Pure virtual funtions to be implemented by sub-classes. //===---------------------------------------------------------------------===// diff --git a/contrib/llvm/lib/Target/R600/AMDGPUInstrInfo.td b/contrib/llvm/lib/Target/R600/AMDGPUInstrInfo.td index 0e34392bd50d..d657ad05c8c4 100644 --- a/contrib/llvm/lib/Target/R600/AMDGPUInstrInfo.td +++ b/contrib/llvm/lib/Target/R600/AMDGPUInstrInfo.td @@ -35,6 +35,11 @@ def AMDGPUDivScaleOp : SDTypeProfile<2, 3, [SDTCisFP<0>, SDTCisInt<1>, SDTCisSameAs<0, 2>, SDTCisSameAs<0, 3>, SDTCisSameAs<0, 4>] >; +// float, float, float, vcc +def AMDGPUFmasOp : SDTypeProfile<1, 4, + [SDTCisFP<0>, SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisSameAs<0, 3>, SDTCisInt<4>] +>; + //===----------------------------------------------------------------------===// // AMDGPU DAG Nodes // @@ -153,7 +158,7 @@ def AMDGPUdiv_scale : SDNode<"AMDGPUISD::DIV_SCALE", AMDGPUDivScaleOp>; // Special case divide FMA with scale and flags (src0 = Quotient, // src1 = Denominator, src2 = Numerator). -def AMDGPUdiv_fmas : SDNode<"AMDGPUISD::DIV_FMAS", SDTFPTernaryOp>; +def AMDGPUdiv_fmas : SDNode<"AMDGPUISD::DIV_FMAS", AMDGPUFmasOp>; // Single or double precision division fixup. // Special case divide fixup and flags(src0 = Quotient, src1 = diff --git a/contrib/llvm/lib/Target/R600/AMDGPUInstructions.td b/contrib/llvm/lib/Target/R600/AMDGPUInstructions.td index 4e536c37b0bd..34b1fc8b5f47 100644 --- a/contrib/llvm/lib/Target/R600/AMDGPUInstructions.td +++ b/contrib/llvm/lib/Target/R600/AMDGPUInstructions.td @@ -164,10 +164,6 @@ class PrivateStore : PrivateMemOp < (ops node:$value, node:$ptr), (op node:$value, node:$ptr) >; -def extloadi8_private : PrivateLoad ; -def sextloadi8_private : PrivateLoad ; -def extloadi16_private : PrivateLoad ; -def sextloadi16_private : PrivateLoad ; def load_private : PrivateLoad ; def truncstorei8_private : PrivateStore ; @@ -231,6 +227,9 @@ def sextloadi8_local : PatFrag<(ops node:$ptr), (sextloadi8 node:$ptr), [{ return isLocalLoad(dyn_cast(N)); }]>; +def extloadi8_private : PrivateLoad ; +def sextloadi8_private : PrivateLoad ; + def az_extloadi16 : PatFrag<(ops node:$ptr), (az_extload node:$ptr), [{ return cast(N)->getMemoryVT() == MVT::i16; }]>; @@ -267,6 +266,9 @@ def sextloadi16_local : PatFrag<(ops node:$ptr), (sextloadi16 node:$ptr), [{ return isLocalLoad(dyn_cast(N)); }]>; +def extloadi16_private : PrivateLoad ; +def sextloadi16_private : PrivateLoad ; + def az_extloadi32 : PatFrag<(ops node:$ptr), (az_extload node:$ptr), [{ return cast(N)->getMemoryVT() == MVT::i32; }]>; @@ -649,17 +651,10 @@ class RcpPat : Pat < (RcpInst $src) >; -multiclass RsqPat { - def : Pat < - (fdiv FP_ONE, (fsqrt vt:$src)), - (RsqInst $src) - >; - - def : Pat < - (AMDGPUrcp (fsqrt vt:$src)), - (RsqInst $src) - >; -} +class RsqPat : Pat < + (AMDGPUrcp (fsqrt vt:$src)), + (RsqInst $src) +>; include "R600Instructions.td" include "R700Instructions.td" diff --git a/contrib/llvm/lib/Target/R600/AMDGPUIntrinsics.td b/contrib/llvm/lib/Target/R600/AMDGPUIntrinsics.td index eee9c29038d0..ab489cd2a4ab 100644 --- a/contrib/llvm/lib/Target/R600/AMDGPUIntrinsics.td +++ b/contrib/llvm/lib/Target/R600/AMDGPUIntrinsics.td @@ -68,6 +68,7 @@ let TargetPrefix = "AMDGPU", isTarget = 1 in { def int_AMDGPU_bfe_u32 : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; def int_AMDGPU_bfm : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>; def int_AMDGPU_brev : Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>; + def int_AMDGPU_flbit_i32 : Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>; def int_AMDGPU_barrier_local : Intrinsic<[], [], []>; def int_AMDGPU_barrier_global : Intrinsic<[], [], []>; } diff --git a/contrib/llvm/lib/Target/R600/AMDGPUSubtarget.cpp b/contrib/llvm/lib/Target/R600/AMDGPUSubtarget.cpp index b1c7498fc142..87cdb5f8db83 100644 --- a/contrib/llvm/lib/Target/R600/AMDGPUSubtarget.cpp +++ b/contrib/llvm/lib/Target/R600/AMDGPUSubtarget.cpp @@ -80,7 +80,7 @@ AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef GPU, StringRef FS, FlatAddressSpace(false), EnableIRStructurizer(true), EnablePromoteAlloca(false), EnableIfCvt(true), EnableLoadStoreOpt(false), WavefrontSize(0), CFALUBug(false), LocalMemorySize(0), - EnableVGPRSpilling(false), + EnableVGPRSpilling(false),SGPRInitBug(false), DL(computeDataLayout(initializeSubtargetDependencies(GPU, FS))), FrameLowering(TargetFrameLowering::StackGrowsUp, 64 * 16, // Maximum stack alignment (long16) diff --git a/contrib/llvm/lib/Target/R600/AMDGPUSubtarget.h b/contrib/llvm/lib/Target/R600/AMDGPUSubtarget.h index 566b45c1dccc..eeb41d3ec7f4 100644 --- a/contrib/llvm/lib/Target/R600/AMDGPUSubtarget.h +++ b/contrib/llvm/lib/Target/R600/AMDGPUSubtarget.h @@ -45,6 +45,10 @@ class AMDGPUSubtarget : public AMDGPUGenSubtargetInfo { VOLCANIC_ISLANDS, }; + enum { + FIXED_SGPR_COUNT_FOR_INIT_BUG = 80 + }; + private: std::string DevName; bool Is64bit; @@ -66,6 +70,7 @@ class AMDGPUSubtarget : public AMDGPUGenSubtargetInfo { bool CFALUBug; int LocalMemorySize; bool EnableVGPRSpilling; + bool SGPRInitBug; const DataLayout DL; AMDGPUFrameLowering FrameLowering; @@ -203,6 +208,10 @@ class AMDGPUSubtarget : public AMDGPUGenSubtargetInfo { return LocalMemorySize; } + bool hasSGPRInitBug() const { + return SGPRInitBug; + } + unsigned getAmdKernelCodeChipID() const; bool enableMachineScheduler() const override { diff --git a/contrib/llvm/lib/Target/R600/CaymanInstructions.td b/contrib/llvm/lib/Target/R600/CaymanInstructions.td index 58b5ce24b4a3..433c3fc01855 100644 --- a/contrib/llvm/lib/Target/R600/CaymanInstructions.td +++ b/contrib/llvm/lib/Target/R600/CaymanInstructions.td @@ -46,7 +46,7 @@ def SIN_cm : SIN_Common<0x8D>; def COS_cm : COS_Common<0x8E>; } // End isVector = 1 -defm : RsqPat; +def : RsqPat; def : POW_Common ; diff --git a/contrib/llvm/lib/Target/R600/EvergreenInstructions.td b/contrib/llvm/lib/Target/R600/EvergreenInstructions.td index f24f76b7fe16..299d1fa14896 100644 --- a/contrib/llvm/lib/Target/R600/EvergreenInstructions.td +++ b/contrib/llvm/lib/Target/R600/EvergreenInstructions.td @@ -69,7 +69,7 @@ def EXP_IEEE_eg : EXP_IEEE_Common<0x81>; def LOG_IEEE_eg : LOG_IEEE_Common<0x83>; def RECIP_CLAMPED_eg : RECIP_CLAMPED_Common<0x84>; def RECIPSQRT_IEEE_eg : RECIPSQRT_IEEE_Common<0x89>; -defm : RsqPat; +def : RsqPat; def SIN_eg : SIN_Common<0x8D>; def COS_eg : COS_Common<0x8E>; diff --git a/contrib/llvm/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp b/contrib/llvm/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp index 8271c6f45fb9..b66ed1000251 100644 --- a/contrib/llvm/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp +++ b/contrib/llvm/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp @@ -291,6 +291,8 @@ void AMDGPUInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, printImmediate64(Op.getImm(), O); else llvm_unreachable("Invalid register class size"); + } else if (Desc.OpInfo[OpNo].OperandType == MCOI::OPERAND_IMMEDIATE) { + printImmediate32(Op.getImm(), O); } else { // We hit this for the immediate instruction bits that don't yet have a // custom printer. diff --git a/contrib/llvm/lib/Target/R600/Processors.td b/contrib/llvm/lib/Target/R600/Processors.td index cff97cdb3beb..e5fef0c1d033 100644 --- a/contrib/llvm/lib/Target/R600/Processors.td +++ b/contrib/llvm/lib/Target/R600/Processors.td @@ -113,8 +113,12 @@ def : ProcessorModel<"mullins", SIQuarterSpeedModel, [FeatureSeaIslands]>; // Volcanic Islands //===----------------------------------------------------------------------===// -def : ProcessorModel<"tonga", SIFullSpeedModel, [FeatureVolcanicIslands]>; +def : ProcessorModel<"tonga", SIQuarterSpeedModel, + [FeatureVolcanicIslands, FeatureSGPRInitBug] +>; -def : ProcessorModel<"iceland", SIQuarterSpeedModel, [FeatureVolcanicIslands]>; +def : ProcessorModel<"iceland", SIQuarterSpeedModel, + [FeatureVolcanicIslands, FeatureSGPRInitBug] +>; def : ProcessorModel<"carrizo", SIQuarterSpeedModel, [FeatureVolcanicIslands]>; diff --git a/contrib/llvm/lib/Target/R600/R600ISelLowering.cpp b/contrib/llvm/lib/Target/R600/R600ISelLowering.cpp index 595f69884544..2e1b0943252d 100644 --- a/contrib/llvm/lib/Target/R600/R600ISelLowering.cpp +++ b/contrib/llvm/lib/Target/R600/R600ISelLowering.cpp @@ -838,6 +838,10 @@ SDValue R600TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const case Intrinsic::AMDGPU_rsq: // XXX - I'm assuming SI's RSQ_LEGACY matches R600's behavior. return DAG.getNode(AMDGPUISD::RSQ_LEGACY, DL, VT, Op.getOperand(1)); + + case AMDGPUIntrinsic::AMDGPU_fract: + case AMDGPUIntrinsic::AMDIL_fraction: // Legacy name. + return DAG.getNode(AMDGPUISD::FRACT, DL, VT, Op.getOperand(1)); } // break out of case ISD::INTRINSIC_WO_CHAIN in switch(Op.getOpcode()) break; @@ -1694,7 +1698,7 @@ SDValue R600TargetLowering::LowerFormalArguments( // XXX - I think PartOffset should give you this, but it seems to give the // size of the register which isn't useful. - unsigned ValBase = ArgLocs[In.OrigArgIndex].getLocMemOffset(); + unsigned ValBase = ArgLocs[In.getOrigArgIndex()].getLocMemOffset(); unsigned PartOffset = VA.getLocMemOffset(); unsigned Offset = 36 + VA.getLocMemOffset(); diff --git a/contrib/llvm/lib/Target/R600/R600Instructions.td b/contrib/llvm/lib/Target/R600/R600Instructions.td index b1d3ce276eee..05957d2cf2a1 100644 --- a/contrib/llvm/lib/Target/R600/R600Instructions.td +++ b/contrib/llvm/lib/Target/R600/R600Instructions.td @@ -1193,7 +1193,7 @@ let Predicates = [isR600] in { def TGSI_LIT_Z_r600 : TGSI_LIT_Z_Common; def : Pat<(fsqrt f32:$src), (MUL $src, (RECIPSQRT_CLAMPED_r600 $src))>; - defm : RsqPat; + def : RsqPat; def : FROUNDPat ; diff --git a/contrib/llvm/lib/Target/R600/SIAnnotateControlFlow.cpp b/contrib/llvm/lib/Target/R600/SIAnnotateControlFlow.cpp index c99219dd9074..b8165fb4ab2c 100644 --- a/contrib/llvm/lib/Target/R600/SIAnnotateControlFlow.cpp +++ b/contrib/llvm/lib/Target/R600/SIAnnotateControlFlow.cpp @@ -83,7 +83,7 @@ class SIAnnotateControlFlow : public FunctionPass { void insertElse(BranchInst *Term); - Value *handleLoopCondition(Value *Cond, PHINode *Broken); + Value *handleLoopCondition(Value *Cond, PHINode *Broken, llvm::Loop *L); void handleLoop(BranchInst *Term); @@ -207,8 +207,17 @@ void SIAnnotateControlFlow::insertElse(BranchInst *Term) { } /// \brief Recursively handle the condition leading to a loop -Value *SIAnnotateControlFlow::handleLoopCondition(Value *Cond, PHINode *Broken) { - if (PHINode *Phi = dyn_cast(Cond)) { +Value *SIAnnotateControlFlow::handleLoopCondition(Value *Cond, PHINode *Broken, + llvm::Loop *L) { + + // Only search through PHI nodes which are inside the loop. If we try this + // with PHI nodes that are outside of the loop, we end up inserting new PHI + // nodes outside of the loop which depend on values defined inside the loop. + // This will break the module with + // 'Instruction does not dominate all users!' errors. + PHINode *Phi = nullptr; + if ((Phi = dyn_cast(Cond)) && L->contains(Phi)) { + BasicBlock *Parent = Phi->getParent(); PHINode *NewPhi = PHINode::Create(Int64, 0, "", &Parent->front()); Value *Ret = NewPhi; @@ -223,7 +232,7 @@ Value *SIAnnotateControlFlow::handleLoopCondition(Value *Cond, PHINode *Broken) } Phi->setIncomingValue(i, BoolFalse); - Value *PhiArg = handleLoopCondition(Incoming, Broken); + Value *PhiArg = handleLoopCondition(Incoming, Broken, L); NewPhi->addIncoming(PhiArg, From); } @@ -253,7 +262,12 @@ Value *SIAnnotateControlFlow::handleLoopCondition(Value *Cond, PHINode *Broken) } else if (Instruction *Inst = dyn_cast(Cond)) { BasicBlock *Parent = Inst->getParent(); - TerminatorInst *Insert = Parent->getTerminator(); + Instruction *Insert; + if (L->contains(Inst)) { + Insert = Parent->getTerminator(); + } else { + Insert = L->getHeader()->getFirstNonPHIOrDbgOrLifetime(); + } Value *Args[] = { Cond, Broken }; return CallInst::Create(IfBreak, Args, "", Insert); @@ -265,14 +279,15 @@ Value *SIAnnotateControlFlow::handleLoopCondition(Value *Cond, PHINode *Broken) /// \brief Handle a back edge (loop) void SIAnnotateControlFlow::handleLoop(BranchInst *Term) { + BasicBlock *BB = Term->getParent(); + llvm::Loop *L = LI->getLoopFor(BB); BasicBlock *Target = Term->getSuccessor(1); PHINode *Broken = PHINode::Create(Int64, 0, "", &Target->front()); Value *Cond = Term->getCondition(); Term->setCondition(BoolTrue); - Value *Arg = handleLoopCondition(Cond, Broken); + Value *Arg = handleLoopCondition(Cond, Broken, L); - BasicBlock *BB = Term->getParent(); for (pred_iterator PI = pred_begin(Target), PE = pred_end(Target); PI != PE; ++PI) { diff --git a/contrib/llvm/lib/Target/R600/SIDefines.h b/contrib/llvm/lib/Target/R600/SIDefines.h index 7601794beab8..b54014072bf9 100644 --- a/contrib/llvm/lib/Target/R600/SIDefines.h +++ b/contrib/llvm/lib/Target/R600/SIDefines.h @@ -35,7 +35,8 @@ enum { SMRD = 1 << 16, DS = 1 << 17, MIMG = 1 << 18, - FLAT = 1 << 19 + FLAT = 1 << 19, + WQM = 1 << 20 }; } diff --git a/contrib/llvm/lib/Target/R600/SIFoldOperands.cpp b/contrib/llvm/lib/Target/R600/SIFoldOperands.cpp index d8ffa4f75505..cb24bba24a2f 100644 --- a/contrib/llvm/lib/Target/R600/SIFoldOperands.cpp +++ b/contrib/llvm/lib/Target/R600/SIFoldOperands.cpp @@ -209,7 +209,12 @@ bool SIFoldOperands::runOnMachineFunction(MachineFunction &MF) { APInt Imm; if (FoldingImm) { - const TargetRegisterClass *UseRC = MRI.getRegClass(UseOp.getReg()); + unsigned UseReg = UseOp.getReg(); + const TargetRegisterClass *UseRC + = TargetRegisterInfo::isVirtualRegister(UseReg) ? + MRI.getRegClass(UseReg) : + TRI.getRegClass(UseReg); + Imm = APInt(64, OpToFold.getImm()); // Split 64-bit constants into 32-bits for folding. @@ -228,8 +233,13 @@ bool SIFoldOperands::runOnMachineFunction(MachineFunction &MF) { // In order to fold immediates into copies, we need to change the // copy to a MOV. if (UseMI->getOpcode() == AMDGPU::COPY) { - unsigned MovOp = TII->getMovOpcode( - MRI.getRegClass(UseMI->getOperand(0).getReg())); + unsigned DestReg = UseMI->getOperand(0).getReg(); + const TargetRegisterClass *DestRC + = TargetRegisterInfo::isVirtualRegister(DestReg) ? + MRI.getRegClass(DestReg) : + TRI.getRegClass(DestReg); + + unsigned MovOp = TII->getMovOpcode(DestRC); if (MovOp == AMDGPU::COPY) continue; diff --git a/contrib/llvm/lib/Target/R600/SIISelLowering.cpp b/contrib/llvm/lib/Target/R600/SIISelLowering.cpp index 6b2ea0682a43..32ae605e3f63 100644 --- a/contrib/llvm/lib/Target/R600/SIISelLowering.cpp +++ b/contrib/llvm/lib/Target/R600/SIISelLowering.cpp @@ -89,8 +89,6 @@ SITargetLowering::SITargetLowering(TargetMachine &TM) : setOperationAction(ISD::STORE, MVT::v16i32, Custom); setOperationAction(ISD::STORE, MVT::i1, Custom); - setOperationAction(ISD::STORE, MVT::i32, Custom); - setOperationAction(ISD::STORE, MVT::v2i32, Custom); setOperationAction(ISD::STORE, MVT::v4i32, Custom); setOperationAction(ISD::SELECT, MVT::i64, Custom); @@ -158,8 +156,6 @@ SITargetLowering::SITargetLowering(TargetMachine &TM) : for (MVT VT : MVT::fp_valuetypes()) setLoadExtAction(ISD::EXTLOAD, VT, MVT::f32, Expand); - setTruncStoreAction(MVT::i32, MVT::i8, Custom); - setTruncStoreAction(MVT::i32, MVT::i16, Custom); setTruncStoreAction(MVT::f64, MVT::f32, Expand); setTruncStoreAction(MVT::i64, MVT::i32, Expand); setTruncStoreAction(MVT::v8i32, MVT::v8i16, Expand); @@ -214,6 +210,7 @@ SITargetLowering::SITargetLowering(TargetMachine &TM) : } setOperationAction(ISD::FDIV, MVT::f32, Custom); + setOperationAction(ISD::FDIV, MVT::f64, Custom); setTargetDAGCombine(ISD::FADD); setTargetDAGCombine(ISD::FSUB); @@ -314,9 +311,8 @@ bool SITargetLowering::allowsMisalignedMemoryAccesses(EVT VT, if (!VT.isSimple() || VT == MVT::Other) return false; - // XXX - CI changes say "Support for unaligned memory accesses" but I don't - // see what for specifically. The wording everywhere else seems to be the - // same. + // TODO - CI+ supports unaligned memory accesses, but this requires driver + // support. // XXX - The only mention I see of this in the ISA manual is for LDS direct // reads the "byte address and must be dword aligned". Is it also true for the @@ -328,12 +324,18 @@ bool SITargetLowering::allowsMisalignedMemoryAccesses(EVT VT, return Align % 4 == 0; } + // Smaller than dword value must be aligned. + // FIXME: This should be allowed on CI+ + if (VT.bitsLT(MVT::i32)) + return false; + // 8.1.6 - For Dword or larger reads or writes, the two LSBs of the // byte-address are ignored, thus forcing Dword alignment. // This applies to private, global, and constant memory. if (IsFast) *IsFast = true; - return VT.bitsGT(MVT::i32); + + return VT.bitsGT(MVT::i32) && Align % 4 == 0; } EVT SITargetLowering::getOptimalMemOpType(uint64_t Size, unsigned DstAlign, @@ -448,7 +450,7 @@ SDValue SITargetLowering::LowerFormalArguments( // We REALLY want the ORIGINAL number of vertex elements here, e.g. a // three or five element vertex only needs three or five registers, // NOT four or eigth. - Type *ParamType = FType->getParamType(Arg.OrigArgIndex); + Type *ParamType = FType->getParamType(Arg.getOrigArgIndex()); unsigned NumElements = ParamType->getVectorNumElements(); for (unsigned j = 0; j != NumElements; ++j) { @@ -531,7 +533,7 @@ SDValue SITargetLowering::LowerFormalArguments( Offset, Ins[i].Flags.isSExt()); const PointerType *ParamTy = - dyn_cast(FType->getParamType(Ins[i].OrigArgIndex)); + dyn_cast(FType->getParamType(Ins[i].getOrigArgIndex())); if (Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS && ParamTy && ParamTy->getAddressSpace() == AMDGPUAS::LOCAL_ADDRESS) { // On SI local pointers are just offsets into LDS, so they are always @@ -566,7 +568,7 @@ SDValue SITargetLowering::LowerFormalArguments( if (Arg.VT.isVector()) { // Build a vector from the registers - Type *ParamType = FType->getParamType(Arg.OrigArgIndex); + Type *ParamType = FType->getParamType(Arg.getOrigArgIndex()); unsigned NumElements = ParamType->getVectorNumElements(); SmallVector Regs; @@ -919,6 +921,12 @@ SDValue SITargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, Op.getOperand(1), Op.getOperand(2), Op.getOperand(3)); + + case AMDGPUIntrinsic::AMDGPU_fract: + case AMDGPUIntrinsic::AMDIL_fraction: // Legacy name. + return DAG.getNode(ISD::FSUB, DL, VT, Op.getOperand(1), + DAG.getNode(ISD::FFLOOR, DL, VT, Op.getOperand(1))); + default: return AMDGPUTargetLowering::LowerOperation(Op, DAG); } @@ -1104,7 +1112,70 @@ SDValue SITargetLowering::LowerFDIV32(SDValue Op, SelectionDAG &DAG) const { } SDValue SITargetLowering::LowerFDIV64(SDValue Op, SelectionDAG &DAG) const { - return SDValue(); + if (DAG.getTarget().Options.UnsafeFPMath) + return LowerFastFDIV(Op, DAG); + + SDLoc SL(Op); + SDValue X = Op.getOperand(0); + SDValue Y = Op.getOperand(1); + + const SDValue One = DAG.getConstantFP(1.0, MVT::f64); + + SDVTList ScaleVT = DAG.getVTList(MVT::f64, MVT::i1); + + SDValue DivScale0 = DAG.getNode(AMDGPUISD::DIV_SCALE, SL, ScaleVT, Y, Y, X); + + SDValue NegDivScale0 = DAG.getNode(ISD::FNEG, SL, MVT::f64, DivScale0); + + SDValue Rcp = DAG.getNode(AMDGPUISD::RCP, SL, MVT::f64, DivScale0); + + SDValue Fma0 = DAG.getNode(ISD::FMA, SL, MVT::f64, NegDivScale0, Rcp, One); + + SDValue Fma1 = DAG.getNode(ISD::FMA, SL, MVT::f64, Rcp, Fma0, Rcp); + + SDValue Fma2 = DAG.getNode(ISD::FMA, SL, MVT::f64, NegDivScale0, Fma1, One); + + SDValue DivScale1 = DAG.getNode(AMDGPUISD::DIV_SCALE, SL, ScaleVT, X, Y, X); + + SDValue Fma3 = DAG.getNode(ISD::FMA, SL, MVT::f64, Fma1, Fma2, Fma1); + SDValue Mul = DAG.getNode(ISD::FMUL, SL, MVT::f64, DivScale1, Fma3); + + SDValue Fma4 = DAG.getNode(ISD::FMA, SL, MVT::f64, + NegDivScale0, Mul, DivScale1); + + SDValue Scale; + + if (Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS) { + // Workaround a hardware bug on SI where the condition output from div_scale + // is not usable. + + const SDValue Hi = DAG.getConstant(1, MVT::i32); + + // Figure out if the scale to use for div_fmas. + SDValue NumBC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, X); + SDValue DenBC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Y); + SDValue Scale0BC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, DivScale0); + SDValue Scale1BC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, DivScale1); + + SDValue NumHi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, NumBC, Hi); + SDValue DenHi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, DenBC, Hi); + + SDValue Scale0Hi + = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Scale0BC, Hi); + SDValue Scale1Hi + = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Scale1BC, Hi); + + SDValue CmpDen = DAG.getSetCC(SL, MVT::i1, DenHi, Scale0Hi, ISD::SETEQ); + SDValue CmpNum = DAG.getSetCC(SL, MVT::i1, NumHi, Scale1Hi, ISD::SETEQ); + Scale = DAG.getNode(ISD::XOR, SL, MVT::i1, CmpNum, CmpDen); + } else { + Scale = DivScale1.getValue(1); + } + + SDValue Fmas = DAG.getNode(AMDGPUISD::DIV_FMAS, SL, MVT::f64, + Fma4, Fma3, Mul, Scale); + + return DAG.getNode(AMDGPUISD::DIV_FIXUP, SL, MVT::f64, Fmas, Y, X); } SDValue SITargetLowering::LowerFDIV(SDValue Op, SelectionDAG &DAG) const { @@ -1125,11 +1196,6 @@ SDValue SITargetLowering::LowerSTORE(SDValue Op, SelectionDAG &DAG) const { EVT VT = Store->getMemoryVT(); // These stores are legal. - if (Store->getAddressSpace() == AMDGPUAS::LOCAL_ADDRESS && - VT.isVector() && VT.getVectorNumElements() == 2 && - VT.getVectorElementType() == MVT::i32) - return SDValue(); - if (Store->getAddressSpace() == AMDGPUAS::PRIVATE_ADDRESS) { if (VT.isVector() && VT.getVectorNumElements() > 4) return ScalarizeVectorStore(Op, DAG); @@ -1524,6 +1590,7 @@ SDValue SITargetLowering::PerformDAGCombine(SDNode *N, case AMDGPUISD::UMAX: case AMDGPUISD::UMIN: { if (DCI.getDAGCombineLevel() >= AfterLegalizeDAG && + N->getValueType(0) != MVT::f64 && getTargetMachine().getOptLevel() > CodeGenOpt::None) return performMin3Max3Combine(N, DCI); break; diff --git a/contrib/llvm/lib/Target/R600/SIInsertWaits.cpp b/contrib/llvm/lib/Target/R600/SIInsertWaits.cpp index 181b11643bf3..50f20ac3619e 100644 --- a/contrib/llvm/lib/Target/R600/SIInsertWaits.cpp +++ b/contrib/llvm/lib/Target/R600/SIInsertWaits.cpp @@ -82,6 +82,8 @@ class SIInsertWaits : public MachineFunctionPass { /// \brief Type of the last opcode. InstType LastOpcodeType; + bool LastInstWritesM0; + /// \brief Get increment/decrement amount for this instruction. Counters getHwCounts(MachineInstr &MI); @@ -106,6 +108,9 @@ class SIInsertWaits : public MachineFunctionPass { /// \brief Resolve all operand dependencies to counter requirements Counters handleOperands(MachineInstr &MI); + /// \brief Insert S_NOP between an instruction writing M0 and S_SENDMSG. + void handleSendMsg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I); + public: SIInsertWaits(TargetMachine &tm) : MachineFunctionPass(ID), @@ -269,6 +274,7 @@ void SIInsertWaits::pushInstruction(MachineBasicBlock &MBB, // Insert a NOP to break the clause. BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::S_NOP)) .addImm(0); + LastInstWritesM0 = false; } if (TII->isSMRD(I->getOpcode())) @@ -362,6 +368,7 @@ bool SIInsertWaits::insertWait(MachineBasicBlock &MBB, ((Counts.Named.LGKM & 0x7) << 8)); LastOpcodeType = OTHER; + LastInstWritesM0 = false; return true; } @@ -403,6 +410,30 @@ Counters SIInsertWaits::handleOperands(MachineInstr &MI) { return Result; } +void SIInsertWaits::handleSendMsg(MachineBasicBlock &MBB, + MachineBasicBlock::iterator I) { + if (TRI->ST.getGeneration() < AMDGPUSubtarget::VOLCANIC_ISLANDS) + return; + + // There must be "S_NOP 0" between an instruction writing M0 and S_SENDMSG. + if (LastInstWritesM0 && I->getOpcode() == AMDGPU::S_SENDMSG) { + BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::S_NOP)).addImm(0); + LastInstWritesM0 = false; + return; + } + + // Set whether this instruction sets M0 + LastInstWritesM0 = false; + + unsigned NumOperands = I->getNumOperands(); + for (unsigned i = 0; i < NumOperands; i++) { + const MachineOperand &Op = I->getOperand(i); + + if (Op.isReg() && Op.isDef() && Op.getReg() == AMDGPU::M0) + LastInstWritesM0 = true; + } +} + // FIXME: Insert waits listed in Table 4.2 "Required User-Inserted Wait States" // around other non-memory instructions. bool SIInsertWaits::runOnMachineFunction(MachineFunction &MF) { @@ -417,6 +448,7 @@ bool SIInsertWaits::runOnMachineFunction(MachineFunction &MF) { WaitedOn = ZeroCounts; LastIssued = ZeroCounts; LastOpcodeType = OTHER; + LastInstWritesM0 = false; memset(&UsedRegs, 0, sizeof(UsedRegs)); memset(&DefinedRegs, 0, sizeof(DefinedRegs)); @@ -433,7 +465,9 @@ bool SIInsertWaits::runOnMachineFunction(MachineFunction &MF) { Changes |= insertWait(MBB, I, LastIssued); else Changes |= insertWait(MBB, I, handleOperands(*I)); + pushInstruction(MBB, I); + handleSendMsg(MBB, I); } // Wait for everything at the end of the MBB diff --git a/contrib/llvm/lib/Target/R600/SIInstrFormats.td b/contrib/llvm/lib/Target/R600/SIInstrFormats.td index 09c0cbe8f5c3..b825208c92be 100644 --- a/contrib/llvm/lib/Target/R600/SIInstrFormats.td +++ b/contrib/llvm/lib/Target/R600/SIInstrFormats.td @@ -38,6 +38,7 @@ class InstSI pattern> : field bits<1> DS = 0; field bits<1> MIMG = 0; field bits<1> FLAT = 0; + field bits<1> WQM = 0; // These need to be kept in sync with the enum in SIInstrFlags. let TSFlags{0} = VM_CNT; @@ -64,6 +65,7 @@ class InstSI pattern> : let TSFlags{17} = DS; let TSFlags{18} = MIMG; let TSFlags{19} = FLAT; + let TSFlags{20} = WQM; // Most instructions require adjustments after selection to satisfy // operand requirements. @@ -295,18 +297,32 @@ class VOP1e op> : Enc32 { } class VOP2e op> : Enc32 { + bits<8> vdst; + bits<9> src0; + bits<8> src1; - bits<8> VDST; - bits<9> SRC0; - bits<8> VSRC1; - - let Inst{8-0} = SRC0; - let Inst{16-9} = VSRC1; - let Inst{24-17} = VDST; + let Inst{8-0} = src0; + let Inst{16-9} = src1; + let Inst{24-17} = vdst; let Inst{30-25} = op; let Inst{31} = 0x0; //encoding } +class VOP2_MADKe op> : Enc64 { + + bits<8> vdst; + bits<9> src0; + bits<8> vsrc1; + bits<32> src2; + + let Inst{8-0} = src0; + let Inst{16-9} = vsrc1; + let Inst{24-17} = vdst; + let Inst{30-25} = op; + let Inst{31} = 0x0; // encoding + let Inst{63-32} = src2; +} + class VOP3e op> : Enc64 { bits<8> dst; @@ -554,9 +570,6 @@ class VOP1 op, dag outs, dag ins, string asm, list pattern> : class VOP2 op, dag outs, dag ins, string asm, list pattern> : VOP2Common , VOP2e; -class VOP3b op, dag outs, dag ins, string asm, list pattern> : - VOP3Common , VOP3be; - class VOPC op, dag ins, string asm, list pattern> : VOPCCommon , VOPCe ; @@ -585,9 +598,6 @@ class DS pattern> : let SchedRW = [WriteLDS]; } -class DS_si op, dag outs, dag ins, string asm, list pattern> : - DS , DSe; - class MUBUF pattern> : InstSI { diff --git a/contrib/llvm/lib/Target/R600/SIInstrInfo.cpp b/contrib/llvm/lib/Target/R600/SIInstrInfo.cpp index 80b560eb65ae..5ab33b491ce3 100644 --- a/contrib/llvm/lib/Target/R600/SIInstrInfo.cpp +++ b/contrib/llvm/lib/Target/R600/SIInstrInfo.cpp @@ -121,12 +121,20 @@ bool SIInstrInfo::areLoadsFromSameBasePtr(SDNode *Load0, SDNode *Load1, if (Load0->getOperand(0) != Load1->getOperand(0)) return false; + const ConstantSDNode *Load0Offset = + dyn_cast(Load0->getOperand(1)); + const ConstantSDNode *Load1Offset = + dyn_cast(Load1->getOperand(1)); + + if (!Load0Offset || !Load1Offset) + return false; + // Check chain. if (findChainOperand(Load0) != findChainOperand(Load1)) return false; - Offset0 = cast(Load0->getOperand(1))->getZExtValue(); - Offset1 = cast(Load1->getOperand(1))->getZExtValue(); + Offset0 = Load0Offset->getZExtValue(); + Offset1 = Load1Offset->getZExtValue(); return true; } @@ -333,6 +341,21 @@ SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB, return; } else if (AMDGPU::SReg_64RegClass.contains(DestReg)) { + if (DestReg == AMDGPU::VCC) { + if (AMDGPU::SReg_64RegClass.contains(SrcReg)) { + BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B64), AMDGPU::VCC) + .addReg(SrcReg, getKillRegState(KillSrc)); + } else { + // FIXME: Hack until VReg_1 removed. + assert(AMDGPU::VGPR_32RegClass.contains(SrcReg)); + BuildMI(MBB, MI, DL, get(AMDGPU::V_CMP_NE_I32_e32), AMDGPU::VCC) + .addImm(0) + .addReg(SrcReg, getKillRegState(KillSrc)); + } + + return; + } + assert(AMDGPU::SReg_64RegClass.contains(SrcReg)); BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B64), DestReg) .addReg(SrcReg, getKillRegState(KillSrc)); @@ -408,11 +431,15 @@ unsigned SIInstrInfo::commuteOpcode(unsigned Opcode) const { int NewOpc; // Try to map original to commuted opcode - if ((NewOpc = AMDGPU::getCommuteRev(Opcode)) != -1) + NewOpc = AMDGPU::getCommuteRev(Opcode); + // Check if the commuted (REV) opcode exists on the target. + if (NewOpc != -1 && pseudoToMCOpcode(NewOpc) != -1) return NewOpc; // Try to map commuted to original opcode - if ((NewOpc = AMDGPU::getCommuteOrig(Opcode)) != -1) + NewOpc = AMDGPU::getCommuteOrig(Opcode); + // Check if the original (non-REV) opcode exists on the target. + if (NewOpc != -1 && pseudoToMCOpcode(NewOpc) != -1) return NewOpc; return Opcode; @@ -1121,6 +1148,8 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr *MI, return false; } + int RegClass = Desc.OpInfo[i].RegClass; + switch (Desc.OpInfo[i].OperandType) { case MCOI::OPERAND_REGISTER: if (MI->getOperand(i).isImm() || MI->getOperand(i).isFPImm()) { @@ -1131,7 +1160,7 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr *MI, case AMDGPU::OPERAND_REG_IMM32: break; case AMDGPU::OPERAND_REG_INLINE_C: - if (MI->getOperand(i).isImm() && !isInlineConstant(MI->getOperand(i))) { + if (isLiteralConstant(MI->getOperand(i))) { ErrInfo = "Illegal immediate value for operand."; return false; } @@ -1152,7 +1181,6 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr *MI, if (!MI->getOperand(i).isReg()) continue; - int RegClass = Desc.OpInfo[i].RegClass; if (RegClass != -1) { unsigned Reg = MI->getOperand(i).getReg(); if (TargetRegisterInfo::isVirtualRegister(Reg)) @@ -1197,31 +1225,6 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr *MI, } } - // Verify SRC1 for VOP2 and VOPC - if (Src1Idx != -1 && (isVOP2(Opcode) || isVOPC(Opcode))) { - const MachineOperand &Src1 = MI->getOperand(Src1Idx); - if (Src1.isImm()) { - ErrInfo = "VOP[2C] src1 cannot be an immediate."; - return false; - } - } - - // Verify VOP3 - if (isVOP3(Opcode)) { - if (Src0Idx != -1 && isLiteralConstant(MI->getOperand(Src0Idx))) { - ErrInfo = "VOP3 src0 cannot be a literal constant."; - return false; - } - if (Src1Idx != -1 && isLiteralConstant(MI->getOperand(Src1Idx))) { - ErrInfo = "VOP3 src1 cannot be a literal constant."; - return false; - } - if (Src2Idx != -1 && isLiteralConstant(MI->getOperand(Src2Idx))) { - ErrInfo = "VOP3 src2 cannot be a literal constant."; - return false; - } - } - // Verify misc. restrictions on specific instructions. if (Desc.getOpcode() == AMDGPU::V_DIV_SCALE_F32 || Desc.getOpcode() == AMDGPU::V_DIV_SCALE_F64) { @@ -1292,6 +1295,7 @@ unsigned SIInstrInfo::getVALUOp(const MachineInstr &MI) { case AMDGPU::S_BCNT1_I32_B32: return AMDGPU::V_BCNT_U32_B32_e64; case AMDGPU::S_FF1_I32_B32: return AMDGPU::V_FFBL_B32_e32; case AMDGPU::S_FLBIT_I32_B32: return AMDGPU::V_FFBH_U32_e32; + case AMDGPU::S_FLBIT_I32: return AMDGPU::V_FFBH_I32_e64; } } @@ -2043,6 +2047,24 @@ void SIInstrInfo::moveToVALU(MachineInstr &TopInst) const { swapOperands(Inst); } break; + case AMDGPU::S_LSHL_B64: + if (ST.getGeneration() >= AMDGPUSubtarget::VOLCANIC_ISLANDS) { + NewOpcode = AMDGPU::V_LSHLREV_B64; + swapOperands(Inst); + } + break; + case AMDGPU::S_ASHR_I64: + if (ST.getGeneration() >= AMDGPUSubtarget::VOLCANIC_ISLANDS) { + NewOpcode = AMDGPU::V_ASHRREV_I64; + swapOperands(Inst); + } + break; + case AMDGPU::S_LSHR_B64: + if (ST.getGeneration() >= AMDGPUSubtarget::VOLCANIC_ISLANDS) { + NewOpcode = AMDGPU::V_LSHRREV_B64; + swapOperands(Inst); + } + break; case AMDGPU::S_BFE_U64: case AMDGPU::S_BFM_B64: diff --git a/contrib/llvm/lib/Target/R600/SIInstrInfo.h b/contrib/llvm/lib/Target/R600/SIInstrInfo.h index 28cd27dd8962..129803072672 100644 --- a/contrib/llvm/lib/Target/R600/SIInstrInfo.h +++ b/contrib/llvm/lib/Target/R600/SIInstrInfo.h @@ -204,6 +204,10 @@ class SIInstrInfo : public AMDGPUInstrInfo { return get(Opcode).TSFlags & SIInstrFlags::FLAT; } + bool isWQM(uint16_t Opcode) const { + return get(Opcode).TSFlags & SIInstrFlags::WQM; + } + bool isInlineConstant(const APInt &Imm) const; bool isInlineConstant(const MachineOperand &MO) const; bool isLiteralConstant(const MachineOperand &MO) const; @@ -243,7 +247,27 @@ class SIInstrInfo : public AMDGPUInstrInfo { /// the register class of its machine operand. /// to infer the correct register class base on the other operands. const TargetRegisterClass *getOpRegClass(const MachineInstr &MI, - unsigned OpNo) const;\ + unsigned OpNo) const; + + /// \brief Return the size in bytes of the operand OpNo on the given + // instruction opcode. + unsigned getOpSize(uint16_t Opcode, unsigned OpNo) const { + const MCOperandInfo &OpInfo = get(Opcode).OpInfo[OpNo]; + + if (OpInfo.RegClass == -1) { + // If this is an immediate operand, this must be a 32-bit literal. + assert(OpInfo.OperandType == MCOI::OPERAND_IMMEDIATE); + return 4; + } + + return RI.getRegClass(OpInfo.RegClass)->getSize(); + } + + /// \brief This form should usually be preferred since it handles operands + /// with unknown register classes. + unsigned getOpSize(const MachineInstr &MI, unsigned OpNo) const { + return getOpRegClass(MI, OpNo)->getSize(); + } /// \returns true if it is legal for the operand at index \p OpNo /// to read a VGPR. diff --git a/contrib/llvm/lib/Target/R600/SIInstrInfo.td b/contrib/llvm/lib/Target/R600/SIInstrInfo.td index 175e11d709cf..a749e7f861bb 100644 --- a/contrib/llvm/lib/Target/R600/SIInstrInfo.td +++ b/contrib/llvm/lib/Target/R600/SIInstrInfo.td @@ -383,15 +383,13 @@ class SOP1_Pseudo pattern> : let isPseudo = 1; } -class SOP1_Real_si pattern> : - SOP1 , +class SOP1_Real_si : + SOP1 , SOP1e , SIMCInstr; -class SOP1_Real_vi pattern> : - SOP1 , +class SOP1_Real_vi : + SOP1 , SOP1e , SIMCInstr; @@ -400,10 +398,10 @@ multiclass SOP1_32 pattern> { pattern>; def _si : SOP1_Real_si ; + opName#" $dst, $src0">; def _vi : SOP1_Real_vi ; + opName#" $dst, $src0">; } multiclass SOP1_64 pattern> { @@ -411,10 +409,10 @@ multiclass SOP1_64 pattern> { pattern>; def _si : SOP1_Real_si ; + opName#" $dst, $src0">; def _vi : SOP1_Real_vi ; + opName#" $dst, $src0">; } // no input, 64-bit output. @@ -422,12 +420,12 @@ multiclass SOP1_64_0 pattern> { def "" : SOP1_Pseudo ; def _si : SOP1_Real_si { + opName#" $dst"> { let SSRC0 = 0; } def _vi : SOP1_Real_vi { + opName#" $dst"> { let SSRC0 = 0; } } @@ -438,10 +436,10 @@ multiclass SOP1_32_64 pattern> { pattern>; def _si : SOP1_Real_si ; + opName#" $dst, $src0">; def _vi : SOP1_Real_vi ; + opName#" $dst, $src0">; } class SOP2_Pseudo pattern> : @@ -451,15 +449,13 @@ class SOP2_Pseudo pattern> : let Size = 4; } -class SOP2_Real_si pattern> : - SOP2, +class SOP2_Real_si : + SOP2, SOP2e, SIMCInstr; -class SOP2_Real_vi pattern> : - SOP2, +class SOP2_Real_vi : + SOP2, SOP2e, SIMCInstr; @@ -469,11 +465,11 @@ multiclass SOP2_SELECT_32 pattern> { def _si : SOP2_Real_si ; + opName#" $dst, $src0, $src1 [$scc]">; def _vi : SOP2_Real_vi ; + opName#" $dst, $src0, $src1 [$scc]">; } multiclass SOP2_32 pattern> { @@ -481,10 +477,10 @@ multiclass SOP2_32 pattern> { (ins SSrc_32:$src0, SSrc_32:$src1), pattern>; def _si : SOP2_Real_si ; + (ins SSrc_32:$src0, SSrc_32:$src1), opName#" $dst, $src0, $src1">; def _vi : SOP2_Real_vi ; + (ins SSrc_32:$src0, SSrc_32:$src1), opName#" $dst, $src0, $src1">; } multiclass SOP2_64 pattern> { @@ -492,10 +488,10 @@ multiclass SOP2_64 pattern> { (ins SSrc_64:$src0, SSrc_64:$src1), pattern>; def _si : SOP2_Real_si ; + (ins SSrc_64:$src0, SSrc_64:$src1), opName#" $dst, $src0, $src1">; def _vi : SOP2_Real_vi ; + (ins SSrc_64:$src0, SSrc_64:$src1), opName#" $dst, $src0, $src1">; } multiclass SOP2_64_32 pattern> { @@ -503,10 +499,10 @@ multiclass SOP2_64_32 pattern> { (ins SSrc_64:$src0, SSrc_32:$src1), pattern>; def _si : SOP2_Real_si ; + (ins SSrc_64:$src0, SSrc_32:$src1), opName#" $dst, $src0, $src1">; def _vi : SOP2_Real_vi ; + (ins SSrc_64:$src0, SSrc_32:$src1), opName#" $dst, $src0, $src1">; } @@ -527,15 +523,13 @@ class SOPK_Pseudo pattern> : let isPseudo = 1; } -class SOPK_Real_si pattern> : - SOPK , +class SOPK_Real_si : + SOPK , SOPKe , SIMCInstr; -class SOPK_Real_vi pattern> : - SOPK , +class SOPK_Real_vi : + SOPK , SOPKe , SIMCInstr; @@ -544,10 +538,10 @@ multiclass SOPK_32 pattern> { pattern>; def _si : SOPK_Real_si ; + opName#" $dst, $src0">; def _vi : SOPK_Real_vi ; + opName#" $dst, $src0">; } multiclass SOPK_SCC pattern> { @@ -555,10 +549,10 @@ multiclass SOPK_SCC pattern> { (ins SReg_32:$src0, u16imm:$src1), pattern>; def _si : SOPK_Real_si ; + (ins SReg_32:$src0, u16imm:$src1), opName#" $dst, $src0">; def _vi : SOPK_Real_vi ; + (ins SReg_32:$src0, u16imm:$src1), opName#" $dst, $src0">; } //===----------------------------------------------------------------------===// @@ -792,6 +786,7 @@ def VOP_F32_F32_I32 : VOPProfile <[f32, f32, i32, untyped]>; def VOP_F64_F64_F64 : VOPProfile <[f64, f64, f64, untyped]>; def VOP_F64_F64_I32 : VOPProfile <[f64, f64, i32, untyped]>; def VOP_I32_F32_F32 : VOPProfile <[i32, f32, f32, untyped]>; +def VOP_I32_F32_I32 : VOPProfile <[i32, f32, i32, untyped]>; def VOP_I32_I32_I32 : VOPProfile <[i32, i32, i32, untyped]>; def VOP_I32_I32_I32_VCC : VOPProfile <[i32, i32, i32, untyped]> { let Src0RC32 = VCSrc_32; @@ -808,9 +803,14 @@ def VOP_I1_F64_I32 : VOPProfile <[i1, f64, i32, untyped]> { } def VOP_I64_I64_I32 : VOPProfile <[i64, i64, i32, untyped]>; +def VOP_I64_I32_I64 : VOPProfile <[i64, i32, i64, untyped]>; def VOP_I64_I64_I64 : VOPProfile <[i64, i64, i64, untyped]>; def VOP_F32_F32_F32_F32 : VOPProfile <[f32, f32, f32, f32]>; +def VOP_MADK : VOPProfile <[f32, f32, f32, f32]> { + field dag Ins = (ins VCSrc_32:$src0, VGPR_32:$vsrc1, u32imm:$src2); + field string Asm = " $dst, $src0, $vsrc1, $src2"; +} def VOP_F64_F64_F64_F64 : VOPProfile <[f64, f64, f64, f64]>; def VOP_I32_I32_I32_I32 : VOPProfile <[i32, i32, i32, i32]>; def VOP_I64_I32_I32_I64 : VOPProfile <[i64, i32, i32, i64]>; @@ -847,6 +847,15 @@ multiclass VOP1_m pattern, SIMCInstr ; } +multiclass VOP1SI_m pattern, + string opName> { + def "" : VOP1_Pseudo ; + + def _si : VOP1, + SIMCInstr ; + // No VI instruction. This class is for SI only. +} + class VOP2_Pseudo pattern, string opName> : VOP2Common , VOP , @@ -855,25 +864,22 @@ class VOP2_Pseudo pattern, string opName> : } multiclass VOP2SI_m pattern, - string opName, string revOpSI> { + string opName, string revOp> { def "" : VOP2_Pseudo , - VOP2_REV; + VOP2_REV; def _si : VOP2 , - VOP2_REV, SIMCInstr ; } multiclass VOP2_m pattern, - string opName, string revOpSI, string revOpVI> { + string opName, string revOp> { def "" : VOP2_Pseudo , - VOP2_REV; + VOP2_REV; def _si : VOP2 , - VOP2_REV, SIMCInstr ; def _vi : VOP2 , - VOP2_REV, SIMCInstr ; } @@ -905,6 +911,16 @@ class VOP3_Real_vi op, dag outs, dag ins, string asm, string opName> : VOP3e_vi , SIMCInstr ; +class VOP3b_Real_si op, dag outs, dag ins, string asm, string opName> : + VOP3Common , + VOP3be , + SIMCInstr; + +class VOP3b_Real_vi op, dag outs, dag ins, string asm, string opName> : + VOP3Common , + VOP3be_vi , + SIMCInstr ; + multiclass VOP3_m pattern, string opName, int NumSrcArgs, bit HasMods = 1> { @@ -946,24 +962,45 @@ multiclass VOP3_1_m ; } +multiclass VOP3SI_1_m pattern, string opName, bit HasMods = 1> { + + def "" : VOP3_Pseudo ; + + def _si : VOP3_Real_si , + VOP3DisableFields<0, 0, HasMods>; + // No VI instruction. This class is for SI only. +} + multiclass VOP3_2_m pattern, string opName, string revOpSI, string revOpVI, + list pattern, string opName, string revOp, bit HasMods = 1, bit UseFullOp = 0> { def "" : VOP3_Pseudo , - VOP2_REV; + VOP2_REV; - def _si : VOP3_Real_si , - VOP2_REV, + def _si : VOP3_Real_si , VOP3DisableFields<1, 0, HasMods>; - def _vi : VOP3_Real_vi , - VOP2_REV, + def _vi : VOP3_Real_vi , VOP3DisableFields<1, 0, HasMods>; } +multiclass VOP3SI_2_m pattern, string opName, string revOp, + bit HasMods = 1, bit UseFullOp = 0> { + + def "" : VOP3_Pseudo , + VOP2_REV; + + def _si : VOP3_Real_si , + VOP3DisableFields<1, 0, HasMods>; + + // No VI instruction. This class is for SI only. +} + +// XXX - Is v_div_scale_{f32|f64} only available in vop3b without +// option of implicit vcc use? multiclass VOP3b_2_m pattern, string opName, string revOp, bit HasMods = 1, bit UseFullOp = 0> { @@ -974,19 +1011,27 @@ multiclass VOP3b_2_m , - VOP3DisableFields<1, 0, HasMods>, - SIMCInstr, - VOP2_REV; + def _si : VOP3b_Real_si , + VOP3DisableFields<1, 0, HasMods>; - // TODO: Do we need this VI variant here? - /*def _vi : VOP3b_vi , - VOP3DisableFields<1, 0, HasMods>, - SIMCInstr, - VOP2_REV;*/ + def _vi : VOP3b_Real_vi , + VOP3DisableFields<1, 0, HasMods>; } // End sdst = SIOperand.VCC, Defs = [VCC] } +multiclass VOP3b_3_m pattern, string opName, string revOp, + bit HasMods = 1, bit UseFullOp = 0> { + def "" : VOP3_Pseudo ; + + + def _si : VOP3b_Real_si , + VOP3DisableFields<1, 1, HasMods>; + + def _vi : VOP3b_Real_vi , + VOP3DisableFields<1, 1, HasMods>; +} + multiclass VOP3_C_m pattern, string opName, bit HasMods, bit defExec> { @@ -1046,33 +1091,30 @@ multiclass VOP1Inst { - def _e32 : VOP1 , - VOP ; + defm _e32 : VOP1SI_m ; - def _e64 : VOP3Common , - VOP , - VOP3e , - VOP3DisableFields<0, 0, P.HasModifiers>; + [(set P.DstVT:$dst, (node P.Src0VT:$src0))]), + opName, P.HasModifiers>; } multiclass VOP2_Helper pat32, dag ins64, string asm64, list pat64, - string revOpSI, string revOpVI, bit HasMods> { - defm _e32 : VOP2_m ; + string revOp, bit HasMods> { + defm _e32 : VOP2_m ; defm _e64 : VOP3_2_m ; } multiclass VOP2Inst : VOP2_Helper < + string revOp = opName> : VOP2_Helper < op, opName, P.Outs, P.Ins32, P.Asm32, [], P.Ins64, P.Asm64, @@ -1082,15 +1124,30 @@ multiclass VOP2Inst ; +multiclass VOP2InstSI { + defm _e32 : VOP2SI_m ; + + defm _e64 : VOP3SI_2_m ; +} + multiclass VOP2b_Helper pat32, dag ins64, string asm64, list pat64, string revOp, bit HasMods> { - defm _e32 : VOP2_m ; + defm _e32 : VOP2_m ; defm _e64 : VOP3b_2_m pat32, dag ins64, string asm64, list pat64, - string revOpSI, string revOpVI, bit HasMods> { - defm _e32 : VOP2SI_m ; + string revOp, bit HasMods> { + defm _e32 : VOP2SI_m ; defm _e64 : VOP3_2_m ; + revOp, HasMods>; } multiclass VOP2_VI3_Inst + string revOp = opName> : VOP2_VI3_Helper < op, opName, P.Outs, P.Ins32, P.Asm32, [], @@ -1136,9 +1193,26 @@ multiclass VOP2_VI3_Inst ; +multiclass VOP2MADK pattern = []> { + + def "" : VOP2_Pseudo ; + +let isCodeGenOnly = 0 in { + def _si : VOP2Common , + SIMCInstr , + VOP2_MADKe ; + + def _vi : VOP2Common , + SIMCInstr , + VOP2_MADKe ; +} // End isCodeGenOnly = 0 +} + class VOPC_Pseudo pattern, string opName> : VOPCCommon , VOP , @@ -1274,9 +1348,31 @@ multiclass VOP3Inst ; +// Special case for v_div_fmas_{f32|f64}, since it seems to be the +// only VOP instruction that implicitly reads VCC. +multiclass VOP3_VCC_Inst : VOP3_Helper < + op, opName, + P.Outs, + (ins InputModsNoDefault:$src0_modifiers, P.Src0RC64:$src0, + InputModsNoDefault:$src1_modifiers, P.Src1RC64:$src1, + InputModsNoDefault:$src2_modifiers, P.Src2RC64:$src2, + ClampMod:$clamp, + omod:$omod), + " $dst, $src0_modifiers, $src1_modifiers, $src2_modifiers"#"$clamp"#"$omod", + [(set P.DstVT:$dst, + (node (P.Src0VT (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers, + i1:$clamp, i32:$omod)), + (P.Src1VT (VOP3Mods P.Src1VT:$src1, i32:$src1_modifiers)), + (P.Src2VT (VOP3Mods P.Src2VT:$src2, i32:$src2_modifiers)), + (i1 VCC)))], + 3, 1 +>; + multiclass VOP3b_Helper pattern> : - VOP3b_2_m < + VOP3b_3_m < op, (outs vrc:$vdst, SReg_64:$sdst), (ins InputModsNoDefault:$src0_modifiers, arc:$src0, InputModsNoDefault:$src1_modifiers, arc:$src1, @@ -1307,22 +1403,21 @@ class Vop3ModPat : Pat< // Interpolation opcodes //===----------------------------------------------------------------------===// -class VINTRP_Pseudo pattern> : - VINTRPCommon , +class VINTRP_Pseudo pattern> : + VINTRPCommon , SIMCInstr { let isPseudo = 1; } class VINTRP_Real_si op, string opName, dag outs, dag ins, - string asm, list pattern> : - VINTRPCommon , + string asm> : + VINTRPCommon , VINTRPe , SIMCInstr; class VINTRP_Real_vi op, string opName, dag outs, dag ins, - string asm, list pattern> : - VINTRPCommon , + string asm> : + VINTRPCommon , VINTRPe_vi , SIMCInstr; @@ -1331,11 +1426,11 @@ multiclass VINTRP_m op, string opName, dag outs, dag ins, string asm, list pattern = []> { let DisableEncoding = disableEncoding, Constraints = constraints in { - def "" : VINTRP_Pseudo ; + def "" : VINTRP_Pseudo ; - def _si : VINTRP_Real_si ; + def _si : VINTRP_Real_si ; - def _vi : VINTRP_Real_vi ; + def _vi : VINTRP_Real_vi ; } } @@ -1467,70 +1562,92 @@ multiclass DS_Store2_Helper op, string asm, RegisterClass regClass> asm#" $addr, $data0, $data1"#"$offset0"#"$offset1 [M0]", []>; -class DS_1A_si op, dag outs, dag ins, string asm, list pat> : - DS_si { - bits<16> offset; +// 1 address, 1 data. +multiclass DS_1A1D_RET_m op, string opName, dag outs, dag ins, + string asm, list pat, string noRetOp> { + let mayLoad = 1, mayStore = 1, + hasPostISelHook = 1 // Adjusted to no return version. + in { + def "" : DS_Pseudo , + AtomicNoRet; - // Single load interpret the 2 i8imm operands as a single i16 offset. - let offset0 = offset{7-0}; - let offset1 = offset{15-8}; - - let hasSideEffects = 0; + let data1 = 0 in { + def _si : DS_1A_Real_si ; + def _vi : DS_1A_Real_vi ; + } + } } -// 1 address, 1 data. -class DS_1A1D_RET op, string asm, RegisterClass rc, string noRetOp = ""> : DS_1A_si < - op, +multiclass DS_1A1D_RET op, string asm, RegisterClass rc, + string noRetOp = ""> : DS_1A1D_RET_m < + op, asm, (outs rc:$vdst), (ins i1imm:$gds, VGPR_32:$addr, rc:$data0, ds_offset:$offset, M0Reg:$m0), - asm#" $vdst, $addr, $data0"#"$offset"#" [M0]", []>, - AtomicNoRet { - - let data1 = 0; - let mayStore = 1; - let mayLoad = 1; - - let hasPostISelHook = 1; // Adjusted to no return version. -} + asm#" $vdst, $addr, $data0"#"$offset"#" [M0]", [], noRetOp>; // 1 address, 2 data. -class DS_1A2D_RET op, string asm, RegisterClass rc, string noRetOp = ""> : DS_1A_si < - op, +multiclass DS_1A2D_RET_m op, string opName, dag outs, dag ins, + string asm, list pat, string noRetOp> { + let mayLoad = 1, mayStore = 1, + hasPostISelHook = 1 // Adjusted to no return version. + in { + def "" : DS_Pseudo , + AtomicNoRet; + + def _si : DS_1A_Real_si ; + def _vi : DS_1A_Real_vi ; + } +} + +multiclass DS_1A2D_RET op, string asm, RegisterClass rc, + string noRetOp = ""> : DS_1A2D_RET_m < + op, asm, (outs rc:$vdst), (ins i1imm:$gds, VGPR_32:$addr, rc:$data0, rc:$data1, ds_offset:$offset, M0Reg:$m0), asm#" $vdst, $addr, $data0, $data1"#"$offset"#" [M0]", - []>, - AtomicNoRet { - let mayStore = 1; - let mayLoad = 1; - let hasPostISelHook = 1; // Adjusted to no return version. -} + [], noRetOp>; // 1 address, 2 data. -class DS_1A2D_NORET op, string asm, RegisterClass rc, string noRetOp = asm> : DS_1A_si < - op, +multiclass DS_1A2D_NORET_m op, string opName, dag outs, dag ins, + string asm, list pat, string noRetOp> { + let mayLoad = 1, mayStore = 1 in { + def "" : DS_Pseudo , + AtomicNoRet; + + def _si : DS_1A_Real_si ; + def _vi : DS_1A_Real_vi ; + } +} + +multiclass DS_1A2D_NORET op, string asm, RegisterClass rc, + string noRetOp = asm> : DS_1A2D_NORET_m < + op, asm, (outs), (ins i1imm:$gds, VGPR_32:$addr, rc:$data0, rc:$data1, ds_offset:$offset, M0Reg:$m0), asm#" $addr, $data0, $data1"#"$offset"#" [M0]", - []>, - AtomicNoRet { - let mayStore = 1; - let mayLoad = 1; -} + [], noRetOp>; // 1 address, 1 data. -class DS_1A1D_NORET op, string asm, RegisterClass rc, string noRetOp = asm> : DS_1A_si < - op, +multiclass DS_1A1D_NORET_m op, string opName, dag outs, dag ins, + string asm, list pat, string noRetOp> { + let mayLoad = 1, mayStore = 1 in { + def "" : DS_Pseudo , + AtomicNoRet; + + let data1 = 0 in { + def _si : DS_1A_Real_si ; + def _vi : DS_1A_Real_vi ; + } + } +} + +multiclass DS_1A1D_NORET op, string asm, RegisterClass rc, + string noRetOp = asm> : DS_1A1D_NORET_m < + op, asm, (outs), (ins i1imm:$gds, VGPR_32:$addr, rc:$data0, ds_offset:$offset, M0Reg:$m0), asm#" $addr, $data0"#"$offset"#" [M0]", - []>, - AtomicNoRet { - - let data1 = 0; - let mayStore = 1; - let mayLoad = 1; -} + [], noRetOp>; //===----------------------------------------------------------------------===// // MTBUF classes @@ -1596,45 +1713,111 @@ multiclass MTBUF_Load_Helper op, string opName, // MUBUF classes //===----------------------------------------------------------------------===// -class MUBUF_si op, dag outs, dag ins, string asm, list pattern> : - MUBUF , MUBUFe { - let lds = 0; -} - -class MUBUF_vi op, dag outs, dag ins, string asm, list pattern> : - MUBUF , MUBUFe_vi { - let lds = 0; +class mubuf si, bits<7> vi = si> { + field bits<7> SI = si; + field bits<7> VI = vi; } class MUBUFAddr64Table { - bit IsAddr64 = is_addr64; string OpName = NAME # suffix; } -class MUBUFAtomicAddr64 op, dag outs, dag ins, string asm, list pattern> - : MUBUF_si { +class MUBUF_Pseudo pattern> : + MUBUF , + SIMCInstr { + let isPseudo = 1; - let offen = 0; - let idxen = 0; - let addr64 = 1; - let tfe = 0; - let lds = 0; - let soffset = 128; + // dummy fields, so that we can use let statements around multiclasses + bits<1> offen; + bits<1> idxen; + bits<8> vaddr; + bits<1> glc; + bits<1> slc; + bits<1> tfe; + bits<8> soffset; } -class MUBUFAtomicOffset op, dag outs, dag ins, string asm, list pattern> - : MUBUF_si { - - let offen = 0; - let idxen = 0; - let addr64 = 0; - let tfe = 0; +class MUBUF_Real_si : + MUBUF , + MUBUFe , + SIMCInstr { let lds = 0; - let vaddr = 0; } -multiclass MUBUF_Atomic op, string name, RegisterClass rc, +class MUBUF_Real_vi : + MUBUF , + MUBUFe_vi , + SIMCInstr { + let lds = 0; +} + +multiclass MUBUF_m pattern> { + + def "" : MUBUF_Pseudo , + MUBUFAddr64Table <0>; + + let addr64 = 0 in { + def _si : MUBUF_Real_si ; + } + + def _vi : MUBUF_Real_vi ; +} + +multiclass MUBUFAddr64_m pattern> { + + def "" : MUBUF_Pseudo , + MUBUFAddr64Table <1>; + + let addr64 = 1 in { + def _si : MUBUF_Real_si ; + } + + // There is no VI version. If the pseudo is selected, it should be lowered + // for VI appropriately. +} + +class MUBUF_si op, dag outs, dag ins, string asm, list pattern> : + MUBUF , MUBUFe { + let lds = 0; +} + +multiclass MUBUFAtomicOffset_m pattern, bit is_return> { + + def "" : MUBUF_Pseudo , + MUBUFAddr64Table <0, !if(is_return, "_RTN", "")>, + AtomicNoRet; + + let offen = 0, idxen = 0, tfe = 0, vaddr = 0 in { + let addr64 = 0 in { + def _si : MUBUF_Real_si ; + } + + def _vi : MUBUF_Real_vi ; + } +} + +multiclass MUBUFAtomicAddr64_m pattern, bit is_return> { + + def "" : MUBUF_Pseudo , + MUBUFAddr64Table <1, !if(is_return, "_RTN", "")>, + AtomicNoRet; + + let offen = 0, idxen = 0, addr64 = 1, tfe = 0, soffset = 128 in { + def _si : MUBUF_Real_si ; + } + + // There is no VI version. If the pseudo is selected, it should be lowered + // for VI appropriately. +} + +multiclass MUBUF_Atomic { let mayStore = 1, mayLoad = 1, hasPostISelHook = 1 in { @@ -1642,208 +1825,135 @@ multiclass MUBUF_Atomic op, string name, RegisterClass rc, // No return variants let glc = 0 in { - def _ADDR64 : MUBUFAtomicAddr64 < - op, (outs), + defm _ADDR64 : MUBUFAtomicAddr64_m < + op, name#"_addr64", (outs), (ins rc:$vdata, SReg_128:$srsrc, VReg_64:$vaddr, mbuf_offset:$offset, slc:$slc), - name#" $vdata, $vaddr, $srsrc, 0 addr64"#"$offset"#"$slc", [] - >, MUBUFAddr64Table<1>, AtomicNoRet; + name#" $vdata, $vaddr, $srsrc, 0 addr64"#"$offset"#"$slc", [], 0 + >; - def _OFFSET : MUBUFAtomicOffset < - op, (outs), + defm _OFFSET : MUBUFAtomicOffset_m < + op, name#"_offset", (outs), (ins rc:$vdata, SReg_128:$srsrc, mbuf_offset:$offset, SCSrc_32:$soffset, slc:$slc), - name#" $vdata, $srsrc, $soffset"#"$offset"#"$slc", [] - >, MUBUFAddr64Table<0>, AtomicNoRet; + name#" $vdata, $srsrc, $soffset"#"$offset"#"$slc", [], 0 + >; } // glc = 0 // Variant that return values let glc = 1, Constraints = "$vdata = $vdata_in", DisableEncoding = "$vdata_in" in { - def _RTN_ADDR64 : MUBUFAtomicAddr64 < - op, (outs rc:$vdata), + defm _RTN_ADDR64 : MUBUFAtomicAddr64_m < + op, name#"_rtn_addr64", (outs rc:$vdata), (ins rc:$vdata_in, SReg_128:$srsrc, VReg_64:$vaddr, mbuf_offset:$offset, slc:$slc), name#" $vdata, $vaddr, $srsrc, 0 addr64"#"$offset"#" glc"#"$slc", [(set vt:$vdata, (atomic (MUBUFAddr64Atomic v4i32:$srsrc, i64:$vaddr, i16:$offset, - i1:$slc), vt:$vdata_in))] - >, MUBUFAddr64Table<1, "_RTN">, AtomicNoRet; + i1:$slc), vt:$vdata_in))], 1 + >; - def _RTN_OFFSET : MUBUFAtomicOffset < - op, (outs rc:$vdata), + defm _RTN_OFFSET : MUBUFAtomicOffset_m < + op, name#"_rtn_offset", (outs rc:$vdata), (ins rc:$vdata_in, SReg_128:$srsrc, mbuf_offset:$offset, SCSrc_32:$soffset, slc:$slc), name#" $vdata, $srsrc, $soffset"#"$offset"#" glc $slc", [(set vt:$vdata, (atomic (MUBUFOffsetAtomic v4i32:$srsrc, i32:$soffset, i16:$offset, - i1:$slc), vt:$vdata_in))] - >, MUBUFAddr64Table<0, "_RTN">, AtomicNoRet; + i1:$slc), vt:$vdata_in))], 1 + >; } // glc = 1 } // mayStore = 1, mayLoad = 1, hasPostISelHook = 1 } -multiclass MUBUF_Load_Helper op, string asm, RegisterClass regClass, +multiclass MUBUF_Load_Helper { let mayLoad = 1, mayStore = 0 in { - - let addr64 = 0 in { - - let offen = 0, idxen = 0, vaddr = 0 in { - def _OFFSET : MUBUF_si , - MUBUFAddr64Table<0>; - } - - let offen = 1, idxen = 0 in { - def _OFFEN : MUBUF_si ; - } - - let offen = 0, idxen = 1 in { - def _IDXEN : MUBUF_si ; - } - - let offen = 1, idxen = 1 in { - def _BOTHEN : MUBUF_si ; - } - } - - let offen = 0, idxen = 0, addr64 = 1, glc = 0, slc = 0, tfe = 0, soffset = 128 /* ZERO */ in { - def _ADDR64 : MUBUF_si , MUBUFAddr64Table<1>; - } - } -} - -multiclass MUBUF_Load_Helper_vi op, string asm, RegisterClass regClass, - ValueType load_vt = i32, - SDPatternOperator ld = null_frag> { - - let lds = 0, mayLoad = 1 in { let offen = 0, idxen = 0, vaddr = 0 in { - def _OFFSET : MUBUF_vi , - MUBUFAddr64Table<0>; + i1:$glc, i1:$slc, i1:$tfe)))]>; } let offen = 1, idxen = 0 in { - def _OFFEN : MUBUF_vi ; + name#" $vdata, $vaddr, $srsrc, $soffset offen"#"$offset"#"$glc"#"$slc"#"$tfe", []>; } let offen = 0, idxen = 1 in { - def _IDXEN : MUBUF_vi ; + name#" $vdata, $vaddr, $srsrc, $soffset idxen"#"$offset"#"$glc"#"$slc"#"$tfe", []>; } let offen = 1, idxen = 1 in { - def _BOTHEN : MUBUF_vi ; + name#" $vdata, $vaddr, $srsrc, $soffset, idxen offen"#"$glc"#"$slc"#"$tfe", []>; + } + + let offen = 0, idxen = 0, glc = 0, slc = 0, tfe = 0, soffset = 128 /* ZERO */ in { + defm _ADDR64 : MUBUFAddr64_m ; } } } -multiclass MUBUF_Store_Helper op, string name, RegisterClass vdataClass, +multiclass MUBUF_Store_Helper { - let mayLoad = 0, mayStore = 1 in { - let addr64 = 0 in { - - def "" : MUBUF_si < - op, (outs), - (ins vdataClass:$vdata, SReg_128:$srsrc, VGPR_32:$vaddr, SCSrc_32:$soffset, - mbuf_offset:$offset, offen:$offen, idxen:$idxen, glc:$glc, slc:$slc, - tfe:$tfe), - name#" $vdata, $vaddr, $srsrc, $soffset"#"$offen"#"$idxen"#"$offset"# - "$glc"#"$slc"#"$tfe", - [] - >; + defm : MUBUF_m ; let offen = 0, idxen = 0, vaddr = 0 in { - def _OFFSET : MUBUF_si < - op, (outs), - (ins vdataClass:$vdata, SReg_128:$srsrc, mbuf_offset:$offset, - SCSrc_32:$soffset, glc:$glc, slc:$slc, tfe:$tfe), - name#" $vdata, $srsrc, $soffset"#"$offset"#"$glc"#"$slc"#"$tfe", - [(st store_vt:$vdata, (MUBUFOffset v4i32:$srsrc, i32:$soffset, - i16:$offset, i1:$glc, i1:$slc, - i1:$tfe))] - >, MUBUFAddr64Table<0>; + defm _OFFSET : MUBUF_m ; } // offen = 0, idxen = 0, vaddr = 0 let offen = 1, idxen = 0 in { - def _OFFEN : MUBUF_si < - op, (outs), - (ins vdataClass:$vdata, SReg_128:$srsrc, VGPR_32:$vaddr, SCSrc_32:$soffset, - mbuf_offset:$offset, glc:$glc, slc:$slc, tfe:$tfe), - name#" $vdata, $vaddr, $srsrc, $soffset offen"#"$offset"# - "$glc"#"$slc"#"$tfe", - [] - >; + defm _OFFEN : MUBUF_m ; } // end offen = 1, idxen = 0 - } // End addr64 = 0 - - def _ADDR64 : MUBUF_si < - op, (outs), - (ins vdataClass:$vdata, SReg_128:$srsrc, VReg_64:$vaddr, mbuf_offset:$offset), - name#" $vdata, $vaddr, $srsrc, 0 addr64"#"$offset", - [(st store_vt:$vdata, - (MUBUFAddr64 v4i32:$srsrc, i64:$vaddr, i16:$offset))]>, MUBUFAddr64Table<1> - { - - let mayLoad = 0; - let mayStore = 1; - - // Encoding - let offen = 0; - let idxen = 0; - let glc = 0; - let addr64 = 1; - let slc = 0; - let tfe = 0; - let soffset = 128; // ZERO - } - } // End mayLoad = 0, mayStore = 1 + let offen = 0, idxen = 0, glc = 0, slc = 0, tfe = 0, + soffset = 128 /* ZERO */ in { + defm _ADDR64 : MUBUFAddr64_m ; + } + } // End mayLoad = 0, mayStore = 1 } class FLAT_Load_Helper op, string asm, RegisterClass regClass> : @@ -1912,7 +2022,7 @@ multiclass MIMG_NoSampler op, string asm> { class MIMG_Sampler_Helper op, string asm, RegisterClass dst_rc, - RegisterClass src_rc> : MIMG < + RegisterClass src_rc, int wqm> : MIMG < op, (outs dst_rc:$vdata), (ins i32imm:$dmask, i1imm:$unorm, i1imm:$glc, i1imm:$da, i1imm:$r128, @@ -1924,33 +2034,41 @@ class MIMG_Sampler_Helper op, string asm, let mayLoad = 1; let mayStore = 0; let hasPostISelHook = 1; + let WQM = wqm; } multiclass MIMG_Sampler_Src_Helper op, string asm, RegisterClass dst_rc, - int channels> { - def _V1 : MIMG_Sampler_Helper , + int channels, int wqm> { + def _V1 : MIMG_Sampler_Helper , MIMG_Mask; - def _V2 : MIMG_Sampler_Helper , + def _V2 : MIMG_Sampler_Helper , MIMG_Mask; - def _V4 : MIMG_Sampler_Helper , + def _V4 : MIMG_Sampler_Helper , MIMG_Mask; - def _V8 : MIMG_Sampler_Helper , + def _V8 : MIMG_Sampler_Helper , MIMG_Mask; - def _V16 : MIMG_Sampler_Helper , + def _V16 : MIMG_Sampler_Helper , MIMG_Mask; } multiclass MIMG_Sampler op, string asm> { - defm _V1 : MIMG_Sampler_Src_Helper; - defm _V2 : MIMG_Sampler_Src_Helper; - defm _V3 : MIMG_Sampler_Src_Helper; - defm _V4 : MIMG_Sampler_Src_Helper; + defm _V1 : MIMG_Sampler_Src_Helper; + defm _V2 : MIMG_Sampler_Src_Helper; + defm _V3 : MIMG_Sampler_Src_Helper; + defm _V4 : MIMG_Sampler_Src_Helper; +} + +multiclass MIMG_Sampler_WQM op, string asm> { + defm _V1 : MIMG_Sampler_Src_Helper; + defm _V2 : MIMG_Sampler_Src_Helper; + defm _V3 : MIMG_Sampler_Src_Helper; + defm _V4 : MIMG_Sampler_Src_Helper; } class MIMG_Gather_Helper op, string asm, RegisterClass dst_rc, - RegisterClass src_rc> : MIMG < + RegisterClass src_rc, int wqm> : MIMG < op, (outs dst_rc:$vdata), (ins i32imm:$dmask, i1imm:$unorm, i1imm:$glc, i1imm:$da, i1imm:$r128, @@ -1971,28 +2089,36 @@ class MIMG_Gather_Helper op, string asm, // Therefore, disable all code which updates DMASK by setting these two: let MIMG = 0; let hasPostISelHook = 0; + let WQM = wqm; } multiclass MIMG_Gather_Src_Helper op, string asm, RegisterClass dst_rc, - int channels> { - def _V1 : MIMG_Gather_Helper , + int channels, int wqm> { + def _V1 : MIMG_Gather_Helper , MIMG_Mask; - def _V2 : MIMG_Gather_Helper , + def _V2 : MIMG_Gather_Helper , MIMG_Mask; - def _V4 : MIMG_Gather_Helper , + def _V4 : MIMG_Gather_Helper , MIMG_Mask; - def _V8 : MIMG_Gather_Helper , + def _V8 : MIMG_Gather_Helper , MIMG_Mask; - def _V16 : MIMG_Gather_Helper , + def _V16 : MIMG_Gather_Helper , MIMG_Mask; } multiclass MIMG_Gather op, string asm> { - defm _V1 : MIMG_Gather_Src_Helper; - defm _V2 : MIMG_Gather_Src_Helper; - defm _V3 : MIMG_Gather_Src_Helper; - defm _V4 : MIMG_Gather_Src_Helper; + defm _V1 : MIMG_Gather_Src_Helper; + defm _V2 : MIMG_Gather_Src_Helper; + defm _V3 : MIMG_Gather_Src_Helper; + defm _V4 : MIMG_Gather_Src_Helper; +} + +multiclass MIMG_Gather_WQM op, string asm> { + defm _V1 : MIMG_Gather_Src_Helper; + defm _V2 : MIMG_Gather_Src_Helper; + defm _V3 : MIMG_Gather_Src_Helper; + defm _V4 : MIMG_Gather_Src_Helper; } //===----------------------------------------------------------------------===// diff --git a/contrib/llvm/lib/Target/R600/SIInstructions.td b/contrib/llvm/lib/Target/R600/SIInstructions.td index 4b1a84662cb5..bbedef29303b 100644 --- a/contrib/llvm/lib/Target/R600/SIInstructions.td +++ b/contrib/llvm/lib/Target/R600/SIInstructions.td @@ -152,9 +152,11 @@ defm S_FLBIT_I32_B32 : SOP1_32 , "s_flbit_i32_b32", [(set i32:$dst, (ctlz_zero_undef i32:$src0))] >; -//defm S_FLBIT_I32_B64 : SOP1_32 , "s_flbit_i32_b64", []>; -defm S_FLBIT_I32 : SOP1_32 , "s_flbit_i32", []>; -//defm S_FLBIT_I32_I64 : SOP1_32 , "s_flbit_i32_i64", []>; +defm S_FLBIT_I32_B64 : SOP1_32_64 , "s_flbit_i32_b64", []>; +defm S_FLBIT_I32 : SOP1_32 , "s_flbit_i32", + [(set i32:$dst, (int_AMDGPU_flbit_i32 i32:$src0))] +>; +defm S_FLBIT_I32_I64 : SOP1_32_64 , "s_flbit_i32_i64", []>; defm S_SEXT_I32_I8 : SOP1_32 , "s_sext_i32_i8", [(set i32:$dst, (sext_inreg i32:$src0, i8))] >; @@ -764,88 +766,88 @@ defm V_CMPX_CLASS_F64 : VOPCX_CLASS_F64 , "v_cmpx_class_f64">; //===----------------------------------------------------------------------===// -def DS_ADD_U32 : DS_1A1D_NORET <0x0, "ds_add_u32", VGPR_32>; -def DS_SUB_U32 : DS_1A1D_NORET <0x1, "ds_sub_u32", VGPR_32>; -def DS_RSUB_U32 : DS_1A1D_NORET <0x2, "ds_rsub_u32", VGPR_32>; -def DS_INC_U32 : DS_1A1D_NORET <0x3, "ds_inc_u32", VGPR_32>; -def DS_DEC_U32 : DS_1A1D_NORET <0x4, "ds_dec_u32", VGPR_32>; -def DS_MIN_I32 : DS_1A1D_NORET <0x5, "ds_min_i32", VGPR_32>; -def DS_MAX_I32 : DS_1A1D_NORET <0x6, "ds_max_i32", VGPR_32>; -def DS_MIN_U32 : DS_1A1D_NORET <0x7, "ds_min_u32", VGPR_32>; -def DS_MAX_U32 : DS_1A1D_NORET <0x8, "ds_max_u32", VGPR_32>; -def DS_AND_B32 : DS_1A1D_NORET <0x9, "ds_and_b32", VGPR_32>; -def DS_OR_B32 : DS_1A1D_NORET <0xa, "ds_or_b32", VGPR_32>; -def DS_XOR_B32 : DS_1A1D_NORET <0xb, "ds_xor_b32", VGPR_32>; -def DS_MSKOR_B32 : DS_1A1D_NORET <0xc, "ds_mskor_b32", VGPR_32>; -def DS_CMPST_B32 : DS_1A2D_NORET <0x10, "ds_cmpst_b32", VGPR_32>; -def DS_CMPST_F32 : DS_1A2D_NORET <0x11, "ds_cmpst_f32", VGPR_32>; -def DS_MIN_F32 : DS_1A1D_NORET <0x12, "ds_min_f32", VGPR_32>; -def DS_MAX_F32 : DS_1A1D_NORET <0x13, "ds_max_f32", VGPR_32>; +defm DS_ADD_U32 : DS_1A1D_NORET <0x0, "ds_add_u32", VGPR_32>; +defm DS_SUB_U32 : DS_1A1D_NORET <0x1, "ds_sub_u32", VGPR_32>; +defm DS_RSUB_U32 : DS_1A1D_NORET <0x2, "ds_rsub_u32", VGPR_32>; +defm DS_INC_U32 : DS_1A1D_NORET <0x3, "ds_inc_u32", VGPR_32>; +defm DS_DEC_U32 : DS_1A1D_NORET <0x4, "ds_dec_u32", VGPR_32>; +defm DS_MIN_I32 : DS_1A1D_NORET <0x5, "ds_min_i32", VGPR_32>; +defm DS_MAX_I32 : DS_1A1D_NORET <0x6, "ds_max_i32", VGPR_32>; +defm DS_MIN_U32 : DS_1A1D_NORET <0x7, "ds_min_u32", VGPR_32>; +defm DS_MAX_U32 : DS_1A1D_NORET <0x8, "ds_max_u32", VGPR_32>; +defm DS_AND_B32 : DS_1A1D_NORET <0x9, "ds_and_b32", VGPR_32>; +defm DS_OR_B32 : DS_1A1D_NORET <0xa, "ds_or_b32", VGPR_32>; +defm DS_XOR_B32 : DS_1A1D_NORET <0xb, "ds_xor_b32", VGPR_32>; +defm DS_MSKOR_B32 : DS_1A1D_NORET <0xc, "ds_mskor_b32", VGPR_32>; +defm DS_CMPST_B32 : DS_1A2D_NORET <0x10, "ds_cmpst_b32", VGPR_32>; +defm DS_CMPST_F32 : DS_1A2D_NORET <0x11, "ds_cmpst_f32", VGPR_32>; +defm DS_MIN_F32 : DS_1A1D_NORET <0x12, "ds_min_f32", VGPR_32>; +defm DS_MAX_F32 : DS_1A1D_NORET <0x13, "ds_max_f32", VGPR_32>; -def DS_ADD_RTN_U32 : DS_1A1D_RET <0x20, "ds_add_rtn_u32", VGPR_32, "ds_add_u32">; -def DS_SUB_RTN_U32 : DS_1A1D_RET <0x21, "ds_sub_rtn_u32", VGPR_32, "ds_sub_u32">; -def DS_RSUB_RTN_U32 : DS_1A1D_RET <0x22, "ds_rsub_rtn_u32", VGPR_32, "ds_rsub_u32">; -def DS_INC_RTN_U32 : DS_1A1D_RET <0x23, "ds_inc_rtn_u32", VGPR_32, "ds_inc_u32">; -def DS_DEC_RTN_U32 : DS_1A1D_RET <0x24, "ds_dec_rtn_u32", VGPR_32, "ds_dec_u32">; -def DS_MIN_RTN_I32 : DS_1A1D_RET <0x25, "ds_min_rtn_i32", VGPR_32, "ds_min_i32">; -def DS_MAX_RTN_I32 : DS_1A1D_RET <0x26, "ds_max_rtn_i32", VGPR_32, "ds_max_i32">; -def DS_MIN_RTN_U32 : DS_1A1D_RET <0x27, "ds_min_rtn_u32", VGPR_32, "ds_min_u32">; -def DS_MAX_RTN_U32 : DS_1A1D_RET <0x28, "ds_max_rtn_u32", VGPR_32, "ds_max_u32">; -def DS_AND_RTN_B32 : DS_1A1D_RET <0x29, "ds_and_rtn_b32", VGPR_32, "ds_and_b32">; -def DS_OR_RTN_B32 : DS_1A1D_RET <0x2a, "ds_or_rtn_b32", VGPR_32, "ds_or_b32">; -def DS_XOR_RTN_B32 : DS_1A1D_RET <0x2b, "ds_xor_rtn_b32", VGPR_32, "ds_xor_b32">; -def DS_MSKOR_RTN_B32 : DS_1A1D_RET <0x2c, "ds_mskor_rtn_b32", VGPR_32, "ds_mskor_b32">; -def DS_WRXCHG_RTN_B32 : DS_1A1D_RET <0x2d, "ds_wrxchg_rtn_b32", VGPR_32>; +defm DS_ADD_RTN_U32 : DS_1A1D_RET <0x20, "ds_add_rtn_u32", VGPR_32, "ds_add_u32">; +defm DS_SUB_RTN_U32 : DS_1A1D_RET <0x21, "ds_sub_rtn_u32", VGPR_32, "ds_sub_u32">; +defm DS_RSUB_RTN_U32 : DS_1A1D_RET <0x22, "ds_rsub_rtn_u32", VGPR_32, "ds_rsub_u32">; +defm DS_INC_RTN_U32 : DS_1A1D_RET <0x23, "ds_inc_rtn_u32", VGPR_32, "ds_inc_u32">; +defm DS_DEC_RTN_U32 : DS_1A1D_RET <0x24, "ds_dec_rtn_u32", VGPR_32, "ds_dec_u32">; +defm DS_MIN_RTN_I32 : DS_1A1D_RET <0x25, "ds_min_rtn_i32", VGPR_32, "ds_min_i32">; +defm DS_MAX_RTN_I32 : DS_1A1D_RET <0x26, "ds_max_rtn_i32", VGPR_32, "ds_max_i32">; +defm DS_MIN_RTN_U32 : DS_1A1D_RET <0x27, "ds_min_rtn_u32", VGPR_32, "ds_min_u32">; +defm DS_MAX_RTN_U32 : DS_1A1D_RET <0x28, "ds_max_rtn_u32", VGPR_32, "ds_max_u32">; +defm DS_AND_RTN_B32 : DS_1A1D_RET <0x29, "ds_and_rtn_b32", VGPR_32, "ds_and_b32">; +defm DS_OR_RTN_B32 : DS_1A1D_RET <0x2a, "ds_or_rtn_b32", VGPR_32, "ds_or_b32">; +defm DS_XOR_RTN_B32 : DS_1A1D_RET <0x2b, "ds_xor_rtn_b32", VGPR_32, "ds_xor_b32">; +defm DS_MSKOR_RTN_B32 : DS_1A1D_RET <0x2c, "ds_mskor_rtn_b32", VGPR_32, "ds_mskor_b32">; +defm DS_WRXCHG_RTN_B32 : DS_1A1D_RET <0x2d, "ds_wrxchg_rtn_b32", VGPR_32>; //def DS_WRXCHG2_RTN_B32 : DS_2A0D_RET <0x2e, "ds_wrxchg2_rtn_b32", VGPR_32, "ds_wrxchg2_b32">; //def DS_WRXCHG2ST64_RTN_B32 : DS_2A0D_RET <0x2f, "ds_wrxchg2_rtn_b32", VGPR_32, "ds_wrxchg2st64_b32">; -def DS_CMPST_RTN_B32 : DS_1A2D_RET <0x30, "ds_cmpst_rtn_b32", VGPR_32, "ds_cmpst_b32">; -def DS_CMPST_RTN_F32 : DS_1A2D_RET <0x31, "ds_cmpst_rtn_f32", VGPR_32, "ds_cmpst_f32">; -def DS_MIN_RTN_F32 : DS_1A1D_RET <0x32, "ds_min_rtn_f32", VGPR_32, "ds_min_f32">; -def DS_MAX_RTN_F32 : DS_1A1D_RET <0x33, "ds_max_rtn_f32", VGPR_32, "ds_max_f32">; +defm DS_CMPST_RTN_B32 : DS_1A2D_RET <0x30, "ds_cmpst_rtn_b32", VGPR_32, "ds_cmpst_b32">; +defm DS_CMPST_RTN_F32 : DS_1A2D_RET <0x31, "ds_cmpst_rtn_f32", VGPR_32, "ds_cmpst_f32">; +defm DS_MIN_RTN_F32 : DS_1A1D_RET <0x32, "ds_min_rtn_f32", VGPR_32, "ds_min_f32">; +defm DS_MAX_RTN_F32 : DS_1A1D_RET <0x33, "ds_max_rtn_f32", VGPR_32, "ds_max_f32">; let SubtargetPredicate = isCI in { -def DS_WRAP_RTN_F32 : DS_1A1D_RET <0x34, "ds_wrap_rtn_f32", VGPR_32, "ds_wrap_f32">; +defm DS_WRAP_RTN_F32 : DS_1A1D_RET <0x34, "ds_wrap_rtn_f32", VGPR_32, "ds_wrap_f32">; } // End isCI -def DS_ADD_U64 : DS_1A1D_NORET <0x40, "ds_add_u64", VReg_64>; -def DS_SUB_U64 : DS_1A1D_NORET <0x41, "ds_sub_u64", VReg_64>; -def DS_RSUB_U64 : DS_1A1D_NORET <0x42, "ds_rsub_u64", VReg_64>; -def DS_INC_U64 : DS_1A1D_NORET <0x43, "ds_inc_u64", VReg_64>; -def DS_DEC_U64 : DS_1A1D_NORET <0x44, "ds_dec_u64", VReg_64>; -def DS_MIN_I64 : DS_1A1D_NORET <0x45, "ds_min_i64", VReg_64>; -def DS_MAX_I64 : DS_1A1D_NORET <0x46, "ds_max_i64", VReg_64>; -def DS_MIN_U64 : DS_1A1D_NORET <0x47, "ds_min_u64", VReg_64>; -def DS_MAX_U64 : DS_1A1D_NORET <0x48, "ds_max_u64", VReg_64>; -def DS_AND_B64 : DS_1A1D_NORET <0x49, "ds_and_b64", VReg_64>; -def DS_OR_B64 : DS_1A1D_NORET <0x4a, "ds_or_b64", VReg_64>; -def DS_XOR_B64 : DS_1A1D_NORET <0x4b, "ds_xor_b64", VReg_64>; -def DS_MSKOR_B64 : DS_1A1D_NORET <0x4c, "ds_mskor_b64", VReg_64>; -def DS_CMPST_B64 : DS_1A2D_NORET <0x50, "ds_cmpst_b64", VReg_64>; -def DS_CMPST_F64 : DS_1A2D_NORET <0x51, "ds_cmpst_f64", VReg_64>; -def DS_MIN_F64 : DS_1A1D_NORET <0x52, "ds_min_f64", VReg_64>; -def DS_MAX_F64 : DS_1A1D_NORET <0x53, "ds_max_f64", VReg_64>; +defm DS_ADD_U64 : DS_1A1D_NORET <0x40, "ds_add_u64", VReg_64>; +defm DS_SUB_U64 : DS_1A1D_NORET <0x41, "ds_sub_u64", VReg_64>; +defm DS_RSUB_U64 : DS_1A1D_NORET <0x42, "ds_rsub_u64", VReg_64>; +defm DS_INC_U64 : DS_1A1D_NORET <0x43, "ds_inc_u64", VReg_64>; +defm DS_DEC_U64 : DS_1A1D_NORET <0x44, "ds_dec_u64", VReg_64>; +defm DS_MIN_I64 : DS_1A1D_NORET <0x45, "ds_min_i64", VReg_64>; +defm DS_MAX_I64 : DS_1A1D_NORET <0x46, "ds_max_i64", VReg_64>; +defm DS_MIN_U64 : DS_1A1D_NORET <0x47, "ds_min_u64", VReg_64>; +defm DS_MAX_U64 : DS_1A1D_NORET <0x48, "ds_max_u64", VReg_64>; +defm DS_AND_B64 : DS_1A1D_NORET <0x49, "ds_and_b64", VReg_64>; +defm DS_OR_B64 : DS_1A1D_NORET <0x4a, "ds_or_b64", VReg_64>; +defm DS_XOR_B64 : DS_1A1D_NORET <0x4b, "ds_xor_b64", VReg_64>; +defm DS_MSKOR_B64 : DS_1A1D_NORET <0x4c, "ds_mskor_b64", VReg_64>; +defm DS_CMPST_B64 : DS_1A2D_NORET <0x50, "ds_cmpst_b64", VReg_64>; +defm DS_CMPST_F64 : DS_1A2D_NORET <0x51, "ds_cmpst_f64", VReg_64>; +defm DS_MIN_F64 : DS_1A1D_NORET <0x52, "ds_min_f64", VReg_64>; +defm DS_MAX_F64 : DS_1A1D_NORET <0x53, "ds_max_f64", VReg_64>; -def DS_ADD_RTN_U64 : DS_1A1D_RET <0x60, "ds_add_rtn_u64", VReg_64, "ds_add_u64">; -def DS_SUB_RTN_U64 : DS_1A1D_RET <0x61, "ds_sub_rtn_u64", VReg_64, "ds_sub_u64">; -def DS_RSUB_RTN_U64 : DS_1A1D_RET <0x62, "ds_rsub_rtn_u64", VReg_64, "ds_rsub_u64">; -def DS_INC_RTN_U64 : DS_1A1D_RET <0x63, "ds_inc_rtn_u64", VReg_64, "ds_inc_u64">; -def DS_DEC_RTN_U64 : DS_1A1D_RET <0x64, "ds_dec_rtn_u64", VReg_64, "ds_dec_u64">; -def DS_MIN_RTN_I64 : DS_1A1D_RET <0x65, "ds_min_rtn_i64", VReg_64, "ds_min_i64">; -def DS_MAX_RTN_I64 : DS_1A1D_RET <0x66, "ds_max_rtn_i64", VReg_64, "ds_max_i64">; -def DS_MIN_RTN_U64 : DS_1A1D_RET <0x67, "ds_min_rtn_u64", VReg_64, "ds_min_u64">; -def DS_MAX_RTN_U64 : DS_1A1D_RET <0x68, "ds_max_rtn_u64", VReg_64, "ds_max_u64">; -def DS_AND_RTN_B64 : DS_1A1D_RET <0x69, "ds_and_rtn_b64", VReg_64, "ds_and_b64">; -def DS_OR_RTN_B64 : DS_1A1D_RET <0x6a, "ds_or_rtn_b64", VReg_64, "ds_or_b64">; -def DS_XOR_RTN_B64 : DS_1A1D_RET <0x6b, "ds_xor_rtn_b64", VReg_64, "ds_xor_b64">; -def DS_MSKOR_RTN_B64 : DS_1A1D_RET <0x6c, "ds_mskor_rtn_b64", VReg_64, "ds_mskor_b64">; -def DS_WRXCHG_RTN_B64 : DS_1A1D_RET <0x6d, "ds_wrxchg_rtn_b64", VReg_64, "ds_wrxchg_b64">; +defm DS_ADD_RTN_U64 : DS_1A1D_RET <0x60, "ds_add_rtn_u64", VReg_64, "ds_add_u64">; +defm DS_SUB_RTN_U64 : DS_1A1D_RET <0x61, "ds_sub_rtn_u64", VReg_64, "ds_sub_u64">; +defm DS_RSUB_RTN_U64 : DS_1A1D_RET <0x62, "ds_rsub_rtn_u64", VReg_64, "ds_rsub_u64">; +defm DS_INC_RTN_U64 : DS_1A1D_RET <0x63, "ds_inc_rtn_u64", VReg_64, "ds_inc_u64">; +defm DS_DEC_RTN_U64 : DS_1A1D_RET <0x64, "ds_dec_rtn_u64", VReg_64, "ds_dec_u64">; +defm DS_MIN_RTN_I64 : DS_1A1D_RET <0x65, "ds_min_rtn_i64", VReg_64, "ds_min_i64">; +defm DS_MAX_RTN_I64 : DS_1A1D_RET <0x66, "ds_max_rtn_i64", VReg_64, "ds_max_i64">; +defm DS_MIN_RTN_U64 : DS_1A1D_RET <0x67, "ds_min_rtn_u64", VReg_64, "ds_min_u64">; +defm DS_MAX_RTN_U64 : DS_1A1D_RET <0x68, "ds_max_rtn_u64", VReg_64, "ds_max_u64">; +defm DS_AND_RTN_B64 : DS_1A1D_RET <0x69, "ds_and_rtn_b64", VReg_64, "ds_and_b64">; +defm DS_OR_RTN_B64 : DS_1A1D_RET <0x6a, "ds_or_rtn_b64", VReg_64, "ds_or_b64">; +defm DS_XOR_RTN_B64 : DS_1A1D_RET <0x6b, "ds_xor_rtn_b64", VReg_64, "ds_xor_b64">; +defm DS_MSKOR_RTN_B64 : DS_1A1D_RET <0x6c, "ds_mskor_rtn_b64", VReg_64, "ds_mskor_b64">; +defm DS_WRXCHG_RTN_B64 : DS_1A1D_RET <0x6d, "ds_wrxchg_rtn_b64", VReg_64, "ds_wrxchg_b64">; //def DS_WRXCHG2_RTN_B64 : DS_2A0D_RET <0x6e, "ds_wrxchg2_rtn_b64", VReg_64, "ds_wrxchg2_b64">; //def DS_WRXCHG2ST64_RTN_B64 : DS_2A0D_RET <0x6f, "ds_wrxchg2_rtn_b64", VReg_64, "ds_wrxchg2st64_b64">; -def DS_CMPST_RTN_B64 : DS_1A2D_RET <0x70, "ds_cmpst_rtn_b64", VReg_64, "ds_cmpst_b64">; -def DS_CMPST_RTN_F64 : DS_1A2D_RET <0x71, "ds_cmpst_rtn_f64", VReg_64, "ds_cmpst_f64">; -def DS_MIN_RTN_F64 : DS_1A1D_RET <0x72, "ds_min_f64", VReg_64, "ds_min_f64">; -def DS_MAX_RTN_F64 : DS_1A1D_RET <0x73, "ds_max_f64", VReg_64, "ds_max_f64">; +defm DS_CMPST_RTN_B64 : DS_1A2D_RET <0x70, "ds_cmpst_rtn_b64", VReg_64, "ds_cmpst_b64">; +defm DS_CMPST_RTN_F64 : DS_1A2D_RET <0x71, "ds_cmpst_rtn_f64", VReg_64, "ds_cmpst_f64">; +defm DS_MIN_RTN_F64 : DS_1A1D_RET <0x72, "ds_min_rtn_f64", VReg_64, "ds_min_f64">; +defm DS_MAX_RTN_F64 : DS_1A1D_RET <0x73, "ds_max_rtn_f64", VReg_64, "ds_max_f64">; //let SubtargetPredicate = isCI in { // DS_CONDXCHG32_RTN_B64 @@ -874,123 +876,120 @@ defm DS_WRITE2ST64_B64 : DS_Store2_Helper <0x0000004F, "ds_write2st64_b64", VReg defm DS_READ2_B32 : DS_Load2_Helper <0x00000037, "ds_read2_b32", VReg_64>; defm DS_READ2ST64_B32 : DS_Load2_Helper <0x00000038, "ds_read2st64_b32", VReg_64>; -defm DS_READ2_B64 : DS_Load2_Helper <0x00000075, "ds_read2_b64", VReg_128>; -defm DS_READ2ST64_B64 : DS_Load2_Helper <0x00000076, "ds_read2st64_b64", VReg_128>; +defm DS_READ2_B64 : DS_Load2_Helper <0x00000077, "ds_read2_b64", VReg_128>; +defm DS_READ2ST64_B64 : DS_Load2_Helper <0x00000078, "ds_read2st64_b64", VReg_128>; //===----------------------------------------------------------------------===// // MUBUF Instructions //===----------------------------------------------------------------------===// -let SubtargetPredicate = isSICI in { - -//def BUFFER_LOAD_FORMAT_X : MUBUF_ <0x00000000, "buffer_load_format_x", []>; -//def BUFFER_LOAD_FORMAT_XY : MUBUF_ <0x00000001, "buffer_load_format_xy", []>; -//def BUFFER_LOAD_FORMAT_XYZ : MUBUF_ <0x00000002, "buffer_load_format_xyz", []>; -defm BUFFER_LOAD_FORMAT_XYZW : MUBUF_Load_Helper <0x00000003, "buffer_load_format_xyzw", VReg_128>; -//def BUFFER_STORE_FORMAT_X : MUBUF_ <0x00000004, "buffer_store_format_x", []>; -//def BUFFER_STORE_FORMAT_XY : MUBUF_ <0x00000005, "buffer_store_format_xy", []>; -//def BUFFER_STORE_FORMAT_XYZ : MUBUF_ <0x00000006, "buffer_store_format_xyz", []>; -//def BUFFER_STORE_FORMAT_XYZW : MUBUF_ <0x00000007, "buffer_store_format_xyzw", []>; +//def BUFFER_LOAD_FORMAT_X : MUBUF_ , "buffer_load_format_x", []>; +//def BUFFER_LOAD_FORMAT_XY : MUBUF_ , "buffer_load_format_xy", []>; +//def BUFFER_LOAD_FORMAT_XYZ : MUBUF_ , "buffer_load_format_xyz", []>; +defm BUFFER_LOAD_FORMAT_XYZW : MUBUF_Load_Helper , "buffer_load_format_xyzw", VReg_128>; +//def BUFFER_STORE_FORMAT_X : MUBUF_ , "buffer_store_format_x", []>; +//def BUFFER_STORE_FORMAT_XY : MUBUF_ , "buffer_store_format_xy", []>; +//def BUFFER_STORE_FORMAT_XYZ : MUBUF_ , "buffer_store_format_xyz", []>; +//def BUFFER_STORE_FORMAT_XYZW : MUBUF_ , "buffer_store_format_xyzw", []>; defm BUFFER_LOAD_UBYTE : MUBUF_Load_Helper < - 0x00000008, "buffer_load_ubyte", VGPR_32, i32, az_extloadi8_global + mubuf<0x08, 0x10>, "buffer_load_ubyte", VGPR_32, i32, az_extloadi8_global >; defm BUFFER_LOAD_SBYTE : MUBUF_Load_Helper < - 0x00000009, "buffer_load_sbyte", VGPR_32, i32, sextloadi8_global + mubuf<0x09, 0x11>, "buffer_load_sbyte", VGPR_32, i32, sextloadi8_global >; defm BUFFER_LOAD_USHORT : MUBUF_Load_Helper < - 0x0000000a, "buffer_load_ushort", VGPR_32, i32, az_extloadi16_global + mubuf<0x0a, 0x12>, "buffer_load_ushort", VGPR_32, i32, az_extloadi16_global >; defm BUFFER_LOAD_SSHORT : MUBUF_Load_Helper < - 0x0000000b, "buffer_load_sshort", VGPR_32, i32, sextloadi16_global + mubuf<0x0b, 0x13>, "buffer_load_sshort", VGPR_32, i32, sextloadi16_global >; defm BUFFER_LOAD_DWORD : MUBUF_Load_Helper < - 0x0000000c, "buffer_load_dword", VGPR_32, i32, global_load + mubuf<0x0c, 0x14>, "buffer_load_dword", VGPR_32, i32, global_load >; defm BUFFER_LOAD_DWORDX2 : MUBUF_Load_Helper < - 0x0000000d, "buffer_load_dwordx2", VReg_64, v2i32, global_load + mubuf<0x0d, 0x15>, "buffer_load_dwordx2", VReg_64, v2i32, global_load >; defm BUFFER_LOAD_DWORDX4 : MUBUF_Load_Helper < - 0x0000000e, "buffer_load_dwordx4", VReg_128, v4i32, global_load + mubuf<0x0e, 0x17>, "buffer_load_dwordx4", VReg_128, v4i32, global_load >; defm BUFFER_STORE_BYTE : MUBUF_Store_Helper < - 0x00000018, "buffer_store_byte", VGPR_32, i32, truncstorei8_global + mubuf<0x18>, "buffer_store_byte", VGPR_32, i32, truncstorei8_global >; defm BUFFER_STORE_SHORT : MUBUF_Store_Helper < - 0x0000001a, "buffer_store_short", VGPR_32, i32, truncstorei16_global + mubuf<0x1a>, "buffer_store_short", VGPR_32, i32, truncstorei16_global >; defm BUFFER_STORE_DWORD : MUBUF_Store_Helper < - 0x0000001c, "buffer_store_dword", VGPR_32, i32, global_store + mubuf<0x1c>, "buffer_store_dword", VGPR_32, i32, global_store >; defm BUFFER_STORE_DWORDX2 : MUBUF_Store_Helper < - 0x0000001d, "buffer_store_dwordx2", VReg_64, v2i32, global_store + mubuf<0x1d>, "buffer_store_dwordx2", VReg_64, v2i32, global_store >; defm BUFFER_STORE_DWORDX4 : MUBUF_Store_Helper < - 0x0000001e, "buffer_store_dwordx4", VReg_128, v4i32, global_store + mubuf<0x1e, 0x1f>, "buffer_store_dwordx4", VReg_128, v4i32, global_store >; -//def BUFFER_ATOMIC_SWAP : MUBUF_ <0x00000030, "buffer_atomic_swap", []>; + defm BUFFER_ATOMIC_SWAP : MUBUF_Atomic < - 0x00000030, "buffer_atomic_swap", VGPR_32, i32, atomic_swap_global + mubuf<0x30, 0x40>, "buffer_atomic_swap", VGPR_32, i32, atomic_swap_global >; -//def BUFFER_ATOMIC_CMPSWAP : MUBUF_ <0x00000031, "buffer_atomic_cmpswap", []>; +//def BUFFER_ATOMIC_CMPSWAP : MUBUF_ , "buffer_atomic_cmpswap", []>; defm BUFFER_ATOMIC_ADD : MUBUF_Atomic < - 0x00000032, "buffer_atomic_add", VGPR_32, i32, atomic_add_global + mubuf<0x32, 0x42>, "buffer_atomic_add", VGPR_32, i32, atomic_add_global >; defm BUFFER_ATOMIC_SUB : MUBUF_Atomic < - 0x00000033, "buffer_atomic_sub", VGPR_32, i32, atomic_sub_global + mubuf<0x33, 0x43>, "buffer_atomic_sub", VGPR_32, i32, atomic_sub_global >; -//def BUFFER_ATOMIC_RSUB : MUBUF_ <0x00000034, "buffer_atomic_rsub", []>; +//def BUFFER_ATOMIC_RSUB : MUBUF_ , "buffer_atomic_rsub", []>; // isn't on CI & VI defm BUFFER_ATOMIC_SMIN : MUBUF_Atomic < - 0x00000035, "buffer_atomic_smin", VGPR_32, i32, atomic_min_global + mubuf<0x35, 0x44>, "buffer_atomic_smin", VGPR_32, i32, atomic_min_global >; defm BUFFER_ATOMIC_UMIN : MUBUF_Atomic < - 0x00000036, "buffer_atomic_umin", VGPR_32, i32, atomic_umin_global + mubuf<0x36, 0x45>, "buffer_atomic_umin", VGPR_32, i32, atomic_umin_global >; defm BUFFER_ATOMIC_SMAX : MUBUF_Atomic < - 0x00000037, "buffer_atomic_smax", VGPR_32, i32, atomic_max_global + mubuf<0x37, 0x46>, "buffer_atomic_smax", VGPR_32, i32, atomic_max_global >; defm BUFFER_ATOMIC_UMAX : MUBUF_Atomic < - 0x00000038, "buffer_atomic_umax", VGPR_32, i32, atomic_umax_global + mubuf<0x38, 0x47>, "buffer_atomic_umax", VGPR_32, i32, atomic_umax_global >; defm BUFFER_ATOMIC_AND : MUBUF_Atomic < - 0x00000039, "buffer_atomic_and", VGPR_32, i32, atomic_and_global + mubuf<0x39, 0x48>, "buffer_atomic_and", VGPR_32, i32, atomic_and_global >; defm BUFFER_ATOMIC_OR : MUBUF_Atomic < - 0x0000003a, "buffer_atomic_or", VGPR_32, i32, atomic_or_global + mubuf<0x3a, 0x49>, "buffer_atomic_or", VGPR_32, i32, atomic_or_global >; defm BUFFER_ATOMIC_XOR : MUBUF_Atomic < - 0x0000003b, "buffer_atomic_xor", VGPR_32, i32, atomic_xor_global + mubuf<0x3b, 0x4a>, "buffer_atomic_xor", VGPR_32, i32, atomic_xor_global >; -//def BUFFER_ATOMIC_INC : MUBUF_ <0x0000003c, "buffer_atomic_inc", []>; -//def BUFFER_ATOMIC_DEC : MUBUF_ <0x0000003d, "buffer_atomic_dec", []>; -//def BUFFER_ATOMIC_FCMPSWAP : MUBUF_ <0x0000003e, "buffer_atomic_fcmpswap", []>; -//def BUFFER_ATOMIC_FMIN : MUBUF_ <0x0000003f, "buffer_atomic_fmin", []>; -//def BUFFER_ATOMIC_FMAX : MUBUF_ <0x00000040, "buffer_atomic_fmax", []>; -//def BUFFER_ATOMIC_SWAP_X2 : MUBUF_X2 <0x00000050, "buffer_atomic_swap_x2", []>; -//def BUFFER_ATOMIC_CMPSWAP_X2 : MUBUF_X2 <0x00000051, "buffer_atomic_cmpswap_x2", []>; -//def BUFFER_ATOMIC_ADD_X2 : MUBUF_X2 <0x00000052, "buffer_atomic_add_x2", []>; -//def BUFFER_ATOMIC_SUB_X2 : MUBUF_X2 <0x00000053, "buffer_atomic_sub_x2", []>; -//def BUFFER_ATOMIC_RSUB_X2 : MUBUF_X2 <0x00000054, "buffer_atomic_rsub_x2", []>; -//def BUFFER_ATOMIC_SMIN_X2 : MUBUF_X2 <0x00000055, "buffer_atomic_smin_x2", []>; -//def BUFFER_ATOMIC_UMIN_X2 : MUBUF_X2 <0x00000056, "buffer_atomic_umin_x2", []>; -//def BUFFER_ATOMIC_SMAX_X2 : MUBUF_X2 <0x00000057, "buffer_atomic_smax_x2", []>; -//def BUFFER_ATOMIC_UMAX_X2 : MUBUF_X2 <0x00000058, "buffer_atomic_umax_x2", []>; -//def BUFFER_ATOMIC_AND_X2 : MUBUF_X2 <0x00000059, "buffer_atomic_and_x2", []>; -//def BUFFER_ATOMIC_OR_X2 : MUBUF_X2 <0x0000005a, "buffer_atomic_or_x2", []>; -//def BUFFER_ATOMIC_XOR_X2 : MUBUF_X2 <0x0000005b, "buffer_atomic_xor_x2", []>; -//def BUFFER_ATOMIC_INC_X2 : MUBUF_X2 <0x0000005c, "buffer_atomic_inc_x2", []>; -//def BUFFER_ATOMIC_DEC_X2 : MUBUF_X2 <0x0000005d, "buffer_atomic_dec_x2", []>; -//def BUFFER_ATOMIC_FCMPSWAP_X2 : MUBUF_X2 <0x0000005e, "buffer_atomic_fcmpswap_x2", []>; -//def BUFFER_ATOMIC_FMIN_X2 : MUBUF_X2 <0x0000005f, "buffer_atomic_fmin_x2", []>; -//def BUFFER_ATOMIC_FMAX_X2 : MUBUF_X2 <0x00000060, "buffer_atomic_fmax_x2", []>; -//def BUFFER_WBINVL1_SC : MUBUF_WBINVL1 <0x00000070, "buffer_wbinvl1_sc", []>; -//def BUFFER_WBINVL1 : MUBUF_WBINVL1 <0x00000071, "buffer_wbinvl1", []>; - -} // End SubtargetPredicate = isSICI +//def BUFFER_ATOMIC_INC : MUBUF_ , "buffer_atomic_inc", []>; +//def BUFFER_ATOMIC_DEC : MUBUF_ , "buffer_atomic_dec", []>; +//def BUFFER_ATOMIC_FCMPSWAP : MUBUF_ , "buffer_atomic_fcmpswap", []>; // isn't on VI +//def BUFFER_ATOMIC_FMIN : MUBUF_ , "buffer_atomic_fmin", []>; // isn't on VI +//def BUFFER_ATOMIC_FMAX : MUBUF_ , "buffer_atomic_fmax", []>; // isn't on VI +//def BUFFER_ATOMIC_SWAP_X2 : MUBUF_X2 , "buffer_atomic_swap_x2", []>; +//def BUFFER_ATOMIC_CMPSWAP_X2 : MUBUF_X2 , "buffer_atomic_cmpswap_x2", []>; +//def BUFFER_ATOMIC_ADD_X2 : MUBUF_X2 , "buffer_atomic_add_x2", []>; +//def BUFFER_ATOMIC_SUB_X2 : MUBUF_X2 , "buffer_atomic_sub_x2", []>; +//def BUFFER_ATOMIC_RSUB_X2 : MUBUF_X2 , "buffer_atomic_rsub_x2", []>; // isn't on CI & VI +//def BUFFER_ATOMIC_SMIN_X2 : MUBUF_X2 , "buffer_atomic_smin_x2", []>; +//def BUFFER_ATOMIC_UMIN_X2 : MUBUF_X2 , "buffer_atomic_umin_x2", []>; +//def BUFFER_ATOMIC_SMAX_X2 : MUBUF_X2 , "buffer_atomic_smax_x2", []>; +//def BUFFER_ATOMIC_UMAX_X2 : MUBUF_X2 , "buffer_atomic_umax_x2", []>; +//def BUFFER_ATOMIC_AND_X2 : MUBUF_X2 , "buffer_atomic_and_x2", []>; +//def BUFFER_ATOMIC_OR_X2 : MUBUF_X2 , "buffer_atomic_or_x2", []>; +//def BUFFER_ATOMIC_XOR_X2 : MUBUF_X2 , "buffer_atomic_xor_x2", []>; +//def BUFFER_ATOMIC_INC_X2 : MUBUF_X2 , "buffer_atomic_inc_x2", []>; +//def BUFFER_ATOMIC_DEC_X2 : MUBUF_X2 , "buffer_atomic_dec_x2", []>; +//def BUFFER_ATOMIC_FCMPSWAP_X2 : MUBUF_X2 , "buffer_atomic_fcmpswap_x2", []>; // isn't on VI +//def BUFFER_ATOMIC_FMIN_X2 : MUBUF_X2 , "buffer_atomic_fmin_x2", []>; // isn't on VI +//def BUFFER_ATOMIC_FMAX_X2 : MUBUF_X2 , "buffer_atomic_fmax_x2", []>; // isn't on VI +//def BUFFER_WBINVL1_SC : MUBUF_WBINVL1 , "buffer_wbinvl1_sc", []>; // isn't on CI & VI +//def BUFFER_WBINVL1_VOL : MUBUF_WBINVL1 , "buffer_wbinvl1_vol", []>; // isn't on SI +//def BUFFER_WBINVL1 : MUBUF_WBINVL1 , "buffer_wbinvl1", []>; //===----------------------------------------------------------------------===// // MTBUF Instructions @@ -1037,63 +1036,63 @@ defm IMAGE_GET_RESINFO : MIMG_NoSampler <0x0000000e, "image_get_resinfo">; //def IMAGE_ATOMIC_FCMPSWAP : MIMG_NoPattern_ <"image_atomic_fcmpswap", 0x0000001d>; //def IMAGE_ATOMIC_FMIN : MIMG_NoPattern_ <"image_atomic_fmin", 0x0000001e>; //def IMAGE_ATOMIC_FMAX : MIMG_NoPattern_ <"image_atomic_fmax", 0x0000001f>; -defm IMAGE_SAMPLE : MIMG_Sampler <0x00000020, "image_sample">; -defm IMAGE_SAMPLE_CL : MIMG_Sampler <0x00000021, "image_sample_cl">; +defm IMAGE_SAMPLE : MIMG_Sampler_WQM <0x00000020, "image_sample">; +defm IMAGE_SAMPLE_CL : MIMG_Sampler_WQM <0x00000021, "image_sample_cl">; defm IMAGE_SAMPLE_D : MIMG_Sampler <0x00000022, "image_sample_d">; defm IMAGE_SAMPLE_D_CL : MIMG_Sampler <0x00000023, "image_sample_d_cl">; defm IMAGE_SAMPLE_L : MIMG_Sampler <0x00000024, "image_sample_l">; -defm IMAGE_SAMPLE_B : MIMG_Sampler <0x00000025, "image_sample_b">; -defm IMAGE_SAMPLE_B_CL : MIMG_Sampler <0x00000026, "image_sample_b_cl">; +defm IMAGE_SAMPLE_B : MIMG_Sampler_WQM <0x00000025, "image_sample_b">; +defm IMAGE_SAMPLE_B_CL : MIMG_Sampler_WQM <0x00000026, "image_sample_b_cl">; defm IMAGE_SAMPLE_LZ : MIMG_Sampler <0x00000027, "image_sample_lz">; -defm IMAGE_SAMPLE_C : MIMG_Sampler <0x00000028, "image_sample_c">; -defm IMAGE_SAMPLE_C_CL : MIMG_Sampler <0x00000029, "image_sample_c_cl">; +defm IMAGE_SAMPLE_C : MIMG_Sampler_WQM <0x00000028, "image_sample_c">; +defm IMAGE_SAMPLE_C_CL : MIMG_Sampler_WQM <0x00000029, "image_sample_c_cl">; defm IMAGE_SAMPLE_C_D : MIMG_Sampler <0x0000002a, "image_sample_c_d">; defm IMAGE_SAMPLE_C_D_CL : MIMG_Sampler <0x0000002b, "image_sample_c_d_cl">; defm IMAGE_SAMPLE_C_L : MIMG_Sampler <0x0000002c, "image_sample_c_l">; -defm IMAGE_SAMPLE_C_B : MIMG_Sampler <0x0000002d, "image_sample_c_b">; -defm IMAGE_SAMPLE_C_B_CL : MIMG_Sampler <0x0000002e, "image_sample_c_b_cl">; +defm IMAGE_SAMPLE_C_B : MIMG_Sampler_WQM <0x0000002d, "image_sample_c_b">; +defm IMAGE_SAMPLE_C_B_CL : MIMG_Sampler_WQM <0x0000002e, "image_sample_c_b_cl">; defm IMAGE_SAMPLE_C_LZ : MIMG_Sampler <0x0000002f, "image_sample_c_lz">; -defm IMAGE_SAMPLE_O : MIMG_Sampler <0x00000030, "image_sample_o">; -defm IMAGE_SAMPLE_CL_O : MIMG_Sampler <0x00000031, "image_sample_cl_o">; +defm IMAGE_SAMPLE_O : MIMG_Sampler_WQM <0x00000030, "image_sample_o">; +defm IMAGE_SAMPLE_CL_O : MIMG_Sampler_WQM <0x00000031, "image_sample_cl_o">; defm IMAGE_SAMPLE_D_O : MIMG_Sampler <0x00000032, "image_sample_d_o">; defm IMAGE_SAMPLE_D_CL_O : MIMG_Sampler <0x00000033, "image_sample_d_cl_o">; defm IMAGE_SAMPLE_L_O : MIMG_Sampler <0x00000034, "image_sample_l_o">; -defm IMAGE_SAMPLE_B_O : MIMG_Sampler <0x00000035, "image_sample_b_o">; -defm IMAGE_SAMPLE_B_CL_O : MIMG_Sampler <0x00000036, "image_sample_b_cl_o">; +defm IMAGE_SAMPLE_B_O : MIMG_Sampler_WQM <0x00000035, "image_sample_b_o">; +defm IMAGE_SAMPLE_B_CL_O : MIMG_Sampler_WQM <0x00000036, "image_sample_b_cl_o">; defm IMAGE_SAMPLE_LZ_O : MIMG_Sampler <0x00000037, "image_sample_lz_o">; -defm IMAGE_SAMPLE_C_O : MIMG_Sampler <0x00000038, "image_sample_c_o">; -defm IMAGE_SAMPLE_C_CL_O : MIMG_Sampler <0x00000039, "image_sample_c_cl_o">; +defm IMAGE_SAMPLE_C_O : MIMG_Sampler_WQM <0x00000038, "image_sample_c_o">; +defm IMAGE_SAMPLE_C_CL_O : MIMG_Sampler_WQM <0x00000039, "image_sample_c_cl_o">; defm IMAGE_SAMPLE_C_D_O : MIMG_Sampler <0x0000003a, "image_sample_c_d_o">; defm IMAGE_SAMPLE_C_D_CL_O : MIMG_Sampler <0x0000003b, "image_sample_c_d_cl_o">; defm IMAGE_SAMPLE_C_L_O : MIMG_Sampler <0x0000003c, "image_sample_c_l_o">; -defm IMAGE_SAMPLE_C_B_O : MIMG_Sampler <0x0000003d, "image_sample_c_b_o">; -defm IMAGE_SAMPLE_C_B_CL_O : MIMG_Sampler <0x0000003e, "image_sample_c_b_cl_o">; +defm IMAGE_SAMPLE_C_B_O : MIMG_Sampler_WQM <0x0000003d, "image_sample_c_b_o">; +defm IMAGE_SAMPLE_C_B_CL_O : MIMG_Sampler_WQM <0x0000003e, "image_sample_c_b_cl_o">; defm IMAGE_SAMPLE_C_LZ_O : MIMG_Sampler <0x0000003f, "image_sample_c_lz_o">; -defm IMAGE_GATHER4 : MIMG_Gather <0x00000040, "image_gather4">; -defm IMAGE_GATHER4_CL : MIMG_Gather <0x00000041, "image_gather4_cl">; +defm IMAGE_GATHER4 : MIMG_Gather_WQM <0x00000040, "image_gather4">; +defm IMAGE_GATHER4_CL : MIMG_Gather_WQM <0x00000041, "image_gather4_cl">; defm IMAGE_GATHER4_L : MIMG_Gather <0x00000044, "image_gather4_l">; -defm IMAGE_GATHER4_B : MIMG_Gather <0x00000045, "image_gather4_b">; -defm IMAGE_GATHER4_B_CL : MIMG_Gather <0x00000046, "image_gather4_b_cl">; +defm IMAGE_GATHER4_B : MIMG_Gather_WQM <0x00000045, "image_gather4_b">; +defm IMAGE_GATHER4_B_CL : MIMG_Gather_WQM <0x00000046, "image_gather4_b_cl">; defm IMAGE_GATHER4_LZ : MIMG_Gather <0x00000047, "image_gather4_lz">; -defm IMAGE_GATHER4_C : MIMG_Gather <0x00000048, "image_gather4_c">; -defm IMAGE_GATHER4_C_CL : MIMG_Gather <0x00000049, "image_gather4_c_cl">; +defm IMAGE_GATHER4_C : MIMG_Gather_WQM <0x00000048, "image_gather4_c">; +defm IMAGE_GATHER4_C_CL : MIMG_Gather_WQM <0x00000049, "image_gather4_c_cl">; defm IMAGE_GATHER4_C_L : MIMG_Gather <0x0000004c, "image_gather4_c_l">; -defm IMAGE_GATHER4_C_B : MIMG_Gather <0x0000004d, "image_gather4_c_b">; -defm IMAGE_GATHER4_C_B_CL : MIMG_Gather <0x0000004e, "image_gather4_c_b_cl">; +defm IMAGE_GATHER4_C_B : MIMG_Gather_WQM <0x0000004d, "image_gather4_c_b">; +defm IMAGE_GATHER4_C_B_CL : MIMG_Gather_WQM <0x0000004e, "image_gather4_c_b_cl">; defm IMAGE_GATHER4_C_LZ : MIMG_Gather <0x0000004f, "image_gather4_c_lz">; -defm IMAGE_GATHER4_O : MIMG_Gather <0x00000050, "image_gather4_o">; -defm IMAGE_GATHER4_CL_O : MIMG_Gather <0x00000051, "image_gather4_cl_o">; +defm IMAGE_GATHER4_O : MIMG_Gather_WQM <0x00000050, "image_gather4_o">; +defm IMAGE_GATHER4_CL_O : MIMG_Gather_WQM <0x00000051, "image_gather4_cl_o">; defm IMAGE_GATHER4_L_O : MIMG_Gather <0x00000054, "image_gather4_l_o">; -defm IMAGE_GATHER4_B_O : MIMG_Gather <0x00000055, "image_gather4_b_o">; +defm IMAGE_GATHER4_B_O : MIMG_Gather_WQM <0x00000055, "image_gather4_b_o">; defm IMAGE_GATHER4_B_CL_O : MIMG_Gather <0x00000056, "image_gather4_b_cl_o">; defm IMAGE_GATHER4_LZ_O : MIMG_Gather <0x00000057, "image_gather4_lz_o">; -defm IMAGE_GATHER4_C_O : MIMG_Gather <0x00000058, "image_gather4_c_o">; -defm IMAGE_GATHER4_C_CL_O : MIMG_Gather <0x00000059, "image_gather4_c_cl_o">; +defm IMAGE_GATHER4_C_O : MIMG_Gather_WQM <0x00000058, "image_gather4_c_o">; +defm IMAGE_GATHER4_C_CL_O : MIMG_Gather_WQM <0x00000059, "image_gather4_c_cl_o">; defm IMAGE_GATHER4_C_L_O : MIMG_Gather <0x0000005c, "image_gather4_c_l_o">; -defm IMAGE_GATHER4_C_B_O : MIMG_Gather <0x0000005d, "image_gather4_c_b_o">; -defm IMAGE_GATHER4_C_B_CL_O : MIMG_Gather <0x0000005e, "image_gather4_c_b_cl_o">; +defm IMAGE_GATHER4_C_B_O : MIMG_Gather_WQM <0x0000005d, "image_gather4_c_b_o">; +defm IMAGE_GATHER4_C_B_CL_O : MIMG_Gather_WQM <0x0000005e, "image_gather4_c_b_cl_o">; defm IMAGE_GATHER4_C_LZ_O : MIMG_Gather <0x0000005f, "image_gather4_c_lz_o">; -defm IMAGE_GET_LOD : MIMG_Sampler <0x00000060, "image_get_lod">; +defm IMAGE_GET_LOD : MIMG_Sampler_WQM <0x00000060, "image_get_lod">; defm IMAGE_SAMPLE_CD : MIMG_Sampler <0x00000068, "image_sample_cd">; defm IMAGE_SAMPLE_CD_CL : MIMG_Sampler <0x00000069, "image_sample_cd_cl">; defm IMAGE_SAMPLE_C_CD : MIMG_Sampler <0x0000006a, "image_sample_c_cd">; @@ -1445,53 +1444,37 @@ defm V_MIN_F32 : VOP2Inst , "v_min_f32", VOP_F32_F32_F32, fminnum>; defm V_MAX_F32 : VOP2Inst , "v_max_f32", VOP_F32_F32_F32, fmaxnum>; -defm V_MIN_I32 : VOP2Inst , "v_min_i32", VOP_I32_I32_I32, - AMDGPUsmin ->; -defm V_MAX_I32 : VOP2Inst , "v_max_i32", VOP_I32_I32_I32, - AMDGPUsmax ->; -defm V_MIN_U32 : VOP2Inst , "v_min_u32", VOP_I32_I32_I32, - AMDGPUumin ->; -defm V_MAX_U32 : VOP2Inst , "v_max_u32", VOP_I32_I32_I32, - AMDGPUumax ->; +defm V_MIN_I32 : VOP2Inst , "v_min_i32", VOP_I32_I32_I32>; +defm V_MAX_I32 : VOP2Inst , "v_max_i32", VOP_I32_I32_I32>; +defm V_MIN_U32 : VOP2Inst , "v_min_u32", VOP_I32_I32_I32>; +defm V_MAX_U32 : VOP2Inst , "v_max_u32", VOP_I32_I32_I32>; -// No non-Rev Op on VI defm V_LSHRREV_B32 : VOP2Inst < vop2<0x16, 0x10>, "v_lshrrev_b32", VOP_I32_I32_I32, null_frag, - "v_lshr_b32", "v_lshrrev_b32" + "v_lshr_b32" >; -// No non-Rev OP on VI defm V_ASHRREV_I32 : VOP2Inst < vop2<0x18, 0x11>, "v_ashrrev_i32", VOP_I32_I32_I32, null_frag, - "v_ashr_i32", "v_ashrrev_i32" + "v_ashr_i32" >; -// No non-Rev OP on VI defm V_LSHLREV_B32 : VOP2Inst < vop2<0x1a, 0x12>, "v_lshlrev_b32", VOP_I32_I32_I32, null_frag, - "v_lshl_b32", "v_lshlrev_b32" + "v_lshl_b32" >; -defm V_AND_B32 : VOP2Inst , "v_and_b32", - VOP_I32_I32_I32, and>; -defm V_OR_B32 : VOP2Inst , "v_or_b32", - VOP_I32_I32_I32, or ->; -defm V_XOR_B32 : VOP2Inst , "v_xor_b32", - VOP_I32_I32_I32, xor ->; +defm V_AND_B32 : VOP2Inst , "v_and_b32", VOP_I32_I32_I32>; +defm V_OR_B32 : VOP2Inst , "v_or_b32", VOP_I32_I32_I32>; +defm V_XOR_B32 : VOP2Inst , "v_xor_b32", VOP_I32_I32_I32>; defm V_MAC_F32 : VOP2Inst , "v_mac_f32", VOP_F32_F32_F32>; } // End isCommutable = 1 -defm V_MADMK_F32 : VOP2Inst , "v_madmk_f32", VOP_F32_F32_F32>; +defm V_MADMK_F32 : VOP2MADK , "v_madmk_f32">; let isCommutable = 1 in { -defm V_MADAK_F32 : VOP2Inst , "v_madak_f32", VOP_F32_F32_F32>; +defm V_MADAK_F32 : VOP2MADK , "v_madak_f32">; } // End isCommutable = 1 let isCommutable = 1, Defs = [VCC] in { // Carry-out goes to VCC @@ -1503,9 +1486,7 @@ let isCommutable = 1, Defs = [VCC] in { // Carry-out goes to VCC defm V_ADD_I32 : VOP2bInst , "v_add_i32", VOP_I32_I32_I32, add >; -defm V_SUB_I32 : VOP2bInst , "v_sub_i32", - VOP_I32_I32_I32, sub ->; +defm V_SUB_I32 : VOP2bInst , "v_sub_i32", VOP_I32_I32_I32>; defm V_SUBREV_I32 : VOP2bInst , "v_subrev_i32", VOP_I32_I32_I32, null_frag, "v_sub_i32" @@ -1513,10 +1494,10 @@ defm V_SUBREV_I32 : VOP2bInst , "v_subrev_i32", let Uses = [VCC] in { // Carry-in comes from VCC defm V_ADDC_U32 : VOP2bInst , "v_addc_u32", - VOP_I32_I32_I32_VCC, adde + VOP_I32_I32_I32_VCC >; defm V_SUBB_U32 : VOP2bInst , "v_subb_u32", - VOP_I32_I32_I32_VCC, sube + VOP_I32_I32_I32_VCC >; defm V_SUBBREV_U32 : VOP2bInst , "v_subbrev_u32", VOP_I32_I32_I32_VCC, null_frag, "v_subb_u32" @@ -1529,47 +1510,41 @@ defm V_READLANE_B32 : VOP2SI_3VI_m < vop3 <0x001, 0x289>, "v_readlane_b32", (outs SReg_32:$vdst), - (ins VGPR_32:$src0, SSrc_32:$vsrc1), - "v_readlane_b32 $vdst, $src0, $vsrc1" + (ins VGPR_32:$src0, SCSrc_32:$src1), + "v_readlane_b32 $vdst, $src0, $src1" >; defm V_WRITELANE_B32 : VOP2SI_3VI_m < vop3 <0x002, 0x28a>, "v_writelane_b32", (outs VGPR_32:$vdst), - (ins SReg_32:$src0, SSrc_32:$vsrc1), - "v_writelane_b32 $vdst, $src0, $vsrc1" + (ins SReg_32:$src0, SCSrc_32:$src1), + "v_writelane_b32 $vdst, $src0, $src1" >; // These instructions only exist on SI and CI let SubtargetPredicate = isSICI in { -let isCommutable = 1 in { -defm V_MAC_LEGACY_F32 : VOP2Inst , "v_mac_legacy_f32", - VOP_F32_F32_F32 ->; -} // End isCommutable = 1 - -defm V_MIN_LEGACY_F32 : VOP2Inst , "v_min_legacy_f32", +defm V_MIN_LEGACY_F32 : VOP2InstSI , "v_min_legacy_f32", VOP_F32_F32_F32, AMDGPUfmin_legacy >; -defm V_MAX_LEGACY_F32 : VOP2Inst , "v_max_legacy_f32", +defm V_MAX_LEGACY_F32 : VOP2InstSI , "v_max_legacy_f32", VOP_F32_F32_F32, AMDGPUfmax_legacy >; let isCommutable = 1 in { -defm V_LSHR_B32 : VOP2Inst , "v_lshr_b32", VOP_I32_I32_I32, srl>; -defm V_ASHR_I32 : VOP2Inst , "v_ashr_i32", - VOP_I32_I32_I32, sra ->; - -let hasPostISelHook = 1 in { -defm V_LSHL_B32 : VOP2Inst , "v_lshl_b32", VOP_I32_I32_I32, shl>; -} - +defm V_LSHR_B32 : VOP2InstSI , "v_lshr_b32", VOP_I32_I32_I32>; +defm V_ASHR_I32 : VOP2InstSI , "v_ashr_i32", VOP_I32_I32_I32>; +defm V_LSHL_B32 : VOP2InstSI , "v_lshl_b32", VOP_I32_I32_I32>; } // End isCommutable = 1 } // End let SubtargetPredicate = SICI +let isCommutable = 1 in { +defm V_MAC_LEGACY_F32 : VOP2_VI3_Inst , "v_mac_legacy_f32", + VOP_F32_F32_F32 +>; +} // End isCommutable = 1 + defm V_BFM_B32 : VOP2_VI3_Inst , "v_bfm_b32", VOP_I32_I32_I32, AMDGPUbfm >; @@ -1586,14 +1561,25 @@ defm V_LDEXP_F32 : VOP2_VI3_Inst , "v_ldexp_f32", VOP_F32_F32_I32, AMDGPUldexp >; -////def V_CVT_PKACCUM_U8_F32 : VOP2_U8 <0x0000002c, "v_cvt_pkaccum_u8_f32", []>; -////def V_CVT_PKNORM_I16_F32 : VOP2_I16 <0x0000002d, "v_cvt_pknorm_i16_f32", []>; -////def V_CVT_PKNORM_U16_F32 : VOP2_U16 <0x0000002e, "v_cvt_pknorm_u16_f32", []>; -defm V_CVT_PKRTZ_F16_F32 : VOP2_VI3_Inst , "v_cvt_pkrtz_f16_f32", - VOP_I32_F32_F32, int_SI_packf16 + +defm V_CVT_PKACCUM_U8_F32 : VOP2_VI3_Inst , "v_cvt_pkaccum_u8_f32", + VOP_I32_F32_I32>; // TODO: set "Uses = dst" + +defm V_CVT_PKNORM_I16_F32 : VOP2_VI3_Inst , "v_cvt_pknorm_i16_f32", + VOP_I32_F32_F32 +>; +defm V_CVT_PKNORM_U16_F32 : VOP2_VI3_Inst , "v_cvt_pknorm_u16_f32", + VOP_I32_F32_F32 +>; +defm V_CVT_PKRTZ_F16_F32 : VOP2_VI3_Inst , "v_cvt_pkrtz_f16_f32", + VOP_I32_F32_F32, int_SI_packf16 +>; +defm V_CVT_PK_U16_U32 : VOP2_VI3_Inst , "v_cvt_pk_u16_u32", + VOP_I32_I32_I32 +>; +defm V_CVT_PK_I16_I32 : VOP2_VI3_Inst , "v_cvt_pk_i16_i32", + VOP_I32_I32_I32 >; -////def V_CVT_PK_U16_U32 : VOP2_U16 <0x00000030, "v_cvt_pk_u16_u32", []>; -////def V_CVT_PK_I16_I32 : VOP2_I16 <0x00000031, "v_cvt_pk_i16_i32", []>; //===----------------------------------------------------------------------===// // VOP3 Instructions @@ -1659,27 +1645,34 @@ defm V_ALIGNBYTE_B32 : VOP3Inst , "v_alignbyte_b32", VOP_I32_I32_I32_I32 >; -defm V_MIN3_F32 : VOP3Inst , "v_min3_f32", +defm V_MIN3_F32 : VOP3Inst , "v_min3_f32", VOP_F32_F32_F32_F32, AMDGPUfmin3>; -defm V_MIN3_I32 : VOP3Inst , "v_min3_i32", +defm V_MIN3_I32 : VOP3Inst , "v_min3_i32", VOP_I32_I32_I32_I32, AMDGPUsmin3 >; -defm V_MIN3_U32 : VOP3Inst , "v_min3_u32", +defm V_MIN3_U32 : VOP3Inst , "v_min3_u32", VOP_I32_I32_I32_I32, AMDGPUumin3 >; -defm V_MAX3_F32 : VOP3Inst , "v_max3_f32", +defm V_MAX3_F32 : VOP3Inst , "v_max3_f32", VOP_F32_F32_F32_F32, AMDGPUfmax3 >; -defm V_MAX3_I32 : VOP3Inst , "v_max3_i32", +defm V_MAX3_I32 : VOP3Inst , "v_max3_i32", VOP_I32_I32_I32_I32, AMDGPUsmax3 >; -defm V_MAX3_U32 : VOP3Inst , "v_max3_u32", +defm V_MAX3_U32 : VOP3Inst , "v_max3_u32", VOP_I32_I32_I32_I32, AMDGPUumax3 >; -//def V_MED3_F32 : VOP3_MED3 <0x00000157, "v_med3_f32", []>; -//def V_MED3_I32 : VOP3_MED3 <0x00000158, "v_med3_i32", []>; -//def V_MED3_U32 : VOP3_MED3 <0x00000159, "v_med3_u32", []>; +defm V_MED3_F32 : VOP3Inst , "v_med3_f32", + VOP_F32_F32_F32_F32 +>; +defm V_MED3_I32 : VOP3Inst , "v_med3_i32", + VOP_I32_I32_I32_I32 +>; +defm V_MED3_U32 : VOP3Inst , "v_med3_u32", + VOP_I32_I32_I32_I32 +>; + //def V_SAD_U8 : VOP3_U8 <0x0000015a, "v_sad_u8", []>; //def V_SAD_HI_U8 : VOP3_U8 <0x0000015b, "v_sad_hi_u8", []>; //def V_SAD_U16 : VOP3_U16 <0x0000015c, "v_sad_u16", []>; @@ -1742,21 +1735,36 @@ defm V_MUL_HI_I32 : VOP3Inst , "v_mul_hi_i32", } // isCommutable = 1, SchedRW = [WriteQuarterRate32] +let SchedRW = [WriteFloatFMA, WriteSALU] in { defm V_DIV_SCALE_F32 : VOP3b_32 , "v_div_scale_f32", []>; +} -let SchedRW = [WriteDouble] in { +let SchedRW = [WriteDouble, WriteSALU] in { // Double precision division pre-scale. defm V_DIV_SCALE_F64 : VOP3b_64 , "v_div_scale_f64", []>; } // let SchedRW = [WriteDouble] -let isCommutable = 1 in { -defm V_DIV_FMAS_F32 : VOP3Inst , "v_div_fmas_f32", +let isCommutable = 1, Uses = [VCC] in { + +// v_div_fmas_f32: +// result = src0 * src1 + src2 +// if (vcc) +// result *= 2^32 +// +defm V_DIV_FMAS_F32 : VOP3_VCC_Inst , "v_div_fmas_f32", VOP_F32_F32_F32_F32, AMDGPUdiv_fmas >; + let SchedRW = [WriteDouble] in { -defm V_DIV_FMAS_F64 : VOP3Inst , "v_div_fmas_f64", +// v_div_fmas_f64: +// result = src0 * src1 + src2 +// if (vcc) +// result *= 2^64 +// +defm V_DIV_FMAS_F64 : VOP3_VCC_Inst , "v_div_fmas_f64", VOP_F64_F64_F64_F64, AMDGPUdiv_fmas >; + } // End SchedRW = [WriteDouble] } // End isCommutable = 1 @@ -1774,23 +1782,29 @@ defm V_TRIG_PREOP_F64 : VOP3Inst < // These instructions only exist on SI and CI let SubtargetPredicate = isSICI in { -defm V_LSHL_B64 : VOP3Inst , "v_lshl_b64", - VOP_I64_I64_I32, shl ->; - -defm V_LSHR_B64 : VOP3Inst , "v_lshr_b64", - VOP_I64_I64_I32, srl ->; - -defm V_ASHR_I64 : VOP3Inst , "v_ashr_i64", - VOP_I64_I64_I32, sra ->; +defm V_LSHL_B64 : VOP3Inst , "v_lshl_b64", VOP_I64_I64_I32>; +defm V_LSHR_B64 : VOP3Inst , "v_lshr_b64", VOP_I64_I64_I32>; +defm V_ASHR_I64 : VOP3Inst , "v_ashr_i64", VOP_I64_I64_I32>; defm V_MULLIT_F32 : VOP3Inst , "v_mullit_f32", VOP_F32_F32_F32_F32>; } // End SubtargetPredicate = isSICI +let SubtargetPredicate = isVI in { + +defm V_LSHLREV_B64 : VOP3Inst , "v_lshlrev_b64", + VOP_I64_I32_I64 +>; +defm V_LSHRREV_B64 : VOP3Inst , "v_lshrrev_b64", + VOP_I64_I32_I64 +>; +defm V_ASHRREV_I64 : VOP3Inst , "v_ashrrev_i64", + VOP_I64_I32_I64 +>; + +} // End SubtargetPredicate = isVI + //===----------------------------------------------------------------------===// // Pseudo Instructions //===----------------------------------------------------------------------===// @@ -1809,8 +1823,8 @@ def SGPR_USE : InstSI <(outs),(ins), "", []>; // SI pseudo instructions. These are used by the CFG structurizer pass // and should be lowered to ISA instructions prior to codegen. -let mayLoad = 1, mayStore = 1, hasSideEffects = 1, - Uses = [EXEC], Defs = [EXEC] in { +let mayLoad = 1, mayStore = 1, hasSideEffects = 1 in { +let Uses = [EXEC], Defs = [EXEC] in { let isBranch = 1, isTerminator = 1 in { @@ -1867,15 +1881,18 @@ def SI_END_CF : InstSI < [(int_SI_end_cf i64:$saved)] >; +} // End Uses = [EXEC], Defs = [EXEC] + +let Uses = [EXEC], Defs = [EXEC,VCC] in { def SI_KILL : InstSI < (outs), (ins VSrc_32:$src), "si_kill $src", [(int_AMDGPU_kill f32:$src)] >; +} // End Uses = [EXEC], Defs = [EXEC,VCC] } // end mayLoad = 1, mayStore = 1, hasSideEffects = 1 - // Uses = [EXEC], Defs = [EXEC] let Uses = [EXEC], Defs = [EXEC,VCC,M0] in { @@ -2020,16 +2037,12 @@ def : Pat < (SI_KILL 0xbf800000) >; -let Predicates = [isSICI] in { - /* int_SI_vs_load_input */ def : Pat< (SIload_input v4i32:$tlst, imm:$attr_offset, i32:$buf_idx_vgpr), (BUFFER_LOAD_FORMAT_XYZW_IDXEN $tlst, $buf_idx_vgpr, imm:$attr_offset, 0, 0, 0, 0) >; -} // End Predicates = [isSICI] - /* int_SI_export */ def : Pat < (int_SI_export imm:$en, imm:$vm, imm:$done, imm:$tgt, imm:$compr, @@ -2156,9 +2169,13 @@ def : Pat < //===----------------------------------------------------------------------===// let Predicates = [UnsafeFPMath] in { -def : RcpPat; -defm : RsqPat; -defm : RsqPat; + +//def : RcpPat; +//defm : RsqPat; +//defm : RsqPat; + +def : RsqPat; +def : RsqPat; } //===----------------------------------------------------------------------===// @@ -2675,13 +2692,6 @@ def : Pat < (V_MUL_LEGACY_F32_e32 $src0, (V_RCP_LEGACY_F32_e32 $src1)) >; -def : Pat< - (fdiv f64:$src0, f64:$src1), - (V_MUL_F64 0 /* src0_modifiers */, $src0, - 0 /* src1_modifiers */, (V_RCP_F64_e32 $src1), - 0 /* clamp */, 0 /* omod */) ->; - def : Pat < (int_AMDGPU_cube v4f32:$src), (REG_SEQUENCE VReg_128, @@ -2716,16 +2726,12 @@ class Ext32Pat : Pat < def : Ext32Pat ; def : Ext32Pat ; -let Predicates = [isSICI] in { - // Offset in an 32Bit VGPR def : Pat < (SIload_constant v4i32:$sbase, i32:$voff), (BUFFER_LOAD_DWORD_OFFEN $sbase, $voff, 0, 0, 0, 0, 0) >; -} // End Predicates = [isSICI] - // The multiplication scales from [0,1] to the unsigned integer range def : Pat < (AMDGPUurecip i32:$src0), @@ -2907,7 +2913,6 @@ class MUBUFScratchLoadPat : Pat < (Instr $srsrc, $vaddr, $soffset, $offset, 0, 0, 0) >; -let Predicates = [isSICI] in { def : MUBUFScratchLoadPat ; def : MUBUFScratchLoadPat ; def : MUBUFScratchLoadPat ; @@ -2915,7 +2920,6 @@ def : MUBUFScratchLoadPat ; def : MUBUFScratchLoadPat ; def : MUBUFScratchLoadPat ; def : MUBUFScratchLoadPat ; -} // End Predicates = [isSICI] // BUFFER_LOAD_DWORD*, addr64=0 multiclass MUBUF_Load_Dword ; } -let Predicates = [isSICI] in { defm : MUBUF_Load_Dword ; defm : MUBUF_Load_Dword ; defm : MUBUF_Load_Dword ; -} // End Predicates = [isSICI] class MUBUFScratchStorePat : Pat < (st vt:$value, (MUBUFScratch v4i32:$srsrc, i32:$vaddr, i32:$soffset, @@ -2969,13 +2971,11 @@ class MUBUFScratchStorePat : Pat < (Instr $value, $srsrc, $vaddr, $soffset, $offset, 0, 0, 0) >; -let Predicates = [isSICI] in { def : MUBUFScratchStorePat ; def : MUBUFScratchStorePat ; def : MUBUFScratchStorePat ; def : MUBUFScratchStorePat ; def : MUBUFScratchStorePat ; -} // End Predicates = [isSICI] /* class MUBUFStore_Pattern : Pat < @@ -3245,6 +3245,12 @@ def : Pat < (V_CMP_EQ_I32_e64 (V_AND_B32_e64 (i32 1), $a), 1) >; +def : Pat < + (i1 (trunc i64:$a)), + (V_CMP_EQ_I32_e64 (V_AND_B32_e64 (i32 1), + (EXTRACT_SUBREG $a, sub0)), 1) +>; + def : Pat < (i32 (bswap i32:$a)), (V_BFI_B32 (S_MOV_B32 0x00ff00ff), @@ -3257,6 +3263,28 @@ def : Pat < (V_CNDMASK_B32_e64 $src0, $src1, $src2) >; +//===----------------------------------------------------------------------===// +// Fract Patterns +//===----------------------------------------------------------------------===// + +let Predicates = [isCI] in { + +// Convert (x - floor(x)) to fract(x) +def : Pat < + (f32 (fsub (f32 (VOP3Mods f32:$x, i32:$mods)), + (f32 (ffloor (f32 (VOP3Mods f32:$x, i32:$mods)))))), + (V_FRACT_F32_e64 $mods, $x, DSTCLAMP.NONE, DSTOMOD.NONE) +>; + +// Convert (x + (-floor(x))) to fract(x) +def : Pat < + (f64 (fadd (f64 (VOP3Mods f64:$x, i32:$mods)), + (f64 (fneg (f64 (ffloor (f64 (VOP3Mods f64:$x, i32:$mods)))))))), + (V_FRACT_F64_e64 $mods, $x, DSTCLAMP.NONE, DSTOMOD.NONE) +>; + +} // End Predicates = [isCI] + //============================================================================// // Miscellaneous Optimization Patterns //============================================================================// diff --git a/contrib/llvm/lib/Target/R600/SILowerControlFlow.cpp b/contrib/llvm/lib/Target/R600/SILowerControlFlow.cpp index 068b22f37704..c319b32111fe 100644 --- a/contrib/llvm/lib/Target/R600/SILowerControlFlow.cpp +++ b/contrib/llvm/lib/Target/R600/SILowerControlFlow.cpp @@ -88,7 +88,8 @@ class SILowerControlFlowPass : public MachineFunctionPass { void Kill(MachineInstr &MI); void Branch(MachineInstr &MI); - void LoadM0(MachineInstr &MI, MachineInstr *MovRel); + void LoadM0(MachineInstr &MI, MachineInstr *MovRel, int Offset = 0); + void computeIndirectRegAndOffset(unsigned VecReg, unsigned &Reg, int &Offset); void IndirectSrc(MachineInstr &MI); void IndirectDst(MachineInstr &MI); @@ -323,7 +324,7 @@ void SILowerControlFlowPass::Kill(MachineInstr &MI) { MI.eraseFromParent(); } -void SILowerControlFlowPass::LoadM0(MachineInstr &MI, MachineInstr *MovRel) { +void SILowerControlFlowPass::LoadM0(MachineInstr &MI, MachineInstr *MovRel, int Offset) { MachineBasicBlock &MBB = *MI.getParent(); DebugLoc DL = MI.getDebugLoc(); @@ -333,8 +334,14 @@ void SILowerControlFlowPass::LoadM0(MachineInstr &MI, MachineInstr *MovRel) { unsigned Idx = MI.getOperand(3).getReg(); if (AMDGPU::SReg_32RegClass.contains(Idx)) { - BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_MOV_B32), AMDGPU::M0) - .addReg(Idx); + if (Offset) { + BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_ADD_I32), AMDGPU::M0) + .addReg(Idx) + .addImm(Offset); + } else { + BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_MOV_B32), AMDGPU::M0) + .addReg(Idx); + } MBB.insert(I, MovRel); } else { @@ -363,6 +370,11 @@ void SILowerControlFlowPass::LoadM0(MachineInstr &MI, MachineInstr *MovRel) { BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_AND_SAVEEXEC_B64), AMDGPU::VCC) .addReg(AMDGPU::VCC); + if (Offset) { + BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_ADD_I32), AMDGPU::M0) + .addReg(AMDGPU::M0) + .addImm(Offset); + } // Do the actual move MBB.insert(I, MovRel); @@ -384,6 +396,33 @@ void SILowerControlFlowPass::LoadM0(MachineInstr &MI, MachineInstr *MovRel) { MI.eraseFromParent(); } +/// \param @VecReg The register which holds element zero of the vector +/// being addressed into. +/// \param[out] @Reg The base register to use in the indirect addressing instruction. +/// \param[in,out] @Offset As an input, this is the constant offset part of the +// indirect Index. e.g. v0 = v[VecReg + Offset] +// As an output, this is a constant value that needs +// to be added to the value stored in M0. +void SILowerControlFlowPass::computeIndirectRegAndOffset(unsigned VecReg, + unsigned &Reg, + int &Offset) { + unsigned SubReg = TRI->getSubReg(VecReg, AMDGPU::sub0); + if (!SubReg) + SubReg = VecReg; + + const TargetRegisterClass *RC = TRI->getPhysRegClass(SubReg); + int RegIdx = TRI->getHWRegIndex(SubReg) + Offset; + + if (RegIdx < 0) { + Offset = RegIdx; + RegIdx = 0; + } else { + Offset = 0; + } + + Reg = RC->getRegister(RegIdx); +} + void SILowerControlFlowPass::IndirectSrc(MachineInstr &MI) { MachineBasicBlock &MBB = *MI.getParent(); @@ -391,18 +430,18 @@ void SILowerControlFlowPass::IndirectSrc(MachineInstr &MI) { unsigned Dst = MI.getOperand(0).getReg(); unsigned Vec = MI.getOperand(2).getReg(); - unsigned Off = MI.getOperand(4).getImm(); - unsigned SubReg = TRI->getSubReg(Vec, AMDGPU::sub0); - if (!SubReg) - SubReg = Vec; + int Off = MI.getOperand(4).getImm(); + unsigned Reg; + + computeIndirectRegAndOffset(Vec, Reg, Off); MachineInstr *MovRel = BuildMI(*MBB.getParent(), DL, TII->get(AMDGPU::V_MOVRELS_B32_e32), Dst) - .addReg(SubReg + Off) + .addReg(Reg) .addReg(AMDGPU::M0, RegState::Implicit) .addReg(Vec, RegState::Implicit); - LoadM0(MI, MovRel); + LoadM0(MI, MovRel, Off); } void SILowerControlFlowPass::IndirectDst(MachineInstr &MI) { @@ -411,20 +450,20 @@ void SILowerControlFlowPass::IndirectDst(MachineInstr &MI) { DebugLoc DL = MI.getDebugLoc(); unsigned Dst = MI.getOperand(0).getReg(); - unsigned Off = MI.getOperand(4).getImm(); + int Off = MI.getOperand(4).getImm(); unsigned Val = MI.getOperand(5).getReg(); - unsigned SubReg = TRI->getSubReg(Dst, AMDGPU::sub0); - if (!SubReg) - SubReg = Dst; + unsigned Reg; + + computeIndirectRegAndOffset(Dst, Reg, Off); MachineInstr *MovRel = BuildMI(*MBB.getParent(), DL, TII->get(AMDGPU::V_MOVRELD_B32_e32)) - .addReg(SubReg + Off, RegState::Define) + .addReg(Reg, RegState::Define) .addReg(Val) .addReg(AMDGPU::M0, RegState::Implicit) .addReg(Dst, RegState::Implicit); - LoadM0(MI, MovRel); + LoadM0(MI, MovRel, Off); } bool SILowerControlFlowPass::runOnMachineFunction(MachineFunction &MF) { @@ -447,7 +486,7 @@ bool SILowerControlFlowPass::runOnMachineFunction(MachineFunction &MF) { Next = std::next(I); MachineInstr &MI = *I; - if (TII->isDS(MI.getOpcode())) + if (TII->isWQM(MI.getOpcode()) || TII->isDS(MI.getOpcode())) NeedWQM = true; // Flat uses m0 in case it needs to access LDS. @@ -513,12 +552,6 @@ bool SILowerControlFlowPass::runOnMachineFunction(MachineFunction &MF) { case AMDGPU::SI_INDIRECT_DST_V16: IndirectDst(MI); break; - - case AMDGPU::V_INTERP_P1_F32: - case AMDGPU::V_INTERP_P2_F32: - case AMDGPU::V_INTERP_MOV_F32: - NeedWQM = true; - break; } } } diff --git a/contrib/llvm/lib/Target/R600/SIRegisterInfo.cpp b/contrib/llvm/lib/Target/R600/SIRegisterInfo.cpp index 58c2cd109680..f50299112604 100644 --- a/contrib/llvm/lib/Target/R600/SIRegisterInfo.cpp +++ b/contrib/llvm/lib/Target/R600/SIRegisterInfo.cpp @@ -14,7 +14,6 @@ #include "SIRegisterInfo.h" -#include "AMDGPUSubtarget.h" #include "SIInstrInfo.h" #include "SIMachineFunctionInfo.h" #include "llvm/CodeGen/MachineFrameInfo.h" @@ -47,13 +46,31 @@ BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const { Reserved.set(AMDGPU::VGPR255); Reserved.set(AMDGPU::VGPR254); + // Tonga and Iceland can only allocate a fixed number of SGPRs due + // to a hw bug. + if (ST.hasSGPRInitBug()) { + unsigned NumSGPRs = AMDGPU::SGPR_32RegClass.getNumRegs(); + // Reserve some SGPRs for FLAT_SCRATCH and VCC (4 SGPRs). + // Assume XNACK_MASK is unused. + unsigned Limit = AMDGPUSubtarget::FIXED_SGPR_COUNT_FOR_INIT_BUG - 4; + + for (unsigned i = Limit; i < NumSGPRs; ++i) { + unsigned Reg = AMDGPU::SGPR_32RegClass.getRegister(i); + MCRegAliasIterator R = MCRegAliasIterator(Reg, this, true); + + for (; R.isValid(); ++R) + Reserved.set(*R); + } + } + return Reserved; } unsigned SIRegisterInfo::getRegPressureSetLimit(unsigned Idx) const { // FIXME: We should adjust the max number of waves based on LDS size. - unsigned SGPRLimit = getNumSGPRsAllowed(ST.getMaxWavesPerCU()); + unsigned SGPRLimit = getNumSGPRsAllowed(ST.getGeneration(), + ST.getMaxWavesPerCU()); unsigned VGPRLimit = getNumVGPRsAllowed(ST.getMaxWavesPerCU()); for (regclass_iterator I = regclass_begin(), E = regclass_end(); @@ -204,7 +221,9 @@ void SIRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI, Ctx.emitError("Ran out of VGPRs for spilling SGPR"); } - BuildMI(*MBB, MI, DL, TII->get(AMDGPU::V_WRITELANE_B32), Spill.VGPR) + BuildMI(*MBB, MI, DL, + TII->getMCOpcodeFromPseudo(AMDGPU::V_WRITELANE_B32), + Spill.VGPR) .addReg(SubReg) .addImm(Spill.Lane); @@ -236,7 +255,9 @@ void SIRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI, if (isM0) SubReg = RS->scavengeRegister(&AMDGPU::SGPR_32RegClass, MI, 0); - BuildMI(*MBB, MI, DL, TII->get(AMDGPU::V_READLANE_B32), SubReg) + BuildMI(*MBB, MI, DL, + TII->getMCOpcodeFromPseudo(AMDGPU::V_READLANE_B32), + SubReg) .addReg(Spill.VGPR) .addImm(Spill.Lane) .addReg(MI->getOperand(0).getReg(), RegState::ImplicitDefine); @@ -245,7 +266,22 @@ void SIRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI, .addReg(SubReg); } } - TII->insertNOPs(MI, 3); + + // TODO: only do this when it is needed + switch (ST.getGeneration()) { + case AMDGPUSubtarget::SOUTHERN_ISLANDS: + // "VALU writes SGPR" -> "SMRD reads that SGPR" needs "S_NOP 3" on SI + TII->insertNOPs(MI, 3); + break; + case AMDGPUSubtarget::SEA_ISLANDS: + break; + default: // VOLCANIC_ISLANDS and later + // "VALU writes SGPR -> VMEM reads that SGPR" needs "S_NOP 4" on VI + // and later. This also applies to VALUs which write VCC, but we're + // unlikely to see VMEM use VCC. + TII->insertNOPs(MI, 4); + } + MI->eraseFromParent(); break; } @@ -490,14 +526,24 @@ unsigned SIRegisterInfo::getNumVGPRsAllowed(unsigned WaveCount) const { } } -unsigned SIRegisterInfo::getNumSGPRsAllowed(unsigned WaveCount) const { - switch(WaveCount) { - case 10: return 48; - case 9: return 56; - case 8: return 64; - case 7: return 72; - case 6: return 80; - case 5: return 96; - default: return 103; +unsigned SIRegisterInfo::getNumSGPRsAllowed(AMDGPUSubtarget::Generation gen, + unsigned WaveCount) const { + if (gen >= AMDGPUSubtarget::VOLCANIC_ISLANDS) { + switch (WaveCount) { + case 10: return 80; + case 9: return 80; + case 8: return 96; + default: return 102; + } + } else { + switch(WaveCount) { + case 10: return 48; + case 9: return 56; + case 8: return 64; + case 7: return 72; + case 6: return 80; + case 5: return 96; + default: return 103; + } } } diff --git a/contrib/llvm/lib/Target/R600/SIRegisterInfo.h b/contrib/llvm/lib/Target/R600/SIRegisterInfo.h index d908ffd12d2c..1dfe53093eb4 100644 --- a/contrib/llvm/lib/Target/R600/SIRegisterInfo.h +++ b/contrib/llvm/lib/Target/R600/SIRegisterInfo.h @@ -17,6 +17,7 @@ #define LLVM_LIB_TARGET_R600_SIREGISTERINFO_H #include "AMDGPURegisterInfo.h" +#include "AMDGPUSubtarget.h" #include "llvm/Support/Debug.h" namespace llvm { @@ -111,7 +112,8 @@ struct SIRegisterInfo : public AMDGPURegisterInfo { /// \brief Give the maximum number of SGPRs that can be used by \p WaveCount /// concurrent waves. - unsigned getNumSGPRsAllowed(unsigned WaveCount) const; + unsigned getNumSGPRsAllowed(AMDGPUSubtarget::Generation gen, + unsigned WaveCount) const; unsigned findUnusedRegister(const MachineRegisterInfo &MRI, const TargetRegisterClass *RC) const; diff --git a/contrib/llvm/lib/Target/R600/SIRegisterInfo.td b/contrib/llvm/lib/Target/R600/SIRegisterInfo.td index 1a1efb0c89a9..c63f30508f63 100644 --- a/contrib/llvm/lib/Target/R600/SIRegisterInfo.td +++ b/contrib/llvm/lib/Target/R600/SIRegisterInfo.td @@ -209,7 +209,9 @@ def VReg_256 : RegisterClass<"AMDGPU", [v32i8, v8i32, v8f32], 256, (add VGPR_256 def VReg_512 : RegisterClass<"AMDGPU", [v16i32, v16f32], 512, (add VGPR_512)>; -def VReg_1 : RegisterClass<"AMDGPU", [i1], 32, (add VGPR_32)>; +def VReg_1 : RegisterClass<"AMDGPU", [i1], 32, (add VGPR_32)> { + let Size = 32; +} class RegImmOperand : RegisterOperand { let OperandNamespace = "AMDGPU"; diff --git a/contrib/llvm/lib/Target/R600/VIInstrFormats.td b/contrib/llvm/lib/Target/R600/VIInstrFormats.td index 5285d18ced46..c24223511248 100644 --- a/contrib/llvm/lib/Target/R600/VIInstrFormats.td +++ b/contrib/llvm/lib/Target/R600/VIInstrFormats.td @@ -136,6 +136,32 @@ class VOP3e_vi op> : Enc64 { let Inst{63} = src2_modifiers{0}; } +class VOP3be_vi op> : Enc64 { + bits<8> vdst; + bits<2> src0_modifiers; + bits<9> src0; + bits<2> src1_modifiers; + bits<9> src1; + bits<2> src2_modifiers; + bits<9> src2; + bits<7> sdst; + bits<2> omod; + bits<1> clamp; + + let Inst{7-0} = vdst; + let Inst{14-8} = sdst; + let Inst{15} = clamp; + let Inst{25-16} = op; + let Inst{31-26} = 0x34; //encoding + let Inst{40-32} = src0; + let Inst{49-41} = src1; + let Inst{58-50} = src2; + let Inst{60-59} = omod; + let Inst{61} = src0_modifiers{0}; + let Inst{62} = src1_modifiers{0}; + let Inst{63} = src2_modifiers{0}; +} + class EXPe_vi : EXPe { let Inst{31-26} = 0x31; //encoding } diff --git a/contrib/llvm/lib/Target/R600/VIInstructions.td b/contrib/llvm/lib/Target/R600/VIInstructions.td index 24e66cea6277..4a6e933783bb 100644 --- a/contrib/llvm/lib/Target/R600/VIInstructions.td +++ b/contrib/llvm/lib/Target/R600/VIInstructions.td @@ -9,18 +9,6 @@ // Instruction definitions for VI and newer. //===----------------------------------------------------------------------===// -let SubtargetPredicate = isVI in { - -defm BUFFER_LOAD_DWORD_VI : MUBUF_Load_Helper_vi < - 0x14, "buffer_load_dword", VGPR_32, i32, global_load ->; - -defm BUFFER_LOAD_FORMAT_XYZW_VI : MUBUF_Load_Helper_vi < - 0x03, "buffer_load_format_xyzw", VReg_128 ->; - -} // End SubtargetPredicate = isVI - //===----------------------------------------------------------------------===// // SMEM Patterns @@ -28,37 +16,10 @@ defm BUFFER_LOAD_FORMAT_XYZW_VI : MUBUF_Load_Helper_vi < let Predicates = [isVI] in { -// 1. Offset as 8bit DWORD immediate +// 1. Offset as 20bit DWORD immediate def : Pat < (SIload_constant v4i32:$sbase, IMM20bit:$offset), (S_BUFFER_LOAD_DWORD_IMM $sbase, (as_i32imm $offset)) >; -//===----------------------------------------------------------------------===// -// MUBUF Patterns -//===----------------------------------------------------------------------===// - -// Offset in an 32Bit VGPR -def : Pat < - (SIload_constant v4i32:$sbase, i32:$voff), - (BUFFER_LOAD_DWORD_VI_OFFEN $sbase, $voff, 0, 0, 0, 0, 0) ->; - -// Offset in an 32Bit VGPR -def : Pat < - (SIload_constant v4i32:$sbase, i32:$voff), - (BUFFER_LOAD_DWORD_VI_OFFEN $sbase, $voff, 0, 0, 0, 0, 0) ->; - -/* int_SI_vs_load_input */ -def : Pat< - (SIload_input v4i32:$tlst, imm:$attr_offset, i32:$buf_idx_vgpr), - (BUFFER_LOAD_FORMAT_XYZW_VI_IDXEN $tlst, $buf_idx_vgpr, imm:$attr_offset, 0, 0, 0, 0) ->; - -defm : MUBUF_Load_Dword ; - } // End Predicates = [isVI] diff --git a/contrib/llvm/lib/Target/X86/X86FrameLowering.cpp b/contrib/llvm/lib/Target/X86/X86FrameLowering.cpp index f2eb6a8ea73e..66f54e9d69d6 100644 --- a/contrib/llvm/lib/Target/X86/X86FrameLowering.cpp +++ b/contrib/llvm/lib/Target/X86/X86FrameLowering.cpp @@ -392,12 +392,25 @@ static bool usesTheStack(const MachineFunction &MF) { return false; } -void X86FrameLowering::getStackProbeFunction(const X86Subtarget &STI, - unsigned &CallOp, - const char *&Symbol) { - CallOp = STI.is64Bit() ? X86::W64ALLOCA : X86::CALLpcrel32; +void X86FrameLowering::emitStackProbeCall(MachineFunction &MF, + MachineBasicBlock &MBB, + MachineBasicBlock::iterator MBBI, + DebugLoc DL) { + const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo(); + const X86Subtarget &STI = MF.getTarget().getSubtarget(); + bool Is64Bit = STI.is64Bit(); + bool IsLargeCodeModel = MF.getTarget().getCodeModel() == CodeModel::Large; + const X86RegisterInfo *RegInfo = + static_cast(MF.getSubtarget().getRegisterInfo()); - if (STI.is64Bit()) { + unsigned CallOp; + if (Is64Bit) + CallOp = IsLargeCodeModel ? X86::CALL64r : X86::CALL64pcrel32; + else + CallOp = X86::CALLpcrel32; + + const char *Symbol; + if (Is64Bit) { if (STI.isTargetCygMing()) { Symbol = "___chkstk_ms"; } else { @@ -407,6 +420,37 @@ void X86FrameLowering::getStackProbeFunction(const X86Subtarget &STI, Symbol = "_alloca"; else Symbol = "_chkstk"; + + MachineInstrBuilder CI; + + // All current stack probes take AX and SP as input, clobber flags, and + // preserve all registers. x86_64 probes leave RSP unmodified. + if (Is64Bit && MF.getTarget().getCodeModel() == CodeModel::Large) { + // For the large code model, we have to call through a register. Use R11, + // as it is scratch in all supported calling conventions. + BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri), X86::R11) + .addExternalSymbol(Symbol); + CI = BuildMI(MBB, MBBI, DL, TII.get(CallOp)).addReg(X86::R11); + } else { + CI = BuildMI(MBB, MBBI, DL, TII.get(CallOp)).addExternalSymbol(Symbol); + } + + unsigned AX = Is64Bit ? X86::RAX : X86::EAX; + unsigned SP = Is64Bit ? X86::RSP : X86::ESP; + CI.addReg(AX, RegState::Implicit) + .addReg(SP, RegState::Implicit) + .addReg(AX, RegState::Define | RegState::Implicit) + .addReg(SP, RegState::Define | RegState::Implicit) + .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit); + + if (Is64Bit) { + // MSVC x64's __chkstk and cygwin/mingw's ___chkstk_ms do not adjust %rsp + // themselves. It also does not clobber %rax so we can reuse it when + // adjusting %rsp. + BuildMI(MBB, MBBI, DL, TII.get(X86::SUB64rr), X86::RSP) + .addReg(X86::RSP) + .addReg(X86::RAX); + } } /// emitPrologue - Push callee-saved registers onto the stack, which @@ -739,11 +783,6 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF) const { // increments is necessary to ensure that the guard pages used by the OS // virtual memory manager are allocated in correct sequence. if (NumBytes >= StackProbeSize && UseStackProbe) { - const char *StackProbeSymbol; - unsigned CallOp; - - getStackProbeFunction(STI, CallOp, StackProbeSymbol); - // Check whether EAX is livein for this function. bool isEAXAlive = isEAXLiveIn(MF); @@ -772,22 +811,17 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF) const { .setMIFlag(MachineInstr::FrameSetup); } - BuildMI(MBB, MBBI, DL, - TII.get(CallOp)) - .addExternalSymbol(StackProbeSymbol) - .addReg(StackPtr, RegState::Define | RegState::Implicit) - .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit) - .setMIFlag(MachineInstr::FrameSetup); + // Save a pointer to the MI where we set AX. + MachineBasicBlock::iterator SetRAX = MBBI; + --SetRAX; + + // Call __chkstk, __chkstk_ms, or __alloca. + emitStackProbeCall(MF, MBB, MBBI, DL); + + // Apply the frame setup flag to all inserted instrs. + for (; SetRAX != MBBI; ++SetRAX) + SetRAX->setFlag(MachineInstr::FrameSetup); - if (Is64Bit) { - // MSVC x64's __chkstk and cygwin/mingw's ___chkstk_ms do not adjust %rsp - // themself. It also does not clobber %rax so we can reuse it when - // adjusting %rsp. - BuildMI(MBB, MBBI, DL, TII.get(X86::SUB64rr), StackPtr) - .addReg(StackPtr) - .addReg(X86::RAX) - .setMIFlag(MachineInstr::FrameSetup); - } if (isEAXAlive) { // Restore EAX MachineInstr *MI = addRegOffset(BuildMI(MF, DL, TII.get(X86::MOV32rm), diff --git a/contrib/llvm/lib/Target/X86/X86FrameLowering.h b/contrib/llvm/lib/Target/X86/X86FrameLowering.h index 9cb887ac112d..448a36514246 100644 --- a/contrib/llvm/lib/Target/X86/X86FrameLowering.h +++ b/contrib/llvm/lib/Target/X86/X86FrameLowering.h @@ -27,9 +27,11 @@ class X86FrameLowering : public TargetFrameLowering { explicit X86FrameLowering(StackDirection D, unsigned StackAl, int LAO) : TargetFrameLowering(StackGrowsDown, StackAl, LAO) {} - static void getStackProbeFunction(const X86Subtarget &STI, - unsigned &CallOp, - const char *&Symbol); + /// Emit a call to the target's stack probe function. This is required for all + /// large stack allocations on Windows. The caller is required to materialize + /// the number of bytes to probe in RAX/EAX. + static void emitStackProbeCall(MachineFunction &MF, MachineBasicBlock &MBB, + MachineBasicBlock::iterator MBBI, DebugLoc DL); void emitCalleeSavedFrameMoves(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, diff --git a/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp b/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp index 177299b8afc4..85978d8aaa5c 100644 --- a/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -15,6 +15,7 @@ #include "X86ISelLowering.h" #include "Utils/X86ShuffleDecode.h" #include "X86CallingConv.h" +#include "X86FrameLowering.h" #include "X86InstrBuilder.h" #include "X86MachineFunctionInfo.h" #include "X86TargetMachine.h" @@ -10094,12 +10095,12 @@ static SDValue lowerV2X128VectorShuffle(SDLoc DL, MVT VT, SDValue V1, VT.getVectorNumElements() / 2); // Check for patterns which can be matched with a single insert of a 128-bit // subvector. - if (isShuffleEquivalent(Mask, 0, 1, 0, 1) || - isShuffleEquivalent(Mask, 0, 1, 4, 5)) { + bool OnlyUsesV1 = isShuffleEquivalent(Mask, 0, 1, 0, 1); + if (OnlyUsesV1 || isShuffleEquivalent(Mask, 0, 1, 4, 5)) { SDValue LoV = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SubVT, V1, DAG.getIntPtrConstant(0)); SDValue HiV = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SubVT, - Mask[2] < 4 ? V1 : V2, DAG.getIntPtrConstant(0)); + OnlyUsesV1 ? V1 : V2, DAG.getIntPtrConstant(0)); return DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, LoV, HiV); } if (isShuffleEquivalent(Mask, 0, 1, 6, 7)) { @@ -10112,7 +10113,15 @@ static SDValue lowerV2X128VectorShuffle(SDLoc DL, MVT VT, SDValue V1, // Otherwise form a 128-bit permutation. // FIXME: Detect zero-vector inputs and use the VPERM2X128 to zero that half. - unsigned PermMask = Mask[0] / 2 | (Mask[2] / 2) << 4; + int MaskLO = Mask[0]; + if (MaskLO == SM_SentinelUndef) + MaskLO = Mask[1] == SM_SentinelUndef ? 0 : Mask[1]; + + int MaskHI = Mask[2]; + if (MaskHI == SM_SentinelUndef) + MaskHI = Mask[3] == SM_SentinelUndef ? 0 : Mask[3]; + + unsigned PermMask = MaskLO / 2 | (MaskHI / 2) << 4; return DAG.getNode(X86ISD::VPERM2X128, DL, VT, V1, V2, DAG.getConstant(PermMask, MVT::i8)); } @@ -17172,6 +17181,13 @@ static SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, const X86Subtarget *Subtarget switch (IntNo) { default: return SDValue(); // Don't custom lower most intrinsics. + case Intrinsic::x86_avx2_permd: + case Intrinsic::x86_avx2_permps: + // Operands intentionally swapped. Mask is last operand to intrinsic, + // but second operand for node/instruction. + return DAG.getNode(X86ISD::VPERMV, dl, Op.getValueType(), + Op.getOperand(2), Op.getOperand(1)); + case Intrinsic::x86_avx512_mask_valign_q_512: case Intrinsic::x86_avx512_mask_valign_d_512: // Vector source operands are swapped. @@ -21076,47 +21092,7 @@ X86TargetLowering::EmitLoweredWinAlloca(MachineInstr *MI, assert(!Subtarget->isTargetMachO()); - // The lowering is pretty easy: we're just emitting the call to _alloca. The - // non-trivial part is impdef of ESP. - - if (Subtarget->isTargetWin64()) { - if (Subtarget->isTargetCygMing()) { - // ___chkstk(Mingw64): - // Clobbers R10, R11, RAX and EFLAGS. - // Updates RSP. - BuildMI(*BB, MI, DL, TII->get(X86::W64ALLOCA)) - .addExternalSymbol("___chkstk") - .addReg(X86::RAX, RegState::Implicit) - .addReg(X86::RSP, RegState::Implicit) - .addReg(X86::RAX, RegState::Define | RegState::Implicit) - .addReg(X86::RSP, RegState::Define | RegState::Implicit) - .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit); - } else { - // __chkstk(MSVCRT): does not update stack pointer. - // Clobbers R10, R11 and EFLAGS. - BuildMI(*BB, MI, DL, TII->get(X86::W64ALLOCA)) - .addExternalSymbol("__chkstk") - .addReg(X86::RAX, RegState::Implicit) - .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit); - // RAX has the offset to be subtracted from RSP. - BuildMI(*BB, MI, DL, TII->get(X86::SUB64rr), X86::RSP) - .addReg(X86::RSP) - .addReg(X86::RAX); - } - } else { - const char *StackProbeSymbol = (Subtarget->isTargetKnownWindowsMSVC() || - Subtarget->isTargetWindowsItanium()) - ? "_chkstk" - : "_alloca"; - - BuildMI(*BB, MI, DL, TII->get(X86::CALLpcrel32)) - .addExternalSymbol(StackProbeSymbol) - .addReg(X86::EAX, RegState::Implicit) - .addReg(X86::ESP, RegState::Implicit) - .addReg(X86::EAX, RegState::Define | RegState::Implicit) - .addReg(X86::ESP, RegState::Define | RegState::Implicit) - .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit); - } + X86FrameLowering::emitStackProbeCall(*BB->getParent(), *BB, MI, DL); MI->eraseFromParent(); // The pseudo instruction is gone now. return BB; @@ -25558,45 +25534,51 @@ static SDValue PerformISDSETCCCombine(SDNode *N, SelectionDAG &DAG, if ((CC == ISD::SETNE || CC == ISD::SETEQ) && LHS.getOpcode() == ISD::SUB) if (ConstantSDNode *C = dyn_cast(LHS.getOperand(0))) if (C->getAPIntValue() == 0 && LHS.hasOneUse()) { - SDValue addV = DAG.getNode(ISD::ADD, SDLoc(N), - LHS.getValueType(), RHS, LHS.getOperand(1)); - return DAG.getSetCC(SDLoc(N), N->getValueType(0), - addV, DAG.getConstant(0, addV.getValueType()), CC); + SDValue addV = DAG.getNode(ISD::ADD, SDLoc(N), LHS.getValueType(), RHS, + LHS.getOperand(1)); + return DAG.getSetCC(SDLoc(N), N->getValueType(0), addV, + DAG.getConstant(0, addV.getValueType()), CC); } if ((CC == ISD::SETNE || CC == ISD::SETEQ) && RHS.getOpcode() == ISD::SUB) if (ConstantSDNode *C = dyn_cast(RHS.getOperand(0))) if (C->getAPIntValue() == 0 && RHS.hasOneUse()) { - SDValue addV = DAG.getNode(ISD::ADD, SDLoc(N), - RHS.getValueType(), LHS, RHS.getOperand(1)); - return DAG.getSetCC(SDLoc(N), N->getValueType(0), - addV, DAG.getConstant(0, addV.getValueType()), CC); + SDValue addV = DAG.getNode(ISD::ADD, SDLoc(N), RHS.getValueType(), LHS, + RHS.getOperand(1)); + return DAG.getSetCC(SDLoc(N), N->getValueType(0), addV, + DAG.getConstant(0, addV.getValueType()), CC); } - if (VT.getScalarType() == MVT::i1) { - bool IsSEXT0 = (LHS.getOpcode() == ISD::SIGN_EXTEND) && - (LHS.getOperand(0).getValueType().getScalarType() == MVT::i1); - bool IsVZero0 = ISD::isBuildVectorAllZeros(LHS.getNode()); - if (!IsSEXT0 && !IsVZero0) - return SDValue(); - bool IsSEXT1 = (RHS.getOpcode() == ISD::SIGN_EXTEND) && - (RHS.getOperand(0).getValueType().getScalarType() == MVT::i1); + if (VT.getScalarType() == MVT::i1 && + (CC == ISD::SETNE || CC == ISD::SETEQ || ISD::isSignedIntSetCC(CC))) { + bool IsSEXT0 = + (LHS.getOpcode() == ISD::SIGN_EXTEND) && + (LHS.getOperand(0).getValueType().getScalarType() == MVT::i1); bool IsVZero1 = ISD::isBuildVectorAllZeros(RHS.getNode()); - if (!IsSEXT1 && !IsVZero1) - return SDValue(); + if (!IsSEXT0 || !IsVZero1) { + // Swap the operands and update the condition code. + std::swap(LHS, RHS); + CC = ISD::getSetCCSwappedOperands(CC); + + IsSEXT0 = (LHS.getOpcode() == ISD::SIGN_EXTEND) && + (LHS.getOperand(0).getValueType().getScalarType() == MVT::i1); + IsVZero1 = ISD::isBuildVectorAllZeros(RHS.getNode()); + } if (IsSEXT0 && IsVZero1) { - assert(VT == LHS.getOperand(0).getValueType() && "Uexpected operand type"); - if (CC == ISD::SETEQ) + assert(VT == LHS.getOperand(0).getValueType() && + "Uexpected operand type"); + if (CC == ISD::SETGT) + return DAG.getConstant(0, VT); + if (CC == ISD::SETLE) + return DAG.getConstant(1, VT); + if (CC == ISD::SETEQ || CC == ISD::SETGE) return DAG.getNOT(DL, LHS.getOperand(0), VT); + + assert((CC == ISD::SETNE || CC == ISD::SETLT) && + "Unexpected condition code!"); return LHS.getOperand(0); } - if (IsSEXT1 && IsVZero0) { - assert(VT == RHS.getOperand(0).getValueType() && "Uexpected operand type"); - if (CC == ISD::SETEQ) - return DAG.getNOT(DL, RHS.getOperand(0), VT); - return RHS.getOperand(0); - } } return SDValue(); diff --git a/contrib/llvm/lib/Target/X86/X86InstrControl.td b/contrib/llvm/lib/Target/X86/X86InstrControl.td index 71415c6fde8e..7baff19e51a9 100644 --- a/contrib/llvm/lib/Target/X86/X86InstrControl.td +++ b/contrib/llvm/lib/Target/X86/X86InstrControl.td @@ -279,7 +279,8 @@ let isCall = 1, Uses = [RSP], SchedRW = [WriteJump] in { } let isCall = 1, isCodeGenOnly = 1 in - // __chkstk(MSVC): clobber R10, R11 and EFLAGS. + // __chkstk(MSVC): clobber R10, R11 and EFLAGS + // ___chkstk_ms(Mingw64): clobber R10, R11 and EFLAGS // ___chkstk(Mingw64): clobber R10, R11, RAX and EFLAGS, and update RSP. let Defs = [RAX, R10, R11, RSP, EFLAGS], Uses = [RSP] in { diff --git a/contrib/llvm/lib/Target/X86/X86IntrinsicsInfo.h b/contrib/llvm/lib/Target/X86/X86IntrinsicsInfo.h index 7130ae2c3097..b411d079c56c 100644 --- a/contrib/llvm/lib/Target/X86/X86IntrinsicsInfo.h +++ b/contrib/llvm/lib/Target/X86/X86IntrinsicsInfo.h @@ -175,8 +175,6 @@ static const IntrinsicData IntrinsicsWithoutChain[] = { X86_INTRINSIC_DATA(avx2_packsswb, INTR_TYPE_2OP, X86ISD::PACKSS, 0), X86_INTRINSIC_DATA(avx2_packusdw, INTR_TYPE_2OP, X86ISD::PACKUS, 0), X86_INTRINSIC_DATA(avx2_packuswb, INTR_TYPE_2OP, X86ISD::PACKUS, 0), - X86_INTRINSIC_DATA(avx2_permd, INTR_TYPE_2OP, X86ISD::VPERMV, 0), - X86_INTRINSIC_DATA(avx2_permps, INTR_TYPE_2OP, X86ISD::VPERMV, 0), X86_INTRINSIC_DATA(avx2_phadd_d, INTR_TYPE_2OP, X86ISD::HADD, 0), X86_INTRINSIC_DATA(avx2_phadd_w, INTR_TYPE_2OP, X86ISD::HADD, 0), X86_INTRINSIC_DATA(avx2_phsub_d, INTR_TYPE_2OP, X86ISD::HSUB, 0), diff --git a/contrib/llvm/lib/Transforms/Instrumentation/GCOVProfiling.cpp b/contrib/llvm/lib/Transforms/Instrumentation/GCOVProfiling.cpp index cb965fb9a225..60b541f1aa2f 100644 --- a/contrib/llvm/lib/Transforms/Instrumentation/GCOVProfiling.cpp +++ b/contrib/llvm/lib/Transforms/Instrumentation/GCOVProfiling.cpp @@ -47,6 +47,8 @@ using namespace llvm; static cl::opt DefaultGCOVVersion("default-gcov-version", cl::init("402*"), cl::Hidden, cl::ValueRequired); +static cl::opt DefaultExitBlockBeforeBody("gcov-exit-block-before-body", + cl::init(false), cl::Hidden); GCOVOptions GCOVOptions::getDefault() { GCOVOptions Options; @@ -312,7 +314,7 @@ namespace { class GCOVFunction : public GCOVRecord { public: GCOVFunction(DISubprogram SP, raw_ostream *os, uint32_t Ident, - bool UseCfgChecksum) + bool UseCfgChecksum, bool ExitBlockBeforeBody) : SP(SP), Ident(Ident), UseCfgChecksum(UseCfgChecksum), CfgChecksum(0), ReturnBlock(1, os) { this->os = os; @@ -322,11 +324,13 @@ namespace { uint32_t i = 0; for (auto &BB : *F) { - // Skip index 1 (0, 2, 3, 4, ...) because that's assigned to the - // ReturnBlock. - bool first = i == 0; - Blocks.insert(std::make_pair(&BB, GCOVBlock(i++ + !first, os))); + // Skip index 1 if it's assigned to the ReturnBlock. + if (i == 1 && ExitBlockBeforeBody) + ++i; + Blocks.insert(std::make_pair(&BB, GCOVBlock(i++, os))); } + if (!ExitBlockBeforeBody) + ReturnBlock.Number = i; std::string FunctionNameAndLine; raw_string_ostream FNLOS(FunctionNameAndLine); @@ -469,7 +473,7 @@ static bool functionHasLines(Function *F) { if (Loc.isUnknown()) continue; // Artificial lines such as calls to the global constructors. - if (Loc.getLine() == 0) continue; + if (Loc.getLine() == 0) continue; return true; } @@ -513,7 +517,8 @@ void GCOVProfiler::emitProfileNotes() { EntryBlock.splitBasicBlock(It); Funcs.push_back(make_unique(SP, &out, FunctionIdent++, - Options.UseCfgChecksum)); + Options.UseCfgChecksum, + DefaultExitBlockBeforeBody)); GCOVFunction &Func = *Funcs.back(); for (Function::iterator BB = F->begin(), E = F->end(); BB != E; ++BB) { diff --git a/contrib/llvm/lib/Transforms/Scalar/GVN.cpp b/contrib/llvm/lib/Transforms/Scalar/GVN.cpp index ac13eebf8275..1ed14d001093 100644 --- a/contrib/llvm/lib/Transforms/Scalar/GVN.cpp +++ b/contrib/llvm/lib/Transforms/Scalar/GVN.cpp @@ -2183,12 +2183,16 @@ bool GVN::propagateEquality(Value *LHS, Value *RHS, // Handle the floating point versions of equality comparisons too. if ((isKnownTrue && Cmp->getPredicate() == CmpInst::FCMP_OEQ) || (isKnownFalse && Cmp->getPredicate() == CmpInst::FCMP_UNE)) { - // Floating point -0.0 and 0.0 compare equal, so we can't - // propagate a constant based on that comparison. + + // Floating point -0.0 and 0.0 compare equal, so we can only + // propagate values if we know that we have a constant and that + // its value is non-zero. + // FIXME: We should do this optimization if 'no signed zeros' is // applicable via an instruction-level fast-math-flag or some other // indicator that relaxed FP semantics are being used. - if (!isa(Op1) || !cast(Op1)->isZero()) + + if (isa(Op1) && !cast(Op1)->isZero()) Worklist.push_back(std::make_pair(Op0, Op1)); } diff --git a/contrib/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp b/contrib/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp index 6cb91a154f06..d54c09aa6ae4 100644 --- a/contrib/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp +++ b/contrib/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp @@ -288,14 +288,11 @@ bool SimplifyIndvar::strengthenOverflowingOperation(BinaryOperator *BO, IntegerType *IT = cast(IVOperand->getType()); Value *OtherOperand = nullptr; - int OtherOperandIdx = -1; if (BO->getOperand(0) == IVOperand) { OtherOperand = BO->getOperand(1); - OtherOperandIdx = 1; } else { assert(BO->getOperand(1) == IVOperand && "only other use!"); OtherOperand = BO->getOperand(0); - OtherOperandIdx = 0; } bool Changed = false; diff --git a/contrib/llvm/patches/README.TXT b/contrib/llvm/patches/README.TXT index f3fc20898459..7bc26d25dbf6 100644 --- a/contrib/llvm/patches/README.TXT +++ b/contrib/llvm/patches/README.TXT @@ -1,11 +1,11 @@ This is a set of individual patches, which contain all the customizations to llvm/clang currently in the FreeBSD base system. These can be applied in -alphabetical order to a pristine llvm/clang 3.6.0 source tree, for example by +alphabetical order to a pristine llvm/clang 3.6.1 source tree, for example by doing: -svn co https://llvm.org/svn/llvm-project/llvm/tags/RELEASE_360/final llvm-3.6.0 -svn co https://llvm.org/svn/llvm-project/cfe/tags/RELEASE_360/final llvm-3.6.0/tools/clang -cd llvm-3.6.0 +svn co https://llvm.org/svn/llvm-project/llvm/tags/RELEASE_361/final llvm-3.6.1 +svn co https://llvm.org/svn/llvm-project/cfe/tags/RELEASE_361/final llvm-3.6.1/tools/clang +cd llvm-3.6.1 for p in /usr/src/contrib/llvm/patches/patch-*.diff; do patch -p0 -f -F0 -E -i $p -s || break done diff --git a/contrib/llvm/patches/patch-01-freebsd-kprintf.diff b/contrib/llvm/patches/patch-01-freebsd-kprintf.diff index cccfedf0f926..252b4cd4c474 100644 --- a/contrib/llvm/patches/patch-01-freebsd-kprintf.diff +++ b/contrib/llvm/patches/patch-01-freebsd-kprintf.diff @@ -44,7 +44,7 @@ Index: tools/clang/include/clang/Sema/Sema.h =================================================================== --- tools/clang/include/clang/Sema/Sema.h +++ tools/clang/include/clang/Sema/Sema.h -@@ -8566,6 +8566,7 @@ class Sema { +@@ -8567,6 +8567,7 @@ class Sema { FST_Strftime, FST_Strfmon, FST_Kprintf, @@ -230,7 +230,7 @@ Index: tools/clang/lib/Sema/SemaChecking.cpp =================================================================== --- tools/clang/lib/Sema/SemaChecking.cpp +++ tools/clang/lib/Sema/SemaChecking.cpp -@@ -2584,6 +2584,7 @@ Sema::FormatStringType Sema::GetFormatStringType(c +@@ -2603,6 +2603,7 @@ Sema::FormatStringType Sema::GetFormatStringType(c .Case("strftime", FST_Strftime) .Case("strfmon", FST_Strfmon) .Cases("kprintf", "cmn_err", "vcmn_err", "zcmn_err", FST_Kprintf) @@ -238,7 +238,7 @@ Index: tools/clang/lib/Sema/SemaChecking.cpp .Default(FST_Unknown); } -@@ -3365,6 +3366,43 @@ CheckPrintfHandler::HandlePrintfSpecifier(const an +@@ -3384,6 +3385,43 @@ CheckPrintfHandler::HandlePrintfSpecifier(const an CoveredArgs.set(argIndex); } @@ -282,7 +282,7 @@ Index: tools/clang/lib/Sema/SemaChecking.cpp // Check for using an Objective-C specific conversion specifier // in a non-ObjC literal. if (!ObjCContext && CS.isObjCArg()) { -@@ -3988,7 +4026,8 @@ void Sema::CheckFormatString(const StringLiteral * +@@ -4007,7 +4045,8 @@ void Sema::CheckFormatString(const StringLiteral * return; } @@ -292,7 +292,7 @@ Index: tools/clang/lib/Sema/SemaChecking.cpp CheckPrintfHandler H(*this, FExpr, OrigFormatExpr, firstDataArg, numDataArgs, (Type == FST_NSString), Str, HasVAListArg, Args, format_idx, -@@ -3996,7 +4035,8 @@ void Sema::CheckFormatString(const StringLiteral * +@@ -4015,7 +4054,8 @@ void Sema::CheckFormatString(const StringLiteral * if (!analyze_format_string::ParsePrintfString(H, Str, Str + StrLen, getLangOpts(), diff --git a/contrib/llvm/patches/patch-07-llvm-r227752-boot2-shrink.diff b/contrib/llvm/patches/patch-07-llvm-r227752-boot2-shrink.diff index d5650f7689ae..57e16d79b1e1 100644 --- a/contrib/llvm/patches/patch-07-llvm-r227752-boot2-shrink.diff +++ b/contrib/llvm/patches/patch-07-llvm-r227752-boot2-shrink.diff @@ -596,7 +596,7 @@ Index: lib/Target/X86/X86FrameLowering.cpp static unsigned getLEArOpcode(unsigned IsLP64) { return IsLP64 ? X86::LEA64r : X86::LEA32r; } -@@ -1848,100 +1865,6 @@ void X86FrameLowering::adjustForHiPEPrologue(Machi +@@ -1882,100 +1899,6 @@ void X86FrameLowering::adjustForHiPEPrologue(Machi #endif } @@ -697,7 +697,7 @@ Index: lib/Target/X86/X86FrameLowering.cpp void X86FrameLowering:: eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const { -@@ -1956,7 +1879,7 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, +@@ -1990,7 +1913,7 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, bool IsLP64 = STI.isTarget64BitLP64(); DebugLoc DL = I->getDebugLoc(); uint64_t Amount = !reserveCallFrame ? I->getOperand(0).getImm() : 0; @@ -706,7 +706,7 @@ Index: lib/Target/X86/X86FrameLowering.cpp I = MBB.erase(I); if (!reserveCallFrame) { -@@ -1976,24 +1899,18 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, +@@ -2010,24 +1933,18 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, Amount = (Amount + StackAlign - 1) / StackAlign * StackAlign; MachineInstr *New = nullptr; @@ -740,7 +740,7 @@ Index: lib/Target/X86/X86FrameLowering.cpp unsigned Opc = getADDriOpcode(IsLP64, Amount); New = BuildMI(MF, DL, TII.get(Opc), StackPtr) .addReg(StackPtr).addImm(Amount); -@@ -2011,13 +1928,13 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, +@@ -2045,13 +1962,13 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, return; } @@ -761,7 +761,7 @@ Index: lib/Target/X86/X86FrameLowering.h =================================================================== --- lib/Target/X86/X86FrameLowering.h +++ lib/Target/X86/X86FrameLowering.h -@@ -64,6 +64,8 @@ class X86FrameLowering : public TargetFrameLowerin +@@ -66,6 +66,8 @@ class X86FrameLowering : public TargetFrameLowerin bool hasFP(const MachineFunction &MF) const override; bool hasReservedCallFrame(const MachineFunction &MF) const override; diff --git a/contrib/llvm/patches/patch-08-llvm-r227089-fix-mips-i128.diff b/contrib/llvm/patches/patch-08-llvm-r227089-fix-mips-i128.diff deleted file mode 100644 index 00a44f5eaf8b..000000000000 --- a/contrib/llvm/patches/patch-08-llvm-r227089-fix-mips-i128.diff +++ /dev/null @@ -1,1950 +0,0 @@ -Pull in r227087 from upstream llvm trunk (by Vasileios Kalintiris): - - [mips] Add tests for bitwise binary and integer arithmetic operators. - - Reviewers: dsanders - - Subscribers: llvm-commits - - Differential Revision: http://reviews.llvm.org/D7125 - -Pull in r227089 from upstream llvm trunk (by Vasileios Kalintiris): - - [mips] Enable arithmetic and binary operations for the i128 data type. - - Summary: - This patch adds support for some operations that were missing from - 128-bit integer types (add/sub/mul/sdiv/udiv... etc.). With these - changes we can support the __int128_t and __uint128_t data types - from C/C++. - - Depends on D7125 - - Reviewers: dsanders - - Subscribers: llvm-commits - - Differential Revision: http://reviews.llvm.org/D7143 - -This fixes "error in backend" messages, when compiling parts of -compiler-rt using 128-bit integer types for mips64. - -Reported by: sbruno -PR: 197259 - -Introduced here: http://svnweb.freebsd.org/changeset/base/278367 - -Index: lib/Target/Mips/Mips64InstrInfo.td -=================================================================== ---- lib/Target/Mips/Mips64InstrInfo.td -+++ lib/Target/Mips/Mips64InstrInfo.td -@@ -440,6 +440,16 @@ def : MipsPat<(i64 (sext_inreg GPR64:$src, i32)), - // bswap MipsPattern - def : MipsPat<(bswap GPR64:$rt), (DSHD (DSBH GPR64:$rt))>; - -+// Carry pattern -+def : MipsPat<(subc GPR64:$lhs, GPR64:$rhs), -+ (DSUBu GPR64:$lhs, GPR64:$rhs)>; -+let AdditionalPredicates = [NotDSP] in { -+ def : MipsPat<(addc GPR64:$lhs, GPR64:$rhs), -+ (DADDu GPR64:$lhs, GPR64:$rhs)>; -+ def : MipsPat<(addc GPR64:$lhs, immSExt16:$imm), -+ (DADDiu GPR64:$lhs, imm:$imm)>; -+} -+ - //===----------------------------------------------------------------------===// - // Instruction aliases - //===----------------------------------------------------------------------===// -Index: lib/Target/Mips/MipsISelLowering.cpp -=================================================================== ---- lib/Target/Mips/MipsISelLowering.cpp -+++ lib/Target/Mips/MipsISelLowering.cpp -@@ -261,6 +261,9 @@ MipsTargetLowering::MipsTargetLowering(const MipsT - setOperationAction(ISD::LOAD, MVT::i64, Custom); - setOperationAction(ISD::STORE, MVT::i64, Custom); - setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom); -+ setOperationAction(ISD::SHL_PARTS, MVT::i64, Custom); -+ setOperationAction(ISD::SRA_PARTS, MVT::i64, Custom); -+ setOperationAction(ISD::SRL_PARTS, MVT::i64, Custom); - } - - if (!Subtarget.isGP64bit()) { -@@ -2017,10 +2020,11 @@ SDValue MipsTargetLowering::lowerATOMIC_FENCE(SDVa - SDValue MipsTargetLowering::lowerShiftLeftParts(SDValue Op, - SelectionDAG &DAG) const { - SDLoc DL(Op); -+ MVT VT = Subtarget.isGP64bit() ? MVT::i64 : MVT::i32; -+ - SDValue Lo = Op.getOperand(0), Hi = Op.getOperand(1); - SDValue Shamt = Op.getOperand(2); -- -- // if shamt < 32: -+ // if shamt < (VT.bits): - // lo = (shl lo, shamt) - // hi = (or (shl hi, shamt) (srl (srl lo, 1), ~shamt)) - // else: -@@ -2028,18 +2032,17 @@ SDValue MipsTargetLowering::lowerShiftLeftParts(SD - // hi = (shl lo, shamt[4:0]) - SDValue Not = DAG.getNode(ISD::XOR, DL, MVT::i32, Shamt, - DAG.getConstant(-1, MVT::i32)); -- SDValue ShiftRight1Lo = DAG.getNode(ISD::SRL, DL, MVT::i32, Lo, -- DAG.getConstant(1, MVT::i32)); -- SDValue ShiftRightLo = DAG.getNode(ISD::SRL, DL, MVT::i32, ShiftRight1Lo, -- Not); -- SDValue ShiftLeftHi = DAG.getNode(ISD::SHL, DL, MVT::i32, Hi, Shamt); -- SDValue Or = DAG.getNode(ISD::OR, DL, MVT::i32, ShiftLeftHi, ShiftRightLo); -- SDValue ShiftLeftLo = DAG.getNode(ISD::SHL, DL, MVT::i32, Lo, Shamt); -+ SDValue ShiftRight1Lo = DAG.getNode(ISD::SRL, DL, VT, Lo, -+ DAG.getConstant(1, VT)); -+ SDValue ShiftRightLo = DAG.getNode(ISD::SRL, DL, VT, ShiftRight1Lo, Not); -+ SDValue ShiftLeftHi = DAG.getNode(ISD::SHL, DL, VT, Hi, Shamt); -+ SDValue Or = DAG.getNode(ISD::OR, DL, VT, ShiftLeftHi, ShiftRightLo); -+ SDValue ShiftLeftLo = DAG.getNode(ISD::SHL, DL, VT, Lo, Shamt); - SDValue Cond = DAG.getNode(ISD::AND, DL, MVT::i32, Shamt, - DAG.getConstant(0x20, MVT::i32)); -- Lo = DAG.getNode(ISD::SELECT, DL, MVT::i32, Cond, -- DAG.getConstant(0, MVT::i32), ShiftLeftLo); -- Hi = DAG.getNode(ISD::SELECT, DL, MVT::i32, Cond, ShiftLeftLo, Or); -+ Lo = DAG.getNode(ISD::SELECT, DL, VT, Cond, -+ DAG.getConstant(0, VT), ShiftLeftLo); -+ Hi = DAG.getNode(ISD::SELECT, DL, VT, Cond, ShiftLeftLo, Or); - - SDValue Ops[2] = {Lo, Hi}; - return DAG.getMergeValues(Ops, DL); -@@ -2050,8 +2053,9 @@ SDValue MipsTargetLowering::lowerShiftRightParts(S - SDLoc DL(Op); - SDValue Lo = Op.getOperand(0), Hi = Op.getOperand(1); - SDValue Shamt = Op.getOperand(2); -+ MVT VT = Subtarget.isGP64bit() ? MVT::i64 : MVT::i32; - -- // if shamt < 32: -+ // if shamt < (VT.bits): - // lo = (or (shl (shl hi, 1), ~shamt) (srl lo, shamt)) - // if isSRA: - // hi = (sra hi, shamt) -@@ -2066,21 +2070,19 @@ SDValue MipsTargetLowering::lowerShiftRightParts(S - // hi = 0 - SDValue Not = DAG.getNode(ISD::XOR, DL, MVT::i32, Shamt, - DAG.getConstant(-1, MVT::i32)); -- SDValue ShiftLeft1Hi = DAG.getNode(ISD::SHL, DL, MVT::i32, Hi, -- DAG.getConstant(1, MVT::i32)); -- SDValue ShiftLeftHi = DAG.getNode(ISD::SHL, DL, MVT::i32, ShiftLeft1Hi, Not); -- SDValue ShiftRightLo = DAG.getNode(ISD::SRL, DL, MVT::i32, Lo, Shamt); -- SDValue Or = DAG.getNode(ISD::OR, DL, MVT::i32, ShiftLeftHi, ShiftRightLo); -- SDValue ShiftRightHi = DAG.getNode(IsSRA ? ISD::SRA : ISD::SRL, DL, MVT::i32, -- Hi, Shamt); -+ SDValue ShiftLeft1Hi = DAG.getNode(ISD::SHL, DL, VT, Hi, -+ DAG.getConstant(1, VT)); -+ SDValue ShiftLeftHi = DAG.getNode(ISD::SHL, DL, VT, ShiftLeft1Hi, Not); -+ SDValue ShiftRightLo = DAG.getNode(ISD::SRL, DL, VT, Lo, Shamt); -+ SDValue Or = DAG.getNode(ISD::OR, DL, VT, ShiftLeftHi, ShiftRightLo); -+ SDValue ShiftRightHi = DAG.getNode(IsSRA ? ISD::SRA : ISD::SRL, -+ DL, VT, Hi, Shamt); - SDValue Cond = DAG.getNode(ISD::AND, DL, MVT::i32, Shamt, - DAG.getConstant(0x20, MVT::i32)); -- SDValue Shift31 = DAG.getNode(ISD::SRA, DL, MVT::i32, Hi, -- DAG.getConstant(31, MVT::i32)); -- Lo = DAG.getNode(ISD::SELECT, DL, MVT::i32, Cond, ShiftRightHi, Or); -- Hi = DAG.getNode(ISD::SELECT, DL, MVT::i32, Cond, -- IsSRA ? Shift31 : DAG.getConstant(0, MVT::i32), -- ShiftRightHi); -+ SDValue Shift31 = DAG.getNode(ISD::SRA, DL, VT, Hi, DAG.getConstant(31, VT)); -+ Lo = DAG.getNode(ISD::SELECT, DL, VT, Cond, ShiftRightHi, Or); -+ Hi = DAG.getNode(ISD::SELECT, DL, VT, Cond, -+ IsSRA ? Shift31 : DAG.getConstant(0, VT), ShiftRightHi); - - SDValue Ops[2] = {Lo, Hi}; - return DAG.getMergeValues(Ops, DL); -Index: lib/Target/Mips/MipsSEISelDAGToDAG.cpp -=================================================================== ---- lib/Target/Mips/MipsSEISelDAGToDAG.cpp -+++ lib/Target/Mips/MipsSEISelDAGToDAG.cpp -@@ -236,13 +236,31 @@ SDNode *MipsSEDAGToDAGISel::selectAddESubE(unsigne - (Opc == ISD::SUBC || Opc == ISD::SUBE)) && - "(ADD|SUB)E flag operand must come from (ADD|SUB)C/E insn"); - -+ unsigned SLTuOp = Mips::SLTu, ADDuOp = Mips::ADDu; -+ if (Subtarget->isGP64bit()) { -+ SLTuOp = Mips::SLTu64; -+ ADDuOp = Mips::DADDu; -+ } -+ - SDValue Ops[] = { CmpLHS, InFlag.getOperand(1) }; - SDValue LHS = Node->getOperand(0), RHS = Node->getOperand(1); - EVT VT = LHS.getValueType(); - -- SDNode *Carry = CurDAG->getMachineNode(Mips::SLTu, DL, VT, Ops); -- SDNode *AddCarry = CurDAG->getMachineNode(Mips::ADDu, DL, VT, -+ SDNode *Carry = CurDAG->getMachineNode(SLTuOp, DL, VT, Ops); -+ -+ if (Subtarget->isGP64bit()) { -+ // On 64-bit targets, sltu produces an i64 but our backend currently says -+ // that SLTu64 produces an i32. We need to fix this in the long run but for -+ // now, just make the DAG type-correct by asserting the upper bits are zero. -+ Carry = CurDAG->getMachineNode(Mips::SUBREG_TO_REG, DL, VT, -+ CurDAG->getTargetConstant(0, VT), -+ SDValue(Carry, 0), -+ CurDAG->getTargetConstant(Mips::sub_32, VT)); -+ } -+ -+ SDNode *AddCarry = CurDAG->getMachineNode(ADDuOp, DL, VT, - SDValue(Carry, 0), RHS); -+ - return CurDAG->SelectNodeTo(Node, MOp, VT, MVT::Glue, LHS, - SDValue(AddCarry, 0)); - } -@@ -641,7 +659,8 @@ std::pair MipsSEDAGToDAGISel::selec - - case ISD::SUBE: { - SDValue InFlag = Node->getOperand(2); -- Result = selectAddESubE(Mips::SUBu, InFlag, InFlag.getOperand(0), DL, Node); -+ unsigned Opc = Subtarget->isGP64bit() ? Mips::DSUBu : Mips::SUBu; -+ Result = selectAddESubE(Opc, InFlag, InFlag.getOperand(0), DL, Node); - return std::make_pair(true, Result); - } - -@@ -649,7 +668,8 @@ std::pair MipsSEDAGToDAGISel::selec - if (Subtarget->hasDSP()) // Select DSP instructions, ADDSC and ADDWC. - break; - SDValue InFlag = Node->getOperand(2); -- Result = selectAddESubE(Mips::ADDu, InFlag, InFlag.getValue(0), DL, Node); -+ unsigned Opc = Subtarget->isGP64bit() ? Mips::DADDu : Mips::ADDu; -+ Result = selectAddESubE(Opc, InFlag, InFlag.getValue(0), DL, Node); - return std::make_pair(true, Result); - } - -Index: lib/Target/Mips/MipsSEISelLowering.cpp -=================================================================== ---- lib/Target/Mips/MipsSEISelLowering.cpp -+++ lib/Target/Mips/MipsSEISelLowering.cpp -@@ -122,6 +122,8 @@ MipsSETargetLowering::MipsSETargetLowering(const M - setOperationAction(ISD::MUL, MVT::i64, Custom); - - if (Subtarget.isGP64bit()) { -+ setOperationAction(ISD::SMUL_LOHI, MVT::i64, Custom); -+ setOperationAction(ISD::UMUL_LOHI, MVT::i64, Custom); - setOperationAction(ISD::MULHS, MVT::i64, Custom); - setOperationAction(ISD::MULHU, MVT::i64, Custom); - setOperationAction(ISD::SDIVREM, MVT::i64, Custom); -@@ -200,6 +202,8 @@ MipsSETargetLowering::MipsSETargetLowering(const M - if (Subtarget.hasMips64r6()) { - // MIPS64r6 replaces the accumulator-based multiplies with a three register - // instruction -+ setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); -+ setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand); - setOperationAction(ISD::MUL, MVT::i64, Legal); - setOperationAction(ISD::MULHS, MVT::i64, Legal); - setOperationAction(ISD::MULHU, MVT::i64, Legal); -Index: test/CodeGen/Mips/llvm-ir/add.ll -=================================================================== ---- test/CodeGen/Mips/llvm-ir/add.ll -+++ test/CodeGen/Mips/llvm-ir/add.ll -@@ -0,0 +1,115 @@ -+; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=NOT-R2-R6 -check-prefix=GP32 -+; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=NOT-R2-R6 -check-prefix=GP32 -+; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=R2-R6 -check-prefix=GP32 -+; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=R2-R6 -check-prefix=GP32 -+; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=NOT-R2-R6 -check-prefix=GP64 -+; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=NOT-R2-R6 -check-prefix=GP64 -+; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=NOT-R2-R6 -check-prefix=GP64 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=R2-R6 -check-prefix=GP64 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=R2-R6 -check-prefix=GP64 -+ -+define signext i1 @add_i1(i1 signext %a, i1 signext %b) { -+entry: -+; ALL-LABEL: add_i1: -+ -+ ; ALL: addu $[[T0:[0-9]+]], $4, $5 -+ ; ALL: sll $[[T0]], $[[T0]], 31 -+ ; ALL: sra $2, $[[T0]], 31 -+ -+ %r = add i1 %a, %b -+ ret i1 %r -+} -+ -+define signext i8 @add_i8(i8 signext %a, i8 signext %b) { -+entry: -+; ALL-LABEL: add_i8: -+ -+ ; NOT-R2-R6: addu $[[T0:[0-9]+]], $4, $5 -+ ; NOT-R2-R6: sll $[[T0]], $[[T0]], 24 -+ ; NOT-R2-R6: sra $2, $[[T0]], 24 -+ -+ ; R2-R6: addu $[[T0:[0-9]+]], $4, $5 -+ ; R2-R6: seb $2, $[[T0:[0-9]+]] -+ -+ %r = add i8 %a, %b -+ ret i8 %r -+} -+ -+define signext i16 @add_i16(i16 signext %a, i16 signext %b) { -+entry: -+; ALL-LABEL: add_i16: -+ -+ ; NOT-R2-R6: addu $[[T0:[0-9]+]], $4, $5 -+ ; NOT-R2-R6: sll $[[T0]], $[[T0]], 16 -+ ; NOT-R2-R6: sra $2, $[[T0]], 16 -+ -+ ; R2-R6: addu $[[T0:[0-9]+]], $4, $5 -+ ; R2-R6: seh $2, $[[T0:[0-9]+]] -+ -+ %r = add i16 %a, %b -+ ret i16 %r -+} -+ -+define signext i32 @add_i32(i32 signext %a, i32 signext %b) { -+entry: -+; ALL-LABEL: add_i32: -+ -+ ; ALL: addu $2, $4, $5 -+ -+ %r = add i32 %a, %b -+ ret i32 %r -+} -+ -+define signext i64 @add_i64(i64 signext %a, i64 signext %b) { -+entry: -+; ALL-LABEL: add_i64: -+ -+ ; GP32: addu $3, $5, $7 -+ ; GP32: sltu $[[T0:[0-9]+]], $3, $7 -+ ; GP32: addu $[[T1:[0-9]+]], $[[T0]], $6 -+ ; GP32: addu $2, $4, $[[T1]] -+ -+ ; GP64: daddu $2, $4, $5 -+ -+ %r = add i64 %a, %b -+ ret i64 %r -+} -+ -+define signext i128 @add_i128(i128 signext %a, i128 signext %b) { -+entry: -+; ALL-LABEL: add_i128: -+ -+ ; GP32: lw $[[T0:[0-9]+]], 28($sp) -+ ; GP32: addu $[[T1:[0-9]+]], $7, $[[T0]] -+ ; GP32: sltu $[[T2:[0-9]+]], $[[T1]], $[[T0]] -+ ; GP32: lw $[[T3:[0-9]+]], 24($sp) -+ ; GP32: addu $[[T4:[0-9]+]], $[[T2]], $[[T3]] -+ ; GP32: addu $[[T5:[0-9]+]], $6, $[[T4]] -+ ; GP32: sltu $[[T6:[0-9]+]], $[[T5]], $[[T3]] -+ ; GP32: lw $[[T7:[0-9]+]], 20($sp) -+ ; GP32: addu $[[T8:[0-9]+]], $[[T6]], $[[T7]] -+ ; GP32: lw $[[T9:[0-9]+]], 16($sp) -+ ; GP32: addu $3, $5, $[[T8]] -+ ; GP32: sltu $[[T10:[0-9]+]], $3, $[[T7]] -+ ; GP32: addu $[[T11:[0-9]+]], $[[T10]], $[[T9]] -+ ; GP32: addu $2, $4, $[[T11]] -+ ; GP32: move $4, $[[T5]] -+ ; GP32: move $5, $[[T1]] -+ -+ ; GP64: daddu $3, $5, $7 -+ ; GP64: sltu $[[T0:[0-9]+]], $3, $7 -+ ; GP64: daddu $[[T1:[0-9]+]], $[[T0]], $6 -+ ; GP64: daddu $2, $4, $[[T1]] -+ -+ %r = add i128 %a, %b -+ ret i128 %r -+} -Index: test/CodeGen/Mips/llvm-ir/and.ll -=================================================================== ---- test/CodeGen/Mips/llvm-ir/and.ll -+++ test/CodeGen/Mips/llvm-ir/and.ll -@@ -0,0 +1,94 @@ -+; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP32 -+; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP32 -+; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP32 -+; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP32 -+; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 -+; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 -+; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 -+ -+define signext i1 @and_i1(i1 signext %a, i1 signext %b) { -+entry: -+; ALL-LABEL: and_i1: -+ -+ ; ALL: and $2, $4, $5 -+ -+ %r = and i1 %a, %b -+ ret i1 %r -+} -+ -+define signext i8 @and_i8(i8 signext %a, i8 signext %b) { -+entry: -+; ALL-LABEL: and_i8: -+ -+ ; ALL: and $2, $4, $5 -+ -+ %r = and i8 %a, %b -+ ret i8 %r -+} -+ -+define signext i16 @and_i16(i16 signext %a, i16 signext %b) { -+entry: -+; ALL-LABEL: and_i16: -+ -+ ; ALL: and $2, $4, $5 -+ -+ %r = and i16 %a, %b -+ ret i16 %r -+} -+ -+define signext i32 @and_i32(i32 signext %a, i32 signext %b) { -+entry: -+; ALL-LABEL: and_i32: -+ -+ ; GP32: and $2, $4, $5 -+ -+ ; GP64: and $[[T0:[0-9]+]], $4, $5 -+ ; GP64: sll $2, $[[T0]], 0 -+ -+ %r = and i32 %a, %b -+ ret i32 %r -+} -+ -+define signext i64 @and_i64(i64 signext %a, i64 signext %b) { -+entry: -+; ALL-LABEL: and_i64: -+ -+ ; GP32: and $2, $4, $6 -+ ; GP32: and $3, $5, $7 -+ -+ ; GP64: and $2, $4, $5 -+ -+ %r = and i64 %a, %b -+ ret i64 %r -+} -+ -+define signext i128 @and_i128(i128 signext %a, i128 signext %b) { -+entry: -+; ALL-LABEL: and_i128: -+ -+ ; GP32: lw $[[T0:[0-9]+]], 24($sp) -+ ; GP32: lw $[[T1:[0-9]+]], 20($sp) -+ ; GP32: lw $[[T2:[0-9]+]], 16($sp) -+ ; GP32: and $2, $4, $[[T2]] -+ ; GP32: and $3, $5, $[[T1]] -+ ; GP32: and $4, $6, $[[T0]] -+ ; GP32: lw $[[T3:[0-9]+]], 28($sp) -+ ; GP32: and $5, $7, $[[T3]] -+ -+ ; GP64: and $2, $4, $6 -+ ; GP64: and $3, $5, $7 -+ -+ %r = and i128 %a, %b -+ ret i128 %r -+} -Index: test/CodeGen/Mips/llvm-ir/ashr.ll -=================================================================== ---- test/CodeGen/Mips/llvm-ir/ashr.ll -+++ test/CodeGen/Mips/llvm-ir/ashr.ll -@@ -0,0 +1,188 @@ -+; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP32 \ -+; RUN: -check-prefix=M2 -check-prefix=NOT-R2-R6 -+; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP32 -check-prefix=NOT-R2-R6 \ -+; RUN: -check-prefix=32R1-R2 -+; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP32 \ -+; RUN: -check-prefix=32R1-R2 -check-prefix=R2-R6 -+; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP32 \ -+; RUN: -check-prefix=32R6 -check-prefix=R2-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 \ -+; RUN: -check-prefix=M3 -check-prefix=NOT-R2-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 \ -+; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R2-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 \ -+; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R2-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 \ -+; RUN: -check-prefix=GP64-NOT-R6 -check-prefix R2-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 \ -+; RUN: -check-prefix=64R6 -check-prefix=R2-R6 -+ -+define signext i1 @ashr_i1(i1 signext %a, i1 signext %b) { -+entry: -+; ALL-LABEL: ashr_i1: -+ -+ ; ALL: move $2, $4 -+ -+ %r = ashr i1 %a, %b -+ ret i1 %r -+} -+ -+define signext i8 @ashr_i8(i8 signext %a, i8 signext %b) { -+entry: -+; ALL-LABEL: ashr_i8: -+ -+ ; FIXME: The andi instruction is redundant. -+ ; ALL: andi $[[T0:[0-9]+]], $5, 255 -+ ; ALL: srav $2, $4, $[[T0]] -+ -+ %r = ashr i8 %a, %b -+ ret i8 %r -+} -+ -+define signext i16 @ashr_i16(i16 signext %a, i16 signext %b) { -+entry: -+; ALL-LABEL: ashr_i16: -+ -+ ; FIXME: The andi instruction is redundant. -+ ; ALL: andi $[[T0:[0-9]+]], $5, 65535 -+ ; ALL: srav $2, $4, $[[T0]] -+ -+ %r = ashr i16 %a, %b -+ ret i16 %r -+} -+ -+define signext i32 @ashr_i32(i32 signext %a, i32 signext %b) { -+entry: -+; ALL-LABEL: ashr_i32: -+ -+ ; ALL: srav $2, $4, $5 -+ -+ %r = ashr i32 %a, %b -+ ret i32 %r -+} -+ -+define signext i64 @ashr_i64(i64 signext %a, i64 signext %b) { -+entry: -+; ALL-LABEL: ashr_i64: -+ -+ ; M2: srav $[[T0:[0-9]+]], $4, $7 -+ ; M2: andi $[[T1:[0-9]+]], $7, 32 -+ ; M2: bnez $[[T1]], $[[BB0:BB[0-9_]+]] -+ ; M2: move $3, $[[T0]] -+ ; M2: srlv $[[T2:[0-9]+]], $5, $7 -+ ; M2: not $[[T3:[0-9]+]], $7 -+ ; M2: sll $[[T4:[0-9]+]], $4, 1 -+ ; M2: sllv $[[T5:[0-9]+]], $[[T4]], $[[T3]] -+ ; M2: or $3, $[[T3]], $[[T2]] -+ ; M2: $[[BB0]]: -+ ; M2: beqz $[[T1]], $[[BB1:BB[0-9_]+]] -+ ; M2: nop -+ ; M2: sra $2, $4, 31 -+ ; M2: $[[BB1]]: -+ ; M2: jr $ra -+ ; M2: nop -+ -+ ; 32R1-R2: srlv $[[T0:[0-9]+]], $5, $7 -+ ; 32R1-R2: not $[[T1:[0-9]+]], $7 -+ ; 32R1-R2: sll $[[T2:[0-9]+]], $4, 1 -+ ; 32R1-R2: sllv $[[T3:[0-9]+]], $[[T2]], $[[T1]] -+ ; 32R1-R2: or $3, $[[T3]], $[[T0]] -+ ; 32R1-R2: srav $[[T4:[0-9]+]], $4, $7 -+ ; 32R1-R2: andi $[[T5:[0-9]+]], $7, 32 -+ ; 32R1-R2: movn $3, $[[T4]], $[[T5]] -+ ; 32R1-R2: sra $4, $4, 31 -+ ; 32R1-R2: jr $ra -+ ; 32R1-R2: movn $2, $4, $[[T5]] -+ -+ ; 32R6: srav $[[T0:[0-9]+]], $4, $7 -+ ; 32R6: andi $[[T1:[0-9]+]], $7, 32 -+ ; 32R6: seleqz $[[T2:[0-9]+]], $[[T0]], $[[T1]] -+ ; 32R6: sra $[[T3:[0-9]+]], $4, 31 -+ ; 32R6: selnez $[[T4:[0-9]+]], $[[T3]], $[[T1]] -+ ; 32R6: or $[[T5:[0-9]+]], $[[T4]], $[[T2]] -+ ; 32R6: srlv $[[T6:[0-9]+]], $5, $7 -+ ; 32R6: not $[[T7:[0-9]+]], $7 -+ ; 32R6: sll $[[T8:[0-9]+]], $4, 1 -+ ; 32R6: sllv $[[T9:[0-9]+]], $[[T8]], $[[T7]] -+ ; 32R6: or $[[T10:[0-9]+]], $[[T9]], $[[T6]] -+ ; 32R6: seleqz $[[T11:[0-9]+]], $[[T10]], $[[T1]] -+ ; 32R6: selnez $[[T12:[0-9]+]], $[[T0]], $[[T1]] -+ ; 32R6: jr $ra -+ ; 32R6: or $3, $[[T0]], $[[T11]] -+ -+ ; FIXME: The sll instruction below is redundant. -+ ; GP64: sll $[[T0:[0-9]+]], $5, 0 -+ ; GP64: dsrav $2, $4, $[[T0]] -+ -+ %r = ashr i64 %a, %b -+ ret i64 %r -+} -+ -+define signext i128 @ashr_i128(i128 signext %a, i128 signext %b) { -+entry: -+; ALL-LABEL: ashr_i128: -+ -+ ; GP32: lw $25, %call16(__ashrti3)($gp) -+ -+ ; M3: sll $[[T0:[0-9]+]], $7, 0 -+ ; M3: dsrav $[[T1:[0-9]+]], $4, $[[T0]] -+ ; M3: andi $[[T2:[0-9]+]], $[[T0]], 32 -+ ; M3: bnez $[[T3:[0-9]+]], $[[BB0:BB[0-9_]+]] -+ ; M3: move $3, $[[T1]] -+ ; M3: dsrlv $[[T4:[0-9]+]], $5, $[[T0]] -+ ; M3: dsll $[[T5:[0-9]+]], $4, 1 -+ ; M3: not $[[T6:[0-9]+]], $[[T0]] -+ ; M3: dsllv $[[T7:[0-9]+]], $[[T5]], $[[T6]] -+ ; M3: or $3, $[[T7]], $[[T4]] -+ ; M3: $[[BB0]]: -+ ; M3: beqz $[[T3]], $[[BB1:BB[0-9_]+]] -+ ; M3: nop -+ ; M3: dsra $2, $4, 31 -+ ; M3: $[[BB1]]: -+ ; M3: jr $ra -+ ; M3: nop -+ -+ ; GP64-NOT-R6: sll $[[T0:[0-9]+]], $7, 0 -+ ; GP64-NOT-R6: dsrlv $[[T1:[0-9]+]], $5, $[[T0]] -+ ; GP64-NOT-R6: dsll $[[T2:[0-9]+]], $4, 1 -+ ; GP64-NOT-R6: not $[[T3:[0-9]+]], $[[T0]] -+ ; GP64-NOT-R6: dsllv $[[T4:[0-9]+]], $[[T2]], $[[T3]] -+ ; GP64-NOT-R6: or $3, $[[T4]], $[[T1]] -+ ; GP64-NOT-R6: dsrav $2, $4, $[[T0]] -+ ; GP64-NOT-R6: andi $[[T5:[0-9]+]], $[[T0]], 32 -+ -+ ; GP64-NOT-R6: movn $3, $2, $[[T5]] -+ ; GP64-NOT-R6: dsra $[[T6:[0-9]+]], $4, 31 -+ ; GP64-NOT-R6: jr $ra -+ ; GP64-NOT-R6: movn $2, $[[T6]], $[[T5]] -+ -+ ; 64R6: sll $[[T0:[0-9]+]], $7, 0 -+ ; 64R6: dsrav $[[T1:[0-9]+]], $4, $[[T0]] -+ ; 64R6: andi $[[T2:[0-9]+]], $[[T0]], 32 -+ ; 64R6: sll $[[T3:[0-9]+]], $[[T2]], 0 -+ ; 64R6: seleqz $[[T4:[0-9]+]], $[[T1]], $[[T3]] -+ ; 64R6: dsra $[[T5:[0-9]+]], $4, 31 -+ ; 64R6: selnez $[[T6:[0-9]+]], $[[T5]], $[[T3]] -+ ; 64R6: or $2, $[[T6]], $[[T4]] -+ ; 64R6: dsrlv $[[T7:[0-9]+]], $5, $[[T0]] -+ ; 64R6: dsll $[[T8:[0-9]+]], $4, 1 -+ ; 64R6: not $[[T9:[0-9]+]], $[[T0]] -+ ; 64R6: dsllv $[[T10:[0-9]+]], $[[T8]], $[[T9]] -+ ; 64R6: or $[[T11:[0-9]+]], $[[T10]], $[[T7]] -+ ; 64R6: seleqz $[[T12:[0-9]+]], $[[T11]], $[[T3]] -+ ; 64R6: selnez $[[T13:[0-9]+]], $[[T1]], $[[T3]] -+ ; 64R6: jr $ra -+ ; 64R6: or $3, $[[T13]], $[[T12]] -+ -+ %r = ashr i128 %a, %b -+ ret i128 %r -+} -Index: test/CodeGen/Mips/llvm-ir/lshr.ll -=================================================================== ---- test/CodeGen/Mips/llvm-ir/lshr.ll -+++ test/CodeGen/Mips/llvm-ir/lshr.ll -@@ -0,0 +1,176 @@ -+; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP32 \ -+; RUN: -check-prefix=M2 -check-prefix=NOT-R2-R6 -+; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP32 -check-prefix=NOT-R2-R6 \ -+; RUN: -check-prefix=32R1-R2 -+; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP32 \ -+; RUN: -check-prefix=32R1-R2 -check-prefix=R2-R6 -+; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP32 \ -+; RUN: -check-prefix=32R6 -check-prefix=R2-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 \ -+; RUN: -check-prefix=M3 -check-prefix=NOT-R2-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 \ -+; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R2-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 \ -+; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R2-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 \ -+; RUN: -check-prefix=GP64-NOT-R6 -check-prefix R2-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 \ -+; RUN: -check-prefix=64R6 -check-prefix=R2-R6 -+ -+define signext i1 @lshr_i1(i1 signext %a, i1 signext %b) { -+entry: -+; ALL-LABEL: lshr_i1: -+ -+ ; ALL: move $2, $4 -+ -+ %r = lshr i1 %a, %b -+ ret i1 %r -+} -+ -+define zeroext i8 @lshr_i8(i8 zeroext %a, i8 zeroext %b) { -+entry: -+; ALL-LABEL: lshr_i8: -+ -+ ; ALL: srlv $[[T0:[0-9]+]], $4, $5 -+ ; ALL: andi $2, $[[T0]], 255 -+ -+ %r = lshr i8 %a, %b -+ ret i8 %r -+} -+ -+define zeroext i16 @lshr_i16(i16 zeroext %a, i16 zeroext %b) { -+entry: -+; ALL-LABEL: lshr_i16: -+ -+ ; ALL: srlv $[[T0:[0-9]+]], $4, $5 -+ ; ALL: andi $2, $[[T0]], 65535 -+ -+ %r = lshr i16 %a, %b -+ ret i16 %r -+} -+ -+define signext i32 @lshr_i32(i32 signext %a, i32 signext %b) { -+entry: -+; ALL-LABEL: lshr_i32: -+ -+ ; ALL: srlv $2, $4, $5 -+ -+ %r = lshr i32 %a, %b -+ ret i32 %r -+} -+ -+define signext i64 @lshr_i64(i64 signext %a, i64 signext %b) { -+entry: -+; ALL-LABEL: lshr_i64: -+ -+ ; M2: srlv $[[T0:[0-9]+]], $4, $7 -+ ; M2: andi $[[T1:[0-9]+]], $7, 32 -+ ; M2: bnez $[[T1]], $[[BB0:BB[0-9_]+]] -+ ; M2: move $3, $[[T0]] -+ ; M2: srlv $[[T2:[0-9]+]], $5, $7 -+ ; M2: not $[[T3:[0-9]+]], $7 -+ ; M2: sll $[[T4:[0-9]+]], $4, 1 -+ ; M2: sllv $[[T5:[0-9]+]], $[[T4]], $[[T3]] -+ ; M2: or $3, $[[T3]], $[[T2]] -+ ; M2: $[[BB0]]: -+ ; M2: bnez $[[T1]], $[[BB1:BB[0-9_]+]] -+ ; M2: addiu $2, $zero, 0 -+ ; M2: move $2, $[[T0]] -+ ; M2: $[[BB1]]: -+ ; M2: jr $ra -+ ; M2: nop -+ -+ ; 32R1-R2: srlv $[[T0:[0-9]+]], $5, $7 -+ ; 32R1-R2: not $[[T1:[0-9]+]], $7 -+ ; 32R1-R2: sll $[[T2:[0-9]+]], $4, 1 -+ ; 32R1-R2: sllv $[[T3:[0-9]+]], $[[T2]], $[[T1]] -+ ; 32R1-R2: or $3, $[[T3]], $[[T0]] -+ ; 32R1-R2: srlv $[[T4:[0-9]+]], $4, $7 -+ ; 32R1-R2: andi $[[T5:[0-9]+]], $7, 32 -+ ; 32R1-R2: movn $3, $[[T4]], $[[T5]] -+ ; 32R1-R2: jr $ra -+ ; 32R1-R2: movn $2, $zero, $[[T5]] -+ -+ ; 32R6: srlv $[[T0:[0-9]+]], $5, $7 -+ ; 32R6: not $[[T1:[0-9]+]], $7 -+ ; 32R6: sll $[[T2:[0-9]+]], $4, 1 -+ ; 32R6: sllv $[[T3:[0-9]+]], $[[T2]], $[[T1]] -+ ; 32R6: or $[[T4:[0-9]+]], $[[T3]], $[[T0]] -+ ; 32R6: andi $[[T5:[0-9]+]], $7, 32 -+ ; 32R6: seleqz $[[T6:[0-9]+]], $[[T4]], $[[T3]] -+ ; 32R6: srlv $[[T7:[0-9]+]], $4, $7 -+ ; 32R6: selnez $[[T8:[0-9]+]], $[[T7]], $[[T5]] -+ ; 32R6: or $3, $[[T8]], $[[T6]] -+ ; 32R6: jr $ra -+ ; 32R6: seleqz $2, $[[T7]], $[[T5]] -+ -+ ; GP64: sll $[[T0:[0-9]+]], $5, 0 -+ ; GP64: dsrlv $2, $4, $[[T0]] -+ -+ %r = lshr i64 %a, %b -+ ret i64 %r -+} -+ -+define signext i128 @lshr_i128(i128 signext %a, i128 signext %b) { -+entry: -+; ALL-LABEL: lshr_i128: -+ -+ ; GP32: lw $25, %call16(__lshrti3)($gp) -+ -+ ; M3: sll $[[T0:[0-9]+]], $7, 0 -+ ; M3: dsrlv $[[T1:[0-9]+]], $4, $[[T0]] -+ ; M3: andi $[[T2:[0-9]+]], $[[T0]], 32 -+ ; M3: bnez $[[T3:[0-9]+]], $[[BB0:BB[0-9_]+]] -+ ; M3: move $3, $[[T1]] -+ ; M3: dsrlv $[[T4:[0-9]+]], $5, $[[T0]] -+ ; M3: dsll $[[T5:[0-9]+]], $4, 1 -+ ; M3: not $[[T6:[0-9]+]], $[[T0]] -+ ; M3: dsllv $[[T7:[0-9]+]], $[[T5]], $[[T6]] -+ ; M3: or $3, $[[T7]], $[[T4]] -+ ; M3: $[[BB0]]: -+ ; M3: bnez $[[T3]], $[[BB1:BB[0-9_]+]] -+ ; M3: daddiu $2, $zero, 0 -+ ; M3: move $2, $[[T1]] -+ ; M3: $[[BB1]]: -+ ; M3: jr $ra -+ ; M3: nop -+ -+ ; GP64-NOT-R6: sll $[[T0:[0-9]+]], $7, 0 -+ ; GP64-NOT-R6: dsrlv $[[T1:[0-9]+]], $5, $[[T0]] -+ ; GP64-NOT-R6: dsll $[[T2:[0-9]+]], $4, 1 -+ ; GP64-NOT-R6: not $[[T3:[0-9]+]], $[[T0]] -+ ; GP64-NOT-R6: dsllv $[[T4:[0-9]+]], $[[T2]], $[[T3]] -+ ; GP64-NOT-R6: or $3, $[[T4]], $[[T1]] -+ ; GP64-NOT-R6: dsrlv $2, $4, $[[T0]] -+ ; GP64-NOT-R6: andi $[[T5:[0-9]+]], $[[T0]], 32 -+ ; GP64-NOT-R6: movn $3, $2, $[[T5]] -+ ; GP64-NOT-R6: jr $ra -+ ; GP64-NOT-R6: movn $2, $zero, $1 -+ -+ ; 64R6: sll $[[T0:[0-9]+]], $7, 0 -+ ; 64R6: dsrlv $[[T1:[0-9]+]], $5, $[[T0]] -+ ; 64R6: dsll $[[T2:[0-9]+]], $4, 1 -+ ; 64R6: not $[[T3:[0-9]+]], $[[T0]] -+ ; 64R6: dsllv $[[T4:[0-9]+]], $[[T2]], $[[T3]] -+ ; 64R6: or $[[T5:[0-9]+]], $[[T4]], $[[T1]] -+ ; 64R6: andi $[[T6:[0-9]+]], $[[T0]], 32 -+ ; 64R6: sll $[[T7:[0-9]+]], $[[T6]], 0 -+ ; 64R6: seleqz $[[T8:[0-9]+]], $[[T5]], $[[T7]] -+ ; 64R6: dsrlv $[[T9:[0-9]+]], $4, $[[T0]] -+ ; 64R6: selnez $[[T10:[0-9]+]], $[[T9]], $[[T7]] -+ ; 64R6: or $3, $[[T10]], $[[T8]] -+ ; 64R6: jr $ra -+ ; 64R6: seleqz $2, $[[T0]], $[[T7]] -+ -+ %r = lshr i128 %a, %b -+ ret i128 %r -+} -Index: test/CodeGen/Mips/llvm-ir/mul.ll -=================================================================== ---- test/CodeGen/Mips/llvm-ir/mul.ll -+++ test/CodeGen/Mips/llvm-ir/mul.ll -@@ -1,19 +1,19 @@ --; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \ --; RUN: -check-prefix=ALL -check-prefix=M2 --; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \ --; RUN: -check-prefix=ALL -check-prefix=32R1-R2 -check-prefix=32R1 --; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \ --; RUN: -check-prefix=ALL -check-prefix=32R1-R2 -check-prefix=32R2 --; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \ --; RUN: -check-prefix=ALL -check-prefix=32R6 --; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \ --; RUN: -check-prefix=ALL -check-prefix=M4 --; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \ --; RUN: -check-prefix=ALL -check-prefix=64R1-R2 --; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \ --; RUN: -check-prefix=ALL -check-prefix=64R1-R2 --; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \ --; RUN: -check-prefix=ALL -check-prefix=64R6 -+; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s -check-prefix=ALL \ -+; RUN: -check-prefix=M2 -check-prefix=GP32 -+; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s -check-prefix=ALL \ -+; RUN: -check-prefix=32R1-R2 -check-prefix=GP32 -+; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s -check-prefix=ALL \ -+; RUN: -check-prefix=32R1-R2 -check-prefix=32R2 -check-prefix=GP32 -+; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s -check-prefix=ALL \ -+; RUN: -check-prefix=32R6 -check-prefix=GP32 -+; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s -check-prefix=ALL \ -+; RUN: -check-prefix=M4 -check-prefix=GP64-NOT-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s -check-prefix=ALL \ -+; RUN: -check-prefix=64R1-R2 -check-prefix=GP64-NOT-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s -check-prefix=ALL \ -+; RUN: -check-prefix=64R1-R2 -check-prefix=GP64 -check-prefix=GP64-NOT-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s -check-prefix=ALL \ -+; RUN: -check-prefix=64R6 - - define signext i1 @mul_i1(i1 signext %a, i1 signext %b) { - entry: -@@ -179,3 +179,30 @@ entry: - %r = mul i64 %a, %b - ret i64 %r - } -+ -+define signext i128 @mul_i128(i128 signext %a, i128 signext %b) { -+entry: -+; ALL-LABEL: mul_i128: -+ -+ ; GP32: lw $25, %call16(__multi3)($gp) -+ -+ ; GP64-NOT-R6: dmult $4, $7 -+ ; GP64-NOT-R6: mflo $[[T0:[0-9]+]] -+ ; GP64-NOT-R6: dmult $5, $6 -+ ; GP64-NOT-R6: mflo $[[T1:[0-9]+]] -+ ; GP64-NOT-R6: dmultu $5, $7 -+ ; GP64-NOT-R6: mflo $3 -+ ; GP64-NOT-R6: mfhi $[[T2:[0-9]+]] -+ ; GP64-NOT-R6: daddu $[[T3:[0-9]+]], $[[T2]], $[[T1]] -+ ; GP64-NOT-R6: daddu $2, $[[T3:[0-9]+]], $[[T0]] -+ -+ ; 64R6: dmul $[[T0:[0-9]+]], $5, $6 -+ ; 64R6: dmuhu $[[T1:[0-9]+]], $5, $7 -+ ; 64R6: daddu $[[T2:[0-9]+]], $[[T1]], $[[T0]] -+ ; 64R6: dmul $[[T3:[0-9]+]], $4, $7 -+ ; 64R6: daddu $2, $[[T2]], $[[T3]] -+ ; 64R6: dmul $3, $5, $7 -+ -+ %r = mul i128 %a, %b -+ ret i128 %r -+} -Index: test/CodeGen/Mips/llvm-ir/or.ll -=================================================================== ---- test/CodeGen/Mips/llvm-ir/or.ll -+++ test/CodeGen/Mips/llvm-ir/or.ll -@@ -0,0 +1,95 @@ -+; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP32 -+; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP32 -+; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP32 -+; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP32 -+; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 -+; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 -+; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 -+ -+define signext i1 @or_i1(i1 signext %a, i1 signext %b) { -+entry: -+; ALL-LABEL: or_i1: -+ -+ ; ALL: or $2, $4, $5 -+ -+ %r = or i1 %a, %b -+ ret i1 %r -+} -+ -+define signext i8 @or_i8(i8 signext %a, i8 signext %b) { -+entry: -+; ALL-LABEL: or_i8: -+ -+ ; ALL: or $2, $4, $5 -+ -+ %r = or i8 %a, %b -+ ret i8 %r -+} -+ -+define signext i16 @or_i16(i16 signext %a, i16 signext %b) { -+entry: -+; ALL-LABEL: or_i16: -+ -+ ; ALL: or $2, $4, $5 -+ -+ %r = or i16 %a, %b -+ ret i16 %r -+} -+ -+define signext i32 @or_i32(i32 signext %a, i32 signext %b) { -+entry: -+; ALL-LABEL: or_i32: -+ -+ ; GP32: or $2, $4, $5 -+ -+ ; GP64: or $[[T0:[0-9]+]], $4, $5 -+ ; FIXME: The sll instruction below is redundant. -+ ; GP64: sll $2, $[[T0]], 0 -+ -+ %r = or i32 %a, %b -+ ret i32 %r -+} -+ -+define signext i64 @or_i64(i64 signext %a, i64 signext %b) { -+entry: -+; ALL-LABEL: or_i64: -+ -+ ; GP32: or $2, $4, $6 -+ ; GP32: or $3, $5, $7 -+ -+ ; GP64: or $2, $4, $5 -+ -+ %r = or i64 %a, %b -+ ret i64 %r -+} -+ -+define signext i128 @or_i128(i128 signext %a, i128 signext %b) { -+entry: -+; ALL-LABEL: or_i128: -+ -+ ; GP32: lw $[[T0:[0-9]+]], 24($sp) -+ ; GP32: lw $[[T1:[0-9]+]], 20($sp) -+ ; GP32: lw $[[T2:[0-9]+]], 16($sp) -+ ; GP32: or $2, $4, $[[T2]] -+ ; GP32: or $3, $5, $[[T1]] -+ ; GP32: or $4, $6, $[[T0]] -+ ; GP32: lw $[[T3:[0-9]+]], 28($sp) -+ ; GP32: or $5, $7, $[[T3]] -+ -+ ; GP64: or $2, $4, $6 -+ ; GP64: or $3, $5, $7 -+ -+ %r = or i128 %a, %b -+ ret i128 %r -+} -Index: test/CodeGen/Mips/llvm-ir/sdiv.ll -=================================================================== ---- test/CodeGen/Mips/llvm-ir/sdiv.ll -+++ test/CodeGen/Mips/llvm-ir/sdiv.ll -@@ -0,0 +1,136 @@ -+; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \ -+; RUN: -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6 -check-prefix=GP32 -+; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \ -+; RUN: -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6 -check-prefix=GP32 -+; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \ -+; RUN: -check-prefix=NOT-R6 -check-prefix=R2 -check-prefix=GP32 -+; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \ -+; RUN: -check-prefix=R6 -check-prefix=GP32 -+; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \ -+; RUN: -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6 -check-prefix=GP64-NOT-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \ -+; RUN: -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6 -check-prefix=GP64-NOT-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \ -+; RUN: -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6 -check-prefix=GP64-NOT-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \ -+; RUN: -check-prefix=NOT-R6 -check-prefix=R2 -check-prefix=GP64-NOT-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \ -+; RUN: -check-prefix=R6 -check-prefix=64R6 -+ -+define signext i1 @sdiv_i1(i1 signext %a, i1 signext %b) { -+entry: -+; ALL-LABEL: sdiv_i1: -+ -+ ; NOT-R6: div $zero, $4, $5 -+ ; NOT-R6: teq $5, $zero, 7 -+ ; NOT-R6: mflo $[[T0:[0-9]+]] -+ ; FIXME: The sll/sra instructions are redundant since div is signed. -+ ; NOT-R6: sll $[[T1:[0-9]+]], $[[T0]], 31 -+ ; NOT-R6: sra $2, $[[T1]], 31 -+ -+ ; R6: div $[[T0:[0-9]+]], $4, $5 -+ ; R6: teq $5, $zero, 7 -+ ; FIXME: The sll/sra instructions are redundant since div is signed. -+ ; R6: sll $[[T1:[0-9]+]], $[[T0]], 31 -+ ; R6: sra $2, $[[T1]], 31 -+ -+ %r = sdiv i1 %a, %b -+ ret i1 %r -+} -+ -+define signext i8 @sdiv_i8(i8 signext %a, i8 signext %b) { -+entry: -+; ALL-LABEL: sdiv_i8: -+ -+ ; NOT-R2-R6: div $zero, $4, $5 -+ ; NOT-R2-R6: teq $5, $zero, 7 -+ ; NOT-R2-R6: mflo $[[T0:[0-9]+]] -+ ; FIXME: The sll/sra instructions are redundant since div is signed. -+ ; NOT-R2-R6: sll $[[T1:[0-9]+]], $[[T0]], 24 -+ ; NOT-R2-R6: sra $2, $[[T1]], 24 -+ -+ ; R2: div $zero, $4, $5 -+ ; R2: teq $5, $zero, 7 -+ ; R2: mflo $[[T0:[0-9]+]] -+ ; FIXME: This instruction is redundant. -+ ; R2: seb $2, $[[T0]] -+ -+ ; R6: div $[[T0:[0-9]+]], $4, $5 -+ ; R6: teq $5, $zero, 7 -+ ; FIXME: This instruction is redundant. -+ ; R6: seb $2, $[[T0]] -+ -+ %r = sdiv i8 %a, %b -+ ret i8 %r -+} -+ -+define signext i16 @sdiv_i16(i16 signext %a, i16 signext %b) { -+entry: -+; ALL-LABEL: sdiv_i16: -+ -+ ; NOT-R2-R6: div $zero, $4, $5 -+ ; NOT-R2-R6: teq $5, $zero, 7 -+ ; NOT-R2-R6: mflo $[[T0:[0-9]+]] -+ ; FIXME: The sll/sra instructions are redundant since div is signed. -+ ; NOT-R2-R6: sll $[[T1:[0-9]+]], $[[T0]], 16 -+ ; NOT-R2-R6: sra $2, $[[T1]], 16 -+ -+ ; R2: div $zero, $4, $5 -+ ; R2: teq $5, $zero, 7 -+ ; R2: mflo $[[T0:[0-9]+]] -+ ; FIXME: This is instruction is redundant since div is signed. -+ ; R2: seh $2, $[[T0]] -+ -+ ; R6: div $[[T0:[0-9]+]], $4, $5 -+ ; R6: teq $5, $zero, 7 -+ ; FIXME: This is instruction is redundant since div is signed. -+ ; R6: seh $2, $[[T0]] -+ -+ %r = sdiv i16 %a, %b -+ ret i16 %r -+} -+ -+define signext i32 @sdiv_i32(i32 signext %a, i32 signext %b) { -+entry: -+; ALL-LABEL: sdiv_i32: -+ -+ ; NOT-R6: div $zero, $4, $5 -+ ; NOT-R6: teq $5, $zero, 7 -+ ; NOT-R6: mflo $2 -+ -+ ; R6: div $2, $4, $5 -+ ; R6: teq $5, $zero, 7 -+ -+ %r = sdiv i32 %a, %b -+ ret i32 %r -+} -+ -+define signext i64 @sdiv_i64(i64 signext %a, i64 signext %b) { -+entry: -+; ALL-LABEL: sdiv_i64: -+ -+ ; GP32: lw $25, %call16(__divdi3)($gp) -+ -+ ; GP64-NOT-R6: ddiv $zero, $4, $5 -+ ; GP64-NOT-R6: teq $5, $zero, 7 -+ ; GP64-NOT-R6: mflo $2 -+ -+ ; 64R6: ddiv $2, $4, $5 -+ ; 64R6: teq $5, $zero, 7 -+ -+ %r = sdiv i64 %a, %b -+ ret i64 %r -+} -+ -+define signext i128 @sdiv_i128(i128 signext %a, i128 signext %b) { -+entry: -+ ; ALL-LABEL: sdiv_i128: -+ -+ ; GP32: lw $25, %call16(__divti3)($gp) -+ -+ ; GP64-NOT-R6: ld $25, %call16(__divti3)($gp) -+ ; 64R6: ld $25, %call16(__divti3)($gp) -+ -+ %r = sdiv i128 %a, %b -+ ret i128 %r -+} -Index: test/CodeGen/Mips/llvm-ir/shl.ll -=================================================================== ---- test/CodeGen/Mips/llvm-ir/shl.ll -+++ test/CodeGen/Mips/llvm-ir/shl.ll -@@ -0,0 +1,188 @@ -+; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP32 \ -+; RUN: -check-prefix=M2 -check-prefix=NOT-R2-R6 -+; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP32 -check-prefix=NOT-R2-R6 \ -+; RUN: -check-prefix=32R1-R2 -+; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP32 \ -+; RUN: -check-prefix=32R1-R2 -check-prefix=R2-R6 -+; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP32 \ -+; RUN: -check-prefix=32R6 -check-prefix=R2-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 \ -+; RUN: -check-prefix=M3 -check-prefix=NOT-R2-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 \ -+; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R2-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 \ -+; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R2-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 \ -+; RUN: -check-prefix=GP64-NOT-R6 -check-prefix R2-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 \ -+; RUN: -check-prefix=64R6 -check-prefix=R2-R6 -+ -+define signext i1 @shl_i1(i1 signext %a, i1 signext %b) { -+entry: -+; ALL-LABEL: shl_i1: -+ -+ ; ALL: move $2, $4 -+ -+ %r = shl i1 %a, %b -+ ret i1 %r -+} -+ -+define signext i8 @shl_i8(i8 signext %a, i8 signext %b) { -+entry: -+; ALL-LABEL: shl_i8: -+ -+ ; NOT-R2-R6: andi $[[T0:[0-9]+]], $5, 255 -+ ; NOT-R2-R6: sllv $[[T1:[0-9]+]], $4, $[[T0]] -+ ; NOT-R2-R6: sll $[[T2:[0-9]+]], $[[T1]], 24 -+ ; NOT-R2-R6: sra $2, $[[T2]], 24 -+ -+ ; R2-R6: andi $[[T0:[0-9]+]], $5, 255 -+ ; R2-R6: sllv $[[T1:[0-9]+]], $4, $[[T0]] -+ ; R2-R6: seb $2, $[[T1]] -+ -+ %r = shl i8 %a, %b -+ ret i8 %r -+} -+ -+define signext i16 @shl_i16(i16 signext %a, i16 signext %b) { -+entry: -+; ALL-LABEL: shl_i16: -+ -+ ; NOT-R2-R6: andi $[[T0:[0-9]+]], $5, 65535 -+ ; NOT-R2-R6: sllv $[[T1:[0-9]+]], $4, $[[T0]] -+ ; NOT-R2-R6: sll $[[T2:[0-9]+]], $[[T1]], 16 -+ ; NOT-R2-R6: sra $2, $[[T2]], 16 -+ -+ ; R2-R6: andi $[[T0:[0-9]+]], $5, 65535 -+ ; R2-R6: sllv $[[T1:[0-9]+]], $4, $[[T0]] -+ ; R2-R6: seh $2, $[[T1]] -+ -+ %r = shl i16 %a, %b -+ ret i16 %r -+} -+ -+define signext i32 @shl_i32(i32 signext %a, i32 signext %b) { -+entry: -+; ALL-LABEL: shl_i32: -+ -+ ; ALL: sllv $2, $4, $5 -+ -+ %r = shl i32 %a, %b -+ ret i32 %r -+} -+ -+define signext i64 @shl_i64(i64 signext %a, i64 signext %b) { -+entry: -+; ALL-LABEL: shl_i64: -+ -+ ; M2: sllv $[[T0:[0-9]+]], $5, $7 -+ ; M2: andi $[[T1:[0-9]+]], $7, 32 -+ ; M2: bnez $[[T1]], $[[BB0:BB[0-9_]+]] -+ ; M2: move $2, $[[T0]] -+ ; M2: sllv $[[T2:[0-9]+]], $4, $7 -+ ; M2: not $[[T3:[0-9]+]], $7 -+ ; M2: srl $[[T4:[0-9]+]], $5, 1 -+ ; M2: srlv $[[T5:[0-9]+]], $[[T4]], $[[T3]] -+ ; M2: or $2, $[[T2]], $[[T3]] -+ ; M2: $[[BB0]]: -+ ; M2: bnez $[[T1]], $[[BB1:BB[0-9_]+]] -+ ; M2: addiu $3, $zero, 0 -+ ; M2: move $3, $[[T0]] -+ ; M2: $[[BB1]]: -+ ; M2: jr $ra -+ ; M2: nop -+ -+ ; 32R1-R2: sllv $[[T0:[0-9]+]], $4, $7 -+ ; 32R1-R2: not $[[T1:[0-9]+]], $7 -+ ; 32R1-R2: srl $[[T2:[0-9]+]], $5, 1 -+ ; 32R1-R2: srlv $[[T3:[0-9]+]], $[[T2]], $[[T1]] -+ ; 32R1-R2: or $2, $[[T0]], $[[T3]] -+ ; 32R1-R2: sllv $[[T4:[0-9]+]], $5, $7 -+ ; 32R1-R2: andi $[[T5:[0-9]+]], $7, 32 -+ ; 32R1-R2: movn $2, $[[T4]], $[[T5]] -+ ; 32R1-R2: jr $ra -+ ; 32R1-R2: movn $3, $zero, $[[T5]] -+ -+ ; 32R6: sllv $[[T0:[0-9]+]], $4, $7 -+ ; 32R6: not $[[T1:[0-9]+]], $7 -+ ; 32R6: srl $[[T2:[0-9]+]], $5, 1 -+ ; 32R6: srlv $[[T3:[0-9]+]], $[[T2]], $[[T1]] -+ ; 32R6: or $[[T4:[0-9]+]], $[[T0]], $[[T3]] -+ ; 32R6: andi $[[T5:[0-9]+]], $7, 32 -+ ; 32R6: seleqz $[[T6:[0-9]+]], $[[T4]], $[[T2]] -+ ; 32R6: sllv $[[T7:[0-9]+]], $5, $7 -+ ; 32R6: selnez $[[T8:[0-9]+]], $[[T7]], $[[T5]] -+ ; 32R6: or $2, $[[T8]], $[[T6]] -+ ; 32R6: jr $ra -+ ; 32R6: seleqz $3, $[[T7]], $[[T5]] -+ -+ ; GP64: sll $[[T0:[0-9]+]], $5, 0 -+ ; GP64: dsllv $2, $4, $1 -+ -+ %r = shl i64 %a, %b -+ ret i64 %r -+} -+ -+define signext i128 @shl_i128(i128 signext %a, i128 signext %b) { -+entry: -+; ALL-LABEL: shl_i128: -+ -+ ; GP32: lw $25, %call16(__ashlti3)($gp) -+ -+ ; M3: sll $[[T0:[0-9]+]], $7, 0 -+ ; M3: dsllv $[[T1:[0-9]+]], $5, $[[T0]] -+ ; M3: andi $[[T2:[0-9]+]], $[[T0]], 32 -+ ; M3: bnez $[[T3:[0-9]+]], $[[BB0:BB[0-9_]+]] -+ ; M3: move $2, $[[T1]] -+ ; M3: dsllv $[[T4:[0-9]+]], $4, $[[T0]] -+ ; M3: dsrl $[[T5:[0-9]+]], $5, 1 -+ ; M3: not $[[T6:[0-9]+]], $[[T0]] -+ ; M3: dsrlv $[[T7:[0-9]+]], $[[T5]], $[[T6]] -+ ; M3: or $2, $[[T4]], $[[T7]] -+ ; M3: $[[BB0]]: -+ ; M3: bnez $[[T3]], $[[BB1:BB[0-9_]+]] -+ ; M3: daddiu $3, $zero, 0 -+ ; M3: move $3, $[[T1]] -+ ; M3: $[[BB1]]: -+ ; M3: jr $ra -+ ; M3: nop -+ -+ ; GP64-NOT-R6: sll $[[T0:[0-9]+]], $7, 0 -+ ; GP64-NOT-R6: dsllv $[[T1:[0-9]+]], $4, $[[T0]] -+ ; GP64-NOT-R6: dsrl $[[T2:[0-9]+]], $5, 1 -+ ; GP64-NOT-R6: not $[[T3:[0-9]+]], $[[T0]] -+ ; GP64-NOT-R6: dsrlv $[[T4:[0-9]+]], $[[T2]], $[[T3]] -+ ; GP64-NOT-R6: or $2, $[[T1]], $[[T4]] -+ ; GP64-NOT-R6: dsllv $3, $5, $[[T0]] -+ ; GP64-NOT-R6: andi $[[T5:[0-9]+]], $[[T0]], 32 -+ ; GP64-NOT-R6: movn $2, $3, $[[T5]] -+ ; GP64-NOT-R6: jr $ra -+ ; GP64-NOT-R6: movn $3, $zero, $1 -+ -+ ; 64R6: sll $[[T0:[0-9]+]], $7, 0 -+ ; 64R6: dsllv $[[T1:[0-9]+]], $4, $[[T0]] -+ ; 64R6: dsrl $[[T2:[0-9]+]], $5, 1 -+ ; 64R6: not $[[T3:[0-9]+]], $[[T0]] -+ ; 64R6: dsrlv $[[T4:[0-9]+]], $[[T2]], $[[T3]] -+ ; 64R6: or $[[T5:[0-9]+]], $[[T1]], $[[T4]] -+ ; 64R6: andi $[[T6:[0-9]+]], $[[T0]], 32 -+ ; 64R6: sll $[[T7:[0-9]+]], $[[T6]], 0 -+ ; 64R6: seleqz $[[T8:[0-9]+]], $[[T5]], $[[T7]] -+ ; 64R6: dsllv $[[T9:[0-9]+]], $5, $[[T0]] -+ ; 64R6: selnez $[[T10:[0-9]+]], $[[T9]], $[[T7]] -+ ; 64R6: or $2, $[[T10]], $[[T8]] -+ ; 64R6: jr $ra -+ ; 64R6: seleqz $3, $[[T0]], $[[T7]] -+ -+ %r = shl i128 %a, %b -+ ret i128 %r -+} -Index: test/CodeGen/Mips/llvm-ir/srem.ll -=================================================================== ---- test/CodeGen/Mips/llvm-ir/srem.ll -+++ test/CodeGen/Mips/llvm-ir/srem.ll -@@ -0,0 +1,129 @@ -+; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \ -+; RUN: -check-prefix=GP32 -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6 -+; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \ -+; RUN: -check-prefix=GP32 -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6 -+; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s -check-prefix=GP32 \ -+; RUN: -check-prefix=R2 -check-prefix=R2-R6 -check-prefix=NOT-R6 -+; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \ -+; RUN: -check-prefix=GP32 -check-prefix=R6 -check-prefix=R2-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \ -+; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \ -+; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \ -+; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \ -+; RUN: -check-prefix=R2 -check-prefix=R2-R6 \ -+; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \ -+; RUN: -check-prefix=64R6 -check-prefix=R6 -check-prefix=R2-R6 -+ -+define signext i1 @srem_i1(i1 signext %a, i1 signext %b) { -+entry: -+; ALL-LABEL: srem_i1: -+ -+ ; NOT-R6: div $zero, $4, $5 -+ ; NOT-R6: teq $5, $zero, 7 -+ ; NOT-R6: mfhi $[[T0:[0-9]+]] -+ ; NOT-R6: sll $[[T1:[0-9]+]], $[[T0]], 31 -+ ; NOT-R6: sra $2, $[[T1]], 31 -+ -+ ; R6: mod $[[T0:[0-9]+]], $4, $5 -+ ; R6: teq $5, $zero, 7 -+ ; R6: sll $[[T3:[0-9]+]], $[[T0]], 31 -+ ; R6: sra $2, $[[T3]], 31 -+ -+ %r = srem i1 %a, %b -+ ret i1 %r -+} -+ -+define signext i8 @srem_i8(i8 signext %a, i8 signext %b) { -+entry: -+; ALL-LABEL: srem_i8: -+ -+ ; NOT-R2-R6: div $zero, $4, $5 -+ ; NOT-R2-R6: teq $5, $zero, 7 -+ ; NOT-R2-R6: mfhi $[[T0:[0-9]+]] -+ ; NOT-R2-R6: sll $[[T1:[0-9]+]], $[[T0]], 24 -+ ; NOT-R2-R6: sra $2, $[[T1]], 24 -+ -+ ; R2: div $zero, $4, $5 -+ ; R2: teq $5, $zero, 7 -+ ; R2: mfhi $[[T0:[0-9]+]] -+ ; R2: seb $2, $[[T0]] -+ -+ ; R6: mod $[[T0:[0-9]+]], $4, $5 -+ ; R6: teq $5, $zero, 7 -+ ; R6: seb $2, $[[T0]] -+ -+ %r = srem i8 %a, %b -+ ret i8 %r -+} -+ -+define signext i16 @srem_i16(i16 signext %a, i16 signext %b) { -+entry: -+; ALL-LABEL: srem_i16: -+ -+ ; NOT-R2-R6: div $zero, $4, $5 -+ ; NOT-R2-R6: teq $5, $zero, 7 -+ ; NOT-R2-R6: mfhi $[[T0:[0-9]+]] -+ ; NOT-R2-R6: sll $[[T1:[0-9]+]], $[[T0]], 16 -+ ; NOT-R2-R6: sra $2, $[[T1]], 16 -+ -+ ; R2: div $zero, $4, $5 -+ ; R2: teq $5, $zero, 7 -+ ; R2: mfhi $[[T0:[0-9]+]] -+ ; R2: seh $2, $[[T1]] -+ -+ ; R6: mod $[[T0:[0-9]+]], $4, $5 -+ ; R6: teq $5, $zero, 7 -+ ; R6: seh $2, $[[T0]] -+ -+ %r = srem i16 %a, %b -+ ret i16 %r -+} -+ -+define signext i32 @srem_i32(i32 signext %a, i32 signext %b) { -+entry: -+; ALL-LABEL: srem_i32: -+ -+ ; NOT-R6: div $zero, $4, $5 -+ ; NOT-R6: teq $5, $zero, 7 -+ ; NOT-R6: mfhi $2 -+ -+ ; R6: mod $2, $4, $5 -+ ; R6: teq $5, $zero, 7 -+ -+ %r = srem i32 %a, %b -+ ret i32 %r -+} -+ -+define signext i64 @srem_i64(i64 signext %a, i64 signext %b) { -+entry: -+; ALL-LABEL: srem_i64: -+ -+ ; GP32: lw $25, %call16(__moddi3)($gp) -+ -+ ; GP64-NOT-R6: ddiv $zero, $4, $5 -+ ; GP64-NOT-R6: teq $5, $zero, 7 -+ ; GP64-NOT-R6: mfhi $2 -+ -+ ; 64R6: dmod $2, $4, $5 -+ ; 64R6: teq $5, $zero, 7 -+ -+ %r = srem i64 %a, %b -+ ret i64 %r -+} -+ -+define signext i128 @srem_i128(i128 signext %a, i128 signext %b) { -+entry: -+; ALL-LABEL: srem_i128: -+ -+ ; GP32: lw $25, %call16(__modti3)($gp) -+ -+ ; GP64-NOT-R6: ld $25, %call16(__modti3)($gp) -+ ; 64-R6: ld $25, %call16(__modti3)($gp) -+ -+ %r = srem i128 %a, %b -+ ret i128 %r -+} -Index: test/CodeGen/Mips/llvm-ir/sub.ll -=================================================================== ---- test/CodeGen/Mips/llvm-ir/sub.ll -+++ test/CodeGen/Mips/llvm-ir/sub.ll -@@ -0,0 +1,114 @@ -+; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=NOT-R2-R6 -check-prefix=GP32 -+; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=NOT-R2-R6 -check-prefix=GP32 -+; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=R2-R6 -check-prefix=GP32 -+; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=R2-R6 -check-prefix=GP32 -+; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=NOT-R2-R6 -check-prefix=GP64 -+; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=NOT-R2-R6 -check-prefix=GP64 -+; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=NOT-R2-R6 -check-prefix=GP64 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=R2-R6 -check-prefix=GP64 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=R2-R6 -check-prefix=GP64 -+ -+define signext i1 @sub_i1(i1 signext %a, i1 signext %b) { -+entry: -+; ALL-LABEL: sub_i1: -+ -+ ; ALL: subu $[[T0:[0-9]+]], $4, $5 -+ ; ALL: sll $[[T0]], $[[T0]], 31 -+ ; ALL: sra $2, $[[T0]], 31 -+ -+ %r = sub i1 %a, %b -+ ret i1 %r -+} -+ -+define signext i8 @sub_i8(i8 signext %a, i8 signext %b) { -+entry: -+; ALL-LABEL: sub_i8: -+ -+ ; NOT-R2-R6: subu $[[T0:[0-9]+]], $4, $5 -+ ; NOT-R2-R6: sll $[[T0]], $[[T0]], 24 -+ ; NOT-R2-R6: sra $2, $[[T0]], 24 -+ -+ ; R2-R6: subu $[[T0:[0-9]+]], $4, $5 -+ ; R2-R6: seb $2, $[[T0:[0-9]+]] -+ -+ %r = sub i8 %a, %b -+ ret i8 %r -+} -+ -+define signext i16 @sub_i16(i16 signext %a, i16 signext %b) { -+entry: -+; ALL-LABEL: sub_i16: -+ -+ ; NOT-R2-R6: subu $[[T0:[0-9]+]], $4, $5 -+ ; NOT-R2-R6: sll $[[T0]], $[[T0]], 16 -+ ; NOT-R2-R6: sra $2, $[[T0]], 16 -+ -+ ; R2-R6: subu $[[T0:[0-9]+]], $4, $5 -+ ; R2-R6: seh $2, $[[T0:[0-9]+]] -+ -+ %r = sub i16 %a, %b -+ ret i16 %r -+} -+ -+define signext i32 @sub_i32(i32 signext %a, i32 signext %b) { -+entry: -+; ALL-LABEL: sub_i32: -+ -+ ; ALL: subu $2, $4, $5 -+ -+ %r = sub i32 %a, %b -+ ret i32 %r -+} -+ -+define signext i64 @sub_i64(i64 signext %a, i64 signext %b) { -+entry: -+; ALL-LABEL: sub_i64: -+ -+ ; GP32: subu $3, $5, $7 -+ ; GP32: sltu $[[T0:[0-9]+]], $5, $7 -+ ; GP32: addu $[[T1:[0-9]+]], $[[T0]], $6 -+ ; GP32: subu $2, $4, $[[T1]] -+ -+ ; GP64: dsubu $2, $4, $5 -+ -+ %r = sub i64 %a, %b -+ ret i64 %r -+} -+ -+define signext i128 @sub_i128(i128 signext %a, i128 signext %b) { -+entry: -+; ALL-LABEL: sub_i128: -+ -+ ; GP32: lw $[[T0:[0-9]+]], 20($sp) -+ ; GP32: sltu $[[T1:[0-9]+]], $5, $[[T0]] -+ ; GP32: lw $[[T2:[0-9]+]], 16($sp) -+ ; GP32: addu $[[T3:[0-9]+]], $[[T1]], $[[T2]] -+ ; GP32: lw $[[T4:[0-9]+]], 24($sp) -+ ; GP32: lw $[[T5:[0-9]+]], 28($sp) -+ ; GP32: subu $[[T6:[0-9]+]], $7, $[[T5]] -+ ; GP32: subu $2, $4, $[[T3]] -+ ; GP32: sltu $[[T8:[0-9]+]], $6, $[[T4]] -+ ; GP32: addu $[[T9:[0-9]+]], $[[T8]], $[[T0]] -+ ; GP32: subu $3, $5, $[[T9]] -+ ; GP32: sltu $[[T10:[0-9]+]], $7, $[[T5]] -+ ; GP32: addu $[[T11:[0-9]+]], $[[T10]], $[[T4]] -+ ; GP32: subu $4, $6, $[[T11]] -+ ; GP32: move $5, $[[T6]] -+ -+ ; GP64: dsubu $3, $5, $7 -+ ; GP64: sltu $[[T0:[0-9]+]], $5, $7 -+ ; GP64: daddu $[[T1:[0-9]+]], $[[T0]], $6 -+ ; GP64: dsubu $2, $4, $[[T1]] -+ -+ %r = sub i128 %a, %b -+ ret i128 %r -+} -Index: test/CodeGen/Mips/llvm-ir/udiv.ll -=================================================================== ---- test/CodeGen/Mips/llvm-ir/udiv.ll -+++ test/CodeGen/Mips/llvm-ir/udiv.ll -@@ -0,0 +1,108 @@ -+; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \ -+; RUN: -check-prefix=NOT-R6 -check-prefix=GP32 -+; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \ -+; RUN: -check-prefix=NOT-R6 -check-prefix=GP32 -+; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \ -+; RUN: -check-prefix=NOT-R6 -check-prefix=GP32 -+; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \ -+; RUN: -check-prefix=R6 -check-prefix=GP32 -+; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \ -+; RUN: -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \ -+; RUN: -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \ -+; RUN: -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \ -+; RUN: -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \ -+; RUN: -check-prefix=R6 -check-prefix=64R6 -+ -+define zeroext i1 @udiv_i1(i1 zeroext %a, i1 zeroext %b) { -+entry: -+; ALL-LABEL: udiv_i1: -+ -+ ; NOT-R6: divu $zero, $4, $5 -+ ; NOT-R6: teq $5, $zero, 7 -+ ; NOT-R6: mflo $2 -+ -+ ; R6: divu $2, $4, $5 -+ ; R6: teq $5, $zero, 7 -+ -+ %r = udiv i1 %a, %b -+ ret i1 %r -+} -+ -+define zeroext i8 @udiv_i8(i8 zeroext %a, i8 zeroext %b) { -+entry: -+; ALL-LABEL: udiv_i8: -+ -+ ; NOT-R6: divu $zero, $4, $5 -+ ; NOT-R6: teq $5, $zero, 7 -+ ; NOT-R6: mflo $2 -+ -+ ; R6: divu $2, $4, $5 -+ ; R6: teq $5, $zero, 7 -+ -+ %r = udiv i8 %a, %b -+ ret i8 %r -+} -+ -+define zeroext i16 @udiv_i16(i16 zeroext %a, i16 zeroext %b) { -+entry: -+; ALL-LABEL: udiv_i16: -+ -+ ; NOT-R6: divu $zero, $4, $5 -+ ; NOT-R6: teq $5, $zero, 7 -+ ; NOT-R6: mflo $2 -+ -+ ; R6: divu $2, $4, $5 -+ ; R6: teq $5, $zero, 7 -+ -+ %r = udiv i16 %a, %b -+ ret i16 %r -+} -+ -+define signext i32 @udiv_i32(i32 signext %a, i32 signext %b) { -+entry: -+; ALL-LABEL: udiv_i32: -+ -+ ; NOT-R6: divu $zero, $4, $5 -+ ; NOT-R6: teq $5, $zero, 7 -+ ; NOT-R6: mflo $2 -+ -+ ; R6: divu $2, $4, $5 -+ ; R6: teq $5, $zero, 7 -+ -+ %r = udiv i32 %a, %b -+ ret i32 %r -+} -+ -+define signext i64 @udiv_i64(i64 signext %a, i64 signext %b) { -+entry: -+; ALL-LABEL: udiv_i64: -+ -+ ; GP32: lw $25, %call16(__udivdi3)($gp) -+ -+ ; GP64-NOT-R6: ddivu $zero, $4, $5 -+ ; GP64-NOT-R6: teq $5, $zero, 7 -+ ; GP64-NOT-R6: mflo $2 -+ -+ ; 64R6: ddivu $2, $4, $5 -+ ; 64R6: teq $5, $zero, 7 -+ -+ %r = udiv i64 %a, %b -+ ret i64 %r -+} -+ -+define signext i128 @udiv_i128(i128 signext %a, i128 signext %b) { -+entry: -+; ALL-LABEL: udiv_i128: -+ -+ ; GP32: lw $25, %call16(__udivti3)($gp) -+ -+ ; GP64-NOT-R6: ld $25, %call16(__udivti3)($gp) -+ ; 64-R6: ld $25, %call16(__udivti3)($gp) -+ -+ %r = udiv i128 %a, %b -+ ret i128 %r -+} -Index: test/CodeGen/Mips/llvm-ir/urem.ll -=================================================================== ---- test/CodeGen/Mips/llvm-ir/urem.ll -+++ test/CodeGen/Mips/llvm-ir/urem.ll -@@ -0,0 +1,145 @@ -+; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \ -+; RUN: -check-prefix=GP32 -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6 -+; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \ -+; RUN: -check-prefix=GP32 -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6 -+; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s -check-prefix=GP32 \ -+; RUN: -check-prefix=R2 -check-prefix=R2-R6 -check-prefix=NOT-R6 -+; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \ -+; RUN: -check-prefix=GP32 -check-prefix=R6 -check-prefix=R2-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \ -+; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \ -+; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \ -+; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \ -+; RUN: -check-prefix=R2 -check-prefix=R2-R6 \ -+; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \ -+; RUN: -check-prefix=64R6 -check-prefix=R6 -check-prefix=R2-R6 -+ -+define signext i1 @urem_i1(i1 signext %a, i1 signext %b) { -+entry: -+; ALL-LABEL: urem_i1: -+ -+ ; NOT-R6: andi $[[T0:[0-9]+]], $5, 1 -+ ; NOT-R6: andi $[[T1:[0-9]+]], $4, 1 -+ ; NOT-R6: divu $zero, $[[T1]], $[[T0]] -+ ; NOT-R6: teq $[[T0]], $zero, 7 -+ ; NOT-R6: mfhi $[[T2:[0-9]+]] -+ ; NOT-R6: sll $[[T3:[0-9]+]], $[[T2]], 31 -+ ; NOT-R6: sra $2, $[[T3]], 31 -+ -+ ; R6: andi $[[T0:[0-9]+]], $5, 1 -+ ; R6: andi $[[T1:[0-9]+]], $4, 1 -+ ; R6: modu $[[T2:[0-9]+]], $[[T1]], $[[T0]] -+ ; R6: teq $[[T0]], $zero, 7 -+ ; R6: sll $[[T3:[0-9]+]], $[[T2]], 31 -+ ; R6: sra $2, $[[T3]], 31 -+ -+ %r = urem i1 %a, %b -+ ret i1 %r -+} -+ -+define signext i8 @urem_i8(i8 signext %a, i8 signext %b) { -+entry: -+; ALL-LABEL: urem_i8: -+ -+ ; NOT-R2-R6: andi $[[T0:[0-9]+]], $5, 255 -+ ; NOT-R2-R6: andi $[[T1:[0-9]+]], $4, 255 -+ ; NOT-R2-R6: divu $zero, $[[T1]], $[[T0]] -+ ; NOT-R2-R6: teq $[[T0]], $zero, 7 -+ ; NOT-R2-R6: mfhi $[[T2:[0-9]+]] -+ ; NOT-R2-R6: sll $[[T3:[0-9]+]], $[[T2]], 24 -+ ; NOT-R2-R6: sra $2, $[[T3]], 24 -+ -+ ; R2: andi $[[T0:[0-9]+]], $5, 255 -+ ; R2: andi $[[T1:[0-9]+]], $4, 255 -+ ; R2: divu $zero, $[[T1]], $[[T0]] -+ ; R2: teq $[[T0]], $zero, 7 -+ ; R2: mfhi $[[T2:[0-9]+]] -+ ; R2: seb $2, $[[T2]] -+ -+ ; R6: andi $[[T0:[0-9]+]], $5, 255 -+ ; R6: andi $[[T1:[0-9]+]], $4, 255 -+ ; R6: modu $[[T2:[0-9]+]], $[[T1]], $[[T0]] -+ ; R6: teq $[[T0]], $zero, 7 -+ ; R6: seb $2, $[[T2]] -+ -+ %r = urem i8 %a, %b -+ ret i8 %r -+} -+ -+define signext i16 @urem_i16(i16 signext %a, i16 signext %b) { -+entry: -+; ALL-LABEL: urem_i16: -+ -+ ; NOT-R2-R6: andi $[[T0:[0-9]+]], $5, 65535 -+ ; NOT-R2-R6: andi $[[T1:[0-9]+]], $4, 65535 -+ ; NOT-R2-R6: divu $zero, $[[T1]], $[[T0]] -+ ; NOT-R2-R6: teq $[[T0]], $zero, 7 -+ ; NOT-R2-R6: mfhi $[[T2:[0-9]+]] -+ ; NOT-R2-R6: sll $[[T3:[0-9]+]], $[[T2]], 16 -+ ; NOT-R2-R6: sra $2, $[[T3]], 16 -+ -+ ; R2: andi $[[T0:[0-9]+]], $5, 65535 -+ ; R2: andi $[[T1:[0-9]+]], $4, 65535 -+ ; R2: divu $zero, $[[T1]], $[[T0]] -+ ; R2: teq $[[T0]], $zero, 7 -+ ; R2: mfhi $[[T3:[0-9]+]] -+ ; R2: seh $2, $[[T2]] -+ -+ ; R6: andi $[[T0:[0-9]+]], $5, 65535 -+ ; R6: andi $[[T1:[0-9]+]], $4, 65535 -+ ; R6: modu $[[T2:[0-9]+]], $[[T1]], $[[T0]] -+ ; R6: teq $[[T0]], $zero, 7 -+ ; R6: seh $2, $[[T2]] -+ -+ %r = urem i16 %a, %b -+ ret i16 %r -+} -+ -+define signext i32 @urem_i32(i32 signext %a, i32 signext %b) { -+entry: -+; ALL-LABEL: urem_i32: -+ -+ ; NOT-R6: divu $zero, $4, $5 -+ ; NOT-R6: teq $5, $zero, 7 -+ ; NOT-R6: mfhi $2 -+ -+ ; R6: modu $2, $4, $5 -+ ; R6: teq $5, $zero, 7 -+ -+ %r = urem i32 %a, %b -+ ret i32 %r -+} -+ -+define signext i64 @urem_i64(i64 signext %a, i64 signext %b) { -+entry: -+; ALL-LABEL: urem_i64: -+ -+ ; GP32: lw $25, %call16(__umoddi3)($gp) -+ -+ ; GP64-NOT-R6: ddivu $zero, $4, $5 -+ ; GP64-NOT-R6: teq $5, $zero, 7 -+ ; GP64-NOT-R6: mfhi $2 -+ -+ ; 64R6: dmodu $2, $4, $5 -+ ; 64R6: teq $5, $zero, 7 -+ -+ %r = urem i64 %a, %b -+ ret i64 %r -+} -+ -+define signext i128 @urem_i128(i128 signext %a, i128 signext %b) { -+entry: -+ ; ALL-LABEL: urem_i128: -+ -+ ; GP32: lw $25, %call16(__umodti3)($gp) -+ -+ ; GP64-NOT-R6: ld $25, %call16(__umodti3)($gp) -+ ; 64-R6: ld $25, %call16(__umodti3)($gp) -+ -+ %r = urem i128 %a, %b -+ ret i128 %r -+} -Index: test/CodeGen/Mips/llvm-ir/xor.ll -=================================================================== ---- test/CodeGen/Mips/llvm-ir/xor.ll -+++ test/CodeGen/Mips/llvm-ir/xor.ll -@@ -0,0 +1,94 @@ -+; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP32 -+; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP32 -+; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP32 -+; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP32 -+; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 -+; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 -+; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 -+; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \ -+; RUN: -check-prefix=ALL -check-prefix=GP64 -+ -+define signext i1 @xor_i1(i1 signext %a, i1 signext %b) { -+entry: -+; ALL-LABEL: xor_i1: -+ -+ ; ALL: xor $2, $4, $5 -+ -+ %r = xor i1 %a, %b -+ ret i1 %r -+} -+ -+define signext i8 @xor_i8(i8 signext %a, i8 signext %b) { -+entry: -+; ALL-LABEL: xor_i8: -+ -+ ; ALL: xor $2, $4, $5 -+ -+ %r = xor i8 %a, %b -+ ret i8 %r -+} -+ -+define signext i16 @xor_i16(i16 signext %a, i16 signext %b) { -+entry: -+; ALL-LABEL: xor_i16: -+ -+ ; ALL: xor $2, $4, $5 -+ -+ %r = xor i16 %a, %b -+ ret i16 %r -+} -+ -+define signext i32 @xor_i32(i32 signext %a, i32 signext %b) { -+entry: -+; ALL-LABEL: xor_i32: -+ -+ ; GP32: xor $2, $4, $5 -+ -+ ; GP64: xor $[[T0:[0-9]+]], $4, $5 -+ ; GP64: sll $2, $[[T0]], 0 -+ -+ %r = xor i32 %a, %b -+ ret i32 %r -+} -+ -+define signext i64 @xor_i64(i64 signext %a, i64 signext %b) { -+entry: -+; ALL-LABEL: xor_i64: -+ -+ ; GP32: xor $2, $4, $6 -+ ; GP32: xor $3, $5, $7 -+ -+ ; GP64: xor $2, $4, $5 -+ -+ %r = xor i64 %a, %b -+ ret i64 %r -+} -+ -+define signext i128 @xor_i128(i128 signext %a, i128 signext %b) { -+entry: -+; ALL-LABEL: xor_i128: -+ -+ ; GP32: lw $[[T0:[0-9]+]], 24($sp) -+ ; GP32: lw $[[T1:[0-9]+]], 20($sp) -+ ; GP32: lw $[[T2:[0-9]+]], 16($sp) -+ ; GP32: xor $2, $4, $[[T2]] -+ ; GP32: xor $3, $5, $[[T1]] -+ ; GP32: xor $4, $6, $[[T0]] -+ ; GP32: lw $[[T3:[0-9]+]], 28($sp) -+ ; GP32: xor $5, $7, $[[T3]] -+ -+ ; GP64: xor $2, $4, $6 -+ ; GP64: xor $3, $5, $7 -+ -+ %r = xor i128 %a, %b -+ ret i128 %r -+} diff --git a/contrib/llvm/patches/patch-10-llvm-r230348-arm-fix-bad-ha.diff b/contrib/llvm/patches/patch-08-llvm-r230348-arm-fix-bad-ha.diff similarity index 98% rename from contrib/llvm/patches/patch-10-llvm-r230348-arm-fix-bad-ha.diff rename to contrib/llvm/patches/patch-08-llvm-r230348-arm-fix-bad-ha.diff index 64c558e2c1a0..2896899a6939 100644 --- a/contrib/llvm/patches/patch-10-llvm-r230348-arm-fix-bad-ha.diff +++ b/contrib/llvm/patches/patch-08-llvm-r230348-arm-fix-bad-ha.diff @@ -67,7 +67,7 @@ Index: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp } } -@@ -7696,11 +7696,8 @@ void SelectionDAGISel::LowerArguments(const Functi +@@ -7697,11 +7697,8 @@ void SelectionDAGISel::LowerArguments(const Functi } if (F.getAttributes().hasAttribute(Idx, Attribute::Nest)) Flags.setNest(); @@ -80,7 +80,7 @@ Index: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Flags.setOrigAlign(OriginalAlignment); MVT RegisterVT = TLI->getRegisterType(*CurDAG->getContext(), VT); -@@ -7715,6 +7712,8 @@ void SelectionDAGISel::LowerArguments(const Functi +@@ -7716,6 +7713,8 @@ void SelectionDAGISel::LowerArguments(const Functi MyFlags.Flags.setOrigAlign(1); Ins.push_back(MyFlags); } @@ -287,7 +287,7 @@ Index: lib/Target/ARM/ARMISelLowering.cpp =================================================================== --- lib/Target/ARM/ARMISelLowering.cpp +++ lib/Target/ARM/ARMISelLowering.cpp -@@ -11280,7 +11280,9 @@ static bool isHomogeneousAggregate(Type *Ty, HABas +@@ -11285,7 +11285,9 @@ static bool isHomogeneousAggregate(Type *Ty, HABas return (Members > 0 && Members <= 4); } @@ -298,7 +298,7 @@ Index: lib/Target/ARM/ARMISelLowering.cpp bool ARMTargetLowering::functionArgumentNeedsConsecutiveRegisters( Type *Ty, CallingConv::ID CallConv, bool isVarArg) const { if (getEffectiveCallingConv(CallConv, isVarArg) != -@@ -11289,7 +11291,9 @@ bool ARMTargetLowering::functionArgumentNeedsConse +@@ -11294,7 +11296,9 @@ bool ARMTargetLowering::functionArgumentNeedsConse HABaseType Base = HA_UNKNOWN; uint64_t Members = 0; diff --git a/contrib/llvm/patches/patch-12-clang-r227115-constantarraytype.diff b/contrib/llvm/patches/patch-09-clang-r227115-constantarraytype.diff similarity index 100% rename from contrib/llvm/patches/patch-12-clang-r227115-constantarraytype.diff rename to contrib/llvm/patches/patch-09-clang-r227115-constantarraytype.diff diff --git a/contrib/llvm/patches/patch-09-llvm-r230058-indirectbrs-assert.diff b/contrib/llvm/patches/patch-09-llvm-r230058-indirectbrs-assert.diff deleted file mode 100644 index 1d31c282c5ba..000000000000 --- a/contrib/llvm/patches/patch-09-llvm-r230058-indirectbrs-assert.diff +++ /dev/null @@ -1,55 +0,0 @@ -Pull in r230058 from upstream llvm trunk (by Benjamin Kramer): - - LoopRotate: When reconstructing loop simplify form don't split edges - from indirectbrs. - - Yet another chapter in the endless story. While this looks like we - leave the loop in a non-canonical state this replicates the logic in - LoopSimplify so it doesn't diverge from the canonical form in any way. - - PR21968 - -This fixes a "Cannot split critical edge from IndirectBrInst" assertion -failure when building the devel/radare2 port. - -Introduced here: https://svnweb.freebsd.org/changeset/base/279161 - -Index: lib/Transforms/Scalar/LoopRotation.cpp -=================================================================== ---- lib/Transforms/Scalar/LoopRotation.cpp -+++ lib/Transforms/Scalar/LoopRotation.cpp -@@ -535,6 +535,8 @@ bool LoopRotate::rotateLoop(Loop *L, bool Simplifi - Loop *PredLoop = LI->getLoopFor(*PI); - if (!PredLoop || PredLoop->contains(Exit)) - continue; -+ if (isa((*PI)->getTerminator())) -+ continue; - SplitLatchEdge |= L->getLoopLatch() == *PI; - BasicBlock *ExitSplit = SplitCriticalEdge(*PI, Exit, this); - ExitSplit->moveBefore(Exit); -Index: test/Transforms/LoopRotate/crash.ll -=================================================================== ---- test/Transforms/LoopRotate/crash.ll -+++ test/Transforms/LoopRotate/crash.ll -@@ -153,3 +153,21 @@ entry: - "5": ; preds = %"3", %entry - ret void - } -+ -+; PR21968 -+define void @test8(i1 %C, i8* %P) #0 { -+entry: -+ br label %for.cond -+ -+for.cond: ; preds = %for.inc, %entry -+ br i1 %C, label %l_bad, label %for.body -+ -+for.body: ; preds = %for.cond -+ indirectbr i8* %P, [label %for.inc, label %l_bad] -+ -+for.inc: ; preds = %for.body -+ br label %for.cond -+ -+l_bad: ; preds = %for.body, %for.cond -+ ret void -+} diff --git a/contrib/llvm/patches/patch-11-llvm-r231227-aarch64-tls-relocs.diff b/contrib/llvm/patches/patch-11-llvm-r231227-aarch64-tls-relocs.diff deleted file mode 100644 index 5c0edca87255..000000000000 --- a/contrib/llvm/patches/patch-11-llvm-r231227-aarch64-tls-relocs.diff +++ /dev/null @@ -1,811 +0,0 @@ -Pull in r231227 from upstream llvm trunk (by Kristof Beyls): - - Fix PR22408 - LLVM producing AArch64 TLS relocations that GNU linkers - cannot handle yet. - - As is described at http://llvm.org/bugs/show_bug.cgi?id=22408, the - GNU linkers ld.bfd and ld.gold currently only support a subset of the - whole range of AArch64 ELF TLS relocations. Furthermore, they assume - that some of the code sequences to access thread-local variables are - produced in a very specific sequence. When the sequence is not as the - linker expects, it can silently mis-relaxe/mis-optimize the - instructions. - Even if that wouldn't be the case, it's good to produce the exact - sequence, as that ensures that linkers can perform optimizing - relaxations. - - This patch: - - * implements support for 16MiB TLS area size instead of 4GiB TLS area - size. Ideally clang would grow an -mtls-size option to allow - support for both, but that's not part of this patch. - * by default doesn't produce local dynamic access patterns, as even - modern ld.bfd and ld.gold linkers do not support the associated - relocations. An option (-aarch64-elf-ldtls-generation) is added to - enable generation of local dynamic code sequence, but is off by - default. - * makes sure that the exact expected code sequence for local dynamic - and general dynamic accesses is produced, by making use of a new - pseudo instruction. The patch also removes two - (AArch64ISD::TLSDESC_BLR, AArch64ISD::TLSDESC_CALL) pre-existing - AArch64-specific pseudo SDNode instructions that are superseded by - the new one (TLSDESC_CALLSEQ). - -Introduced here: https://svnweb.freebsd.org/changeset/base/280865 - -Index: lib/Target/AArch64/AArch64AsmPrinter.cpp -=================================================================== ---- lib/Target/AArch64/AArch64AsmPrinter.cpp -+++ lib/Target/AArch64/AArch64AsmPrinter.cpp -@@ -12,6 +12,8 @@ - // - //===----------------------------------------------------------------------===// - -+#include "MCTargetDesc/AArch64AddressingModes.h" -+#include "MCTargetDesc/AArch64MCExpr.h" - #include "AArch64.h" - #include "AArch64MCInstLower.h" - #include "AArch64MachineFunctionInfo.h" -@@ -494,12 +496,47 @@ void AArch64AsmPrinter::EmitInstruction(const Mach - EmitToStreamer(OutStreamer, TmpInst); - return; - } -- case AArch64::TLSDESC_BLR: { -- MCOperand Callee, Sym; -- MCInstLowering.lowerOperand(MI->getOperand(0), Callee); -- MCInstLowering.lowerOperand(MI->getOperand(1), Sym); -+ case AArch64::TLSDESC_CALLSEQ: { -+ /// lower this to: -+ /// adrp x0, :tlsdesc:var -+ /// ldr x1, [x0, #:tlsdesc_lo12:var] -+ /// add x0, x0, #:tlsdesc_lo12:var -+ /// .tlsdesccall var -+ /// blr x1 -+ /// (TPIDR_EL0 offset now in x0) -+ const MachineOperand &MO_Sym = MI->getOperand(0); -+ MachineOperand MO_TLSDESC_LO12(MO_Sym), MO_TLSDESC(MO_Sym); -+ MCOperand Sym, SymTLSDescLo12, SymTLSDesc; -+ MO_TLSDESC_LO12.setTargetFlags(AArch64II::MO_TLS | AArch64II::MO_PAGEOFF | -+ AArch64II::MO_NC); -+ MO_TLSDESC.setTargetFlags(AArch64II::MO_TLS | AArch64II::MO_PAGE); -+ MCInstLowering.lowerOperand(MO_Sym, Sym); -+ MCInstLowering.lowerOperand(MO_TLSDESC_LO12, SymTLSDescLo12); -+ MCInstLowering.lowerOperand(MO_TLSDESC, SymTLSDesc); - -- // First emit a relocation-annotation. This expands to no code, but requests -+ MCInst Adrp; -+ Adrp.setOpcode(AArch64::ADRP); -+ Adrp.addOperand(MCOperand::CreateReg(AArch64::X0)); -+ Adrp.addOperand(SymTLSDesc); -+ EmitToStreamer(OutStreamer, Adrp); -+ -+ MCInst Ldr; -+ Ldr.setOpcode(AArch64::LDRXui); -+ Ldr.addOperand(MCOperand::CreateReg(AArch64::X1)); -+ Ldr.addOperand(MCOperand::CreateReg(AArch64::X0)); -+ Ldr.addOperand(SymTLSDescLo12); -+ Ldr.addOperand(MCOperand::CreateImm(0)); -+ EmitToStreamer(OutStreamer, Ldr); -+ -+ MCInst Add; -+ Add.setOpcode(AArch64::ADDXri); -+ Add.addOperand(MCOperand::CreateReg(AArch64::X0)); -+ Add.addOperand(MCOperand::CreateReg(AArch64::X0)); -+ Add.addOperand(SymTLSDescLo12); -+ Add.addOperand(MCOperand::CreateImm(AArch64_AM::getShiftValue(0))); -+ EmitToStreamer(OutStreamer, Add); -+ -+ // Emit a relocation-annotation. This expands to no code, but requests - // the following instruction gets an R_AARCH64_TLSDESC_CALL. - MCInst TLSDescCall; - TLSDescCall.setOpcode(AArch64::TLSDESCCALL); -@@ -506,12 +543,10 @@ void AArch64AsmPrinter::EmitInstruction(const Mach - TLSDescCall.addOperand(Sym); - EmitToStreamer(OutStreamer, TLSDescCall); - -- // Other than that it's just a normal indirect call to the function loaded -- // from the descriptor. -- MCInst BLR; -- BLR.setOpcode(AArch64::BLR); -- BLR.addOperand(Callee); -- EmitToStreamer(OutStreamer, BLR); -+ MCInst Blr; -+ Blr.setOpcode(AArch64::BLR); -+ Blr.addOperand(MCOperand::CreateReg(AArch64::X1)); -+ EmitToStreamer(OutStreamer, Blr); - - return; - } -Index: lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp -=================================================================== ---- lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp -+++ lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp -@@ -62,10 +62,10 @@ struct LDTLSCleanup : public MachineFunctionPass { - for (MachineBasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; - ++I) { - switch (I->getOpcode()) { -- case AArch64::TLSDESC_BLR: -+ case AArch64::TLSDESC_CALLSEQ: - // Make sure it's a local dynamic access. -- if (!I->getOperand(1).isSymbol() || -- strcmp(I->getOperand(1).getSymbolName(), "_TLS_MODULE_BASE_")) -+ if (!I->getOperand(0).isSymbol() || -+ strcmp(I->getOperand(0).getSymbolName(), "_TLS_MODULE_BASE_")) - break; - - if (TLSBaseAddrReg) -Index: lib/Target/AArch64/AArch64ISelLowering.cpp -=================================================================== ---- lib/Target/AArch64/AArch64ISelLowering.cpp -+++ lib/Target/AArch64/AArch64ISelLowering.cpp -@@ -64,10 +64,18 @@ EnableAArch64ExtrGeneration("aarch64-extr-generati - - static cl::opt - EnableAArch64SlrGeneration("aarch64-shift-insert-generation", cl::Hidden, -- cl::desc("Allow AArch64 SLI/SRI formation"), -- cl::init(false)); -+ cl::desc("Allow AArch64 SLI/SRI formation"), -+ cl::init(false)); - -+// FIXME: The necessary dtprel relocations don't seem to be supported -+// well in the GNU bfd and gold linkers at the moment. Therefore, by -+// default, for now, fall back to GeneralDynamic code generation. -+cl::opt EnableAArch64ELFLocalDynamicTLSGeneration( -+ "aarch64-elf-ldtls-generation", cl::Hidden, -+ cl::desc("Allow AArch64 Local Dynamic TLS code generation"), -+ cl::init(false)); - -+ - AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM) - : TargetLowering(TM) { - Subtarget = &TM.getSubtarget(); -@@ -760,7 +768,7 @@ const char *AArch64TargetLowering::getTargetNodeNa - case AArch64ISD::CSNEG: return "AArch64ISD::CSNEG"; - case AArch64ISD::CSINC: return "AArch64ISD::CSINC"; - case AArch64ISD::THREAD_POINTER: return "AArch64ISD::THREAD_POINTER"; -- case AArch64ISD::TLSDESC_CALL: return "AArch64ISD::TLSDESC_CALL"; -+ case AArch64ISD::TLSDESC_CALLSEQ: return "AArch64ISD::TLSDESC_CALLSEQ"; - case AArch64ISD::ADC: return "AArch64ISD::ADC"; - case AArch64ISD::SBC: return "AArch64ISD::SBC"; - case AArch64ISD::ADDS: return "AArch64ISD::ADDS"; -@@ -3049,61 +3057,34 @@ AArch64TargetLowering::LowerDarwinGlobalTLSAddress - /// When accessing thread-local variables under either the general-dynamic or - /// local-dynamic system, we make a "TLS-descriptor" call. The variable will - /// have a descriptor, accessible via a PC-relative ADRP, and whose first entry --/// is a function pointer to carry out the resolution. This function takes the --/// address of the descriptor in X0 and returns the TPIDR_EL0 offset in X0. All --/// other registers (except LR, NZCV) are preserved. -+/// is a function pointer to carry out the resolution. - /// --/// Thus, the ideal call sequence on AArch64 is: -+/// The sequence is: -+/// adrp x0, :tlsdesc:var -+/// ldr x1, [x0, #:tlsdesc_lo12:var] -+/// add x0, x0, #:tlsdesc_lo12:var -+/// .tlsdesccall var -+/// blr x1 -+/// (TPIDR_EL0 offset now in x0) - /// --/// adrp x0, :tlsdesc:thread_var --/// ldr x8, [x0, :tlsdesc_lo12:thread_var] --/// add x0, x0, :tlsdesc_lo12:thread_var --/// .tlsdesccall thread_var --/// blr x8 --/// (TPIDR_EL0 offset now in x0). --/// --/// The ".tlsdesccall" directive instructs the assembler to insert a particular --/// relocation to help the linker relax this sequence if it turns out to be too --/// conservative. --/// --/// FIXME: we currently produce an extra, duplicated, ADRP instruction, but this --/// is harmless. --SDValue AArch64TargetLowering::LowerELFTLSDescCall(SDValue SymAddr, -- SDValue DescAddr, SDLoc DL, -- SelectionDAG &DAG) const { -+/// The above sequence must be produced unscheduled, to enable the linker to -+/// optimize/relax this sequence. -+/// Therefore, a pseudo-instruction (TLSDESC_CALLSEQ) is used to represent the -+/// above sequence, and expanded really late in the compilation flow, to ensure -+/// the sequence is produced as per above. -+SDValue AArch64TargetLowering::LowerELFTLSDescCallSeq(SDValue SymAddr, SDLoc DL, -+ SelectionDAG &DAG) const { - EVT PtrVT = getPointerTy(); - -- // The function we need to call is simply the first entry in the GOT for this -- // descriptor, load it in preparation. -- SDValue Func = DAG.getNode(AArch64ISD::LOADgot, DL, PtrVT, SymAddr); -+ SDValue Chain = DAG.getEntryNode(); -+ SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue); - -- // TLS calls preserve all registers except those that absolutely must be -- // trashed: X0 (it takes an argument), LR (it's a call) and NZCV (let's not be -- // silly). -- const TargetRegisterInfo *TRI = -- getTargetMachine().getSubtargetImpl()->getRegisterInfo(); -- const AArch64RegisterInfo *ARI = -- static_cast(TRI); -- const uint32_t *Mask = ARI->getTLSCallPreservedMask(); -- -- // The function takes only one argument: the address of the descriptor itself -- // in X0. -- SDValue Glue, Chain; -- Chain = DAG.getCopyToReg(DAG.getEntryNode(), DL, AArch64::X0, DescAddr, Glue); -- Glue = Chain.getValue(1); -- -- // We're now ready to populate the argument list, as with a normal call: -- SmallVector Ops; -+ SmallVector Ops; - Ops.push_back(Chain); -- Ops.push_back(Func); - Ops.push_back(SymAddr); -- Ops.push_back(DAG.getRegister(AArch64::X0, PtrVT)); -- Ops.push_back(DAG.getRegisterMask(Mask)); -- Ops.push_back(Glue); - -- SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue); -- Chain = DAG.getNode(AArch64ISD::TLSDESC_CALL, DL, NodeTys, Ops); -- Glue = Chain.getValue(1); -+ Chain = DAG.getNode(AArch64ISD::TLSDESC_CALLSEQ, DL, NodeTys, Ops); -+ SDValue Glue = Chain.getValue(1); - - return DAG.getCopyFromReg(Chain, DL, AArch64::X0, PtrVT, Glue); - } -@@ -3114,9 +3095,18 @@ AArch64TargetLowering::LowerELFGlobalTLSAddress(SD - assert(Subtarget->isTargetELF() && "This function expects an ELF target"); - assert(getTargetMachine().getCodeModel() == CodeModel::Small && - "ELF TLS only supported in small memory model"); -+ // Different choices can be made for the maximum size of the TLS area for a -+ // module. For the small address model, the default TLS size is 16MiB and the -+ // maximum TLS size is 4GiB. -+ // FIXME: add -mtls-size command line option and make it control the 16MiB -+ // vs. 4GiB code sequence generation. - const GlobalAddressSDNode *GA = cast(Op); - - TLSModel::Model Model = getTargetMachine().getTLSModel(GA->getGlobal()); -+ if (!EnableAArch64ELFLocalDynamicTLSGeneration) { -+ if (Model == TLSModel::LocalDynamic) -+ Model = TLSModel::GeneralDynamic; -+ } - - SDValue TPOff; - EVT PtrVT = getPointerTy(); -@@ -3127,17 +3117,20 @@ AArch64TargetLowering::LowerELFGlobalTLSAddress(SD - - if (Model == TLSModel::LocalExec) { - SDValue HiVar = DAG.getTargetGlobalAddress( -- GV, DL, PtrVT, 0, AArch64II::MO_TLS | AArch64II::MO_G1); -+ GV, DL, PtrVT, 0, AArch64II::MO_TLS | AArch64II::MO_HI12); - SDValue LoVar = DAG.getTargetGlobalAddress( - GV, DL, PtrVT, 0, -- AArch64II::MO_TLS | AArch64II::MO_G0 | AArch64II::MO_NC); -+ AArch64II::MO_TLS | AArch64II::MO_PAGEOFF | AArch64II::MO_NC); - -- TPOff = SDValue(DAG.getMachineNode(AArch64::MOVZXi, DL, PtrVT, HiVar, -- DAG.getTargetConstant(16, MVT::i32)), -- 0); -- TPOff = SDValue(DAG.getMachineNode(AArch64::MOVKXi, DL, PtrVT, TPOff, LoVar, -- DAG.getTargetConstant(0, MVT::i32)), -- 0); -+ SDValue TPWithOff_lo = -+ SDValue(DAG.getMachineNode(AArch64::ADDXri, DL, PtrVT, ThreadBase, -+ HiVar, DAG.getTargetConstant(0, MVT::i32)), -+ 0); -+ SDValue TPWithOff = -+ SDValue(DAG.getMachineNode(AArch64::ADDXri, DL, PtrVT, TPWithOff_lo, -+ LoVar, DAG.getTargetConstant(0, MVT::i32)), -+ 0); -+ return TPWithOff; - } else if (Model == TLSModel::InitialExec) { - TPOff = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0, AArch64II::MO_TLS); - TPOff = DAG.getNode(AArch64ISD::LOADgot, DL, PtrVT, TPOff); -@@ -3152,19 +3145,6 @@ AArch64TargetLowering::LowerELFGlobalTLSAddress(SD - DAG.getMachineFunction().getInfo(); - MFI->incNumLocalDynamicTLSAccesses(); - -- // Accesses used in this sequence go via the TLS descriptor which lives in -- // the GOT. Prepare an address we can use to handle this. -- SDValue HiDesc = DAG.getTargetExternalSymbol( -- "_TLS_MODULE_BASE_", PtrVT, AArch64II::MO_TLS | AArch64II::MO_PAGE); -- SDValue LoDesc = DAG.getTargetExternalSymbol( -- "_TLS_MODULE_BASE_", PtrVT, -- AArch64II::MO_TLS | AArch64II::MO_PAGEOFF | AArch64II::MO_NC); -- -- // First argument to the descriptor call is the address of the descriptor -- // itself. -- SDValue DescAddr = DAG.getNode(AArch64ISD::ADRP, DL, PtrVT, HiDesc); -- DescAddr = DAG.getNode(AArch64ISD::ADDlow, DL, PtrVT, DescAddr, LoDesc); -- - // The call needs a relocation too for linker relaxation. It doesn't make - // sense to call it MO_PAGE or MO_PAGEOFF though so we need another copy of - // the address. -@@ -3173,40 +3153,23 @@ AArch64TargetLowering::LowerELFGlobalTLSAddress(SD - - // Now we can calculate the offset from TPIDR_EL0 to this module's - // thread-local area. -- TPOff = LowerELFTLSDescCall(SymAddr, DescAddr, DL, DAG); -+ TPOff = LowerELFTLSDescCallSeq(SymAddr, DL, DAG); - - // Now use :dtprel_whatever: operations to calculate this variable's offset - // in its thread-storage area. - SDValue HiVar = DAG.getTargetGlobalAddress( -- GV, DL, MVT::i64, 0, AArch64II::MO_TLS | AArch64II::MO_G1); -+ GV, DL, MVT::i64, 0, AArch64II::MO_TLS | AArch64II::MO_HI12); - SDValue LoVar = DAG.getTargetGlobalAddress( - GV, DL, MVT::i64, 0, -- AArch64II::MO_TLS | AArch64II::MO_G0 | AArch64II::MO_NC); -+ AArch64II::MO_TLS | AArch64II::MO_PAGEOFF | AArch64II::MO_NC); - -- SDValue DTPOff = -- SDValue(DAG.getMachineNode(AArch64::MOVZXi, DL, PtrVT, HiVar, -- DAG.getTargetConstant(16, MVT::i32)), -- 0); -- DTPOff = -- SDValue(DAG.getMachineNode(AArch64::MOVKXi, DL, PtrVT, DTPOff, LoVar, -- DAG.getTargetConstant(0, MVT::i32)), -- 0); -- -- TPOff = DAG.getNode(ISD::ADD, DL, PtrVT, TPOff, DTPOff); -+ TPOff = SDValue(DAG.getMachineNode(AArch64::ADDXri, DL, PtrVT, TPOff, HiVar, -+ DAG.getTargetConstant(0, MVT::i32)), -+ 0); -+ TPOff = SDValue(DAG.getMachineNode(AArch64::ADDXri, DL, PtrVT, TPOff, LoVar, -+ DAG.getTargetConstant(0, MVT::i32)), -+ 0); - } else if (Model == TLSModel::GeneralDynamic) { -- // Accesses used in this sequence go via the TLS descriptor which lives in -- // the GOT. Prepare an address we can use to handle this. -- SDValue HiDesc = DAG.getTargetGlobalAddress( -- GV, DL, PtrVT, 0, AArch64II::MO_TLS | AArch64II::MO_PAGE); -- SDValue LoDesc = DAG.getTargetGlobalAddress( -- GV, DL, PtrVT, 0, -- AArch64II::MO_TLS | AArch64II::MO_PAGEOFF | AArch64II::MO_NC); -- -- // First argument to the descriptor call is the address of the descriptor -- // itself. -- SDValue DescAddr = DAG.getNode(AArch64ISD::ADRP, DL, PtrVT, HiDesc); -- DescAddr = DAG.getNode(AArch64ISD::ADDlow, DL, PtrVT, DescAddr, LoDesc); -- - // The call needs a relocation too for linker relaxation. It doesn't make - // sense to call it MO_PAGE or MO_PAGEOFF though so we need another copy of - // the address. -@@ -3214,7 +3177,7 @@ AArch64TargetLowering::LowerELFGlobalTLSAddress(SD - DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0, AArch64II::MO_TLS); - - // Finally we can make a call to calculate the offset from tpidr_el0. -- TPOff = LowerELFTLSDescCall(SymAddr, DescAddr, DL, DAG); -+ TPOff = LowerELFTLSDescCallSeq(SymAddr, DL, DAG); - } else - llvm_unreachable("Unsupported ELF TLS access model"); - -Index: lib/Target/AArch64/AArch64ISelLowering.h -=================================================================== ---- lib/Target/AArch64/AArch64ISelLowering.h -+++ lib/Target/AArch64/AArch64ISelLowering.h -@@ -29,9 +29,9 @@ enum { - WrapperLarge, // 4-instruction MOVZ/MOVK sequence for 64-bit addresses. - CALL, // Function call. - -- // Almost the same as a normal call node, except that a TLSDesc relocation is -- // needed so the linker can relax it correctly if possible. -- TLSDESC_CALL, -+ // Produces the full sequence of instructions for getting the thread pointer -+ // offset of a variable into X0, using the TLSDesc model. -+ TLSDESC_CALLSEQ, - ADRP, // Page address of a TargetGlobalAddress operand. - ADDlow, // Add the low 12 bits of a TargetGlobalAddress operand. - LOADgot, // Load from automatically generated descriptor (e.g. Global -@@ -399,8 +399,8 @@ class AArch64TargetLowering : public TargetLowerin - SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const; - SDValue LowerDarwinGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const; - SDValue LowerELFGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const; -- SDValue LowerELFTLSDescCall(SDValue SymAddr, SDValue DescAddr, SDLoc DL, -- SelectionDAG &DAG) const; -+ SDValue LowerELFTLSDescCallSeq(SDValue SymAddr, SDLoc DL, -+ SelectionDAG &DAG) const; - SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const; - SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const; - SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG) const; -Index: lib/Target/AArch64/AArch64InstrInfo.td -=================================================================== ---- lib/Target/AArch64/AArch64InstrInfo.td -+++ lib/Target/AArch64/AArch64InstrInfo.td -@@ -96,6 +96,19 @@ def SDT_AArch64ITOF : SDTypeProfile<1, 1, [SDTCis - - def SDT_AArch64TLSDescCall : SDTypeProfile<0, -2, [SDTCisPtrTy<0>, - SDTCisPtrTy<1>]>; -+ -+// Generates the general dynamic sequences, i.e. -+// adrp x0, :tlsdesc:var -+// ldr x1, [x0, #:tlsdesc_lo12:var] -+// add x0, x0, #:tlsdesc_lo12:var -+// .tlsdesccall var -+// blr x1 -+ -+// (the TPIDR_EL0 offset is put directly in X0, hence no "result" here) -+// number of operands (the variable) -+def SDT_AArch64TLSDescCallSeq : SDTypeProfile<0,1, -+ [SDTCisPtrTy<0>]>; -+ - def SDT_AArch64WrapperLarge : SDTypeProfile<1, 4, - [SDTCisVT<0, i64>, SDTCisVT<1, i32>, - SDTCisSameAs<1, 2>, SDTCisSameAs<1, 3>, -@@ -229,11 +242,12 @@ def AArch64Prefetch : SDNode<"AArch64ISD::P - def AArch64sitof: SDNode<"AArch64ISD::SITOF", SDT_AArch64ITOF>; - def AArch64uitof: SDNode<"AArch64ISD::UITOF", SDT_AArch64ITOF>; - --def AArch64tlsdesc_call : SDNode<"AArch64ISD::TLSDESC_CALL", -- SDT_AArch64TLSDescCall, -- [SDNPInGlue, SDNPOutGlue, SDNPHasChain, -- SDNPVariadic]>; -+def AArch64tlsdesc_callseq : SDNode<"AArch64ISD::TLSDESC_CALLSEQ", -+ SDT_AArch64TLSDescCallSeq, -+ [SDNPInGlue, SDNPOutGlue, SDNPHasChain, -+ SDNPVariadic]>; - -+ - def AArch64WrapperLarge : SDNode<"AArch64ISD::WrapperLarge", - SDT_AArch64WrapperLarge>; - -@@ -1049,15 +1063,16 @@ def TLSDESCCALL : Pseudo<(outs), (ins i64imm:$sym) - let AsmString = ".tlsdesccall $sym"; - } - --// Pseudo-instruction representing a BLR with attached TLSDESC relocation. It --// gets expanded to two MCInsts during lowering. --let isCall = 1, Defs = [LR] in --def TLSDESC_BLR -- : Pseudo<(outs), (ins GPR64:$dest, i64imm:$sym), -- [(AArch64tlsdesc_call GPR64:$dest, tglobaltlsaddr:$sym)]>; -+// FIXME: maybe the scratch register used shouldn't be fixed to X1? -+// FIXME: can "hasSideEffects be dropped? -+let isCall = 1, Defs = [LR, X0, X1], hasSideEffects = 1, -+ isCodeGenOnly = 1 in -+def TLSDESC_CALLSEQ -+ : Pseudo<(outs), (ins i64imm:$sym), -+ [(AArch64tlsdesc_callseq tglobaltlsaddr:$sym)]>; -+def : Pat<(AArch64tlsdesc_callseq texternalsym:$sym), -+ (TLSDESC_CALLSEQ texternalsym:$sym)>; - --def : Pat<(AArch64tlsdesc_call GPR64:$dest, texternalsym:$sym), -- (TLSDESC_BLR GPR64:$dest, texternalsym:$sym)>; - //===----------------------------------------------------------------------===// - // Conditional branch (immediate) instruction. - //===----------------------------------------------------------------------===// -Index: lib/Target/AArch64/AArch64MCInstLower.cpp -=================================================================== ---- lib/Target/AArch64/AArch64MCInstLower.cpp -+++ lib/Target/AArch64/AArch64MCInstLower.cpp -@@ -22,9 +22,12 @@ - #include "llvm/MC/MCExpr.h" - #include "llvm/MC/MCInst.h" - #include "llvm/Support/CodeGen.h" -+#include "llvm/Support/CommandLine.h" - #include "llvm/Target/TargetMachine.h" - using namespace llvm; - -+extern cl::opt EnableAArch64ELFLocalDynamicTLSGeneration; -+ - AArch64MCInstLower::AArch64MCInstLower(MCContext &ctx, AsmPrinter &printer) - : Ctx(ctx), Printer(printer), TargetTriple(printer.getTargetTriple()) {} - -@@ -84,10 +87,16 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandEL - if (MO.isGlobal()) { - const GlobalValue *GV = MO.getGlobal(); - Model = Printer.TM.getTLSModel(GV); -+ if (!EnableAArch64ELFLocalDynamicTLSGeneration && -+ Model == TLSModel::LocalDynamic) -+ Model = TLSModel::GeneralDynamic; -+ - } else { - assert(MO.isSymbol() && - StringRef(MO.getSymbolName()) == "_TLS_MODULE_BASE_" && - "unexpected external TLS symbol"); -+ // The general dynamic access sequence is used to get the -+ // address of _TLS_MODULE_BASE_. - Model = TLSModel::GeneralDynamic; - } - switch (Model) { -@@ -123,6 +132,8 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandEL - RefFlags |= AArch64MCExpr::VK_G1; - else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G0) - RefFlags |= AArch64MCExpr::VK_G0; -+ else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_HI12) -+ RefFlags |= AArch64MCExpr::VK_HI12; - - if (MO.getTargetFlags() & AArch64II::MO_NC) - RefFlags |= AArch64MCExpr::VK_NC; -Index: lib/Target/AArch64/Utils/AArch64BaseInfo.h -=================================================================== ---- lib/Target/AArch64/Utils/AArch64BaseInfo.h -+++ lib/Target/AArch64/Utils/AArch64BaseInfo.h -@@ -1229,7 +1229,7 @@ namespace AArch64II { - - MO_NO_FLAG, - -- MO_FRAGMENT = 0x7, -+ MO_FRAGMENT = 0xf, - - /// MO_PAGE - A symbol operand with this flag represents the pc-relative - /// offset of the 4K page containing the symbol. This is used with the -@@ -1257,26 +1257,31 @@ namespace AArch64II { - /// 0-15 of a 64-bit address, used in a MOVZ or MOVK instruction - MO_G0 = 6, - -+ /// MO_HI12 - This flag indicates that a symbol operand represents the bits -+ /// 13-24 of a 64-bit address, used in a arithmetic immediate-shifted-left- -+ /// by-12-bits instruction. -+ MO_HI12 = 7, -+ - /// MO_GOT - This flag indicates that a symbol operand represents the - /// address of the GOT entry for the symbol, rather than the address of - /// the symbol itself. -- MO_GOT = 8, -+ MO_GOT = 0x10, - - /// MO_NC - Indicates whether the linker is expected to check the symbol - /// reference for overflow. For example in an ADRP/ADD pair of relocations - /// the ADRP usually does check, but not the ADD. -- MO_NC = 0x10, -+ MO_NC = 0x20, - - /// MO_TLS - Indicates that the operand being accessed is some kind of - /// thread-local symbol. On Darwin, only one type of thread-local access - /// exists (pre linker-relaxation), but on ELF the TLSModel used for the - /// referee will affect interpretation. -- MO_TLS = 0x20, -+ MO_TLS = 0x40, - - /// MO_CONSTPOOL - This flag indicates that a symbol operand represents - /// the address of a constant pool entry for the symbol, rather than the - /// address of the symbol itself. -- MO_CONSTPOOL = 0x40 -+ MO_CONSTPOOL = 0x80 - }; - } // end namespace AArch64II - -Index: test/CodeGen/AArch64/arm64-tls-dynamics.ll -=================================================================== ---- test/CodeGen/AArch64/arm64-tls-dynamics.ll -+++ test/CodeGen/AArch64/arm64-tls-dynamics.ll -@@ -1,5 +1,7 @@ --; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -verify-machineinstrs < %s | FileCheck %s --; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -filetype=obj < %s | llvm-objdump -r - | FileCheck --check-prefix=CHECK-RELOC %s -+; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -aarch64-elf-ldtls-generation=1 -verify-machineinstrs < %s | FileCheck %s -+; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -aarch64-elf-ldtls-generation=1 -filetype=obj < %s | llvm-objdump -r - | FileCheck --check-prefix=CHECK-RELOC %s -+; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -verify-machineinstrs < %s | FileCheck --check-prefix=CHECK-NOLD %s -+; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -filetype=obj < %s | llvm-objdump -r - | FileCheck --check-prefix=CHECK-NOLD-RELOC %s - - @general_dynamic_var = external thread_local global i32 - -@@ -9,22 +11,34 @@ define i32 @test_generaldynamic() { - %val = load i32* @general_dynamic_var - ret i32 %val - -- ; FIXME: the adrp instructions are redundant (if harmless). --; CHECK: adrp [[TLSDESC_HI:x[0-9]+]], :tlsdesc:general_dynamic_var --; CHECK: add x0, [[TLSDESC_HI]], :tlsdesc_lo12:general_dynamic_var - ; CHECK: adrp x[[TLSDESC_HI:[0-9]+]], :tlsdesc:general_dynamic_var --; CHECK: ldr [[CALLEE:x[0-9]+]], [x[[TLSDESC_HI]], :tlsdesc_lo12:general_dynamic_var] --; CHECK: .tlsdesccall general_dynamic_var -+; CHECK-NEXT: ldr [[CALLEE:x[0-9]+]], [x[[TLSDESC_HI]], :tlsdesc_lo12:general_dynamic_var] -+; CHECK-NEXT: add x0, x[[TLSDESC_HI]], :tlsdesc_lo12:general_dynamic_var -+; CHECK-NEXT: .tlsdesccall general_dynamic_var - ; CHECK-NEXT: blr [[CALLEE]] - -+; CHECK-NOLD: adrp x[[TLSDESC_HI:[0-9]+]], :tlsdesc:general_dynamic_var -+; CHECK-NOLD-NEXT: ldr [[CALLEE:x[0-9]+]], [x[[TLSDESC_HI]], :tlsdesc_lo12:general_dynamic_var] -+; CHECK-NOLD-NEXT: add x0, x[[TLSDESC_HI]], :tlsdesc_lo12:general_dynamic_var -+; CHECK-NOLD-NEXT: .tlsdesccall general_dynamic_var -+; CHECK-NOLD-NEXT: blr [[CALLEE]] -+ -+ - ; CHECK: mrs x[[TP:[0-9]+]], TPIDR_EL0 - ; CHECK: ldr w0, [x[[TP]], x0] -+; CHECK-NOLD: mrs x[[TP:[0-9]+]], TPIDR_EL0 -+; CHECK-NOLD: ldr w0, [x[[TP]], x0] - - ; CHECK-RELOC: R_AARCH64_TLSDESC_ADR_PAGE21 -+; CHECK-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC - ; CHECK-RELOC: R_AARCH64_TLSDESC_ADD_LO12_NC --; CHECK-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC - ; CHECK-RELOC: R_AARCH64_TLSDESC_CALL - -+; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_ADR_PAGE21 -+; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC -+; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_ADD_LO12_NC -+; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_CALL -+ - } - - define i32* @test_generaldynamic_addr() { -@@ -32,12 +46,10 @@ define i32* @test_generaldynamic_addr() { - - ret i32* @general_dynamic_var - -- ; FIXME: the adrp instructions are redundant (if harmless). --; CHECK: adrp [[TLSDESC_HI:x[0-9]+]], :tlsdesc:general_dynamic_var --; CHECK: add x0, [[TLSDESC_HI]], :tlsdesc_lo12:general_dynamic_var - ; CHECK: adrp x[[TLSDESC_HI:[0-9]+]], :tlsdesc:general_dynamic_var --; CHECK: ldr [[CALLEE:x[0-9]+]], [x[[TLSDESC_HI]], :tlsdesc_lo12:general_dynamic_var] --; CHECK: .tlsdesccall general_dynamic_var -+; CHECK-NEXT: ldr [[CALLEE:x[0-9]+]], [x[[TLSDESC_HI]], :tlsdesc_lo12:general_dynamic_var] -+; CHECK-NEXT: add x0, x[[TLSDESC_HI]], :tlsdesc_lo12:general_dynamic_var -+; CHECK-NEXT: .tlsdesccall general_dynamic_var - ; CHECK-NEXT: blr [[CALLEE]] - - ; CHECK: mrs [[TP:x[0-9]+]], TPIDR_EL0 -@@ -44,9 +56,15 @@ define i32* @test_generaldynamic_addr() { - ; CHECK: add x0, [[TP]], x0 - - ; CHECK-RELOC: R_AARCH64_TLSDESC_ADR_PAGE21 -+; CHECK-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC - ; CHECK-RELOC: R_AARCH64_TLSDESC_ADD_LO12_NC --; CHECK-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC - ; CHECK-RELOC: R_AARCH64_TLSDESC_CALL -+ -+; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_ADR_PAGE21 -+; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC -+; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_ADD_LO12_NC -+; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_CALL -+ - } - - @local_dynamic_var = external thread_local(localdynamic) global i32 -@@ -58,54 +76,71 @@ define i32 @test_localdynamic() { - ret i32 %val - - ; CHECK: adrp x[[TLSDESC_HI:[0-9]+]], :tlsdesc:_TLS_MODULE_BASE_ --; CHECK: add x0, x[[TLSDESC_HI]], :tlsdesc_lo12:_TLS_MODULE_BASE_ --; CHECK: adrp x[[TLSDESC_HI:[0-9]+]], :tlsdesc:_TLS_MODULE_BASE_ --; CHECK: ldr [[CALLEE:x[0-9]+]], [x[[TLSDESC_HI]], :tlsdesc_lo12:_TLS_MODULE_BASE_] --; CHECK: .tlsdesccall _TLS_MODULE_BASE_ -+; CHECK-NEXT: ldr [[CALLEE:x[0-9]+]], [x[[TLSDESC_HI]], :tlsdesc_lo12:_TLS_MODULE_BASE_] -+; CHECK-NEXT: add x0, x[[TLSDESC_HI]], :tlsdesc_lo12:_TLS_MODULE_BASE_ -+; CHECK-NEXT: .tlsdesccall _TLS_MODULE_BASE_ - ; CHECK-NEXT: blr [[CALLEE]] -+; CHECK-NEXT: add x[[TPOFF:[0-9]+]], x0, :dtprel_hi12:local_dynamic_var -+; CHECK-NEXT: add x[[TPOFF]], x[[TPOFF]], :dtprel_lo12_nc:local_dynamic_var -+; CHECK: mrs x[[TPIDR:[0-9]+]], TPIDR_EL0 -+; CHECK: ldr w0, [x[[TPIDR]], x[[TPOFF]]] - --; CHECK: movz [[DTP_OFFSET:x[0-9]+]], #:dtprel_g1:local_dynamic_var --; CHECK: movk [[DTP_OFFSET]], #:dtprel_g0_nc:local_dynamic_var -+; CHECK-NOLD: adrp x[[TLSDESC_HI:[0-9]+]], :tlsdesc:local_dynamic_var -+; CHECK-NOLD-NEXT: ldr [[CALLEE:x[0-9]+]], [x[[TLSDESC_HI]], :tlsdesc_lo12:local_dynamic_var] -+; CHECK-NOLD-NEXT: add x0, x[[TLSDESC_HI]], :tlsdesc_lo12:local_dynamic_var -+; CHECK-NOLD-NEXT: .tlsdesccall local_dynamic_var -+; CHECK-NOLD-NEXT: blr [[CALLEE]] -+; CHECK-NOLD: mrs x[[TPIDR:[0-9]+]], TPIDR_EL0 -+; CHECK-NOLD: ldr w0, [x[[TPIDR]], x0] - --; CHECK: add x[[TPREL:[0-9]+]], x0, [[DTP_OFFSET]] - --; CHECK: mrs x[[TPIDR:[0-9]+]], TPIDR_EL0 -- --; CHECK: ldr w0, [x[[TPIDR]], x[[TPREL]]] -- - ; CHECK-RELOC: R_AARCH64_TLSDESC_ADR_PAGE21 -+; CHECK-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC - ; CHECK-RELOC: R_AARCH64_TLSDESC_ADD_LO12_NC --; CHECK-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC - ; CHECK-RELOC: R_AARCH64_TLSDESC_CALL -+; CHECK-RELOC: R_AARCH64_TLSLD_ADD_DTPREL_HI12 -+; CHECK-RELOC: R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC - -+; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_ADR_PAGE21 -+; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC -+; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_ADD_LO12_NC -+; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_CALL -+ - } - - define i32* @test_localdynamic_addr() { - ; CHECK-LABEL: test_localdynamic_addr: - -- ret i32* @local_dynamic_var -- - ; CHECK: adrp x[[TLSDESC_HI:[0-9]+]], :tlsdesc:_TLS_MODULE_BASE_ --; CHECK: add x0, x[[TLSDESC_HI]], :tlsdesc_lo12:_TLS_MODULE_BASE_ --; CHECK: adrp x[[TLSDESC_HI:[0-9]+]], :tlsdesc:_TLS_MODULE_BASE_ --; CHECK: ldr [[CALLEE:x[0-9]+]], [x[[TLSDESC_HI]], :tlsdesc_lo12:_TLS_MODULE_BASE_] --; CHECK: .tlsdesccall _TLS_MODULE_BASE_ -+; CHECK-NEXT: ldr [[CALLEE:x[0-9]+]], [x[[TLSDESC_HI]], :tlsdesc_lo12:_TLS_MODULE_BASE_] -+; CHECK-NEXT: add x0, x[[TLSDESC_HI]], :tlsdesc_lo12:_TLS_MODULE_BASE_ -+; CHECK-NEXT: .tlsdesccall _TLS_MODULE_BASE_ - ; CHECK-NEXT: blr [[CALLEE]] -+; CHECK-NEXT: add x[[TPOFF:[0-9]+]], x0, :dtprel_hi12:local_dynamic_var -+; CHECK-NEXT: add x[[TPOFF]], x[[TPOFF]], :dtprel_lo12_nc:local_dynamic_var -+; CHECK: mrs x[[TPIDR:[0-9]+]], TPIDR_EL0 -+; CHECK: add x0, x[[TPIDR]], x[[TPOFF]] - --; CHECK: movz [[DTP_OFFSET:x[0-9]+]], #:dtprel_g1:local_dynamic_var --; CHECK: movk [[DTP_OFFSET]], #:dtprel_g0_nc:local_dynamic_var -+; CHECK-NOLD: adrp x[[TLSDESC_HI:[0-9]+]], :tlsdesc:local_dynamic_var -+; CHECK-NOLD-NEXT: ldr [[CALLEE:x[0-9]+]], [x[[TLSDESC_HI]], :tlsdesc_lo12:local_dynamic_var] -+; CHECK-NOLD-NEXT: add x0, x[[TLSDESC_HI]], :tlsdesc_lo12:local_dynamic_var -+; CHECK-NOLD-NEXT: .tlsdesccall local_dynamic_var -+; CHECK-NOLD-NEXT: blr [[CALLEE]] -+; CHECK-NOLD: mrs x[[TPIDR:[0-9]+]], TPIDR_EL0 -+; CHECK-NOLD: add x0, x[[TPIDR]], x0 -+ ret i32* @local_dynamic_var - --; CHECK: add [[TPREL:x[0-9]+]], x0, [[DTP_OFFSET]] -- --; CHECK: mrs [[TPIDR:x[0-9]+]], TPIDR_EL0 -- --; CHECK: add x0, [[TPIDR]], [[TPREL]] -- - ; CHECK-RELOC: R_AARCH64_TLSDESC_ADR_PAGE21 -+; CHECK-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC - ; CHECK-RELOC: R_AARCH64_TLSDESC_ADD_LO12_NC --; CHECK-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC - ; CHECK-RELOC: R_AARCH64_TLSDESC_CALL -+; CHECK-RELOC: R_AARCH64_TLSLD_ADD_DTPREL_HI12 -+; CHECK-RELOC: R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC - -+; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_ADR_PAGE21 -+; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC -+; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_ADD_LO12_NC -+; CHECK-NOLD-RELOC: R_AARCH64_TLSDESC_CALL - } - - ; The entire point of the local-dynamic access model is to have a single call to -@@ -122,11 +157,10 @@ define i32 @test_localdynamic_deduplicate() { - %sum = add i32 %val, %val2 - ret i32 %sum - --; CHECK: adrp x[[TLSDESC_HI:[0-9]+]], :tlsdesc:_TLS_MODULE_BASE_ --; CHECK: add x0, x[[TLSDESC_HI]], :tlsdesc_lo12:_TLS_MODULE_BASE_ --; CHECK: adrp x[[TLSDESC_HI:[0-9]+]], :tlsdesc:_TLS_MODULE_BASE_ --; CHECK: ldr [[CALLEE:x[0-9]+]], [x[[TLSDESC_HI]], :tlsdesc_lo12:_TLS_MODULE_BASE_] --; CHECK: .tlsdesccall _TLS_MODULE_BASE_ -+; CHECK: adrp x[[DTPREL_HI:[0-9]+]], :tlsdesc:_TLS_MODULE_BASE_ -+; CHECK-NEXT: ldr [[CALLEE:x[0-9]+]], [x[[DTPREL_HI]], :tlsdesc_lo12:_TLS_MODULE_BASE_] -+; CHECK-NEXT: add x0, x[[TLSDESC_HI]], :tlsdesc_lo12:_TLS_MODULE_BASE -+; CHECK-NEXT: .tlsdesccall _TLS_MODULE_BASE_ - ; CHECK-NEXT: blr [[CALLEE]] - - ; CHECK-NOT: _TLS_MODULE_BASE_ -Index: test/CodeGen/AArch64/arm64-tls-execs.ll -=================================================================== ---- test/CodeGen/AArch64/arm64-tls-execs.ll -+++ test/CodeGen/AArch64/arm64-tls-execs.ll -@@ -38,14 +38,13 @@ define i32 @test_local_exec() { - ; CHECK-LABEL: test_local_exec: - %val = load i32* @local_exec_var - --; CHECK: movz [[TP_OFFSET:x[0-9]+]], #:tprel_g1:local_exec_var // encoding: [0bAAA{{[01]+}},A,0b101AAAAA,0x92] --; CHECK: movk [[TP_OFFSET]], #:tprel_g0_nc:local_exec_var --; CHECK: mrs x[[TP:[0-9]+]], TPIDR_EL0 --; CHECK: ldr w0, [x[[TP]], [[TP_OFFSET]]] -+; CHECK: mrs x[[R1:[0-9]+]], TPIDR_EL0 -+; CHECK: add x[[R2:[0-9]+]], x[[R1]], :tprel_hi12:local_exec_var -+; CHECK: add x[[R3:[0-9]+]], x[[R2]], :tprel_lo12_nc:local_exec_var -+; CHECK: ldr w0, [x[[R3]]] - --; CHECK-RELOC: R_AARCH64_TLSLE_MOVW_TPREL_G1 --; CHECK-RELOC: R_AARCH64_TLSLE_MOVW_TPREL_G0_NC -- -+; CHECK-RELOC: R_AARCH64_TLSLE_ADD_TPREL_HI12 -+; CHECK-RELOC: R_AARCH64_TLSLE_ADD_TPREL_LO12_NC - ret i32 %val - } - -@@ -53,11 +52,11 @@ define i32* @test_local_exec_addr() { - ; CHECK-LABEL: test_local_exec_addr: - ret i32* @local_exec_var - --; CHECK: movz [[TP_OFFSET:x[0-9]+]], #:tprel_g1:local_exec_var --; CHECK: movk [[TP_OFFSET]], #:tprel_g0_nc:local_exec_var --; CHECK: mrs [[TP:x[0-9]+]], TPIDR_EL0 --; CHECK: add x0, [[TP]], [[TP_OFFSET]] -+; CHECK: mrs x[[R1:[0-9]+]], TPIDR_EL0 -+; CHECK: add x[[R2:[0-9]+]], x[[R1]], :tprel_hi12:local_exec_var -+; CHECK: add x0, x[[R2]], :tprel_lo12_nc:local_exec_var -+; CHECK: ret - --; CHECK-RELOC: R_AARCH64_TLSLE_MOVW_TPREL_G1 --; CHECK-RELOC: R_AARCH64_TLSLE_MOVW_TPREL_G0_NC -+; CHECK-RELOC: R_AARCH64_TLSLE_ADD_TPREL_HI12 -+; CHECK-RELOC: R_AARCH64_TLSLE_ADD_TPREL_LO12_NC - } diff --git a/contrib/llvm/patches/patch-13-llvm-r229911-uleb128-commas.diff b/contrib/llvm/patches/patch-13-llvm-r229911-uleb128-commas.diff deleted file mode 100644 index bf13463bd743..000000000000 --- a/contrib/llvm/patches/patch-13-llvm-r229911-uleb128-commas.diff +++ /dev/null @@ -1,77 +0,0 @@ -Pull in r229911 from upstream llvm trunk (by Benjamin Kramer): - - MC: Allow multiple comma-separated expressions on the .uleb128 directive. - - For compatiblity with GNU as. Binutils documents this as - '.uleb128 expressions'. Subtle, isn't it? - -Introduced here: http://svnweb.freebsd.org/changeset/base/281775 - -Index: lib/MC/MCParser/AsmParser.cpp -=================================================================== ---- lib/MC/MCParser/AsmParser.cpp -+++ lib/MC/MCParser/AsmParser.cpp -@@ -3636,22 +3636,28 @@ bool AsmParser::parseDirectiveSpace(StringRef IDVa - } - - /// parseDirectiveLEB128 --/// ::= (.sleb128 | .uleb128) expression -+/// ::= (.sleb128 | .uleb128) [ expression (, expression)* ] - bool AsmParser::parseDirectiveLEB128(bool Signed) { - checkForValidSection(); - const MCExpr *Value; - -- if (parseExpression(Value)) -- return true; -+ for (;;) { -+ if (parseExpression(Value)) -+ return true; - -- if (getLexer().isNot(AsmToken::EndOfStatement)) -- return TokError("unexpected token in directive"); -+ if (Signed) -+ getStreamer().EmitSLEB128Value(Value); -+ else -+ getStreamer().EmitULEB128Value(Value); - -- if (Signed) -- getStreamer().EmitSLEB128Value(Value); -- else -- getStreamer().EmitULEB128Value(Value); -+ if (getLexer().is(AsmToken::EndOfStatement)) -+ break; - -+ if (getLexer().isNot(AsmToken::Comma)) -+ return TokError("unexpected token in directive"); -+ Lex(); -+ } -+ - return false; - } - -Index: test/MC/ELF/uleb.s -=================================================================== ---- test/MC/ELF/uleb.s -+++ test/MC/ELF/uleb.s -@@ -11,16 +11,17 @@ foo: - .uleb128 128 - .uleb128 16383 - .uleb128 16384 -+ .uleb128 23, 42 - - // ELF_32: Name: .text - // ELF_32: SectionData ( --// ELF_32: 0000: 00017F80 01FF7F80 8001 -+// ELF_32: 0000: 00017F80 01FF7F80 8001172A - // ELF_32: ) - // ELF_64: Name: .text - // ELF_64: SectionData ( --// ELF_64: 0000: 00017F80 01FF7F80 8001 -+// ELF_64: 0000: 00017F80 01FF7F80 8001172A - // ELF_64: ) - // MACHO_32: ('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') --// MACHO_32: ('_section_data', '00017f80 01ff7f80 8001') -+// MACHO_32: ('_section_data', '00017f80 01ff7f80 8001172a') - // MACHO_64: ('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') --// MACHO_64: ('_section_data', '00017f80 01ff7f80 8001') -+// MACHO_64: ('_section_data', '00017f80 01ff7f80 8001172a') diff --git a/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticSemaKinds.td b/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticSemaKinds.td index b173d82a31d4..1a27e7cd3d2c 100644 --- a/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticSemaKinds.td +++ b/contrib/llvm/tools/clang/include/clang/Basic/DiagnosticSemaKinds.td @@ -6972,6 +6972,11 @@ def note_neon_vector_initializer_non_portable_q : Note< "vcombine_%0%1(vcreate_%0%1(), vcreate_%0%1()) to initialize from integer " "constants">; +def err_builtin_longjmp_unsupported : Error< + "__builtin_longjmp is not supported for the current target">; +def err_builtin_setjmp_unsupported : Error< + "__builtin_setjmp is not supported for the current target">; + def err_builtin_longjmp_invalid_val : Error< "argument to __builtin_longjmp must be a constant 1">; def err_builtin_requires_language : Error<"'%0' is only available in %1">; diff --git a/contrib/llvm/tools/clang/include/clang/Basic/TargetCXXABI.h b/contrib/llvm/tools/clang/include/clang/Basic/TargetCXXABI.h index 5669d2a55937..42a976b3afde 100644 --- a/contrib/llvm/tools/clang/include/clang/Basic/TargetCXXABI.h +++ b/contrib/llvm/tools/clang/include/clang/Basic/TargetCXXABI.h @@ -79,6 +79,12 @@ class TargetCXXABI { /// - guard variables are smaller. GenericAArch64, + /// The generic Mips ABI is a modified version of the Itanium ABI. + /// + /// At the moment, only change from the generic ABI in this case is: + /// - representation of member function pointers adjusted as in ARM. + GenericMIPS, + /// The Microsoft ABI is the ABI used by Microsoft Visual Studio (and /// compatible compilers). /// @@ -114,6 +120,7 @@ class TargetCXXABI { case GenericARM: case iOS: case iOS64: + case GenericMIPS: return true; case Microsoft: @@ -130,6 +137,7 @@ class TargetCXXABI { case GenericARM: case iOS: case iOS64: + case GenericMIPS: return false; case Microsoft: @@ -212,6 +220,7 @@ class TargetCXXABI { case GenericItanium: case iOS: // old iOS compilers did not follow this rule case Microsoft: + case GenericMIPS: return true; } llvm_unreachable("bad ABI kind"); @@ -257,6 +266,7 @@ class TargetCXXABI { case GenericAArch64: case GenericARM: case iOS: + case GenericMIPS: return UseTailPaddingUnlessPOD03; // iOS on ARM64 uses the C++11 POD rules. It does not honor the diff --git a/contrib/llvm/tools/clang/include/clang/Basic/TargetInfo.h b/contrib/llvm/tools/clang/include/clang/Basic/TargetInfo.h index 69a54044680d..7a6462c48227 100644 --- a/contrib/llvm/tools/clang/include/clang/Basic/TargetInfo.h +++ b/contrib/llvm/tools/clang/include/clang/Basic/TargetInfo.h @@ -852,6 +852,12 @@ class TargetInfo : public RefCountedBase { } } + /// Controls if __builtin_longjmp / __builtin_setjmp can be lowered to + /// llvm.eh.sjlj.longjmp / llvm.eh.sjlj.setjmp. + virtual bool hasSjLjLowering() const { + return false; + } + protected: virtual uint64_t getPointerWidthV(unsigned AddrSpace) const { return PointerWidth; diff --git a/contrib/llvm/tools/clang/include/clang/Sema/Sema.h b/contrib/llvm/tools/clang/include/clang/Sema/Sema.h index cfb0ae755ca8..3032a19a9340 100644 --- a/contrib/llvm/tools/clang/include/clang/Sema/Sema.h +++ b/contrib/llvm/tools/clang/include/clang/Sema/Sema.h @@ -8550,6 +8550,7 @@ class Sema { bool SemaBuiltinAssume(CallExpr *TheCall); bool SemaBuiltinAssumeAligned(CallExpr *TheCall); bool SemaBuiltinLongjmp(CallExpr *TheCall); + bool SemaBuiltinSetjmp(CallExpr *TheCall); ExprResult SemaBuiltinAtomicOverloaded(ExprResult TheCallResult); ExprResult SemaAtomicOpsOverloaded(ExprResult TheCallResult, AtomicExpr::AtomicOp Op); diff --git a/contrib/llvm/tools/clang/include/clang/Sema/Template.h b/contrib/llvm/tools/clang/include/clang/Sema/Template.h index c08a5df00b36..8f0d9da73ecb 100644 --- a/contrib/llvm/tools/clang/include/clang/Sema/Template.h +++ b/contrib/llvm/tools/clang/include/clang/Sema/Template.h @@ -273,6 +273,11 @@ namespace clang { /// outermost scope. LocalInstantiationScope *cloneScopes(LocalInstantiationScope *Outermost) { if (this == Outermost) return this; + + // Save the current scope from SemaRef since the LocalInstantiationScope + // will overwrite it on construction + LocalInstantiationScope *oldScope = SemaRef.CurrentInstantiationScope; + LocalInstantiationScope *newScope = new LocalInstantiationScope(SemaRef, CombineWithOuterScope); @@ -299,6 +304,8 @@ namespace clang { newScope->ArgumentPacks.push_back(NewPack); } } + // Restore the saved scope to SemaRef + SemaRef.CurrentInstantiationScope = oldScope; return newScope; } diff --git a/contrib/llvm/tools/clang/lib/AST/ASTContext.cpp b/contrib/llvm/tools/clang/lib/AST/ASTContext.cpp index 6b864d0f0ac2..c9fb80ceaae2 100644 --- a/contrib/llvm/tools/clang/lib/AST/ASTContext.cpp +++ b/contrib/llvm/tools/clang/lib/AST/ASTContext.cpp @@ -682,6 +682,7 @@ CXXABI *ASTContext::createCXXABI(const TargetInfo &T) { case TargetCXXABI::iOS: case TargetCXXABI::iOS64: case TargetCXXABI::GenericAArch64: + case TargetCXXABI::GenericMIPS: case TargetCXXABI::GenericItanium: return CreateItaniumCXXABI(*this); case TargetCXXABI::Microsoft: @@ -7873,7 +7874,7 @@ static GVALinkage basicGVALinkageForFunction(const ASTContext &Context, // Functions specified with extern and inline in -fms-compatibility mode // forcibly get emitted. While the body of the function cannot be later // replaced, the function definition cannot be discarded. - if (FD->getMostRecentDecl()->isMSExternInline()) + if (FD->isMSExternInline()) return GVA_StrongODR; return GVA_DiscardableODR; @@ -8064,6 +8065,7 @@ MangleContext *ASTContext::createMangleContext() { case TargetCXXABI::GenericAArch64: case TargetCXXABI::GenericItanium: case TargetCXXABI::GenericARM: + case TargetCXXABI::GenericMIPS: case TargetCXXABI::iOS: case TargetCXXABI::iOS64: return ItaniumMangleContext::create(*this, getDiagnostics()); diff --git a/contrib/llvm/tools/clang/lib/AST/ASTDiagnostic.cpp b/contrib/llvm/tools/clang/lib/AST/ASTDiagnostic.cpp index 3212359db183..000588face96 100644 --- a/contrib/llvm/tools/clang/lib/AST/ASTDiagnostic.cpp +++ b/contrib/llvm/tools/clang/lib/AST/ASTDiagnostic.cpp @@ -998,29 +998,27 @@ class TemplateDiff { (!HasFromValueDecl && !HasToValueDecl)) && "Template argument cannot be both integer and declaration"); - unsigned ParamWidth = 128; // Safe default - if (FromDefaultNonTypeDecl->getType()->isIntegralOrEnumerationType()) - ParamWidth = Context.getIntWidth(FromDefaultNonTypeDecl->getType()); - if (!HasFromInt && !HasToInt && !HasFromValueDecl && !HasToValueDecl) { Tree.SetNode(FromExpr, ToExpr); Tree.SetDefault(FromIter.isEnd() && FromExpr, ToIter.isEnd() && ToExpr); if (FromDefaultNonTypeDecl->getType()->isIntegralOrEnumerationType()) { if (FromExpr) - HasFromInt = GetInt(Context, FromIter, FromExpr, FromInt); + HasFromInt = GetInt(Context, FromIter, FromExpr, FromInt, + FromDefaultNonTypeDecl->getType()); if (ToExpr) - HasToInt = GetInt(Context, ToIter, ToExpr, ToInt); + HasToInt = GetInt(Context, ToIter, ToExpr, ToInt, + ToDefaultNonTypeDecl->getType()); } if (HasFromInt && HasToInt) { Tree.SetNode(FromInt, ToInt, HasFromInt, HasToInt); - Tree.SetSame(IsSameConvertedInt(ParamWidth, FromInt, ToInt)); + Tree.SetSame(FromInt == ToInt); Tree.SetKind(DiffTree::Integer); } else if (HasFromInt || HasToInt) { Tree.SetNode(FromInt, ToInt, HasFromInt, HasToInt); Tree.SetSame(false); Tree.SetKind(DiffTree::Integer); } else { - Tree.SetSame(IsEqualExpr(Context, ParamWidth, FromExpr, ToExpr) || + Tree.SetSame(IsEqualExpr(Context, FromExpr, ToExpr) || (FromNullPtr && ToNullPtr)); Tree.SetNullPtr(FromNullPtr, ToNullPtr); Tree.SetKind(DiffTree::Expression); @@ -1030,11 +1028,17 @@ class TemplateDiff { if (HasFromInt || HasToInt) { if (!HasFromInt && FromExpr) - HasFromInt = GetInt(Context, FromIter, FromExpr, FromInt); + HasFromInt = GetInt(Context, FromIter, FromExpr, FromInt, + FromDefaultNonTypeDecl->getType()); if (!HasToInt && ToExpr) - HasToInt = GetInt(Context, ToIter, ToExpr, ToInt); + HasToInt = GetInt(Context, ToIter, ToExpr, ToInt, + ToDefaultNonTypeDecl->getType()); Tree.SetNode(FromInt, ToInt, HasFromInt, HasToInt); - Tree.SetSame(IsSameConvertedInt(ParamWidth, FromInt, ToInt)); + if (HasFromInt && HasToInt) { + Tree.SetSame(FromInt == ToInt); + } else { + Tree.SetSame(false); + } Tree.SetDefault(FromIter.isEnd() && HasFromInt, ToIter.isEnd() && HasToInt); Tree.SetKind(DiffTree::Integer); @@ -1210,9 +1214,11 @@ class TemplateDiff { } /// GetInt - Retrieves the template integer argument, including evaluating - /// default arguments. + /// default arguments. If the value comes from an expression, extend the + /// APSInt to size of IntegerType to match the behavior in + /// Sema::CheckTemplateArgument static bool GetInt(ASTContext &Context, const TSTiterator &Iter, - Expr *ArgExpr, llvm::APInt &Int) { + Expr *ArgExpr, llvm::APSInt &Int, QualType IntegerType) { // Default, value-depenedent expressions require fetching // from the desugared TemplateArgument, otherwise expression needs to // be evaluatable. @@ -1224,12 +1230,14 @@ class TemplateDiff { case TemplateArgument::Expression: ArgExpr = Iter.getDesugar().getAsExpr(); Int = ArgExpr->EvaluateKnownConstInt(Context); + Int = Int.extOrTrunc(Context.getTypeSize(IntegerType)); return true; default: llvm_unreachable("Unexpected template argument kind"); } } else if (ArgExpr->isEvaluatable(Context)) { Int = ArgExpr->EvaluateKnownConstInt(Context); + Int = Int.extOrTrunc(Context.getTypeSize(IntegerType)); return true; } @@ -1302,18 +1310,8 @@ class TemplateDiff { return nullptr; } - /// IsSameConvertedInt - Returns true if both integers are equal when - /// converted to an integer type with the given width. - static bool IsSameConvertedInt(unsigned Width, const llvm::APSInt &X, - const llvm::APSInt &Y) { - llvm::APInt ConvertedX = X.extOrTrunc(Width); - llvm::APInt ConvertedY = Y.extOrTrunc(Width); - return ConvertedX == ConvertedY; - } - /// IsEqualExpr - Returns true if the expressions evaluate to the same value. - static bool IsEqualExpr(ASTContext &Context, unsigned ParamWidth, - Expr *FromExpr, Expr *ToExpr) { + static bool IsEqualExpr(ASTContext &Context, Expr *FromExpr, Expr *ToExpr) { if (FromExpr == ToExpr) return true; @@ -1345,7 +1343,7 @@ class TemplateDiff { switch (FromVal.getKind()) { case APValue::Int: - return IsSameConvertedInt(ParamWidth, FromVal.getInt(), ToVal.getInt()); + return FromVal.getInt() == ToVal.getInt(); case APValue::LValue: { APValue::LValueBase FromBase = FromVal.getLValueBase(); APValue::LValueBase ToBase = ToVal.getLValueBase(); @@ -1655,11 +1653,14 @@ class TemplateDiff { } Unbold(); } - + /// HasExtraInfo - Returns true if E is not an integer literal or the /// negation of an integer literal bool HasExtraInfo(Expr *E) { if (!E) return false; + + E = E->IgnoreImpCasts(); + if (isa(E)) return false; if (UnaryOperator *UO = dyn_cast(E)) diff --git a/contrib/llvm/tools/clang/lib/AST/Decl.cpp b/contrib/llvm/tools/clang/lib/AST/Decl.cpp index e43c28af9b69..dc08d23a24b5 100644 --- a/contrib/llvm/tools/clang/lib/AST/Decl.cpp +++ b/contrib/llvm/tools/clang/lib/AST/Decl.cpp @@ -2674,7 +2674,8 @@ bool FunctionDecl::isMSExternInline() const { if (!Context.getLangOpts().MSVCCompat && !hasAttr()) return false; - for (const FunctionDecl *FD = this; FD; FD = FD->getPreviousDecl()) + for (const FunctionDecl *FD = getMostRecentDecl(); FD; + FD = FD->getPreviousDecl()) if (FD->getStorageClass() == SC_Extern) return true; diff --git a/contrib/llvm/tools/clang/lib/Analysis/ThreadSafety.cpp b/contrib/llvm/tools/clang/lib/Analysis/ThreadSafety.cpp index a986c587f869..f45d6e7ef139 100644 --- a/contrib/llvm/tools/clang/lib/Analysis/ThreadSafety.cpp +++ b/contrib/llvm/tools/clang/lib/Analysis/ThreadSafety.cpp @@ -2108,8 +2108,8 @@ void ThreadSafetyAnalyzer::runAnalysis(AnalysisDeclContext &AC) { // Create a dummy expression, VarDecl *VD = const_cast(AD.getVarDecl()); - DeclRefExpr DRE(VD, false, VD->getType(), VK_LValue, - AD.getTriggerStmt()->getLocEnd()); + DeclRefExpr DRE(VD, false, VD->getType().getNonReferenceType(), + VK_LValue, AD.getTriggerStmt()->getLocEnd()); LocksetBuilder.handleCall(&DRE, DD); break; } diff --git a/contrib/llvm/tools/clang/lib/Basic/SourceManager.cpp b/contrib/llvm/tools/clang/lib/Basic/SourceManager.cpp index 305dcd43960c..118e3f32008b 100644 --- a/contrib/llvm/tools/clang/lib/Basic/SourceManager.cpp +++ b/contrib/llvm/tools/clang/lib/Basic/SourceManager.cpp @@ -2076,22 +2076,33 @@ bool SourceManager::isBeforeInTranslationUnit(SourceLocation LHS, return IsBeforeInTUCache.getCachedResult(LOffs.second, ROffs.second); } - // This can happen if a location is in a built-ins buffer. - // But see PR5662. + // If we arrived here, the location is either in a built-ins buffer or + // associated with global inline asm. PR5662 and PR22576 are examples. + // Clear the lookup cache, it depends on a common location. IsBeforeInTUCache.clear(); - bool LIsBuiltins = strcmp("", - getBuffer(LOffs.first)->getBufferIdentifier()) == 0; - bool RIsBuiltins = strcmp("", - getBuffer(ROffs.first)->getBufferIdentifier()) == 0; - // built-in is before non-built-in - if (LIsBuiltins != RIsBuiltins) - return LIsBuiltins; - assert(LIsBuiltins && RIsBuiltins && - "Non-built-in locations must be rooted in the main file"); - // Both are in built-in buffers, but from different files. We just claim that - // lower IDs come first. - return LOffs.first < ROffs.first; + llvm::MemoryBuffer *LBuf = getBuffer(LOffs.first); + llvm::MemoryBuffer *RBuf = getBuffer(ROffs.first); + bool LIsBuiltins = strcmp("", LBuf->getBufferIdentifier()) == 0; + bool RIsBuiltins = strcmp("", RBuf->getBufferIdentifier()) == 0; + // Sort built-in before non-built-in. + if (LIsBuiltins || RIsBuiltins) { + if (LIsBuiltins != RIsBuiltins) + return LIsBuiltins; + // Both are in built-in buffers, but from different files. We just claim that + // lower IDs come first. + return LOffs.first < ROffs.first; + } + bool LIsAsm = strcmp("", LBuf->getBufferIdentifier()) == 0; + bool RIsAsm = strcmp("", RBuf->getBufferIdentifier()) == 0; + // Sort assembler after built-ins, but before the rest. + if (LIsAsm || RIsAsm) { + if (LIsAsm != RIsAsm) + return RIsAsm; + assert(LOffs.first == ROffs.first); + return false; + } + llvm_unreachable("Unsortable locations found"); } void SourceManager::PrintStats() const { diff --git a/contrib/llvm/tools/clang/lib/Basic/TargetInfo.cpp b/contrib/llvm/tools/clang/lib/Basic/TargetInfo.cpp index 6987cd71f3d7..871bbd5ef43f 100644 --- a/contrib/llvm/tools/clang/lib/Basic/TargetInfo.cpp +++ b/contrib/llvm/tools/clang/lib/Basic/TargetInfo.cpp @@ -655,6 +655,7 @@ bool TargetCXXABI::tryParse(llvm::StringRef name) { .Case("ios", iOS) .Case("itanium", GenericItanium) .Case("microsoft", Microsoft) + .Case("mips", GenericMIPS) .Default(unknown); if (kind == unknown) return false; diff --git a/contrib/llvm/tools/clang/lib/Basic/Targets.cpp b/contrib/llvm/tools/clang/lib/Basic/Targets.cpp index bf60bbf3fd9f..a7a00570d127 100644 --- a/contrib/llvm/tools/clang/lib/Basic/Targets.cpp +++ b/contrib/llvm/tools/clang/lib/Basic/Targets.cpp @@ -419,6 +419,7 @@ class NetBSDTargetInfo : public OSTargetInfo { public: NetBSDTargetInfo(const llvm::Triple &Triple) : OSTargetInfo(Triple) { this->UserLabelPrefix = ""; + this->MCountName = "_mcount"; } }; @@ -919,6 +920,10 @@ class PPCTargetInfo : public TargetInfo { if (RegNo == 1) return 4; return -1; } + + bool hasSjLjLowering() const override { + return true; + } }; const Builtin::Info PPCTargetInfo::BuiltinInfo[] = { @@ -2181,6 +2186,10 @@ class X86TargetInfo : public TargetInfo { CallingConv getDefaultCallingConv(CallingConvMethodType MT) const override { return MT == CCMT_Member ? CC_X86ThisCall : CC_C; } + + bool hasSjLjLowering() const override { + return true; + } }; bool X86TargetInfo::setFPMath(StringRef Name) { @@ -3354,7 +3363,10 @@ class WindowsX86_32TargetInfo : public WindowsTargetInfo { : WindowsTargetInfo(Triple) { WCharType = UnsignedShort; DoubleAlign = LongLongAlign = 64; - DescriptionString = "e-m:w-p:32:32-i64:64-f80:32-n8:16:32-S32"; + bool IsWinCOFF = + getTriple().isOSWindows() && getTriple().isOSBinFormatCOFF(); + DescriptionString = IsWinCOFF ? "e-m:w-p:32:32-i64:64-f80:32-n8:16:32-S32" + : "e-m:e-p:32:32-i64:64-f80:32-n8:16:32-S32"; } void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override { @@ -5628,7 +5640,9 @@ class MipsTargetInfoBase : public TargetInfo { const std::string &CPUStr) : TargetInfo(Triple), CPU(CPUStr), IsMips16(false), IsMicromips(false), IsNan2008(false), IsSingleFloat(false), FloatABI(HardFloat), - DspRev(NoDSP), HasMSA(false), HasFP64(false), ABI(ABIStr) {} + DspRev(NoDSP), HasMSA(false), HasFP64(false), ABI(ABIStr) { + TheCXXABI.set(TargetCXXABI::GenericMIPS); + } bool isNaN2008Default() const { return CPU == "mips32r6" || CPU == "mips64r6"; @@ -6662,6 +6676,8 @@ static TargetInfo *AllocateTarget(const llvm::Triple &Triple) { switch (os) { case llvm::Triple::Linux: return new LinuxTargetInfo(Triple); + case llvm::Triple::NetBSD: + return new NetBSDTargetInfo(Triple); default: return new PPC64TargetInfo(Triple); } diff --git a/contrib/llvm/tools/clang/lib/Basic/Version.cpp b/contrib/llvm/tools/clang/lib/Basic/Version.cpp index 982410bec7b9..ae9eb1a3a873 100644 --- a/contrib/llvm/tools/clang/lib/Basic/Version.cpp +++ b/contrib/llvm/tools/clang/lib/Basic/Version.cpp @@ -36,7 +36,7 @@ std::string getClangRepositoryPath() { // If the SVN_REPOSITORY is empty, try to use the SVN keyword. This helps us // pick up a tag in an SVN export, for example. - StringRef SVNRepository("$URL: https://llvm.org/svn/llvm-project/cfe/tags/RELEASE_360/final/lib/Basic/Version.cpp $"); + StringRef SVNRepository("$URL: https://llvm.org/svn/llvm-project/cfe/tags/RELEASE_361/final/lib/Basic/Version.cpp $"); if (URL.empty()) { URL = SVNRepository.slice(SVNRepository.find(':'), SVNRepository.find("/lib/Basic")); diff --git a/contrib/llvm/tools/clang/lib/CodeGen/CodeGenModule.cpp b/contrib/llvm/tools/clang/lib/CodeGen/CodeGenModule.cpp index 9f4567dbbb84..d653130df3d0 100644 --- a/contrib/llvm/tools/clang/lib/CodeGen/CodeGenModule.cpp +++ b/contrib/llvm/tools/clang/lib/CodeGen/CodeGenModule.cpp @@ -64,6 +64,7 @@ static CGCXXABI *createCXXABI(CodeGenModule &CGM) { case TargetCXXABI::GenericARM: case TargetCXXABI::iOS: case TargetCXXABI::iOS64: + case TargetCXXABI::GenericMIPS: case TargetCXXABI::GenericItanium: return CreateItaniumCXXABI(CGM); case TargetCXXABI::Microsoft: diff --git a/contrib/llvm/tools/clang/lib/CodeGen/ItaniumCXXABI.cpp b/contrib/llvm/tools/clang/lib/CodeGen/ItaniumCXXABI.cpp index deebab858399..9e88b1ebbadc 100644 --- a/contrib/llvm/tools/clang/lib/CodeGen/ItaniumCXXABI.cpp +++ b/contrib/llvm/tools/clang/lib/CodeGen/ItaniumCXXABI.cpp @@ -339,6 +339,9 @@ CodeGen::CGCXXABI *CodeGen::CreateItaniumCXXABI(CodeGenModule &CGM) { return new ItaniumCXXABI(CGM, /* UseARMMethodPtrABI = */ true, /* UseARMGuardVarABI = */ true); + case TargetCXXABI::GenericMIPS: + return new ItaniumCXXABI(CGM, /* UseARMMethodPtrABI = */ true); + case TargetCXXABI::GenericItanium: if (CGM.getContext().getTargetInfo().getTriple().getArch() == llvm::Triple::le32) { diff --git a/contrib/llvm/tools/clang/lib/CodeGen/TargetInfo.cpp b/contrib/llvm/tools/clang/lib/CodeGen/TargetInfo.cpp index 39cc7e5d99c4..c05b23a32e86 100644 --- a/contrib/llvm/tools/clang/lib/CodeGen/TargetInfo.cpp +++ b/contrib/llvm/tools/clang/lib/CodeGen/TargetInfo.cpp @@ -664,7 +664,6 @@ class X86_32TargetCodeGenInfo : public TargetCodeGenInfo { ('T' << 24); return llvm::ConstantInt::get(CGM.Int32Ty, Sig); } - }; } @@ -4455,7 +4454,6 @@ class ARMTargetCodeGenInfo : public TargetCodeGenInfo { llvm::AttributeSet::FunctionIndex, B)); } - }; } diff --git a/contrib/llvm/tools/clang/lib/Driver/ToolChains.cpp b/contrib/llvm/tools/clang/lib/Driver/ToolChains.cpp index f789fd55598f..8bd8298031f5 100644 --- a/contrib/llvm/tools/clang/lib/Driver/ToolChains.cpp +++ b/contrib/llvm/tools/clang/lib/Driver/ToolChains.cpp @@ -1724,6 +1724,7 @@ static bool findMIPSMultilibs(const llvm::Triple &TargetTriple, StringRef Path, MultilibSet AndroidMipsMultilibs = MultilibSet() .Maybe(Multilib("/mips-r2").flag("+march=mips32r2")) + .Maybe(Multilib("/mips-r6").flag("+march=mips32r6")) .FilterOut(NonExistent); MultilibSet DebianMipsMultilibs; @@ -1783,6 +1784,7 @@ static bool findMIPSMultilibs(const llvm::Triple &TargetTriple, StringRef Path, addMultilibFlag(isMips16(Args), "mips16", Flags); addMultilibFlag(CPUName == "mips32", "march=mips32", Flags); addMultilibFlag(CPUName == "mips32r2", "march=mips32r2", Flags); + addMultilibFlag(CPUName == "mips32r6", "march=mips32r6", Flags); addMultilibFlag(CPUName == "mips64", "march=mips64", Flags); addMultilibFlag(CPUName == "mips64r2" || CPUName == "octeon", "march=mips64r2", Flags); diff --git a/contrib/llvm/tools/clang/lib/Frontend/InitPreprocessor.cpp b/contrib/llvm/tools/clang/lib/Frontend/InitPreprocessor.cpp index f4241a94ae02..3550ac25159b 100644 --- a/contrib/llvm/tools/clang/lib/Frontend/InitPreprocessor.cpp +++ b/contrib/llvm/tools/clang/lib/Frontend/InitPreprocessor.cpp @@ -662,12 +662,7 @@ static void InitializePredefinedMacros(const TargetInfo &TI, TI.getTypeWidth(TI.getWCharType()), TI, Builder); DefineTypeSizeof("__SIZEOF_WINT_T__", TI.getTypeWidth(TI.getWIntType()), TI, Builder); - // This is a temporary workaround while MIPS64 has not yet fully supported - // 128-bit integers. But declaration of int128 type is necessary even though - // __SIZEOF_INT128__ is undefined because c++ standard header files like - // limits throw error message if __int128 is not available. - if (TI.hasInt128Type() && !(TI.getTriple().getArch() == llvm::Triple::mips64el - || TI.getTriple().getArch() == llvm::Triple::mips64)) + if (TI.hasInt128Type()) DefineTypeSizeof("__SIZEOF_INT128__", 128, TI, Builder); DefineType("__INTMAX_TYPE__", TI.getIntMaxType(), Builder); diff --git a/contrib/llvm/tools/clang/lib/Sema/DeclSpec.cpp b/contrib/llvm/tools/clang/lib/Sema/DeclSpec.cpp index 7bf3e51999b6..349bb3258025 100644 --- a/contrib/llvm/tools/clang/lib/Sema/DeclSpec.cpp +++ b/contrib/llvm/tools/clang/lib/Sema/DeclSpec.cpp @@ -345,8 +345,9 @@ bool Declarator::isDeclarationOfFunction() const { bool Declarator::isStaticMember() { assert(getContext() == MemberContext); return getDeclSpec().getStorageClassSpec() == DeclSpec::SCS_static || - CXXMethodDecl::isStaticOverloadedOperator( - getName().OperatorFunctionId.Operator); + (getName().Kind == UnqualifiedId::IK_OperatorFunctionId && + CXXMethodDecl::isStaticOverloadedOperator( + getName().OperatorFunctionId.Operator)); } bool DeclSpec::hasTagDefinition() const { diff --git a/contrib/llvm/tools/clang/lib/Sema/SemaChecking.cpp b/contrib/llvm/tools/clang/lib/Sema/SemaChecking.cpp index 9f6c548ff0be..6ab957e03074 100644 --- a/contrib/llvm/tools/clang/lib/Sema/SemaChecking.cpp +++ b/contrib/llvm/tools/clang/lib/Sema/SemaChecking.cpp @@ -297,6 +297,10 @@ Sema::CheckBuiltinFunctionCall(FunctionDecl *FDecl, unsigned BuiltinID, if (SemaBuiltinLongjmp(TheCall)) return ExprError(); break; + case Builtin::BI__builtin_setjmp: + if (SemaBuiltinSetjmp(TheCall)) + return ExprError(); + break; case Builtin::BI__builtin_classify_type: if (checkArgCount(*this, TheCall, 1)) return true; @@ -2367,8 +2371,13 @@ bool Sema::SemaBuiltinConstantArgRange(CallExpr *TheCall, int ArgNum, } /// SemaBuiltinLongjmp - Handle __builtin_longjmp(void *env[5], int val). -/// This checks that val is a constant 1. +/// This checks that the target supports __builtin_longjmp and +/// that val is a constant 1. bool Sema::SemaBuiltinLongjmp(CallExpr *TheCall) { + if (!Context.getTargetInfo().hasSjLjLowering()) + return Diag(TheCall->getLocStart(), diag::err_builtin_longjmp_unsupported) + << SourceRange(TheCall->getLocStart(), TheCall->getLocEnd()); + Expr *Arg = TheCall->getArg(1); llvm::APSInt Result; @@ -2383,6 +2392,16 @@ bool Sema::SemaBuiltinLongjmp(CallExpr *TheCall) { return false; } + +/// SemaBuiltinSetjmp - Handle __builtin_setjmp(void *env[5]). +/// This checks that the target supports __builtin_setjmp. +bool Sema::SemaBuiltinSetjmp(CallExpr *TheCall) { + if (!Context.getTargetInfo().hasSjLjLowering()) + return Diag(TheCall->getLocStart(), diag::err_builtin_setjmp_unsupported) + << SourceRange(TheCall->getLocStart(), TheCall->getLocEnd()); + return false; +} + namespace { enum StringLiteralCheckType { SLCT_NotALiteral, diff --git a/contrib/llvm/tools/clang/lib/Sema/SemaExpr.cpp b/contrib/llvm/tools/clang/lib/Sema/SemaExpr.cpp index 091fd27db85d..8be11572b2e0 100644 --- a/contrib/llvm/tools/clang/lib/Sema/SemaExpr.cpp +++ b/contrib/llvm/tools/clang/lib/Sema/SemaExpr.cpp @@ -117,7 +117,7 @@ static AvailabilityResult DiagnoseAvailabilityOfDecl(Sema &S, case AR_Available: case AR_NotYetIntroduced: break; - + case AR_Deprecated: if (S.getCurContextAvailability() != AR_Deprecated) S.EmitAvailabilityWarning(Sema::AD_Deprecation, @@ -11630,8 +11630,11 @@ void Sema::MarkFunctionReferenced(SourceLocation Loc, FunctionDecl *Func, } else if (CXXDestructorDecl *Destructor = dyn_cast(Func)) { Destructor = cast(Destructor->getFirstDecl()); - if (Destructor->isDefaulted() && !Destructor->isDeleted()) + if (Destructor->isDefaulted() && !Destructor->isDeleted()) { + if (Destructor->isTrivial() && !Destructor->hasAttr()) + return; DefineImplicitDestructor(Loc, Destructor); + } if (Destructor->isVirtual()) MarkVTableUsed(Loc, Destructor->getParent()); } else if (CXXMethodDecl *MethodDecl = dyn_cast(Func)) { diff --git a/contrib/llvm/tools/clang/lib/Sema/SemaExprCXX.cpp b/contrib/llvm/tools/clang/lib/Sema/SemaExprCXX.cpp index 3e2a2de5b406..a92b7ac472e7 100644 --- a/contrib/llvm/tools/clang/lib/Sema/SemaExprCXX.cpp +++ b/contrib/llvm/tools/clang/lib/Sema/SemaExprCXX.cpp @@ -5705,6 +5705,16 @@ ExprResult Sema::BuildCXXMemberCallExpr(Expr *E, NamedDecl *FoundDecl, ExprResult Sema::BuildCXXNoexceptExpr(SourceLocation KeyLoc, Expr *Operand, SourceLocation RParen) { + // If the operand is an unresolved lookup expression, the expression is ill- + // formed per [over.over]p1, because overloaded function names cannot be used + // without arguments except in explicit contexts. + ExprResult R = CheckPlaceholderExpr(Operand); + if (R.isInvalid()) + return R; + + // The operand may have been modified when checking the placeholder type. + Operand = R.get(); + if (ActiveTemplateInstantiations.empty() && Operand->HasSideEffects(Context, false)) { // The expression operand for noexcept is in an unevaluated expression diff --git a/contrib/llvm/tools/clang/lib/Sema/SemaTemplate.cpp b/contrib/llvm/tools/clang/lib/Sema/SemaTemplate.cpp index 67c36a5fb5e9..1e7176222b57 100644 --- a/contrib/llvm/tools/clang/lib/Sema/SemaTemplate.cpp +++ b/contrib/llvm/tools/clang/lib/Sema/SemaTemplate.cpp @@ -3355,7 +3355,7 @@ Sema::SubstDefaultTemplateArgumentIfAvailable(TemplateDecl *Template, /// \param Param The template parameter against which the argument will be /// checked. /// -/// \param Arg The template argument. +/// \param Arg The template argument, which may be updated due to conversions. /// /// \param Template The template in which the template argument resides. /// @@ -3433,6 +3433,13 @@ bool Sema::CheckTemplateArgument(NamedDecl *Param, if (Res.isInvalid()) return true; + // If the resulting expression is new, then use it in place of the + // old expression in the template argument. + if (Res.get() != Arg.getArgument().getAsExpr()) { + TemplateArgument TA(Res.get()); + Arg = TemplateArgumentLoc(TA, Res.get()); + } + Converted.push_back(Result); break; } @@ -3640,9 +3647,14 @@ bool Sema::CheckTemplateArgumentList(TemplateDecl *Template, TemplateArgumentListInfo &TemplateArgs, bool PartialTemplateArgs, SmallVectorImpl &Converted) { + // Make a copy of the template arguments for processing. Only make the + // changes at the end when successful in matching the arguments to the + // template. + TemplateArgumentListInfo NewArgs = TemplateArgs; + TemplateParameterList *Params = Template->getTemplateParameters(); - SourceLocation RAngleLoc = TemplateArgs.getRAngleLoc(); + SourceLocation RAngleLoc = NewArgs.getRAngleLoc(); // C++ [temp.arg]p1: // [...] The type and form of each template-argument specified in @@ -3651,7 +3663,7 @@ bool Sema::CheckTemplateArgumentList(TemplateDecl *Template, // template-parameter-list. bool isTemplateTemplateParameter = isa(Template); SmallVector ArgumentPack; - unsigned ArgIdx = 0, NumArgs = TemplateArgs.size(); + unsigned ArgIdx = 0, NumArgs = NewArgs.size(); LocalInstantiationScope InstScope(*this, true); for (TemplateParameterList::iterator Param = Params->begin(), ParamEnd = Params->end(); @@ -3687,21 +3699,21 @@ bool Sema::CheckTemplateArgumentList(TemplateDecl *Template, if (ArgIdx < NumArgs) { // Check the template argument we were given. - if (CheckTemplateArgument(*Param, TemplateArgs[ArgIdx], Template, + if (CheckTemplateArgument(*Param, NewArgs[ArgIdx], Template, TemplateLoc, RAngleLoc, ArgumentPack.size(), Converted)) return true; bool PackExpansionIntoNonPack = - TemplateArgs[ArgIdx].getArgument().isPackExpansion() && + NewArgs[ArgIdx].getArgument().isPackExpansion() && (!(*Param)->isTemplateParameterPack() || getExpandedPackSize(*Param)); if (PackExpansionIntoNonPack && isa(Template)) { // Core issue 1430: we have a pack expansion as an argument to an // alias template, and it's not part of a parameter pack. This // can't be canonicalized, so reject it now. - Diag(TemplateArgs[ArgIdx].getLocation(), + Diag(NewArgs[ArgIdx].getLocation(), diag::err_alias_template_expansion_into_fixed_list) - << TemplateArgs[ArgIdx].getSourceRange(); + << NewArgs[ArgIdx].getSourceRange(); Diag((*Param)->getLocation(), diag::note_template_param_here); return true; } @@ -3733,7 +3745,7 @@ bool Sema::CheckTemplateArgumentList(TemplateDecl *Template, } while (ArgIdx < NumArgs) { - Converted.push_back(TemplateArgs[ArgIdx].getArgument()); + Converted.push_back(NewArgs[ArgIdx].getArgument()); ++ArgIdx; } @@ -3784,8 +3796,7 @@ bool Sema::CheckTemplateArgumentList(TemplateDecl *Template, // the default argument. if (TemplateTypeParmDecl *TTP = dyn_cast(*Param)) { if (!TTP->hasDefaultArgument()) - return diagnoseArityMismatch(*this, Template, TemplateLoc, - TemplateArgs); + return diagnoseArityMismatch(*this, Template, TemplateLoc, NewArgs); TypeSourceInfo *ArgType = SubstDefaultTemplateArgument(*this, Template, @@ -3801,8 +3812,7 @@ bool Sema::CheckTemplateArgumentList(TemplateDecl *Template, } else if (NonTypeTemplateParmDecl *NTTP = dyn_cast(*Param)) { if (!NTTP->hasDefaultArgument()) - return diagnoseArityMismatch(*this, Template, TemplateLoc, - TemplateArgs); + return diagnoseArityMismatch(*this, Template, TemplateLoc, NewArgs); ExprResult E = SubstDefaultTemplateArgument(*this, Template, TemplateLoc, @@ -3819,8 +3829,7 @@ bool Sema::CheckTemplateArgumentList(TemplateDecl *Template, = cast(*Param); if (!TempParm->hasDefaultArgument()) - return diagnoseArityMismatch(*this, Template, TemplateLoc, - TemplateArgs); + return diagnoseArityMismatch(*this, Template, TemplateLoc, NewArgs); NestedNameSpecifierLoc QualifierLoc; TemplateName Name = SubstDefaultTemplateArgument(*this, Template, @@ -3848,12 +3857,12 @@ bool Sema::CheckTemplateArgumentList(TemplateDecl *Template, RAngleLoc, 0, Converted)) return true; - // Core issue 150 (assumed resolution): if this is a template template - // parameter, keep track of the default template arguments from the + // Core issue 150 (assumed resolution): if this is a template template + // parameter, keep track of the default template arguments from the // template definition. if (isTemplateTemplateParameter) - TemplateArgs.addArgument(Arg); - + NewArgs.addArgument(Arg); + // Move to the next template parameter and argument. ++Param; ++ArgIdx; @@ -3865,15 +3874,18 @@ bool Sema::CheckTemplateArgumentList(TemplateDecl *Template, // still dependent). if (ArgIdx < NumArgs && CurrentInstantiationScope && CurrentInstantiationScope->getPartiallySubstitutedPack()) { - while (ArgIdx < NumArgs && - TemplateArgs[ArgIdx].getArgument().isPackExpansion()) - Converted.push_back(TemplateArgs[ArgIdx++].getArgument()); + while (ArgIdx < NumArgs && NewArgs[ArgIdx].getArgument().isPackExpansion()) + Converted.push_back(NewArgs[ArgIdx++].getArgument()); } // If we have any leftover arguments, then there were too many arguments. // Complain and fail. if (ArgIdx < NumArgs) - return diagnoseArityMismatch(*this, Template, TemplateLoc, TemplateArgs); + return diagnoseArityMismatch(*this, Template, TemplateLoc, NewArgs); + + // No problems found with the new argument list, propagate changes back + // to caller. + TemplateArgs = NewArgs; return false; } diff --git a/contrib/netbsd-tests/lib/libc/string/t_memmem.c b/contrib/netbsd-tests/lib/libc/string/t_memmem.c index 8734bc3a955d..58076627144e 100644 --- a/contrib/netbsd-tests/lib/libc/string/t_memmem.c +++ b/contrib/netbsd-tests/lib/libc/string/t_memmem.c @@ -75,7 +75,7 @@ ATF_TC_HEAD(memmem_basic, tc) ATF_TC_BODY(memmem_basic, tc) { -#if defined(__darwin__) || defined(__FreeBSD__) +#if defined(__darwin__) expect(memmem(b2, lb2, p0, lp0) == NULL); expect(memmem(b0, lb0, p0, lp0) == NULL); #else diff --git a/contrib/tzdata/africa b/contrib/tzdata/africa index 1b9bf50da22c..ea0171a0985e 100644 --- a/contrib/tzdata/africa +++ b/contrib/tzdata/africa @@ -319,35 +319,29 @@ Rule Egypt 2007 only - Sep Thu>=1 24:00 0 - # above) says DST had no affect on electricity consumption. There is # no information about when DST will end this fall. See: # http://abcnews.go.com/International/wireStory/el-sissi-pushes-egyptians-line-23614833 + +# From Steffen Thorsen (2015-04-08): +# Egypt will start DST on midnight after Thursday, April 30, 2015. +# This is based on a law (no 35) from May 15, 2014 saying it starts the last +# Thursday of April.... Clocks will still be turned back for Ramadan, but +# dates not yet announced.... +# http://almogaz.com/news/weird-news/2015/04/05/1947105 ... +# http://www.timeanddate.com/news/time/egypt-starts-dst-2015.html + +# From Ahmed Nazmy (2015-04-20): +# Egypt's ministers cabinet just announced ... that it will cancel DST at +# least for 2015. # -# For now, guess that later spring and fall transitions will use -# 2010's rules, and guess that Egypt will switch to standard time at -# 24:00 the last Thursday before Ramadan, and back to DST at 00:00 the -# first Friday after Ramadan. To implement this, -# transition dates for 2015 through 2037 were determined by running -# the following program under GNU Emacs 24.3, with the results integrated -# by hand into the table below. Ramadan again intrudes on the guessed -# DST starting in 2038, but that's beyond our somewhat-arbitrary cutoff. -# (let ((islamic-year 1436)) -# (while (< islamic-year 1460) -# (let ((a (calendar-islamic-to-absolute (list 9 1 islamic-year))) -# (b (calendar-islamic-to-absolute (list 10 1 islamic-year))) -# (friday 5)) -# (while (/= friday (mod a 7)) -# (setq a (1- a))) -# (while (/= friday (mod b 7)) -# (setq b (1+ b))) -# (setq a (1- a)) -# (setq b (1- b)) -# (setq a (calendar-gregorian-from-absolute a)) -# (setq b (calendar-gregorian-from-absolute b)) -# (insert -# (format -# (concat "Rule\tEgypt\t%d\tonly\t-\t%s\t%2d\t24:00\t0\t-\n" -# "Rule\tEgypt\t%d\tonly\t-\t%s\t%2d\t24:00\t1:00\tS\n") -# (car (cdr (cdr a))) (calendar-month-name (car a) t) (car (cdr a)) -# (car (cdr (cdr b))) (calendar-month-name (car b) t) (car (cdr b))))) -# (setq islamic-year (+ 1 islamic-year)))) +# From Tim Parenti (2015-04-20): +# http://english.ahram.org.eg/WriterArticles/NewsContentP/1/128195/Egypt/No-daylight-saving-this-summer-Egypts-prime-minist.aspx +# "Egypt's cabinet agreed on Monday not to switch clocks for daylight saving +# time this summer, and carry out studies on the possibility of canceling the +# practice altogether in future years." +# +# From Paul Eggert (2015-04-20): +# For now, assume DST will be canceled. Any resumption would likely +# use different rules anyway. + Rule Egypt 2008 only - Aug lastThu 24:00 0 - Rule Egypt 2009 only - Aug 20 24:00 0 - Rule Egypt 2010 only - Aug 10 24:00 0 - @@ -356,22 +350,7 @@ Rule Egypt 2010 only - Sep lastThu 24:00 0 - Rule Egypt 2014 only - May 15 24:00 1:00 S Rule Egypt 2014 only - Jun 26 24:00 0 - Rule Egypt 2014 only - Jul 31 24:00 1:00 S -Rule Egypt 2014 max - Sep lastThu 24:00 0 - -Rule Egypt 2015 2019 - Apr lastFri 0:00s 1:00 S -Rule Egypt 2015 only - Jun 11 24:00 0 - -Rule Egypt 2015 only - Jul 23 24:00 1:00 S -Rule Egypt 2016 only - Jun 2 24:00 0 - -Rule Egypt 2016 only - Jul 7 24:00 1:00 S -Rule Egypt 2017 only - May 25 24:00 0 - -Rule Egypt 2017 only - Jun 29 24:00 1:00 S -Rule Egypt 2018 only - May 10 24:00 0 - -Rule Egypt 2018 only - Jun 14 24:00 1:00 S -Rule Egypt 2019 only - May 2 24:00 0 - -Rule Egypt 2019 only - Jun 6 24:00 1:00 S -Rule Egypt 2020 only - May 28 24:00 1:00 S -Rule Egypt 2021 only - May 13 24:00 1:00 S -Rule Egypt 2022 only - May 5 24:00 1:00 S -Rule Egypt 2023 max - Apr lastFri 0:00s 1:00 S +Rule Egypt 2014 only - Sep lastThu 24:00 0 - # Zone NAME GMTOFF RULES FORMAT [UNTIL] Zone Africa/Cairo 2:05:09 - LMT 1900 Oct diff --git a/contrib/tzdata/antarctica b/contrib/tzdata/antarctica index ebae9940717c..2af088f0b987 100644 --- a/contrib/tzdata/antarctica +++ b/contrib/tzdata/antarctica @@ -15,41 +15,6 @@ # I made up all time zone abbreviations mentioned here; corrections welcome! # FORMAT is 'zzz' and GMTOFF is 0 for locations while uninhabited. -# These rules are stolen from the 'southamerica' file. -# Rule NAME FROM TO TYPE IN ON AT SAVE LETTER/S -Rule ArgAQ 1964 1966 - Mar 1 0:00 0 - -Rule ArgAQ 1964 1966 - Oct 15 0:00 1:00 S -Rule ArgAQ 1967 only - Apr 2 0:00 0 - -Rule ArgAQ 1967 1968 - Oct Sun>=1 0:00 1:00 S -Rule ArgAQ 1968 1969 - Apr Sun>=1 0:00 0 - -Rule ArgAQ 1974 only - Jan 23 0:00 1:00 S -Rule ArgAQ 1974 only - May 1 0:00 0 - -Rule ChileAQ 1972 1986 - Mar Sun>=9 3:00u 0 - -Rule ChileAQ 1974 1987 - Oct Sun>=9 4:00u 1:00 S -Rule ChileAQ 1987 only - Apr 12 3:00u 0 - -Rule ChileAQ 1988 1989 - Mar Sun>=9 3:00u 0 - -Rule ChileAQ 1988 only - Oct Sun>=1 4:00u 1:00 S -Rule ChileAQ 1989 only - Oct Sun>=9 4:00u 1:00 S -Rule ChileAQ 1990 only - Mar 18 3:00u 0 - -Rule ChileAQ 1990 only - Sep 16 4:00u 1:00 S -Rule ChileAQ 1991 1996 - Mar Sun>=9 3:00u 0 - -Rule ChileAQ 1991 1997 - Oct Sun>=9 4:00u 1:00 S -Rule ChileAQ 1997 only - Mar 30 3:00u 0 - -Rule ChileAQ 1998 only - Mar Sun>=9 3:00u 0 - -Rule ChileAQ 1998 only - Sep 27 4:00u 1:00 S -Rule ChileAQ 1999 only - Apr 4 3:00u 0 - -Rule ChileAQ 1999 2010 - Oct Sun>=9 4:00u 1:00 S -Rule ChileAQ 2000 2007 - Mar Sun>=9 3:00u 0 - -# N.B.: the end of March 29 in Chile is March 30 in Universal time, -# which is used below in specifying the transition. -Rule ChileAQ 2008 only - Mar 30 3:00u 0 - -Rule ChileAQ 2009 only - Mar Sun>=9 3:00u 0 - -Rule ChileAQ 2010 only - Apr Sun>=1 3:00u 0 - -Rule ChileAQ 2011 only - May Sun>=2 3:00u 0 - -Rule ChileAQ 2011 only - Aug Sun>=16 4:00u 1:00 S -Rule ChileAQ 2012 2015 - Apr Sun>=23 3:00u 0 - -Rule ChileAQ 2012 2014 - Sep Sun>=2 4:00u 1:00 S - # Argentina - year-round bases # Belgrano II, Confin Coast, -770227-0343737, since 1972-02-05 # Carlini, Potter Cove, King George Island, -6414-0602320, since 1982-01 @@ -344,21 +309,7 @@ Zone Antarctica/Rothera 0 - zzz 1976 Dec 1 # USA - year-round bases # # Palmer, Anvers Island, since 1965 (moved 2 miles in 1968) -# -# From Ethan Dicks (1996-10-06): -# It keeps the same time as Punta Arenas, Chile, because, just like us -# and the South Pole, that's the other end of their supply line.... -# I verified with someone who was there that since 1980, -# Palmer has followed Chile. Prior to that, before the Falklands War, -# Palmer used to be supplied from Argentina. -# -# Zone NAME GMTOFF RULES FORMAT [UNTIL] -Zone Antarctica/Palmer 0 - zzz 1965 - -4:00 ArgAQ AR%sT 1969 Oct 5 - -3:00 ArgAQ AR%sT 1982 May - -4:00 ChileAQ CL%sT 2015 Apr 26 3:00u - -3:00 - CLT -# +# See 'southamerica' for Antarctica/Palmer, since it uses South American DST. # # McMurdo Station, Ross Island, since 1955-12 # Amundsen-Scott South Pole Station, continuously occupied since 1956-11-20 diff --git a/contrib/tzdata/backward b/contrib/tzdata/backward index 3ceda884bdcf..8b0fef5825a9 100644 --- a/contrib/tzdata/backward +++ b/contrib/tzdata/backward @@ -20,6 +20,7 @@ Link America/Argentina/Jujuy America/Jujuy Link America/Indiana/Knox America/Knox_IN Link America/Kentucky/Louisville America/Louisville Link America/Argentina/Mendoza America/Mendoza +Link America/Toronto America/Montreal Link America/Rio_Branco America/Porto_Acre Link America/Argentina/Cordoba America/Rosario Link America/Denver America/Shiprock diff --git a/contrib/tzdata/europe b/contrib/tzdata/europe index 41097234fda2..c64c41bec952 100644 --- a/contrib/tzdata/europe +++ b/contrib/tzdata/europe @@ -76,7 +76,7 @@ # 1:00:14 SET Swedish (1879-1899)* # 2:00 EET EEST Eastern Europe # 3:00 FET Further-eastern Europe (2011-2014)* -# 3:00 MSK MSD MSM* Moscow +# 3:00 MSK MSD MSM* Minsk, Moscow # From Peter Ilieve (1994-12-04), # The original six [EU members]: Belgium, France, (West) Germany, Italy, diff --git a/contrib/tzdata/northamerica b/contrib/tzdata/northamerica index 77463dab447c..c3af9eb395ed 100644 --- a/contrib/tzdata/northamerica +++ b/contrib/tzdata/northamerica @@ -227,9 +227,14 @@ Zone PST8PDT -8:00 US P%sT # The law doesn't give abbreviations. # # From Paul Eggert (2000-01-08), following a heads-up from Rives McDow: -# Public law 106-564 (2000-12-23) introduced the abbreviation -# "Chamorro Standard Time" for time in Guam and the Northern Marianas. -# See the file "australasia". +# Public law 106-564 (2000-12-23) introduced ... "Chamorro Standard Time" +# for time in Guam and the Northern Marianas. See the file "australasia". +# +# From Paul Eggert (2015-04-17): +# HST and HDT are standardized abbreviations for Hawaii-Aleutian +# standard and daylight times. See section 9.47 (p 234) of the +# U.S. Government Printing Office Style Manual (2008) +# http://www.gpo.gov/fdsys/pkg/GPO-STYLEMANUAL-2008/pdf/GPO-STYLEMANUAL-2008.pdf # From Arthur David Olson, 2005-08-09 # The following was signed into law on 2005-08-08. @@ -536,7 +541,7 @@ Zone America/Adak 12:13:21 - LMT 1867 Oct 18 -11:00 - BST 1969 -11:00 US B%sT 1983 Oct 30 2:00 -10:00 US AH%sT 1983 Nov 30 - -10:00 US HA%sT + -10:00 US H%sT # The following switches don't quite make our 1970 cutoff. # # Shanks writes that part of southwest Alaska (e.g. Aniak) @@ -1331,14 +1336,9 @@ Zone America/Moncton -4:19:08 - LMT 1883 Dec 9 # Quebec -# From Paul Eggert (2013-08-30): -# Since 1970 most of Quebec has been like Toronto. -# However, because earlier versions of the tz database mistakenly relied on data -# from Shanks & Pottenger saying that Quebec differed from Ontario after 1970, -# a separate entry was created for most of Quebec. We're loath to lose -# its pre-1970 info, even though the tz database is normally limited to -# zones that differ after 1970, so keep this otherwise out-of-scope entry. - +# From Paul Eggert (2015-03-24): +# See America/Toronto for most of Quebec, including Montreal. +# # Matthews and Vincent (1998) also write that Quebec east of the -63 # meridian is supposed to observe AST, but residents as far east as # Natashquan use EST/EDT, and residents east of Natashquan use AST. @@ -1352,39 +1352,10 @@ Zone America/Moncton -4:19:08 - LMT 1883 Dec 9 # For lack of better info, guess this practice began around 1970, contra to # Shanks & Pottenger who have this region observing AST/ADT. -# Rule NAME FROM TO TYPE IN ON AT SAVE LETTER/S -Rule Mont 1917 only - Mar 25 2:00 1:00 D -Rule Mont 1917 only - Apr 24 0:00 0 S -Rule Mont 1919 only - Mar 31 2:30 1:00 D -Rule Mont 1919 only - Oct 25 2:30 0 S -Rule Mont 1920 only - May 2 2:30 1:00 D -Rule Mont 1920 1922 - Oct Sun>=1 2:30 0 S -Rule Mont 1921 only - May 1 2:00 1:00 D -Rule Mont 1922 only - Apr 30 2:00 1:00 D -Rule Mont 1924 only - May 17 2:00 1:00 D -Rule Mont 1924 1926 - Sep lastSun 2:30 0 S -Rule Mont 1925 1926 - May Sun>=1 2:00 1:00 D -Rule Mont 1927 1937 - Apr lastSat 24:00 1:00 D -Rule Mont 1927 1937 - Sep lastSat 24:00 0 S -Rule Mont 1938 1940 - Apr lastSun 0:00 1:00 D -Rule Mont 1938 1939 - Sep lastSun 0:00 0 S -Rule Mont 1946 1973 - Apr lastSun 2:00 1:00 D -Rule Mont 1945 1948 - Sep lastSun 2:00 0 S -Rule Mont 1949 1950 - Oct lastSun 2:00 0 S -Rule Mont 1951 1956 - Sep lastSun 2:00 0 S -Rule Mont 1957 1973 - Oct lastSun 2:00 0 S - # Zone NAME GMTOFF RULES FORMAT [UNTIL] Zone America/Blanc-Sablon -3:48:28 - LMT 1884 -4:00 Canada A%sT 1970 -4:00 - AST -Zone America/Montreal -4:54:16 - LMT 1884 - -5:00 Mont E%sT 1918 - -5:00 Canada E%sT 1919 - -5:00 Mont E%sT 1942 Feb 9 2:00s - -5:00 Canada E%sT 1946 - -5:00 Mont E%sT 1974 - -5:00 Canada E%sT # Ontario @@ -1875,17 +1846,115 @@ Zone America/Creston -7:46:04 - LMT 1884 # Dawson switched to PST in 1973. Inuvik switched to MST in 1979. # Mathew Englander (1996-10-07) gives the following refs: # * 1967. Paragraph 28(34)(g) of the Interpretation Act, S.C. 1967-68, -# c. 7 defines Yukon standard time as UTC-9. This is still valid; +# c. 7 defines Yukon standard time as UTC-9.... # see Interpretation Act, R.S.C. 1985, c. I-21, s. 35(1). +# [http://canlii.ca/t/7vhg] # * C.O. 1973/214 switched Yukon to PST on 1973-10-28 00:00. # * O.I.C. 1980/02 established DST. # * O.I.C. 1987/056 changed DST to Apr firstSun 2:00 to Oct lastSun 2:00. -# Shanks & Pottenger say Yukon's 1973-10-28 switch was at 2:00; go -# with Englander. -# From Chris Walton (2006-06-26): -# Here is a link to the old daylight saving portion of the interpretation -# act which was last updated in 1987: -# http://www.gov.yk.ca/legislation/regs/oic1987_056.pdf + +# From Brian Inglis (2015-04-14): +# +# I tried to trace the history of Yukon time and found the following +# regulations, giving the reference title and URL if found, regulation name, +# and relevant quote if available. Each regulation specifically revokes its +# predecessor. The final reference is to the current Interpretation Act +# authorizing and resulting from these regulatory changes. +# +# Only recent regulations were retrievable via Yukon government site search or +# index, and only some via Canadian legal sources. Other sources used include +# articles titled "Standard Time and Time Zones in Canada" from JRASC via ADS +# Abstracts, cited by ADO for 1932 ..., and updated versions from 1958 and +# 1970 quoted below; each article includes current extracts from provincial +# and territorial ST and DST regulations at the end, summaries and details of +# standard times and daylight saving time at many locations across Canada, +# with time zone maps, tables and calculations for Canadian Sunrise, Sunset, +# and LMST; they also cover many countries and global locations, with a chart +# and table showing current Universal Time offsets, and may be useful as +# another source of information for 1970 and earlier. +# +# * Standard Time and Time Zones in Canada; Smith, C.C.; JRASC, Vol. 26, +# pp.49-77; February 1932; SAO/NASA Astrophysics Data System (ADS) +# http://adsabs.harvard.edu/abs/1932JRASC..26...49S from p.75: +# Yukon Interpretation Ordinance +# Yukon standard time is the local mean time at the one hundred and +# thirty-fifth meridian. +# +# * Standard Time and Time Zones in Canada; Smith, C.C.; Thomson, Malcolm M.; +# JRASC, Vol. 52, pp.193-223; October 1958; SAO/NASA Astrophysics Data System +# (ADS) http://adsabs.harvard.edu/abs/1958JRASC..52..193S from pp.220-1: +# Yukon Interpretation Ordinance, 1955, Chap. 16. +# +# (1) Subject to this section, standard time shall be reckoned as nine +# hours behind Greenwich Time and called Yukon Standard Time. +# +# (2) Notwithstanding subsection (1), the Commissioner may make regulations +# varying the manner of reckoning standard time. +# +# * Yukon Territory Commissioner's Order 1966-20 Interpretation Ordinance +# http://? - no online source found +# +# * Standard Time and Time Zones in Canada; Thomson, Malcolm M.; JRASC, +# Vol. 64, pp.129-162; June 1970; SAO/NASA Astrophysics Data System (ADS) +# http://adsabs.harvard.edu/abs/1970JRASC..64..129T from p.156: Yukon +# Territory Commissioner's Order 1967-59 Interpretation Ordinance ... +# +# 1. Commissioner's Order 1966-20 dated at Whitehorse in the Yukon +# Territory on 27th January, 1966, is hereby revoked. +# +# 2. Yukon (East) Standard Time as defined by section 36 of the +# Interpretation Ordinance from and after mid-night on the 28th day of May, +# 1967 shall be reckoned in the same manner as Pacific Standard Time, that +# is to say, eight hours behind Greenwich Time in the area of the Yukon +# Territory lying east of the 138th degree longitude west. +# +# 3. In the remainder of the Territory, lying west of the 138th degree +# longitude west, Yukon (West) Standard Time shall be reckoned as nine +# hours behind Greenwich Time. +# +# * Yukon Standard Time defined as Pacific Standard Time, YCO 1973/214 +# http://www.canlii.org/en/yk/laws/regu/yco-1973-214/latest/yco-1973-214.html +# C.O. 1973/214 INTERPRETATION ACT ... +# +# 1. Effective October 28, 1973 Commissioner's Order 1967/59 is hereby +# revoked. +# +# 2. Yukon Standard Time as defined by section 36 of the Interpretation +# Act from and after midnight on the twenty-eighth day of October, 1973 +# shall be reckoned in the same manner as Pacific Standard Time, that is +# to say eight hours behind Greenwich Time. +# +# * O.I.C. 1980/02 INTERPRETATION ACT +# http://? - no online source found +# +# * Yukon Daylight Saving Time, YOIC 1987/56 +# http://www.canlii.org/en/yk/laws/regu/yoic-1987-56/latest/yoic-1987-56.html +# O.I.C. 1987/056 INTERPRETATION ACT ... +# +# In every year between +# (a) two o'clock in the morning in the first Sunday in April, and +# (b) two o'clock in the morning in the last Sunday in October, +# Standard Time shall be reckoned as seven hours behind Greenwich Time and +# called Yukon Daylight Saving Time. +# ... +# Dated ... 9th day of March, A.D., 1987. +# +# * Yukon Daylight Saving Time 2006, YOIC 2006/127 +# http://www.canlii.org/en/yk/laws/regu/yoic-2006-127/latest/yoic-2006-127.html +# O.I.C. 2006/127 INTERPRETATION ACT ... +# +# 1. In Yukon each year the time for general purposes shall be 7 hours +# behind Greenwich mean time during the period commencing at two o'clock +# in the forenoon on the second Sunday of March and ending at two o'clock +# in the forenoon on the first Sunday of November and shall be called +# Yukon Daylight Saving Time. +# +# 2. Order-in-Council 1987/56 is revoked. +# +# 3. This order comes into force January 1, 2007. +# +# * Interpretation Act, RSY 2002, c 125 +# http://www.canlii.org/en/yk/laws/stat/rsy-2002-c-125/latest/rsy-2002-c-125.html # From Rives McDow (1999-09-04): # Nunavut ... moved ... to incorporate the whole territory into one time zone. @@ -2111,7 +2180,7 @@ Zone America/Inuvik 0 - zzz 1953 # Inuvik founded -7:00 NT_YK M%sT 1980 -7:00 Canada M%sT Zone America/Whitehorse -9:00:12 - LMT 1900 Aug 20 - -9:00 NT_YK Y%sT 1966 Jul 1 2:00 + -9:00 NT_YK Y%sT 1967 May 28 0:00 -8:00 NT_YK P%sT 1980 -8:00 Canada P%sT Zone America/Dawson -9:17:40 - LMT 1900 Aug 20 diff --git a/contrib/tzdata/southamerica b/contrib/tzdata/southamerica index 77e3584b2754..be63a88d5f3d 100644 --- a/contrib/tzdata/southamerica +++ b/contrib/tzdata/southamerica @@ -1098,6 +1098,60 @@ Zone America/Rio_Branco -4:31:12 - LMT 1914 # Chile +# From Paul Eggert (2015-04-03): +# Shanks & Pottenger says America/Santiago introduced standard time in +# 1890 and rounds its UTC offset to 70W40; guess that in practice this +# was the same offset as in 1916-1919. It also says Pacific/Easter +# standardized on 109W22 in 1890; assume this didn't change the clocks. +# +# Dates for America/Santiago from 1910 to 2004 are primarily from +# the following source, cited by Oscar van Vlijmen (2006-10-08): +# [1] Chile Law +# http://www.webexhibits.org/daylightsaving/chile.html +# This contains a copy of a this official table: +# Cambios en la hora oficial de Chile desde 1900 (retrieved 2008-03-30) +# http://web.archive.org/web/20080330200901/http://www.horaoficial.cl/cambio.htm +# [1] needs several corrections, though. +# +# The first set of corrections is from: +# [2] History of the Official Time of Chile +# http://www.horaoficial.cl/ing/horaof_ing.html (retrieved 2012-03-06). See: +# http://web.archive.org/web/20120306042032/http://www.horaoficial.cl/ing/horaof_ing.html +# This is an English translation of: +# Historia de la hora oficial de Chile (retrieved 2012-10-24). See: +# http://web.archive.org/web/20121024234627/http://www.horaoficial.cl/horaof.htm +# A fancier Spanish version (requiring mouse-clicking) is at: +# http://www.horaoficial.cl/historia_hora.html +# Conflicts between [1] and [2] were resolved as follows: +# +# - [1] says the 1910 transition was Jan 1, [2] says Jan 10 and cites +# Boletín Nº 1, Aviso Nº 1 (1910). Go with [2]. +# +# - [1] says SMT was -4:42:45, [2] says Chile's official time from +# 1916 to 1919 was -4:42:46.3, the meridian of Chile's National +# Astronomical Observatory (OAN), then located in what is now +# Quinta Normal in Santiago. Go with [2], rounding it to -4:42:46. +# +# - [1] says the 1918 transition was Sep 1, [2] says Sep 10 and cites +# Boletín Nº 22, Aviso Nº 129/1918 (1918-08-23). Go with [2]. +# +# - [1] does not give times for transitions; assume they occur +# at midnight mainland time, the current common practice. However, +# go with [2]'s specification of 23:00 for the 1947-05-21 transition. +# +# Another correction to [1] is from Jesper Nørgaard Welen, who +# wrote (2006-10-08), "I think that there are some obvious mistakes in +# the suggested link from Oscar van Vlijmen,... for instance entry 66 +# says that GMT-4 ended 1990-09-12 while entry 67 only begins GMT-3 at +# 1990-09-15 (they should have been 1990-09-15 and 1990-09-16 +# respectively), but anyhow it clears up some doubts too." +# +# Data for Pacific/Easter from 1910 through 1967 come from Shanks & +# Pottenger. After that, for lack of better info assume +# Pacific/Easter is always two hours behind America/Santiago; +# this is known to work for DST transitions starting in 2008 and +# may well be true for earlier transitions. + # From Eduardo Krell (1995-10-19): # The law says to switch to DST at midnight [24:00] on the second SATURDAY # of October.... The law is the same for March and October. @@ -1110,78 +1164,35 @@ Zone America/Rio_Branco -4:31:12 - LMT 1914 # Because of the same drought, the government decided to end DST later, # on April 3, (one-time change). -# From Oscar van Vlijmen (2006-10-08): -# http://www.horaoficial.cl/cambio.htm - -# From Jesper Nørgaard Welen (2006-10-08): -# I think that there are some obvious mistakes in the suggested link -# from Oscar van Vlijmen,... for instance entry 66 says that GMT-4 -# ended 1990-09-12 while entry 67 only begins GMT-3 at 1990-09-15 -# (they should have been 1990-09-15 and 1990-09-16 respectively), but -# anyhow it clears up some doubts too. - -# From Paul Eggert (2014-08-12): -# The following data entries for Chile and America/Santiago are from -# (2006-09-20), transcribed by -# Jesper Nørgaard Welen. The data entries for Pacific/Easter are from Shanks -# & Pottenger, except with DST transitions after 1932 cloned from -# America/Santiago. The pre-1980 Pacific/Easter data entries are dubious, -# but we have no other source. - # From Germán Poo-Caamaño (2008-03-03): # Due to drought, Chile extends Daylight Time in three weeks. This # is one-time change (Saturday 3/29 at 24:00 for America/Santiago # and Saturday 3/29 at 22:00 for Pacific/Easter) # The Supreme Decree is located at # http://www.shoa.cl/servicios/supremo316.pdf -# and the instructions for 2008 are located in: -# http://www.horaoficial.cl/cambio.htm - +# # From José Miguel Garrido (2008-03-05): -# ... -# You could see the announces of the change on # http://www.shoa.cl/noticias/2008/04hora/hora.htm # From Angel Chiang (2010-03-04): # Subject: DST in Chile exceptionally extended to 3 April due to earthquake # http://www.gobiernodechile.cl/viewNoticia.aspx?idArticulo=30098 -# (in Spanish, last paragraph). # -# This is breaking news. There should be more information available later. - # From Arthur David Olson (2010-03-06): # Angel Chiang's message confirmed by Julio Pacheco; Julio provided a patch. -# From Glenn Eychaner (2011-03-02): -# It appears that the Chilean government has decided to postpone the -# change from summer time to winter time again, by three weeks to April -# 2nd: -# http://www.emol.com/noticias/nacional/detalle/detallenoticias.asp?idnoticia=467651 -# -# This is not yet reflected in the official "cambio de hora" site, but -# probably will be soon: -# http://www.horaoficial.cl/cambio.htm - -# From Arthur David Olson (2011-03-02): -# The emol.com article mentions a water shortage as the cause of the -# postponement, which may mean that it's not a permanent change. - # From Glenn Eychaner (2011-03-28): -# The article: # http://diario.elmercurio.com/2011/03/28/_portada/_portada/noticias/7565897A-CA86-49E6-9E03-660B21A4883E.htm?id=3D{7565897A-CA86-49E6-9E03-660B21A4883E} -# # In English: # Chile's clocks will go back an hour this year on the 7th of May instead # of this Saturday. They will go forward again the 3rd Saturday in -# August, not in October as they have since 1968. This is a pilot plan -# which will be reevaluated in 2012. +# August, not in October as they have since 1968. # From Mauricio Parada (2012-02-22), translated by Glenn Eychaner (2012-02-23): # As stated in the website of the Chilean Energy Ministry # http://www.minenergia.cl/ministerio/noticias/generales/gobierno-anuncia-fechas-de-cambio-de.html # The Chilean Government has decided to postpone the entrance into winter time -# (to leave DST) from March 11 2012 to April 28th 2012. The decision has not -# been yet formalized but it will within the next days. +# (to leave DST) from March 11 2012 to April 28th 2012.... # Quote from the website communication: # # 6. For the year 2012, the dates of entry into winter time will be as follows: @@ -1214,17 +1225,9 @@ Zone America/Rio_Branco -4:31:12 - LMT 1914 # From Paul Eggert (2015-03-03): # For now, assume that the extension will persist indefinitely. -# NOTE: ChileAQ rules for Antarctic bases are stored separately in the -# 'antarctica' file. - # Rule NAME FROM TO TYPE IN ON AT SAVE LETTER/S -Rule Chile 1927 1932 - Sep 1 0:00 1:00 S +Rule Chile 1927 1931 - Sep 1 0:00 1:00 S Rule Chile 1928 1932 - Apr 1 0:00 0 - -Rule Chile 1942 only - Jun 1 4:00u 0 - -Rule Chile 1942 only - Aug 1 5:00u 1:00 S -Rule Chile 1946 only - Jul 15 4:00u 1:00 S -Rule Chile 1946 only - Sep 1 3:00u 0:00 - -Rule Chile 1947 only - Apr 1 4:00u 0 - Rule Chile 1968 only - Nov 3 4:00u 1:00 S Rule Chile 1969 only - Mar 30 3:00u 0 - Rule Chile 1969 only - Nov 23 4:00u 1:00 S @@ -1235,10 +1238,8 @@ Rule Chile 1972 1986 - Mar Sun>=9 3:00u 0 - Rule Chile 1973 only - Sep 30 4:00u 1:00 S Rule Chile 1974 1987 - Oct Sun>=9 4:00u 1:00 S Rule Chile 1987 only - Apr 12 3:00u 0 - -Rule Chile 1988 1989 - Mar Sun>=9 3:00u 0 - -Rule Chile 1988 only - Oct Sun>=1 4:00u 1:00 S -Rule Chile 1989 only - Oct Sun>=9 4:00u 1:00 S -Rule Chile 1990 only - Mar 18 3:00u 0 - +Rule Chile 1988 1990 - Mar Sun>=9 3:00u 0 - +Rule Chile 1988 1989 - Oct Sun>=9 4:00u 1:00 S Rule Chile 1990 only - Sep 16 4:00u 1:00 S Rule Chile 1991 1996 - Mar Sun>=9 3:00u 0 - Rule Chile 1991 1997 - Oct Sun>=9 4:00u 1:00 S @@ -1261,15 +1262,21 @@ Rule Chile 2012 2014 - Sep Sun>=2 4:00u 1:00 S # (1996-09) says 1998-03-08. Ignore these. # Zone NAME GMTOFF RULES FORMAT [UNTIL] Zone America/Santiago -4:42:46 - LMT 1890 - -4:42:46 - SMT 1910 # Santiago Mean Time + -4:42:46 - SMT 1910 Jan 10 # Santiago Mean Time -5:00 - CLT 1916 Jul 1 # Chile Time - -4:42:46 - SMT 1918 Sep 1 # Santiago Mean Time - -4:00 - CLT 1919 Jul 1 # Chile Time - -4:42:46 - SMT 1927 Sep 1 # Santiago Mean Time - -5:00 Chile CL%sT 1947 May 22 # Chile Time + -4:42:46 - SMT 1918 Sep 10 + -4:00 - CLT 1919 Jul 1 + -4:42:46 - SMT 1927 Sep 1 + -5:00 Chile CL%sT 1932 Sep 1 + -4:00 - CLT 1942 Jun 1 + -5:00 - CLT 1942 Aug 1 + -4:00 - CLT 1946 Jul 15 + -4:00 1:00 CLST 1946 Sep 1 # central Chile + -4:00 - CLT 1947 Apr 1 + -5:00 - CLT 1947 May 21 23:00 -4:00 Chile CL%sT 2015 Apr 26 3:00u -3:00 - CLT -Zone Pacific/Easter -7:17:44 - LMT 1890 +Zone Pacific/Easter -7:17:28 - LMT 1890 -7:17:28 - EMT 1932 Sep # Easter Mean Time -7:00 Chile EAS%sT 1982 Mar 14 3:00u # Easter Time -6:00 Chile EAS%sT 2015 Apr 26 3:00u @@ -1279,6 +1286,25 @@ Zone Pacific/Easter -7:17:44 - LMT 1890 # Other Chilean locations, including Juan Fernández Is, Desventuradas Is, # and Antarctic bases, are like America/Santiago. +# Antarctic base using South American rules +# (See the file 'antarctica' for more.) +# +# Palmer, Anvers Island, since 1965 (moved 2 miles in 1968) +# +# From Ethan Dicks (1996-10-06): +# It keeps the same time as Punta Arenas, Chile, because, just like us +# and the South Pole, that's the other end of their supply line.... +# I verified with someone who was there that since 1980, +# Palmer has followed Chile. Prior to that, before the Falklands War, +# Palmer used to be supplied from Argentina. +# +# Zone NAME GMTOFF RULES FORMAT [UNTIL] +Zone Antarctica/Palmer 0 - zzz 1965 + -4:00 Arg AR%sT 1969 Oct 5 + -3:00 Arg AR%sT 1982 May + -4:00 Chile CL%sT 2015 Apr 26 3:00u + -3:00 - CLT + # Colombia # Milne gives 4:56:16.4 for Bogotá time in 1899; round to nearest. He writes, diff --git a/crypto/openssh/moduli b/crypto/openssh/moduli index 49f76ee986fe..dff3c2491cf4 100644 --- a/crypto/openssh/moduli +++ b/crypto/openssh/moduli @@ -1,262 +1,276 @@ -# $OpenBSD: moduli,v 1.8 2012/08/29 05:06:54 dtucker Exp $ +# $OpenBSD: moduli,v 1.12 2015/05/22 02:45:42 dtucker Exp $ # Time Type Tests Tries Size Generator Modulus -20120821044040 2 6 100 1023 5 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A770E2EC9F -20120821044046 2 6 100 1023 2 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A7711F2C6B -20120821044047 2 6 100 1023 2 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A771225323 -20120821044048 2 6 100 1023 2 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A7712507AB -20120821044050 2 6 100 1023 2 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A7712A2DB3 -20120821044051 2 6 100 1023 5 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A7712CACEF -20120821044053 2 6 100 1023 2 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A7713959C3 -20120821044057 2 6 100 1023 2 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A7715BBA13 -20120821044103 2 6 100 1023 5 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A77191592F -20120821044104 2 6 100 1023 5 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A771938E1F -20120821044106 2 6 100 1023 5 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A771A1E127 -20120821044108 2 6 100 1023 2 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A771B3CDFB -20120821044109 2 6 100 1023 2 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A771B71913 -20120821044111 2 6 100 1023 5 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A771C2759F -20120821044113 2 6 100 1023 5 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A771CF8ABF -20120821044114 2 6 100 1023 2 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A771D2B49B -20120821044116 2 6 100 1023 2 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A771DF6193 -20120821044117 2 6 100 1023 2 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A771E67E33 -20120821044120 2 6 100 1023 2 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A771FA581B -20120821044121 2 6 100 1023 2 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A772027DDB -20120821044123 2 6 100 1023 2 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A772093F8B -20120821044124 2 6 100 1023 5 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A7720EEF6F -20120821044125 2 6 100 1023 5 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A77216CAD7 -20120821044126 2 6 100 1023 2 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A77219A90B -20120821044129 2 6 100 1023 2 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A7722A0103 -20120821044130 2 6 100 1023 5 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A772343DBF -20120821044133 2 6 100 1023 5 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A772460C3F -20120821044137 2 6 100 1023 5 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A7726A4E0F -20120821044138 2 6 100 1023 2 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A772716D8B -20120821044141 2 6 100 1023 2 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A7728D719B -20120821044143 2 6 100 1023 2 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A77297AA8B -20120821044145 2 6 100 1023 2 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A772A8794B -20120821044147 2 6 100 1023 2 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A772B4D6AB -20120821044149 2 6 100 1023 5 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A772BD325F -20120821044150 2 6 100 1023 5 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A772BDAE07 -20120821044151 2 6 100 1023 2 D9277DAA27DB131C03B108D41A76B4DA8ACEECCCAE73D2E48CEDAAA70B09EF9F04FB020DCF36C51B8E485B26FABE0337E24232BE4F4E693548310244937433FB1A5758195DC73B84ADEF8237472C46747D79DC0A2CF8A57CE8DBD8F466A20F8551E7B1B824B2E4987A8816D9BC0741C2798F3EBAD3ADEBCC78FCE6A772C95CE3 -20120821044502 2 6 100 1535 5 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F96361507 -20120821044515 2 6 100 1535 5 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F965885BF -20120821044519 2 6 100 1535 5 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F966006C7 -20120821044528 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F9674A0EB -20120821044539 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F969457F3 -20120821044544 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F969BE79B -20120821044606 2 6 100 1535 5 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F96E1E827 -20120821044623 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F9714284B -20120821044630 2 6 100 1535 5 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F97231CB7 -20120821044636 2 6 100 1535 5 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F972E01DF -20120821044647 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F974BCED3 -20120821044650 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F974C3A43 -20120821044653 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F974E8F73 -20120821044701 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F9763403B -20120821044705 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F9767666B -20120821044708 2 6 100 1535 5 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F9768D81F -20120821044726 2 6 100 1535 5 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F979FD437 -20120821044729 2 6 100 1535 5 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F97A29BC7 -20120821044732 2 6 100 1535 5 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F97A56447 -20120821044737 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F97AEDBDB -20120821044740 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F97B187F3 -20120821044746 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F97BC6EE3 -20120821044757 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F97DCCDEB -20120821044817 2 6 100 1535 5 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F981975F7 -20120821044831 2 6 100 1535 5 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F983EC267 -20120821044841 2 6 100 1535 5 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F985A032F -20120821044846 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F9863B0AB -20120821044852 2 6 100 1535 5 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F986E5C7F -20120821044911 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F98A8FF6B -20120821044917 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F98B40E4B -20120821044924 2 6 100 1535 5 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F98C5840F -20120821044940 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F98F22CEB -20120821044947 2 6 100 1535 5 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F99040FFF -20120821044954 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F99139AE3 -20120821045010 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F9940BEFB -20120821045017 2 6 100 1535 5 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F9954379F -20120821045020 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F99548C23 -20120821045023 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F99562FC3 -20120821045028 2 6 100 1535 5 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F9960CDCF -20120821045038 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F997AC0B3 -20120821045045 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F998D9B6B -20120821045050 2 6 100 1535 5 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F9994BB77 -20120821045059 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F99AC001B -20120821045101 2 6 100 1535 5 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F99AC5547 -20120821045107 2 6 100 1535 5 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F99B86567 -20120821045110 2 6 100 1535 5 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F99BA2677 -20120821045128 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F99EF4523 -20120821045154 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F9A419DAB -20120821045214 2 6 100 1535 5 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F9A7D1E67 -20120821045218 2 6 100 1535 2 D1391174233D315398FE2830AC6B2B66BCCD01B0A634899F339B7879F1DB85712E9DC4E4B1C6C8355570C1D2DCB53493DF18175A9C53D1128B592B4C72D97136F5542FEB981CBFE8012FDD30361F288A42BD5EBB08BAB0A5640E1AC48763B2ABD1945FEE36B2D55E1D50A1C86CED9DD141C4E7BE2D32D9B562A0F8E2E927020E91F58B57EB9ACDDA106A59302D7E92AD5F6E851A45FA1CFE86029A0F727F65A8F475F33572E2FDAB6073F0C21B8B54C3823DB2EF068927E5D747498F9A826443 -20120821045639 2 6 100 2047 2 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C604293680B09D63 -20120821045830 2 6 100 2047 2 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C6042936814C2FFB -20120821050046 2 6 100 2047 2 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C60429368214FC53 -20120821050054 2 6 100 2047 5 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C60429368218E83F -20120821050118 2 6 100 2047 5 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C604293682361D5F -20120821050218 2 6 100 2047 5 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C6042936828ADA17 -20120821050243 2 6 100 2047 2 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C604293682A8A7CB -20120821050427 2 6 100 2047 5 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C60429368341AC87 -20120821050515 2 6 100 2047 5 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C6042936837F8657 -20120821050545 2 6 100 2047 2 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C604293683A3DFD3 -20120821050554 2 6 100 2047 5 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C604293683A9635F -20120821050636 2 6 100 2047 2 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C604293683DF582B -20120821050648 2 6 100 2047 2 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C604293683E86803 -20120821050758 2 6 100 2047 2 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C604293684495A13 -20120821050807 2 6 100 2047 2 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C6042936844FAB5B -20120821050849 2 6 100 2047 2 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C60429368486D99B -20120821050916 2 6 100 2047 5 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C604293684A776A7 -20120821050942 2 6 100 2047 2 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C604293684C4FF73 -20120821051003 2 6 100 2047 5 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C604293684DB980F -20120821051010 2 6 100 2047 5 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C604293684DD4FBF -20120821051158 2 6 100 2047 5 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C604293685721537 -20120821051206 2 6 100 2047 2 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C604293685768253 -20120821051231 2 6 100 2047 2 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C604293685930F13 -20120821051240 2 6 100 2047 2 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C604293685987B0B -20120821051324 2 6 100 2047 2 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C604293685D5E36B -20120821051349 2 6 100 2047 5 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C604293685F3AB7F -20120821051424 2 6 100 2047 5 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C604293686206187 -20120821051516 2 6 100 2047 2 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C60429368668EB4B -20120821051540 2 6 100 2047 5 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C60429368686EB87 -20120821051622 2 6 100 2047 2 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C604293686BCCF13 -20120821051703 2 6 100 2047 5 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C604293686F13B9F -20120821051715 2 6 100 2047 5 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C604293686FB2D4F -20120821051837 2 6 100 2047 5 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C6042936876ED7DF -20120821051843 2 6 100 2047 2 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C6042936876F05DB -20120821051930 2 6 100 2047 5 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C604293687AEDE8F -20120821052131 2 6 100 2047 5 DD2047CBDBB6F8E919BC63DE885B34D0FD6E3DB2887D8B46FE249886ACED6B46DFCD5553168185FD376122171CD8927E60120FA8D01F01D03E58281FEA9A1ABE97631C828E41815F34FDCDF787419FE13A3137649AA93D2584230DF5F24B5C00C88B7D7DE4367693428C730376F218A53E853B0851BAB7C53C15DA7839CBE1285DB63F6FA45C1BB59FE1C5BB918F0F8459D7EF60ACFF5C0FA0F3FCAD1C5F4CE4416D4F4B36B05CDCEBE4FB879E95847EFBC6449CD190248843BC7EDB145FBFC4EDBB1A3C959298F08F3BA2CFBE231BBE204BE6F906209D28BD4820AB3E7BE96C26AE8A809ADD8D1A5A0B008E9570FA4C4697E116B8119892C604293688637CFF -20120821053137 2 6 100 3071 5 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF942284EA9F -20120821053209 2 6 100 3071 5 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF94228B7F67 -20120821053317 2 6 100 3071 5 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF9422A2B3C7 -20120821053841 2 6 100 3071 5 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF94232DEF87 -20120821054039 2 6 100 3071 2 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF942359AB7B -20120821054334 2 6 100 3071 5 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF9423A371A7 -20120821054455 2 6 100 3071 5 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF9423C1CEEF -20120821054844 2 6 100 3071 5 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF9424273F1F -20120821055307 2 6 100 3071 5 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF9424987667 -20120821055436 2 6 100 3071 2 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF9424B90BAB -20120821055700 2 6 100 3071 5 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF9424F6C7CF -20120821060224 2 6 100 3071 5 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF94258ADCEF -20120821060334 2 6 100 3071 2 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF9425A1FCEB -20120821060420 2 6 100 3071 2 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF9425AEBF43 -20120821060927 2 6 100 3071 5 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF942634C34F -20120821061829 2 6 100 3071 5 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF94272F0D4F -20120821062020 2 6 100 3071 5 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF94275B00B7 -20120821062241 2 6 100 3071 5 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF9427941F5F -20120821063416 2 6 100 3071 5 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF9428D5E367 -20120821063648 2 6 100 3071 5 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF942917E127 -20120821064052 2 6 100 3071 2 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF9429825A2B -20120821064951 2 6 100 3071 2 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF942A74C4EB -20120821065736 2 6 100 3071 2 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF942B4640D3 -20120821071146 2 6 100 3071 2 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF942CCD6D1B -20120821071337 2 6 100 3071 2 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF942CF9321B -20120821072545 2 6 100 3071 5 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF942E48654F -20120821075022 2 6 100 3071 2 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF9430F1B6A3 -20120821080229 2 6 100 3071 2 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF9432356F63 -20120821081230 2 6 100 3071 2 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF94333D9363 -20120821081746 2 6 100 3071 5 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF9433C6A7A7 -20120821081811 2 6 100 3071 2 DFAA35D35531E0F524F0099877A482D2AC8D589F374394A262A8E81A8A4FB2F65FADBAB395E05D147B29D486DFAA41F41597A256DA82A8B6F76401AED53D0253F956CEC610D417E42E3B287F7938FC24D8821B40BFA218A956EB7401BED6C96C68C7FD64F8170A8A76B953DD2F05420118F6B144D8FE48060A2BCB85056B478EDEF96DBC70427053ECD2958C074169E9550DD877779A3CF17C5AC850598C7586BEEA9DCFE9DD2A5FB62DF5F33EA7BC00CDA31B9D2DD721F979EA85B6E63F0C4E30BDDCD3A335522F9004C4ED50B15DC537F55324DD4FA119FB3F101467C6D7E1699DE4B3E3C478A8679B8EB3FA5C9B826B44530FD3BE9AD3063B240B0C853EBDDBD68DD940332D98F148D5D9E1DC977D60A0D23D0CA1198637FEAE4E7FAAC173AF2B84313A666CFB4EE6972811921D0AD867CE57F3BBC8D6CB057E3B66757BB46C9F72662624D44E14528327E3A7100E81A12C43C4E236118318CD90C8AA185BBB0C764826DAEAEE8DD245C5B451B4944E6122CC522D1C335C2EEF9433C94C93 -20120821084945 2 6 100 4095 5 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA45B27D047 -20120821091240 2 6 100 4095 2 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA45C370A33 -20120821092428 2 6 100 4095 2 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA45CBB9FBB -20120821093047 2 6 100 4095 2 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA45D001E73 -20120821095420 2 6 100 4095 5 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA45E104D6F -20120821095624 2 6 100 4095 5 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA45E21E2BF -20120821102749 2 6 100 4095 2 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA45F9B1B7B -20120821105854 2 6 100 4095 5 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA4610E205F -20120821110658 2 6 100 4095 5 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA461631FBF -20120821110744 2 6 100 4095 2 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA461635E3B -20120821115206 2 6 100 4095 5 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA4636E0DF7 -20120821121256 2 6 100 4095 2 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA4645F38B3 -20120821121421 2 6 100 4095 2 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA46467609B -20120821122649 2 6 100 4095 2 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA464F87D6B -20120821122854 2 6 100 4095 2 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA46508F94B -20120821125200 2 6 100 4095 2 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA4661CBC5B -20120821130613 2 6 100 4095 2 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA466BC6B33 -20120821131115 2 6 100 4095 5 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA466ED9CC7 -20120821132817 2 6 100 4095 2 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA467B278B3 -20120821135349 2 6 100 4095 2 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA468D8351B -20120821141206 2 6 100 4095 5 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA469A817A7 -20120821144909 2 6 100 4095 5 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA46B488EF7 -20120821150021 2 6 100 4095 5 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA46BC5D5E7 -20120821153843 2 6 100 4095 2 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA46D774723 -20120821162006 2 6 100 4095 2 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA46F5488DB -20120821170404 2 6 100 4095 5 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA47157A067 -20120821173305 2 6 100 4095 2 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA472A1E94B -20120821173936 2 6 100 4095 5 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA472E0E57F -20120821174533 2 6 100 4095 2 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA4731F7433 -20120821180053 2 6 100 4095 5 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA473C7CE3F -20120821180952 2 6 100 4095 5 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA4742A8237 -20120821181124 2 6 100 4095 2 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA474343C5B -20120821183540 2 6 100 4095 2 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA4754D89DB -20120821183852 2 6 100 4095 5 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA47569B47F -20120821184512 2 6 100 4095 2 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA475AC57DB -20120821184603 2 6 100 4095 2 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA475AD78CB -20120821184701 2 6 100 4095 5 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA475B0038F -20120821185939 2 6 100 4095 5 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA4763BD72F -20120821190630 2 6 100 4095 5 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA476853BB7 -20120821190945 2 6 100 4095 2 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA476A47843 -20120821195501 2 6 100 4095 5 EF07B0F39662DC8600224E46AB8BE8CB72E552D52E88013D20EC039A0697ED9AAD018B16F0B910D4AD54437B8585AAA4EAE0CE216E31F50EDF0CD05DAF5E02A73D399C91B38220EC3B62C42D1CF6BF06378533A70C1F8F4F4416DD542213D3432412125FDBFF7B9473CE6F8812D860E66282C9F34C1774D1EA57D54DADDF7E37A12C4A6AD5B4A30128C29D27D03B6535C0F7A8AF857E18ECAB992984E6D546918AAACB971A2AC2C2E7AF79A9547979E6342DB7443985E5F7EDF6F9F22B600EEB42CB84A5F1ACD76E213C52E3052DAE1A9119801CFA28E6EFD4F6BC35FA06C8724D78A96AF054826C0BF865D0EC5F6F4D31C1D3F7CF2FE6F16AF267A7BA04753AEF420D4D8C36BCE8D9694814B9E9C3DF468064EB5636405C71CA9D8D50D36570B42639C9C2C02FB3A3D0C6B28DD200B0AF164C621D60B12E35E4D00129C8900F6EFDBB49FF34DD64CB13CD4087A7F84FEFD77D4E8099C2B804BA643EAFCA66D1F02BD09AE44AC83A5149F60711B7B108C01D53FF15FA59B36BE62A870F163F5063CEE103B377808343AFBD32271199E26D93734011BED2305EDE2E841EAD512E23B8C9B8CD4D398C7B4C8B76B355CC150B66B8EB7779E2CA519E10E45D0FB138676850C56F23DB135F546D364B92BC1C9423E089D30D4D57D27D7885EE14AE135A488C0542C3719FBEF46F4BB5FB53A28DA26DDF84C8BC55348A8AA478A96AEF -20120705232031 2 6 100 6143 2 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B241215BB -20120705233800 2 6 100 6143 2 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B246EC93B -20120706002709 2 6 100 6143 5 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B2582B477 -20120706013826 2 6 100 6143 2 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B271419A3 -20120706014732 2 6 100 6143 2 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B273FB1BB -20120706021008 2 6 100 6143 5 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B27B7E59F -20120705225552 2 6 100 6143 2 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B29C4E81B -20120705233754 2 6 100 6143 5 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B2AB07037 -20120705234834 2 6 100 6143 2 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B2AE25CBB -20120706024556 2 6 100 6143 5 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B2EDFAA6F -20120705233556 2 6 100 6143 2 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B30EE83EB -20120706002117 2 6 100 6143 5 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B31E6F727 -20120705233808 2 6 100 6143 5 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B37267537 -20120706001148 2 6 100 6143 5 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B3DF98C1F -20120706013155 2 6 100 6143 2 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B3FBB98EB -20120706025705 2 6 100 6143 5 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B418898A7 -20120706022948 2 6 100 6143 2 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B4707179B -20120705233534 2 6 100 6143 5 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B4F3D25C7 -20120706014542 2 6 100 6143 2 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B520205CB -20120706030026 2 6 100 6143 2 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B539518DB -20120706003519 2 6 100 6143 2 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B566E0243 -20120706032218 2 6 100 6143 5 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B59E508EF -20120706033523 2 6 100 6143 5 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B5A254F5F -20120705235242 2 6 100 6143 5 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B5B60C48F -20120706022615 2 6 100 6143 2 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B646A1B3B -20120706032540 2 6 100 6143 5 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B6594B14F -20120706001843 2 6 100 6143 2 EEBCAD36F686DDEB790C1EBDF6C6355A4EEB95435785FAC26C1DDBBD0D3C284AB5B4A1D5BA22131604AAE087D8B9431038CDA76DAA9E1C8D10793F53374FDF26489D38FF13188B6961B86E44A065D2FADEFC6C9496350AFA4129C9FD1B6B321E6053A6C645978C151D623C1106FE6669C220690B637F6259522F88250CC2B1B7F170706E9CE741F6E26BB4E86FB6822B13D8A7CE99FEF5CD66EF08310ECE5CC86648BD90E1DC59332505579116D3F3C8314065DC1319BEA133ED809903CA4949905C3D21619217816465E964768FFE76BC962AACBC8FF13477990A81C8759BBE95DFFA22E299F7C0F79A0EA7C44B28E8AB96149CC213E7C886E3D0A2230D7A4176749D6EDD6FCA2F5F3E2BD10392BC818CFB25C696C1EC14CE6F23CDB6C3DA2ED77E098A874799EB65F82A4EAF85CA0C9E68278381AF964AA5816B2CDA8E1ABB2954C02F641E1F374563B0F9DBF2F1B6D8168558BB971C8F48668A8034F82908D45D4D9A9072375D00AE0D5D442C6E6B6B2E7280C104C7675FDB0795DD0D3273E74BDC7B243B7604447502EB1572A273ABA0032CDB754345B1ACDF17B5AEDA45B661DBEFDA084B1427F94C8EA62BAB6A1E05DED8F2F706445879F15FB096996765238B6B546FDE5F219B5B85B31E804A989C4959600998A03572FB59DC150714BDB0C71A236497AE79871FBEFCAFFF34D2DF0142F2AF3C9C5D92F5FC7A61A27FF9AA1EADDF3552A2BED2CC4D19FB0F67DCC02744947A42FE10B338A3A8E634B413AE46C4E644DD5934D5820C9714656171A02BBCA25AED1CCD9EB9BEF9C63E7E966B0E2E47146191ECA452588FA2AFF50AF25FABAF83E143D47A651BD9B9C37CF5D6319FDCBC2F5D4B76D07B52D857FDE48FD983F06B531F7D316E2961E17D358FE6556C82C2E78C1D9CCF68760EFD8CC692E8912914781651D834C0C766B3D71C07C91AB93619E0C06385CFAC6FA18E1DEC7F3C5EE92C906CC49A4786D24CDB4F5656DE60F1F4412367B16BDA68DA368218C16E30C48366A8C0FDFA6E708E3353B8471402A42E594903774A65EA7AB5A83D08AD10D34DB38201B44B677C3593 -20120705054703 2 6 100 8191 5 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE234453518A0F7 -20120705060217 2 6 100 8191 5 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE23445353B291F -20120705100916 2 6 100 8191 2 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE2344537DF8F1B -20120705112627 2 6 100 8191 2 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE2344538AF7C7B -20120705121419 2 6 100 8191 5 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE23445392BB61F -20120705162623 2 6 100 8191 2 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE234453BD5FE03 -20120705171958 2 6 100 8191 5 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE234453C6257EF -20120705222541 2 6 100 8191 2 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE234453FBF1073 -20120705120012 2 6 100 8191 2 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE2344544BA2363 -20120705143238 2 6 100 8191 2 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE23445464ED33B -20120705175610 2 6 100 8191 2 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE23445486B9E93 -20120705143839 2 6 100 8191 2 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE2344551AEBB1B -20120705164833 2 6 100 8191 5 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE2344553053057 -20120705195911 2 6 100 8191 2 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE2344560200E33 -20120705051445 2 6 100 8191 2 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE23445620DCB9B -20120705090103 2 6 100 8191 2 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE234456453E2C3 -20120705102457 2 6 100 8191 2 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE234456520F7B3 -20120705045958 2 6 100 8191 5 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE234456CC34FE7 -20120705064048 2 6 100 8191 2 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE234456DBB1643 -20120705100057 2 6 100 8191 5 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE234456FACFC3F -20120705130216 2 6 100 8191 2 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE23445716EEFD3 -20120705184211 2 6 100 8191 5 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE2344574BD3B0F -20120705075506 2 6 100 8191 5 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE234457918ED6F -20120705111016 2 6 100 8191 5 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE23445857E1707 -20120705051124 2 6 100 8191 2 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE234458C6078E3 -20120705054255 2 6 100 8191 2 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE234458CA4E313 -20120705155949 2 6 100 8191 2 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE234459281E7B3 -20120705065517 2 6 100 8191 2 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE2344597A57CB3 -20120705082307 2 6 100 8191 2 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE23445987253DB -20120705182442 2 6 100 8191 5 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE234459E124B2F -20120705184956 2 6 100 8191 2 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE234459E442F5B -20120705071209 2 6 100 8191 2 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE23445A1E0FD83 -20120705155527 2 6 100 8191 2 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE23445A6BDA473 -20120705103912 2 6 100 8191 5 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE23445ADCE429F -20120705115451 2 6 100 8191 2 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE23445AE75FB83 -20120705133531 2 6 100 8191 2 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE23445AF5813A3 -20120705144902 2 6 100 8191 5 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE23445AFF92FDF -20120705160631 2 6 100 8191 5 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE23445B0A9AF9F -20120705194100 2 6 100 8191 2 DA2167F01CB32874E032B38C40FEC5F2557C9C4411B3A4B3D38C889A8BEED4EB7EF08A9A1E1EAAEEC22C2A46891D3CA84517FDFCDFA2BACBCDE2FC8EA87182542F5C8D3897B6C8A6DB951256F3DDBA7C5D6E7060925AD1F3046F49D00B433770B412DAA2A74E539EB81E3266DDDA82781BB21B19695FB925FA8BB6D249B5C33401C5D9E5C6B1719A36F1EB36E7CCD28AD98AA74DFD453D343BD189C968EB8F459809E87F77C6BA985B82B960A46660C7A277970E016EBD183CE7D6232F56EB06ECC0931024B9333879EF063F976C3603649AB9DCBE9714753E0A865020C3EF22BABF2F473F771CFC70A7C43FE320640D6E2816E88B6CA501A85A34F88EFF26AD8FFA0D11B0A21CB1A4FC7F90DB97B11BD5367302CBB45A390D2CB28CE83D50156A161D0080FD5F3961872ABC56FBCB973C517F6D7205E6CCF44E22E5DF8793D5037A9E779A52628D258CEA6B45CA4AC604CD69875D51145EE4C3D8856E24F9DBCA0134D54A734320A46A0AF52E20DD604AD465508172D4185C0D5C720B325ABC1760B1680B7BDFBAA1AE845A84AC3C7BBC53CD01C000B2186DC3915A1879224DD703E817C58F5FFCFBDF0189BB4B5033769F49852F3C48A88B88FB659B4AC96EE9DFC1D7E1760194EE4E1B6A8052BA17C827BE8A74C9F3FA7EA3236171F3DF9ACF19C40636825F1C49EFAAB12CEAD24F4585FE7C466FDE7ACF7E1FC91C8D473A8AB12C652AF568227E7CE3421256F83084D8E82DC977309E5B8C73EB8D92B71B9DAF6A53D13539D55C1A67BAC646358352529958AA3599DF0D882B8640ABFF17031C3F246A3E07F86AEB29CEACACF3B3EB931C40D292D09F4B99E08E4C68D811F9425DA30AC456107454AAC470DBD627C3EE2132E7C6FCEB61C2BA1CBE4FE6F07A2A4E398FDFBECC0283E9CF440F9F8F6893D019A98EFE992BA7433951DF341A3B3A8E879B090FB0E11907382853FBD6FA79B5B3FFF4EBE286F92A99D24C548949209867B1116BDBE1F104230EE26CCA0A12602A328B9B7A86D18415881AEFC9527AD4BB563CC330F29DF51199E1E9F0317EE6F3768C0849351FC1F95D47A1DE90484BE923ADC004D8287A90168C1D1491AD9A9B3266A826F966AA964E814F171FF9F3BA755DF83961182D95317844D6064D8BDED2DDB9AB4D74C325C1748036103690D88D85B532B692B74ED199253CB77E3BA57A2369BD9DD3B4FE68A66A1EFE507BA1F1A0164B6EDF397DF550EAC7FA155F7DED564A34DA73BC1F72E2D56CBABADAF3ED6B03C56FE00CA51548604403757ACAE67C71C564D4F688BA44465C7D3FFC84DB2BA142E06A967181CA0806E732134D795AD6E936BB25C00A14FE0DA5A83A7095D0271B380E802CD9E6E601C582EAC20CB6AC0C670108376302BA364FFD30E78D0CAB72BADB15F282CD256BC3B365896D80DC170BE23445B296E223 +20150520233853 2 6 100 1023 5 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA2AC62AF +20150520233854 2 6 100 1023 5 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA2BCC50F +20150520233854 2 6 100 1023 2 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA2C241F3 +20150520233855 2 6 100 1023 5 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA2DDF347 +20150520233856 2 6 100 1023 2 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA2E3FDBB +20150520233857 2 6 100 1023 2 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA3006603 +20150520233858 2 6 100 1023 5 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA31D9C37 +20150520233859 2 6 100 1023 2 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA333355B +20150520233900 2 6 100 1023 2 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA3428B23 +20150520233902 2 6 100 1023 2 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA37C9A43 +20150520233903 2 6 100 1023 5 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA384B367 +20150520233903 2 6 100 1023 2 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA3903453 +20150520233904 2 6 100 1023 5 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA3946C77 +20150520233904 2 6 100 1023 2 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA39F6A9B +20150520233904 2 6 100 1023 2 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA3A0E88B +20150520233905 2 6 100 1023 2 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA3A37763 +20150520233906 2 6 100 1023 5 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA3BBDD57 +20150520233906 2 6 100 1023 5 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA3BDCDD7 +20150520233906 2 6 100 1023 2 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA3BF5D73 +20150520233907 2 6 100 1023 2 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA3C9BB83 +20150520233908 2 6 100 1023 5 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA3E5ADCF +20150520233909 2 6 100 1023 5 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA3F82077 +20150520233910 2 6 100 1023 5 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA406944F +20150520233910 2 6 100 1023 5 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA40F7457 +20150520233912 2 6 100 1023 2 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA438733B +20150520233913 2 6 100 1023 2 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA44707FB +20150520233914 2 6 100 1023 2 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA4588A2B +20150520233916 2 6 100 1023 2 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA48CC01B +20150520233917 2 6 100 1023 5 DB662973FB21C0B7BF21AB46AFD3E2002AE70C92DE6B9AEAFECF7B0A96D7ACB024B7C29DB18E70CB945FA54C7773519BC7161648AFE4939058AC40ECDBBD3636F5BF45863117E955007C9D0F9333BB4EF62F7C9F6298AB79A309C734F3CF201C61EBC3926ADD4E80968A65D9F60535164ACE7A7BFEDC1022002BB2BBA4960077 +20150520234251 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A740BE2123 +20150520234255 2 6 100 1535 5 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A740D85877 +20150520234257 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A740E6494B +20150520234301 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A741120F9B +20150520234303 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A7411EAC5B +20150520234304 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A7412579DB +20150520234311 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A74167053B +20150520234312 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A74169B303 +20150520234318 2 6 100 1535 5 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A741A3D69F +20150520234322 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A741C07E23 +20150520234330 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A7420B48E3 +20150520234331 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A74215059B +20150520234336 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A74240BD03 +20150520234338 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A7424D70BB +20150520234341 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A7425C6CE3 +20150520234342 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A74264FA9B +20150520234343 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A7426BB34B +20150520234346 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A74285D9E3 +20150520234347 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A742878293 +20150520234348 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A74288D143 +20150520234356 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A742D55BF3 +20150520234401 2 6 100 1535 5 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A742FC8227 +20150520234410 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A7436032EB +20150520234411 2 6 100 1535 5 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A74361377F +20150520234415 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A7437CCCFB +20150520234418 2 6 100 1535 5 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A743902C1F +20150520234420 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A7439EE5DB +20150520234422 2 6 100 1535 5 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A743AE19BF +20150520234430 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A7440152AB +20150520234432 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A7440C2F63 +20150520234434 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A7441FBDEB +20150520234436 2 6 100 1535 5 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A7442C98DF +20150520234437 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A744319703 +20150520234438 2 6 100 1535 5 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A74433E927 +20150520234444 2 6 100 1535 5 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A7446DF46F +20150520234450 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A744A3488B +20150520234455 2 6 100 1535 2 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A744CDAACB +20150520234459 2 6 100 1535 5 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A744E9D8FF +20150520234504 2 6 100 1535 5 F8F4A446A6C7196643612A6C5CC26A47E491FB737740D68BBEBF0130F7AAADC59075781FB1723B644C0ADCE548C02E726DE5233C484FB4481F3EF3ED0585A0D687B2E0A6987AD2BC910754FC1A1E06B87710CFF0BC2E9868BA15BA20C103D3DCA6B65D8D0182B277F7CAE61D83A785BDD0B3CE471B4B8FAB224438D7A6772130167110AFD1FF584861996117F67B41CF3D2D5FAB020F2EB7F53E299AACF98797AEB6BAC3F0BB892DB4E4F8CDDE28C112C73EB556D0C381C6B9CC78A745196237 +20150520235007 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031E9A9C5F7 +20150520235015 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031E9CBB21F +20150520235039 2 6 100 2047 2 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EA2E9623 +20150520235043 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EA33E3DF +20150520235057 2 6 100 2047 2 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EA68038B +20150520235114 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EAAB0717 +20150520235122 2 6 100 2047 2 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EAC2A7FB +20150520235125 2 6 100 2047 2 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EAC82DD3 +20150520235154 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EB40583F +20150520235214 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EB94F247 +20150520235218 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EB9DF49F +20150520235239 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EBF7BE27 +20150520235244 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EC0B4F4F +20150520235250 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EC21070F +20150520235256 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EC36541F +20150520235307 2 6 100 2047 2 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EC5FE22B +20150520235322 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031ECA1FB57 +20150520235331 2 6 100 2047 2 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031ECC3C823 +20150520235349 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031ED035187 +20150520235400 2 6 100 2047 2 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031ED2F07DB +20150520235407 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031ED4620CF +20150520235422 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031ED86D39F +20150520235424 2 6 100 2047 2 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031ED86E683 +20150520235427 2 6 100 2047 2 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031ED8C3073 +20150520235443 2 6 100 2047 2 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EDCB1F63 +20150520235450 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EDE00B77 +20150520235452 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EDE42247 +20150520235458 2 6 100 2047 2 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EDF8F493 +20150520235503 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EE04D69F +20150520235508 2 6 100 2047 2 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EE14B92B +20150520235510 2 6 100 2047 2 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EE167933 +20150520235517 2 6 100 2047 2 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EE2DC63B +20150520235527 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EE52259F +20150520235539 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EE829247 +20150520235557 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EED044BF +20150520235608 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EEFD34CF +20150520235614 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EF0F709F +20150520235616 2 6 100 2047 2 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EF12110B +20150520235622 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EF25FE1F +20150520235637 2 6 100 2047 2 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EF6BF4D3 +20150520235654 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EFAF28BF +20150520235701 2 6 100 2047 2 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EFBFB8BB +20150520235704 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EFC7A62F +20150520235710 2 6 100 2047 2 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031EFD79323 +20150520235725 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031F0158F1F +20150520235728 2 6 100 2047 2 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031F01A9E6B +20150520235743 2 6 100 2047 2 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031F055798B +20150520235752 2 6 100 2047 2 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031F0730BC3 +20150520235757 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031F08283FF +20150520235825 2 6 100 2047 2 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031F0F451E3 +20150520235830 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031F0FDEFB7 +20150520235901 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031F1828ECF +20150521000008 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031F185D7BF +20150521000011 2 6 100 2047 2 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031F18C58FB +20150521000014 2 6 100 2047 5 F7360753237CF1837003CDFE89D99C8149BE6C4B4CCD9D09D834FF137878C452FB4FAB5CA51BE6619BC6FEC4184FA9A96D21FDE83505B67262EEA4870FD709F4DD3A2EC36E5746ED80D762467E794FE524992EAC42D2F0F391A63E027F24411B231D25AEFE60C9329CE8FFB61A8A123C74F6755211C8CFD59915CE0DE28579B66CB426D111F90B19A5BD83AB8C2CAB09FB1F09509B029883BD154B82418B4F3A9EE4564E5F344D5B911C10829C1E975817EB2DFF49F34D95277897A7198C9C4921037B8AA091C380663A6D5260F98FA784565DE2D977C50A1079B485F4BE63B4E3D6A63FD8DD59704116A41CB1C7C2AAA449071BFBAFB0F867FCC031F191F757 +20150521000841 2 6 100 3071 2 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622CC7F06BB +20150521001025 2 6 100 3071 2 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622CD1057AB +20150521001131 2 6 100 3071 5 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622CD717D6F +20150521001248 2 6 100 3071 5 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622CDDA85F7 +20150521001453 2 6 100 3071 5 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622CE8959BF +20150521001510 2 6 100 3071 2 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622CE98227B +20150521001623 2 6 100 3071 5 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622CEF967BF +20150521001651 2 6 100 3071 2 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622CF18156B +20150521001758 2 6 100 3071 5 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622CF717197 +20150521001924 2 6 100 3071 2 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622CFE1507B +20150521002244 2 6 100 3071 5 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622D0F75427 +20150521002509 2 6 100 3071 2 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622D1BD2823 +20150521002808 2 6 100 3071 5 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622D2B4950F +20150521002846 2 6 100 3071 5 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622D2E6D6D7 +20150521003203 2 6 100 3071 2 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622D3F5D0D3 +20150521003322 2 6 100 3071 2 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622D45851E3 +20150521003430 2 6 100 3071 5 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622D4AEE517 +20150521003629 2 6 100 3071 2 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622D5538E0B +20150521003714 2 6 100 3071 5 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622D58BAFCF +20150521003722 2 6 100 3071 5 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622D5916FC7 +20150521003739 2 6 100 3071 5 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622D5A378F7 +20150521004506 2 6 100 3071 2 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622D82B5113 +20150521004613 2 6 100 3071 2 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622D880CB43 +20150521004753 2 6 100 3071 2 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622D909305B +20150521004802 2 6 100 3071 2 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622D90DBDC3 +20150521005025 2 6 100 3071 5 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622D9CBF44F +20150521005051 2 6 100 3071 5 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622D9E89DA7 +20150521005252 2 6 100 3071 2 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622DA8BA403 +20150521005347 2 6 100 3071 2 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622DAD07F73 +20150521005825 2 6 100 3071 2 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622DC5CE5A3 +20150521005858 2 6 100 3071 5 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622DC84A597 +20150521010014 2 6 100 3071 5 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622DCE62957 +20150521010219 2 6 100 3071 5 E0C2D7F7B6E4C69A3B6632FC77BED88CAC663CE39D91DDF017816529795F33B591F80F445BE16F8FB51D11861682154B904AE2282FA0462EB6C508FD7B7AEC551A6C630FE9CC7E17E660377558E4F841CD77AABD81E6A0988823047B3A00C2E50C33035987D6EA42C65FD776051F5D43045848D4385FB37482DC9E5133D1B75E34CC81C2B87C9530F5229FF2154604A286C2E257D3A89CF330AEDBA16288E852277C5D7C6AA947B4510625312DF982A30A4D75679F707EB325CD4DF65C7A58154C6C05E28545DE69673B3EA9CCD41529A7CCEB49A3392D23E9AB083148DD956F8CA9B8CDD76496FF95B5782EE888C40EF1201EB3A52CAE1A635BBF82CD479B38DABD6DEE7A2844F8C614215B04CEBDD41039C2DC2D1CF00AFC78C0363E548FAE1DE8A7B535CC41CED767BE05F300F50C59307061ADE1CAA4614F8FEFAECE8F8C5DB3F425B348A206B0E95703EEA8785768CDB53972422C75B58A7AEA2AD9E2546EA991466E6AFE1FA157D75D3F6616DB715D10CCD6B71C73051FE622DD9517D7 +20150521011229 2 6 100 4095 2 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877F951FEB83 +20150521011834 2 6 100 4095 5 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877F960399B7 +20150521012438 2 6 100 4095 2 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877F96EE7973 +20150521014010 2 6 100 4095 2 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877F99453213 +20150521015607 2 6 100 4095 5 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877F9B549727 +20150521015640 2 6 100 4095 2 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877F9B600A7B +20150521020946 2 6 100 4095 5 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877F9D5299DF +20150521021536 2 6 100 4095 2 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877F9E2793D3 +20150521022706 2 6 100 4095 2 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877F9FE131CB +20150521023922 2 6 100 4095 2 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877FA1BAC073 +20150521025234 2 6 100 4095 2 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877FA3BC9483 +20150521025424 2 6 100 4095 2 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877FA3FB3513 +20150521032445 2 6 100 4095 2 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877FA87E0FAB +20150521032932 2 6 100 4095 5 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877FA929F00F +20150521032947 2 6 100 4095 2 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877FA92B272B +20150521033245 2 6 100 4095 2 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877FA9953D0B +20150521034828 2 6 100 4095 5 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877FABDD4AEF +20150521035044 2 6 100 4095 5 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877FAC298C7F +20150521035111 2 6 100 4095 2 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877FAC31F17B +20150521035749 2 6 100 4095 5 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877FAD250357 +20150521040009 2 6 100 4095 2 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877FAD788A73 +20150521040220 2 6 100 4095 2 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877FADC5F173 +20150521040316 2 6 100 4095 2 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877FADDFFC03 +20150521041042 2 6 100 4095 2 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877FAEEBDEB3 +20150521041443 2 6 100 4095 2 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877FAF7AD7BB +20150521041831 2 6 100 4095 2 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877FB007D653 +20150521041928 2 6 100 4095 2 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877FB025C91B +20150521042301 2 6 100 4095 2 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877FB0A4C143 +20150521042631 2 6 100 4095 5 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877FB12009F7 +20150521042740 2 6 100 4095 5 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877FB145360F +20150521043358 2 6 100 4095 2 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877FB22FAE93 +20150521044013 2 6 100 4095 5 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877FB31527AF +20150521044543 2 6 100 4095 5 C8BCE52E2AE7AE1EC20056B2D0764047C92392C9DF75C3A57EB8AF1062A809E6EA975D9910AA5C55833CC47D4DA76E92BF63FEBB289E5FE2ED729429DE9567D0A489FA27B41810066B96602B2E555B34628A37C4CE04984D15C36F1EAD09081D2CB2147D5F0B7E8BCF0774FFCF5F649E0CB797DD23D0801C153B6B8480828CF165C7ED3181F316F371C6EC0B6EF6B8CBE36E5A4E8C070854668AF07FE6C73C3EB817CD0E8C7F264546A1B0402AC0FCEBA5032EBA2323769CC401D262971F4B44FC1151EC4F6E761709FD6ABDC84D9C36046811F54DC86D293D16D235DC712BF7346CDAC005AE5C0DCD96480C9BD0CF7C4BD50026553E27F957B6640BA6A87C6642FF3D97A3E63DA468276E3A22C0C3F2A1CFFB4F190D5E23700BB468EA31FD3EB87B44B51BDABDB0667FCFB618CECFB2BC440A5F2E237E93A6DFF96AB3561AF5EE1BDA21720129FF2123F7038C70B4CADF1BC70B2EF5EBC264E1E3B2A4B3780D4A11507D03A498A556A923B0EFAF90D024341A47818F03D5ADD961086C2573DABF02C4E2F303817D323E1D8D88EFBE3F5E0D6688593C65254907745CA6176C8ED7D6B830875A0BA8FFEEB1882742A4553E4E55A93A7AD4F3224B7BFA03E29C77DB0FCCE0E37E6D3A64C5555ED9555FA1E2C34EC04DA3B6E0AAA7BF64879BC4724859FE806E7DC49A5394AD3D01492F05AE69CF10C67B18BDFF8E877FB3DDFBB7 +20150521004745 2 6 100 6143 2 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F52665F2B +20150521003352 2 6 100 6143 5 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F57C7B577 +20150521005557 2 6 100 6143 5 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F591BBC57 +20150521014228 2 6 100 6143 5 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F5BDF5CE7 +20150521015455 2 6 100 6143 5 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F5C9CFD1F +20150521001701 2 6 100 6143 2 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F5CF6FF9B +20150521002558 2 6 100 6143 2 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F5D7C4FE3 +20150521003319 2 6 100 6143 2 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F5DE41DFB +20150521003721 2 6 100 6143 5 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F5E1B5FAF +20150521010943 2 6 100 6143 5 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F600B866F +20150521014141 2 6 100 6143 2 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F61F01EC3 +20150521010312 2 6 100 6143 2 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F65EAB753 +20150521002914 2 6 100 6143 5 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F69FD9357 +20150521011058 2 6 100 6143 2 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F6C6B8513 +20150521013628 2 6 100 6143 5 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F6DE7D9EF +20150521015040 2 6 100 6143 5 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F6EB0C897 +20150521001307 2 6 100 6143 2 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F6F15473B +20150521012712 2 6 100 6143 2 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F7377044B +20150521005218 2 6 100 6143 2 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F7767DEA3 +20150521003512 2 6 100 6143 5 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F7C5546F7 +20150521005420 2 6 100 6143 2 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F7D68EDC3 +20150521011347 2 6 100 6143 2 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F7E859CF3 +20150521002429 2 6 100 6143 5 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F819A93E7 +20150521004826 2 6 100 6143 5 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F88D91A57 +20150521010541 2 6 100 6143 5 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F89D29B9F +20150521012418 2 6 100 6143 5 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F8ADC38F7 +20150521015506 2 6 100 6143 2 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F8C91980B +20150521004000 2 6 100 6143 5 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F8E369B97 +20150521005659 2 6 100 6143 2 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F8F2B1BEB +20150521010328 2 6 100 6143 2 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F8F7DD1D3 +20150521011152 2 6 100 6143 2 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F8FF052BB +20150521001457 2 6 100 6143 2 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F92940463 +20150521011129 2 6 100 6143 2 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F95C47DCB +20150521013515 2 6 100 6143 2 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F9710A103 +20150521013841 2 6 100 6143 5 D9F2DC4F4AB3E451AB7781730AE26AE5AB1927A8F93D05C7765C4F23947CBAD218690437DDE587137100CA657CB902597743E8B05CB9B821A48E081C451227F5E42404534A28EE1D0A52FA903FBB15B79139D130420B8C7BD2477CDF0C06CF4C9943DF76A74C3B503B2229A5628E13983B0426A10FD164A720488DE3A1639D004B694ADB5216C21F481519865529CE6E3C9C8B89AC00FBF2B4C1F0B0033AC2A5072A157B5D4346950917B055227557FF1EB5F0873D75E648BEE4B6F88D4B228CB89C7602E34F85BF86DDBD09CA39993C73FF59B0310754F0D24740316F7D8D21D67EC65C8715B7130EBC8E19EB712990BBB30D650ACB0B7864B632ABBC2AEE7221393A5C74B043568043480DB41821A0CE1E6D271456C2FDC243D39868FB0D7BDA3FAD5894F7DCBBC5751B77B3DF99F6E8A5BD7A5B82F594E3E0CA2BBF7DA74312227B323652E6856B597326206CAFF2380C23CF94B8CD3EAA56BE60F8C372887CD37A62FC6F5FD467ED96E7CD9C285E75C2C353E520DFB3F39FE7B8E35FFB485B1B043F52321675EDF4848266997D059810F71D21E9DB3E3AB1BCE3713DB67155F41B7C21939B285AB63DBF1770228E4EE36314310D89200F132E8ECF2968CDA0E57DBBCE589E4DDBAD009994A817032EFA52F0659A319FBD813901BF5847EC2D7979CBA5870F3DA25BE09673952628E1EA70C82EC0BE67B402E48DF85C5983516BBEEAB811D1ECAB02928D4087B826139D073501149D47B3339CDA763840E4492661FFEF96C81C816B862EEE820019CD83C93BF9DFF8EC8C59331780D5D86B164EC12BBE59F4C9E62FD7819A941D10AFE32179B2361A17618FA84864F58C09AECB817E67BC352371BB7D7F8209E4EB9002013A585092D4721B1CB464A8480CC76173989144EF51692E373E9CCEAC9807EF190D6BBDD3BB0D16CA87DC6A54890D6F074ABD83E3CF077F2F592C0745BE15D7D6871552BB6139E5CF70D684C6D1D0C4516733E0639BBEC847313BE3D1D923B6A5FAF43A5341DD8C0779881BEB92736BA4F18BD6CDC1FC922B3809ED244748101A6C7E30DDE0C232FA3F9733A497 +20150521041810 2 6 100 7679 5 D67DA234F46097F7EE3B230456E7C895BCA86395DF43D60D9D587C64EA4525FBCAD22442143068578CE8ECC8280B2D81F747B484AA668FFCDBEB067EB824B42E5FA1A40BC08EE8CC4A064298CB31C36340951EC7A006878C79C80068196180DA31E1DEF79A72B2D059203DDE461485D1B9783AF79E981CDAEF88589D8343E5B52D96FE90EA13194AFAF7459B17B80971720357ABD09CFE992966FFC1C239821C910F55D69E44277E5DE9841F4E5B2D25D6A265D321059B762F7D6AC5F0E260DEEB628D32940002B219B354486CC5BBF6390F19899EA5E145A28487029DF0517564A81FA10FA60AFA04CE77794775392829DB636E7F5EE00868D5027A6BA75CA922CEF3CA78683D14AB2E58439789033ACF441236F5E3C7849E3662B5123304F82D0061EA9C18EA1676A736FFD628AE982CCEAB8979568C43FB34207E0DEC7D8A6AA391846C910F77771ECF2D0531A234D3798BC1B1433091A895E23A77792F4BE403D526F1D260A3627F2E80E863A204A774F58D7DE2C5C4A7E463A46BC436F0B7AF07179EC334D31073BF035FD94454ECD54146473F786EA15A1CEBB3B9C0D282195AD612D33B31F5528DAB5231CB17A3DE9AB5C8BD7BF8F773C255845BC9B70A1E53A50E5AEA801FFE604A2B2C1FBE86A2A883632E7AE75ADA007FB6AB1AA529DE3151CAA8D1D07FA19EFF5679398340E720CF2CFC4E1AEDD73C44983CC8E610DD419AE2E88206573837D6E44018D9498B62F9C0B8EA7741450FC7DBFF7C546D3CBCBA5B9123577FD5531880A18F1275F9181A922803D8F03512C58B5FBBC41CE8095EDD920A3E36CEB6EDB56900E6CEC2928288909D61B3B426EBC54F0A69C261A848B358C3A8E332567B9FFC1A7A07E9414BB1F75DE0795CF87632F5D6A87A246FD4E98E70489F779FE99C5BC4DB24BFA860C3551888FC721CDBC6AB5783B02BEF893E0984B6FDB5142A1AFD3277FE8F36B87849BC00B3FB3ADAFE4EDAE4839B83894C27FEF93514D7E3FFB7A30E99C6875D96C582E81D45FB463DC37B8791FC28A759301FC2F9879960C82BC7C427382A41B9AEFAC0051A2C653E55A47B48860CDA32812A192C1508A6C012C7E4BBAB1619B7926549FD8CE27928618F035BE31D56CBC9586D88E00DA69341F6F01554E205344E49E8871CCF80F9FF5CB54479AFA66806DD02FAFEE7D43572B3AA22742635FE65BFC8004960DC679FC7F8C0E5B50B3CE1E446B7A5E189BB9AAFA06FEC472D6E67EA4905373A01A2B662F534131405FBAB9BBAE892F0C265439EA1ABC91B186B5AC1E53A0C786607B1069BC026359955CFD614D7F80DF416A08AB18991A0398A83DF3CF2D65D7BE934407F +20150521070624 2 6 100 7679 5 D67DA234F46097F7EE3B230456E7C895BCA86395DF43D60D9D587C64EA4525FBCAD22442143068578CE8ECC8280B2D81F747B484AA668FFCDBEB067EB824B42E5FA1A40BC08EE8CC4A064298CB31C36340951EC7A006878C79C80068196180DA31E1DEF79A72B2D059203DDE461485D1B9783AF79E981CDAEF88589D8343E5B52D96FE90EA13194AFAF7459B17B80971720357ABD09CFE992966FFC1C239821C910F55D69E44277E5DE9841F4E5B2D25D6A265D321059B762F7D6AC5F0E260DEEB628D32940002B219B354486CC5BBF6390F19899EA5E145A28487029DF0517564A81FA10FA60AFA04CE77794775392829DB636E7F5EE00868D5027A6BA75CA922CEF3CA78683D14AB2E58439789033ACF441236F5E3C7849E3662B5123304F82D0061EA9C18EA1676A736FFD628AE982CCEAB8979568C43FB34207E0DEC7D8A6AA391846C910F77771ECF2D0531A234D3798BC1B1433091A895E23A77792F4BE403D526F1D260A3627F2E80E863A204A774F58D7DE2C5C4A7E463A46BC436F0B7AF07179EC334D31073BF035FD94454ECD54146473F786EA15A1CEBB3B9C0D282195AD612D33B31F5528DAB5231CB17A3DE9AB5C8BD7BF8F773C255845BC9B70A1E53A50E5AEA801FFE604A2B2C1FBE86A2A883632E7AE75ADA007FB6AB1AA529DE3151CAA8D1D07FA19EFF5679398340E720CF2CFC4E1AEDD73C44983CC8E610DD419AE2E88206573837D6E44018D9498B62F9C0B8EA7741450FC7DBFF7C546D3CBCBA5B9123577FD5531880A18F1275F9181A922803D8F03512C58B5FBBC41CE8095EDD920A3E36CEB6EDB56900E6CEC2928288909D61B3B426EBC54F0A69C261A848B358C3A8E332567B9FFC1A7A07E9414BB1F75DE0795CF87632F5D6A87A246FD4E98E70489F779FE99C5BC4DB24BFA860C3551888FC721CDBC6AB5783B02BEF893E0984B6FDB5142A1AFD3277FE8F36B87849BC00B3FB3ADAFE4EDAE4839B83894C27FEF93514D7E3FFB7A30E99C6875D96C582E81D45FB463DC37B8791FC28A759301FC2F9879960C82BC7C427382A41B9AEFAC0051A2C653E55A47B48860CDA32812A192C1508A6C012C7E4BBAB1619B7926549FD8CE27928618F035BE31D56CBC9586D88E00DA69341F6F01554E205344E49E8871CCF80F9FF5CB54479AFA66806DD02FAFEE7D43572B3AA22742635FE65BFC8004960DC679FC7F8C0E5B50B3CE1E446B7A5E189BB9AAFA06FEC472D6E67EA4905373A01A2B662F534131405FBAB9BBAE892F0C265439EA1ABC91B186B5AC1E53A0C786607B1069BC026359955CFD614D7F80DF416A08AB18991A0398A83DF3CF2D65D7BEEB1E407 +20150521051555 2 6 100 7679 2 D67DA234F46097F7EE3B230456E7C895BCA86395DF43D60D9D587C64EA4525FBCAD22442143068578CE8ECC8280B2D81F747B484AA668FFCDBEB067EB824B42E5FA1A40BC08EE8CC4A064298CB31C36340951EC7A006878C79C80068196180DA31E1DEF79A72B2D059203DDE461485D1B9783AF79E981CDAEF88589D8343E5B52D96FE90EA13194AFAF7459B17B80971720357ABD09CFE992966FFC1C239821C910F55D69E44277E5DE9841F4E5B2D25D6A265D321059B762F7D6AC5F0E260DEEB628D32940002B219B354486CC5BBF6390F19899EA5E145A28487029DF0517564A81FA10FA60AFA04CE77794775392829DB636E7F5EE00868D5027A6BA75CA922CEF3CA78683D14AB2E58439789033ACF441236F5E3C7849E3662B5123304F82D0061EA9C18EA1676A736FFD628AE982CCEAB8979568C43FB34207E0DEC7D8A6AA391846C910F77771ECF2D0531A234D3798BC1B1433091A895E23A77792F4BE403D526F1D260A3627F2E80E863A204A774F58D7DE2C5C4A7E463A46BC436F0B7AF07179EC334D31073BF035FD94454ECD54146473F786EA15A1CEBB3B9C0D282195AD612D33B31F5528DAB5231CB17A3DE9AB5C8BD7BF8F773C255845BC9B70A1E53A50E5AEA801FFE604A2B2C1FBE86A2A883632E7AE75ADA007FB6AB1AA529DE3151CAA8D1D07FA19EFF5679398340E720CF2CFC4E1AEDD73C44983CC8E610DD419AE2E88206573837D6E44018D9498B62F9C0B8EA7741450FC7DBFF7C546D3CBCBA5B9123577FD5531880A18F1275F9181A922803D8F03512C58B5FBBC41CE8095EDD920A3E36CEB6EDB56900E6CEC2928288909D61B3B426EBC54F0A69C261A848B358C3A8E332567B9FFC1A7A07E9414BB1F75DE0795CF87632F5D6A87A246FD4E98E70489F779FE99C5BC4DB24BFA860C3551888FC721CDBC6AB5783B02BEF893E0984B6FDB5142A1AFD3277FE8F36B87849BC00B3FB3ADAFE4EDAE4839B83894C27FEF93514D7E3FFB7A30E99C6875D96C582E81D45FB463DC37B8791FC28A759301FC2F9879960C82BC7C427382A41B9AEFAC0051A2C653E55A47B48860CDA32812A192C1508A6C012C7E4BBAB1619B7926549FD8CE27928618F035BE31D56CBC9586D88E00DA69341F6F01554E205344E49E8871CCF80F9FF5CB54479AFA66806DD02FAFEE7D43572B3AA22742635FE65BFC8004960DC679FC7F8C0E5B50B3CE1E446B7A5E189BB9AAFA06FEC472D6E67EA4905373A01A2B662F534131405FBAB9BBAE892F0C265439EA1ABC91B186B5AC1E53A0C786607B1069BC026359955CFD614D7F80DF416A08AB18991A0398A83DF3CF2D65D7BF50EEEC3 +20150521061258 2 6 100 7679 5 D67DA234F46097F7EE3B230456E7C895BCA86395DF43D60D9D587C64EA4525FBCAD22442143068578CE8ECC8280B2D81F747B484AA668FFCDBEB067EB824B42E5FA1A40BC08EE8CC4A064298CB31C36340951EC7A006878C79C80068196180DA31E1DEF79A72B2D059203DDE461485D1B9783AF79E981CDAEF88589D8343E5B52D96FE90EA13194AFAF7459B17B80971720357ABD09CFE992966FFC1C239821C910F55D69E44277E5DE9841F4E5B2D25D6A265D321059B762F7D6AC5F0E260DEEB628D32940002B219B354486CC5BBF6390F19899EA5E145A28487029DF0517564A81FA10FA60AFA04CE77794775392829DB636E7F5EE00868D5027A6BA75CA922CEF3CA78683D14AB2E58439789033ACF441236F5E3C7849E3662B5123304F82D0061EA9C18EA1676A736FFD628AE982CCEAB8979568C43FB34207E0DEC7D8A6AA391846C910F77771ECF2D0531A234D3798BC1B1433091A895E23A77792F4BE403D526F1D260A3627F2E80E863A204A774F58D7DE2C5C4A7E463A46BC436F0B7AF07179EC334D31073BF035FD94454ECD54146473F786EA15A1CEBB3B9C0D282195AD612D33B31F5528DAB5231CB17A3DE9AB5C8BD7BF8F773C255845BC9B70A1E53A50E5AEA801FFE604A2B2C1FBE86A2A883632E7AE75ADA007FB6AB1AA529DE3151CAA8D1D07FA19EFF5679398340E720CF2CFC4E1AEDD73C44983CC8E610DD419AE2E88206573837D6E44018D9498B62F9C0B8EA7741450FC7DBFF7C546D3CBCBA5B9123577FD5531880A18F1275F9181A922803D8F03512C58B5FBBC41CE8095EDD920A3E36CEB6EDB56900E6CEC2928288909D61B3B426EBC54F0A69C261A848B358C3A8E332567B9FFC1A7A07E9414BB1F75DE0795CF87632F5D6A87A246FD4E98E70489F779FE99C5BC4DB24BFA860C3551888FC721CDBC6AB5783B02BEF893E0984B6FDB5142A1AFD3277FE8F36B87849BC00B3FB3ADAFE4EDAE4839B83894C27FEF93514D7E3FFB7A30E99C6875D96C582E81D45FB463DC37B8791FC28A759301FC2F9879960C82BC7C427382A41B9AEFAC0051A2C653E55A47B48860CDA32812A192C1508A6C012C7E4BBAB1619B7926549FD8CE27928618F035BE31D56CBC9586D88E00DA69341F6F01554E205344E49E8871CCF80F9FF5CB54479AFA66806DD02FAFEE7D43572B3AA22742635FE65BFC8004960DC679FC7F8C0E5B50B3CE1E446B7A5E189BB9AAFA06FEC472D6E67EA4905373A01A2B662F534131405FBAB9BBAE892F0C265439EA1ABC91B186B5AC1E53A0C786607B1069BC026359955CFD614D7F80DF416A08AB18991A0398A83DF3CF2D65D7C00AF225F +20150521034225 2 6 100 7679 2 D67DA234F46097F7EE3B230456E7C895BCA86395DF43D60D9D587C64EA4525FBCAD22442143068578CE8ECC8280B2D81F747B484AA668FFCDBEB067EB824B42E5FA1A40BC08EE8CC4A064298CB31C36340951EC7A006878C79C80068196180DA31E1DEF79A72B2D059203DDE461485D1B9783AF79E981CDAEF88589D8343E5B52D96FE90EA13194AFAF7459B17B80971720357ABD09CFE992966FFC1C239821C910F55D69E44277E5DE9841F4E5B2D25D6A265D321059B762F7D6AC5F0E260DEEB628D32940002B219B354486CC5BBF6390F19899EA5E145A28487029DF0517564A81FA10FA60AFA04CE77794775392829DB636E7F5EE00868D5027A6BA75CA922CEF3CA78683D14AB2E58439789033ACF441236F5E3C7849E3662B5123304F82D0061EA9C18EA1676A736FFD628AE982CCEAB8979568C43FB34207E0DEC7D8A6AA391846C910F77771ECF2D0531A234D3798BC1B1433091A895E23A77792F4BE403D526F1D260A3627F2E80E863A204A774F58D7DE2C5C4A7E463A46BC436F0B7AF07179EC334D31073BF035FD94454ECD54146473F786EA15A1CEBB3B9C0D282195AD612D33B31F5528DAB5231CB17A3DE9AB5C8BD7BF8F773C255845BC9B70A1E53A50E5AEA801FFE604A2B2C1FBE86A2A883632E7AE75ADA007FB6AB1AA529DE3151CAA8D1D07FA19EFF5679398340E720CF2CFC4E1AEDD73C44983CC8E610DD419AE2E88206573837D6E44018D9498B62F9C0B8EA7741450FC7DBFF7C546D3CBCBA5B9123577FD5531880A18F1275F9181A922803D8F03512C58B5FBBC41CE8095EDD920A3E36CEB6EDB56900E6CEC2928288909D61B3B426EBC54F0A69C261A848B358C3A8E332567B9FFC1A7A07E9414BB1F75DE0795CF87632F5D6A87A246FD4E98E70489F779FE99C5BC4DB24BFA860C3551888FC721CDBC6AB5783B02BEF893E0984B6FDB5142A1AFD3277FE8F36B87849BC00B3FB3ADAFE4EDAE4839B83894C27FEF93514D7E3FFB7A30E99C6875D96C582E81D45FB463DC37B8791FC28A759301FC2F9879960C82BC7C427382A41B9AEFAC0051A2C653E55A47B48860CDA32812A192C1508A6C012C7E4BBAB1619B7926549FD8CE27928618F035BE31D56CBC9586D88E00DA69341F6F01554E205344E49E8871CCF80F9FF5CB54479AFA66806DD02FAFEE7D43572B3AA22742635FE65BFC8004960DC679FC7F8C0E5B50B3CE1E446B7A5E189BB9AAFA06FEC472D6E67EA4905373A01A2B662F534131405FBAB9BBAE892F0C265439EA1ABC91B186B5AC1E53A0C786607B1069BC026359955CFD614D7F80DF416A08AB18991A0398A83DF3CF2D65D7C058D5963 +20150521035956 2 6 100 7679 5 D67DA234F46097F7EE3B230456E7C895BCA86395DF43D60D9D587C64EA4525FBCAD22442143068578CE8ECC8280B2D81F747B484AA668FFCDBEB067EB824B42E5FA1A40BC08EE8CC4A064298CB31C36340951EC7A006878C79C80068196180DA31E1DEF79A72B2D059203DDE461485D1B9783AF79E981CDAEF88589D8343E5B52D96FE90EA13194AFAF7459B17B80971720357ABD09CFE992966FFC1C239821C910F55D69E44277E5DE9841F4E5B2D25D6A265D321059B762F7D6AC5F0E260DEEB628D32940002B219B354486CC5BBF6390F19899EA5E145A28487029DF0517564A81FA10FA60AFA04CE77794775392829DB636E7F5EE00868D5027A6BA75CA922CEF3CA78683D14AB2E58439789033ACF441236F5E3C7849E3662B5123304F82D0061EA9C18EA1676A736FFD628AE982CCEAB8979568C43FB34207E0DEC7D8A6AA391846C910F77771ECF2D0531A234D3798BC1B1433091A895E23A77792F4BE403D526F1D260A3627F2E80E863A204A774F58D7DE2C5C4A7E463A46BC436F0B7AF07179EC334D31073BF035FD94454ECD54146473F786EA15A1CEBB3B9C0D282195AD612D33B31F5528DAB5231CB17A3DE9AB5C8BD7BF8F773C255845BC9B70A1E53A50E5AEA801FFE604A2B2C1FBE86A2A883632E7AE75ADA007FB6AB1AA529DE3151CAA8D1D07FA19EFF5679398340E720CF2CFC4E1AEDD73C44983CC8E610DD419AE2E88206573837D6E44018D9498B62F9C0B8EA7741450FC7DBFF7C546D3CBCBA5B9123577FD5531880A18F1275F9181A922803D8F03512C58B5FBBC41CE8095EDD920A3E36CEB6EDB56900E6CEC2928288909D61B3B426EBC54F0A69C261A848B358C3A8E332567B9FFC1A7A07E9414BB1F75DE0795CF87632F5D6A87A246FD4E98E70489F779FE99C5BC4DB24BFA860C3551888FC721CDBC6AB5783B02BEF893E0984B6FDB5142A1AFD3277FE8F36B87849BC00B3FB3ADAFE4EDAE4839B83894C27FEF93514D7E3FFB7A30E99C6875D96C582E81D45FB463DC37B8791FC28A759301FC2F9879960C82BC7C427382A41B9AEFAC0051A2C653E55A47B48860CDA32812A192C1508A6C012C7E4BBAB1619B7926549FD8CE27928618F035BE31D56CBC9586D88E00DA69341F6F01554E205344E49E8871CCF80F9FF5CB54479AFA66806DD02FAFEE7D43572B3AA22742635FE65BFC8004960DC679FC7F8C0E5B50B3CE1E446B7A5E189BB9AAFA06FEC472D6E67EA4905373A01A2B662F534131405FBAB9BBAE892F0C265439EA1ABC91B186B5AC1E53A0C786607B1069BC026359955CFD614D7F80DF416A08AB18991A0398A83DF3CF2D65D7C0616723F +20150521054248 2 6 100 7679 5 D67DA234F46097F7EE3B230456E7C895BCA86395DF43D60D9D587C64EA4525FBCAD22442143068578CE8ECC8280B2D81F747B484AA668FFCDBEB067EB824B42E5FA1A40BC08EE8CC4A064298CB31C36340951EC7A006878C79C80068196180DA31E1DEF79A72B2D059203DDE461485D1B9783AF79E981CDAEF88589D8343E5B52D96FE90EA13194AFAF7459B17B80971720357ABD09CFE992966FFC1C239821C910F55D69E44277E5DE9841F4E5B2D25D6A265D321059B762F7D6AC5F0E260DEEB628D32940002B219B354486CC5BBF6390F19899EA5E145A28487029DF0517564A81FA10FA60AFA04CE77794775392829DB636E7F5EE00868D5027A6BA75CA922CEF3CA78683D14AB2E58439789033ACF441236F5E3C7849E3662B5123304F82D0061EA9C18EA1676A736FFD628AE982CCEAB8979568C43FB34207E0DEC7D8A6AA391846C910F77771ECF2D0531A234D3798BC1B1433091A895E23A77792F4BE403D526F1D260A3627F2E80E863A204A774F58D7DE2C5C4A7E463A46BC436F0B7AF07179EC334D31073BF035FD94454ECD54146473F786EA15A1CEBB3B9C0D282195AD612D33B31F5528DAB5231CB17A3DE9AB5C8BD7BF8F773C255845BC9B70A1E53A50E5AEA801FFE604A2B2C1FBE86A2A883632E7AE75ADA007FB6AB1AA529DE3151CAA8D1D07FA19EFF5679398340E720CF2CFC4E1AEDD73C44983CC8E610DD419AE2E88206573837D6E44018D9498B62F9C0B8EA7741450FC7DBFF7C546D3CBCBA5B9123577FD5531880A18F1275F9181A922803D8F03512C58B5FBBC41CE8095EDD920A3E36CEB6EDB56900E6CEC2928288909D61B3B426EBC54F0A69C261A848B358C3A8E332567B9FFC1A7A07E9414BB1F75DE0795CF87632F5D6A87A246FD4E98E70489F779FE99C5BC4DB24BFA860C3551888FC721CDBC6AB5783B02BEF893E0984B6FDB5142A1AFD3277FE8F36B87849BC00B3FB3ADAFE4EDAE4839B83894C27FEF93514D7E3FFB7A30E99C6875D96C582E81D45FB463DC37B8791FC28A759301FC2F9879960C82BC7C427382A41B9AEFAC0051A2C653E55A47B48860CDA32812A192C1508A6C012C7E4BBAB1619B7926549FD8CE27928618F035BE31D56CBC9586D88E00DA69341F6F01554E205344E49E8871CCF80F9FF5CB54479AFA66806DD02FAFEE7D43572B3AA22742635FE65BFC8004960DC679FC7F8C0E5B50B3CE1E446B7A5E189BB9AAFA06FEC472D6E67EA4905373A01A2B662F534131405FBAB9BBAE892F0C265439EA1ABC91B186B5AC1E53A0C786607B1069BC026359955CFD614D7F80DF416A08AB18991A0398A83DF3CF2D65D7C12F16C3F +20150521060112 2 6 100 7679 2 D67DA234F46097F7EE3B230456E7C895BCA86395DF43D60D9D587C64EA4525FBCAD22442143068578CE8ECC8280B2D81F747B484AA668FFCDBEB067EB824B42E5FA1A40BC08EE8CC4A064298CB31C36340951EC7A006878C79C80068196180DA31E1DEF79A72B2D059203DDE461485D1B9783AF79E981CDAEF88589D8343E5B52D96FE90EA13194AFAF7459B17B80971720357ABD09CFE992966FFC1C239821C910F55D69E44277E5DE9841F4E5B2D25D6A265D321059B762F7D6AC5F0E260DEEB628D32940002B219B354486CC5BBF6390F19899EA5E145A28487029DF0517564A81FA10FA60AFA04CE77794775392829DB636E7F5EE00868D5027A6BA75CA922CEF3CA78683D14AB2E58439789033ACF441236F5E3C7849E3662B5123304F82D0061EA9C18EA1676A736FFD628AE982CCEAB8979568C43FB34207E0DEC7D8A6AA391846C910F77771ECF2D0531A234D3798BC1B1433091A895E23A77792F4BE403D526F1D260A3627F2E80E863A204A774F58D7DE2C5C4A7E463A46BC436F0B7AF07179EC334D31073BF035FD94454ECD54146473F786EA15A1CEBB3B9C0D282195AD612D33B31F5528DAB5231CB17A3DE9AB5C8BD7BF8F773C255845BC9B70A1E53A50E5AEA801FFE604A2B2C1FBE86A2A883632E7AE75ADA007FB6AB1AA529DE3151CAA8D1D07FA19EFF5679398340E720CF2CFC4E1AEDD73C44983CC8E610DD419AE2E88206573837D6E44018D9498B62F9C0B8EA7741450FC7DBFF7C546D3CBCBA5B9123577FD5531880A18F1275F9181A922803D8F03512C58B5FBBC41CE8095EDD920A3E36CEB6EDB56900E6CEC2928288909D61B3B426EBC54F0A69C261A848B358C3A8E332567B9FFC1A7A07E9414BB1F75DE0795CF87632F5D6A87A246FD4E98E70489F779FE99C5BC4DB24BFA860C3551888FC721CDBC6AB5783B02BEF893E0984B6FDB5142A1AFD3277FE8F36B87849BC00B3FB3ADAFE4EDAE4839B83894C27FEF93514D7E3FFB7A30E99C6875D96C582E81D45FB463DC37B8791FC28A759301FC2F9879960C82BC7C427382A41B9AEFAC0051A2C653E55A47B48860CDA32812A192C1508A6C012C7E4BBAB1619B7926549FD8CE27928618F035BE31D56CBC9586D88E00DA69341F6F01554E205344E49E8871CCF80F9FF5CB54479AFA66806DD02FAFEE7D43572B3AA22742635FE65BFC8004960DC679FC7F8C0E5B50B3CE1E446B7A5E189BB9AAFA06FEC472D6E67EA4905373A01A2B662F534131405FBAB9BBAE892F0C265439EA1ABC91B186B5AC1E53A0C786607B1069BC026359955CFD614D7F80DF416A08AB18991A0398A83DF3CF2D65D7C1379EA23 +20150521023340 2 6 100 7679 2 D67DA234F46097F7EE3B230456E7C895BCA86395DF43D60D9D587C64EA4525FBCAD22442143068578CE8ECC8280B2D81F747B484AA668FFCDBEB067EB824B42E5FA1A40BC08EE8CC4A064298CB31C36340951EC7A006878C79C80068196180DA31E1DEF79A72B2D059203DDE461485D1B9783AF79E981CDAEF88589D8343E5B52D96FE90EA13194AFAF7459B17B80971720357ABD09CFE992966FFC1C239821C910F55D69E44277E5DE9841F4E5B2D25D6A265D321059B762F7D6AC5F0E260DEEB628D32940002B219B354486CC5BBF6390F19899EA5E145A28487029DF0517564A81FA10FA60AFA04CE77794775392829DB636E7F5EE00868D5027A6BA75CA922CEF3CA78683D14AB2E58439789033ACF441236F5E3C7849E3662B5123304F82D0061EA9C18EA1676A736FFD628AE982CCEAB8979568C43FB34207E0DEC7D8A6AA391846C910F77771ECF2D0531A234D3798BC1B1433091A895E23A77792F4BE403D526F1D260A3627F2E80E863A204A774F58D7DE2C5C4A7E463A46BC436F0B7AF07179EC334D31073BF035FD94454ECD54146473F786EA15A1CEBB3B9C0D282195AD612D33B31F5528DAB5231CB17A3DE9AB5C8BD7BF8F773C255845BC9B70A1E53A50E5AEA801FFE604A2B2C1FBE86A2A883632E7AE75ADA007FB6AB1AA529DE3151CAA8D1D07FA19EFF5679398340E720CF2CFC4E1AEDD73C44983CC8E610DD419AE2E88206573837D6E44018D9498B62F9C0B8EA7741450FC7DBFF7C546D3CBCBA5B9123577FD5531880A18F1275F9181A922803D8F03512C58B5FBBC41CE8095EDD920A3E36CEB6EDB56900E6CEC2928288909D61B3B426EBC54F0A69C261A848B358C3A8E332567B9FFC1A7A07E9414BB1F75DE0795CF87632F5D6A87A246FD4E98E70489F779FE99C5BC4DB24BFA860C3551888FC721CDBC6AB5783B02BEF893E0984B6FDB5142A1AFD3277FE8F36B87849BC00B3FB3ADAFE4EDAE4839B83894C27FEF93514D7E3FFB7A30E99C6875D96C582E81D45FB463DC37B8791FC28A759301FC2F9879960C82BC7C427382A41B9AEFAC0051A2C653E55A47B48860CDA32812A192C1508A6C012C7E4BBAB1619B7926549FD8CE27928618F035BE31D56CBC9586D88E00DA69341F6F01554E205344E49E8871CCF80F9FF5CB54479AFA66806DD02FAFEE7D43572B3AA22742635FE65BFC8004960DC679FC7F8C0E5B50B3CE1E446B7A5E189BB9AAFA06FEC472D6E67EA4905373A01A2B662F534131405FBAB9BBAE892F0C265439EA1ABC91B186B5AC1E53A0C786607B1069BC026359955CFD614D7F80DF416A08AB18991A0398A83DF3CF2D65D7C165F2773 +20150521043505 2 6 100 7679 5 D67DA234F46097F7EE3B230456E7C895BCA86395DF43D60D9D587C64EA4525FBCAD22442143068578CE8ECC8280B2D81F747B484AA668FFCDBEB067EB824B42E5FA1A40BC08EE8CC4A064298CB31C36340951EC7A006878C79C80068196180DA31E1DEF79A72B2D059203DDE461485D1B9783AF79E981CDAEF88589D8343E5B52D96FE90EA13194AFAF7459B17B80971720357ABD09CFE992966FFC1C239821C910F55D69E44277E5DE9841F4E5B2D25D6A265D321059B762F7D6AC5F0E260DEEB628D32940002B219B354486CC5BBF6390F19899EA5E145A28487029DF0517564A81FA10FA60AFA04CE77794775392829DB636E7F5EE00868D5027A6BA75CA922CEF3CA78683D14AB2E58439789033ACF441236F5E3C7849E3662B5123304F82D0061EA9C18EA1676A736FFD628AE982CCEAB8979568C43FB34207E0DEC7D8A6AA391846C910F77771ECF2D0531A234D3798BC1B1433091A895E23A77792F4BE403D526F1D260A3627F2E80E863A204A774F58D7DE2C5C4A7E463A46BC436F0B7AF07179EC334D31073BF035FD94454ECD54146473F786EA15A1CEBB3B9C0D282195AD612D33B31F5528DAB5231CB17A3DE9AB5C8BD7BF8F773C255845BC9B70A1E53A50E5AEA801FFE604A2B2C1FBE86A2A883632E7AE75ADA007FB6AB1AA529DE3151CAA8D1D07FA19EFF5679398340E720CF2CFC4E1AEDD73C44983CC8E610DD419AE2E88206573837D6E44018D9498B62F9C0B8EA7741450FC7DBFF7C546D3CBCBA5B9123577FD5531880A18F1275F9181A922803D8F03512C58B5FBBC41CE8095EDD920A3E36CEB6EDB56900E6CEC2928288909D61B3B426EBC54F0A69C261A848B358C3A8E332567B9FFC1A7A07E9414BB1F75DE0795CF87632F5D6A87A246FD4E98E70489F779FE99C5BC4DB24BFA860C3551888FC721CDBC6AB5783B02BEF893E0984B6FDB5142A1AFD3277FE8F36B87849BC00B3FB3ADAFE4EDAE4839B83894C27FEF93514D7E3FFB7A30E99C6875D96C582E81D45FB463DC37B8791FC28A759301FC2F9879960C82BC7C427382A41B9AEFAC0051A2C653E55A47B48860CDA32812A192C1508A6C012C7E4BBAB1619B7926549FD8CE27928618F035BE31D56CBC9586D88E00DA69341F6F01554E205344E49E8871CCF80F9FF5CB54479AFA66806DD02FAFEE7D43572B3AA22742635FE65BFC8004960DC679FC7F8C0E5B50B3CE1E446B7A5E189BB9AAFA06FEC472D6E67EA4905373A01A2B662F534131405FBAB9BBAE892F0C265439EA1ABC91B186B5AC1E53A0C786607B1069BC026359955CFD614D7F80DF416A08AB18991A0398A83DF3CF2D65D7C1A3EC717 +20150521024626 2 6 100 7679 2 D67DA234F46097F7EE3B230456E7C895BCA86395DF43D60D9D587C64EA4525FBCAD22442143068578CE8ECC8280B2D81F747B484AA668FFCDBEB067EB824B42E5FA1A40BC08EE8CC4A064298CB31C36340951EC7A006878C79C80068196180DA31E1DEF79A72B2D059203DDE461485D1B9783AF79E981CDAEF88589D8343E5B52D96FE90EA13194AFAF7459B17B80971720357ABD09CFE992966FFC1C239821C910F55D69E44277E5DE9841F4E5B2D25D6A265D321059B762F7D6AC5F0E260DEEB628D32940002B219B354486CC5BBF6390F19899EA5E145A28487029DF0517564A81FA10FA60AFA04CE77794775392829DB636E7F5EE00868D5027A6BA75CA922CEF3CA78683D14AB2E58439789033ACF441236F5E3C7849E3662B5123304F82D0061EA9C18EA1676A736FFD628AE982CCEAB8979568C43FB34207E0DEC7D8A6AA391846C910F77771ECF2D0531A234D3798BC1B1433091A895E23A77792F4BE403D526F1D260A3627F2E80E863A204A774F58D7DE2C5C4A7E463A46BC436F0B7AF07179EC334D31073BF035FD94454ECD54146473F786EA15A1CEBB3B9C0D282195AD612D33B31F5528DAB5231CB17A3DE9AB5C8BD7BF8F773C255845BC9B70A1E53A50E5AEA801FFE604A2B2C1FBE86A2A883632E7AE75ADA007FB6AB1AA529DE3151CAA8D1D07FA19EFF5679398340E720CF2CFC4E1AEDD73C44983CC8E610DD419AE2E88206573837D6E44018D9498B62F9C0B8EA7741450FC7DBFF7C546D3CBCBA5B9123577FD5531880A18F1275F9181A922803D8F03512C58B5FBBC41CE8095EDD920A3E36CEB6EDB56900E6CEC2928288909D61B3B426EBC54F0A69C261A848B358C3A8E332567B9FFC1A7A07E9414BB1F75DE0795CF87632F5D6A87A246FD4E98E70489F779FE99C5BC4DB24BFA860C3551888FC721CDBC6AB5783B02BEF893E0984B6FDB5142A1AFD3277FE8F36B87849BC00B3FB3ADAFE4EDAE4839B83894C27FEF93514D7E3FFB7A30E99C6875D96C582E81D45FB463DC37B8791FC28A759301FC2F9879960C82BC7C427382A41B9AEFAC0051A2C653E55A47B48860CDA32812A192C1508A6C012C7E4BBAB1619B7926549FD8CE27928618F035BE31D56CBC9586D88E00DA69341F6F01554E205344E49E8871CCF80F9FF5CB54479AFA66806DD02FAFEE7D43572B3AA22742635FE65BFC8004960DC679FC7F8C0E5B50B3CE1E446B7A5E189BB9AAFA06FEC472D6E67EA4905373A01A2B662F534131405FBAB9BBAE892F0C265439EA1ABC91B186B5AC1E53A0C786607B1069BC026359955CFD614D7F80DF416A08AB18991A0398A83DF3CF2D65D7C202ABED3 +20150521064303 2 6 100 7679 5 D67DA234F46097F7EE3B230456E7C895BCA86395DF43D60D9D587C64EA4525FBCAD22442143068578CE8ECC8280B2D81F747B484AA668FFCDBEB067EB824B42E5FA1A40BC08EE8CC4A064298CB31C36340951EC7A006878C79C80068196180DA31E1DEF79A72B2D059203DDE461485D1B9783AF79E981CDAEF88589D8343E5B52D96FE90EA13194AFAF7459B17B80971720357ABD09CFE992966FFC1C239821C910F55D69E44277E5DE9841F4E5B2D25D6A265D321059B762F7D6AC5F0E260DEEB628D32940002B219B354486CC5BBF6390F19899EA5E145A28487029DF0517564A81FA10FA60AFA04CE77794775392829DB636E7F5EE00868D5027A6BA75CA922CEF3CA78683D14AB2E58439789033ACF441236F5E3C7849E3662B5123304F82D0061EA9C18EA1676A736FFD628AE982CCEAB8979568C43FB34207E0DEC7D8A6AA391846C910F77771ECF2D0531A234D3798BC1B1433091A895E23A77792F4BE403D526F1D260A3627F2E80E863A204A774F58D7DE2C5C4A7E463A46BC436F0B7AF07179EC334D31073BF035FD94454ECD54146473F786EA15A1CEBB3B9C0D282195AD612D33B31F5528DAB5231CB17A3DE9AB5C8BD7BF8F773C255845BC9B70A1E53A50E5AEA801FFE604A2B2C1FBE86A2A883632E7AE75ADA007FB6AB1AA529DE3151CAA8D1D07FA19EFF5679398340E720CF2CFC4E1AEDD73C44983CC8E610DD419AE2E88206573837D6E44018D9498B62F9C0B8EA7741450FC7DBFF7C546D3CBCBA5B9123577FD5531880A18F1275F9181A922803D8F03512C58B5FBBC41CE8095EDD920A3E36CEB6EDB56900E6CEC2928288909D61B3B426EBC54F0A69C261A848B358C3A8E332567B9FFC1A7A07E9414BB1F75DE0795CF87632F5D6A87A246FD4E98E70489F779FE99C5BC4DB24BFA860C3551888FC721CDBC6AB5783B02BEF893E0984B6FDB5142A1AFD3277FE8F36B87849BC00B3FB3ADAFE4EDAE4839B83894C27FEF93514D7E3FFB7A30E99C6875D96C582E81D45FB463DC37B8791FC28A759301FC2F9879960C82BC7C427382A41B9AEFAC0051A2C653E55A47B48860CDA32812A192C1508A6C012C7E4BBAB1619B7926549FD8CE27928618F035BE31D56CBC9586D88E00DA69341F6F01554E205344E49E8871CCF80F9FF5CB54479AFA66806DD02FAFEE7D43572B3AA22742635FE65BFC8004960DC679FC7F8C0E5B50B3CE1E446B7A5E189BB9AAFA06FEC472D6E67EA4905373A01A2B662F534131405FBAB9BBAE892F0C265439EA1ABC91B186B5AC1E53A0C786607B1069BC026359955CFD614D7F80DF416A08AB18991A0398A83DF3CF2D65D7C27790087 +20150521060604 2 6 100 7679 2 D67DA234F46097F7EE3B230456E7C895BCA86395DF43D60D9D587C64EA4525FBCAD22442143068578CE8ECC8280B2D81F747B484AA668FFCDBEB067EB824B42E5FA1A40BC08EE8CC4A064298CB31C36340951EC7A006878C79C80068196180DA31E1DEF79A72B2D059203DDE461485D1B9783AF79E981CDAEF88589D8343E5B52D96FE90EA13194AFAF7459B17B80971720357ABD09CFE992966FFC1C239821C910F55D69E44277E5DE9841F4E5B2D25D6A265D321059B762F7D6AC5F0E260DEEB628D32940002B219B354486CC5BBF6390F19899EA5E145A28487029DF0517564A81FA10FA60AFA04CE77794775392829DB636E7F5EE00868D5027A6BA75CA922CEF3CA78683D14AB2E58439789033ACF441236F5E3C7849E3662B5123304F82D0061EA9C18EA1676A736FFD628AE982CCEAB8979568C43FB34207E0DEC7D8A6AA391846C910F77771ECF2D0531A234D3798BC1B1433091A895E23A77792F4BE403D526F1D260A3627F2E80E863A204A774F58D7DE2C5C4A7E463A46BC436F0B7AF07179EC334D31073BF035FD94454ECD54146473F786EA15A1CEBB3B9C0D282195AD612D33B31F5528DAB5231CB17A3DE9AB5C8BD7BF8F773C255845BC9B70A1E53A50E5AEA801FFE604A2B2C1FBE86A2A883632E7AE75ADA007FB6AB1AA529DE3151CAA8D1D07FA19EFF5679398340E720CF2CFC4E1AEDD73C44983CC8E610DD419AE2E88206573837D6E44018D9498B62F9C0B8EA7741450FC7DBFF7C546D3CBCBA5B9123577FD5531880A18F1275F9181A922803D8F03512C58B5FBBC41CE8095EDD920A3E36CEB6EDB56900E6CEC2928288909D61B3B426EBC54F0A69C261A848B358C3A8E332567B9FFC1A7A07E9414BB1F75DE0795CF87632F5D6A87A246FD4E98E70489F779FE99C5BC4DB24BFA860C3551888FC721CDBC6AB5783B02BEF893E0984B6FDB5142A1AFD3277FE8F36B87849BC00B3FB3ADAFE4EDAE4839B83894C27FEF93514D7E3FFB7A30E99C6875D96C582E81D45FB463DC37B8791FC28A759301FC2F9879960C82BC7C427382A41B9AEFAC0051A2C653E55A47B48860CDA32812A192C1508A6C012C7E4BBAB1619B7926549FD8CE27928618F035BE31D56CBC9586D88E00DA69341F6F01554E205344E49E8871CCF80F9FF5CB54479AFA66806DD02FAFEE7D43572B3AA22742635FE65BFC8004960DC679FC7F8C0E5B50B3CE1E446B7A5E189BB9AAFA06FEC472D6E67EA4905373A01A2B662F534131405FBAB9BBAE892F0C265439EA1ABC91B186B5AC1E53A0C786607B1069BC026359955CFD614D7F80DF416A08AB18991A0398A83DF3CF2D65D7C2F9DF583 +20150521062143 2 6 100 7679 2 D67DA234F46097F7EE3B230456E7C895BCA86395DF43D60D9D587C64EA4525FBCAD22442143068578CE8ECC8280B2D81F747B484AA668FFCDBEB067EB824B42E5FA1A40BC08EE8CC4A064298CB31C36340951EC7A006878C79C80068196180DA31E1DEF79A72B2D059203DDE461485D1B9783AF79E981CDAEF88589D8343E5B52D96FE90EA13194AFAF7459B17B80971720357ABD09CFE992966FFC1C239821C910F55D69E44277E5DE9841F4E5B2D25D6A265D321059B762F7D6AC5F0E260DEEB628D32940002B219B354486CC5BBF6390F19899EA5E145A28487029DF0517564A81FA10FA60AFA04CE77794775392829DB636E7F5EE00868D5027A6BA75CA922CEF3CA78683D14AB2E58439789033ACF441236F5E3C7849E3662B5123304F82D0061EA9C18EA1676A736FFD628AE982CCEAB8979568C43FB34207E0DEC7D8A6AA391846C910F77771ECF2D0531A234D3798BC1B1433091A895E23A77792F4BE403D526F1D260A3627F2E80E863A204A774F58D7DE2C5C4A7E463A46BC436F0B7AF07179EC334D31073BF035FD94454ECD54146473F786EA15A1CEBB3B9C0D282195AD612D33B31F5528DAB5231CB17A3DE9AB5C8BD7BF8F773C255845BC9B70A1E53A50E5AEA801FFE604A2B2C1FBE86A2A883632E7AE75ADA007FB6AB1AA529DE3151CAA8D1D07FA19EFF5679398340E720CF2CFC4E1AEDD73C44983CC8E610DD419AE2E88206573837D6E44018D9498B62F9C0B8EA7741450FC7DBFF7C546D3CBCBA5B9123577FD5531880A18F1275F9181A922803D8F03512C58B5FBBC41CE8095EDD920A3E36CEB6EDB56900E6CEC2928288909D61B3B426EBC54F0A69C261A848B358C3A8E332567B9FFC1A7A07E9414BB1F75DE0795CF87632F5D6A87A246FD4E98E70489F779FE99C5BC4DB24BFA860C3551888FC721CDBC6AB5783B02BEF893E0984B6FDB5142A1AFD3277FE8F36B87849BC00B3FB3ADAFE4EDAE4839B83894C27FEF93514D7E3FFB7A30E99C6875D96C582E81D45FB463DC37B8791FC28A759301FC2F9879960C82BC7C427382A41B9AEFAC0051A2C653E55A47B48860CDA32812A192C1508A6C012C7E4BBAB1619B7926549FD8CE27928618F035BE31D56CBC9586D88E00DA69341F6F01554E205344E49E8871CCF80F9FF5CB54479AFA66806DD02FAFEE7D43572B3AA22742635FE65BFC8004960DC679FC7F8C0E5B50B3CE1E446B7A5E189BB9AAFA06FEC472D6E67EA4905373A01A2B662F534131405FBAB9BBAE892F0C265439EA1ABC91B186B5AC1E53A0C786607B1069BC026359955CFD614D7F80DF416A08AB18991A0398A83DF3CF2D65D7C3003EEAB +20150521044311 2 6 100 7679 5 D67DA234F46097F7EE3B230456E7C895BCA86395DF43D60D9D587C64EA4525FBCAD22442143068578CE8ECC8280B2D81F747B484AA668FFCDBEB067EB824B42E5FA1A40BC08EE8CC4A064298CB31C36340951EC7A006878C79C80068196180DA31E1DEF79A72B2D059203DDE461485D1B9783AF79E981CDAEF88589D8343E5B52D96FE90EA13194AFAF7459B17B80971720357ABD09CFE992966FFC1C239821C910F55D69E44277E5DE9841F4E5B2D25D6A265D321059B762F7D6AC5F0E260DEEB628D32940002B219B354486CC5BBF6390F19899EA5E145A28487029DF0517564A81FA10FA60AFA04CE77794775392829DB636E7F5EE00868D5027A6BA75CA922CEF3CA78683D14AB2E58439789033ACF441236F5E3C7849E3662B5123304F82D0061EA9C18EA1676A736FFD628AE982CCEAB8979568C43FB34207E0DEC7D8A6AA391846C910F77771ECF2D0531A234D3798BC1B1433091A895E23A77792F4BE403D526F1D260A3627F2E80E863A204A774F58D7DE2C5C4A7E463A46BC436F0B7AF07179EC334D31073BF035FD94454ECD54146473F786EA15A1CEBB3B9C0D282195AD612D33B31F5528DAB5231CB17A3DE9AB5C8BD7BF8F773C255845BC9B70A1E53A50E5AEA801FFE604A2B2C1FBE86A2A883632E7AE75ADA007FB6AB1AA529DE3151CAA8D1D07FA19EFF5679398340E720CF2CFC4E1AEDD73C44983CC8E610DD419AE2E88206573837D6E44018D9498B62F9C0B8EA7741450FC7DBFF7C546D3CBCBA5B9123577FD5531880A18F1275F9181A922803D8F03512C58B5FBBC41CE8095EDD920A3E36CEB6EDB56900E6CEC2928288909D61B3B426EBC54F0A69C261A848B358C3A8E332567B9FFC1A7A07E9414BB1F75DE0795CF87632F5D6A87A246FD4E98E70489F779FE99C5BC4DB24BFA860C3551888FC721CDBC6AB5783B02BEF893E0984B6FDB5142A1AFD3277FE8F36B87849BC00B3FB3ADAFE4EDAE4839B83894C27FEF93514D7E3FFB7A30E99C6875D96C582E81D45FB463DC37B8791FC28A759301FC2F9879960C82BC7C427382A41B9AEFAC0051A2C653E55A47B48860CDA32812A192C1508A6C012C7E4BBAB1619B7926549FD8CE27928618F035BE31D56CBC9586D88E00DA69341F6F01554E205344E49E8871CCF80F9FF5CB54479AFA66806DD02FAFEE7D43572B3AA22742635FE65BFC8004960DC679FC7F8C0E5B50B3CE1E446B7A5E189BB9AAFA06FEC472D6E67EA4905373A01A2B662F534131405FBAB9BBAE892F0C265439EA1ABC91B186B5AC1E53A0C786607B1069BC026359955CFD614D7F80DF416A08AB18991A0398A83DF3CF2D65D7C363D0A77 +20150521053731 2 6 100 7679 5 D67DA234F46097F7EE3B230456E7C895BCA86395DF43D60D9D587C64EA4525FBCAD22442143068578CE8ECC8280B2D81F747B484AA668FFCDBEB067EB824B42E5FA1A40BC08EE8CC4A064298CB31C36340951EC7A006878C79C80068196180DA31E1DEF79A72B2D059203DDE461485D1B9783AF79E981CDAEF88589D8343E5B52D96FE90EA13194AFAF7459B17B80971720357ABD09CFE992966FFC1C239821C910F55D69E44277E5DE9841F4E5B2D25D6A265D321059B762F7D6AC5F0E260DEEB628D32940002B219B354486CC5BBF6390F19899EA5E145A28487029DF0517564A81FA10FA60AFA04CE77794775392829DB636E7F5EE00868D5027A6BA75CA922CEF3CA78683D14AB2E58439789033ACF441236F5E3C7849E3662B5123304F82D0061EA9C18EA1676A736FFD628AE982CCEAB8979568C43FB34207E0DEC7D8A6AA391846C910F77771ECF2D0531A234D3798BC1B1433091A895E23A77792F4BE403D526F1D260A3627F2E80E863A204A774F58D7DE2C5C4A7E463A46BC436F0B7AF07179EC334D31073BF035FD94454ECD54146473F786EA15A1CEBB3B9C0D282195AD612D33B31F5528DAB5231CB17A3DE9AB5C8BD7BF8F773C255845BC9B70A1E53A50E5AEA801FFE604A2B2C1FBE86A2A883632E7AE75ADA007FB6AB1AA529DE3151CAA8D1D07FA19EFF5679398340E720CF2CFC4E1AEDD73C44983CC8E610DD419AE2E88206573837D6E44018D9498B62F9C0B8EA7741450FC7DBFF7C546D3CBCBA5B9123577FD5531880A18F1275F9181A922803D8F03512C58B5FBBC41CE8095EDD920A3E36CEB6EDB56900E6CEC2928288909D61B3B426EBC54F0A69C261A848B358C3A8E332567B9FFC1A7A07E9414BB1F75DE0795CF87632F5D6A87A246FD4E98E70489F779FE99C5BC4DB24BFA860C3551888FC721CDBC6AB5783B02BEF893E0984B6FDB5142A1AFD3277FE8F36B87849BC00B3FB3ADAFE4EDAE4839B83894C27FEF93514D7E3FFB7A30E99C6875D96C582E81D45FB463DC37B8791FC28A759301FC2F9879960C82BC7C427382A41B9AEFAC0051A2C653E55A47B48860CDA32812A192C1508A6C012C7E4BBAB1619B7926549FD8CE27928618F035BE31D56CBC9586D88E00DA69341F6F01554E205344E49E8871CCF80F9FF5CB54479AFA66806DD02FAFEE7D43572B3AA22742635FE65BFC8004960DC679FC7F8C0E5B50B3CE1E446B7A5E189BB9AAFA06FEC472D6E67EA4905373A01A2B662F534131405FBAB9BBAE892F0C265439EA1ABC91B186B5AC1E53A0C786607B1069BC026359955CFD614D7F80DF416A08AB18991A0398A83DF3CF2D65D7C37D6EFCF +20150521065640 2 6 100 7679 5 D67DA234F46097F7EE3B230456E7C895BCA86395DF43D60D9D587C64EA4525FBCAD22442143068578CE8ECC8280B2D81F747B484AA668FFCDBEB067EB824B42E5FA1A40BC08EE8CC4A064298CB31C36340951EC7A006878C79C80068196180DA31E1DEF79A72B2D059203DDE461485D1B9783AF79E981CDAEF88589D8343E5B52D96FE90EA13194AFAF7459B17B80971720357ABD09CFE992966FFC1C239821C910F55D69E44277E5DE9841F4E5B2D25D6A265D321059B762F7D6AC5F0E260DEEB628D32940002B219B354486CC5BBF6390F19899EA5E145A28487029DF0517564A81FA10FA60AFA04CE77794775392829DB636E7F5EE00868D5027A6BA75CA922CEF3CA78683D14AB2E58439789033ACF441236F5E3C7849E3662B5123304F82D0061EA9C18EA1676A736FFD628AE982CCEAB8979568C43FB34207E0DEC7D8A6AA391846C910F77771ECF2D0531A234D3798BC1B1433091A895E23A77792F4BE403D526F1D260A3627F2E80E863A204A774F58D7DE2C5C4A7E463A46BC436F0B7AF07179EC334D31073BF035FD94454ECD54146473F786EA15A1CEBB3B9C0D282195AD612D33B31F5528DAB5231CB17A3DE9AB5C8BD7BF8F773C255845BC9B70A1E53A50E5AEA801FFE604A2B2C1FBE86A2A883632E7AE75ADA007FB6AB1AA529DE3151CAA8D1D07FA19EFF5679398340E720CF2CFC4E1AEDD73C44983CC8E610DD419AE2E88206573837D6E44018D9498B62F9C0B8EA7741450FC7DBFF7C546D3CBCBA5B9123577FD5531880A18F1275F9181A922803D8F03512C58B5FBBC41CE8095EDD920A3E36CEB6EDB56900E6CEC2928288909D61B3B426EBC54F0A69C261A848B358C3A8E332567B9FFC1A7A07E9414BB1F75DE0795CF87632F5D6A87A246FD4E98E70489F779FE99C5BC4DB24BFA860C3551888FC721CDBC6AB5783B02BEF893E0984B6FDB5142A1AFD3277FE8F36B87849BC00B3FB3ADAFE4EDAE4839B83894C27FEF93514D7E3FFB7A30E99C6875D96C582E81D45FB463DC37B8791FC28A759301FC2F9879960C82BC7C427382A41B9AEFAC0051A2C653E55A47B48860CDA32812A192C1508A6C012C7E4BBAB1619B7926549FD8CE27928618F035BE31D56CBC9586D88E00DA69341F6F01554E205344E49E8871CCF80F9FF5CB54479AFA66806DD02FAFEE7D43572B3AA22742635FE65BFC8004960DC679FC7F8C0E5B50B3CE1E446B7A5E189BB9AAFA06FEC472D6E67EA4905373A01A2B662F534131405FBAB9BBAE892F0C265439EA1ABC91B186B5AC1E53A0C786607B1069BC026359955CFD614D7F80DF416A08AB18991A0398A83DF3CF2D65D7C3A20A2DF +20150521044717 2 6 100 7679 2 D67DA234F46097F7EE3B230456E7C895BCA86395DF43D60D9D587C64EA4525FBCAD22442143068578CE8ECC8280B2D81F747B484AA668FFCDBEB067EB824B42E5FA1A40BC08EE8CC4A064298CB31C36340951EC7A006878C79C80068196180DA31E1DEF79A72B2D059203DDE461485D1B9783AF79E981CDAEF88589D8343E5B52D96FE90EA13194AFAF7459B17B80971720357ABD09CFE992966FFC1C239821C910F55D69E44277E5DE9841F4E5B2D25D6A265D321059B762F7D6AC5F0E260DEEB628D32940002B219B354486CC5BBF6390F19899EA5E145A28487029DF0517564A81FA10FA60AFA04CE77794775392829DB636E7F5EE00868D5027A6BA75CA922CEF3CA78683D14AB2E58439789033ACF441236F5E3C7849E3662B5123304F82D0061EA9C18EA1676A736FFD628AE982CCEAB8979568C43FB34207E0DEC7D8A6AA391846C910F77771ECF2D0531A234D3798BC1B1433091A895E23A77792F4BE403D526F1D260A3627F2E80E863A204A774F58D7DE2C5C4A7E463A46BC436F0B7AF07179EC334D31073BF035FD94454ECD54146473F786EA15A1CEBB3B9C0D282195AD612D33B31F5528DAB5231CB17A3DE9AB5C8BD7BF8F773C255845BC9B70A1E53A50E5AEA801FFE604A2B2C1FBE86A2A883632E7AE75ADA007FB6AB1AA529DE3151CAA8D1D07FA19EFF5679398340E720CF2CFC4E1AEDD73C44983CC8E610DD419AE2E88206573837D6E44018D9498B62F9C0B8EA7741450FC7DBFF7C546D3CBCBA5B9123577FD5531880A18F1275F9181A922803D8F03512C58B5FBBC41CE8095EDD920A3E36CEB6EDB56900E6CEC2928288909D61B3B426EBC54F0A69C261A848B358C3A8E332567B9FFC1A7A07E9414BB1F75DE0795CF87632F5D6A87A246FD4E98E70489F779FE99C5BC4DB24BFA860C3551888FC721CDBC6AB5783B02BEF893E0984B6FDB5142A1AFD3277FE8F36B87849BC00B3FB3ADAFE4EDAE4839B83894C27FEF93514D7E3FFB7A30E99C6875D96C582E81D45FB463DC37B8791FC28A759301FC2F9879960C82BC7C427382A41B9AEFAC0051A2C653E55A47B48860CDA32812A192C1508A6C012C7E4BBAB1619B7926549FD8CE27928618F035BE31D56CBC9586D88E00DA69341F6F01554E205344E49E8871CCF80F9FF5CB54479AFA66806DD02FAFEE7D43572B3AA22742635FE65BFC8004960DC679FC7F8C0E5B50B3CE1E446B7A5E189BB9AAFA06FEC472D6E67EA4905373A01A2B662F534131405FBAB9BBAE892F0C265439EA1ABC91B186B5AC1E53A0C786607B1069BC026359955CFD614D7F80DF416A08AB18991A0398A83DF3CF2D65D7C3F622E8B +20150521065426 2 6 100 7679 2 D67DA234F46097F7EE3B230456E7C895BCA86395DF43D60D9D587C64EA4525FBCAD22442143068578CE8ECC8280B2D81F747B484AA668FFCDBEB067EB824B42E5FA1A40BC08EE8CC4A064298CB31C36340951EC7A006878C79C80068196180DA31E1DEF79A72B2D059203DDE461485D1B9783AF79E981CDAEF88589D8343E5B52D96FE90EA13194AFAF7459B17B80971720357ABD09CFE992966FFC1C239821C910F55D69E44277E5DE9841F4E5B2D25D6A265D321059B762F7D6AC5F0E260DEEB628D32940002B219B354486CC5BBF6390F19899EA5E145A28487029DF0517564A81FA10FA60AFA04CE77794775392829DB636E7F5EE00868D5027A6BA75CA922CEF3CA78683D14AB2E58439789033ACF441236F5E3C7849E3662B5123304F82D0061EA9C18EA1676A736FFD628AE982CCEAB8979568C43FB34207E0DEC7D8A6AA391846C910F77771ECF2D0531A234D3798BC1B1433091A895E23A77792F4BE403D526F1D260A3627F2E80E863A204A774F58D7DE2C5C4A7E463A46BC436F0B7AF07179EC334D31073BF035FD94454ECD54146473F786EA15A1CEBB3B9C0D282195AD612D33B31F5528DAB5231CB17A3DE9AB5C8BD7BF8F773C255845BC9B70A1E53A50E5AEA801FFE604A2B2C1FBE86A2A883632E7AE75ADA007FB6AB1AA529DE3151CAA8D1D07FA19EFF5679398340E720CF2CFC4E1AEDD73C44983CC8E610DD419AE2E88206573837D6E44018D9498B62F9C0B8EA7741450FC7DBFF7C546D3CBCBA5B9123577FD5531880A18F1275F9181A922803D8F03512C58B5FBBC41CE8095EDD920A3E36CEB6EDB56900E6CEC2928288909D61B3B426EBC54F0A69C261A848B358C3A8E332567B9FFC1A7A07E9414BB1F75DE0795CF87632F5D6A87A246FD4E98E70489F779FE99C5BC4DB24BFA860C3551888FC721CDBC6AB5783B02BEF893E0984B6FDB5142A1AFD3277FE8F36B87849BC00B3FB3ADAFE4EDAE4839B83894C27FEF93514D7E3FFB7A30E99C6875D96C582E81D45FB463DC37B8791FC28A759301FC2F9879960C82BC7C427382A41B9AEFAC0051A2C653E55A47B48860CDA32812A192C1508A6C012C7E4BBAB1619B7926549FD8CE27928618F035BE31D56CBC9586D88E00DA69341F6F01554E205344E49E8871CCF80F9FF5CB54479AFA66806DD02FAFEE7D43572B3AA22742635FE65BFC8004960DC679FC7F8C0E5B50B3CE1E446B7A5E189BB9AAFA06FEC472D6E67EA4905373A01A2B662F534131405FBAB9BBAE892F0C265439EA1ABC91B186B5AC1E53A0C786607B1069BC026359955CFD614D7F80DF416A08AB18991A0398A83DF3CF2D65D7C430ED7CB +20150521023632 2 6 100 7679 2 D67DA234F46097F7EE3B230456E7C895BCA86395DF43D60D9D587C64EA4525FBCAD22442143068578CE8ECC8280B2D81F747B484AA668FFCDBEB067EB824B42E5FA1A40BC08EE8CC4A064298CB31C36340951EC7A006878C79C80068196180DA31E1DEF79A72B2D059203DDE461485D1B9783AF79E981CDAEF88589D8343E5B52D96FE90EA13194AFAF7459B17B80971720357ABD09CFE992966FFC1C239821C910F55D69E44277E5DE9841F4E5B2D25D6A265D321059B762F7D6AC5F0E260DEEB628D32940002B219B354486CC5BBF6390F19899EA5E145A28487029DF0517564A81FA10FA60AFA04CE77794775392829DB636E7F5EE00868D5027A6BA75CA922CEF3CA78683D14AB2E58439789033ACF441236F5E3C7849E3662B5123304F82D0061EA9C18EA1676A736FFD628AE982CCEAB8979568C43FB34207E0DEC7D8A6AA391846C910F77771ECF2D0531A234D3798BC1B1433091A895E23A77792F4BE403D526F1D260A3627F2E80E863A204A774F58D7DE2C5C4A7E463A46BC436F0B7AF07179EC334D31073BF035FD94454ECD54146473F786EA15A1CEBB3B9C0D282195AD612D33B31F5528DAB5231CB17A3DE9AB5C8BD7BF8F773C255845BC9B70A1E53A50E5AEA801FFE604A2B2C1FBE86A2A883632E7AE75ADA007FB6AB1AA529DE3151CAA8D1D07FA19EFF5679398340E720CF2CFC4E1AEDD73C44983CC8E610DD419AE2E88206573837D6E44018D9498B62F9C0B8EA7741450FC7DBFF7C546D3CBCBA5B9123577FD5531880A18F1275F9181A922803D8F03512C58B5FBBC41CE8095EDD920A3E36CEB6EDB56900E6CEC2928288909D61B3B426EBC54F0A69C261A848B358C3A8E332567B9FFC1A7A07E9414BB1F75DE0795CF87632F5D6A87A246FD4E98E70489F779FE99C5BC4DB24BFA860C3551888FC721CDBC6AB5783B02BEF893E0984B6FDB5142A1AFD3277FE8F36B87849BC00B3FB3ADAFE4EDAE4839B83894C27FEF93514D7E3FFB7A30E99C6875D96C582E81D45FB463DC37B8791FC28A759301FC2F9879960C82BC7C427382A41B9AEFAC0051A2C653E55A47B48860CDA32812A192C1508A6C012C7E4BBAB1619B7926549FD8CE27928618F035BE31D56CBC9586D88E00DA69341F6F01554E205344E49E8871CCF80F9FF5CB54479AFA66806DD02FAFEE7D43572B3AA22742635FE65BFC8004960DC679FC7F8C0E5B50B3CE1E446B7A5E189BB9AAFA06FEC472D6E67EA4905373A01A2B662F534131405FBAB9BBAE892F0C265439EA1ABC91B186B5AC1E53A0C786607B1069BC026359955CFD614D7F80DF416A08AB18991A0398A83DF3CF2D65D7C445E575B +20150521032945 2 6 100 7679 2 D67DA234F46097F7EE3B230456E7C895BCA86395DF43D60D9D587C64EA4525FBCAD22442143068578CE8ECC8280B2D81F747B484AA668FFCDBEB067EB824B42E5FA1A40BC08EE8CC4A064298CB31C36340951EC7A006878C79C80068196180DA31E1DEF79A72B2D059203DDE461485D1B9783AF79E981CDAEF88589D8343E5B52D96FE90EA13194AFAF7459B17B80971720357ABD09CFE992966FFC1C239821C910F55D69E44277E5DE9841F4E5B2D25D6A265D321059B762F7D6AC5F0E260DEEB628D32940002B219B354486CC5BBF6390F19899EA5E145A28487029DF0517564A81FA10FA60AFA04CE77794775392829DB636E7F5EE00868D5027A6BA75CA922CEF3CA78683D14AB2E58439789033ACF441236F5E3C7849E3662B5123304F82D0061EA9C18EA1676A736FFD628AE982CCEAB8979568C43FB34207E0DEC7D8A6AA391846C910F77771ECF2D0531A234D3798BC1B1433091A895E23A77792F4BE403D526F1D260A3627F2E80E863A204A774F58D7DE2C5C4A7E463A46BC436F0B7AF07179EC334D31073BF035FD94454ECD54146473F786EA15A1CEBB3B9C0D282195AD612D33B31F5528DAB5231CB17A3DE9AB5C8BD7BF8F773C255845BC9B70A1E53A50E5AEA801FFE604A2B2C1FBE86A2A883632E7AE75ADA007FB6AB1AA529DE3151CAA8D1D07FA19EFF5679398340E720CF2CFC4E1AEDD73C44983CC8E610DD419AE2E88206573837D6E44018D9498B62F9C0B8EA7741450FC7DBFF7C546D3CBCBA5B9123577FD5531880A18F1275F9181A922803D8F03512C58B5FBBC41CE8095EDD920A3E36CEB6EDB56900E6CEC2928288909D61B3B426EBC54F0A69C261A848B358C3A8E332567B9FFC1A7A07E9414BB1F75DE0795CF87632F5D6A87A246FD4E98E70489F779FE99C5BC4DB24BFA860C3551888FC721CDBC6AB5783B02BEF893E0984B6FDB5142A1AFD3277FE8F36B87849BC00B3FB3ADAFE4EDAE4839B83894C27FEF93514D7E3FFB7A30E99C6875D96C582E81D45FB463DC37B8791FC28A759301FC2F9879960C82BC7C427382A41B9AEFAC0051A2C653E55A47B48860CDA32812A192C1508A6C012C7E4BBAB1619B7926549FD8CE27928618F035BE31D56CBC9586D88E00DA69341F6F01554E205344E49E8871CCF80F9FF5CB54479AFA66806DD02FAFEE7D43572B3AA22742635FE65BFC8004960DC679FC7F8C0E5B50B3CE1E446B7A5E189BB9AAFA06FEC472D6E67EA4905373A01A2B662F534131405FBAB9BBAE892F0C265439EA1ABC91B186B5AC1E53A0C786607B1069BC026359955CFD614D7F80DF416A08AB18991A0398A83DF3CF2D65D7C45EEE643 +20150521054538 2 6 100 7679 2 D67DA234F46097F7EE3B230456E7C895BCA86395DF43D60D9D587C64EA4525FBCAD22442143068578CE8ECC8280B2D81F747B484AA668FFCDBEB067EB824B42E5FA1A40BC08EE8CC4A064298CB31C36340951EC7A006878C79C80068196180DA31E1DEF79A72B2D059203DDE461485D1B9783AF79E981CDAEF88589D8343E5B52D96FE90EA13194AFAF7459B17B80971720357ABD09CFE992966FFC1C239821C910F55D69E44277E5DE9841F4E5B2D25D6A265D321059B762F7D6AC5F0E260DEEB628D32940002B219B354486CC5BBF6390F19899EA5E145A28487029DF0517564A81FA10FA60AFA04CE77794775392829DB636E7F5EE00868D5027A6BA75CA922CEF3CA78683D14AB2E58439789033ACF441236F5E3C7849E3662B5123304F82D0061EA9C18EA1676A736FFD628AE982CCEAB8979568C43FB34207E0DEC7D8A6AA391846C910F77771ECF2D0531A234D3798BC1B1433091A895E23A77792F4BE403D526F1D260A3627F2E80E863A204A774F58D7DE2C5C4A7E463A46BC436F0B7AF07179EC334D31073BF035FD94454ECD54146473F786EA15A1CEBB3B9C0D282195AD612D33B31F5528DAB5231CB17A3DE9AB5C8BD7BF8F773C255845BC9B70A1E53A50E5AEA801FFE604A2B2C1FBE86A2A883632E7AE75ADA007FB6AB1AA529DE3151CAA8D1D07FA19EFF5679398340E720CF2CFC4E1AEDD73C44983CC8E610DD419AE2E88206573837D6E44018D9498B62F9C0B8EA7741450FC7DBFF7C546D3CBCBA5B9123577FD5531880A18F1275F9181A922803D8F03512C58B5FBBC41CE8095EDD920A3E36CEB6EDB56900E6CEC2928288909D61B3B426EBC54F0A69C261A848B358C3A8E332567B9FFC1A7A07E9414BB1F75DE0795CF87632F5D6A87A246FD4E98E70489F779FE99C5BC4DB24BFA860C3551888FC721CDBC6AB5783B02BEF893E0984B6FDB5142A1AFD3277FE8F36B87849BC00B3FB3ADAFE4EDAE4839B83894C27FEF93514D7E3FFB7A30E99C6875D96C582E81D45FB463DC37B8791FC28A759301FC2F9879960C82BC7C427382A41B9AEFAC0051A2C653E55A47B48860CDA32812A192C1508A6C012C7E4BBAB1619B7926549FD8CE27928618F035BE31D56CBC9586D88E00DA69341F6F01554E205344E49E8871CCF80F9FF5CB54479AFA66806DD02FAFEE7D43572B3AA22742635FE65BFC8004960DC679FC7F8C0E5B50B3CE1E446B7A5E189BB9AAFA06FEC472D6E67EA4905373A01A2B662F534131405FBAB9BBAE892F0C265439EA1ABC91B186B5AC1E53A0C786607B1069BC026359955CFD614D7F80DF416A08AB18991A0398A83DF3CF2D65D7C49FB77CB +20150521024620 2 6 100 7679 2 D67DA234F46097F7EE3B230456E7C895BCA86395DF43D60D9D587C64EA4525FBCAD22442143068578CE8ECC8280B2D81F747B484AA668FFCDBEB067EB824B42E5FA1A40BC08EE8CC4A064298CB31C36340951EC7A006878C79C80068196180DA31E1DEF79A72B2D059203DDE461485D1B9783AF79E981CDAEF88589D8343E5B52D96FE90EA13194AFAF7459B17B80971720357ABD09CFE992966FFC1C239821C910F55D69E44277E5DE9841F4E5B2D25D6A265D321059B762F7D6AC5F0E260DEEB628D32940002B219B354486CC5BBF6390F19899EA5E145A28487029DF0517564A81FA10FA60AFA04CE77794775392829DB636E7F5EE00868D5027A6BA75CA922CEF3CA78683D14AB2E58439789033ACF441236F5E3C7849E3662B5123304F82D0061EA9C18EA1676A736FFD628AE982CCEAB8979568C43FB34207E0DEC7D8A6AA391846C910F77771ECF2D0531A234D3798BC1B1433091A895E23A77792F4BE403D526F1D260A3627F2E80E863A204A774F58D7DE2C5C4A7E463A46BC436F0B7AF07179EC334D31073BF035FD94454ECD54146473F786EA15A1CEBB3B9C0D282195AD612D33B31F5528DAB5231CB17A3DE9AB5C8BD7BF8F773C255845BC9B70A1E53A50E5AEA801FFE604A2B2C1FBE86A2A883632E7AE75ADA007FB6AB1AA529DE3151CAA8D1D07FA19EFF5679398340E720CF2CFC4E1AEDD73C44983CC8E610DD419AE2E88206573837D6E44018D9498B62F9C0B8EA7741450FC7DBFF7C546D3CBCBA5B9123577FD5531880A18F1275F9181A922803D8F03512C58B5FBBC41CE8095EDD920A3E36CEB6EDB56900E6CEC2928288909D61B3B426EBC54F0A69C261A848B358C3A8E332567B9FFC1A7A07E9414BB1F75DE0795CF87632F5D6A87A246FD4E98E70489F779FE99C5BC4DB24BFA860C3551888FC721CDBC6AB5783B02BEF893E0984B6FDB5142A1AFD3277FE8F36B87849BC00B3FB3ADAFE4EDAE4839B83894C27FEF93514D7E3FFB7A30E99C6875D96C582E81D45FB463DC37B8791FC28A759301FC2F9879960C82BC7C427382A41B9AEFAC0051A2C653E55A47B48860CDA32812A192C1508A6C012C7E4BBAB1619B7926549FD8CE27928618F035BE31D56CBC9586D88E00DA69341F6F01554E205344E49E8871CCF80F9FF5CB54479AFA66806DD02FAFEE7D43572B3AA22742635FE65BFC8004960DC679FC7F8C0E5B50B3CE1E446B7A5E189BB9AAFA06FEC472D6E67EA4905373A01A2B662F534131405FBAB9BBAE892F0C265439EA1ABC91B186B5AC1E53A0C786607B1069BC026359955CFD614D7F80DF416A08AB18991A0398A83DF3CF2D65D7C4D86D0FB +20150521042108 2 6 100 7679 2 D67DA234F46097F7EE3B230456E7C895BCA86395DF43D60D9D587C64EA4525FBCAD22442143068578CE8ECC8280B2D81F747B484AA668FFCDBEB067EB824B42E5FA1A40BC08EE8CC4A064298CB31C36340951EC7A006878C79C80068196180DA31E1DEF79A72B2D059203DDE461485D1B9783AF79E981CDAEF88589D8343E5B52D96FE90EA13194AFAF7459B17B80971720357ABD09CFE992966FFC1C239821C910F55D69E44277E5DE9841F4E5B2D25D6A265D321059B762F7D6AC5F0E260DEEB628D32940002B219B354486CC5BBF6390F19899EA5E145A28487029DF0517564A81FA10FA60AFA04CE77794775392829DB636E7F5EE00868D5027A6BA75CA922CEF3CA78683D14AB2E58439789033ACF441236F5E3C7849E3662B5123304F82D0061EA9C18EA1676A736FFD628AE982CCEAB8979568C43FB34207E0DEC7D8A6AA391846C910F77771ECF2D0531A234D3798BC1B1433091A895E23A77792F4BE403D526F1D260A3627F2E80E863A204A774F58D7DE2C5C4A7E463A46BC436F0B7AF07179EC334D31073BF035FD94454ECD54146473F786EA15A1CEBB3B9C0D282195AD612D33B31F5528DAB5231CB17A3DE9AB5C8BD7BF8F773C255845BC9B70A1E53A50E5AEA801FFE604A2B2C1FBE86A2A883632E7AE75ADA007FB6AB1AA529DE3151CAA8D1D07FA19EFF5679398340E720CF2CFC4E1AEDD73C44983CC8E610DD419AE2E88206573837D6E44018D9498B62F9C0B8EA7741450FC7DBFF7C546D3CBCBA5B9123577FD5531880A18F1275F9181A922803D8F03512C58B5FBBC41CE8095EDD920A3E36CEB6EDB56900E6CEC2928288909D61B3B426EBC54F0A69C261A848B358C3A8E332567B9FFC1A7A07E9414BB1F75DE0795CF87632F5D6A87A246FD4E98E70489F779FE99C5BC4DB24BFA860C3551888FC721CDBC6AB5783B02BEF893E0984B6FDB5142A1AFD3277FE8F36B87849BC00B3FB3ADAFE4EDAE4839B83894C27FEF93514D7E3FFB7A30E99C6875D96C582E81D45FB463DC37B8791FC28A759301FC2F9879960C82BC7C427382A41B9AEFAC0051A2C653E55A47B48860CDA32812A192C1508A6C012C7E4BBAB1619B7926549FD8CE27928618F035BE31D56CBC9586D88E00DA69341F6F01554E205344E49E8871CCF80F9FF5CB54479AFA66806DD02FAFEE7D43572B3AA22742635FE65BFC8004960DC679FC7F8C0E5B50B3CE1E446B7A5E189BB9AAFA06FEC472D6E67EA4905373A01A2B662F534131405FBAB9BBAE892F0C265439EA1ABC91B186B5AC1E53A0C786607B1069BC026359955CFD614D7F80DF416A08AB18991A0398A83DF3CF2D65D7C505E524B +20150521041835 2 6 100 8191 5 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354CD3703FA7 +20150521051726 2 6 100 8191 5 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354CD4CEF96F +20150521074626 2 6 100 8191 2 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354CD86439C3 +20150521082439 2 6 100 8191 2 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354CD947F7F3 +20150521012012 2 6 100 8191 2 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354CE0694343 +20150521073153 2 6 100 8191 5 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354CE93D436F +20150521094433 2 6 100 8191 2 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354CEC4EE993 +20150521074128 2 6 100 8191 2 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354CFA190CE3 +20150521014004 2 6 100 8191 5 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354D0235296F +20150521014736 2 6 100 8191 2 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354D025961EB +20150521065737 2 6 100 8191 5 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354D0961218F +20150521043653 2 6 100 8191 5 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354D163706C7 +20150521085322 2 6 100 8191 5 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354D1BC6858F +20150521093922 2 6 100 8191 2 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354D1CC27FE3 +20150521120407 2 6 100 8191 5 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354D1FE2874F +20150521124157 2 6 100 8191 2 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354D20A8A19B +20150521035417 2 6 100 8191 2 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354D24E0665B +20150521062806 2 6 100 8191 2 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354D2828F7AB +20150521074218 2 6 100 8191 5 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354D29B42017 +20150521114937 2 6 100 8191 5 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354D2F027D3F +20150521073847 2 6 100 8191 5 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354D3905A9FF +20150521024512 2 6 100 8191 2 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354D41DB2FFB +20150521024827 2 6 100 8191 5 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354D41E2852F +20150521042402 2 6 100 8191 2 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354D43D9B0E3 +20150521083756 2 6 100 8191 5 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354D491D852F +20150521113241 2 6 100 8191 2 D7182545CB6AFDA1CCF5BB87F606DDD1CD25D4BAF110D7CCCC0BC78929189C09DC69308FBF76A16338AB8351B974081AEFE6F68B9DD0B3F661ED84DAF8736BF328122D00A803AD05DDB334CF5C98B2670F0B2ED0E2FA602CE2F6157A2A8E649A546957CE4F723C84B6AC46D64C5B329304181F2B70F48D15181C38777F4E18BB0344F5DAE703CC3A46B670713A7B99E536D30F92D1E5E683F2C5540105F425E01234968D1A63E0220A02721183E30302F029E4D0E0664E30329B730D99D03E53D67793F31BBA6C4274FB2ACA9181655B766246C598E4CD402737B682232B8534BE43A790ED6C04EF8047E1796048099B65EF415375D87BC7A01CB6086C9E23B667D22F52F5F44D6960601C15515D14F7D6A6BF6D7F6B1D834866ADF9FCFA1CDE00EF04C05591B05D4752471F124406D034BC8E6D71E03880BD3E7A77FD22E7D90B90A491E528EDE2E4B6FCF7C638883A4CDE80AF2C839569A4FB641C7B8948200DB0F51CA9B2613966C51F026A007D0696D14A4E4897556C7BB0E60A407B7B8C57643F278A47CC8089E24D38BAC1350A0E6D19FE540A773B8E90A6312D4B038C643B03ADDC741BDD3012F7714863BB63688E6145D47A6F40D15D6485E5AC278E229EA800FE705FEBEB2183CEF7C55DB952B627D4890B45441B3D4CF03BF0D132A7042C24447518B14956C11703131981CD69D7B6BA2A9F8C62057FE3A4319D17739DE0BBDAC9600E4809CD856E5F41C580863D93C251F0A31BA1CBCCAA499FEB79184E165C436A3B2FA9791C4526B47B0D1F6FE3BDE2730421E5DCA10483D91AA873ABD1236674EBE3A0D134C685CCE9D632280AE11C0D9CF7275517C1F14BCB81F2B23860D86F5028B21DF85868972EDF70A0704B3853EB1B16970834C661BC65693D38368DDB0D6E781DD2F52AE279913304601F5709E1C4B1A12B0FFDA93369001186FE8716027667F4B816E927A9977D3030CE211F4BE8B6F48836EABF4D8457FC5CFE39DF5BE96146D3B8C5BA11C3D75D252B0C190DEA5757049DE6BA89249166D60163ADDD38EAE171B53D44E135973AA05293AA7407693AE5478F480A3BE97BACBD8C7DE6EDF39EFB8BDDF8B0A2169228FD98A863C450129C8BA561A1D0F29C4EC75060A27E028E1321BCF7ADCB34B2C2B037E2C6B705F74002E0C844092025A630CFB2105F04D40135794DDF30C7E19187AE2AB8E6296C9EACFF43279F0ABE6E1150ABC2C3C8A6C4B95A7AA18CFBF953BF7662C16A0FE26D9EE7CF62BA16AA87B06373082E7551F42B8BE57BE19A50B059DC652BA46157FB7CC29AC1BF2834E668443637F87B2B12FD338706D69935D2C6348CF72F568B89B66345BF42209AA6D898F4388A54B4CFFD735EAF987CD6B738B401A14FACDAC97F63529118ED56DFB7DAC4967FFA252D185DBC29652E3F62A45D6BF990FB354D4CAD7D8B diff --git a/etc/Makefile b/etc/Makefile index e8295b72e53c..e5195f67b7dc 100644 --- a/etc/Makefile +++ b/etc/Makefile @@ -10,10 +10,6 @@ SUBDIR= \ SUBDIR+=sendmail .endif -.if ${MK_TESTS} != "no" -SUBDIR+=tests -.endif - BIN1= crontab \ devd.conf \ devfs.conf \ diff --git a/etc/etc.arm/ttys b/etc/etc.arm/ttys index ba410b707c1c..501bae69bd50 100644 --- a/etc/etc.arm/ttys +++ b/etc/etc.arm/ttys @@ -29,7 +29,7 @@ # when going to single-user mode. console none unknown off secure # -ttyv0 "/usr/libexec/getty Pc" xterm off secure +ttyv0 "/usr/libexec/getty Pc" xterm onifconsole secure # Virtual terminals ttyv1 "/usr/libexec/getty Pc" xterm off secure ttyv2 "/usr/libexec/getty Pc" xterm off secure @@ -41,7 +41,7 @@ ttyv7 "/usr/libexec/getty Pc" xterm off secure #ttyv8 "/usr/local/bin/xdm -nodaemon" xterm off secure # Serial terminals # The 'dialup' keyword identifies dialin lines to login, fingerd etc. -ttyu0 "/usr/libexec/getty 3wire" vt100 on secure +ttyu0 "/usr/libexec/getty 3wire" vt100 onifconsole secure ttyu1 "/usr/libexec/getty std.9600" dialup off secure ttyu2 "/usr/libexec/getty std.9600" dialup off secure ttyu3 "/usr/libexec/getty std.9600" dialup off secure diff --git a/etc/mtree/BSD.debug.dist b/etc/mtree/BSD.debug.dist index 856a17e2ebe0..7504a88f9b0f 100644 --- a/etc/mtree/BSD.debug.dist +++ b/etc/mtree/BSD.debug.dist @@ -23,7 +23,7 @@ .. lib clang - 3.6.0 + 3.6.1 lib freebsd .. diff --git a/etc/mtree/BSD.usr.dist b/etc/mtree/BSD.usr.dist index f0d42a2a3bde..5fad04021a16 100644 --- a/etc/mtree/BSD.usr.dist +++ b/etc/mtree/BSD.usr.dist @@ -19,7 +19,7 @@ aout .. clang - 3.6.0 + 3.6.1 include .. lib diff --git a/etc/rc.d/Makefile b/etc/rc.d/Makefile index d75bdc05831e..10fe26b12a1b 100644 --- a/etc/rc.d/Makefile +++ b/etc/rc.d/Makefile @@ -266,10 +266,6 @@ FILES+= routed FILES+= sendmail .endif -.if ${MK_TESTS} != "no" -SUBDIR+= tests -.endif - .if ${MK_TIMED} != "no" FILES+= timed .endif diff --git a/etc/rc.d/local_unbound b/etc/rc.d/local_unbound index 5f3d0cf8262d..ce3256d2f369 100755 --- a/etc/rc.d/local_unbound +++ b/etc/rc.d/local_unbound @@ -25,7 +25,7 @@ pidfile="/var/run/${name}.pid" : ${local_unbound_workdir:=/var/unbound} : ${local_unbound_config:=${local_unbound_workdir}/unbound.conf} -: ${local_unbound_flags:=-c${local_unbound_config}} +: ${local_unbound_flags:="-c ${local_unbound_config}"} : ${local_unbound_forwardconf:=${local_unbound_workdir}/forward.conf} : ${local_unbound_controlconf:=${local_unbound_workdir}/control.conf} : ${local_unbound_anchor:=${local_unbound_workdir}/root.key} diff --git a/gnu/lib/Makefile b/gnu/lib/Makefile index 373c2805fd66..796cefcacc98 100644 --- a/gnu/lib/Makefile +++ b/gnu/lib/Makefile @@ -2,7 +2,11 @@ .include -SUBDIR= csu libgcc libgcov libdialog libgomp libregex libreadline +SUBDIR= csu libgcc libdialog libregex + +.if ${MK_GCC} != "no" +SUBDIR+= libgcov libgomp +.endif .if ${MK_SSP} != "no" SUBDIR+= libssp @@ -12,6 +16,10 @@ SUBDIR+= libssp SUBDIR+= tests .endif +.if ${MK_GDB} != "no" +SUBDIR+= libreadline +.endif + # libsupc++ uses libstdc++ headers, although 'make includes' should # have taken care of that already. .if ${MK_GNUCXX} != "no" diff --git a/gnu/usr.bin/groff/src/preproc/soelim/Makefile b/gnu/usr.bin/groff/src/preproc/soelim/Makefile deleted file mode 100644 index 2c68b8005f0a..000000000000 --- a/gnu/usr.bin/groff/src/preproc/soelim/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# $FreeBSD$ - -PROG_CXX= soelim -SRCS= soelim.cpp -DPADD= ${LIBGROFF} -LDADD= ${LIBGROFF} -CLEANFILES= ${MAN} - -.include diff --git a/include/stdlib.h b/include/stdlib.h index a5ef0e777749..d5506ff65ea4 100644 --- a/include/stdlib.h +++ b/include/stdlib.h @@ -156,7 +156,8 @@ _Noreturn void _Exit(int); * If we're in a mode greater than C99, expose C11 functions. */ #if __ISO_C_VISIBLE >= 2011 || __cplusplus >= 201103L -void * aligned_alloc(size_t, size_t) __malloc_like __alloc_size(2); +void * aligned_alloc(size_t, size_t) __malloc_like __alloc_align(1) + __alloc_size(2); int at_quick_exit(void (*)(void)); _Noreturn void quick_exit(int); @@ -171,7 +172,7 @@ char *realpath(const char * __restrict, char * __restrict); int rand_r(unsigned *); /* (TSF) */ #endif #if __POSIX_VISIBLE >= 200112 -int posix_memalign(void **, size_t, size_t) __nonnull(1) +int posix_memalign(void **, size_t, size_t) __nonnull(1) __alloc_align(2) __alloc_size(3); /* (ADV) */ int setenv(const char *, const char *, int); int unsetenv(const char *); diff --git a/include/stringlist.h b/include/stringlist.h index d3154b3453c6..7222b31c36e3 100644 --- a/include/stringlist.h +++ b/include/stringlist.h @@ -12,11 +12,6 @@ * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Christos Zoulas. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED diff --git a/kerberos5/lib/Makefile b/kerberos5/lib/Makefile index d88bb5b1bd7b..dddb4d2dc1a8 100644 --- a/kerberos5/lib/Makefile +++ b/kerberos5/lib/Makefile @@ -3,7 +3,7 @@ SUBDIR= libasn1 libgssapi_krb5 libgssapi_ntlm libgssapi_spnego libhdb \ libheimntlm libhx509 libkadm5clnt libkadm5srv libkrb5 \ - libroken libsl libvers libkdc libwind libheimsqlite libheimbase libheimipcc libheimipcs + libroken libsl libvers libkdc libwind libheimbase libheimipcc libheimipcs SUBDIR+= libkafs5 # requires krb_err.h from libkrb5 diff --git a/kerberos5/lib/libhdb/Makefile b/kerberos5/lib/libhdb/Makefile index 2b178b2445f5..7781e630b780 100644 --- a/kerberos5/lib/libhdb/Makefile +++ b/kerberos5/lib/libhdb/Makefile @@ -3,7 +3,7 @@ LIB= hdb LDFLAGS= -Wl,--no-undefined VERSION_MAP= ${KRB5DIR}/lib/hdb/version-script.map -LIBADD= asn1 com_err krb5 roken heimsqlite +LIBADD= asn1 com_err krb5 roken sqlite3 DPADD= ${LDAPDPADD} MAN= HDB.3 hdb_entry_ex.3 @@ -56,7 +56,7 @@ SRCS= common.c \ ${GEN:S/.x$/.c/:S/.hx$/.h/} CFLAGS+=-I${KRB5DIR}/lib/hdb -I${KRB5DIR}/lib/asn1 \ - -I${KRB5DIR}/lib/roken -I${KRB5DIR}/lib/sqlite \ + -I${KRB5DIR}/lib/roken -I${.CURDIR}/../../../contrib/sqlite3/ \ -I${KRB5DIR}/lib/krb5 \ -I. ${LDAPCFLAGS} CFLAGS+=-DHDB_DB_DIR="\"/var/heimdal\"" diff --git a/kerberos5/lib/libheimsqlite/Makefile b/kerberos5/lib/libheimsqlite/Makefile deleted file mode 100644 index 8cad7e7202ad..000000000000 --- a/kerberos5/lib/libheimsqlite/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -# $FreeBSD$ - -LIB= heimsqlite -SRCS= sqlite3.c -LIBADD= pthread -CFLAGS+=-I${KRB5DIR}/lib/sqlite - -.include - -.PATH: ${KRB5DIR}/lib/sqlite diff --git a/lib/Makefile b/lib/Makefile index 349dfc201a88..b8b3a52ab5ca 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -8,7 +8,7 @@ # and the main list to avoid needing a SUBDIR_DEPEND line on every library # naming just these few items. -SUBDIR_ORDERED= ${_csu} \ +SUBDIR_ORDERED= csu \ .WAIT \ libc \ libc_nonshared \ @@ -65,7 +65,6 @@ SUBDIR= ${SUBDIR_ORDERED} \ ${_libldns} \ liblzma \ ${_libmagic} \ - libmandoc \ libmemstat \ libmd \ ${_libmilter} \ @@ -148,7 +147,6 @@ SUBDIR_DEPEND_libpam= libcrypt libopie ${_libradius} librpcsvc libtacplus libuti SUBDIR_DEPEND_libpjdlog= libutil SUBDIR_DEPEND_libprocstat= libkvm libutil SUBDIR_DEPEND_libradius= libmd -SUBDIR_DEPEND_libreadline= ncurses SUBDIR_DEPEND_libsmb= libkiconv SUBDIR_DEPEND_libstdc++= msun SUBDIR_DEPEND_libtacplus= libmd @@ -156,16 +154,6 @@ SUBDIR_DEPEND_libulog= libmd SUBDIR_DEPEND_libunbound= ${_libldns} SUBDIR_DEPEND_liblzma= ${_libthr} -.if exists(${.CURDIR}/csu/${MACHINE_ARCH}-elf) -_csu=csu/${MACHINE_ARCH}-elf -.elif exists(${.CURDIR}/csu/${MACHINE_ARCH}) -_csu=csu/${MACHINE_ARCH} -.elif exists(${.CURDIR}/csu/${MACHINE_CPUARCH}/Makefile) -_csu=csu/${MACHINE_CPUARCH} -.else -_csu=csu -.endif - # NB: keep these sorted by MK_* knobs .if ${MK_ATM} != "no" diff --git a/lib/clang/include/Makefile b/lib/clang/include/Makefile index d5db60e7d99f..5f973b13c573 100644 --- a/lib/clang/include/Makefile +++ b/lib/clang/include/Makefile @@ -8,7 +8,7 @@ LLVM_SRCS= ${.CURDIR}/../../../contrib/llvm .PATH: ${LLVM_SRCS}/tools/clang/lib/Headers -INCSDIR=${LIBDIR}/clang/3.6.0/include +INCSDIR=${LIBDIR}/clang/3.6.1/include INCS= __stddef_max_align_t.h \ __wmmintrin_aes.h \ diff --git a/lib/clang/include/clang/Basic/Version.inc b/lib/clang/include/clang/Basic/Version.inc index c6d4a8e4b60d..e13af795a37f 100644 --- a/lib/clang/include/clang/Basic/Version.inc +++ b/lib/clang/include/clang/Basic/Version.inc @@ -1,11 +1,11 @@ /* $FreeBSD$ */ -#define CLANG_VERSION 3.6.0 +#define CLANG_VERSION 3.6.1 #define CLANG_VERSION_MAJOR 3 #define CLANG_VERSION_MINOR 6 -#define CLANG_VERSION_PATCHLEVEL 0 +#define CLANG_VERSION_PATCHLEVEL 1 #define CLANG_VENDOR "FreeBSD " -#define CLANG_VENDOR_SUFFIX " 20150225" +#define CLANG_VENDOR_SUFFIX " 20150525" -#define SVN_REVISION "230434" +#define SVN_REVISION "237755" diff --git a/lib/clang/include/clang/Config/config.h b/lib/clang/include/clang/Config/config.h index 9c4512d83ecc..bb435f9de650 100644 --- a/lib/clang/include/clang/Config/config.h +++ b/lib/clang/include/clang/Config/config.h @@ -28,7 +28,7 @@ /* Define if we have libxml2 */ /* #undef CLANG_HAVE_LIBXML */ -#define PACKAGE_STRING "LLVM 3.6.0" +#define PACKAGE_STRING "LLVM 3.6.1" /* The LLVM product name and version */ #define BACKEND_PACKAGE_STRING PACKAGE_STRING diff --git a/lib/clang/include/llvm/Config/config.h b/lib/clang/include/llvm/Config/config.h index 3fc38bea7529..7a4e7eae2d1f 100644 --- a/lib/clang/include/llvm/Config/config.h +++ b/lib/clang/include/llvm/Config/config.h @@ -431,6 +431,9 @@ /* Have host's __chkstk */ /* #undef HAVE___CHKSTK */ +/* Have host's __chkstk_ms */ +/* #undef HAVE___CHKSTK_MS */ + /* Have host's __cmpdi2 */ /* #undef HAVE___CMPDI2 */ @@ -555,10 +558,10 @@ #define LLVM_VERSION_MINOR 6 /* Patch version of the LLVM API */ -#define LLVM_VERSION_PATCH 0 +#define LLVM_VERSION_PATCH 1 /* LLVM version string */ -#define LLVM_VERSION_STRING "3.6.0" +#define LLVM_VERSION_STRING "3.6.1" /* The shared library extension */ #define LTDL_SHLIB_EXT ".so" @@ -574,13 +577,13 @@ #define PACKAGE_NAME "LLVM" /* Define to the full name and version of this package. */ -#define PACKAGE_STRING "LLVM 3.6.0" +#define PACKAGE_STRING "LLVM 3.6.1" /* Define to the one symbol short name of this package. */ #define PACKAGE_TARNAME "llvm" /* Define to the version of this package. */ -#define PACKAGE_VERSION "3.6.0" +#define PACKAGE_VERSION "3.6.1" /* Define as the return type of signal handlers (`int' or `void'). */ #define RETSIGTYPE void diff --git a/lib/clang/include/llvm/Config/llvm-config.h b/lib/clang/include/llvm/Config/llvm-config.h index ba952630d7b7..a44de599a3b3 100644 --- a/lib/clang/include/llvm/Config/llvm-config.h +++ b/lib/clang/include/llvm/Config/llvm-config.h @@ -95,9 +95,9 @@ #define LLVM_VERSION_MINOR 6 /* Patch version of the LLVM API */ -#define LLVM_VERSION_PATCH 0 +#define LLVM_VERSION_PATCH 1 /* LLVM version string */ -#define LLVM_VERSION_STRING "3.6.0" +#define LLVM_VERSION_STRING "3.6.1" #endif diff --git a/lib/csu/Makefile b/lib/csu/Makefile index 320a5a4d4732..5f1cddcde662 100644 --- a/lib/csu/Makefile +++ b/lib/csu/Makefile @@ -1,8 +1,7 @@ # $FreeBSD$ -ARCH= ${MACHINE_ARCH:S/i386/i386-elf/} -.if exists(${.CURDIR}/${ARCH}) -SUBDIR+= ${ARCH} +.if exists(${.CURDIR}/${MACHINE_ARCH}) +SUBDIR+= ${MACHINE_ARCH} .else SUBDIR+= ${MACHINE_CPUARCH} .endif diff --git a/lib/csu/i386-elf/Makefile b/lib/csu/i386/Makefile similarity index 100% rename from lib/csu/i386-elf/Makefile rename to lib/csu/i386/Makefile diff --git a/lib/csu/i386-elf/crt1_c.c b/lib/csu/i386/crt1_c.c similarity index 100% rename from lib/csu/i386-elf/crt1_c.c rename to lib/csu/i386/crt1_c.c diff --git a/lib/csu/i386-elf/crt1_s.S b/lib/csu/i386/crt1_s.S similarity index 100% rename from lib/csu/i386-elf/crt1_s.S rename to lib/csu/i386/crt1_s.S diff --git a/lib/csu/i386-elf/crti.S b/lib/csu/i386/crti.S similarity index 100% rename from lib/csu/i386-elf/crti.S rename to lib/csu/i386/crti.S diff --git a/lib/csu/i386-elf/crtn.S b/lib/csu/i386/crtn.S similarity index 100% rename from lib/csu/i386-elf/crtn.S rename to lib/csu/i386/crtn.S diff --git a/lib/libc/aarch64/Symbol.map b/lib/libc/aarch64/Symbol.map index 5b2100008a9b..a0b33da518db 100644 --- a/lib/libc/aarch64/Symbol.map +++ b/lib/libc/aarch64/Symbol.map @@ -13,6 +13,7 @@ FBSD_1.0 { _setjmp; _longjmp; + fabs; setjmp; longjmp; sigsetjmp; diff --git a/lib/libc/aarch64/gen/Makefile.inc b/lib/libc/aarch64/gen/Makefile.inc index 32dea00008c8..c4f7c80a84f7 100644 --- a/lib/libc/aarch64/gen/Makefile.inc +++ b/lib/libc/aarch64/gen/Makefile.inc @@ -1,6 +1,7 @@ # $FreeBSD$ -SRCS+= flt_rounds.c \ +SRCS+= fabs.S \ + flt_rounds.c \ ldexp.c \ _setjmp.S \ _set_tp.c \ diff --git a/lib/libc/aarch64/gen/fabs.S b/lib/libc/aarch64/gen/fabs.S new file mode 100644 index 000000000000..2f5fd06dec6c --- /dev/null +++ b/lib/libc/aarch64/gen/fabs.S @@ -0,0 +1,33 @@ +/*- + * Copyright (c) 2015 The FreeBSD Foundation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +ENTRY(fabs) + fabs d0, d0 + ret +END(fabs) diff --git a/lib/libc/arm/SYS.h b/lib/libc/arm/SYS.h index ed1a045c64e2..3254c4585561 100644 --- a/lib/libc/arm/SYS.h +++ b/lib/libc/arm/SYS.h @@ -62,6 +62,7 @@ #define _SYSCALL(x) \ _SYSCALL_NOERROR(x); \ + it cs; \ bcs PIC_SYM(CERROR, PLT) #define SYSCALL(x) \ @@ -72,6 +73,7 @@ .weak _C_LABEL(__CONCAT(_,x)); \ .set _C_LABEL(__CONCAT(_,x)),_C_LABEL(__CONCAT(__sys_,x)); \ SYSTRAP(x); \ + it cs; \ bcs PIC_SYM(CERROR, PLT); \ RET diff --git a/lib/libc/arm/aeabi/aeabi_vfp_double.S b/lib/libc/arm/aeabi/aeabi_vfp_double.S index 62100d286222..aae49f85b940 100644 --- a/lib/libc/arm/aeabi/aeabi_vfp_double.S +++ b/lib/libc/arm/aeabi/aeabi_vfp_double.S @@ -66,6 +66,7 @@ AEABI_ENTRY(dcmpeq) LOAD_DREG(d1, r2, r3) vcmp.f64 d0, d1 vmrs APSR_nzcv, fpscr + ite ne movne r0, #0 moveq r0, #1 RET @@ -77,8 +78,9 @@ AEABI_ENTRY(dcmplt) LOAD_DREG(d1, r2, r3) vcmp.f64 d0, d1 vmrs APSR_nzcv, fpscr + ite cs movcs r0, #0 - movlt r0, #1 + movcc r0, #1 RET AEABI_END(dcmplt) @@ -88,6 +90,7 @@ AEABI_ENTRY(dcmple) LOAD_DREG(d1, r2, r3) vcmp.f64 d0, d1 vmrs APSR_nzcv, fpscr + ite hi movhi r0, #0 movls r0, #1 RET @@ -99,6 +102,7 @@ AEABI_ENTRY(dcmpge) LOAD_DREG(d1, r2, r3) vcmp.f64 d0, d1 vmrs APSR_nzcv, fpscr + ite lt movlt r0, #0 movge r0, #1 RET @@ -110,6 +114,7 @@ AEABI_ENTRY(dcmpgt) LOAD_DREG(d1, r2, r3) vcmp.f64 d0, d1 vmrs APSR_nzcv, fpscr + ite le movle r0, #0 movgt r0, #1 RET @@ -121,6 +126,7 @@ AEABI_ENTRY(dcmpun) LOAD_DREG(d1, r2, r3) vcmp.f64 d0, d1 vmrs APSR_nzcv, fpscr + ite vc movvc r0, #0 movvs r0, #1 RET diff --git a/lib/libc/arm/aeabi/aeabi_vfp_float.S b/lib/libc/arm/aeabi/aeabi_vfp_float.S index c9a9a7ec2179..7de8daf4f32b 100644 --- a/lib/libc/arm/aeabi/aeabi_vfp_float.S +++ b/lib/libc/arm/aeabi/aeabi_vfp_float.S @@ -62,6 +62,7 @@ AEABI_ENTRY(fcmpeq) LOAD_SREGS(s0, s1, r0, r1) vcmp.f32 s0, s1 vmrs APSR_nzcv, fpscr + ite ne movne r0, #0 moveq r0, #1 RET @@ -72,8 +73,9 @@ AEABI_ENTRY(fcmplt) LOAD_SREGS(s0, s1, r0, r1) vcmp.f32 s0, s1 vmrs APSR_nzcv, fpscr + ite cs movcs r0, #0 - movlt r0, #1 + movcc r0, #1 RET AEABI_END(fcmplt) @@ -82,6 +84,7 @@ AEABI_ENTRY(fcmple) LOAD_SREGS(s0, s1, r0, r1) vcmp.f32 s0, s1 vmrs APSR_nzcv, fpscr + ite hi movhi r0, #0 movls r0, #1 RET @@ -92,6 +95,7 @@ AEABI_ENTRY(fcmpge) LOAD_SREGS(s0, s1, r0, r1) vcmp.f32 s0, s1 vmrs APSR_nzcv, fpscr + ite lt movlt r0, #0 movge r0, #1 RET @@ -102,6 +106,7 @@ AEABI_ENTRY(fcmpgt) LOAD_SREGS(s0, s1, r0, r1) vcmp.f32 s0, s1 vmrs APSR_nzcv, fpscr + ite le movle r0, #0 movgt r0, #1 RET @@ -112,6 +117,7 @@ AEABI_ENTRY(fcmpun) LOAD_SREGS(s0, s1, r0, r1) vcmp.f32 s0, s1 vmrs APSR_nzcv, fpscr + ite vc movvc r0, #0 movvs r0, #1 RET diff --git a/lib/libc/arm/gen/_setjmp.S b/lib/libc/arm/gen/_setjmp.S index 387f8a92a501..3de9d99c56ec 100644 --- a/lib/libc/arm/gen/_setjmp.S +++ b/lib/libc/arm/gen/_setjmp.S @@ -85,7 +85,13 @@ ENTRY(_setjmp) add r0, r0, #(_JB_REG_R4 * 4) /* Store integer registers */ +#ifndef __thumb__ stmia r0, {r4-r14} +#else + stmia r0, {r4-r12} + str r13, [r0, #((_JB_REG_R13 - _JB_REG_R4) * 4)] + str r14, [r0, #((_JB_REG_R14 - _JB_REG_R4) * 4)] +#endif mov r0, #0x00000000 RET @@ -120,15 +126,24 @@ ENTRY(_longjmp) add r0, r0, #(_JB_REG_R4 * 4) /* Restore integer registers */ +#ifndef __thumb__ ldmia r0, {r4-r14} +#else + ldmia r0, {r4-r12} + ldr r13, [r0, #((_JB_REG_R13 - _JB_REG_R4) * 4)] + ldr r14, [r0, #((_JB_REG_R14 - _JB_REG_R4) * 4)] +#endif /* Validate sp and r14 */ teq sp, #0 + it ne teqne r14, #0 + it eq beq botch /* Set return value */ movs r0, r1 + it eq moveq r0, #0x00000001 RET @@ -137,7 +152,7 @@ botch: #if !defined(_STANDALONE) bl PIC_SYM(_C_LABEL(longjmperror), PLT) bl PIC_SYM(_C_LABEL(abort), PLT) - b . - 8 /* Cannot get here */ +1: b 1b /* Cannot get here */ #else b . #endif diff --git a/lib/libc/arm/gen/setjmp.S b/lib/libc/arm/gen/setjmp.S index ad4ba38f8f86..62695634a480 100644 --- a/lib/libc/arm/gen/setjmp.S +++ b/lib/libc/arm/gen/setjmp.S @@ -90,7 +90,13 @@ ENTRY(setjmp) /* Store integer registers */ add r0, r0, #(_JB_REG_R4 * 4) +#ifndef __thumb__ stmia r0, {r4-r14} +#else + stmia r0, {r4-r12} + str r13, [r0, #((_JB_REG_R13 - _JB_REG_R4) * 4)] + str r14, [r0, #((_JB_REG_R14 - _JB_REG_R4) * 4)] +#endif mov r0, #0x00000000 RET @@ -133,15 +139,24 @@ ENTRY(__longjmp) add r0, r0, #(_JB_REG_R4 * 4) /* Restore integer registers */ +#ifndef __thumb__ ldmia r0, {r4-r14} +#else + ldmia r0, {r4-r12} + ldr r13, [r0, #((_JB_REG_R13 - _JB_REG_R4) * 4)] + ldr r14, [r0, #((_JB_REG_R14 - _JB_REG_R4) * 4)] +#endif /* Validate sp and r14 */ teq sp, #0 + it ne teqne r14, #0 + it eq beq .Lbotch /* Set return value */ movs r0, r1 + it eq moveq r0, #0x00000001 RET @@ -149,5 +164,5 @@ ENTRY(__longjmp) .Lbotch: bl PIC_SYM(_C_LABEL(longjmperror), PLT) bl PIC_SYM(_C_LABEL(abort), PLT) - b . - 8 /* Cannot get here */ +1: b 1b /* Cannot get here */ END(__longjmp) diff --git a/lib/libc/arm/sys/brk.S b/lib/libc/arm/sys/brk.S index f3d8d8751524..e5f833637d09 100644 --- a/lib/libc/arm/sys/brk.S +++ b/lib/libc/arm/sys/brk.S @@ -53,16 +53,10 @@ _C_LABEL(minbrk): * Change the data segment size */ ENTRY(_brk) -#ifdef PIC /* Setup the GOT */ - ldr r3, .Lgot - add r3, pc, r3 -.L1: - ldr r1, .Lminbrk - ldr r1, [r3, r1] -#else - ldr r1, .Lminbrk -#endif + GOT_INIT(r3, .Lgot, .L1) + GOT_GET(r1, r3, .Lminbrk) + /* Get the minimum allowable brk address */ ldr r1, [r1] @@ -71,6 +65,7 @@ ENTRY(_brk) * if the address is below minbrk. */ cmp r0, r1 + it lt movlt r0, r1 mov r2, r0 SYSTRAP(break) @@ -90,10 +85,7 @@ ENTRY(_brk) RET .align 2 -#ifdef PIC -.Lgot: - .word _GLOBAL_OFFSET_TABLE_ - (.L1+4) -#endif + GOT_INITSYM(.Lgot, .L1) .Lminbrk: .word PIC_SYM(_C_LABEL(minbrk), GOT) .Lcurbrk: diff --git a/lib/libc/arm/sys/sbrk.S b/lib/libc/arm/sys/sbrk.S index 7d22aa7d7ce0..5cd9a03e3a80 100644 --- a/lib/libc/arm/sys/sbrk.S +++ b/lib/libc/arm/sys/sbrk.S @@ -52,16 +52,10 @@ CURBRK: * Change the data segment size */ ENTRY(_sbrk) -#ifdef PIC /* Setup the GOT */ - ldr r3, .Lgot - add r3, pc, r3 -.L1: - ldr r2, .Lcurbrk - ldr r2, [r3, r2] -#else - ldr r2, .Lcurbrk -#endif + GOT_INIT(r3, .Lgot, .L1) + GOT_GET(r2, r3, .Lcurbrk) + /* Get the current brk address */ ldr r1, [r2] @@ -80,10 +74,7 @@ ENTRY(_sbrk) RET .align 0 -#ifdef PIC -.Lgot: - .word _GLOBAL_OFFSET_TABLE_ - (.L1+4) -#endif + GOT_INITSYM(.Lgot, .L1) .Lcurbrk: .word PIC_SYM(CURBRK, GOT) END(_sbrk) diff --git a/lib/libc/db/hash/hash.c b/lib/libc/db/hash/hash.c index af80929112b0..e6da5fea4786 100644 --- a/lib/libc/db/hash/hash.c +++ b/lib/libc/db/hash/hash.c @@ -808,7 +808,7 @@ __expand_table(HTAB *hashp) hashp->DSIZE = dirsize << 1; } if ((hashp->dir[new_segnum] = - (SEGMENT)calloc(hashp->SGSIZE, sizeof(SEGMENT))) == NULL) + calloc(hashp->SGSIZE, sizeof(SEGMENT))) == NULL) return (-1); hashp->exsegs++; hashp->nsegs++; @@ -877,7 +877,7 @@ alloc_segs(HTAB *hashp, int nsegs) int save_errno; if ((hashp->dir = - (SEGMENT *)calloc(hashp->DSIZE, sizeof(SEGMENT *))) == NULL) { + calloc(hashp->DSIZE, sizeof(SEGMENT *))) == NULL) { save_errno = errno; (void)hdestroy(hashp); errno = save_errno; @@ -887,8 +887,7 @@ alloc_segs(HTAB *hashp, int nsegs) if (nsegs == 0) return (0); /* Allocate segments */ - if ((store = (SEGMENT)calloc(nsegs << hashp->SSHIFT, - sizeof(SEGMENT))) == NULL) { + if ((store = calloc(nsegs << hashp->SSHIFT, sizeof(SEGMENT))) == NULL) { save_errno = errno; (void)hdestroy(hashp); errno = save_errno; diff --git a/lib/libc/gen/dlfcn.c b/lib/libc/gen/dlfcn.c index 5bdf4ab48e5b..7d287974fa25 100644 --- a/lib/libc/gen/dlfcn.c +++ b/lib/libc/gen/dlfcn.c @@ -149,10 +149,8 @@ static void dl_init_phdr_info(void) { Elf_Auxinfo *auxp; - size_t phent; unsigned int i; - phent = 0; for (auxp = __elf_aux_vector; auxp->a_type != AT_NULL; auxp++) { switch (auxp->a_type) { case AT_BASE: @@ -165,9 +163,6 @@ dl_init_phdr_info(void) phdr_info.dlpi_phdr = (const Elf_Phdr *)auxp->a_un.a_ptr; break; - case AT_PHENT: - phent = auxp->a_un.a_val; - break; case AT_PHNUM: phdr_info.dlpi_phnum = (Elf_Half)auxp->a_un.a_val; break; diff --git a/lib/libc/gen/stringlist.c b/lib/libc/gen/stringlist.c index a09a8e705e36..236af17516d6 100644 --- a/lib/libc/gen/stringlist.c +++ b/lib/libc/gen/stringlist.c @@ -10,8 +10,6 @@ * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED diff --git a/lib/libc/net/recv.c b/lib/libc/net/recv.c index f71d4780bb7c..6a584cadbff6 100644 --- a/lib/libc/net/recv.c +++ b/lib/libc/net/recv.c @@ -35,6 +35,7 @@ __FBSDID("$FreeBSD$"); #include #include +#include "libc_private.h" #include @@ -48,5 +49,8 @@ recv(s, buf, len, flags) * POSIX says recv() shall be a cancellation point, so call the * cancellation-enabled recvfrom() and not _recvfrom(). */ - return (recvfrom(s, buf, len, flags, NULL, 0)); + return (((ssize_t (*)(int, void *, size_t, int, + struct sockaddr *, socklen_t *)) + __libc_interposing[INTERPOS_recvfrom])(s, buf, len, flags, + NULL, NULL)); } diff --git a/lib/libc/net/send.c b/lib/libc/net/send.c index 93cdfda17532..c44f4b922a81 100644 --- a/lib/libc/net/send.c +++ b/lib/libc/net/send.c @@ -35,6 +35,7 @@ __FBSDID("$FreeBSD$"); #include #include +#include "libc_private.h" #include @@ -48,5 +49,8 @@ send(s, msg, len, flags) * POSIX says send() shall be a cancellation point, so call the * cancellation-enabled sendto() and not _sendto(). */ - return (sendto(s, msg, len, flags, NULL, 0)); + return (((ssize_t (*)(int, const void *, size_t, int, + const struct sockaddr *, socklen_t)) + __libc_interposing[INTERPOS_sendto])(s, msg, len, flags, + NULL, 0)); } diff --git a/lib/libc/string/memmem.3 b/lib/libc/string/memmem.3 index 31cdf77135e2..a0db94fa408e 100644 --- a/lib/libc/string/memmem.3 +++ b/lib/libc/string/memmem.3 @@ -26,7 +26,7 @@ .\" .\" $FreeBSD$ .\" -.Dd August 24, 2005 +.Dd May 26, 2015 .Dt MEMMEM 3 .Os .Sh NAME @@ -51,14 +51,12 @@ in the byte string .Fa big . .Sh RETURN VALUES If -.Fa big_len -is smaller than -.Fa little_len , -if .Fa little_len -is 0, if -.Fa big_len -is 0 or if +is zero +.Fa big +is returned (that is, an empty little is deemed to match at the beginning of +big); +if .Fa little occurs nowhere in .Fa big , @@ -84,3 +82,11 @@ function first appeared in .Sh BUGS This function was broken in Linux libc up to and including version 5.0.9 and in GNU libc prior to version 2.1. +Prior to +.Fx 11.0 +.Nm +returned +.Dv NULL +when +.Fa little_len +equals 0. diff --git a/lib/libc/string/memmem.c b/lib/libc/string/memmem.c index 72e6517e7b4d..3fd05dfdbbc9 100644 --- a/lib/libc/string/memmem.c +++ b/lib/libc/string/memmem.c @@ -42,9 +42,9 @@ memmem(const void *l, size_t l_len, const void *s, size_t s_len) const char *cl = (const char *)l; const char *cs = (const char *)s; - /* we need something to compare */ - if (l_len == 0 || s_len == 0) - return NULL; + /* empty "s" matches the beginning of "l" */ + if (s_len == 0) + return (void *)cl; /* "s" must be smaller or equal to "l" */ if (l_len < s_len) diff --git a/lib/libclang_rt/Makefile.inc b/lib/libclang_rt/Makefile.inc index be0122eb9cc3..03873f232d14 100644 --- a/lib/libclang_rt/Makefile.inc +++ b/lib/libclang_rt/Makefile.inc @@ -5,7 +5,7 @@ CRTARCH=${MACHINE_CPUARCH:C/amd64/x86_64/} CRTSRC=${.CURDIR}/../../../contrib/compiler-rt -LIBDIR=/usr/lib/clang/3.6.0/lib/freebsd +LIBDIR=/usr/lib/clang/3.6.1/lib/freebsd NO_PIC= MK_PROFILE=no diff --git a/lib/libedit/chartype.c b/lib/libedit/chartype.c index eed62ef2843d..c240c8ca3c1c 100644 --- a/lib/libedit/chartype.c +++ b/lib/libedit/chartype.c @@ -1,4 +1,4 @@ -/* $NetBSD: chartype.c,v 1.10 2011/08/16 16:25:15 christos Exp $ */ +/* $NetBSD: chartype.c,v 1.12 2015/02/22 02:16:19 christos Exp $ */ /*- * Copyright (c) 2009 The NetBSD Foundation, Inc. @@ -31,7 +31,7 @@ */ #include "config.h" #if !defined(lint) && !defined(SCCSID) -__RCSID("$NetBSD: chartype.c,v 1.10 2011/08/16 16:25:15 christos Exp $"); +__RCSID("$NetBSD: chartype.c,v 1.12 2015/02/22 02:16:19 christos Exp $"); #endif /* not lint && not SCCSID */ #include __FBSDID("$FreeBSD$"); @@ -42,31 +42,46 @@ __FBSDID("$FreeBSD$"); #define CT_BUFSIZ ((size_t)1024) #ifdef WIDECHAR -protected void -ct_conv_buff_resize(ct_buffer_t *conv, size_t mincsize, size_t minwsize) +protected int +ct_conv_cbuff_resize(ct_buffer_t *conv, size_t csize) { void *p; - if (mincsize > conv->csize) { - conv->csize = mincsize; - p = el_realloc(conv->cbuff, conv->csize * sizeof(*conv->cbuff)); - if (p == NULL) { - conv->csize = 0; - el_free(conv->cbuff); - conv->cbuff = NULL; - } else - conv->cbuff = p; - } - if (minwsize > conv->wsize) { - conv->wsize = minwsize; - p = el_realloc(conv->wbuff, conv->wsize * sizeof(*conv->wbuff)); - if (p == NULL) { - conv->wsize = 0; - el_free(conv->wbuff); - conv->wbuff = NULL; - } else - conv->wbuff = p; + if (csize <= conv->csize) + return 0; + + conv->csize = csize; + + p = el_realloc(conv->cbuff, conv->csize * sizeof(*conv->cbuff)); + if (p == NULL) { + conv->csize = 0; + el_free(conv->cbuff); + conv->cbuff = NULL; + return -1; } + conv->cbuff = p; + return 0; +} + +protected int +ct_conv_wbuff_resize(ct_buffer_t *conv, size_t wsize) +{ + void *p; + + if (wsize <= conv->wsize) + return 0; + + conv->wsize = wsize; + + p = el_realloc(conv->wbuff, conv->wsize * sizeof(*conv->wbuff)); + if (p == NULL) { + conv->wsize = 0; + el_free(conv->wbuff); + conv->wbuff = NULL; + return -1; + } + conv->wbuff = p; + return 0; } @@ -74,26 +89,22 @@ public char * ct_encode_string(const Char *s, ct_buffer_t *conv) { char *dst; - ssize_t used = 0; + ssize_t used; if (!s) return NULL; - if (!conv->cbuff) - ct_conv_buff_resize(conv, CT_BUFSIZ, (size_t)0); - if (!conv->cbuff) - return NULL; dst = conv->cbuff; - while (*s) { - used = (ssize_t)(conv->csize - (size_t)(dst - conv->cbuff)); - if (used < 5) { - used = dst - conv->cbuff; - ct_conv_buff_resize(conv, conv->csize + CT_BUFSIZ, - (size_t)0); - if (!conv->cbuff) + for (;;) { + used = (ssize_t)(dst - conv->cbuff); + if ((conv->csize - (size_t)used) < 5) { + if (ct_conv_cbuff_resize(conv, + conv->csize + CT_BUFSIZ) == -1) return NULL; dst = conv->cbuff + used; } + if (!*s) + break; used = ct_encode_char(dst, (size_t)5, *s); if (used == -1) /* failed to encode, need more buffer space */ abort(); @@ -107,22 +118,19 @@ ct_encode_string(const Char *s, ct_buffer_t *conv) public Char * ct_decode_string(const char *s, ct_buffer_t *conv) { - size_t len = 0; + size_t len; if (!s) return NULL; - if (!conv->wbuff) - ct_conv_buff_resize(conv, (size_t)0, CT_BUFSIZ); - if (!conv->wbuff) - return NULL; len = ct_mbstowcs(NULL, s, (size_t)0); if (len == (size_t)-1) return NULL; - if (len > conv->wsize) - ct_conv_buff_resize(conv, (size_t)0, len + 1); - if (!conv->wbuff) - return NULL; + + if (conv->wsize < ++len) + if (ct_conv_wbuff_resize(conv, len + CT_BUFSIZ) == -1) + return NULL; + ct_mbstowcs(conv->wbuff, s, conv->wsize); return conv->wbuff; } @@ -141,9 +149,9 @@ ct_decode_argv(int argc, const char *argv[], ct_buffer_t *conv) * the argv strings. */ for (i = 0, bufspace = 0; i < argc; ++i) bufspace += argv[i] ? strlen(argv[i]) + 1 : 0; - ct_conv_buff_resize(conv, (size_t)0, bufspace); - if (!conv->wsize) - return NULL; + if (conv->wsize < ++bufspace) + if (ct_conv_wbuff_resize(conv, bufspace + CT_BUFSIZ) == -1) + return NULL; wargv = el_malloc((size_t)argc * sizeof(*wargv)); diff --git a/lib/libedit/chartype.h b/lib/libedit/chartype.h index c6aa8d51f0c6..17ca5f368673 100644 --- a/lib/libedit/chartype.h +++ b/lib/libedit/chartype.h @@ -1,4 +1,4 @@ -/* $NetBSD: chartype.h,v 1.10 2011/11/16 01:45:10 christos Exp $ */ +/* $NetBSD: chartype.h,v 1.15 2015/05/17 13:14:41 christos Exp $ */ /*- * Copyright (c) 2009 The NetBSD Foundation, Inc. @@ -39,7 +39,7 @@ * supports non-BMP code points without requiring UTF-16, but nothing * seems to actually advertise this properly, despite Unicode 3.1 having * been around since 2001... */ -#if !defined(__NetBSD__) && !defined(__sun) && !(defined(__APPLE__) && defined(__MACH__)) && !defined(__FreeBSD__) +#if !defined(__NetBSD__) && !defined(__sun) && !(defined(__APPLE__) && defined(__MACH__)) && !defined(__OpenBSD__) && !defined(__FreeBSD__) #ifndef __STDC_ISO_10646__ /* In many places it is assumed that the first 127 code points are ASCII * compatible, so ensure wchar_t indeed does ISO 10646 and not some other @@ -67,6 +67,7 @@ #define FUN(prefix,rest) prefix ## _w ## rest #define FUNW(type) type ## _w #define TYPE(type) type ## W +#define FCHAR "%lc" #define FSTR "%ls" #define STR(x) L ## x #define UC(c) c @@ -121,6 +122,7 @@ Width(wchar_t c) #define FUN(prefix,rest) prefix ## _ ## rest #define FUNW(type) type #define TYPE(type) type +#define FCHAR "%c" #define FSTR "%s" #define STR(x) x #define UC(c) (unsigned char)(c) @@ -184,7 +186,8 @@ public Char *ct_decode_string(const char *, ct_buffer_t *); protected Char **ct_decode_argv(int, const char *[], ct_buffer_t *); /* Resizes the conversion buffer(s) if needed. */ -protected void ct_conv_buff_resize(ct_buffer_t *, size_t, size_t); +protected int ct_conv_cbuff_resize(ct_buffer_t *, size_t); +protected int ct_conv_wbuff_resize(ct_buffer_t *, size_t); protected ssize_t ct_encode_char(char *, size_t, Char); protected size_t ct_enc_width(Char); @@ -194,7 +197,8 @@ protected size_t ct_enc_width(Char); #define ct_encode_string(s, b) (s) #define ct_decode_string(s, b) (s) #define ct_decode_argv(l, s, b) (s) -#define ct_conv_buff_resize(b, os, ns) +#define ct_conv_cbuff_resize(b, s) ((s) == (0)) +#define ct_conv_wbuff_resize(b, s) ((s) == (0)) #define ct_encode_char(d, l, s) (*d = s, 1) #define ct_free_argv(s) #endif diff --git a/lib/libedit/edit/readline/readline.h b/lib/libedit/edit/readline/readline.h index 54e6f3228a10..4371457b7862 100644 --- a/lib/libedit/edit/readline/readline.h +++ b/lib/libedit/edit/readline/readline.h @@ -1,4 +1,4 @@ -/* $NetBSD: readline.h,v 1.31 2010/08/04 20:29:18 christos Exp $ */ +/* $NetBSD: readline.h,v 1.34 2013/05/28 00:10:34 christos Exp $ */ /*- * Copyright (c) 1997 The NetBSD Foundation, Inc. diff --git a/lib/libedit/el.c b/lib/libedit/el.c index a0d70158193b..57ea6e55cffd 100644 --- a/lib/libedit/el.c +++ b/lib/libedit/el.c @@ -96,7 +96,7 @@ el_init_fd(const char *prog, FILE *fin, FILE *fout, FILE *ferr, */ el->el_flags = 0; #ifdef WIDECHAR - if (setlocale(LC_CTYPE, NULL) != NULL) { + if (setlocale(LC_CTYPE, NULL) != NULL){ if (strcmp(nl_langinfo(CODESET), "UTF-8") == 0) el->el_flags |= CHARSET_IS_UTF8; } diff --git a/lib/libedit/eln.c b/lib/libedit/eln.c index 41697f490be7..013aa3e04093 100644 --- a/lib/libedit/eln.c +++ b/lib/libedit/eln.c @@ -1,4 +1,4 @@ -/* $NetBSD: eln.c,v 1.17 2014/06/18 18:12:28 christos Exp $ */ +/* $NetBSD: eln.c,v 1.19 2015/05/18 15:07:04 christos Exp $ */ /*- * Copyright (c) 2009 The NetBSD Foundation, Inc. @@ -34,7 +34,7 @@ */ #include "config.h" #if !defined(lint) && !defined(SCCSID) -__RCSID("$NetBSD: eln.c,v 1.17 2014/06/18 18:12:28 christos Exp $"); +__RCSID("$NetBSD: eln.c,v 1.19 2015/05/18 15:07:04 christos Exp $"); #endif /* not lint && not SCCSID */ #include __FBSDID("$FreeBSD$"); @@ -77,18 +77,18 @@ public const char * el_gets(EditLine *el, int *nread) { const wchar_t *tmp; - int nwread; - - *nread = 0; if (!(el->el_flags & CHARSET_IS_UTF8)) el->el_flags |= IGNORE_EXTCHARS; - tmp = el_wgets(el, &nwread); + tmp = el_wgets(el, nread); + if (tmp != NULL) { + size_t nwread = 0; + for (int i = 0; i < *nread; i++) + nwread += ct_enc_width(tmp[i]); + *nread = (int)nwread; + } if (!(el->el_flags & CHARSET_IS_UTF8)) el->el_flags &= ~IGNORE_EXTCHARS; - for (int i = 0; i < nwread; i++) - *nread += ct_enc_width(tmp[i]); - return ct_encode_string(tmp, &el->el_lgcyconv); } diff --git a/lib/libedit/map.c b/lib/libedit/map.c index 44c8fbb1e2c8..03bb3d8dfaba 100644 --- a/lib/libedit/map.c +++ b/lib/libedit/map.c @@ -1,4 +1,4 @@ -/* $NetBSD: map.c,v 1.34 2014/07/06 18:15:34 christos Exp $ */ +/* $NetBSD: map.c,v 1.35 2015/05/14 10:44:15 christos Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -37,7 +37,7 @@ #if 0 static char sccsid[] = "@(#)map.c 8.1 (Berkeley) 6/4/93"; #else -__RCSID("$NetBSD: map.c,v 1.34 2014/07/06 18:15:34 christos Exp $"); +__RCSID("$NetBSD: map.c,v 1.35 2015/05/14 10:44:15 christos Exp $"); #endif #endif /* not lint && not SCCSID */ #include @@ -1302,8 +1302,8 @@ map_bind(EditLine *el, int argc, const Char **argv) return 0; default: (void) fprintf(el->el_errfile, - "" FSTR ": Invalid switch `%c'.\n", - argv[0], p[1]); + "" FSTR ": Invalid switch `" FCHAR "'.\n", + argv[0], (Int)p[1]); } else break; diff --git a/lib/libedit/readline.c b/lib/libedit/readline.c index a7d13506a2bc..2dd7f4f59614 100644 --- a/lib/libedit/readline.c +++ b/lib/libedit/readline.c @@ -1,4 +1,4 @@ -/* $NetBSD: readline.c,v 1.113 2014/10/18 08:33:23 snj Exp $ */ +/* $NetBSD: readline.c,v 1.115 2015/04/01 15:23:15 christos Exp $ */ /*- * Copyright (c) 1997 The NetBSD Foundation, Inc. @@ -31,7 +31,7 @@ #include "config.h" #if !defined(lint) && !defined(SCCSID) -__RCSID("$NetBSD: readline.c,v 1.113 2014/10/18 08:33:23 snj Exp $"); +__RCSID("$NetBSD: readline.c,v 1.115 2015/04/01 15:23:15 christos Exp $"); #endif /* not lint && not SCCSID */ #include __FBSDID("$FreeBSD$"); @@ -364,6 +364,37 @@ rl_initialize(void) _el_rl_tstp); el_set(e, EL_BIND, "^Z", "rl_tstp", NULL); + /* + * Set some readline compatible key-bindings. + */ + el_set(e, EL_BIND, "^R", "em-inc-search-prev", NULL); + + /* + * Allow the use of Home/End keys. + */ + el_set(e, EL_BIND, "\\e[1~", "ed-move-to-beg", NULL); + el_set(e, EL_BIND, "\\e[4~", "ed-move-to-end", NULL); + el_set(e, EL_BIND, "\\e[7~", "ed-move-to-beg", NULL); + el_set(e, EL_BIND, "\\e[8~", "ed-move-to-end", NULL); + el_set(e, EL_BIND, "\\e[H", "ed-move-to-beg", NULL); + el_set(e, EL_BIND, "\\e[F", "ed-move-to-end", NULL); + + /* + * Allow the use of the Delete/Insert keys. + */ + el_set(e, EL_BIND, "\\e[3~", "ed-delete-next-char", NULL); + el_set(e, EL_BIND, "\\e[2~", "ed-quoted-insert", NULL); + + /* + * Ctrl-left-arrow and Ctrl-right-arrow for word moving. + */ + el_set(e, EL_BIND, "\\e[1;5C", "em-next-word", NULL); + el_set(e, EL_BIND, "\\e[1;5D", "ed-prev-word", NULL); + el_set(e, EL_BIND, "\\e[5C", "em-next-word", NULL); + el_set(e, EL_BIND, "\\e[5D", "ed-prev-word", NULL); + el_set(e, EL_BIND, "\\e\\e[C", "em-next-word", NULL); + el_set(e, EL_BIND, "\\e\\e[D", "ed-prev-word", NULL); + /* read settings from configuration file */ el_source(e, NULL); @@ -950,7 +981,8 @@ history_expand(char *str, char **output) for (; str[j]; j++) { if (str[j] == '\\' && str[j + 1] == history_expansion_char) { - (void)strcpy(&str[j], &str[j + 1]); + len = strlen(&str[j + 1]) + 1; + memmove(&str[j], &str[j + 1], len); continue; } if (!loop_again) { diff --git a/lib/libedit/tty.c b/lib/libedit/tty.c index 562730e176d1..ecf2e2a21335 100644 --- a/lib/libedit/tty.c +++ b/lib/libedit/tty.c @@ -1,4 +1,4 @@ -/* $NetBSD: tty.c,v 1.46 2014/06/18 18:52:49 christos Exp $ */ +/* $NetBSD: tty.c,v 1.47 2015/05/14 10:44:15 christos Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -37,7 +37,7 @@ #if 0 static char sccsid[] = "@(#)tty.c 8.1 (Berkeley) 6/4/93"; #else -__RCSID("$NetBSD: tty.c,v 1.46 2014/06/18 18:52:49 christos Exp $"); +__RCSID("$NetBSD: tty.c,v 1.47 2015/05/14 10:44:15 christos Exp $"); #endif #endif /* not lint && not SCCSID */ #include @@ -1173,8 +1173,8 @@ tty_stty(EditLine *el, int argc __attribute__((__unused__)), const Char **argv) break; default: (void) fprintf(el->el_errfile, - "%s: Unknown switch `%c'.\n", - name, argv[0][1]); + "%s: Unknown switch `" FCHAR "'.\n", + name, (Int)argv[0][1]); return -1; } diff --git a/lib/libelftc/elftc_version.c b/lib/libelftc/elftc_version.c index 7a8c96a3334b..e8a11d4b8f0c 100644 --- a/lib/libelftc/elftc_version.c +++ b/lib/libelftc/elftc_version.c @@ -6,5 +6,5 @@ const char * elftc_version(void) { - return "elftoolchain r3179M"; + return "elftoolchain r3223M"; } diff --git a/lib/libiconv_modules/UTF7/citrus_utf7.c b/lib/libiconv_modules/UTF7/citrus_utf7.c index ce74cfe28b36..fa00a682fac7 100644 --- a/lib/libiconv_modules/UTF7/citrus_utf7.c +++ b/lib/libiconv_modules/UTF7/citrus_utf7.c @@ -62,8 +62,7 @@ typedef struct { unsigned int mode: 1, /* whether base64 mode */ bits: 4, /* need to hold 0 - 15 */ - cache: 22, /* 22 = BASE64_BIT + UTF16_BIT */ - surrogate: 1; /* whether surrogate pair or not */ + cache: 22; /* 22 = BASE64_BIT + UTF16_BIT */ int chlen; char ch[4]; /* BASE64_IN, 3 * 6 = 18, most closed to UTF16_BIT */ } _UTF7State; @@ -154,21 +153,17 @@ _citrus_UTF7_mbtoutf16(_UTF7EncodingInfo * __restrict ei, uint16_t * __restrict u16, char ** __restrict s, size_t n, _UTF7State * __restrict psenc, size_t * __restrict nresult) { - _UTF7State sv; char *s0; int done, i, len; + *nresult = 0; s0 = *s; - sv = *psenc; for (i = 0, done = 0; done == 0; i++) { if (i == psenc->chlen) { if (n-- < 1) { *nresult = (size_t)-2; *s = s0; - sv.chlen = psenc->chlen; - memcpy(sv.ch, psenc->ch, sizeof(sv.ch)); - *psenc = sv; return (0); } psenc->ch[psenc->chlen++] = *s0++; @@ -257,34 +252,31 @@ _citrus_UTF7_mbrtowc_priv(_UTF7EncodingInfo * __restrict ei, *nresult = (size_t)_ENCODING_IS_STATE_DEPENDENT; return (0); } - if (psenc->surrogate) { - hi = (psenc->cache >> psenc->bits) & UTF16_MAX; - if (hi < HISRG_MIN || hi > HISRG_MAX) - return (EINVAL); - siz = 0; - } else { - err = _citrus_UTF7_mbtoutf16(ei, &hi, s, n, psenc, &nr); - if (nr == (size_t)-1 || nr == (size_t)-2) { - *nresult = nr; - return (err); - } - if (err != 0) - return (err); - n -= nr; - siz = nr; - if (hi < HISRG_MIN || hi > HISRG_MAX) { - u32 = (uint32_t)hi; - goto done; - } - psenc->surrogate = 1; - } - err = _citrus_UTF7_mbtoutf16(ei, &lo, s, n, psenc, &nr); + err = _citrus_UTF7_mbtoutf16(ei, &hi, s, n, psenc, &nr); if (nr == (size_t)-1 || nr == (size_t)-2) { *nresult = nr; return (err); } if (err != 0) return (err); + n -= nr; + siz = nr; + if (hi < HISRG_MIN || hi > HISRG_MAX) { + u32 = (uint32_t)hi; + goto done; + } + err = _citrus_UTF7_mbtoutf16(ei, &lo, s, n, psenc, &nr); + if (nr == (size_t)-1 || nr == (size_t)-2) { + psenc->chlen = 1; /* make get_state_desc return incomplete */ + *nresult = nr; + return (err); + } + if (err != 0) + return (err); + if (lo < LOSRG_MIN || lo > LOSRG_MAX) { + *nresult = (size_t)-1; + return (EILSEQ); + } hi -= HISRG_MIN; lo -= LOSRG_MIN; u32 = (hi << 10 | lo) + SRG_BASE; @@ -297,7 +289,6 @@ _citrus_UTF7_mbrtowc_priv(_UTF7EncodingInfo * __restrict ei, _citrus_UTF7_init_state(ei, psenc); } else { *nresult = siz; - psenc->surrogate = 0; } return (err); } @@ -396,7 +387,7 @@ _citrus_UTF7_put_state_reset(_UTF7EncodingInfo * __restrict ei __unused, { int bits, pos; - if (psenc->chlen != 0 || psenc->bits > BASE64_BIT || psenc->surrogate) + if (psenc->chlen != 0 || psenc->bits > BASE64_BIT) return (EINVAL); if (psenc->mode) { diff --git a/lib/libmandoc/Makefile b/lib/libmandoc/Makefile deleted file mode 100644 index 6529ea4e551f..000000000000 --- a/lib/libmandoc/Makefile +++ /dev/null @@ -1,44 +0,0 @@ -# $FreeBSD$ - -MDOCMLDIR= ${.CURDIR}/../../contrib/mdocml -.PATH: ${MDOCMLDIR} - -LIB= mandoc -#NO_PIC= -INTERNALLIB= -MAN= mandoc.3 mandoc_headers.3 -LIBMAN_SRCS= man.c \ - man_hash.c \ - man_macro.c \ - man_validate.c - -LIBMDOC_SRCS= att.c \ - lib.c \ - mdoc.c \ - mdoc_argv.c \ - mdoc_hash.c \ - mdoc_macro.c \ - mdoc_validate.c \ - st.c - -LIBROFF_SRCS= eqn.c \ - roff.c \ - tbl.c \ - tbl_data.c \ - tbl_layout.c \ - tbl_opts.c - -SRCS= ${LIBMAN_SRCS} \ - ${LIBMDOC_SRCS} \ - ${LIBROFF_SRCS} \ - chars.c \ - mandoc.c \ - mandoc_aux.c \ - msec.c \ - preconv.c \ - read.c - -WARNS?= 3 -CFLAGS+= -DHAVE_CONFIG_H - -.include diff --git a/lib/libmd/Makefile b/lib/libmd/Makefile index 727fd8621716..61bea29c96b1 100644 --- a/lib/libmd/Makefile +++ b/lib/libmd/Makefile @@ -42,7 +42,13 @@ CLEANFILES+= md[245]hl.c md[245].ref md[245].3 mddriver \ sha0.ref sha0hl.c sha1.ref sha1hl.c shadriver \ sha256.ref sha256hl.c sha512.ref sha512hl.c -CFLAGS+= -I${.CURDIR} +# Define WEAK_REFS to provide weak aliases for libmd symbols +# +# Note that the same sources are also used internally by libcrypt, +# in which case: +# * macros are used to rename symbols to libcrypt internal names +# * no weak aliases are generated +CFLAGS+= -I${.CURDIR} -DWEAK_REFS .PATH: ${.CURDIR}/${MACHINE_ARCH} ${.CURDIR}/../../sys/crypto/sha2 .if exists(${MACHINE_ARCH}/sha.S) diff --git a/lib/libmd/md4.h b/lib/libmd/md4.h index 477351372522..086a27b6ba22 100644 --- a/lib/libmd/md4.h +++ b/lib/libmd/md4.h @@ -35,6 +35,34 @@ typedef struct MD4Context { #include __BEGIN_DECLS + +/* Ensure libmd symbols do not clash with libcrypto */ + +#ifndef MD4Init +#define MD4Init _libmd_MD4Init +#endif +#ifndef MD4Update +#define MD4Update _libmd_MD4Update +#endif +#ifndef MD4Pad +#define MD4Pad _libmd_MD4Pad +#endif +#ifndef MD4Final +#define MD4Final _libmd_MD4Final +#endif +#ifndef MD4End +#define MD4End _libmd_MD4End +#endif +#ifndef MD4File +#define MD4File _libmd_MD4File +#endif +#ifndef MD4FileChunk +#define MD4FileChunk _libmd_MD4FileChunk +#endif +#ifndef MD4Data +#define MD4Data _libmd_MD4Data +#endif + void MD4Init(MD4_CTX *); void MD4Update(MD4_CTX *, const void *, unsigned int); void MD4Pad(MD4_CTX *); diff --git a/lib/libmd/md4c.c b/lib/libmd/md4c.c index 1211a98b4172..de1a7b4acb9c 100644 --- a/lib/libmd/md4c.c +++ b/lib/libmd/md4c.c @@ -290,3 +290,18 @@ unsigned int len; output[i] = ((UINT4)input[j]) | (((UINT4)input[j+1]) << 8) | (((UINT4)input[j+2]) << 16) | (((UINT4)input[j+3]) << 24); } + +#ifdef WEAK_REFS +/* When building libmd, provide weak references. Note: this is not + activated in the context of compiling these sources for internal + use in libcrypt. + */ +#undef MD4Init +__weak_reference(_libmd_MD4Init, MD4Init); +#undef MD4Update +__weak_reference(_libmd_MD4Update, MD4Update); +#undef MD4Pad +__weak_reference(_libmd_MD4Pad, MD4Pad); +#undef MD4Final +__weak_reference(_libmd_MD4Final, MD4Final); +#endif diff --git a/lib/libmd/md5.h b/lib/libmd/md5.h index 803a88fc6bff..5ab3b1417633 100644 --- a/lib/libmd/md5.h +++ b/lib/libmd/md5.h @@ -1,4 +1,41 @@ +/* $FreeBSD$ */ + #ifndef _MD5_H_ #define _MD5_H_ + +#ifndef _KERNEL + +/* Ensure libmd symbols do not clash with libcrypto */ + +#ifndef MD5Init +#define MD5Init _libmd_MD5Init +#endif +#ifndef MD5Update +#define MD5Update _libmd_MD5Update +#endif +#ifndef MD5Pad +#define MD5Pad _libmd_MD5Pad +#endif +#ifndef MD5Final +#define MD5Final _libmd_MD5Final +#endif +#ifndef MD5Transform +#define MD5Transform _libmd_MD5Transform +#endif +#ifndef MD5End +#define MD5End _libmd_MD5End +#endif +#ifndef MD5File +#define MD5File _libmd_MD5File +#endif +#ifndef MD5FileChunk +#define MD5FileChunk _libmd_MD5FileChunk +#endif +#ifndef MD5Data +#define MD5Data _libmd_MD5Data +#endif + +#endif + #include #endif /* _MD5_H_ */ diff --git a/lib/libmd/md5c.c b/lib/libmd/md5c.c index d09739010d7e..6b5046416ada 100644 --- a/lib/libmd/md5c.c +++ b/lib/libmd/md5c.c @@ -39,7 +39,7 @@ __FBSDID("$FreeBSD$"); #include #include -#include +#include "md5.h" static void MD5Transform(u_int32_t [4], const unsigned char [64]); @@ -335,3 +335,20 @@ MD5Transform (state, block) /* Zeroize sensitive information. */ memset ((void *)x, 0, sizeof (x)); } + +#ifdef WEAK_REFS +/* When building libmd, provide weak references. Note: this is not + activated in the context of compiling these sources for internal + use in libcrypt. + */ +#undef MD5Init +__weak_reference(_libmd_MD5Init, MD5Init); +#undef MD5Update +__weak_reference(_libmd_MD5Update, MD5Update); +#undef MD5Pad +__weak_reference(_libmd_MD5Pad, MD5Pad); +#undef MD5Final +__weak_reference(_libmd_MD5Final, MD5Final); +#undef MD5Transform +__weak_reference(_libmd_MD5Transform, MD5Transform); +#endif diff --git a/lib/libmd/mdXhl.c b/lib/libmd/mdXhl.c index 295454819637..62be2359c1d4 100644 --- a/lib/libmd/mdXhl.c +++ b/lib/libmd/mdXhl.c @@ -96,3 +96,18 @@ MDXData (const void *data, unsigned int len, char *buf) MDXUpdate(&ctx,data,len); return (MDXEnd(&ctx, buf)); } + +#ifdef WEAK_REFS +/* When building libmd, provide weak references. Note: this is not + activated in the context of compiling these sources for internal + use in libcrypt. + */ +#undef MDXEnd +__weak_reference(_libmd_MDXEnd, MDXEnd); +#undef MDXFile +__weak_reference(_libmd_MDXFile, MDXFile); +#undef MDXFileChunk +__weak_reference(_libmd_MDXFileChunk, MDXFileChunk); +#undef MDXData +__weak_reference(_libmd_MDXData, MDXData); +#endif diff --git a/lib/libmd/ripemd.h b/lib/libmd/ripemd.h index 2ff35cc1ba2d..778808f7c9f8 100644 --- a/lib/libmd/ripemd.h +++ b/lib/libmd/ripemd.h @@ -81,6 +81,41 @@ typedef struct RIPEMD160state_st { } RIPEMD160_CTX; __BEGIN_DECLS + +/* Ensure libmd symbols do not clash with libcrypto */ + +#ifndef RIPEMD160_Init +#define RIPEMD160_Init _libmd_RIPEMD160_Init +#endif +#ifndef RIPEMD160_Update +#define RIPEMD160_Update _libmd_RIPEMD160_Update +#endif +#ifndef RIPEMD160_Final +#define RIPEMD160_Final _libmd_RIPEMD160_Final +#endif +#ifndef RIPEMD160_End +#define RIPEMD160_End _libmd_RIPEMD160_End +#endif +#ifndef RIPEMD160_File +#define RIPEMD160_File _libmd_RIPEMD160_File +#endif +#ifndef RIPEMD160_FileChunk +#define RIPEMD160_FileChunk _libmd_RIPEMD160_FileChunk +#endif +#ifndef RIPEMD160_Data +#define RIPEMD160_Data _libmd_RIPEMD160_Data +#endif + +#ifndef RIPEMD160_Transform +#define RIPEMD160_Transform _libmd_RIPEMD160_Transform +#endif +#ifndef RMD160_version +#define RMD160_version _libmd_RMD160_version +#endif +#ifndef ripemd160_block +#define ripemd160_block _libmd_ripemd160_block +#endif + void RIPEMD160_Init(RIPEMD160_CTX *c); void RIPEMD160_Update(RIPEMD160_CTX *c, const void *data, size_t len); diff --git a/lib/libmd/rmd160c.c b/lib/libmd/rmd160c.c index e01f1e048a77..5a3b78325728 100644 --- a/lib/libmd/rmd160c.c +++ b/lib/libmd/rmd160c.c @@ -545,3 +545,22 @@ unsigned long *l; } } #endif + +#ifdef WEAK_REFS +/* When building libmd, provide weak references. Note: this is not + activated in the context of compiling these sources for internal + use in libcrypt. + */ +#undef RIPEMD160_Init +__weak_reference(_libmd_RIPEMD160_Init, RIPEMD160_Init); +#undef RIPEMD160_Update +__weak_reference(_libmd_RIPEMD160_Update, RIPEMD160_Update); +#undef RIPEMD160_Final +__weak_reference(_libmd_RIPEMD160_Final, RIPEMD160_Final); +#undef RIPEMD160_Transform +__weak_reference(_libmd_RIPEMD160_Transform, RIPEMD160_Transform); +#undef RMD160_version +__weak_reference(_libmd_RMD160_version, RMD160_version); +#undef ripemd160_block +__weak_reference(_libmd_ripemd160_block, ripemd160_block); +#endif diff --git a/lib/libmd/sha.h b/lib/libmd/sha.h index 8a0b7c263a50..c608c5ba85b3 100644 --- a/lib/libmd/sha.h +++ b/lib/libmd/sha.h @@ -79,6 +79,73 @@ typedef struct SHAstate_st { #define SHA1_CTX SHA_CTX __BEGIN_DECLS + +/* Ensure libmd symbols do not clash with libcrypto */ + +#ifndef SHA_Init +#define SHA_Init _libmd_SHA_Init +#endif +#ifndef SHA_Update +#define SHA_Update _libmd_SHA_Update +#endif +#ifndef SHA_Final +#define SHA_Final _libmd_SHA_Final +#endif +#ifndef SHA_End +#define SHA_End _libmd_SHA_End +#endif +#ifndef SHA_File +#define SHA_File _libmd_SHA_File +#endif +#ifndef SHA_FileChunk +#define SHA_FileChunk _libmd_SHA_FileChunk +#endif +#ifndef SHA_Data +#define SHA_Data _libmd_SHA_Data +#endif + +#ifndef SHA_Transform +#define SHA_Transform _libmd_SHA_Transform +#endif +#ifndef SHA_version +#define SHA_version _libmd_SHA_version +#endif +#ifndef sha_block +#define sha_block _libmd_sha_block +#endif + +#ifndef SHA1_Init +#define SHA1_Init _libmd_SHA1_Init +#endif +#ifndef SHA1_Update +#define SHA1_Update _libmd_SHA1_Update +#endif +#ifndef SHA1_Final +#define SHA1_Final _libmd_SHA1_Final +#endif +#ifndef SHA1_End +#define SHA1_End _libmd_SHA1_End +#endif +#ifndef SHA1_File +#define SHA1_File _libmd_SHA1_File +#endif +#ifndef SHA1_FileChunk +#define SHA1_FileChunk _libmd_SHA1_FileChunk +#endif +#ifndef SHA1_Data +#define SHA1_Data _libmd_SHA1_Data +#endif + +#ifndef SHA1_Transform +#define SHA1_Transform _libmd_SHA1_Transform +#endif +#ifndef SHA1_version +#define SHA1_version _libmd_SHA1_version +#endif +#ifndef sha1_block +#define sha1_block _libmd_sha1_block +#endif + void SHA_Init(SHA_CTX *c); void SHA_Update(SHA_CTX *c, const void *data, size_t len); void SHA_Final(unsigned char *md, SHA_CTX *c); @@ -86,6 +153,7 @@ char *SHA_End(SHA_CTX *, char *); char *SHA_File(const char *, char *); char *SHA_FileChunk(const char *, char *, off_t, off_t); char *SHA_Data(const void *, unsigned int, char *); + void SHA1_Init(SHA_CTX *c); void SHA1_Update(SHA_CTX *c, const void *data, size_t len); void SHA1_Final(unsigned char *md, SHA_CTX *c); diff --git a/lib/libmd/sha1c.c b/lib/libmd/sha1c.c index ba3278abfff4..93a4ff37683b 100644 --- a/lib/libmd/sha1c.c +++ b/lib/libmd/sha1c.c @@ -488,3 +488,33 @@ SHA_CTX *c; /* memset((char *)&c,0,sizeof(c));*/ } +#ifdef WEAK_REFS +/* When building libmd, provide weak references. Note: this is not + activated in the context of compiling these sources for internal + use in libcrypt. + */ +#undef SHA_Init +__weak_reference(_libmd_SHA_Init, SHA_Init); +#undef SHA_Update +__weak_reference(_libmd_SHA_Update, SHA_Update); +#undef SHA_Final +__weak_reference(_libmd_SHA_Final, SHA_Final); +#undef SHA_Transform +__weak_reference(_libmd_SHA_Transform, SHA_Transform); +#undef SHA_version +__weak_reference(_libmd_SHA_version, SHA_version); +#undef sha_block +__weak_reference(_libmd_sha_block, sha_block); +#undef SHA1_Init +__weak_reference(_libmd_SHA1_Init, SHA1_Init); +#undef SHA1_Update +__weak_reference(_libmd_SHA1_Update, SHA1_Update); +#undef SHA1_Final +__weak_reference(_libmd_SHA1_Final, SHA1_Final); +#undef SHA1_Transform +__weak_reference(_libmd_SHA1_Transform, SHA1_Transform); +#undef SHA1_version +__weak_reference(_libmd_SHA1_version, SHA1_version); +#undef sha1_block +__weak_reference(_libmd_sha1_block, sha1_block); +#endif diff --git a/lib/libmd/sha256.h b/lib/libmd/sha256.h index 1b6a4f4c5755..f55d1d39d327 100644 --- a/lib/libmd/sha256.h +++ b/lib/libmd/sha256.h @@ -38,6 +38,38 @@ typedef struct SHA256Context { } SHA256_CTX; __BEGIN_DECLS + +/* Ensure libmd symbols do not clash with libcrypto */ + +#ifndef SHA256_Init +#define SHA256_Init _libmd_SHA256_Init +#endif +#ifndef SHA256_Update +#define SHA256_Update _libmd_SHA256_Update +#endif +#ifndef SHA256_Final +#define SHA256_Final _libmd_SHA256_Final +#endif +#ifndef SHA256_End +#define SHA256_End _libmd_SHA256_End +#endif +#ifndef SHA256_File +#define SHA256_File _libmd_SHA256_File +#endif +#ifndef SHA256_FileChunk +#define SHA256_FileChunk _libmd_SHA256_FileChunk +#endif +#ifndef SHA256_Data +#define SHA256_Data _libmd_SHA256_Data +#endif + +#ifndef SHA256_Transform +#define SHA256_Transform _libmd_SHA256_Transform +#endif +#ifndef SHA256_version +#define SHA256_version _libmd_SHA256_version +#endif + void SHA256_Init(SHA256_CTX *); void SHA256_Update(SHA256_CTX *, const void *, size_t); void SHA256_Final(unsigned char [32], SHA256_CTX *); diff --git a/lib/libmd/sha256c.c b/lib/libmd/sha256c.c index 76cec8ec3815..4227b0cfbfbb 100644 --- a/lib/libmd/sha256c.c +++ b/lib/libmd/sha256c.c @@ -295,3 +295,18 @@ SHA256_Final(unsigned char digest[32], SHA256_CTX * ctx) /* Clear the context state */ memset((void *)ctx, 0, sizeof(*ctx)); } + +#ifdef WEAK_REFS +/* When building libmd, provide weak references. Note: this is not + activated in the context of compiling these sources for internal + use in libcrypt. + */ +#undef SHA256_Init +__weak_reference(_libmd_SHA256_Init, SHA256_Init); +#undef SHA256_Update +__weak_reference(_libmd_SHA256_Update, SHA256_Update); +#undef SHA256_Final +__weak_reference(_libmd_SHA256_Final, SHA256_Final); +#undef SHA256_Transform +__weak_reference(_libmd_SHA256_Transform, SHA256_Transform); +#endif diff --git a/lib/libmd/sha512.h b/lib/libmd/sha512.h index 8998f4c5bf89..b034ca50f72b 100644 --- a/lib/libmd/sha512.h +++ b/lib/libmd/sha512.h @@ -38,6 +38,38 @@ typedef struct SHA512Context { } SHA512_CTX; __BEGIN_DECLS + +/* Ensure libmd symbols do not clash with libcrypto */ + +#ifndef SHA512_Init +#define SHA512_Init _libmd_SHA512_Init +#endif +#ifndef SHA512_Update +#define SHA512_Update _libmd_SHA512_Update +#endif +#ifndef SHA512_Final +#define SHA512_Final _libmd_SHA512_Final +#endif +#ifndef SHA512_End +#define SHA512_End _libmd_SHA512_End +#endif +#ifndef SHA512_File +#define SHA512_File _libmd_SHA512_File +#endif +#ifndef SHA512_FileChunk +#define SHA512_FileChunk _libmd_SHA512_FileChunk +#endif +#ifndef SHA512_Data +#define SHA512_Data _libmd_SHA512_Data +#endif + +#ifndef SHA512_Transform +#define SHA512_Transform _libmd_SHA512_Transform +#endif +#ifndef SHA512_version +#define SHA512_version _libmd_SHA512_version +#endif + void SHA512_Init(SHA512_CTX *); void SHA512_Update(SHA512_CTX *, const void *, size_t); void SHA512_Final(unsigned char [64], SHA512_CTX *); diff --git a/lib/libmd/sha512c.c b/lib/libmd/sha512c.c index c2a93be48583..e5e52a88442d 100644 --- a/lib/libmd/sha512c.c +++ b/lib/libmd/sha512c.c @@ -318,3 +318,18 @@ SHA512_Final(unsigned char digest[64], SHA512_CTX * ctx) /* Clear the context state */ memset((void *)ctx, 0, sizeof(*ctx)); } + +#ifdef WEAK_REFS +/* When building libmd, provide weak references. Note: this is not + activated in the context of compiling these sources for internal + use in libcrypt. + */ +#undef SHA512_Init +__weak_reference(_libmd_SHA512_Init, SHA512_Init); +#undef SHA512_Update +__weak_reference(_libmd_SHA512_Update, SHA512_Update); +#undef SHA512_Final +__weak_reference(_libmd_SHA512_Final, SHA512_Final); +#undef SHA512_Transform +__weak_reference(_libmd_SHA512_Transform, SHA512_Transform); +#endif diff --git a/lib/libmd/shadriver.c b/lib/libmd/shadriver.c index adaf6840db02..29a3cf0e2312 100644 --- a/lib/libmd/shadriver.c +++ b/lib/libmd/shadriver.c @@ -31,10 +31,13 @@ __FBSDID("$FreeBSD$"); #endif #if SHA == 1 +#undef SHA_Data #define SHA_Data SHA1_Data #elif SHA == 256 +#undef SHA_Data #define SHA_Data SHA256_Data #elif SHA == 512 +#undef SHA_Data #define SHA_Data SHA512_Data #endif diff --git a/lib/libpmc/libpmc.c b/lib/libpmc/libpmc.c index 2ad226855246..d9d79024c5b7 100644 --- a/lib/libpmc/libpmc.c +++ b/lib/libpmc/libpmc.c @@ -82,6 +82,10 @@ static int xscale_allocate_pmc(enum pmc_event _pe, char *_ctrspec, static int armv7_allocate_pmc(enum pmc_event _pe, char *_ctrspec, struct pmc_op_pmcallocate *_pmc_config); #endif +#if defined(__aarch64__) +static int arm64_allocate_pmc(enum pmc_event _pe, char *_ctrspec, + struct pmc_op_pmcallocate *_pmc_config); +#endif #if defined(__mips__) static int mips_allocate_pmc(enum pmc_event _pe, char* ctrspec, struct pmc_op_pmcallocate *_pmc_config); @@ -158,6 +162,7 @@ PMC_CLASSDEP_TABLE(p5, P5); PMC_CLASSDEP_TABLE(p6, P6); PMC_CLASSDEP_TABLE(xscale, XSCALE); PMC_CLASSDEP_TABLE(armv7, ARMV7); +PMC_CLASSDEP_TABLE(armv8, ARMV8); PMC_CLASSDEP_TABLE(mips24k, MIPS24K); PMC_CLASSDEP_TABLE(mips74k, MIPS74K); PMC_CLASSDEP_TABLE(octeon, OCTEON); @@ -263,6 +268,16 @@ static const struct pmc_event_descr westmereuc_event_table[] = __PMC_EV_ALIAS_WESTMEREUC() }; +static const struct pmc_event_descr cortex_a53_event_table[] = +{ + __PMC_EV_ALIAS_ARMV8_CORTEX_A53() +}; + +static const struct pmc_event_descr cortex_a57_event_table[] = +{ + __PMC_EV_ALIAS_ARMV8_CORTEX_A57() +}; + /* * PMC_MDEP_TABLE(NAME, PRIMARYCLASS, ADDITIONAL_CLASSES...) * @@ -294,6 +309,8 @@ PMC_MDEP_TABLE(p5, P5, PMC_CLASS_SOFT, PMC_CLASS_TSC); PMC_MDEP_TABLE(p6, P6, PMC_CLASS_SOFT, PMC_CLASS_TSC); PMC_MDEP_TABLE(xscale, XSCALE, PMC_CLASS_SOFT, PMC_CLASS_XSCALE); PMC_MDEP_TABLE(armv7, ARMV7, PMC_CLASS_SOFT, PMC_CLASS_ARMV7); +PMC_MDEP_TABLE(cortex_a53, ARMV8, PMC_CLASS_SOFT, PMC_CLASS_ARMV8); +PMC_MDEP_TABLE(cortex_a57, ARMV8, PMC_CLASS_SOFT, PMC_CLASS_ARMV8); PMC_MDEP_TABLE(mips24k, MIPS24K, PMC_CLASS_SOFT, PMC_CLASS_MIPS24K); PMC_MDEP_TABLE(mips74k, MIPS74K, PMC_CLASS_SOFT, PMC_CLASS_MIPS74K); PMC_MDEP_TABLE(octeon, OCTEON, PMC_CLASS_SOFT, PMC_CLASS_OCTEON); @@ -362,6 +379,10 @@ PMC_CLASS_TABLE_DESC(xscale, XSCALE, xscale, xscale); #endif PMC_CLASS_TABLE_DESC(armv7, ARMV7, armv7, armv7); #endif +#if defined(__aarch64__) +PMC_CLASS_TABLE_DESC(cortex_a53, ARMV8, cortex_a53, arm64); +PMC_CLASS_TABLE_DESC(cortex_a57, ARMV8, cortex_a57, arm64); +#endif #if defined(__mips__) PMC_CLASS_TABLE_DESC(mips24k, MIPS24K, mips24k, mips); PMC_CLASS_TABLE_DESC(mips74k, MIPS74K, mips74k, mips); @@ -402,9 +423,14 @@ static const char * pmc_capability_names[] = { __PMC_CAPS() }; -static const char * pmc_class_names[] = { +struct pmc_class_map { + enum pmc_class pm_class; + const char *pm_name; +}; + +static const struct pmc_class_map pmc_class_names[] = { #undef __PMC_CLASS -#define __PMC_CLASS(C) #C , +#define __PMC_CLASS(S,V,D) { .pm_class = PMC_CLASS_##S, .pm_name = #S } , __PMC_CLASSES() }; @@ -2429,6 +2455,26 @@ armv7_allocate_pmc(enum pmc_event pe, char *ctrspec __unused, } #endif +#if defined(__aarch64__) +static struct pmc_event_alias cortex_a53_aliases[] = { + EV_ALIAS(NULL, NULL) +}; +static struct pmc_event_alias cortex_a57_aliases[] = { + EV_ALIAS(NULL, NULL) +}; +static int +arm64_allocate_pmc(enum pmc_event pe, char *ctrspec __unused, + struct pmc_op_pmcallocate *pmc_config __unused) +{ + switch (pe) { + default: + break; + } + + return (0); +} +#endif + #if defined(__mips__) static struct pmc_event_alias mips24k_aliases[] = { @@ -2938,6 +2984,19 @@ pmc_event_names_of_class(enum pmc_class cl, const char ***eventnames, ev = armv7_event_table; count = PMC_EVENT_TABLE_SIZE(armv7); break; + case PMC_CLASS_ARMV8: + switch (cpu_info.pm_cputype) { + default: + case PMC_CPU_ARMV8_CORTEX_A53: + ev = cortex_a53_event_table; + count = PMC_EVENT_TABLE_SIZE(cortex_a53); + break; + case PMC_CPU_ARMV8_CORTEX_A57: + ev = cortex_a57_event_table; + count = PMC_EVENT_TABLE_SIZE(cortex_a57); + break; + } + break; case PMC_CLASS_MIPS24K: ev = mips24k_event_table; count = PMC_EVENT_TABLE_SIZE(mips24k); @@ -3235,6 +3294,16 @@ pmc_init(void) pmc_class_table[n] = &armv7_class_table_descr; break; #endif +#if defined(__aarch64__) + case PMC_CPU_ARMV8_CORTEX_A53: + PMC_MDEP_INIT(cortex_a53); + pmc_class_table[n] = &cortex_a53_class_table_descr; + break; + case PMC_CPU_ARMV8_CORTEX_A57: + PMC_MDEP_INIT(cortex_a57); + pmc_class_table[n] = &cortex_a57_class_table_descr; + break; +#endif #if defined(__mips__) case PMC_CPU_MIPS_24K: PMC_MDEP_INIT(mips24k); @@ -3298,9 +3367,11 @@ pmc_name_of_capability(enum pmc_caps cap) const char * pmc_name_of_class(enum pmc_class pc) { - if ((int) pc >= PMC_CLASS_FIRST && - pc <= PMC_CLASS_LAST) - return (pmc_class_names[pc]); + size_t n; + + for (n = 0; n < PMC_TABLE_SIZE(pmc_class_names); n++) + if (pc == pmc_class_names[n].pm_class) + return (pmc_class_names[n].pm_name); errno = EINVAL; return (NULL); @@ -3446,6 +3517,19 @@ _pmc_name_of_event(enum pmc_event pe, enum pmc_cputype cpu) } else if (pe >= PMC_EV_ARMV7_FIRST && pe <= PMC_EV_ARMV7_LAST) { ev = armv7_event_table; evfence = armv7_event_table + PMC_EVENT_TABLE_SIZE(armv7); + } else if (pe >= PMC_EV_ARMV8_FIRST && pe <= PMC_EV_ARMV8_LAST) { + switch (cpu) { + case PMC_CPU_ARMV8_CORTEX_A53: + ev = cortex_a53_event_table; + evfence = cortex_a53_event_table + PMC_EVENT_TABLE_SIZE(cortex_a53); + break; + case PMC_CPU_ARMV8_CORTEX_A57: + ev = cortex_a57_event_table; + evfence = cortex_a57_event_table + PMC_EVENT_TABLE_SIZE(cortex_a57); + break; + default: /* Unknown CPU type. */ + break; + } } else if (pe >= PMC_EV_MIPS24K_FIRST && pe <= PMC_EV_MIPS24K_LAST) { ev = mips24k_event_table; evfence = mips24k_event_table + PMC_EVENT_TABLE_SIZE(mips24k); diff --git a/lib/libproc/Makefile b/lib/libproc/Makefile index 96465702c991..8c4f4848354e 100644 --- a/lib/libproc/Makefile +++ b/lib/libproc/Makefile @@ -23,6 +23,8 @@ LIBADD+= cxxrt LIBADD+= supcplusplus .endif +LIBADD+= elf rtld_db util + .if ${MK_CDDL} != "no" LIBADD+= ctf IGNORE_PRAGMA= YES diff --git a/lib/libprocstat/Makefile b/lib/libprocstat/Makefile index ff9146b4ef38..fc71dbcb666d 100644 --- a/lib/libprocstat/Makefile +++ b/lib/libprocstat/Makefile @@ -22,6 +22,36 @@ SHLIB_MAJOR= 1 LIBADD= elf kvm util MAN= libprocstat.3 +MLINKS+=libprocstat.3 procstat_close.3 \ + libprocstat.3 procstat_freeargv.3 \ + libprocstat.3 procstat_freeauxv.3 \ + libprocstat.3 procstat_freeenvv.3 \ + libprocstat.3 procstat_freefiles.3 \ + libprocstat.3 procstat_freegroups.3 \ + libprocstat.3 procstat_freekstack.3 \ + libprocstat.3 procstat_freeprocs.3 \ + libprocstat.3 procstat_freevmmap.3 \ + libprocstat.3 procstat_get_pipe_info.3 \ + libprocstat.3 procstat_get_pts_info.3 \ + libprocstat.3 procstat_get_sem_info.3 \ + libprocstat.3 procstat_get_shm_info.3 \ + libprocstat.3 procstat_get_socket_info.3 \ + libprocstat.3 procstat_get_vnode_info.3 \ + libprocstat.3 procstat_getargv.3 \ + libprocstat.3 procstat_getauxv.3 \ + libprocstat.3 procstat_getenvv.3 \ + libprocstat.3 procstat_getfiles.3 \ + libprocstat.3 procstat_getgroups.3 \ + libprocstat.3 procstat_getkstack.3 \ + libprocstat.3 procstat_getosrel.3 \ + libprocstat.3 procstat_getpathname.3 \ + libprocstat.3 procstat_getprocs.3 \ + libprocstat.3 procstat_getrlimit.3 \ + libprocstat.3 procstat_getumask.3 \ + libprocstat.3 procstat_getvmmap.3 \ + libprocstat.3 procstat_open_core.3 \ + libprocstat.3 procstat_open_kvm.3 \ + libprocstat.3 procstat_open_sysctl.3 # XXX This is a hack. .if ${MK_CDDL} != "no" diff --git a/lib/libprocstat/libprocstat.3 b/lib/libprocstat/libprocstat.3 index 1c1f811e6017..e8be41c532e1 100644 --- a/lib/libprocstat/libprocstat.3 +++ b/lib/libprocstat/libprocstat.3 @@ -24,25 +24,11 @@ .\" .\" $FreeBSD$ .\" -.Dd May 3, 2013 +.Dd May 18, 2015 .Dt LIBPROCSTAT 3 .Os .Sh NAME -.Nm procstat_open_core , -.Nm procstat_open_kvm , -.Nm procstat_open_sysctl , .Nm procstat_close , -.Nm procstat_getargv , -.Nm procstat_getauxv , -.Nm procstat_getenvv , -.Nm procstat_getfiles , -.Nm procstat_getgroups , -.Nm procstat_getkstack , -.Nm procstat_getosrel , -.Nm procstat_getpathname , -.Nm procstat_getprocs , -.Nm procstat_getumask , -.Nm procstat_getvmmap , .Nm procstat_freeargv , .Nm procstat_freeauxv , .Nm procstat_freeenvv , @@ -56,7 +42,22 @@ .Nm procstat_get_sem_info , .Nm procstat_get_shm_info , .Nm procstat_get_socket_info , -.Nm procstat_get_vnode_info +.Nm procstat_get_vnode_info , +.Nm procstat_getargv , +.Nm procstat_getauxv , +.Nm procstat_getenvv , +.Nm procstat_getfiles , +.Nm procstat_getgroups , +.Nm procstat_getkstack , +.Nm procstat_getosrel , +.Nm procstat_getpathname , +.Nm procstat_getprocs , +.Nm procstat_getrlimit , +.Nm procstat_getumask , +.Nm procstat_getvmmap , +.Nm procstat_open_core , +.Nm procstat_open_kvm , +.Nm procstat_open_sysctl .Nd library interface for file and process information retrieval .Sh LIBRARY .Lb libprocstat @@ -175,24 +176,17 @@ .Fa "struct kinfo_proc *kp" .Fa "unsigned int *count" .Fc -.Ft int -.Fo procstat_getosrel -.Fa "struct procstat *procstat" -.Fa "struct kinfo_proc *kp" -.Fa "int *osrelp" -.Fc .Ft "struct kinfo_kstack *" .Fo procstat_getkstack .Fa "struct procstat *procstat" .Fa "struct kinfo_proc *kp" .Fa "unsigned int *count" .Fc -.Ft "struct kinfo_proc *" -.Fo procstat_getprocs +.Ft int +.Fo procstat_getosrel .Fa "struct procstat *procstat" -.Fa "int what" -.Fa "int arg" -.Fa "unsigned int *count" +.Fa "struct kinfo_proc *kp" +.Fa "int *osrelp" .Fc .Ft "int" .Fo procstat_getpathname @@ -201,6 +195,13 @@ .Fa "char *pathname" .Fa "size_t maxlen" .Fc +.Ft "struct kinfo_proc *" +.Fo procstat_getprocs +.Fa "struct procstat *procstat" +.Fa "int what" +.Fa "int arg" +.Fa "unsigned int *count" +.Fc .Ft "int" .Fo procstat_getrlimit .Fa "struct procstat *procstat" diff --git a/lib/libthr/thread/thr_spec.c b/lib/libthr/thread/thr_spec.c index 46a61059aebb..b53c4b744e3c 100644 --- a/lib/libthr/thread/thr_spec.c +++ b/lib/libthr/thread/thr_spec.c @@ -30,6 +30,7 @@ */ #include "namespace.h" +#include #include #include #include @@ -40,7 +41,6 @@ #include "thr_private.h" -/* Static variables: */ struct pthread_key _thread_keytable[PTHREAD_KEYS_MAX]; __weak_reference(_pthread_key_create, pthread_key_create); @@ -50,7 +50,7 @@ __weak_reference(_pthread_setspecific, pthread_setspecific); int -_pthread_key_create(pthread_key_t *key, void (*destructor) (void *)) +_pthread_key_create(pthread_key_t *key, void (*destructor)(void *)) { struct pthread *curthread; int i; @@ -59,7 +59,6 @@ _pthread_key_create(pthread_key_t *key, void (*destructor) (void *)) curthread = _get_curthread(); - /* Lock the key table: */ THR_LOCK_ACQUIRE(curthread, &_keytable_lock); for (i = 0; i < PTHREAD_KEYS_MAX; i++) { @@ -68,14 +67,12 @@ _pthread_key_create(pthread_key_t *key, void (*destructor) (void *)) _thread_keytable[i].destructor = destructor; _thread_keytable[i].seqno++; - /* Unlock the key table: */ THR_LOCK_RELEASE(curthread, &_keytable_lock); *key = i + 1; return (0); } } - /* Unlock the key table: */ THR_LOCK_RELEASE(curthread, &_keytable_lock); return (EAGAIN); } @@ -83,44 +80,40 @@ _pthread_key_create(pthread_key_t *key, void (*destructor) (void *)) int _pthread_key_delete(pthread_key_t userkey) { - struct pthread *curthread = _get_curthread(); - int key = userkey - 1; - int ret = 0; + struct pthread *curthread; + int key, ret; - if ((unsigned int)key < PTHREAD_KEYS_MAX) { - /* Lock the key table: */ - THR_LOCK_ACQUIRE(curthread, &_keytable_lock); - - if (_thread_keytable[key].allocated) - _thread_keytable[key].allocated = 0; - else - ret = EINVAL; - - /* Unlock the key table: */ - THR_LOCK_RELEASE(curthread, &_keytable_lock); - } else + key = userkey - 1; + if ((unsigned int)key >= PTHREAD_KEYS_MAX) + return (EINVAL); + curthread = _get_curthread(); + THR_LOCK_ACQUIRE(curthread, &_keytable_lock); + if (_thread_keytable[key].allocated) { + _thread_keytable[key].allocated = 0; + ret = 0; + } else { ret = EINVAL; + } + THR_LOCK_RELEASE(curthread, &_keytable_lock); return (ret); } void _thread_cleanupspecific(void) { - struct pthread *curthread = _get_curthread(); - void (*destructor)( void *); - const void *data = NULL; - int key; - int i; + struct pthread *curthread; + void (*destructor)(void *); + const void *data; + int i, key; + curthread = _get_curthread(); if (curthread->specific == NULL) return; - - /* Lock the key table: */ THR_LOCK_ACQUIRE(curthread, &_keytable_lock); - for (i = 0; (i < PTHREAD_DESTRUCTOR_ITERATIONS) && - (curthread->specific_data_count > 0); i++) { - for (key = 0; (key < PTHREAD_KEYS_MAX) && - (curthread->specific_data_count > 0); key++) { + for (i = 0; i < PTHREAD_DESTRUCTOR_ITERATIONS && + curthread->specific_data_count > 0; i++) { + for (key = 0; key < PTHREAD_KEYS_MAX && + curthread->specific_data_count > 0; key++) { destructor = NULL; if (_thread_keytable[key].allocated && @@ -128,31 +121,29 @@ _thread_cleanupspecific(void) if (curthread->specific[key].seqno == _thread_keytable[key].seqno) { data = curthread->specific[key].data; - destructor = _thread_keytable[key].destructor; + destructor = _thread_keytable[key]. + destructor; } curthread->specific[key].data = NULL; curthread->specific_data_count--; - } - else if (curthread->specific[key].data != NULL) { + } else if (curthread->specific[key].data != NULL) { /* - * This can happen if the key is deleted via - * pthread_key_delete without first setting the value - * to NULL in all threads. POSIX says that the - * destructor is not invoked in this case. + * This can happen if the key is + * deleted via pthread_key_delete + * without first setting the value to + * NULL in all threads. POSIX says + * that the destructor is not invoked + * in this case. */ curthread->specific[key].data = NULL; curthread->specific_data_count--; } /* - * If there is a destructor, call it - * with the key table entry unlocked: + * If there is a destructor, call it with the + * key table entry unlocked. */ if (destructor != NULL) { - /* - * Don't hold the lock while calling the - * destructor: - */ THR_LOCK_RELEASE(curthread, &_keytable_lock); destructor(__DECONST(void *, data)); THR_LOCK_ACQUIRE(curthread, &_keytable_lock); @@ -160,102 +151,92 @@ _thread_cleanupspecific(void) } } THR_LOCK_RELEASE(curthread, &_keytable_lock); - free(curthread->specific); + munmap(curthread->specific, PTHREAD_KEYS_MAX * sizeof(struct + pthread_specific_elem)); curthread->specific = NULL; - if (curthread->specific_data_count > 0) + if (curthread->specific_data_count > 0) { stderr_debug("Thread %p has exited with leftover " "thread-specific data after %d destructor iterations\n", curthread, PTHREAD_DESTRUCTOR_ITERATIONS); -} - -static inline struct pthread_specific_elem * -pthread_key_allocate_data(void) -{ - struct pthread_specific_elem *new_data; - - new_data = (struct pthread_specific_elem *) - calloc(1, sizeof(struct pthread_specific_elem) * PTHREAD_KEYS_MAX); - return (new_data); + } } int _pthread_setspecific(pthread_key_t userkey, const void *value) { - struct pthread *pthread; - pthread_key_t key = userkey - 1; - int ret = 0; + struct pthread *pthread; + void *tmp; + pthread_key_t key; + + key = userkey - 1; + if ((unsigned int)key >= PTHREAD_KEYS_MAX || + !_thread_keytable[key].allocated) + return (EINVAL); - /* Point to the running thread: */ pthread = _get_curthread(); - - if ((pthread->specific) || - (pthread->specific = pthread_key_allocate_data())) { - if ((unsigned int)key < PTHREAD_KEYS_MAX) { - if (_thread_keytable[key].allocated) { - if (pthread->specific[key].data == NULL) { - if (value != NULL) - pthread->specific_data_count++; - } else if (value == NULL) - pthread->specific_data_count--; - pthread->specific[key].data = value; - pthread->specific[key].seqno = - _thread_keytable[key].seqno; - ret = 0; - } else - ret = EINVAL; - } else - ret = EINVAL; - } else - ret = ENOMEM; - return (ret); + if (pthread->specific == NULL) { + tmp = mmap(NULL, PTHREAD_KEYS_MAX * + sizeof(struct pthread_specific_elem), + PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANON, -1, 0); + if (tmp == MAP_FAILED) + return (ENOMEM); + pthread->specific = tmp; + } + if (pthread->specific[key].data == NULL) { + if (value != NULL) + pthread->specific_data_count++; + } else if (value == NULL) + pthread->specific_data_count--; + pthread->specific[key].data = value; + pthread->specific[key].seqno = _thread_keytable[key].seqno; + return (0); } void * _pthread_getspecific(pthread_key_t userkey) { - struct pthread *pthread; - pthread_key_t key = userkey - 1; - const void *data; + struct pthread *pthread; + const void *data; + pthread_key_t key; + + /* Check if there is specific data. */ + key = userkey - 1; + if ((unsigned int)key >= PTHREAD_KEYS_MAX) + return (NULL); - /* Point to the running thread: */ pthread = _get_curthread(); - - /* Check if there is specific data: */ - if (pthread->specific != NULL && (unsigned int)key < PTHREAD_KEYS_MAX) { - /* Check if this key has been used before: */ - if (_thread_keytable[key].allocated && - (pthread->specific[key].seqno == _thread_keytable[key].seqno)) { - /* Return the value: */ - data = pthread->specific[key].data; - } else { - /* - * This key has not been used before, so return NULL - * instead: - */ - data = NULL; - } - } else - /* No specific data has been created, so just return NULL: */ + /* Check if this key has been used before. */ + if (_thread_keytable[key].allocated && pthread->specific != NULL && + pthread->specific[key].seqno == _thread_keytable[key].seqno) { + /* Return the value: */ + data = pthread->specific[key].data; + } else { + /* + * This key has not been used before, so return NULL + * instead. + */ data = NULL; + } return (__DECONST(void *, data)); } void _thr_tsd_unload(struct dl_phdr_info *phdr_info) { - struct pthread *curthread = _get_curthread(); + struct pthread *curthread; void (*destructor)(void *); int key; + curthread = _get_curthread(); THR_LOCK_ACQUIRE(curthread, &_keytable_lock); for (key = 0; key < PTHREAD_KEYS_MAX; key++) { - if (_thread_keytable[key].allocated) { - destructor = _thread_keytable[key].destructor; - if (destructor != NULL) { - if (__elf_phdr_match_addr(phdr_info, destructor)) - _thread_keytable[key].destructor = NULL; - } - } + if (!_thread_keytable[key].allocated) + continue; + destructor = _thread_keytable[key].destructor; + if (destructor == NULL) + continue; + if (__elf_phdr_match_addr(phdr_info, destructor)) + _thread_keytable[key].destructor = NULL; } THR_LOCK_RELEASE(curthread, &_keytable_lock); } diff --git a/lib/libufs/Makefile b/lib/libufs/Makefile index 78832d88debe..24efd0ccc5fa 100644 --- a/lib/libufs/Makefile +++ b/lib/libufs/Makefile @@ -21,7 +21,6 @@ MLINKS+= ufs_disk_close.3 ufs_disk_write.3 WARNS?= 2 -DEBUG_FLAGS = -g CFLAGS+= -D_LIBUFS .if defined(LIBUFS_DEBUG) CFLAGS+= -D_LIBUFS_DEBUGGING diff --git a/lib/libutil/Makefile b/lib/libutil/Makefile index 7e5f1a34895b..2f68628279b3 100644 --- a/lib/libutil/Makefile +++ b/lib/libutil/Makefile @@ -10,7 +10,8 @@ SHLIB_MAJOR= 9 SRCS= _secure_path.c auth.c expand_number.c flopen.c fparseln.c gr_util.c \ hexdump.c humanize_number.c kinfo_getfile.c kinfo_getfile.c \ - kinfo_getallproc.c kinfo_getproc.c kinfo_getvmmap.c kld.c \ + kinfo_getallproc.c kinfo_getproc.c kinfo_getvmmap.c \ + kinfo_getvmobject.c kld.c \ login_auth.c login_cap.c \ login_class.c login_crypt.c login_ok.c login_times.c login_tty.c \ pidfile.c property.c pty.c pw_util.c quotafile.c realhostname.c \ @@ -27,7 +28,8 @@ CFLAGS+= -I${.CURDIR} -I${.CURDIR}/../libc/gen/ MAN+= expand_number.3 flopen.3 fparseln.3 hexdump.3 \ humanize_number.3 kinfo_getallproc.3 kinfo_getfile.3 \ - kinfo_getproc.3 kinfo_getvmmap.3 kld.3 login_auth.3 login_cap.3 \ + kinfo_getproc.3 kinfo_getvmmap.3 kinfo_getvmobject.3 kld.3 \ + login_auth.3 login_cap.3 \ login_class.3 login_ok.3 login_times.3 login_tty.3 pidfile.3 \ property.3 pty.3 quotafile.3 realhostname.3 realhostname_sa.3 \ _secure_path.3 trimdomain.3 uucplock.3 pw_util.3 diff --git a/lib/libutil/kinfo_getallproc.3 b/lib/libutil/kinfo_getallproc.3 index 56d4ad613bb9..7005d4f2931a 100644 --- a/lib/libutil/kinfo_getallproc.3 +++ b/lib/libutil/kinfo_getallproc.3 @@ -25,7 +25,7 @@ .\" .\" $FreeBSD$ .\" -.Dd July 9, 2009 +.Dd May 27, 2015 .Dt KINFO_GETALLPROC 3 .Os .Sh NAME @@ -35,6 +35,7 @@ .Lb libutil .Sh SYNOPSIS .In sys/types.h +.In sys/user.h .In libutil.h .Ft struct kinfo_proc * .Fn kinfo_getallproc "int *cntp" diff --git a/lib/libutil/kinfo_getfile.3 b/lib/libutil/kinfo_getfile.3 index 1e0bab70150b..2a35687bf25d 100644 --- a/lib/libutil/kinfo_getfile.3 +++ b/lib/libutil/kinfo_getfile.3 @@ -25,7 +25,7 @@ .\" .\" $FreeBSD$ .\" -.Dd December 6, 2008 +.Dd May 27, 2015 .Dt KINFO_GETFILE 3 .Os .Sh NAME @@ -35,6 +35,7 @@ .Lb libutil .Sh SYNOPSIS .In sys/types.h +.In sys/user.h .In libutil.h .Ft struct kinfo_file * .Fn kinfo_getfile "pid_t pid" "int *cntp" diff --git a/lib/libutil/kinfo_getproc.3 b/lib/libutil/kinfo_getproc.3 index 804cb6c19b77..f5ccbc5011ab 100644 --- a/lib/libutil/kinfo_getproc.3 +++ b/lib/libutil/kinfo_getproc.3 @@ -25,7 +25,7 @@ .\" .\" $FreeBSD$ .\" -.Dd March 1, 2013 +.Dd May 27, 2015 .Dt KINFO_GETPROC 3 .Os .Sh NAME @@ -35,6 +35,7 @@ .Lb libutil .Sh SYNOPSIS .In sys/types.h +.In sys/user.h .In libutil.h .Ft struct kinfo_proc * .Fn kinfo_getproc "pid_t pid" diff --git a/lib/libutil/kinfo_getvmmap.3 b/lib/libutil/kinfo_getvmmap.3 index 165de6084147..c6a13700a71d 100644 --- a/lib/libutil/kinfo_getvmmap.3 +++ b/lib/libutil/kinfo_getvmmap.3 @@ -25,7 +25,7 @@ .\" .\" $FreeBSD$ .\" -.Dd December 6, 2008 +.Dd May 27, 2015 .Dt KINFO_GETVMMAP 3 .Os .Sh NAME @@ -35,6 +35,7 @@ .Lb libutil .Sh SYNOPSIS .In sys/types.h +.In sys/user.h .In libutil.h .Ft struct kinfo_vmentry * .Fn kinfo_getvmmap "pid_t pid" "int *cntp" diff --git a/lib/libutil/kinfo_getvmobject.3 b/lib/libutil/kinfo_getvmobject.3 new file mode 100644 index 000000000000..dc0edd2bfecf --- /dev/null +++ b/lib/libutil/kinfo_getvmobject.3 @@ -0,0 +1,74 @@ +.\" +.\" Copyright (c) 2015 John Baldwin +.\" All rights reserved. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" $FreeBSD$ +.\" +.Dd May 27, 2015 +.Dt KINFO_GETVMOBJECT 3 +.Os +.Sh NAME +.Nm kinfo_getvmobject +.Nd function for getting system-wide memory information +.Sh LIBRARY +.Lb libutil +.Sh SYNOPSIS +.In sys/types.h +.In sys/user.h +.In libutil.h +.Ft struct kinfo_vmobject * +.Fn kinfo_getvmobject "int *cntp" +.Sh DESCRIPTION +This function is used to obtain information about the objects using memory +in the system. +.Pp +The +.Ar cntp +argument allows the caller to know how many records are returned. +.Pp +This function is a wrapper around the +.Dq vm.objects +.Xr sysctl 3 +MIB. +While the kernel returns a packed structure, this function expands the +data into a fixed record format. +.Sh RETURN VALUES +On success the +.Fn kinfo_getvmobject +function returns a pointer to an array of +.Vt struct kinfo_vmobject +structures as defined by +.In sys/user.h . +The array is allocated by an internal call to +.Xr malloc 3 +and must be freed by the caller with a call to +.Xr free 3 . +On failure the +.Fn kinfo_getvmobject +function returns +.Dv NULL . +.Sh SEE ALSO +.Xr free 3 , +.Xr kinfo_getvmmap 3 , +.Xr malloc 3 diff --git a/lib/libutil/kinfo_getvmobject.c b/lib/libutil/kinfo_getvmobject.c new file mode 100644 index 000000000000..7e031dadccb0 --- /dev/null +++ b/lib/libutil/kinfo_getvmobject.c @@ -0,0 +1,94 @@ +/* + * Copyright (c) 2013 Hudson River Trading LLC + * Written by: John H. Baldwin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include + +#include "libutil.h" + +struct kinfo_vmobject * +kinfo_getvmobject(int *cntp) +{ + char *buf, *bp, *ep; + struct kinfo_vmobject *kvo, *list, *kp; + size_t len; + int cnt, i; + + buf = NULL; + for (i = 0; i < 3; i++) { + if (sysctlbyname("vm.objects", NULL, &len, NULL, 0) < 0) + return (NULL); + buf = reallocf(buf, len); + if (buf == NULL) + return (NULL); + if (sysctlbyname("vm.objects", buf, &len, NULL, 0) == 0) + goto unpack; + if (errno != ENOMEM) { + free(buf); + return (NULL); + } + } + free(buf); + return (NULL); + +unpack: + /* Count items */ + cnt = 0; + bp = buf; + ep = buf + len; + while (bp < ep) { + kvo = (struct kinfo_vmobject *)(uintptr_t)bp; + bp += kvo->kvo_structsize; + cnt++; + } + + list = calloc(cnt, sizeof(*list)); + if (list == NULL) { + free(buf); + return (NULL); + } + + /* Unpack */ + bp = buf; + kp = list; + while (bp < ep) { + kvo = (struct kinfo_vmobject *)(uintptr_t)bp; + memcpy(kp, kvo, kvo->kvo_structsize); + bp += kvo->kvo_structsize; + kp->kvo_structsize = sizeof(*kp); + kp++; + } + free(buf); + *cntp = cnt; + return (list); +} diff --git a/lib/libutil/libutil.h b/lib/libutil/libutil.h index b8b9836b0fdf..b20ffa291a90 100644 --- a/lib/libutil/libutil.h +++ b/lib/libutil/libutil.h @@ -102,6 +102,8 @@ struct kinfo_file * kinfo_getfile(pid_t _pid, int *_cntp); struct kinfo_vmentry * kinfo_getvmmap(pid_t _pid, int *_cntp); +struct kinfo_vmobject * + kinfo_getvmobject(int *_cntp); struct kinfo_proc * kinfo_getallproc(int *_cntp); struct kinfo_proc * diff --git a/lib/msun/src/e_j0.c b/lib/msun/src/e_j0.c index 365ffe5ee4bb..a253ed164b79 100644 --- a/lib/msun/src/e_j0.c +++ b/lib/msun/src/e_j0.c @@ -62,7 +62,7 @@ __FBSDID("$FreeBSD$"); #include "math.h" #include "math_private.h" -static double pzero(double), qzero(double); +static __inline double pzero(double), qzero(double); static const volatile double vone = 1, vzero = 0; diff --git a/lib/msun/src/e_j0f.c b/lib/msun/src/e_j0f.c index e86ed640b3c4..3e2f7e818c59 100644 --- a/lib/msun/src/e_j0f.c +++ b/lib/msun/src/e_j0f.c @@ -23,7 +23,7 @@ __FBSDID("$FreeBSD$"); #include "math.h" #include "math_private.h" -static float pzerof(float), qzerof(float); +static __inline float pzerof(float), qzerof(float); static const volatile float vone = 1, vzero = 0; diff --git a/lib/msun/src/e_j1.c b/lib/msun/src/e_j1.c index 49220586122c..74a7c69bb4ba 100644 --- a/lib/msun/src/e_j1.c +++ b/lib/msun/src/e_j1.c @@ -62,7 +62,7 @@ __FBSDID("$FreeBSD$"); #include "math.h" #include "math_private.h" -static double pone(double), qone(double); +static __inline double pone(double), qone(double); static const volatile double vone = 1, vzero = 0; diff --git a/lib/msun/src/e_j1f.c b/lib/msun/src/e_j1f.c index c39c548a0a2b..ec7f38101b53 100644 --- a/lib/msun/src/e_j1f.c +++ b/lib/msun/src/e_j1f.c @@ -23,7 +23,7 @@ __FBSDID("$FreeBSD$"); #include "math.h" #include "math_private.h" -static float ponef(float), qonef(float); +static __inline float ponef(float), qonef(float); static const volatile float vone = 1, vzero = 0; diff --git a/release/Makefile.ec2 b/release/Makefile.ec2 index f7f34a6fab79..a781bc6d346a 100644 --- a/release/Makefile.ec2 +++ b/release/Makefile.ec2 @@ -53,7 +53,7 @@ ec2ami: cw-ec2 ${CW_EC2_PORTINSTALL} .endif /usr/local/bin/bsdec2-image-upload ${PUBLISH} \ ${.OBJDIR}/ec2.raw \ - "${TYPE} ${REVISION}-${BRANCH}${AMINAMESUFFIX}" \ - "${TYPE} ${REVISION}-${BRANCH}" \ + "${TYPE} ${REVISION}-${BRANCH}-${TARGET}${AMINAMESUFFIX}" \ + "${TYPE} ${REVISION}-${BRANCH}-${TARGET}" \ ${AWSREGION} ${AWSBUCKET} ${AWSKEYFILE} @touch ${.TARGET} diff --git a/release/Makefile.mirrors b/release/Makefile.mirrors new file mode 100644 index 000000000000..ed10c5553bbd --- /dev/null +++ b/release/Makefile.mirrors @@ -0,0 +1,254 @@ +# +# This Makefile helps create the directory structure on ftp-master, +# making staging builds a bit more sane. +# +# You probably do not want to use this. Really. +# You have been warned. +# +# Seriously. +# +# Don't use this unless you know why you're using it. +# +# $FreeBSD$ +# + +.include "${.CURDIR}/Makefile" + +RELEASEDIR?= /R +FTPDIR?= ${RELEASEDIR}/ftp-stage +.if exists(${RELEASEDIR}) +STAGE_TARGETS?= iso-images-stage +.endif + +.if (defined(EMBEDDED_TARGET) && !empty(EMBEDDED_TARGET)) || (defined(EMBEDDEDBUILD) && !empty(EMBEDDEDBUILD)) +. if ${TARGET} == "arm" || ${EMBEDDED_TARGET} == "arm" +EMBEDDED= 1 +. endif +.endif + +# snapshot +.if ${BRANCH} == "STABLE" || ${BRANCH} == "CURRENT" +SNAPSHOT= 1 +TLD?= ${FTPDIR}/snapshots +. if !defined(SVNREVISION) || empty(SVNREVISION) +. for _D in /usr/bin /usr/local/bin +. for _S in svnversion svnliteversion +. if exists(${_D}/${_S}) +SVNVERSION?= ${_D}/${_S} +. endif +. endfor +. endfor +. if exists(${SVNVERSION}) && !empty(SVNVERSION) +SVNREVISION!= ${SVNVERSION} ${WORLDDIR}/Makefile +. endif +. endif # !defined(SVNREVISION) +. if !defined(BUILDDATE) || empty(BUILDDATE) +. if exists(${.CURDIR}/${.OBJDIR}/dist/base/bin/sh) +BUILDDATE!= cd ${.CURDIR} && date -j -f '%s' $$(stat -f "%c" ${.OBJDIR}/dist/base/bin/sh) +%Y%m%d +. else +BUILDDATE!= date +%Y%m%d +. endif +. endif +_SNAP_SUFFIX:= ${BUILDDATE}-r${SVNREVISION} +.else +# release +SNAPSHOT= +TLD?= ${FTPDIR}/releases +.endif + +.if defined(EMBEDDED) && !empty(EMBEDDED) +. if ${TARGET} == "arm" && ${TARGET_ARCH} == "armv6" +. if !defined(BOARDNAME) && empty(BOARDNAME) +BOARDNAME:= ${KERNCONF} +. else +OLDNAME:= ${KERNCONF} +. endif +. if ${BRANCH} == "STABLE" || ${BRANCH} == "CURRENT" +SNAPSHOT= 1 +. endif +IMAGES:= img +. endif # arm/armv6 +.endif # embedded + +.if defined(WITH_VMIMAGES) && !empty(WITH_VMIMAGES) +STAGE_TARGETS+= vm-images-stage +VM_DIR= ${TLD}/VM-IMAGES/${REVISION}-${BRANCH}/${TARGET_ARCH} +.endif + +CLEANFILES+= ${STAGE_TARGETS} +CHECKSUM_FILES?= SHA256 MD5 +SNAP_SUFFIX!= echo ${_SNAP_SUFFIX:S,^-,,1} | tr -d ' ' +ISO_DIR= ${TLD}/${TARGET}/${TARGET_ARCH}/ISO-IMAGES/${REVISION} +FTP_DIR= ${TLD}/${TARGET}/${TARGET_ARCH}/${REVISION}-${BRANCH} + +remove-old-bits: + rm -rf ${FTPDIR} + +iso-images-stage: + mkdir -p ${ISO_DIR} + mkdir -p ${TLD}/ISO-IMAGES/${REVISION} +.if defined(SNAPSHOT) && !empty(SNAPSHOT) + cd ${RELEASEDIR} && rm -f CHECKSUM.* +. for IMAGE in ${IMAGES} +. if defined(EMBEDDED) && !empty(EMBEDDED) +. if defined(OLDNAME) && !empty(OLDNAME) + @# arm/armv6 IMX6 -> WANDBOARD, for example. + cd ${RELEASEDIR} && \ + mv ${OSRELEASE}-${OLDNAME}.${IMAGE}.xz \ + ${OSRELEASE}-${BOARDNAME}.${IMAGE}.xz +. endif + cd ${RELEASEDIR} && \ + mv ${OSRELEASE}-${BOARDNAME}.${IMAGE}.xz \ + ${OSRELEASE}-${BOARDNAME}-${SNAP_SUFFIX}.${IMAGE}.xz + cp -p ${RELEASEDIR}/${OSRELEASE}-${BOARDNAME}-${SNAP_SUFFIX}.${IMAGE}.xz \ + ${ISO_DIR}/${OSRELEASE}-${BOARDNAME}-${SNAP_SUFFIX}.${IMAGE}.xz + cd ${TLD}/ISO-IMAGES/${REVISION} && \ + ln -s \ + ../../${TARGET}/${TARGET_ARCH}/ISO-IMAGES/${REVISION}/${OSRELEASE}-${BOARDNAME}-${SNAP_SUFFIX}.${IMAGE}.xz +. endif # not embedded +. if exists(${RELEASEDIR}/${OSRELEASE}-${IMAGE}) + cd ${RELEASEDIR} && \ + mv ${OSRELEASE}-${IMAGE} \ + ${OSRELEASE}-${SNAP_SUFFIX}-${IMAGE} + cp -p ${RELEASEDIR}/${OSRELEASE}-${SNAP_SUFFIX}-${IMAGE} \ + ${ISO_DIR}/${OSRELEASE}-${SNAP_SUFFIX}-${IMAGE} + cd ${TLD}/ISO-IMAGES/${REVISION} && \ + ln -s \ + ../../${TARGET}/${TARGET_ARCH}/ISO-IMAGES/${REVISION}/${OSRELEASE}-${SNAP_SUFFIX}-${IMAGE} +. endif +. if exists(${RELEASEDIR}/${OSRELEASE}-${IMAGE}.xz) + cd ${RELEASEDIR} && \ + mv ${OSRELEASE}-${IMAGE}.xz \ + ${OSRELEASE}-${SNAP_SUFFIX}-${IMAGE}.xz + cp -p ${RELEASEDIR}/${OSRELEASE}-${SNAP_SUFFIX}-${IMAGE}.xz \ + ${ISO_DIR}/${OSRELEASE}-${SNAP_SUFFIX}-${IMAGE}.xz + cd ${TLD}/ISO-IMAGES/${REVISION} && \ + ln -s \ + ../../${TARGET}/${TARGET_ARCH}/ISO-IMAGES/${REVISION}/${OSRELEASE}-${SNAP_SUFFIX}-${IMAGE}.xz +. endif +. endfor # images loop + cd ${RELEASEDIR} && rm -f CHECKSUM.* +. for CHECKSUM in ${CHECKSUM_FILES} +. if defined(EMBEDDED) && !empty(EMBEDDED) + cd ${RELEASEDIR} && ${CHECKSUM:tl} ${OSRELEASE}* > \ + CHECKSUM.${CHECKSUM}-${OSRELEASE}-${BOARDNAME}-${SNAP_SUFFIX} + cp -p ${RELEASEDIR}/CHECKSUM.${CHECKSUM}-${OSRELEASE}-${BOARDNAME}-${SNAP_SUFFIX} \ + ${ISO_DIR}/CHECKSUM.${CHECKSUM}-${OSRELEASE}-${BOARDNAME}-${SNAP_SUFFIX} + cd ${TLD}/ISO-IMAGES/${REVISION} && \ + ln -s \ + ../../${TARGET}/${TARGET_ARCH}/ISO-IMAGES/${REVISION}/CHECKSUM.${CHECKSUM}-${OSRELEASE}-${BOARDNAME}-${SNAP_SUFFIX} +. else # not embedded + cd ${RELEASEDIR} && ${CHECKSUM:tl} ${OSRELEASE}* > \ + CHECKSUM.${CHECKSUM}-${OSRELEASE}-${SNAP_SUFFIX} + cp -p ${RELEASEDIR}/CHECKSUM.${CHECKSUM}-${OSRELEASE}-${SNAP_SUFFIX} \ + ${ISO_DIR}/CHECKSUM.${CHECKSUM}-${OSRELEASE}-${SNAP_SUFFIX} + cd ${TLD}/ISO-IMAGES/${REVISION} && \ + ln -s \ + ../../${TARGET}/${TARGET_ARCH}/ISO-IMAGES/${REVISION}/CHECKSUM.${CHECKSUM}-${OSRELEASE}-${SNAP_SUFFIX} +. endif # +. endfor # checksum files +.else # not snapshot +. for IMAGE in ${IMAGES} +. if defined(EMBEDDED) && !empty(EMBEDDED) +. if defined(OLDNAME) && !empty(OLDNAME) + @# arm/armv6 IMX6 -> WANDBOARD, for example. + cd ${RELEASEDIR} && \ + mv ${OSRELEASE}-${OLDNAME}.${IMAGE}.xz \ + ${OSRELEASE}-${BOARDNAME}.${IMAGE}.xz +. endif + cp -p ${RELEASEDIR}/${OSRELEASE}-${BOARDNAME}.${IMAGE}.xz \ + ${ISO_DIR}/${OSRELEASE}-${BOARDNAME}.${IMAGE}.xz + cd ${TLD}/ISO-IMAGES/${REVISION} && \ + ln -s \ + ../../${TARGET}/${TARGET_ARCH}/ISO-IMAGES/${REVISION}/${OSRELEASE}-${BOARDNAME}.${IMAGE}.xz +. endif # not embedded +. if exists(${RELEASEDIR}/${OSRELEASE}-${IMAGE}) + cd ${RELEASEDIR} && \ + cp -p ${RELEASEDIR}/${OSRELEASE}-${IMAGE} \ + ${ISO_DIR}/${OSRELEASE}-${IMAGE} + cd ${TLD}/ISO-IMAGES/${REVISION} && \ + ln -s \ + ../../${TARGET}/${TARGET_ARCH}/ISO-IMAGES/${REVISION}/${OSRELEASE}-${IMAGE} +. endif +. if exists(${RELEASEDIR}/${OSRELEASE}-${IMAGE}.xz) + cp -p ${RELEASEDIR}/${OSRELEASE}-${IMAGE}.xz \ + ${ISO_DIR}/${OSRELEASE}-${IMAGE}.xz + cd ${TLD}/ISO-IMAGES/${REVISION} && \ + ln -s \ + ../../${TARGET}/${TARGET_ARCH}/ISO-IMAGES/${REVISION}/${OSRELEASE}-${IMAGE}.xz +. endif +. endfor # images loop + cd ${RELEASEDIR} && rm -f CHECKSUM.* +. for CHECKSUM in ${CHECKSUM_FILES} +. if defined(EMBEDDED) && !empty(EMBEDDED) + cd ${RELEASEDIR} && ${CHECKSUM:tl} ${OSRELEASE}* > \ + CHECKSUM.${CHECKSUM}-${OSRELEASE}-${BOARDNAME} + cp -p ${RELEASEDIR}/CHECKSUM.${CHECKSUM}-${OSRELEASE}-${BOARDNAME} \ + ${ISO_DIR}/CHECKSUM.${CHECKSUM}-${OSRELEASE}-${BOARDNAME} + cd ${TLD}/ISO-IMAGES/${REVISION} && \ + ln -s \ + ../../${TARGET}/${TARGET_ARCH}/ISO-IMAGES/${REVISION}/CHECKSUM.${CHECKSUM}-${OSRELEASE}-${BOARDNAME} +. else # not embedded + cd ${RELEASEDIR} && ${CHECKSUM:tl} ${OSRELEASE}* > \ + CHECKSUM.${CHECKSUM}-${OSRELEASE} + cp -p ${RELEASEDIR}/CHECKSUM.${CHECKSUM}-${OSRELEASE} \ + ${ISO_DIR}/CHECKSUM.${CHECKSUM}-${OSRELEASE} + cd ${TLD}/ISO-IMAGES/${REVISION} && \ + ln -s \ + ../../${TARGET}/${TARGET_ARCH}/ISO-IMAGES/${REVISION}/CHECKSUM.${CHECKSUM}-${OSRELEASE} +. endif +. endfor # checksum files +.endif # release +.if exists(${RELEASEDIR}/ftp) + mkdir -p ${FTP_DIR} + cp -p ${RELEASEDIR}/ftp/*.txz ${RELEASEDIR}/ftp/MANIFEST ${FTP_DIR} + cd ${TLD}/${TARGET} && \ + ln -s ${TARGET_ARCH}/${REVISION}-${BRANCH} \ + ${REVISION}-${BRANCH} +.endif + +vm-images-stage: + mkdir -p ${VM_DIR} +.if defined(SNAPSHOT) && !empty(SNAPSHOT) +. if exists(${VM_DIR}/Latest) + rm -rf ${VM_DIR}/Latest +. endif + mkdir -p ${VM_DIR}/Latest + mkdir -p ${VM_DIR}/${BUILDDATE} +. for VMFORMAT in ${VMFORMATS} + cd ${RELEASEDIR}/vmimages && \ + mv ${OSRELEASE}.${VMFORMAT}.xz \ + ${OSRELEASE}-${SNAP_SUFFIX}.${VMFORMAT}.xz + cp -p ${RELEASEDIR}/vmimages/${OSRELEASE}-${SNAP_SUFFIX}.${VMFORMAT}.xz \ + ${VM_DIR}/${BUILDDATE}/${OSRELEASE}-${SNAP_SUFFIX}.${VMFORMAT}.xz + cd ${VM_DIR}/Latest && \ + ln -s ../${BUILDDATE}/${OSRELEASE}-${SNAP_SUFFIX}.${VMFORMAT}.xz \ + ${OSRELEASE}.${VMFORMAT}.xz +. endfor + cd ${RELEASEDIR}/vmimages && rm -f CHECKSUM.* +. for CHECKSUM in ${CHECKSUM_FILES} + cd ${RELEASEDIR}/vmimages && \ + ${CHECKSUM:tl} ${OSRELEASE}* > CHECKSUM.${CHECKSUM}-${SNAP_SUFFIX} + cp -p ${RELEASEDIR}/vmimages/CHECKSUM.${CHECKSUM}-${SNAP_SUFFIX} \ + ${VM_DIR}/${BUILDDATE}/CHECKSUM.${CHECKSUM}-${SNAP_SUFFIX} + cd ${VM_DIR}/Latest && \ + ln -s ../${BUILDDATE}/CHECKSUM.${CHECKSUM}-${SNAP_SUFFIX} \ + CHECKSUM.${CHECKSUM} +. endfor +.else # not snapshot +. if exists(${VM_DIR}/Latest) + rm -rf ${VM_DIR}/Latest +. endif + mkdir -p ${VM_DIR}/Latest +. for VMFORMAT in ${VMFORMATS} + cp -p ${RELEASEDIR}/vmimages/${OSRELEASE}.${VMFORMAT}.xz \ + ${VM_DIR}/Latest/${OSRELEASE}.${VMFORMAT}.xz +. endfor +. for CHECKSUM in ${CHECKSUM_FILES} + cp -p ${RELEASEDIR}/vmimages/CHECKSUM.${CHECKSUM} \ + ${VM_DIR}/Latest/CHECKSUM.${CHECKSUM} +. endfor +.endif + +ftp-stage: remove-old-bits ${STAGE_TARGETS} + diff --git a/release/arm/BEAGLEBONE.conf b/release/arm/BEAGLEBONE.conf index 72337f831cc3..3ae48714fc33 100644 --- a/release/arm/BEAGLEBONE.conf +++ b/release/arm/BEAGLEBONE.conf @@ -3,36 +3,35 @@ # $FreeBSD$ # -# Global variables. -export SVNROOT="svn://svn.FreeBSD.org/" -export SRCBRANCH="base/head@rHEAD" -export DOCBRANCH="doc/head@rHEAD" -export PORTBRANCH="ports/head@rHEAD" -export NODOC=yes -export WORLD_FLAGS="-j $(sysctl -n hw.ncpu)" -export KERNEL_FLAGS="-j $(( $(( $(sysctl -n hw.ncpu) + 1 )) / 2 ))" -export CHROOTDIR="/scratch" -export EMBEDDEDBUILD=1 -export EMBEDDEDPORTS="sysutils/u-boot-beaglebone" +EMBEDDEDBUILD=1 +EMBEDDED_TARGET="arm" +EMBEDDED_TARGET_ARCH="armv6" +EMBEDDEDPORTS="sysutils/u-boot-beaglebone" +KERNEL="BEAGLEBONE" +WORLD_FLAGS="${WORLD_FLAGS} UBLDR_LOADADDR=0x88000000" +IMAGE_SIZE="1G" +PART_SCHEME="MBR" +FAT_SIZE="2m" +FAT_TYPE="12" +MD_ARGS="-x 63 -y 255" +NODOC=1 -# Build chroot configuration -load_chroot_env() { - # Avoid collision with TARGET and XDEV. - unset XDEV XDEV_ARCH KERNEL - export TARGET="amd64" - export TARGET_ARCH="amd64" -} - -# Build target configuration -load_target_env() { - # Avoid collision with TARGET and XDEV. - unset TARGET TARGET_ARCH - export EMBEDDEDPORTS="lang/python textproc/gsed" - export XDEV="arm" - export XDEV_ARCH="armv6" - export XDEV_FLAGS="WITH_GCC=1 WITH_GCC_BOOTSTRAP=1 WITHOUT_CLANG_IS_CC=1" - export XDEV_FLAGS="${XDEV_FLAGS} MK_TESTS=no" - export KERNEL="BEAGLEBONE" - export CROCHETSRC="https://github.com/freebsd/crochet" - export CROCHETBRANCH="trunk@rHEAD" +arm_install_uboot() { + UBOOT_DIR="/usr/local/share/u-boot/u-boot-beaglebone" + FATMOUNT="${DESTDIR%${KERNEL}}/fat" + UFSMOUNT="${DESTDIR%${KERNEL}}/ufs" + chroot ${CHROOTDIR} mkdir -p "${FATMOUNT}" "${UFSMOUNT}" + chroot ${CHROOTDIR} mount_msdosfs /dev/${mddev}s1 ${FATMOUNT} + chroot ${CHROOTDIR} mount /dev/${mddev}s2a ${UFSMOUNT} + chroot ${CHROOTDIR} cp -p ${UBOOT_DIR}/MLO ${FATMOUNT}/MLO + chroot ${CHROOTDIR} cp -p ${UBOOT_DIR}/u-boot.img ${FATMOUNT}/u-boot.img + chroot ${CHROOTDIR} cp -p ${UFSMOUNT}/boot/ubldr ${FATMOUNT}/ubldr + chroot ${CHROOTDIR} touch ${UFSMOUNT}/firstboot + sync + umount_loop ${CHROOTDIR}/${FATMOUNT} + umount_loop ${CHROOTDIR}/${UFSMOUNT} + chroot ${CHROOTDIR} rmdir ${FATMOUNT} + chroot ${CHROOTDIR} rmdir ${UFSMOUNT} + + return 0 } diff --git a/release/arm/PANDABOARD.conf b/release/arm/PANDABOARD.conf index dc8952d333b4..b5a120e9041b 100644 --- a/release/arm/PANDABOARD.conf +++ b/release/arm/PANDABOARD.conf @@ -3,35 +3,35 @@ # $FreeBSD$ # -# Global variables. -export SVNROOT="svn://svn.FreeBSD.org/" -export SRCBRANCH="base/head@rHEAD" -export DOCBRANCH="doc/head@rHEAD" -export PORTBRANCH="ports/head@rHEAD" -export NODOC=yes -export WORLD_FLAGS="-j $(sysctl -n hw.ncpu)" -export KERNEL_FLAGS="-j $(( $(( $(sysctl -n hw.ncpu) + 1 )) / 2 ))" -export CHROOTDIR="/scratch" -export EMBEDDEDBUILD=1 -export EMBEDDEDPORTS="lang/python textproc/gsed" +EMBEDDEDBUILD=1 +EMBEDDED_TARGET="arm" +EMBEDDED_TARGET_ARCH="armv6" +EMBEDDEDPORTS="sysutils/u-boot-pandaboard" +KERNEL="PANDABOARD" +NODOC=1 +WORLD_FLAGS="${WORLD_FLAGS} UBLDR_LOADADDR=0x88000000" +IMAGE_SIZE="1G" +PART_SCHEME="MBR" +FAT_SIZE="2m" +FAT_TYPE="12" +MD_ARGS="-x 63 -y 255" -# Build chroot configuration -load_chroot_env() { - # Avoid collision with TARGET and XDEV. - unset XDEV XDEV_ARCH KERNEL - export TARGET="amd64" - export TARGET_ARCH="amd64" -} - -# Build target configuration -load_target_env() { - # Avoid collision with TARGET and XDEV. - unset TARGET TARGET_ARCH - export XDEV="arm" - export XDEV_ARCH="armv6" - export XDEV_FLAGS="WITH_GCC=1 WITH_GCC_BOOTSTRAP=1 WITHOUT_CLANG_IS_CC=1" - export XDEV_FLAGS="${XDEV_FLAGS} MK_TESTS=no" - export KERNEL="PANDABOARD" - export CROCHETSRC="https://github.com/freebsd/crochet" - export CROCHETBRANCH="trunk@rHEAD" +arm_install_uboot() { + UBOOT_DIR="/usr/local/share/u-boot/u-boot-pandaboard" + FATMOUNT="${DESTDIR%${KERNEL}}/fat" + UFSMOUNT="${DESTDIR%${KERNEL}}/ufs" + chroot ${CHROOTDIR} mkdir -p "${FATMOUNT}" "${UFSMOUNT}" + chroot ${CHROOTDIR} mount_msdosfs /dev/${mddev}s1 ${FATMOUNT} + chroot ${CHROOTDIR} mount /dev/${mddev}s2a ${UFSMOUNT} + chroot ${CHROOTDIR} cp -p ${UBOOT_DIR}/MLO ${FATMOUNT}/MLO + chroot ${CHROOTDIR} cp -p ${UBOOT_DIR}/u-boot.img ${FATMOUNT}/u-boot.img + chroot ${CHROOTDIR} cp -p ${UFSMOUNT}/boot/ubldr ${FATMOUNT}/ubldr + chroot ${CHROOTDIR} touch ${UFSMOUNT}/firstboot + sync + umount_loop ${CHROOTDIR}/${FATMOUNT} + umount_loop ${CHROOTDIR}/${UFSMOUNT} + chroot ${CHROOTDIR} rmdir ${FATMOUNT} + chroot ${CHROOTDIR} rmdir ${UFSMOUNT} + + return 0 } diff --git a/release/arm/RPI-B.conf b/release/arm/RPI-B.conf index aae60c9831a9..e5abaab9fd18 100644 --- a/release/arm/RPI-B.conf +++ b/release/arm/RPI-B.conf @@ -3,38 +3,41 @@ # $FreeBSD$ # -# Global variables. -export SVNROOT="svn://svn.FreeBSD.org/" -export SRCBRANCH="base/head@rHEAD" -export DOCBRANCH="doc/head@rHEAD" -export PORTBRANCH="ports/head@rHEAD" -export NODOC=yes -export WORLD_FLAGS="-j $(sysctl -n hw.ncpu)" -export KERNEL_FLAGS="-j $(( $(( $(sysctl -n hw.ncpu) + 1 )) / 2 ))" -export CHROOTDIR="/scratch" -export EMBEDDEDBUILD=1 -export EMBEDDEDPORTS="lang/python textproc/gsed" +EMBEDDEDBUILD=1 +EMBEDDED_TARGET="arm" +EMBEDDED_TARGET_ARCH="armv6" +EMBEDDEDPORTS="sysutils/u-boot-rpi" +KERNEL="RPI-B" +WORLD_FLAGS="${WORLD_FLAGS} UBLDR_LOADADDR=0x2000000" +IMAGE_SIZE="1G" +PART_SCHEME="MBR" +FAT_SIZE="17m" +FAT_TYPE="16" +MD_ARGS="-x 63 -y 255" +NODOC=1 -# Build chroot configuration -load_chroot_env() { - # Avoid collision with TARGET and XDEV. - unset XDEV XDEV_ARCH KERNEL - export TARGET="amd64" - export TARGET_ARCH="amd64" -} - -# Build target configuration -load_target_env() { - # Avoid collision with TARGET and XDEV. - unset TARGET TARGET_ARCH - export XDEV="arm" - export XDEV_ARCH="armv6" - export XDEV_FLAGS="WITH_GCC=1 WITH_GCC_BOOTSTRAP=1 WITHOUT_CLANG_IS_CC=1" - export XDEV_FLAGS="${XDEV_FLAGS} MK_TESTS=no" - export KERNEL="RPI-B" - export CROCHETSRC="https://github.com/freebsd/crochet" - export CROCHETBRANCH="trunk@rHEAD" - export UBOOTSRC="https://github.com/gonzoua/u-boot-pi" - export UBOOTBRANCH="trunk" - export UBOOTDIR="/tmp/crochet/u-boot-rpi" +arm_install_uboot() { + UBOOT_DIR="/usr/local/share/u-boot/u-boot-rpi" + UBOOT_FILES="bootcode.bin config.txt fixup.dat fixup_cd.dat \ + start.elf start_cd.elf u-boot.img" + FATMOUNT="${DESTDIR%${KERNEL}}/fat" + UFSMOUNT="${DESTDIR%${KERNEL}}/ufs" + chroot ${CHROOTDIR} mkdir -p "${FATMOUNT}" "${UFSMOUNT}" + chroot ${CHROOTDIR} mount_msdosfs /dev/${mddev}s1 ${FATMOUNT} + chroot ${CHROOTDIR} mount /dev/${mddev}s2a ${UFSMOUNT} + for _UF in ${UBOOT_FILES}; do + chroot ${CHROOTDIR} cp -p ${UBOOT_DIR}/${_UF} \ + ${FATMOUNT}/${_UF} + done + chroot ${CHROOTDIR} cp -p ${UFSMOUNT}/boot/ubldr ${FATMOUNT}/ubldr + chroot ${CHROOTDIR} cp -p ${UFSMOUNT}/boot/dtb/rpi.dtb \ + ${FATMOUNT}/rpi.dtb + chroot ${CHROOTDIR} touch ${UFSMOUNT}/firstboot + sync + umount_loop ${CHROOTDIR}/${FATMOUNT} + umount_loop ${CHROOTDIR}/${UFSMOUNT} + chroot ${CHROOTDIR} rmdir ${FATMOUNT} + chroot ${CHROOTDIR} rmdir ${UFSMOUNT} + + return 0 } diff --git a/release/arm/RPI2.conf b/release/arm/RPI2.conf index bb8ebe998ca9..e1d15d124425 100644 --- a/release/arm/RPI2.conf +++ b/release/arm/RPI2.conf @@ -3,36 +3,41 @@ # $FreeBSD$ # -# Global variables. -export SVNROOT="svn://svn.FreeBSD.org/" -export SRCBRANCH="base/head@rHEAD" -export DOCBRANCH="doc/head@rHEAD" -export PORTBRANCH="ports/head@rHEAD" -export NODOC=yes -export WORLD_FLAGS="-j $(sysctl -n hw.ncpu)" -export KERNEL_FLAGS="-j $(( $(( $(sysctl -n hw.ncpu) + 1 )) / 2 ))" -export CHROOTDIR="/scratch" -export EMBEDDEDBUILD=1 -export EMBEDDEDPORTS="sysutils/u-boot-rpi2" +EMBEDDEDBUILD=1 +EMBEDDED_TARGET="arm" +EMBEDDED_TARGET_ARCH="armv6" +EMBEDDEDPORTS="sysutils/u-boot-rpi2" +KERNEL="RPI2" +NODOC=1 +WORLD_FLAGS="${WORLD_FLAGS} UBLDR_LOADADDR=0x2000000" +IMAGE_SIZE="1G" +PART_SCHEME="MBR" +FAT_SIZE="50m" +FAT_TYPE="16" +MD_ARGS="-x 63 -y 255" -# Build chroot configuration -load_chroot_env() { - # Avoid collision with TARGET and XDEV. - unset XDEV XDEV_ARCH KERNEL - export TARGET="amd64" - export TARGET_ARCH="amd64" +arm_install_uboot() { + UBOOT_DIR="/usr/local/share/u-boot/u-boot-rpi2" + UBOOT_FILES="bootcode.bin config.txt fixup.dat fixup_cd.dat \ + fixup_x.dat start.elf start_cd.elf start_x.elf u-boot.bin" + FATMOUNT="${DESTDIR%${KERNEL}}/fat" + UFSMOUNT="${DESTDIR%${KERNEL}}/ufs" + chroot ${CHROOTDIR} mkdir -p "${FATMOUNT}" "${UFSMOUNT}" + chroot ${CHROOTDIR} mount_msdosfs /dev/${mddev}s1 ${FATMOUNT} + chroot ${CHROOTDIR} mount /dev/${mddev}s2a ${UFSMOUNT} + for _UF in ${UBOOT_FILES}; do + chroot ${CHROOTDIR} cp -p ${UBOOT_DIR}/${_UF} \ + ${FATMOUNT}/${_UF} + done + chroot ${CHROOTDIR} cp -p ${UFSMOUNT}/boot/ubldr ${FATMOUNT}/ubldr + chroot ${CHROOTDIR} cp -p ${UFSMOUNT}/boot/dtb/rpi2.dtb \ + ${FATMOUNT}/rpi2.dtb + chroot ${CHROOTDIR} touch ${UFSMOUNT}/firstboot + sync + umount_loop ${CHROOTDIR}/${FATMOUNT} + umount_loop ${CHROOTDIR}/${UFSMOUNT} + chroot ${CHROOTDIR} rmdir ${FATMOUNT} + chroot ${CHROOTDIR} rmdir ${UFSMOUNT} + + return 0 } - -# Build target configuration -load_target_env() { - # Avoid collision with TARGET and XDEV. - unset TARGET TARGET_ARCH - export XDEV="arm" - export XDEV_ARCH="armv6" - export XDEV_FLAGS="WITH_GCC=1 WITH_GCC_BOOTSTRAP=1 WITHOUT_CLANG_IS_CC=1" - export XDEV_FLAGS="${XDEV_FLAGS} MK_TESTS=no" - export KERNEL="RPI2" - export CROCHETSRC="https://github.com/freebsd/crochet" - export CROCHETBRANCH="trunk@rHEAD" -} - diff --git a/release/arm/WANDBOARD-QUAD.conf b/release/arm/WANDBOARD-QUAD.conf deleted file mode 100644 index c3fff91694ae..000000000000 --- a/release/arm/WANDBOARD-QUAD.conf +++ /dev/null @@ -1,37 +0,0 @@ -#!/bin/sh -# -# $FreeBSD$ -# - -# Global variables. -export SVNROOT="svn://svn.FreeBSD.org/" -export SRCBRANCH="base/head@rHEAD" -export DOCBRANCH="doc/head@rHEAD" -export PORTBRANCH="ports/head@rHEAD" -export NODOC=yes -export WORLD_FLAGS="-j $(sysctl -n hw.ncpu)" -export KERNEL_FLAGS="-j $(( $(( $(sysctl -n hw.ncpu) + 1 )) / 2 ))" -export CHROOTDIR="/scratch" -export EMBEDDEDBUILD=1 -export EMBEDDEDPORTS="lang/python textproc/gsed" - -# Build chroot configuration -load_chroot_env() { - # Avoid collision with TARGET and XDEV. - unset XDEV XDEV_ARCH KERNEL - export TARGET="amd64" - export TARGET_ARCH="amd64" -} - -# Build target configuration -load_target_env() { - # Avoid collision with TARGET and XDEV. - unset TARGET TARGET_ARCH - export XDEV="arm" - export XDEV_ARCH="armv6" - export XDEV_FLAGS="WITH_GCC=1 WITH_GCC_BOOTSTRAP=1 WITHOUT_CLANG_IS_CC=1" - export XDEV_FLAGS="${XDEV_FLAGS} MK_TESTS=no" - export KERNEL="WANDBOARD-QUAD" - export CROCHETSRC="https://github.com/freebsd/crochet" - export CROCHETBRANCH="trunk@rHEAD" -} diff --git a/release/arm/WANDBOARD.conf b/release/arm/WANDBOARD.conf new file mode 100644 index 000000000000..42b452310a16 --- /dev/null +++ b/release/arm/WANDBOARD.conf @@ -0,0 +1,41 @@ +#!/bin/sh +# +# $FreeBSD$ +# + +EMBEDDEDBUILD=1 +EMBEDDED_TARGET="arm" +EMBEDDED_TARGET_ARCH="armv6" +EMBEDDEDPORTS="sysutils/u-boot-wandboard" +KERNEL="IMX6" +WORLD_FLAGS="${WORLD_FLAGS} UBLDR_LOADADDR=0x11000000" +IMAGE_SIZE="1G" +PART_SCHEME="MBR" +FAT_SIZE="50m -b 16384" +FAT_TYPE="16" +MD_ARGS="-x 63 -y 255" +NODOC=1 + +arm_install_uboot() { + UBOOT_DIR="/usr/local/share/u-boot/u-boot-wandboard" + UBOOT_FILES="u-boot.imx" + FATMOUNT="${DESTDIR%${KERNEL}}/fat" + UFSMOUNT="${DESTDIR%${KERNEL}}/ufs" + chroot ${CHROOTDIR} dd if=${UBOOT_DIR}/${UBOOT_FILES} \ + of=/dev/${mddev} bs=512 seek=2 + chroot ${CHROOTDIR} mkdir -p "${FATMOUNT}" "${UFSMOUNT}" + chroot ${CHROOTDIR} mount_msdosfs /dev/${mddev}s1 ${FATMOUNT} + chroot ${CHROOTDIR} mount /dev/${mddev}s2a ${UFSMOUNT} + chroot ${CHROOTDIR} cp -p ${UFSMOUNT}/boot/ubldr ${FATMOUNT}/ubldr + chroot ${CHROOTDIR} /bin/sh -c 'echo \ + setenv fdt_file wandboard-quad.dtb\; fatload mmc 0:1 11000000 ubldr\; bootelf 11000000\; \ + > ${FATMOUNT}/boot.txt' + chroot ${CHROOTDIR} touch ${UFSMOUNT}/firstboot + sync + umount_loop ${CHROOTDIR}/${FATMOUNT} + umount_loop ${CHROOTDIR}/${UFSMOUNT} + chroot ${CHROOTDIR} rmdir ${FATMOUNT} + chroot ${CHROOTDIR} rmdir ${UFSMOUNT} + + return 0 +} diff --git a/release/arm/ZEDBOARD.conf b/release/arm/ZEDBOARD.conf deleted file mode 100644 index 4d0a4615ba6b..000000000000 --- a/release/arm/ZEDBOARD.conf +++ /dev/null @@ -1,36 +0,0 @@ -#!/bin/sh -# -# $FreeBSD$ -# - -# Global variables. -export SVNROOT="svn://svn.FreeBSD.org/" -export SRCBRANCH="base/head@rHEAD" -export DOCBRANCH="doc/head@rHEAD" -export PORTBRANCH="ports/head@rHEAD" -export NODOC=yes -export WORLD_FLAGS="-j $(sysctl -n hw.ncpu)" -export export KERNEL_FLAGS="-j $(( $(( $(sysctl -n hw.ncpu) + 1 )) / 2 ))" -export CHROOTDIR="/scratch" -export EMBEDDEDBUILD=1 - -# Build chroot configuration -load_chroot_env() { - # Avoid collision with TARGET and XDEV. - unset XDEV XDEV_ARCH KERNEL - export TARGET="amd64" - export TARGET_ARCH="amd64" -} - -# Build target configuration -load_target_env() { - # Avoid collision with TARGET and XDEV. - unset TARGET TARGET_ARCH - export XDEV="arm" - export XDEV_ARCH="armv6" - export XDEV_FLAGS="WITH_GCC=1 WITH_GCC_BOOTSTRAP=1 WITHOUT_CLANG_IS_CC=1" - export XDEV_FLAGS="${XDEV_FLAGS} MK_TESTS=no" - export KERNEL="ZEDBOARD" - export CROCHETSRC="https://github.com/freebsd/crochet" - export CROCHETBRANCH="trunk@rHEAD" -} diff --git a/release/arm/release.sh b/release/arm/release.sh deleted file mode 100755 index c68f812c7043..000000000000 --- a/release/arm/release.sh +++ /dev/null @@ -1,151 +0,0 @@ -#!/bin/sh -#- -# Copyright (c) 2013, 2014 The FreeBSD Foundation -# All rights reserved. -# -# This software was developed by Glen Barber -# under sponsorship from the FreeBSD Foundation. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -# SUCH DAMAGE. -# -# $FreeBSD$ -# - -# This script is intended to be called by release/release.sh to build ARM -# images for release. It is not intended to be run directly. This sets up -# the software needed within a build chroot, then runs crochet to provide -# downloadable images for embedded devices. - -set -e - -before_build() { - WANT_UBOOT= - KNOWNHASH= - UBOOT_VERSION= - case ${KERNEL} in - PANDABOARD) - WANT_UBOOT=1 - KNOWNHASH="e08e20a6979bfca6eebb9a2b0e42aa4416af3d796332fd63a3470495a089d496" - UBOOT_VERSION="u-boot-2012.07" - ;; - WANDBOARD-QUAD) - WANT_UBOOT=1 - KNOWNHASH="b4f83b8db325c21671a997198ec3a373e2e00dde2fcf17be9b9afd7cfd727f56" - UBOOT_VERSION="u-boot-2014.07" - ;; - *) - # Fallthrough. - ;; - esac - if [ ! -z ${WANT_UBOOT} ]; then - chroot ${CHROOTDIR} fetch -o /tmp/crochet/${UBOOT_VERSION}.tar.bz2 \ - http://people.freebsd.org/~gjb/${UBOOT_VERSION}.tar.bz2 - UBOOT_HASH="$(sha256 -q ${CHROOTDIR}/tmp/crochet/${UBOOT_VERSION}.tar.bz2)" - if [ "${UBOOT_HASH}" != "${KNOWNHASH}" ]; then - echo "Checksum mismatch! Exiting now." - exit 1 - fi - chroot ${CHROOTDIR} tar xf /tmp/crochet/${UBOOT_VERSION}.tar.bz2 \ - -C /tmp/crochet/ - fi -} - -install_crochet() { - chroot ${CHROOTDIR} svn co -q ${CROCHETSRC}/${CROCHETBRANCH} \ - /tmp/crochet -} - -install_uboot() { - # Only fetch u-boot sources if UBOOTSRC is set; otherwise it is - # not needed. - if [ -n "${UBOOTSRC}" ]; then - continue - else - return 0 - fi - chroot ${CHROOTDIR} svn co -q ${UBOOTSRC}/${UBOOTBRANCH} \ - /${UBOOTDIR} -} - -main() { - # Fix broken ports that use kern.osreldate. - OSVERSION=$(chroot ${CHROOTDIR} /usr/bin/uname -U) - export OSVERSION - REVISION=$(chroot ${CHROOTDIR} make -C /usr/src/release -V REVISION) - BRANCH=$(chroot ${CHROOTDIR} make -C /usr/src/release -V BRANCH) - UNAME_r=${REVISION}-${BRANCH} - export UNAME_r - export XZ_CMD=$(chroot ${CHROOTDIR} make -C /usr/src/release -V XZ_CMD) - - # Build the 'xdev' target for crochet. - eval chroot ${CHROOTDIR} make -C /usr/src \ - ${XDEV_FLAGS} XDEV=${XDEV} XDEV_ARCH=${XDEV_ARCH} \ - TARGET=${XDEV} TARGET_ARCH=${XDEV_ARCH} \ - ${WORLD_FLAGS} xdev - - # Install the cross-build symlinks to /usr/bin to make crochet - # happy. - eval chroot ${CHROOTDIR} make -C /usr/src \ - ${XDEV_FLAGS} XDEV=${XDEV} XDEV_ARCH=${XDEV_ARCH} \ - TARGET=${XDEV} TARGET_ARCH=${XDEV_ARCH} \ - ${WORLD_FLAGS} xdev-links || true - - # Run the ldconfig(8) startup script so /var/run/ld-elf*.so.hints - # is created. - eval chroot ${CHROOTDIR} /etc/rc.d/ldconfig forcerestart - # Install security/ca_root_nss since we need to check the https - # certificate of github. - eval chroot ${CHROOTDIR} make -C /usr/ports/security/ca_root_nss \ - OPTIONS_SET="ETCSYMLINK" BATCH=1 FORCE_PKG_REGISTER=1 \ - install clean distclean - EMBEDDEDPORTS="${EMBEDDEDPORTS} devel/subversion" - for _PORT in ${EMBEDDEDPORTS}; do - eval chroot ${CHROOTDIR} make -C /usr/ports/${_PORT} \ - BATCH=1 FORCE_PKG_REGISTER=1 install clean distclean - done - - # Certain u-boot versions hardcode the use of a host gcc, and gcc's - # build relies on having gperf installed. - eval chroot ${CHROOTDIR} make -C /usr/src/gnu/usr.bin/gperf \ - WITH_GCC=1 ${WORLD_FLAGS} obj - eval chroot ${CHROOTDIR} make -C /usr/src/gnu/usr.bin/gperf \ - WITH_GCC=1 ${WORLD_FLAGS} -j1 depend all - eval chroot ${CHROOTDIR} make -C /usr/src/gnu/usr.bin/gperf \ - WITH_GCC=1 ${WORLD_FLAGS} -j1 install - eval chroot ${CHROOTDIR} make -C /usr/src/gnu/usr.bin/cc \ - WITH_GCC=1 ${WORLD_FLAGS} -j1 obj depend all install - - mkdir -p ${CHROOTDIR}/tmp/crochet/work - before_build - install_crochet - install_uboot - eval chroot ${CHROOTDIR} /bin/sh /tmp/crochet/crochet.sh \ - -c /tmp/external/${XDEV}/crochet-${KERNEL}.conf - mkdir -p ${CHROOTDIR}/R/ - cp -p ${CHROOTDIR}/usr/obj/*.img ${CHROOTDIR}/R/ - ${XZ_CMD} ${CHROOTDIR}/R/FreeBSD*.img - cd ${CHROOTDIR}/R/ && sha256 FreeBSD*.img.xz > CHECKSUM.SHA256 - cd ${CHROOTDIR}/R/ && md5 FreeBSD*.img.xz > CHECKSUM.MD5 -} - -main "$@" -exit 0 diff --git a/release/i386/make-memstick.sh b/release/i386/make-memstick.sh index e10b892eeb29..27979ae779f1 100755 --- a/release/i386/make-memstick.sh +++ b/release/i386/make-memstick.sh @@ -29,20 +29,13 @@ if [ -e ${2} ]; then fi echo '/dev/ufs/FreeBSD_Install / ufs ro,noatime 1 1' > ${1}/etc/fstab -makefs -B little -o label=FreeBSD_Install ${2} ${1} +makefs -B little -o label=FreeBSD_Install ${2}.part ${1} if [ $? -ne 0 ]; then echo "makefs failed" exit 1 fi rm ${1}/etc/fstab -unit=$(mdconfig -a -t vnode -f ${2}) -if [ $? -ne 0 ]; then - echo "mdconfig failed" - exit 1 -fi -gpart create -s BSD ${unit} -gpart bootcode -b ${1}/boot/boot ${unit} -gpart add -t freebsd-ufs ${unit} -mdconfig -d -u ${unit} +mkimg -s gpt -b ${1}/boot/pmbr -p freebsd-boot:=${1}/boot/gptboot -p freebsd-ufs:=${2}.part -p freebsd-swap::1M -o ${2} +rm ${2}.part diff --git a/release/release.sh b/release/release.sh index 158794f0c515..94a9bb62c00d 100755 --- a/release/release.sh +++ b/release/release.sh @@ -36,257 +36,359 @@ # $FreeBSD$ # -PATH="/bin:/sbin:/usr/bin:/usr/sbin:/usr/local/bin" -export PATH +export PATH="/bin:/sbin:/usr/bin:/usr/sbin:/usr/local/bin" + +VERSION=2 # Prototypes that can be redefined per-chroot or per-target. load_chroot_env() { } load_target_env() { } buildenv_setup() { } -# The directory within which the release will be built. -CHROOTDIR="/scratch" -RELENGDIR="$(realpath $(dirname $(basename ${0})))" - -# The default version control system command to obtain the sources. -VCSCMD="svn checkout" - -# The default svn checkout server, and svn branches for src/, doc/, -# and ports/. -SVNROOT="svn://svn.FreeBSD.org/" -SRCBRANCH="base/head@rHEAD" -DOCBRANCH="doc/head@rHEAD" -PORTBRANCH="ports/head@rHEAD" - -# Set for embedded device builds. -EMBEDDEDBUILD= - -# Sometimes one needs to checkout src with --force svn option. -# If custom kernel configs copied to src tree before checkout, e.g. -SRC_FORCE_CHECKOUT= - -# The default make.conf and src.conf to use. Set to /dev/null -# by default to avoid polluting the chroot(8) environment with -# non-default settings. -MAKE_CONF="/dev/null" -SRC_CONF="/dev/null" - -# The number of make(1) jobs, defaults to the number of CPUs available for -# buildworld, and half of number of CPUs available for buildkernel. -WORLD_FLAGS="-j$(sysctl -n hw.ncpu)" -KERNEL_FLAGS="-j$(( $(( $(sysctl -n hw.ncpu) + 1 )) / 2))" - -MAKE_FLAGS="-s" - -# The name of the kernel to build, defaults to GENERIC. -KERNEL="GENERIC" - -# Set to non-empty value to disable checkout of doc/ and/or ports/. Disabling -# ports/ checkout also forces NODOC to be set. -NODOC= -NOPORTS= - -# Set to non-empty value to build dvd1.iso as part of the release. -WITH_DVD= -WITH_COMPRESSED_IMAGES= - -# Set to non-empty value to build virtual machine images as part of -# the release. -WITH_VMIMAGES= -WITH_COMPRESSED_VMIMAGES= -XZ_THREADS=0 - -# Set to non-empty value to build virtual machine images for various -# cloud providers as part of the release. -WITH_CLOUDWARE= - usage() { echo "Usage: $0 [-c release.conf]" exit 1 } -while getopts c: opt; do - case ${opt} in - c) - RELEASECONF="${OPTARG}" - if [ ! -e "${RELEASECONF}" ]; then - echo "ERROR: Configuration file ${RELEASECONF} does not exist." - exit 1 - fi - # Source the specified configuration file for overrides - . ${RELEASECONF} - ;; - \?) - usage - ;; - esac -done -shift $(($OPTIND - 1)) +# env_setup(): Set up the default build environment variables, such as the +# CHROOTDIR, VCSCMD, SVNROOT, etc. This is called before the release.conf +# file is sourced, if '-c ' is specified. +env_setup() { + # The directory within which the release will be built. + CHROOTDIR="/scratch" + RELENGDIR="$(dirname $(realpath ${0}))" -# Fix for backwards-compatibility with release.conf that does not have the -# trailing '/'. -case ${SVNROOT} in - *svn*) - SVNROOT="${SVNROOT}/" - ;; - *) - ;; -esac + # The default version control system command to obtain the sources. + for _dir in /usr/bin /usr/local/bin; do + for _svn in svn svnlite; do + [ -x "${_dir}/${_svn}" ] && VCSCMD="${_dir}/${_svn}" + [ ! -z "${VCSCMD}" ] && break 2 + done + done + VCSCMD="${VCSCMD} checkout" -# Prefix the branches with the SVNROOT for the full checkout URL. -SRCBRANCH="${SVNROOT}${SRCBRANCH}" -DOCBRANCH="${SVNROOT}${DOCBRANCH}" -PORTBRANCH="${SVNROOT}${PORTBRANCH}" + # The default svn checkout server, and svn branches for src/, doc/, + # and ports/. + SVNROOT="svn://svn.FreeBSD.org/" + SRCBRANCH="base/head@rHEAD" + DOCBRANCH="doc/head@rHEAD" + PORTBRANCH="ports/head@rHEAD" -if [ -n "${EMBEDDEDBUILD}" ]; then + # Set for embedded device builds. + EMBEDDEDBUILD= + + # Sometimes one needs to checkout src with --force svn option. + # If custom kernel configs copied to src tree before checkout, e.g. + SRC_FORCE_CHECKOUT= + + # The default make.conf and src.conf to use. Set to /dev/null + # by default to avoid polluting the chroot(8) environment with + # non-default settings. + MAKE_CONF="/dev/null" + SRC_CONF="/dev/null" + + # The number of make(1) jobs, defaults to the number of CPUs available + # for buildworld, and half of number of CPUs available for buildkernel. + WORLD_FLAGS="-j$(sysctl -n hw.ncpu)" + KERNEL_FLAGS="-j$(( $(( $(sysctl -n hw.ncpu) + 1 )) / 2))" + + MAKE_FLAGS="-s" + + # The name of the kernel to build, defaults to GENERIC. + KERNEL="GENERIC" + + # Set to non-empty value to disable checkout of doc/ and/or ports/. + # Disabling ports/ checkout also forces NODOC to be set. + NODOC= + NOPORTS= + + # Set to non-empty value to build dvd1.iso as part of the release. WITH_DVD= WITH_COMPRESSED_IMAGES= - NODOC=yes -fi -# If PORTS is set and NODOC is unset, force NODOC=yes because the ports tree -# is required to build the documentation set. -if [ -n "${NOPORTS}" ] && [ -z "${NODOC}" ]; then - echo "*** NOTICE: Setting NODOC=1 since ports tree is required" - echo " and NOPORTS is set." - NODOC=yes -fi + # Set to non-empty value to build virtual machine images as part of + # the release. + WITH_VMIMAGES= + WITH_COMPRESSED_VMIMAGES= + XZ_THREADS=0 -# If NOPORTS and/or NODOC are unset, they must not pass to make as variables. -# The release makefile verifies definedness of NOPORTS/NODOC variables -# instead of their values. -DOCPORTS= -if [ -n "${NOPORTS}" ]; then - DOCPORTS="NOPORTS=yes " -fi -if [ -n "${NODOC}" ]; then - DOCPORTS="${DOCPORTS}NODOC=yes" -fi + # Set to non-empty value to build virtual machine images for various + # cloud providers as part of the release. + WITH_CLOUDWARE= -# The aggregated build-time flags based upon variables defined within -# this file, unless overridden by release.conf. In most cases, these -# will not need to be changed. -CONF_FILES="__MAKE_CONF=${MAKE_CONF} SRCCONF=${SRC_CONF}" -if [ -n "${TARGET}" ] && [ -n "${TARGET_ARCH}" ]; then - ARCH_FLAGS="TARGET=${TARGET} TARGET_ARCH=${TARGET_ARCH}" -else - ARCH_FLAGS= -fi -load_chroot_env -CHROOT_MAKEENV="${CHROOT_MAKEENV} MAKEOBJDIRPREFIX=${CHROOTDIR}/tmp/obj" -CHROOT_WMAKEFLAGS="${MAKE_FLAGS} ${WORLD_FLAGS} ${CONF_FILES}" -CHROOT_IMAKEFLAGS="${CONF_FILES}" -CHROOT_DMAKEFLAGS="${CONF_FILES}" -RELEASE_WMAKEFLAGS="${MAKE_FLAGS} ${WORLD_FLAGS} ${ARCH_FLAGS} ${CONF_FILES}" -RELEASE_KMAKEFLAGS="${MAKE_FLAGS} ${KERNEL_FLAGS} KERNCONF=\"${KERNEL}\" ${ARCH_FLAGS} ${CONF_FILES}" -RELEASE_RMAKEFLAGS="${ARCH_FLAGS} KERNCONF=\"${KERNEL}\" ${CONF_FILES} \ - ${DOCPORTS} WITH_DVD=${WITH_DVD} WITH_VMIMAGES=${WITH_VMIMAGES} \ - WITH_CLOUDWARE=${WITH_CLOUDWARE} XZ_THREADS=${XZ_THREADS}" + return 0 +} # env_setup() -# Force src checkout if configured -FORCE_SRC_KEY= -if [ -n "${SRC_FORCE_CHECKOUT}" ]; then - FORCE_SRC_KEY="--force" -fi +# env_check(): Perform sanity tests on the build environment, such as ensuring +# files/directories exist, as well as adding backwards-compatibility hacks if +# necessary. This is called unconditionally, and overrides the defaults set +# in env_setup() if '-c ' is specified. +env_check() { + chroot_build_release_cmd="chroot_build_release" + # Fix for backwards-compatibility with release.conf that does not have + # the trailing '/'. + case ${SVNROOT} in + *svn*) + SVNROOT="${SVNROOT}/" + ;; + *) + ;; + esac -if [ -z "${CHROOTDIR}" ]; then - echo "Please set CHROOTDIR." - exit 1 -fi + # Prefix the branches with the SVNROOT for the full checkout URL. + SRCBRANCH="${SVNROOT}${SRCBRANCH}" + DOCBRANCH="${SVNROOT}${DOCBRANCH}" + PORTBRANCH="${SVNROOT}${PORTBRANCH}" -if [ $(id -u) -ne 0 ]; then - echo "Needs to be run as root." - exit 1 -fi - -set -e # Everything must succeed - -mkdir -p ${CHROOTDIR}/usr - -if [ -z "${SRC_UPDATE_SKIP}" ]; then - ${VCSCMD} ${FORCE_SRC_KEY} ${SRCBRANCH} ${CHROOTDIR}/usr/src -fi -if [ -z "${NODOC}" ] && [ -z "${DOC_UPDATE_SKIP}" ]; then - ${VCSCMD} ${DOCBRANCH} ${CHROOTDIR}/usr/doc -fi -if [ -z "${NOPORTS}" ] && [ -z "${PORTS_UPDATE_SKIP}" ]; then - ${VCSCMD} ${PORTBRANCH} ${CHROOTDIR}/usr/ports -fi - -if [ -z "${CHROOTBUILD_SKIP}" ]; then - cd ${CHROOTDIR}/usr/src - env ${CHROOT_MAKEENV} make ${CHROOT_WMAKEFLAGS} buildworld - env ${CHROOT_MAKEENV} make ${CHROOT_IMAKEFLAGS} installworld \ - DESTDIR=${CHROOTDIR} - env ${CHROOT_MAKEENV} make ${CHROOT_DMAKEFLAGS} distribution \ - DESTDIR=${CHROOTDIR} -fi -mount -t devfs devfs ${CHROOTDIR}/dev -cp /etc/resolv.conf ${CHROOTDIR}/etc/resolv.conf -trap "umount ${CHROOTDIR}/dev" EXIT # Clean up devfs mount on exit - -# If MAKE_CONF and/or SRC_CONF are set and not character devices (/dev/null), -# copy them to the chroot. -if [ -e ${MAKE_CONF} ] && [ ! -c ${MAKE_CONF} ]; then - mkdir -p ${CHROOTDIR}/$(dirname ${MAKE_CONF}) - cp ${MAKE_CONF} ${CHROOTDIR}/${MAKE_CONF} -fi -if [ -e ${SRC_CONF} ] && [ ! -c ${SRC_CONF} ]; then - mkdir -p ${CHROOTDIR}/$(dirname ${SRC_CONF}) - cp ${SRC_CONF} ${CHROOTDIR}/${SRC_CONF} -fi - -# Embedded builds do not use the 'make release' target. -if [ -n "${EMBEDDEDBUILD}" ]; then - buildenv_setup - # If a crochet configuration file exists in *this* checkout of - # release/, copy it to the /tmp/external directory within the chroot. - # This allows building embedded releases without relying on updated - # scripts and/or configurations to exist in the branch being built. - load_target_env - if [ -e ${RELENGDIR}/tools/${XDEV}/crochet-${KERNEL}.conf ] && \ - [ -e ${RELENGDIR}/${XDEV}/release.sh ]; then - mkdir -p ${CHROOTDIR}/tmp/external/${XDEV}/ - cp ${RELENGDIR}/tools/${XDEV}/crochet-${KERNEL}.conf \ - ${CHROOTDIR}/tmp/external/${XDEV}/crochet-${KERNEL}.conf - /bin/sh ${RELENGDIR}/${XDEV}/release.sh + if [ -n "${EMBEDDEDBUILD}" ]; then + WITH_DVD= + WITH_COMPRESSED_IMAGES= + NODOC=yes + case ${EMBEDDED_TARGET}:${EMBEDDED_TARGET_ARCH} in + arm:armv6) + chroot_build_release_cmd="chroot_arm_armv6_build_release" + ;; + *) + esac fi - # If the script does not exist for this architecture, exit. - # This probably should be checked earlier, but allowing the rest - # of the build process to get this far will at least set up the - # chroot environment for testing. - exit 0 -else - # Not embedded. - continue -fi -if [ -d ${CHROOTDIR}/usr/ports ]; then + # If PORTS is set and NODOC is unset, force NODOC=yes because the ports + # tree is required to build the documentation set. + if [ -n "${NOPORTS}" ] && [ -z "${NODOC}" ]; then + echo "*** NOTICE: Setting NODOC=1 since ports tree is required" + echo " and NOPORTS is set." + NODOC=yes + fi + + # If NOPORTS and/or NODOC are unset, they must not pass to make as + # variables. The release makefile verifies definedness of the + # NOPORTS/NODOC variables instead of their values. + DOCPORTS= + if [ -n "${NOPORTS}" ]; then + DOCPORTS="NOPORTS=yes " + fi + if [ -n "${NODOC}" ]; then + DOCPORTS="${DOCPORTS}NODOC=yes" + fi + + # The aggregated build-time flags based upon variables defined within + # this file, unless overridden by release.conf. In most cases, these + # will not need to be changed. + CONF_FILES="__MAKE_CONF=${MAKE_CONF} SRCCONF=${SRC_CONF}" + if [ -n "${TARGET}" ] && [ -n "${TARGET_ARCH}" ]; then + ARCH_FLAGS="TARGET=${TARGET} TARGET_ARCH=${TARGET_ARCH}" + else + ARCH_FLAGS= + fi + # Force src checkout if configured + FORCE_SRC_KEY= + if [ -n "${SRC_FORCE_CHECKOUT}" ]; then + FORCE_SRC_KEY="--force" + fi + + if [ -z "${CHROOTDIR}" ]; then + echo "Please set CHROOTDIR." + exit 1 + fi + + if [ $(id -u) -ne 0 ]; then + echo "Needs to be run as root." + exit 1 + fi + + CHROOT_MAKEENV="${CHROOT_MAKEENV} \ + MAKEOBJDIRPREFIX=${CHROOTDIR}/tmp/obj" + CHROOT_WMAKEFLAGS="${MAKE_FLAGS} ${WORLD_FLAGS} ${CONF_FILES}" + CHROOT_IMAKEFLAGS="${CONF_FILES}" + CHROOT_DMAKEFLAGS="${CONF_FILES}" + RELEASE_WMAKEFLAGS="${MAKE_FLAGS} ${WORLD_FLAGS} ${ARCH_FLAGS} \ + ${CONF_FILES}" + RELEASE_KMAKEFLAGS="${MAKE_FLAGS} ${KERNEL_FLAGS} \ + KERNCONF=\"${KERNEL}\" ${ARCH_FLAGS} ${CONF_FILES}" + RELEASE_RMAKEFLAGS="${ARCH_FLAGS} \ + KERNCONF=\"${KERNEL}\" ${CONF_FILES} ${DOCPORTS} \ + WITH_DVD=${WITH_DVD} WITH_VMIMAGES=${WITH_VMIMAGES} \ + WITH_CLOUDWARE=${WITH_CLOUDWARE} XZ_THREADS=${XZ_THREADS}" + + return 0 +} # env_check() + +# chroot_setup(): Prepare the build chroot environment for the release build. +chroot_setup() { + load_chroot_env + mkdir -p ${CHROOTDIR}/usr + + if [ -z "${SRC_UPDATE_SKIP}" ]; then + ${VCSCMD} ${FORCE_SRC_KEY} ${SRCBRANCH} ${CHROOTDIR}/usr/src + fi + if [ -z "${NODOC}" ] && [ -z "${DOC_UPDATE_SKIP}" ]; then + ${VCSCMD} ${DOCBRANCH} ${CHROOTDIR}/usr/doc + fi + if [ -z "${NOPORTS}" ] && [ -z "${PORTS_UPDATE_SKIP}" ]; then + ${VCSCMD} ${PORTBRANCH} ${CHROOTDIR}/usr/ports + fi + + if [ -z "${CHROOTBUILD_SKIP}" ]; then + cd ${CHROOTDIR}/usr/src + env ${CHROOT_MAKEENV} make ${CHROOT_WMAKEFLAGS} buildworld + env ${CHROOT_MAKEENV} make ${CHROOT_IMAKEFLAGS} installworld \ + DESTDIR=${CHROOTDIR} + env ${CHROOT_MAKEENV} make ${CHROOT_DMAKEFLAGS} distribution \ + DESTDIR=${CHROOTDIR} + fi + + return 0 +} # chroot_setup() + +# extra_chroot_setup(): Prepare anything additional within the build +# necessary for the release build. +extra_chroot_setup() { + mkdir -p ${CHROOTDIR}/dev + mount -t devfs devfs ${CHROOTDIR}/dev + [ -e /etc/resolv.conf ] && cp /etc/resolv.conf \ + ${CHROOTDIR}/etc/resolv.conf # Run ldconfig(8) in the chroot directory so /var/run/ld-elf*.so.hints # is created. This is needed by ports-mgmt/pkg. - chroot ${CHROOTDIR} /etc/rc.d/ldconfig forcerestart + eval chroot ${CHROOTDIR} /etc/rc.d/ldconfig forcerestart - ## Trick the ports 'run-autotools-fixup' target to do the right thing. - _OSVERSION=$(sysctl -n kern.osreldate) - REVISION=$(chroot ${CHROOTDIR} make -C /usr/src/release -V REVISION) - BRANCH=$(chroot ${CHROOTDIR} make -C /usr/src/release -V BRANCH) - UNAME_r=${REVISION}-${BRANCH} - if [ -d ${CHROOTDIR}/usr/doc ] && [ -z "${NODOC}" ]; then - PBUILD_FLAGS="OSVERSION=${_OSVERSION} BATCH=yes" - PBUILD_FLAGS="${PBUILD_FLAGS} UNAME_r=${UNAME_r}" - PBUILD_FLAGS="${PBUILD_FLAGS} OSREL=${REVISION}" - chroot ${CHROOTDIR} make -C /usr/ports/textproc/docproj \ - ${PBUILD_FLAGS} OPTIONS_UNSET="FOP IGOR" \ - install clean distclean + # If MAKE_CONF and/or SRC_CONF are set and not character devices + # (/dev/null), copy them to the chroot. + if [ -e ${MAKE_CONF} ] && [ ! -c ${MAKE_CONF} ]; then + mkdir -p ${CHROOTDIR}/$(dirname ${MAKE_CONF}) + cp ${MAKE_CONF} ${CHROOTDIR}/${MAKE_CONF} + fi + if [ -e ${SRC_CONF} ] && [ ! -c ${SRC_CONF} ]; then + mkdir -p ${CHROOTDIR}/$(dirname ${SRC_CONF}) + cp ${SRC_CONF} ${CHROOTDIR}/${SRC_CONF} fi -fi -buildenv_setup -load_target_env -eval chroot ${CHROOTDIR} make -C /usr/src ${RELEASE_WMAKEFLAGS} buildworld -eval chroot ${CHROOTDIR} make -C /usr/src ${RELEASE_KMAKEFLAGS} buildkernel -eval chroot ${CHROOTDIR} make -C /usr/src/release ${RELEASE_RMAKEFLAGS} \ - release -eval chroot ${CHROOTDIR} make -C /usr/src/release ${RELEASE_RMAKEFLAGS} \ - install DESTDIR=/R WITH_COMPRESSED_IMAGES=${WITH_COMPRESSED_IMAGES} \ - WITH_COMPRESSED_VMIMAGES=${WITH_COMPRESSED_VMIMAGES} + if [ -d ${CHROOTDIR}/usr/ports ]; then + # Trick the ports 'run-autotools-fixup' target to do the right + # thing. + _OSVERSION=$(chroot ${CHROOTDIR} /usr/bin/uname -U) + REVISION=$(chroot ${CHROOTDIR} make -C /usr/src/release -V REVISION) + BRANCH=$(chroot ${CHROOTDIR} make -C /usr/src/release -V BRANCH) + UNAME_r=${REVISION}-${BRANCH} + if [ -d ${CHROOTDIR}/usr/doc ] && [ -z "${NODOC}" ]; then + PBUILD_FLAGS="OSVERSION=${_OSVERSION} BATCH=yes" + PBUILD_FLAGS="${PBUILD_FLAGS} UNAME_r=${UNAME_r}" + PBUILD_FLAGS="${PBUILD_FLAGS} OSREL=${REVISION}" + chroot ${CHROOTDIR} make -C /usr/ports/textproc/docproj \ + ${PBUILD_FLAGS} OPTIONS_UNSET="FOP IGOR" \ + install clean distclean + fi + fi + + if [ ! -z "${EMBEDDEDPORTS}" ]; then + for _PORT in ${EMBEDDEDPORTS}; do + eval chroot ${CHROOTDIR} make -C /usr/ports/${_PORT} \ + BATCH=1 FORCE_PKG_REGISTER=1 install clean distclean + done + fi + + buildenv_setup + + return 0 +} # extra_chroot_setup() + +# chroot_build_target(): Build the userland and kernel for the build target. +chroot_build_target() { + load_target_env + if [ ! -z "${EMBEDDEDBUILD}" ]; then + RELEASE_WMAKEFLAGS="${RELEASE_WMAKEFLAGS} \ + TARGET=${EMBEDDED_TARGET} \ + TARGET_ARCH=${EMBEDDED_TARGET_ARCH}" + RELEASE_KMAKEFLAGS="${RELEASE_KMAKEFLAGS} \ + TARGET=${EMBEDDED_TARGET} \ + TARGET_ARCH=${EMBEDDED_TARGET_ARCH}" + fi + eval chroot ${CHROOTDIR} make -C /usr/src ${RELEASE_WMAKEFLAGS} buildworld + eval chroot ${CHROOTDIR} make -C /usr/src ${RELEASE_KMAKEFLAGS} buildkernel + + return 0 +} # chroot_build_target + +# chroot_build_release(): Invoke the 'make release' target. +chroot_build_release() { + load_target_env + eval chroot ${CHROOTDIR} make -C /usr/src/release \ + ${RELEASE_RMAKEFLAGS} release + eval chroot ${CHROOTDIR} make -C /usr/src/release \ + ${RELEASE_RMAKEFLAGS} install DESTDIR=/R \ + WITH_COMPRESSED_IMAGES=${WITH_COMPRESSED_IMAGES} \ + WITH_COMPRESSED_VMIMAGES=${WITH_COMPRESSED_VMIMAGES} + + return 0 +} # chroot_build_release() + +# chroot_arm_armv6_build_release(): Create arm/armv6 SD card image. +chroot_arm_armv6_build_release() { + load_target_env + eval chroot ${CHROOTDIR} make -C /usr/src/release obj + if [ -e "${RELENGDIR}/tools/${EMBEDDED_TARGET}.subr" ]; then + . "${RELENGDIR}/tools/${EMBEDDED_TARGET}.subr" + fi + [ ! -z "${RELEASECONF}" ] && . "${RELEASECONF}" + WORLDDIR="$(eval chroot ${CHROOTDIR} make -C /usr/src/release -V WORLDDIR)" + OBJDIR="$(eval chroot ${CHROOTDIR} make -C /usr/src/release -V .OBJDIR)" + DESTDIR="${OBJDIR}/${KERNEL}" + IMGBASE="${CHROOTDIR}/${OBJDIR}/${KERNEL}.img" + OSRELEASE="$(eval chroot ${CHROOTDIR} make -C /usr/src/release \ + TARGET=${EMBEDDED_TARGET} TARGET_ARCH=${EMBEDDED_TARGET_ARCH} \ + -V OSRELEASE)" + chroot ${CHROOTDIR} mkdir -p ${DESTDIR} + chroot ${CHROOTDIR} truncate -s ${IMAGE_SIZE} ${IMGBASE##${CHROOTDIR}} + export mddev=$(chroot ${CHROOTDIR} \ + mdconfig -f ${IMGBASE##${CHROOTDIR}} ${MD_ARGS}) + arm_create_disk + arm_install_base + arm_install_uboot + mdconfig -d -u ${mddev} + chroot ${CHROOTDIR} rmdir ${DESTDIR} + mv ${IMGBASE} ${CHROOTDIR}/${OBJDIR}/${OSRELEASE}-${KERNEL}.img + chroot ${CHROOTDIR} mkdir -p /R + chroot ${CHROOTDIR} cp -p ${OBJDIR}/${OSRELEASE}-${KERNEL}.img \ + /R/${OSRELEASE}-${KERNEL}.img + chroot ${CHROOTDIR} xz -T ${XZ_THREADS} /R/${OSRELEASE}-${KERNEL}.img + cd ${CHROOTDIR}/R && sha256 ${OSRELEASE}* \ + > CHECKSUM.SHA256 + cd ${CHROOTDIR}/R && md5 ${OSRELEASE}* \ + > CHECKSUM.MD5 + + return 0 +} # chroot_arm_armv6_build_release() + +# main(): Start here. +main() { + set -e # Everything must succeed + env_setup + while getopts c: opt; do + case ${opt} in + c) + RELEASECONF="${OPTARG}" + ;; + \?) + usage + ;; + esac + done + shift $(($OPTIND - 1)) + if [ ! -z "${RELEASECONF}" ]; then + if [ -e "${RELEASECONF}" ]; then + . ${RELEASECONF} + else + echo "Nonexistent configuration file: ${RELEASECONF}" + echo "Using default build environment." + fi + fi + env_check + trap "umount ${CHROOTDIR}/dev" EXIT # Clean up devfs mount on exit + chroot_setup + extra_chroot_setup + chroot_build_target + ${chroot_build_release_cmd} + + return 0 +} # main() + +main "${@}" diff --git a/release/tools/arm.subr b/release/tools/arm.subr new file mode 100644 index 000000000000..5cc61e3708b0 --- /dev/null +++ b/release/tools/arm.subr @@ -0,0 +1,137 @@ +#!/bin/sh +#- +# Copyright (c) 2015 The FreeBSD Foundation +# All rights reserved. +# +# Portions of this software were developed by Glen Barber +# under sponsorship from the FreeBSD Foundation. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +# SUCH DAMAGE. +# +# Common subroutines used to build arm/armv6 images. +# +# $FreeBSD$ +# + +cleanup() { + if [ -c "${DESTDIR}/dev/null" ]; then + umount_loop ${DESTDIR}/dev 2>/dev/null + fi + umount_loop ${DESTDIR} + if [ ! -z "${mddev}" ]; then + mdconfig -d -u ${mddev} + fi + + return 0 +} + +umount_loop() { + DIR=$1 + i=0 + sync + while ! umount ${DIR}; do + i=$(( $i + 1 )) + if [ $i -ge 10 ]; then + # This should never happen. But, it has happened. + echo "Cannot umount(8) ${DIR}" + echo "Something has gone horribly wrong." + return 1 + fi + sleep 1 + done + + return 0 +} + +arm_create_disk() { + # Create the target raw file and temporary work directory. + chroot ${CHROOTDIR} gpart create -s ${PART_SCHEME} ${mddev} + chroot ${CHROOTDIR} gpart add -t '!12' -a 63 -s ${FAT_SIZE} ${mddev} + chroot ${CHROOTDIR} gpart set -a active -i 1 ${mddev} + chroot ${CHROOTDIR} newfs_msdos -L msdosboot -F ${FAT_TYPE} /dev/${mddev}s1 + chroot ${CHROOTDIR} gpart add -t freebsd ${mddev} + chroot ${CHROOTDIR} gpart create -s bsd ${mddev}s2 + chroot ${CHROOTDIR} gpart add -t freebsd-ufs -a 64k /dev/${mddev}s2 + chroot ${CHROOTDIR} newfs -U -L rootfs /dev/${mddev}s2a + chroot ${CHROOTDIR} tunefs -j enable -N enable /dev/${mddev}s2a + + return 0 +} + +arm_create_user() { + # Create a default user account 'freebsd' with the password 'freebsd', + # and set the default password for the 'root' user to 'root'. + chroot ${CHROOTDIR} /usr/sbin/pw groupadd freebsd -g 1001 + chroot ${CHROOTDIR} /usr/sbin/pw useradd freebsd \ + -m -M 0755 -w yes -n freebsd -u 1001 -g 1001 -G 0 \ + -c 'FreeBSD User' -d '/home/freebsd' -s '/bin/csh' + chroot ${CHROOTDIR} /usr/sbin/pw usermod root -w yes + + return 0 +} + +arm_install_base() { + chroot ${CHROOTDIR} mount /dev/${mddev}s2a ${DESTDIR} + eval chroot ${CHROOTDIR} make -C ${WORLDDIR} \ + TARGET=${EMBEDDED_TARGET} \ + TARGET_ARCH=${EMBEDDED_TARGET_ARCH} \ + DESTDIR=${DESTDIR} KERNCONF=${KERNEL} \ + installworld installkernel distribution + chroot ${CHROOTDIR} mkdir -p ${DESTDIR}/boot/msdos + + arm_create_user + + echo '# Custom /etc/fstab for FreeBSD embedded images' \ + > ${CHROOTDIR}/${DESTDIR}/etc/fstab + echo "/dev/ufs/rootfs / ufs rw 1 1" \ + >> ${CHROOTDIR}/${DESTDIR}/etc/fstab + echo "/dev/msdosfs/MSDOSBOOT /boot/msdos msdosfs rw,noatime 0 0" \ + >> ${CHROOTDIR}/${DESTDIR}/etc/fstab + echo "md /tmp mfs rw,noatime,-s30m 0 0" \ + >> ${CHROOTDIR}/${DESTDIR}/etc/fstab + echo "md /var/log mfs rw,noatime,-s15m 0 0" \ + >> ${CHROOTDIR}/${DESTDIR}/etc/fstab + echo "md /var/tmp mfs rw,noatime,-s12m 0 0" \ + >> ${CHROOTDIR}/${DESTDIR}/etc/fstab + + local hostname + hostname="$(echo ${KERNEL} | tr '[:upper:]' '[:lower:]')" + echo "hostname=\"${hostname}\"" > ${CHROOTDIR}/${DESTDIR}/etc/rc.conf + echo 'ifconfig_DEFAULT="DHCP"' >> ${CHROOTDIR}/${DESTDIR}/etc/rc.conf + echo 'sshd_enable="YES"' >> ${CHROOTDIR}/${DESTDIR}/etc/rc.conf + echo 'sendmail_enable="NONE"' >> ${CHROOTDIR}/${DESTDIR}/etc/rc.conf + echo 'sendmail_submit_enable="NO"' >> ${CHROOTDIR}/${DESTDIR}/etc/rc.conf + echo 'sendmail_outbound_enable="NO"' >> ${CHROOTDIR}/${DESTDIR}/etc/rc.conf + echo 'sendmail_msp_queue_enable="NO"' >> ${CHROOTDIR}/${DESTDIR}/etc/rc.conf + echo 'growfs_enable="YES"' >> ${CHROOTDIR}/${DESTDIR}/etc/rc.conf + + sync + umount_loop ${CHROOTDIR}/${DESTDIR} + + return 0 +} + +arm_install_uboot() { + # Override in the arm/KERNEL.conf file. + + return 0 +} diff --git a/release/tools/arm/crochet-BEAGLEBONE.conf b/release/tools/arm/crochet-BEAGLEBONE.conf deleted file mode 100644 index 7a32542ed0f9..000000000000 --- a/release/tools/arm/crochet-BEAGLEBONE.conf +++ /dev/null @@ -1,40 +0,0 @@ -# -# $FreeBSD$ -# - -# This is the configuration file for use with crochet to produce -# FreeBSD BeagleBone images. - -board_setup BeagleBone -option ImageSize 1gb -option Growfs - -export MAKEOBJDIRPREFIX=/usr/obj -FREEBSD_SRC=/usr/src -__MAKE_CONF=/dev/null -SRCCONF=/dev/null -WORKDIR=/usr/obj -_BRANCH=$(make -C ${FREEBSD_SRC}/release -V BRANCH) -_REVISION=$(make -C ${FREEBSD_SRC}/release -V REVISION) -KERNCONF=BEAGLEBONE -TARGET=arm -TARGET_ARCH=armv6 -FREEBSD_BUILDWORLD_EXTRA_ARGS="${WORLD_FLAGS}" -FREEBSD_BUILDKERNEL_EXTRA_ARGS="${KERNEL_FLAGS}" -FREEBSD_INSTALLWORLD_EXTRA_ARGS="" -FREEBSD_INSTALLKERNEL_EXTRA_ARGS="" -FREEBSD_WORLD_EXTRA_ARGS="" -FREEBSD_KERNEL_EXTRA_ARGS="" -FREEBSD_EXTRA_ARGS="" -IMG=${WORKDIR}/FreeBSD-${_REVISION}-${_BRANCH}-${TARGET}-${TARGET_ARCH}-${KERNCONF}.img -BEAGLEBONE_UBOOT=/tmp/external/u-boot-beaglebone - -beaglebone_check_uboot() { - mkdir -p "${BEAGLEBONE_UBOOT}" - ln -fs /usr/local/share/u-boot/u-boot-beaglebone/MLO \ - ${BEAGLEBONE_UBOOT}/MLO - ln -fs /usr/local/share/u-boot/u-boot-beaglebone/u-boot.img \ - ${BEAGLEBONE_UBOOT}/bb-uboot.img - ln -fs ${BOARDDIR}/files/uEnv.txt \ - ${BEAGLEBONE_UBOOT}/bb-uenv.txt -} diff --git a/release/tools/arm/crochet-PANDABOARD.conf b/release/tools/arm/crochet-PANDABOARD.conf deleted file mode 100644 index 366c4ccb5002..000000000000 --- a/release/tools/arm/crochet-PANDABOARD.conf +++ /dev/null @@ -1,29 +0,0 @@ -# -# $FreeBSD$ -# - -# This is the configuration file for use with crochet to produce -# FreeBSD PandaBoard images. - -board_setup PandaBoard -option ImageSize 1gb -option Growfs - -export MAKEOBJDIRPREFIX=/usr/obj -FREEBSD_SRC=/usr/src -__MAKE_CONF=/dev/null -SRCCONF=/dev/null -WORKDIR=/usr/obj -_BRANCH=$(make -C ${FREEBSD_SRC}/release -V BRANCH) -_REVISION=$(make -C ${FREEBSD_SRC}/release -V REVISION) -KERNCONF=PANDABOARD -TARGET=arm -TARGET_ARCH=armv6 -FREEBSD_BUILDWORLD_EXTRA_ARGS="${WORLD_FLAGS}" -FREEBSD_BUILDKERNEL_EXTRA_ARGS="${KERNEL_FLAGS}" -FREEBSD_INSTALLWORLD_EXTRA_ARGS="" -FREEBSD_INSTALLKERNEL_EXTRA_ARGS="" -FREEBSD_WORLD_EXTRA_ARGS="" -FREEBSD_KERNEL_EXTRA_ARGS="" -FREEBSD_EXTRA_ARGS="" -IMG=${WORKDIR}/FreeBSD-${_REVISION}-${_BRANCH}-${TARGET}-${TARGET_ARCH}-${KERNCONF}.img diff --git a/release/tools/arm/crochet-RPI-B.conf b/release/tools/arm/crochet-RPI-B.conf deleted file mode 100644 index 352048faa2b7..000000000000 --- a/release/tools/arm/crochet-RPI-B.conf +++ /dev/null @@ -1,29 +0,0 @@ -# -# $FreeBSD$ -# - -# This is the configuration file for use with crochet to produce -# FreeBSD Raspberry Pi images. - -board_setup RaspberryPi -option ImageSize 1gb -option Growfs - -export MAKEOBJDIRPREFIX=/usr/obj -FREEBSD_SRC=/usr/src -__MAKE_CONF=/dev/null -SRCCONF=/dev/null -WORKDIR=/usr/obj -_BRANCH=$(make -C ${FREEBSD_SRC}/release -V BRANCH) -_REVISION=$(make -C ${FREEBSD_SRC}/release -V REVISION) -KERNCONF=RPI-B -TARGET=arm -TARGET_ARCH=armv6 -FREEBSD_BUILDWORLD_EXTRA_ARGS="${WORLD_FLAGS}" -FREEBSD_BUILDKERNEL_EXTRA_ARGS="${KERNEL_FLAGS}" -FREEBSD_INSTALLWORLD_EXTRA_ARGS="" -FREEBSD_INSTALLKERNEL_EXTRA_ARGS="" -FREEBSD_WORLD_EXTRA_ARGS="" -FREEBSD_KERNEL_EXTRA_ARGS="" -FREEBSD_EXTRA_ARGS="" -IMG=${WORKDIR}/FreeBSD-${_REVISION}-${_BRANCH}-${TARGET}-${TARGET_ARCH}-${KERNCONF}.img diff --git a/release/tools/arm/crochet-RPI2.conf b/release/tools/arm/crochet-RPI2.conf deleted file mode 100644 index 7ecab4ca5b44..000000000000 --- a/release/tools/arm/crochet-RPI2.conf +++ /dev/null @@ -1,29 +0,0 @@ -# -# $FreeBSD$ -# - -# This is the configuration file for use with crochet to produce -# FreeBSD Raspberry Pi 2 images. - -board_setup RaspberryPi2 -option ImageSize 1gb -option Growfs - -export MAKEOBJDIRPREFIX=/usr/obj -FREEBSD_SRC=/usr/src -__MAKE_CONF=/dev/null -SRCCONF=/dev/null -WORKDIR=/usr/obj -_BRANCH=$(make -C ${FREEBSD_SRC}/release -V BRANCH) -_REVISION=$(make -C ${FREEBSD_SRC}/release -V REVISION) -KERNCONF=RPI2 -TARGET=arm -TARGET_ARCH=armv6 -FREEBSD_BUILDWORLD_EXTRA_ARGS="${WORLD_FLAGS}" -FREEBSD_BUILDKERNEL_EXTRA_ARGS="${KERNEL_FLAGS}" -FREEBSD_INSTALLWORLD_EXTRA_ARGS="" -FREEBSD_INSTALLKERNEL_EXTRA_ARGS="" -FREEBSD_WORLD_EXTRA_ARGS="" -FREEBSD_KERNEL_EXTRA_ARGS="" -FREEBSD_EXTRA_ARGS="" -IMG=${WORKDIR}/FreeBSD-${_REVISION}-${_BRANCH}-${TARGET}-${TARGET_ARCH}-${KERNCONF}.img diff --git a/release/tools/arm/crochet-WANDBOARD-QUAD.conf b/release/tools/arm/crochet-WANDBOARD-QUAD.conf deleted file mode 100644 index d1e0062c869b..000000000000 --- a/release/tools/arm/crochet-WANDBOARD-QUAD.conf +++ /dev/null @@ -1,29 +0,0 @@ -# -# $FreeBSD$ -# - -# This is the configuration file for use with crochet to produce -# FreeBSD WandboardQuad images. - -board_setup Wandboard -option ImageSize 1gb -option Growfs - -export MAKEOBJDIRPREFIX=/usr/obj -FREEBSD_SRC=/usr/src -__MAKE_CONF=/dev/null -SRCCONF=/dev/null -WORKDIR=/usr/obj -_BRANCH=$(make -C ${FREEBSD_SRC}/release -V BRANCH) -_REVISION=$(make -C ${FREEBSD_SRC}/release -V REVISION) -KERNCONF=WANDBOARD-QUAD -TARGET=arm -TARGET_ARCH=armv6 -FREEBSD_BUILDWORLD_EXTRA_ARGS="${WORLD_FLAGS}" -FREEBSD_BUILDKERNEL_EXTRA_ARGS="${KERNEL_FLAGS}" -FREEBSD_INSTALLWORLD_EXTRA_ARGS="" -FREEBSD_INSTALLKERNEL_EXTRA_ARGS="" -FREEBSD_WORLD_EXTRA_ARGS="" -FREEBSD_KERNEL_EXTRA_ARGS="" -FREEBSD_EXTRA_ARGS="" -IMG=${WORKDIR}/FreeBSD-${_REVISION}-${_BRANCH}-${TARGET}-${TARGET_ARCH}-${KERNCONF}.img diff --git a/release/tools/arm/crochet-ZEDBOARD.conf b/release/tools/arm/crochet-ZEDBOARD.conf deleted file mode 100644 index 8353038302d7..000000000000 --- a/release/tools/arm/crochet-ZEDBOARD.conf +++ /dev/null @@ -1,29 +0,0 @@ -# -# $FreeBSD$ -# - -# This is the configuration file for use with crochet to produce -# FreeBSD ZedBoard images. - -board_setup ZedBoard -option ImageSize 1gb -option Growfs - -export MAKEOBJDIRPREFIX=/usr/obj -FREEBSD_SRC=/usr/src -__MAKE_CONF=/dev/null -SRCCONF=/dev/null -WORKDIR=/usr/obj -_BRANCH=$(make -C ${FREEBSD_SRC}/release -V BRANCH) -_REVISION=$(make -C ${FREEBSD_SRC}/release -V REVISION) -KERNCONF=ZEDBOARD -TARGET=arm -TARGET_ARCH=armv6 -FREEBSD_BUILDWORLD_EXTRA_ARGS="${WORLD_FLAGS}" -FREEBSD_BUILDKERNEL_EXTRA_ARGS="${KERNEL_FLAGS}" -FREEBSD_INSTALLWORLD_EXTRA_ARGS="" -FREEBSD_INSTALLKERNEL_EXTRA_ARGS="" -FREEBSD_WORLD_EXTRA_ARGS="" -FREEBSD_KERNEL_EXTRA_ARGS="" -FREEBSD_EXTRA_ARGS="" -IMG=${WORKDIR}/FreeBSD-${_REVISION}-${_BRANCH}-${TARGET}-${TARGET_ARCH}-${KERNCONF}.img diff --git a/release/tools/vmimage.subr b/release/tools/vmimage.subr index d4cfc2d19e8b..262e245b7040 100644 --- a/release/tools/vmimage.subr +++ b/release/tools/vmimage.subr @@ -23,20 +23,21 @@ write_partition_layout() { case "${TARGET}:${TARGET_ARCH}" in amd64:amd64 | i386:i386) - mkimg -s gpt -b ${BOOTFILES}/i386/pmbr/pmbr \ + mkimg -s gpt -f ${VMFORMAT} \ + -b ${BOOTFILES}/i386/pmbr/pmbr \ -p freebsd-boot/bootfs:=${BOOTFILES}/i386/gptboot/gptboot \ ${SWAPOPT} \ -p freebsd-ufs/rootfs:=${VMBASE} \ -o ${VMIMAGE} ;; arm64:aarch64) - mkimg -s mbr \ + mkimg -s mbr -f ${VMFORMAT} \ -p efi:=${BOOTFILES}/efi/boot1/boot1.efifat \ -p freebsd:=${VMBASE} \ -o ${VMIMAGE} ;; powerpc:powerpc*) - mkimg -s apm \ + mkimg -s apm -f ${VMFORMAT} \ -p apple-boot/bootfs:=${BOOTFILES}/powerpc/boot1.chrp/boot1.hfs \ ${SWAPOPT} \ -p freebsd-ufs/rootfs:=${VMBASE} \ diff --git a/sbin/devd/devd.conf.5 b/sbin/devd/devd.conf.5 index 97492831eb49..3956a7389737 100644 --- a/sbin/devd/devd.conf.5 +++ b/sbin/devd/devd.conf.5 @@ -41,7 +41,7 @@ .\" ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS .\" SOFTWARE. .\" -.Dd January 14, 2015 +.Dd May 13, 2015 .Dt DEVD.CONF 5 .Os .Sh NAME @@ -270,6 +270,8 @@ Interface Class (USB) Interface Protocol (USB) .It Li intsubclass Interface Sub-class (USB) +.It Li jail +Jail name for the process triggering the rule (RCTL) .It Li manufacturer Manufacturer ID (pccard). .It Li mode @@ -280,12 +282,18 @@ Match the value of the variable. .It Li parent Parent device +.It Li pid +PID of the process triggering the rule (RCTL) .It Li port Hub port number (USB) .It Li product Product ID (pccard/USB). .It Li release Hardware revision (USB) +.It Li ruid +Real UID of the process triggering the rule (RCTL) +.It Li rule +Rule (RCTL) .It Li sernum Serial Number (USB). .It Li slot @@ -397,6 +405,20 @@ Physical media has changed. .El .El .Pp +.It Li RCTL +Events related to the +.Xr rctl 8 +framework. +.Bl -tag -width ".Sy Subsystem" -compact +.It Sy Subsystem +.It Li rule +.Bl -tag -width ".Li matched" -compact +.It Sy Type +.It Li matched +A rule with action specified as "devctl" was triggered. +.El +.El +.Pp .It Li USB Events related to the USB subsystem. .Bl -tag -width ".Sy Subsystem" -compact diff --git a/sbin/dhclient/dhclient.c b/sbin/dhclient/dhclient.c index 22b21f1da68c..79058133f7b2 100644 --- a/sbin/dhclient/dhclient.c +++ b/sbin/dhclient/dhclient.c @@ -1845,12 +1845,16 @@ rewrite_client_leases(void) leaseFile = fopen(path_dhclient_db, "w"); if (!leaseFile) error("can't create %s: %m", path_dhclient_db); - cap_rights_init(&rights, CAP_FSTAT, CAP_FSYNC, CAP_FTRUNCATE, - CAP_SEEK, CAP_WRITE); + cap_rights_init(&rights, CAP_FCNTL, CAP_FSTAT, CAP_FSYNC, + CAP_FTRUNCATE, CAP_SEEK, CAP_WRITE); if (cap_rights_limit(fileno(leaseFile), &rights) < 0 && errno != ENOSYS) { error("can't limit lease descriptor: %m"); } + if (cap_fcntls_limit(fileno(leaseFile), CAP_FCNTL_GETFL) < 0 && + errno != ENOSYS) { + error("can't limit lease descriptor fcntls: %m"); + } } else { fflush(leaseFile); rewind(leaseFile); diff --git a/sbin/dumpfs/dumpfs.c b/sbin/dumpfs/dumpfs.c index baf3d999f5ee..ce69ba184fe5 100644 --- a/sbin/dumpfs/dumpfs.c +++ b/sbin/dumpfs/dumpfs.c @@ -165,7 +165,7 @@ dumpfs(const char *name) fstime = afs.fs_time; printf("magic\t%x (UFS2)\ttime\t%s", afs.fs_magic, ctime(&fstime)); - printf("superblock location\t%jd\tid\t[ %x %x ]\n", + printf("superblock location\t%jd\tid\t[ %08x %08x ]\n", (intmax_t)afs.fs_sblockloc, afs.fs_id[0], afs.fs_id[1]); printf("ncg\t%d\tsize\t%jd\tblocks\t%jd\n", afs.fs_ncg, (intmax_t)fssize, (intmax_t)afs.fs_dsize); diff --git a/sbin/geom/class/mountver/geom_mountver.c b/sbin/geom/class/mountver/geom_mountver.c index a1ed95d6c879..bff69c545cda 100644 --- a/sbin/geom/class/mountver/geom_mountver.c +++ b/sbin/geom/class/mountver/geom_mountver.c @@ -43,14 +43,14 @@ struct g_command class_commands[] = { { G_OPT_SENTINEL }, - "[-v] dev ..." + "[-v] prov ..." }, { "destroy", G_FLAG_VERBOSE, NULL, { { 'f', "force", NULL, G_TYPE_BOOL }, G_OPT_SENTINEL }, - "[-fv] prov ..." + "[-fv] name" }, G_CMD_SENTINEL }; diff --git a/sbin/geom/class/mountver/gmountver.8 b/sbin/geom/class/mountver/gmountver.8 index 44736d5d90e4..4c27a652b0b0 100644 --- a/sbin/geom/class/mountver/gmountver.8 +++ b/sbin/geom/class/mountver/gmountver.8 @@ -25,7 +25,7 @@ .\" .\" $FreeBSD$ .\" -.Dd January 27, 2015 +.Dd May 18, 2015 .Dt GMOUNTVER 8 .Os .Sh NAME @@ -35,11 +35,11 @@ .Nm .Cm create .Op Fl v -.Ar dev ... +.Ar prov ... .Nm .Cm destroy .Op Fl fv -.Ar prov ... +.Ar name .Nm .Cm list .Nm @@ -66,8 +66,11 @@ The first argument to indicates an action to be performed: .Bl -tag -width ".Cm destroy" .It Cm create -Cache the given devices with specified -.Ar name . +Enable mount verification for the given provider. +If the operation succeeds, a new GEOM provider will be created using the +given provider's name with a +.Ql .mountver +suffix. The kernel module .Pa geom_mountver.ko will be loaded if it is not loaded already. diff --git a/sbin/ifconfig/af_inet.c b/sbin/ifconfig/af_inet.c index 3c3a75742e10..eff1ce5958b9 100644 --- a/sbin/ifconfig/af_inet.c +++ b/sbin/ifconfig/af_inet.c @@ -32,7 +32,7 @@ static const char rcsid[] = "$FreeBSD$"; #endif /* not lint */ -#include +#include #include #include #include @@ -100,7 +100,6 @@ static struct sockaddr_in *sintab[] = { static void in_getaddr(const char *s, int which) { -#define MIN(a,b) ((a)<(b)?(a):(b)) struct sockaddr_in *sin = sintab[which]; struct hostent *hp; struct netent *np; @@ -141,7 +140,6 @@ in_getaddr(const char *s, int which) sin->sin_addr = inet_makeaddr(np->n_net, INADDR_ANY); else errx(1, "%s: bad value", s); -#undef MIN } static void diff --git a/sbin/ifconfig/af_inet6.c b/sbin/ifconfig/af_inet6.c index 8a18401e7e79..6dd86222cae5 100644 --- a/sbin/ifconfig/af_inet6.c +++ b/sbin/ifconfig/af_inet6.c @@ -486,8 +486,6 @@ static struct cmd inet6_cmds[] = { DEF_CMD("-no_prefer_iface",-ND6_IFF_NO_PREFER_IFACE,setnd6flags), DEF_CMD("no_dad", ND6_IFF_NO_DAD, setnd6flags), DEF_CMD("-no_dad", -ND6_IFF_NO_DAD, setnd6flags), - DEF_CMD("ignoreloop", ND6_IFF_IGNORELOOP, setnd6flags), - DEF_CMD("-ignoreloop", -ND6_IFF_IGNORELOOP, setnd6flags), DEF_CMD_ARG("pltime", setip6pltime), DEF_CMD_ARG("vltime", setip6vltime), DEF_CMD("eui64", 0, setip6eui64), diff --git a/sbin/ifconfig/ifconfig.8 b/sbin/ifconfig/ifconfig.8 index 1e4870dada12..56b5c1483f54 100644 --- a/sbin/ifconfig/ifconfig.8 +++ b/sbin/ifconfig/ifconfig.8 @@ -28,7 +28,7 @@ .\" From: @(#)ifconfig.8 8.3 (Berkeley) 1/5/94 .\" $FreeBSD$ .\" -.Dd March 6, 2015 +.Dd May 15, 2015 .Dt IFCONFIG 8 .Os .Sh NAME @@ -316,6 +316,14 @@ using the kernel configuration option, or the .Va net.fibs tunable. +.It Cm tunnelfib Ar fib_number +Specify tunnel FIB. +A FIB +.Ar fib_number +is assigned to all packets encapsulated by tunnel interface, e.g., +.Xr gif 4 +and +.Xr gre 4 . .It Cm maclabel Ar label If Mandatory Access Control support is enabled in the kernel, set the MAC label to @@ -692,15 +700,6 @@ Set a flag to disable Duplicate Address Detection. .It Cm -no_dad Clear a flag .Cm no_dad . -.It Cm ignoreloop -Set a flag to disable loopback detection in Enhanced Duplicate Address -Detection Algorithm. -When this flag is set, -Duplicate Address Detection will stop in a finite number of probings -even if a loopback configuration is detected. -.It Cm -ignoreloop -Clear a flag -.Cm ignoreloop . .El .Pp The following parameters are specific for IPv6 addresses. @@ -2429,6 +2428,14 @@ This is for backward compatibility with .It Cm -accept_rev_ethip_ver Clear a flag .Cm accept_rev_ethip_ver . +.It Cm ignore_source +Set a flag to accept encapsulated packets destined to this host +independently from source address. +This may be useful for hosts, that receive encapsulated packets +from the load balancers. +.It Cm -ignore_source +Clear a flag +.Cm ignore_source . .It Cm send_rev_ethip_ver Set a flag to send EtherIP packets with reversed version field intentionally. diff --git a/sbin/ifconfig/iffib.c b/sbin/ifconfig/iffib.c index f3498b42e486..07ded3cbb24f 100644 --- a/sbin/ifconfig/iffib.c +++ b/sbin/ifconfig/iffib.c @@ -50,15 +50,15 @@ fib_status(int s) memset(&ifr, 0, sizeof(ifr)); strncpy(ifr.ifr_name, name, sizeof(ifr.ifr_name)); + if (ioctl(s, SIOCGIFFIB, (caddr_t)&ifr) == 0 && + ifr.ifr_fib != RT_DEFAULT_FIB) + printf("\tfib: %u\n", ifr.ifr_fib); - if (ioctl(s, SIOCGIFFIB, (caddr_t)&ifr) < 0) - return; - - /* Ignore if it is the default. */ - if (ifr.ifr_fib == 0) - return; - - printf("\tfib: %u\n", ifr.ifr_fib); + memset(&ifr, 0, sizeof(ifr)); + strncpy(ifr.ifr_name, name, sizeof(ifr.ifr_name)); + if (ioctl(s, SIOCGTUNFIB, (caddr_t)&ifr) == 0 && + ifr.ifr_fib != RT_DEFAULT_FIB) + printf("\ttunnelfib: %u\n", ifr.ifr_fib); } static void @@ -80,8 +80,28 @@ setiffib(const char *val, int dummy __unused, int s, warn("ioctl (SIOCSIFFIB)"); } +static void +settunfib(const char *val, int dummy __unused, int s, + const struct afswtch *afp) +{ + unsigned long fib; + char *ep; + + fib = strtoul(val, &ep, 0); + if (*ep != '\0' || fib > UINT_MAX) { + warn("fib %s not valid", val); + return; + } + + strncpy(ifr.ifr_name, name, sizeof (ifr.ifr_name)); + ifr.ifr_fib = fib; + if (ioctl(s, SIOCSTUNFIB, (caddr_t)&ifr) < 0) + warn("ioctl (SIOCSTUNFIB)"); +} + static struct cmd fib_cmds[] = { DEF_CMD_ARG("fib", setiffib), + DEF_CMD_ARG("tunnelfib", settunfib), }; static struct afswtch af_fib = { diff --git a/sbin/ifconfig/ifgif.c b/sbin/ifconfig/ifgif.c index f91508b53c71..91c433c9aecc 100644 --- a/sbin/ifconfig/ifgif.c +++ b/sbin/ifconfig/ifgif.c @@ -51,7 +51,7 @@ static const char rcsid[] = #include "ifconfig.h" -#define GIFBITS "\020\1ACCEPT_REV_ETHIP_VER\5SEND_REV_ETHIP_VER" +#define GIFBITS "\020\1ACCEPT_REV_ETHIP_VER\2IGNORE_SOURCE\5SEND_REV_ETHIP_VER" static void gif_status(int); @@ -95,6 +95,8 @@ setgifopts(const char *val, static struct cmd gif_cmds[] = { DEF_CMD("accept_rev_ethip_ver", GIF_ACCEPT_REVETHIP, setgifopts), DEF_CMD("-accept_rev_ethip_ver",-GIF_ACCEPT_REVETHIP, setgifopts), + DEF_CMD("ignore_source", GIF_IGNORE_SOURCE, setgifopts), + DEF_CMD("-ignore_source", -GIF_IGNORE_SOURCE, setgifopts), DEF_CMD("send_rev_ethip_ver", GIF_SEND_REVETHIP, setgifopts), DEF_CMD("-send_rev_ethip_ver", -GIF_SEND_REVETHIP, setgifopts), }; diff --git a/sbin/ifconfig/sfp.c b/sbin/ifconfig/sfp.c index d4da8c331ff4..7c090e142c83 100644 --- a/sbin/ifconfig/sfp.c +++ b/sbin/ifconfig/sfp.c @@ -48,25 +48,16 @@ static const char rcsid[] = #include "ifconfig.h" -struct i2c_info; -typedef int (read_i2c)(struct i2c_info *ii, uint8_t addr, uint8_t off, - uint8_t len, caddr_t buf); - struct i2c_info { - int s; - int error; - int bshift; - int qsfp; - int do_diag; - struct ifreq *ifr; - read_i2c *f; - char *textbuf; - size_t bufsize; - int cfd; - int port_id; - int chip_id; + int fd; /* fd to issue SIOCGI2C */ + int error; /* Store first error */ + int qsfp; /* True if transceiver is QSFP */ + int do_diag; /* True if we need to request DDM */ + struct ifreq *ifr; /* Pointer to pre-filled ifreq */ }; +static int read_i2c(struct i2c_info *ii, uint8_t addr, uint8_t off, + uint8_t len, uint8_t *buf); static void dump_i2c_data(struct i2c_info *ii, uint8_t addr, uint8_t off, uint8_t len); @@ -191,6 +182,18 @@ static struct _nv eth_1040g[] = { { 0, NULL } }; +/* SFF-8636 Rev. 2.5 table 6.3: Revision compliance */ +static struct _nv rev_compl[] = { + { 0x1, "SFF-8436 rev <=4.8" }, + { 0x2, "SFF-8436 rev <=4.8" }, + { 0x3, "SFF-8636 rev <=1.3" }, + { 0x4, "SFF-8636 rev <=1.4" }, + { 0x5, "SFF-8636 rev <=1.5" }, + { 0x6, "SFF-8636 rev <=2.0" }, + { 0x7, "SFF-8636 rev <=2.5" }, + { 0x0, "Unspecified" } +}; + const char * find_value(struct _nv *x, int value) { @@ -254,12 +257,25 @@ convert_sff_connector(char *buf, size_t size, uint8_t value) snprintf(buf, size, "%s", x); } +static void +convert_sff_rev_compliance(char *buf, size_t size, uint8_t value) +{ + const char *x; + + if (value > 0x07) + x = "Unallocated"; + else + x = find_value(rev_compl, value); + + snprintf(buf, size, "%s", x); +} + static void get_sfp_identifier(struct i2c_info *ii, char *buf, size_t size) { uint8_t data; - ii->f(ii, SFF_8472_BASE, SFF_8472_ID, 1, (caddr_t)&data); + read_i2c(ii, SFF_8472_BASE, SFF_8472_ID, 1, &data); convert_sff_identifier(buf, size, data); } @@ -268,7 +284,7 @@ get_sfp_connector(struct i2c_info *ii, char *buf, size_t size) { uint8_t data; - ii->f(ii, SFF_8472_BASE, SFF_8472_CONNECTOR, 1, (caddr_t)&data); + read_i2c(ii, SFF_8472_BASE, SFF_8472_CONNECTOR, 1, &data); convert_sff_connector(buf, size, data); } @@ -277,7 +293,7 @@ get_qsfp_identifier(struct i2c_info *ii, char *buf, size_t size) { uint8_t data; - ii->f(ii, SFF_8436_BASE, SFF_8436_ID, 1, (caddr_t)&data); + read_i2c(ii, SFF_8436_BASE, SFF_8436_ID, 1, &data); convert_sff_identifier(buf, size, data); } @@ -286,7 +302,7 @@ get_qsfp_connector(struct i2c_info *ii, char *buf, size_t size) { uint8_t data; - ii->f(ii, SFF_8436_BASE, SFF_8436_CONNECTOR, 1, (caddr_t)&data); + read_i2c(ii, SFF_8436_BASE, SFF_8436_CONNECTOR, 1, &data); convert_sff_connector(buf, size, data); } @@ -303,7 +319,7 @@ printf_sfp_transceiver_descr(struct i2c_info *ii, char *buf, size_t size) tech_speed = NULL; /* Read bytes 3-10 at once */ - ii->f(ii, SFF_8472_BASE, SFF_8472_TRANS_START, 8, &xbuf[3]); + read_i2c(ii, SFF_8472_BASE, SFF_8472_TRANS_START, 8, &xbuf[3]); /* Check 10G ethernet first */ tech_class = find_zero_bit(eth_10g, xbuf[3], 1); @@ -331,14 +347,14 @@ get_sfp_transceiver_class(struct i2c_info *ii, char *buf, size_t size) uint8_t code; unsigned char qbuf[8]; - ii->f(ii, SFF_8472_BASE, SFF_8472_TRANS_START, 8, (caddr_t)qbuf); + read_i2c(ii, SFF_8472_BASE, SFF_8472_TRANS_START, 8, (uint8_t *)qbuf); /* Check 10G Ethernet/IB first */ - ii->f(ii, SFF_8472_BASE, SFF_8472_TRANS_START, 1, (caddr_t)&code); + read_i2c(ii, SFF_8472_BASE, SFF_8472_TRANS_START, 1, &code); tech_class = find_zero_bit(eth_10g, code, 1); if (tech_class == NULL) { /* No match. Try Ethernet 1G */ - ii->f(ii, SFF_8472_BASE, SFF_8472_TRANS_START + 3, + read_i2c(ii, SFF_8472_BASE, SFF_8472_TRANS_START + 3, 1, (caddr_t)&code); tech_class = find_zero_bit(eth_compat, code, 1); } @@ -356,7 +372,7 @@ get_qsfp_transceiver_class(struct i2c_info *ii, char *buf, size_t size) uint8_t code; /* Check 10/40G Ethernet class only */ - ii->f(ii, SFF_8436_BASE, SFF_8436_CODE_E1040G, 1, (caddr_t)&code); + read_i2c(ii, SFF_8436_BASE, SFF_8436_CODE_E1040G, 1, &code); tech_class = find_zero_bit(eth_1040g, code, 1); if (tech_class == NULL) tech_class = "Unknown"; @@ -393,7 +409,7 @@ get_sfp_vendor_name(struct i2c_info *ii, char *buf, size_t size) char xbuf[17]; memset(xbuf, 0, sizeof(xbuf)); - ii->f(ii, SFF_8472_BASE, SFF_8472_VENDOR_START, 16, xbuf); + read_i2c(ii, SFF_8472_BASE, SFF_8472_VENDOR_START, 16, (uint8_t *)xbuf); convert_sff_name(buf, size, xbuf); } @@ -403,7 +419,7 @@ get_sfp_vendor_pn(struct i2c_info *ii, char *buf, size_t size) char xbuf[17]; memset(xbuf, 0, sizeof(xbuf)); - ii->f(ii, SFF_8472_BASE, SFF_8472_PN_START, 16, xbuf); + read_i2c(ii, SFF_8472_BASE, SFF_8472_PN_START, 16, (uint8_t *)xbuf); convert_sff_name(buf, size, xbuf); } @@ -413,7 +429,7 @@ get_sfp_vendor_sn(struct i2c_info *ii, char *buf, size_t size) char xbuf[17]; memset(xbuf, 0, sizeof(xbuf)); - ii->f(ii, SFF_8472_BASE, SFF_8472_SN_START, 16, xbuf); + read_i2c(ii, SFF_8472_BASE, SFF_8472_SN_START, 16, (uint8_t *)xbuf); convert_sff_name(buf, size, xbuf); } @@ -424,7 +440,7 @@ get_sfp_vendor_date(struct i2c_info *ii, char *buf, size_t size) memset(xbuf, 0, sizeof(xbuf)); /* Date code, see Table 3.8 for description */ - ii->f(ii, SFF_8472_BASE, SFF_8472_DATE_START, 6, xbuf); + read_i2c(ii, SFF_8472_BASE, SFF_8472_DATE_START, 6, (uint8_t *)xbuf); convert_sff_date(buf, size, xbuf); } @@ -434,7 +450,7 @@ get_qsfp_vendor_name(struct i2c_info *ii, char *buf, size_t size) char xbuf[17]; memset(xbuf, 0, sizeof(xbuf)); - ii->f(ii, SFF_8436_BASE, SFF_8436_VENDOR_START, 16, xbuf); + read_i2c(ii, SFF_8436_BASE, SFF_8436_VENDOR_START, 16, (uint8_t *)xbuf); convert_sff_name(buf, size, xbuf); } @@ -444,7 +460,7 @@ get_qsfp_vendor_pn(struct i2c_info *ii, char *buf, size_t size) char xbuf[17]; memset(xbuf, 0, sizeof(xbuf)); - ii->f(ii, SFF_8436_BASE, SFF_8436_PN_START, 16, xbuf); + read_i2c(ii, SFF_8436_BASE, SFF_8436_PN_START, 16, (uint8_t *)xbuf); convert_sff_name(buf, size, xbuf); } @@ -454,7 +470,7 @@ get_qsfp_vendor_sn(struct i2c_info *ii, char *buf, size_t size) char xbuf[17]; memset(xbuf, 0, sizeof(xbuf)); - ii->f(ii, SFF_8436_BASE, SFF_8436_SN_START, 16, xbuf); + read_i2c(ii, SFF_8436_BASE, SFF_8436_SN_START, 16, (uint8_t *)xbuf); convert_sff_name(buf, size, xbuf); } @@ -464,7 +480,7 @@ get_qsfp_vendor_date(struct i2c_info *ii, char *buf, size_t size) char xbuf[6]; memset(xbuf, 0, sizeof(xbuf)); - ii->f(ii, SFF_8436_BASE, SFF_8436_DATE_START, 6, xbuf); + read_i2c(ii, SFF_8436_BASE, SFF_8436_DATE_START, 6, (uint8_t *)xbuf); convert_sff_date(buf, size, xbuf); } @@ -501,12 +517,12 @@ print_sfp_vendor(struct i2c_info *ii, char *buf, size_t size) * */ static void -convert_sff_temp(char *buf, size_t size, char *xbuf) +convert_sff_temp(char *buf, size_t size, uint8_t *xbuf) { double d; - d = (double)(int8_t)xbuf[0]; - d += (double)(uint8_t)xbuf[1] / 256; + d = (double)xbuf[0]; + d += (double)xbuf[1] / 256; snprintf(buf, size, "%.2f C", d); } @@ -516,11 +532,11 @@ convert_sff_temp(char *buf, size_t size, char *xbuf) * 16-bit usigned value, treated as range 0..+6.55 Volts */ static void -convert_sff_voltage(char *buf, size_t size, char *xbuf) +convert_sff_voltage(char *buf, size_t size, uint8_t *xbuf) { double d; - d = (double)(((uint8_t)xbuf[0] << 8) | (uint8_t)xbuf[1]); + d = (double)((xbuf[0] << 8) | xbuf[1]); snprintf(buf, size, "%.2f Volts", d / 10000); } @@ -529,12 +545,12 @@ convert_sff_voltage(char *buf, size_t size, char *xbuf) * human representation. */ static void -convert_sff_power(struct i2c_info *ii, char *buf, size_t size, char *xbuf) +convert_sff_power(struct i2c_info *ii, char *buf, size_t size, uint8_t *xbuf) { uint16_t mW; double dbm; - mW = ((uint8_t)xbuf[0] << 8) + (uint8_t)xbuf[1]; + mW = (xbuf[0] << 8) + xbuf[1]; /* Convert mw to dbm */ dbm = 10.0 * log10(1.0 * mW / 10000); @@ -553,87 +569,116 @@ convert_sff_power(struct i2c_info *ii, char *buf, size_t size, char *xbuf) static void get_sfp_temp(struct i2c_info *ii, char *buf, size_t size) { - char xbuf[2]; + uint8_t xbuf[2]; memset(xbuf, 0, sizeof(xbuf)); - ii->f(ii, SFF_8472_DIAG, SFF_8472_TEMP, 2, xbuf); + read_i2c(ii, SFF_8472_DIAG, SFF_8472_TEMP, 2, xbuf); convert_sff_temp(buf, size, xbuf); } static void get_sfp_voltage(struct i2c_info *ii, char *buf, size_t size) { - char xbuf[2]; + uint8_t xbuf[2]; memset(xbuf, 0, sizeof(xbuf)); - ii->f(ii, SFF_8472_DIAG, SFF_8472_VCC, 2, xbuf); + read_i2c(ii, SFF_8472_DIAG, SFF_8472_VCC, 2, xbuf); convert_sff_voltage(buf, size, xbuf); } static void get_qsfp_temp(struct i2c_info *ii, char *buf, size_t size) { - char xbuf[2]; + uint8_t xbuf[2]; memset(xbuf, 0, sizeof(xbuf)); - ii->f(ii, SFF_8436_BASE, SFF_8436_TEMP, 2, xbuf); + read_i2c(ii, SFF_8436_BASE, SFF_8436_TEMP, 2, xbuf); convert_sff_temp(buf, size, xbuf); } static void get_qsfp_voltage(struct i2c_info *ii, char *buf, size_t size) { - char xbuf[2]; + uint8_t xbuf[2]; memset(xbuf, 0, sizeof(xbuf)); - ii->f(ii, SFF_8436_BASE, SFF_8436_VCC, 2, xbuf); + read_i2c(ii, SFF_8436_BASE, SFF_8436_VCC, 2, xbuf); convert_sff_voltage(buf, size, xbuf); } static void get_sfp_rx_power(struct i2c_info *ii, char *buf, size_t size) { - char xbuf[2]; + uint8_t xbuf[2]; memset(xbuf, 0, sizeof(xbuf)); - ii->f(ii, SFF_8472_DIAG, SFF_8472_RX_POWER, 2, xbuf); + read_i2c(ii, SFF_8472_DIAG, SFF_8472_RX_POWER, 2, xbuf); convert_sff_power(ii, buf, size, xbuf); } static void get_sfp_tx_power(struct i2c_info *ii, char *buf, size_t size) { - char xbuf[2]; + uint8_t xbuf[2]; memset(xbuf, 0, sizeof(xbuf)); - ii->f(ii, SFF_8472_DIAG, SFF_8472_TX_POWER, 2, xbuf); + read_i2c(ii, SFF_8472_DIAG, SFF_8472_TX_POWER, 2, xbuf); convert_sff_power(ii, buf, size, xbuf); } static void get_qsfp_rx_power(struct i2c_info *ii, char *buf, size_t size, int chan) { - char xbuf[2]; + uint8_t xbuf[2]; memset(xbuf, 0, sizeof(xbuf)); - ii->f(ii, SFF_8436_BASE, SFF_8436_RX_CH1_MSB + (chan - 1) * 2, 2, xbuf); + read_i2c(ii, SFF_8436_BASE, SFF_8436_RX_CH1_MSB + (chan-1)*2, 2, xbuf); convert_sff_power(ii, buf, size, xbuf); } static void get_qsfp_tx_power(struct i2c_info *ii, char *buf, size_t size, int chan) { - char xbuf[2]; + uint8_t xbuf[2]; memset(xbuf, 0, sizeof(xbuf)); - ii->f(ii, SFF_8436_BASE, SFF_8436_TX_CH1_MSB + (chan -1) * 2, 2, xbuf); + read_i2c(ii, SFF_8436_BASE, SFF_8436_TX_CH1_MSB + (chan-1)*2, 2, xbuf); convert_sff_power(ii, buf, size, xbuf); } -/* Generic handler */ +static void +get_qsfp_rev_compliance(struct i2c_info *ii, char *buf, size_t size) +{ + uint8_t xbuf; + + xbuf = 0; + read_i2c(ii, SFF_8436_BASE, SFF_8436_STATUS, 1, &xbuf); + convert_sff_rev_compliance(buf, size, xbuf); +} + +static uint32_t +get_qsfp_br(struct i2c_info *ii) +{ + uint8_t xbuf; + uint32_t rate; + + xbuf = 0; + read_i2c(ii, SFF_8436_BASE, SFF_8436_BITRATE, 1, &xbuf); + rate = xbuf * 100; + if (xbuf == 0xFF) { + read_i2c(ii, SFF_8436_BASE, SFF_8636_BITRATE, 1, &xbuf); + rate = xbuf * 250; + } + + return (rate); +} + +/* + * Reads i2c data from opened kernel socket. + */ static int -read_i2c_generic(struct i2c_info *ii, uint8_t addr, uint8_t off, uint8_t len, - caddr_t buf) +read_i2c(struct i2c_info *ii, uint8_t addr, uint8_t off, uint8_t len, + uint8_t *buf) { struct ifi2creq req; int i, l; @@ -653,7 +698,7 @@ read_i2c_generic(struct i2c_info *ii, uint8_t addr, uint8_t off, uint8_t len, while (len > 0) { l = (len > sizeof(req.data)) ? sizeof(req.data) : len; req.len = l; - if (ioctl(ii->s, SIOCGI2C, ii->ifr) != 0) { + if (ioctl(ii->fd, SIOCGI2C, ii->ifr) != 0) { ii->error = errno; return (errno); } @@ -676,7 +721,7 @@ dump_i2c_data(struct i2c_info *ii, uint8_t addr, uint8_t off, uint8_t len) while (len > 0) { memset(buf, 0, sizeof(buf)); read = (len > sizeof(buf)) ? sizeof(buf) : len; - ii->f(ii, addr, off, read, buf); + read_i2c(ii, addr, off, read, buf); if (ii->error != 0) { fprintf(stderr, "Error reading i2c info\n"); return; @@ -696,10 +741,11 @@ print_qsfp_status(struct i2c_info *ii, int verbose) { char buf[80], buf2[40], buf3[40]; uint8_t diag_type; + uint32_t bitrate; int i; /* Read diagnostic monitoring type */ - ii->f(ii, SFF_8436_BASE, SFF_8436_DIAG_TYPE, 1, (caddr_t)&diag_type); + read_i2c(ii, SFF_8436_BASE, SFF_8436_DIAG_TYPE, 1, (caddr_t)&diag_type); if (ii->error != 0) return; @@ -722,6 +768,16 @@ print_qsfp_status(struct i2c_info *ii, int verbose) if (ii->error == 0) printf("\t%s\n", buf); + if (verbose > 1) { + get_qsfp_rev_compliance(ii, buf, sizeof(buf)); + if (ii->error == 0) + printf("\tcompliance level: %s\n", buf); + + bitrate = get_qsfp_br(ii); + if (ii->error == 0 && bitrate > 0) + printf("\tnominal bitrate: %u Mbps\n", bitrate); + } + /* Request current measurements if they are provided: */ if (ii->do_diag != 0) { get_qsfp_temp(ii, buf, sizeof(buf)); @@ -749,7 +805,7 @@ print_sfp_status(struct i2c_info *ii, int verbose) uint8_t diag_type, flags; /* Read diagnostic monitoring type */ - ii->f(ii, SFF_8472_BASE, SFF_8472_DIAG_TYPE, 1, (caddr_t)&diag_type); + read_i2c(ii, SFF_8472_BASE, SFF_8472_DIAG_TYPE, 1, (caddr_t)&diag_type); if (ii->error != 0) return; @@ -797,11 +853,10 @@ sfp_status(int s, struct ifreq *ifr, int verbose) struct i2c_info ii; uint8_t id_byte; + /* Prepare necessary into pass to i2c reader */ memset(&ii, 0, sizeof(ii)); - /* Prepare necessary into to pass to NIC handler */ - ii.s = s; + ii.fd = s; ii.ifr = ifr; - ii.f = read_i2c_generic; /* * Try to read byte 0 from i2c: @@ -811,7 +866,7 @@ sfp_status(int s, struct ifreq *ifr, int verbose) * this might happen in case of empty transceiver slot. */ id_byte = 0; - ii.f(&ii, SFF_8472_BASE, SFF_8472_ID, 1, (caddr_t)&id_byte); + read_i2c(&ii, SFF_8472_BASE, SFF_8472_ID, 1, (caddr_t)&id_byte); if (ii.error != 0 || id_byte == 0) return; diff --git a/sbin/ipfw/tables.c b/sbin/ipfw/tables.c index 594c28d17867..b3473fc15575 100644 --- a/sbin/ipfw/tables.c +++ b/sbin/ipfw/tables.c @@ -1310,6 +1310,63 @@ tentry_fill_key_type(char *arg, ipfw_obj_tentry *tentry, uint8_t type, tentry->masklen = masklen; } +/* + * Tries to guess table key type. + * This procedure is used in legacy table auto-create + * code AND in `ipfw -n` ruleset checking. + * + * Imported from old table_fill_xentry() parse code. + */ +static int +guess_key_type(char *key, uint8_t *ptype) +{ + char *p; + struct in6_addr addr; + uint32_t kv; + + if (ishexnumber(*key) != 0 || *key == ':') { + /* Remove / if exists */ + if ((p = strchr(key, '/')) != NULL) + *p = '\0'; + + if ((inet_pton(AF_INET, key, &addr) == 1) || + (inet_pton(AF_INET6, key, &addr) == 1)) { + *ptype = IPFW_TABLE_CIDR; + if (p != NULL) + *p = '/'; + return (0); + } else { + /* Port or any other key */ + /* Skip non-base 10 entries like 'fa1' */ + kv = strtol(key, &p, 10); + if (*p == '\0') { + *ptype = IPFW_TABLE_NUMBER; + return (0); + } else if ((p != key) && (*p == '.')) { + /* + * Warn on IPv4 address strings + * which are "valid" for inet_aton() but not + * in inet_pton(). + * + * Typical examples: '10.5' or '10.0.0.05' + */ + return (1); + } + } + } + + if (strchr(key, '.') == NULL) { + *ptype = IPFW_TABLE_INTERFACE; + return (0); + } + + if (lookup_host(key, (struct in_addr *)&addr) != 0) + return (1); + + *ptype = IPFW_TABLE_CIDR; + return (0); +} + static void tentry_fill_key(ipfw_obj_header *oh, ipfw_obj_tentry *tent, char *key, int add, uint8_t *ptype, uint32_t *pvmask, ipfw_xtable_info *xi) @@ -1317,7 +1374,6 @@ tentry_fill_key(ipfw_obj_header *oh, ipfw_obj_tentry *tent, char *key, uint8_t type, tflags; uint32_t vmask; int error; - char *del; type = 0; tflags = 0; @@ -1329,10 +1385,24 @@ tentry_fill_key(ipfw_obj_header *oh, ipfw_obj_tentry *tent, char *key, error = 0; if (error == 0) { - /* Table found. */ - type = xi->type; - tflags = xi->tflags; - vmask = xi->vmask; + if (co.test_only == 0) { + /* Table found */ + type = xi->type; + tflags = xi->tflags; + vmask = xi->vmask; + } else { + /* + * we're running `ipfw -n` + * Compability layer: try to guess key type + * before failing. + */ + if (guess_key_type(key, &type) != 0) { + /* Inknown key */ + errx(EX_USAGE, "Cannot guess " + "key '%s' type", key); + } + vmask = IPFW_VTYPE_LEGACY; + } } else { if (error != ESRCH) errx(EX_OSERR, "Error requesting table %s info", @@ -1341,24 +1411,16 @@ tentry_fill_key(ipfw_obj_header *oh, ipfw_obj_tentry *tent, char *key, errx(EX_DATAERR, "Table %s does not exist", oh->ntlv.name); /* - * Table does not exist. - * Compability layer: try to interpret data as ADDR - * before failing. + * Table does not exist + * Compability layer: try to guess key type before failing. */ - if ((del = strchr(key, '/')) != NULL) - *del = '\0'; - if (inet_pton(AF_INET, key, &tent->k.addr6) == 1 || - inet_pton(AF_INET6, key, &tent->k.addr6) == 1) { - /* OK Prepare and send */ - type = IPFW_TABLE_ADDR; - vmask = IPFW_VTYPE_LEGACY; - } else { + if (guess_key_type(key, &type) != 0) { /* Inknown key */ errx(EX_USAGE, "Table %s does not exist, cannot guess " "key '%s' type", oh->ntlv.name, key); } - if (del != NULL) - *del = '/'; + + vmask = IPFW_VTYPE_LEGACY; } tentry_fill_key_type(key, tent, type, tflags); diff --git a/share/man/man3/pthread_getspecific.3 b/share/man/man3/pthread_getspecific.3 index d59003f4e281..3657e13515f4 100644 --- a/share/man/man3/pthread_getspecific.3 +++ b/share/man/man3/pthread_getspecific.3 @@ -64,6 +64,11 @@ is undefined. The .Fn pthread_getspecific function may be called from a thread-specific data destructor function. +A call to +.Fn pthread_getspecific +for the thread-specific data key being destroyed returns the value NULL, +unless the value is changed (after the destructor starts) by a call to +.Fn pthread_setspecific . .Sh RETURN VALUES The .Fn pthread_getspecific diff --git a/share/man/man3/pthread_setspecific.3 b/share/man/man3/pthread_setspecific.3 index 1ea3002d43a0..3153c991f90b 100644 --- a/share/man/man3/pthread_setspecific.3 +++ b/share/man/man3/pthread_setspecific.3 @@ -67,7 +67,10 @@ is undefined. The .Fn pthread_setspecific function may be called from a thread-specific data destructor function, -however this may result in lost storage or infinite loops. +however this may result in lost storage or infinite loops if doing so +causes non-NULL key values to remain after +.Bq PTHREAD_DESTRUCTOR_ITERATIONS +iterations of destructor calls have been made. .Sh RETURN VALUES If successful, the .Fn pthread_setspecific diff --git a/share/man/man4/acpi.4 b/share/man/man4/acpi.4 index 17cf1cbab65b..8c221be870aa 100644 --- a/share/man/man4/acpi.4 +++ b/share/man/man4/acpi.4 @@ -25,7 +25,7 @@ .\" .\" $FreeBSD$ .\" -.Dd June 23, 2014 +.Dd May 9, 2015 .Dt ACPI 4 .Os .Sh NAME @@ -69,14 +69,12 @@ them (such as Enable dumping Debug objects without .Cd "options ACPI_DEBUG" . Default is 0, ignore Debug objects. -.It Va hw.acpi.acline -AC line state (1 means online, 0 means on battery power). -.It Va hw.acpi.cpu.cx_usage +.It Va dev.cpu.N.cx_usage Debugging information listing the percent of total usage for each sleep state. The values are reset when -.Va hw.acpi.cpu.cx_lowest +.Va dev.cpu.N.cx_lowest is modified. -.It Va hw.acpi.cpu.cx_lowest +.It Va dev.cpu.N.cx_lowest Lowest Cx state to use for idling the CPU. A scheduling algorithm will select states between .Li C1 @@ -111,6 +109,11 @@ semantics as the state. Deeper sleeps provide more power savings but increased transition latency when an interrupt occurs. +.It Va dev.cpu.N.cx_method +List of supported CPU idle states and their transition methods, as +directed by the firmware. +.It Va hw.acpi.acline +AC line state (1 means online, 0 means on battery power). .It Va hw.acpi.disable_on_reboot Disable ACPI during the reboot process. Most systems reboot fine with ACPI still enabled, but some require @@ -374,6 +377,14 @@ typically as a child of a PCI bus. .Pq Vt device Supports an ACPI laptop lid switch, which typically puts a system to sleep. +.It Li mwait +.Pq Vt feature +Do not ask firmware for available x86-vendor specific methods to enter +.Li Cx +sleep states. +Only query and use the generic I/O-based entrance method. +The knob is provided to work around inconsistencies in the tables +filled by firmware. .It Li quirks .Pq Vt feature Do not honor quirks. diff --git a/share/man/man4/ctl.4 b/share/man/man4/ctl.4 index a04f2fe409b7..49d98a0c985c 100644 --- a/share/man/man4/ctl.4 +++ b/share/man/man4/ctl.4 @@ -23,7 +23,7 @@ .\" SUCH DAMAGE. .\" .\" $FreeBSD$ -.Dd April 8, 2015 +.Dd May 22, 2015 .Dt CTL 4 .Os .Sh NAME @@ -84,6 +84,22 @@ All I/O handled in-kernel, no userland context switch overhead .El .Pp It also serves as a kernel component of the native iSCSI target. +.Sh SYSCTL VARIABLES +The following variables are available as both +.Xr sysctl 8 +variables and +.Xr loader 8 +tunables: +.Bl -tag -width indent +.It Va kern.cam.ctl.iscsi.maxcmdsn_delta +The number of outstanding commands to advertise to the initiator. +Technically, it's the difference between ExpCmdSN and MaxCmdSN fields +in the iSCSI PDU. +.It Va kern.cam.ctl.iscsi.ping_timeout +The number of seconds to wait for the initiator to respond to a NOP-In +PDU. +In the event that there is no response within that time the session gets +forcibly terminated. .Sh SEE ALSO .Xr ctladm 8 , .Xr ctld 8 , diff --git a/share/man/man4/iic.4 b/share/man/man4/iic.4 index d82f5745cc37..a650c8d9c630 100644 --- a/share/man/man4/iic.4 +++ b/share/man/man4/iic.4 @@ -25,7 +25,7 @@ .\" .\" $FreeBSD$ .\" -.Dd June 24, 2014 +.Dd May 15, 2015 .Dt IIC 4 .Os .Sh NAME @@ -54,10 +54,12 @@ element to the bus. The .Va slave element consists of a 7-bit address and a read/write bit -(i.e., 7-bit address << 1 | r/w). -If the read/write bit is set a read operation is initiated, if the read/write -bit is cleared a write operation is initiated. +(that is, a 7-bit address << 1 | r/w). +A read operation is initiated when the read/write bit is set, or a write +operation when it is cleared. All other elements are ignored. +If successful, the file descriptor receives exclusive +ownership of the underlying iicbus instance. .It Dv I2CRPTSTART .Pq Vt "struct iiccmd" Sends the repeated start condition to the slave specified by the @@ -66,19 +68,33 @@ element to the bus. The slave address should be specified as in .Dv I2CSTART . All other elements are ignored. +.Dv I2CSTART +must have previously been issued on the same file descriptor. .It Dv I2CSTOP No argument is passed. Sends the stop condition to the bus. -This terminates the current transaction. +If +.Dv I2CSTART +was previously issued on the file descriptor, the current transaction is +terminated and exclusive ownership of the underlying iicbus instance is +released. +Otherwise, no action is performed. .It Dv I2CRSTCARD .Pq Vt "struct iiccmd" Resets the bus. The argument is completely ignored. +This command does not require +.Dv I2CSTART +to have been previously issued on the file descriptor. +If it was previously issued, exclusive ownership of the underlying iicbus +instance is released. .It Dv I2CWRITE .Pq Vt "struct iiccmd" Writes data to the .Xr iicbus 4 . -The bus should already be started. +The bus must already be started by a previous +.Dv I2CSTART +on the file descriptor. The .Va slave element is ignored. @@ -96,7 +112,9 @@ element is a pointer to the data to write to the bus. .Pq Vt "struct iiccmd" Reads data from the .Xr iicbus 4 . -The bus should already be started. +The bus must already be started by a previous +.Dv I2CSTART +on the file descriptor. The .Va slave element is ignored. @@ -116,6 +134,15 @@ Short reads on the bus produce undefined results. Generic read/write interface. Allows for an arbitrary number of commands to be sent to an arbitrary number of devices on the bus. +Any previous transaction started by +.Dv I2CSTART +must be terminated by +.Dv I2CSTOP +or +.Dv I2CRSTCARD +before +.Dv I2CRDWR +can be issued on the same file descriptor. A read transfer is specified if .Dv IIC_M_RD is set in @@ -138,6 +165,17 @@ element is a buffer for that data. This ioctl is intended to be .Tn Linux compatible. +.It Dv I2CSADDR +.Pq Vt "uint8_t" +Associate the specified address with the file descriptor for use by +subsequent +.Xr read 2 +or +.Xr write 2 +calls. +The argument is an 8-bit address (that is, a 7-bit address << 1). +The read/write bit in the least-significant position is ignored. +Any subsequent read or write operation will set or clear that bit as needed. .El .Pp The following data structures are defined in @@ -156,7 +194,10 @@ struct iic_msg { uint16_t slave; uint16_t flags; -#define IIC_M_RD 0x0001 /* read vs write */ +#define IIC_M_WR 0 /* Fake flag for write */ +#define IIC_M_RD 0x0001 /* read vs write */ +#define IIC_M_NOSTOP 0x0002 /* do not send a I2C stop after message */ +#define IIC_M_NOSTART 0x0004 /* do not send a I2C start before message */ uint16_t len; /* msg length */ uint8_t * buf; }; @@ -167,15 +208,37 @@ struct iic_rdwr_data { }; .Ed .Pp -It is also possible to use read/write routines, then I2C start/stop handshake is -managed by the -.Xr iicbus 4 -system. -However, the address used for the read/write routines is the one -passed to last +It is also possible to use +.Xr read 2 +or +.Xr write 2 , +in which case the I2C start/stop handshake is managed by +.Xr iicbus 4 . +The address used for the read/write operation is the one passed to the most +recent .Dv I2CSTART .Xr ioctl 2 -to this device. +or +.Dv I2CSADDR +.Xr ioctl 2 +on the open +.Pa /dev/iic? +file descriptor. +Closing the file descriptor clears any addressing state established by a +previous +.Dv I2CSTART +or +.Dv I2CSADDR , +stops any transaction established by a not-yet-terminated +.Dv I2CSTART , +and releases iicbus ownership. +Because addressing state is stored on a per-file-descriptor basis, it is +permissible for multiple file descriptors to be simultaneously open on the +same +.Pa /dev/iic? +device. +Concurrent transactions on those descriptors are synchronized by the +exclusive-ownership requests issued to the underlying iicbus instance. .Sh SEE ALSO .Xr ioctl 2 , .Xr read 2 , @@ -193,9 +256,3 @@ manual page was written by .An Nicolas Souchu and .An M. Warner Losh . -.Sh BUGS -Only the -.Dv I2CRDWR -.Xr ioctl 2 -is thread safe. -All other interfaces suffer from some kind of race. diff --git a/share/man/man4/sfxge.4 b/share/man/man4/sfxge.4 index c745368ead16..462b62062a8d 100644 --- a/share/man/man4/sfxge.4 +++ b/share/man/man4/sfxge.4 @@ -1,26 +1,30 @@ -.\" Copyright (c) 2011 Solarflare Communications, Inc. +.\" Copyright (c) 2011-2015 Solarflare Communications Inc. .\" All rights reserved. .\" .\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. +.\" modification, are permitted provided that the following conditions are met: .\" -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -.\" SUCH DAMAGE. +.\" 1. Redistributions of source code must retain the above copyright notice, +.\" this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright notice, +.\" this list of conditions and the following disclaimer in the documentation +.\" and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +.\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, +.\" THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR +.\" CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +.\" EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +.\" PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; +.\" OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +.\" WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR +.\" OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +.\" EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +.\" +.\" The views and conclusions contained in the software and documentation are +.\" those of the authors and should not be interpreted as representing official +.\" policies, either expressed or implied, of the FreeBSD Project. .\" .\" $FreeBSD$ .\" @@ -116,6 +120,9 @@ If a packet is dropped, the .Va tx_put_overflow counter is incremented and the local sender receives ENOBUFS. The value must be greater than or equal to 0. +.It Va hw.sfxge.tso_fw_assisted +Enable/disable usage of FW-assisted TSO if supported by NIC firmware. +Enabled by default. .It Va hw.sfxge.N.max_rss_channels The maximum number of allocated RSS channels for the Nth adapter. If set to 0 or unset, the number of channels is determined by the number diff --git a/share/man/man9/psignal.9 b/share/man/man9/psignal.9 index 4193bcb50b88..aa170322e7cf 100644 --- a/share/man/man9/psignal.9 +++ b/share/man/man9/psignal.9 @@ -33,6 +33,7 @@ .Os .Sh NAME .Nm psignal , +.Nm kern_psignal , .Nm pgsignal , .Nm gsignal , .Nm tdsignal @@ -41,7 +42,7 @@ .In sys/types.h .In sys/signalvar.h .Ft void -.Fn psignal "struct proc *p" "int signum" +.Fn kern_psignal "struct proc *p" "int signum" .Ft void .Fn pgsignal "struct pgrp *pgrp" "int signum" "int checkctty" .Ft void @@ -56,16 +57,22 @@ common to all three functions should be in the range .Bq 1- Ns Dv NSIG . .Pp The -.Fn psignal +.Fn kern_psignal function posts signal number .Fa signum to the process represented by the process structure .Fa p . +The +.Fn kern_psignal +function used to be called +.Fn psignal +but was renamed in order to eliminate a name collision with the libc +function of that name and facilitate code reuse. With a few exceptions noted below, the target process signal disposition is updated and is marked as runnable, so further handling of the signal is done in the context of the target process after a context switch. Note that -.Fn psignal +.Fn kern_psignal does not by itself cause a context switch to happen. .Pp The target process is not marked as runnable in the following cases: @@ -91,7 +98,7 @@ regardless of the signal action .El .Pp If the target process is being traced -.Fn psignal +.Fn kern_psignal behaves as if the target process were taking the default action for .Fa signum . This allows the tracing process to be notified of the signal. @@ -113,7 +120,7 @@ of the process group structure pointed at by .Fa pgrp and calling -.Fn psignal +.Fn kern_psignal as appropriate. If .Fa pgrp @@ -149,3 +156,10 @@ to the thread represented by the thread structure .Xr sigaction 2 , .Xr signal 9 , .Xr tsleep 9 +.Sh HISTORY +The +.Fn psignal +function was renamed to +.Fn kern_psignal +in +.Fx 9.0 . diff --git a/share/man/man9/sleep.9 b/share/man/man9/sleep.9 index bd421eaf6baa..469d09f73e55 100644 --- a/share/man/man9/sleep.9 +++ b/share/man/man9/sleep.9 @@ -25,7 +25,7 @@ .\" .\" $FreeBSD$ .\" -.Dd February 19, 2013 +.Dd May 24, 2015 .Dt SLEEP 9 .Os .Sh NAME @@ -130,19 +130,6 @@ possible, and is returned if the system call should be interrupted by the signal (return .Er EINTR ) . -If the -.Dv PBDRY -flag is specified in addition to -.Dv PCATCH , -then the sleeping thread is not stopped when -.Dv SIGSTOP -becomes pending -or some other stop action occurs while it is sleeping. -Instead, it is woken up, with the assumption -that the stop will occur on reaching a stop -point when returning to usermode. -The flag should be used when the sleeping thread owns resources, for instance -vnode locks, that should be released in a timely fashion. .Pp The parameter .Fa wmesg diff --git a/share/mk/src.libnames.mk b/share/mk/src.libnames.mk index 192bc001b4d9..bfb235c46656 100644 --- a/share/mk/src.libnames.mk +++ b/share/mk/src.libnames.mk @@ -24,7 +24,7 @@ _PRIVATELIBS= \ ucl \ unbound -_INTERNALIBS= \ +_INTERNALLIBS= \ amu \ bsnmptools \ cron \ @@ -32,7 +32,6 @@ _INTERNALIBS= \ fifolog \ ipf \ lpr \ - mandoc \ netbsd \ ntp \ ntpevent \ @@ -49,7 +48,7 @@ _INTERNALIBS= \ _LIBRARIES= \ ${_PRIVATELIBS} \ - ${_INTERNALIBS} \ + ${_INTERNALLIBS} \ alias \ archive \ asn1 \ @@ -78,6 +77,7 @@ _LIBRARIES= \ devstat \ dialog \ dpv \ + dtrace \ dwarf \ edit \ elf \ @@ -107,7 +107,6 @@ _LIBRARIES= \ lzma \ m \ magic \ - mandoc \ md \ memstat \ mp \ @@ -133,6 +132,7 @@ _LIBRARIES= \ rpcsec_gss \ rpcsvc \ rt \ + rtld_db \ sbuf \ sdp \ sm \ @@ -230,6 +230,9 @@ _DP_gssapi_krb5+= gssapi krb5 crypto roken asn1 com_err _DP_lzma= pthread _DP_ucl= m _DP_vmmapi= util +_DP_ctf= z +_DP_proc= rtld_db util +_DP_dtrace= rtld_db pthread # Define spacial cases LDADD_supcplusplus= -lsupc++ @@ -243,7 +246,7 @@ LIB${_l:tu}?= ${DESTDIR}${LIBDIR}/libprivate${_l}.a .endfor .for _l in ${_LIBRARIES} -.if ${_INTERNALIBS:M${_l}} +.if ${_INTERNALLIBS:M${_l}} LDADD_${_l}_L+= -L${LIB${_l:tu}DIR} .endif DPADD_${_l}?= ${LIB${_l:tu}} @@ -252,7 +255,7 @@ LDADD_${_l}?= -lprivate${_l} .else LDADD_${_l}?= ${LDADD_${_l}_L} -l${_l} .endif -.if defined(_DP_${_l}) && defined(NO_SHARED) +.if defined(_DP_${_l}) && defined(NO_SHARED) && (${NO_SHARED} != "no" && ${NO_SHARED} != "NO") .for _d in ${_DP_${_l}} DPADD_${_l}+= ${DPADD_${_d}} LDADD_${_l}+= ${LDADD_${_d}} @@ -275,6 +278,9 @@ LDADD_ipf+= ${LDADD_kvm} DPADD_mt+= ${DPADD_sbuf} LDADD_mt+= ${LDADD_sbuf} +DPADD_dtrace+= ${DPADD_ctf} ${DPADD_elf} ${DPADD_proc} +LDADD_dtrace+= ${LDADD_ctf} ${LDADD_elf} ${LDADD_proc} + # The following depends on libraries which are using pthread DPADD_hdb+= ${DPADD_pthread} LDADD_hdb+= ${LDADD_pthread} @@ -306,9 +312,6 @@ LIBREADLINE?= ${LIBREADLINEDIR}/libreadline.a LIBOHASHDIR= ${ROOTOBJDIR}/lib/libohash LIBOHASH?= ${LIBOHASHDIR}/libohash.a -LIBMANDOCDIR= ${ROOTOBJDIR}/lib/libmandoc -LIBMANDOC?= ${LIBMANDOCDIR}/libmandoc.a - LIBSMDIR= ${ROOTOBJDIR}/lib/libsm LIBSM?= ${LIBSMDIR}/libsm.a @@ -340,7 +343,7 @@ LIBNTPDIR= ${ROOTOBJDIR}/usr.sbin/ntp/libntp LIBNTP?= ${LIBNTPDIR}/libntp.a LIBNTPEVENTDIR= ${ROOTOBJDIR}/usr.sbin/ntp/libntpevent -LIBNTPEVENT?= ${LIBNTPDIR}/libntpevent.a +LIBNTPEVENT?= ${LIBNTPEVENTDIR}/libntpevent.a LIBOPTSDIR= ${ROOTOBJDIR}/usr.sbin/ntp/libopts LIBOTPS?= ${LIBOPTSDIR}/libopts.a diff --git a/share/syscons/keymaps/INDEX.keymaps b/share/syscons/keymaps/INDEX.keymaps index 221bf5a00c9c..d8ca7360cae1 100644 --- a/share/syscons/keymaps/INDEX.keymaps +++ b/share/syscons/keymaps/INDEX.keymaps @@ -123,7 +123,7 @@ danish.cp865.kbd:fr:Danois Code page 865 danish.cp865.kbd:pt:Dinamarquês Codepage 865 danish.cp865.kbd:es:Danés Codepage 865 -danish.iso.macbook.kbd:da:Danish ISO-8859-1 (macbook) +danish.iso.macbook.kbd:en:Danish ISO-8859-1 (macbook) danish.iso.macbook.kbd:da:Dansk ISO-8859-1 (macbook) danish.iso.macbook.kbd:de:Dänisch ISO-8859-1 (Macbook) danish.iso.macbook.kbd:fr:Danois ISO-8859-1 (macbook) diff --git a/share/vt/keymaps/INDEX.keymaps b/share/vt/keymaps/INDEX.keymaps index 8a33bc857783..3fac998eb3b7 100644 --- a/share/vt/keymaps/INDEX.keymaps +++ b/share/vt/keymaps/INDEX.keymaps @@ -20,15 +20,15 @@ # # Language support: MENU, FONT # -MENU:en:Choose your keyboard language +MENU:en:Choose your keyboard layout MENU:da,no,sv:Vælg dit keyboard layout MENU:de:Wählen Sie Ihre Tastaturbelegung -MENU:fr:Choisissez la nationalité de votre clavier +MENU:fr:Choisissez la disposition de votre clavier MENU:pl:Wybierz ukÅ‚ad klawiatury MENU:pt:Escolha o layout do teclado -MENU:es:Seleccione el idioma de su teclado -MENU::ךלש תדלקמה תפש ×ª× ×¨×—×‘ -MENU:uk:Bиберіть розкладку клавіатури +MENU:es:Seleccione la disposición de su teclado +MENU:he:ךלש תדלקמה תפש ×ª× ×¨×—×‘ +MENU:uk:ОберiÑ‚ÑŒ розкладку клавіатури MENU:el:Επιλέξτε το πληκτÏολόγιο της κονσόλας MENU:hy:Ô¸Õ¶Õ¿Ö€Õ¥Ö„ Õ½Õ¿Õ¥Õ²Õ¶Õ¡Õ·Õ¡Ö€Õ« Õ¤Õ¡Õ½Õ¡Õ¾Õ¸Ö€Õ¸Ö‚Õ©ÕµÕ¸Ö‚Õ¶Õ¨ @@ -121,7 +121,7 @@ dk.kbd.from-cp865:fr:Danois dk.kbd.from-cp865:pt:Dinamarquês dk.kbd.from-cp865:es:Danés -dk.macbook.kbd:da:Danish (macbook) +dk.macbook.kbd:en:Danish (macbook) dk.macbook.kbd:da:Dansk (macbook) dk.macbook.kbd:de:Dänisch (Macbook) dk.macbook.kbd:fr:Danois (macbook) @@ -517,7 +517,7 @@ uk.capsctrl.kbd:en:United Kingdom (Caps Lock acts as Left Ctrl) uk.capsctrl.kbd:de:Vereinigtes Königreich (Caps Lock als linke Strg) #uk.iso-ctrl.kbd:fr:Royaume Uni (caps lock acts as Left Ctrl) #uk.iso-ctrl.kbd:pt:Reino Unido (caps lock acts as Left Ctrl) -#uk.iso-ctrl.kbd:es:Británico (caps lock acts as Left Ctrl) +#uk.iso-ctrl.kbd:es:Británico (caps lock acts as Left Ctrl) uk.dvorak.kbd:en:United Kingdom Dvorak uk.dvorak.kbd:de:Vereinigtes Königreich Dvorak diff --git a/sys/amd64/acpica/acpi_machdep.c b/sys/amd64/acpica/acpi_machdep.c index 049b51bb4e9f..8f88a00e3275 100644 --- a/sys/amd64/acpica/acpi_machdep.c +++ b/sys/amd64/acpica/acpi_machdep.c @@ -87,13 +87,6 @@ acpi_machdep_quirks(int *quirks) return (0); } -void -acpi_cpu_c1() -{ - - __asm __volatile("sti; hlt"); -} - /* * Support for mapping ACPI tables during early boot. Currently this * uses the crashdump map to map each table. However, the crashdump diff --git a/sys/amd64/amd64/apic_vector.S b/sys/amd64/amd64/apic_vector.S index 4455cab0e787..a1279e6c9a85 100644 --- a/sys/amd64/amd64/apic_vector.S +++ b/sys/amd64/amd64/apic_vector.S @@ -196,22 +196,12 @@ IDTVEC(hv_vmbus_callback) */ .text -#define NAKE_INTR_CS 24 - SUPERALIGN_TEXT invltlb_ret: call as_lapic_eoi POP_FRAME jmp doreti_iret - SUPERALIGN_TEXT -IDTVEC(invltlb_pcid) - PUSH_FRAME - - call invltlb_pcid_handler - jmp invltlb_ret - - SUPERALIGN_TEXT IDTVEC(invltlb) PUSH_FRAME @@ -219,16 +209,22 @@ IDTVEC(invltlb) call invltlb_handler jmp invltlb_ret +IDTVEC(invltlb_pcid) + PUSH_FRAME + + call invltlb_pcid_handler + jmp invltlb_ret + +IDTVEC(invltlb_invpcid) + PUSH_FRAME + + call invltlb_invpcid_handler + jmp invltlb_ret + /* * Single page TLB shootdown */ .text - SUPERALIGN_TEXT -IDTVEC(invlpg_pcid) - PUSH_FRAME - - call invlpg_pcid_handler - jmp invltlb_ret SUPERALIGN_TEXT IDTVEC(invlpg) diff --git a/sys/amd64/amd64/cpu_switch.S b/sys/amd64/amd64/cpu_switch.S index eb0ee8b5fdd5..e292797fa285 100644 --- a/sys/amd64/amd64/cpu_switch.S +++ b/sys/amd64/amd64/cpu_switch.S @@ -69,16 +69,10 @@ * %rsi = newtd */ ENTRY(cpu_throw) - movl PCPU(CPUID),%eax - testq %rdi,%rdi - jz 1f - /* release bit from old pm_active */ - movq PCPU(CURPMAP),%rdx - LK btrl %eax,PM_ACTIVE(%rdx) /* clear old */ -1: - movq TD_PCB(%rsi),%r8 /* newtd->td_pcb */ - movq PCB_CR3(%r8),%rcx /* new address space */ - jmp swact + movq %rsi,%r12 + movq %rsi,%rdi + call pmap_activate_sw + jmp sw1 END(cpu_throw) /* @@ -132,59 +126,20 @@ ctx_switch_xsave: xorl %eax,%eax movq %rax,PCPU(FPCURTHREAD) 3: - /* Save is done. Now fire up new thread. Leave old vmspace. */ - movq TD_PCB(%rsi),%r8 - - /* switch address space */ - movq PCB_CR3(%r8),%rcx - movq %cr3,%rax - cmpq %rcx,%rax /* Same address space? */ - jne swinact - SETLK %rdx, TD_LOCK(%rdi) /* Release the old thread */ - jmp sw1 -swinact: - movl PCPU(CPUID),%eax - /* Release bit from old pmap->pm_active */ - movq PCPU(CURPMAP),%r12 - LK btrl %eax,PM_ACTIVE(%r12) /* clear old */ - SETLK %rdx,TD_LOCK(%rdi) /* Release the old thread */ -swact: - /* Set bit in new pmap->pm_active */ - movq TD_PROC(%rsi),%rdx /* newproc */ - movq P_VMSPACE(%rdx), %rdx - addq $VM_PMAP,%rdx - cmpl $-1,PM_PCID(%rdx) - je 1f - LK btsl %eax,PM_SAVE(%rdx) - jnc 1f - btsq $63,%rcx /* CR3_PCID_SAVE */ - incq PCPU(PM_SAVE_CNT) -1: - movq %rcx,%cr3 /* new address space */ - LK btsl %eax,PM_ACTIVE(%rdx) /* set new */ - movq %rdx,PCPU(CURPMAP) - - /* - * We might lose the race and other CPU might have changed - * the pmap after we set our bit in pmap->pm_save. Recheck. - * Reload %cr3 with CR3_PCID_SAVE bit cleared if pmap was - * modified, causing TLB flush for this pcid. - */ - btrq $63,%rcx - jnc 1f - LK btsl %eax,PM_SAVE(%rdx) - jc 1f - decq PCPU(PM_SAVE_CNT) - movq %rcx,%cr3 -1: - + movq %rsi,%r12 + movq %rdi,%r13 + movq %rdx,%r15 + movq %rsi,%rdi + callq pmap_activate_sw + SETLK %r15,TD_LOCK(%r13) /* Release the old thread */ sw1: + movq TD_PCB(%r12),%r8 #if defined(SCHED_ULE) && defined(SMP) /* Wait for the new thread to become unblocked */ movq $blocked_lock, %rdx 1: - movq TD_LOCK(%rsi),%rcx + movq TD_LOCK(%r12),%rcx cmpq %rcx, %rdx pause je 1b @@ -195,13 +150,13 @@ sw1: */ /* Skip loading user fsbase/gsbase for kthreads */ - testl $TDP_KTHREAD,TD_PFLAGS(%rsi) + testl $TDP_KTHREAD,TD_PFLAGS(%r12) jnz do_kthread /* * Load ldt register */ - movq TD_PROC(%rsi),%rcx + movq TD_PROC(%r12),%rcx cmpq $0, P_MD+MD_LDT(%rcx) jne do_ldt xorl %eax,%eax @@ -238,7 +193,7 @@ done_tss: movq %r8,PCPU(CURPCB) /* Update the TSS_RSP0 pointer for the next interrupt */ movq %r8,COMMON_TSS_RSP0(%rdx) - movq %rsi,PCPU(CURTHREAD) /* into next thread */ + movq %r12,PCPU(CURTHREAD) /* into next thread */ /* Test if debug registers should be restored. */ testl $PCB_DBREGS,PCB_FLAGS(%r8) diff --git a/sys/amd64/amd64/db_disasm.c b/sys/amd64/amd64/db_disasm.c index 50da76b99a17..dd436d7d6bb4 100644 --- a/sys/amd64/amd64/db_disasm.c +++ b/sys/amd64/amd64/db_disasm.c @@ -1223,9 +1223,7 @@ db_disasm_esc(loc, inst, rex, short_addr, size, seg) * next instruction. */ db_addr_t -db_disasm(loc, altfmt) - db_addr_t loc; - boolean_t altfmt; +db_disasm(db_addr_t loc, bool altfmt) { int inst; int size; diff --git a/sys/amd64/amd64/elf_machdep.c b/sys/amd64/amd64/elf_machdep.c index 23fa39b4fd1e..d1cffd9a38cc 100644 --- a/sys/amd64/amd64/elf_machdep.c +++ b/sys/amd64/amd64/elf_machdep.c @@ -82,6 +82,7 @@ struct sysentvec elf64_freebsd_sysvec = { .sv_shared_page_base = SHAREDPAGE, .sv_shared_page_len = PAGE_SIZE, .sv_schedtail = NULL, + .sv_thread_detach = NULL, }; INIT_SYSENTVEC(elf64_sysvec, &elf64_freebsd_sysvec); diff --git a/sys/amd64/amd64/genassym.c b/sys/amd64/amd64/genassym.c index 3ffefc0e4c43..11012c4cc48d 100644 --- a/sys/amd64/amd64/genassym.c +++ b/sys/amd64/amd64/genassym.c @@ -71,8 +71,6 @@ __FBSDID("$FreeBSD$"); ASSYM(P_VMSPACE, offsetof(struct proc, p_vmspace)); ASSYM(VM_PMAP, offsetof(struct vmspace, vm_pmap)); ASSYM(PM_ACTIVE, offsetof(struct pmap, pm_active)); -ASSYM(PM_SAVE, offsetof(struct pmap, pm_save)); -ASSYM(PM_PCID, offsetof(struct pmap, pm_pcid)); ASSYM(P_MD, offsetof(struct proc, p_md)); ASSYM(MD_LDT, offsetof(struct mdproc, md_ldt)); diff --git a/sys/amd64/amd64/machdep.c b/sys/amd64/amd64/machdep.c index 32309377dd68..58cb9786578f 100644 --- a/sys/amd64/amd64/machdep.c +++ b/sys/amd64/amd64/machdep.c @@ -398,10 +398,6 @@ sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) /* Align to 16 bytes. */ sfp = (struct sigframe *)((unsigned long)sp & ~0xFul); - /* Translate the signal if appropriate. */ - if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) - sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; - /* Build the argument list for the signal handler. */ regs->tf_rdi = sig; /* arg 1 in %rdi */ regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */ @@ -1718,7 +1714,6 @@ hammer_time(u_int64_t modulep, u_int64_t physfree) /* setup proc 0's pcb */ thread0.td_pcb->pcb_flags = 0; - thread0.td_pcb->pcb_cr3 = KPML4phys; /* PCID 0 is reserved for kernel */ thread0.td_frame = &proc0_tf; env = kern_getenv("kernelname"); diff --git a/sys/amd64/amd64/mp_machdep.c b/sys/amd64/amd64/mp_machdep.c index 83ca54870bbe..e91e6d546558 100644 --- a/sys/amd64/amd64/mp_machdep.c +++ b/sys/amd64/amd64/mp_machdep.c @@ -88,12 +88,9 @@ char *doublefault_stack; char *nmi_stack; /* Variables needed for SMP tlb shootdown. */ -vm_offset_t smp_tlb_addr2; -struct invpcid_descr smp_tlb_invpcid; +static vm_offset_t smp_tlb_addr1, smp_tlb_addr2; +static pmap_t smp_tlb_pmap; volatile int smp_tlb_wait; -uint64_t pcid_cr3; -pmap_t smp_tlb_pmap; -extern int invpcid_works; extern inthand_t IDTVEC(fast_syscall), IDTVEC(fast_syscall32); @@ -139,14 +136,17 @@ cpu_mp_start(void) /* Install an inter-CPU IPI for TLB invalidation */ if (pmap_pcid_enabled) { - setidt(IPI_INVLTLB, IDTVEC(invltlb_pcid), SDT_SYSIGT, - SEL_KPL, 0); - setidt(IPI_INVLPG, IDTVEC(invlpg_pcid), SDT_SYSIGT, - SEL_KPL, 0); + if (invpcid_works) { + setidt(IPI_INVLTLB, IDTVEC(invltlb_invpcid), + SDT_SYSIGT, SEL_KPL, 0); + } else { + setidt(IPI_INVLTLB, IDTVEC(invltlb_pcid), SDT_SYSIGT, + SEL_KPL, 0); + } } else { setidt(IPI_INVLTLB, IDTVEC(invltlb), SDT_SYSIGT, SEL_KPL, 0); - setidt(IPI_INVLPG, IDTVEC(invlpg), SDT_SYSIGT, SEL_KPL, 0); } + setidt(IPI_INVLPG, IDTVEC(invlpg), SDT_SYSIGT, SEL_KPL, 0); setidt(IPI_INVLRNG, IDTVEC(invlrng), SDT_SYSIGT, SEL_KPL, 0); /* Install an inter-CPU IPI for cache invalidation. */ @@ -242,6 +242,9 @@ init_secondary(void) pc->pc_gs32p = &gdt[NGDT * cpu + GUGS32_SEL]; pc->pc_ldt = (struct system_segment_descriptor *)&gdt[NGDT * cpu + GUSERLDT_SEL]; + pc->pc_curpmap = kernel_pmap; + pc->pc_pcid_gen = 1; + pc->pc_pcid_next = PMAP_PCID_KERN + 1; /* Save the per-cpu pointer for use by the NMI handler. */ np->np_pcpu = (register_t) pc; @@ -407,35 +410,8 @@ start_ap(int apic_id) } /* - * Flush the TLB on all other CPU's + * Flush the TLB on other CPU's */ -static void -smp_tlb_shootdown(u_int vector, pmap_t pmap, vm_offset_t addr1, - vm_offset_t addr2) -{ - u_int ncpu; - - ncpu = mp_ncpus - 1; /* does not shootdown self */ - if (ncpu < 1) - return; /* no other cpus */ - if (!(read_rflags() & PSL_I)) - panic("%s: interrupts disabled", __func__); - mtx_lock_spin(&smp_ipi_mtx); - smp_tlb_invpcid.addr = addr1; - if (pmap == NULL) { - smp_tlb_invpcid.pcid = 0; - } else { - smp_tlb_invpcid.pcid = pmap->pm_pcid; - pcid_cr3 = pmap->pm_cr3; - } - smp_tlb_addr2 = addr2; - smp_tlb_pmap = pmap; - atomic_store_rel_int(&smp_tlb_wait, 0); - ipi_all_but_self(vector); - while (smp_tlb_wait < ncpu) - ia32_pause(); - mtx_unlock_spin(&smp_ipi_mtx); -} static void smp_targeted_tlb_shootdown(cpuset_t mask, u_int vector, pmap_t pmap, @@ -443,7 +419,11 @@ smp_targeted_tlb_shootdown(cpuset_t mask, u_int vector, pmap_t pmap, { int cpu, ncpu, othercpus; - othercpus = mp_ncpus - 1; + othercpus = mp_ncpus - 1; /* does not shootdown self */ + + /* + * Check for other cpus. Return if none. + */ if (CPU_ISFULLSET(&mask)) { if (othercpus < 1) return; @@ -452,16 +432,11 @@ smp_targeted_tlb_shootdown(cpuset_t mask, u_int vector, pmap_t pmap, if (CPU_EMPTY(&mask)) return; } + if (!(read_rflags() & PSL_I)) panic("%s: interrupts disabled", __func__); mtx_lock_spin(&smp_ipi_mtx); - smp_tlb_invpcid.addr = addr1; - if (pmap == NULL) { - smp_tlb_invpcid.pcid = 0; - } else { - smp_tlb_invpcid.pcid = pmap->pm_pcid; - pcid_cr3 = pmap->pm_cr3; - } + smp_tlb_addr1 = addr1; smp_tlb_addr2 = addr2; smp_tlb_pmap = pmap; atomic_store_rel_int(&smp_tlb_wait, 0); @@ -485,11 +460,23 @@ smp_targeted_tlb_shootdown(cpuset_t mask, u_int vector, pmap_t pmap, } void -smp_invlpg(pmap_t pmap, vm_offset_t addr) +smp_masked_invltlb(cpuset_t mask, pmap_t pmap) { if (smp_started) { - smp_tlb_shootdown(IPI_INVLPG, pmap, addr, 0); + smp_targeted_tlb_shootdown(mask, IPI_INVLTLB, pmap, 0, 0); +#ifdef COUNT_XINVLTLB_HITS + ipi_global++; +#endif + } +} + +void +smp_masked_invlpg(cpuset_t mask, vm_offset_t addr) +{ + + if (smp_started) { + smp_targeted_tlb_shootdown(mask, IPI_INVLPG, NULL, addr, 0); #ifdef COUNT_XINVLTLB_HITS ipi_page++; #endif @@ -497,11 +484,12 @@ smp_invlpg(pmap_t pmap, vm_offset_t addr) } void -smp_invlpg_range(pmap_t pmap, vm_offset_t addr1, vm_offset_t addr2) +smp_masked_invlpg_range(cpuset_t mask, vm_offset_t addr1, vm_offset_t addr2) { if (smp_started) { - smp_tlb_shootdown(IPI_INVLRNG, pmap, addr1, addr2); + smp_targeted_tlb_shootdown(mask, IPI_INVLRNG, NULL, + addr1, addr2); #ifdef COUNT_XINVLTLB_HITS ipi_range++; ipi_range_size += (addr2 - addr1) / PAGE_SIZE; @@ -509,62 +497,13 @@ smp_invlpg_range(pmap_t pmap, vm_offset_t addr1, vm_offset_t addr2) } } -void -smp_masked_invltlb(cpuset_t mask, pmap_t pmap) -{ - - if (smp_started) { - smp_targeted_tlb_shootdown(mask, IPI_INVLTLB, pmap, 0, 0); -#ifdef COUNT_XINVLTLB_HITS - ipi_masked_global++; -#endif - } -} - -void -smp_masked_invlpg(cpuset_t mask, pmap_t pmap, vm_offset_t addr) -{ - - if (smp_started) { - smp_targeted_tlb_shootdown(mask, IPI_INVLPG, pmap, addr, 0); -#ifdef COUNT_XINVLTLB_HITS - ipi_masked_page++; -#endif - } -} - -void -smp_masked_invlpg_range(cpuset_t mask, pmap_t pmap, vm_offset_t addr1, - vm_offset_t addr2) -{ - - if (smp_started) { - smp_targeted_tlb_shootdown(mask, IPI_INVLRNG, pmap, addr1, - addr2); -#ifdef COUNT_XINVLTLB_HITS - ipi_masked_range++; - ipi_masked_range_size += (addr2 - addr1) / PAGE_SIZE; -#endif - } -} - void smp_cache_flush(void) { - if (smp_started) - smp_tlb_shootdown(IPI_INVLCACHE, NULL, 0, 0); -} - -void -smp_invltlb(pmap_t pmap) -{ - if (smp_started) { - smp_tlb_shootdown(IPI_INVLTLB, pmap, 0, 0); -#ifdef COUNT_XINVLTLB_HITS - ipi_global++; -#endif + smp_targeted_tlb_shootdown(all_cpus, IPI_INVLCACHE, NULL, + 0, 0); } } @@ -586,10 +525,10 @@ invltlb_handler(void) } void -invltlb_pcid_handler(void) +invltlb_invpcid_handler(void) { - uint64_t cr3; - u_int cpuid; + struct invpcid_descr d; + #ifdef COUNT_XINVLTLB_HITS xhits_gbl[PCPU_GET(cpuid)]++; #endif /* COUNT_XINVLTLB_HITS */ @@ -597,28 +536,39 @@ invltlb_pcid_handler(void) (*ipi_invltlb_counts[PCPU_GET(cpuid)])++; #endif /* COUNT_IPIS */ - if (smp_tlb_invpcid.pcid != (uint64_t)-1 && - smp_tlb_invpcid.pcid != 0) { - if (invpcid_works) { - invpcid(&smp_tlb_invpcid, INVPCID_CTX); - } else { - /* Otherwise reload %cr3 twice. */ - cr3 = rcr3(); - if (cr3 != pcid_cr3) { - load_cr3(pcid_cr3); - cr3 |= CR3_PCID_SAVE; - } - load_cr3(cr3); - } - } else { - invltlb_globpcid(); - } - if (smp_tlb_pmap != NULL) { - cpuid = PCPU_GET(cpuid); - if (!CPU_ISSET(cpuid, &smp_tlb_pmap->pm_active)) - CPU_CLR_ATOMIC(cpuid, &smp_tlb_pmap->pm_save); - } + d.pcid = smp_tlb_pmap->pm_pcids[PCPU_GET(cpuid)].pm_pcid; + d.pad = 0; + d.addr = 0; + invpcid(&d, smp_tlb_pmap == kernel_pmap ? INVPCID_CTXGLOB : + INVPCID_CTX); + atomic_add_int(&smp_tlb_wait, 1); +} +void +invltlb_pcid_handler(void) +{ +#ifdef COUNT_XINVLTLB_HITS + xhits_gbl[PCPU_GET(cpuid)]++; +#endif /* COUNT_XINVLTLB_HITS */ +#ifdef COUNT_IPIS + (*ipi_invltlb_counts[PCPU_GET(cpuid)])++; +#endif /* COUNT_IPIS */ + + if (smp_tlb_pmap == kernel_pmap) { + invltlb_globpcid(); + } else { + /* + * The current pmap might not be equal to + * smp_tlb_pmap. The clearing of the pm_gen in + * pmap_invalidate_all() takes care of TLB + * invalidation when switching to the pmap on this + * CPU. + */ + if (PCPU_GET(curpmap) == smp_tlb_pmap) { + load_cr3(smp_tlb_pmap->pm_cr3 | + smp_tlb_pmap->pm_pcids[PCPU_GET(cpuid)].pm_pcid); + } + } atomic_add_int(&smp_tlb_wait, 1); } @@ -632,60 +582,15 @@ invlpg_handler(void) (*ipi_invlpg_counts[PCPU_GET(cpuid)])++; #endif /* COUNT_IPIS */ - invlpg(smp_tlb_invpcid.addr); + invlpg(smp_tlb_addr1); atomic_add_int(&smp_tlb_wait, 1); } -void -invlpg_pcid_handler(void) -{ - uint64_t cr3; -#ifdef COUNT_XINVLTLB_HITS - xhits_pg[PCPU_GET(cpuid)]++; -#endif /* COUNT_XINVLTLB_HITS */ -#ifdef COUNT_IPIS - (*ipi_invlpg_counts[PCPU_GET(cpuid)])++; -#endif /* COUNT_IPIS */ - - if (smp_tlb_invpcid.pcid == (uint64_t)-1) { - invltlb_globpcid(); - } else if (smp_tlb_invpcid.pcid == 0) { - invlpg(smp_tlb_invpcid.addr); - } else if (invpcid_works) { - invpcid(&smp_tlb_invpcid, INVPCID_ADDR); - } else { - /* - * PCID supported, but INVPCID is not. - * Temporarily switch to the target address - * space and do INVLPG. - */ - cr3 = rcr3(); - if (cr3 != pcid_cr3) - load_cr3(pcid_cr3 | CR3_PCID_SAVE); - invlpg(smp_tlb_invpcid.addr); - load_cr3(cr3 | CR3_PCID_SAVE); - } - - atomic_add_int(&smp_tlb_wait, 1); -} - -static inline void -invlpg_range(vm_offset_t start, vm_offset_t end) -{ - - do { - invlpg(start); - start += PAGE_SIZE; - } while (start < end); -} - void invlrng_handler(void) { - struct invpcid_descr d; vm_offset_t addr; - uint64_t cr3; - u_int cpuid; + #ifdef COUNT_XINVLTLB_HITS xhits_rng[PCPU_GET(cpuid)]++; #endif /* COUNT_XINVLTLB_HITS */ @@ -693,38 +598,11 @@ invlrng_handler(void) (*ipi_invlrng_counts[PCPU_GET(cpuid)])++; #endif /* COUNT_IPIS */ - addr = smp_tlb_invpcid.addr; - if (pmap_pcid_enabled) { - if (smp_tlb_invpcid.pcid == 0) { - /* - * kernel pmap - use invlpg to invalidate - * global mapping. - */ - invlpg_range(addr, smp_tlb_addr2); - } else if (smp_tlb_invpcid.pcid == (uint64_t)-1) { - invltlb_globpcid(); - if (smp_tlb_pmap != NULL) { - cpuid = PCPU_GET(cpuid); - if (!CPU_ISSET(cpuid, &smp_tlb_pmap->pm_active)) - CPU_CLR_ATOMIC(cpuid, - &smp_tlb_pmap->pm_save); - } - } else if (invpcid_works) { - d = smp_tlb_invpcid; - do { - invpcid(&d, INVPCID_ADDR); - d.addr += PAGE_SIZE; - } while (d.addr <= smp_tlb_addr2); - } else { - cr3 = rcr3(); - if (cr3 != pcid_cr3) - load_cr3(pcid_cr3 | CR3_PCID_SAVE); - invlpg_range(addr, smp_tlb_addr2); - load_cr3(cr3 | CR3_PCID_SAVE); - } - } else { - invlpg_range(addr, smp_tlb_addr2); - } + addr = smp_tlb_addr1; + do { + invlpg(addr); + addr += PAGE_SIZE; + } while (addr < smp_tlb_addr2); atomic_add_int(&smp_tlb_wait, 1); } diff --git a/sys/amd64/amd64/mp_watchdog.c b/sys/amd64/amd64/mp_watchdog.c index b03d2614d9b5..f6b853a22352 100644 --- a/sys/amd64/amd64/mp_watchdog.c +++ b/sys/amd64/amd64/mp_watchdog.c @@ -85,7 +85,7 @@ static void watchdog_init(void *arg) { - callout_init(&watchdog_callout, CALLOUT_MPSAFE); + callout_init(&watchdog_callout, 1); if (watchdog_cpu != -1) watchdog_change(watchdog_cpu); } diff --git a/sys/amd64/amd64/pmap.c b/sys/amd64/amd64/pmap.c index dc823fa355ca..5f9ee9166286 100644 --- a/sys/amd64/amd64/pmap.c +++ b/sys/amd64/amd64/pmap.c @@ -273,6 +273,8 @@ pmap_modified_bit(pmap_t pmap) return (mask); } +extern struct pcpu __pcpu[]; + #if !defined(DIAGNOSTIC) #ifdef __GNUC_GNU_INLINE__ #define PMAP_INLINE __attribute__((__gnu_inline__)) inline @@ -379,9 +381,7 @@ caddr_t CADDR1 = 0; static int pmap_flags = PMAP_PDE_SUPERPAGE; /* flags for x86 pmaps */ -static struct unrhdr pcid_unr; -static struct mtx pcid_mtx; -int pmap_pcid_enabled = 0; +int pmap_pcid_enabled = 1; SYSCTL_INT(_vm_pmap, OID_AUTO, pcid_enabled, CTLFLAG_RDTUN | CTLFLAG_NOFETCH, &pmap_pcid_enabled, 0, "Is TLB Context ID enabled ?"); int invpcid_works = 0; @@ -827,6 +827,7 @@ pmap_bootstrap(vm_paddr_t *firstaddr) { vm_offset_t va; pt_entry_t *pte; + int i; /* * Create an initial set of page tables to run the kernel in. @@ -861,7 +862,6 @@ pmap_bootstrap(vm_paddr_t *firstaddr) kernel_pmap->pm_pml4 = (pdp_entry_t *)PHYS_TO_DMAP(KPML4phys); kernel_pmap->pm_cr3 = KPML4phys; CPU_FILL(&kernel_pmap->pm_active); /* don't allow deactivation */ - CPU_FILL(&kernel_pmap->pm_save); /* always superset of pm_active */ TAILQ_INIT(&kernel_pmap->pm_pvchunk); kernel_pmap->pm_flags = pmap_flags; @@ -895,18 +895,24 @@ pmap_bootstrap(vm_paddr_t *firstaddr) /* Initialize TLB Context Id. */ TUNABLE_INT_FETCH("vm.pmap.pcid_enabled", &pmap_pcid_enabled); if ((cpu_feature2 & CPUID2_PCID) != 0 && pmap_pcid_enabled) { - load_cr4(rcr4() | CR4_PCIDE); - mtx_init(&pcid_mtx, "pcid", NULL, MTX_DEF); - init_unrhdr(&pcid_unr, 1, (1 << 12) - 1, &pcid_mtx); /* Check for INVPCID support */ invpcid_works = (cpu_stdext_feature & CPUID_STDEXT_INVPCID) != 0; - kernel_pmap->pm_pcid = 0; -#ifndef SMP - pmap_pcid_enabled = 0; -#endif - } else + for (i = 0; i < MAXCPU; i++) { + kernel_pmap->pm_pcids[i].pm_pcid = PMAP_PCID_KERN; + kernel_pmap->pm_pcids[i].pm_gen = 1; + } + __pcpu[0].pc_pcid_next = PMAP_PCID_KERN + 1; + __pcpu[0].pc_pcid_gen = 1; + /* + * pcpu area for APs is zeroed during AP startup. + * pc_pcid_next and pc_pcid_gen are initialized by AP + * during pcpu setup. + */ + load_cr4(rcr4() | CR4_PCIDE); + } else { pmap_pcid_enabled = 0; + } } /* @@ -1277,28 +1283,6 @@ pmap_update_pde_invalidate(pmap_t pmap, vm_offset_t va, pd_entry_t newpde) } #ifdef SMP -static void -pmap_invalidate_page_pcid(pmap_t pmap, vm_offset_t va) -{ - struct invpcid_descr d; - uint64_t cr3; - - if (invpcid_works) { - d.pcid = pmap->pm_pcid; - d.pad = 0; - d.addr = va; - invpcid(&d, INVPCID_ADDR); - return; - } - - cr3 = rcr3(); - critical_enter(); - load_cr3(pmap->pm_cr3 | CR3_PCID_SAVE); - invlpg(va); - load_cr3(cr3 | CR3_PCID_SAVE); - critical_exit(); -} - /* * For SMP, these functions have to use the IPI mechanism for coherence. * @@ -1361,8 +1345,8 @@ pmap_invalidate_ept(pmap_t pmap) void pmap_invalidate_page(pmap_t pmap, vm_offset_t va) { - cpuset_t other_cpus; - u_int cpuid; + cpuset_t *mask; + u_int cpuid, i; if (pmap_type_guest(pmap)) { pmap_invalidate_ept(pmap); @@ -1373,74 +1357,33 @@ pmap_invalidate_page(pmap_t pmap, vm_offset_t va) ("pmap_invalidate_page: invalid type %d", pmap->pm_type)); sched_pin(); - if (pmap == kernel_pmap || !CPU_CMP(&pmap->pm_active, &all_cpus)) { - if (!pmap_pcid_enabled) { - invlpg(va); - } else { - if (pmap->pm_pcid != -1 && pmap->pm_pcid != 0) { - if (pmap == PCPU_GET(curpmap)) - invlpg(va); - else - pmap_invalidate_page_pcid(pmap, va); - } else { - invltlb_globpcid(); - } - } - smp_invlpg(pmap, va); + if (pmap == kernel_pmap) { + invlpg(va); + mask = &all_cpus; } else { cpuid = PCPU_GET(cpuid); - other_cpus = all_cpus; - CPU_CLR(cpuid, &other_cpus); - if (CPU_ISSET(cpuid, &pmap->pm_active)) + if (pmap == PCPU_GET(curpmap)) invlpg(va); - else if (pmap_pcid_enabled) { - if (pmap->pm_pcid != -1 && pmap->pm_pcid != 0) - pmap_invalidate_page_pcid(pmap, va); - else - invltlb_globpcid(); + else if (pmap_pcid_enabled) + pmap->pm_pcids[cpuid].pm_gen = 0; + if (pmap_pcid_enabled) { + CPU_FOREACH(i) { + if (cpuid != i) + pmap->pm_pcids[i].pm_gen = 0; + } } - if (pmap_pcid_enabled) - CPU_AND(&other_cpus, &pmap->pm_save); - else - CPU_AND(&other_cpus, &pmap->pm_active); - if (!CPU_EMPTY(&other_cpus)) - smp_masked_invlpg(other_cpus, pmap, va); + mask = &pmap->pm_active; } + smp_masked_invlpg(*mask, va); sched_unpin(); } -static void -pmap_invalidate_range_pcid(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) -{ - struct invpcid_descr d; - uint64_t cr3; - vm_offset_t addr; - - if (invpcid_works) { - d.pcid = pmap->pm_pcid; - d.pad = 0; - for (addr = sva; addr < eva; addr += PAGE_SIZE) { - d.addr = addr; - invpcid(&d, INVPCID_ADDR); - } - return; - } - - cr3 = rcr3(); - critical_enter(); - load_cr3(pmap->pm_cr3 | CR3_PCID_SAVE); - for (addr = sva; addr < eva; addr += PAGE_SIZE) - invlpg(addr); - load_cr3(cr3 | CR3_PCID_SAVE); - critical_exit(); -} - void pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) { - cpuset_t other_cpus; + cpuset_t *mask; vm_offset_t addr; - u_int cpuid; + u_int cpuid, i; if (pmap_type_guest(pmap)) { pmap_invalidate_ept(pmap); @@ -1451,55 +1394,36 @@ pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) ("pmap_invalidate_range: invalid type %d", pmap->pm_type)); sched_pin(); - if (pmap == kernel_pmap || !CPU_CMP(&pmap->pm_active, &all_cpus)) { - if (!pmap_pcid_enabled) { - for (addr = sva; addr < eva; addr += PAGE_SIZE) - invlpg(addr); - } else { - if (pmap->pm_pcid != -1 && pmap->pm_pcid != 0) { - if (pmap == PCPU_GET(curpmap)) { - for (addr = sva; addr < eva; - addr += PAGE_SIZE) - invlpg(addr); - } else { - pmap_invalidate_range_pcid(pmap, - sva, eva); - } - } else { - invltlb_globpcid(); - } - } - smp_invlpg_range(pmap, sva, eva); + cpuid = PCPU_GET(cpuid); + if (pmap == kernel_pmap) { + for (addr = sva; addr < eva; addr += PAGE_SIZE) + invlpg(addr); + mask = &all_cpus; } else { - cpuid = PCPU_GET(cpuid); - other_cpus = all_cpus; - CPU_CLR(cpuid, &other_cpus); - if (CPU_ISSET(cpuid, &pmap->pm_active)) { + if (pmap == PCPU_GET(curpmap)) { for (addr = sva; addr < eva; addr += PAGE_SIZE) invlpg(addr); } else if (pmap_pcid_enabled) { - if (pmap->pm_pcid != -1 && pmap->pm_pcid != 0) - pmap_invalidate_range_pcid(pmap, sva, eva); - else - invltlb_globpcid(); + pmap->pm_pcids[cpuid].pm_gen = 0; } - if (pmap_pcid_enabled) - CPU_AND(&other_cpus, &pmap->pm_save); - else - CPU_AND(&other_cpus, &pmap->pm_active); - if (!CPU_EMPTY(&other_cpus)) - smp_masked_invlpg_range(other_cpus, pmap, sva, eva); + if (pmap_pcid_enabled) { + CPU_FOREACH(i) { + if (cpuid != i) + pmap->pm_pcids[i].pm_gen = 0; + } + } + mask = &pmap->pm_active; } + smp_masked_invlpg_range(*mask, sva, eva); sched_unpin(); } void pmap_invalidate_all(pmap_t pmap) { - cpuset_t other_cpus; + cpuset_t *mask; struct invpcid_descr d; - uint64_t cr3; - u_int cpuid; + u_int cpuid, i; if (pmap_type_guest(pmap)) { pmap_invalidate_ept(pmap); @@ -1510,60 +1434,42 @@ pmap_invalidate_all(pmap_t pmap) ("pmap_invalidate_all: invalid type %d", pmap->pm_type)); sched_pin(); - cpuid = PCPU_GET(cpuid); - if (pmap == kernel_pmap || - (pmap_pcid_enabled && !CPU_CMP(&pmap->pm_save, &all_cpus)) || - !CPU_CMP(&pmap->pm_active, &all_cpus)) { - if (invpcid_works) { + if (pmap == kernel_pmap) { + if (pmap_pcid_enabled && invpcid_works) { bzero(&d, sizeof(d)); invpcid(&d, INVPCID_CTXGLOB); } else { invltlb_globpcid(); } - if (!CPU_ISSET(cpuid, &pmap->pm_active)) - CPU_CLR_ATOMIC(cpuid, &pmap->pm_save); - smp_invltlb(pmap); + mask = &all_cpus; } else { - other_cpus = all_cpus; - CPU_CLR(cpuid, &other_cpus); - - /* - * This logic is duplicated in the Xinvltlb shootdown - * IPI handler. - */ - if (pmap_pcid_enabled) { - if (pmap->pm_pcid != -1 && pmap->pm_pcid != 0) { + cpuid = PCPU_GET(cpuid); + if (pmap == PCPU_GET(curpmap)) { + if (pmap_pcid_enabled) { if (invpcid_works) { - d.pcid = pmap->pm_pcid; + d.pcid = pmap->pm_pcids[cpuid].pm_pcid; d.pad = 0; d.addr = 0; invpcid(&d, INVPCID_CTX); } else { - cr3 = rcr3(); - critical_enter(); - - /* - * Bit 63 is clear, pcid TLB - * entries are invalidated. - */ - load_cr3(pmap->pm_cr3); - load_cr3(cr3 | CR3_PCID_SAVE); - critical_exit(); + load_cr3(pmap->pm_cr3 | pmap->pm_pcids + [PCPU_GET(cpuid)].pm_pcid); } } else { - invltlb_globpcid(); + invltlb(); } - } else if (CPU_ISSET(cpuid, &pmap->pm_active)) - invltlb(); - if (!CPU_ISSET(cpuid, &pmap->pm_active)) - CPU_CLR_ATOMIC(cpuid, &pmap->pm_save); - if (pmap_pcid_enabled) - CPU_AND(&other_cpus, &pmap->pm_save); - else - CPU_AND(&other_cpus, &pmap->pm_active); - if (!CPU_EMPTY(&other_cpus)) - smp_masked_invltlb(other_cpus, pmap); + } else if (pmap_pcid_enabled) { + pmap->pm_pcids[cpuid].pm_gen = 0; + } + if (pmap_pcid_enabled) { + CPU_FOREACH(i) { + if (cpuid != i) + pmap->pm_pcids[i].pm_gen = 0; + } + } + mask = &pmap->pm_active; } + smp_masked_invltlb(*mask, pmap); sched_unpin(); } @@ -1627,7 +1533,6 @@ pmap_update_pde(pmap_t pmap, vm_offset_t va, pd_entry_t *pde, pd_entry_t newpde) active = all_cpus; else { active = pmap->pm_active; - CPU_AND_ATOMIC(&pmap->pm_save, &active); } if (CPU_OVERLAP(&active, &other_cpus)) { act.store = cpuid; @@ -1650,61 +1555,79 @@ pmap_update_pde(pmap_t pmap, vm_offset_t va, pd_entry_t *pde, pd_entry_t newpde) #else /* !SMP */ /* * Normal, non-SMP, invalidation functions. - * We inline these within pmap.c for speed. */ -PMAP_INLINE void +void pmap_invalidate_page(pmap_t pmap, vm_offset_t va) { - switch (pmap->pm_type) { - case PT_X86: - if (pmap == kernel_pmap || !CPU_EMPTY(&pmap->pm_active)) - invlpg(va); - break; - case PT_RVI: - case PT_EPT: + if (pmap->pm_type == PT_RVI || pmap->pm_type == PT_EPT) { pmap->pm_eptgen++; - break; - default: - panic("pmap_invalidate_page: unknown type: %d", pmap->pm_type); + return; } + KASSERT(pmap->pm_type == PT_X86, + ("pmap_invalidate_range: unknown type %d", pmap->pm_type)); + + if (pmap == kernel_pmap || pmap == PCPU_GET(curpmap)) + invlpg(va); + else if (pmap_pcid_enabled) + pmap->pm_pcids[0].pm_gen = 0; } -PMAP_INLINE void +void pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) { vm_offset_t addr; - switch (pmap->pm_type) { - case PT_X86: - if (pmap == kernel_pmap || !CPU_EMPTY(&pmap->pm_active)) - for (addr = sva; addr < eva; addr += PAGE_SIZE) - invlpg(addr); - break; - case PT_RVI: - case PT_EPT: + if (pmap->pm_type == PT_RVI || pmap->pm_type == PT_EPT) { pmap->pm_eptgen++; - break; - default: - panic("pmap_invalidate_range: unknown type: %d", pmap->pm_type); + return; + } + KASSERT(pmap->pm_type == PT_X86, + ("pmap_invalidate_range: unknown type %d", pmap->pm_type)); + + if (pmap == kernel_pmap || pmap == PCPU_GET(curpmap)) { + for (addr = sva; addr < eva; addr += PAGE_SIZE) + invlpg(addr); + } else if (pmap_pcid_enabled) { + pmap->pm_pcids[0].pm_gen = 0; } } -PMAP_INLINE void +void pmap_invalidate_all(pmap_t pmap) { + struct invpcid_descr d; - switch (pmap->pm_type) { - case PT_X86: - if (pmap == kernel_pmap || !CPU_EMPTY(&pmap->pm_active)) - invltlb(); - break; - case PT_RVI: - case PT_EPT: + if (pmap->pm_type == PT_RVI || pmap->pm_type == PT_EPT) { pmap->pm_eptgen++; - break; - default: - panic("pmap_invalidate_all: unknown type %d", pmap->pm_type); + return; + } + KASSERT(pmap->pm_type == PT_X86, + ("pmap_invalidate_all: unknown type %d", pmap->pm_type)); + + if (pmap == kernel_pmap) { + if (pmap_pcid_enabled && invpcid_works) { + bzero(&d, sizeof(d)); + invpcid(&d, INVPCID_CTXGLOB); + } else { + invltlb_globpcid(); + } + } else if (pmap == PCPU_GET(curpmap)) { + if (pmap_pcid_enabled) { + if (invpcid_works) { + d.pcid = pmap->pm_pcids[0].pm_pcid; + d.pad = 0; + d.addr = 0; + invpcid(&d, INVPCID_CTX); + } else { + load_cr3(pmap->pm_cr3 | pmap->pm_pcids[0]. + pm_pcid); + } + } else { + invltlb(); + } + } else if (pmap_pcid_enabled) { + pmap->pm_pcids[0].pm_gen = 0; } } @@ -1720,10 +1643,10 @@ pmap_update_pde(pmap_t pmap, vm_offset_t va, pd_entry_t *pde, pd_entry_t newpde) { pmap_update_pde_store(pmap, pde, newpde); - if (pmap == kernel_pmap || !CPU_EMPTY(&pmap->pm_active)) + if (pmap == kernel_pmap || pmap == PCPU_GET(curpmap)) pmap_update_pde_invalidate(pmap, va, newpde); else - CPU_ZERO(&pmap->pm_save); + pmap->pm_pcids[0].pm_gen = 0; } #endif /* !SMP */ @@ -2199,18 +2122,23 @@ pmap_unuse_pt(pmap_t pmap, vm_offset_t va, pd_entry_t ptepde, void pmap_pinit0(pmap_t pmap) { + int i; PMAP_LOCK_INIT(pmap); pmap->pm_pml4 = (pml4_entry_t *)PHYS_TO_DMAP(KPML4phys); pmap->pm_cr3 = KPML4phys; pmap->pm_root.rt_root = 0; CPU_ZERO(&pmap->pm_active); - CPU_ZERO(&pmap->pm_save); - PCPU_SET(curpmap, pmap); TAILQ_INIT(&pmap->pm_pvchunk); bzero(&pmap->pm_stats, sizeof pmap->pm_stats); - pmap->pm_pcid = pmap_pcid_enabled ? 0 : -1; pmap->pm_flags = pmap_flags; + CPU_FOREACH(i) { + pmap->pm_pcids[i].pm_pcid = PMAP_PCID_NONE; + pmap->pm_pcids[i].pm_gen = 0; + } + PCPU_SET(curpmap, kernel_pmap); + pmap_activate(curthread); + CPU_FILL(&kernel_pmap->pm_active); } /* @@ -2233,7 +2161,10 @@ pmap_pinit_type(pmap_t pmap, enum pmap_type pm_type, int flags) pml4phys = VM_PAGE_TO_PHYS(pml4pg); pmap->pm_pml4 = (pml4_entry_t *)PHYS_TO_DMAP(pml4phys); - pmap->pm_pcid = -1; + CPU_FOREACH(i) { + pmap->pm_pcids[i].pm_pcid = PMAP_PCID_NONE; + pmap->pm_pcids[i].pm_gen = 0; + } pmap->pm_cr3 = ~0; /* initialize to an invalid value */ if ((pml4pg->flags & PG_ZERO) == 0) @@ -2260,12 +2191,6 @@ pmap_pinit_type(pmap_t pmap, enum pmap_type pm_type, int flags) /* install self-referential address mapping entry(s) */ pmap->pm_pml4[PML4PML4I] = VM_PAGE_TO_PHYS(pml4pg) | X86_PG_V | X86_PG_RW | X86_PG_A | X86_PG_M; - - if (pmap_pcid_enabled) { - pmap->pm_pcid = alloc_unr(&pcid_unr); - if (pmap->pm_pcid != -1) - pmap->pm_cr3 |= pmap->pm_pcid; - } } pmap->pm_root.rt_root = 0; @@ -2274,7 +2199,6 @@ pmap_pinit_type(pmap_t pmap, enum pmap_type pm_type, int flags) bzero(&pmap->pm_stats, sizeof pmap->pm_stats); pmap->pm_flags = flags; pmap->pm_eptgen = 0; - CPU_ZERO(&pmap->pm_save); return (1); } @@ -2535,14 +2459,6 @@ pmap_release(pmap_t pmap) KASSERT(CPU_EMPTY(&pmap->pm_active), ("releasing active pmap %p", pmap)); - if (pmap_pcid_enabled) { - /* - * Invalidate any left TLB entries, to allow the reuse - * of the pcid. - */ - pmap_invalidate_all(pmap); - } - m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pmap->pm_pml4)); for (i = 0; i < NKPML4E; i++) /* KVA */ @@ -2554,8 +2470,6 @@ pmap_release(pmap_t pmap) m->wire_count--; atomic_subtract_int(&vm_cnt.v_wire_count, 1); vm_page_free_zero(m); - if (pmap->pm_pcid != -1) - free_unr(&pcid_unr, pmap->pm_pcid); } static int @@ -6657,28 +6571,85 @@ pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa) return (val); } +static uint64_t +pmap_pcid_alloc(pmap_t pmap, u_int cpuid) +{ + uint32_t gen, new_gen, pcid_next; + + CRITICAL_ASSERT(curthread); + gen = PCPU_GET(pcid_gen); + if (pmap->pm_pcids[cpuid].pm_pcid == PMAP_PCID_KERN || + pmap->pm_pcids[cpuid].pm_gen == gen) + return (CR3_PCID_SAVE); + pcid_next = PCPU_GET(pcid_next); + KASSERT(pcid_next <= PMAP_PCID_OVERMAX, ("cpu %d pcid_next %#x", + cpuid, pcid_next)); + if (pcid_next == PMAP_PCID_OVERMAX) { + new_gen = gen + 1; + if (new_gen == 0) + new_gen = 1; + PCPU_SET(pcid_gen, new_gen); + pcid_next = PMAP_PCID_KERN + 1; + } else { + new_gen = gen; + } + pmap->pm_pcids[cpuid].pm_pcid = pcid_next; + pmap->pm_pcids[cpuid].pm_gen = new_gen; + PCPU_SET(pcid_next, pcid_next + 1); + return (0); +} + +void +pmap_activate_sw(struct thread *td) +{ + pmap_t oldpmap, pmap; + uint64_t cached, cr3; + u_int cpuid; + + oldpmap = PCPU_GET(curpmap); + pmap = vmspace_pmap(td->td_proc->p_vmspace); + if (oldpmap == pmap) + return; + cpuid = PCPU_GET(cpuid); +#ifdef SMP + CPU_SET_ATOMIC(cpuid, &pmap->pm_active); +#else + CPU_SET(cpuid, &pmap->pm_active); +#endif + cr3 = rcr3(); + if (pmap_pcid_enabled) { + cached = pmap_pcid_alloc(pmap, cpuid); + KASSERT(pmap->pm_pcids[cpuid].pm_pcid >= 0 && + pmap->pm_pcids[cpuid].pm_pcid < PMAP_PCID_OVERMAX, + ("pmap %p cpu %d pcid %#x", pmap, cpuid, + pmap->pm_pcids[cpuid].pm_pcid)); + KASSERT(pmap->pm_pcids[cpuid].pm_pcid != PMAP_PCID_KERN || + pmap == kernel_pmap, + ("non-kernel pmap thread %p pmap %p cpu %d pcid %#x", + td, pmap, cpuid, pmap->pm_pcids[cpuid].pm_pcid)); + if (!cached || (cr3 & ~CR3_PCID_MASK) != pmap->pm_cr3) { + load_cr3(pmap->pm_cr3 | pmap->pm_pcids[cpuid].pm_pcid | + cached); + if (cached) + PCPU_INC(pm_save_cnt); + } + } else if (cr3 != pmap->pm_cr3) { + load_cr3(pmap->pm_cr3); + } + PCPU_SET(curpmap, pmap); +#ifdef SMP + CPU_CLR_ATOMIC(cpuid, &oldpmap->pm_active); +#else + CPU_CLR(cpuid, &oldpmap->pm_active); +#endif +} + void pmap_activate(struct thread *td) { - pmap_t pmap, oldpmap; - u_int cpuid; critical_enter(); - pmap = vmspace_pmap(td->td_proc->p_vmspace); - oldpmap = PCPU_GET(curpmap); - cpuid = PCPU_GET(cpuid); -#ifdef SMP - CPU_CLR_ATOMIC(cpuid, &oldpmap->pm_active); - CPU_SET_ATOMIC(cpuid, &pmap->pm_active); - CPU_SET_ATOMIC(cpuid, &pmap->pm_save); -#else - CPU_CLR(cpuid, &oldpmap->pm_active); - CPU_SET(cpuid, &pmap->pm_active); - CPU_SET(cpuid, &pmap->pm_save); -#endif - td->td_pcb->pcb_cr3 = pmap->pm_cr3; - load_cr3(pmap->pm_cr3); - PCPU_SET(curpmap, pmap); + pmap_activate_sw(td); critical_exit(); } diff --git a/sys/amd64/amd64/vm_machdep.c b/sys/amd64/amd64/vm_machdep.c index 26ac7abd072c..0d03ed60a425 100644 --- a/sys/amd64/amd64/vm_machdep.c +++ b/sys/amd64/amd64/vm_machdep.c @@ -219,7 +219,6 @@ cpu_fork(td1, p2, td2, flags) * return address on stack. These are the kernel mode register values. */ pmap2 = vmspace_pmap(p2->p_vmspace); - pcb2->pcb_cr3 = pmap2->pm_cr3; pcb2->pcb_r12 = (register_t)fork_return; /* fork_trampoline argument */ pcb2->pcb_rbp = 0; pcb2->pcb_rsp = (register_t)td2->td_frame - sizeof(void *); @@ -477,7 +476,6 @@ cpu_set_upcall(struct thread *td, struct thread *td0) pcb2->pcb_rip = (register_t)fork_trampoline; /* * If we didn't copy the pcb, we'd need to do the following registers: - * pcb2->pcb_cr3: cloned above. * pcb2->pcb_dr*: cloned above. * pcb2->pcb_savefpu: cloned above. * pcb2->pcb_onfault: cloned above (always NULL here?). diff --git a/sys/amd64/conf/GENERIC b/sys/amd64/conf/GENERIC index c24dd5ac918b..3d2cc39c6353 100644 --- a/sys/amd64/conf/GENERIC +++ b/sys/amd64/conf/GENERIC @@ -73,6 +73,9 @@ options KDTRACE_FRAME # Ensure frames are compiled in options KDTRACE_HOOKS # Kernel DTrace hooks options DDB_CTF # Kernel ELF linker loads CTF data options INCLUDE_CONFIG_FILE # Include this file in kernel +options RACCT # Resource accounting framework +options RACCT_DEFAULT_TO_DISABLED # Set kern.racct.enable=0 by default +options RCTL # Resource limits # Debugging support. Always need this: options KDB # Enable kernel debugger support. @@ -170,6 +173,10 @@ device mrsas # LSI/Avago MegaRAID SAS/SATA, 6Gb/s and 12Gb/s #device pst # Promise Supertrak SX6000 device twe # 3ware ATA RAID +# NVM Express (NVMe) support +device nvme # base NVMe driver +device nvd # expose NVMe namespaces as disks, depends on nvme + # atkbdc0 controls both the keyboard and the PS/2 mouse device atkbdc # AT keyboard controller device atkbd # AT keyboard diff --git a/sys/amd64/ia32/ia32_signal.c b/sys/amd64/ia32/ia32_signal.c index da01647d61df..983101319731 100644 --- a/sys/amd64/ia32/ia32_signal.c +++ b/sys/amd64/ia32/ia32_signal.c @@ -360,10 +360,6 @@ ia32_osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) } else fp = (struct ia32_sigframe3 *)regs->tf_rsp - 1; - /* Translate the signal if appropriate. */ - if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) - sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; - /* Build the argument list for the signal handler. */ sf.sf_signum = sig; sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc; @@ -498,10 +494,6 @@ freebsd4_ia32_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) sfp = (struct ia32_sigframe4 *)regs->tf_rsp - 1; PROC_UNLOCK(p); - /* Translate the signal if appropriate. */ - if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) - sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; - /* Build the argument list for the signal handler. */ sf.sf_signum = sig; sf.sf_ucontext = (register_t)&sfp->sf_uc; @@ -643,10 +635,6 @@ ia32_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) sfp = (struct ia32_sigframe *)((uintptr_t)sp & ~0xF); PROC_UNLOCK(p); - /* Translate the signal if appropriate. */ - if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) - sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; - /* Build the argument list for the signal handler. */ sf.sf_signum = sig; sf.sf_ucontext = (register_t)&sfp->sf_uc; diff --git a/sys/amd64/include/cpufunc.h b/sys/amd64/include/cpufunc.h index 7ea4bcf48850..c0c5b0a99a11 100644 --- a/sys/amd64/include/cpufunc.h +++ b/sys/amd64/include/cpufunc.h @@ -540,9 +540,8 @@ static __inline void invpcid(struct invpcid_descr *d, int type) { - /* invpcid (%rdx),%rax */ - __asm __volatile(".byte 0x66,0x0f,0x38,0x82,0x02" - : : "d" (d), "a" ((u_long)type) : "memory"); + __asm __volatile("invpcid (%0),%1" + : : "r" (d), "r" ((u_long)type) : "memory"); } static __inline u_short diff --git a/sys/amd64/include/md_var.h b/sys/amd64/include/md_var.h index 9083421642c7..0813e5fb74d3 100644 --- a/sys/amd64/include/md_var.h +++ b/sys/amd64/include/md_var.h @@ -91,6 +91,7 @@ struct dumperinfo; void *alloc_fpusave(int flags); void amd64_syscall(struct thread *td, int traced); void busdma_swi(void); +bool cpu_mwait_usable(void); void cpu_probe_amdc1e(void); void cpu_setregs(void); void doreti_iret(void) __asm(__STRING(doreti_iret)); diff --git a/sys/amd64/include/pcpu.h b/sys/amd64/include/pcpu.h index fe898e983b87..91e8fb2ecbd6 100644 --- a/sys/amd64/include/pcpu.h +++ b/sys/amd64/include/pcpu.h @@ -63,7 +63,9 @@ uint64_t pc_dbreg[16]; /* ddb debugging regs */ \ int pc_dbreg_cmd; /* ddb debugging reg cmd */ \ u_int pc_vcpu_id; /* Xen vCPU ID */ \ - char __pad[157] /* be divisor of PAGE_SIZE \ + uint32_t pc_pcid_next; \ + uint32_t pc_pcid_gen; \ + char __pad[149] /* be divisor of PAGE_SIZE \ after cache alignment */ #define PC_DBREG_CMD_NONE 0 diff --git a/sys/amd64/include/pmap.h b/sys/amd64/include/pmap.h index 868db7d7bd1d..39df87a6b343 100644 --- a/sys/amd64/include/pmap.h +++ b/sys/amd64/include/pmap.h @@ -219,6 +219,10 @@ #define ISA_HOLE_START 0xa0000 #define ISA_HOLE_LENGTH (0x100000-ISA_HOLE_START) +#define PMAP_PCID_NONE 0xffffffff +#define PMAP_PCID_KERN 0 +#define PMAP_PCID_OVERMAX 0x1000 + #ifndef LOCORE #include @@ -292,6 +296,11 @@ enum pmap_type { PT_RVI, /* AMD's nested page tables */ }; +struct pmap_pcids { + uint32_t pm_pcid; + uint32_t pm_gen; +}; + /* * The kernel virtual address (KVA) of the level 4 page table page is always * within the direct map (DMAP) region. @@ -302,13 +311,12 @@ struct pmap { uint64_t pm_cr3; TAILQ_HEAD(,pv_chunk) pm_pvchunk; /* list of mappings in pmap */ cpuset_t pm_active; /* active on cpus */ - cpuset_t pm_save; /* Context valid on cpus mask */ - int pm_pcid; /* context id */ enum pmap_type pm_type; /* regular or nested tables */ struct pmap_statistics pm_stats; /* pmap statistics */ struct vm_radix pm_root; /* spare page table pages */ long pm_eptgen; /* EPT pmap generation id */ int pm_flags; + struct pmap_pcids pm_pcids[MAXCPU]; }; /* flags */ @@ -375,6 +383,9 @@ extern vm_paddr_t dmaplimit; #define pmap_page_is_write_mapped(m) (((m)->aflags & PGA_WRITEABLE) != 0) #define pmap_unmapbios(va, sz) pmap_unmapdev((va), (sz)) +struct thread; + +void pmap_activate_sw(struct thread *); void pmap_bootstrap(vm_paddr_t *); int pmap_change_attr(vm_offset_t, vm_size_t, int); void pmap_demote_DMAP(vm_paddr_t base, vm_size_t len, boolean_t invalidate); diff --git a/sys/amd64/include/smp.h b/sys/amd64/include/smp.h index 034a693f9fec..4fd6aac856a2 100644 --- a/sys/amd64/include/smp.h +++ b/sys/amd64/include/smp.h @@ -46,6 +46,7 @@ extern struct mtx ap_boot_mtx; extern int cpu_logical; extern int cpu_cores; extern int pmap_pcid_enabled; +extern int invpcid_works; extern u_int xhits_gbl[]; extern u_int xhits_pg[]; extern u_int xhits_rng[]; @@ -53,10 +54,6 @@ extern u_int ipi_global; extern u_int ipi_page; extern u_int ipi_range; extern u_int ipi_range_size; -extern u_int ipi_masked_global; -extern u_int ipi_masked_page; -extern u_int ipi_masked_range; -extern u_int ipi_masked_range_size; extern volatile int smp_tlb_wait; @@ -78,9 +75,9 @@ extern u_long *ipi_rendezvous_counts[MAXCPU]; /* IPI handlers */ inthand_t - IDTVEC(invltlb_pcid), /* TLB shootdowns - global, pcid enabled */ IDTVEC(invltlb), /* TLB shootdowns - global */ - IDTVEC(invlpg_pcid), /* TLB shootdowns - 1 page, pcid enabled */ + IDTVEC(invltlb_pcid), /* TLB shootdowns - global, pcid */ + IDTVEC(invltlb_invpcid),/* TLB shootdowns - global, invpcid */ IDTVEC(invlpg), /* TLB shootdowns - 1 page */ IDTVEC(invlrng), /* TLB shootdowns - page range */ IDTVEC(invlcache), /* Write back and invalidate cache */ @@ -100,8 +97,8 @@ void cpususpend_handler(void); void init_secondary_tail(void); void invltlb_handler(void); void invltlb_pcid_handler(void); +void invltlb_invpcid_handler(void); void invlpg_handler(void); -void invlpg_pcid_handler(void); void invlrng_handler(void); void invlcache_handler(void); void init_secondary(void); @@ -114,13 +111,9 @@ void ipi_selected(cpuset_t cpus, u_int ipi); u_int mp_bootaddress(u_int); void set_interrupt_apic_ids(void); void smp_cache_flush(void); -void smp_invlpg(struct pmap *pmap, vm_offset_t addr); -void smp_masked_invlpg(cpuset_t mask, struct pmap *pmap, vm_offset_t addr); -void smp_invlpg_range(struct pmap *pmap, vm_offset_t startva, +void smp_masked_invlpg(cpuset_t mask, vm_offset_t addr); +void smp_masked_invlpg_range(cpuset_t mask, vm_offset_t startva, vm_offset_t endva); -void smp_masked_invlpg_range(cpuset_t mask, struct pmap *pmap, - vm_offset_t startva, vm_offset_t endva); -void smp_invltlb(struct pmap *pmap); void smp_masked_invltlb(cpuset_t mask, struct pmap *pmap); int native_start_all_aps(void); void mem_range_AP_init(void); diff --git a/sys/amd64/linux/Makefile b/sys/amd64/linux/Makefile new file mode 100644 index 000000000000..c8899e662a3a --- /dev/null +++ b/sys/amd64/linux/Makefile @@ -0,0 +1,17 @@ +# Makefile for syscall tables +# +# $FreeBSD$ + +all: + @echo "make sysent only" + +sysent: linux_sysent.c linux_syscall.h linux_proto.h linux_syscalls.c linux_systrace_args.c + +linux_sysent.c linux_syscall.h linux_proto.h linux_syscalls.c linux_systrace_args.c: \ + ../../kern/makesyscalls.sh syscalls.master syscalls.conf + -mv -f linux_sysent.c linux_sysent.c.bak + -mv -f linux_syscall.h linux_syscall.h.bak + -mv -f linux_proto.h linux_proto.h.bak + -mv -f linux_syscalls.c linux_syscalls.c.bak + -mv -f linux_systrace_args.c linux_systrace_args.c.bak + sh ../../kern/makesyscalls.sh syscalls.master syscalls.conf diff --git a/sys/amd64/linux/linux.h b/sys/amd64/linux/linux.h new file mode 100644 index 000000000000..c4fe9aede7bd --- /dev/null +++ b/sys/amd64/linux/linux.h @@ -0,0 +1,549 @@ +/*- + * Copyright (c) 2013 Dmitry Chagin + * Copyright (c) 1994-1996 Søren Schmidt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer + * in this position and unchanged. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _AMD64_LINUX_H_ +#define _AMD64_LINUX_H_ + +#include +#include + +/* + * debugging support + */ +extern u_char linux_debug_map[]; +#define ldebug(name) isclr(linux_debug_map, LINUX_SYS_linux_ ## name) +#define ARGS(nm, fmt) "linux(%ld/%ld): "#nm"("fmt")\n", \ + (long)td->td_proc->p_pid, (long)td->td_tid +#define LMSG(fmt) "linux(%ld/%ld): "fmt"\n", \ + (long)td->td_proc->p_pid, (long)td->td_tid +#define LINUX_DTRACE linuxulator + +#define PTRIN(v) (void *)(v) +#define PTROUT(v) (uintptr_t)(v) + +#define CP(src,dst,fld) do { (dst).fld = (src).fld; } while (0) +#define CP2(src,dst,sfld,dfld) do { (dst).dfld = (src).sfld; } while (0) +#define PTRIN_CP(src,dst,fld) \ + do { (dst).fld = PTRIN((src).fld); } while (0) + +/* + * Provide a separate set of types for the Linux types. + */ +typedef int32_t l_int; +typedef int64_t l_long; +typedef int16_t l_short; +typedef uint32_t l_uint; +typedef uint64_t l_ulong; +typedef uint16_t l_ushort; + +typedef l_ulong l_uintptr_t; +typedef l_long l_clock_t; +typedef l_int l_daddr_t; +typedef l_ulong l_dev_t; +typedef l_uint l_gid_t; +typedef l_uint l_uid_t; +typedef l_ulong l_ino_t; +typedef l_int l_key_t; +typedef l_long l_loff_t; +typedef l_uint l_mode_t; +typedef l_long l_off_t; +typedef l_int l_pid_t; +typedef l_ulong l_size_t; +typedef l_long l_ssize_t; +typedef l_long l_suseconds_t; +typedef l_long l_time_t; +typedef l_int l_timer_t; +typedef l_int l_mqd_t; +typedef l_size_t l_socklen_t; +typedef l_ulong l_fd_mask; + +typedef struct { + l_int val[2]; +} l_fsid_t; + +typedef struct { + l_time_t tv_sec; + l_suseconds_t tv_usec; +} l_timeval; + +#define l_fd_set fd_set + +/* + * Miscellaneous + */ +#define LINUX_NAME_MAX 255 +#define LINUX_CTL_MAXNAME 10 + +#define LINUX_AT_COUNT 19 /* Count of used aux entry types. */ + +struct l___sysctl_args +{ + l_uintptr_t name; + l_int nlen; + l_uintptr_t oldval; + l_uintptr_t oldlenp; + l_uintptr_t newval; + l_size_t newlen; + l_ulong __spare[4]; +}; + +/* Scheduling policies */ +#define LINUX_SCHED_OTHER 0 +#define LINUX_SCHED_FIFO 1 +#define LINUX_SCHED_RR 2 + +/* Resource limits */ +#define LINUX_RLIMIT_CPU 0 +#define LINUX_RLIMIT_FSIZE 1 +#define LINUX_RLIMIT_DATA 2 +#define LINUX_RLIMIT_STACK 3 +#define LINUX_RLIMIT_CORE 4 +#define LINUX_RLIMIT_RSS 5 +#define LINUX_RLIMIT_NPROC 6 +#define LINUX_RLIMIT_NOFILE 7 +#define LINUX_RLIMIT_MEMLOCK 8 +#define LINUX_RLIMIT_AS 9 /* Address space limit */ + +#define LINUX_RLIM_NLIMITS 10 + +struct l_rlimit { + l_ulong rlim_cur; + l_ulong rlim_max; +}; + +/* mmap options */ +#define LINUX_MAP_SHARED 0x0001 +#define LINUX_MAP_PRIVATE 0x0002 +#define LINUX_MAP_FIXED 0x0010 +#define LINUX_MAP_ANON 0x0020 +#define LINUX_MAP_GROWSDOWN 0x0100 + +/* + * stat family of syscalls + */ +struct l_timespec { + l_time_t tv_sec; + l_long tv_nsec; +}; + +struct l_newstat { + l_dev_t st_dev; + l_ino_t st_ino; + l_ulong st_nlink; + l_uint st_mode; + l_uid_t st_uid; + l_gid_t st_gid; + l_uint __st_pad1; + l_dev_t st_rdev; + l_off_t st_size; + l_long st_blksize; + l_long st_blocks; + struct l_timespec st_atim; + struct l_timespec st_mtim; + struct l_timespec st_ctim; + l_long __unused1; + l_long __unused2; + l_long __unused3; +}; + +/* sigaction flags */ +#define LINUX_SA_NOCLDSTOP 0x00000001 +#define LINUX_SA_NOCLDWAIT 0x00000002 +#define LINUX_SA_SIGINFO 0x00000004 +#define LINUX_SA_RESTORER 0x04000000 +#define LINUX_SA_ONSTACK 0x08000000 +#define LINUX_SA_RESTART 0x10000000 +#define LINUX_SA_INTERRUPT 0x20000000 +#define LINUX_SA_NOMASK 0x40000000 +#define LINUX_SA_ONESHOT 0x80000000 + +/* sigprocmask actions */ +#define LINUX_SIG_BLOCK 0 +#define LINUX_SIG_UNBLOCK 1 +#define LINUX_SIG_SETMASK 2 + +/* sigaltstack */ +#define LINUX_MINSIGSTKSZ 2048 + +typedef void (*l_handler_t)(l_int); + +typedef struct { + l_handler_t lsa_handler; + l_ulong lsa_flags; + l_uintptr_t lsa_restorer; + l_sigset_t lsa_mask; +} l_sigaction_t; + +typedef struct { + l_uintptr_t ss_sp; + l_int ss_flags; + l_size_t ss_size; +} l_stack_t; + +struct l_fpstate { + u_int16_t cwd; + u_int16_t swd; + u_int16_t twd; + u_int16_t fop; + u_int64_t rip; + u_int64_t rdp; + u_int32_t mxcsr; + u_int32_t mxcsr_mask; + u_int32_t st_space[32]; + u_int32_t xmm_space[64]; + u_int32_t reserved2[24]; +}; + +struct l_sigcontext { + l_ulong sc_r8; + l_ulong sc_r9; + l_ulong sc_r10; + l_ulong sc_r11; + l_ulong sc_r12; + l_ulong sc_r13; + l_ulong sc_r14; + l_ulong sc_r15; + l_ulong sc_rdi; + l_ulong sc_rsi; + l_ulong sc_rbp; + l_ulong sc_rbx; + l_ulong sc_rdx; + l_ulong sc_rax; + l_ulong sc_rcx; + l_ulong sc_rsp; + l_ulong sc_rip; + l_ulong sc_rflags; + l_ushort sc_cs; + l_ushort sc_gs; + l_ushort sc_fs; + l_ushort sc___pad0; + l_ulong sc_err; + l_ulong sc_trapno; + l_sigset_t sc_mask; + l_ulong sc_cr2; + struct l_fpstate *sc_fpstate; + l_ulong sc_reserved1[8]; +}; + +struct l_ucontext { + l_ulong uc_flags; + l_uintptr_t uc_link; + l_stack_t uc_stack; + struct l_sigcontext uc_mcontext; + l_sigset_t uc_sigmask; +}; + +#define LINUX_SI_PREAMBLE_SIZE (4 * sizeof(int)) +#define LINUX_SI_MAX_SIZE 128 +#define LINUX_SI_PAD_SIZE ((LINUX_SI_MAX_SIZE - \ + LINUX_SI_PREAMBLE_SIZE) / sizeof(l_int)) +typedef union l_sigval { + l_int sival_int; + l_uintptr_t sival_ptr; +} l_sigval_t; + +typedef struct l_siginfo { + l_int lsi_signo; + l_int lsi_errno; + l_int lsi_code; + union { + l_int _pad[LINUX_SI_PAD_SIZE]; + + struct { + l_pid_t _pid; + l_uid_t _uid; + } _kill; + + struct { + l_timer_t _tid; + l_int _overrun; + char _pad[sizeof(l_uid_t) - sizeof(int)]; + union l_sigval _sigval; + l_uint _sys_private; + } _timer; + + struct { + l_pid_t _pid; /* sender's pid */ + l_uid_t _uid; /* sender's uid */ + union l_sigval _sigval; + } _rt; + + struct { + l_pid_t _pid; /* which child */ + l_uid_t _uid; /* sender's uid */ + l_int _status; /* exit code */ + l_clock_t _utime; + l_clock_t _stime; + } _sigchld; + + struct { + l_uintptr_t _addr; /* Faulting insn/memory ref. */ + } _sigfault; + + struct { + l_long _band; /* POLL_IN,POLL_OUT,POLL_MSG */ + l_int _fd; + } _sigpoll; + } _sifields; +} l_siginfo_t; + +#define lsi_pid _sifields._kill._pid +#define lsi_uid _sifields._kill._uid +#define lsi_tid _sifields._timer._tid +#define lsi_overrun _sifields._timer._overrun +#define lsi_sys_private _sifields._timer._sys_private +#define lsi_status _sifields._sigchld._status +#define lsi_utime _sifields._sigchld._utime +#define lsi_stime _sifields._sigchld._stime +#define lsi_value _sifields._rt._sigval +#define lsi_int _sifields._rt._sigval.sival_int +#define lsi_ptr _sifields._rt._sigval.sival_ptr +#define lsi_addr _sifields._sigfault._addr +#define lsi_band _sifields._sigpoll._band +#define lsi_fd _sifields._sigpoll._fd + +/* + * We make the stack look like Linux expects it when calling a signal + * handler, but use the BSD way of calling the handler and sigreturn(). + * This means that we need to pass the pointer to the handler too. + * It is appended to the frame to not interfere with the rest of it. + */ + +struct l_rt_sigframe { + struct l_ucontext sf_sc; + struct l_siginfo sf_si; + l_handler_t sf_handler; +}; + +/* + * mount flags + */ +#define LINUX_MS_RDONLY 0x0001 +#define LINUX_MS_NOSUID 0x0002 +#define LINUX_MS_NODEV 0x0004 +#define LINUX_MS_NOEXEC 0x0008 +#define LINUX_MS_REMOUNT 0x0020 + +/* + * SystemV IPC defines + */ +#define LINUX_IPC_RMID 0 +#define LINUX_IPC_SET 1 +#define LINUX_IPC_STAT 2 +#define LINUX_IPC_INFO 3 + +#define LINUX_SHM_LOCK 11 +#define LINUX_SHM_UNLOCK 12 +#define LINUX_SHM_STAT 13 +#define LINUX_SHM_INFO 14 + +#define LINUX_SHM_RDONLY 0x1000 +#define LINUX_SHM_RND 0x2000 +#define LINUX_SHM_REMAP 0x4000 + +/* semctl commands */ +#define LINUX_GETPID 11 +#define LINUX_GETVAL 12 +#define LINUX_GETALL 13 +#define LINUX_GETNCNT 14 +#define LINUX_GETZCNT 15 +#define LINUX_SETVAL 16 +#define LINUX_SETALL 17 +#define LINUX_SEM_STAT 18 +#define LINUX_SEM_INFO 19 + +union l_semun { + l_int val; + l_uintptr_t buf; + l_uintptr_t array; + l_uintptr_t __buf; + l_uintptr_t __pad; +}; + +struct l_ipc_perm { + l_key_t key; + l_uid_t uid; + l_gid_t gid; + l_uid_t cuid; + l_gid_t cgid; + l_ushort mode; + l_ushort seq; +}; + +/* + * Socket defines + */ + +#define LINUX_SOL_SOCKET 1 +#define LINUX_SOL_IP 0 +#define LINUX_SOL_IPX 256 +#define LINUX_SOL_AX25 257 +#define LINUX_SOL_TCP 6 +#define LINUX_SOL_UDP 17 + +#define LINUX_SO_DEBUG 1 +#define LINUX_SO_REUSEADDR 2 +#define LINUX_SO_TYPE 3 +#define LINUX_SO_ERROR 4 +#define LINUX_SO_DONTROUTE 5 +#define LINUX_SO_BROADCAST 6 +#define LINUX_SO_SNDBUF 7 +#define LINUX_SO_RCVBUF 8 +#define LINUX_SO_KEEPALIVE 9 +#define LINUX_SO_OOBINLINE 10 +#define LINUX_SO_NO_CHECK 11 +#define LINUX_SO_PRIORITY 12 +#define LINUX_SO_LINGER 13 +#define LINUX_SO_PASSCRED 16 +#define LINUX_SO_PEERCRED 17 +#define LINUX_SO_RCVLOWAT 18 +#define LINUX_SO_SNDLOWAT 19 +#define LINUX_SO_RCVTIMEO 20 +#define LINUX_SO_SNDTIMEO 21 +#define LINUX_SO_TIMESTAMP 29 +#define LINUX_SO_ACCEPTCONN 30 + +#define LINUX_IP_TOS 1 +#define LINUX_IP_TTL 2 +#define LINUX_IP_HDRINCL 3 +#define LINUX_IP_OPTIONS 4 + +#define LINUX_IP_MULTICAST_IF 32 +#define LINUX_IP_MULTICAST_TTL 33 +#define LINUX_IP_MULTICAST_LOOP 34 +#define LINUX_IP_ADD_MEMBERSHIP 35 +#define LINUX_IP_DROP_MEMBERSHIP 36 + +struct l_sockaddr { + l_ushort sa_family; + char sa_data[14]; +}; + +struct l_ifmap { + l_ulong mem_start; + l_ulong mem_end; + l_ushort base_addr; + u_char irq; + u_char dma; + u_char port; +} __packed; + +#define LINUX_IFHWADDRLEN 6 +#define LINUX_IFNAMSIZ 16 + +struct l_ifreq { + union { + char ifrn_name[LINUX_IFNAMSIZ]; + } ifr_ifrn; + + union { + struct l_sockaddr ifru_addr; + struct l_sockaddr ifru_dstaddr; + struct l_sockaddr ifru_broadaddr; + struct l_sockaddr ifru_netmask; + struct l_sockaddr ifru_hwaddr; + l_short ifru_flags[1]; + l_int ifru_metric; + l_int ifru_mtu; + struct l_ifmap ifru_map; + char ifru_slave[LINUX_IFNAMSIZ]; + l_uintptr_t ifru_data; + } ifr_ifru; +} __packed; + +#define ifr_name ifr_ifrn.ifrn_name /* Interface name */ +#define ifr_hwaddr ifr_ifru.ifru_hwaddr /* MAC address */ + +struct l_ifconf { + int ifc_len; + union { + l_uintptr_t ifcu_buf; + l_uintptr_t ifcu_req; + } ifc_ifcu; +}; + +#define ifc_buf ifc_ifcu.ifcu_buf +#define ifc_req ifc_ifcu.ifcu_req + +/* + * poll() + */ +#define LINUX_POLLIN 0x0001 +#define LINUX_POLLPRI 0x0002 +#define LINUX_POLLOUT 0x0004 +#define LINUX_POLLERR 0x0008 +#define LINUX_POLLHUP 0x0010 +#define LINUX_POLLNVAL 0x0020 +#define LINUX_POLLRDNORM 0x0040 +#define LINUX_POLLRDBAND 0x0080 +#define LINUX_POLLWRNORM 0x0100 +#define LINUX_POLLWRBAND 0x0200 +#define LINUX_POLLMSG 0x0400 + +struct l_pollfd { + l_int fd; + l_short events; + l_short revents; +}; + + +#define LINUX_CLONE_VM 0x00000100 +#define LINUX_CLONE_FS 0x00000200 +#define LINUX_CLONE_FILES 0x00000400 +#define LINUX_CLONE_SIGHAND 0x00000800 +#define LINUX_CLONE_PID 0x00001000 /* No longer exist in Linux */ +#define LINUX_CLONE_VFORK 0x00004000 +#define LINUX_CLONE_PARENT 0x00008000 +#define LINUX_CLONE_THREAD 0x00010000 +#define LINUX_CLONE_SETTLS 0x00080000 +#define LINUX_CLONE_PARENT_SETTID 0x00100000 +#define LINUX_CLONE_CHILD_CLEARTID 0x00200000 +#define LINUX_CLONE_CHILD_SETTID 0x01000000 + +#define LINUX_ARCH_SET_GS 0x1001 +#define LINUX_ARCH_SET_FS 0x1002 +#define LINUX_ARCH_GET_GS 0x1003 +#define LINUX_ARCH_GET_FS 0x1004 + +#define linux_copyout_rusage(r, u) copyout(r, u, sizeof(*r)) + +/* robust futexes */ +struct linux_robust_list { + l_uintptr_t next; +}; + +struct linux_robust_list_head { + struct linux_robust_list list; + l_long futex_offset; + l_uintptr_t pending_list; +}; + +#endif /* !_AMD64_LINUX_H_ */ diff --git a/sys/amd64/linux/linux_dummy.c b/sys/amd64/linux/linux_dummy.c new file mode 100644 index 000000000000..96cf8d907f9d --- /dev/null +++ b/sys/amd64/linux/linux_dummy.c @@ -0,0 +1,141 @@ +/*- + * Copyright (c) 2013 Dmitry Chagin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer + * in this position and unchanged. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "opt_compat.h" +#include "opt_kdtrace.h" + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +/* DTrace init */ +LIN_SDT_PROVIDER_DECLARE(LINUX_DTRACE); + +DUMMY(mincore); +DUMMY(sendfile); +DUMMY(ptrace); +DUMMY(syslog); +DUMMY(setfsuid); +DUMMY(setfsgid); +DUMMY(sysfs); +DUMMY(vhangup); +DUMMY(pivot_root); +DUMMY(adjtimex); +DUMMY(swapoff); +DUMMY(create_module); +DUMMY(init_module); +DUMMY(delete_module); +DUMMY(get_kernel_syms); +DUMMY(query_module); +DUMMY(quotactl); +DUMMY(nfsservctl); +DUMMY(getpmsg); +DUMMY(putpmsg); +DUMMY(afs_syscall); +DUMMY(tuxcall); +DUMMY(security); +DUMMY(set_thread_area); +DUMMY(lookup_dcookie); +DUMMY(epoll_ctl_old); +DUMMY(epoll_wait_old); +DUMMY(remap_file_pages); +DUMMY(semtimedop); +DUMMY(mbind); +DUMMY(get_mempolicy); +DUMMY(set_mempolicy); +DUMMY(mq_open); +DUMMY(mq_unlink); +DUMMY(mq_timedsend); +DUMMY(mq_timedreceive); +DUMMY(mq_notify); +DUMMY(mq_getsetattr); +DUMMY(kexec_load); +DUMMY(add_key); +DUMMY(request_key); +DUMMY(keyctl); +DUMMY(ioprio_set); +DUMMY(ioprio_get); +DUMMY(inotify_init); +DUMMY(inotify_add_watch); +DUMMY(inotify_rm_watch); +DUMMY(migrate_pages); +DUMMY(unshare); +DUMMY(splice); +DUMMY(tee); +DUMMY(sync_file_range); +DUMMY(vmsplice); +DUMMY(move_pages); +DUMMY(signalfd); +DUMMY(timerfd); +DUMMY(timerfd_settime); +DUMMY(timerfd_gettime); +DUMMY(signalfd4); +DUMMY(inotify_init1); +DUMMY(preadv); +DUMMY(pwritev); +DUMMY(rt_tsigqueueinfo); +DUMMY(perf_event_open); +DUMMY(fanotify_init); +DUMMY(fanotify_mark); +DUMMY(name_to_handle_at); +DUMMY(open_by_handle_at); +DUMMY(clock_adjtime); +DUMMY(setns); +DUMMY(process_vm_readv); +DUMMY(process_vm_writev); +DUMMY(kcmp); +DUMMY(finit_module); + +#define DUMMY_XATTR(s) \ +int \ +linux_ ## s ## xattr( \ + struct thread *td, struct linux_ ## s ## xattr_args *arg) \ +{ \ + \ + return (ENOATTR); \ +} +DUMMY_XATTR(set); +DUMMY_XATTR(lset); +DUMMY_XATTR(fset); +DUMMY_XATTR(get); +DUMMY_XATTR(lget); +DUMMY_XATTR(fget); +DUMMY_XATTR(list); +DUMMY_XATTR(llist); +DUMMY_XATTR(flist); +DUMMY_XATTR(remove); +DUMMY_XATTR(lremove); +DUMMY_XATTR(fremove); diff --git a/sys/amd64/linux/linux_genassym.c b/sys/amd64/linux/linux_genassym.c new file mode 100644 index 000000000000..0edb6a043531 --- /dev/null +++ b/sys/amd64/linux/linux_genassym.c @@ -0,0 +1,15 @@ +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include + +#include +#include + +ASSYM(LINUX_RT_SIGF_HANDLER, offsetof(struct l_rt_sigframe, sf_handler)); +ASSYM(LINUX_RT_SIGF_UC, offsetof(struct l_rt_sigframe, sf_sc)); +ASSYM(LINUX_RT_SIGF_SC, offsetof(struct l_ucontext, uc_mcontext)); +ASSYM(LINUX_VERSION_CODE, LINUX_VERSION_CODE); +ASSYM(LINUX_SC_RSP, offsetof(struct l_sigcontext, sc_rsp)); diff --git a/sys/amd64/linux/linux_ipc64.h b/sys/amd64/linux/linux_ipc64.h new file mode 100644 index 000000000000..913fc1a51723 --- /dev/null +++ b/sys/amd64/linux/linux_ipc64.h @@ -0,0 +1,142 @@ +/*- + * Copyright (c) 2002 Maxim Sobolev + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer + * in this position and unchanged. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _AMD64_LINUX_LINUX_IPC64_H_ +#define _AMD64_LINUX_LINUX_IPC64_H_ + +/* + * The ipc64_perm structure for i386 architecture. + * Note extra padding because this structure is passed back and forth + * between kernel and user space. + * + * Pad space is left for: + * - 32-bit mode_t and seq + * - 2 miscellaneous 32-bit values + */ + +struct l_ipc64_perm +{ + l_key_t key; + l_uid_t uid; + l_gid_t gid; + l_uid_t cuid; + l_gid_t cgid; + l_mode_t mode; + l_ushort __pad1; + l_ushort seq; + l_ushort __pad2; + l_ulong __unused1; + l_ulong __unused2; +}; + +/* + * The msqid64_ds structure for i386 architecture. + * Note extra padding because this structure is passed back and forth + * between kernel and user space. + * + * Pad space is left for: + * - 64-bit time_t to solve y2038 problem + * - 2 miscellaneous 32-bit values + */ + +struct l_msqid64_ds { + struct l_ipc64_perm msg_perm; + l_time_t msg_stime; /* last msgsnd time */ + l_ulong __unused1; + l_time_t msg_rtime; /* last msgrcv time */ + l_ulong __unused2; + l_time_t msg_ctime; /* last change time */ + l_ulong __unused3; + l_ulong msg_cbytes; /* current number of bytes on queue */ + l_ulong msg_qnum; /* number of messages in queue */ + l_ulong msg_qbytes; /* max number of bytes on queue */ + l_pid_t msg_lspid; /* pid of last msgsnd */ + l_pid_t msg_lrpid; /* last receive pid */ + l_ulong __unused4; + l_ulong __unused5; +}; + +/* + * The semid64_ds structure for i386 architecture. + * Note extra padding because this structure is passed back and forth + * between kernel and user space. + * + * Pad space is left for: + * - 64-bit time_t to solve y2038 problem + * - 2 miscellaneous 32-bit values + */ + +struct l_semid64_ds { + struct l_ipc64_perm sem_perm; /* permissions */ + l_time_t sem_otime; /* last semop time */ + l_ulong __unused1; + l_time_t sem_ctime; /* last change time */ + l_ulong __unused2; + l_ulong sem_nsems; /* no. of semaphores in array */ + l_ulong __unused3; + l_ulong __unused4; +}; + +/* + * The shmid64_ds structure for i386 architecture. + * Note extra padding because this structure is passed back and forth + * between kernel and user space. + * + * Pad space is left for: + * - 64-bit time_t to solve y2038 problem + * - 2 miscellaneous 32-bit values + */ + +struct l_shmid64_ds { + struct l_ipc64_perm shm_perm; /* operation perms */ + l_size_t shm_segsz; /* size of segment (bytes) */ + l_time_t shm_atime; /* last attach time */ + l_time_t shm_dtime; /* last detach time */ + l_time_t shm_ctime; /* last change time */ + l_pid_t shm_cpid; /* pid of creator */ + l_pid_t shm_lpid; /* pid of last operator */ + l_ulong shm_nattch; /* no. of current attaches */ + l_ulong __unused4; + l_ulong __unused5; +}; + +struct l_shminfo64 { + l_ulong shmmax; + l_ulong shmmin; + l_ulong shmmni; + l_ulong shmseg; + l_ulong shmall; + l_ulong __unused1; + l_ulong __unused2; + l_ulong __unused3; + l_ulong __unused4; +}; + +#endif /* !_AMD64_LINUX_LINUX_IPC64_H_ */ diff --git a/sys/amd64/linux/linux_locore.s b/sys/amd64/linux/linux_locore.s new file mode 100644 index 000000000000..5dcc09aa2c9d --- /dev/null +++ b/sys/amd64/linux/linux_locore.s @@ -0,0 +1,76 @@ +/* $FreeBSD$ */ + +#include "linux_assym.h" /* system definitions */ +#include /* miscellaneous asm macros */ + +#include /* system call numbers */ + + .data + + .globl linux_platform +linux_platform: + .asciz "x86_64" + + + .text +/* + * To avoid excess stack frame the signal trampoline code emulates + * the 'call' instruction. + */ +NON_GPROF_ENTRY(linux_rt_sigcode) + movq %rsp, %rbx /* preserve sigframe */ + call .getip +.getip: + popq %rax + add $.startrtsigcode-.getip, %rax /* ret address */ + pushq %rax + jmp *LINUX_RT_SIGF_HANDLER(%rbx) +.startrtsigcode: + movq $LINUX_SYS_linux_rt_sigreturn,%rax /* linux_rt_sigreturn() */ + syscall /* enter kernel with args */ + hlt +0: jmp 0b + +NON_GPROF_ENTRY(__vdso_clock_gettime) + movq $LINUX_SYS_linux_clock_gettime,%rax + syscall + ret +.weak clock_gettime +.set clock_gettime, __vdso_clock_gettime + +NON_GPROF_ENTRY(__vdso_time) + movq $LINUX_SYS_linux_time,%rax + syscall + ret +.weak time +.set time, __vdso_time + +NON_GPROF_ENTRY(__vdso_gettimeofday) + movq $LINUX_SYS_gettimeofday,%rax + syscall + ret +.weak gettimeofday +.set gettimeofday, __vdso_gettimeofday + +NON_GPROF_ENTRY(__vdso_getcpu) + movq $-38,%rax /* not implemented */ + ret +.weak getcpu +.set getcpu, __vdso_getcpu + +#if 0 + .section .note.Linux, "a",@note + .long 2f - 1f /* namesz */ + .balign 4 + .long 4f - 3f /* descsz */ + .long 0 +1: + .asciz "Linux" +2: + .balign 4 +3: + .long LINUX_VERSION_CODE +4: + .balign 4 + .previous +#endif diff --git a/sys/amd64/linux/linux_machdep.c b/sys/amd64/linux/linux_machdep.c new file mode 100644 index 000000000000..d6174e614ba5 --- /dev/null +++ b/sys/amd64/linux/linux_machdep.c @@ -0,0 +1,433 @@ +/*- + * Copyright (c) 2013 Dmitry Chagin + * Copyright (c) 2004 Tim J. Robbins + * Copyright (c) 2002 Doug Rabson + * Copyright (c) 2000 Marcel Moolenaar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer + * in this position and unchanged. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + + +int +linux_execve(struct thread *td, struct linux_execve_args *args) +{ + struct image_args eargs; + char *path; + int error; + + LCONVPATHEXIST(td, args->path, &path); + + LINUX_CTR(execve); + + error = exec_copyin_args(&eargs, path, UIO_SYSSPACE, args->argp, + args->envp); + free(path, M_TEMP); + if (error == 0) + error = linux_common_execve(td, &eargs); + return (error); +} + +int +linux_set_upcall_kse(struct thread *td, register_t stack) +{ + + if (stack) + td->td_frame->tf_rsp = stack; + + /* + * The newly created Linux thread returns + * to the user space by the same path that a parent do. + */ + td->td_frame->tf_rax = 0; + return (0); +} + +#define STACK_SIZE (2 * 1024 * 1024) +#define GUARD_SIZE (4 * PAGE_SIZE) + +int +linux_mmap2(struct thread *td, struct linux_mmap2_args *args) +{ + struct proc *p = td->td_proc; + struct mmap_args /* { + caddr_t addr; + size_t len; + int prot; + int flags; + int fd; + long pad; + off_t pos; + } */ bsd_args; + int error; + struct file *fp; + cap_rights_t rights; + + LINUX_CTR6(mmap2, "0x%lx, %ld, %ld, 0x%08lx, %ld, 0x%lx", + args->addr, args->len, args->prot, + args->flags, args->fd, args->pgoff); + + error = 0; + bsd_args.flags = 0; + fp = NULL; + + /* + * Linux mmap(2): + * You must specify exactly one of MAP_SHARED and MAP_PRIVATE + */ + if (! ((args->flags & LINUX_MAP_SHARED) ^ + (args->flags & LINUX_MAP_PRIVATE))) + return (EINVAL); + + if (args->flags & LINUX_MAP_SHARED) + bsd_args.flags |= MAP_SHARED; + if (args->flags & LINUX_MAP_PRIVATE) + bsd_args.flags |= MAP_PRIVATE; + if (args->flags & LINUX_MAP_FIXED) + bsd_args.flags |= MAP_FIXED; + if (args->flags & LINUX_MAP_ANON) + bsd_args.flags |= MAP_ANON; + else + bsd_args.flags |= MAP_NOSYNC; + if (args->flags & LINUX_MAP_GROWSDOWN) + bsd_args.flags |= MAP_STACK; + + /* + * PROT_READ, PROT_WRITE, or PROT_EXEC implies PROT_READ and PROT_EXEC + * on Linux/i386. We do this to ensure maximum compatibility. + * Linux/ia64 does the same in i386 emulation mode. + */ + bsd_args.prot = args->prot; + if (bsd_args.prot & (PROT_READ | PROT_WRITE | PROT_EXEC)) + bsd_args.prot |= PROT_READ | PROT_EXEC; + + /* Linux does not check file descriptor when MAP_ANONYMOUS is set. */ + bsd_args.fd = (bsd_args.flags & MAP_ANON) ? -1 : args->fd; + if (bsd_args.fd != -1) { + /* + * Linux follows Solaris mmap(2) description: + * The file descriptor fildes is opened with + * read permission, regardless of the + * protection options specified. + */ + + error = fget(td, bsd_args.fd, + cap_rights_init(&rights, CAP_MMAP), &fp); + if (error != 0 ) + return (error); + if (fp->f_type != DTYPE_VNODE) { + fdrop(fp, td); + return (EINVAL); + } + + /* Linux mmap() just fails for O_WRONLY files */ + if (!(fp->f_flag & FREAD)) { + fdrop(fp, td); + return (EACCES); + } + + fdrop(fp, td); + } + + if (args->flags & LINUX_MAP_GROWSDOWN) { + /* + * The Linux MAP_GROWSDOWN option does not limit auto + * growth of the region. Linux mmap with this option + * takes as addr the inital BOS, and as len, the initial + * region size. It can then grow down from addr without + * limit. However, Linux threads has an implicit internal + * limit to stack size of STACK_SIZE. Its just not + * enforced explicitly in Linux. But, here we impose + * a limit of (STACK_SIZE - GUARD_SIZE) on the stack + * region, since we can do this with our mmap. + * + * Our mmap with MAP_STACK takes addr as the maximum + * downsize limit on BOS, and as len the max size of + * the region. It then maps the top SGROWSIZ bytes, + * and auto grows the region down, up to the limit + * in addr. + * + * If we don't use the MAP_STACK option, the effect + * of this code is to allocate a stack region of a + * fixed size of (STACK_SIZE - GUARD_SIZE). + */ + + if ((caddr_t)PTRIN(args->addr) + args->len > + p->p_vmspace->vm_maxsaddr) { + /* + * Some Linux apps will attempt to mmap + * thread stacks near the top of their + * address space. If their TOS is greater + * than vm_maxsaddr, vm_map_growstack() + * will confuse the thread stack with the + * process stack and deliver a SEGV if they + * attempt to grow the thread stack past their + * current stacksize rlimit. To avoid this, + * adjust vm_maxsaddr upwards to reflect + * the current stacksize rlimit rather + * than the maximum possible stacksize. + * It would be better to adjust the + * mmap'ed region, but some apps do not check + * mmap's return value. + */ + PROC_LOCK(p); + p->p_vmspace->vm_maxsaddr = (char *)USRSTACK - + lim_cur(p, RLIMIT_STACK); + PROC_UNLOCK(p); + } + + /* + * This gives us our maximum stack size and a new BOS. + * If we're using VM_STACK, then mmap will just map + * the top SGROWSIZ bytes, and let the stack grow down + * to the limit at BOS. If we're not using VM_STACK + * we map the full stack, since we don't have a way + * to autogrow it. + */ + if (args->len > STACK_SIZE - GUARD_SIZE) { + bsd_args.addr = (caddr_t)PTRIN(args->addr); + bsd_args.len = args->len; + } else { + bsd_args.addr = (caddr_t)PTRIN(args->addr) - + (STACK_SIZE - GUARD_SIZE - args->len); + bsd_args.len = STACK_SIZE - GUARD_SIZE; + } + } else { + bsd_args.addr = (caddr_t)PTRIN(args->addr); + bsd_args.len = args->len; + } + bsd_args.pos = (off_t)args->pgoff; + + error = sys_mmap(td, &bsd_args); + + LINUX_CTR2(mmap2, "return: %d (%p)", + error, td->td_retval[0]); + return (error); +} + +int +linux_mprotect(struct thread *td, struct linux_mprotect_args *uap) +{ + struct mprotect_args bsd_args; + + LINUX_CTR(mprotect); + + bsd_args.addr = uap->addr; + bsd_args.len = uap->len; + bsd_args.prot = uap->prot; + if (bsd_args.prot & (PROT_READ | PROT_WRITE | PROT_EXEC)) + bsd_args.prot |= PROT_READ | PROT_EXEC; + return (sys_mprotect(td, &bsd_args)); +} + +int +linux_iopl(struct thread *td, struct linux_iopl_args *args) +{ + int error; + + LINUX_CTR(iopl); + + if (args->level > 3) + return (EINVAL); + if ((error = priv_check(td, PRIV_IO)) != 0) + return (error); + if ((error = securelevel_gt(td->td_ucred, 0)) != 0) + return (error); + td->td_frame->tf_rflags = (td->td_frame->tf_rflags & ~PSL_IOPL) | + (args->level * (PSL_IOPL / 3)); + + return (0); +} + +int +linux_rt_sigsuspend(struct thread *td, struct linux_rt_sigsuspend_args *uap) +{ + l_sigset_t lmask; + sigset_t sigmask; + int error; + + LINUX_CTR2(rt_sigsuspend, "%p, %ld", + uap->newset, uap->sigsetsize); + + if (uap->sigsetsize != sizeof(l_sigset_t)) + return (EINVAL); + + error = copyin(uap->newset, &lmask, sizeof(l_sigset_t)); + if (error) + return (error); + + linux_to_bsd_sigset(&lmask, &sigmask); + return (kern_sigsuspend(td, sigmask)); +} + +int +linux_pause(struct thread *td, struct linux_pause_args *args) +{ + struct proc *p = td->td_proc; + sigset_t sigmask; + + LINUX_CTR(pause); + + PROC_LOCK(p); + sigmask = td->td_sigmask; + PROC_UNLOCK(p); + return (kern_sigsuspend(td, sigmask)); +} + +int +linux_sigaltstack(struct thread *td, struct linux_sigaltstack_args *uap) +{ + stack_t ss, oss; + l_stack_t lss; + int error; + + LINUX_CTR2(sigaltstack, "%p, %p", uap->uss, uap->uoss); + + if (uap->uss != NULL) { + error = copyin(uap->uss, &lss, sizeof(l_stack_t)); + if (error) + return (error); + + ss.ss_sp = PTRIN(lss.ss_sp); + ss.ss_size = lss.ss_size; + ss.ss_flags = linux_to_bsd_sigaltstack(lss.ss_flags); + } + error = kern_sigaltstack(td, (uap->uss != NULL) ? &ss : NULL, + (uap->uoss != NULL) ? &oss : NULL); + if (!error && uap->uoss != NULL) { + lss.ss_sp = PTROUT(oss.ss_sp); + lss.ss_size = oss.ss_size; + lss.ss_flags = bsd_to_linux_sigaltstack(oss.ss_flags); + error = copyout(&lss, uap->uoss, sizeof(l_stack_t)); + } + + return (error); +} + +/* XXX do all */ +int +linux_arch_prctl(struct thread *td, struct linux_arch_prctl_args *args) +{ + int error; + struct pcb *pcb; + + LINUX_CTR2(arch_prctl, "0x%x, %p", args->code, args->addr); + + error = ENOTSUP; + pcb = td->td_pcb; + + switch (args->code) { + case LINUX_ARCH_GET_GS: + error = copyout(&pcb->pcb_gsbase, (unsigned long *)args->addr, + sizeof(args->addr)); + break; + case LINUX_ARCH_SET_GS: + if (args->addr >= VM_MAXUSER_ADDRESS) + return(EPERM); + break; + case LINUX_ARCH_GET_FS: + error = copyout(&pcb->pcb_fsbase, (unsigned long *)args->addr, + sizeof(args->addr)); + break; + case LINUX_ARCH_SET_FS: + error = linux_set_cloned_tls(td, (void *)args->addr); + break; + default: + error = EINVAL; + } + return (error); +} + +int +linux_set_cloned_tls(struct thread *td, void *desc) +{ + struct pcb *pcb; + + if ((uint64_t)desc >= VM_MAXUSER_ADDRESS) + return (EPERM); + + pcb = td->td_pcb; + pcb->pcb_fsbase = (register_t)desc; + td->td_frame->tf_fs = _ufssel; + + return (0); +} diff --git a/sys/amd64/linux/linux_proto.h b/sys/amd64/linux/linux_proto.h new file mode 100644 index 000000000000..795a830cba5b --- /dev/null +++ b/sys/amd64/linux/linux_proto.h @@ -0,0 +1,1663 @@ +/* + * System call prototypes. + * + * DO NOT EDIT-- this file is automatically generated. + * $FreeBSD$ + * created from FreeBSD: head/sys/amd64/linux/syscalls.master 283492 2015-05-24 18:08:01Z dchagin + */ + +#ifndef _LINUX_SYSPROTO_H_ +#define _LINUX_SYSPROTO_H_ + +#include +#include +#include +#include +#include +#include +#include + +#include + +struct proc; + +struct thread; + +#define PAD_(t) (sizeof(register_t) <= sizeof(t) ? \ + 0 : sizeof(register_t) - sizeof(t)) + +#if BYTE_ORDER == LITTLE_ENDIAN +#define PADL_(t) 0 +#define PADR_(t) PAD_(t) +#else +#define PADL_(t) PAD_(t) +#define PADR_(t) 0 +#endif + +#define nosys linux_nosys +struct linux_open_args { + char path_l_[PADL_(char *)]; char * path; char path_r_[PADR_(char *)]; + char flags_l_[PADL_(l_int)]; l_int flags; char flags_r_[PADR_(l_int)]; + char mode_l_[PADL_(l_int)]; l_int mode; char mode_r_[PADR_(l_int)]; +}; +struct linux_newstat_args { + char path_l_[PADL_(char *)]; char * path; char path_r_[PADR_(char *)]; + char buf_l_[PADL_(struct l_newstat *)]; struct l_newstat * buf; char buf_r_[PADR_(struct l_newstat *)]; +}; +struct linux_newfstat_args { + char fd_l_[PADL_(l_uint)]; l_uint fd; char fd_r_[PADR_(l_uint)]; + char buf_l_[PADL_(struct l_newstat *)]; struct l_newstat * buf; char buf_r_[PADR_(struct l_newstat *)]; +}; +struct linux_newlstat_args { + char path_l_[PADL_(char *)]; char * path; char path_r_[PADR_(char *)]; + char buf_l_[PADL_(struct l_newstat *)]; struct l_newstat * buf; char buf_r_[PADR_(struct l_newstat *)]; +}; +struct linux_lseek_args { + char fdes_l_[PADL_(l_uint)]; l_uint fdes; char fdes_r_[PADR_(l_uint)]; + char off_l_[PADL_(l_off_t)]; l_off_t off; char off_r_[PADR_(l_off_t)]; + char whence_l_[PADL_(l_int)]; l_int whence; char whence_r_[PADR_(l_int)]; +}; +struct linux_mmap2_args { + char addr_l_[PADL_(l_ulong)]; l_ulong addr; char addr_r_[PADR_(l_ulong)]; + char len_l_[PADL_(l_ulong)]; l_ulong len; char len_r_[PADR_(l_ulong)]; + char prot_l_[PADL_(l_ulong)]; l_ulong prot; char prot_r_[PADR_(l_ulong)]; + char flags_l_[PADL_(l_ulong)]; l_ulong flags; char flags_r_[PADR_(l_ulong)]; + char fd_l_[PADL_(l_ulong)]; l_ulong fd; char fd_r_[PADR_(l_ulong)]; + char pgoff_l_[PADL_(l_ulong)]; l_ulong pgoff; char pgoff_r_[PADR_(l_ulong)]; +}; +struct linux_mprotect_args { + char addr_l_[PADL_(caddr_t)]; caddr_t addr; char addr_r_[PADR_(caddr_t)]; + char len_l_[PADL_(int)]; int len; char len_r_[PADR_(int)]; + char prot_l_[PADL_(int)]; int prot; char prot_r_[PADR_(int)]; +}; +struct linux_brk_args { + char dsend_l_[PADL_(l_ulong)]; l_ulong dsend; char dsend_r_[PADR_(l_ulong)]; +}; +struct linux_rt_sigaction_args { + char sig_l_[PADL_(l_int)]; l_int sig; char sig_r_[PADR_(l_int)]; + char act_l_[PADL_(l_sigaction_t *)]; l_sigaction_t * act; char act_r_[PADR_(l_sigaction_t *)]; + char oact_l_[PADL_(l_sigaction_t *)]; l_sigaction_t * oact; char oact_r_[PADR_(l_sigaction_t *)]; + char sigsetsize_l_[PADL_(l_size_t)]; l_size_t sigsetsize; char sigsetsize_r_[PADR_(l_size_t)]; +}; +struct linux_rt_sigprocmask_args { + char how_l_[PADL_(l_int)]; l_int how; char how_r_[PADR_(l_int)]; + char mask_l_[PADL_(l_sigset_t *)]; l_sigset_t * mask; char mask_r_[PADR_(l_sigset_t *)]; + char omask_l_[PADL_(l_sigset_t *)]; l_sigset_t * omask; char omask_r_[PADR_(l_sigset_t *)]; + char sigsetsize_l_[PADL_(l_size_t)]; l_size_t sigsetsize; char sigsetsize_r_[PADR_(l_size_t)]; +}; +struct linux_rt_sigreturn_args { + char ucp_l_[PADL_(struct l_ucontext *)]; struct l_ucontext * ucp; char ucp_r_[PADR_(struct l_ucontext *)]; +}; +struct linux_ioctl_args { + char fd_l_[PADL_(l_uint)]; l_uint fd; char fd_r_[PADR_(l_uint)]; + char cmd_l_[PADL_(l_uint)]; l_uint cmd; char cmd_r_[PADR_(l_uint)]; + char arg_l_[PADL_(uintptr_t)]; uintptr_t arg; char arg_r_[PADR_(uintptr_t)]; +}; +struct linux_pread_args { + char fd_l_[PADL_(l_uint)]; l_uint fd; char fd_r_[PADR_(l_uint)]; + char buf_l_[PADL_(char *)]; char * buf; char buf_r_[PADR_(char *)]; + char nbyte_l_[PADL_(l_size_t)]; l_size_t nbyte; char nbyte_r_[PADR_(l_size_t)]; + char offset_l_[PADL_(l_loff_t)]; l_loff_t offset; char offset_r_[PADR_(l_loff_t)]; +}; +struct linux_pwrite_args { + char fd_l_[PADL_(l_uint)]; l_uint fd; char fd_r_[PADR_(l_uint)]; + char buf_l_[PADL_(char *)]; char * buf; char buf_r_[PADR_(char *)]; + char nbyte_l_[PADL_(l_size_t)]; l_size_t nbyte; char nbyte_r_[PADR_(l_size_t)]; + char offset_l_[PADL_(l_loff_t)]; l_loff_t offset; char offset_r_[PADR_(l_loff_t)]; +}; +struct linux_access_args { + char path_l_[PADL_(char *)]; char * path; char path_r_[PADR_(char *)]; + char amode_l_[PADL_(l_int)]; l_int amode; char amode_r_[PADR_(l_int)]; +}; +struct linux_pipe_args { + char pipefds_l_[PADL_(l_ulong *)]; l_ulong * pipefds; char pipefds_r_[PADR_(l_ulong *)]; +}; +struct linux_select_args { + char nfds_l_[PADL_(l_int)]; l_int nfds; char nfds_r_[PADR_(l_int)]; + char readfds_l_[PADL_(l_fd_set *)]; l_fd_set * readfds; char readfds_r_[PADR_(l_fd_set *)]; + char writefds_l_[PADL_(l_fd_set *)]; l_fd_set * writefds; char writefds_r_[PADR_(l_fd_set *)]; + char exceptfds_l_[PADL_(l_fd_set *)]; l_fd_set * exceptfds; char exceptfds_r_[PADR_(l_fd_set *)]; + char timeout_l_[PADL_(struct l_timeval *)]; struct l_timeval * timeout; char timeout_r_[PADR_(struct l_timeval *)]; +}; +struct linux_mremap_args { + char addr_l_[PADL_(l_ulong)]; l_ulong addr; char addr_r_[PADR_(l_ulong)]; + char old_len_l_[PADL_(l_ulong)]; l_ulong old_len; char old_len_r_[PADR_(l_ulong)]; + char new_len_l_[PADL_(l_ulong)]; l_ulong new_len; char new_len_r_[PADR_(l_ulong)]; + char flags_l_[PADL_(l_ulong)]; l_ulong flags; char flags_r_[PADR_(l_ulong)]; + char new_addr_l_[PADL_(l_ulong)]; l_ulong new_addr; char new_addr_r_[PADR_(l_ulong)]; +}; +struct linux_msync_args { + char addr_l_[PADL_(l_ulong)]; l_ulong addr; char addr_r_[PADR_(l_ulong)]; + char len_l_[PADL_(l_size_t)]; l_size_t len; char len_r_[PADR_(l_size_t)]; + char fl_l_[PADL_(l_int)]; l_int fl; char fl_r_[PADR_(l_int)]; +}; +struct linux_mincore_args { + char start_l_[PADL_(l_ulong)]; l_ulong start; char start_r_[PADR_(l_ulong)]; + char len_l_[PADL_(l_size_t)]; l_size_t len; char len_r_[PADR_(l_size_t)]; + char vec_l_[PADL_(u_char *)]; u_char * vec; char vec_r_[PADR_(u_char *)]; +}; +struct linux_shmget_args { + char key_l_[PADL_(l_key_t)]; l_key_t key; char key_r_[PADR_(l_key_t)]; + char size_l_[PADL_(l_size_t)]; l_size_t size; char size_r_[PADR_(l_size_t)]; + char shmflg_l_[PADL_(l_int)]; l_int shmflg; char shmflg_r_[PADR_(l_int)]; +}; +struct linux_shmat_args { + char shmid_l_[PADL_(l_int)]; l_int shmid; char shmid_r_[PADR_(l_int)]; + char shmaddr_l_[PADL_(char *)]; char * shmaddr; char shmaddr_r_[PADR_(char *)]; + char shmflg_l_[PADL_(l_int)]; l_int shmflg; char shmflg_r_[PADR_(l_int)]; +}; +struct linux_shmctl_args { + char shmid_l_[PADL_(l_int)]; l_int shmid; char shmid_r_[PADR_(l_int)]; + char cmd_l_[PADL_(l_int)]; l_int cmd; char cmd_r_[PADR_(l_int)]; + char buf_l_[PADL_(struct l_shmid_ds *)]; struct l_shmid_ds * buf; char buf_r_[PADR_(struct l_shmid_ds *)]; +}; +struct linux_pause_args { + register_t dummy; +}; +struct linux_nanosleep_args { + char rqtp_l_[PADL_(const struct l_timespec *)]; const struct l_timespec * rqtp; char rqtp_r_[PADR_(const struct l_timespec *)]; + char rmtp_l_[PADL_(struct l_timespec *)]; struct l_timespec * rmtp; char rmtp_r_[PADR_(struct l_timespec *)]; +}; +struct linux_getitimer_args { + char which_l_[PADL_(l_int)]; l_int which; char which_r_[PADR_(l_int)]; + char itv_l_[PADL_(struct l_itimerval *)]; struct l_itimerval * itv; char itv_r_[PADR_(struct l_itimerval *)]; +}; +struct linux_alarm_args { + char secs_l_[PADL_(l_uint)]; l_uint secs; char secs_r_[PADR_(l_uint)]; +}; +struct linux_setitimer_args { + char which_l_[PADL_(l_int)]; l_int which; char which_r_[PADR_(l_int)]; + char itv_l_[PADL_(struct l_itimerval *)]; struct l_itimerval * itv; char itv_r_[PADR_(struct l_itimerval *)]; + char oitv_l_[PADL_(struct l_itimerval *)]; struct l_itimerval * oitv; char oitv_r_[PADR_(struct l_itimerval *)]; +}; +struct linux_getpid_args { + register_t dummy; +}; +struct linux_sendfile_args { + char out_l_[PADL_(int)]; int out; char out_r_[PADR_(int)]; + char in_l_[PADL_(int)]; int in; char in_r_[PADR_(int)]; + char offset_l_[PADL_(l_long *)]; l_long * offset; char offset_r_[PADR_(l_long *)]; + char count_l_[PADL_(l_size_t)]; l_size_t count; char count_r_[PADR_(l_size_t)]; +}; +struct linux_socket_args { + char domain_l_[PADL_(l_int)]; l_int domain; char domain_r_[PADR_(l_int)]; + char type_l_[PADL_(l_int)]; l_int type; char type_r_[PADR_(l_int)]; + char protocol_l_[PADL_(l_int)]; l_int protocol; char protocol_r_[PADR_(l_int)]; +}; +struct linux_connect_args { + char s_l_[PADL_(l_int)]; l_int s; char s_r_[PADR_(l_int)]; + char name_l_[PADL_(l_uintptr_t)]; l_uintptr_t name; char name_r_[PADR_(l_uintptr_t)]; + char namelen_l_[PADL_(l_int)]; l_int namelen; char namelen_r_[PADR_(l_int)]; +}; +struct linux_accept_args { + char s_l_[PADL_(l_int)]; l_int s; char s_r_[PADR_(l_int)]; + char addr_l_[PADL_(l_uintptr_t)]; l_uintptr_t addr; char addr_r_[PADR_(l_uintptr_t)]; + char namelen_l_[PADL_(l_uintptr_t)]; l_uintptr_t namelen; char namelen_r_[PADR_(l_uintptr_t)]; +}; +struct linux_sendto_args { + char s_l_[PADL_(l_int)]; l_int s; char s_r_[PADR_(l_int)]; + char msg_l_[PADL_(l_uintptr_t)]; l_uintptr_t msg; char msg_r_[PADR_(l_uintptr_t)]; + char len_l_[PADL_(l_int)]; l_int len; char len_r_[PADR_(l_int)]; + char flags_l_[PADL_(l_int)]; l_int flags; char flags_r_[PADR_(l_int)]; + char to_l_[PADL_(l_uintptr_t)]; l_uintptr_t to; char to_r_[PADR_(l_uintptr_t)]; + char tolen_l_[PADL_(l_int)]; l_int tolen; char tolen_r_[PADR_(l_int)]; +}; +struct linux_recvfrom_args { + char s_l_[PADL_(l_int)]; l_int s; char s_r_[PADR_(l_int)]; + char buf_l_[PADL_(l_uintptr_t)]; l_uintptr_t buf; char buf_r_[PADR_(l_uintptr_t)]; + char len_l_[PADL_(l_size_t)]; l_size_t len; char len_r_[PADR_(l_size_t)]; + char flags_l_[PADL_(l_int)]; l_int flags; char flags_r_[PADR_(l_int)]; + char from_l_[PADL_(l_uintptr_t)]; l_uintptr_t from; char from_r_[PADR_(l_uintptr_t)]; + char fromlen_l_[PADL_(l_uintptr_t)]; l_uintptr_t fromlen; char fromlen_r_[PADR_(l_uintptr_t)]; +}; +struct linux_sendmsg_args { + char s_l_[PADL_(l_int)]; l_int s; char s_r_[PADR_(l_int)]; + char msg_l_[PADL_(l_uintptr_t)]; l_uintptr_t msg; char msg_r_[PADR_(l_uintptr_t)]; + char flags_l_[PADL_(l_int)]; l_int flags; char flags_r_[PADR_(l_int)]; +}; +struct linux_recvmsg_args { + char s_l_[PADL_(l_int)]; l_int s; char s_r_[PADR_(l_int)]; + char msg_l_[PADL_(l_uintptr_t)]; l_uintptr_t msg; char msg_r_[PADR_(l_uintptr_t)]; + char flags_l_[PADL_(l_int)]; l_int flags; char flags_r_[PADR_(l_int)]; +}; +struct linux_shutdown_args { + char s_l_[PADL_(l_int)]; l_int s; char s_r_[PADR_(l_int)]; + char how_l_[PADL_(l_int)]; l_int how; char how_r_[PADR_(l_int)]; +}; +struct linux_bind_args { + char s_l_[PADL_(l_int)]; l_int s; char s_r_[PADR_(l_int)]; + char name_l_[PADL_(l_uintptr_t)]; l_uintptr_t name; char name_r_[PADR_(l_uintptr_t)]; + char namelen_l_[PADL_(l_int)]; l_int namelen; char namelen_r_[PADR_(l_int)]; +}; +struct linux_listen_args { + char s_l_[PADL_(l_int)]; l_int s; char s_r_[PADR_(l_int)]; + char backlog_l_[PADL_(l_int)]; l_int backlog; char backlog_r_[PADR_(l_int)]; +}; +struct linux_getsockname_args { + char s_l_[PADL_(l_int)]; l_int s; char s_r_[PADR_(l_int)]; + char addr_l_[PADL_(l_uintptr_t)]; l_uintptr_t addr; char addr_r_[PADR_(l_uintptr_t)]; + char namelen_l_[PADL_(l_uintptr_t)]; l_uintptr_t namelen; char namelen_r_[PADR_(l_uintptr_t)]; +}; +struct linux_getpeername_args { + char s_l_[PADL_(l_int)]; l_int s; char s_r_[PADR_(l_int)]; + char addr_l_[PADL_(l_uintptr_t)]; l_uintptr_t addr; char addr_r_[PADR_(l_uintptr_t)]; + char namelen_l_[PADL_(l_uintptr_t)]; l_uintptr_t namelen; char namelen_r_[PADR_(l_uintptr_t)]; +}; +struct linux_socketpair_args { + char domain_l_[PADL_(l_int)]; l_int domain; char domain_r_[PADR_(l_int)]; + char type_l_[PADL_(l_int)]; l_int type; char type_r_[PADR_(l_int)]; + char protocol_l_[PADL_(l_int)]; l_int protocol; char protocol_r_[PADR_(l_int)]; + char rsv_l_[PADL_(l_uintptr_t)]; l_uintptr_t rsv; char rsv_r_[PADR_(l_uintptr_t)]; +}; +struct linux_setsockopt_args { + char s_l_[PADL_(l_int)]; l_int s; char s_r_[PADR_(l_int)]; + char level_l_[PADL_(l_int)]; l_int level; char level_r_[PADR_(l_int)]; + char optname_l_[PADL_(l_int)]; l_int optname; char optname_r_[PADR_(l_int)]; + char optval_l_[PADL_(l_uintptr_t)]; l_uintptr_t optval; char optval_r_[PADR_(l_uintptr_t)]; + char optlen_l_[PADL_(l_int)]; l_int optlen; char optlen_r_[PADR_(l_int)]; +}; +struct linux_getsockopt_args { + char s_l_[PADL_(l_int)]; l_int s; char s_r_[PADR_(l_int)]; + char level_l_[PADL_(l_int)]; l_int level; char level_r_[PADR_(l_int)]; + char optname_l_[PADL_(l_int)]; l_int optname; char optname_r_[PADR_(l_int)]; + char optval_l_[PADL_(l_uintptr_t)]; l_uintptr_t optval; char optval_r_[PADR_(l_uintptr_t)]; + char optlen_l_[PADL_(l_uintptr_t)]; l_uintptr_t optlen; char optlen_r_[PADR_(l_uintptr_t)]; +}; +struct linux_clone_args { + char flags_l_[PADL_(l_int)]; l_int flags; char flags_r_[PADR_(l_int)]; + char stack_l_[PADL_(void *)]; void * stack; char stack_r_[PADR_(void *)]; + char parent_tidptr_l_[PADL_(void *)]; void * parent_tidptr; char parent_tidptr_r_[PADR_(void *)]; + char child_tidptr_l_[PADL_(void *)]; void * child_tidptr; char child_tidptr_r_[PADR_(void *)]; + char tls_l_[PADL_(void *)]; void * tls; char tls_r_[PADR_(void *)]; +}; +struct linux_fork_args { + register_t dummy; +}; +struct linux_vfork_args { + register_t dummy; +}; +struct linux_execve_args { + char path_l_[PADL_(char *)]; char * path; char path_r_[PADR_(char *)]; + char argp_l_[PADL_(char **)]; char ** argp; char argp_r_[PADR_(char **)]; + char envp_l_[PADL_(char **)]; char ** envp; char envp_r_[PADR_(char **)]; +}; +struct linux_exit_args { + char rval_l_[PADL_(int)]; int rval; char rval_r_[PADR_(int)]; +}; +struct linux_wait4_args { + char pid_l_[PADL_(l_pid_t)]; l_pid_t pid; char pid_r_[PADR_(l_pid_t)]; + char status_l_[PADL_(l_int *)]; l_int * status; char status_r_[PADR_(l_int *)]; + char options_l_[PADL_(l_int)]; l_int options; char options_r_[PADR_(l_int)]; + char rusage_l_[PADL_(struct rusage *)]; struct rusage * rusage; char rusage_r_[PADR_(struct rusage *)]; +}; +struct linux_kill_args { + char pid_l_[PADL_(l_int)]; l_int pid; char pid_r_[PADR_(l_int)]; + char signum_l_[PADL_(l_int)]; l_int signum; char signum_r_[PADR_(l_int)]; +}; +struct linux_newuname_args { + char buf_l_[PADL_(struct l_new_utsname *)]; struct l_new_utsname * buf; char buf_r_[PADR_(struct l_new_utsname *)]; +}; +struct linux_semget_args { + char key_l_[PADL_(l_key_t)]; l_key_t key; char key_r_[PADR_(l_key_t)]; + char nsems_l_[PADL_(l_int)]; l_int nsems; char nsems_r_[PADR_(l_int)]; + char semflg_l_[PADL_(l_int)]; l_int semflg; char semflg_r_[PADR_(l_int)]; +}; +struct linux_semop_args { + char semid_l_[PADL_(l_int)]; l_int semid; char semid_r_[PADR_(l_int)]; + char tsops_l_[PADL_(struct l_sembuf *)]; struct l_sembuf * tsops; char tsops_r_[PADR_(struct l_sembuf *)]; + char nsops_l_[PADL_(l_uint)]; l_uint nsops; char nsops_r_[PADR_(l_uint)]; +}; +struct linux_semctl_args { + char semid_l_[PADL_(l_int)]; l_int semid; char semid_r_[PADR_(l_int)]; + char semnum_l_[PADL_(l_int)]; l_int semnum; char semnum_r_[PADR_(l_int)]; + char cmd_l_[PADL_(l_int)]; l_int cmd; char cmd_r_[PADR_(l_int)]; + char arg_l_[PADL_(union l_semun)]; union l_semun arg; char arg_r_[PADR_(union l_semun)]; +}; +struct linux_shmdt_args { + char shmaddr_l_[PADL_(char *)]; char * shmaddr; char shmaddr_r_[PADR_(char *)]; +}; +struct linux_msgget_args { + char key_l_[PADL_(l_key_t)]; l_key_t key; char key_r_[PADR_(l_key_t)]; + char msgflg_l_[PADL_(l_int)]; l_int msgflg; char msgflg_r_[PADR_(l_int)]; +}; +struct linux_msgsnd_args { + char msqid_l_[PADL_(l_int)]; l_int msqid; char msqid_r_[PADR_(l_int)]; + char msgp_l_[PADL_(struct l_msgbuf *)]; struct l_msgbuf * msgp; char msgp_r_[PADR_(struct l_msgbuf *)]; + char msgsz_l_[PADL_(l_size_t)]; l_size_t msgsz; char msgsz_r_[PADR_(l_size_t)]; + char msgflg_l_[PADL_(l_int)]; l_int msgflg; char msgflg_r_[PADR_(l_int)]; +}; +struct linux_msgrcv_args { + char msqid_l_[PADL_(l_int)]; l_int msqid; char msqid_r_[PADR_(l_int)]; + char msgp_l_[PADL_(struct l_msgbuf *)]; struct l_msgbuf * msgp; char msgp_r_[PADR_(struct l_msgbuf *)]; + char msgsz_l_[PADL_(l_size_t)]; l_size_t msgsz; char msgsz_r_[PADR_(l_size_t)]; + char msgtyp_l_[PADL_(l_long)]; l_long msgtyp; char msgtyp_r_[PADR_(l_long)]; + char msgflg_l_[PADL_(l_int)]; l_int msgflg; char msgflg_r_[PADR_(l_int)]; +}; +struct linux_msgctl_args { + char msqid_l_[PADL_(l_int)]; l_int msqid; char msqid_r_[PADR_(l_int)]; + char cmd_l_[PADL_(l_int)]; l_int cmd; char cmd_r_[PADR_(l_int)]; + char buf_l_[PADL_(struct l_msqid_ds *)]; struct l_msqid_ds * buf; char buf_r_[PADR_(struct l_msqid_ds *)]; +}; +struct linux_fcntl_args { + char fd_l_[PADL_(l_uint)]; l_uint fd; char fd_r_[PADR_(l_uint)]; + char cmd_l_[PADL_(l_uint)]; l_uint cmd; char cmd_r_[PADR_(l_uint)]; + char arg_l_[PADL_(l_ulong)]; l_ulong arg; char arg_r_[PADR_(l_ulong)]; +}; +struct linux_fdatasync_args { + char fd_l_[PADL_(l_uint)]; l_uint fd; char fd_r_[PADR_(l_uint)]; +}; +struct linux_truncate_args { + char path_l_[PADL_(char *)]; char * path; char path_r_[PADR_(char *)]; + char length_l_[PADL_(l_ulong)]; l_ulong length; char length_r_[PADR_(l_ulong)]; +}; +struct linux_ftruncate_args { + char fd_l_[PADL_(l_int)]; l_int fd; char fd_r_[PADR_(l_int)]; + char length_l_[PADL_(l_long)]; l_long length; char length_r_[PADR_(l_long)]; +}; +struct linux_getdents_args { + char fd_l_[PADL_(l_uint)]; l_uint fd; char fd_r_[PADR_(l_uint)]; + char dent_l_[PADL_(void *)]; void * dent; char dent_r_[PADR_(void *)]; + char count_l_[PADL_(l_uint)]; l_uint count; char count_r_[PADR_(l_uint)]; +}; +struct linux_getcwd_args { + char buf_l_[PADL_(char *)]; char * buf; char buf_r_[PADR_(char *)]; + char bufsize_l_[PADL_(l_ulong)]; l_ulong bufsize; char bufsize_r_[PADR_(l_ulong)]; +}; +struct linux_chdir_args { + char path_l_[PADL_(char *)]; char * path; char path_r_[PADR_(char *)]; +}; +struct linux_rename_args { + char from_l_[PADL_(char *)]; char * from; char from_r_[PADR_(char *)]; + char to_l_[PADL_(char *)]; char * to; char to_r_[PADR_(char *)]; +}; +struct linux_mkdir_args { + char path_l_[PADL_(char *)]; char * path; char path_r_[PADR_(char *)]; + char mode_l_[PADL_(l_int)]; l_int mode; char mode_r_[PADR_(l_int)]; +}; +struct linux_rmdir_args { + char path_l_[PADL_(char *)]; char * path; char path_r_[PADR_(char *)]; +}; +struct linux_creat_args { + char path_l_[PADL_(char *)]; char * path; char path_r_[PADR_(char *)]; + char mode_l_[PADL_(l_int)]; l_int mode; char mode_r_[PADR_(l_int)]; +}; +struct linux_link_args { + char path_l_[PADL_(char *)]; char * path; char path_r_[PADR_(char *)]; + char to_l_[PADL_(char *)]; char * to; char to_r_[PADR_(char *)]; +}; +struct linux_unlink_args { + char path_l_[PADL_(char *)]; char * path; char path_r_[PADR_(char *)]; +}; +struct linux_symlink_args { + char path_l_[PADL_(char *)]; char * path; char path_r_[PADR_(char *)]; + char to_l_[PADL_(char *)]; char * to; char to_r_[PADR_(char *)]; +}; +struct linux_readlink_args { + char name_l_[PADL_(char *)]; char * name; char name_r_[PADR_(char *)]; + char buf_l_[PADL_(char *)]; char * buf; char buf_r_[PADR_(char *)]; + char count_l_[PADL_(l_int)]; l_int count; char count_r_[PADR_(l_int)]; +}; +struct linux_chmod_args { + char path_l_[PADL_(char *)]; char * path; char path_r_[PADR_(char *)]; + char mode_l_[PADL_(l_mode_t)]; l_mode_t mode; char mode_r_[PADR_(l_mode_t)]; +}; +struct linux_chown_args { + char path_l_[PADL_(char *)]; char * path; char path_r_[PADR_(char *)]; + char uid_l_[PADL_(l_uid_t)]; l_uid_t uid; char uid_r_[PADR_(l_uid_t)]; + char gid_l_[PADL_(l_gid_t)]; l_gid_t gid; char gid_r_[PADR_(l_gid_t)]; +}; +struct linux_lchown_args { + char path_l_[PADL_(char *)]; char * path; char path_r_[PADR_(char *)]; + char uid_l_[PADL_(l_uid_t)]; l_uid_t uid; char uid_r_[PADR_(l_uid_t)]; + char gid_l_[PADL_(l_gid_t)]; l_gid_t gid; char gid_r_[PADR_(l_gid_t)]; +}; +struct linux_getrlimit_args { + char resource_l_[PADL_(l_uint)]; l_uint resource; char resource_r_[PADR_(l_uint)]; + char rlim_l_[PADL_(struct l_rlimit *)]; struct l_rlimit * rlim; char rlim_r_[PADR_(struct l_rlimit *)]; +}; +struct linux_sysinfo_args { + char info_l_[PADL_(struct l_sysinfo *)]; struct l_sysinfo * info; char info_r_[PADR_(struct l_sysinfo *)]; +}; +struct linux_times_args { + char buf_l_[PADL_(struct l_times_argv *)]; struct l_times_argv * buf; char buf_r_[PADR_(struct l_times_argv *)]; +}; +struct linux_ptrace_args { + char req_l_[PADL_(l_long)]; l_long req; char req_r_[PADR_(l_long)]; + char pid_l_[PADL_(l_long)]; l_long pid; char pid_r_[PADR_(l_long)]; + char addr_l_[PADL_(l_long)]; l_long addr; char addr_r_[PADR_(l_long)]; + char data_l_[PADL_(l_long)]; l_long data; char data_r_[PADR_(l_long)]; +}; +struct linux_getuid_args { + register_t dummy; +}; +struct linux_syslog_args { + char type_l_[PADL_(l_int)]; l_int type; char type_r_[PADR_(l_int)]; + char buf_l_[PADL_(char *)]; char * buf; char buf_r_[PADR_(char *)]; + char len_l_[PADL_(l_int)]; l_int len; char len_r_[PADR_(l_int)]; +}; +struct linux_getgid_args { + register_t dummy; +}; +struct linux_getppid_args { + register_t dummy; +}; +struct linux_getgroups_args { + char gidsetsize_l_[PADL_(l_int)]; l_int gidsetsize; char gidsetsize_r_[PADR_(l_int)]; + char grouplist_l_[PADL_(l_gid_t *)]; l_gid_t * grouplist; char grouplist_r_[PADR_(l_gid_t *)]; +}; +struct linux_setgroups_args { + char gidsetsize_l_[PADL_(l_int)]; l_int gidsetsize; char gidsetsize_r_[PADR_(l_int)]; + char grouplist_l_[PADL_(l_gid_t *)]; l_gid_t * grouplist; char grouplist_r_[PADR_(l_gid_t *)]; +}; +struct linux_setfsuid_args { + char uid_l_[PADL_(l_uid_t)]; l_uid_t uid; char uid_r_[PADR_(l_uid_t)]; +}; +struct linux_setfsgid_args { + char gid_l_[PADL_(l_gid_t)]; l_gid_t gid; char gid_r_[PADR_(l_gid_t)]; +}; +struct linux_getsid_args { + char pid_l_[PADL_(l_pid_t)]; l_pid_t pid; char pid_r_[PADR_(l_pid_t)]; +}; +struct linux_capget_args { + char hdrp_l_[PADL_(struct l_user_cap_header *)]; struct l_user_cap_header * hdrp; char hdrp_r_[PADR_(struct l_user_cap_header *)]; + char datap_l_[PADL_(struct l_user_cap_data *)]; struct l_user_cap_data * datap; char datap_r_[PADR_(struct l_user_cap_data *)]; +}; +struct linux_capset_args { + char hdrp_l_[PADL_(struct l_user_cap_header *)]; struct l_user_cap_header * hdrp; char hdrp_r_[PADR_(struct l_user_cap_header *)]; + char datap_l_[PADL_(struct l_user_cap_data *)]; struct l_user_cap_data * datap; char datap_r_[PADR_(struct l_user_cap_data *)]; +}; +struct linux_rt_sigpending_args { + char set_l_[PADL_(l_sigset_t *)]; l_sigset_t * set; char set_r_[PADR_(l_sigset_t *)]; + char sigsetsize_l_[PADL_(l_size_t)]; l_size_t sigsetsize; char sigsetsize_r_[PADR_(l_size_t)]; +}; +struct linux_rt_sigtimedwait_args { + char mask_l_[PADL_(l_sigset_t *)]; l_sigset_t * mask; char mask_r_[PADR_(l_sigset_t *)]; + char ptr_l_[PADL_(l_siginfo_t *)]; l_siginfo_t * ptr; char ptr_r_[PADR_(l_siginfo_t *)]; + char timeout_l_[PADL_(struct l_timeval *)]; struct l_timeval * timeout; char timeout_r_[PADR_(struct l_timeval *)]; + char sigsetsize_l_[PADL_(l_size_t)]; l_size_t sigsetsize; char sigsetsize_r_[PADR_(l_size_t)]; +}; +struct linux_rt_sigqueueinfo_args { + char pid_l_[PADL_(l_pid_t)]; l_pid_t pid; char pid_r_[PADR_(l_pid_t)]; + char sig_l_[PADL_(l_int)]; l_int sig; char sig_r_[PADR_(l_int)]; + char info_l_[PADL_(l_siginfo_t *)]; l_siginfo_t * info; char info_r_[PADR_(l_siginfo_t *)]; +}; +struct linux_rt_sigsuspend_args { + char newset_l_[PADL_(l_sigset_t *)]; l_sigset_t * newset; char newset_r_[PADR_(l_sigset_t *)]; + char sigsetsize_l_[PADL_(l_size_t)]; l_size_t sigsetsize; char sigsetsize_r_[PADR_(l_size_t)]; +}; +struct linux_sigaltstack_args { + char uss_l_[PADL_(l_stack_t *)]; l_stack_t * uss; char uss_r_[PADR_(l_stack_t *)]; + char uoss_l_[PADL_(l_stack_t *)]; l_stack_t * uoss; char uoss_r_[PADR_(l_stack_t *)]; +}; +struct linux_utime_args { + char fname_l_[PADL_(char *)]; char * fname; char fname_r_[PADR_(char *)]; + char times_l_[PADL_(struct l_utimbuf *)]; struct l_utimbuf * times; char times_r_[PADR_(struct l_utimbuf *)]; +}; +struct linux_mknod_args { + char path_l_[PADL_(char *)]; char * path; char path_r_[PADR_(char *)]; + char mode_l_[PADL_(l_int)]; l_int mode; char mode_r_[PADR_(l_int)]; + char dev_l_[PADL_(l_dev_t)]; l_dev_t dev; char dev_r_[PADR_(l_dev_t)]; +}; +struct linux_personality_args { + char per_l_[PADL_(l_ulong)]; l_ulong per; char per_r_[PADR_(l_ulong)]; +}; +struct linux_ustat_args { + char dev_l_[PADL_(l_dev_t)]; l_dev_t dev; char dev_r_[PADR_(l_dev_t)]; + char ubuf_l_[PADL_(struct l_ustat *)]; struct l_ustat * ubuf; char ubuf_r_[PADR_(struct l_ustat *)]; +}; +struct linux_statfs_args { + char path_l_[PADL_(char *)]; char * path; char path_r_[PADR_(char *)]; + char buf_l_[PADL_(struct l_statfs_buf *)]; struct l_statfs_buf * buf; char buf_r_[PADR_(struct l_statfs_buf *)]; +}; +struct linux_fstatfs_args { + char fd_l_[PADL_(l_uint)]; l_uint fd; char fd_r_[PADR_(l_uint)]; + char buf_l_[PADL_(struct l_statfs_buf *)]; struct l_statfs_buf * buf; char buf_r_[PADR_(struct l_statfs_buf *)]; +}; +struct linux_sysfs_args { + char option_l_[PADL_(l_int)]; l_int option; char option_r_[PADR_(l_int)]; + char arg1_l_[PADL_(l_ulong)]; l_ulong arg1; char arg1_r_[PADR_(l_ulong)]; + char arg2_l_[PADL_(l_ulong)]; l_ulong arg2; char arg2_r_[PADR_(l_ulong)]; +}; +struct linux_getpriority_args { + char which_l_[PADL_(int)]; int which; char which_r_[PADR_(int)]; + char who_l_[PADL_(int)]; int who; char who_r_[PADR_(int)]; +}; +struct linux_sched_setparam_args { + char pid_l_[PADL_(l_pid_t)]; l_pid_t pid; char pid_r_[PADR_(l_pid_t)]; + char param_l_[PADL_(struct l_sched_param *)]; struct l_sched_param * param; char param_r_[PADR_(struct l_sched_param *)]; +}; +struct linux_sched_getparam_args { + char pid_l_[PADL_(l_pid_t)]; l_pid_t pid; char pid_r_[PADR_(l_pid_t)]; + char param_l_[PADL_(struct l_sched_param *)]; struct l_sched_param * param; char param_r_[PADR_(struct l_sched_param *)]; +}; +struct linux_sched_setscheduler_args { + char pid_l_[PADL_(l_pid_t)]; l_pid_t pid; char pid_r_[PADR_(l_pid_t)]; + char policy_l_[PADL_(l_int)]; l_int policy; char policy_r_[PADR_(l_int)]; + char param_l_[PADL_(struct l_sched_param *)]; struct l_sched_param * param; char param_r_[PADR_(struct l_sched_param *)]; +}; +struct linux_sched_getscheduler_args { + char pid_l_[PADL_(l_pid_t)]; l_pid_t pid; char pid_r_[PADR_(l_pid_t)]; +}; +struct linux_sched_get_priority_max_args { + char policy_l_[PADL_(l_int)]; l_int policy; char policy_r_[PADR_(l_int)]; +}; +struct linux_sched_get_priority_min_args { + char policy_l_[PADL_(l_int)]; l_int policy; char policy_r_[PADR_(l_int)]; +}; +struct linux_sched_rr_get_interval_args { + char pid_l_[PADL_(l_pid_t)]; l_pid_t pid; char pid_r_[PADR_(l_pid_t)]; + char interval_l_[PADL_(struct l_timespec *)]; struct l_timespec * interval; char interval_r_[PADR_(struct l_timespec *)]; +}; +struct linux_vhangup_args { + register_t dummy; +}; +struct linux_pivot_root_args { + register_t dummy; +}; +struct linux_sysctl_args { + char args_l_[PADL_(struct l___sysctl_args *)]; struct l___sysctl_args * args; char args_r_[PADR_(struct l___sysctl_args *)]; +}; +struct linux_prctl_args { + char option_l_[PADL_(l_int)]; l_int option; char option_r_[PADR_(l_int)]; + char arg2_l_[PADL_(l_uintptr_t)]; l_uintptr_t arg2; char arg2_r_[PADR_(l_uintptr_t)]; + char arg3_l_[PADL_(l_uintptr_t)]; l_uintptr_t arg3; char arg3_r_[PADR_(l_uintptr_t)]; + char arg4_l_[PADL_(l_uintptr_t)]; l_uintptr_t arg4; char arg4_r_[PADR_(l_uintptr_t)]; + char arg5_l_[PADL_(l_uintptr_t)]; l_uintptr_t arg5; char arg5_r_[PADR_(l_uintptr_t)]; +}; +struct linux_arch_prctl_args { + char code_l_[PADL_(l_int)]; l_int code; char code_r_[PADR_(l_int)]; + char addr_l_[PADL_(l_ulong)]; l_ulong addr; char addr_r_[PADR_(l_ulong)]; +}; +struct linux_adjtimex_args { + register_t dummy; +}; +struct linux_setrlimit_args { + char resource_l_[PADL_(l_uint)]; l_uint resource; char resource_r_[PADR_(l_uint)]; + char rlim_l_[PADL_(struct l_rlimit *)]; struct l_rlimit * rlim; char rlim_r_[PADR_(struct l_rlimit *)]; +}; +struct linux_mount_args { + char specialfile_l_[PADL_(char *)]; char * specialfile; char specialfile_r_[PADR_(char *)]; + char dir_l_[PADL_(char *)]; char * dir; char dir_r_[PADR_(char *)]; + char filesystemtype_l_[PADL_(char *)]; char * filesystemtype; char filesystemtype_r_[PADR_(char *)]; + char rwflag_l_[PADL_(l_ulong)]; l_ulong rwflag; char rwflag_r_[PADR_(l_ulong)]; + char data_l_[PADL_(void *)]; void * data; char data_r_[PADR_(void *)]; +}; +struct linux_umount_args { + char path_l_[PADL_(char *)]; char * path; char path_r_[PADR_(char *)]; + char flags_l_[PADL_(l_int)]; l_int flags; char flags_r_[PADR_(l_int)]; +}; +struct linux_swapoff_args { + register_t dummy; +}; +struct linux_reboot_args { + char magic1_l_[PADL_(l_int)]; l_int magic1; char magic1_r_[PADR_(l_int)]; + char magic2_l_[PADL_(l_int)]; l_int magic2; char magic2_r_[PADR_(l_int)]; + char cmd_l_[PADL_(l_uint)]; l_uint cmd; char cmd_r_[PADR_(l_uint)]; + char arg_l_[PADL_(void *)]; void * arg; char arg_r_[PADR_(void *)]; +}; +struct linux_sethostname_args { + char hostname_l_[PADL_(char *)]; char * hostname; char hostname_r_[PADR_(char *)]; + char len_l_[PADL_(l_uint)]; l_uint len; char len_r_[PADR_(l_uint)]; +}; +struct linux_setdomainname_args { + char name_l_[PADL_(char *)]; char * name; char name_r_[PADR_(char *)]; + char len_l_[PADL_(l_int)]; l_int len; char len_r_[PADR_(l_int)]; +}; +struct linux_iopl_args { + char level_l_[PADL_(l_uint)]; l_uint level; char level_r_[PADR_(l_uint)]; +}; +struct linux_create_module_args { + register_t dummy; +}; +struct linux_init_module_args { + register_t dummy; +}; +struct linux_delete_module_args { + register_t dummy; +}; +struct linux_get_kernel_syms_args { + register_t dummy; +}; +struct linux_query_module_args { + register_t dummy; +}; +struct linux_quotactl_args { + register_t dummy; +}; +struct linux_nfsservctl_args { + register_t dummy; +}; +struct linux_getpmsg_args { + register_t dummy; +}; +struct linux_putpmsg_args { + register_t dummy; +}; +struct linux_afs_syscall_args { + register_t dummy; +}; +struct linux_tuxcall_args { + register_t dummy; +}; +struct linux_security_args { + register_t dummy; +}; +struct linux_gettid_args { + register_t dummy; +}; +struct linux_setxattr_args { + register_t dummy; +}; +struct linux_lsetxattr_args { + register_t dummy; +}; +struct linux_fsetxattr_args { + register_t dummy; +}; +struct linux_getxattr_args { + register_t dummy; +}; +struct linux_lgetxattr_args { + register_t dummy; +}; +struct linux_fgetxattr_args { + register_t dummy; +}; +struct linux_listxattr_args { + register_t dummy; +}; +struct linux_llistxattr_args { + register_t dummy; +}; +struct linux_flistxattr_args { + register_t dummy; +}; +struct linux_removexattr_args { + register_t dummy; +}; +struct linux_lremovexattr_args { + register_t dummy; +}; +struct linux_fremovexattr_args { + register_t dummy; +}; +struct linux_tkill_args { + char tid_l_[PADL_(int)]; int tid; char tid_r_[PADR_(int)]; + char sig_l_[PADL_(int)]; int sig; char sig_r_[PADR_(int)]; +}; +struct linux_time_args { + char tm_l_[PADL_(l_time_t *)]; l_time_t * tm; char tm_r_[PADR_(l_time_t *)]; +}; +struct linux_sys_futex_args { + char uaddr_l_[PADL_(void *)]; void * uaddr; char uaddr_r_[PADR_(void *)]; + char op_l_[PADL_(int)]; int op; char op_r_[PADR_(int)]; + char val_l_[PADL_(int)]; int val; char val_r_[PADR_(int)]; + char timeout_l_[PADL_(struct l_timespec *)]; struct l_timespec * timeout; char timeout_r_[PADR_(struct l_timespec *)]; + char uaddr2_l_[PADL_(void *)]; void * uaddr2; char uaddr2_r_[PADR_(void *)]; + char val3_l_[PADL_(int)]; int val3; char val3_r_[PADR_(int)]; +}; +struct linux_sched_setaffinity_args { + char pid_l_[PADL_(l_pid_t)]; l_pid_t pid; char pid_r_[PADR_(l_pid_t)]; + char len_l_[PADL_(l_uint)]; l_uint len; char len_r_[PADR_(l_uint)]; + char user_mask_ptr_l_[PADL_(l_ulong *)]; l_ulong * user_mask_ptr; char user_mask_ptr_r_[PADR_(l_ulong *)]; +}; +struct linux_sched_getaffinity_args { + char pid_l_[PADL_(l_pid_t)]; l_pid_t pid; char pid_r_[PADR_(l_pid_t)]; + char len_l_[PADL_(l_uint)]; l_uint len; char len_r_[PADR_(l_uint)]; + char user_mask_ptr_l_[PADL_(l_ulong *)]; l_ulong * user_mask_ptr; char user_mask_ptr_r_[PADR_(l_ulong *)]; +}; +struct linux_set_thread_area_args { + register_t dummy; +}; +struct linux_lookup_dcookie_args { + register_t dummy; +}; +struct linux_epoll_create_args { + char size_l_[PADL_(l_int)]; l_int size; char size_r_[PADR_(l_int)]; +}; +struct linux_epoll_ctl_old_args { + register_t dummy; +}; +struct linux_epoll_wait_old_args { + register_t dummy; +}; +struct linux_remap_file_pages_args { + register_t dummy; +}; +struct linux_getdents64_args { + char fd_l_[PADL_(l_uint)]; l_uint fd; char fd_r_[PADR_(l_uint)]; + char dirent_l_[PADL_(void *)]; void * dirent; char dirent_r_[PADR_(void *)]; + char count_l_[PADL_(l_uint)]; l_uint count; char count_r_[PADR_(l_uint)]; +}; +struct linux_set_tid_address_args { + char tidptr_l_[PADL_(int *)]; int * tidptr; char tidptr_r_[PADR_(int *)]; +}; +struct linux_semtimedop_args { + register_t dummy; +}; +struct linux_fadvise64_args { + char fd_l_[PADL_(int)]; int fd; char fd_r_[PADR_(int)]; + char offset_l_[PADL_(l_loff_t)]; l_loff_t offset; char offset_r_[PADR_(l_loff_t)]; + char len_l_[PADL_(l_size_t)]; l_size_t len; char len_r_[PADR_(l_size_t)]; + char advice_l_[PADL_(int)]; int advice; char advice_r_[PADR_(int)]; +}; +struct linux_timer_create_args { + char clock_id_l_[PADL_(clockid_t)]; clockid_t clock_id; char clock_id_r_[PADR_(clockid_t)]; + char evp_l_[PADL_(struct sigevent *)]; struct sigevent * evp; char evp_r_[PADR_(struct sigevent *)]; + char timerid_l_[PADL_(l_timer_t *)]; l_timer_t * timerid; char timerid_r_[PADR_(l_timer_t *)]; +}; +struct linux_timer_settime_args { + char timerid_l_[PADL_(l_timer_t)]; l_timer_t timerid; char timerid_r_[PADR_(l_timer_t)]; + char flags_l_[PADL_(l_int)]; l_int flags; char flags_r_[PADR_(l_int)]; + char new_l_[PADL_(const struct itimerspec *)]; const struct itimerspec * new; char new_r_[PADR_(const struct itimerspec *)]; + char old_l_[PADL_(struct itimerspec *)]; struct itimerspec * old; char old_r_[PADR_(struct itimerspec *)]; +}; +struct linux_timer_gettime_args { + char timerid_l_[PADL_(l_timer_t)]; l_timer_t timerid; char timerid_r_[PADR_(l_timer_t)]; + char setting_l_[PADL_(struct itimerspec *)]; struct itimerspec * setting; char setting_r_[PADR_(struct itimerspec *)]; +}; +struct linux_timer_getoverrun_args { + char timerid_l_[PADL_(l_timer_t)]; l_timer_t timerid; char timerid_r_[PADR_(l_timer_t)]; +}; +struct linux_timer_delete_args { + char timerid_l_[PADL_(l_timer_t)]; l_timer_t timerid; char timerid_r_[PADR_(l_timer_t)]; +}; +struct linux_clock_settime_args { + char which_l_[PADL_(clockid_t)]; clockid_t which; char which_r_[PADR_(clockid_t)]; + char tp_l_[PADL_(struct l_timespec *)]; struct l_timespec * tp; char tp_r_[PADR_(struct l_timespec *)]; +}; +struct linux_clock_gettime_args { + char which_l_[PADL_(clockid_t)]; clockid_t which; char which_r_[PADR_(clockid_t)]; + char tp_l_[PADL_(struct l_timespec *)]; struct l_timespec * tp; char tp_r_[PADR_(struct l_timespec *)]; +}; +struct linux_clock_getres_args { + char which_l_[PADL_(clockid_t)]; clockid_t which; char which_r_[PADR_(clockid_t)]; + char tp_l_[PADL_(struct l_timespec *)]; struct l_timespec * tp; char tp_r_[PADR_(struct l_timespec *)]; +}; +struct linux_clock_nanosleep_args { + char which_l_[PADL_(clockid_t)]; clockid_t which; char which_r_[PADR_(clockid_t)]; + char flags_l_[PADL_(int)]; int flags; char flags_r_[PADR_(int)]; + char rqtp_l_[PADL_(struct l_timespec *)]; struct l_timespec * rqtp; char rqtp_r_[PADR_(struct l_timespec *)]; + char rmtp_l_[PADL_(struct l_timespec *)]; struct l_timespec * rmtp; char rmtp_r_[PADR_(struct l_timespec *)]; +}; +struct linux_exit_group_args { + char error_code_l_[PADL_(int)]; int error_code; char error_code_r_[PADR_(int)]; +}; +struct linux_epoll_wait_args { + char epfd_l_[PADL_(l_int)]; l_int epfd; char epfd_r_[PADR_(l_int)]; + char events_l_[PADL_(struct epoll_event *)]; struct epoll_event * events; char events_r_[PADR_(struct epoll_event *)]; + char maxevents_l_[PADL_(l_int)]; l_int maxevents; char maxevents_r_[PADR_(l_int)]; + char timeout_l_[PADL_(l_int)]; l_int timeout; char timeout_r_[PADR_(l_int)]; +}; +struct linux_epoll_ctl_args { + char epfd_l_[PADL_(l_int)]; l_int epfd; char epfd_r_[PADR_(l_int)]; + char op_l_[PADL_(l_int)]; l_int op; char op_r_[PADR_(l_int)]; + char fd_l_[PADL_(l_int)]; l_int fd; char fd_r_[PADR_(l_int)]; + char event_l_[PADL_(struct epoll_event *)]; struct epoll_event * event; char event_r_[PADR_(struct epoll_event *)]; +}; +struct linux_tgkill_args { + char tgid_l_[PADL_(int)]; int tgid; char tgid_r_[PADR_(int)]; + char pid_l_[PADL_(int)]; int pid; char pid_r_[PADR_(int)]; + char sig_l_[PADL_(int)]; int sig; char sig_r_[PADR_(int)]; +}; +struct linux_utimes_args { + char fname_l_[PADL_(char *)]; char * fname; char fname_r_[PADR_(char *)]; + char tptr_l_[PADL_(struct l_timeval *)]; struct l_timeval * tptr; char tptr_r_[PADR_(struct l_timeval *)]; +}; +struct linux_mbind_args { + register_t dummy; +}; +struct linux_set_mempolicy_args { + register_t dummy; +}; +struct linux_get_mempolicy_args { + register_t dummy; +}; +struct linux_mq_open_args { + register_t dummy; +}; +struct linux_mq_unlink_args { + register_t dummy; +}; +struct linux_mq_timedsend_args { + register_t dummy; +}; +struct linux_mq_timedreceive_args { + register_t dummy; +}; +struct linux_mq_notify_args { + register_t dummy; +}; +struct linux_mq_getsetattr_args { + register_t dummy; +}; +struct linux_kexec_load_args { + register_t dummy; +}; +struct linux_waitid_args { + char idtype_l_[PADL_(int)]; int idtype; char idtype_r_[PADR_(int)]; + char id_l_[PADL_(l_pid_t)]; l_pid_t id; char id_r_[PADR_(l_pid_t)]; + char info_l_[PADL_(l_siginfo_t *)]; l_siginfo_t * info; char info_r_[PADR_(l_siginfo_t *)]; + char options_l_[PADL_(int)]; int options; char options_r_[PADR_(int)]; + char rusage_l_[PADL_(struct rusage *)]; struct rusage * rusage; char rusage_r_[PADR_(struct rusage *)]; +}; +struct linux_add_key_args { + register_t dummy; +}; +struct linux_request_key_args { + register_t dummy; +}; +struct linux_keyctl_args { + register_t dummy; +}; +struct linux_ioprio_set_args { + register_t dummy; +}; +struct linux_ioprio_get_args { + register_t dummy; +}; +struct linux_inotify_init_args { + register_t dummy; +}; +struct linux_inotify_add_watch_args { + register_t dummy; +}; +struct linux_inotify_rm_watch_args { + register_t dummy; +}; +struct linux_migrate_pages_args { + register_t dummy; +}; +struct linux_openat_args { + char dfd_l_[PADL_(l_int)]; l_int dfd; char dfd_r_[PADR_(l_int)]; + char filename_l_[PADL_(const char *)]; const char * filename; char filename_r_[PADR_(const char *)]; + char flags_l_[PADL_(l_int)]; l_int flags; char flags_r_[PADR_(l_int)]; + char mode_l_[PADL_(l_int)]; l_int mode; char mode_r_[PADR_(l_int)]; +}; +struct linux_mkdirat_args { + char dfd_l_[PADL_(l_int)]; l_int dfd; char dfd_r_[PADR_(l_int)]; + char pathname_l_[PADL_(const char *)]; const char * pathname; char pathname_r_[PADR_(const char *)]; + char mode_l_[PADL_(l_int)]; l_int mode; char mode_r_[PADR_(l_int)]; +}; +struct linux_mknodat_args { + char dfd_l_[PADL_(l_int)]; l_int dfd; char dfd_r_[PADR_(l_int)]; + char filename_l_[PADL_(const char *)]; const char * filename; char filename_r_[PADR_(const char *)]; + char mode_l_[PADL_(l_int)]; l_int mode; char mode_r_[PADR_(l_int)]; + char dev_l_[PADL_(l_uint)]; l_uint dev; char dev_r_[PADR_(l_uint)]; +}; +struct linux_fchownat_args { + char dfd_l_[PADL_(l_int)]; l_int dfd; char dfd_r_[PADR_(l_int)]; + char filename_l_[PADL_(const char *)]; const char * filename; char filename_r_[PADR_(const char *)]; + char uid_l_[PADL_(l_uid_t)]; l_uid_t uid; char uid_r_[PADR_(l_uid_t)]; + char gid_l_[PADL_(l_gid_t)]; l_gid_t gid; char gid_r_[PADR_(l_gid_t)]; + char flag_l_[PADL_(l_int)]; l_int flag; char flag_r_[PADR_(l_int)]; +}; +struct linux_futimesat_args { + char dfd_l_[PADL_(l_int)]; l_int dfd; char dfd_r_[PADR_(l_int)]; + char filename_l_[PADL_(char *)]; char * filename; char filename_r_[PADR_(char *)]; + char utimes_l_[PADL_(struct l_timeval *)]; struct l_timeval * utimes; char utimes_r_[PADR_(struct l_timeval *)]; +}; +struct linux_newfstatat_args { + char dfd_l_[PADL_(l_int)]; l_int dfd; char dfd_r_[PADR_(l_int)]; + char pathname_l_[PADL_(char *)]; char * pathname; char pathname_r_[PADR_(char *)]; + char statbuf_l_[PADL_(struct l_stat64 *)]; struct l_stat64 * statbuf; char statbuf_r_[PADR_(struct l_stat64 *)]; + char flag_l_[PADL_(l_int)]; l_int flag; char flag_r_[PADR_(l_int)]; +}; +struct linux_unlinkat_args { + char dfd_l_[PADL_(l_int)]; l_int dfd; char dfd_r_[PADR_(l_int)]; + char pathname_l_[PADL_(const char *)]; const char * pathname; char pathname_r_[PADR_(const char *)]; + char flag_l_[PADL_(l_int)]; l_int flag; char flag_r_[PADR_(l_int)]; +}; +struct linux_renameat_args { + char olddfd_l_[PADL_(l_int)]; l_int olddfd; char olddfd_r_[PADR_(l_int)]; + char oldname_l_[PADL_(const char *)]; const char * oldname; char oldname_r_[PADR_(const char *)]; + char newdfd_l_[PADL_(l_int)]; l_int newdfd; char newdfd_r_[PADR_(l_int)]; + char newname_l_[PADL_(const char *)]; const char * newname; char newname_r_[PADR_(const char *)]; +}; +struct linux_linkat_args { + char olddfd_l_[PADL_(l_int)]; l_int olddfd; char olddfd_r_[PADR_(l_int)]; + char oldname_l_[PADL_(const char *)]; const char * oldname; char oldname_r_[PADR_(const char *)]; + char newdfd_l_[PADL_(l_int)]; l_int newdfd; char newdfd_r_[PADR_(l_int)]; + char newname_l_[PADL_(const char *)]; const char * newname; char newname_r_[PADR_(const char *)]; + char flag_l_[PADL_(l_int)]; l_int flag; char flag_r_[PADR_(l_int)]; +}; +struct linux_symlinkat_args { + char oldname_l_[PADL_(const char *)]; const char * oldname; char oldname_r_[PADR_(const char *)]; + char newdfd_l_[PADL_(l_int)]; l_int newdfd; char newdfd_r_[PADR_(l_int)]; + char newname_l_[PADL_(const char *)]; const char * newname; char newname_r_[PADR_(const char *)]; +}; +struct linux_readlinkat_args { + char dfd_l_[PADL_(l_int)]; l_int dfd; char dfd_r_[PADR_(l_int)]; + char path_l_[PADL_(const char *)]; const char * path; char path_r_[PADR_(const char *)]; + char buf_l_[PADL_(char *)]; char * buf; char buf_r_[PADR_(char *)]; + char bufsiz_l_[PADL_(l_int)]; l_int bufsiz; char bufsiz_r_[PADR_(l_int)]; +}; +struct linux_fchmodat_args { + char dfd_l_[PADL_(l_int)]; l_int dfd; char dfd_r_[PADR_(l_int)]; + char filename_l_[PADL_(const char *)]; const char * filename; char filename_r_[PADR_(const char *)]; + char mode_l_[PADL_(l_mode_t)]; l_mode_t mode; char mode_r_[PADR_(l_mode_t)]; +}; +struct linux_faccessat_args { + char dfd_l_[PADL_(l_int)]; l_int dfd; char dfd_r_[PADR_(l_int)]; + char filename_l_[PADL_(const char *)]; const char * filename; char filename_r_[PADR_(const char *)]; + char amode_l_[PADL_(l_int)]; l_int amode; char amode_r_[PADR_(l_int)]; +}; +struct linux_pselect6_args { + char nfds_l_[PADL_(l_int)]; l_int nfds; char nfds_r_[PADR_(l_int)]; + char readfds_l_[PADL_(l_fd_set *)]; l_fd_set * readfds; char readfds_r_[PADR_(l_fd_set *)]; + char writefds_l_[PADL_(l_fd_set *)]; l_fd_set * writefds; char writefds_r_[PADR_(l_fd_set *)]; + char exceptfds_l_[PADL_(l_fd_set *)]; l_fd_set * exceptfds; char exceptfds_r_[PADR_(l_fd_set *)]; + char tsp_l_[PADL_(struct l_timespec *)]; struct l_timespec * tsp; char tsp_r_[PADR_(struct l_timespec *)]; + char sig_l_[PADL_(l_uintptr_t *)]; l_uintptr_t * sig; char sig_r_[PADR_(l_uintptr_t *)]; +}; +struct linux_ppoll_args { + char fds_l_[PADL_(struct pollfd *)]; struct pollfd * fds; char fds_r_[PADR_(struct pollfd *)]; + char nfds_l_[PADL_(uint32_t)]; uint32_t nfds; char nfds_r_[PADR_(uint32_t)]; + char tsp_l_[PADL_(struct l_timespec *)]; struct l_timespec * tsp; char tsp_r_[PADR_(struct l_timespec *)]; + char sset_l_[PADL_(l_sigset_t *)]; l_sigset_t * sset; char sset_r_[PADR_(l_sigset_t *)]; + char ssize_l_[PADL_(l_size_t)]; l_size_t ssize; char ssize_r_[PADR_(l_size_t)]; +}; +struct linux_unshare_args { + register_t dummy; +}; +struct linux_set_robust_list_args { + char head_l_[PADL_(struct linux_robust_list_head *)]; struct linux_robust_list_head * head; char head_r_[PADR_(struct linux_robust_list_head *)]; + char len_l_[PADL_(l_size_t)]; l_size_t len; char len_r_[PADR_(l_size_t)]; +}; +struct linux_get_robust_list_args { + char pid_l_[PADL_(l_int)]; l_int pid; char pid_r_[PADR_(l_int)]; + char head_l_[PADL_(struct linux_robust_list_head *)]; struct linux_robust_list_head * head; char head_r_[PADR_(struct linux_robust_list_head *)]; + char len_l_[PADL_(l_size_t *)]; l_size_t * len; char len_r_[PADR_(l_size_t *)]; +}; +struct linux_splice_args { + register_t dummy; +}; +struct linux_tee_args { + register_t dummy; +}; +struct linux_sync_file_range_args { + register_t dummy; +}; +struct linux_vmsplice_args { + register_t dummy; +}; +struct linux_move_pages_args { + register_t dummy; +}; +struct linux_utimensat_args { + char dfd_l_[PADL_(l_int)]; l_int dfd; char dfd_r_[PADR_(l_int)]; + char pathname_l_[PADL_(const char *)]; const char * pathname; char pathname_r_[PADR_(const char *)]; + char times_l_[PADL_(const struct l_timespec *)]; const struct l_timespec * times; char times_r_[PADR_(const struct l_timespec *)]; + char flags_l_[PADL_(l_int)]; l_int flags; char flags_r_[PADR_(l_int)]; +}; +struct linux_epoll_pwait_args { + char epfd_l_[PADL_(l_int)]; l_int epfd; char epfd_r_[PADR_(l_int)]; + char events_l_[PADL_(struct epoll_event *)]; struct epoll_event * events; char events_r_[PADR_(struct epoll_event *)]; + char maxevents_l_[PADL_(l_int)]; l_int maxevents; char maxevents_r_[PADR_(l_int)]; + char timeout_l_[PADL_(l_int)]; l_int timeout; char timeout_r_[PADR_(l_int)]; + char mask_l_[PADL_(l_sigset_t *)]; l_sigset_t * mask; char mask_r_[PADR_(l_sigset_t *)]; +}; +struct linux_signalfd_args { + register_t dummy; +}; +struct linux_timerfd_args { + register_t dummy; +}; +struct linux_eventfd_args { + char initval_l_[PADL_(l_uint)]; l_uint initval; char initval_r_[PADR_(l_uint)]; +}; +struct linux_fallocate_args { + char fd_l_[PADL_(l_int)]; l_int fd; char fd_r_[PADR_(l_int)]; + char mode_l_[PADL_(l_int)]; l_int mode; char mode_r_[PADR_(l_int)]; + char offset_l_[PADL_(l_loff_t)]; l_loff_t offset; char offset_r_[PADR_(l_loff_t)]; + char len_l_[PADL_(l_loff_t)]; l_loff_t len; char len_r_[PADR_(l_loff_t)]; +}; +struct linux_timerfd_settime_args { + register_t dummy; +}; +struct linux_timerfd_gettime_args { + register_t dummy; +}; +struct linux_accept4_args { + char s_l_[PADL_(l_int)]; l_int s; char s_r_[PADR_(l_int)]; + char addr_l_[PADL_(l_uintptr_t)]; l_uintptr_t addr; char addr_r_[PADR_(l_uintptr_t)]; + char namelen_l_[PADL_(l_uintptr_t)]; l_uintptr_t namelen; char namelen_r_[PADR_(l_uintptr_t)]; + char flags_l_[PADL_(int)]; int flags; char flags_r_[PADR_(int)]; +}; +struct linux_signalfd4_args { + register_t dummy; +}; +struct linux_eventfd2_args { + char initval_l_[PADL_(l_uint)]; l_uint initval; char initval_r_[PADR_(l_uint)]; + char flags_l_[PADL_(l_int)]; l_int flags; char flags_r_[PADR_(l_int)]; +}; +struct linux_epoll_create1_args { + char flags_l_[PADL_(l_int)]; l_int flags; char flags_r_[PADR_(l_int)]; +}; +struct linux_dup3_args { + char oldfd_l_[PADL_(l_int)]; l_int oldfd; char oldfd_r_[PADR_(l_int)]; + char newfd_l_[PADL_(l_int)]; l_int newfd; char newfd_r_[PADR_(l_int)]; + char flags_l_[PADL_(l_int)]; l_int flags; char flags_r_[PADR_(l_int)]; +}; +struct linux_pipe2_args { + char pipefds_l_[PADL_(l_int *)]; l_int * pipefds; char pipefds_r_[PADR_(l_int *)]; + char flags_l_[PADL_(l_int)]; l_int flags; char flags_r_[PADR_(l_int)]; +}; +struct linux_inotify_init1_args { + register_t dummy; +}; +struct linux_preadv_args { + register_t dummy; +}; +struct linux_pwritev_args { + register_t dummy; +}; +struct linux_rt_tsigqueueinfo_args { + register_t dummy; +}; +struct linux_perf_event_open_args { + register_t dummy; +}; +struct linux_recvmmsg_args { + char s_l_[PADL_(l_int)]; l_int s; char s_r_[PADR_(l_int)]; + char msg_l_[PADL_(struct l_mmsghdr *)]; struct l_mmsghdr * msg; char msg_r_[PADR_(struct l_mmsghdr *)]; + char vlen_l_[PADL_(l_uint)]; l_uint vlen; char vlen_r_[PADR_(l_uint)]; + char flags_l_[PADL_(l_uint)]; l_uint flags; char flags_r_[PADR_(l_uint)]; + char timeout_l_[PADL_(struct l_timespec *)]; struct l_timespec * timeout; char timeout_r_[PADR_(struct l_timespec *)]; +}; +struct linux_fanotify_init_args { + register_t dummy; +}; +struct linux_fanotify_mark_args { + register_t dummy; +}; +struct linux_prlimit64_args { + char pid_l_[PADL_(l_pid_t)]; l_pid_t pid; char pid_r_[PADR_(l_pid_t)]; + char resource_l_[PADL_(l_uint)]; l_uint resource; char resource_r_[PADR_(l_uint)]; + char new_l_[PADL_(struct rlimit *)]; struct rlimit * new; char new_r_[PADR_(struct rlimit *)]; + char old_l_[PADL_(struct rlimit *)]; struct rlimit * old; char old_r_[PADR_(struct rlimit *)]; +}; +struct linux_name_to_handle_at_args { + register_t dummy; +}; +struct linux_open_by_handle_at_args { + register_t dummy; +}; +struct linux_clock_adjtime_args { + register_t dummy; +}; +struct linux_syncfs_args { + char fd_l_[PADL_(l_int)]; l_int fd; char fd_r_[PADR_(l_int)]; +}; +struct linux_sendmmsg_args { + char s_l_[PADL_(l_int)]; l_int s; char s_r_[PADR_(l_int)]; + char msg_l_[PADL_(struct l_mmsghdr *)]; struct l_mmsghdr * msg; char msg_r_[PADR_(struct l_mmsghdr *)]; + char vlen_l_[PADL_(l_uint)]; l_uint vlen; char vlen_r_[PADR_(l_uint)]; + char flags_l_[PADL_(l_uint)]; l_uint flags; char flags_r_[PADR_(l_uint)]; +}; +struct linux_setns_args { + register_t dummy; +}; +struct linux_process_vm_readv_args { + register_t dummy; +}; +struct linux_process_vm_writev_args { + register_t dummy; +}; +struct linux_kcmp_args { + register_t dummy; +}; +struct linux_finit_module_args { + register_t dummy; +}; +#define nosys linux_nosys +int linux_open(struct thread *, struct linux_open_args *); +int linux_newstat(struct thread *, struct linux_newstat_args *); +int linux_newfstat(struct thread *, struct linux_newfstat_args *); +int linux_newlstat(struct thread *, struct linux_newlstat_args *); +int linux_lseek(struct thread *, struct linux_lseek_args *); +int linux_mmap2(struct thread *, struct linux_mmap2_args *); +int linux_mprotect(struct thread *, struct linux_mprotect_args *); +int linux_brk(struct thread *, struct linux_brk_args *); +int linux_rt_sigaction(struct thread *, struct linux_rt_sigaction_args *); +int linux_rt_sigprocmask(struct thread *, struct linux_rt_sigprocmask_args *); +int linux_rt_sigreturn(struct thread *, struct linux_rt_sigreturn_args *); +int linux_ioctl(struct thread *, struct linux_ioctl_args *); +int linux_pread(struct thread *, struct linux_pread_args *); +int linux_pwrite(struct thread *, struct linux_pwrite_args *); +int linux_access(struct thread *, struct linux_access_args *); +int linux_pipe(struct thread *, struct linux_pipe_args *); +int linux_select(struct thread *, struct linux_select_args *); +int linux_mremap(struct thread *, struct linux_mremap_args *); +int linux_msync(struct thread *, struct linux_msync_args *); +int linux_mincore(struct thread *, struct linux_mincore_args *); +int linux_shmget(struct thread *, struct linux_shmget_args *); +int linux_shmat(struct thread *, struct linux_shmat_args *); +int linux_shmctl(struct thread *, struct linux_shmctl_args *); +int linux_pause(struct thread *, struct linux_pause_args *); +int linux_nanosleep(struct thread *, struct linux_nanosleep_args *); +int linux_getitimer(struct thread *, struct linux_getitimer_args *); +int linux_alarm(struct thread *, struct linux_alarm_args *); +int linux_setitimer(struct thread *, struct linux_setitimer_args *); +int linux_getpid(struct thread *, struct linux_getpid_args *); +int linux_sendfile(struct thread *, struct linux_sendfile_args *); +int linux_socket(struct thread *, struct linux_socket_args *); +int linux_connect(struct thread *, struct linux_connect_args *); +int linux_accept(struct thread *, struct linux_accept_args *); +int linux_sendto(struct thread *, struct linux_sendto_args *); +int linux_recvfrom(struct thread *, struct linux_recvfrom_args *); +int linux_sendmsg(struct thread *, struct linux_sendmsg_args *); +int linux_recvmsg(struct thread *, struct linux_recvmsg_args *); +int linux_shutdown(struct thread *, struct linux_shutdown_args *); +int linux_bind(struct thread *, struct linux_bind_args *); +int linux_listen(struct thread *, struct linux_listen_args *); +int linux_getsockname(struct thread *, struct linux_getsockname_args *); +int linux_getpeername(struct thread *, struct linux_getpeername_args *); +int linux_socketpair(struct thread *, struct linux_socketpair_args *); +int linux_setsockopt(struct thread *, struct linux_setsockopt_args *); +int linux_getsockopt(struct thread *, struct linux_getsockopt_args *); +int linux_clone(struct thread *, struct linux_clone_args *); +int linux_fork(struct thread *, struct linux_fork_args *); +int linux_vfork(struct thread *, struct linux_vfork_args *); +int linux_execve(struct thread *, struct linux_execve_args *); +int linux_exit(struct thread *, struct linux_exit_args *); +int linux_wait4(struct thread *, struct linux_wait4_args *); +int linux_kill(struct thread *, struct linux_kill_args *); +int linux_newuname(struct thread *, struct linux_newuname_args *); +int linux_semget(struct thread *, struct linux_semget_args *); +int linux_semop(struct thread *, struct linux_semop_args *); +int linux_semctl(struct thread *, struct linux_semctl_args *); +int linux_shmdt(struct thread *, struct linux_shmdt_args *); +int linux_msgget(struct thread *, struct linux_msgget_args *); +int linux_msgsnd(struct thread *, struct linux_msgsnd_args *); +int linux_msgrcv(struct thread *, struct linux_msgrcv_args *); +int linux_msgctl(struct thread *, struct linux_msgctl_args *); +int linux_fcntl(struct thread *, struct linux_fcntl_args *); +int linux_fdatasync(struct thread *, struct linux_fdatasync_args *); +int linux_truncate(struct thread *, struct linux_truncate_args *); +int linux_ftruncate(struct thread *, struct linux_ftruncate_args *); +int linux_getdents(struct thread *, struct linux_getdents_args *); +int linux_getcwd(struct thread *, struct linux_getcwd_args *); +int linux_chdir(struct thread *, struct linux_chdir_args *); +int linux_rename(struct thread *, struct linux_rename_args *); +int linux_mkdir(struct thread *, struct linux_mkdir_args *); +int linux_rmdir(struct thread *, struct linux_rmdir_args *); +int linux_creat(struct thread *, struct linux_creat_args *); +int linux_link(struct thread *, struct linux_link_args *); +int linux_unlink(struct thread *, struct linux_unlink_args *); +int linux_symlink(struct thread *, struct linux_symlink_args *); +int linux_readlink(struct thread *, struct linux_readlink_args *); +int linux_chmod(struct thread *, struct linux_chmod_args *); +int linux_chown(struct thread *, struct linux_chown_args *); +int linux_lchown(struct thread *, struct linux_lchown_args *); +int linux_getrlimit(struct thread *, struct linux_getrlimit_args *); +int linux_sysinfo(struct thread *, struct linux_sysinfo_args *); +int linux_times(struct thread *, struct linux_times_args *); +int linux_ptrace(struct thread *, struct linux_ptrace_args *); +int linux_getuid(struct thread *, struct linux_getuid_args *); +int linux_syslog(struct thread *, struct linux_syslog_args *); +int linux_getgid(struct thread *, struct linux_getgid_args *); +int linux_getppid(struct thread *, struct linux_getppid_args *); +int linux_getgroups(struct thread *, struct linux_getgroups_args *); +int linux_setgroups(struct thread *, struct linux_setgroups_args *); +int linux_setfsuid(struct thread *, struct linux_setfsuid_args *); +int linux_setfsgid(struct thread *, struct linux_setfsgid_args *); +int linux_getsid(struct thread *, struct linux_getsid_args *); +int linux_capget(struct thread *, struct linux_capget_args *); +int linux_capset(struct thread *, struct linux_capset_args *); +int linux_rt_sigpending(struct thread *, struct linux_rt_sigpending_args *); +int linux_rt_sigtimedwait(struct thread *, struct linux_rt_sigtimedwait_args *); +int linux_rt_sigqueueinfo(struct thread *, struct linux_rt_sigqueueinfo_args *); +int linux_rt_sigsuspend(struct thread *, struct linux_rt_sigsuspend_args *); +int linux_sigaltstack(struct thread *, struct linux_sigaltstack_args *); +int linux_utime(struct thread *, struct linux_utime_args *); +int linux_mknod(struct thread *, struct linux_mknod_args *); +int linux_personality(struct thread *, struct linux_personality_args *); +int linux_ustat(struct thread *, struct linux_ustat_args *); +int linux_statfs(struct thread *, struct linux_statfs_args *); +int linux_fstatfs(struct thread *, struct linux_fstatfs_args *); +int linux_sysfs(struct thread *, struct linux_sysfs_args *); +int linux_getpriority(struct thread *, struct linux_getpriority_args *); +int linux_sched_setparam(struct thread *, struct linux_sched_setparam_args *); +int linux_sched_getparam(struct thread *, struct linux_sched_getparam_args *); +int linux_sched_setscheduler(struct thread *, struct linux_sched_setscheduler_args *); +int linux_sched_getscheduler(struct thread *, struct linux_sched_getscheduler_args *); +int linux_sched_get_priority_max(struct thread *, struct linux_sched_get_priority_max_args *); +int linux_sched_get_priority_min(struct thread *, struct linux_sched_get_priority_min_args *); +int linux_sched_rr_get_interval(struct thread *, struct linux_sched_rr_get_interval_args *); +int linux_vhangup(struct thread *, struct linux_vhangup_args *); +int linux_pivot_root(struct thread *, struct linux_pivot_root_args *); +int linux_sysctl(struct thread *, struct linux_sysctl_args *); +int linux_prctl(struct thread *, struct linux_prctl_args *); +int linux_arch_prctl(struct thread *, struct linux_arch_prctl_args *); +int linux_adjtimex(struct thread *, struct linux_adjtimex_args *); +int linux_setrlimit(struct thread *, struct linux_setrlimit_args *); +int linux_mount(struct thread *, struct linux_mount_args *); +int linux_umount(struct thread *, struct linux_umount_args *); +int linux_swapoff(struct thread *, struct linux_swapoff_args *); +int linux_reboot(struct thread *, struct linux_reboot_args *); +int linux_sethostname(struct thread *, struct linux_sethostname_args *); +int linux_setdomainname(struct thread *, struct linux_setdomainname_args *); +int linux_iopl(struct thread *, struct linux_iopl_args *); +int linux_create_module(struct thread *, struct linux_create_module_args *); +int linux_init_module(struct thread *, struct linux_init_module_args *); +int linux_delete_module(struct thread *, struct linux_delete_module_args *); +int linux_get_kernel_syms(struct thread *, struct linux_get_kernel_syms_args *); +int linux_query_module(struct thread *, struct linux_query_module_args *); +int linux_quotactl(struct thread *, struct linux_quotactl_args *); +int linux_nfsservctl(struct thread *, struct linux_nfsservctl_args *); +int linux_getpmsg(struct thread *, struct linux_getpmsg_args *); +int linux_putpmsg(struct thread *, struct linux_putpmsg_args *); +int linux_afs_syscall(struct thread *, struct linux_afs_syscall_args *); +int linux_tuxcall(struct thread *, struct linux_tuxcall_args *); +int linux_security(struct thread *, struct linux_security_args *); +int linux_gettid(struct thread *, struct linux_gettid_args *); +int linux_setxattr(struct thread *, struct linux_setxattr_args *); +int linux_lsetxattr(struct thread *, struct linux_lsetxattr_args *); +int linux_fsetxattr(struct thread *, struct linux_fsetxattr_args *); +int linux_getxattr(struct thread *, struct linux_getxattr_args *); +int linux_lgetxattr(struct thread *, struct linux_lgetxattr_args *); +int linux_fgetxattr(struct thread *, struct linux_fgetxattr_args *); +int linux_listxattr(struct thread *, struct linux_listxattr_args *); +int linux_llistxattr(struct thread *, struct linux_llistxattr_args *); +int linux_flistxattr(struct thread *, struct linux_flistxattr_args *); +int linux_removexattr(struct thread *, struct linux_removexattr_args *); +int linux_lremovexattr(struct thread *, struct linux_lremovexattr_args *); +int linux_fremovexattr(struct thread *, struct linux_fremovexattr_args *); +int linux_tkill(struct thread *, struct linux_tkill_args *); +int linux_time(struct thread *, struct linux_time_args *); +int linux_sys_futex(struct thread *, struct linux_sys_futex_args *); +int linux_sched_setaffinity(struct thread *, struct linux_sched_setaffinity_args *); +int linux_sched_getaffinity(struct thread *, struct linux_sched_getaffinity_args *); +int linux_set_thread_area(struct thread *, struct linux_set_thread_area_args *); +int linux_lookup_dcookie(struct thread *, struct linux_lookup_dcookie_args *); +int linux_epoll_create(struct thread *, struct linux_epoll_create_args *); +int linux_epoll_ctl_old(struct thread *, struct linux_epoll_ctl_old_args *); +int linux_epoll_wait_old(struct thread *, struct linux_epoll_wait_old_args *); +int linux_remap_file_pages(struct thread *, struct linux_remap_file_pages_args *); +int linux_getdents64(struct thread *, struct linux_getdents64_args *); +int linux_set_tid_address(struct thread *, struct linux_set_tid_address_args *); +int linux_semtimedop(struct thread *, struct linux_semtimedop_args *); +int linux_fadvise64(struct thread *, struct linux_fadvise64_args *); +int linux_timer_create(struct thread *, struct linux_timer_create_args *); +int linux_timer_settime(struct thread *, struct linux_timer_settime_args *); +int linux_timer_gettime(struct thread *, struct linux_timer_gettime_args *); +int linux_timer_getoverrun(struct thread *, struct linux_timer_getoverrun_args *); +int linux_timer_delete(struct thread *, struct linux_timer_delete_args *); +int linux_clock_settime(struct thread *, struct linux_clock_settime_args *); +int linux_clock_gettime(struct thread *, struct linux_clock_gettime_args *); +int linux_clock_getres(struct thread *, struct linux_clock_getres_args *); +int linux_clock_nanosleep(struct thread *, struct linux_clock_nanosleep_args *); +int linux_exit_group(struct thread *, struct linux_exit_group_args *); +int linux_epoll_wait(struct thread *, struct linux_epoll_wait_args *); +int linux_epoll_ctl(struct thread *, struct linux_epoll_ctl_args *); +int linux_tgkill(struct thread *, struct linux_tgkill_args *); +int linux_utimes(struct thread *, struct linux_utimes_args *); +int linux_mbind(struct thread *, struct linux_mbind_args *); +int linux_set_mempolicy(struct thread *, struct linux_set_mempolicy_args *); +int linux_get_mempolicy(struct thread *, struct linux_get_mempolicy_args *); +int linux_mq_open(struct thread *, struct linux_mq_open_args *); +int linux_mq_unlink(struct thread *, struct linux_mq_unlink_args *); +int linux_mq_timedsend(struct thread *, struct linux_mq_timedsend_args *); +int linux_mq_timedreceive(struct thread *, struct linux_mq_timedreceive_args *); +int linux_mq_notify(struct thread *, struct linux_mq_notify_args *); +int linux_mq_getsetattr(struct thread *, struct linux_mq_getsetattr_args *); +int linux_kexec_load(struct thread *, struct linux_kexec_load_args *); +int linux_waitid(struct thread *, struct linux_waitid_args *); +int linux_add_key(struct thread *, struct linux_add_key_args *); +int linux_request_key(struct thread *, struct linux_request_key_args *); +int linux_keyctl(struct thread *, struct linux_keyctl_args *); +int linux_ioprio_set(struct thread *, struct linux_ioprio_set_args *); +int linux_ioprio_get(struct thread *, struct linux_ioprio_get_args *); +int linux_inotify_init(struct thread *, struct linux_inotify_init_args *); +int linux_inotify_add_watch(struct thread *, struct linux_inotify_add_watch_args *); +int linux_inotify_rm_watch(struct thread *, struct linux_inotify_rm_watch_args *); +int linux_migrate_pages(struct thread *, struct linux_migrate_pages_args *); +int linux_openat(struct thread *, struct linux_openat_args *); +int linux_mkdirat(struct thread *, struct linux_mkdirat_args *); +int linux_mknodat(struct thread *, struct linux_mknodat_args *); +int linux_fchownat(struct thread *, struct linux_fchownat_args *); +int linux_futimesat(struct thread *, struct linux_futimesat_args *); +int linux_newfstatat(struct thread *, struct linux_newfstatat_args *); +int linux_unlinkat(struct thread *, struct linux_unlinkat_args *); +int linux_renameat(struct thread *, struct linux_renameat_args *); +int linux_linkat(struct thread *, struct linux_linkat_args *); +int linux_symlinkat(struct thread *, struct linux_symlinkat_args *); +int linux_readlinkat(struct thread *, struct linux_readlinkat_args *); +int linux_fchmodat(struct thread *, struct linux_fchmodat_args *); +int linux_faccessat(struct thread *, struct linux_faccessat_args *); +int linux_pselect6(struct thread *, struct linux_pselect6_args *); +int linux_ppoll(struct thread *, struct linux_ppoll_args *); +int linux_unshare(struct thread *, struct linux_unshare_args *); +int linux_set_robust_list(struct thread *, struct linux_set_robust_list_args *); +int linux_get_robust_list(struct thread *, struct linux_get_robust_list_args *); +int linux_splice(struct thread *, struct linux_splice_args *); +int linux_tee(struct thread *, struct linux_tee_args *); +int linux_sync_file_range(struct thread *, struct linux_sync_file_range_args *); +int linux_vmsplice(struct thread *, struct linux_vmsplice_args *); +int linux_move_pages(struct thread *, struct linux_move_pages_args *); +int linux_utimensat(struct thread *, struct linux_utimensat_args *); +int linux_epoll_pwait(struct thread *, struct linux_epoll_pwait_args *); +int linux_signalfd(struct thread *, struct linux_signalfd_args *); +int linux_timerfd(struct thread *, struct linux_timerfd_args *); +int linux_eventfd(struct thread *, struct linux_eventfd_args *); +int linux_fallocate(struct thread *, struct linux_fallocate_args *); +int linux_timerfd_settime(struct thread *, struct linux_timerfd_settime_args *); +int linux_timerfd_gettime(struct thread *, struct linux_timerfd_gettime_args *); +int linux_accept4(struct thread *, struct linux_accept4_args *); +int linux_signalfd4(struct thread *, struct linux_signalfd4_args *); +int linux_eventfd2(struct thread *, struct linux_eventfd2_args *); +int linux_epoll_create1(struct thread *, struct linux_epoll_create1_args *); +int linux_dup3(struct thread *, struct linux_dup3_args *); +int linux_pipe2(struct thread *, struct linux_pipe2_args *); +int linux_inotify_init1(struct thread *, struct linux_inotify_init1_args *); +int linux_preadv(struct thread *, struct linux_preadv_args *); +int linux_pwritev(struct thread *, struct linux_pwritev_args *); +int linux_rt_tsigqueueinfo(struct thread *, struct linux_rt_tsigqueueinfo_args *); +int linux_perf_event_open(struct thread *, struct linux_perf_event_open_args *); +int linux_recvmmsg(struct thread *, struct linux_recvmmsg_args *); +int linux_fanotify_init(struct thread *, struct linux_fanotify_init_args *); +int linux_fanotify_mark(struct thread *, struct linux_fanotify_mark_args *); +int linux_prlimit64(struct thread *, struct linux_prlimit64_args *); +int linux_name_to_handle_at(struct thread *, struct linux_name_to_handle_at_args *); +int linux_open_by_handle_at(struct thread *, struct linux_open_by_handle_at_args *); +int linux_clock_adjtime(struct thread *, struct linux_clock_adjtime_args *); +int linux_syncfs(struct thread *, struct linux_syncfs_args *); +int linux_sendmmsg(struct thread *, struct linux_sendmmsg_args *); +int linux_setns(struct thread *, struct linux_setns_args *); +int linux_process_vm_readv(struct thread *, struct linux_process_vm_readv_args *); +int linux_process_vm_writev(struct thread *, struct linux_process_vm_writev_args *); +int linux_kcmp(struct thread *, struct linux_kcmp_args *); +int linux_finit_module(struct thread *, struct linux_finit_module_args *); + +#ifdef COMPAT_43 + +#define nosys linux_nosys + +#endif /* COMPAT_43 */ + + +#ifdef COMPAT_FREEBSD4 + +#define nosys linux_nosys + +#endif /* COMPAT_FREEBSD4 */ + + +#ifdef COMPAT_FREEBSD6 + +#define nosys linux_nosys + +#endif /* COMPAT_FREEBSD6 */ + + +#ifdef COMPAT_FREEBSD7 + +#define nosys linux_nosys + +#endif /* COMPAT_FREEBSD7 */ + +#define LINUX_SYS_AUE_linux_open AUE_OPEN_RWTC +#define LINUX_SYS_AUE_linux_newstat AUE_STAT +#define LINUX_SYS_AUE_linux_newfstat AUE_FSTAT +#define LINUX_SYS_AUE_linux_newlstat AUE_LSTAT +#define LINUX_SYS_AUE_linux_lseek AUE_LSEEK +#define LINUX_SYS_AUE_linux_mmap2 AUE_MMAP +#define LINUX_SYS_AUE_linux_mprotect AUE_MPROTECT +#define LINUX_SYS_AUE_linux_brk AUE_NULL +#define LINUX_SYS_AUE_linux_rt_sigaction AUE_NULL +#define LINUX_SYS_AUE_linux_rt_sigprocmask AUE_NULL +#define LINUX_SYS_AUE_linux_rt_sigreturn AUE_NULL +#define LINUX_SYS_AUE_linux_ioctl AUE_IOCTL +#define LINUX_SYS_AUE_linux_pread AUE_PREAD +#define LINUX_SYS_AUE_linux_pwrite AUE_PWRITE +#define LINUX_SYS_AUE_linux_access AUE_ACCESS +#define LINUX_SYS_AUE_linux_pipe AUE_PIPE +#define LINUX_SYS_AUE_linux_select AUE_SELECT +#define LINUX_SYS_AUE_linux_mremap AUE_NULL +#define LINUX_SYS_AUE_linux_msync AUE_MSYNC +#define LINUX_SYS_AUE_linux_mincore AUE_MINCORE +#define LINUX_SYS_AUE_linux_shmget AUE_NULL +#define LINUX_SYS_AUE_linux_shmat AUE_NULL +#define LINUX_SYS_AUE_linux_shmctl AUE_NULL +#define LINUX_SYS_AUE_linux_pause AUE_NULL +#define LINUX_SYS_AUE_linux_nanosleep AUE_NULL +#define LINUX_SYS_AUE_linux_getitimer AUE_GETITIMER +#define LINUX_SYS_AUE_linux_alarm AUE_NULL +#define LINUX_SYS_AUE_linux_setitimer AUE_SETITIMER +#define LINUX_SYS_AUE_linux_getpid AUE_GETPID +#define LINUX_SYS_AUE_linux_sendfile AUE_SENDFILE +#define LINUX_SYS_AUE_linux_socket AUE_SOCKET +#define LINUX_SYS_AUE_linux_connect AUE_CONNECT +#define LINUX_SYS_AUE_linux_accept AUE_ACCEPT +#define LINUX_SYS_AUE_linux_sendto AUE_SENDTO +#define LINUX_SYS_AUE_linux_recvfrom AUE_RECVFROM +#define LINUX_SYS_AUE_linux_sendmsg AUE_SENDMSG +#define LINUX_SYS_AUE_linux_recvmsg AUE_RECVMSG +#define LINUX_SYS_AUE_linux_shutdown AUE_NULL +#define LINUX_SYS_AUE_linux_bind AUE_BIND +#define LINUX_SYS_AUE_linux_listen AUE_LISTEN +#define LINUX_SYS_AUE_linux_getsockname AUE_GETSOCKNAME +#define LINUX_SYS_AUE_linux_getpeername AUE_GETPEERNAME +#define LINUX_SYS_AUE_linux_socketpair AUE_SOCKETPAIR +#define LINUX_SYS_AUE_linux_setsockopt AUE_SETSOCKOPT +#define LINUX_SYS_AUE_linux_getsockopt AUE_GETSOCKOPT +#define LINUX_SYS_AUE_linux_clone AUE_RFORK +#define LINUX_SYS_AUE_linux_fork AUE_FORK +#define LINUX_SYS_AUE_linux_vfork AUE_VFORK +#define LINUX_SYS_AUE_linux_execve AUE_EXECVE +#define LINUX_SYS_AUE_linux_exit AUE_EXIT +#define LINUX_SYS_AUE_linux_wait4 AUE_WAIT4 +#define LINUX_SYS_AUE_linux_kill AUE_KILL +#define LINUX_SYS_AUE_linux_newuname AUE_NULL +#define LINUX_SYS_AUE_linux_semget AUE_NULL +#define LINUX_SYS_AUE_linux_semop AUE_NULL +#define LINUX_SYS_AUE_linux_semctl AUE_NULL +#define LINUX_SYS_AUE_linux_shmdt AUE_NULL +#define LINUX_SYS_AUE_linux_msgget AUE_NULL +#define LINUX_SYS_AUE_linux_msgsnd AUE_NULL +#define LINUX_SYS_AUE_linux_msgrcv AUE_NULL +#define LINUX_SYS_AUE_linux_msgctl AUE_NULL +#define LINUX_SYS_AUE_linux_fcntl AUE_FCNTL +#define LINUX_SYS_AUE_linux_fdatasync AUE_NULL +#define LINUX_SYS_AUE_linux_truncate AUE_TRUNCATE +#define LINUX_SYS_AUE_linux_ftruncate AUE_FTRUNCATE +#define LINUX_SYS_AUE_linux_getdents AUE_GETDIRENTRIES +#define LINUX_SYS_AUE_linux_getcwd AUE_GETCWD +#define LINUX_SYS_AUE_linux_chdir AUE_CHDIR +#define LINUX_SYS_AUE_linux_rename AUE_RENAME +#define LINUX_SYS_AUE_linux_mkdir AUE_MKDIR +#define LINUX_SYS_AUE_linux_rmdir AUE_RMDIR +#define LINUX_SYS_AUE_linux_creat AUE_CREAT +#define LINUX_SYS_AUE_linux_link AUE_LINK +#define LINUX_SYS_AUE_linux_unlink AUE_UNLINK +#define LINUX_SYS_AUE_linux_symlink AUE_SYMLINK +#define LINUX_SYS_AUE_linux_readlink AUE_READLINK +#define LINUX_SYS_AUE_linux_chmod AUE_CHMOD +#define LINUX_SYS_AUE_linux_chown AUE_LCHOWN +#define LINUX_SYS_AUE_linux_lchown AUE_LCHOWN +#define LINUX_SYS_AUE_linux_getrlimit AUE_GETRLIMIT +#define LINUX_SYS_AUE_linux_sysinfo AUE_NULL +#define LINUX_SYS_AUE_linux_times AUE_NULL +#define LINUX_SYS_AUE_linux_ptrace AUE_PTRACE +#define LINUX_SYS_AUE_linux_getuid AUE_GETUID +#define LINUX_SYS_AUE_linux_syslog AUE_NULL +#define LINUX_SYS_AUE_linux_getgid AUE_GETGID +#define LINUX_SYS_AUE_linux_getppid AUE_GETPPID +#define LINUX_SYS_AUE_linux_getgroups AUE_GETGROUPS +#define LINUX_SYS_AUE_linux_setgroups AUE_SETGROUPS +#define LINUX_SYS_AUE_linux_setfsuid AUE_SETFSUID +#define LINUX_SYS_AUE_linux_setfsgid AUE_SETFSGID +#define LINUX_SYS_AUE_linux_getsid AUE_GETSID +#define LINUX_SYS_AUE_linux_capget AUE_CAPGET +#define LINUX_SYS_AUE_linux_capset AUE_CAPSET +#define LINUX_SYS_AUE_linux_rt_sigpending AUE_NULL +#define LINUX_SYS_AUE_linux_rt_sigtimedwait AUE_NULL +#define LINUX_SYS_AUE_linux_rt_sigqueueinfo AUE_NULL +#define LINUX_SYS_AUE_linux_rt_sigsuspend AUE_NULL +#define LINUX_SYS_AUE_linux_sigaltstack AUE_NULL +#define LINUX_SYS_AUE_linux_utime AUE_UTIME +#define LINUX_SYS_AUE_linux_mknod AUE_MKNOD +#define LINUX_SYS_AUE_linux_personality AUE_PERSONALITY +#define LINUX_SYS_AUE_linux_ustat AUE_NULL +#define LINUX_SYS_AUE_linux_statfs AUE_STATFS +#define LINUX_SYS_AUE_linux_fstatfs AUE_FSTATFS +#define LINUX_SYS_AUE_linux_sysfs AUE_NULL +#define LINUX_SYS_AUE_linux_getpriority AUE_GETPRIORITY +#define LINUX_SYS_AUE_linux_sched_setparam AUE_SCHED_SETPARAM +#define LINUX_SYS_AUE_linux_sched_getparam AUE_SCHED_GETPARAM +#define LINUX_SYS_AUE_linux_sched_setscheduler AUE_SCHED_SETSCHEDULER +#define LINUX_SYS_AUE_linux_sched_getscheduler AUE_SCHED_GETSCHEDULER +#define LINUX_SYS_AUE_linux_sched_get_priority_max AUE_SCHED_GET_PRIORITY_MAX +#define LINUX_SYS_AUE_linux_sched_get_priority_min AUE_SCHED_GET_PRIORITY_MIN +#define LINUX_SYS_AUE_linux_sched_rr_get_interval AUE_SCHED_RR_GET_INTERVAL +#define LINUX_SYS_AUE_linux_vhangup AUE_NULL +#define LINUX_SYS_AUE_linux_pivot_root AUE_PIVOT_ROOT +#define LINUX_SYS_AUE_linux_sysctl AUE_SYSCTL +#define LINUX_SYS_AUE_linux_prctl AUE_PRCTL +#define LINUX_SYS_AUE_linux_arch_prctl AUE_PRCTL +#define LINUX_SYS_AUE_linux_adjtimex AUE_ADJTIME +#define LINUX_SYS_AUE_linux_setrlimit AUE_SETRLIMIT +#define LINUX_SYS_AUE_linux_mount AUE_MOUNT +#define LINUX_SYS_AUE_linux_umount AUE_UMOUNT +#define LINUX_SYS_AUE_linux_swapoff AUE_SWAPOFF +#define LINUX_SYS_AUE_linux_reboot AUE_REBOOT +#define LINUX_SYS_AUE_linux_sethostname AUE_SYSCTL +#define LINUX_SYS_AUE_linux_setdomainname AUE_SYSCTL +#define LINUX_SYS_AUE_linux_iopl AUE_NULL +#define LINUX_SYS_AUE_linux_create_module AUE_NULL +#define LINUX_SYS_AUE_linux_init_module AUE_NULL +#define LINUX_SYS_AUE_linux_delete_module AUE_NULL +#define LINUX_SYS_AUE_linux_get_kernel_syms AUE_NULL +#define LINUX_SYS_AUE_linux_query_module AUE_NULL +#define LINUX_SYS_AUE_linux_quotactl AUE_QUOTACTL +#define LINUX_SYS_AUE_linux_nfsservctl AUE_NULL +#define LINUX_SYS_AUE_linux_getpmsg AUE_GETPMSG +#define LINUX_SYS_AUE_linux_putpmsg AUE_PUTPMSG +#define LINUX_SYS_AUE_linux_afs_syscall AUE_NULL +#define LINUX_SYS_AUE_linux_tuxcall AUE_NULL +#define LINUX_SYS_AUE_linux_security AUE_NULL +#define LINUX_SYS_AUE_linux_gettid AUE_NULL +#define LINUX_SYS_AUE_linux_setxattr AUE_NULL +#define LINUX_SYS_AUE_linux_lsetxattr AUE_NULL +#define LINUX_SYS_AUE_linux_fsetxattr AUE_NULL +#define LINUX_SYS_AUE_linux_getxattr AUE_NULL +#define LINUX_SYS_AUE_linux_lgetxattr AUE_NULL +#define LINUX_SYS_AUE_linux_fgetxattr AUE_NULL +#define LINUX_SYS_AUE_linux_listxattr AUE_NULL +#define LINUX_SYS_AUE_linux_llistxattr AUE_NULL +#define LINUX_SYS_AUE_linux_flistxattr AUE_NULL +#define LINUX_SYS_AUE_linux_removexattr AUE_NULL +#define LINUX_SYS_AUE_linux_lremovexattr AUE_NULL +#define LINUX_SYS_AUE_linux_fremovexattr AUE_NULL +#define LINUX_SYS_AUE_linux_tkill AUE_NULL +#define LINUX_SYS_AUE_linux_time AUE_NULL +#define LINUX_SYS_AUE_linux_sys_futex AUE_NULL +#define LINUX_SYS_AUE_linux_sched_setaffinity AUE_NULL +#define LINUX_SYS_AUE_linux_sched_getaffinity AUE_NULL +#define LINUX_SYS_AUE_linux_set_thread_area AUE_NULL +#define LINUX_SYS_AUE_linux_lookup_dcookie AUE_NULL +#define LINUX_SYS_AUE_linux_epoll_create AUE_NULL +#define LINUX_SYS_AUE_linux_epoll_ctl_old AUE_NULL +#define LINUX_SYS_AUE_linux_epoll_wait_old AUE_NULL +#define LINUX_SYS_AUE_linux_remap_file_pages AUE_NULL +#define LINUX_SYS_AUE_linux_getdents64 AUE_GETDIRENTRIES +#define LINUX_SYS_AUE_linux_set_tid_address AUE_NULL +#define LINUX_SYS_AUE_linux_semtimedop AUE_NULL +#define LINUX_SYS_AUE_linux_fadvise64 AUE_NULL +#define LINUX_SYS_AUE_linux_timer_create AUE_NULL +#define LINUX_SYS_AUE_linux_timer_settime AUE_NULL +#define LINUX_SYS_AUE_linux_timer_gettime AUE_NULL +#define LINUX_SYS_AUE_linux_timer_getoverrun AUE_NULL +#define LINUX_SYS_AUE_linux_timer_delete AUE_NULL +#define LINUX_SYS_AUE_linux_clock_settime AUE_CLOCK_SETTIME +#define LINUX_SYS_AUE_linux_clock_gettime AUE_NULL +#define LINUX_SYS_AUE_linux_clock_getres AUE_NULL +#define LINUX_SYS_AUE_linux_clock_nanosleep AUE_NULL +#define LINUX_SYS_AUE_linux_exit_group AUE_EXIT +#define LINUX_SYS_AUE_linux_epoll_wait AUE_NULL +#define LINUX_SYS_AUE_linux_epoll_ctl AUE_NULL +#define LINUX_SYS_AUE_linux_tgkill AUE_NULL +#define LINUX_SYS_AUE_linux_utimes AUE_UTIMES +#define LINUX_SYS_AUE_linux_mbind AUE_NULL +#define LINUX_SYS_AUE_linux_set_mempolicy AUE_NULL +#define LINUX_SYS_AUE_linux_get_mempolicy AUE_NULL +#define LINUX_SYS_AUE_linux_mq_open AUE_NULL +#define LINUX_SYS_AUE_linux_mq_unlink AUE_NULL +#define LINUX_SYS_AUE_linux_mq_timedsend AUE_NULL +#define LINUX_SYS_AUE_linux_mq_timedreceive AUE_NULL +#define LINUX_SYS_AUE_linux_mq_notify AUE_NULL +#define LINUX_SYS_AUE_linux_mq_getsetattr AUE_NULL +#define LINUX_SYS_AUE_linux_kexec_load AUE_NULL +#define LINUX_SYS_AUE_linux_waitid AUE_WAIT6 +#define LINUX_SYS_AUE_linux_add_key AUE_NULL +#define LINUX_SYS_AUE_linux_request_key AUE_NULL +#define LINUX_SYS_AUE_linux_keyctl AUE_NULL +#define LINUX_SYS_AUE_linux_ioprio_set AUE_NULL +#define LINUX_SYS_AUE_linux_ioprio_get AUE_NULL +#define LINUX_SYS_AUE_linux_inotify_init AUE_NULL +#define LINUX_SYS_AUE_linux_inotify_add_watch AUE_NULL +#define LINUX_SYS_AUE_linux_inotify_rm_watch AUE_NULL +#define LINUX_SYS_AUE_linux_migrate_pages AUE_NULL +#define LINUX_SYS_AUE_linux_openat AUE_OPEN_RWTC +#define LINUX_SYS_AUE_linux_mkdirat AUE_MKDIRAT +#define LINUX_SYS_AUE_linux_mknodat AUE_MKNODAT +#define LINUX_SYS_AUE_linux_fchownat AUE_FCHOWNAT +#define LINUX_SYS_AUE_linux_futimesat AUE_FUTIMESAT +#define LINUX_SYS_AUE_linux_newfstatat AUE_FSTATAT +#define LINUX_SYS_AUE_linux_unlinkat AUE_UNLINKAT +#define LINUX_SYS_AUE_linux_renameat AUE_RENAMEAT +#define LINUX_SYS_AUE_linux_linkat AUE_LINKAT +#define LINUX_SYS_AUE_linux_symlinkat AUE_SYMLINKAT +#define LINUX_SYS_AUE_linux_readlinkat AUE_READLINKAT +#define LINUX_SYS_AUE_linux_fchmodat AUE_FCHMODAT +#define LINUX_SYS_AUE_linux_faccessat AUE_FACCESSAT +#define LINUX_SYS_AUE_linux_pselect6 AUE_SELECT +#define LINUX_SYS_AUE_linux_ppoll AUE_POLL +#define LINUX_SYS_AUE_linux_unshare AUE_NULL +#define LINUX_SYS_AUE_linux_set_robust_list AUE_NULL +#define LINUX_SYS_AUE_linux_get_robust_list AUE_NULL +#define LINUX_SYS_AUE_linux_splice AUE_NULL +#define LINUX_SYS_AUE_linux_tee AUE_NULL +#define LINUX_SYS_AUE_linux_sync_file_range AUE_NULL +#define LINUX_SYS_AUE_linux_vmsplice AUE_NULL +#define LINUX_SYS_AUE_linux_move_pages AUE_NULL +#define LINUX_SYS_AUE_linux_utimensat AUE_FUTIMESAT +#define LINUX_SYS_AUE_linux_epoll_pwait AUE_NULL +#define LINUX_SYS_AUE_linux_signalfd AUE_NULL +#define LINUX_SYS_AUE_linux_timerfd AUE_NULL +#define LINUX_SYS_AUE_linux_eventfd AUE_NULL +#define LINUX_SYS_AUE_linux_fallocate AUE_NULL +#define LINUX_SYS_AUE_linux_timerfd_settime AUE_NULL +#define LINUX_SYS_AUE_linux_timerfd_gettime AUE_NULL +#define LINUX_SYS_AUE_linux_accept4 AUE_ACCEPT +#define LINUX_SYS_AUE_linux_signalfd4 AUE_NULL +#define LINUX_SYS_AUE_linux_eventfd2 AUE_NULL +#define LINUX_SYS_AUE_linux_epoll_create1 AUE_NULL +#define LINUX_SYS_AUE_linux_dup3 AUE_NULL +#define LINUX_SYS_AUE_linux_pipe2 AUE_NULL +#define LINUX_SYS_AUE_linux_inotify_init1 AUE_NULL +#define LINUX_SYS_AUE_linux_preadv AUE_NULL +#define LINUX_SYS_AUE_linux_pwritev AUE_NULL +#define LINUX_SYS_AUE_linux_rt_tsigqueueinfo AUE_NULL +#define LINUX_SYS_AUE_linux_perf_event_open AUE_NULL +#define LINUX_SYS_AUE_linux_recvmmsg AUE_NULL +#define LINUX_SYS_AUE_linux_fanotify_init AUE_NULL +#define LINUX_SYS_AUE_linux_fanotify_mark AUE_NULL +#define LINUX_SYS_AUE_linux_prlimit64 AUE_NULL +#define LINUX_SYS_AUE_linux_name_to_handle_at AUE_NULL +#define LINUX_SYS_AUE_linux_open_by_handle_at AUE_NULL +#define LINUX_SYS_AUE_linux_clock_adjtime AUE_NULL +#define LINUX_SYS_AUE_linux_syncfs AUE_SYNC +#define LINUX_SYS_AUE_linux_sendmmsg AUE_NULL +#define LINUX_SYS_AUE_linux_setns AUE_NULL +#define LINUX_SYS_AUE_linux_process_vm_readv AUE_NULL +#define LINUX_SYS_AUE_linux_process_vm_writev AUE_NULL +#define LINUX_SYS_AUE_linux_kcmp AUE_NULL +#define LINUX_SYS_AUE_linux_finit_module AUE_NULL + +#undef PAD_ +#undef PADL_ +#undef PADR_ + +#endif /* !_LINUX_SYSPROTO_H_ */ diff --git a/sys/amd64/linux/linux_support.s b/sys/amd64/linux/linux_support.s new file mode 100644 index 000000000000..f809d1199b03 --- /dev/null +++ b/sys/amd64/linux/linux_support.s @@ -0,0 +1,124 @@ +/*- + * Copyright (c) 2007 Konstantin Belousov + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include "linux_assym.h" /* system definitions */ +#include /* miscellaneous asm macros */ + +#include "assym.s" + +futex_fault: + movq $0,PCB_ONFAULT(%r8) + movl $-EFAULT,%eax + ret + +ENTRY(futex_xchgl) + movq PCPU(CURPCB),%r8 + movq $futex_fault,PCB_ONFAULT(%r8) + movq $VM_MAXUSER_ADDRESS-4,%rax + cmpq %rax,%rsi + ja futex_fault + xchgq %rdi,(%rsi) + movq %rdi,(%rdx) + xorq %rax,%rax + movq %rax,PCB_ONFAULT(%r8) + ret + +ENTRY(futex_addl) + movq PCPU(CURPCB),%r8 + movq $futex_fault,PCB_ONFAULT(%r8) + movq $VM_MAXUSER_ADDRESS-4,%rax + cmpq %rax,%rsi + ja futex_fault +#ifdef SMP + lock +#endif + xaddq %rdi,(%rsi) + movq %rdi,(%rdx) + xorq %rax,%rax + movq %rax,PCB_ONFAULT(%r8) + ret + +ENTRY(futex_orl) + movq PCPU(CURPCB),%r8 + movq $futex_fault,PCB_ONFAULT(%r8) + movq $VM_MAXUSER_ADDRESS-4,%rax + cmpq %rax,%rsi + ja futex_fault + movq (%rsi),%rax +1: movq %rax,%rcx + orq %rdi,%rcx +#ifdef SMP + lock +#endif + cmpxchgq %rcx,(%rsi) + jnz 1b + movq %rax,(%rdx) + xorq %rax,%rax + movq %rax,PCB_ONFAULT(%r8) + ret + +ENTRY(futex_andl) + movq PCPU(CURPCB),%r8 + movq $futex_fault,PCB_ONFAULT(%r8) + movq $VM_MAXUSER_ADDRESS-4,%rax + cmpq %rax,%rsi + ja futex_fault + movq (%rsi),%rax +1: movq %rax,%rcx + andq %rdi,%rcx +#ifdef SMP + lock +#endif + cmpxchgq %rcx,(%rsi) + jnz 1b + movq %rax,(%rdx) + xorq %rax,%rax + movq %rax,PCB_ONFAULT(%r8) + ret + +ENTRY(futex_xorl) + movq PCPU(CURPCB),%r8 + movq $futex_fault,PCB_ONFAULT(%r8) + movq $VM_MAXUSER_ADDRESS-4,%rax + cmpq %rax,%rsi + ja futex_fault + movq (%rsi),%rax +1: movq %rax,%rcx + xorq %rdi,%rcx +#ifdef SMP + lock +#endif + cmpxchgq %rcx,(%rsi) + jnz 1b + movq %rax,(%rdx) + xorq %rax,%rax + movq %rax,PCB_ONFAULT(%r8) + ret diff --git a/sys/amd64/linux/linux_syscall.h b/sys/amd64/linux/linux_syscall.h new file mode 100644 index 000000000000..19a02657d23b --- /dev/null +++ b/sys/amd64/linux/linux_syscall.h @@ -0,0 +1,310 @@ +/* + * System call numbers. + * + * DO NOT EDIT-- this file is automatically generated. + * $FreeBSD$ + * created from FreeBSD: head/sys/amd64/linux/syscalls.master 283492 2015-05-24 18:08:01Z dchagin + */ + +#define LINUX_SYS_read 0 +#define LINUX_SYS_write 1 +#define LINUX_SYS_linux_open 2 +#define LINUX_SYS_close 3 +#define LINUX_SYS_linux_newstat 4 +#define LINUX_SYS_linux_newfstat 5 +#define LINUX_SYS_linux_newlstat 6 +#define LINUX_SYS_poll 7 +#define LINUX_SYS_linux_lseek 8 +#define LINUX_SYS_linux_mmap2 9 +#define LINUX_SYS_linux_mprotect 10 +#define LINUX_SYS_munmap 11 +#define LINUX_SYS_linux_brk 12 +#define LINUX_SYS_linux_rt_sigaction 13 +#define LINUX_SYS_linux_rt_sigprocmask 14 +#define LINUX_SYS_linux_rt_sigreturn 15 +#define LINUX_SYS_linux_ioctl 16 +#define LINUX_SYS_linux_pread 17 +#define LINUX_SYS_linux_pwrite 18 +#define LINUX_SYS_readv 19 +#define LINUX_SYS_writev 20 +#define LINUX_SYS_linux_access 21 +#define LINUX_SYS_linux_pipe 22 +#define LINUX_SYS_linux_select 23 +#define LINUX_SYS_sched_yield 24 +#define LINUX_SYS_linux_mremap 25 +#define LINUX_SYS_linux_msync 26 +#define LINUX_SYS_linux_mincore 27 +#define LINUX_SYS_madvise 28 +#define LINUX_SYS_linux_shmget 29 +#define LINUX_SYS_linux_shmat 30 +#define LINUX_SYS_linux_shmctl 31 +#define LINUX_SYS_dup 32 +#define LINUX_SYS_dup2 33 +#define LINUX_SYS_linux_pause 34 +#define LINUX_SYS_linux_nanosleep 35 +#define LINUX_SYS_linux_getitimer 36 +#define LINUX_SYS_linux_alarm 37 +#define LINUX_SYS_linux_setitimer 38 +#define LINUX_SYS_linux_getpid 39 +#define LINUX_SYS_linux_sendfile 40 +#define LINUX_SYS_linux_socket 41 +#define LINUX_SYS_linux_connect 42 +#define LINUX_SYS_linux_accept 43 +#define LINUX_SYS_linux_sendto 44 +#define LINUX_SYS_linux_recvfrom 45 +#define LINUX_SYS_linux_sendmsg 46 +#define LINUX_SYS_linux_recvmsg 47 +#define LINUX_SYS_linux_shutdown 48 +#define LINUX_SYS_linux_bind 49 +#define LINUX_SYS_linux_listen 50 +#define LINUX_SYS_linux_getsockname 51 +#define LINUX_SYS_linux_getpeername 52 +#define LINUX_SYS_linux_socketpair 53 +#define LINUX_SYS_linux_setsockopt 54 +#define LINUX_SYS_linux_getsockopt 55 +#define LINUX_SYS_linux_clone 56 +#define LINUX_SYS_linux_fork 57 +#define LINUX_SYS_linux_vfork 58 +#define LINUX_SYS_linux_execve 59 +#define LINUX_SYS_linux_exit 60 +#define LINUX_SYS_linux_wait4 61 +#define LINUX_SYS_linux_kill 62 +#define LINUX_SYS_linux_newuname 63 +#define LINUX_SYS_linux_semget 64 +#define LINUX_SYS_linux_semop 65 +#define LINUX_SYS_linux_semctl 66 +#define LINUX_SYS_linux_shmdt 67 +#define LINUX_SYS_linux_msgget 68 +#define LINUX_SYS_linux_msgsnd 69 +#define LINUX_SYS_linux_msgrcv 70 +#define LINUX_SYS_linux_msgctl 71 +#define LINUX_SYS_linux_fcntl 72 +#define LINUX_SYS_flock 73 +#define LINUX_SYS_fsync 74 +#define LINUX_SYS_linux_fdatasync 75 +#define LINUX_SYS_linux_truncate 76 +#define LINUX_SYS_linux_ftruncate 77 +#define LINUX_SYS_linux_getdents 78 +#define LINUX_SYS_linux_getcwd 79 +#define LINUX_SYS_linux_chdir 80 +#define LINUX_SYS_fchdir 81 +#define LINUX_SYS_linux_rename 82 +#define LINUX_SYS_linux_mkdir 83 +#define LINUX_SYS_linux_rmdir 84 +#define LINUX_SYS_linux_creat 85 +#define LINUX_SYS_linux_link 86 +#define LINUX_SYS_linux_unlink 87 +#define LINUX_SYS_linux_symlink 88 +#define LINUX_SYS_linux_readlink 89 +#define LINUX_SYS_linux_chmod 90 +#define LINUX_SYS_fchmod 91 +#define LINUX_SYS_linux_chown 92 +#define LINUX_SYS_fchown 93 +#define LINUX_SYS_linux_lchown 94 +#define LINUX_SYS_umask 95 +#define LINUX_SYS_gettimeofday 96 +#define LINUX_SYS_linux_getrlimit 97 +#define LINUX_SYS_getrusage 98 +#define LINUX_SYS_linux_sysinfo 99 +#define LINUX_SYS_linux_times 100 +#define LINUX_SYS_linux_ptrace 101 +#define LINUX_SYS_linux_getuid 102 +#define LINUX_SYS_linux_syslog 103 +#define LINUX_SYS_linux_getgid 104 +#define LINUX_SYS_setuid 105 +#define LINUX_SYS_setgid 106 +#define LINUX_SYS_geteuid 107 +#define LINUX_SYS_getegid 108 +#define LINUX_SYS_setpgid 109 +#define LINUX_SYS_linux_getppid 110 +#define LINUX_SYS_getpgrp 111 +#define LINUX_SYS_setsid 112 +#define LINUX_SYS_setreuid 113 +#define LINUX_SYS_setregid 114 +#define LINUX_SYS_linux_getgroups 115 +#define LINUX_SYS_linux_setgroups 116 +#define LINUX_SYS_setresuid 117 +#define LINUX_SYS_getresuid 118 +#define LINUX_SYS_setresgid 119 +#define LINUX_SYS_getresgid 120 +#define LINUX_SYS_getpgid 121 +#define LINUX_SYS_linux_setfsuid 122 +#define LINUX_SYS_linux_setfsgid 123 +#define LINUX_SYS_linux_getsid 124 +#define LINUX_SYS_linux_capget 125 +#define LINUX_SYS_linux_capset 126 +#define LINUX_SYS_linux_rt_sigpending 127 +#define LINUX_SYS_linux_rt_sigtimedwait 128 +#define LINUX_SYS_linux_rt_sigqueueinfo 129 +#define LINUX_SYS_linux_rt_sigsuspend 130 +#define LINUX_SYS_linux_sigaltstack 131 +#define LINUX_SYS_linux_utime 132 +#define LINUX_SYS_linux_mknod 133 +#define LINUX_SYS_linux_personality 135 +#define LINUX_SYS_linux_ustat 136 +#define LINUX_SYS_linux_statfs 137 +#define LINUX_SYS_linux_fstatfs 138 +#define LINUX_SYS_linux_sysfs 139 +#define LINUX_SYS_linux_getpriority 140 +#define LINUX_SYS_setpriority 141 +#define LINUX_SYS_linux_sched_setparam 142 +#define LINUX_SYS_linux_sched_getparam 143 +#define LINUX_SYS_linux_sched_setscheduler 144 +#define LINUX_SYS_linux_sched_getscheduler 145 +#define LINUX_SYS_linux_sched_get_priority_max 146 +#define LINUX_SYS_linux_sched_get_priority_min 147 +#define LINUX_SYS_linux_sched_rr_get_interval 148 +#define LINUX_SYS_mlock 149 +#define LINUX_SYS_munlock 150 +#define LINUX_SYS_mlockall 151 +#define LINUX_SYS_munlockall 152 +#define LINUX_SYS_linux_vhangup 153 +#define LINUX_SYS_linux_pivot_root 155 +#define LINUX_SYS_linux_sysctl 156 +#define LINUX_SYS_linux_prctl 157 +#define LINUX_SYS_linux_arch_prctl 158 +#define LINUX_SYS_linux_adjtimex 159 +#define LINUX_SYS_linux_setrlimit 160 +#define LINUX_SYS_chroot 161 +#define LINUX_SYS_sync 162 +#define LINUX_SYS_acct 163 +#define LINUX_SYS_settimeofday 164 +#define LINUX_SYS_linux_mount 165 +#define LINUX_SYS_linux_umount 166 +#define LINUX_SYS_swapon 167 +#define LINUX_SYS_linux_swapoff 168 +#define LINUX_SYS_linux_reboot 169 +#define LINUX_SYS_linux_sethostname 170 +#define LINUX_SYS_linux_setdomainname 171 +#define LINUX_SYS_linux_iopl 172 +#define LINUX_SYS_linux_create_module 174 +#define LINUX_SYS_linux_init_module 175 +#define LINUX_SYS_linux_delete_module 176 +#define LINUX_SYS_linux_get_kernel_syms 177 +#define LINUX_SYS_linux_query_module 178 +#define LINUX_SYS_linux_quotactl 179 +#define LINUX_SYS_linux_nfsservctl 180 +#define LINUX_SYS_linux_getpmsg 181 +#define LINUX_SYS_linux_putpmsg 182 +#define LINUX_SYS_linux_afs_syscall 183 +#define LINUX_SYS_linux_tuxcall 184 +#define LINUX_SYS_linux_security 185 +#define LINUX_SYS_linux_gettid 186 +#define LINUX_SYS_linux_setxattr 188 +#define LINUX_SYS_linux_lsetxattr 189 +#define LINUX_SYS_linux_fsetxattr 190 +#define LINUX_SYS_linux_getxattr 191 +#define LINUX_SYS_linux_lgetxattr 192 +#define LINUX_SYS_linux_fgetxattr 193 +#define LINUX_SYS_linux_listxattr 194 +#define LINUX_SYS_linux_llistxattr 195 +#define LINUX_SYS_linux_flistxattr 196 +#define LINUX_SYS_linux_removexattr 197 +#define LINUX_SYS_linux_lremovexattr 198 +#define LINUX_SYS_linux_fremovexattr 199 +#define LINUX_SYS_linux_tkill 200 +#define LINUX_SYS_linux_time 201 +#define LINUX_SYS_linux_sys_futex 202 +#define LINUX_SYS_linux_sched_setaffinity 203 +#define LINUX_SYS_linux_sched_getaffinity 204 +#define LINUX_SYS_linux_set_thread_area 205 +#define LINUX_SYS_linux_lookup_dcookie 212 +#define LINUX_SYS_linux_epoll_create 213 +#define LINUX_SYS_linux_epoll_ctl_old 214 +#define LINUX_SYS_linux_epoll_wait_old 215 +#define LINUX_SYS_linux_remap_file_pages 216 +#define LINUX_SYS_linux_getdents64 217 +#define LINUX_SYS_linux_set_tid_address 218 +#define LINUX_SYS_linux_semtimedop 220 +#define LINUX_SYS_linux_fadvise64 221 +#define LINUX_SYS_linux_timer_create 222 +#define LINUX_SYS_linux_timer_settime 223 +#define LINUX_SYS_linux_timer_gettime 224 +#define LINUX_SYS_linux_timer_getoverrun 225 +#define LINUX_SYS_linux_timer_delete 226 +#define LINUX_SYS_linux_clock_settime 227 +#define LINUX_SYS_linux_clock_gettime 228 +#define LINUX_SYS_linux_clock_getres 229 +#define LINUX_SYS_linux_clock_nanosleep 230 +#define LINUX_SYS_linux_exit_group 231 +#define LINUX_SYS_linux_epoll_wait 232 +#define LINUX_SYS_linux_epoll_ctl 233 +#define LINUX_SYS_linux_tgkill 234 +#define LINUX_SYS_linux_utimes 235 +#define LINUX_SYS_linux_mbind 237 +#define LINUX_SYS_linux_set_mempolicy 238 +#define LINUX_SYS_linux_get_mempolicy 239 +#define LINUX_SYS_linux_mq_open 240 +#define LINUX_SYS_linux_mq_unlink 241 +#define LINUX_SYS_linux_mq_timedsend 242 +#define LINUX_SYS_linux_mq_timedreceive 243 +#define LINUX_SYS_linux_mq_notify 244 +#define LINUX_SYS_linux_mq_getsetattr 245 +#define LINUX_SYS_linux_kexec_load 246 +#define LINUX_SYS_linux_waitid 247 +#define LINUX_SYS_linux_add_key 248 +#define LINUX_SYS_linux_request_key 249 +#define LINUX_SYS_linux_keyctl 250 +#define LINUX_SYS_linux_ioprio_set 251 +#define LINUX_SYS_linux_ioprio_get 252 +#define LINUX_SYS_linux_inotify_init 253 +#define LINUX_SYS_linux_inotify_add_watch 254 +#define LINUX_SYS_linux_inotify_rm_watch 255 +#define LINUX_SYS_linux_migrate_pages 256 +#define LINUX_SYS_linux_openat 257 +#define LINUX_SYS_linux_mkdirat 258 +#define LINUX_SYS_linux_mknodat 259 +#define LINUX_SYS_linux_fchownat 260 +#define LINUX_SYS_linux_futimesat 261 +#define LINUX_SYS_linux_newfstatat 262 +#define LINUX_SYS_linux_unlinkat 263 +#define LINUX_SYS_linux_renameat 264 +#define LINUX_SYS_linux_linkat 265 +#define LINUX_SYS_linux_symlinkat 266 +#define LINUX_SYS_linux_readlinkat 267 +#define LINUX_SYS_linux_fchmodat 268 +#define LINUX_SYS_linux_faccessat 269 +#define LINUX_SYS_linux_pselect6 270 +#define LINUX_SYS_linux_ppoll 271 +#define LINUX_SYS_linux_unshare 272 +#define LINUX_SYS_linux_set_robust_list 273 +#define LINUX_SYS_linux_get_robust_list 274 +#define LINUX_SYS_linux_splice 275 +#define LINUX_SYS_linux_tee 276 +#define LINUX_SYS_linux_sync_file_range 277 +#define LINUX_SYS_linux_vmsplice 278 +#define LINUX_SYS_linux_move_pages 279 +#define LINUX_SYS_linux_utimensat 280 +#define LINUX_SYS_linux_epoll_pwait 281 +#define LINUX_SYS_linux_signalfd 282 +#define LINUX_SYS_linux_timerfd 283 +#define LINUX_SYS_linux_eventfd 284 +#define LINUX_SYS_linux_fallocate 285 +#define LINUX_SYS_linux_timerfd_settime 286 +#define LINUX_SYS_linux_timerfd_gettime 287 +#define LINUX_SYS_linux_accept4 288 +#define LINUX_SYS_linux_signalfd4 289 +#define LINUX_SYS_linux_eventfd2 290 +#define LINUX_SYS_linux_epoll_create1 291 +#define LINUX_SYS_linux_dup3 292 +#define LINUX_SYS_linux_pipe2 293 +#define LINUX_SYS_linux_inotify_init1 294 +#define LINUX_SYS_linux_preadv 295 +#define LINUX_SYS_linux_pwritev 296 +#define LINUX_SYS_linux_rt_tsigqueueinfo 297 +#define LINUX_SYS_linux_perf_event_open 298 +#define LINUX_SYS_linux_recvmmsg 299 +#define LINUX_SYS_linux_fanotify_init 300 +#define LINUX_SYS_linux_fanotify_mark 301 +#define LINUX_SYS_linux_prlimit64 302 +#define LINUX_SYS_linux_name_to_handle_at 303 +#define LINUX_SYS_linux_open_by_handle_at 304 +#define LINUX_SYS_linux_clock_adjtime 305 +#define LINUX_SYS_linux_syncfs 306 +#define LINUX_SYS_linux_sendmmsg 307 +#define LINUX_SYS_linux_setns 308 +#define LINUX_SYS_linux_process_vm_readv 309 +#define LINUX_SYS_linux_process_vm_writev 310 +#define LINUX_SYS_linux_kcmp 311 +#define LINUX_SYS_linux_finit_module 312 +#define LINUX_SYS_MAXSYSCALL 314 diff --git a/sys/amd64/linux/linux_syscalls.c b/sys/amd64/linux/linux_syscalls.c new file mode 100644 index 000000000000..f19d28546093 --- /dev/null +++ b/sys/amd64/linux/linux_syscalls.c @@ -0,0 +1,325 @@ +/* + * System call names. + * + * DO NOT EDIT-- this file is automatically generated. + * $FreeBSD$ + * created from FreeBSD: head/sys/amd64/linux/syscalls.master 283492 2015-05-24 18:08:01Z dchagin + */ + +const char *linux_syscallnames[] = { +#define nosys linux_nosys + "read", /* 0 = read */ + "write", /* 1 = write */ + "linux_open", /* 2 = linux_open */ + "close", /* 3 = close */ + "linux_newstat", /* 4 = linux_newstat */ + "linux_newfstat", /* 5 = linux_newfstat */ + "linux_newlstat", /* 6 = linux_newlstat */ + "poll", /* 7 = poll */ + "linux_lseek", /* 8 = linux_lseek */ + "linux_mmap2", /* 9 = linux_mmap2 */ + "linux_mprotect", /* 10 = linux_mprotect */ + "munmap", /* 11 = munmap */ + "linux_brk", /* 12 = linux_brk */ + "linux_rt_sigaction", /* 13 = linux_rt_sigaction */ + "linux_rt_sigprocmask", /* 14 = linux_rt_sigprocmask */ + "linux_rt_sigreturn", /* 15 = linux_rt_sigreturn */ + "linux_ioctl", /* 16 = linux_ioctl */ + "linux_pread", /* 17 = linux_pread */ + "linux_pwrite", /* 18 = linux_pwrite */ + "readv", /* 19 = readv */ + "writev", /* 20 = writev */ + "linux_access", /* 21 = linux_access */ + "linux_pipe", /* 22 = linux_pipe */ + "linux_select", /* 23 = linux_select */ + "sched_yield", /* 24 = sched_yield */ + "linux_mremap", /* 25 = linux_mremap */ + "linux_msync", /* 26 = linux_msync */ + "linux_mincore", /* 27 = linux_mincore */ + "madvise", /* 28 = madvise */ + "linux_shmget", /* 29 = linux_shmget */ + "linux_shmat", /* 30 = linux_shmat */ + "linux_shmctl", /* 31 = linux_shmctl */ + "dup", /* 32 = dup */ + "dup2", /* 33 = dup2 */ + "linux_pause", /* 34 = linux_pause */ + "linux_nanosleep", /* 35 = linux_nanosleep */ + "linux_getitimer", /* 36 = linux_getitimer */ + "linux_alarm", /* 37 = linux_alarm */ + "linux_setitimer", /* 38 = linux_setitimer */ + "linux_getpid", /* 39 = linux_getpid */ + "linux_sendfile", /* 40 = linux_sendfile */ + "linux_socket", /* 41 = linux_socket */ + "linux_connect", /* 42 = linux_connect */ + "linux_accept", /* 43 = linux_accept */ + "linux_sendto", /* 44 = linux_sendto */ + "linux_recvfrom", /* 45 = linux_recvfrom */ + "linux_sendmsg", /* 46 = linux_sendmsg */ + "linux_recvmsg", /* 47 = linux_recvmsg */ + "linux_shutdown", /* 48 = linux_shutdown */ + "linux_bind", /* 49 = linux_bind */ + "linux_listen", /* 50 = linux_listen */ + "linux_getsockname", /* 51 = linux_getsockname */ + "linux_getpeername", /* 52 = linux_getpeername */ + "linux_socketpair", /* 53 = linux_socketpair */ + "linux_setsockopt", /* 54 = linux_setsockopt */ + "linux_getsockopt", /* 55 = linux_getsockopt */ + "linux_clone", /* 56 = linux_clone */ + "linux_fork", /* 57 = linux_fork */ + "linux_vfork", /* 58 = linux_vfork */ + "linux_execve", /* 59 = linux_execve */ + "linux_exit", /* 60 = linux_exit */ + "linux_wait4", /* 61 = linux_wait4 */ + "linux_kill", /* 62 = linux_kill */ + "linux_newuname", /* 63 = linux_newuname */ + "linux_semget", /* 64 = linux_semget */ + "linux_semop", /* 65 = linux_semop */ + "linux_semctl", /* 66 = linux_semctl */ + "linux_shmdt", /* 67 = linux_shmdt */ + "linux_msgget", /* 68 = linux_msgget */ + "linux_msgsnd", /* 69 = linux_msgsnd */ + "linux_msgrcv", /* 70 = linux_msgrcv */ + "linux_msgctl", /* 71 = linux_msgctl */ + "linux_fcntl", /* 72 = linux_fcntl */ + "flock", /* 73 = flock */ + "fsync", /* 74 = fsync */ + "linux_fdatasync", /* 75 = linux_fdatasync */ + "linux_truncate", /* 76 = linux_truncate */ + "linux_ftruncate", /* 77 = linux_ftruncate */ + "linux_getdents", /* 78 = linux_getdents */ + "linux_getcwd", /* 79 = linux_getcwd */ + "linux_chdir", /* 80 = linux_chdir */ + "fchdir", /* 81 = fchdir */ + "linux_rename", /* 82 = linux_rename */ + "linux_mkdir", /* 83 = linux_mkdir */ + "linux_rmdir", /* 84 = linux_rmdir */ + "linux_creat", /* 85 = linux_creat */ + "linux_link", /* 86 = linux_link */ + "linux_unlink", /* 87 = linux_unlink */ + "linux_symlink", /* 88 = linux_symlink */ + "linux_readlink", /* 89 = linux_readlink */ + "linux_chmod", /* 90 = linux_chmod */ + "fchmod", /* 91 = fchmod */ + "linux_chown", /* 92 = linux_chown */ + "fchown", /* 93 = fchown */ + "linux_lchown", /* 94 = linux_lchown */ + "umask", /* 95 = umask */ + "gettimeofday", /* 96 = gettimeofday */ + "linux_getrlimit", /* 97 = linux_getrlimit */ + "getrusage", /* 98 = getrusage */ + "linux_sysinfo", /* 99 = linux_sysinfo */ + "linux_times", /* 100 = linux_times */ + "linux_ptrace", /* 101 = linux_ptrace */ + "linux_getuid", /* 102 = linux_getuid */ + "linux_syslog", /* 103 = linux_syslog */ + "linux_getgid", /* 104 = linux_getgid */ + "setuid", /* 105 = setuid */ + "setgid", /* 106 = setgid */ + "geteuid", /* 107 = geteuid */ + "getegid", /* 108 = getegid */ + "setpgid", /* 109 = setpgid */ + "linux_getppid", /* 110 = linux_getppid */ + "getpgrp", /* 111 = getpgrp */ + "setsid", /* 112 = setsid */ + "setreuid", /* 113 = setreuid */ + "setregid", /* 114 = setregid */ + "linux_getgroups", /* 115 = linux_getgroups */ + "linux_setgroups", /* 116 = linux_setgroups */ + "setresuid", /* 117 = setresuid */ + "getresuid", /* 118 = getresuid */ + "setresgid", /* 119 = setresgid */ + "getresgid", /* 120 = getresgid */ + "getpgid", /* 121 = getpgid */ + "linux_setfsuid", /* 122 = linux_setfsuid */ + "linux_setfsgid", /* 123 = linux_setfsgid */ + "linux_getsid", /* 124 = linux_getsid */ + "linux_capget", /* 125 = linux_capget */ + "linux_capset", /* 126 = linux_capset */ + "linux_rt_sigpending", /* 127 = linux_rt_sigpending */ + "linux_rt_sigtimedwait", /* 128 = linux_rt_sigtimedwait */ + "linux_rt_sigqueueinfo", /* 129 = linux_rt_sigqueueinfo */ + "linux_rt_sigsuspend", /* 130 = linux_rt_sigsuspend */ + "linux_sigaltstack", /* 131 = linux_sigaltstack */ + "linux_utime", /* 132 = linux_utime */ + "linux_mknod", /* 133 = linux_mknod */ + "#134", /* 134 = uselib */ + "linux_personality", /* 135 = linux_personality */ + "linux_ustat", /* 136 = linux_ustat */ + "linux_statfs", /* 137 = linux_statfs */ + "linux_fstatfs", /* 138 = linux_fstatfs */ + "linux_sysfs", /* 139 = linux_sysfs */ + "linux_getpriority", /* 140 = linux_getpriority */ + "setpriority", /* 141 = setpriority */ + "linux_sched_setparam", /* 142 = linux_sched_setparam */ + "linux_sched_getparam", /* 143 = linux_sched_getparam */ + "linux_sched_setscheduler", /* 144 = linux_sched_setscheduler */ + "linux_sched_getscheduler", /* 145 = linux_sched_getscheduler */ + "linux_sched_get_priority_max", /* 146 = linux_sched_get_priority_max */ + "linux_sched_get_priority_min", /* 147 = linux_sched_get_priority_min */ + "linux_sched_rr_get_interval", /* 148 = linux_sched_rr_get_interval */ + "mlock", /* 149 = mlock */ + "munlock", /* 150 = munlock */ + "mlockall", /* 151 = mlockall */ + "munlockall", /* 152 = munlockall */ + "linux_vhangup", /* 153 = linux_vhangup */ + "#154", /* 154 = modify_ldt */ + "linux_pivot_root", /* 155 = linux_pivot_root */ + "linux_sysctl", /* 156 = linux_sysctl */ + "linux_prctl", /* 157 = linux_prctl */ + "linux_arch_prctl", /* 158 = linux_arch_prctl */ + "linux_adjtimex", /* 159 = linux_adjtimex */ + "linux_setrlimit", /* 160 = linux_setrlimit */ + "chroot", /* 161 = chroot */ + "sync", /* 162 = sync */ + "acct", /* 163 = acct */ + "settimeofday", /* 164 = settimeofday */ + "linux_mount", /* 165 = linux_mount */ + "linux_umount", /* 166 = linux_umount */ + "swapon", /* 167 = swapon */ + "linux_swapoff", /* 168 = linux_swapoff */ + "linux_reboot", /* 169 = linux_reboot */ + "linux_sethostname", /* 170 = linux_sethostname */ + "linux_setdomainname", /* 171 = linux_setdomainname */ + "linux_iopl", /* 172 = linux_iopl */ + "#173", /* 173 = ioperm */ + "linux_create_module", /* 174 = linux_create_module */ + "linux_init_module", /* 175 = linux_init_module */ + "linux_delete_module", /* 176 = linux_delete_module */ + "linux_get_kernel_syms", /* 177 = linux_get_kernel_syms */ + "linux_query_module", /* 178 = linux_query_module */ + "linux_quotactl", /* 179 = linux_quotactl */ + "linux_nfsservctl", /* 180 = linux_nfsservctl */ + "linux_getpmsg", /* 181 = linux_getpmsg */ + "linux_putpmsg", /* 182 = linux_putpmsg */ + "linux_afs_syscall", /* 183 = linux_afs_syscall */ + "linux_tuxcall", /* 184 = linux_tuxcall */ + "linux_security", /* 185 = linux_security */ + "linux_gettid", /* 186 = linux_gettid */ + "#187", /* 187 = linux_readahead */ + "linux_setxattr", /* 188 = linux_setxattr */ + "linux_lsetxattr", /* 189 = linux_lsetxattr */ + "linux_fsetxattr", /* 190 = linux_fsetxattr */ + "linux_getxattr", /* 191 = linux_getxattr */ + "linux_lgetxattr", /* 192 = linux_lgetxattr */ + "linux_fgetxattr", /* 193 = linux_fgetxattr */ + "linux_listxattr", /* 194 = linux_listxattr */ + "linux_llistxattr", /* 195 = linux_llistxattr */ + "linux_flistxattr", /* 196 = linux_flistxattr */ + "linux_removexattr", /* 197 = linux_removexattr */ + "linux_lremovexattr", /* 198 = linux_lremovexattr */ + "linux_fremovexattr", /* 199 = linux_fremovexattr */ + "linux_tkill", /* 200 = linux_tkill */ + "linux_time", /* 201 = linux_time */ + "linux_sys_futex", /* 202 = linux_sys_futex */ + "linux_sched_setaffinity", /* 203 = linux_sched_setaffinity */ + "linux_sched_getaffinity", /* 204 = linux_sched_getaffinity */ + "linux_set_thread_area", /* 205 = linux_set_thread_area */ + "#206", /* 206 = linux_io_setup */ + "#207", /* 207 = linux_io_destroy */ + "#208", /* 208 = linux_io_getevents */ + "#209", /* 209 = inux_io_submit */ + "#210", /* 210 = linux_io_cancel */ + "#211", /* 211 = linux_get_thread_area */ + "linux_lookup_dcookie", /* 212 = linux_lookup_dcookie */ + "linux_epoll_create", /* 213 = linux_epoll_create */ + "linux_epoll_ctl_old", /* 214 = linux_epoll_ctl_old */ + "linux_epoll_wait_old", /* 215 = linux_epoll_wait_old */ + "linux_remap_file_pages", /* 216 = linux_remap_file_pages */ + "linux_getdents64", /* 217 = linux_getdents64 */ + "linux_set_tid_address", /* 218 = linux_set_tid_address */ + "#219", /* 219 = restart_syscall */ + "linux_semtimedop", /* 220 = linux_semtimedop */ + "linux_fadvise64", /* 221 = linux_fadvise64 */ + "linux_timer_create", /* 222 = linux_timer_create */ + "linux_timer_settime", /* 223 = linux_timer_settime */ + "linux_timer_gettime", /* 224 = linux_timer_gettime */ + "linux_timer_getoverrun", /* 225 = linux_timer_getoverrun */ + "linux_timer_delete", /* 226 = linux_timer_delete */ + "linux_clock_settime", /* 227 = linux_clock_settime */ + "linux_clock_gettime", /* 228 = linux_clock_gettime */ + "linux_clock_getres", /* 229 = linux_clock_getres */ + "linux_clock_nanosleep", /* 230 = linux_clock_nanosleep */ + "linux_exit_group", /* 231 = linux_exit_group */ + "linux_epoll_wait", /* 232 = linux_epoll_wait */ + "linux_epoll_ctl", /* 233 = linux_epoll_ctl */ + "linux_tgkill", /* 234 = linux_tgkill */ + "linux_utimes", /* 235 = linux_utimes */ + "#236", /* 236 = vserver */ + "linux_mbind", /* 237 = linux_mbind */ + "linux_set_mempolicy", /* 238 = linux_set_mempolicy */ + "linux_get_mempolicy", /* 239 = linux_get_mempolicy */ + "linux_mq_open", /* 240 = linux_mq_open */ + "linux_mq_unlink", /* 241 = linux_mq_unlink */ + "linux_mq_timedsend", /* 242 = linux_mq_timedsend */ + "linux_mq_timedreceive", /* 243 = linux_mq_timedreceive */ + "linux_mq_notify", /* 244 = linux_mq_notify */ + "linux_mq_getsetattr", /* 245 = linux_mq_getsetattr */ + "linux_kexec_load", /* 246 = linux_kexec_load */ + "linux_waitid", /* 247 = linux_waitid */ + "linux_add_key", /* 248 = linux_add_key */ + "linux_request_key", /* 249 = linux_request_key */ + "linux_keyctl", /* 250 = linux_keyctl */ + "linux_ioprio_set", /* 251 = linux_ioprio_set */ + "linux_ioprio_get", /* 252 = linux_ioprio_get */ + "linux_inotify_init", /* 253 = linux_inotify_init */ + "linux_inotify_add_watch", /* 254 = linux_inotify_add_watch */ + "linux_inotify_rm_watch", /* 255 = linux_inotify_rm_watch */ + "linux_migrate_pages", /* 256 = linux_migrate_pages */ + "linux_openat", /* 257 = linux_openat */ + "linux_mkdirat", /* 258 = linux_mkdirat */ + "linux_mknodat", /* 259 = linux_mknodat */ + "linux_fchownat", /* 260 = linux_fchownat */ + "linux_futimesat", /* 261 = linux_futimesat */ + "linux_newfstatat", /* 262 = linux_newfstatat */ + "linux_unlinkat", /* 263 = linux_unlinkat */ + "linux_renameat", /* 264 = linux_renameat */ + "linux_linkat", /* 265 = linux_linkat */ + "linux_symlinkat", /* 266 = linux_symlinkat */ + "linux_readlinkat", /* 267 = linux_readlinkat */ + "linux_fchmodat", /* 268 = linux_fchmodat */ + "linux_faccessat", /* 269 = linux_faccessat */ + "linux_pselect6", /* 270 = linux_pselect6 */ + "linux_ppoll", /* 271 = linux_ppoll */ + "linux_unshare", /* 272 = linux_unshare */ + "linux_set_robust_list", /* 273 = linux_set_robust_list */ + "linux_get_robust_list", /* 274 = linux_get_robust_list */ + "linux_splice", /* 275 = linux_splice */ + "linux_tee", /* 276 = linux_tee */ + "linux_sync_file_range", /* 277 = linux_sync_file_range */ + "linux_vmsplice", /* 278 = linux_vmsplice */ + "linux_move_pages", /* 279 = linux_move_pages */ + "linux_utimensat", /* 280 = linux_utimensat */ + "linux_epoll_pwait", /* 281 = linux_epoll_pwait */ + "linux_signalfd", /* 282 = linux_signalfd */ + "linux_timerfd", /* 283 = linux_timerfd */ + "linux_eventfd", /* 284 = linux_eventfd */ + "linux_fallocate", /* 285 = linux_fallocate */ + "linux_timerfd_settime", /* 286 = linux_timerfd_settime */ + "linux_timerfd_gettime", /* 287 = linux_timerfd_gettime */ + "linux_accept4", /* 288 = linux_accept4 */ + "linux_signalfd4", /* 289 = linux_signalfd4 */ + "linux_eventfd2", /* 290 = linux_eventfd2 */ + "linux_epoll_create1", /* 291 = linux_epoll_create1 */ + "linux_dup3", /* 292 = linux_dup3 */ + "linux_pipe2", /* 293 = linux_pipe2 */ + "linux_inotify_init1", /* 294 = linux_inotify_init1 */ + "linux_preadv", /* 295 = linux_preadv */ + "linux_pwritev", /* 296 = linux_pwritev */ + "linux_rt_tsigqueueinfo", /* 297 = linux_rt_tsigqueueinfo */ + "linux_perf_event_open", /* 298 = linux_perf_event_open */ + "linux_recvmmsg", /* 299 = linux_recvmmsg */ + "linux_fanotify_init", /* 300 = linux_fanotify_init */ + "linux_fanotify_mark", /* 301 = linux_fanotify_mark */ + "linux_prlimit64", /* 302 = linux_prlimit64 */ + "linux_name_to_handle_at", /* 303 = linux_name_to_handle_at */ + "linux_open_by_handle_at", /* 304 = linux_open_by_handle_at */ + "linux_clock_adjtime", /* 305 = linux_clock_adjtime */ + "linux_syncfs", /* 306 = linux_syncfs */ + "linux_sendmmsg", /* 307 = linux_sendmmsg */ + "linux_setns", /* 308 = linux_setns */ + "linux_process_vm_readv", /* 309 = linux_process_vm_readv */ + "linux_process_vm_writev", /* 310 = linux_process_vm_writev */ + "linux_kcmp", /* 311 = linux_kcmp */ + "linux_finit_module", /* 312 = linux_finit_module */ + "#313", /* 313 = nosys */ +}; diff --git a/sys/amd64/linux/linux_sysent.c b/sys/amd64/linux/linux_sysent.c new file mode 100644 index 000000000000..a575787a8a30 --- /dev/null +++ b/sys/amd64/linux/linux_sysent.c @@ -0,0 +1,335 @@ +/* + * System call switch table. + * + * DO NOT EDIT-- this file is automatically generated. + * $FreeBSD$ + * created from FreeBSD: head/sys/amd64/linux/syscalls.master 283492 2015-05-24 18:08:01Z dchagin + */ + +#include +#include +#include +#include +#include +#include + +#define AS(name) (sizeof(struct name) / sizeof(register_t)) + +/* The casts are bogus but will do for now. */ +struct sysent linux_sysent[] = { +#define nosys linux_nosys + { AS(read_args), (sy_call_t *)sys_read, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 0 = read */ + { AS(write_args), (sy_call_t *)sys_write, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 1 = write */ + { AS(linux_open_args), (sy_call_t *)linux_open, AUE_OPEN_RWTC, NULL, 0, 0, 0, SY_THR_STATIC }, /* 2 = linux_open */ + { AS(close_args), (sy_call_t *)sys_close, AUE_CLOSE, NULL, 0, 0, 0, SY_THR_STATIC }, /* 3 = close */ + { AS(linux_newstat_args), (sy_call_t *)linux_newstat, AUE_STAT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 4 = linux_newstat */ + { AS(linux_newfstat_args), (sy_call_t *)linux_newfstat, AUE_FSTAT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 5 = linux_newfstat */ + { AS(linux_newlstat_args), (sy_call_t *)linux_newlstat, AUE_LSTAT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 6 = linux_newlstat */ + { AS(poll_args), (sy_call_t *)sys_poll, AUE_POLL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 7 = poll */ + { AS(linux_lseek_args), (sy_call_t *)linux_lseek, AUE_LSEEK, NULL, 0, 0, 0, SY_THR_STATIC }, /* 8 = linux_lseek */ + { AS(linux_mmap2_args), (sy_call_t *)linux_mmap2, AUE_MMAP, NULL, 0, 0, 0, SY_THR_STATIC }, /* 9 = linux_mmap2 */ + { AS(linux_mprotect_args), (sy_call_t *)linux_mprotect, AUE_MPROTECT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 10 = linux_mprotect */ + { AS(munmap_args), (sy_call_t *)sys_munmap, AUE_MUNMAP, NULL, 0, 0, 0, SY_THR_STATIC }, /* 11 = munmap */ + { AS(linux_brk_args), (sy_call_t *)linux_brk, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 12 = linux_brk */ + { AS(linux_rt_sigaction_args), (sy_call_t *)linux_rt_sigaction, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 13 = linux_rt_sigaction */ + { AS(linux_rt_sigprocmask_args), (sy_call_t *)linux_rt_sigprocmask, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 14 = linux_rt_sigprocmask */ + { AS(linux_rt_sigreturn_args), (sy_call_t *)linux_rt_sigreturn, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 15 = linux_rt_sigreturn */ + { AS(linux_ioctl_args), (sy_call_t *)linux_ioctl, AUE_IOCTL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 16 = linux_ioctl */ + { AS(linux_pread_args), (sy_call_t *)linux_pread, AUE_PREAD, NULL, 0, 0, 0, SY_THR_STATIC }, /* 17 = linux_pread */ + { AS(linux_pwrite_args), (sy_call_t *)linux_pwrite, AUE_PWRITE, NULL, 0, 0, 0, SY_THR_STATIC }, /* 18 = linux_pwrite */ + { AS(readv_args), (sy_call_t *)sys_readv, AUE_READV, NULL, 0, 0, 0, SY_THR_STATIC }, /* 19 = readv */ + { AS(writev_args), (sy_call_t *)sys_writev, AUE_WRITEV, NULL, 0, 0, 0, SY_THR_STATIC }, /* 20 = writev */ + { AS(linux_access_args), (sy_call_t *)linux_access, AUE_ACCESS, NULL, 0, 0, 0, SY_THR_STATIC }, /* 21 = linux_access */ + { AS(linux_pipe_args), (sy_call_t *)linux_pipe, AUE_PIPE, NULL, 0, 0, 0, SY_THR_STATIC }, /* 22 = linux_pipe */ + { AS(linux_select_args), (sy_call_t *)linux_select, AUE_SELECT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 23 = linux_select */ + { 0, (sy_call_t *)sys_sched_yield, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 24 = sched_yield */ + { AS(linux_mremap_args), (sy_call_t *)linux_mremap, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 25 = linux_mremap */ + { AS(linux_msync_args), (sy_call_t *)linux_msync, AUE_MSYNC, NULL, 0, 0, 0, SY_THR_STATIC }, /* 26 = linux_msync */ + { AS(linux_mincore_args), (sy_call_t *)linux_mincore, AUE_MINCORE, NULL, 0, 0, 0, SY_THR_STATIC }, /* 27 = linux_mincore */ + { AS(madvise_args), (sy_call_t *)sys_madvise, AUE_MADVISE, NULL, 0, 0, 0, SY_THR_STATIC }, /* 28 = madvise */ + { AS(linux_shmget_args), (sy_call_t *)linux_shmget, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 29 = linux_shmget */ + { AS(linux_shmat_args), (sy_call_t *)linux_shmat, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 30 = linux_shmat */ + { AS(linux_shmctl_args), (sy_call_t *)linux_shmctl, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 31 = linux_shmctl */ + { AS(dup_args), (sy_call_t *)sys_dup, AUE_DUP, NULL, 0, 0, 0, SY_THR_STATIC }, /* 32 = dup */ + { AS(dup2_args), (sy_call_t *)sys_dup2, AUE_DUP2, NULL, 0, 0, 0, SY_THR_STATIC }, /* 33 = dup2 */ + { 0, (sy_call_t *)linux_pause, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 34 = linux_pause */ + { AS(linux_nanosleep_args), (sy_call_t *)linux_nanosleep, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 35 = linux_nanosleep */ + { AS(linux_getitimer_args), (sy_call_t *)linux_getitimer, AUE_GETITIMER, NULL, 0, 0, 0, SY_THR_STATIC }, /* 36 = linux_getitimer */ + { AS(linux_alarm_args), (sy_call_t *)linux_alarm, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 37 = linux_alarm */ + { AS(linux_setitimer_args), (sy_call_t *)linux_setitimer, AUE_SETITIMER, NULL, 0, 0, 0, SY_THR_STATIC }, /* 38 = linux_setitimer */ + { 0, (sy_call_t *)linux_getpid, AUE_GETPID, NULL, 0, 0, 0, SY_THR_STATIC }, /* 39 = linux_getpid */ + { AS(linux_sendfile_args), (sy_call_t *)linux_sendfile, AUE_SENDFILE, NULL, 0, 0, 0, SY_THR_STATIC }, /* 40 = linux_sendfile */ + { AS(linux_socket_args), (sy_call_t *)linux_socket, AUE_SOCKET, NULL, 0, 0, 0, SY_THR_STATIC }, /* 41 = linux_socket */ + { AS(linux_connect_args), (sy_call_t *)linux_connect, AUE_CONNECT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 42 = linux_connect */ + { AS(linux_accept_args), (sy_call_t *)linux_accept, AUE_ACCEPT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 43 = linux_accept */ + { AS(linux_sendto_args), (sy_call_t *)linux_sendto, AUE_SENDTO, NULL, 0, 0, 0, SY_THR_STATIC }, /* 44 = linux_sendto */ + { AS(linux_recvfrom_args), (sy_call_t *)linux_recvfrom, AUE_RECVFROM, NULL, 0, 0, 0, SY_THR_STATIC }, /* 45 = linux_recvfrom */ + { AS(linux_sendmsg_args), (sy_call_t *)linux_sendmsg, AUE_SENDMSG, NULL, 0, 0, 0, SY_THR_STATIC }, /* 46 = linux_sendmsg */ + { AS(linux_recvmsg_args), (sy_call_t *)linux_recvmsg, AUE_RECVMSG, NULL, 0, 0, 0, SY_THR_STATIC }, /* 47 = linux_recvmsg */ + { AS(linux_shutdown_args), (sy_call_t *)linux_shutdown, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 48 = linux_shutdown */ + { AS(linux_bind_args), (sy_call_t *)linux_bind, AUE_BIND, NULL, 0, 0, 0, SY_THR_STATIC }, /* 49 = linux_bind */ + { AS(linux_listen_args), (sy_call_t *)linux_listen, AUE_LISTEN, NULL, 0, 0, 0, SY_THR_STATIC }, /* 50 = linux_listen */ + { AS(linux_getsockname_args), (sy_call_t *)linux_getsockname, AUE_GETSOCKNAME, NULL, 0, 0, 0, SY_THR_STATIC }, /* 51 = linux_getsockname */ + { AS(linux_getpeername_args), (sy_call_t *)linux_getpeername, AUE_GETPEERNAME, NULL, 0, 0, 0, SY_THR_STATIC }, /* 52 = linux_getpeername */ + { AS(linux_socketpair_args), (sy_call_t *)linux_socketpair, AUE_SOCKETPAIR, NULL, 0, 0, 0, SY_THR_STATIC }, /* 53 = linux_socketpair */ + { AS(linux_setsockopt_args), (sy_call_t *)linux_setsockopt, AUE_SETSOCKOPT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 54 = linux_setsockopt */ + { AS(linux_getsockopt_args), (sy_call_t *)linux_getsockopt, AUE_GETSOCKOPT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 55 = linux_getsockopt */ + { AS(linux_clone_args), (sy_call_t *)linux_clone, AUE_RFORK, NULL, 0, 0, 0, SY_THR_STATIC }, /* 56 = linux_clone */ + { 0, (sy_call_t *)linux_fork, AUE_FORK, NULL, 0, 0, 0, SY_THR_STATIC }, /* 57 = linux_fork */ + { 0, (sy_call_t *)linux_vfork, AUE_VFORK, NULL, 0, 0, 0, SY_THR_STATIC }, /* 58 = linux_vfork */ + { AS(linux_execve_args), (sy_call_t *)linux_execve, AUE_EXECVE, NULL, 0, 0, 0, SY_THR_STATIC }, /* 59 = linux_execve */ + { AS(linux_exit_args), (sy_call_t *)linux_exit, AUE_EXIT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 60 = linux_exit */ + { AS(linux_wait4_args), (sy_call_t *)linux_wait4, AUE_WAIT4, NULL, 0, 0, 0, SY_THR_STATIC }, /* 61 = linux_wait4 */ + { AS(linux_kill_args), (sy_call_t *)linux_kill, AUE_KILL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 62 = linux_kill */ + { AS(linux_newuname_args), (sy_call_t *)linux_newuname, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 63 = linux_newuname */ + { AS(linux_semget_args), (sy_call_t *)linux_semget, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 64 = linux_semget */ + { AS(linux_semop_args), (sy_call_t *)linux_semop, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 65 = linux_semop */ + { AS(linux_semctl_args), (sy_call_t *)linux_semctl, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 66 = linux_semctl */ + { AS(linux_shmdt_args), (sy_call_t *)linux_shmdt, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 67 = linux_shmdt */ + { AS(linux_msgget_args), (sy_call_t *)linux_msgget, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 68 = linux_msgget */ + { AS(linux_msgsnd_args), (sy_call_t *)linux_msgsnd, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 69 = linux_msgsnd */ + { AS(linux_msgrcv_args), (sy_call_t *)linux_msgrcv, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 70 = linux_msgrcv */ + { AS(linux_msgctl_args), (sy_call_t *)linux_msgctl, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 71 = linux_msgctl */ + { AS(linux_fcntl_args), (sy_call_t *)linux_fcntl, AUE_FCNTL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 72 = linux_fcntl */ + { AS(flock_args), (sy_call_t *)sys_flock, AUE_FLOCK, NULL, 0, 0, 0, SY_THR_STATIC }, /* 73 = flock */ + { AS(fsync_args), (sy_call_t *)sys_fsync, AUE_FSYNC, NULL, 0, 0, 0, SY_THR_STATIC }, /* 74 = fsync */ + { AS(linux_fdatasync_args), (sy_call_t *)linux_fdatasync, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 75 = linux_fdatasync */ + { AS(linux_truncate_args), (sy_call_t *)linux_truncate, AUE_TRUNCATE, NULL, 0, 0, 0, SY_THR_STATIC }, /* 76 = linux_truncate */ + { AS(linux_ftruncate_args), (sy_call_t *)linux_ftruncate, AUE_FTRUNCATE, NULL, 0, 0, 0, SY_THR_STATIC }, /* 77 = linux_ftruncate */ + { AS(linux_getdents_args), (sy_call_t *)linux_getdents, AUE_GETDIRENTRIES, NULL, 0, 0, 0, SY_THR_STATIC }, /* 78 = linux_getdents */ + { AS(linux_getcwd_args), (sy_call_t *)linux_getcwd, AUE_GETCWD, NULL, 0, 0, 0, SY_THR_STATIC }, /* 79 = linux_getcwd */ + { AS(linux_chdir_args), (sy_call_t *)linux_chdir, AUE_CHDIR, NULL, 0, 0, 0, SY_THR_STATIC }, /* 80 = linux_chdir */ + { AS(fchdir_args), (sy_call_t *)sys_fchdir, AUE_FCHDIR, NULL, 0, 0, 0, SY_THR_STATIC }, /* 81 = fchdir */ + { AS(linux_rename_args), (sy_call_t *)linux_rename, AUE_RENAME, NULL, 0, 0, 0, SY_THR_STATIC }, /* 82 = linux_rename */ + { AS(linux_mkdir_args), (sy_call_t *)linux_mkdir, AUE_MKDIR, NULL, 0, 0, 0, SY_THR_STATIC }, /* 83 = linux_mkdir */ + { AS(linux_rmdir_args), (sy_call_t *)linux_rmdir, AUE_RMDIR, NULL, 0, 0, 0, SY_THR_STATIC }, /* 84 = linux_rmdir */ + { AS(linux_creat_args), (sy_call_t *)linux_creat, AUE_CREAT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 85 = linux_creat */ + { AS(linux_link_args), (sy_call_t *)linux_link, AUE_LINK, NULL, 0, 0, 0, SY_THR_STATIC }, /* 86 = linux_link */ + { AS(linux_unlink_args), (sy_call_t *)linux_unlink, AUE_UNLINK, NULL, 0, 0, 0, SY_THR_STATIC }, /* 87 = linux_unlink */ + { AS(linux_symlink_args), (sy_call_t *)linux_symlink, AUE_SYMLINK, NULL, 0, 0, 0, SY_THR_STATIC }, /* 88 = linux_symlink */ + { AS(linux_readlink_args), (sy_call_t *)linux_readlink, AUE_READLINK, NULL, 0, 0, 0, SY_THR_STATIC }, /* 89 = linux_readlink */ + { AS(linux_chmod_args), (sy_call_t *)linux_chmod, AUE_CHMOD, NULL, 0, 0, 0, SY_THR_STATIC }, /* 90 = linux_chmod */ + { AS(fchmod_args), (sy_call_t *)sys_fchmod, AUE_FCHMOD, NULL, 0, 0, 0, SY_THR_STATIC }, /* 91 = fchmod */ + { AS(linux_chown_args), (sy_call_t *)linux_chown, AUE_LCHOWN, NULL, 0, 0, 0, SY_THR_STATIC }, /* 92 = linux_chown */ + { AS(fchown_args), (sy_call_t *)sys_fchown, AUE_FCHOWN, NULL, 0, 0, 0, SY_THR_STATIC }, /* 93 = fchown */ + { AS(linux_lchown_args), (sy_call_t *)linux_lchown, AUE_LCHOWN, NULL, 0, 0, 0, SY_THR_STATIC }, /* 94 = linux_lchown */ + { AS(umask_args), (sy_call_t *)sys_umask, AUE_UMASK, NULL, 0, 0, 0, SY_THR_STATIC }, /* 95 = umask */ + { AS(gettimeofday_args), (sy_call_t *)sys_gettimeofday, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 96 = gettimeofday */ + { AS(linux_getrlimit_args), (sy_call_t *)linux_getrlimit, AUE_GETRLIMIT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 97 = linux_getrlimit */ + { AS(getrusage_args), (sy_call_t *)sys_getrusage, AUE_GETRUSAGE, NULL, 0, 0, 0, SY_THR_STATIC }, /* 98 = getrusage */ + { AS(linux_sysinfo_args), (sy_call_t *)linux_sysinfo, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 99 = linux_sysinfo */ + { AS(linux_times_args), (sy_call_t *)linux_times, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 100 = linux_times */ + { AS(linux_ptrace_args), (sy_call_t *)linux_ptrace, AUE_PTRACE, NULL, 0, 0, 0, SY_THR_STATIC }, /* 101 = linux_ptrace */ + { 0, (sy_call_t *)linux_getuid, AUE_GETUID, NULL, 0, 0, 0, SY_THR_STATIC }, /* 102 = linux_getuid */ + { AS(linux_syslog_args), (sy_call_t *)linux_syslog, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 103 = linux_syslog */ + { 0, (sy_call_t *)linux_getgid, AUE_GETGID, NULL, 0, 0, 0, SY_THR_STATIC }, /* 104 = linux_getgid */ + { AS(setuid_args), (sy_call_t *)sys_setuid, AUE_SETUID, NULL, 0, 0, 0, SY_THR_STATIC }, /* 105 = setuid */ + { AS(setgid_args), (sy_call_t *)sys_setgid, AUE_SETGID, NULL, 0, 0, 0, SY_THR_STATIC }, /* 106 = setgid */ + { 0, (sy_call_t *)sys_geteuid, AUE_GETEUID, NULL, 0, 0, 0, SY_THR_STATIC }, /* 107 = geteuid */ + { 0, (sy_call_t *)sys_getegid, AUE_GETEGID, NULL, 0, 0, 0, SY_THR_STATIC }, /* 108 = getegid */ + { AS(setpgid_args), (sy_call_t *)sys_setpgid, AUE_SETPGRP, NULL, 0, 0, 0, SY_THR_STATIC }, /* 109 = setpgid */ + { 0, (sy_call_t *)linux_getppid, AUE_GETPPID, NULL, 0, 0, 0, SY_THR_STATIC }, /* 110 = linux_getppid */ + { 0, (sy_call_t *)sys_getpgrp, AUE_GETPGRP, NULL, 0, 0, 0, SY_THR_STATIC }, /* 111 = getpgrp */ + { 0, (sy_call_t *)sys_setsid, AUE_SETSID, NULL, 0, 0, 0, SY_THR_STATIC }, /* 112 = setsid */ + { AS(setreuid_args), (sy_call_t *)sys_setreuid, AUE_SETREUID, NULL, 0, 0, 0, SY_THR_STATIC }, /* 113 = setreuid */ + { AS(setregid_args), (sy_call_t *)sys_setregid, AUE_SETREGID, NULL, 0, 0, 0, SY_THR_STATIC }, /* 114 = setregid */ + { AS(linux_getgroups_args), (sy_call_t *)linux_getgroups, AUE_GETGROUPS, NULL, 0, 0, 0, SY_THR_STATIC }, /* 115 = linux_getgroups */ + { AS(linux_setgroups_args), (sy_call_t *)linux_setgroups, AUE_SETGROUPS, NULL, 0, 0, 0, SY_THR_STATIC }, /* 116 = linux_setgroups */ + { AS(setresuid_args), (sy_call_t *)sys_setresuid, AUE_SETRESUID, NULL, 0, 0, 0, SY_THR_STATIC }, /* 117 = setresuid */ + { AS(getresuid_args), (sy_call_t *)sys_getresuid, AUE_GETRESUID, NULL, 0, 0, 0, SY_THR_STATIC }, /* 118 = getresuid */ + { AS(setresgid_args), (sy_call_t *)sys_setresgid, AUE_SETRESGID, NULL, 0, 0, 0, SY_THR_STATIC }, /* 119 = setresgid */ + { AS(getresgid_args), (sy_call_t *)sys_getresgid, AUE_GETRESGID, NULL, 0, 0, 0, SY_THR_STATIC }, /* 120 = getresgid */ + { AS(getpgid_args), (sy_call_t *)sys_getpgid, AUE_GETPGID, NULL, 0, 0, 0, SY_THR_STATIC }, /* 121 = getpgid */ + { AS(linux_setfsuid_args), (sy_call_t *)linux_setfsuid, AUE_SETFSUID, NULL, 0, 0, 0, SY_THR_STATIC }, /* 122 = linux_setfsuid */ + { AS(linux_setfsgid_args), (sy_call_t *)linux_setfsgid, AUE_SETFSGID, NULL, 0, 0, 0, SY_THR_STATIC }, /* 123 = linux_setfsgid */ + { AS(linux_getsid_args), (sy_call_t *)linux_getsid, AUE_GETSID, NULL, 0, 0, 0, SY_THR_STATIC }, /* 124 = linux_getsid */ + { AS(linux_capget_args), (sy_call_t *)linux_capget, AUE_CAPGET, NULL, 0, 0, 0, SY_THR_STATIC }, /* 125 = linux_capget */ + { AS(linux_capset_args), (sy_call_t *)linux_capset, AUE_CAPSET, NULL, 0, 0, 0, SY_THR_STATIC }, /* 126 = linux_capset */ + { AS(linux_rt_sigpending_args), (sy_call_t *)linux_rt_sigpending, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 127 = linux_rt_sigpending */ + { AS(linux_rt_sigtimedwait_args), (sy_call_t *)linux_rt_sigtimedwait, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 128 = linux_rt_sigtimedwait */ + { AS(linux_rt_sigqueueinfo_args), (sy_call_t *)linux_rt_sigqueueinfo, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 129 = linux_rt_sigqueueinfo */ + { AS(linux_rt_sigsuspend_args), (sy_call_t *)linux_rt_sigsuspend, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 130 = linux_rt_sigsuspend */ + { AS(linux_sigaltstack_args), (sy_call_t *)linux_sigaltstack, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 131 = linux_sigaltstack */ + { AS(linux_utime_args), (sy_call_t *)linux_utime, AUE_UTIME, NULL, 0, 0, 0, SY_THR_STATIC }, /* 132 = linux_utime */ + { AS(linux_mknod_args), (sy_call_t *)linux_mknod, AUE_MKNOD, NULL, 0, 0, 0, SY_THR_STATIC }, /* 133 = linux_mknod */ + { 0, (sy_call_t *)nosys, AUE_NULL, NULL, 0, 0, 0, SY_THR_ABSENT }, /* 134 = uselib */ + { AS(linux_personality_args), (sy_call_t *)linux_personality, AUE_PERSONALITY, NULL, 0, 0, 0, SY_THR_STATIC }, /* 135 = linux_personality */ + { AS(linux_ustat_args), (sy_call_t *)linux_ustat, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 136 = linux_ustat */ + { AS(linux_statfs_args), (sy_call_t *)linux_statfs, AUE_STATFS, NULL, 0, 0, 0, SY_THR_STATIC }, /* 137 = linux_statfs */ + { AS(linux_fstatfs_args), (sy_call_t *)linux_fstatfs, AUE_FSTATFS, NULL, 0, 0, 0, SY_THR_STATIC }, /* 138 = linux_fstatfs */ + { AS(linux_sysfs_args), (sy_call_t *)linux_sysfs, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 139 = linux_sysfs */ + { AS(linux_getpriority_args), (sy_call_t *)linux_getpriority, AUE_GETPRIORITY, NULL, 0, 0, 0, SY_THR_STATIC }, /* 140 = linux_getpriority */ + { AS(setpriority_args), (sy_call_t *)sys_setpriority, AUE_SETPRIORITY, NULL, 0, 0, 0, SY_THR_STATIC }, /* 141 = setpriority */ + { AS(linux_sched_setparam_args), (sy_call_t *)linux_sched_setparam, AUE_SCHED_SETPARAM, NULL, 0, 0, 0, SY_THR_STATIC }, /* 142 = linux_sched_setparam */ + { AS(linux_sched_getparam_args), (sy_call_t *)linux_sched_getparam, AUE_SCHED_GETPARAM, NULL, 0, 0, 0, SY_THR_STATIC }, /* 143 = linux_sched_getparam */ + { AS(linux_sched_setscheduler_args), (sy_call_t *)linux_sched_setscheduler, AUE_SCHED_SETSCHEDULER, NULL, 0, 0, 0, SY_THR_STATIC }, /* 144 = linux_sched_setscheduler */ + { AS(linux_sched_getscheduler_args), (sy_call_t *)linux_sched_getscheduler, AUE_SCHED_GETSCHEDULER, NULL, 0, 0, 0, SY_THR_STATIC }, /* 145 = linux_sched_getscheduler */ + { AS(linux_sched_get_priority_max_args), (sy_call_t *)linux_sched_get_priority_max, AUE_SCHED_GET_PRIORITY_MAX, NULL, 0, 0, 0, SY_THR_STATIC }, /* 146 = linux_sched_get_priority_max */ + { AS(linux_sched_get_priority_min_args), (sy_call_t *)linux_sched_get_priority_min, AUE_SCHED_GET_PRIORITY_MIN, NULL, 0, 0, 0, SY_THR_STATIC }, /* 147 = linux_sched_get_priority_min */ + { AS(linux_sched_rr_get_interval_args), (sy_call_t *)linux_sched_rr_get_interval, AUE_SCHED_RR_GET_INTERVAL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 148 = linux_sched_rr_get_interval */ + { AS(mlock_args), (sy_call_t *)sys_mlock, AUE_MLOCK, NULL, 0, 0, 0, SY_THR_STATIC }, /* 149 = mlock */ + { AS(munlock_args), (sy_call_t *)sys_munlock, AUE_MUNLOCK, NULL, 0, 0, 0, SY_THR_STATIC }, /* 150 = munlock */ + { AS(mlockall_args), (sy_call_t *)sys_mlockall, AUE_MLOCKALL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 151 = mlockall */ + { 0, (sy_call_t *)sys_munlockall, AUE_MUNLOCKALL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 152 = munlockall */ + { 0, (sy_call_t *)linux_vhangup, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 153 = linux_vhangup */ + { 0, (sy_call_t *)nosys, AUE_NULL, NULL, 0, 0, 0, SY_THR_ABSENT }, /* 154 = modify_ldt */ + { 0, (sy_call_t *)linux_pivot_root, AUE_PIVOT_ROOT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 155 = linux_pivot_root */ + { AS(linux_sysctl_args), (sy_call_t *)linux_sysctl, AUE_SYSCTL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 156 = linux_sysctl */ + { AS(linux_prctl_args), (sy_call_t *)linux_prctl, AUE_PRCTL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 157 = linux_prctl */ + { AS(linux_arch_prctl_args), (sy_call_t *)linux_arch_prctl, AUE_PRCTL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 158 = linux_arch_prctl */ + { 0, (sy_call_t *)linux_adjtimex, AUE_ADJTIME, NULL, 0, 0, 0, SY_THR_STATIC }, /* 159 = linux_adjtimex */ + { AS(linux_setrlimit_args), (sy_call_t *)linux_setrlimit, AUE_SETRLIMIT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 160 = linux_setrlimit */ + { AS(chroot_args), (sy_call_t *)sys_chroot, AUE_CHROOT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 161 = chroot */ + { 0, (sy_call_t *)sys_sync, AUE_SYNC, NULL, 0, 0, 0, SY_THR_STATIC }, /* 162 = sync */ + { AS(acct_args), (sy_call_t *)sys_acct, AUE_ACCT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 163 = acct */ + { AS(settimeofday_args), (sy_call_t *)sys_settimeofday, AUE_SETTIMEOFDAY, NULL, 0, 0, 0, SY_THR_STATIC }, /* 164 = settimeofday */ + { AS(linux_mount_args), (sy_call_t *)linux_mount, AUE_MOUNT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 165 = linux_mount */ + { AS(linux_umount_args), (sy_call_t *)linux_umount, AUE_UMOUNT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 166 = linux_umount */ + { AS(swapon_args), (sy_call_t *)sys_swapon, AUE_SWAPON, NULL, 0, 0, 0, SY_THR_STATIC }, /* 167 = swapon */ + { 0, (sy_call_t *)linux_swapoff, AUE_SWAPOFF, NULL, 0, 0, 0, SY_THR_STATIC }, /* 168 = linux_swapoff */ + { AS(linux_reboot_args), (sy_call_t *)linux_reboot, AUE_REBOOT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 169 = linux_reboot */ + { AS(linux_sethostname_args), (sy_call_t *)linux_sethostname, AUE_SYSCTL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 170 = linux_sethostname */ + { AS(linux_setdomainname_args), (sy_call_t *)linux_setdomainname, AUE_SYSCTL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 171 = linux_setdomainname */ + { AS(linux_iopl_args), (sy_call_t *)linux_iopl, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 172 = linux_iopl */ + { 0, (sy_call_t *)nosys, AUE_NULL, NULL, 0, 0, 0, SY_THR_ABSENT }, /* 173 = ioperm */ + { 0, (sy_call_t *)linux_create_module, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 174 = linux_create_module */ + { 0, (sy_call_t *)linux_init_module, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 175 = linux_init_module */ + { 0, (sy_call_t *)linux_delete_module, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 176 = linux_delete_module */ + { 0, (sy_call_t *)linux_get_kernel_syms, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 177 = linux_get_kernel_syms */ + { 0, (sy_call_t *)linux_query_module, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 178 = linux_query_module */ + { 0, (sy_call_t *)linux_quotactl, AUE_QUOTACTL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 179 = linux_quotactl */ + { 0, (sy_call_t *)linux_nfsservctl, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 180 = linux_nfsservctl */ + { 0, (sy_call_t *)linux_getpmsg, AUE_GETPMSG, NULL, 0, 0, 0, SY_THR_STATIC }, /* 181 = linux_getpmsg */ + { 0, (sy_call_t *)linux_putpmsg, AUE_PUTPMSG, NULL, 0, 0, 0, SY_THR_STATIC }, /* 182 = linux_putpmsg */ + { 0, (sy_call_t *)linux_afs_syscall, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 183 = linux_afs_syscall */ + { 0, (sy_call_t *)linux_tuxcall, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 184 = linux_tuxcall */ + { 0, (sy_call_t *)linux_security, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 185 = linux_security */ + { 0, (sy_call_t *)linux_gettid, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 186 = linux_gettid */ + { 0, (sy_call_t *)nosys, AUE_NULL, NULL, 0, 0, 0, SY_THR_ABSENT }, /* 187 = linux_readahead */ + { 0, (sy_call_t *)linux_setxattr, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 188 = linux_setxattr */ + { 0, (sy_call_t *)linux_lsetxattr, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 189 = linux_lsetxattr */ + { 0, (sy_call_t *)linux_fsetxattr, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 190 = linux_fsetxattr */ + { 0, (sy_call_t *)linux_getxattr, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 191 = linux_getxattr */ + { 0, (sy_call_t *)linux_lgetxattr, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 192 = linux_lgetxattr */ + { 0, (sy_call_t *)linux_fgetxattr, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 193 = linux_fgetxattr */ + { 0, (sy_call_t *)linux_listxattr, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 194 = linux_listxattr */ + { 0, (sy_call_t *)linux_llistxattr, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 195 = linux_llistxattr */ + { 0, (sy_call_t *)linux_flistxattr, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 196 = linux_flistxattr */ + { 0, (sy_call_t *)linux_removexattr, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 197 = linux_removexattr */ + { 0, (sy_call_t *)linux_lremovexattr, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 198 = linux_lremovexattr */ + { 0, (sy_call_t *)linux_fremovexattr, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 199 = linux_fremovexattr */ + { AS(linux_tkill_args), (sy_call_t *)linux_tkill, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 200 = linux_tkill */ + { AS(linux_time_args), (sy_call_t *)linux_time, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 201 = linux_time */ + { AS(linux_sys_futex_args), (sy_call_t *)linux_sys_futex, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 202 = linux_sys_futex */ + { AS(linux_sched_setaffinity_args), (sy_call_t *)linux_sched_setaffinity, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 203 = linux_sched_setaffinity */ + { AS(linux_sched_getaffinity_args), (sy_call_t *)linux_sched_getaffinity, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 204 = linux_sched_getaffinity */ + { 0, (sy_call_t *)linux_set_thread_area, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 205 = linux_set_thread_area */ + { 0, (sy_call_t *)nosys, AUE_NULL, NULL, 0, 0, 0, SY_THR_ABSENT }, /* 206 = linux_io_setup */ + { 0, (sy_call_t *)nosys, AUE_NULL, NULL, 0, 0, 0, SY_THR_ABSENT }, /* 207 = linux_io_destroy */ + { 0, (sy_call_t *)nosys, AUE_NULL, NULL, 0, 0, 0, SY_THR_ABSENT }, /* 208 = linux_io_getevents */ + { 0, (sy_call_t *)nosys, AUE_NULL, NULL, 0, 0, 0, SY_THR_ABSENT }, /* 209 = inux_io_submit */ + { 0, (sy_call_t *)nosys, AUE_NULL, NULL, 0, 0, 0, SY_THR_ABSENT }, /* 210 = linux_io_cancel */ + { 0, (sy_call_t *)nosys, AUE_NULL, NULL, 0, 0, 0, SY_THR_ABSENT }, /* 211 = linux_get_thread_area */ + { 0, (sy_call_t *)linux_lookup_dcookie, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 212 = linux_lookup_dcookie */ + { AS(linux_epoll_create_args), (sy_call_t *)linux_epoll_create, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 213 = linux_epoll_create */ + { 0, (sy_call_t *)linux_epoll_ctl_old, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 214 = linux_epoll_ctl_old */ + { 0, (sy_call_t *)linux_epoll_wait_old, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 215 = linux_epoll_wait_old */ + { 0, (sy_call_t *)linux_remap_file_pages, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 216 = linux_remap_file_pages */ + { AS(linux_getdents64_args), (sy_call_t *)linux_getdents64, AUE_GETDIRENTRIES, NULL, 0, 0, 0, SY_THR_STATIC }, /* 217 = linux_getdents64 */ + { AS(linux_set_tid_address_args), (sy_call_t *)linux_set_tid_address, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 218 = linux_set_tid_address */ + { 0, (sy_call_t *)nosys, AUE_NULL, NULL, 0, 0, 0, SY_THR_ABSENT }, /* 219 = restart_syscall */ + { 0, (sy_call_t *)linux_semtimedop, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 220 = linux_semtimedop */ + { AS(linux_fadvise64_args), (sy_call_t *)linux_fadvise64, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 221 = linux_fadvise64 */ + { AS(linux_timer_create_args), (sy_call_t *)linux_timer_create, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 222 = linux_timer_create */ + { AS(linux_timer_settime_args), (sy_call_t *)linux_timer_settime, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 223 = linux_timer_settime */ + { AS(linux_timer_gettime_args), (sy_call_t *)linux_timer_gettime, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 224 = linux_timer_gettime */ + { AS(linux_timer_getoverrun_args), (sy_call_t *)linux_timer_getoverrun, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 225 = linux_timer_getoverrun */ + { AS(linux_timer_delete_args), (sy_call_t *)linux_timer_delete, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 226 = linux_timer_delete */ + { AS(linux_clock_settime_args), (sy_call_t *)linux_clock_settime, AUE_CLOCK_SETTIME, NULL, 0, 0, 0, SY_THR_STATIC }, /* 227 = linux_clock_settime */ + { AS(linux_clock_gettime_args), (sy_call_t *)linux_clock_gettime, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 228 = linux_clock_gettime */ + { AS(linux_clock_getres_args), (sy_call_t *)linux_clock_getres, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 229 = linux_clock_getres */ + { AS(linux_clock_nanosleep_args), (sy_call_t *)linux_clock_nanosleep, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 230 = linux_clock_nanosleep */ + { AS(linux_exit_group_args), (sy_call_t *)linux_exit_group, AUE_EXIT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 231 = linux_exit_group */ + { AS(linux_epoll_wait_args), (sy_call_t *)linux_epoll_wait, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 232 = linux_epoll_wait */ + { AS(linux_epoll_ctl_args), (sy_call_t *)linux_epoll_ctl, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 233 = linux_epoll_ctl */ + { AS(linux_tgkill_args), (sy_call_t *)linux_tgkill, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 234 = linux_tgkill */ + { AS(linux_utimes_args), (sy_call_t *)linux_utimes, AUE_UTIMES, NULL, 0, 0, 0, SY_THR_STATIC }, /* 235 = linux_utimes */ + { 0, (sy_call_t *)nosys, AUE_NULL, NULL, 0, 0, 0, SY_THR_ABSENT }, /* 236 = vserver */ + { 0, (sy_call_t *)linux_mbind, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 237 = linux_mbind */ + { 0, (sy_call_t *)linux_set_mempolicy, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 238 = linux_set_mempolicy */ + { 0, (sy_call_t *)linux_get_mempolicy, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 239 = linux_get_mempolicy */ + { 0, (sy_call_t *)linux_mq_open, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 240 = linux_mq_open */ + { 0, (sy_call_t *)linux_mq_unlink, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 241 = linux_mq_unlink */ + { 0, (sy_call_t *)linux_mq_timedsend, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 242 = linux_mq_timedsend */ + { 0, (sy_call_t *)linux_mq_timedreceive, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 243 = linux_mq_timedreceive */ + { 0, (sy_call_t *)linux_mq_notify, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 244 = linux_mq_notify */ + { 0, (sy_call_t *)linux_mq_getsetattr, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 245 = linux_mq_getsetattr */ + { 0, (sy_call_t *)linux_kexec_load, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 246 = linux_kexec_load */ + { AS(linux_waitid_args), (sy_call_t *)linux_waitid, AUE_WAIT6, NULL, 0, 0, 0, SY_THR_STATIC }, /* 247 = linux_waitid */ + { 0, (sy_call_t *)linux_add_key, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 248 = linux_add_key */ + { 0, (sy_call_t *)linux_request_key, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 249 = linux_request_key */ + { 0, (sy_call_t *)linux_keyctl, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 250 = linux_keyctl */ + { 0, (sy_call_t *)linux_ioprio_set, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 251 = linux_ioprio_set */ + { 0, (sy_call_t *)linux_ioprio_get, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 252 = linux_ioprio_get */ + { 0, (sy_call_t *)linux_inotify_init, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 253 = linux_inotify_init */ + { 0, (sy_call_t *)linux_inotify_add_watch, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 254 = linux_inotify_add_watch */ + { 0, (sy_call_t *)linux_inotify_rm_watch, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 255 = linux_inotify_rm_watch */ + { 0, (sy_call_t *)linux_migrate_pages, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 256 = linux_migrate_pages */ + { AS(linux_openat_args), (sy_call_t *)linux_openat, AUE_OPEN_RWTC, NULL, 0, 0, 0, SY_THR_STATIC }, /* 257 = linux_openat */ + { AS(linux_mkdirat_args), (sy_call_t *)linux_mkdirat, AUE_MKDIRAT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 258 = linux_mkdirat */ + { AS(linux_mknodat_args), (sy_call_t *)linux_mknodat, AUE_MKNODAT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 259 = linux_mknodat */ + { AS(linux_fchownat_args), (sy_call_t *)linux_fchownat, AUE_FCHOWNAT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 260 = linux_fchownat */ + { AS(linux_futimesat_args), (sy_call_t *)linux_futimesat, AUE_FUTIMESAT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 261 = linux_futimesat */ + { AS(linux_newfstatat_args), (sy_call_t *)linux_newfstatat, AUE_FSTATAT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 262 = linux_newfstatat */ + { AS(linux_unlinkat_args), (sy_call_t *)linux_unlinkat, AUE_UNLINKAT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 263 = linux_unlinkat */ + { AS(linux_renameat_args), (sy_call_t *)linux_renameat, AUE_RENAMEAT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 264 = linux_renameat */ + { AS(linux_linkat_args), (sy_call_t *)linux_linkat, AUE_LINKAT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 265 = linux_linkat */ + { AS(linux_symlinkat_args), (sy_call_t *)linux_symlinkat, AUE_SYMLINKAT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 266 = linux_symlinkat */ + { AS(linux_readlinkat_args), (sy_call_t *)linux_readlinkat, AUE_READLINKAT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 267 = linux_readlinkat */ + { AS(linux_fchmodat_args), (sy_call_t *)linux_fchmodat, AUE_FCHMODAT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 268 = linux_fchmodat */ + { AS(linux_faccessat_args), (sy_call_t *)linux_faccessat, AUE_FACCESSAT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 269 = linux_faccessat */ + { AS(linux_pselect6_args), (sy_call_t *)linux_pselect6, AUE_SELECT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 270 = linux_pselect6 */ + { AS(linux_ppoll_args), (sy_call_t *)linux_ppoll, AUE_POLL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 271 = linux_ppoll */ + { 0, (sy_call_t *)linux_unshare, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 272 = linux_unshare */ + { AS(linux_set_robust_list_args), (sy_call_t *)linux_set_robust_list, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 273 = linux_set_robust_list */ + { AS(linux_get_robust_list_args), (sy_call_t *)linux_get_robust_list, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 274 = linux_get_robust_list */ + { 0, (sy_call_t *)linux_splice, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 275 = linux_splice */ + { 0, (sy_call_t *)linux_tee, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 276 = linux_tee */ + { 0, (sy_call_t *)linux_sync_file_range, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 277 = linux_sync_file_range */ + { 0, (sy_call_t *)linux_vmsplice, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 278 = linux_vmsplice */ + { 0, (sy_call_t *)linux_move_pages, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 279 = linux_move_pages */ + { AS(linux_utimensat_args), (sy_call_t *)linux_utimensat, AUE_FUTIMESAT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 280 = linux_utimensat */ + { AS(linux_epoll_pwait_args), (sy_call_t *)linux_epoll_pwait, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 281 = linux_epoll_pwait */ + { 0, (sy_call_t *)linux_signalfd, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 282 = linux_signalfd */ + { 0, (sy_call_t *)linux_timerfd, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 283 = linux_timerfd */ + { AS(linux_eventfd_args), (sy_call_t *)linux_eventfd, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 284 = linux_eventfd */ + { AS(linux_fallocate_args), (sy_call_t *)linux_fallocate, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 285 = linux_fallocate */ + { 0, (sy_call_t *)linux_timerfd_settime, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 286 = linux_timerfd_settime */ + { 0, (sy_call_t *)linux_timerfd_gettime, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 287 = linux_timerfd_gettime */ + { AS(linux_accept4_args), (sy_call_t *)linux_accept4, AUE_ACCEPT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 288 = linux_accept4 */ + { 0, (sy_call_t *)linux_signalfd4, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 289 = linux_signalfd4 */ + { AS(linux_eventfd2_args), (sy_call_t *)linux_eventfd2, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 290 = linux_eventfd2 */ + { AS(linux_epoll_create1_args), (sy_call_t *)linux_epoll_create1, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 291 = linux_epoll_create1 */ + { AS(linux_dup3_args), (sy_call_t *)linux_dup3, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 292 = linux_dup3 */ + { AS(linux_pipe2_args), (sy_call_t *)linux_pipe2, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 293 = linux_pipe2 */ + { 0, (sy_call_t *)linux_inotify_init1, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 294 = linux_inotify_init1 */ + { 0, (sy_call_t *)linux_preadv, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 295 = linux_preadv */ + { 0, (sy_call_t *)linux_pwritev, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 296 = linux_pwritev */ + { 0, (sy_call_t *)linux_rt_tsigqueueinfo, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 297 = linux_rt_tsigqueueinfo */ + { 0, (sy_call_t *)linux_perf_event_open, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 298 = linux_perf_event_open */ + { AS(linux_recvmmsg_args), (sy_call_t *)linux_recvmmsg, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 299 = linux_recvmmsg */ + { 0, (sy_call_t *)linux_fanotify_init, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 300 = linux_fanotify_init */ + { 0, (sy_call_t *)linux_fanotify_mark, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 301 = linux_fanotify_mark */ + { AS(linux_prlimit64_args), (sy_call_t *)linux_prlimit64, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 302 = linux_prlimit64 */ + { 0, (sy_call_t *)linux_name_to_handle_at, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 303 = linux_name_to_handle_at */ + { 0, (sy_call_t *)linux_open_by_handle_at, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 304 = linux_open_by_handle_at */ + { 0, (sy_call_t *)linux_clock_adjtime, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 305 = linux_clock_adjtime */ + { AS(linux_syncfs_args), (sy_call_t *)linux_syncfs, AUE_SYNC, NULL, 0, 0, 0, SY_THR_STATIC }, /* 306 = linux_syncfs */ + { AS(linux_sendmmsg_args), (sy_call_t *)linux_sendmmsg, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 307 = linux_sendmmsg */ + { 0, (sy_call_t *)linux_setns, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 308 = linux_setns */ + { 0, (sy_call_t *)linux_process_vm_readv, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 309 = linux_process_vm_readv */ + { 0, (sy_call_t *)linux_process_vm_writev, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 310 = linux_process_vm_writev */ + { 0, (sy_call_t *)linux_kcmp, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 311 = linux_kcmp */ + { 0, (sy_call_t *)linux_finit_module, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 312 = linux_finit_module */ + { 0, (sy_call_t *)nosys, AUE_NULL, NULL, 0, 0, 0, SY_THR_ABSENT }, /* 313 = nosys */ +}; diff --git a/sys/amd64/linux/linux_systrace_args.c b/sys/amd64/linux/linux_systrace_args.c new file mode 100644 index 000000000000..529e76883b9e --- /dev/null +++ b/sys/amd64/linux/linux_systrace_args.c @@ -0,0 +1,6885 @@ +/* + * System call argument to DTrace register array converstion. + * + * DO NOT EDIT-- this file is automatically generated. + * $FreeBSD$ + * This file is part of the DTrace syscall provider. + */ + +static void +systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) +{ + int64_t *iarg = (int64_t *) uarg; + switch (sysnum) { +#define nosys linux_nosys + /* read */ + case 0: { + struct read_args *p = params; + iarg[0] = p->fd; /* int */ + uarg[1] = (intptr_t) p->buf; /* char * */ + uarg[2] = p->nbyte; /* u_int */ + *n_args = 3; + break; + } + /* write */ + case 1: { + struct write_args *p = params; + iarg[0] = p->fd; /* int */ + uarg[1] = (intptr_t) p->buf; /* char * */ + uarg[2] = p->nbyte; /* u_int */ + *n_args = 3; + break; + } + /* linux_open */ + case 2: { + struct linux_open_args *p = params; + uarg[0] = (intptr_t) p->path; /* char * */ + iarg[1] = p->flags; /* l_int */ + iarg[2] = p->mode; /* l_int */ + *n_args = 3; + break; + } + /* close */ + case 3: { + struct close_args *p = params; + iarg[0] = p->fd; /* int */ + *n_args = 1; + break; + } + /* linux_newstat */ + case 4: { + struct linux_newstat_args *p = params; + uarg[0] = (intptr_t) p->path; /* char * */ + uarg[1] = (intptr_t) p->buf; /* struct l_newstat * */ + *n_args = 2; + break; + } + /* linux_newfstat */ + case 5: { + struct linux_newfstat_args *p = params; + iarg[0] = p->fd; /* l_uint */ + uarg[1] = (intptr_t) p->buf; /* struct l_newstat * */ + *n_args = 2; + break; + } + /* linux_newlstat */ + case 6: { + struct linux_newlstat_args *p = params; + uarg[0] = (intptr_t) p->path; /* char * */ + uarg[1] = (intptr_t) p->buf; /* struct l_newstat * */ + *n_args = 2; + break; + } + /* poll */ + case 7: { + struct poll_args *p = params; + iarg[0] = p->*; /* struct pollfd */ + uarg[1] = p->nfds; /* unsigned int */ + iarg[2] = p->timeout; /* int */ + *n_args = 3; + break; + } + /* linux_lseek */ + case 8: { + struct linux_lseek_args *p = params; + iarg[0] = p->fdes; /* l_uint */ + iarg[1] = p->off; /* l_off_t */ + iarg[2] = p->whence; /* l_int */ + *n_args = 3; + break; + } + /* linux_mmap2 */ + case 9: { + struct linux_mmap2_args *p = params; + iarg[0] = p->addr; /* l_ulong */ + iarg[1] = p->len; /* l_ulong */ + iarg[2] = p->prot; /* l_ulong */ + iarg[3] = p->flags; /* l_ulong */ + iarg[4] = p->fd; /* l_ulong */ + iarg[5] = p->pgoff; /* l_ulong */ + *n_args = 6; + break; + } + /* linux_mprotect */ + case 10: { + struct linux_mprotect_args *p = params; + uarg[0] = (intptr_t) p->addr; /* caddr_t */ + iarg[1] = p->len; /* int */ + iarg[2] = p->prot; /* int */ + *n_args = 3; + break; + } + /* munmap */ + case 11: { + struct munmap_args *p = params; + uarg[0] = (intptr_t) p->addr; /* caddr_t */ + iarg[1] = p->len; /* int */ + *n_args = 2; + break; + } + /* linux_brk */ + case 12: { + struct linux_brk_args *p = params; + iarg[0] = p->dsend; /* l_ulong */ + *n_args = 1; + break; + } + /* linux_rt_sigaction */ + case 13: { + struct linux_rt_sigaction_args *p = params; + iarg[0] = p->sig; /* l_int */ + uarg[1] = (intptr_t) p->act; /* l_sigaction_t * */ + uarg[2] = (intptr_t) p->oact; /* l_sigaction_t * */ + iarg[3] = p->sigsetsize; /* l_size_t */ + *n_args = 4; + break; + } + /* linux_rt_sigprocmask */ + case 14: { + struct linux_rt_sigprocmask_args *p = params; + iarg[0] = p->how; /* l_int */ + uarg[1] = (intptr_t) p->mask; /* l_sigset_t * */ + uarg[2] = (intptr_t) p->omask; /* l_sigset_t * */ + iarg[3] = p->sigsetsize; /* l_size_t */ + *n_args = 4; + break; + } + /* linux_rt_sigreturn */ + case 15: { + struct linux_rt_sigreturn_args *p = params; + uarg[0] = (intptr_t) p->ucp; /* struct l_ucontext * */ + *n_args = 1; + break; + } + /* linux_ioctl */ + case 16: { + struct linux_ioctl_args *p = params; + iarg[0] = p->fd; /* l_uint */ + iarg[1] = p->cmd; /* l_uint */ + uarg[2] = p->arg; /* uintptr_t */ + *n_args = 3; + break; + } + /* linux_pread */ + case 17: { + struct linux_pread_args *p = params; + iarg[0] = p->fd; /* l_uint */ + uarg[1] = (intptr_t) p->buf; /* char * */ + iarg[2] = p->nbyte; /* l_size_t */ + iarg[3] = p->offset; /* l_loff_t */ + *n_args = 4; + break; + } + /* linux_pwrite */ + case 18: { + struct linux_pwrite_args *p = params; + iarg[0] = p->fd; /* l_uint */ + uarg[1] = (intptr_t) p->buf; /* char * */ + iarg[2] = p->nbyte; /* l_size_t */ + iarg[3] = p->offset; /* l_loff_t */ + *n_args = 4; + break; + } + /* readv */ + case 19: { + struct readv_args *p = params; + iarg[0] = p->fd; /* int */ + uarg[1] = (intptr_t) p->iovp; /* struct iovec * */ + uarg[2] = p->iovcnt; /* u_int */ + *n_args = 3; + break; + } + /* writev */ + case 20: { + struct writev_args *p = params; + iarg[0] = p->fd; /* int */ + uarg[1] = (intptr_t) p->iovp; /* struct iovec * */ + uarg[2] = p->iovcnt; /* u_int */ + *n_args = 3; + break; + } + /* linux_access */ + case 21: { + struct linux_access_args *p = params; + uarg[0] = (intptr_t) p->path; /* char * */ + iarg[1] = p->amode; /* l_int */ + *n_args = 2; + break; + } + /* linux_pipe */ + case 22: { + struct linux_pipe_args *p = params; + uarg[0] = (intptr_t) p->pipefds; /* l_ulong * */ + *n_args = 1; + break; + } + /* linux_select */ + case 23: { + struct linux_select_args *p = params; + iarg[0] = p->nfds; /* l_int */ + uarg[1] = (intptr_t) p->readfds; /* l_fd_set * */ + uarg[2] = (intptr_t) p->writefds; /* l_fd_set * */ + uarg[3] = (intptr_t) p->exceptfds; /* l_fd_set * */ + uarg[4] = (intptr_t) p->timeout; /* struct l_timeval * */ + *n_args = 5; + break; + } + /* sched_yield */ + case 24: { + *n_args = 0; + break; + } + /* linux_mremap */ + case 25: { + struct linux_mremap_args *p = params; + iarg[0] = p->addr; /* l_ulong */ + iarg[1] = p->old_len; /* l_ulong */ + iarg[2] = p->new_len; /* l_ulong */ + iarg[3] = p->flags; /* l_ulong */ + iarg[4] = p->new_addr; /* l_ulong */ + *n_args = 5; + break; + } + /* linux_msync */ + case 26: { + struct linux_msync_args *p = params; + iarg[0] = p->addr; /* l_ulong */ + iarg[1] = p->len; /* l_size_t */ + iarg[2] = p->fl; /* l_int */ + *n_args = 3; + break; + } + /* linux_mincore */ + case 27: { + struct linux_mincore_args *p = params; + iarg[0] = p->start; /* l_ulong */ + iarg[1] = p->len; /* l_size_t */ + uarg[2] = (intptr_t) p->vec; /* u_char * */ + *n_args = 3; + break; + } + /* madvise */ + case 28: { + struct madvise_args *p = params; + uarg[0] = (intptr_t) p->addr; /* void * */ + uarg[1] = p->len; /* size_t */ + iarg[2] = p->behav; /* int */ + *n_args = 3; + break; + } + /* linux_shmget */ + case 29: { + struct linux_shmget_args *p = params; + iarg[0] = p->key; /* l_key_t */ + iarg[1] = p->size; /* l_size_t */ + iarg[2] = p->shmflg; /* l_int */ + *n_args = 3; + break; + } + /* linux_shmat */ + case 30: { + struct linux_shmat_args *p = params; + iarg[0] = p->shmid; /* l_int */ + uarg[1] = (intptr_t) p->shmaddr; /* char * */ + iarg[2] = p->shmflg; /* l_int */ + *n_args = 3; + break; + } + /* linux_shmctl */ + case 31: { + struct linux_shmctl_args *p = params; + iarg[0] = p->shmid; /* l_int */ + iarg[1] = p->cmd; /* l_int */ + uarg[2] = (intptr_t) p->buf; /* struct l_shmid_ds * */ + *n_args = 3; + break; + } + /* dup */ + case 32: { + struct dup_args *p = params; + uarg[0] = p->fd; /* u_int */ + *n_args = 1; + break; + } + /* dup2 */ + case 33: { + struct dup2_args *p = params; + uarg[0] = p->from; /* u_int */ + uarg[1] = p->to; /* u_int */ + *n_args = 2; + break; + } + /* linux_pause */ + case 34: { + *n_args = 0; + break; + } + /* linux_nanosleep */ + case 35: { + struct linux_nanosleep_args *p = params; + uarg[0] = (intptr_t) p->rqtp; /* const struct l_timespec * */ + uarg[1] = (intptr_t) p->rmtp; /* struct l_timespec * */ + *n_args = 2; + break; + } + /* linux_getitimer */ + case 36: { + struct linux_getitimer_args *p = params; + iarg[0] = p->which; /* l_int */ + uarg[1] = (intptr_t) p->itv; /* struct l_itimerval * */ + *n_args = 2; + break; + } + /* linux_alarm */ + case 37: { + struct linux_alarm_args *p = params; + iarg[0] = p->secs; /* l_uint */ + *n_args = 1; + break; + } + /* linux_setitimer */ + case 38: { + struct linux_setitimer_args *p = params; + iarg[0] = p->which; /* l_int */ + uarg[1] = (intptr_t) p->itv; /* struct l_itimerval * */ + uarg[2] = (intptr_t) p->oitv; /* struct l_itimerval * */ + *n_args = 3; + break; + } + /* linux_getpid */ + case 39: { + *n_args = 0; + break; + } + /* linux_sendfile */ + case 40: { + struct linux_sendfile_args *p = params; + iarg[0] = p->out; /* int */ + iarg[1] = p->in; /* int */ + uarg[2] = (intptr_t) p->offset; /* l_long * */ + iarg[3] = p->count; /* l_size_t */ + *n_args = 4; + break; + } + /* linux_socket */ + case 41: { + struct linux_socket_args *p = params; + iarg[0] = p->domain; /* l_int */ + iarg[1] = p->type; /* l_int */ + iarg[2] = p->protocol; /* l_int */ + *n_args = 3; + break; + } + /* linux_connect */ + case 42: { + struct linux_connect_args *p = params; + iarg[0] = p->s; /* l_int */ + iarg[1] = p->name; /* l_uintptr_t */ + iarg[2] = p->namelen; /* l_int */ + *n_args = 3; + break; + } + /* linux_accept */ + case 43: { + struct linux_accept_args *p = params; + iarg[0] = p->s; /* l_int */ + iarg[1] = p->addr; /* l_uintptr_t */ + iarg[2] = p->namelen; /* l_uintptr_t */ + *n_args = 3; + break; + } + /* linux_sendto */ + case 44: { + struct linux_sendto_args *p = params; + iarg[0] = p->s; /* l_int */ + iarg[1] = p->msg; /* l_uintptr_t */ + iarg[2] = p->len; /* l_int */ + iarg[3] = p->flags; /* l_int */ + iarg[4] = p->to; /* l_uintptr_t */ + iarg[5] = p->tolen; /* l_int */ + *n_args = 6; + break; + } + /* linux_recvfrom */ + case 45: { + struct linux_recvfrom_args *p = params; + iarg[0] = p->s; /* l_int */ + iarg[1] = p->buf; /* l_uintptr_t */ + iarg[2] = p->len; /* l_size_t */ + iarg[3] = p->flags; /* l_int */ + iarg[4] = p->from; /* l_uintptr_t */ + iarg[5] = p->fromlen; /* l_uintptr_t */ + *n_args = 6; + break; + } + /* linux_sendmsg */ + case 46: { + struct linux_sendmsg_args *p = params; + iarg[0] = p->s; /* l_int */ + iarg[1] = p->msg; /* l_uintptr_t */ + iarg[2] = p->flags; /* l_int */ + *n_args = 3; + break; + } + /* linux_recvmsg */ + case 47: { + struct linux_recvmsg_args *p = params; + iarg[0] = p->s; /* l_int */ + iarg[1] = p->msg; /* l_uintptr_t */ + iarg[2] = p->flags; /* l_int */ + *n_args = 3; + break; + } + /* linux_shutdown */ + case 48: { + struct linux_shutdown_args *p = params; + iarg[0] = p->s; /* l_int */ + iarg[1] = p->how; /* l_int */ + *n_args = 2; + break; + } + /* linux_bind */ + case 49: { + struct linux_bind_args *p = params; + iarg[0] = p->s; /* l_int */ + iarg[1] = p->name; /* l_uintptr_t */ + iarg[2] = p->namelen; /* l_int */ + *n_args = 3; + break; + } + /* linux_listen */ + case 50: { + struct linux_listen_args *p = params; + iarg[0] = p->s; /* l_int */ + iarg[1] = p->backlog; /* l_int */ + *n_args = 2; + break; + } + /* linux_getsockname */ + case 51: { + struct linux_getsockname_args *p = params; + iarg[0] = p->s; /* l_int */ + iarg[1] = p->addr; /* l_uintptr_t */ + iarg[2] = p->namelen; /* l_uintptr_t */ + *n_args = 3; + break; + } + /* linux_getpeername */ + case 52: { + struct linux_getpeername_args *p = params; + iarg[0] = p->s; /* l_int */ + iarg[1] = p->addr; /* l_uintptr_t */ + iarg[2] = p->namelen; /* l_uintptr_t */ + *n_args = 3; + break; + } + /* linux_socketpair */ + case 53: { + struct linux_socketpair_args *p = params; + iarg[0] = p->domain; /* l_int */ + iarg[1] = p->type; /* l_int */ + iarg[2] = p->protocol; /* l_int */ + iarg[3] = p->rsv; /* l_uintptr_t */ + *n_args = 4; + break; + } + /* linux_setsockopt */ + case 54: { + struct linux_setsockopt_args *p = params; + iarg[0] = p->s; /* l_int */ + iarg[1] = p->level; /* l_int */ + iarg[2] = p->optname; /* l_int */ + iarg[3] = p->optval; /* l_uintptr_t */ + iarg[4] = p->optlen; /* l_int */ + *n_args = 5; + break; + } + /* linux_getsockopt */ + case 55: { + struct linux_getsockopt_args *p = params; + iarg[0] = p->s; /* l_int */ + iarg[1] = p->level; /* l_int */ + iarg[2] = p->optname; /* l_int */ + iarg[3] = p->optval; /* l_uintptr_t */ + iarg[4] = p->optlen; /* l_uintptr_t */ + *n_args = 5; + break; + } + /* linux_clone */ + case 56: { + struct linux_clone_args *p = params; + iarg[0] = p->flags; /* l_int */ + uarg[1] = (intptr_t) p->stack; /* void * */ + uarg[2] = (intptr_t) p->parent_tidptr; /* void * */ + uarg[3] = (intptr_t) p->child_tidptr; /* void * */ + uarg[4] = (intptr_t) p->tls; /* void * */ + *n_args = 5; + break; + } + /* linux_fork */ + case 57: { + *n_args = 0; + break; + } + /* linux_vfork */ + case 58: { + *n_args = 0; + break; + } + /* linux_execve */ + case 59: { + struct linux_execve_args *p = params; + uarg[0] = (intptr_t) p->path; /* char * */ + uarg[1] = (intptr_t) p->argp; /* char ** */ + uarg[2] = (intptr_t) p->envp; /* char ** */ + *n_args = 3; + break; + } + /* linux_exit */ + case 60: { + struct linux_exit_args *p = params; + iarg[0] = p->rval; /* int */ + *n_args = 1; + break; + } + /* linux_wait4 */ + case 61: { + struct linux_wait4_args *p = params; + iarg[0] = p->pid; /* l_pid_t */ + uarg[1] = (intptr_t) p->status; /* l_int * */ + iarg[2] = p->options; /* l_int */ + uarg[3] = (intptr_t) p->rusage; /* struct rusage * */ + *n_args = 4; + break; + } + /* linux_kill */ + case 62: { + struct linux_kill_args *p = params; + iarg[0] = p->pid; /* l_int */ + iarg[1] = p->signum; /* l_int */ + *n_args = 2; + break; + } + /* linux_newuname */ + case 63: { + struct linux_newuname_args *p = params; + uarg[0] = (intptr_t) p->buf; /* struct l_new_utsname * */ + *n_args = 1; + break; + } + /* linux_semget */ + case 64: { + struct linux_semget_args *p = params; + iarg[0] = p->key; /* l_key_t */ + iarg[1] = p->nsems; /* l_int */ + iarg[2] = p->semflg; /* l_int */ + *n_args = 3; + break; + } + /* linux_semop */ + case 65: { + struct linux_semop_args *p = params; + iarg[0] = p->semid; /* l_int */ + uarg[1] = (intptr_t) p->tsops; /* struct l_sembuf * */ + iarg[2] = p->nsops; /* l_uint */ + *n_args = 3; + break; + } + /* linux_semctl */ + case 66: { + struct linux_semctl_args *p = params; + iarg[0] = p->semid; /* l_int */ + iarg[1] = p->semnum; /* l_int */ + iarg[2] = p->cmd; /* l_int */ + uarg[3] = p->arg; /* union l_semun */ + *n_args = 4; + break; + } + /* linux_shmdt */ + case 67: { + struct linux_shmdt_args *p = params; + uarg[0] = (intptr_t) p->shmaddr; /* char * */ + *n_args = 1; + break; + } + /* linux_msgget */ + case 68: { + struct linux_msgget_args *p = params; + iarg[0] = p->key; /* l_key_t */ + iarg[1] = p->msgflg; /* l_int */ + *n_args = 2; + break; + } + /* linux_msgsnd */ + case 69: { + struct linux_msgsnd_args *p = params; + iarg[0] = p->msqid; /* l_int */ + uarg[1] = (intptr_t) p->msgp; /* struct l_msgbuf * */ + iarg[2] = p->msgsz; /* l_size_t */ + iarg[3] = p->msgflg; /* l_int */ + *n_args = 4; + break; + } + /* linux_msgrcv */ + case 70: { + struct linux_msgrcv_args *p = params; + iarg[0] = p->msqid; /* l_int */ + uarg[1] = (intptr_t) p->msgp; /* struct l_msgbuf * */ + iarg[2] = p->msgsz; /* l_size_t */ + iarg[3] = p->msgtyp; /* l_long */ + iarg[4] = p->msgflg; /* l_int */ + *n_args = 5; + break; + } + /* linux_msgctl */ + case 71: { + struct linux_msgctl_args *p = params; + iarg[0] = p->msqid; /* l_int */ + iarg[1] = p->cmd; /* l_int */ + uarg[2] = (intptr_t) p->buf; /* struct l_msqid_ds * */ + *n_args = 3; + break; + } + /* linux_fcntl */ + case 72: { + struct linux_fcntl_args *p = params; + iarg[0] = p->fd; /* l_uint */ + iarg[1] = p->cmd; /* l_uint */ + iarg[2] = p->arg; /* l_ulong */ + *n_args = 3; + break; + } + /* flock */ + case 73: { + struct flock_args *p = params; + iarg[0] = p->fd; /* int */ + iarg[1] = p->how; /* int */ + *n_args = 2; + break; + } + /* fsync */ + case 74: { + struct fsync_args *p = params; + iarg[0] = p->fd; /* int */ + *n_args = 1; + break; + } + /* linux_fdatasync */ + case 75: { + struct linux_fdatasync_args *p = params; + iarg[0] = p->fd; /* l_uint */ + *n_args = 1; + break; + } + /* linux_truncate */ + case 76: { + struct linux_truncate_args *p = params; + uarg[0] = (intptr_t) p->path; /* char * */ + iarg[1] = p->length; /* l_ulong */ + *n_args = 2; + break; + } + /* linux_ftruncate */ + case 77: { + struct linux_ftruncate_args *p = params; + iarg[0] = p->fd; /* l_int */ + iarg[1] = p->length; /* l_long */ + *n_args = 2; + break; + } + /* linux_getdents */ + case 78: { + struct linux_getdents_args *p = params; + iarg[0] = p->fd; /* l_uint */ + uarg[1] = (intptr_t) p->dent; /* void * */ + iarg[2] = p->count; /* l_uint */ + *n_args = 3; + break; + } + /* linux_getcwd */ + case 79: { + struct linux_getcwd_args *p = params; + uarg[0] = (intptr_t) p->buf; /* char * */ + iarg[1] = p->bufsize; /* l_ulong */ + *n_args = 2; + break; + } + /* linux_chdir */ + case 80: { + struct linux_chdir_args *p = params; + uarg[0] = (intptr_t) p->path; /* char * */ + *n_args = 1; + break; + } + /* fchdir */ + case 81: { + struct fchdir_args *p = params; + iarg[0] = p->fd; /* int */ + *n_args = 1; + break; + } + /* linux_rename */ + case 82: { + struct linux_rename_args *p = params; + uarg[0] = (intptr_t) p->from; /* char * */ + uarg[1] = (intptr_t) p->to; /* char * */ + *n_args = 2; + break; + } + /* linux_mkdir */ + case 83: { + struct linux_mkdir_args *p = params; + uarg[0] = (intptr_t) p->path; /* char * */ + iarg[1] = p->mode; /* l_int */ + *n_args = 2; + break; + } + /* linux_rmdir */ + case 84: { + struct linux_rmdir_args *p = params; + uarg[0] = (intptr_t) p->path; /* char * */ + *n_args = 1; + break; + } + /* linux_creat */ + case 85: { + struct linux_creat_args *p = params; + uarg[0] = (intptr_t) p->path; /* char * */ + iarg[1] = p->mode; /* l_int */ + *n_args = 2; + break; + } + /* linux_link */ + case 86: { + struct linux_link_args *p = params; + uarg[0] = (intptr_t) p->path; /* char * */ + uarg[1] = (intptr_t) p->to; /* char * */ + *n_args = 2; + break; + } + /* linux_unlink */ + case 87: { + struct linux_unlink_args *p = params; + uarg[0] = (intptr_t) p->path; /* char * */ + *n_args = 1; + break; + } + /* linux_symlink */ + case 88: { + struct linux_symlink_args *p = params; + uarg[0] = (intptr_t) p->path; /* char * */ + uarg[1] = (intptr_t) p->to; /* char * */ + *n_args = 2; + break; + } + /* linux_readlink */ + case 89: { + struct linux_readlink_args *p = params; + uarg[0] = (intptr_t) p->name; /* char * */ + uarg[1] = (intptr_t) p->buf; /* char * */ + iarg[2] = p->count; /* l_int */ + *n_args = 3; + break; + } + /* linux_chmod */ + case 90: { + struct linux_chmod_args *p = params; + uarg[0] = (intptr_t) p->path; /* char * */ + iarg[1] = p->mode; /* l_mode_t */ + *n_args = 2; + break; + } + /* fchmod */ + case 91: { + struct fchmod_args *p = params; + iarg[0] = p->fd; /* int */ + iarg[1] = p->mode; /* int */ + *n_args = 2; + break; + } + /* linux_chown */ + case 92: { + struct linux_chown_args *p = params; + uarg[0] = (intptr_t) p->path; /* char * */ + iarg[1] = p->uid; /* l_uid_t */ + iarg[2] = p->gid; /* l_gid_t */ + *n_args = 3; + break; + } + /* fchown */ + case 93: { + struct fchown_args *p = params; + iarg[0] = p->fd; /* int */ + iarg[1] = p->uid; /* int */ + iarg[2] = p->gid; /* int */ + *n_args = 3; + break; + } + /* linux_lchown */ + case 94: { + struct linux_lchown_args *p = params; + uarg[0] = (intptr_t) p->path; /* char * */ + iarg[1] = p->uid; /* l_uid_t */ + iarg[2] = p->gid; /* l_gid_t */ + *n_args = 3; + break; + } + /* umask */ + case 95: { + struct umask_args *p = params; + iarg[0] = p->newmask; /* int */ + *n_args = 1; + break; + } + /* gettimeofday */ + case 96: { + struct gettimeofday_args *p = params; + uarg[0] = (intptr_t) p->tp; /* struct l_timeval * */ + uarg[1] = (intptr_t) p->tzp; /* struct timezone * */ + *n_args = 2; + break; + } + /* linux_getrlimit */ + case 97: { + struct linux_getrlimit_args *p = params; + iarg[0] = p->resource; /* l_uint */ + uarg[1] = (intptr_t) p->rlim; /* struct l_rlimit * */ + *n_args = 2; + break; + } + /* getrusage */ + case 98: { + struct getrusage_args *p = params; + iarg[0] = p->who; /* int */ + uarg[1] = (intptr_t) p->rusage; /* struct rusage * */ + *n_args = 2; + break; + } + /* linux_sysinfo */ + case 99: { + struct linux_sysinfo_args *p = params; + uarg[0] = (intptr_t) p->info; /* struct l_sysinfo * */ + *n_args = 1; + break; + } + /* linux_times */ + case 100: { + struct linux_times_args *p = params; + uarg[0] = (intptr_t) p->buf; /* struct l_times_argv * */ + *n_args = 1; + break; + } + /* linux_ptrace */ + case 101: { + struct linux_ptrace_args *p = params; + iarg[0] = p->req; /* l_long */ + iarg[1] = p->pid; /* l_long */ + iarg[2] = p->addr; /* l_long */ + iarg[3] = p->data; /* l_long */ + *n_args = 4; + break; + } + /* linux_getuid */ + case 102: { + *n_args = 0; + break; + } + /* linux_syslog */ + case 103: { + struct linux_syslog_args *p = params; + iarg[0] = p->type; /* l_int */ + uarg[1] = (intptr_t) p->buf; /* char * */ + iarg[2] = p->len; /* l_int */ + *n_args = 3; + break; + } + /* linux_getgid */ + case 104: { + *n_args = 0; + break; + } + /* setuid */ + case 105: { + struct setuid_args *p = params; + uarg[0] = p->uid; /* uid_t */ + *n_args = 1; + break; + } + /* setgid */ + case 106: { + struct setgid_args *p = params; + iarg[0] = p->gid; /* gid_t */ + *n_args = 1; + break; + } + /* geteuid */ + case 107: { + *n_args = 0; + break; + } + /* getegid */ + case 108: { + *n_args = 0; + break; + } + /* setpgid */ + case 109: { + struct setpgid_args *p = params; + iarg[0] = p->pid; /* int */ + iarg[1] = p->pgid; /* int */ + *n_args = 2; + break; + } + /* linux_getppid */ + case 110: { + *n_args = 0; + break; + } + /* getpgrp */ + case 111: { + *n_args = 0; + break; + } + /* setsid */ + case 112: { + *n_args = 0; + break; + } + /* setreuid */ + case 113: { + struct setreuid_args *p = params; + uarg[0] = p->ruid; /* uid_t */ + uarg[1] = p->euid; /* uid_t */ + *n_args = 2; + break; + } + /* setregid */ + case 114: { + struct setregid_args *p = params; + iarg[0] = p->rgid; /* gid_t */ + iarg[1] = p->egid; /* gid_t */ + *n_args = 2; + break; + } + /* linux_getgroups */ + case 115: { + struct linux_getgroups_args *p = params; + iarg[0] = p->gidsetsize; /* l_int */ + uarg[1] = (intptr_t) p->grouplist; /* l_gid_t * */ + *n_args = 2; + break; + } + /* linux_setgroups */ + case 116: { + struct linux_setgroups_args *p = params; + iarg[0] = p->gidsetsize; /* l_int */ + uarg[1] = (intptr_t) p->grouplist; /* l_gid_t * */ + *n_args = 2; + break; + } + /* setresuid */ + case 117: { + struct setresuid_args *p = params; + uarg[0] = p->ruid; /* uid_t */ + uarg[1] = p->euid; /* uid_t */ + uarg[2] = p->suid; /* uid_t */ + *n_args = 3; + break; + } + /* getresuid */ + case 118: { + struct getresuid_args *p = params; + uarg[0] = (intptr_t) p->ruid; /* uid_t * */ + uarg[1] = (intptr_t) p->euid; /* uid_t * */ + uarg[2] = (intptr_t) p->suid; /* uid_t * */ + *n_args = 3; + break; + } + /* setresgid */ + case 119: { + struct setresgid_args *p = params; + iarg[0] = p->rgid; /* gid_t */ + iarg[1] = p->egid; /* gid_t */ + iarg[2] = p->sgid; /* gid_t */ + *n_args = 3; + break; + } + /* getresgid */ + case 120: { + struct getresgid_args *p = params; + uarg[0] = (intptr_t) p->rgid; /* gid_t * */ + uarg[1] = (intptr_t) p->egid; /* gid_t * */ + uarg[2] = (intptr_t) p->sgid; /* gid_t * */ + *n_args = 3; + break; + } + /* getpgid */ + case 121: { + struct getpgid_args *p = params; + iarg[0] = p->pid; /* int */ + *n_args = 1; + break; + } + /* linux_setfsuid */ + case 122: { + struct linux_setfsuid_args *p = params; + iarg[0] = p->uid; /* l_uid_t */ + *n_args = 1; + break; + } + /* linux_setfsgid */ + case 123: { + struct linux_setfsgid_args *p = params; + iarg[0] = p->gid; /* l_gid_t */ + *n_args = 1; + break; + } + /* linux_getsid */ + case 124: { + struct linux_getsid_args *p = params; + iarg[0] = p->pid; /* l_pid_t */ + *n_args = 1; + break; + } + /* linux_capget */ + case 125: { + struct linux_capget_args *p = params; + uarg[0] = (intptr_t) p->hdrp; /* struct l_user_cap_header * */ + uarg[1] = (intptr_t) p->datap; /* struct l_user_cap_data * */ + *n_args = 2; + break; + } + /* linux_capset */ + case 126: { + struct linux_capset_args *p = params; + uarg[0] = (intptr_t) p->hdrp; /* struct l_user_cap_header * */ + uarg[1] = (intptr_t) p->datap; /* struct l_user_cap_data * */ + *n_args = 2; + break; + } + /* linux_rt_sigpending */ + case 127: { + struct linux_rt_sigpending_args *p = params; + uarg[0] = (intptr_t) p->set; /* l_sigset_t * */ + iarg[1] = p->sigsetsize; /* l_size_t */ + *n_args = 2; + break; + } + /* linux_rt_sigtimedwait */ + case 128: { + struct linux_rt_sigtimedwait_args *p = params; + uarg[0] = (intptr_t) p->mask; /* l_sigset_t * */ + uarg[1] = (intptr_t) p->ptr; /* l_siginfo_t * */ + uarg[2] = (intptr_t) p->timeout; /* struct l_timeval * */ + iarg[3] = p->sigsetsize; /* l_size_t */ + *n_args = 4; + break; + } + /* linux_rt_sigqueueinfo */ + case 129: { + struct linux_rt_sigqueueinfo_args *p = params; + iarg[0] = p->pid; /* l_pid_t */ + iarg[1] = p->sig; /* l_int */ + uarg[2] = (intptr_t) p->info; /* l_siginfo_t * */ + *n_args = 3; + break; + } + /* linux_rt_sigsuspend */ + case 130: { + struct linux_rt_sigsuspend_args *p = params; + uarg[0] = (intptr_t) p->newset; /* l_sigset_t * */ + iarg[1] = p->sigsetsize; /* l_size_t */ + *n_args = 2; + break; + } + /* linux_sigaltstack */ + case 131: { + struct linux_sigaltstack_args *p = params; + uarg[0] = (intptr_t) p->uss; /* l_stack_t * */ + uarg[1] = (intptr_t) p->uoss; /* l_stack_t * */ + *n_args = 2; + break; + } + /* linux_utime */ + case 132: { + struct linux_utime_args *p = params; + uarg[0] = (intptr_t) p->fname; /* char * */ + uarg[1] = (intptr_t) p->times; /* struct l_utimbuf * */ + *n_args = 2; + break; + } + /* linux_mknod */ + case 133: { + struct linux_mknod_args *p = params; + uarg[0] = (intptr_t) p->path; /* char * */ + iarg[1] = p->mode; /* l_int */ + iarg[2] = p->dev; /* l_dev_t */ + *n_args = 3; + break; + } + /* linux_personality */ + case 135: { + struct linux_personality_args *p = params; + iarg[0] = p->per; /* l_ulong */ + *n_args = 1; + break; + } + /* linux_ustat */ + case 136: { + struct linux_ustat_args *p = params; + iarg[0] = p->dev; /* l_dev_t */ + uarg[1] = (intptr_t) p->ubuf; /* struct l_ustat * */ + *n_args = 2; + break; + } + /* linux_statfs */ + case 137: { + struct linux_statfs_args *p = params; + uarg[0] = (intptr_t) p->path; /* char * */ + uarg[1] = (intptr_t) p->buf; /* struct l_statfs_buf * */ + *n_args = 2; + break; + } + /* linux_fstatfs */ + case 138: { + struct linux_fstatfs_args *p = params; + iarg[0] = p->fd; /* l_uint */ + uarg[1] = (intptr_t) p->buf; /* struct l_statfs_buf * */ + *n_args = 2; + break; + } + /* linux_sysfs */ + case 139: { + struct linux_sysfs_args *p = params; + iarg[0] = p->option; /* l_int */ + iarg[1] = p->arg1; /* l_ulong */ + iarg[2] = p->arg2; /* l_ulong */ + *n_args = 3; + break; + } + /* linux_getpriority */ + case 140: { + struct linux_getpriority_args *p = params; + iarg[0] = p->which; /* int */ + iarg[1] = p->who; /* int */ + *n_args = 2; + break; + } + /* setpriority */ + case 141: { + struct setpriority_args *p = params; + iarg[0] = p->which; /* int */ + iarg[1] = p->who; /* int */ + iarg[2] = p->prio; /* int */ + *n_args = 3; + break; + } + /* linux_sched_setparam */ + case 142: { + struct linux_sched_setparam_args *p = params; + iarg[0] = p->pid; /* l_pid_t */ + uarg[1] = (intptr_t) p->param; /* struct l_sched_param * */ + *n_args = 2; + break; + } + /* linux_sched_getparam */ + case 143: { + struct linux_sched_getparam_args *p = params; + iarg[0] = p->pid; /* l_pid_t */ + uarg[1] = (intptr_t) p->param; /* struct l_sched_param * */ + *n_args = 2; + break; + } + /* linux_sched_setscheduler */ + case 144: { + struct linux_sched_setscheduler_args *p = params; + iarg[0] = p->pid; /* l_pid_t */ + iarg[1] = p->policy; /* l_int */ + uarg[2] = (intptr_t) p->param; /* struct l_sched_param * */ + *n_args = 3; + break; + } + /* linux_sched_getscheduler */ + case 145: { + struct linux_sched_getscheduler_args *p = params; + iarg[0] = p->pid; /* l_pid_t */ + *n_args = 1; + break; + } + /* linux_sched_get_priority_max */ + case 146: { + struct linux_sched_get_priority_max_args *p = params; + iarg[0] = p->policy; /* l_int */ + *n_args = 1; + break; + } + /* linux_sched_get_priority_min */ + case 147: { + struct linux_sched_get_priority_min_args *p = params; + iarg[0] = p->policy; /* l_int */ + *n_args = 1; + break; + } + /* linux_sched_rr_get_interval */ + case 148: { + struct linux_sched_rr_get_interval_args *p = params; + iarg[0] = p->pid; /* l_pid_t */ + uarg[1] = (intptr_t) p->interval; /* struct l_timespec * */ + *n_args = 2; + break; + } + /* mlock */ + case 149: { + struct mlock_args *p = params; + uarg[0] = (intptr_t) p->addr; /* const void * */ + uarg[1] = p->len; /* size_t */ + *n_args = 2; + break; + } + /* munlock */ + case 150: { + struct munlock_args *p = params; + uarg[0] = (intptr_t) p->addr; /* const void * */ + uarg[1] = p->len; /* size_t */ + *n_args = 2; + break; + } + /* mlockall */ + case 151: { + struct mlockall_args *p = params; + iarg[0] = p->how; /* int */ + *n_args = 1; + break; + } + /* munlockall */ + case 152: { + *n_args = 0; + break; + } + /* linux_vhangup */ + case 153: { + *n_args = 0; + break; + } + /* linux_pivot_root */ + case 155: { + *n_args = 0; + break; + } + /* linux_sysctl */ + case 156: { + struct linux_sysctl_args *p = params; + uarg[0] = (intptr_t) p->args; /* struct l___sysctl_args * */ + *n_args = 1; + break; + } + /* linux_prctl */ + case 157: { + struct linux_prctl_args *p = params; + iarg[0] = p->option; /* l_int */ + iarg[1] = p->arg2; /* l_uintptr_t */ + iarg[2] = p->arg3; /* l_uintptr_t */ + iarg[3] = p->arg4; /* l_uintptr_t */ + iarg[4] = p->arg5; /* l_uintptr_t */ + *n_args = 5; + break; + } + /* linux_arch_prctl */ + case 158: { + struct linux_arch_prctl_args *p = params; + iarg[0] = p->code; /* l_int */ + iarg[1] = p->addr; /* l_ulong */ + *n_args = 2; + break; + } + /* linux_adjtimex */ + case 159: { + *n_args = 0; + break; + } + /* linux_setrlimit */ + case 160: { + struct linux_setrlimit_args *p = params; + iarg[0] = p->resource; /* l_uint */ + uarg[1] = (intptr_t) p->rlim; /* struct l_rlimit * */ + *n_args = 2; + break; + } + /* chroot */ + case 161: { + struct chroot_args *p = params; + uarg[0] = (intptr_t) p->path; /* char * */ + *n_args = 1; + break; + } + /* sync */ + case 162: { + *n_args = 0; + break; + } + /* acct */ + case 163: { + struct acct_args *p = params; + uarg[0] = (intptr_t) p->path; /* char * */ + *n_args = 1; + break; + } + /* settimeofday */ + case 164: { + struct settimeofday_args *p = params; + uarg[0] = (intptr_t) p->tp; /* struct l_timeval * */ + uarg[1] = (intptr_t) p->tzp; /* struct timezone * */ + *n_args = 2; + break; + } + /* linux_mount */ + case 165: { + struct linux_mount_args *p = params; + uarg[0] = (intptr_t) p->specialfile; /* char * */ + uarg[1] = (intptr_t) p->dir; /* char * */ + uarg[2] = (intptr_t) p->filesystemtype; /* char * */ + iarg[3] = p->rwflag; /* l_ulong */ + uarg[4] = (intptr_t) p->data; /* void * */ + *n_args = 5; + break; + } + /* linux_umount */ + case 166: { + struct linux_umount_args *p = params; + uarg[0] = (intptr_t) p->path; /* char * */ + iarg[1] = p->flags; /* l_int */ + *n_args = 2; + break; + } + /* swapon */ + case 167: { + struct swapon_args *p = params; + uarg[0] = (intptr_t) p->name; /* char * */ + *n_args = 1; + break; + } + /* linux_swapoff */ + case 168: { + *n_args = 0; + break; + } + /* linux_reboot */ + case 169: { + struct linux_reboot_args *p = params; + iarg[0] = p->magic1; /* l_int */ + iarg[1] = p->magic2; /* l_int */ + iarg[2] = p->cmd; /* l_uint */ + uarg[3] = (intptr_t) p->arg; /* void * */ + *n_args = 4; + break; + } + /* linux_sethostname */ + case 170: { + struct linux_sethostname_args *p = params; + uarg[0] = (intptr_t) p->hostname; /* char * */ + iarg[1] = p->len; /* l_uint */ + *n_args = 2; + break; + } + /* linux_setdomainname */ + case 171: { + struct linux_setdomainname_args *p = params; + uarg[0] = (intptr_t) p->name; /* char * */ + iarg[1] = p->len; /* l_int */ + *n_args = 2; + break; + } + /* linux_iopl */ + case 172: { + struct linux_iopl_args *p = params; + iarg[0] = p->level; /* l_uint */ + *n_args = 1; + break; + } + /* linux_create_module */ + case 174: { + *n_args = 0; + break; + } + /* linux_init_module */ + case 175: { + *n_args = 0; + break; + } + /* linux_delete_module */ + case 176: { + *n_args = 0; + break; + } + /* linux_get_kernel_syms */ + case 177: { + *n_args = 0; + break; + } + /* linux_query_module */ + case 178: { + *n_args = 0; + break; + } + /* linux_quotactl */ + case 179: { + *n_args = 0; + break; + } + /* linux_nfsservctl */ + case 180: { + *n_args = 0; + break; + } + /* linux_getpmsg */ + case 181: { + *n_args = 0; + break; + } + /* linux_putpmsg */ + case 182: { + *n_args = 0; + break; + } + /* linux_afs_syscall */ + case 183: { + *n_args = 0; + break; + } + /* linux_tuxcall */ + case 184: { + *n_args = 0; + break; + } + /* linux_security */ + case 185: { + *n_args = 0; + break; + } + /* linux_gettid */ + case 186: { + *n_args = 0; + break; + } + /* linux_setxattr */ + case 188: { + *n_args = 0; + break; + } + /* linux_lsetxattr */ + case 189: { + *n_args = 0; + break; + } + /* linux_fsetxattr */ + case 190: { + *n_args = 0; + break; + } + /* linux_getxattr */ + case 191: { + *n_args = 0; + break; + } + /* linux_lgetxattr */ + case 192: { + *n_args = 0; + break; + } + /* linux_fgetxattr */ + case 193: { + *n_args = 0; + break; + } + /* linux_listxattr */ + case 194: { + *n_args = 0; + break; + } + /* linux_llistxattr */ + case 195: { + *n_args = 0; + break; + } + /* linux_flistxattr */ + case 196: { + *n_args = 0; + break; + } + /* linux_removexattr */ + case 197: { + *n_args = 0; + break; + } + /* linux_lremovexattr */ + case 198: { + *n_args = 0; + break; + } + /* linux_fremovexattr */ + case 199: { + *n_args = 0; + break; + } + /* linux_tkill */ + case 200: { + struct linux_tkill_args *p = params; + iarg[0] = p->tid; /* int */ + iarg[1] = p->sig; /* int */ + *n_args = 2; + break; + } + /* linux_time */ + case 201: { + struct linux_time_args *p = params; + uarg[0] = (intptr_t) p->tm; /* l_time_t * */ + *n_args = 1; + break; + } + /* linux_sys_futex */ + case 202: { + struct linux_sys_futex_args *p = params; + uarg[0] = (intptr_t) p->uaddr; /* void * */ + iarg[1] = p->op; /* int */ + iarg[2] = p->val; /* int */ + uarg[3] = (intptr_t) p->timeout; /* struct l_timespec * */ + uarg[4] = (intptr_t) p->uaddr2; /* void * */ + iarg[5] = p->val3; /* int */ + *n_args = 6; + break; + } + /* linux_sched_setaffinity */ + case 203: { + struct linux_sched_setaffinity_args *p = params; + iarg[0] = p->pid; /* l_pid_t */ + iarg[1] = p->len; /* l_uint */ + uarg[2] = (intptr_t) p->user_mask_ptr; /* l_ulong * */ + *n_args = 3; + break; + } + /* linux_sched_getaffinity */ + case 204: { + struct linux_sched_getaffinity_args *p = params; + iarg[0] = p->pid; /* l_pid_t */ + iarg[1] = p->len; /* l_uint */ + uarg[2] = (intptr_t) p->user_mask_ptr; /* l_ulong * */ + *n_args = 3; + break; + } + /* linux_set_thread_area */ + case 205: { + *n_args = 0; + break; + } + /* linux_lookup_dcookie */ + case 212: { + *n_args = 0; + break; + } + /* linux_epoll_create */ + case 213: { + struct linux_epoll_create_args *p = params; + iarg[0] = p->size; /* l_int */ + *n_args = 1; + break; + } + /* linux_epoll_ctl_old */ + case 214: { + *n_args = 0; + break; + } + /* linux_epoll_wait_old */ + case 215: { + *n_args = 0; + break; + } + /* linux_remap_file_pages */ + case 216: { + *n_args = 0; + break; + } + /* linux_getdents64 */ + case 217: { + struct linux_getdents64_args *p = params; + iarg[0] = p->fd; /* l_uint */ + uarg[1] = (intptr_t) p->dirent; /* void * */ + iarg[2] = p->count; /* l_uint */ + *n_args = 3; + break; + } + /* linux_set_tid_address */ + case 218: { + struct linux_set_tid_address_args *p = params; + uarg[0] = (intptr_t) p->tidptr; /* int * */ + *n_args = 1; + break; + } + /* linux_semtimedop */ + case 220: { + *n_args = 0; + break; + } + /* linux_fadvise64 */ + case 221: { + struct linux_fadvise64_args *p = params; + iarg[0] = p->fd; /* int */ + iarg[1] = p->offset; /* l_loff_t */ + iarg[2] = p->len; /* l_size_t */ + iarg[3] = p->advice; /* int */ + *n_args = 4; + break; + } + /* linux_timer_create */ + case 222: { + struct linux_timer_create_args *p = params; + iarg[0] = p->clock_id; /* clockid_t */ + uarg[1] = (intptr_t) p->evp; /* struct sigevent * */ + uarg[2] = (intptr_t) p->timerid; /* l_timer_t * */ + *n_args = 3; + break; + } + /* linux_timer_settime */ + case 223: { + struct linux_timer_settime_args *p = params; + iarg[0] = p->timerid; /* l_timer_t */ + iarg[1] = p->flags; /* l_int */ + uarg[2] = (intptr_t) p->new; /* const struct itimerspec * */ + uarg[3] = (intptr_t) p->old; /* struct itimerspec * */ + *n_args = 4; + break; + } + /* linux_timer_gettime */ + case 224: { + struct linux_timer_gettime_args *p = params; + iarg[0] = p->timerid; /* l_timer_t */ + uarg[1] = (intptr_t) p->setting; /* struct itimerspec * */ + *n_args = 2; + break; + } + /* linux_timer_getoverrun */ + case 225: { + struct linux_timer_getoverrun_args *p = params; + iarg[0] = p->timerid; /* l_timer_t */ + *n_args = 1; + break; + } + /* linux_timer_delete */ + case 226: { + struct linux_timer_delete_args *p = params; + iarg[0] = p->timerid; /* l_timer_t */ + *n_args = 1; + break; + } + /* linux_clock_settime */ + case 227: { + struct linux_clock_settime_args *p = params; + iarg[0] = p->which; /* clockid_t */ + uarg[1] = (intptr_t) p->tp; /* struct l_timespec * */ + *n_args = 2; + break; + } + /* linux_clock_gettime */ + case 228: { + struct linux_clock_gettime_args *p = params; + iarg[0] = p->which; /* clockid_t */ + uarg[1] = (intptr_t) p->tp; /* struct l_timespec * */ + *n_args = 2; + break; + } + /* linux_clock_getres */ + case 229: { + struct linux_clock_getres_args *p = params; + iarg[0] = p->which; /* clockid_t */ + uarg[1] = (intptr_t) p->tp; /* struct l_timespec * */ + *n_args = 2; + break; + } + /* linux_clock_nanosleep */ + case 230: { + struct linux_clock_nanosleep_args *p = params; + iarg[0] = p->which; /* clockid_t */ + iarg[1] = p->flags; /* int */ + uarg[2] = (intptr_t) p->rqtp; /* struct l_timespec * */ + uarg[3] = (intptr_t) p->rmtp; /* struct l_timespec * */ + *n_args = 4; + break; + } + /* linux_exit_group */ + case 231: { + struct linux_exit_group_args *p = params; + iarg[0] = p->error_code; /* int */ + *n_args = 1; + break; + } + /* linux_epoll_wait */ + case 232: { + struct linux_epoll_wait_args *p = params; + iarg[0] = p->epfd; /* l_int */ + uarg[1] = (intptr_t) p->events; /* struct epoll_event * */ + iarg[2] = p->maxevents; /* l_int */ + iarg[3] = p->timeout; /* l_int */ + *n_args = 4; + break; + } + /* linux_epoll_ctl */ + case 233: { + struct linux_epoll_ctl_args *p = params; + iarg[0] = p->epfd; /* l_int */ + iarg[1] = p->op; /* l_int */ + iarg[2] = p->fd; /* l_int */ + uarg[3] = (intptr_t) p->event; /* struct epoll_event * */ + *n_args = 4; + break; + } + /* linux_tgkill */ + case 234: { + struct linux_tgkill_args *p = params; + iarg[0] = p->tgid; /* int */ + iarg[1] = p->pid; /* int */ + iarg[2] = p->sig; /* int */ + *n_args = 3; + break; + } + /* linux_utimes */ + case 235: { + struct linux_utimes_args *p = params; + uarg[0] = (intptr_t) p->fname; /* char * */ + uarg[1] = (intptr_t) p->tptr; /* struct l_timeval * */ + *n_args = 2; + break; + } + /* linux_mbind */ + case 237: { + *n_args = 0; + break; + } + /* linux_set_mempolicy */ + case 238: { + *n_args = 0; + break; + } + /* linux_get_mempolicy */ + case 239: { + *n_args = 0; + break; + } + /* linux_mq_open */ + case 240: { + *n_args = 0; + break; + } + /* linux_mq_unlink */ + case 241: { + *n_args = 0; + break; + } + /* linux_mq_timedsend */ + case 242: { + *n_args = 0; + break; + } + /* linux_mq_timedreceive */ + case 243: { + *n_args = 0; + break; + } + /* linux_mq_notify */ + case 244: { + *n_args = 0; + break; + } + /* linux_mq_getsetattr */ + case 245: { + *n_args = 0; + break; + } + /* linux_kexec_load */ + case 246: { + *n_args = 0; + break; + } + /* linux_waitid */ + case 247: { + struct linux_waitid_args *p = params; + iarg[0] = p->idtype; /* int */ + iarg[1] = p->id; /* l_pid_t */ + uarg[2] = (intptr_t) p->info; /* l_siginfo_t * */ + iarg[3] = p->options; /* int */ + uarg[4] = (intptr_t) p->rusage; /* struct rusage * */ + *n_args = 5; + break; + } + /* linux_add_key */ + case 248: { + *n_args = 0; + break; + } + /* linux_request_key */ + case 249: { + *n_args = 0; + break; + } + /* linux_keyctl */ + case 250: { + *n_args = 0; + break; + } + /* linux_ioprio_set */ + case 251: { + *n_args = 0; + break; + } + /* linux_ioprio_get */ + case 252: { + *n_args = 0; + break; + } + /* linux_inotify_init */ + case 253: { + *n_args = 0; + break; + } + /* linux_inotify_add_watch */ + case 254: { + *n_args = 0; + break; + } + /* linux_inotify_rm_watch */ + case 255: { + *n_args = 0; + break; + } + /* linux_migrate_pages */ + case 256: { + *n_args = 0; + break; + } + /* linux_openat */ + case 257: { + struct linux_openat_args *p = params; + iarg[0] = p->dfd; /* l_int */ + uarg[1] = (intptr_t) p->filename; /* const char * */ + iarg[2] = p->flags; /* l_int */ + iarg[3] = p->mode; /* l_int */ + *n_args = 4; + break; + } + /* linux_mkdirat */ + case 258: { + struct linux_mkdirat_args *p = params; + iarg[0] = p->dfd; /* l_int */ + uarg[1] = (intptr_t) p->pathname; /* const char * */ + iarg[2] = p->mode; /* l_int */ + *n_args = 3; + break; + } + /* linux_mknodat */ + case 259: { + struct linux_mknodat_args *p = params; + iarg[0] = p->dfd; /* l_int */ + uarg[1] = (intptr_t) p->filename; /* const char * */ + iarg[2] = p->mode; /* l_int */ + iarg[3] = p->dev; /* l_uint */ + *n_args = 4; + break; + } + /* linux_fchownat */ + case 260: { + struct linux_fchownat_args *p = params; + iarg[0] = p->dfd; /* l_int */ + uarg[1] = (intptr_t) p->filename; /* const char * */ + iarg[2] = p->uid; /* l_uid_t */ + iarg[3] = p->gid; /* l_gid_t */ + iarg[4] = p->flag; /* l_int */ + *n_args = 5; + break; + } + /* linux_futimesat */ + case 261: { + struct linux_futimesat_args *p = params; + iarg[0] = p->dfd; /* l_int */ + uarg[1] = (intptr_t) p->filename; /* char * */ + uarg[2] = (intptr_t) p->utimes; /* struct l_timeval * */ + *n_args = 3; + break; + } + /* linux_newfstatat */ + case 262: { + struct linux_newfstatat_args *p = params; + iarg[0] = p->dfd; /* l_int */ + uarg[1] = (intptr_t) p->pathname; /* char * */ + uarg[2] = (intptr_t) p->statbuf; /* struct l_stat64 * */ + iarg[3] = p->flag; /* l_int */ + *n_args = 4; + break; + } + /* linux_unlinkat */ + case 263: { + struct linux_unlinkat_args *p = params; + iarg[0] = p->dfd; /* l_int */ + uarg[1] = (intptr_t) p->pathname; /* const char * */ + iarg[2] = p->flag; /* l_int */ + *n_args = 3; + break; + } + /* linux_renameat */ + case 264: { + struct linux_renameat_args *p = params; + iarg[0] = p->olddfd; /* l_int */ + uarg[1] = (intptr_t) p->oldname; /* const char * */ + iarg[2] = p->newdfd; /* l_int */ + uarg[3] = (intptr_t) p->newname; /* const char * */ + *n_args = 4; + break; + } + /* linux_linkat */ + case 265: { + struct linux_linkat_args *p = params; + iarg[0] = p->olddfd; /* l_int */ + uarg[1] = (intptr_t) p->oldname; /* const char * */ + iarg[2] = p->newdfd; /* l_int */ + uarg[3] = (intptr_t) p->newname; /* const char * */ + iarg[4] = p->flag; /* l_int */ + *n_args = 5; + break; + } + /* linux_symlinkat */ + case 266: { + struct linux_symlinkat_args *p = params; + uarg[0] = (intptr_t) p->oldname; /* const char * */ + iarg[1] = p->newdfd; /* l_int */ + uarg[2] = (intptr_t) p->newname; /* const char * */ + *n_args = 3; + break; + } + /* linux_readlinkat */ + case 267: { + struct linux_readlinkat_args *p = params; + iarg[0] = p->dfd; /* l_int */ + uarg[1] = (intptr_t) p->path; /* const char * */ + uarg[2] = (intptr_t) p->buf; /* char * */ + iarg[3] = p->bufsiz; /* l_int */ + *n_args = 4; + break; + } + /* linux_fchmodat */ + case 268: { + struct linux_fchmodat_args *p = params; + iarg[0] = p->dfd; /* l_int */ + uarg[1] = (intptr_t) p->filename; /* const char * */ + iarg[2] = p->mode; /* l_mode_t */ + *n_args = 3; + break; + } + /* linux_faccessat */ + case 269: { + struct linux_faccessat_args *p = params; + iarg[0] = p->dfd; /* l_int */ + uarg[1] = (intptr_t) p->filename; /* const char * */ + iarg[2] = p->amode; /* l_int */ + *n_args = 3; + break; + } + /* linux_pselect6 */ + case 270: { + struct linux_pselect6_args *p = params; + iarg[0] = p->nfds; /* l_int */ + uarg[1] = (intptr_t) p->readfds; /* l_fd_set * */ + uarg[2] = (intptr_t) p->writefds; /* l_fd_set * */ + uarg[3] = (intptr_t) p->exceptfds; /* l_fd_set * */ + uarg[4] = (intptr_t) p->tsp; /* struct l_timespec * */ + uarg[5] = (intptr_t) p->sig; /* l_uintptr_t * */ + *n_args = 6; + break; + } + /* linux_ppoll */ + case 271: { + struct linux_ppoll_args *p = params; + uarg[0] = (intptr_t) p->fds; /* struct pollfd * */ + uarg[1] = p->nfds; /* uint32_t */ + uarg[2] = (intptr_t) p->tsp; /* struct l_timespec * */ + uarg[3] = (intptr_t) p->sset; /* l_sigset_t * */ + iarg[4] = p->ssize; /* l_size_t */ + *n_args = 5; + break; + } + /* linux_unshare */ + case 272: { + *n_args = 0; + break; + } + /* linux_set_robust_list */ + case 273: { + struct linux_set_robust_list_args *p = params; + uarg[0] = (intptr_t) p->head; /* struct linux_robust_list_head * */ + iarg[1] = p->len; /* l_size_t */ + *n_args = 2; + break; + } + /* linux_get_robust_list */ + case 274: { + struct linux_get_robust_list_args *p = params; + iarg[0] = p->pid; /* l_int */ + uarg[1] = (intptr_t) p->head; /* struct linux_robust_list_head * */ + uarg[2] = (intptr_t) p->len; /* l_size_t * */ + *n_args = 3; + break; + } + /* linux_splice */ + case 275: { + *n_args = 0; + break; + } + /* linux_tee */ + case 276: { + *n_args = 0; + break; + } + /* linux_sync_file_range */ + case 277: { + *n_args = 0; + break; + } + /* linux_vmsplice */ + case 278: { + *n_args = 0; + break; + } + /* linux_move_pages */ + case 279: { + *n_args = 0; + break; + } + /* linux_utimensat */ + case 280: { + struct linux_utimensat_args *p = params; + iarg[0] = p->dfd; /* l_int */ + uarg[1] = (intptr_t) p->pathname; /* const char * */ + uarg[2] = (intptr_t) p->times; /* const struct l_timespec * */ + iarg[3] = p->flags; /* l_int */ + *n_args = 4; + break; + } + /* linux_epoll_pwait */ + case 281: { + struct linux_epoll_pwait_args *p = params; + iarg[0] = p->epfd; /* l_int */ + uarg[1] = (intptr_t) p->events; /* struct epoll_event * */ + iarg[2] = p->maxevents; /* l_int */ + iarg[3] = p->timeout; /* l_int */ + uarg[4] = (intptr_t) p->mask; /* l_sigset_t * */ + *n_args = 5; + break; + } + /* linux_signalfd */ + case 282: { + *n_args = 0; + break; + } + /* linux_timerfd */ + case 283: { + *n_args = 0; + break; + } + /* linux_eventfd */ + case 284: { + struct linux_eventfd_args *p = params; + iarg[0] = p->initval; /* l_uint */ + *n_args = 1; + break; + } + /* linux_fallocate */ + case 285: { + struct linux_fallocate_args *p = params; + iarg[0] = p->fd; /* l_int */ + iarg[1] = p->mode; /* l_int */ + iarg[2] = p->offset; /* l_loff_t */ + iarg[3] = p->len; /* l_loff_t */ + *n_args = 4; + break; + } + /* linux_timerfd_settime */ + case 286: { + *n_args = 0; + break; + } + /* linux_timerfd_gettime */ + case 287: { + *n_args = 0; + break; + } + /* linux_accept4 */ + case 288: { + struct linux_accept4_args *p = params; + iarg[0] = p->s; /* l_int */ + iarg[1] = p->addr; /* l_uintptr_t */ + iarg[2] = p->namelen; /* l_uintptr_t */ + iarg[3] = p->flags; /* int */ + *n_args = 4; + break; + } + /* linux_signalfd4 */ + case 289: { + *n_args = 0; + break; + } + /* linux_eventfd2 */ + case 290: { + struct linux_eventfd2_args *p = params; + iarg[0] = p->initval; /* l_uint */ + iarg[1] = p->flags; /* l_int */ + *n_args = 2; + break; + } + /* linux_epoll_create1 */ + case 291: { + struct linux_epoll_create1_args *p = params; + iarg[0] = p->flags; /* l_int */ + *n_args = 1; + break; + } + /* linux_dup3 */ + case 292: { + struct linux_dup3_args *p = params; + iarg[0] = p->oldfd; /* l_int */ + iarg[1] = p->newfd; /* l_int */ + iarg[2] = p->flags; /* l_int */ + *n_args = 3; + break; + } + /* linux_pipe2 */ + case 293: { + struct linux_pipe2_args *p = params; + uarg[0] = (intptr_t) p->pipefds; /* l_int * */ + iarg[1] = p->flags; /* l_int */ + *n_args = 2; + break; + } + /* linux_inotify_init1 */ + case 294: { + *n_args = 0; + break; + } + /* linux_preadv */ + case 295: { + *n_args = 0; + break; + } + /* linux_pwritev */ + case 296: { + *n_args = 0; + break; + } + /* linux_rt_tsigqueueinfo */ + case 297: { + *n_args = 0; + break; + } + /* linux_perf_event_open */ + case 298: { + *n_args = 0; + break; + } + /* linux_recvmmsg */ + case 299: { + struct linux_recvmmsg_args *p = params; + iarg[0] = p->s; /* l_int */ + uarg[1] = (intptr_t) p->msg; /* struct l_mmsghdr * */ + iarg[2] = p->vlen; /* l_uint */ + iarg[3] = p->flags; /* l_uint */ + uarg[4] = (intptr_t) p->timeout; /* struct l_timespec * */ + *n_args = 5; + break; + } + /* linux_fanotify_init */ + case 300: { + *n_args = 0; + break; + } + /* linux_fanotify_mark */ + case 301: { + *n_args = 0; + break; + } + /* linux_prlimit64 */ + case 302: { + struct linux_prlimit64_args *p = params; + iarg[0] = p->pid; /* l_pid_t */ + iarg[1] = p->resource; /* l_uint */ + uarg[2] = (intptr_t) p->new; /* struct rlimit * */ + uarg[3] = (intptr_t) p->old; /* struct rlimit * */ + *n_args = 4; + break; + } + /* linux_name_to_handle_at */ + case 303: { + *n_args = 0; + break; + } + /* linux_open_by_handle_at */ + case 304: { + *n_args = 0; + break; + } + /* linux_clock_adjtime */ + case 305: { + *n_args = 0; + break; + } + /* linux_syncfs */ + case 306: { + struct linux_syncfs_args *p = params; + iarg[0] = p->fd; /* l_int */ + *n_args = 1; + break; + } + /* linux_sendmmsg */ + case 307: { + struct linux_sendmmsg_args *p = params; + iarg[0] = p->s; /* l_int */ + uarg[1] = (intptr_t) p->msg; /* struct l_mmsghdr * */ + iarg[2] = p->vlen; /* l_uint */ + iarg[3] = p->flags; /* l_uint */ + *n_args = 4; + break; + } + /* linux_setns */ + case 308: { + *n_args = 0; + break; + } + /* linux_process_vm_readv */ + case 309: { + *n_args = 0; + break; + } + /* linux_process_vm_writev */ + case 310: { + *n_args = 0; + break; + } + /* linux_kcmp */ + case 311: { + *n_args = 0; + break; + } + /* linux_finit_module */ + case 312: { + *n_args = 0; + break; + } + default: + *n_args = 0; + break; + }; +} +static void +systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) +{ + const char *p = NULL; + switch (sysnum) { +#define nosys linux_nosys + /* read */ + case 0: + switch(ndx) { + case 0: + p = "int"; + break; + case 1: + p = "char *"; + break; + case 2: + p = "u_int"; + break; + default: + break; + }; + break; + /* write */ + case 1: + switch(ndx) { + case 0: + p = "int"; + break; + case 1: + p = "char *"; + break; + case 2: + p = "u_int"; + break; + default: + break; + }; + break; + /* linux_open */ + case 2: + switch(ndx) { + case 0: + p = "char *"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "l_int"; + break; + default: + break; + }; + break; + /* close */ + case 3: + switch(ndx) { + case 0: + p = "int"; + break; + default: + break; + }; + break; + /* linux_newstat */ + case 4: + switch(ndx) { + case 0: + p = "char *"; + break; + case 1: + p = "struct l_newstat *"; + break; + default: + break; + }; + break; + /* linux_newfstat */ + case 5: + switch(ndx) { + case 0: + p = "l_uint"; + break; + case 1: + p = "struct l_newstat *"; + break; + default: + break; + }; + break; + /* linux_newlstat */ + case 6: + switch(ndx) { + case 0: + p = "char *"; + break; + case 1: + p = "struct l_newstat *"; + break; + default: + break; + }; + break; + /* poll */ + case 7: + switch(ndx) { + case 0: + p = "struct pollfd"; + break; + case 1: + p = "unsigned int"; + break; + case 2: + p = "int"; + break; + default: + break; + }; + break; + /* linux_lseek */ + case 8: + switch(ndx) { + case 0: + p = "l_uint"; + break; + case 1: + p = "l_off_t"; + break; + case 2: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_mmap2 */ + case 9: + switch(ndx) { + case 0: + p = "l_ulong"; + break; + case 1: + p = "l_ulong"; + break; + case 2: + p = "l_ulong"; + break; + case 3: + p = "l_ulong"; + break; + case 4: + p = "l_ulong"; + break; + case 5: + p = "l_ulong"; + break; + default: + break; + }; + break; + /* linux_mprotect */ + case 10: + switch(ndx) { + case 0: + p = "caddr_t"; + break; + case 1: + p = "int"; + break; + case 2: + p = "int"; + break; + default: + break; + }; + break; + /* munmap */ + case 11: + switch(ndx) { + case 0: + p = "caddr_t"; + break; + case 1: + p = "int"; + break; + default: + break; + }; + break; + /* linux_brk */ + case 12: + switch(ndx) { + case 0: + p = "l_ulong"; + break; + default: + break; + }; + break; + /* linux_rt_sigaction */ + case 13: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_sigaction_t *"; + break; + case 2: + p = "l_sigaction_t *"; + break; + case 3: + p = "l_size_t"; + break; + default: + break; + }; + break; + /* linux_rt_sigprocmask */ + case 14: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_sigset_t *"; + break; + case 2: + p = "l_sigset_t *"; + break; + case 3: + p = "l_size_t"; + break; + default: + break; + }; + break; + /* linux_rt_sigreturn */ + case 15: + switch(ndx) { + case 0: + p = "struct l_ucontext *"; + break; + default: + break; + }; + break; + /* linux_ioctl */ + case 16: + switch(ndx) { + case 0: + p = "l_uint"; + break; + case 1: + p = "l_uint"; + break; + case 2: + p = "uintptr_t"; + break; + default: + break; + }; + break; + /* linux_pread */ + case 17: + switch(ndx) { + case 0: + p = "l_uint"; + break; + case 1: + p = "char *"; + break; + case 2: + p = "l_size_t"; + break; + case 3: + p = "l_loff_t"; + break; + default: + break; + }; + break; + /* linux_pwrite */ + case 18: + switch(ndx) { + case 0: + p = "l_uint"; + break; + case 1: + p = "char *"; + break; + case 2: + p = "l_size_t"; + break; + case 3: + p = "l_loff_t"; + break; + default: + break; + }; + break; + /* readv */ + case 19: + switch(ndx) { + case 0: + p = "int"; + break; + case 1: + p = "struct iovec *"; + break; + case 2: + p = "u_int"; + break; + default: + break; + }; + break; + /* writev */ + case 20: + switch(ndx) { + case 0: + p = "int"; + break; + case 1: + p = "struct iovec *"; + break; + case 2: + p = "u_int"; + break; + default: + break; + }; + break; + /* linux_access */ + case 21: + switch(ndx) { + case 0: + p = "char *"; + break; + case 1: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_pipe */ + case 22: + switch(ndx) { + case 0: + p = "l_ulong *"; + break; + default: + break; + }; + break; + /* linux_select */ + case 23: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_fd_set *"; + break; + case 2: + p = "l_fd_set *"; + break; + case 3: + p = "l_fd_set *"; + break; + case 4: + p = "struct l_timeval *"; + break; + default: + break; + }; + break; + /* sched_yield */ + case 24: + break; + /* linux_mremap */ + case 25: + switch(ndx) { + case 0: + p = "l_ulong"; + break; + case 1: + p = "l_ulong"; + break; + case 2: + p = "l_ulong"; + break; + case 3: + p = "l_ulong"; + break; + case 4: + p = "l_ulong"; + break; + default: + break; + }; + break; + /* linux_msync */ + case 26: + switch(ndx) { + case 0: + p = "l_ulong"; + break; + case 1: + p = "l_size_t"; + break; + case 2: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_mincore */ + case 27: + switch(ndx) { + case 0: + p = "l_ulong"; + break; + case 1: + p = "l_size_t"; + break; + case 2: + p = "u_char *"; + break; + default: + break; + }; + break; + /* madvise */ + case 28: + switch(ndx) { + case 0: + p = "void *"; + break; + case 1: + p = "size_t"; + break; + case 2: + p = "int"; + break; + default: + break; + }; + break; + /* linux_shmget */ + case 29: + switch(ndx) { + case 0: + p = "l_key_t"; + break; + case 1: + p = "l_size_t"; + break; + case 2: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_shmat */ + case 30: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "char *"; + break; + case 2: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_shmctl */ + case 31: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "struct l_shmid_ds *"; + break; + default: + break; + }; + break; + /* dup */ + case 32: + switch(ndx) { + case 0: + p = "u_int"; + break; + default: + break; + }; + break; + /* dup2 */ + case 33: + switch(ndx) { + case 0: + p = "u_int"; + break; + case 1: + p = "u_int"; + break; + default: + break; + }; + break; + /* linux_pause */ + case 34: + break; + /* linux_nanosleep */ + case 35: + switch(ndx) { + case 0: + p = "const struct l_timespec *"; + break; + case 1: + p = "struct l_timespec *"; + break; + default: + break; + }; + break; + /* linux_getitimer */ + case 36: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "struct l_itimerval *"; + break; + default: + break; + }; + break; + /* linux_alarm */ + case 37: + switch(ndx) { + case 0: + p = "l_uint"; + break; + default: + break; + }; + break; + /* linux_setitimer */ + case 38: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "struct l_itimerval *"; + break; + case 2: + p = "struct l_itimerval *"; + break; + default: + break; + }; + break; + /* linux_getpid */ + case 39: + break; + /* linux_sendfile */ + case 40: + switch(ndx) { + case 0: + p = "int"; + break; + case 1: + p = "int"; + break; + case 2: + p = "l_long *"; + break; + case 3: + p = "l_size_t"; + break; + default: + break; + }; + break; + /* linux_socket */ + case 41: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_connect */ + case 42: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_uintptr_t"; + break; + case 2: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_accept */ + case 43: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_uintptr_t"; + break; + case 2: + p = "l_uintptr_t"; + break; + default: + break; + }; + break; + /* linux_sendto */ + case 44: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_uintptr_t"; + break; + case 2: + p = "l_int"; + break; + case 3: + p = "l_int"; + break; + case 4: + p = "l_uintptr_t"; + break; + case 5: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_recvfrom */ + case 45: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_uintptr_t"; + break; + case 2: + p = "l_size_t"; + break; + case 3: + p = "l_int"; + break; + case 4: + p = "l_uintptr_t"; + break; + case 5: + p = "l_uintptr_t"; + break; + default: + break; + }; + break; + /* linux_sendmsg */ + case 46: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_uintptr_t"; + break; + case 2: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_recvmsg */ + case 47: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_uintptr_t"; + break; + case 2: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_shutdown */ + case 48: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_bind */ + case 49: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_uintptr_t"; + break; + case 2: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_listen */ + case 50: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_getsockname */ + case 51: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_uintptr_t"; + break; + case 2: + p = "l_uintptr_t"; + break; + default: + break; + }; + break; + /* linux_getpeername */ + case 52: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_uintptr_t"; + break; + case 2: + p = "l_uintptr_t"; + break; + default: + break; + }; + break; + /* linux_socketpair */ + case 53: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "l_int"; + break; + case 3: + p = "l_uintptr_t"; + break; + default: + break; + }; + break; + /* linux_setsockopt */ + case 54: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "l_int"; + break; + case 3: + p = "l_uintptr_t"; + break; + case 4: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_getsockopt */ + case 55: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "l_int"; + break; + case 3: + p = "l_uintptr_t"; + break; + case 4: + p = "l_uintptr_t"; + break; + default: + break; + }; + break; + /* linux_clone */ + case 56: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "void *"; + break; + case 2: + p = "void *"; + break; + case 3: + p = "void *"; + break; + case 4: + p = "void *"; + break; + default: + break; + }; + break; + /* linux_fork */ + case 57: + break; + /* linux_vfork */ + case 58: + break; + /* linux_execve */ + case 59: + switch(ndx) { + case 0: + p = "char *"; + break; + case 1: + p = "char **"; + break; + case 2: + p = "char **"; + break; + default: + break; + }; + break; + /* linux_exit */ + case 60: + switch(ndx) { + case 0: + p = "int"; + break; + default: + break; + }; + break; + /* linux_wait4 */ + case 61: + switch(ndx) { + case 0: + p = "l_pid_t"; + break; + case 1: + p = "l_int *"; + break; + case 2: + p = "l_int"; + break; + case 3: + p = "struct rusage *"; + break; + default: + break; + }; + break; + /* linux_kill */ + case 62: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_newuname */ + case 63: + switch(ndx) { + case 0: + p = "struct l_new_utsname *"; + break; + default: + break; + }; + break; + /* linux_semget */ + case 64: + switch(ndx) { + case 0: + p = "l_key_t"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_semop */ + case 65: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "struct l_sembuf *"; + break; + case 2: + p = "l_uint"; + break; + default: + break; + }; + break; + /* linux_semctl */ + case 66: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "l_int"; + break; + case 3: + p = "union l_semun"; + break; + default: + break; + }; + break; + /* linux_shmdt */ + case 67: + switch(ndx) { + case 0: + p = "char *"; + break; + default: + break; + }; + break; + /* linux_msgget */ + case 68: + switch(ndx) { + case 0: + p = "l_key_t"; + break; + case 1: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_msgsnd */ + case 69: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "struct l_msgbuf *"; + break; + case 2: + p = "l_size_t"; + break; + case 3: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_msgrcv */ + case 70: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "struct l_msgbuf *"; + break; + case 2: + p = "l_size_t"; + break; + case 3: + p = "l_long"; + break; + case 4: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_msgctl */ + case 71: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "struct l_msqid_ds *"; + break; + default: + break; + }; + break; + /* linux_fcntl */ + case 72: + switch(ndx) { + case 0: + p = "l_uint"; + break; + case 1: + p = "l_uint"; + break; + case 2: + p = "l_ulong"; + break; + default: + break; + }; + break; + /* flock */ + case 73: + switch(ndx) { + case 0: + p = "int"; + break; + case 1: + p = "int"; + break; + default: + break; + }; + break; + /* fsync */ + case 74: + switch(ndx) { + case 0: + p = "int"; + break; + default: + break; + }; + break; + /* linux_fdatasync */ + case 75: + switch(ndx) { + case 0: + p = "l_uint"; + break; + default: + break; + }; + break; + /* linux_truncate */ + case 76: + switch(ndx) { + case 0: + p = "char *"; + break; + case 1: + p = "l_ulong"; + break; + default: + break; + }; + break; + /* linux_ftruncate */ + case 77: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_long"; + break; + default: + break; + }; + break; + /* linux_getdents */ + case 78: + switch(ndx) { + case 0: + p = "l_uint"; + break; + case 1: + p = "void *"; + break; + case 2: + p = "l_uint"; + break; + default: + break; + }; + break; + /* linux_getcwd */ + case 79: + switch(ndx) { + case 0: + p = "char *"; + break; + case 1: + p = "l_ulong"; + break; + default: + break; + }; + break; + /* linux_chdir */ + case 80: + switch(ndx) { + case 0: + p = "char *"; + break; + default: + break; + }; + break; + /* fchdir */ + case 81: + switch(ndx) { + case 0: + p = "int"; + break; + default: + break; + }; + break; + /* linux_rename */ + case 82: + switch(ndx) { + case 0: + p = "char *"; + break; + case 1: + p = "char *"; + break; + default: + break; + }; + break; + /* linux_mkdir */ + case 83: + switch(ndx) { + case 0: + p = "char *"; + break; + case 1: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_rmdir */ + case 84: + switch(ndx) { + case 0: + p = "char *"; + break; + default: + break; + }; + break; + /* linux_creat */ + case 85: + switch(ndx) { + case 0: + p = "char *"; + break; + case 1: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_link */ + case 86: + switch(ndx) { + case 0: + p = "char *"; + break; + case 1: + p = "char *"; + break; + default: + break; + }; + break; + /* linux_unlink */ + case 87: + switch(ndx) { + case 0: + p = "char *"; + break; + default: + break; + }; + break; + /* linux_symlink */ + case 88: + switch(ndx) { + case 0: + p = "char *"; + break; + case 1: + p = "char *"; + break; + default: + break; + }; + break; + /* linux_readlink */ + case 89: + switch(ndx) { + case 0: + p = "char *"; + break; + case 1: + p = "char *"; + break; + case 2: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_chmod */ + case 90: + switch(ndx) { + case 0: + p = "char *"; + break; + case 1: + p = "l_mode_t"; + break; + default: + break; + }; + break; + /* fchmod */ + case 91: + switch(ndx) { + case 0: + p = "int"; + break; + case 1: + p = "int"; + break; + default: + break; + }; + break; + /* linux_chown */ + case 92: + switch(ndx) { + case 0: + p = "char *"; + break; + case 1: + p = "l_uid_t"; + break; + case 2: + p = "l_gid_t"; + break; + default: + break; + }; + break; + /* fchown */ + case 93: + switch(ndx) { + case 0: + p = "int"; + break; + case 1: + p = "int"; + break; + case 2: + p = "int"; + break; + default: + break; + }; + break; + /* linux_lchown */ + case 94: + switch(ndx) { + case 0: + p = "char *"; + break; + case 1: + p = "l_uid_t"; + break; + case 2: + p = "l_gid_t"; + break; + default: + break; + }; + break; + /* umask */ + case 95: + switch(ndx) { + case 0: + p = "int"; + break; + default: + break; + }; + break; + /* gettimeofday */ + case 96: + switch(ndx) { + case 0: + p = "struct l_timeval *"; + break; + case 1: + p = "struct timezone *"; + break; + default: + break; + }; + break; + /* linux_getrlimit */ + case 97: + switch(ndx) { + case 0: + p = "l_uint"; + break; + case 1: + p = "struct l_rlimit *"; + break; + default: + break; + }; + break; + /* getrusage */ + case 98: + switch(ndx) { + case 0: + p = "int"; + break; + case 1: + p = "struct rusage *"; + break; + default: + break; + }; + break; + /* linux_sysinfo */ + case 99: + switch(ndx) { + case 0: + p = "struct l_sysinfo *"; + break; + default: + break; + }; + break; + /* linux_times */ + case 100: + switch(ndx) { + case 0: + p = "struct l_times_argv *"; + break; + default: + break; + }; + break; + /* linux_ptrace */ + case 101: + switch(ndx) { + case 0: + p = "l_long"; + break; + case 1: + p = "l_long"; + break; + case 2: + p = "l_long"; + break; + case 3: + p = "l_long"; + break; + default: + break; + }; + break; + /* linux_getuid */ + case 102: + break; + /* linux_syslog */ + case 103: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "char *"; + break; + case 2: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_getgid */ + case 104: + break; + /* setuid */ + case 105: + switch(ndx) { + case 0: + p = "uid_t"; + break; + default: + break; + }; + break; + /* setgid */ + case 106: + switch(ndx) { + case 0: + p = "gid_t"; + break; + default: + break; + }; + break; + /* geteuid */ + case 107: + break; + /* getegid */ + case 108: + break; + /* setpgid */ + case 109: + switch(ndx) { + case 0: + p = "int"; + break; + case 1: + p = "int"; + break; + default: + break; + }; + break; + /* linux_getppid */ + case 110: + break; + /* getpgrp */ + case 111: + break; + /* setsid */ + case 112: + break; + /* setreuid */ + case 113: + switch(ndx) { + case 0: + p = "uid_t"; + break; + case 1: + p = "uid_t"; + break; + default: + break; + }; + break; + /* setregid */ + case 114: + switch(ndx) { + case 0: + p = "gid_t"; + break; + case 1: + p = "gid_t"; + break; + default: + break; + }; + break; + /* linux_getgroups */ + case 115: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_gid_t *"; + break; + default: + break; + }; + break; + /* linux_setgroups */ + case 116: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_gid_t *"; + break; + default: + break; + }; + break; + /* setresuid */ + case 117: + switch(ndx) { + case 0: + p = "uid_t"; + break; + case 1: + p = "uid_t"; + break; + case 2: + p = "uid_t"; + break; + default: + break; + }; + break; + /* getresuid */ + case 118: + switch(ndx) { + case 0: + p = "uid_t *"; + break; + case 1: + p = "uid_t *"; + break; + case 2: + p = "uid_t *"; + break; + default: + break; + }; + break; + /* setresgid */ + case 119: + switch(ndx) { + case 0: + p = "gid_t"; + break; + case 1: + p = "gid_t"; + break; + case 2: + p = "gid_t"; + break; + default: + break; + }; + break; + /* getresgid */ + case 120: + switch(ndx) { + case 0: + p = "gid_t *"; + break; + case 1: + p = "gid_t *"; + break; + case 2: + p = "gid_t *"; + break; + default: + break; + }; + break; + /* getpgid */ + case 121: + switch(ndx) { + case 0: + p = "int"; + break; + default: + break; + }; + break; + /* linux_setfsuid */ + case 122: + switch(ndx) { + case 0: + p = "l_uid_t"; + break; + default: + break; + }; + break; + /* linux_setfsgid */ + case 123: + switch(ndx) { + case 0: + p = "l_gid_t"; + break; + default: + break; + }; + break; + /* linux_getsid */ + case 124: + switch(ndx) { + case 0: + p = "l_pid_t"; + break; + default: + break; + }; + break; + /* linux_capget */ + case 125: + switch(ndx) { + case 0: + p = "struct l_user_cap_header *"; + break; + case 1: + p = "struct l_user_cap_data *"; + break; + default: + break; + }; + break; + /* linux_capset */ + case 126: + switch(ndx) { + case 0: + p = "struct l_user_cap_header *"; + break; + case 1: + p = "struct l_user_cap_data *"; + break; + default: + break; + }; + break; + /* linux_rt_sigpending */ + case 127: + switch(ndx) { + case 0: + p = "l_sigset_t *"; + break; + case 1: + p = "l_size_t"; + break; + default: + break; + }; + break; + /* linux_rt_sigtimedwait */ + case 128: + switch(ndx) { + case 0: + p = "l_sigset_t *"; + break; + case 1: + p = "l_siginfo_t *"; + break; + case 2: + p = "struct l_timeval *"; + break; + case 3: + p = "l_size_t"; + break; + default: + break; + }; + break; + /* linux_rt_sigqueueinfo */ + case 129: + switch(ndx) { + case 0: + p = "l_pid_t"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "l_siginfo_t *"; + break; + default: + break; + }; + break; + /* linux_rt_sigsuspend */ + case 130: + switch(ndx) { + case 0: + p = "l_sigset_t *"; + break; + case 1: + p = "l_size_t"; + break; + default: + break; + }; + break; + /* linux_sigaltstack */ + case 131: + switch(ndx) { + case 0: + p = "l_stack_t *"; + break; + case 1: + p = "l_stack_t *"; + break; + default: + break; + }; + break; + /* linux_utime */ + case 132: + switch(ndx) { + case 0: + p = "char *"; + break; + case 1: + p = "struct l_utimbuf *"; + break; + default: + break; + }; + break; + /* linux_mknod */ + case 133: + switch(ndx) { + case 0: + p = "char *"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "l_dev_t"; + break; + default: + break; + }; + break; + /* linux_personality */ + case 135: + switch(ndx) { + case 0: + p = "l_ulong"; + break; + default: + break; + }; + break; + /* linux_ustat */ + case 136: + switch(ndx) { + case 0: + p = "l_dev_t"; + break; + case 1: + p = "struct l_ustat *"; + break; + default: + break; + }; + break; + /* linux_statfs */ + case 137: + switch(ndx) { + case 0: + p = "char *"; + break; + case 1: + p = "struct l_statfs_buf *"; + break; + default: + break; + }; + break; + /* linux_fstatfs */ + case 138: + switch(ndx) { + case 0: + p = "l_uint"; + break; + case 1: + p = "struct l_statfs_buf *"; + break; + default: + break; + }; + break; + /* linux_sysfs */ + case 139: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_ulong"; + break; + case 2: + p = "l_ulong"; + break; + default: + break; + }; + break; + /* linux_getpriority */ + case 140: + switch(ndx) { + case 0: + p = "int"; + break; + case 1: + p = "int"; + break; + default: + break; + }; + break; + /* setpriority */ + case 141: + switch(ndx) { + case 0: + p = "int"; + break; + case 1: + p = "int"; + break; + case 2: + p = "int"; + break; + default: + break; + }; + break; + /* linux_sched_setparam */ + case 142: + switch(ndx) { + case 0: + p = "l_pid_t"; + break; + case 1: + p = "struct l_sched_param *"; + break; + default: + break; + }; + break; + /* linux_sched_getparam */ + case 143: + switch(ndx) { + case 0: + p = "l_pid_t"; + break; + case 1: + p = "struct l_sched_param *"; + break; + default: + break; + }; + break; + /* linux_sched_setscheduler */ + case 144: + switch(ndx) { + case 0: + p = "l_pid_t"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "struct l_sched_param *"; + break; + default: + break; + }; + break; + /* linux_sched_getscheduler */ + case 145: + switch(ndx) { + case 0: + p = "l_pid_t"; + break; + default: + break; + }; + break; + /* linux_sched_get_priority_max */ + case 146: + switch(ndx) { + case 0: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_sched_get_priority_min */ + case 147: + switch(ndx) { + case 0: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_sched_rr_get_interval */ + case 148: + switch(ndx) { + case 0: + p = "l_pid_t"; + break; + case 1: + p = "struct l_timespec *"; + break; + default: + break; + }; + break; + /* mlock */ + case 149: + switch(ndx) { + case 0: + p = "const void *"; + break; + case 1: + p = "size_t"; + break; + default: + break; + }; + break; + /* munlock */ + case 150: + switch(ndx) { + case 0: + p = "const void *"; + break; + case 1: + p = "size_t"; + break; + default: + break; + }; + break; + /* mlockall */ + case 151: + switch(ndx) { + case 0: + p = "int"; + break; + default: + break; + }; + break; + /* munlockall */ + case 152: + break; + /* linux_vhangup */ + case 153: + break; + /* linux_pivot_root */ + case 155: + break; + /* linux_sysctl */ + case 156: + switch(ndx) { + case 0: + p = "struct l___sysctl_args *"; + break; + default: + break; + }; + break; + /* linux_prctl */ + case 157: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_uintptr_t"; + break; + case 2: + p = "l_uintptr_t"; + break; + case 3: + p = "l_uintptr_t"; + break; + case 4: + p = "l_uintptr_t"; + break; + default: + break; + }; + break; + /* linux_arch_prctl */ + case 158: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_ulong"; + break; + default: + break; + }; + break; + /* linux_adjtimex */ + case 159: + break; + /* linux_setrlimit */ + case 160: + switch(ndx) { + case 0: + p = "l_uint"; + break; + case 1: + p = "struct l_rlimit *"; + break; + default: + break; + }; + break; + /* chroot */ + case 161: + switch(ndx) { + case 0: + p = "char *"; + break; + default: + break; + }; + break; + /* sync */ + case 162: + break; + /* acct */ + case 163: + switch(ndx) { + case 0: + p = "char *"; + break; + default: + break; + }; + break; + /* settimeofday */ + case 164: + switch(ndx) { + case 0: + p = "struct l_timeval *"; + break; + case 1: + p = "struct timezone *"; + break; + default: + break; + }; + break; + /* linux_mount */ + case 165: + switch(ndx) { + case 0: + p = "char *"; + break; + case 1: + p = "char *"; + break; + case 2: + p = "char *"; + break; + case 3: + p = "l_ulong"; + break; + case 4: + p = "void *"; + break; + default: + break; + }; + break; + /* linux_umount */ + case 166: + switch(ndx) { + case 0: + p = "char *"; + break; + case 1: + p = "l_int"; + break; + default: + break; + }; + break; + /* swapon */ + case 167: + switch(ndx) { + case 0: + p = "char *"; + break; + default: + break; + }; + break; + /* linux_swapoff */ + case 168: + break; + /* linux_reboot */ + case 169: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "l_uint"; + break; + case 3: + p = "void *"; + break; + default: + break; + }; + break; + /* linux_sethostname */ + case 170: + switch(ndx) { + case 0: + p = "char *"; + break; + case 1: + p = "l_uint"; + break; + default: + break; + }; + break; + /* linux_setdomainname */ + case 171: + switch(ndx) { + case 0: + p = "char *"; + break; + case 1: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_iopl */ + case 172: + switch(ndx) { + case 0: + p = "l_uint"; + break; + default: + break; + }; + break; + /* linux_create_module */ + case 174: + break; + /* linux_init_module */ + case 175: + break; + /* linux_delete_module */ + case 176: + break; + /* linux_get_kernel_syms */ + case 177: + break; + /* linux_query_module */ + case 178: + break; + /* linux_quotactl */ + case 179: + break; + /* linux_nfsservctl */ + case 180: + break; + /* linux_getpmsg */ + case 181: + break; + /* linux_putpmsg */ + case 182: + break; + /* linux_afs_syscall */ + case 183: + break; + /* linux_tuxcall */ + case 184: + break; + /* linux_security */ + case 185: + break; + /* linux_gettid */ + case 186: + break; + /* linux_setxattr */ + case 188: + break; + /* linux_lsetxattr */ + case 189: + break; + /* linux_fsetxattr */ + case 190: + break; + /* linux_getxattr */ + case 191: + break; + /* linux_lgetxattr */ + case 192: + break; + /* linux_fgetxattr */ + case 193: + break; + /* linux_listxattr */ + case 194: + break; + /* linux_llistxattr */ + case 195: + break; + /* linux_flistxattr */ + case 196: + break; + /* linux_removexattr */ + case 197: + break; + /* linux_lremovexattr */ + case 198: + break; + /* linux_fremovexattr */ + case 199: + break; + /* linux_tkill */ + case 200: + switch(ndx) { + case 0: + p = "int"; + break; + case 1: + p = "int"; + break; + default: + break; + }; + break; + /* linux_time */ + case 201: + switch(ndx) { + case 0: + p = "l_time_t *"; + break; + default: + break; + }; + break; + /* linux_sys_futex */ + case 202: + switch(ndx) { + case 0: + p = "void *"; + break; + case 1: + p = "int"; + break; + case 2: + p = "int"; + break; + case 3: + p = "struct l_timespec *"; + break; + case 4: + p = "void *"; + break; + case 5: + p = "int"; + break; + default: + break; + }; + break; + /* linux_sched_setaffinity */ + case 203: + switch(ndx) { + case 0: + p = "l_pid_t"; + break; + case 1: + p = "l_uint"; + break; + case 2: + p = "l_ulong *"; + break; + default: + break; + }; + break; + /* linux_sched_getaffinity */ + case 204: + switch(ndx) { + case 0: + p = "l_pid_t"; + break; + case 1: + p = "l_uint"; + break; + case 2: + p = "l_ulong *"; + break; + default: + break; + }; + break; + /* linux_set_thread_area */ + case 205: + break; + /* linux_lookup_dcookie */ + case 212: + break; + /* linux_epoll_create */ + case 213: + switch(ndx) { + case 0: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_epoll_ctl_old */ + case 214: + break; + /* linux_epoll_wait_old */ + case 215: + break; + /* linux_remap_file_pages */ + case 216: + break; + /* linux_getdents64 */ + case 217: + switch(ndx) { + case 0: + p = "l_uint"; + break; + case 1: + p = "void *"; + break; + case 2: + p = "l_uint"; + break; + default: + break; + }; + break; + /* linux_set_tid_address */ + case 218: + switch(ndx) { + case 0: + p = "int *"; + break; + default: + break; + }; + break; + /* linux_semtimedop */ + case 220: + break; + /* linux_fadvise64 */ + case 221: + switch(ndx) { + case 0: + p = "int"; + break; + case 1: + p = "l_loff_t"; + break; + case 2: + p = "l_size_t"; + break; + case 3: + p = "int"; + break; + default: + break; + }; + break; + /* linux_timer_create */ + case 222: + switch(ndx) { + case 0: + p = "clockid_t"; + break; + case 1: + p = "struct sigevent *"; + break; + case 2: + p = "l_timer_t *"; + break; + default: + break; + }; + break; + /* linux_timer_settime */ + case 223: + switch(ndx) { + case 0: + p = "l_timer_t"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "const struct itimerspec *"; + break; + case 3: + p = "struct itimerspec *"; + break; + default: + break; + }; + break; + /* linux_timer_gettime */ + case 224: + switch(ndx) { + case 0: + p = "l_timer_t"; + break; + case 1: + p = "struct itimerspec *"; + break; + default: + break; + }; + break; + /* linux_timer_getoverrun */ + case 225: + switch(ndx) { + case 0: + p = "l_timer_t"; + break; + default: + break; + }; + break; + /* linux_timer_delete */ + case 226: + switch(ndx) { + case 0: + p = "l_timer_t"; + break; + default: + break; + }; + break; + /* linux_clock_settime */ + case 227: + switch(ndx) { + case 0: + p = "clockid_t"; + break; + case 1: + p = "struct l_timespec *"; + break; + default: + break; + }; + break; + /* linux_clock_gettime */ + case 228: + switch(ndx) { + case 0: + p = "clockid_t"; + break; + case 1: + p = "struct l_timespec *"; + break; + default: + break; + }; + break; + /* linux_clock_getres */ + case 229: + switch(ndx) { + case 0: + p = "clockid_t"; + break; + case 1: + p = "struct l_timespec *"; + break; + default: + break; + }; + break; + /* linux_clock_nanosleep */ + case 230: + switch(ndx) { + case 0: + p = "clockid_t"; + break; + case 1: + p = "int"; + break; + case 2: + p = "struct l_timespec *"; + break; + case 3: + p = "struct l_timespec *"; + break; + default: + break; + }; + break; + /* linux_exit_group */ + case 231: + switch(ndx) { + case 0: + p = "int"; + break; + default: + break; + }; + break; + /* linux_epoll_wait */ + case 232: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "struct epoll_event *"; + break; + case 2: + p = "l_int"; + break; + case 3: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_epoll_ctl */ + case 233: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "l_int"; + break; + case 3: + p = "struct epoll_event *"; + break; + default: + break; + }; + break; + /* linux_tgkill */ + case 234: + switch(ndx) { + case 0: + p = "int"; + break; + case 1: + p = "int"; + break; + case 2: + p = "int"; + break; + default: + break; + }; + break; + /* linux_utimes */ + case 235: + switch(ndx) { + case 0: + p = "char *"; + break; + case 1: + p = "struct l_timeval *"; + break; + default: + break; + }; + break; + /* linux_mbind */ + case 237: + break; + /* linux_set_mempolicy */ + case 238: + break; + /* linux_get_mempolicy */ + case 239: + break; + /* linux_mq_open */ + case 240: + break; + /* linux_mq_unlink */ + case 241: + break; + /* linux_mq_timedsend */ + case 242: + break; + /* linux_mq_timedreceive */ + case 243: + break; + /* linux_mq_notify */ + case 244: + break; + /* linux_mq_getsetattr */ + case 245: + break; + /* linux_kexec_load */ + case 246: + break; + /* linux_waitid */ + case 247: + switch(ndx) { + case 0: + p = "int"; + break; + case 1: + p = "l_pid_t"; + break; + case 2: + p = "l_siginfo_t *"; + break; + case 3: + p = "int"; + break; + case 4: + p = "struct rusage *"; + break; + default: + break; + }; + break; + /* linux_add_key */ + case 248: + break; + /* linux_request_key */ + case 249: + break; + /* linux_keyctl */ + case 250: + break; + /* linux_ioprio_set */ + case 251: + break; + /* linux_ioprio_get */ + case 252: + break; + /* linux_inotify_init */ + case 253: + break; + /* linux_inotify_add_watch */ + case 254: + break; + /* linux_inotify_rm_watch */ + case 255: + break; + /* linux_migrate_pages */ + case 256: + break; + /* linux_openat */ + case 257: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "const char *"; + break; + case 2: + p = "l_int"; + break; + case 3: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_mkdirat */ + case 258: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "const char *"; + break; + case 2: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_mknodat */ + case 259: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "const char *"; + break; + case 2: + p = "l_int"; + break; + case 3: + p = "l_uint"; + break; + default: + break; + }; + break; + /* linux_fchownat */ + case 260: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "const char *"; + break; + case 2: + p = "l_uid_t"; + break; + case 3: + p = "l_gid_t"; + break; + case 4: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_futimesat */ + case 261: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "char *"; + break; + case 2: + p = "struct l_timeval *"; + break; + default: + break; + }; + break; + /* linux_newfstatat */ + case 262: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "char *"; + break; + case 2: + p = "struct l_stat64 *"; + break; + case 3: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_unlinkat */ + case 263: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "const char *"; + break; + case 2: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_renameat */ + case 264: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "const char *"; + break; + case 2: + p = "l_int"; + break; + case 3: + p = "const char *"; + break; + default: + break; + }; + break; + /* linux_linkat */ + case 265: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "const char *"; + break; + case 2: + p = "l_int"; + break; + case 3: + p = "const char *"; + break; + case 4: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_symlinkat */ + case 266: + switch(ndx) { + case 0: + p = "const char *"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "const char *"; + break; + default: + break; + }; + break; + /* linux_readlinkat */ + case 267: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "const char *"; + break; + case 2: + p = "char *"; + break; + case 3: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_fchmodat */ + case 268: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "const char *"; + break; + case 2: + p = "l_mode_t"; + break; + default: + break; + }; + break; + /* linux_faccessat */ + case 269: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "const char *"; + break; + case 2: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_pselect6 */ + case 270: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_fd_set *"; + break; + case 2: + p = "l_fd_set *"; + break; + case 3: + p = "l_fd_set *"; + break; + case 4: + p = "struct l_timespec *"; + break; + case 5: + p = "l_uintptr_t *"; + break; + default: + break; + }; + break; + /* linux_ppoll */ + case 271: + switch(ndx) { + case 0: + p = "struct pollfd *"; + break; + case 1: + p = "uint32_t"; + break; + case 2: + p = "struct l_timespec *"; + break; + case 3: + p = "l_sigset_t *"; + break; + case 4: + p = "l_size_t"; + break; + default: + break; + }; + break; + /* linux_unshare */ + case 272: + break; + /* linux_set_robust_list */ + case 273: + switch(ndx) { + case 0: + p = "struct linux_robust_list_head *"; + break; + case 1: + p = "l_size_t"; + break; + default: + break; + }; + break; + /* linux_get_robust_list */ + case 274: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "struct linux_robust_list_head *"; + break; + case 2: + p = "l_size_t *"; + break; + default: + break; + }; + break; + /* linux_splice */ + case 275: + break; + /* linux_tee */ + case 276: + break; + /* linux_sync_file_range */ + case 277: + break; + /* linux_vmsplice */ + case 278: + break; + /* linux_move_pages */ + case 279: + break; + /* linux_utimensat */ + case 280: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "const char *"; + break; + case 2: + p = "const struct l_timespec *"; + break; + case 3: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_epoll_pwait */ + case 281: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "struct epoll_event *"; + break; + case 2: + p = "l_int"; + break; + case 3: + p = "l_int"; + break; + case 4: + p = "l_sigset_t *"; + break; + default: + break; + }; + break; + /* linux_signalfd */ + case 282: + break; + /* linux_timerfd */ + case 283: + break; + /* linux_eventfd */ + case 284: + switch(ndx) { + case 0: + p = "l_uint"; + break; + default: + break; + }; + break; + /* linux_fallocate */ + case 285: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "l_loff_t"; + break; + case 3: + p = "l_loff_t"; + break; + default: + break; + }; + break; + /* linux_timerfd_settime */ + case 286: + break; + /* linux_timerfd_gettime */ + case 287: + break; + /* linux_accept4 */ + case 288: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_uintptr_t"; + break; + case 2: + p = "l_uintptr_t"; + break; + case 3: + p = "int"; + break; + default: + break; + }; + break; + /* linux_signalfd4 */ + case 289: + break; + /* linux_eventfd2 */ + case 290: + switch(ndx) { + case 0: + p = "l_uint"; + break; + case 1: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_epoll_create1 */ + case 291: + switch(ndx) { + case 0: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_dup3 */ + case 292: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_pipe2 */ + case 293: + switch(ndx) { + case 0: + p = "l_int *"; + break; + case 1: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_inotify_init1 */ + case 294: + break; + /* linux_preadv */ + case 295: + break; + /* linux_pwritev */ + case 296: + break; + /* linux_rt_tsigqueueinfo */ + case 297: + break; + /* linux_perf_event_open */ + case 298: + break; + /* linux_recvmmsg */ + case 299: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "struct l_mmsghdr *"; + break; + case 2: + p = "l_uint"; + break; + case 3: + p = "l_uint"; + break; + case 4: + p = "struct l_timespec *"; + break; + default: + break; + }; + break; + /* linux_fanotify_init */ + case 300: + break; + /* linux_fanotify_mark */ + case 301: + break; + /* linux_prlimit64 */ + case 302: + switch(ndx) { + case 0: + p = "l_pid_t"; + break; + case 1: + p = "l_uint"; + break; + case 2: + p = "struct rlimit *"; + break; + case 3: + p = "struct rlimit *"; + break; + default: + break; + }; + break; + /* linux_name_to_handle_at */ + case 303: + break; + /* linux_open_by_handle_at */ + case 304: + break; + /* linux_clock_adjtime */ + case 305: + break; + /* linux_syncfs */ + case 306: + switch(ndx) { + case 0: + p = "l_int"; + break; + default: + break; + }; + break; + /* linux_sendmmsg */ + case 307: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "struct l_mmsghdr *"; + break; + case 2: + p = "l_uint"; + break; + case 3: + p = "l_uint"; + break; + default: + break; + }; + break; + /* linux_setns */ + case 308: + break; + /* linux_process_vm_readv */ + case 309: + break; + /* linux_process_vm_writev */ + case 310: + break; + /* linux_kcmp */ + case 311: + break; + /* linux_finit_module */ + case 312: + break; + default: + break; + }; + if (p != NULL) + strlcpy(desc, p, descsz); +} +static void +systrace_return_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) +{ + const char *p = NULL; + switch (sysnum) { +#define nosys linux_nosys + /* read */ + case 0: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* write */ + case 1: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_open */ + case 2: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* close */ + case 3: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_newstat */ + case 4: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_newfstat */ + case 5: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_newlstat */ + case 6: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* poll */ + case 7: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_lseek */ + case 8: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_mmap2 */ + case 9: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_mprotect */ + case 10: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* munmap */ + case 11: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_brk */ + case 12: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_rt_sigaction */ + case 13: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_rt_sigprocmask */ + case 14: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_rt_sigreturn */ + case 15: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_ioctl */ + case 16: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_pread */ + case 17: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_pwrite */ + case 18: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* readv */ + case 19: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* writev */ + case 20: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_access */ + case 21: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_pipe */ + case 22: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_select */ + case 23: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* sched_yield */ + case 24: + /* linux_mremap */ + case 25: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_msync */ + case 26: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_mincore */ + case 27: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* madvise */ + case 28: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_shmget */ + case 29: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_shmat */ + case 30: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_shmctl */ + case 31: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* dup */ + case 32: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* dup2 */ + case 33: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_pause */ + case 34: + /* linux_nanosleep */ + case 35: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_getitimer */ + case 36: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_alarm */ + case 37: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_setitimer */ + case 38: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_getpid */ + case 39: + /* linux_sendfile */ + case 40: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_socket */ + case 41: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_connect */ + case 42: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_accept */ + case 43: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_sendto */ + case 44: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_recvfrom */ + case 45: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_sendmsg */ + case 46: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_recvmsg */ + case 47: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_shutdown */ + case 48: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_bind */ + case 49: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_listen */ + case 50: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_getsockname */ + case 51: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_getpeername */ + case 52: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_socketpair */ + case 53: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_setsockopt */ + case 54: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_getsockopt */ + case 55: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_clone */ + case 56: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_fork */ + case 57: + /* linux_vfork */ + case 58: + /* linux_execve */ + case 59: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_exit */ + case 60: + if (ndx == 0 || ndx == 1) + p = "void"; + break; + /* linux_wait4 */ + case 61: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_kill */ + case 62: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_newuname */ + case 63: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_semget */ + case 64: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_semop */ + case 65: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_semctl */ + case 66: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_shmdt */ + case 67: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_msgget */ + case 68: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_msgsnd */ + case 69: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_msgrcv */ + case 70: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_msgctl */ + case 71: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_fcntl */ + case 72: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* flock */ + case 73: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* fsync */ + case 74: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_fdatasync */ + case 75: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_truncate */ + case 76: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_ftruncate */ + case 77: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_getdents */ + case 78: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_getcwd */ + case 79: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_chdir */ + case 80: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* fchdir */ + case 81: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_rename */ + case 82: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_mkdir */ + case 83: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_rmdir */ + case 84: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_creat */ + case 85: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_link */ + case 86: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_unlink */ + case 87: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_symlink */ + case 88: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_readlink */ + case 89: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_chmod */ + case 90: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* fchmod */ + case 91: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_chown */ + case 92: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* fchown */ + case 93: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_lchown */ + case 94: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* umask */ + case 95: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* gettimeofday */ + case 96: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_getrlimit */ + case 97: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* getrusage */ + case 98: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_sysinfo */ + case 99: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_times */ + case 100: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_ptrace */ + case 101: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_getuid */ + case 102: + /* linux_syslog */ + case 103: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_getgid */ + case 104: + /* setuid */ + case 105: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* setgid */ + case 106: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* geteuid */ + case 107: + /* getegid */ + case 108: + /* setpgid */ + case 109: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_getppid */ + case 110: + /* getpgrp */ + case 111: + /* setsid */ + case 112: + /* setreuid */ + case 113: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* setregid */ + case 114: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_getgroups */ + case 115: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_setgroups */ + case 116: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* setresuid */ + case 117: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* getresuid */ + case 118: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* setresgid */ + case 119: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* getresgid */ + case 120: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* getpgid */ + case 121: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_setfsuid */ + case 122: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_setfsgid */ + case 123: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_getsid */ + case 124: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_capget */ + case 125: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_capset */ + case 126: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_rt_sigpending */ + case 127: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_rt_sigtimedwait */ + case 128: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_rt_sigqueueinfo */ + case 129: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_rt_sigsuspend */ + case 130: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_sigaltstack */ + case 131: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_utime */ + case 132: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_mknod */ + case 133: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_personality */ + case 135: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_ustat */ + case 136: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_statfs */ + case 137: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_fstatfs */ + case 138: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_sysfs */ + case 139: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_getpriority */ + case 140: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* setpriority */ + case 141: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_sched_setparam */ + case 142: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_sched_getparam */ + case 143: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_sched_setscheduler */ + case 144: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_sched_getscheduler */ + case 145: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_sched_get_priority_max */ + case 146: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_sched_get_priority_min */ + case 147: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_sched_rr_get_interval */ + case 148: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* mlock */ + case 149: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* munlock */ + case 150: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* mlockall */ + case 151: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* munlockall */ + case 152: + /* linux_vhangup */ + case 153: + /* linux_pivot_root */ + case 155: + /* linux_sysctl */ + case 156: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_prctl */ + case 157: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_arch_prctl */ + case 158: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_adjtimex */ + case 159: + /* linux_setrlimit */ + case 160: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* chroot */ + case 161: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* sync */ + case 162: + /* acct */ + case 163: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* settimeofday */ + case 164: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_mount */ + case 165: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_umount */ + case 166: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* swapon */ + case 167: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_swapoff */ + case 168: + /* linux_reboot */ + case 169: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_sethostname */ + case 170: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_setdomainname */ + case 171: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_iopl */ + case 172: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_create_module */ + case 174: + /* linux_init_module */ + case 175: + /* linux_delete_module */ + case 176: + /* linux_get_kernel_syms */ + case 177: + /* linux_query_module */ + case 178: + /* linux_quotactl */ + case 179: + /* linux_nfsservctl */ + case 180: + /* linux_getpmsg */ + case 181: + /* linux_putpmsg */ + case 182: + /* linux_afs_syscall */ + case 183: + /* linux_tuxcall */ + case 184: + /* linux_security */ + case 185: + /* linux_gettid */ + case 186: + /* linux_setxattr */ + case 188: + /* linux_lsetxattr */ + case 189: + /* linux_fsetxattr */ + case 190: + /* linux_getxattr */ + case 191: + /* linux_lgetxattr */ + case 192: + /* linux_fgetxattr */ + case 193: + /* linux_listxattr */ + case 194: + /* linux_llistxattr */ + case 195: + /* linux_flistxattr */ + case 196: + /* linux_removexattr */ + case 197: + /* linux_lremovexattr */ + case 198: + /* linux_fremovexattr */ + case 199: + /* linux_tkill */ + case 200: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_time */ + case 201: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_sys_futex */ + case 202: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_sched_setaffinity */ + case 203: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_sched_getaffinity */ + case 204: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_set_thread_area */ + case 205: + /* linux_lookup_dcookie */ + case 212: + /* linux_epoll_create */ + case 213: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_epoll_ctl_old */ + case 214: + /* linux_epoll_wait_old */ + case 215: + /* linux_remap_file_pages */ + case 216: + /* linux_getdents64 */ + case 217: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_set_tid_address */ + case 218: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_semtimedop */ + case 220: + /* linux_fadvise64 */ + case 221: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_timer_create */ + case 222: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_timer_settime */ + case 223: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_timer_gettime */ + case 224: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_timer_getoverrun */ + case 225: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_timer_delete */ + case 226: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_clock_settime */ + case 227: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_clock_gettime */ + case 228: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_clock_getres */ + case 229: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_clock_nanosleep */ + case 230: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_exit_group */ + case 231: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_epoll_wait */ + case 232: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_epoll_ctl */ + case 233: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_tgkill */ + case 234: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_utimes */ + case 235: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_mbind */ + case 237: + /* linux_set_mempolicy */ + case 238: + /* linux_get_mempolicy */ + case 239: + /* linux_mq_open */ + case 240: + /* linux_mq_unlink */ + case 241: + /* linux_mq_timedsend */ + case 242: + /* linux_mq_timedreceive */ + case 243: + /* linux_mq_notify */ + case 244: + /* linux_mq_getsetattr */ + case 245: + /* linux_kexec_load */ + case 246: + /* linux_waitid */ + case 247: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_add_key */ + case 248: + /* linux_request_key */ + case 249: + /* linux_keyctl */ + case 250: + /* linux_ioprio_set */ + case 251: + /* linux_ioprio_get */ + case 252: + /* linux_inotify_init */ + case 253: + /* linux_inotify_add_watch */ + case 254: + /* linux_inotify_rm_watch */ + case 255: + /* linux_migrate_pages */ + case 256: + /* linux_openat */ + case 257: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_mkdirat */ + case 258: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_mknodat */ + case 259: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_fchownat */ + case 260: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_futimesat */ + case 261: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_newfstatat */ + case 262: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_unlinkat */ + case 263: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_renameat */ + case 264: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_linkat */ + case 265: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_symlinkat */ + case 266: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_readlinkat */ + case 267: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_fchmodat */ + case 268: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_faccessat */ + case 269: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_pselect6 */ + case 270: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_ppoll */ + case 271: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_unshare */ + case 272: + /* linux_set_robust_list */ + case 273: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_get_robust_list */ + case 274: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_splice */ + case 275: + /* linux_tee */ + case 276: + /* linux_sync_file_range */ + case 277: + /* linux_vmsplice */ + case 278: + /* linux_move_pages */ + case 279: + /* linux_utimensat */ + case 280: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_epoll_pwait */ + case 281: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_signalfd */ + case 282: + /* linux_timerfd */ + case 283: + /* linux_eventfd */ + case 284: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_fallocate */ + case 285: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_timerfd_settime */ + case 286: + /* linux_timerfd_gettime */ + case 287: + /* linux_accept4 */ + case 288: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_signalfd4 */ + case 289: + /* linux_eventfd2 */ + case 290: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_epoll_create1 */ + case 291: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_dup3 */ + case 292: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_pipe2 */ + case 293: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_inotify_init1 */ + case 294: + /* linux_preadv */ + case 295: + /* linux_pwritev */ + case 296: + /* linux_rt_tsigqueueinfo */ + case 297: + /* linux_perf_event_open */ + case 298: + /* linux_recvmmsg */ + case 299: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_fanotify_init */ + case 300: + /* linux_fanotify_mark */ + case 301: + /* linux_prlimit64 */ + case 302: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_name_to_handle_at */ + case 303: + /* linux_open_by_handle_at */ + case 304: + /* linux_clock_adjtime */ + case 305: + /* linux_syncfs */ + case 306: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_sendmmsg */ + case 307: + if (ndx == 0 || ndx == 1) + p = "int"; + break; + /* linux_setns */ + case 308: + /* linux_process_vm_readv */ + case 309: + /* linux_process_vm_writev */ + case 310: + /* linux_kcmp */ + case 311: + /* linux_finit_module */ + case 312: + default: + break; + }; + if (p != NULL) + strlcpy(desc, p, descsz); +} diff --git a/sys/amd64/linux/linux_sysvec.c b/sys/amd64/linux/linux_sysvec.c new file mode 100644 index 000000000000..e9ab8b369480 --- /dev/null +++ b/sys/amd64/linux/linux_sysvec.c @@ -0,0 +1,946 @@ +/*- + * Copyright (c) 2013 Dmitry Chagin + * Copyright (c) 2004 Tim J. Robbins + * Copyright (c) 2003 Peter Wemm + * Copyright (c) 2002 Doug Rabson + * Copyright (c) 1998-1999 Andrew Gallatin + * Copyright (c) 1994-1996 Søren Schmidt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer + * in this position and unchanged. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "opt_compat.h" + +#define __ELF_WORD_SIZE 64 + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +MODULE_VERSION(linux64, 1); + +#if BYTE_ORDER == LITTLE_ENDIAN +#define SHELLMAGIC 0x2123 /* #! */ +#else +#define SHELLMAGIC 0x2321 +#endif + +#if defined(DEBUG) +SYSCTL_PROC(_compat_linux, OID_AUTO, debug, + CTLTYPE_STRING | CTLFLAG_RW, + 0, 0, linux_sysctl_debug, "A", + "Linux 64 debugging control"); +#endif + +/* + * Allow the this functions to use the ldebug() facility + * even though they are not syscalls themselves. Map them + * to syscall 0. This is slightly less bogus than using + * ldebug(sigreturn). + */ +#define LINUX_SYS_linux_rt_sendsig 0 + +const char *linux_kplatform; +static int linux_szsigcode; +static vm_object_t linux_shared_page_obj; +static char *linux_shared_page_mapping; +extern char _binary_linux_locore_o_start; +extern char _binary_linux_locore_o_end; + +extern struct sysent linux_sysent[LINUX_SYS_MAXSYSCALL]; + +SET_DECLARE(linux_ioctl_handler_set, struct linux_ioctl_handler); + +static register_t * linux_copyout_strings(struct image_params *imgp); +static int elf_linux_fixup(register_t **stack_base, + struct image_params *iparams); +static boolean_t linux_trans_osrel(const Elf_Note *note, int32_t *osrel); +static void linux_vdso_install(void *param); +static void linux_vdso_deinstall(void *param); +static void linux_set_syscall_retval(struct thread *td, int error); +static int linux_fetch_syscall_args(struct thread *td, struct syscall_args *sa); +static void linux_exec_setregs(struct thread *td, struct image_params *imgp, + u_long stack); + +/* + * Linux syscalls return negative errno's, we do positive and map them + * Reference: + * FreeBSD: src/sys/sys/errno.h + * Linux: linux-2.6.17.8/include/asm-generic/errno-base.h + * linux-2.6.17.8/include/asm-generic/errno.h + */ +static int bsd_to_linux_errno[ELAST + 1] = { + -0, -1, -2, -3, -4, -5, -6, -7, -8, -9, + -10, -35, -12, -13, -14, -15, -16, -17, -18, -19, + -20, -21, -22, -23, -24, -25, -26, -27, -28, -29, + -30, -31, -32, -33, -34, -11,-115,-114, -88, -89, + -90, -91, -92, -93, -94, -95, -96, -97, -98, -99, + -100,-101,-102,-103,-104,-105,-106,-107,-108,-109, + -110,-111, -40, -36,-112,-113, -39, -11, -87,-122, + -116, -66, -6, -6, -6, -6, -6, -37, -38, -9, + -6, -6, -43, -42, -75,-125, -84, -95, -16, -74, + -72, -67, -71 +}; + +#define LINUX_T_UNKNOWN 255 +static int _bsd_to_linux_trapcode[] = { + LINUX_T_UNKNOWN, /* 0 */ + 6, /* 1 T_PRIVINFLT */ + LINUX_T_UNKNOWN, /* 2 */ + 3, /* 3 T_BPTFLT */ + LINUX_T_UNKNOWN, /* 4 */ + LINUX_T_UNKNOWN, /* 5 */ + 16, /* 6 T_ARITHTRAP */ + 254, /* 7 T_ASTFLT */ + LINUX_T_UNKNOWN, /* 8 */ + 13, /* 9 T_PROTFLT */ + 1, /* 10 T_TRCTRAP */ + LINUX_T_UNKNOWN, /* 11 */ + 14, /* 12 T_PAGEFLT */ + LINUX_T_UNKNOWN, /* 13 */ + 17, /* 14 T_ALIGNFLT */ + LINUX_T_UNKNOWN, /* 15 */ + LINUX_T_UNKNOWN, /* 16 */ + LINUX_T_UNKNOWN, /* 17 */ + 0, /* 18 T_DIVIDE */ + 2, /* 19 T_NMI */ + 4, /* 20 T_OFLOW */ + 5, /* 21 T_BOUND */ + 7, /* 22 T_DNA */ + 8, /* 23 T_DOUBLEFLT */ + 9, /* 24 T_FPOPFLT */ + 10, /* 25 T_TSSFLT */ + 11, /* 26 T_SEGNPFLT */ + 12, /* 27 T_STKFLT */ + 18, /* 28 T_MCHK */ + 19, /* 29 T_XMMFLT */ + 15 /* 30 T_RESERVED */ +}; +#define bsd_to_linux_trapcode(code) \ + ((code)td_proc; + frame = td->td_frame; + + sa->args[0] = frame->tf_rdi; + sa->args[1] = frame->tf_rsi; + sa->args[2] = frame->tf_rdx; + sa->args[3] = frame->tf_rcx; + sa->args[4] = frame->tf_r8; + sa->args[5] = frame->tf_r9; + sa->code = frame->tf_rax; + + if (sa->code >= p->p_sysent->sv_size) + /* nosys */ + sa->callp = &p->p_sysent->sv_table[LINUX_SYS_MAXSYSCALL]; + else + sa->callp = &p->p_sysent->sv_table[sa->code]; + sa->narg = sa->callp->sy_narg; + + td->td_retval[0] = 0; + return (0); +} + +static void +linux_set_syscall_retval(struct thread *td, int error) +{ + struct trapframe *frame = td->td_frame; + + /* + * On Linux only %rcx and %r11 values are not preserved across + * the syscall. + * So, do not clobber %rdx and %r10 + */ + td->td_retval[1] = frame->tf_rdx; + frame->tf_r10 = frame->tf_rcx; + + cpu_set_syscall_retval(td, error); + + /* Restore all registers. */ + set_pcb_flags(td->td_pcb, PCB_FULL_IRET); +} + +static int +elf_linux_fixup(register_t **stack_base, struct image_params *imgp) +{ + Elf_Auxargs *args; + Elf_Addr *base; + Elf_Addr *pos; + struct ps_strings *arginfo; + struct proc *p; + + p = imgp->proc; + arginfo = (struct ps_strings *)p->p_sysent->sv_psstrings; + + KASSERT(curthread->td_proc == imgp->proc, + ("unsafe elf_linux_fixup(), should be curproc")); + base = (Elf64_Addr *)*stack_base; + args = (Elf64_Auxargs *)imgp->auxargs; + pos = base + (imgp->args->argc + imgp->args->envc + 2); + + AUXARGS_ENTRY(pos, LINUX_AT_SYSINFO_EHDR, + imgp->proc->p_sysent->sv_shared_page_base); + AUXARGS_ENTRY(pos, LINUX_AT_HWCAP, cpu_feature); + AUXARGS_ENTRY(pos, LINUX_AT_CLKTCK, stclohz); + AUXARGS_ENTRY(pos, AT_PHDR, args->phdr); + AUXARGS_ENTRY(pos, AT_PHENT, args->phent); + AUXARGS_ENTRY(pos, AT_PHNUM, args->phnum); + AUXARGS_ENTRY(pos, AT_PAGESZ, args->pagesz); + AUXARGS_ENTRY(pos, AT_BASE, args->base); + AUXARGS_ENTRY(pos, AT_FLAGS, args->flags); + AUXARGS_ENTRY(pos, AT_ENTRY, args->entry); + AUXARGS_ENTRY(pos, AT_UID, imgp->proc->p_ucred->cr_ruid); + AUXARGS_ENTRY(pos, AT_EUID, imgp->proc->p_ucred->cr_svuid); + AUXARGS_ENTRY(pos, AT_GID, imgp->proc->p_ucred->cr_rgid); + AUXARGS_ENTRY(pos, AT_EGID, imgp->proc->p_ucred->cr_svgid); + AUXARGS_ENTRY(pos, LINUX_AT_SECURE, 0); + AUXARGS_ENTRY(pos, LINUX_AT_PLATFORM, PTROUT(linux_platform)); + AUXARGS_ENTRY(pos, LINUX_AT_RANDOM, imgp->canary); + if (imgp->execpathp != 0) + AUXARGS_ENTRY(pos, LINUX_AT_EXECFN, imgp->execpathp); + if (args->execfd != -1) + AUXARGS_ENTRY(pos, AT_EXECFD, args->execfd); + AUXARGS_ENTRY(pos, AT_NULL, 0); + free(imgp->auxargs, M_TEMP); + imgp->auxargs = NULL; + + base--; + suword(base, (uint64_t)imgp->args->argc); + + *stack_base = (register_t *)base; + return (0); +} + +/* + * Copy strings out to the new process address space, constructing new arg + * and env vector tables. Return a pointer to the base so that it can be used + * as the initial stack pointer. + */ +static register_t * +linux_copyout_strings(struct image_params *imgp) +{ + int argc, envc; + char **vectp; + char *stringp, *destp; + register_t *stack_base; + struct ps_strings *arginfo; + char canary[LINUX_AT_RANDOM_LEN]; + size_t execpath_len; + struct proc *p; + + /* + * Calculate string base and vector table pointers. + */ + if (imgp->execpath != NULL && imgp->auxargs != NULL) + execpath_len = strlen(imgp->execpath) + 1; + else + execpath_len = 0; + + p = imgp->proc; + arginfo = (struct ps_strings *)p->p_sysent->sv_psstrings; + destp = (caddr_t)arginfo - SPARE_USRSPACE - + roundup(sizeof(canary), sizeof(char *)) - + roundup(execpath_len, sizeof(char *)) - + roundup((ARG_MAX - imgp->args->stringspace), sizeof(char *)); + + if (execpath_len != 0) { + imgp->execpathp = (uintptr_t)arginfo - execpath_len; + copyout(imgp->execpath, (void *)imgp->execpathp, execpath_len); + } + + /* + * Prepare the canary for SSP. + */ + arc4rand(canary, sizeof(canary), 0); + imgp->canary = (uintptr_t)arginfo - + roundup(execpath_len, sizeof(char *)) - + roundup(sizeof(canary), sizeof(char *)); + copyout(canary, (void *)imgp->canary, sizeof(canary)); + + /* + * If we have a valid auxargs ptr, prepare some room + * on the stack. + */ + if (imgp->auxargs) { + /* + * 'AT_COUNT*2' is size for the ELF Auxargs data. This is for + * lower compatibility. + */ + imgp->auxarg_size = (imgp->auxarg_size) ? imgp->auxarg_size : + (LINUX_AT_COUNT * 2); + + /* + * The '+ 2' is for the null pointers at the end of each of + * the arg and env vector sets,and imgp->auxarg_size is room + * for argument of Runtime loader. + */ + vectp = (char **)(destp - (imgp->args->argc + + imgp->args->envc + 2 + imgp->auxarg_size) * sizeof(char *)); + + } else { + /* + * The '+ 2' is for the null pointers at the end of each of + * the arg and env vector sets + */ + vectp = (char **)(destp - (imgp->args->argc + + imgp->args->envc + 2) * sizeof(char *)); + } + + /* + * vectp also becomes our initial stack base + */ + stack_base = (register_t *)vectp; + + stringp = imgp->args->begin_argv; + argc = imgp->args->argc; + envc = imgp->args->envc; + + /* + * Copy out strings - arguments and environment. + */ + copyout(stringp, destp, ARG_MAX - imgp->args->stringspace); + + /* + * Fill in "ps_strings" struct for ps, w, etc. + */ + suword(&arginfo->ps_argvstr, (long)(intptr_t)vectp); + suword(&arginfo->ps_nargvstr, argc); + + /* + * Fill in argument portion of vector table. + */ + for (; argc > 0; --argc) { + suword(vectp++, (long)(intptr_t)destp); + while (*stringp++ != 0) + destp++; + destp++; + } + + /* a null vector table pointer separates the argp's from the envp's */ + suword(vectp++, 0); + + suword(&arginfo->ps_envstr, (long)(intptr_t)vectp); + suword(&arginfo->ps_nenvstr, envc); + + /* + * Fill in environment portion of vector table. + */ + for (; envc > 0; --envc) { + suword(vectp++, (long)(intptr_t)destp); + while (*stringp++ != 0) + destp++; + destp++; + } + + /* end of vector table is a null pointer */ + suword(vectp, 0); + return (stack_base); +} + +/* + * Reset registers to default values on exec. + */ +static void +linux_exec_setregs(struct thread *td, struct image_params *imgp, u_long stack) +{ + struct trapframe *regs = td->td_frame; + struct pcb *pcb = td->td_pcb; + + mtx_lock(&dt_lock); + if (td->td_proc->p_md.md_ldt != NULL) + user_ldt_free(td); + else + mtx_unlock(&dt_lock); + + pcb->pcb_fsbase = 0; + pcb->pcb_gsbase = 0; + clear_pcb_flags(pcb, PCB_32BIT); + pcb->pcb_initial_fpucw = __LINUX_NPXCW__; + set_pcb_flags(pcb, PCB_FULL_IRET); + + bzero((char *)regs, sizeof(struct trapframe)); + regs->tf_rip = imgp->entry_addr; + regs->tf_rsp = stack; + regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T); + regs->tf_ss = _udatasel; + regs->tf_cs = _ucodesel; + regs->tf_ds = _udatasel; + regs->tf_es = _udatasel; + regs->tf_fs = _ufssel; + regs->tf_gs = _ugssel; + regs->tf_flags = TF_HASSEGS; + + /* + * Reset the hardware debug registers if they were in use. + * They won't have any meaning for the newly exec'd process. + */ + if (pcb->pcb_flags & PCB_DBREGS) { + pcb->pcb_dr0 = 0; + pcb->pcb_dr1 = 0; + pcb->pcb_dr2 = 0; + pcb->pcb_dr3 = 0; + pcb->pcb_dr6 = 0; + pcb->pcb_dr7 = 0; + if (pcb == curpcb) { + /* + * Clear the debug registers on the running + * CPU, otherwise they will end up affecting + * the next process we switch to. + */ + reset_dbregs(); + } + clear_pcb_flags(pcb, PCB_DBREGS); + } + + /* + * Drop the FP state if we hold it, so that the process gets a + * clean FP state if it uses the FPU again. + */ + fpstate_drop(td); +} + +/* + * Copied from amd64/amd64/machdep.c + * + * XXX fpu state need? don't think so + */ +int +linux_rt_sigreturn(struct thread *td, struct linux_rt_sigreturn_args *args) +{ + struct proc *p; + struct l_ucontext uc; + struct l_sigcontext *context; + struct trapframe *regs; + unsigned long rflags; + int error; + ksiginfo_t ksi; + + regs = td->td_frame; + error = copyin((void *)regs->tf_rbx, &uc, sizeof(uc)); + if (error != 0) + return (error); + + p = td->td_proc; + context = &uc.uc_mcontext; + rflags = context->sc_rflags; + + /* + * Don't allow users to change privileged or reserved flags. + */ + /* + * XXX do allow users to change the privileged flag PSL_RF. + * The cpu sets PSL_RF in tf_rflags for faults. Debuggers + * should sometimes set it there too. tf_rflags is kept in + * the signal context during signal handling and there is no + * other place to remember it, so the PSL_RF bit may be + * corrupted by the signal handler without us knowing. + * Corruption of the PSL_RF bit at worst causes one more or + * one less debugger trap, so allowing it is fairly harmless. + */ + +#define RFLAG_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) + if (!RFLAG_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) { + printf("linux_rt_sigreturn: rflags = 0x%lx\n", rflags); + return (EINVAL); + } + + /* + * Don't allow users to load a valid privileged %cs. Let the + * hardware check for invalid selectors, excess privilege in + * other selectors, invalid %eip's and invalid %esp's. + */ +#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) + if (!CS_SECURE(context->sc_cs)) { + printf("linux_rt_sigreturn: cs = 0x%x\n", context->sc_cs); + ksiginfo_init_trap(&ksi); + ksi.ksi_signo = SIGBUS; + ksi.ksi_code = BUS_OBJERR; + ksi.ksi_trapno = T_PROTFLT; + ksi.ksi_addr = (void *)regs->tf_rip; + trapsignal(td, &ksi); + return (EINVAL); + } + + PROC_LOCK(p); + linux_to_bsd_sigset(&uc.uc_sigmask, &td->td_sigmask); + SIG_CANTMASK(td->td_sigmask); + signotify(td); + PROC_UNLOCK(p); + + regs->tf_rdi = context->sc_rdi; + regs->tf_rsi = context->sc_rsi; + regs->tf_rdx = context->sc_rdx; + regs->tf_rbp = context->sc_rbp; + regs->tf_rbx = context->sc_rbx; + regs->tf_rcx = context->sc_rcx; + regs->tf_rax = context->sc_rax; + regs->tf_rip = context->sc_rip; + regs->tf_rsp = context->sc_rsp; + regs->tf_r8 = context->sc_r8; + regs->tf_r9 = context->sc_r9; + regs->tf_r10 = context->sc_r10; + regs->tf_r11 = context->sc_r11; + regs->tf_r12 = context->sc_r12; + regs->tf_r13 = context->sc_r13; + regs->tf_r14 = context->sc_r14; + regs->tf_r15 = context->sc_r15; + regs->tf_cs = context->sc_cs; + regs->tf_err = context->sc_err; + regs->tf_rflags = rflags; + + set_pcb_flags(td->td_pcb, PCB_FULL_IRET); + return (EJUSTRETURN); +} + +/* + * copied from amd64/amd64/machdep.c + * + * Send an interrupt to process. + */ +static void +linux_rt_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) +{ + struct l_rt_sigframe sf, *sfp; + struct proc *p; + struct thread *td; + struct sigacts *psp; + caddr_t sp; + struct trapframe *regs; + int sig, code; + int oonstack; + + td = curthread; + p = td->td_proc; + PROC_LOCK_ASSERT(p, MA_OWNED); + sig = ksi->ksi_signo; + psp = p->p_sigacts; + code = ksi->ksi_code; + mtx_assert(&psp->ps_mtx, MA_OWNED); + regs = td->td_frame; + oonstack = sigonstack(regs->tf_rsp); + + LINUX_CTR4(rt_sendsig, "%p, %d, %p, %u", + catcher, sig, mask, code); + + /* Allocate space for the signal handler context. */ + if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && + SIGISMEMBER(psp->ps_sigonstack, sig)) { + sp = td->td_sigstk.ss_sp + td->td_sigstk.ss_size - + sizeof(struct l_rt_sigframe); + } else + sp = (caddr_t)regs->tf_rsp - sizeof(struct l_rt_sigframe) - 128; + /* Align to 16 bytes. */ + sfp = (struct l_rt_sigframe *)((unsigned long)sp & ~0xFul); + mtx_unlock(&psp->ps_mtx); + + /* Translate the signal. */ + sig = bsd_to_linux_signal(sig); + + /* Save user context. */ + bzero(&sf, sizeof(sf)); + bsd_to_linux_sigset(mask, &sf.sf_sc.uc_sigmask); + bsd_to_linux_sigset(mask, &sf.sf_sc.uc_mcontext.sc_mask); + + sf.sf_sc.uc_stack.ss_sp = PTROUT(td->td_sigstk.ss_sp); + sf.sf_sc.uc_stack.ss_size = td->td_sigstk.ss_size; + sf.sf_sc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) + ? ((oonstack) ? LINUX_SS_ONSTACK : 0) : LINUX_SS_DISABLE; + PROC_UNLOCK(p); + + sf.sf_sc.uc_mcontext.sc_rdi = regs->tf_rdi; + sf.sf_sc.uc_mcontext.sc_rsi = regs->tf_rsi; + sf.sf_sc.uc_mcontext.sc_rdx = regs->tf_rdx; + sf.sf_sc.uc_mcontext.sc_rbp = regs->tf_rbp; + sf.sf_sc.uc_mcontext.sc_rbx = regs->tf_rbx; + sf.sf_sc.uc_mcontext.sc_rcx = regs->tf_rcx; + sf.sf_sc.uc_mcontext.sc_rax = regs->tf_rax; + sf.sf_sc.uc_mcontext.sc_rip = regs->tf_rip; + sf.sf_sc.uc_mcontext.sc_rsp = regs->tf_rsp; + sf.sf_sc.uc_mcontext.sc_r8 = regs->tf_r8; + sf.sf_sc.uc_mcontext.sc_r9 = regs->tf_r9; + sf.sf_sc.uc_mcontext.sc_r10 = regs->tf_r10; + sf.sf_sc.uc_mcontext.sc_r11 = regs->tf_r11; + sf.sf_sc.uc_mcontext.sc_r12 = regs->tf_r12; + sf.sf_sc.uc_mcontext.sc_r13 = regs->tf_r13; + sf.sf_sc.uc_mcontext.sc_r14 = regs->tf_r14; + sf.sf_sc.uc_mcontext.sc_r15 = regs->tf_r15; + sf.sf_sc.uc_mcontext.sc_cs = regs->tf_cs; + sf.sf_sc.uc_mcontext.sc_rflags = regs->tf_rflags; + sf.sf_sc.uc_mcontext.sc_err = regs->tf_err; + sf.sf_sc.uc_mcontext.sc_trapno = bsd_to_linux_trapcode(code); + sf.sf_sc.uc_mcontext.sc_cr2 = (register_t)ksi->ksi_addr; + + /* Build the argument list for the signal handler. */ + regs->tf_rdi = sig; /* arg 1 in %rdi */ + regs->tf_rax = 0; + regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */ + regs->tf_rdx = (register_t)&sfp->sf_sc; /* arg 3 in %rdx */ + + sf.sf_handler = catcher; + /* Fill in POSIX parts */ + ksiginfo_to_lsiginfo(ksi, &sf.sf_si, sig); + + /* + * Copy the sigframe out to the user's stack. + */ + if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { +#ifdef DEBUG + printf("process %ld has trashed its stack\n", (long)p->p_pid); +#endif + PROC_LOCK(p); + sigexit(td, SIGILL); + } + + regs->tf_rsp = (long)sfp; + regs->tf_rip = linux_rt_sigcode; + regs->tf_rflags &= ~(PSL_T | PSL_D); + regs->tf_cs = _ucodesel; + set_pcb_flags(td->td_pcb, PCB_FULL_IRET); + PROC_LOCK(p); + mtx_lock(&psp->ps_mtx); +} + +/* + * If a linux binary is exec'ing something, try this image activator + * first. We override standard shell script execution in order to + * be able to modify the interpreter path. We only do this if a linux + * binary is doing the exec, so we do not create an EXEC module for it. + */ +static int exec_linux_imgact_try(struct image_params *iparams); + +static int +exec_linux_imgact_try(struct image_params *imgp) +{ + const char *head = (const char *)imgp->image_header; + char *rpath; + int error = -1, len; + + /* + * The interpreter for shell scripts run from a linux binary needs + * to be located in /compat/linux if possible in order to recursively + * maintain linux path emulation. + */ + if (((const short *)head)[0] == SHELLMAGIC) { + /* + * Run our normal shell image activator. If it succeeds + * attempt to use the alternate path for the interpreter. + * If an alternate path is found, use our stringspace + * to store it. + */ + if ((error = exec_shell_imgact(imgp)) == 0) { + linux_emul_convpath(FIRST_THREAD_IN_PROC(imgp->proc), + imgp->interpreter_name, UIO_SYSSPACE, + &rpath, 0, AT_FDCWD); + if (rpath != NULL) { + len = strlen(rpath) + 1; + + if (len <= MAXSHELLCMDLEN) + memcpy(imgp->interpreter_name, + rpath, len); + free(rpath, M_TEMP); + } + } + } + return(error); +} + +struct sysentvec elf_linux_sysvec = { + .sv_size = LINUX_SYS_MAXSYSCALL, + .sv_table = linux_sysent, + .sv_mask = 0, + .sv_sigsize = 0, + .sv_sigtbl = NULL, + .sv_errsize = ELAST + 1, + .sv_errtbl = bsd_to_linux_errno, + .sv_transtrap = translate_traps, + .sv_fixup = elf_linux_fixup, + .sv_sendsig = linux_rt_sendsig, + .sv_sigcode = &_binary_linux_locore_o_start, + .sv_szsigcode = &linux_szsigcode, + .sv_prepsyscall = NULL, + .sv_name = "Linux ELF64", + .sv_coredump = elf64_coredump, + .sv_imgact_try = exec_linux_imgact_try, + .sv_minsigstksz = LINUX_MINSIGSTKSZ, + .sv_pagesize = PAGE_SIZE, + .sv_minuser = VM_MIN_ADDRESS, + .sv_maxuser = VM_MAXUSER_ADDRESS, + .sv_usrstack = USRSTACK, + .sv_psstrings = PS_STRINGS, + .sv_stackprot = VM_PROT_ALL, + .sv_copyout_strings = linux_copyout_strings, + .sv_setregs = linux_exec_setregs, + .sv_fixlimit = NULL, + .sv_maxssiz = NULL, + .sv_flags = SV_ABI_LINUX | SV_LP64 | SV_SHP, + .sv_set_syscall_retval = linux_set_syscall_retval, + .sv_fetch_syscall_args = linux_fetch_syscall_args, + .sv_syscallnames = NULL, + .sv_shared_page_base = SHAREDPAGE, + .sv_shared_page_len = PAGE_SIZE, + .sv_schedtail = linux_schedtail, + .sv_thread_detach = linux_thread_detach +}; + +static void +linux_vdso_install(void *param) +{ + + linux_szsigcode = (&_binary_linux_locore_o_end - + &_binary_linux_locore_o_start); + + if (linux_szsigcode > elf_linux_sysvec.sv_shared_page_len) + panic("Linux invalid vdso size\n"); + + __elfN(linux_vdso_fixup)(&elf_linux_sysvec); + + linux_shared_page_obj = __elfN(linux_shared_page_init) + (&linux_shared_page_mapping); + + __elfN(linux_vdso_reloc)(&elf_linux_sysvec, SHAREDPAGE); + + bcopy(elf_linux_sysvec.sv_sigcode, linux_shared_page_mapping, + linux_szsigcode); + elf_linux_sysvec.sv_shared_page_obj = linux_shared_page_obj; + + linux_kplatform = linux_shared_page_mapping + + (linux_platform - (caddr_t)SHAREDPAGE); +} +SYSINIT(elf_linux_vdso_init, SI_SUB_EXEC, SI_ORDER_ANY, + (sysinit_cfunc_t)linux_vdso_install, NULL); + +static void +linux_vdso_deinstall(void *param) +{ + + __elfN(linux_shared_page_fini)(linux_shared_page_obj); +}; +SYSUNINIT(elf_linux_vdso_uninit, SI_SUB_EXEC, SI_ORDER_FIRST, + (sysinit_cfunc_t)linux_vdso_deinstall, NULL); + +static char GNULINUX_ABI_VENDOR[] = "GNU"; +static int GNULINUX_ABI_DESC = 0; + +static boolean_t +linux_trans_osrel(const Elf_Note *note, int32_t *osrel) +{ + const Elf32_Word *desc; + uintptr_t p; + + p = (uintptr_t)(note + 1); + p += roundup2(note->n_namesz, sizeof(Elf32_Addr)); + + desc = (const Elf32_Word *)p; + if (desc[0] != GNULINUX_ABI_DESC) + return (FALSE); + + /* + * For linux we encode osrel as follows (see linux_mib.c): + * VVVMMMIII (version, major, minor), see linux_mib.c. + */ + *osrel = desc[1] * 1000000 + desc[2] * 1000 + desc[3]; + + return (TRUE); +} + +static Elf_Brandnote linux64_brandnote = { + .hdr.n_namesz = sizeof(GNULINUX_ABI_VENDOR), + .hdr.n_descsz = 16, + .hdr.n_type = 1, + .vendor = GNULINUX_ABI_VENDOR, + .flags = BN_TRANSLATE_OSREL, + .trans_osrel = linux_trans_osrel +}; + +static Elf64_Brandinfo linux_glibc2brand = { + .brand = ELFOSABI_LINUX, + .machine = EM_X86_64, + .compat_3_brand = "Linux", + .emul_path = "/compat/linux", + .interp_path = "/lib64/ld-linux-x86-64.so.2", + .sysvec = &elf_linux_sysvec, + .interp_newpath = NULL, + .brand_note = &linux64_brandnote, + .flags = BI_CAN_EXEC_DYN | BI_BRAND_NOTE +}; + +static Elf64_Brandinfo linux_glibc2brandshort = { + .brand = ELFOSABI_LINUX, + .machine = EM_X86_64, + .compat_3_brand = "Linux", + .emul_path = "/compat/linux", + .interp_path = "/lib64/ld-linux.so.2", + .sysvec = &elf_linux_sysvec, + .interp_newpath = NULL, + .brand_note = &linux64_brandnote, + .flags = BI_CAN_EXEC_DYN | BI_BRAND_NOTE +}; + +Elf64_Brandinfo *linux_brandlist[] = { + &linux_glibc2brand, + &linux_glibc2brandshort, + NULL +}; + +static int +linux64_elf_modevent(module_t mod, int type, void *data) +{ + Elf64_Brandinfo **brandinfo; + int error; + struct linux_ioctl_handler **lihp; + + error = 0; + + switch(type) { + case MOD_LOAD: + for (brandinfo = &linux_brandlist[0]; *brandinfo != NULL; + ++brandinfo) + if (elf64_insert_brand_entry(*brandinfo) < 0) + error = EINVAL; + if (error == 0) { + SET_FOREACH(lihp, linux_ioctl_handler_set) + linux_ioctl_register_handler(*lihp); + LIST_INIT(&futex_list); + mtx_init(&futex_mtx, "ftllk64", NULL, MTX_DEF); + stclohz = (stathz ? stathz : hz); + if (bootverbose) + printf("Linux x86-64 ELF exec handler installed\n"); + } else + printf("cannot insert Linux x86-64 ELF brand handler\n"); + break; + case MOD_UNLOAD: + for (brandinfo = &linux_brandlist[0]; *brandinfo != NULL; + ++brandinfo) + if (elf64_brand_inuse(*brandinfo)) + error = EBUSY; + if (error == 0) { + for (brandinfo = &linux_brandlist[0]; + *brandinfo != NULL; ++brandinfo) + if (elf64_remove_brand_entry(*brandinfo) < 0) + error = EINVAL; + } + if (error == 0) { + SET_FOREACH(lihp, linux_ioctl_handler_set) + linux_ioctl_unregister_handler(*lihp); + mtx_destroy(&futex_mtx); + if (bootverbose) + printf("Linux ELF exec handler removed\n"); + } else + printf("Could not deinstall ELF interpreter entry\n"); + break; + default: + return (EOPNOTSUPP); + } + return (error); +} + +static moduledata_t linux64_elf_mod = { + "linux64elf", + linux64_elf_modevent, + 0 +}; + +DECLARE_MODULE_TIED(linux64elf, linux64_elf_mod, SI_SUB_EXEC, SI_ORDER_ANY); +MODULE_DEPEND(linux64elf, linux_common, 1, 1, 1); diff --git a/sys/amd64/linux/linux_vdso.lds.s b/sys/amd64/linux/linux_vdso.lds.s new file mode 100644 index 000000000000..94f0266095fb --- /dev/null +++ b/sys/amd64/linux/linux_vdso.lds.s @@ -0,0 +1,69 @@ +/* + * Linker script for 64-bit vDSO. + * Copied from Linux kernel arch/x86/vdso/vdso-layout.lds.S + * + * $FreeBSD$ + */ + +SECTIONS +{ + . = . + SIZEOF_HEADERS; + + .hash : { *(.hash) } :text + .gnu.hash : { *(.gnu.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + + .note : { *(.note.*) } :text :note + + .eh_frame_hdr : { *(.eh_frame_hdr) } :text :eh_frame_hdr + .eh_frame : { KEEP (*(.eh_frame)) } :text + + .dynamic : { *(.dynamic) } :text :dynamic + + .rodata : { *(.rodata*) } :text + .data : { + *(.data*) + *(.sdata*) + *(.got.plt) *(.got) + *(.gnu.linkonce.d.*) + *(.bss*) + *(.dynbss*) + *(.gnu.linkonce.b.*) + } + + .altinstructions : { *(.altinstructions) } + .altinstr_replacement : { *(.altinstr_replacement) } + + . = ALIGN(0x100); + .text : { *(.test .text*) } :text =0x90909090 +} + +PHDRS +{ + text PT_LOAD FLAGS(5) FILEHDR PHDRS; /* PF_R|PF_X */ + dynamic PT_DYNAMIC FLAGS(4); /* PF_R */ + note PT_NOTE FLAGS(4); /* PF_R */ + eh_frame_hdr PT_GNU_EH_FRAME; +} + +VERSION +{ + LINUX_2.6 { + global: + time; + __vdso_time; + gettimeofday; + __vdso_gettimeofday; + getcpu; + __vdso_getcpu; + clock_gettime; + __vdso_clock_gettime; + linux_rt_sigcode; + linux_platform; + local: *; + }; +} diff --git a/sys/amd64/linux/syscalls.conf b/sys/amd64/linux/syscalls.conf new file mode 100644 index 000000000000..29f37920bba6 --- /dev/null +++ b/sys/amd64/linux/syscalls.conf @@ -0,0 +1,11 @@ +# $FreeBSD$ +sysnames="linux_syscalls.c" +sysproto="linux_proto.h" +sysproto_h=_LINUX_SYSPROTO_H_ +syshdr="linux_syscall.h" +syssw="linux_sysent.c" +sysmk="/dev/null" +syscallprefix="LINUX_SYS_" +switchname="linux_sysent" +namesname="linux_syscallnames" +systrace="linux_systrace_args.c" diff --git a/sys/amd64/linux/syscalls.master b/sys/amd64/linux/syscalls.master new file mode 100644 index 000000000000..d840f8806d4e --- /dev/null +++ b/sys/amd64/linux/syscalls.master @@ -0,0 +1,515 @@ + $FreeBSD$ + +; @(#)syscalls.master 8.1 (Berkeley) 7/19/93 +; System call name/number master file (or rather, slave, from LINUX). +; Processed to create linux_sysent.c, linux_proto.h and linux_syscall.h. + +; Columns: number audit type nargs name alt{name,tag,rtyp}/comments +; number system call number, must be in order +; audit the audit event associated with the system call +; A value of AUE_NULL means no auditing, but it also means that +; there is no audit event for the call at this time. For the +; case where the event exists, but we don't want auditing, the +; event should be #defined to AUE_NULL in audit_kevents.h. +; type one of STD, OBSOL, UNIMPL +; name psuedo-prototype of syscall routine +; If one of the following alts is different, then all appear: +; altname name of system call if different +; alttag name of args struct tag if different from [o]`name'"_args" +; altrtyp return type if not int (bogus - syscalls always return int) +; for UNIMPL/OBSOL, name continues with comments + +; types: +; STD always included +; OBSOL obsolete, not included in system, only specifies name +; UNIMPL not implemented, placeholder only + +#include +#include +#include +#include +#include +#include + +; Isn't pretty, but there seems to be no other way to trap nosys +#define nosys linux_nosys + +; #ifdef's, etc. may be included, and are copied to the output files. + +0 AUE_NULL NOPROTO { int read(int fd, char *buf, \ + u_int nbyte); } +1 AUE_NULL NOPROTO { int write(int fd, char *buf, \ + u_int nbyte); } +2 AUE_OPEN_RWTC STD { int linux_open(char *path, l_int flags, \ + l_int mode); } +3 AUE_CLOSE NOPROTO { int close(int fd); } +4 AUE_STAT STD { int linux_newstat(char *path, \ + struct l_newstat *buf); } +5 AUE_FSTAT STD { int linux_newfstat(l_uint fd, \ + struct l_newstat *buf); } +6 AUE_LSTAT STD { int linux_newlstat(char *path, \ + struct l_newstat *buf); } +7 AUE_POLL NOPROTO { int poll(struct pollfd*, \ + unsigned int nfds, int timeout); } +8 AUE_LSEEK STD { int linux_lseek(l_uint fdes, l_off_t off, \ + l_int whence); } +9 AUE_MMAP STD { int linux_mmap2(l_ulong addr, l_ulong len, \ + l_ulong prot, l_ulong flags, l_ulong fd, \ + l_ulong pgoff); } +10 AUE_MPROTECT STD { int linux_mprotect(caddr_t addr, int len, \ + int prot); } +11 AUE_MUNMAP NOPROTO { int munmap(caddr_t addr, int len); } +12 AUE_NULL STD { int linux_brk(l_ulong dsend); } +13 AUE_NULL STD { int linux_rt_sigaction(l_int sig, \ + l_sigaction_t *act, l_sigaction_t *oact, \ + l_size_t sigsetsize); } +14 AUE_NULL STD { int linux_rt_sigprocmask(l_int how, \ + l_sigset_t *mask, l_sigset_t *omask, \ + l_size_t sigsetsize); } +15 AUE_NULL STD { int linux_rt_sigreturn( \ + struct l_ucontext *ucp); } +16 AUE_IOCTL STD { int linux_ioctl(l_uint fd, l_uint cmd, \ + uintptr_t arg); } +17 AUE_PREAD STD { int linux_pread(l_uint fd, char *buf, \ + l_size_t nbyte, l_loff_t offset); } +18 AUE_PWRITE STD { int linux_pwrite(l_uint fd, char *buf, \ + l_size_t nbyte, l_loff_t offset); } +19 AUE_READV NOPROTO { int readv(int fd, struct iovec *iovp, \ + u_int iovcnt); } +20 AUE_WRITEV NOPROTO { int writev(int fd, struct iovec *iovp, \ + u_int iovcnt); } +21 AUE_ACCESS STD { int linux_access(char *path, l_int amode); } +22 AUE_PIPE STD { int linux_pipe(l_ulong *pipefds); } +23 AUE_SELECT STD { int linux_select(l_int nfds, \ + l_fd_set *readfds, l_fd_set *writefds, \ + l_fd_set *exceptfds, \ + struct l_timeval *timeout); } +24 AUE_NULL NOPROTO { int sched_yield(void); } +25 AUE_NULL STD { int linux_mremap(l_ulong addr, \ + l_ulong old_len, l_ulong new_len, \ + l_ulong flags, l_ulong new_addr); } +26 AUE_MSYNC STD { int linux_msync(l_ulong addr, \ + l_size_t len, l_int fl); } +27 AUE_MINCORE STD { int linux_mincore(l_ulong start, \ + l_size_t len, u_char *vec); } +28 AUE_MADVISE NOPROTO { int madvise(void *addr, size_t len, \ + int behav); } +29 AUE_NULL STD { int linux_shmget(l_key_t key, l_size_t size, \ + l_int shmflg); } +30 AUE_NULL STD { int linux_shmat(l_int shmid, char *shmaddr, \ + l_int shmflg); } +31 AUE_NULL STD { int linux_shmctl(l_int shmid, l_int cmd, \ + struct l_shmid_ds *buf); } +32 AUE_DUP NOPROTO { int dup(u_int fd); } +33 AUE_DUP2 NOPROTO { int dup2(u_int from, u_int to); } +34 AUE_NULL STD { int linux_pause(void); } +35 AUE_NULL STD { int linux_nanosleep( \ + const struct l_timespec *rqtp, \ + struct l_timespec *rmtp); } +36 AUE_GETITIMER STD { int linux_getitimer(l_int which, \ + struct l_itimerval *itv); } +37 AUE_NULL STD { int linux_alarm(l_uint secs); } +38 AUE_SETITIMER STD { int linux_setitimer(l_int which, \ + struct l_itimerval *itv, \ + struct l_itimerval *oitv); } +39 AUE_GETPID STD { int linux_getpid(void); } +40 AUE_SENDFILE STD { int linux_sendfile(int out, int in, \ + l_long *offset, l_size_t count); } +41 AUE_SOCKET STD { int linux_socket(l_int domain, l_int type, \ + l_int protocol); } +42 AUE_CONNECT STD { int linux_connect(l_int s, l_uintptr_t name, \ + l_int namelen); } +43 AUE_ACCEPT STD { int linux_accept(l_int s, l_uintptr_t addr, \ + l_uintptr_t namelen); } +44 AUE_SENDTO STD { int linux_sendto(l_int s, l_uintptr_t msg, \ + l_int len, l_int flags, l_uintptr_t to, \ + l_int tolen); } +45 AUE_RECVFROM STD { int linux_recvfrom(l_int s, l_uintptr_t buf, \ + l_size_t len, l_int flags, l_uintptr_t from, \ + l_uintptr_t fromlen); } +46 AUE_SENDMSG STD { int linux_sendmsg(l_int s, l_uintptr_t msg, \ + l_int flags); } +47 AUE_RECVMSG STD { int linux_recvmsg(l_int s, l_uintptr_t msg, \ + l_int flags); } +48 AUE_NULL STD { int linux_shutdown(l_int s, l_int how); } +49 AUE_BIND STD { int linux_bind(l_int s, l_uintptr_t name, \ + l_int namelen); } +50 AUE_LISTEN STD { int linux_listen(l_int s, l_int backlog); } +51 AUE_GETSOCKNAME STD { int linux_getsockname(l_int s, \ + l_uintptr_t addr, l_uintptr_t namelen); } +52 AUE_GETPEERNAME STD { int linux_getpeername(l_int s, \ + l_uintptr_t addr, l_uintptr_t namelen); } +53 AUE_SOCKETPAIR STD { int linux_socketpair(l_int domain, \ + l_int type, l_int protocol, l_uintptr_t rsv); } +54 AUE_SETSOCKOPT STD { int linux_setsockopt(l_int s, l_int level, \ + l_int optname, l_uintptr_t optval, \ + l_int optlen); } +55 AUE_GETSOCKOPT STD { int linux_getsockopt(l_int s, l_int level, \ + l_int optname, l_uintptr_t optval, \ + l_uintptr_t optlen); } +56 AUE_RFORK STD { int linux_clone(l_int flags, void *stack, \ + void *parent_tidptr, void * child_tidptr, void *tls ); } +57 AUE_FORK STD { int linux_fork(void); } +58 AUE_VFORK STD { int linux_vfork(void); } +59 AUE_EXECVE STD { int linux_execve(char *path, char **argp, \ + char **envp); } +60 AUE_EXIT STD { void linux_exit(int rval); } +61 AUE_WAIT4 STD { int linux_wait4(l_pid_t pid, \ + l_int *status, l_int options, \ + struct rusage *rusage); } +62 AUE_KILL STD { int linux_kill(l_int pid, l_int signum); } +63 AUE_NULL STD { int linux_newuname( \ + struct l_new_utsname *buf); } +64 AUE_NULL STD { int linux_semget(l_key_t key, \ + l_int nsems, l_int semflg); } +65 AUE_NULL STD { int linux_semop(l_int semid, \ + struct l_sembuf *tsops, l_uint nsops); } +66 AUE_NULL STD { int linux_semctl(l_int semid, \ + l_int semnum, l_int cmd, union l_semun arg); } +67 AUE_NULL STD { int linux_shmdt(char *shmaddr); } +68 AUE_NULL STD { int linux_msgget(l_key_t key, l_int msgflg); } +69 AUE_NULL STD { int linux_msgsnd(l_int msqid, \ + struct l_msgbuf *msgp, l_size_t msgsz, \ + l_int msgflg); } +70 AUE_NULL STD { int linux_msgrcv(l_int msqid, \ + struct l_msgbuf *msgp, l_size_t msgsz, \ + l_long msgtyp, l_int msgflg); } +71 AUE_NULL STD { int linux_msgctl(l_int msqid, l_int cmd, \ + struct l_msqid_ds *buf); } +72 AUE_FCNTL STD { int linux_fcntl(l_uint fd, l_uint cmd, \ + l_ulong arg); } +73 AUE_FLOCK NOPROTO { int flock(int fd, int how); } +74 AUE_FSYNC NOPROTO { int fsync(int fd); } +75 AUE_NULL STD { int linux_fdatasync(l_uint fd); } +76 AUE_TRUNCATE STD { int linux_truncate(char *path, \ + l_ulong length); } +77 AUE_FTRUNCATE STD { int linux_ftruncate(l_int fd, l_long length); } +78 AUE_GETDIRENTRIES STD { int linux_getdents(l_uint fd, void *dent, \ + l_uint count); } +79 AUE_GETCWD STD { int linux_getcwd(char *buf, \ + l_ulong bufsize); } +80 AUE_CHDIR STD { int linux_chdir(char *path); } +81 AUE_FCHDIR NOPROTO { int fchdir(int fd); } +82 AUE_RENAME STD { int linux_rename(char *from, char *to); } +83 AUE_MKDIR STD { int linux_mkdir(char *path, l_int mode); } +84 AUE_RMDIR STD { int linux_rmdir(char *path); } +85 AUE_CREAT STD { int linux_creat(char *path, \ + l_int mode); } +86 AUE_LINK STD { int linux_link(char *path, char *to); } +87 AUE_UNLINK STD { int linux_unlink(char *path); } +88 AUE_SYMLINK STD { int linux_symlink(char *path, char *to); } +89 AUE_READLINK STD { int linux_readlink(char *name, char *buf, \ + l_int count); } +90 AUE_CHMOD STD { int linux_chmod(char *path, \ + l_mode_t mode); } +91 AUE_FCHMOD NOPROTO { int fchmod(int fd, int mode); } +92 AUE_LCHOWN STD { int linux_chown(char *path, \ + l_uid_t uid, l_gid_t gid); } +93 AUE_FCHOWN NOPROTO { int fchown(int fd, int uid, int gid); } +94 AUE_LCHOWN STD { int linux_lchown(char *path, l_uid_t uid, \ + l_gid_t gid); } +95 AUE_UMASK NOPROTO { int umask(int newmask); } +96 AUE_NULL NOPROTO { int gettimeofday(struct l_timeval *tp, \ + struct timezone *tzp); } +97 AUE_GETRLIMIT STD { int linux_getrlimit(l_uint resource, \ + struct l_rlimit *rlim); } +98 AUE_GETRUSAGE NOPROTO { int getrusage(int who, struct rusage *rusage); } +99 AUE_NULL STD { int linux_sysinfo(struct l_sysinfo *info); } +100 AUE_NULL STD { int linux_times(struct l_times_argv *buf); } +101 AUE_PTRACE STD { int linux_ptrace(l_long req, l_long pid, \ + l_long addr, l_long data); } +102 AUE_GETUID STD { int linux_getuid(void); } +103 AUE_NULL STD { int linux_syslog(l_int type, char *buf, \ + l_int len); } +104 AUE_GETGID STD { int linux_getgid(void); } +105 AUE_SETUID NOPROTO { int setuid(uid_t uid); } +106 AUE_SETGID NOPROTO { int setgid(gid_t gid); } +107 AUE_GETEUID NOPROTO { int geteuid(void); } +108 AUE_GETEGID NOPROTO { int getegid(void); } +109 AUE_SETPGRP NOPROTO { int setpgid(int pid, int pgid); } +110 AUE_GETPPID STD { int linux_getppid(void); } +111 AUE_GETPGRP NOPROTO { int getpgrp(void); } +112 AUE_SETSID NOPROTO { int setsid(void); } +113 AUE_SETREUID NOPROTO { int setreuid(uid_t ruid, uid_t euid); } +114 AUE_SETREGID NOPROTO { int setregid(gid_t rgid, gid_t egid); } +115 AUE_GETGROUPS STD { int linux_getgroups(l_int gidsetsize, \ + l_gid_t *grouplist); } +116 AUE_SETGROUPS STD { int linux_setgroups(l_int gidsetsize, \ + l_gid_t *grouplist); } +117 AUE_SETRESUID NOPROTO { int setresuid(uid_t ruid, uid_t euid, \ + uid_t suid); } +118 AUE_GETRESUID NOPROTO { int getresuid(uid_t *ruid, uid_t *euid, \ + uid_t *suid); } +119 AUE_SETRESGID NOPROTO { int setresgid(gid_t rgid, gid_t egid, \ + gid_t sgid); } +120 AUE_GETRESGID NOPROTO { int getresgid(gid_t *rgid, gid_t *egid, \ + gid_t *sgid); } +121 AUE_GETPGID NOPROTO { int getpgid(int pid); } +122 AUE_SETFSUID STD { int linux_setfsuid(l_uid_t uid); } +123 AUE_SETFSGID STD { int linux_setfsgid(l_gid_t gid); } +124 AUE_GETSID STD { int linux_getsid(l_pid_t pid); } +125 AUE_CAPGET STD { int linux_capget(struct l_user_cap_header *hdrp, \ + struct l_user_cap_data *datap); } +126 AUE_CAPSET STD { int linux_capset(struct l_user_cap_header *hdrp, \ + struct l_user_cap_data *datap); } +127 AUE_NULL STD { int linux_rt_sigpending(l_sigset_t *set, \ + l_size_t sigsetsize); } +128 AUE_NULL STD { int linux_rt_sigtimedwait(l_sigset_t *mask, \ + l_siginfo_t *ptr, \ + struct l_timeval *timeout, \ + l_size_t sigsetsize); } +129 AUE_NULL STD { int linux_rt_sigqueueinfo(l_pid_t pid, l_int sig, \ + l_siginfo_t *info); } +130 AUE_NULL STD { int linux_rt_sigsuspend( \ + l_sigset_t *newset, \ + l_size_t sigsetsize); } +131 AUE_NULL STD { int linux_sigaltstack(l_stack_t *uss, \ + l_stack_t *uoss); } +132 AUE_UTIME STD { int linux_utime(char *fname, \ + struct l_utimbuf *times); } +133 AUE_MKNOD STD { int linux_mknod(char *path, l_int mode, \ + l_dev_t dev); } +134 AUE_USELIB UNIMPL uselib +135 AUE_PERSONALITY STD { int linux_personality(l_ulong per); } +136 AUE_NULL STD { int linux_ustat(l_dev_t dev, \ + struct l_ustat *ubuf); } +137 AUE_STATFS STD { int linux_statfs(char *path, \ + struct l_statfs_buf *buf); } +138 AUE_FSTATFS STD { int linux_fstatfs(l_uint fd, \ + struct l_statfs_buf *buf); } +139 AUE_NULL STD { int linux_sysfs(l_int option, \ + l_ulong arg1, l_ulong arg2); } +140 AUE_GETPRIORITY STD { int linux_getpriority(int which, int who); } +141 AUE_SETPRIORITY NOPROTO { int setpriority(int which, int who, \ + int prio); } +142 AUE_SCHED_SETPARAM STD { int linux_sched_setparam(l_pid_t pid, \ + struct l_sched_param *param); } +143 AUE_SCHED_GETPARAM STD { int linux_sched_getparam(l_pid_t pid, \ + struct l_sched_param *param); } +144 AUE_SCHED_SETSCHEDULER STD { int linux_sched_setscheduler( \ + l_pid_t pid, l_int policy, \ + struct l_sched_param *param); } +145 AUE_SCHED_GETSCHEDULER STD { int linux_sched_getscheduler( \ + l_pid_t pid); } +146 AUE_SCHED_GET_PRIORITY_MAX STD { int linux_sched_get_priority_max( \ + l_int policy); } +147 AUE_SCHED_GET_PRIORITY_MIN STD { int linux_sched_get_priority_min( \ + l_int policy); } +148 AUE_SCHED_RR_GET_INTERVAL STD { int linux_sched_rr_get_interval(l_pid_t pid, \ + struct l_timespec *interval); } +149 AUE_MLOCK NOPROTO { int mlock(const void *addr, size_t len); } +150 AUE_MUNLOCK NOPROTO { int munlock(const void *addr, size_t len); } +151 AUE_MLOCKALL NOPROTO { int mlockall(int how); } +152 AUE_MUNLOCKALL NOPROTO { int munlockall(void); } +153 AUE_NULL STD { int linux_vhangup(void); } +154 AUE_NULL UNIMPL modify_ldt +155 AUE_PIVOT_ROOT STD { int linux_pivot_root(void); } +156 AUE_SYSCTL STD { int linux_sysctl( \ + struct l___sysctl_args *args); } +157 AUE_PRCTL STD { int linux_prctl(l_int option, l_uintptr_t arg2, \ + l_uintptr_t arg3, l_uintptr_t arg4, \ + l_uintptr_t arg5); } +158 AUE_PRCTL STD { int linux_arch_prctl(l_int code, l_ulong addr); } +159 AUE_ADJTIME STD { int linux_adjtimex(void); } +160 AUE_SETRLIMIT STD { int linux_setrlimit(l_uint resource, \ + struct l_rlimit *rlim); } +161 AUE_CHROOT NOPROTO { int chroot(char *path); } +162 AUE_SYNC NOPROTO { int sync(void); } +163 AUE_ACCT NOPROTO { int acct(char *path); } +164 AUE_SETTIMEOFDAY NOPROTO { int settimeofday(struct l_timeval *tp, struct timezone *tzp); } +165 AUE_MOUNT STD { int linux_mount(char *specialfile, \ + char *dir, char *filesystemtype, \ + l_ulong rwflag, void *data); } +166 AUE_UMOUNT STD { int linux_umount(char *path, l_int flags); } +167 AUE_SWAPON NOPROTO { int swapon(char *name); } +168 AUE_SWAPOFF STD { int linux_swapoff(void); } +169 AUE_REBOOT STD { int linux_reboot(l_int magic1, \ + l_int magic2, l_uint cmd, void *arg); } +170 AUE_SYSCTL STD { int linux_sethostname(char *hostname, \ + l_uint len); } +171 AUE_SYSCTL STD { int linux_setdomainname(char *name, \ + l_int len); } +172 AUE_NULL STD { int linux_iopl(l_uint level); } +173 AUE_NULL UNIMPL ioperm +174 AUE_NULL STD { int linux_create_module(void); } +175 AUE_NULL STD { int linux_init_module(void); } +176 AUE_NULL STD { int linux_delete_module(void); } +177 AUE_NULL STD { int linux_get_kernel_syms(void); } +178 AUE_NULL STD { int linux_query_module(void); } +179 AUE_QUOTACTL STD { int linux_quotactl(void); } +180 AUE_NULL STD { int linux_nfsservctl(void); } +181 AUE_GETPMSG STD { int linux_getpmsg(void); } +182 AUE_PUTPMSG STD { int linux_putpmsg(void); } +183 AUE_NULL STD { int linux_afs_syscall(void); } +184 AUE_NULL STD { int linux_tuxcall(void); } +185 AUE_NULL STD { int linux_security(void); } +186 AUE_NULL STD { int linux_gettid(void); } +187 AUE_NULL UNIMPL linux_readahead +188 AUE_NULL STD { int linux_setxattr(void); } +189 AUE_NULL STD { int linux_lsetxattr(void); } +190 AUE_NULL STD { int linux_fsetxattr(void); } +191 AUE_NULL STD { int linux_getxattr(void); } +192 AUE_NULL STD { int linux_lgetxattr(void); } +193 AUE_NULL STD { int linux_fgetxattr(void); } +194 AUE_NULL STD { int linux_listxattr(void); } +195 AUE_NULL STD { int linux_llistxattr(void); } +196 AUE_NULL STD { int linux_flistxattr(void); } +197 AUE_NULL STD { int linux_removexattr(void); } +198 AUE_NULL STD { int linux_lremovexattr(void); } +199 AUE_NULL STD { int linux_fremovexattr(void); } +200 AUE_NULL STD { int linux_tkill(int tid, int sig); } +201 AUE_NULL STD { int linux_time(l_time_t *tm); } +202 AUE_NULL STD { int linux_sys_futex(void *uaddr, int op, int val, \ + struct l_timespec *timeout, void *uaddr2, int val3); } +203 AUE_NULL STD { int linux_sched_setaffinity(l_pid_t pid, l_uint len, \ + l_ulong *user_mask_ptr); } +204 AUE_NULL STD { int linux_sched_getaffinity(l_pid_t pid, l_uint len, \ + l_ulong *user_mask_ptr); } +205 AUE_NULL STD { int linux_set_thread_area(void); } +206 AUE_NULL UNIMPL linux_io_setup +207 AUE_NULL UNIMPL linux_io_destroy +208 AUE_NULL UNIMPL linux_io_getevents +209 AUE_NULL UNIMPL inux_io_submit +210 AUE_NULL UNIMPL linux_io_cancel +211 AUE_NULL UNIMPL linux_get_thread_area +212 AUE_NULL STD { int linux_lookup_dcookie(void); } +213 AUE_NULL STD { int linux_epoll_create(l_int size); } +214 AUE_NULL STD { int linux_epoll_ctl_old(void); } +215 AUE_NULL STD { int linux_epoll_wait_old(void); } +216 AUE_NULL STD { int linux_remap_file_pages(void); } +217 AUE_GETDIRENTRIES STD { int linux_getdents64(l_uint fd, \ + void *dirent, l_uint count); } +218 AUE_NULL STD { int linux_set_tid_address(int *tidptr); } +219 AUE_NULL UNIMPL restart_syscall +220 AUE_NULL STD { int linux_semtimedop(void); } +221 AUE_NULL STD { int linux_fadvise64(int fd, l_loff_t offset, \ + l_size_t len, int advice); } +222 AUE_NULL STD { int linux_timer_create(clockid_t clock_id, \ + struct sigevent *evp, l_timer_t *timerid); } +223 AUE_NULL STD { int linux_timer_settime(l_timer_t timerid, l_int flags, \ + const struct itimerspec *new, struct itimerspec *old); } +224 AUE_NULL STD { int linux_timer_gettime(l_timer_t timerid, struct itimerspec *setting); } +225 AUE_NULL STD { int linux_timer_getoverrun(l_timer_t timerid); } +226 AUE_NULL STD { int linux_timer_delete(l_timer_t timerid); } +227 AUE_CLOCK_SETTIME STD { int linux_clock_settime(clockid_t which, struct l_timespec *tp); } +228 AUE_NULL STD { int linux_clock_gettime(clockid_t which, struct l_timespec *tp); } +229 AUE_NULL STD { int linux_clock_getres(clockid_t which, struct l_timespec *tp); } +230 AUE_NULL STD { int linux_clock_nanosleep(clockid_t which, int flags, \ + struct l_timespec *rqtp, struct l_timespec *rmtp); } +231 AUE_EXIT STD { int linux_exit_group(int error_code); } +232 AUE_NULL STD { int linux_epoll_wait(l_int epfd, struct epoll_event *events, \ + l_int maxevents, l_int timeout); } +233 AUE_NULL STD { int linux_epoll_ctl(l_int epfd, l_int op, l_int fd, \ + struct epoll_event *event); } +234 AUE_NULL STD { int linux_tgkill(int tgid, int pid, int sig); } +235 AUE_UTIMES STD { int linux_utimes(char *fname, \ + struct l_timeval *tptr); } +236 AUE_NULL UNIMPL vserver +237 AUE_NULL STD { int linux_mbind(void); } +238 AUE_NULL STD { int linux_set_mempolicy(void); } +239 AUE_NULL STD { int linux_get_mempolicy(void); } +240 AUE_NULL STD { int linux_mq_open(void); } +241 AUE_NULL STD { int linux_mq_unlink(void); } +242 AUE_NULL STD { int linux_mq_timedsend(void); } +243 AUE_NULL STD { int linux_mq_timedreceive(void); } +244 AUE_NULL STD { int linux_mq_notify(void); } +245 AUE_NULL STD { int linux_mq_getsetattr(void); } +246 AUE_NULL STD { int linux_kexec_load(void); } +247 AUE_WAIT6 STD { int linux_waitid(int idtype, l_pid_t id, \ + l_siginfo_t *info, int options, \ + struct rusage *rusage); } +248 AUE_NULL STD { int linux_add_key(void); } +249 AUE_NULL STD { int linux_request_key(void); } +250 AUE_NULL STD { int linux_keyctl(void); } +251 AUE_NULL STD { int linux_ioprio_set(void); } +252 AUE_NULL STD { int linux_ioprio_get(void); } +253 AUE_NULL STD { int linux_inotify_init(void); } +254 AUE_NULL STD { int linux_inotify_add_watch(void); } +255 AUE_NULL STD { int linux_inotify_rm_watch(void); } +256 AUE_NULL STD { int linux_migrate_pages(void); } +257 AUE_OPEN_RWTC STD { int linux_openat(l_int dfd, const char *filename, \ + l_int flags, l_int mode); } +258 AUE_MKDIRAT STD { int linux_mkdirat(l_int dfd, const char *pathname, \ + l_int mode); } +259 AUE_MKNODAT STD { int linux_mknodat(l_int dfd, const char *filename, \ + l_int mode, l_uint dev); } +260 AUE_FCHOWNAT STD { int linux_fchownat(l_int dfd, const char *filename, \ + l_uid_t uid, l_gid_t gid, l_int flag); } +261 AUE_FUTIMESAT STD { int linux_futimesat(l_int dfd, char *filename, \ + struct l_timeval *utimes); } +262 AUE_FSTATAT STD { int linux_newfstatat(l_int dfd, char *pathname, \ + struct l_stat64 *statbuf, l_int flag); } +263 AUE_UNLINKAT STD { int linux_unlinkat(l_int dfd, const char *pathname, \ + l_int flag); } +264 AUE_RENAMEAT STD { int linux_renameat(l_int olddfd, const char *oldname, \ + l_int newdfd, const char *newname); } +265 AUE_LINKAT STD { int linux_linkat(l_int olddfd, const char *oldname, \ + l_int newdfd, const char *newname, l_int flag); } +266 AUE_SYMLINKAT STD { int linux_symlinkat(const char *oldname, l_int newdfd, \ + const char *newname); } +267 AUE_READLINKAT STD { int linux_readlinkat(l_int dfd, const char *path, \ + char *buf, l_int bufsiz); } +268 AUE_FCHMODAT STD { int linux_fchmodat(l_int dfd, const char *filename, \ + l_mode_t mode); } +269 AUE_FACCESSAT STD { int linux_faccessat(l_int dfd, const char *filename, \ + l_int amode); } +270 AUE_SELECT STD { int linux_pselect6(l_int nfds, \ + l_fd_set *readfds, l_fd_set *writefds, l_fd_set *exceptfds, \ + struct l_timespec *tsp, l_uintptr_t *sig); } +271 AUE_POLL STD { int linux_ppoll(struct pollfd *fds, uint32_t nfds, \ + struct l_timespec *tsp, l_sigset_t *sset, l_size_t ssize); } +272 AUE_NULL STD { int linux_unshare(void); } +273 AUE_NULL STD { int linux_set_robust_list(struct linux_robust_list_head *head, \ + l_size_t len); } +274 AUE_NULL STD { int linux_get_robust_list(l_int pid, struct linux_robust_list_head *head, \ + l_size_t *len); } +275 AUE_NULL STD { int linux_splice(void); } +276 AUE_NULL STD { int linux_tee(void); } +277 AUE_NULL STD { int linux_sync_file_range(void); } +278 AUE_NULL STD { int linux_vmsplice(void); } +279 AUE_NULL STD { int linux_move_pages(void); } +280 AUE_FUTIMESAT STD { int linux_utimensat(l_int dfd, const char *pathname, \ + const struct l_timespec *times, l_int flags); } +281 AUE_NULL STD { int linux_epoll_pwait(l_int epfd, struct epoll_event *events, \ + l_int maxevents, l_int timeout, l_sigset_t *mask); } +282 AUE_NULL STD { int linux_signalfd(void); } +283 AUE_NULL STD { int linux_timerfd(void); } +284 AUE_NULL STD { int linux_eventfd(l_uint initval); } +285 AUE_NULL STD { int linux_fallocate(l_int fd, l_int mode, \ + l_loff_t offset, l_loff_t len); } +286 AUE_NULL STD { int linux_timerfd_settime(void); } +287 AUE_NULL STD { int linux_timerfd_gettime(void); } +288 AUE_ACCEPT STD { int linux_accept4(l_int s, l_uintptr_t addr, \ + l_uintptr_t namelen, int flags); } +289 AUE_NULL STD { int linux_signalfd4(void); } +290 AUE_NULL STD { int linux_eventfd2(l_uint initval, l_int flags); } +291 AUE_NULL STD { int linux_epoll_create1(l_int flags); } +292 AUE_NULL STD { int linux_dup3(l_int oldfd, \ + l_int newfd, l_int flags); } +293 AUE_NULL STD { int linux_pipe2(l_int *pipefds, l_int flags); } +294 AUE_NULL STD { int linux_inotify_init1(void); } +295 AUE_NULL STD { int linux_preadv(void); } +296 AUE_NULL STD { int linux_pwritev(void); } +297 AUE_NULL STD { int linux_rt_tsigqueueinfo(void); } +298 AUE_NULL STD { int linux_perf_event_open(void); } +299 AUE_NULL STD { int linux_recvmmsg(l_int s, \ + struct l_mmsghdr *msg, l_uint vlen, \ + l_uint flags, struct l_timespec *timeout); } +300 AUE_NULL STD { int linux_fanotify_init(void); } +301 AUE_NULL STD { int linux_fanotify_mark(void); } +302 AUE_NULL STD { int linux_prlimit64(l_pid_t pid, l_uint resource, \ + struct rlimit *new, struct rlimit *old); } +303 AUE_NULL STD { int linux_name_to_handle_at(void); } +304 AUE_NULL STD { int linux_open_by_handle_at(void); } +305 AUE_NULL STD { int linux_clock_adjtime(void); } +306 AUE_SYNC STD { int linux_syncfs(l_int fd); } +307 AUE_NULL STD { int linux_sendmmsg(l_int s, \ + struct l_mmsghdr *msg, l_uint vlen, \ + l_uint flags); } +308 AUE_NULL STD { int linux_setns(void); } +309 AUE_NULL STD { int linux_process_vm_readv(void); } +310 AUE_NULL STD { int linux_process_vm_writev(void); } +311 AUE_NULL STD { int linux_kcmp(void); } +312 AUE_NULL STD { int linux_finit_module(void); } +; please, keep this line at the end. +313 AUE_NULL UNIMPL nosys diff --git a/sys/amd64/linux32/linux.h b/sys/amd64/linux32/linux.h index 39c17c8d2135..e3b9f111a0a6 100644 --- a/sys/amd64/linux32/linux.h +++ b/sys/amd64/linux32/linux.h @@ -33,6 +33,7 @@ #ifndef _AMD64_LINUX_H_ #define _AMD64_LINUX_H_ +#include #include /* @@ -40,14 +41,12 @@ */ extern u_char linux_debug_map[]; #define ldebug(name) isclr(linux_debug_map, LINUX_SYS_linux_ ## name) -#define ARGS(nm, fmt) "linux(%ld): "#nm"("fmt")\n", (long)td->td_proc->p_pid -#define LMSG(fmt) "linux(%ld): "fmt"\n", (long)td->td_proc->p_pid +#define ARGS(nm, fmt) "linux(%ld/%ld): "#nm"("fmt")\n", \ + (long)td->td_proc->p_pid, (long)td->td_tid +#define LMSG(fmt) "linux(%ld/%ld): "fmt"\n", \ + (long)td->td_proc->p_pid, (long)td->td_tid #define LINUX_DTRACE linuxulator32 -#ifdef MALLOC_DECLARE -MALLOC_DECLARE(M_LINUX); -#endif - #define LINUX32_MAXUSER ((1ul << 32) - PAGE_SIZE) #define LINUX32_SHAREDPAGE (LINUX32_MAXUSER - PAGE_SIZE) #define LINUX32_USRSTACK LINUX32_SHAREDPAGE @@ -97,6 +96,7 @@ typedef l_uint l_uid_t; typedef l_ushort l_uid16_t; typedef l_int l_timer_t; typedef l_int l_mqd_t; +typedef l_ulong l_fd_mask; typedef struct { l_int val[2]; @@ -112,7 +112,7 @@ typedef struct { /* * Miscellaneous */ -#define LINUX_AT_COUNT 16 /* Count of used aux entry types. +#define LINUX_AT_COUNT 20 /* Count of used aux entry types. * Keep this synchronized with * elf_linux_fixup() code. */ @@ -260,49 +260,6 @@ struct l_statfs64 { l_int f_spare[6]; } __packed; -/* - * Signalling - */ -#define LINUX_SIGHUP 1 -#define LINUX_SIGINT 2 -#define LINUX_SIGQUIT 3 -#define LINUX_SIGILL 4 -#define LINUX_SIGTRAP 5 -#define LINUX_SIGABRT 6 -#define LINUX_SIGIOT LINUX_SIGABRT -#define LINUX_SIGBUS 7 -#define LINUX_SIGFPE 8 -#define LINUX_SIGKILL 9 -#define LINUX_SIGUSR1 10 -#define LINUX_SIGSEGV 11 -#define LINUX_SIGUSR2 12 -#define LINUX_SIGPIPE 13 -#define LINUX_SIGALRM 14 -#define LINUX_SIGTERM 15 -#define LINUX_SIGSTKFLT 16 -#define LINUX_SIGCHLD 17 -#define LINUX_SIGCONT 18 -#define LINUX_SIGSTOP 19 -#define LINUX_SIGTSTP 20 -#define LINUX_SIGTTIN 21 -#define LINUX_SIGTTOU 22 -#define LINUX_SIGURG 23 -#define LINUX_SIGXCPU 24 -#define LINUX_SIGXFSZ 25 -#define LINUX_SIGVTALRM 26 -#define LINUX_SIGPROF 27 -#define LINUX_SIGWINCH 28 -#define LINUX_SIGIO 29 -#define LINUX_SIGPOLL LINUX_SIGIO -#define LINUX_SIGPWR 30 -#define LINUX_SIGSYS 31 -#define LINUX_SIGRTMIN 32 - -#define LINUX_SIGTBLSZ 31 -#define LINUX_NSIG_WORDS 2 -#define LINUX_NBPW 32 -#define LINUX_NSIG (LINUX_NBPW * LINUX_NSIG_WORDS) - /* sigaction flags */ #define LINUX_SA_NOCLDSTOP 0x00000001 #define LINUX_SA_NOCLDWAIT 0x00000002 @@ -319,26 +276,12 @@ struct l_statfs64 { #define LINUX_SIG_UNBLOCK 1 #define LINUX_SIG_SETMASK 2 -/* sigset_t macros */ -#define LINUX_SIGEMPTYSET(set) (set).__bits[0] = (set).__bits[1] = 0 -#define LINUX_SIGISMEMBER(set, sig) SIGISMEMBER(set, sig) -#define LINUX_SIGADDSET(set, sig) SIGADDSET(set, sig) - /* sigaltstack */ #define LINUX_MINSIGSTKSZ 2048 -#define LINUX_SS_ONSTACK 1 -#define LINUX_SS_DISABLE 2 - -int linux_to_bsd_sigaltstack(int lsa); -int bsd_to_linux_sigaltstack(int bsa); typedef l_uintptr_t l_handler_t; typedef l_ulong l_osigset_t; -typedef struct { - l_uint __bits[LINUX_NSIG_WORDS]; -} __packed l_sigset_t; - typedef struct { l_handler_t lsa_handler; l_osigset_t lsa_mask; @@ -508,7 +451,7 @@ struct l_sigframe { l_int sf_sig; struct l_sigcontext sf_sc; struct l_fpstate sf_fpstate; - l_uint sf_extramask[LINUX_NSIG_WORDS-1]; + l_uint sf_extramask[1]; l_handler_t sf_handler; } __packed; @@ -521,50 +464,13 @@ struct l_rt_sigframe { l_handler_t sf_handler; } __packed; -extern struct sysentvec elf_linux_sysvec; - /* - * open/fcntl flags + * arch specific open/fcntl flags */ -#define LINUX_O_RDONLY 00000000 -#define LINUX_O_WRONLY 00000001 -#define LINUX_O_RDWR 00000002 -#define LINUX_O_ACCMODE 00000003 -#define LINUX_O_CREAT 00000100 -#define LINUX_O_EXCL 00000200 -#define LINUX_O_NOCTTY 00000400 -#define LINUX_O_TRUNC 00001000 -#define LINUX_O_APPEND 00002000 -#define LINUX_O_NONBLOCK 00004000 -#define LINUX_O_NDELAY LINUX_O_NONBLOCK -#define LINUX_O_SYNC 00010000 -#define LINUX_FASYNC 00020000 -#define LINUX_O_DIRECT 00040000 /* Direct disk access hint */ -#define LINUX_O_LARGEFILE 00100000 -#define LINUX_O_DIRECTORY 00200000 /* Must be a directory */ -#define LINUX_O_NOFOLLOW 00400000 /* Do not follow links */ -#define LINUX_O_NOATIME 01000000 -#define LINUX_O_CLOEXEC 02000000 - -#define LINUX_F_DUPFD 0 -#define LINUX_F_GETFD 1 -#define LINUX_F_SETFD 2 -#define LINUX_F_GETFL 3 -#define LINUX_F_SETFL 4 -#define LINUX_F_GETLK 5 -#define LINUX_F_SETLK 6 -#define LINUX_F_SETLKW 7 -#define LINUX_F_SETOWN 8 -#define LINUX_F_GETOWN 9 - #define LINUX_F_GETLK64 12 #define LINUX_F_SETLK64 13 #define LINUX_F_SETLKW64 14 -#define LINUX_F_RDLCK 0 -#define LINUX_F_WRLCK 1 -#define LINUX_F_UNLCK 2 - union l_semun { l_int val; l_uintptr_t buf; @@ -573,6 +479,16 @@ union l_semun { l_uintptr_t __pad; } __packed; +struct l_ipc_perm { + l_key_t key; + l_uid16_t uid; + l_gid16_t gid; + l_uid16_t cuid; + l_gid16_t cgid; + l_ushort mode; + l_ushort seq; +}; + /* * Socket defines */ @@ -609,22 +525,6 @@ struct l_sockaddr { char sa_data[14]; } __packed; -struct l_msghdr { - l_uintptr_t msg_name; - l_int msg_namelen; - l_uintptr_t msg_iov; - l_size_t msg_iovlen; - l_uintptr_t msg_control; - l_size_t msg_controllen; - l_uint msg_flags; -}; - -struct l_cmsghdr { - l_size_t cmsg_len; - l_int cmsg_level; - l_int cmsg_type; -}; - struct l_ifmap { l_ulong mem_start; l_ulong mem_end; @@ -778,6 +678,7 @@ struct l_iovec32 { int linux32_copyiniov(struct l_iovec32 *iovp32, l_ulong iovcnt, struct iovec **iovp, int error); +int linux_copyout_rusage(struct rusage *ru, void *uaddr); /* robust futexes */ struct linux_robust_list { diff --git a/sys/amd64/linux32/linux32_dummy.c b/sys/amd64/linux32/linux32_dummy.c index ecf516830811..e4e9f506d0d2 100644 --- a/sys/amd64/linux32/linux32_dummy.c +++ b/sys/amd64/linux32/linux32_dummy.c @@ -61,7 +61,6 @@ DUMMY(bdflush); DUMMY(sysfs); DUMMY(query_module); DUMMY(nfsservctl); -DUMMY(rt_sigqueueinfo); DUMMY(sendfile); DUMMY(setfsuid); DUMMY(setfsgid); @@ -69,9 +68,6 @@ DUMMY(pivot_root); DUMMY(mincore); DUMMY(ptrace); DUMMY(lookup_dcookie); -DUMMY(epoll_create); -DUMMY(epoll_ctl); -DUMMY(epoll_wait); DUMMY(remap_file_pages); DUMMY(fstatfs64); DUMMY(mbind); @@ -84,7 +80,6 @@ DUMMY(mq_timedreceive); DUMMY(mq_notify); DUMMY(mq_getsetattr); DUMMY(kexec_load); -DUMMY(waitid); /* linux 2.6.11: */ DUMMY(add_key); DUMMY(request_key); @@ -97,8 +92,6 @@ DUMMY(inotify_add_watch); DUMMY(inotify_rm_watch); /* linux 2.6.16: */ DUMMY(migrate_pages); -DUMMY(pselect6); -DUMMY(ppoll); DUMMY(unshare); /* linux 2.6.17: */ DUMMY(splice); @@ -109,22 +102,14 @@ DUMMY(vmsplice); DUMMY(move_pages); /* linux 2.6.19: */ DUMMY(getcpu); -DUMMY(epoll_pwait); /* linux 2.6.22: */ -DUMMY(utimensat); DUMMY(signalfd); DUMMY(timerfd_create); -DUMMY(eventfd); -/* linux 2.6.23: */ -DUMMY(fallocate); /* linux 2.6.25: */ DUMMY(timerfd_settime); DUMMY(timerfd_gettime); /* linux 2.6.27: */ DUMMY(signalfd4); -DUMMY(eventfd2); -DUMMY(epoll_create1); -DUMMY(dup3); DUMMY(inotify_init1); /* linux 2.6.30: */ DUMMY(preadv); @@ -133,17 +118,12 @@ DUMMY(pwritev); DUMMY(rt_tsigqueueinfo); DUMMY(perf_event_open); /* linux 2.6.33: */ -DUMMY(recvmmsg); DUMMY(fanotify_init); DUMMY(fanotify_mark); -/* linux 2.6.36: */ -DUMMY(prlimit64); /* later: */ DUMMY(name_to_handle_at); DUMMY(open_by_handle_at); DUMMY(clock_adjtime); -DUMMY(syncfs); -DUMMY(sendmmsg); DUMMY(setns); DUMMY(process_vm_readv); DUMMY(process_vm_writev); diff --git a/sys/amd64/linux32/linux32_genassym.c b/sys/amd64/linux32/linux32_genassym.c index a022fac17589..bc94139c226d 100644 --- a/sys/amd64/linux32/linux32_genassym.c +++ b/sys/amd64/linux32/linux32_genassym.c @@ -3,12 +3,16 @@ __FBSDID("$FreeBSD$"); #include #include +#include #include #include +#include ASSYM(LINUX_SIGF_HANDLER, offsetof(struct l_sigframe, sf_handler)); ASSYM(LINUX_SIGF_SC, offsetof(struct l_sigframe, sf_sc)); ASSYM(LINUX_RT_SIGF_HANDLER, offsetof(struct l_rt_sigframe, sf_handler)); ASSYM(LINUX_RT_SIGF_UC, offsetof(struct l_rt_sigframe, sf_sc)); ASSYM(LINUX_RT_SIGF_SC, offsetof(struct l_ucontext, uc_mcontext)); +ASSYM(LINUX_VERSION_CODE, LINUX_VERSION_CODE); +ASSYM(LINUX_SC_ESP, offsetof(struct l_sigcontext, sc_esp)); diff --git a/sys/amd64/linux32/linux32_locore.s b/sys/amd64/linux32/linux32_locore.s index 36e1abf87b83..4edbdf3db630 100644 --- a/sys/amd64/linux32/linux32_locore.s +++ b/sys/amd64/linux32/linux32_locore.s @@ -5,34 +5,152 @@ #include /* system call numbers */ +.data + + .globl linux_platform +linux_platform: + .asciz "i686" + .text .code32 -NON_GPROF_ENTRY(linux_sigcode) - call *LINUX_SIGF_HANDLER(%esp) - leal LINUX_SIGF_SC(%esp),%ebx /* linux scp */ - movl %esp, %ebx /* pass sigframe */ - push %eax /* fake ret addr */ +/* + * To avoid excess stack frame the signal trampoline code emulates + * the 'call' instruction. + */ +NON_GPROF_ENTRY(linux32_sigcode) + movl %esp, %ebx /* preserve sigframe */ + call .getip0 +.getip0: + popl %eax + add $.startsigcode-.getip0, %eax /* ret address */ + push %eax + jmp *LINUX_SIGF_HANDLER(%ebx) +.startsigcode: + popl %eax movl $LINUX_SYS_linux_sigreturn,%eax /* linux_sigreturn() */ int $0x80 /* enter kernel with args */ +.endsigcode: 0: jmp 0b - ALIGN_TEXT -/* XXXXX */ -linux_rt_sigcode: - call *LINUX_RT_SIGF_HANDLER(%esp) + +NON_GPROF_ENTRY(linux32_rt_sigcode) leal LINUX_RT_SIGF_UC(%esp),%ebx /* linux ucp */ leal LINUX_RT_SIGF_SC(%ebx),%ecx /* linux sigcontext */ - push %eax /* fake ret addr */ + movl %esp, %edi + call .getip1 +.getip1: + popl %eax + add $.startrtsigcode-.getip1, %eax /* ret address */ + push %eax + jmp *LINUX_RT_SIGF_HANDLER(%edi) +.startrtsigcode: movl $LINUX_SYS_linux_rt_sigreturn,%eax /* linux_rt_sigreturn() */ int $0x80 /* enter kernel with args */ +.endrtsigcode: 0: jmp 0b - ALIGN_TEXT -/* XXXXX */ -linux_esigcode: - .data - .globl linux_szsigcode, linux_sznonrtsigcode -linux_szsigcode: - .long linux_esigcode-linux_sigcode -linux_sznonrtsigcode: - .long linux_rt_sigcode-linux_sigcode +NON_GPROF_ENTRY(linux32_vsyscall) +.startvsyscall: + int $0x80 + ret +.endvsyscall: + +#if 0 + .section .note.Linux, "a",@note + .long 2f - 1f /* namesz */ + .balign 4 + .long 4f - 3f /* descsz */ + .long 0 +1: + .asciz "Linux" +2: + .balign 4 +3: + .long LINUX_VERSION_CODE +4: + .balign 4 + .previous +#endif + +#define do_cfa_expr(offset) \ + .byte 0x0f; /* DW_CFA_def_cfa_expression */ \ + .uleb128 11f-10f; /* length */ \ +10: .byte 0x74; /* DW_OP_breg4 */ \ + .sleb128 offset; /* offset */ \ + .byte 0x06; /* DW_OP_deref */ \ +11: + + + /* CIE */ + .section .eh_frame,"a",@progbits +.LSTARTFRAMEDLSI1: + .long .LENDCIEDLSI1-.LSTARTCIEDLSI1 +.LSTARTCIEDLSI1: + .long 0 /* CIE ID */ + .byte 1 /* Version number */ + .string "zRS" /* NULL-terminated + * augmentation string + */ + .uleb128 1 /* Code alignment factor */ + .sleb128 -4 /* Data alignment factor */ + .byte 8 /* Return address + * register column + */ + .uleb128 1 /* Augmentation value length */ + .byte 0x1b /* DW_EH_PE_pcrel|DW_EH_PE_sdata4. */ + .byte 0 /* DW_CFA_nop */ + .align 4 +.LENDCIEDLSI1: + + /* FDE */ + .long .LENDFDEDLSI1-.LSTARTFDEDLSI1 /* Length FDE */ +.LSTARTFDEDLSI1: + .long .LSTARTFDEDLSI1-.LSTARTFRAMEDLSI1 /* CIE pointer */ + .long .startsigcode-. /* PC-relative start address */ + .long .endsigcode-.startsigcode + .uleb128 0 /* Augmentation */ + do_cfa_expr(LINUX_SIGF_SC-8) + .align 4 +.LENDFDEDLSI1: + + .long .LENDFDEDLSI2-.LSTARTFDEDLSI2 /* Length FDE */ +.LSTARTFDEDLSI2: + .long .LSTARTFDEDLSI2-.LSTARTFRAMEDLSI1 /* CIE pointer */ + .long .startrtsigcode-. /* PC-relative start address */ + .long .endrtsigcode-.startrtsigcode + .uleb128 0 /* Augmentation */ + do_cfa_expr(LINUX_RT_SIGF_SC-4+LINUX_SC_ESP) + .align 4 +.LENDFDEDLSI2: + .previous + + .section .eh_frame,"a",@progbits +.LSTARTFRAMEDLSI2: + .long .LENDCIEDLSI2-.LSTARTCIEDLSI2 +.LSTARTCIEDLSI2: + .long 0 /* CIE ID */ + .byte 1 /* Version number */ + .string "zR" /* NULL-terminated + * augmentation string + */ + .uleb128 1 /* Code alignment factor */ + .sleb128 -4 /* Data alignment factor */ + .byte 8 /* Return address register column */ + .uleb128 1 /* Augmentation value length */ + .byte 0x1b /* DW_EH_PE_pcrel|DW_EH_PE_sdata4. */ + .byte 0x0c /* DW_CFA_def_cfa */ + .uleb128 4 + .uleb128 4 + .byte 0x88 /* DW_CFA_offset, column 0x8 */ + .uleb128 1 + .align 4 +.LENDCIEDLSI2: + .long .LENDFDEDLSI3-.LSTARTFDEDLSI3 /* Length FDE */ +.LSTARTFDEDLSI3: + .long .LSTARTFDEDLSI3-.LSTARTFRAMEDLSI2 /* CIE pointer */ + .long .startvsyscall-. /* PC-relative start address */ + .long .endvsyscall-.startvsyscall + .uleb128 0 + .align 4 +.LENDFDEDLSI3: + .previous diff --git a/sys/amd64/linux32/linux32_machdep.c b/sys/amd64/linux32/linux32_machdep.c index 2b955d0ff8d7..f9c11ca797fd 100644 --- a/sys/amd64/linux32/linux32_machdep.c +++ b/sys/amd64/linux32/linux32_machdep.c @@ -31,6 +31,8 @@ #include __FBSDID("$FreeBSD$"); +#include "opt_compat.h" + #include #include #include @@ -48,7 +50,6 @@ __FBSDID("$FreeBSD$"); #include #include #include -#include #include #include #include @@ -73,6 +74,8 @@ __FBSDID("$FreeBSD$"); #include #include +static void bsd_to_linux_rusage(struct rusage *ru, struct l_rusage *lru); + struct l_old_select_argv { l_int nfds; l_uintptr_t readfds; @@ -81,34 +84,10 @@ struct l_old_select_argv { l_uintptr_t timeout; } __packed; -int -linux_to_bsd_sigaltstack(int lsa) -{ - int bsa = 0; - - if (lsa & LINUX_SS_DISABLE) - bsa |= SS_DISABLE; - if (lsa & LINUX_SS_ONSTACK) - bsa |= SS_ONSTACK; - return (bsa); -} - static int linux_mmap_common(struct thread *td, l_uintptr_t addr, l_size_t len, l_int prot, l_int flags, l_int fd, l_loff_t pos); -int -bsd_to_linux_sigaltstack(int bsa) -{ - int lsa = 0; - - if (bsa & SS_DISABLE) - lsa |= LINUX_SS_DISABLE; - if (bsa & SS_ONSTACK) - lsa |= LINUX_SS_ONSTACK; - return (lsa); -} - static void bsd_to_linux_rusage(struct rusage *ru, struct l_rusage *lru) { @@ -133,6 +112,16 @@ bsd_to_linux_rusage(struct rusage *ru, struct l_rusage *lru) lru->ru_nivcsw = ru->ru_nivcsw; } +int +linux_copyout_rusage(struct rusage *ru, void *uaddr) +{ + struct l_rusage lru; + + bsd_to_linux_rusage(ru, &lru); + + return (copyout(&lru, uaddr, sizeof(struct l_rusage))); +} + int linux_execve(struct thread *td, struct linux_execve_args *args) { @@ -151,15 +140,7 @@ linux_execve(struct thread *td, struct linux_execve_args *args) args->argp, args->envp); free(path, M_TEMP); if (error == 0) - error = kern_execve(td, &eargs, NULL); - if (error == 0) - /* Linux process can execute FreeBSD one, do not attempt - * to create emuldata for such process using - * linux_proc_init, this leads to a panic on KASSERT - * because such process has p->p_emuldata == NULL. - */ - if (SV_PROC_ABI(td->td_proc) == SV_ABI_LINUX) - error = linux_proc_init(td, 0, 0); + error = linux_common_execve(td, &eargs); return (error); } @@ -457,8 +438,14 @@ int linux_set_upcall_kse(struct thread *td, register_t stack) { - td->td_frame->tf_rsp = stack; + if (stack) + td->td_frame->tf_rsp = stack; + /* + * The newly created Linux thread returns + * to the user space by the same path that a parent do. + */ + td->td_frame->tf_rax = 0; return (0); } @@ -721,7 +708,7 @@ linux_sigaction(struct thread *td, struct linux_sigaction_args *args) act.lsa_flags = osa.lsa_flags; act.lsa_restorer = osa.lsa_restorer; LINUX_SIGEMPTYSET(act.lsa_mask); - act.lsa_mask.__bits[0] = osa.lsa_mask; + act.lsa_mask.__mask = osa.lsa_mask; } error = linux_do_sigaction(td, args->sig, args->nsa ? &act : NULL, @@ -731,7 +718,7 @@ linux_sigaction(struct thread *td, struct linux_sigaction_args *args) osa.lsa_handler = oact.lsa_handler; osa.lsa_flags = oact.lsa_flags; osa.lsa_restorer = oact.lsa_restorer; - osa.lsa_mask = oact.lsa_mask.__bits[0]; + osa.lsa_mask = oact.lsa_mask.__mask; error = copyout(&osa, args->osa, sizeof(l_osigaction_t)); } @@ -755,7 +742,7 @@ linux_sigsuspend(struct thread *td, struct linux_sigsuspend_args *args) #endif LINUX_SIGEMPTYSET(mask); - mask.__bits[0] = args->mask; + mask.__mask = args->mask; linux_to_bsd_sigset(&mask, &sigmask); return (kern_sigsuspend(td, sigmask)); } @@ -902,36 +889,17 @@ linux_settimeofday(struct thread *td, struct linux_settimeofday_args *uap) int linux_getrusage(struct thread *td, struct linux_getrusage_args *uap) { - struct l_rusage s32; struct rusage s; int error; error = kern_getrusage(td, uap->who, &s); if (error != 0) return (error); - if (uap->rusage != NULL) { - bsd_to_linux_rusage(&s, &s32); - error = copyout(&s32, uap->rusage, sizeof(s32)); - } + if (uap->rusage != NULL) + error = linux_copyout_rusage(&s, uap->rusage); return (error); } -int -linux_sched_rr_get_interval(struct thread *td, - struct linux_sched_rr_get_interval_args *uap) -{ - struct timespec ts; - struct l_timespec ts32; - int error; - - error = kern_sched_rr_get_interval(td, uap->pid, &ts); - if (error != 0) - return (error); - ts32.tv_sec = ts.tv_sec; - ts32.tv_nsec = ts.tv_nsec; - return (copyout(&ts32, uap->interval, sizeof(ts32))); -} - int linux_set_thread_area(struct thread *td, struct linux_set_thread_area_args *args) @@ -1034,37 +1002,3 @@ linux_set_thread_area(struct thread *td, return (0); } - -int -linux_wait4(struct thread *td, struct linux_wait4_args *args) -{ - int error, options; - struct rusage ru, *rup; - struct l_rusage lru; - -#ifdef DEBUG - if (ldebug(wait4)) - printf(ARGS(wait4, "%d, %p, %d, %p"), - args->pid, (void *)args->status, args->options, - (void *)args->rusage); -#endif - - options = (args->options & (WNOHANG | WUNTRACED)); - /* WLINUXCLONE should be equal to __WCLONE, but we make sure */ - if (args->options & __WCLONE) - options |= WLINUXCLONE; - - if (args->rusage != NULL) - rup = &ru; - else - rup = NULL; - error = linux_common_wait(td, args->pid, args->status, options, rup); - if (error) - return (error); - if (args->rusage != NULL) { - bsd_to_linux_rusage(rup, &lru); - error = copyout(&lru, args->rusage, sizeof(lru)); - } - - return (error); -} diff --git a/sys/amd64/linux32/linux32_proto.h b/sys/amd64/linux32/linux32_proto.h index fd6b5420afcc..c6b233e2915a 100644 --- a/sys/amd64/linux32/linux32_proto.h +++ b/sys/amd64/linux32/linux32_proto.h @@ -3,7 +3,7 @@ * * DO NOT EDIT-- this file is automatically generated. * $FreeBSD$ - * created from FreeBSD: head/sys/amd64/linux32/syscalls.master 276508 2015-01-01 18:37:03Z dchagin + * created from FreeBSD: head/sys/amd64/linux32/syscalls.master 283492 2015-05-24 18:08:01Z dchagin */ #ifndef _LINUX_SYSPROTO_H_ @@ -35,6 +35,9 @@ struct thread; #endif #define nosys linux_nosys +struct linux_exit_args { + char rval_l_[PADL_(int)]; int rval; char rval_r_[PADR_(int)]; +}; struct linux_fork_args { register_t dummy; }; @@ -475,6 +478,14 @@ struct linux_fdatasync_args { struct linux_sysctl_args { char args_l_[PADL_(struct l___sysctl_args *)]; struct l___sysctl_args * args; char args_r_[PADR_(struct l___sysctl_args *)]; }; +struct linux_sched_setparam_args { + char pid_l_[PADL_(l_pid_t)]; l_pid_t pid; char pid_r_[PADR_(l_pid_t)]; + char param_l_[PADL_(struct l_sched_param *)]; struct l_sched_param * param; char param_r_[PADR_(struct l_sched_param *)]; +}; +struct linux_sched_getparam_args { + char pid_l_[PADL_(l_pid_t)]; l_pid_t pid; char pid_r_[PADR_(l_pid_t)]; + char param_l_[PADL_(struct l_sched_param *)]; struct l_sched_param * param; char param_r_[PADR_(struct l_sched_param *)]; +}; struct linux_sched_setscheduler_args { char pid_l_[PADL_(l_pid_t)]; l_pid_t pid; char pid_r_[PADR_(l_pid_t)]; char policy_l_[PADL_(l_int)]; l_int policy; char policy_r_[PADR_(l_int)]; @@ -563,7 +574,9 @@ struct linux_rt_sigtimedwait_args { char sigsetsize_l_[PADL_(l_size_t)]; l_size_t sigsetsize; char sigsetsize_r_[PADR_(l_size_t)]; }; struct linux_rt_sigqueueinfo_args { - register_t dummy; + char pid_l_[PADL_(l_pid_t)]; l_pid_t pid; char pid_r_[PADR_(l_pid_t)]; + char sig_l_[PADL_(l_int)]; l_int sig; char sig_r_[PADR_(l_int)]; + char info_l_[PADL_(l_siginfo_t *)]; l_siginfo_t * info; char info_r_[PADR_(l_siginfo_t *)]; }; struct linux_rt_sigsuspend_args { char newset_l_[PADL_(l_sigset_t *)]; l_sigset_t * newset; char newset_r_[PADR_(l_sigset_t *)]; @@ -766,13 +779,19 @@ struct linux_lookup_dcookie_args { register_t dummy; }; struct linux_epoll_create_args { - register_t dummy; + char size_l_[PADL_(l_int)]; l_int size; char size_r_[PADR_(l_int)]; }; struct linux_epoll_ctl_args { - register_t dummy; + char epfd_l_[PADL_(l_int)]; l_int epfd; char epfd_r_[PADR_(l_int)]; + char op_l_[PADL_(l_int)]; l_int op; char op_r_[PADR_(l_int)]; + char fd_l_[PADL_(l_int)]; l_int fd; char fd_r_[PADR_(l_int)]; + char event_l_[PADL_(struct epoll_event *)]; struct epoll_event * event; char event_r_[PADR_(struct epoll_event *)]; }; struct linux_epoll_wait_args { - register_t dummy; + char epfd_l_[PADL_(l_int)]; l_int epfd; char epfd_r_[PADR_(l_int)]; + char events_l_[PADL_(struct epoll_event *)]; struct epoll_event * events; char events_r_[PADR_(struct epoll_event *)]; + char maxevents_l_[PADL_(l_int)]; l_int maxevents; char maxevents_r_[PADR_(l_int)]; + char timeout_l_[PADL_(l_int)]; l_int timeout; char timeout_r_[PADR_(l_int)]; }; struct linux_remap_file_pages_args { register_t dummy; @@ -873,7 +892,11 @@ struct linux_kexec_load_args { register_t dummy; }; struct linux_waitid_args { - register_t dummy; + char idtype_l_[PADL_(int)]; int idtype; char idtype_r_[PADR_(int)]; + char id_l_[PADL_(l_pid_t)]; l_pid_t id; char id_r_[PADR_(l_pid_t)]; + char info_l_[PADL_(l_siginfo_t *)]; l_siginfo_t * info; char info_r_[PADR_(l_siginfo_t *)]; + char options_l_[PADL_(int)]; int options; char options_r_[PADR_(int)]; + char rusage_l_[PADL_(struct l_rusage *)]; struct l_rusage * rusage; char rusage_r_[PADR_(struct l_rusage *)]; }; struct linux_add_key_args { register_t dummy; @@ -975,13 +998,21 @@ struct linux_faccessat_args { char dfd_l_[PADL_(l_int)]; l_int dfd; char dfd_r_[PADR_(l_int)]; char filename_l_[PADL_(const char *)]; const char * filename; char filename_r_[PADR_(const char *)]; char amode_l_[PADL_(l_int)]; l_int amode; char amode_r_[PADR_(l_int)]; - char flag_l_[PADL_(int)]; int flag; char flag_r_[PADR_(int)]; }; struct linux_pselect6_args { - register_t dummy; + char nfds_l_[PADL_(l_int)]; l_int nfds; char nfds_r_[PADR_(l_int)]; + char readfds_l_[PADL_(l_fd_set *)]; l_fd_set * readfds; char readfds_r_[PADR_(l_fd_set *)]; + char writefds_l_[PADL_(l_fd_set *)]; l_fd_set * writefds; char writefds_r_[PADR_(l_fd_set *)]; + char exceptfds_l_[PADL_(l_fd_set *)]; l_fd_set * exceptfds; char exceptfds_r_[PADR_(l_fd_set *)]; + char tsp_l_[PADL_(struct l_timespec *)]; struct l_timespec * tsp; char tsp_r_[PADR_(struct l_timespec *)]; + char sig_l_[PADL_(l_uintptr_t *)]; l_uintptr_t * sig; char sig_r_[PADR_(l_uintptr_t *)]; }; struct linux_ppoll_args { - register_t dummy; + char fds_l_[PADL_(struct pollfd *)]; struct pollfd * fds; char fds_r_[PADR_(struct pollfd *)]; + char nfds_l_[PADL_(uint32_t)]; uint32_t nfds; char nfds_r_[PADR_(uint32_t)]; + char tsp_l_[PADL_(struct l_timespec *)]; struct l_timespec * tsp; char tsp_r_[PADR_(struct l_timespec *)]; + char sset_l_[PADL_(l_sigset_t *)]; l_sigset_t * sset; char sset_r_[PADR_(l_sigset_t *)]; + char ssize_l_[PADL_(l_size_t)]; l_size_t ssize; char ssize_r_[PADR_(l_size_t)]; }; struct linux_unshare_args { register_t dummy; @@ -1014,10 +1045,17 @@ struct linux_getcpu_args { register_t dummy; }; struct linux_epoll_pwait_args { - register_t dummy; + char epfd_l_[PADL_(l_int)]; l_int epfd; char epfd_r_[PADR_(l_int)]; + char events_l_[PADL_(struct epoll_event *)]; struct epoll_event * events; char events_r_[PADR_(struct epoll_event *)]; + char maxevents_l_[PADL_(l_int)]; l_int maxevents; char maxevents_r_[PADR_(l_int)]; + char timeout_l_[PADL_(l_int)]; l_int timeout; char timeout_r_[PADR_(l_int)]; + char mask_l_[PADL_(l_sigset_t *)]; l_sigset_t * mask; char mask_r_[PADR_(l_sigset_t *)]; }; struct linux_utimensat_args { - register_t dummy; + char dfd_l_[PADL_(l_int)]; l_int dfd; char dfd_r_[PADR_(l_int)]; + char pathname_l_[PADL_(const char *)]; const char * pathname; char pathname_r_[PADR_(const char *)]; + char times_l_[PADL_(const struct l_timespec *)]; const struct l_timespec * times; char times_r_[PADR_(const struct l_timespec *)]; + char flags_l_[PADL_(l_int)]; l_int flags; char flags_r_[PADR_(l_int)]; }; struct linux_signalfd_args { register_t dummy; @@ -1026,10 +1064,13 @@ struct linux_timerfd_create_args { register_t dummy; }; struct linux_eventfd_args { - register_t dummy; + char initval_l_[PADL_(l_uint)]; l_uint initval; char initval_r_[PADR_(l_uint)]; }; struct linux_fallocate_args { - register_t dummy; + char fd_l_[PADL_(l_int)]; l_int fd; char fd_r_[PADR_(l_int)]; + char mode_l_[PADL_(l_int)]; l_int mode; char mode_r_[PADR_(l_int)]; + char offset_l_[PADL_(l_loff_t)]; l_loff_t offset; char offset_r_[PADR_(l_loff_t)]; + char len_l_[PADL_(l_loff_t)]; l_loff_t len; char len_r_[PADR_(l_loff_t)]; }; struct linux_timerfd_settime_args { register_t dummy; @@ -1041,13 +1082,16 @@ struct linux_signalfd4_args { register_t dummy; }; struct linux_eventfd2_args { - register_t dummy; + char initval_l_[PADL_(l_uint)]; l_uint initval; char initval_r_[PADR_(l_uint)]; + char flags_l_[PADL_(l_int)]; l_int flags; char flags_r_[PADR_(l_int)]; }; struct linux_epoll_create1_args { - register_t dummy; + char flags_l_[PADL_(l_int)]; l_int flags; char flags_r_[PADR_(l_int)]; }; struct linux_dup3_args { - register_t dummy; + char oldfd_l_[PADL_(l_int)]; l_int oldfd; char oldfd_r_[PADR_(l_int)]; + char newfd_l_[PADL_(l_int)]; l_int newfd; char newfd_r_[PADR_(l_int)]; + char flags_l_[PADL_(l_int)]; l_int flags; char flags_r_[PADR_(l_int)]; }; struct linux_pipe2_args { char pipefds_l_[PADL_(l_int *)]; l_int * pipefds; char pipefds_r_[PADR_(l_int *)]; @@ -1069,7 +1113,11 @@ struct linux_perf_event_open_args { register_t dummy; }; struct linux_recvmmsg_args { - register_t dummy; + char s_l_[PADL_(l_int)]; l_int s; char s_r_[PADR_(l_int)]; + char msg_l_[PADL_(struct l_mmsghdr *)]; struct l_mmsghdr * msg; char msg_r_[PADR_(struct l_mmsghdr *)]; + char vlen_l_[PADL_(l_uint)]; l_uint vlen; char vlen_r_[PADR_(l_uint)]; + char flags_l_[PADL_(l_uint)]; l_uint flags; char flags_r_[PADR_(l_uint)]; + char timeout_l_[PADL_(struct l_timespec *)]; struct l_timespec * timeout; char timeout_r_[PADR_(struct l_timespec *)]; }; struct linux_fanotify_init_args { register_t dummy; @@ -1078,7 +1126,10 @@ struct linux_fanotify_mark_args { register_t dummy; }; struct linux_prlimit64_args { - register_t dummy; + char pid_l_[PADL_(l_pid_t)]; l_pid_t pid; char pid_r_[PADR_(l_pid_t)]; + char resource_l_[PADL_(l_uint)]; l_uint resource; char resource_r_[PADR_(l_uint)]; + char new_l_[PADL_(struct rlimit *)]; struct rlimit * new; char new_r_[PADR_(struct rlimit *)]; + char old_l_[PADL_(struct rlimit *)]; struct rlimit * old; char old_r_[PADR_(struct rlimit *)]; }; struct linux_name_to_handle_at_args { register_t dummy; @@ -1090,10 +1141,13 @@ struct linux_clock_adjtime_args { register_t dummy; }; struct linux_syncfs_args { - register_t dummy; + char fd_l_[PADL_(l_int)]; l_int fd; char fd_r_[PADR_(l_int)]; }; struct linux_sendmmsg_args { - register_t dummy; + char s_l_[PADL_(l_int)]; l_int s; char s_r_[PADR_(l_int)]; + char msg_l_[PADL_(struct l_mmsghdr *)]; struct l_mmsghdr * msg; char msg_r_[PADR_(struct l_mmsghdr *)]; + char vlen_l_[PADL_(l_uint)]; l_uint vlen; char vlen_r_[PADR_(l_uint)]; + char flags_l_[PADL_(l_uint)]; l_uint flags; char flags_r_[PADR_(l_uint)]; }; struct linux_setns_args { register_t dummy; @@ -1105,6 +1159,7 @@ struct linux_process_vm_writev_args { register_t dummy; }; #define nosys linux_nosys +int linux_exit(struct thread *, struct linux_exit_args *); int linux_fork(struct thread *, struct linux_fork_args *); int linux_open(struct thread *, struct linux_open_args *); int linux_waitpid(struct thread *, struct linux_waitpid_args *); @@ -1216,6 +1271,8 @@ int linux_writev(struct thread *, struct linux_writev_args *); int linux_getsid(struct thread *, struct linux_getsid_args *); int linux_fdatasync(struct thread *, struct linux_fdatasync_args *); int linux_sysctl(struct thread *, struct linux_sysctl_args *); +int linux_sched_setparam(struct thread *, struct linux_sched_setparam_args *); +int linux_sched_getparam(struct thread *, struct linux_sched_getparam_args *); int linux_sched_setscheduler(struct thread *, struct linux_sched_setscheduler_args *); int linux_sched_getscheduler(struct thread *, struct linux_sched_getscheduler_args *); int linux_sched_get_priority_max(struct thread *, struct linux_sched_get_priority_max_args *); @@ -1407,6 +1464,7 @@ int linux_process_vm_writev(struct thread *, struct linux_process_vm_writev_args #endif /* COMPAT_FREEBSD7 */ +#define LINUX_SYS_AUE_linux_exit AUE_EXIT #define LINUX_SYS_AUE_linux_fork AUE_FORK #define LINUX_SYS_AUE_linux_open AUE_OPEN_RWTC #define LINUX_SYS_AUE_linux_waitpid AUE_WAIT4 @@ -1518,6 +1576,8 @@ int linux_process_vm_writev(struct thread *, struct linux_process_vm_writev_args #define LINUX_SYS_AUE_linux_getsid AUE_GETSID #define LINUX_SYS_AUE_linux_fdatasync AUE_NULL #define LINUX_SYS_AUE_linux_sysctl AUE_SYSCTL +#define LINUX_SYS_AUE_linux_sched_setparam AUE_SCHED_SETPARAM +#define LINUX_SYS_AUE_linux_sched_getparam AUE_SCHED_GETPARAM #define LINUX_SYS_AUE_linux_sched_setscheduler AUE_SCHED_SETSCHEDULER #define LINUX_SYS_AUE_linux_sched_getscheduler AUE_SCHED_GETSCHEDULER #define LINUX_SYS_AUE_linux_sched_get_priority_max AUE_SCHED_GET_PRIORITY_MAX @@ -1617,7 +1677,7 @@ int linux_process_vm_writev(struct thread *, struct linux_process_vm_writev_args #define LINUX_SYS_AUE_linux_mq_notify AUE_NULL #define LINUX_SYS_AUE_linux_mq_getsetattr AUE_NULL #define LINUX_SYS_AUE_linux_kexec_load AUE_NULL -#define LINUX_SYS_AUE_linux_waitid AUE_NULL +#define LINUX_SYS_AUE_linux_waitid AUE_WAIT6 #define LINUX_SYS_AUE_linux_add_key AUE_NULL #define LINUX_SYS_AUE_linux_request_key AUE_NULL #define LINUX_SYS_AUE_linux_keyctl AUE_NULL @@ -1640,8 +1700,8 @@ int linux_process_vm_writev(struct thread *, struct linux_process_vm_writev_args #define LINUX_SYS_AUE_linux_readlinkat AUE_READLINKAT #define LINUX_SYS_AUE_linux_fchmodat AUE_FCHMODAT #define LINUX_SYS_AUE_linux_faccessat AUE_FACCESSAT -#define LINUX_SYS_AUE_linux_pselect6 AUE_NULL -#define LINUX_SYS_AUE_linux_ppoll AUE_NULL +#define LINUX_SYS_AUE_linux_pselect6 AUE_SELECT +#define LINUX_SYS_AUE_linux_ppoll AUE_POLL #define LINUX_SYS_AUE_linux_unshare AUE_NULL #define LINUX_SYS_AUE_linux_set_robust_list AUE_NULL #define LINUX_SYS_AUE_linux_get_robust_list AUE_NULL @@ -1652,7 +1712,7 @@ int linux_process_vm_writev(struct thread *, struct linux_process_vm_writev_args #define LINUX_SYS_AUE_linux_move_pages AUE_NULL #define LINUX_SYS_AUE_linux_getcpu AUE_NULL #define LINUX_SYS_AUE_linux_epoll_pwait AUE_NULL -#define LINUX_SYS_AUE_linux_utimensat AUE_NULL +#define LINUX_SYS_AUE_linux_utimensat AUE_FUTIMESAT #define LINUX_SYS_AUE_linux_signalfd AUE_NULL #define LINUX_SYS_AUE_linux_timerfd_create AUE_NULL #define LINUX_SYS_AUE_linux_eventfd AUE_NULL @@ -1676,7 +1736,7 @@ int linux_process_vm_writev(struct thread *, struct linux_process_vm_writev_args #define LINUX_SYS_AUE_linux_name_to_handle_at AUE_NULL #define LINUX_SYS_AUE_linux_open_by_handle_at AUE_NULL #define LINUX_SYS_AUE_linux_clock_adjtime AUE_NULL -#define LINUX_SYS_AUE_linux_syncfs AUE_NULL +#define LINUX_SYS_AUE_linux_syncfs AUE_SYNC #define LINUX_SYS_AUE_linux_sendmmsg AUE_NULL #define LINUX_SYS_AUE_linux_setns AUE_NULL #define LINUX_SYS_AUE_linux_process_vm_readv AUE_NULL diff --git a/sys/amd64/linux32/linux32_syscall.h b/sys/amd64/linux32/linux32_syscall.h index 01fd99a88995..f2410f3a726d 100644 --- a/sys/amd64/linux32/linux32_syscall.h +++ b/sys/amd64/linux32/linux32_syscall.h @@ -3,10 +3,10 @@ * * DO NOT EDIT-- this file is automatically generated. * $FreeBSD$ - * created from FreeBSD: head/sys/amd64/linux32/syscalls.master 276508 2015-01-01 18:37:03Z dchagin + * created from FreeBSD: head/sys/amd64/linux32/syscalls.master 283492 2015-05-24 18:08:01Z dchagin */ -#define LINUX_SYS_exit 1 +#define LINUX_SYS_linux_exit 1 #define LINUX_SYS_linux_fork 2 #define LINUX_SYS_read 3 #define LINUX_SYS_write 4 @@ -143,8 +143,8 @@ #define LINUX_SYS_munlock 151 #define LINUX_SYS_mlockall 152 #define LINUX_SYS_munlockall 153 -#define LINUX_SYS_sched_setparam 154 -#define LINUX_SYS_sched_getparam 155 +#define LINUX_SYS_linux_sched_setparam 154 +#define LINUX_SYS_linux_sched_getparam 155 #define LINUX_SYS_linux_sched_setscheduler 156 #define LINUX_SYS_linux_sched_getscheduler 157 #define LINUX_SYS_sched_yield 158 @@ -321,4 +321,4 @@ #define LINUX_SYS_linux_setns 346 #define LINUX_SYS_linux_process_vm_readv 347 #define LINUX_SYS_linux_process_vm_writev 348 -#define LINUX_SYS_MAXSYSCALL 349 +#define LINUX_SYS_MAXSYSCALL 350 diff --git a/sys/amd64/linux32/linux32_syscalls.c b/sys/amd64/linux32/linux32_syscalls.c index cb8045892af1..6f26207c2fd2 100644 --- a/sys/amd64/linux32/linux32_syscalls.c +++ b/sys/amd64/linux32/linux32_syscalls.c @@ -3,13 +3,13 @@ * * DO NOT EDIT-- this file is automatically generated. * $FreeBSD$ - * created from FreeBSD: head/sys/amd64/linux32/syscalls.master 276508 2015-01-01 18:37:03Z dchagin + * created from FreeBSD: head/sys/amd64/linux32/syscalls.master 283492 2015-05-24 18:08:01Z dchagin */ const char *linux_syscallnames[] = { #define nosys linux_nosys "#0", /* 0 = setup */ - "exit", /* 1 = exit */ + "linux_exit", /* 1 = linux_exit */ "linux_fork", /* 2 = linux_fork */ "read", /* 3 = read */ "write", /* 4 = write */ @@ -162,8 +162,8 @@ const char *linux_syscallnames[] = { "munlock", /* 151 = munlock */ "mlockall", /* 152 = mlockall */ "munlockall", /* 153 = munlockall */ - "sched_setparam", /* 154 = sched_setparam */ - "sched_getparam", /* 155 = sched_getparam */ + "linux_sched_setparam", /* 154 = linux_sched_setparam */ + "linux_sched_getparam", /* 155 = linux_sched_getparam */ "linux_sched_setscheduler", /* 156 = linux_sched_setscheduler */ "linux_sched_getscheduler", /* 157 = linux_sched_getscheduler */ "sched_yield", /* 158 = sched_yield */ @@ -357,4 +357,5 @@ const char *linux_syscallnames[] = { "linux_setns", /* 346 = linux_setns */ "linux_process_vm_readv", /* 347 = linux_process_vm_readv */ "linux_process_vm_writev", /* 348 = linux_process_vm_writev */ + "#349", /* 349 = nosys */ }; diff --git a/sys/amd64/linux32/linux32_sysent.c b/sys/amd64/linux32/linux32_sysent.c index 4fee146d43b8..004b886936e0 100644 --- a/sys/amd64/linux32/linux32_sysent.c +++ b/sys/amd64/linux32/linux32_sysent.c @@ -3,7 +3,7 @@ * * DO NOT EDIT-- this file is automatically generated. * $FreeBSD$ - * created from FreeBSD: head/sys/amd64/linux32/syscalls.master 276508 2015-01-01 18:37:03Z dchagin + * created from FreeBSD: head/sys/amd64/linux32/syscalls.master 283492 2015-05-24 18:08:01Z dchagin */ #include "opt_compat.h" @@ -20,7 +20,7 @@ struct sysent linux_sysent[] = { #define nosys linux_nosys { 0, (sy_call_t *)nosys, AUE_NULL, NULL, 0, 0, 0, SY_THR_ABSENT }, /* 0 = setup */ - { AS(sys_exit_args), (sy_call_t *)sys_sys_exit, AUE_EXIT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 1 = exit */ + { AS(linux_exit_args), (sy_call_t *)linux_exit, AUE_EXIT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 1 = linux_exit */ { 0, (sy_call_t *)linux_fork, AUE_FORK, NULL, 0, 0, 0, SY_THR_STATIC }, /* 2 = linux_fork */ { AS(read_args), (sy_call_t *)sys_read, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 3 = read */ { AS(write_args), (sy_call_t *)sys_write, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 4 = write */ @@ -173,8 +173,8 @@ struct sysent linux_sysent[] = { { AS(munlock_args), (sy_call_t *)sys_munlock, AUE_MUNLOCK, NULL, 0, 0, 0, SY_THR_STATIC }, /* 151 = munlock */ { AS(mlockall_args), (sy_call_t *)sys_mlockall, AUE_MLOCKALL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 152 = mlockall */ { 0, (sy_call_t *)sys_munlockall, AUE_MUNLOCKALL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 153 = munlockall */ - { AS(sched_setparam_args), (sy_call_t *)sys_sched_setparam, AUE_SCHED_SETPARAM, NULL, 0, 0, 0, SY_THR_STATIC }, /* 154 = sched_setparam */ - { AS(sched_getparam_args), (sy_call_t *)sys_sched_getparam, AUE_SCHED_GETPARAM, NULL, 0, 0, 0, SY_THR_STATIC }, /* 155 = sched_getparam */ + { AS(linux_sched_setparam_args), (sy_call_t *)linux_sched_setparam, AUE_SCHED_SETPARAM, NULL, 0, 0, 0, SY_THR_STATIC }, /* 154 = linux_sched_setparam */ + { AS(linux_sched_getparam_args), (sy_call_t *)linux_sched_getparam, AUE_SCHED_GETPARAM, NULL, 0, 0, 0, SY_THR_STATIC }, /* 155 = linux_sched_getparam */ { AS(linux_sched_setscheduler_args), (sy_call_t *)linux_sched_setscheduler, AUE_SCHED_SETSCHEDULER, NULL, 0, 0, 0, SY_THR_STATIC }, /* 156 = linux_sched_setscheduler */ { AS(linux_sched_getscheduler_args), (sy_call_t *)linux_sched_getscheduler, AUE_SCHED_GETSCHEDULER, NULL, 0, 0, 0, SY_THR_STATIC }, /* 157 = linux_sched_getscheduler */ { 0, (sy_call_t *)sys_sched_yield, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 158 = sched_yield */ @@ -197,7 +197,7 @@ struct sysent linux_sysent[] = { { AS(linux_rt_sigprocmask_args), (sy_call_t *)linux_rt_sigprocmask, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 175 = linux_rt_sigprocmask */ { AS(linux_rt_sigpending_args), (sy_call_t *)linux_rt_sigpending, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 176 = linux_rt_sigpending */ { AS(linux_rt_sigtimedwait_args), (sy_call_t *)linux_rt_sigtimedwait, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 177 = linux_rt_sigtimedwait */ - { 0, (sy_call_t *)linux_rt_sigqueueinfo, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 178 = linux_rt_sigqueueinfo */ + { AS(linux_rt_sigqueueinfo_args), (sy_call_t *)linux_rt_sigqueueinfo, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 178 = linux_rt_sigqueueinfo */ { AS(linux_rt_sigsuspend_args), (sy_call_t *)linux_rt_sigsuspend, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 179 = linux_rt_sigsuspend */ { AS(linux_pread_args), (sy_call_t *)linux_pread, AUE_PREAD, NULL, 0, 0, 0, SY_THR_STATIC }, /* 180 = linux_pread */ { AS(linux_pwrite_args), (sy_call_t *)linux_pwrite, AUE_PWRITE, NULL, 0, 0, 0, SY_THR_STATIC }, /* 181 = linux_pwrite */ @@ -273,9 +273,9 @@ struct sysent linux_sysent[] = { { 0, (sy_call_t *)nosys, AUE_NULL, NULL, 0, 0, 0, SY_THR_ABSENT }, /* 251 = */ { AS(linux_exit_group_args), (sy_call_t *)linux_exit_group, AUE_EXIT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 252 = linux_exit_group */ { 0, (sy_call_t *)linux_lookup_dcookie, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 253 = linux_lookup_dcookie */ - { 0, (sy_call_t *)linux_epoll_create, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 254 = linux_epoll_create */ - { 0, (sy_call_t *)linux_epoll_ctl, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 255 = linux_epoll_ctl */ - { 0, (sy_call_t *)linux_epoll_wait, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 256 = linux_epoll_wait */ + { AS(linux_epoll_create_args), (sy_call_t *)linux_epoll_create, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 254 = linux_epoll_create */ + { AS(linux_epoll_ctl_args), (sy_call_t *)linux_epoll_ctl, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 255 = linux_epoll_ctl */ + { AS(linux_epoll_wait_args), (sy_call_t *)linux_epoll_wait, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 256 = linux_epoll_wait */ { 0, (sy_call_t *)linux_remap_file_pages, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 257 = linux_remap_file_pages */ { AS(linux_set_tid_address_args), (sy_call_t *)linux_set_tid_address, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 258 = linux_set_tid_address */ { AS(linux_timer_create_args), (sy_call_t *)linux_timer_create, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 259 = linux_timer_create */ @@ -303,7 +303,7 @@ struct sysent linux_sysent[] = { { 0, (sy_call_t *)linux_mq_notify, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 281 = linux_mq_notify */ { 0, (sy_call_t *)linux_mq_getsetattr, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 282 = linux_mq_getsetattr */ { 0, (sy_call_t *)linux_kexec_load, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 283 = linux_kexec_load */ - { 0, (sy_call_t *)linux_waitid, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 284 = linux_waitid */ + { AS(linux_waitid_args), (sy_call_t *)linux_waitid, AUE_WAIT6, NULL, 0, 0, 0, SY_THR_STATIC }, /* 284 = linux_waitid */ { 0, (sy_call_t *)nosys, AUE_NULL, NULL, 0, 0, 0, SY_THR_ABSENT }, /* 285 = */ { 0, (sy_call_t *)linux_add_key, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 286 = linux_add_key */ { 0, (sy_call_t *)linux_request_key, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 287 = linux_request_key */ @@ -327,8 +327,8 @@ struct sysent linux_sysent[] = { { AS(linux_readlinkat_args), (sy_call_t *)linux_readlinkat, AUE_READLINKAT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 305 = linux_readlinkat */ { AS(linux_fchmodat_args), (sy_call_t *)linux_fchmodat, AUE_FCHMODAT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 306 = linux_fchmodat */ { AS(linux_faccessat_args), (sy_call_t *)linux_faccessat, AUE_FACCESSAT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 307 = linux_faccessat */ - { 0, (sy_call_t *)linux_pselect6, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 308 = linux_pselect6 */ - { 0, (sy_call_t *)linux_ppoll, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 309 = linux_ppoll */ + { AS(linux_pselect6_args), (sy_call_t *)linux_pselect6, AUE_SELECT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 308 = linux_pselect6 */ + { AS(linux_ppoll_args), (sy_call_t *)linux_ppoll, AUE_POLL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 309 = linux_ppoll */ { 0, (sy_call_t *)linux_unshare, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 310 = linux_unshare */ { AS(linux_set_robust_list_args), (sy_call_t *)linux_set_robust_list, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 311 = linux_set_robust_list */ { AS(linux_get_robust_list_args), (sy_call_t *)linux_get_robust_list, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 312 = linux_get_robust_list */ @@ -338,34 +338,35 @@ struct sysent linux_sysent[] = { { 0, (sy_call_t *)linux_vmsplice, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 316 = linux_vmsplice */ { 0, (sy_call_t *)linux_move_pages, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 317 = linux_move_pages */ { 0, (sy_call_t *)linux_getcpu, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 318 = linux_getcpu */ - { 0, (sy_call_t *)linux_epoll_pwait, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 319 = linux_epoll_pwait */ - { 0, (sy_call_t *)linux_utimensat, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 320 = linux_utimensat */ + { AS(linux_epoll_pwait_args), (sy_call_t *)linux_epoll_pwait, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 319 = linux_epoll_pwait */ + { AS(linux_utimensat_args), (sy_call_t *)linux_utimensat, AUE_FUTIMESAT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 320 = linux_utimensat */ { 0, (sy_call_t *)linux_signalfd, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 321 = linux_signalfd */ { 0, (sy_call_t *)linux_timerfd_create, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 322 = linux_timerfd_create */ - { 0, (sy_call_t *)linux_eventfd, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 323 = linux_eventfd */ - { 0, (sy_call_t *)linux_fallocate, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 324 = linux_fallocate */ + { AS(linux_eventfd_args), (sy_call_t *)linux_eventfd, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 323 = linux_eventfd */ + { AS(linux_fallocate_args), (sy_call_t *)linux_fallocate, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 324 = linux_fallocate */ { 0, (sy_call_t *)linux_timerfd_settime, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 325 = linux_timerfd_settime */ { 0, (sy_call_t *)linux_timerfd_gettime, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 326 = linux_timerfd_gettime */ { 0, (sy_call_t *)linux_signalfd4, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 327 = linux_signalfd4 */ - { 0, (sy_call_t *)linux_eventfd2, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 328 = linux_eventfd2 */ - { 0, (sy_call_t *)linux_epoll_create1, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 329 = linux_epoll_create1 */ - { 0, (sy_call_t *)linux_dup3, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 330 = linux_dup3 */ + { AS(linux_eventfd2_args), (sy_call_t *)linux_eventfd2, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 328 = linux_eventfd2 */ + { AS(linux_epoll_create1_args), (sy_call_t *)linux_epoll_create1, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 329 = linux_epoll_create1 */ + { AS(linux_dup3_args), (sy_call_t *)linux_dup3, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 330 = linux_dup3 */ { AS(linux_pipe2_args), (sy_call_t *)linux_pipe2, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 331 = linux_pipe2 */ { 0, (sy_call_t *)linux_inotify_init1, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 332 = linux_inotify_init1 */ { 0, (sy_call_t *)linux_preadv, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 333 = linux_preadv */ { 0, (sy_call_t *)linux_pwritev, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 334 = linux_pwritev */ { 0, (sy_call_t *)linux_rt_tsigqueueinfo, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 335 = linux_rt_tsigqueueinfo */ { 0, (sy_call_t *)linux_perf_event_open, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 336 = linux_perf_event_open */ - { 0, (sy_call_t *)linux_recvmmsg, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 337 = linux_recvmmsg */ + { AS(linux_recvmmsg_args), (sy_call_t *)linux_recvmmsg, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 337 = linux_recvmmsg */ { 0, (sy_call_t *)linux_fanotify_init, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 338 = linux_fanotify_init */ { 0, (sy_call_t *)linux_fanotify_mark, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 339 = linux_fanotify_mark */ - { 0, (sy_call_t *)linux_prlimit64, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 340 = linux_prlimit64 */ + { AS(linux_prlimit64_args), (sy_call_t *)linux_prlimit64, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 340 = linux_prlimit64 */ { 0, (sy_call_t *)linux_name_to_handle_at, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 341 = linux_name_to_handle_at */ { 0, (sy_call_t *)linux_open_by_handle_at, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 342 = linux_open_by_handle_at */ { 0, (sy_call_t *)linux_clock_adjtime, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 343 = linux_clock_adjtime */ - { 0, (sy_call_t *)linux_syncfs, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 344 = linux_syncfs */ - { 0, (sy_call_t *)linux_sendmmsg, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 345 = linux_sendmmsg */ + { AS(linux_syncfs_args), (sy_call_t *)linux_syncfs, AUE_SYNC, NULL, 0, 0, 0, SY_THR_STATIC }, /* 344 = linux_syncfs */ + { AS(linux_sendmmsg_args), (sy_call_t *)linux_sendmmsg, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 345 = linux_sendmmsg */ { 0, (sy_call_t *)linux_setns, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 346 = linux_setns */ { 0, (sy_call_t *)linux_process_vm_readv, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 347 = linux_process_vm_readv */ { 0, (sy_call_t *)linux_process_vm_writev, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 348 = linux_process_vm_writev */ + { 0, (sy_call_t *)nosys, AUE_NULL, NULL, 0, 0, 0, SY_THR_ABSENT }, /* 349 = nosys */ }; diff --git a/sys/amd64/linux32/linux32_systrace_args.c b/sys/amd64/linux32/linux32_systrace_args.c index 2d563acc4180..b6ccd334178f 100644 --- a/sys/amd64/linux32/linux32_systrace_args.c +++ b/sys/amd64/linux32/linux32_systrace_args.c @@ -12,9 +12,9 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) int64_t *iarg = (int64_t *) uarg; switch (sysnum) { #define nosys linux_nosys - /* sys_exit */ + /* linux_exit */ case 1: { - struct sys_exit_args *p = params; + struct linux_exit_args *p = params; iarg[0] = p->rval; /* int */ *n_args = 1; break; @@ -1043,19 +1043,19 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) *n_args = 0; break; } - /* sched_setparam */ + /* linux_sched_setparam */ case 154: { - struct sched_setparam_args *p = params; - iarg[0] = p->pid; /* pid_t */ - uarg[1] = (intptr_t) p->param; /* const struct sched_param * */ + struct linux_sched_setparam_args *p = params; + iarg[0] = p->pid; /* l_pid_t */ + uarg[1] = (intptr_t) p->param; /* struct l_sched_param * */ *n_args = 2; break; } - /* sched_getparam */ + /* linux_sched_getparam */ case 155: { - struct sched_getparam_args *p = params; - iarg[0] = p->pid; /* pid_t */ - uarg[1] = (intptr_t) p->param; /* struct sched_param * */ + struct linux_sched_getparam_args *p = params; + iarg[0] = p->pid; /* l_pid_t */ + uarg[1] = (intptr_t) p->param; /* struct l_sched_param * */ *n_args = 2; break; } @@ -1234,7 +1234,11 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) } /* linux_rt_sigqueueinfo */ case 178: { - *n_args = 0; + struct linux_rt_sigqueueinfo_args *p = params; + iarg[0] = p->pid; /* l_pid_t */ + iarg[1] = p->sig; /* l_int */ + uarg[2] = (intptr_t) p->info; /* l_siginfo_t * */ + *n_args = 3; break; } /* linux_rt_sigsuspend */ @@ -1693,17 +1697,29 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) } /* linux_epoll_create */ case 254: { - *n_args = 0; + struct linux_epoll_create_args *p = params; + iarg[0] = p->size; /* l_int */ + *n_args = 1; break; } /* linux_epoll_ctl */ case 255: { - *n_args = 0; + struct linux_epoll_ctl_args *p = params; + iarg[0] = p->epfd; /* l_int */ + iarg[1] = p->op; /* l_int */ + iarg[2] = p->fd; /* l_int */ + uarg[3] = (intptr_t) p->event; /* struct epoll_event * */ + *n_args = 4; break; } /* linux_epoll_wait */ case 256: { - *n_args = 0; + struct linux_epoll_wait_args *p = params; + iarg[0] = p->epfd; /* l_int */ + uarg[1] = (intptr_t) p->events; /* struct epoll_event * */ + iarg[2] = p->maxevents; /* l_int */ + iarg[3] = p->timeout; /* l_int */ + *n_args = 4; break; } /* linux_remap_file_pages */ @@ -1886,7 +1902,13 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) } /* linux_waitid */ case 284: { - *n_args = 0; + struct linux_waitid_args *p = params; + iarg[0] = p->idtype; /* int */ + iarg[1] = p->id; /* l_pid_t */ + uarg[2] = (intptr_t) p->info; /* l_siginfo_t * */ + iarg[3] = p->options; /* int */ + uarg[4] = (intptr_t) p->rusage; /* struct l_rusage * */ + *n_args = 5; break; } /* linux_add_key */ @@ -2057,18 +2079,30 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) iarg[0] = p->dfd; /* l_int */ uarg[1] = (intptr_t) p->filename; /* const char * */ iarg[2] = p->amode; /* l_int */ - iarg[3] = p->flag; /* int */ - *n_args = 4; + *n_args = 3; break; } /* linux_pselect6 */ case 308: { - *n_args = 0; + struct linux_pselect6_args *p = params; + iarg[0] = p->nfds; /* l_int */ + uarg[1] = (intptr_t) p->readfds; /* l_fd_set * */ + uarg[2] = (intptr_t) p->writefds; /* l_fd_set * */ + uarg[3] = (intptr_t) p->exceptfds; /* l_fd_set * */ + uarg[4] = (intptr_t) p->tsp; /* struct l_timespec * */ + uarg[5] = (intptr_t) p->sig; /* l_uintptr_t * */ + *n_args = 6; break; } /* linux_ppoll */ case 309: { - *n_args = 0; + struct linux_ppoll_args *p = params; + uarg[0] = (intptr_t) p->fds; /* struct pollfd * */ + uarg[1] = p->nfds; /* uint32_t */ + uarg[2] = (intptr_t) p->tsp; /* struct l_timespec * */ + uarg[3] = (intptr_t) p->sset; /* l_sigset_t * */ + iarg[4] = p->ssize; /* l_size_t */ + *n_args = 5; break; } /* linux_unshare */ @@ -2125,12 +2159,23 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) } /* linux_epoll_pwait */ case 319: { - *n_args = 0; + struct linux_epoll_pwait_args *p = params; + iarg[0] = p->epfd; /* l_int */ + uarg[1] = (intptr_t) p->events; /* struct epoll_event * */ + iarg[2] = p->maxevents; /* l_int */ + iarg[3] = p->timeout; /* l_int */ + uarg[4] = (intptr_t) p->mask; /* l_sigset_t * */ + *n_args = 5; break; } /* linux_utimensat */ case 320: { - *n_args = 0; + struct linux_utimensat_args *p = params; + iarg[0] = p->dfd; /* l_int */ + uarg[1] = (intptr_t) p->pathname; /* const char * */ + uarg[2] = (intptr_t) p->times; /* const struct l_timespec * */ + iarg[3] = p->flags; /* l_int */ + *n_args = 4; break; } /* linux_signalfd */ @@ -2145,12 +2190,19 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) } /* linux_eventfd */ case 323: { - *n_args = 0; + struct linux_eventfd_args *p = params; + iarg[0] = p->initval; /* l_uint */ + *n_args = 1; break; } /* linux_fallocate */ case 324: { - *n_args = 0; + struct linux_fallocate_args *p = params; + iarg[0] = p->fd; /* l_int */ + iarg[1] = p->mode; /* l_int */ + iarg[2] = p->offset; /* l_loff_t */ + iarg[3] = p->len; /* l_loff_t */ + *n_args = 4; break; } /* linux_timerfd_settime */ @@ -2170,17 +2222,26 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) } /* linux_eventfd2 */ case 328: { - *n_args = 0; + struct linux_eventfd2_args *p = params; + iarg[0] = p->initval; /* l_uint */ + iarg[1] = p->flags; /* l_int */ + *n_args = 2; break; } /* linux_epoll_create1 */ case 329: { - *n_args = 0; + struct linux_epoll_create1_args *p = params; + iarg[0] = p->flags; /* l_int */ + *n_args = 1; break; } /* linux_dup3 */ case 330: { - *n_args = 0; + struct linux_dup3_args *p = params; + iarg[0] = p->oldfd; /* l_int */ + iarg[1] = p->newfd; /* l_int */ + iarg[2] = p->flags; /* l_int */ + *n_args = 3; break; } /* linux_pipe2 */ @@ -2218,7 +2279,13 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) } /* linux_recvmmsg */ case 337: { - *n_args = 0; + struct linux_recvmmsg_args *p = params; + iarg[0] = p->s; /* l_int */ + uarg[1] = (intptr_t) p->msg; /* struct l_mmsghdr * */ + iarg[2] = p->vlen; /* l_uint */ + iarg[3] = p->flags; /* l_uint */ + uarg[4] = (intptr_t) p->timeout; /* struct l_timespec * */ + *n_args = 5; break; } /* linux_fanotify_init */ @@ -2233,7 +2300,12 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) } /* linux_prlimit64 */ case 340: { - *n_args = 0; + struct linux_prlimit64_args *p = params; + iarg[0] = p->pid; /* l_pid_t */ + iarg[1] = p->resource; /* l_uint */ + uarg[2] = (intptr_t) p->new; /* struct rlimit * */ + uarg[3] = (intptr_t) p->old; /* struct rlimit * */ + *n_args = 4; break; } /* linux_name_to_handle_at */ @@ -2253,12 +2325,19 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) } /* linux_syncfs */ case 344: { - *n_args = 0; + struct linux_syncfs_args *p = params; + iarg[0] = p->fd; /* l_int */ + *n_args = 1; break; } /* linux_sendmmsg */ case 345: { - *n_args = 0; + struct linux_sendmmsg_args *p = params; + iarg[0] = p->s; /* l_int */ + uarg[1] = (intptr_t) p->msg; /* struct l_mmsghdr * */ + iarg[2] = p->vlen; /* l_uint */ + iarg[3] = p->flags; /* l_uint */ + *n_args = 4; break; } /* linux_setns */ @@ -2287,7 +2366,7 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) const char *p = NULL; switch (sysnum) { #define nosys linux_nosys - /* sys_exit */ + /* linux_exit */ case 1: switch(ndx) { case 0: @@ -3848,27 +3927,27 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) /* munlockall */ case 153: break; - /* sched_setparam */ + /* linux_sched_setparam */ case 154: switch(ndx) { case 0: - p = "pid_t"; + p = "l_pid_t"; break; case 1: - p = "const struct sched_param *"; + p = "struct l_sched_param *"; break; default: break; }; break; - /* sched_getparam */ + /* linux_sched_getparam */ case 155: switch(ndx) { case 0: - p = "pid_t"; + p = "l_pid_t"; break; case 1: - p = "struct sched_param *"; + p = "struct l_sched_param *"; break; default: break; @@ -4161,6 +4240,19 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; /* linux_rt_sigqueueinfo */ case 178: + switch(ndx) { + case 0: + p = "l_pid_t"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "l_siginfo_t *"; + break; + default: + break; + }; break; /* linux_rt_sigsuspend */ case 179: @@ -4823,12 +4915,51 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; /* linux_epoll_create */ case 254: + switch(ndx) { + case 0: + p = "l_int"; + break; + default: + break; + }; break; /* linux_epoll_ctl */ case 255: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "l_int"; + break; + case 3: + p = "struct epoll_event *"; + break; + default: + break; + }; break; /* linux_epoll_wait */ case 256: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "struct epoll_event *"; + break; + case 2: + p = "l_int"; + break; + case 3: + p = "l_int"; + break; + default: + break; + }; break; /* linux_remap_file_pages */ case 257: @@ -5068,6 +5199,25 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; /* linux_waitid */ case 284: + switch(ndx) { + case 0: + p = "int"; + break; + case 1: + p = "l_pid_t"; + break; + case 2: + p = "l_siginfo_t *"; + break; + case 3: + p = "int"; + break; + case 4: + p = "struct l_rusage *"; + break; + default: + break; + }; break; /* linux_add_key */ case 286: @@ -5327,18 +5477,56 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) case 2: p = "l_int"; break; - case 3: - p = "int"; - break; default: break; }; break; /* linux_pselect6 */ case 308: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_fd_set *"; + break; + case 2: + p = "l_fd_set *"; + break; + case 3: + p = "l_fd_set *"; + break; + case 4: + p = "struct l_timespec *"; + break; + case 5: + p = "l_uintptr_t *"; + break; + default: + break; + }; break; /* linux_ppoll */ case 309: + switch(ndx) { + case 0: + p = "struct pollfd *"; + break; + case 1: + p = "uint32_t"; + break; + case 2: + p = "struct l_timespec *"; + break; + case 3: + p = "l_sigset_t *"; + break; + case 4: + p = "l_size_t"; + break; + default: + break; + }; break; /* linux_unshare */ case 310: @@ -5392,9 +5580,44 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; /* linux_epoll_pwait */ case 319: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "struct epoll_event *"; + break; + case 2: + p = "l_int"; + break; + case 3: + p = "l_int"; + break; + case 4: + p = "l_sigset_t *"; + break; + default: + break; + }; break; /* linux_utimensat */ case 320: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "const char *"; + break; + case 2: + p = "const struct l_timespec *"; + break; + case 3: + p = "l_int"; + break; + default: + break; + }; break; /* linux_signalfd */ case 321: @@ -5404,9 +5627,32 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; /* linux_eventfd */ case 323: + switch(ndx) { + case 0: + p = "l_uint"; + break; + default: + break; + }; break; /* linux_fallocate */ case 324: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "l_loff_t"; + break; + case 3: + p = "l_loff_t"; + break; + default: + break; + }; break; /* linux_timerfd_settime */ case 325: @@ -5419,12 +5665,42 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; /* linux_eventfd2 */ case 328: + switch(ndx) { + case 0: + p = "l_uint"; + break; + case 1: + p = "l_int"; + break; + default: + break; + }; break; /* linux_epoll_create1 */ case 329: + switch(ndx) { + case 0: + p = "l_int"; + break; + default: + break; + }; break; /* linux_dup3 */ case 330: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "l_int"; + break; + default: + break; + }; break; /* linux_pipe2 */ case 331: @@ -5456,6 +5732,25 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; /* linux_recvmmsg */ case 337: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "struct l_mmsghdr *"; + break; + case 2: + p = "l_uint"; + break; + case 3: + p = "l_uint"; + break; + case 4: + p = "struct l_timespec *"; + break; + default: + break; + }; break; /* linux_fanotify_init */ case 338: @@ -5465,6 +5760,22 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; /* linux_prlimit64 */ case 340: + switch(ndx) { + case 0: + p = "l_pid_t"; + break; + case 1: + p = "l_uint"; + break; + case 2: + p = "struct rlimit *"; + break; + case 3: + p = "struct rlimit *"; + break; + default: + break; + }; break; /* linux_name_to_handle_at */ case 341: @@ -5477,9 +5788,32 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; /* linux_syncfs */ case 344: + switch(ndx) { + case 0: + p = "l_int"; + break; + default: + break; + }; break; /* linux_sendmmsg */ case 345: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "struct l_mmsghdr *"; + break; + case 2: + p = "l_uint"; + break; + case 3: + p = "l_uint"; + break; + default: + break; + }; break; /* linux_setns */ case 346: @@ -5502,7 +5836,7 @@ systrace_return_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) const char *p = NULL; switch (sysnum) { #define nosys linux_nosys - /* sys_exit */ + /* linux_exit */ case 1: if (ndx == 0 || ndx == 1) p = "void"; @@ -6112,12 +6446,12 @@ systrace_return_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; /* munlockall */ case 153: - /* sched_setparam */ + /* linux_sched_setparam */ case 154: if (ndx == 0 || ndx == 1) p = "int"; break; - /* sched_getparam */ + /* linux_sched_getparam */ case 155: if (ndx == 0 || ndx == 1) p = "int"; @@ -6220,6 +6554,9 @@ systrace_return_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; /* linux_rt_sigqueueinfo */ case 178: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_rt_sigsuspend */ case 179: if (ndx == 0 || ndx == 1) @@ -6469,10 +6806,19 @@ systrace_return_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) case 253: /* linux_epoll_create */ case 254: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_epoll_ctl */ case 255: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_epoll_wait */ case 256: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_remap_file_pages */ case 257: /* linux_set_tid_address */ @@ -6569,6 +6915,9 @@ systrace_return_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) case 283: /* linux_waitid */ case 284: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_add_key */ case 286: /* linux_request_key */ @@ -6654,8 +7003,14 @@ systrace_return_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; /* linux_pselect6 */ case 308: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_ppoll */ case 309: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_unshare */ case 310: /* linux_set_robust_list */ @@ -6682,16 +7037,28 @@ systrace_return_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) case 318: /* linux_epoll_pwait */ case 319: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_utimensat */ case 320: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_signalfd */ case 321: /* linux_timerfd_create */ case 322: /* linux_eventfd */ case 323: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_fallocate */ case 324: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_timerfd_settime */ case 325: /* linux_timerfd_gettime */ @@ -6700,10 +7067,19 @@ systrace_return_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) case 327: /* linux_eventfd2 */ case 328: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_epoll_create1 */ case 329: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_dup3 */ case 330: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_pipe2 */ case 331: if (ndx == 0 || ndx == 1) @@ -6721,12 +7097,18 @@ systrace_return_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) case 336: /* linux_recvmmsg */ case 337: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_fanotify_init */ case 338: /* linux_fanotify_mark */ case 339: /* linux_prlimit64 */ case 340: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_name_to_handle_at */ case 341: /* linux_open_by_handle_at */ @@ -6735,8 +7117,14 @@ systrace_return_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) case 343: /* linux_syncfs */ case 344: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_sendmmsg */ case 345: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_setns */ case 346: /* linux_process_vm_readv */ diff --git a/sys/amd64/linux32/linux32_sysvec.c b/sys/amd64/linux32/linux32_sysvec.c index c06ce1198f86..4364438c6075 100644 --- a/sys/amd64/linux32/linux32_sysvec.c +++ b/sys/amd64/linux32/linux32_sysvec.c @@ -83,11 +83,10 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include MODULE_VERSION(linux, 1); -MALLOC_DEFINE(M_LINUX, "linux", "Linux mode structures"); - #define AUXARGS_ENTRY_32(pos, id, val) \ do { \ suword32(pos++, id); \ @@ -109,15 +108,16 @@ MALLOC_DEFINE(M_LINUX, "linux", "Linux mode structures"); #define LINUX_SYS_linux_rt_sendsig 0 #define LINUX_SYS_linux_sendsig 0 -const char *linux_platform = "i686"; -static int linux_szplatform; -extern char linux_sigcode[]; -extern int linux_szsigcode; +const char *linux_kplatform; +static int linux_szsigcode; +static vm_object_t linux_shared_page_obj; +static char *linux_shared_page_mapping; +extern char _binary_linux32_locore_o_start; +extern char _binary_linux32_locore_o_end; extern struct sysent linux_sysent[LINUX_SYS_MAXSYSCALL]; SET_DECLARE(linux_ioctl_handler_set, struct linux_ioctl_handler); -SET_DECLARE(linux_device_handler_set, struct linux_device_handler); static int elf_linux_fixup(register_t **stack_base, struct image_params *iparams); @@ -127,9 +127,8 @@ static void exec_linux_setregs(struct thread *td, struct image_params *imgp, u_long stack); static void linux32_fixlimit(struct rlimit *rl, int which); static boolean_t linux32_trans_osrel(const Elf_Note *note, int32_t *osrel); - -static eventhandler_tag linux_exit_tag; -static eventhandler_tag linux_exec_tag; +static void linux_vdso_install(void *param); +static void linux_vdso_deinstall(void *param); /* * Linux syscalls return negative errno's, we do positive and map them @@ -151,28 +150,6 @@ static int bsd_to_linux_errno[ELAST + 1] = { -72, -67, -71 }; -int bsd_to_linux_signal[LINUX_SIGTBLSZ] = { - LINUX_SIGHUP, LINUX_SIGINT, LINUX_SIGQUIT, LINUX_SIGILL, - LINUX_SIGTRAP, LINUX_SIGABRT, 0, LINUX_SIGFPE, - LINUX_SIGKILL, LINUX_SIGBUS, LINUX_SIGSEGV, LINUX_SIGSYS, - LINUX_SIGPIPE, LINUX_SIGALRM, LINUX_SIGTERM, LINUX_SIGURG, - LINUX_SIGSTOP, LINUX_SIGTSTP, LINUX_SIGCONT, LINUX_SIGCHLD, - LINUX_SIGTTIN, LINUX_SIGTTOU, LINUX_SIGIO, LINUX_SIGXCPU, - LINUX_SIGXFSZ, LINUX_SIGVTALRM, LINUX_SIGPROF, LINUX_SIGWINCH, - 0, LINUX_SIGUSR1, LINUX_SIGUSR2 -}; - -int linux_to_bsd_signal[LINUX_SIGTBLSZ] = { - SIGHUP, SIGINT, SIGQUIT, SIGILL, - SIGTRAP, SIGABRT, SIGBUS, SIGFPE, - SIGKILL, SIGUSR1, SIGSEGV, SIGUSR2, - SIGPIPE, SIGALRM, SIGTERM, SIGBUS, - SIGCHLD, SIGCONT, SIGSTOP, SIGTSTP, - SIGTTIN, SIGTTOU, SIGURG, SIGXCPU, - SIGXFSZ, SIGVTALRM, SIGPROF, SIGWINCH, - SIGIO, SIGURG, SIGSYS -}; - #define LINUX_T_UNKNOWN 255 static int _bsd_to_linux_trapcode[] = { LINUX_T_UNKNOWN, /* 0 */ @@ -219,6 +196,11 @@ struct linux32_ps_strings { u_int ps_nenvstr; /* the number of environment strings */ }; +LINUX_VDSO_SYM_INTPTR(linux32_sigcode); +LINUX_VDSO_SYM_INTPTR(linux32_rt_sigcode); +LINUX_VDSO_SYM_INTPTR(linux32_vsyscall); +LINUX_VDSO_SYM_CHAR(linux_platform); + /* * If FreeBSD & Linux have a difference of opinion about what a trap * means, deal with it here. @@ -246,11 +228,10 @@ elf_linux_fixup(register_t **stack_base, struct image_params *imgp) { Elf32_Auxargs *args; Elf32_Addr *base; - Elf32_Addr *pos, *uplatform; + Elf32_Addr *pos; struct linux32_ps_strings *arginfo; arginfo = (struct linux32_ps_strings *)LINUX32_PS_STRINGS; - uplatform = (Elf32_Addr *)((caddr_t)arginfo - linux_szplatform); KASSERT(curthread->td_proc == imgp->proc, ("unsafe elf_linux_fixup(), should be curproc")); @@ -258,6 +239,9 @@ elf_linux_fixup(register_t **stack_base, struct image_params *imgp) args = (Elf32_Auxargs *)imgp->auxargs; pos = base + (imgp->args->argc + imgp->args->envc + 2); + AUXARGS_ENTRY_32(pos, LINUX_AT_SYSINFO_EHDR, + imgp->proc->p_sysent->sv_shared_page_base); + AUXARGS_ENTRY_32(pos, LINUX_AT_SYSINFO, linux32_vsyscall); AUXARGS_ENTRY_32(pos, LINUX_AT_HWCAP, cpu_feature); /* @@ -282,7 +266,10 @@ elf_linux_fixup(register_t **stack_base, struct image_params *imgp) AUXARGS_ENTRY_32(pos, AT_EUID, imgp->proc->p_ucred->cr_svuid); AUXARGS_ENTRY_32(pos, AT_GID, imgp->proc->p_ucred->cr_rgid); AUXARGS_ENTRY_32(pos, AT_EGID, imgp->proc->p_ucred->cr_svgid); - AUXARGS_ENTRY_32(pos, LINUX_AT_PLATFORM, PTROUT(uplatform)); + AUXARGS_ENTRY_32(pos, LINUX_AT_PLATFORM, PTROUT(linux_platform)); + AUXARGS_ENTRY(pos, LINUX_AT_RANDOM, PTROUT(imgp->canary)); + if (imgp->execpathp != 0) + AUXARGS_ENTRY(pos, LINUX_AT_EXECFN, PTROUT(imgp->execpathp)); if (args->execfd != -1) AUXARGS_ENTRY_32(pos, AT_EXECFD, args->execfd); AUXARGS_ENTRY_32(pos, AT_NULL, 0); @@ -293,11 +280,9 @@ elf_linux_fixup(register_t **stack_base, struct image_params *imgp) base--; suword32(base, (uint32_t)imgp->args->argc); *stack_base = (register_t *)base; - return 0; + return (0); } -extern unsigned long linux_sznonrtsigcode; - static void linux_rt_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) { @@ -337,9 +322,7 @@ linux_rt_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) /* * Build the argument list for the signal handler. */ - if (p->p_sysent->sv_sigtbl) - if (sig <= p->p_sysent->sv_sigsize) - sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; + sig = bsd_to_linux_signal(sig); bzero(&frame, sizeof(frame)); @@ -352,7 +335,8 @@ linux_rt_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) ksiginfo_to_lsiginfo(ksi, &frame.sf_si, sig); /* - * Build the signal context to be used by sigreturn. + * Build the signal context to be used by sigreturn + * and libgcc unwind. */ frame.sf_sc.uc_flags = 0; /* XXX ??? */ frame.sf_sc.uc_link = 0; /* XXX ??? */ @@ -365,11 +349,12 @@ linux_rt_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) bsd_to_linux_sigset(mask, &frame.sf_sc.uc_sigmask); - frame.sf_sc.uc_mcontext.sc_mask = frame.sf_sc.uc_sigmask.__bits[0]; + frame.sf_sc.uc_mcontext.sc_mask = frame.sf_sc.uc_sigmask.__mask; frame.sf_sc.uc_mcontext.sc_edi = regs->tf_rdi; frame.sf_sc.uc_mcontext.sc_esi = regs->tf_rsi; frame.sf_sc.uc_mcontext.sc_ebp = regs->tf_rbp; frame.sf_sc.uc_mcontext.sc_ebx = regs->tf_rbx; + frame.sf_sc.uc_mcontext.sc_esp = regs->tf_rsp; frame.sf_sc.uc_mcontext.sc_edx = regs->tf_rdx; frame.sf_sc.uc_mcontext.sc_ecx = regs->tf_rcx; frame.sf_sc.uc_mcontext.sc_eax = regs->tf_rax; @@ -411,7 +396,7 @@ linux_rt_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) * Build context to run handler in. */ regs->tf_rsp = PTROUT(fp); - regs->tf_rip = p->p_sysent->sv_sigcode_base + linux_sznonrtsigcode; + regs->tf_rip = linux32_rt_sigcode; regs->tf_rflags &= ~(PSL_T | PSL_D); regs->tf_cs = _ucode32sel; regs->tf_ss = _udatasel; @@ -445,7 +430,7 @@ linux_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) struct trapframe *regs; struct l_sigframe *fp, frame; l_sigset_t lmask; - int oonstack, i; + int oonstack; int sig, code; sig = ksi->ksi_signo; @@ -483,9 +468,7 @@ linux_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) /* * Build the argument list for the signal handler. */ - if (p->p_sysent->sv_sigtbl) - if (sig <= p->p_sysent->sv_sigsize) - sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; + sig = bsd_to_linux_signal(sig); bzero(&frame, sizeof(frame)); @@ -497,7 +480,7 @@ linux_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) /* * Build the signal context to be used by sigreturn. */ - frame.sf_sc.sc_mask = lmask.__bits[0]; + frame.sf_sc.sc_mask = lmask.__mask; frame.sf_sc.sc_gs = regs->tf_gs; frame.sf_sc.sc_fs = regs->tf_fs; frame.sf_sc.sc_es = regs->tf_es; @@ -506,6 +489,7 @@ linux_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) frame.sf_sc.sc_esi = regs->tf_rsi; frame.sf_sc.sc_ebp = regs->tf_rbp; frame.sf_sc.sc_ebx = regs->tf_rbx; + frame.sf_sc.sc_esp = regs->tf_rsp; frame.sf_sc.sc_edx = regs->tf_rdx; frame.sf_sc.sc_ecx = regs->tf_rcx; frame.sf_sc.sc_eax = regs->tf_rax; @@ -518,8 +502,7 @@ linux_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) frame.sf_sc.sc_cr2 = (u_int32_t)(uintptr_t)ksi->ksi_addr; frame.sf_sc.sc_trapno = bsd_to_linux_trapcode(code); - for (i = 0; i < (LINUX_NSIG_WORDS-1); i++) - frame.sf_extramask[i] = lmask.__bits[i+1]; + frame.sf_extramask[0] = lmask.__mask; if (copyout(&frame, fp, sizeof(frame)) != 0) { /* @@ -534,7 +517,7 @@ linux_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) * Build context to run handler in. */ regs->tf_rsp = PTROUT(fp); - regs->tf_rip = p->p_sysent->sv_sigcode_base; + regs->tf_rip = linux32_sigcode; regs->tf_rflags &= ~(PSL_T | PSL_D); regs->tf_cs = _ucode32sel; regs->tf_ss = _udatasel; @@ -565,7 +548,7 @@ linux_sigreturn(struct thread *td, struct linux_sigreturn_args *args) struct trapframe *regs; sigset_t bmask; l_sigset_t lmask; - int eflags, i; + int eflags; ksiginfo_t ksi; regs = td->td_frame; @@ -606,9 +589,8 @@ linux_sigreturn(struct thread *td, struct linux_sigreturn_args *args) return(EINVAL); } - lmask.__bits[0] = frame.sf_sc.sc_mask; - for (i = 0; i < (LINUX_NSIG_WORDS-1); i++) - lmask.__bits[i+1] = frame.sf_extramask[i]; + lmask.__mask = frame.sf_sc.sc_mask; + lmask.__mask = frame.sf_extramask[0]; linux_to_bsd_sigset(&lmask, &bmask); kern_sigprocmask(td, SIG_SETMASK, &bmask, NULL, 0); @@ -758,7 +740,8 @@ linux32_fetch_syscall_args(struct thread *td, struct syscall_args *sa) sa->code = frame->tf_rax; if (sa->code >= p->p_sysent->sv_size) - sa->callp = &p->p_sysent->sv_table[0]; + /* nosys */ + sa->callp = &p->p_sysent->sv_table[LINUX_SYS_MAXSYSCALL]; else sa->callp = &p->p_sysent->sv_table[sa->code]; sa->narg = sa->callp->sy_narg; @@ -862,21 +845,36 @@ linux_copyout_strings(struct image_params *imgp) char *stringp, *destp; u_int32_t *stack_base; struct linux32_ps_strings *arginfo; + char canary[LINUX_AT_RANDOM_LEN]; + size_t execpath_len; /* * Calculate string base and vector table pointers. - * Also deal with signal trampoline code for this exec type. */ + if (imgp->execpath != NULL && imgp->auxargs != NULL) + execpath_len = strlen(imgp->execpath) + 1; + else + execpath_len = 0; + arginfo = (struct linux32_ps_strings *)LINUX32_PS_STRINGS; - destp = (caddr_t)arginfo - SPARE_USRSPACE - linux_szplatform - - roundup((ARG_MAX - imgp->args->stringspace), - sizeof(char *)); + destp = (caddr_t)arginfo - SPARE_USRSPACE - + roundup(sizeof(canary), sizeof(char *)) - + roundup(execpath_len, sizeof(char *)) - + roundup((ARG_MAX - imgp->args->stringspace), sizeof(char *)); + + if (execpath_len != 0) { + imgp->execpathp = (uintptr_t)arginfo - execpath_len; + copyout(imgp->execpath, (void *)imgp->execpathp, execpath_len); + } /* - * Install LINUX_PLATFORM + * Prepare the canary for SSP. */ - copyout(linux_platform, ((caddr_t)arginfo - linux_szplatform), - linux_szplatform); + arc4rand(canary, sizeof(canary), 0); + imgp->canary = (uintptr_t)arginfo - + roundup(execpath_len, sizeof(char *)) - + roundup(sizeof(canary), sizeof(char *)); + copyout(canary, (void *)imgp->canary, sizeof(canary)); /* * If we have a valid auxargs ptr, prepare some room @@ -970,6 +968,13 @@ static u_long linux32_maxvmem = LINUX32_MAXVMEM; SYSCTL_ULONG(_compat_linux32, OID_AUTO, maxvmem, CTLFLAG_RW, &linux32_maxvmem, 0, ""); +#if defined(DEBUG) +SYSCTL_PROC(_compat_linux32, OID_AUTO, debug, + CTLTYPE_STRING | CTLFLAG_RW, + 0, 0, linux_sysctl_debug, "A", + "Linux debugging control"); +#endif + static void linux32_fixlimit(struct rlimit *rl, int which) { @@ -1006,14 +1011,14 @@ struct sysentvec elf_linux_sysvec = { .sv_size = LINUX_SYS_MAXSYSCALL, .sv_table = linux_sysent, .sv_mask = 0, - .sv_sigsize = LINUX_SIGTBLSZ, - .sv_sigtbl = bsd_to_linux_signal, + .sv_sigsize = 0, + .sv_sigtbl = NULL, .sv_errsize = ELAST + 1, .sv_errtbl = bsd_to_linux_errno, .sv_transtrap = translate_traps, .sv_fixup = elf_linux_fixup, .sv_sendsig = linux_sendsig, - .sv_sigcode = linux_sigcode, + .sv_sigcode = &_binary_linux32_locore_o_start, .sv_szsigcode = &linux_szsigcode, .sv_prepsyscall = NULL, .sv_name = "Linux ELF32", @@ -1037,8 +1042,44 @@ struct sysentvec elf_linux_sysvec = { .sv_shared_page_base = LINUX32_SHAREDPAGE, .sv_shared_page_len = PAGE_SIZE, .sv_schedtail = linux_schedtail, + .sv_thread_detach = linux_thread_detach, }; -INIT_SYSENTVEC(elf_sysvec, &elf_linux_sysvec); + +static void +linux_vdso_install(void *param) +{ + + linux_szsigcode = (&_binary_linux32_locore_o_end - + &_binary_linux32_locore_o_start); + + if (linux_szsigcode > elf_linux_sysvec.sv_shared_page_len) + panic("Linux invalid vdso size\n"); + + __elfN(linux_vdso_fixup)(&elf_linux_sysvec); + + linux_shared_page_obj = __elfN(linux_shared_page_init) + (&linux_shared_page_mapping); + + __elfN(linux_vdso_reloc)(&elf_linux_sysvec, LINUX32_SHAREDPAGE); + + bcopy(elf_linux_sysvec.sv_sigcode, linux_shared_page_mapping, + linux_szsigcode); + elf_linux_sysvec.sv_shared_page_obj = linux_shared_page_obj; + + linux_kplatform = linux_shared_page_mapping + + (linux_platform - (caddr_t)LINUX32_SHAREDPAGE); +} +SYSINIT(elf_linux_vdso_init, SI_SUB_EXEC, SI_ORDER_ANY, + (sysinit_cfunc_t)linux_vdso_install, NULL); + +static void +linux_vdso_deinstall(void *param) +{ + + __elfN(linux_shared_page_fini)(linux_shared_page_obj); +}; +SYSUNINIT(elf_linux_vdso_uninit, SI_SUB_EXEC, SI_ORDER_FIRST, + (sysinit_cfunc_t)linux_vdso_deinstall, NULL); static char GNU_ABI_VENDOR[] = "GNU"; static int GNULINUX_ABI_DESC = 0; @@ -1110,7 +1151,6 @@ linux_elf_modevent(module_t mod, int type, void *data) Elf32_Brandinfo **brandinfo; int error; struct linux_ioctl_handler **lihp; - struct linux_device_handler **ldhp; error = 0; @@ -1123,19 +1163,8 @@ linux_elf_modevent(module_t mod, int type, void *data) if (error == 0) { SET_FOREACH(lihp, linux_ioctl_handler_set) linux_ioctl_register_handler(*lihp); - SET_FOREACH(ldhp, linux_device_handler_set) - linux_device_register_handler(*ldhp); - mtx_init(&emul_lock, "emuldata lock", NULL, MTX_DEF); - sx_init(&emul_shared_lock, "emuldata->shared lock"); LIST_INIT(&futex_list); mtx_init(&futex_mtx, "ftllk", NULL, MTX_DEF); - linux_exit_tag = EVENTHANDLER_REGISTER(process_exit, - linux_proc_exit, NULL, 1000); - linux_exec_tag = EVENTHANDLER_REGISTER(process_exec, - linux_proc_exec, NULL, 1000); - linux_szplatform = roundup(strlen(linux_platform) + 1, - sizeof(char *)); - linux_osd_jail_register(); stclohz = (stathz ? stathz : hz); if (bootverbose) printf("Linux ELF exec handler installed\n"); @@ -1156,23 +1185,16 @@ linux_elf_modevent(module_t mod, int type, void *data) if (error == 0) { SET_FOREACH(lihp, linux_ioctl_handler_set) linux_ioctl_unregister_handler(*lihp); - SET_FOREACH(ldhp, linux_device_handler_set) - linux_device_unregister_handler(*ldhp); - mtx_destroy(&emul_lock); - sx_destroy(&emul_shared_lock); mtx_destroy(&futex_mtx); - EVENTHANDLER_DEREGISTER(process_exit, linux_exit_tag); - EVENTHANDLER_DEREGISTER(process_exec, linux_exec_tag); - linux_osd_jail_deregister(); if (bootverbose) printf("Linux ELF exec handler removed\n"); } else printf("Could not deinstall ELF interpreter entry\n"); break; default: - return EOPNOTSUPP; + return (EOPNOTSUPP); } - return error; + return (error); } static moduledata_t linux_elf_mod = { @@ -1182,3 +1204,4 @@ static moduledata_t linux_elf_mod = { }; DECLARE_MODULE_TIED(linuxelf, linux_elf_mod, SI_SUB_EXEC, SI_ORDER_ANY); +MODULE_DEPEND(linuxelf, linux_common, 1, 1, 1); diff --git a/sys/amd64/linux32/linux32_vdso.lds.s b/sys/amd64/linux32/linux32_vdso.lds.s new file mode 100644 index 000000000000..a49c209a1ebc --- /dev/null +++ b/sys/amd64/linux32/linux32_vdso.lds.s @@ -0,0 +1,66 @@ +/* + * Linker script for 32-bit vDSO. + * Copied from Linux kernel arch/x86/vdso/vdso-layout.lds.S + * and arch/x86/vdso/vdso32/vdso32.lds.S + * + * $FreeBSD$ + */ + +SECTIONS +{ + . = . + SIZEOF_HEADERS; + + .hash : { *(.hash) } :text + .gnu.hash : { *(.gnu.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + + .note : { *(.note.*) } :text :note + + .eh_frame_hdr : { *(.eh_frame_hdr) } :text :eh_frame_hdr + .eh_frame : { KEEP (*(.eh_frame)) } :text + + .dynamic : { *(.dynamic) } :text :dynamic + + .rodata : { *(.rodata*) } :text + .data : { + *(.data*) + *(.sdata*) + *(.got.plt) *(.got) + *(.gnu.linkonce.d.*) + *(.bss*) + *(.dynbss*) + *(.gnu.linkonce.b.*) + } + + .altinstructions : { *(.altinstructions) } + .altinstr_replacement : { *(.altinstr_replacement) } + + . = ALIGN(0x100); + .text : { *(.text*) } :text =0x90909090 +} + +PHDRS +{ + text PT_LOAD FLAGS(5) FILEHDR PHDRS; /* PF_R|PF_X */ + dynamic PT_DYNAMIC FLAGS(4); /* PF_R */ + note PT_NOTE FLAGS(4); /* PF_R */ + eh_frame_hdr PT_GNU_EH_FRAME; +} + +ENTRY(linux32_vsyscall); + +VERSION +{ + LINUX_2.5 { + global: + linux32_vsyscall; + linux32_sigcode; + linux32_rt_sigcode; + linux_platform; + local: *; + }; +} diff --git a/sys/amd64/linux32/syscalls.master b/sys/amd64/linux32/syscalls.master index 5b39dc39a74f..5f688f3c3b4f 100644 --- a/sys/amd64/linux32/syscalls.master +++ b/sys/amd64/linux32/syscalls.master @@ -38,8 +38,7 @@ ; #ifdef's, etc. may be included, and are copied to the output files. 0 AUE_NULL UNIMPL setup -1 AUE_EXIT NOPROTO { void sys_exit(int rval); } exit \ - sys_exit_args void +1 AUE_EXIT STD { void linux_exit(int rval); } 2 AUE_FORK STD { int linux_fork(void); } 3 AUE_NULL NOPROTO { int read(int fd, char *buf, \ u_int nbyte); } @@ -268,10 +267,10 @@ 151 AUE_MUNLOCK NOPROTO { int munlock(const void *addr, size_t len); } 152 AUE_MLOCKALL NOPROTO { int mlockall(int how); } 153 AUE_MUNLOCKALL NOPROTO { int munlockall(void); } -154 AUE_SCHED_SETPARAM NOPROTO { int sched_setparam(pid_t pid, \ - const struct sched_param *param); } -155 AUE_SCHED_GETPARAM NOPROTO { int sched_getparam(pid_t pid, \ - struct sched_param *param); } +154 AUE_SCHED_SETPARAM STD { int linux_sched_setparam(l_pid_t pid, \ + struct l_sched_param *param); } +155 AUE_SCHED_GETPARAM STD { int linux_sched_getparam(l_pid_t pid, \ + struct l_sched_param *param); } 156 AUE_SCHED_SETSCHEDULER STD { int linux_sched_setscheduler( \ l_pid_t pid, l_int policy, \ struct l_sched_param *param); } @@ -319,7 +318,8 @@ l_siginfo_t *ptr, \ struct l_timeval *timeout, \ l_size_t sigsetsize); } -178 AUE_NULL STD { int linux_rt_sigqueueinfo(void); } +178 AUE_NULL STD { int linux_rt_sigqueueinfo(l_pid_t pid, l_int sig, \ + l_siginfo_t *info); } 179 AUE_NULL STD { int linux_rt_sigsuspend( \ l_sigset_t *newset, \ l_size_t sigsetsize); } @@ -430,9 +430,11 @@ 251 AUE_NULL UNIMPL 252 AUE_EXIT STD { int linux_exit_group(int error_code); } 253 AUE_NULL STD { int linux_lookup_dcookie(void); } -254 AUE_NULL STD { int linux_epoll_create(void); } -255 AUE_NULL STD { int linux_epoll_ctl(void); } -256 AUE_NULL STD { int linux_epoll_wait(void); } +254 AUE_NULL STD { int linux_epoll_create(l_int size); } +255 AUE_NULL STD { int linux_epoll_ctl(l_int epfd, l_int op, l_int fd, \ + struct epoll_event *event); } +256 AUE_NULL STD { int linux_epoll_wait(l_int epfd, struct epoll_event *events, \ + l_int maxevents, l_int timeout); } 257 AUE_NULL STD { int linux_remap_file_pages(void); } 258 AUE_NULL STD { int linux_set_tid_address(int *tidptr); } 259 AUE_NULL STD { int linux_timer_create(clockid_t clock_id, \ @@ -467,7 +469,9 @@ 281 AUE_NULL STD { int linux_mq_notify(void); } 282 AUE_NULL STD { int linux_mq_getsetattr(void); } 283 AUE_NULL STD { int linux_kexec_load(void); } -284 AUE_NULL STD { int linux_waitid(void); } +284 AUE_WAIT6 STD { int linux_waitid(int idtype, l_pid_t id, \ + l_siginfo_t *info, int options, \ + struct l_rusage *rusage); } 285 AUE_NULL UNIMPL ; linux 2.6.11: 286 AUE_NULL STD { int linux_add_key(void); } @@ -505,9 +509,13 @@ char *buf, l_int bufsiz); } 306 AUE_FCHMODAT STD { int linux_fchmodat(l_int dfd, const char *filename, \ l_mode_t mode); } -307 AUE_FACCESSAT STD { int linux_faccessat(l_int dfd, const char *filename, l_int amode, int flag); } -308 AUE_NULL STD { int linux_pselect6(void); } -309 AUE_NULL STD { int linux_ppoll(void); } +307 AUE_FACCESSAT STD { int linux_faccessat(l_int dfd, const char *filename, \ + l_int amode); } +308 AUE_SELECT STD { int linux_pselect6(l_int nfds, l_fd_set *readfds, \ + l_fd_set *writefds, l_fd_set *exceptfds, \ + struct l_timespec *tsp, l_uintptr_t *sig); } +309 AUE_POLL STD { int linux_ppoll(struct pollfd *fds, uint32_t nfds, \ + struct l_timespec *tsp, l_sigset_t *sset, l_size_t ssize); } 310 AUE_NULL STD { int linux_unshare(void); } ; linux 2.6.17: 311 AUE_NULL STD { int linux_set_robust_list(struct linux_robust_list_head *head, \ @@ -522,22 +530,26 @@ 317 AUE_NULL STD { int linux_move_pages(void); } ; linux 2.6.19: 318 AUE_NULL STD { int linux_getcpu(void); } -319 AUE_NULL STD { int linux_epoll_pwait(void); } +319 AUE_NULL STD { int linux_epoll_pwait(l_int epfd, struct epoll_event *events, \ + l_int maxevents, l_int timeout, l_sigset_t *mask); } ; linux 2.6.22: -320 AUE_NULL STD { int linux_utimensat(void); } +320 AUE_FUTIMESAT STD { int linux_utimensat(l_int dfd, const char *pathname, \ + const struct l_timespec *times, l_int flags); } 321 AUE_NULL STD { int linux_signalfd(void); } 322 AUE_NULL STD { int linux_timerfd_create(void); } -323 AUE_NULL STD { int linux_eventfd(void); } +323 AUE_NULL STD { int linux_eventfd(l_uint initval); } ; linux 2.6.23: -324 AUE_NULL STD { int linux_fallocate(void); } +324 AUE_NULL STD { int linux_fallocate(l_int fd, l_int mode, \ + l_loff_t offset, l_loff_t len); } ; linux 2.6.25: 325 AUE_NULL STD { int linux_timerfd_settime(void); } 326 AUE_NULL STD { int linux_timerfd_gettime(void); } ; linux 2.6.27: 327 AUE_NULL STD { int linux_signalfd4(void); } -328 AUE_NULL STD { int linux_eventfd2(void); } -329 AUE_NULL STD { int linux_epoll_create1(void); } -330 AUE_NULL STD { int linux_dup3(void); } +328 AUE_NULL STD { int linux_eventfd2(l_uint initval, l_int flags); } +329 AUE_NULL STD { int linux_epoll_create1(l_int flags); } +330 AUE_NULL STD { int linux_dup3(l_int oldfd, \ + l_int newfd, l_int flags); } 331 AUE_NULL STD { int linux_pipe2(l_int *pipefds, l_int flags); } 332 AUE_NULL STD { int linux_inotify_init1(void); } ; linux 2.6.30: @@ -547,17 +559,26 @@ 335 AUE_NULL STD { int linux_rt_tsigqueueinfo(void); } 336 AUE_NULL STD { int linux_perf_event_open(void); } ; linux 2.6.33: -337 AUE_NULL STD { int linux_recvmmsg(void); } +337 AUE_NULL STD { int linux_recvmmsg(l_int s, \ + struct l_mmsghdr *msg, l_uint vlen, \ + l_uint flags, struct l_timespec *timeout); } 338 AUE_NULL STD { int linux_fanotify_init(void); } 339 AUE_NULL STD { int linux_fanotify_mark(void); } ; linux 2.6.36: -340 AUE_NULL STD { int linux_prlimit64(void); } +340 AUE_NULL STD { int linux_prlimit64(l_pid_t pid, \ + l_uint resource, \ + struct rlimit *new, \ + struct rlimit *old); } ; later: 341 AUE_NULL STD { int linux_name_to_handle_at(void); } 342 AUE_NULL STD { int linux_open_by_handle_at(void); } 343 AUE_NULL STD { int linux_clock_adjtime(void); } -344 AUE_NULL STD { int linux_syncfs(void); } -345 AUE_NULL STD { int linux_sendmmsg(void); } +344 AUE_SYNC STD { int linux_syncfs(l_int fd); } +345 AUE_NULL STD { int linux_sendmmsg(l_int s, \ + struct l_mmsghdr *msg, l_uint vlen, \ + l_uint flags); } 346 AUE_NULL STD { int linux_setns(void); } 347 AUE_NULL STD { int linux_process_vm_readv(void); } 348 AUE_NULL STD { int linux_process_vm_writev(void); } +; please, keep this line at the end. +349 AUE_NULL UNIMPL nosys diff --git a/sys/amd64/vmm/intel/vmx.c b/sys/amd64/vmm/intel/vmx.c index 03d755c997e9..4c3f20d6df17 100644 --- a/sys/amd64/vmm/intel/vmx.c +++ b/sys/amd64/vmm/intel/vmx.c @@ -1780,6 +1780,7 @@ vmexit_inst_emul(struct vm_exit *vmexit, uint64_t gpa, uint64_t gla) paging = &vmexit->u.inst_emul.paging; vmexit->exitcode = VM_EXITCODE_INST_EMUL; + vmexit->inst_length = 0; vmexit->u.inst_emul.gpa = gpa; vmexit->u.inst_emul.gla = gla; vmx_paging_info(paging); diff --git a/sys/amd64/vmm/io/vatpit.c b/sys/amd64/vmm/io/vatpit.c index 173ef1fdd71b..d39c759f7710 100644 --- a/sys/amd64/vmm/io/vatpit.c +++ b/sys/amd64/vmm/io/vatpit.c @@ -436,7 +436,7 @@ vatpit_init(struct vm *vm) vatpit->freq_sbt = bttosbt(bt); for (i = 0; i < 3; i++) { - callout_init(&vatpit->channel[i].callout, true); + callout_init(&vatpit->channel[i].callout, 1); arg = &vatpit->channel[i].callout_arg; arg->vatpit = vatpit; arg->channel_num = i; diff --git a/sys/amd64/vmm/vmm.c b/sys/amd64/vmm/vmm.c index 51c63f5459f2..26712955e41e 100644 --- a/sys/amd64/vmm/vmm.c +++ b/sys/amd64/vmm/vmm.c @@ -1256,11 +1256,14 @@ vm_handle_inst_emul(struct vm *vm, int vcpuid, bool *retu) mem_region_read_t mread; mem_region_write_t mwrite; enum vm_cpu_mode cpu_mode; - int cs_d, error, fault, length; + int cs_d, error, fault; vcpu = &vm->vcpu[vcpuid]; vme = &vcpu->exitinfo; + KASSERT(vme->inst_length == 0, ("%s: invalid inst_length %d", + __func__, vme->inst_length)); + gla = vme->u.inst_emul.gla; gpa = vme->u.inst_emul.gpa; cs_base = vme->u.inst_emul.cs_base; @@ -1273,13 +1276,8 @@ vm_handle_inst_emul(struct vm *vm, int vcpuid, bool *retu) /* Fetch, decode and emulate the faulting instruction */ if (vie->num_valid == 0) { - /* - * If the instruction length is not known then assume a - * maximum size instruction. - */ - length = vme->inst_length ? vme->inst_length : VIE_INST_SIZE; error = vmm_fetch_instruction(vm, vcpuid, paging, vme->rip + - cs_base, length, vie, &fault); + cs_base, VIE_INST_SIZE, vie, &fault); } else { /* * The instruction bytes have already been copied into 'vie' @@ -1297,13 +1295,12 @@ vm_handle_inst_emul(struct vm *vm, int vcpuid, bool *retu) } /* - * If the instruction length was not specified then update it now - * along with 'nextrip'. + * Update 'nextrip' based on the length of the emulated instruction. */ - if (vme->inst_length == 0) { - vme->inst_length = vie->num_processed; - vcpu->nextrip += vie->num_processed; - } + vme->inst_length = vie->num_processed; + vcpu->nextrip += vie->num_processed; + VCPU_CTR1(vm, vcpuid, "nextrip updated to %#lx after instruction " + "decoding", vcpu->nextrip); /* return to userland unless this is an in-kernel emulated device */ if (gpa >= DEFAULT_APIC_BASE && gpa < DEFAULT_APIC_BASE + PAGE_SIZE) { @@ -1788,6 +1785,7 @@ vm_inject_exception(struct vm *vm, int vcpuid, int vector, int errcode_valid, uint32_t errcode, int restart_instruction) { struct vcpu *vcpu; + uint64_t regval; int error; if (vcpuid < 0 || vcpuid >= VM_MAXCPU) @@ -1812,6 +1810,16 @@ vm_inject_exception(struct vm *vm, int vcpuid, int vector, int errcode_valid, return (EBUSY); } + if (errcode_valid) { + /* + * Exceptions don't deliver an error code in real mode. + */ + error = vm_get_register(vm, vcpuid, VM_REG_GUEST_CR0, ®val); + KASSERT(!error, ("%s: error %d getting CR0", __func__, error)); + if (!(regval & CR0_PE)) + errcode_valid = 0; + } + /* * From section 26.6.1 "Interruptibility State" in Intel SDM: * diff --git a/sys/amd64/vmm/vmm_instruction_emul.c b/sys/amd64/vmm/vmm_instruction_emul.c index 9c6158a2f0ac..9b5713d5dbb3 100644 --- a/sys/amd64/vmm/vmm_instruction_emul.c +++ b/sys/amd64/vmm/vmm_instruction_emul.c @@ -113,6 +113,10 @@ static const struct vie_op one_byte_opcodes[256] = { .op_byte = 0x2B, .op_type = VIE_OP_TYPE_SUB, }, + [0x39] = { + .op_byte = 0x39, + .op_type = VIE_OP_TYPE_CMP, + }, [0x3B] = { .op_byte = 0x3B, .op_type = VIE_OP_TYPE_CMP, @@ -1050,34 +1054,46 @@ emulate_cmp(void *vm, int vcpuid, uint64_t gpa, struct vie *vie, mem_region_read_t memread, mem_region_write_t memwrite, void *arg) { int error, size; - uint64_t op1, op2, rflags, rflags2; + uint64_t regop, memop, op1, op2, rflags, rflags2; enum vm_reg_name reg; size = vie->opsize; switch (vie->op.op_byte) { + case 0x39: case 0x3B: /* + * 39/r CMP r/m16, r16 + * 39/r CMP r/m32, r32 + * REX.W 39/r CMP r/m64, r64 + * * 3B/r CMP r16, r/m16 * 3B/r CMP r32, r/m32 * REX.W + 3B/r CMP r64, r/m64 * - * Compare first operand (reg) with second operand (r/m) and + * Compare the first operand with the second operand and * set status flags in EFLAGS register. The comparison is * performed by subtracting the second operand from the first * operand and then setting the status flags. */ - /* Get the first operand */ + /* Get the register operand */ reg = gpr_map[vie->reg]; - error = vie_read_register(vm, vcpuid, reg, &op1); + error = vie_read_register(vm, vcpuid, reg, ®op); if (error) return (error); - /* Get the second operand */ - error = memread(vm, vcpuid, gpa, &op2, size, arg); + /* Get the memory operand */ + error = memread(vm, vcpuid, gpa, &memop, size, arg); if (error) return (error); + if (vie->op.op_byte == 0x3B) { + op1 = regop; + op2 = memop; + } else { + op1 = memop; + op2 = regop; + } rflags2 = getcc(size, op1, op2); break; case 0x80: @@ -2298,19 +2314,6 @@ decode_moffset(struct vie *vie) return (0); } -/* - * Verify that all the bytes in the instruction buffer were consumed. - */ -static int -verify_inst_length(struct vie *vie) -{ - - if (vie->num_processed) - return (0); - else - return (-1); -} - /* * Verify that the 'guest linear address' provided as collateral of the nested * page table fault matches with our instruction decoding. @@ -2392,9 +2395,6 @@ vmm_decode_instruction(struct vm *vm, int cpuid, uint64_t gla, if (decode_moffset(vie)) return (-1); - if (verify_inst_length(vie)) - return (-1); - if ((vie->op.op_flags & VIE_OP_F_NO_GLA_VERIFICATION) == 0) { if (verify_gla(vm, cpuid, gla, vie)) return (-1); diff --git a/sys/arm/allwinner/a10_clk.c b/sys/arm/allwinner/a10_clk.c index ddec35906453..0c3634f0853b 100644 --- a/sys/arm/allwinner/a10_clk.c +++ b/sys/arm/allwinner/a10_clk.c @@ -174,7 +174,8 @@ a10_clk_usb_deactivate(void) } int -a10_clk_emac_activate(void) { +a10_clk_emac_activate(void) +{ struct a10_ccm_softc *sc = a10_ccm_sc; uint32_t reg_value; @@ -189,3 +190,110 @@ a10_clk_emac_activate(void) { return (0); } +static void +a10_clk_pll6_enable(void) +{ + struct a10_ccm_softc *sc; + uint32_t reg_value; + + /* + * SATA needs PLL6 to be a 100MHz clock. + * The SATA output frequency is 24MHz * n * k / m / 6. + * To get to 100MHz, k & m must be equal and n must be 25. + * For other uses the output frequency is 24MHz * n * k / 2. + */ + sc = a10_ccm_sc; + reg_value = ccm_read_4(sc, CCM_PLL6_CFG); + reg_value &= ~CCM_PLL_CFG_BYPASS; + reg_value &= ~(CCM_PLL_CFG_FACTOR_K | CCM_PLL_CFG_FACTOR_M | + CCM_PLL_CFG_FACTOR_N); + reg_value |= (25 << CCM_PLL_CFG_FACTOR_N_SHIFT); + reg_value |= CCM_PLL6_CFG_SATA_CLKEN; + reg_value |= CCM_PLL_CFG_ENABLE; + ccm_write_4(sc, CCM_PLL6_CFG, reg_value); +} + +static unsigned int +a10_clk_pll6_get_rate(void) +{ + struct a10_ccm_softc *sc; + uint32_t k, n, reg_value; + + sc = a10_ccm_sc; + reg_value = ccm_read_4(sc, CCM_PLL6_CFG); + n = ((reg_value & CCM_PLL_CFG_FACTOR_N) >> CCM_PLL_CFG_FACTOR_N_SHIFT); + k = ((reg_value & CCM_PLL_CFG_FACTOR_K) >> CCM_PLL_CFG_FACTOR_K_SHIFT) + + 1; + + return ((CCM_CLK_REF_FREQ * n * k) / 2); +} + +int +a10_clk_mmc_activate(int devid) +{ + struct a10_ccm_softc *sc; + uint32_t reg_value; + + sc = a10_ccm_sc; + if (sc == NULL) + return (ENXIO); + + a10_clk_pll6_enable(); + + /* Gating AHB clock for SD/MMC */ + reg_value = ccm_read_4(sc, CCM_AHB_GATING0); + reg_value |= CCM_AHB_GATING_SDMMC0 << devid; + ccm_write_4(sc, CCM_AHB_GATING0, reg_value); + + return (0); +} + +int +a10_clk_mmc_cfg(int devid, int freq) +{ + struct a10_ccm_softc *sc; + uint32_t clksrc, m, n, ophase, phase, reg_value; + unsigned int pll_freq; + + sc = a10_ccm_sc; + if (sc == NULL) + return (ENXIO); + + freq /= 1000; + if (freq <= 400) { + pll_freq = CCM_CLK_REF_FREQ / 1000; + clksrc = CCM_SD_CLK_SRC_SEL_OSC24M; + ophase = 0; + phase = 0; + n = 2; + } else if (freq <= 25000) { + pll_freq = a10_clk_pll6_get_rate() / 1000; + clksrc = CCM_SD_CLK_SRC_SEL_PLL6; + ophase = 0; + phase = 5; + n = 2; + } else if (freq <= 50000) { + pll_freq = a10_clk_pll6_get_rate() / 1000; + clksrc = CCM_SD_CLK_SRC_SEL_PLL6; + ophase = 3; + phase = 5; + n = 0; + } else + return (EINVAL); + m = ((pll_freq / (1 << n)) / (freq)) - 1; + reg_value = ccm_read_4(sc, CCM_MMC0_SCLK_CFG + (devid * 4)); + reg_value &= ~CCM_SD_CLK_SRC_SEL; + reg_value |= (clksrc << CCM_SD_CLK_SRC_SEL_SHIFT); + reg_value &= ~CCM_SD_CLK_PHASE_CTR; + reg_value |= (phase << CCM_SD_CLK_PHASE_CTR_SHIFT); + reg_value &= ~CCM_SD_CLK_DIV_RATIO_N; + reg_value |= (n << CCM_SD_CLK_DIV_RATIO_N_SHIFT); + reg_value &= ~CCM_SD_CLK_OPHASE_CTR; + reg_value |= (ophase << CCM_SD_CLK_OPHASE_CTR_SHIFT); + reg_value &= ~CCM_SD_CLK_DIV_RATIO_M; + reg_value |= m; + reg_value |= CCM_PLL_CFG_ENABLE; + ccm_write_4(sc, CCM_MMC0_SCLK_CFG + (devid * 4), reg_value); + + return (0); +} diff --git a/sys/arm/allwinner/a10_clk.h b/sys/arm/allwinner/a10_clk.h index 2bba1a434020..f9b88c18247b 100644 --- a/sys/arm/allwinner/a10_clk.h +++ b/sys/arm/allwinner/a10_clk.h @@ -103,6 +103,7 @@ #define CCM_AHB_GATING_USB0 (1 << 0) #define CCM_AHB_GATING_EHCI0 (1 << 1) #define CCM_AHB_GATING_EHCI1 (1 << 3) +#define CCM_AHB_GATING_SDMMC0 (1 << 8) #define CCM_AHB_GATING_EMAC (1 << 17) #define CCM_USB_PHY (1 << 8) @@ -110,8 +111,36 @@ #define CCM_USB1_RESET (1 << 1) #define CCM_USB2_RESET (1 << 2) +#define CCM_PLL_CFG_ENABLE (1U << 31) +#define CCM_PLL_CFG_BYPASS (1U << 30) +#define CCM_PLL_CFG_PLL5 (1U << 25) +#define CCM_PLL_CFG_PLL6 (1U << 24) +#define CCM_PLL_CFG_FACTOR_N 0x1f00 +#define CCM_PLL_CFG_FACTOR_N_SHIFT 8 +#define CCM_PLL_CFG_FACTOR_K 0x30 +#define CCM_PLL_CFG_FACTOR_K_SHIFT 4 +#define CCM_PLL_CFG_FACTOR_M 0x3 + +#define CCM_PLL6_CFG_SATA_CLKEN (1U << 14) + +#define CCM_SD_CLK_SRC_SEL 0x3000000 +#define CCM_SD_CLK_SRC_SEL_SHIFT 24 +#define CCM_SD_CLK_SRC_SEL_OSC24M 0 +#define CCM_SD_CLK_SRC_SEL_PLL6 1 +#define CCM_SD_CLK_PHASE_CTR 0x700000 +#define CCM_SD_CLK_PHASE_CTR_SHIFT 20 +#define CCM_SD_CLK_DIV_RATIO_N 0x30000 +#define CCM_SD_CLK_DIV_RATIO_N_SHIFT 16 +#define CCM_SD_CLK_OPHASE_CTR 0x700 +#define CCM_SD_CLK_OPHASE_CTR_SHIFT 8 +#define CCM_SD_CLK_DIV_RATIO_M 0xf + +#define CCM_CLK_REF_FREQ 24000000U + int a10_clk_usb_activate(void); int a10_clk_usb_deactivate(void); int a10_clk_emac_activate(void); +int a10_clk_mmc_activate(int); +int a10_clk_mmc_cfg(int, int); #endif /* _A10_CLK_H_ */ diff --git a/sys/arm/allwinner/a10_mmc.c b/sys/arm/allwinner/a10_mmc.c new file mode 100644 index 000000000000..85ce9801b135 --- /dev/null +++ b/sys/arm/allwinner/a10_mmc.c @@ -0,0 +1,689 @@ +/*- + * Copyright (c) 2013 Alexander Fedorov + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include + +#include +#include +#include + +#include +#include + +#define A10_MMC_MEMRES 0 +#define A10_MMC_IRQRES 1 +#define A10_MMC_RESSZ 2 + +struct a10_mmc_softc { + bus_space_handle_t a10_bsh; + bus_space_tag_t a10_bst; + device_t a10_dev; + int a10_bus_busy; + int a10_id; + int a10_resid; + int a10_timeout; + struct callout a10_timeoutc; + struct mmc_host a10_host; + struct mmc_request * a10_req; + struct mtx a10_mtx; + struct resource * a10_res[A10_MMC_RESSZ]; + uint32_t a10_intr; + uint32_t a10_intr_wait; + void * a10_intrhand; +}; + +static struct resource_spec a10_mmc_res_spec[] = { + { SYS_RES_MEMORY, 0, RF_ACTIVE }, + { SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE }, + { -1, 0, 0 } +}; + +static int a10_mmc_probe(device_t); +static int a10_mmc_attach(device_t); +static int a10_mmc_detach(device_t); +static int a10_mmc_reset(struct a10_mmc_softc *); +static void a10_mmc_intr(void *); +static int a10_mmc_update_clock(struct a10_mmc_softc *); + +static int a10_mmc_update_ios(device_t, device_t); +static int a10_mmc_request(device_t, device_t, struct mmc_request *); +static int a10_mmc_get_ro(device_t, device_t); +static int a10_mmc_acquire_host(device_t, device_t); +static int a10_mmc_release_host(device_t, device_t); + +#define A10_MMC_LOCK(_sc) mtx_lock(&(_sc)->a10_mtx) +#define A10_MMC_UNLOCK(_sc) mtx_unlock(&(_sc)->a10_mtx) +#define A10_MMC_READ_4(_sc, _reg) \ + bus_space_read_4((_sc)->a10_bst, (_sc)->a10_bsh, _reg) +#define A10_MMC_WRITE_4(_sc, _reg, _value) \ + bus_space_write_4((_sc)->a10_bst, (_sc)->a10_bsh, _reg, _value) + +static int +a10_mmc_probe(device_t dev) +{ + + if (!ofw_bus_status_okay(dev)) + return (ENXIO); + if (!ofw_bus_is_compatible(dev, "allwinner,sun4i-a10-mmc")) + return (ENXIO); + device_set_desc(dev, "Allwinner Integrated MMC/SD controller"); + + return (BUS_PROBE_DEFAULT); +} + +static int +a10_mmc_attach(device_t dev) +{ + device_t child; + struct a10_mmc_softc *sc; + struct sysctl_ctx_list *ctx; + struct sysctl_oid_list *tree; + + sc = device_get_softc(dev); + sc->a10_dev = dev; + sc->a10_req = NULL; + sc->a10_id = device_get_unit(dev); + if (sc->a10_id > 3) { + device_printf(dev, "only 4 hosts are supported (0-3)\n"); + return (ENXIO); + } + if (bus_alloc_resources(dev, a10_mmc_res_spec, sc->a10_res) != 0) { + device_printf(dev, "cannot allocate device resources\n"); + return (ENXIO); + } + sc->a10_bst = rman_get_bustag(sc->a10_res[A10_MMC_MEMRES]); + sc->a10_bsh = rman_get_bushandle(sc->a10_res[A10_MMC_MEMRES]); + if (bus_setup_intr(dev, sc->a10_res[A10_MMC_IRQRES], + INTR_TYPE_MISC | INTR_MPSAFE, NULL, a10_mmc_intr, sc, + &sc->a10_intrhand)) { + bus_release_resources(dev, a10_mmc_res_spec, sc->a10_res); + device_printf(dev, "cannot setup interrupt handler\n"); + return (ENXIO); + } + + /* Activate the module clock. */ + if (a10_clk_mmc_activate(sc->a10_id) != 0) { + bus_teardown_intr(dev, sc->a10_res[A10_MMC_IRQRES], + sc->a10_intrhand); + bus_release_resources(dev, a10_mmc_res_spec, sc->a10_res); + device_printf(dev, "cannot activate mmc clock\n"); + return (ENXIO); + } + + sc->a10_timeout = 10; + ctx = device_get_sysctl_ctx(dev); + tree = SYSCTL_CHILDREN(device_get_sysctl_tree(dev)); + SYSCTL_ADD_INT(ctx, tree, OID_AUTO, "req_timeout", CTLFLAG_RW, + &sc->a10_timeout, 0, "Request timeout in seconds"); + mtx_init(&sc->a10_mtx, device_get_nameunit(sc->a10_dev), "a10_mmc", + MTX_DEF); + callout_init_mtx(&sc->a10_timeoutc, &sc->a10_mtx, 0); + + /* Reset controller. */ + if (a10_mmc_reset(sc) != 0) { + device_printf(dev, "cannot reset the controller\n"); + goto fail; + } + + sc->a10_host.f_min = 400000; + sc->a10_host.f_max = 52000000; + sc->a10_host.host_ocr = MMC_OCR_320_330 | MMC_OCR_330_340; + sc->a10_host.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_HSPEED; + sc->a10_host.mode = mode_sd; + + child = device_add_child(dev, "mmc", -1); + if (child == NULL) { + device_printf(dev, "attaching MMC bus failed!\n"); + goto fail; + } + if (device_probe_and_attach(child) != 0) { + device_printf(dev, "attaching MMC child failed!\n"); + device_delete_child(dev, child); + goto fail; + } + + return (0); + +fail: + callout_drain(&sc->a10_timeoutc); + mtx_destroy(&sc->a10_mtx); + bus_teardown_intr(dev, sc->a10_res[A10_MMC_IRQRES], sc->a10_intrhand); + bus_release_resources(dev, a10_mmc_res_spec, sc->a10_res); + + return (ENXIO); +} + +static int +a10_mmc_detach(device_t dev) +{ + + return (EBUSY); +} + +static int +a10_mmc_reset(struct a10_mmc_softc *sc) +{ + int timeout; + + A10_MMC_WRITE_4(sc, A10_MMC_GCTRL, + A10_MMC_READ_4(sc, A10_MMC_GCTRL) | A10_MMC_RESET); + timeout = 1000; + while (--timeout > 0) { + if ((A10_MMC_READ_4(sc, A10_MMC_GCTRL) & A10_MMC_RESET) == 0) + break; + DELAY(100); + } + if (timeout == 0) + return (ETIMEDOUT); + + /* Set the timeout. */ + A10_MMC_WRITE_4(sc, A10_MMC_TIMEOUT, 0xffffffff); + + /* Clear pending interrupts. */ + A10_MMC_WRITE_4(sc, A10_MMC_RINTR, 0xffffffff); + /* Unmask interrupts. */ + A10_MMC_WRITE_4(sc, A10_MMC_IMASK, + A10_MMC_CMD_DONE | A10_MMC_INT_ERR_BIT | + A10_MMC_DATA_OVER | A10_MMC_AUTOCMD_DONE | + A10_MMC_RX_DATA_REQ | A10_MMC_TX_DATA_REQ); + /* Enable interrupts and AHB access. */ + A10_MMC_WRITE_4(sc, A10_MMC_GCTRL, + A10_MMC_READ_4(sc, A10_MMC_GCTRL) | + A10_MMC_INT_ENABLE | A10_MMC_ACCESS_BY_AHB); + + return (0); +} + +static void +a10_mmc_req_done(struct a10_mmc_softc *sc) +{ + struct mmc_command *cmd; + struct mmc_request *req; + + cmd = sc->a10_req->cmd; + if (cmd->error != MMC_ERR_NONE) { + /* Reset the controller. */ + a10_mmc_reset(sc); + a10_mmc_update_clock(sc); + } + /* Reset the FIFO. */ + A10_MMC_WRITE_4(sc, A10_MMC_GCTRL, + A10_MMC_READ_4(sc, A10_MMC_GCTRL) | A10_MMC_FIFO_RESET); + + req = sc->a10_req; + callout_stop(&sc->a10_timeoutc); + sc->a10_req = NULL; + sc->a10_intr = 0; + sc->a10_resid = 0; + sc->a10_intr_wait = 0; + req->done(req); +} + +static void +a10_mmc_req_ok(struct a10_mmc_softc *sc) +{ + int timeout; + struct mmc_command *cmd; + uint32_t status; + + timeout = 1000; + while (--timeout > 0) { + status = A10_MMC_READ_4(sc, A10_MMC_STAS); + if ((status & A10_MMC_CARD_DATA_BUSY) == 0) + break; + DELAY(1000); + } + cmd = sc->a10_req->cmd; + if (timeout == 0) { + cmd->error = MMC_ERR_FAILED; + a10_mmc_req_done(sc); + return; + } + if (cmd->flags & MMC_RSP_PRESENT) { + if (cmd->flags & MMC_RSP_136) { + cmd->resp[0] = A10_MMC_READ_4(sc, A10_MMC_RESP3); + cmd->resp[1] = A10_MMC_READ_4(sc, A10_MMC_RESP2); + cmd->resp[2] = A10_MMC_READ_4(sc, A10_MMC_RESP1); + cmd->resp[3] = A10_MMC_READ_4(sc, A10_MMC_RESP0); + } else + cmd->resp[0] = A10_MMC_READ_4(sc, A10_MMC_RESP0); + } + /* All data has been transferred ? */ + if (cmd->data != NULL && (sc->a10_resid << 2) < cmd->data->len) + cmd->error = MMC_ERR_FAILED; + a10_mmc_req_done(sc); +} + +static void +a10_mmc_timeout(void *arg) +{ + struct a10_mmc_softc *sc; + + sc = (struct a10_mmc_softc *)arg; + if (sc->a10_req != NULL) { + device_printf(sc->a10_dev, "controller timeout\n"); + sc->a10_req->cmd->error = MMC_ERR_TIMEOUT; + a10_mmc_req_done(sc); + } else + device_printf(sc->a10_dev, + "Spurious timeout - no active request\n"); +} + +static int +a10_mmc_pio_transfer(struct a10_mmc_softc *sc, struct mmc_data *data) +{ + int i, write; + uint32_t bit, *buf; + + buf = (uint32_t *)data->data; + write = (data->flags & MMC_DATA_WRITE) ? 1 : 0; + bit = write ? A10_MMC_FIFO_FULL : A10_MMC_FIFO_EMPTY; + for (i = sc->a10_resid; i < (data->len >> 2); i++) { + if ((A10_MMC_READ_4(sc, A10_MMC_STAS) & bit)) + return (1); + if (write) + A10_MMC_WRITE_4(sc, A10_MMC_FIFO, buf[i]); + else + buf[i] = A10_MMC_READ_4(sc, A10_MMC_FIFO); + sc->a10_resid = i + 1; + } + + return (0); +} + +static void +a10_mmc_intr(void *arg) +{ + struct a10_mmc_softc *sc; + struct mmc_data *data; + uint32_t imask, rint; + + sc = (struct a10_mmc_softc *)arg; + A10_MMC_LOCK(sc); + rint = A10_MMC_READ_4(sc, A10_MMC_RINTR); + imask = A10_MMC_READ_4(sc, A10_MMC_IMASK); + if (imask == 0 && rint == 0) { + A10_MMC_UNLOCK(sc); + return; + } +#ifdef DEBUG + device_printf(sc->a10_dev, "imask: %#x, rint: %#x\n", imask, rint); +#endif + if (sc->a10_req == NULL) { + device_printf(sc->a10_dev, + "Spurious interrupt - no active request, rint: 0x%08X\n", + rint); + A10_MMC_WRITE_4(sc, A10_MMC_RINTR, rint); + A10_MMC_UNLOCK(sc); + return; + } + if (rint & A10_MMC_INT_ERR_BIT) { + device_printf(sc->a10_dev, "error rint: 0x%08X\n", rint); + if (rint & A10_MMC_RESP_TIMEOUT) + sc->a10_req->cmd->error = MMC_ERR_TIMEOUT; + else + sc->a10_req->cmd->error = MMC_ERR_FAILED; + A10_MMC_WRITE_4(sc, A10_MMC_RINTR, rint); + a10_mmc_req_done(sc); + A10_MMC_UNLOCK(sc); + return; + } + + sc->a10_intr |= rint; + data = sc->a10_req->cmd->data; + if (data != NULL && (rint & (A10_MMC_DATA_OVER | + A10_MMC_RX_DATA_REQ | A10_MMC_TX_DATA_REQ)) != 0) + a10_mmc_pio_transfer(sc, data); + if ((sc->a10_intr & sc->a10_intr_wait) == sc->a10_intr_wait) + a10_mmc_req_ok(sc); + + A10_MMC_WRITE_4(sc, A10_MMC_RINTR, rint); + A10_MMC_UNLOCK(sc); +} + +static int +a10_mmc_request(device_t bus, device_t child, struct mmc_request *req) +{ + int blksz; + struct a10_mmc_softc *sc; + struct mmc_command *cmd; + uint32_t cmdreg; + + sc = device_get_softc(bus); + A10_MMC_LOCK(sc); + if (sc->a10_req) { + A10_MMC_UNLOCK(sc); + return (EBUSY); + } + sc->a10_req = req; + cmd = req->cmd; + cmdreg = A10_MMC_START; + if (cmd->opcode == MMC_GO_IDLE_STATE) + cmdreg |= A10_MMC_SEND_INIT_SEQ; + if (cmd->flags & MMC_RSP_PRESENT) + cmdreg |= A10_MMC_RESP_EXP; + if (cmd->flags & MMC_RSP_136) + cmdreg |= A10_MMC_LONG_RESP; + if (cmd->flags & MMC_RSP_CRC) + cmdreg |= A10_MMC_CHECK_RESP_CRC; + + sc->a10_intr = 0; + sc->a10_resid = 0; + sc->a10_intr_wait = A10_MMC_CMD_DONE; + cmd->error = MMC_ERR_NONE; + if (cmd->data != NULL) { + sc->a10_intr_wait |= A10_MMC_DATA_OVER; + cmdreg |= A10_MMC_DATA_EXP | A10_MMC_WAIT_PREOVER; + if (cmd->data->flags & MMC_DATA_MULTI) { + cmdreg |= A10_MMC_SEND_AUTOSTOP; + sc->a10_intr_wait |= A10_MMC_AUTOCMD_DONE; + } + if (cmd->data->flags & MMC_DATA_WRITE) + cmdreg |= A10_MMC_WRITE; + blksz = min(cmd->data->len, MMC_SECTOR_SIZE); + A10_MMC_WRITE_4(sc, A10_MMC_BLKSZ, blksz); + A10_MMC_WRITE_4(sc, A10_MMC_BCNTR, cmd->data->len); + } + + A10_MMC_WRITE_4(sc, A10_MMC_CARG, cmd->arg); + A10_MMC_WRITE_4(sc, A10_MMC_CMDR, cmdreg | cmd->opcode); + callout_reset(&sc->a10_timeoutc, sc->a10_timeout * hz, + a10_mmc_timeout, sc); + A10_MMC_UNLOCK(sc); + + return (0); +} + +static int +a10_mmc_read_ivar(device_t bus, device_t child, int which, + uintptr_t *result) +{ + struct a10_mmc_softc *sc; + + sc = device_get_softc(bus); + switch (which) { + default: + return (EINVAL); + case MMCBR_IVAR_BUS_MODE: + *(int *)result = sc->a10_host.ios.bus_mode; + break; + case MMCBR_IVAR_BUS_WIDTH: + *(int *)result = sc->a10_host.ios.bus_width; + break; + case MMCBR_IVAR_CHIP_SELECT: + *(int *)result = sc->a10_host.ios.chip_select; + break; + case MMCBR_IVAR_CLOCK: + *(int *)result = sc->a10_host.ios.clock; + break; + case MMCBR_IVAR_F_MIN: + *(int *)result = sc->a10_host.f_min; + break; + case MMCBR_IVAR_F_MAX: + *(int *)result = sc->a10_host.f_max; + break; + case MMCBR_IVAR_HOST_OCR: + *(int *)result = sc->a10_host.host_ocr; + break; + case MMCBR_IVAR_MODE: + *(int *)result = sc->a10_host.mode; + break; + case MMCBR_IVAR_OCR: + *(int *)result = sc->a10_host.ocr; + break; + case MMCBR_IVAR_POWER_MODE: + *(int *)result = sc->a10_host.ios.power_mode; + break; + case MMCBR_IVAR_VDD: + *(int *)result = sc->a10_host.ios.vdd; + break; + case MMCBR_IVAR_CAPS: + *(int *)result = sc->a10_host.caps; + break; + case MMCBR_IVAR_MAX_DATA: + *(int *)result = 65535; + break; + } + + return (0); +} + +static int +a10_mmc_write_ivar(device_t bus, device_t child, int which, + uintptr_t value) +{ + struct a10_mmc_softc *sc; + + sc = device_get_softc(bus); + switch (which) { + default: + return (EINVAL); + case MMCBR_IVAR_BUS_MODE: + sc->a10_host.ios.bus_mode = value; + break; + case MMCBR_IVAR_BUS_WIDTH: + sc->a10_host.ios.bus_width = value; + break; + case MMCBR_IVAR_CHIP_SELECT: + sc->a10_host.ios.chip_select = value; + break; + case MMCBR_IVAR_CLOCK: + sc->a10_host.ios.clock = value; + break; + case MMCBR_IVAR_MODE: + sc->a10_host.mode = value; + break; + case MMCBR_IVAR_OCR: + sc->a10_host.ocr = value; + break; + case MMCBR_IVAR_POWER_MODE: + sc->a10_host.ios.power_mode = value; + break; + case MMCBR_IVAR_VDD: + sc->a10_host.ios.vdd = value; + break; + /* These are read-only */ + case MMCBR_IVAR_CAPS: + case MMCBR_IVAR_HOST_OCR: + case MMCBR_IVAR_F_MIN: + case MMCBR_IVAR_F_MAX: + case MMCBR_IVAR_MAX_DATA: + return (EINVAL); + } + + return (0); +} + +static int +a10_mmc_update_clock(struct a10_mmc_softc *sc) +{ + uint32_t cmdreg; + int retry; + + cmdreg = A10_MMC_START | A10_MMC_UPCLK_ONLY | + A10_MMC_WAIT_PREOVER; + A10_MMC_WRITE_4(sc, A10_MMC_CMDR, cmdreg); + retry = 0xfffff; + while (--retry > 0) { + if ((A10_MMC_READ_4(sc, A10_MMC_CMDR) & A10_MMC_START) == 0) { + A10_MMC_WRITE_4(sc, A10_MMC_RINTR, 0xffffffff); + return (0); + } + DELAY(10); + } + A10_MMC_WRITE_4(sc, A10_MMC_RINTR, 0xffffffff); + device_printf(sc->a10_dev, "timeout updating clock\n"); + + return (ETIMEDOUT); +} + +static int +a10_mmc_update_ios(device_t bus, device_t child) +{ + int error; + struct a10_mmc_softc *sc; + struct mmc_ios *ios; + uint32_t clkcr; + + sc = device_get_softc(bus); + clkcr = A10_MMC_READ_4(sc, A10_MMC_CLKCR); + if (clkcr & A10_MMC_CARD_CLK_ON) { + /* Disable clock. */ + clkcr &= ~A10_MMC_CARD_CLK_ON; + A10_MMC_WRITE_4(sc, A10_MMC_CLKCR, clkcr); + error = a10_mmc_update_clock(sc); + if (error != 0) + return (error); + } + + ios = &sc->a10_host.ios; + if (ios->clock) { + /* Reset the divider. */ + clkcr &= ~A10_MMC_CLKCR_DIV; + A10_MMC_WRITE_4(sc, A10_MMC_CLKCR, clkcr); + error = a10_mmc_update_clock(sc); + if (error != 0) + return (error); + + /* Set the MMC clock. */ + error = a10_clk_mmc_cfg(sc->a10_id, ios->clock); + if (error != 0) + return (error); + + /* Enable clock. */ + clkcr |= A10_MMC_CARD_CLK_ON; + A10_MMC_WRITE_4(sc, A10_MMC_CLKCR, clkcr); + error = a10_mmc_update_clock(sc); + if (error != 0) + return (error); + } + + /* Set the bus width. */ + switch (ios->bus_width) { + case bus_width_1: + A10_MMC_WRITE_4(sc, A10_MMC_WIDTH, A10_MMC_WIDTH1); + break; + case bus_width_4: + A10_MMC_WRITE_4(sc, A10_MMC_WIDTH, A10_MMC_WIDTH4); + break; + case bus_width_8: + A10_MMC_WRITE_4(sc, A10_MMC_WIDTH, A10_MMC_WIDTH8); + break; + } + + return (0); +} + +static int +a10_mmc_get_ro(device_t bus, device_t child) +{ + + return (0); +} + +static int +a10_mmc_acquire_host(device_t bus, device_t child) +{ + struct a10_mmc_softc *sc; + int error; + + sc = device_get_softc(bus); + A10_MMC_LOCK(sc); + while (sc->a10_bus_busy) { + error = msleep(sc, &sc->a10_mtx, PCATCH, "mmchw", 0); + if (error != 0) { + A10_MMC_UNLOCK(sc); + return (error); + } + } + sc->a10_bus_busy++; + A10_MMC_UNLOCK(sc); + + return (0); +} + +static int +a10_mmc_release_host(device_t bus, device_t child) +{ + struct a10_mmc_softc *sc; + + sc = device_get_softc(bus); + A10_MMC_LOCK(sc); + sc->a10_bus_busy--; + wakeup(sc); + A10_MMC_UNLOCK(sc); + + return (0); +} + +static device_method_t a10_mmc_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, a10_mmc_probe), + DEVMETHOD(device_attach, a10_mmc_attach), + DEVMETHOD(device_detach, a10_mmc_detach), + + /* Bus interface */ + DEVMETHOD(bus_read_ivar, a10_mmc_read_ivar), + DEVMETHOD(bus_write_ivar, a10_mmc_write_ivar), + DEVMETHOD(bus_print_child, bus_generic_print_child), + + /* MMC bridge interface */ + DEVMETHOD(mmcbr_update_ios, a10_mmc_update_ios), + DEVMETHOD(mmcbr_request, a10_mmc_request), + DEVMETHOD(mmcbr_get_ro, a10_mmc_get_ro), + DEVMETHOD(mmcbr_acquire_host, a10_mmc_acquire_host), + DEVMETHOD(mmcbr_release_host, a10_mmc_release_host), + + DEVMETHOD_END +}; + +static devclass_t a10_mmc_devclass; + +static driver_t a10_mmc_driver = { + "a10_mmc", + a10_mmc_methods, + sizeof(struct a10_mmc_softc), +}; + +DRIVER_MODULE(a10_mmc, simplebus, a10_mmc_driver, a10_mmc_devclass, 0, 0); diff --git a/sys/arm/allwinner/a10_mmc.h b/sys/arm/allwinner/a10_mmc.h new file mode 100644 index 000000000000..84c13a54a4e2 --- /dev/null +++ b/sys/arm/allwinner/a10_mmc.h @@ -0,0 +1,179 @@ +/*- + * Copyright (c) 2013 Alexander Fedorov + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _A10_MMC_H_ +#define _A10_MMC_H_ + +#define A10_MMC_GCTRL 0x00 /* Global Control Register */ +#define A10_MMC_CLKCR 0x04 /* Clock Control Register */ +#define A10_MMC_TIMEOUT 0x08 /* Timeout Register */ +#define A10_MMC_WIDTH 0x0C /* Bus Width Register */ +#define A10_MMC_BLKSZ 0x10 /* Block Size Register */ +#define A10_MMC_BCNTR 0x14 /* Byte Count Register */ +#define A10_MMC_CMDR 0x18 /* Command Register */ +#define A10_MMC_CARG 0x1C /* Argument Register */ +#define A10_MMC_RESP0 0x20 /* Response Register 0 */ +#define A10_MMC_RESP1 0x24 /* Response Register 1 */ +#define A10_MMC_RESP2 0x28 /* Response Register 2 */ +#define A10_MMC_RESP3 0x2C /* Response Register 3 */ +#define A10_MMC_IMASK 0x30 /* Interrupt Mask Register */ +#define A10_MMC_MISTA 0x34 /* Masked Interrupt Status Register */ +#define A10_MMC_RINTR 0x38 /* Raw Interrupt Status Register */ +#define A10_MMC_STAS 0x3C /* Status Register */ +#define A10_MMC_FTRGL 0x40 /* FIFO Threshold Watermark Register */ +#define A10_MMC_FUNS 0x44 /* Function Select Register */ +#define A10_MMC_CBCR 0x48 /* CIU Byte Count Register */ +#define A10_MMC_BBCR 0x4C /* BIU Byte Count Register */ +#define A10_MMC_DBGC 0x50 /* Debug Enable Register */ +#define A10_MMC_DMAC 0x80 /* IDMAC Control Register */ +#define A10_MMC_DLBA 0x84 /* IDMAC Desc List Base Address Reg */ +#define A10_MMC_IDST 0x88 /* IDMAC Status Register */ +#define A10_MMC_IDIE 0x8C /* IDMAC Interrupt Enable Register */ +#define A10_MMC_CHDA 0x90 +#define A10_MMC_CBDA 0x94 +#define A10_MMC_FIFO 0x100 /* FIFO Access Address */ + +/* A10_MMC_GCTRL */ +#define A10_MMC_SOFT_RESET (1U << 0) +#define A10_MMC_FIFO_RESET (1U << 1) +#define A10_MMC_DMA_RESET (1U << 2) +#define A10_MMC_INT_ENABLE (1U << 4) +#define A10_MMC_DMA_ENABLE (1U << 5) +#define A10_MMC_DEBOUNCE_ENABLE (1U << 8) +#define A10_MMC_DDR_MODE (1U << 10) +#define A10_MMC_ACCESS_BY_DMA (1U << 30) +#define A10_MMC_ACCESS_BY_AHB (1U << 31) +#define A10_MMC_RESET \ + (A10_MMC_SOFT_RESET | A10_MMC_FIFO_RESET | A10_MMC_DMA_RESET) + +/* A10_MMC_CLKCR */ +#define A10_MMC_CARD_CLK_ON (1U << 16) +#define A10_MMC_LOW_POWER_ON (1U << 17) +#define A10_MMC_CLKCR_DIV 0xff + +/* A10_MMC_WIDTH */ +#define A10_MMC_WIDTH1 0 +#define A10_MMC_WIDTH4 1 +#define A10_MMC_WIDTH8 2 + +/* A10_MMC_CMDR */ +#define A10_MMC_RESP_EXP (1U << 6) +#define A10_MMC_LONG_RESP (1U << 7) +#define A10_MMC_CHECK_RESP_CRC (1U << 8) +#define A10_MMC_DATA_EXP (1U << 9) +#define A10_MMC_WRITE (1U << 10) +#define A10_MMC_SEQ_MODE (1U << 11) +#define A10_MMC_SEND_AUTOSTOP (1U << 12) +#define A10_MMC_WAIT_PREOVER (1U << 13) +#define A10_MMC_STOP_ABORT_CMD (1U << 14) +#define A10_MMC_SEND_INIT_SEQ (1U << 15) +#define A10_MMC_UPCLK_ONLY (1U << 21) +#define A10_MMC_RDCEATADEV (1U << 22) +#define A10_MMC_CCS_EXP (1U << 23) +#define A10_MMC_ENB_BOOT (1U << 24) +#define A10_MMC_ALT_BOOT_OPT (1U << 25) +#define A10_MMC_BOOT_ACK_EXP (1U << 26) +#define A10_MMC_DISABLE_BOOT (1U << 27) +#define A10_MMC_VOL_SWITCH (1U << 28) +#define A10_MMC_START (1U << 31) + +/* A10_MMC_IMASK and A10_MMC_RINTR */ +#define A10_MMC_RESP_ERR (1U << 1) +#define A10_MMC_CMD_DONE (1U << 2) +#define A10_MMC_DATA_OVER (1U << 3) +#define A10_MMC_TX_DATA_REQ (1U << 4) +#define A10_MMC_RX_DATA_REQ (1U << 5) +#define A10_MMC_RESP_CRC_ERR (1U << 6) +#define A10_MMC_DATA_CRC_ERR (1U << 7) +#define A10_MMC_RESP_TIMEOUT (1U << 8) +#define A10_MMC_ACK_RECV (1U << 8) +#define A10_MMC_DATA_TIMEOUT (1U << 9) +#define A10_MMC_BOOT_START (1U << 9) +#define A10_MMC_DATA_STARVE (1U << 10) +#define A10_MMC_VOL_CHG_DONE (1U << 10) +#define A10_MMC_FIFO_RUN_ERR (1U << 11) +#define A10_MMC_HARDW_LOCKED (1U << 12) +#define A10_MMC_START_BIT_ERR (1U << 13) +#define A10_MMC_AUTOCMD_DONE (1U << 14) +#define A10_MMC_END_BIT_ERR (1U << 15) +#define A10_MMC_SDIO_INT (1U << 16) +#define A10_MMC_CARD_INSERT (1U << 30) +#define A10_MMC_CARD_REMOVE (1U << 31) +#define A10_MMC_INT_ERR_BIT \ + (A10_MMC_RESP_ERR | A10_MMC_RESP_CRC_ERR | \ + A10_MMC_DATA_CRC_ERR | A10_MMC_RESP_TIMEOUT | \ + A10_MMC_FIFO_RUN_ERR | A10_MMC_HARDW_LOCKED | \ + A10_MMC_START_BIT_ERR | A10_MMC_END_BIT_ERR) + +/* A10_MMC_STAS */ +#define A10_MMC_RX_WLFLAG (1U << 0) +#define A10_MMC_TX_WLFLAG (1U << 1) +#define A10_MMC_FIFO_EMPTY (1U << 2) +#define A10_MMC_FIFO_FULL (1U << 3) +#define A10_MMC_CARD_PRESENT (1U << 8) +#define A10_MMC_CARD_DATA_BUSY (1U << 9) +#define A10_MMC_DATA_FSM_BUSY (1U << 10) +#define A10_MMC_DMA_REQ (1U << 31) +#define A10_MMC_FIFO_SIZE 16 + +/* A10_MMC_FUNS */ +#define A10_MMC_CE_ATA_ON (0xceaaU << 16) +#define A10_MMC_SEND_IRQ_RESP (1U << 0) +#define A10_MMC_SDIO_RD_WAIT (1U << 1) +#define A10_MMC_ABT_RD_DATA (1U << 2) +#define A10_MMC_SEND_CC_SD (1U << 8) +#define A10_MMC_SEND_AUTOSTOP_CC_SD (1U << 9) +#define A10_MMC_CE_ATA_DEV_INT_ENB (1U << 10) + +/* IDMA CONTROLLER BUS MOD BIT FIELD */ +#define A10_MMC_IDMAC_SOFT_RST (1U << 0) +#define A10_MMC_IDMAC_FIX_BURST (1U << 1) +#define A10_MMC_IDMAC_IDMA_ON (1U << 7) +#define A10_MMC_IDMAC_REFETCH_DES (1U << 31) + +/* A10_MMC_IDST */ +#define A10_MMC_IDMAC_TRANSMIT_INT (1U << 0) +#define A10_MMC_IDMAC_RECEIVE_INT (1U << 1) +#define A10_MMC_IDMAC_FATAL_BUS_ERR (1U << 2) +#define A10_MMC_IDMAC_DES_INVALID (1U << 4) +#define A10_MMC_IDMAC_CARD_ERR_SUM (1U << 5) +#define A10_MMC_IDMAC_NORMAL_INT_SUM (1U << 8) +#define A10_MMC_IDMAC_ABNORMAL_INT_SUM (1U << 9) +#define A10_MMC_IDMAC_HOST_ABT_INTX (1U << 10) +#define A10_MMC_IDMAC_HOST_ABT_INRX (1U << 10) +#define A10_MMC_IDMAC_IDLE (0U << 13) +#define A10_MMC_IDMAC_SUSPEND (1U << 13) +#define A10_MMC_IDMAC_DESC_RD (2U << 13) +#define A10_MMC_IDMAC_DESC_CHECK (3U << 13) +#define A10_MMC_IDMAC_RD_REQ_WAIT (4U << 13) +#define A10_MMC_IDMAC_WR_REQ_WAIT (5U << 13) +#define A10_MMC_IDMAC_RD (6U << 13) +#define A10_MMC_IDMAC_WR (7U << 13) +#define A10_MMC_IDMAC_DESC_CLOSE (8U << 13) + +#endif /* _A10_MMC_H_ */ diff --git a/sys/arm/allwinner/a20/files.a20 b/sys/arm/allwinner/a20/files.a20 index f8d8f6fdecd3..25fd88010324 100644 --- a/sys/arm/allwinner/a20/files.a20 +++ b/sys/arm/allwinner/a20/files.a20 @@ -1,5 +1,3 @@ # $FreeBSD$ -arm/arm/gic.c standard - arm/allwinner/a20/a20_mp.c optional smp diff --git a/sys/arm/allwinner/files.allwinner b/sys/arm/allwinner/files.allwinner index 9b65e7c16cb9..84479396711c 100644 --- a/sys/arm/allwinner/files.allwinner +++ b/sys/arm/allwinner/files.allwinner @@ -10,6 +10,7 @@ arm/allwinner/a10_common.c standard arm/allwinner/a10_ehci.c optional ehci arm/allwinner/a10_gpio.c optional gpio arm/allwinner/a10_machdep.c standard +arm/allwinner/a10_mmc.c optional mmc arm/allwinner/a10_sramc.c standard arm/allwinner/a10_wdog.c standard arm/allwinner/a20/a20_cpu_cfg.c standard diff --git a/sys/arm/allwinner/std.a10 b/sys/arm/allwinner/std.a10 index da5d895352aa..8d99ab8e77f3 100644 --- a/sys/arm/allwinner/std.a10 +++ b/sys/arm/allwinner/std.a10 @@ -10,12 +10,12 @@ makeoption ARM_LITTLE_ENDIAN # 0x40200000, e.g. from u-boot with 'fatload mmc 0 0x40200000 kernel' # # -options PHYSADDR=0x40000000 +options PHYSADDR=0x40000000 makeoptions KERNPHYSADDR=0x40200000 -options KERNPHYSADDR=0x40200000 +options KERNPHYSADDR=0x40200000 makeoptions KERNVIRTADDR=0xc0200000 -options KERNVIRTADDR=0xc0200000 +options KERNVIRTADDR=0xc0200000 options ARM_L2_PIPT diff --git a/sys/arm/altera/socfpga/files.socfpga b/sys/arm/altera/socfpga/files.socfpga index 7f425ecb0699..901069b79a76 100644 --- a/sys/arm/altera/socfpga/files.socfpga +++ b/sys/arm/altera/socfpga/files.socfpga @@ -6,7 +6,6 @@ arm/arm/bus_space_generic.c standard arm/arm/bus_space_asm_generic.S standard arm/arm/bus_space_base.c standard -arm/arm/gic.c standard arm/arm/mpcore_timer.c standard arm/altera/socfpga/socfpga_common.c standard diff --git a/sys/arm/amlogic/aml8726/aml8726_ccm.c b/sys/arm/amlogic/aml8726/aml8726_ccm.c index 77b1648a4388..186a3ca2356c 100644 --- a/sys/arm/amlogic/aml8726/aml8726_ccm.c +++ b/sys/arm/amlogic/aml8726/aml8726_ccm.c @@ -185,7 +185,6 @@ aml8726_ccm_attach(device_t dev) device_printf(dev, "unsupported SoC\n"); return (ENXIO); /* NOTREACHED */ - break; } if (bus_alloc_resources(dev, aml8726_ccm_spec, sc->res)) { diff --git a/sys/arm/amlogic/aml8726/aml8726_machdep.c b/sys/arm/amlogic/aml8726/aml8726_machdep.c index 4476c90bc17d..2f982353990d 100644 --- a/sys/arm/amlogic/aml8726/aml8726_machdep.c +++ b/sys/arm/amlogic/aml8726/aml8726_machdep.c @@ -38,7 +38,9 @@ __FBSDID("$FreeBSD$"); #include #include +#include #include +#include #include #include @@ -113,6 +115,19 @@ platform_gpio_init(void) */ aml8726_identify_soc(); + /* + * My aml8726-m3 development box which identifies the CPU as + * a Cortex A9-r2 rev 4 randomly locks up during boot when WFI + * is used. + */ + switch (aml8726_soc_hw_rev) { + case AML_SOC_HW_REV_M3: + cpufuncs.cf_sleep = (void *)cpufunc_nullop; + break; + default: + break; + } + /* * This FDT fixup should arguably be called through fdt_fixup_table, * however currently there's no mechanism to specify a fixup which @@ -167,43 +182,31 @@ struct fdt_fixup_entry fdt_fixup_table[] = { { NULL, NULL } }; +#ifndef DEV_GIC static int fdt_pic_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig, int *pol) { /* - * The single core chips have just an Amlogic PIC. However the - * multi core chips also have a GIC. + * The single core chips have just an Amlogic PIC. */ -#ifdef SMP - if (!fdt_is_compatible_strict(node, "arm,cortex-a9-gic")) -#else if (!fdt_is_compatible_strict(node, "amlogic,aml8726-pic")) -#endif return (ENXIO); *interrupt = fdt32_to_cpu(intr[1]); *trig = INTR_TRIGGER_EDGE; *pol = INTR_POLARITY_HIGH; - switch (*interrupt) { - case 30: /* INT_USB_A */ - case 31: /* INT_USB_B */ - *trig = INTR_TRIGGER_LEVEL; - break; - default: - break; - } - -#ifdef SMP - *interrupt += 32; -#endif - return (0); } +#endif fdt_pic_decode_t fdt_pic_table[] = { +#ifdef DEV_GIC + &gic_decode_fdt, +#else &fdt_pic_decode_ic, +#endif NULL }; diff --git a/sys/arm/amlogic/aml8726/aml8726_pic.c b/sys/arm/amlogic/aml8726/aml8726_pic.c index 5ef1403d7c2b..70257f747cd5 100644 --- a/sys/arm/amlogic/aml8726/aml8726_pic.c +++ b/sys/arm/amlogic/aml8726/aml8726_pic.c @@ -121,6 +121,8 @@ aml8726_pic_eoi(void *arg) if (nb >= AML_PIC_NIRQS) return; + arm_irq_memory_barrier(nb); + CSR_WRITE_4(aml8726_pic_sc, AML_PIC_STAT_CLR_REG(nb), AML_PIC_BIT(nb)); CSR_BARRIER(aml8726_pic_sc, AML_PIC_STAT_CLR_REG(nb)); @@ -167,7 +169,7 @@ aml8726_pic_attach(device_t dev) CSR_WRITE_4(sc, AML_PIC_0_FIRQ_SEL + i * 16, 0); } -#ifndef SMP +#ifndef DEV_GIC arm_post_filter = aml8726_pic_eoi; #else device_printf(dev, "disabled in favor of gic\n"); @@ -205,7 +207,7 @@ static devclass_t aml8726_pic_devclass; EARLY_DRIVER_MODULE(pic, simplebus, aml8726_pic_driver, aml8726_pic_devclass, 0, 0, BUS_PASS_INTERRUPT); -#ifndef SMP +#ifndef DEV_GIC int arm_get_next_irq(int last) { @@ -265,8 +267,12 @@ arm_unmask_irq(uintptr_t nb) if (nb >= AML_PIC_NIRQS) return; + arm_irq_memory_barrier(nb); + mask = CSR_READ_4(aml8726_pic_sc, AML_PIC_MASK_REG(nb)); mask |= AML_PIC_BIT(nb); CSR_WRITE_4(aml8726_pic_sc, AML_PIC_MASK_REG(nb), mask); + + CSR_BARRIER(aml8726_pic_sc, AML_PIC_MASK_REG(nb)); } #endif diff --git a/sys/arm/amlogic/aml8726/aml8726_pinctrl.c b/sys/arm/amlogic/aml8726/aml8726_pinctrl.c index db8709379815..63af2f1e78f5 100644 --- a/sys/arm/amlogic/aml8726/aml8726_pinctrl.c +++ b/sys/arm/amlogic/aml8726/aml8726_pinctrl.c @@ -146,7 +146,6 @@ aml8726_pinctrl_attach(device_t dev) device_printf(dev, "unsupported SoC\n"); return (ENXIO); /* NOTREACHED */ - break; } if (bus_alloc_resources(dev, aml8726_pinctrl_spec, sc->res)) { diff --git a/sys/arm/amlogic/aml8726/aml8726_rng.c b/sys/arm/amlogic/aml8726/aml8726_rng.c index b5a44e3523c2..e3397aa117a6 100644 --- a/sys/arm/amlogic/aml8726/aml8726_rng.c +++ b/sys/arm/amlogic/aml8726/aml8726_rng.c @@ -115,7 +115,7 @@ aml8726_rng_attach(device_t dev) else sc->ticks = 1; - callout_init(&sc->co, CALLOUT_MPSAFE); + callout_init(&sc->co, 1); callout_reset(&sc->co, sc->ticks, aml8726_rng_harvest, sc); return (0); diff --git a/sys/arm/amlogic/aml8726/aml8726_rtc.c b/sys/arm/amlogic/aml8726/aml8726_rtc.c index fe1246373ec2..5af51ce4d34d 100644 --- a/sys/arm/amlogic/aml8726/aml8726_rtc.c +++ b/sys/arm/amlogic/aml8726/aml8726_rtc.c @@ -51,6 +51,8 @@ __FBSDID("$FreeBSD$"); #include #include +#include + #include "clock_if.h" /* @@ -372,45 +374,28 @@ static int aml8726_rtc_attach(device_t dev) { struct aml8726_rtc_softc *sc = device_get_softc(dev); - boolean_t init_always_valid; - char *init_always; - pcell_t prop; - phandle_t node; - ssize_t len; sc->dev = dev; - node = ofw_bus_get_node(dev); - - len = OF_getprop_alloc(node, "init-always", - sizeof(char), (void **)&init_always); - sc->init.always = FALSE; - init_always_valid = FALSE; - if (len > 0) { - if (strncmp(init_always, "true", len) == 0) { - sc->init.always = TRUE; - init_always_valid = TRUE; - } else if (strncmp(init_always, "false", len) == 0) - init_always_valid = TRUE; - free(init_always, M_OFWPROP); - } - if (init_always_valid == FALSE) { - device_printf(dev, "missing init-always attribute in FDT\n"); + switch (aml8726_soc_hw_rev) { + case AML_SOC_HW_REV_M3: + sc->init.always = true; + sc->init.xo = 0x3c0a; + sc->init.gpo = 0x100000; + break; + case AML_SOC_HW_REV_M6: + case AML_SOC_HW_REV_M8: + case AML_SOC_HW_REV_M8B: + sc->init.always = false; + sc->init.xo = 0x180a; + sc->init.gpo = 0x500000; + break; + default: + device_printf(dev, "unsupported SoC\n"); return (ENXIO); + /* NOTREACHED */ } - if (OF_getencprop(node, "xo-init", &prop, sizeof(prop)) <= 0) { - device_printf(dev, "missing xo-init attribute in FDT\n"); - return (ENXIO); - } - sc->init.xo = prop; - - if (OF_getencprop(node, "gpo-init", &prop, sizeof(prop)) <= 0) { - device_printf(dev, "missing gpo-init attribute in FDT\n"); - return (ENXIO); - } - sc->init.gpo = prop; - if (bus_alloc_resources(dev, aml8726_rtc_spec, sc->res)) { device_printf(dev, "can not allocate resources for device\n"); return (ENXIO); diff --git a/sys/arm/amlogic/aml8726/aml8726_sdxc-m8.c b/sys/arm/amlogic/aml8726/aml8726_sdxc-m8.c index 4204275e0e88..a1bb2742786d 100644 --- a/sys/arm/amlogic/aml8726/aml8726_sdxc-m8.c +++ b/sys/arm/amlogic/aml8726/aml8726_sdxc-m8.c @@ -758,7 +758,6 @@ aml8726_sdxc_attach(device_t dev) device_printf(dev, "unsupported SoC\n"); return (ENXIO); /* NOTREACHED */ - break; } node = ofw_bus_get_node(dev); diff --git a/sys/arm/amlogic/aml8726/aml8726_usb_phy-m3.c b/sys/arm/amlogic/aml8726/aml8726_usb_phy-m3.c new file mode 100644 index 000000000000..c4289438acfb --- /dev/null +++ b/sys/arm/amlogic/aml8726/aml8726_usb_phy-m3.c @@ -0,0 +1,428 @@ +/*- + * Copyright 2014-2015 John Wehle + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* + * Amlogic aml8726-m3 USB physical layer driver. + * + * Both USB physical interfaces share the same configuration register. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include + +#include +#include +#include + +#include "gpio_if.h" + +struct aml8726_usb_phy_gpio { + device_t dev; + uint32_t pin; + uint32_t pol; +}; + +struct aml8726_usb_phy_softc { + device_t dev; + struct resource *res[1]; + uint32_t npwr_en; + struct aml8726_usb_phy_gpio *pwr_en; +}; + +static struct resource_spec aml8726_usb_phy_spec[] = { + { SYS_RES_MEMORY, 0, RF_ACTIVE }, + { -1, 0 } +}; + +#define AML_USB_PHY_CFG_REG 0 +#define AML_USB_PHY_CFG_A_CLK_DETECTED (1U << 31) +#define AML_USB_PHY_CFG_CLK_DIV_MASK (0x7f << 24) +#define AML_USB_PHY_CFG_CLK_DIV_SHIFT 24 +#define AML_USB_PHY_CFG_B_CLK_DETECTED (1 << 22) +#define AML_USB_PHY_CFG_A_PLL_RST (1 << 19) +#define AML_USB_PHY_CFG_A_PHYS_RST (1 << 18) +#define AML_USB_PHY_CFG_A_RST (1 << 17) +#define AML_USB_PHY_CFG_B_PLL_RST (1 << 13) +#define AML_USB_PHY_CFG_B_PHYS_RST (1 << 12) +#define AML_USB_PHY_CFG_B_RST (1 << 11) +#define AML_USB_PHY_CFG_CLK_EN (1 << 8) +#define AML_USB_PHY_CFG_CLK_SEL_MASK (7 << 5) +#define AML_USB_PHY_CFG_CLK_SEL_XTAL (0 << 5) +#define AML_USB_PHY_CFG_CLK_SEL_XTAL_DIV2 (1 << 5) +#define AML_USB_PHY_CFG_B_POR (1 << 1) +#define AML_USB_PHY_CFG_A_POR (1 << 0) + +#define AML_USB_PHY_CFG_CLK_DETECTED \ + (AML_USB_PHY_CFG_A_CLK_DETECTED | AML_USB_PHY_CFG_B_CLK_DETECTED) + +#define AML_USB_PHY_MISC_A_REG 12 +#define AML_USB_PHY_MISC_B_REG 16 +#define AML_USB_PHY_MISC_ID_OVERIDE_EN (1 << 23) +#define AML_USB_PHY_MISC_ID_OVERIDE_DEVICE (1 << 22) +#define AML_USB_PHY_MISC_ID_OVERIDE_HOST (0 << 22) + +#define CSR_WRITE_4(sc, reg, val) bus_write_4((sc)->res[0], reg, (val)) +#define CSR_READ_4(sc, reg) bus_read_4((sc)->res[0], reg) +#define CSR_BARRIER(sc, reg) bus_barrier((sc)->res[0], reg, 4, \ + (BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE)) + +#define PIN_ON_FLAG(pol) ((pol) == 0 ? \ + GPIO_PIN_LOW : GPIO_PIN_HIGH) +#define PIN_OFF_FLAG(pol) ((pol) == 0 ? \ + GPIO_PIN_HIGH : GPIO_PIN_LOW) + +static int +aml8726_usb_phy_mode(const char *dwcotg_path, uint32_t *mode) +{ + char *usb_mode; + phandle_t node; + ssize_t len; + + if ((node = OF_finddevice(dwcotg_path)) == 0) + return (ENXIO); + + if (fdt_is_compatible_strict(node, "synopsys,designware-hs-otg2") == 0) + return (ENXIO); + + *mode = 0; + + len = OF_getprop_alloc(node, "dr_mode", + sizeof(char), (void **)&usb_mode); + + if (len <= 0) + return (0); + + if (strcasecmp(usb_mode, "host") == 0) { + *mode = AML_USB_PHY_MISC_ID_OVERIDE_EN | + AML_USB_PHY_MISC_ID_OVERIDE_HOST; + } else if (strcasecmp(usb_mode, "peripheral") == 0) { + *mode = AML_USB_PHY_MISC_ID_OVERIDE_EN | + AML_USB_PHY_MISC_ID_OVERIDE_DEVICE; + } + + free(usb_mode, M_OFWPROP); + + return (0); +} + +static int +aml8726_usb_phy_probe(device_t dev) +{ + + if (!ofw_bus_status_okay(dev)) + return (ENXIO); + + if (!ofw_bus_is_compatible(dev, "amlogic,aml8726-m3-usb-phy")) + return (ENXIO); + + device_set_desc(dev, "Amlogic aml8726-m3 USB PHY"); + + return (BUS_PROBE_DEFAULT); +} + +static int +aml8726_usb_phy_attach(device_t dev) +{ + struct aml8726_usb_phy_softc *sc = device_get_softc(dev); + int err; + int npwr_en; + pcell_t *prop; + phandle_t node; + ssize_t len; + uint32_t div; + uint32_t i; + uint32_t mode_a; + uint32_t mode_b; + uint32_t value; + + sc->dev = dev; + + if (aml8726_usb_phy_mode("/soc/usb@c9040000", &mode_a) != 0) { + device_printf(dev, "missing usb@c9040000 node in FDT\n"); + return (ENXIO); + } + + if (aml8726_usb_phy_mode("/soc/usb@c90c0000", &mode_b) != 0) { + device_printf(dev, "missing usb@c90c0000 node in FDT\n"); + return (ENXIO); + } + + if (bus_alloc_resources(dev, aml8726_usb_phy_spec, sc->res)) { + device_printf(dev, "can not allocate resources for device\n"); + return (ENXIO); + } + + node = ofw_bus_get_node(dev); + + err = 0; + + len = OF_getencprop_alloc(node, "usb-pwr-en", + 3 * sizeof(pcell_t), (void **)&prop); + npwr_en = (len > 0) ? len : 0; + + sc->npwr_en = 0; + sc->pwr_en = (struct aml8726_usb_phy_gpio *) + malloc(npwr_en * sizeof (*sc->pwr_en), M_DEVBUF, M_WAITOK); + + for (i = 0; i < npwr_en; i++) { + sc->pwr_en[i].dev = OF_device_from_xref(prop[i * 3]); + sc->pwr_en[i].pin = prop[i * 3 + 1]; + sc->pwr_en[i].pol = prop[i * 3 + 2]; + + if (sc->pwr_en[i].dev == NULL) { + err = 1; + break; + } + } + + free(prop, M_OFWPROP); + + if (err) { + device_printf(dev, "unable to parse gpio\n"); + goto fail; + } + + /* Turn on power by setting pin and then enabling output driver. */ + for (i = 0; i < npwr_en; i++) { + if (GPIO_PIN_SET(sc->pwr_en[i].dev, sc->pwr_en[i].pin, + PIN_ON_FLAG(sc->pwr_en[i].pol)) != 0 || + GPIO_PIN_SETFLAGS(sc->pwr_en[i].dev, sc->pwr_en[i].pin, + GPIO_PIN_OUTPUT) != 0) { + device_printf(dev, + "could not use gpio to control power\n"); + goto fail; + } + + sc->npwr_en++; + } + + /* + * Configure the clock source and divider. + */ + + div = 2; + + value = CSR_READ_4(sc, AML_USB_PHY_CFG_REG); + + value &= ~(AML_USB_PHY_CFG_CLK_DIV_MASK | AML_USB_PHY_CFG_CLK_SEL_MASK); + + value &= ~(AML_USB_PHY_CFG_A_RST | AML_USB_PHY_CFG_B_RST); + value &= ~(AML_USB_PHY_CFG_A_PLL_RST | AML_USB_PHY_CFG_B_PLL_RST); + value &= ~(AML_USB_PHY_CFG_A_PHYS_RST | AML_USB_PHY_CFG_B_PHYS_RST); + value &= ~(AML_USB_PHY_CFG_A_POR | AML_USB_PHY_CFG_B_POR); + + value |= AML_USB_PHY_CFG_CLK_SEL_XTAL; + value |= ((div - 1) << AML_USB_PHY_CFG_CLK_DIV_SHIFT) & + AML_USB_PHY_CFG_CLK_DIV_MASK; + value |= AML_USB_PHY_CFG_CLK_EN; + + CSR_WRITE_4(sc, AML_USB_PHY_CFG_REG, value); + CSR_BARRIER(sc, AML_USB_PHY_CFG_REG); + + /* + * Issue the reset sequence. + */ + + value |= (AML_USB_PHY_CFG_A_RST | AML_USB_PHY_CFG_B_RST); + + CSR_WRITE_4(sc, AML_USB_PHY_CFG_REG, value); + CSR_BARRIER(sc, AML_USB_PHY_CFG_REG); + + DELAY(200); + + value &= ~(AML_USB_PHY_CFG_A_RST | AML_USB_PHY_CFG_B_RST); + + CSR_WRITE_4(sc, AML_USB_PHY_CFG_REG, value); + CSR_BARRIER(sc, AML_USB_PHY_CFG_REG); + + DELAY(200); + + value |= (AML_USB_PHY_CFG_A_PLL_RST | AML_USB_PHY_CFG_B_PLL_RST); + + CSR_WRITE_4(sc, AML_USB_PHY_CFG_REG, value); + CSR_BARRIER(sc, AML_USB_PHY_CFG_REG); + + DELAY(200); + + value &= ~(AML_USB_PHY_CFG_A_PLL_RST | AML_USB_PHY_CFG_B_PLL_RST); + + CSR_WRITE_4(sc, AML_USB_PHY_CFG_REG, value); + CSR_BARRIER(sc, AML_USB_PHY_CFG_REG); + + DELAY(200); + + value |= (AML_USB_PHY_CFG_A_PHYS_RST | AML_USB_PHY_CFG_B_PHYS_RST); + + CSR_WRITE_4(sc, AML_USB_PHY_CFG_REG, value); + CSR_BARRIER(sc, AML_USB_PHY_CFG_REG); + + DELAY(200); + + value &= ~(AML_USB_PHY_CFG_A_PHYS_RST | AML_USB_PHY_CFG_B_PHYS_RST); + + CSR_WRITE_4(sc, AML_USB_PHY_CFG_REG, value); + CSR_BARRIER(sc, AML_USB_PHY_CFG_REG); + + DELAY(200); + + value |= (AML_USB_PHY_CFG_A_POR | AML_USB_PHY_CFG_B_POR); + + CSR_WRITE_4(sc, AML_USB_PHY_CFG_REG, value); + CSR_BARRIER(sc, AML_USB_PHY_CFG_REG); + + DELAY(200); + + /* + * Enable by clearing the power on reset. + */ + + value &= ~(AML_USB_PHY_CFG_A_POR | AML_USB_PHY_CFG_B_POR); + + CSR_WRITE_4(sc, AML_USB_PHY_CFG_REG, value); + + CSR_BARRIER(sc, AML_USB_PHY_CFG_REG); + + DELAY(200); + + /* + * Check if the clock was detected. + */ + value = CSR_READ_4(sc, AML_USB_PHY_CFG_REG); + if ((value & AML_USB_PHY_CFG_CLK_DETECTED) != + AML_USB_PHY_CFG_CLK_DETECTED) + device_printf(dev, "PHY Clock not detected\n"); + + /* + * Configure the mode for each port. + */ + + value = CSR_READ_4(sc, AML_USB_PHY_MISC_A_REG); + + value &= ~(AML_USB_PHY_MISC_ID_OVERIDE_EN | + AML_USB_PHY_MISC_ID_OVERIDE_DEVICE | + AML_USB_PHY_MISC_ID_OVERIDE_HOST); + value |= mode_a; + + CSR_WRITE_4(sc, AML_USB_PHY_MISC_A_REG, value); + + value = CSR_READ_4(sc, AML_USB_PHY_MISC_B_REG); + + value &= ~(AML_USB_PHY_MISC_ID_OVERIDE_EN | + AML_USB_PHY_MISC_ID_OVERIDE_DEVICE | + AML_USB_PHY_MISC_ID_OVERIDE_HOST); + value |= mode_b; + + CSR_WRITE_4(sc, AML_USB_PHY_MISC_B_REG, value); + + CSR_BARRIER(sc, AML_USB_PHY_MISC_B_REG); + + return (0); + +fail: + /* In the event of problems attempt to turn things back off. */ + i = sc->npwr_en; + while (i-- != 0) { + GPIO_PIN_SET(sc->pwr_en[i].dev, sc->pwr_en[i].pin, + PIN_OFF_FLAG(sc->pwr_en[i].pol)); + } + + free (sc->pwr_en, M_DEVBUF); + sc->pwr_en = NULL; + + bus_release_resources(dev, aml8726_usb_phy_spec, sc->res); + + return (ENXIO); +} + +static int +aml8726_usb_phy_detach(device_t dev) +{ + struct aml8726_usb_phy_softc *sc = device_get_softc(dev); + uint32_t i; + uint32_t value; + + /* + * Disable by issuing a power on reset. + */ + + value = CSR_READ_4(sc, AML_USB_PHY_CFG_REG); + + value |= (AML_USB_PHY_CFG_A_POR | AML_USB_PHY_CFG_B_POR); + + CSR_WRITE_4(sc, AML_USB_PHY_CFG_REG, value); + + CSR_BARRIER(sc, AML_USB_PHY_CFG_REG); + + /* Turn off power */ + i = sc->npwr_en; + while (i-- != 0) { + (void)GPIO_PIN_SET(sc->pwr_en[i].dev, sc->pwr_en[i].pin, + PIN_OFF_FLAG(sc->pwr_en[i].pol)); + } + free (sc->pwr_en, M_DEVBUF); + sc->pwr_en = NULL; + + bus_release_resources(dev, aml8726_usb_phy_spec, sc->res); + + return (0); +} + +static device_method_t aml8726_usb_phy_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, aml8726_usb_phy_probe), + DEVMETHOD(device_attach, aml8726_usb_phy_attach), + DEVMETHOD(device_detach, aml8726_usb_phy_detach), + + DEVMETHOD_END +}; + +static driver_t aml8726_usb_phy_driver = { + "usbphy", + aml8726_usb_phy_methods, + sizeof(struct aml8726_usb_phy_softc), +}; + +static devclass_t aml8726_usb_phy_devclass; + +DRIVER_MODULE(aml8726_m3usbphy, simplebus, aml8726_usb_phy_driver, + aml8726_usb_phy_devclass, 0, 0); +MODULE_DEPEND(aml8726_m3usbphy, aml8726_gpio, 1, 1, 1); diff --git a/sys/arm/amlogic/aml8726/aml8726_usb_phy-m6.c b/sys/arm/amlogic/aml8726/aml8726_usb_phy-m6.c index 3493f142cdc3..7de23c464cd2 100644 --- a/sys/arm/amlogic/aml8726/aml8726_usb_phy-m6.c +++ b/sys/arm/amlogic/aml8726/aml8726_usb_phy-m6.c @@ -181,8 +181,10 @@ aml8726_usb_phy_attach(device_t dev) sc->pwr_en[i].pin = prop[i * 3 + 1]; sc->pwr_en[i].pol = prop[i * 3 + 2]; - if (sc->pwr_en[i].dev == NULL) + if (sc->pwr_en[i].dev == NULL) { err = 1; + break; + } } free(prop, M_OFWPROP); diff --git a/sys/arm/amlogic/aml8726/files.aml8726 b/sys/arm/amlogic/aml8726/files.aml8726 index ca058a519ed6..e4bc31e73a4a 100644 --- a/sys/arm/amlogic/aml8726/files.aml8726 +++ b/sys/arm/amlogic/aml8726/files.aml8726 @@ -5,7 +5,6 @@ kern/kern_clocksource.c standard arm/arm/bus_space_base.c standard arm/arm/bus_space_generic.c standard -arm/arm/gic.c standard arm/arm/pl310.c standard arm/amlogic/aml8726/aml8726_l2cache.c standard @@ -14,7 +13,7 @@ arm/amlogic/aml8726/aml8726_mp.c optional smp arm/amlogic/aml8726/aml8726_identsoc.c standard arm/amlogic/aml8726/aml8726_ccm.c standard arm/amlogic/aml8726/aml8726_clkmsr.c standard -arm/amlogic/aml8726/aml8726_pic.c standard +arm/amlogic/aml8726/aml8726_pic.c optional aml_pic arm/amlogic/aml8726/aml8726_rtc.c standard arm/amlogic/aml8726/aml8726_timer.c standard arm/amlogic/aml8726/aml8726_wdt.c standard @@ -31,6 +30,7 @@ arm/amlogic/aml8726/aml8726_sdxc-m8.c optional mmc gpio arm/amlogic/aml8726/aml8726_pinctrl.c optional fdt_pinctrl #arm/amlogic/aml8726/aml8726_rng.c optional random arm/amlogic/aml8726/uart_dev_aml8726.c optional uart +arm/amlogic/aml8726/aml8726_usb_phy-m3.c optional dwcotg usb gpio arm/amlogic/aml8726/aml8726_usb_phy-m6.c optional dwcotg usb gpio dev/dwc/if_dwc.c optional dwc diff --git a/sys/arm/annapurna/alpine/alpine_machdep.c b/sys/arm/annapurna/alpine/alpine_machdep.c new file mode 100644 index 000000000000..959b30faa12b --- /dev/null +++ b/sys/arm/annapurna/alpine/alpine_machdep.c @@ -0,0 +1,148 @@ +/*- + * Copyright (c) 2013 Ruslan Bukin + * Copyright (c) 2015 Semihalf + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + */ + +#include +__FBSDID("$FreeBSD$"); + +#define _ARM32_BUS_DMA_PRIVATE +#include +#include +#include +#include +#include + +#include +#include + +#include +#include /* For trapframe_t, used in */ +#include +#include +#include +#include +#include + +#include + +#include "opt_ddb.h" +#include "opt_platform.h" + +struct mtx al_dbg_lock; + +#define DEVMAP_MAX_VA_ADDRESS 0xF0000000 +bus_addr_t al_devmap_pa; +bus_addr_t al_devmap_size; + +#define AL_NB_SERVICE_OFFSET 0x70000 +#define AL_NB_CCU_OFFSET 0x90000 +#define AL_CCU_SNOOP_CONTROL_IOFAB_0_OFFSET 0x4000 +#define AL_CCU_SNOOP_CONTROL_IOFAB_1_OFFSET 0x5000 +#define AL_CCU_SPECULATION_CONTROL_OFFSET 0x4 + +#define AL_NB_ACF_MISC_OFFSET 0xD0 +#define AL_NB_ACF_MISC_READ_BYPASS (1 << 30) + +int alpine_get_devmap_base(bus_addr_t *pa, bus_addr_t *size); + +vm_offset_t +platform_lastaddr(void) +{ + + return (DEVMAP_MAX_VA_ADDRESS); +} + +void +platform_probe_and_attach(void) +{ + +} + +void +platform_gpio_init(void) +{ + +} + +void +platform_late_init(void) +{ + bus_addr_t reg_baddr; + uint32_t val; + + if (!mtx_initialized(&al_dbg_lock)) + mtx_init(&al_dbg_lock, "ALDBG", "ALDBG", MTX_SPIN); + + /* configure system fabric */ + if (bus_space_map(fdtbus_bs_tag, al_devmap_pa, al_devmap_size, 0, + ®_baddr)) + panic("Couldn't map Register Space area"); + + /* do not allow reads to bypass writes to different addresses */ + val = bus_space_read_4(fdtbus_bs_tag, reg_baddr, + AL_NB_SERVICE_OFFSET + AL_NB_ACF_MISC_OFFSET); + val &= ~AL_NB_ACF_MISC_READ_BYPASS; + bus_space_write_4(fdtbus_bs_tag, reg_baddr, + AL_NB_SERVICE_OFFSET + AL_NB_ACF_MISC_OFFSET, val); + + /* enable cache snoop */ + bus_space_write_4(fdtbus_bs_tag, reg_baddr, + AL_NB_CCU_OFFSET + AL_CCU_SNOOP_CONTROL_IOFAB_0_OFFSET, 1); + bus_space_write_4(fdtbus_bs_tag, reg_baddr, + AL_NB_CCU_OFFSET + AL_CCU_SNOOP_CONTROL_IOFAB_1_OFFSET, 1); + + /* disable speculative fetches from masters */ + bus_space_write_4(fdtbus_bs_tag, reg_baddr, + AL_NB_CCU_OFFSET + AL_CCU_SPECULATION_CONTROL_OFFSET, 7); + + bus_space_unmap(fdtbus_bs_tag, reg_baddr, al_devmap_size); +} + +/* + * Construct pmap_devmap[] with DT-derived config data. + */ +int +platform_devmap_init(void) +{ + alpine_get_devmap_base(&al_devmap_pa, &al_devmap_size); + arm_devmap_add_entry(al_devmap_pa, al_devmap_size); + return (0); +} + +struct arm32_dma_range * +bus_dma_get_range(void) +{ + + return (NULL); +} + +int +bus_dma_get_range_nb(void) +{ + + return (0); +} diff --git a/sys/arm/annapurna/alpine/alpine_machdep_mp.c b/sys/arm/annapurna/alpine/alpine_machdep_mp.c new file mode 100644 index 000000000000..2c909175cb05 --- /dev/null +++ b/sys/arm/annapurna/alpine/alpine_machdep_mp.c @@ -0,0 +1,335 @@ +/*- + * Copyright (c) 2013 Ruslan Bukin + * Copyright (c) 2015 Semihalf + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + */ + +#include +__FBSDID("$FreeBSD$"); +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include + +#include +#include +#include + +#define AL_CPU_RESUME_WATERMARK_REG 0x00 +#define AL_CPU_RESUME_FLAGS_REG 0x04 +#define AL_CPU_RESUME_PCPU_RADDR_REG(cpu) (0x08 + 0x04 + 8*(cpu)) +#define AL_CPU_RESUME_PCPU_FLAGS(cpu) (0x08 + 8*(cpu)) + +/* Per-CPU flags */ +#define AL_CPU_RESUME_FLG_PERCPU_DONT_RESUME (1 << 2) + +/* The expected magic number for validating the resume addresses */ +#define AL_CPU_RESUME_MAGIC_NUM 0xf0e1d200 +#define AL_CPU_RESUME_MAGIC_NUM_MASK 0xffffff00 + +/* The expected minimal version number for validating the capabilities */ +#define AL_CPU_RESUME_MIN_VER 0x000000c3 +#define AL_CPU_RESUME_MIN_VER_MASK 0x000000ff + +/* Field controlling the boot-up of companion cores */ +#define AL_NB_INIT_CONTROL (0x8) +#define AL_NB_CONFIG_STATUS_PWR_CTRL(cpu) (0x2020 + (cpu)*0x100) + +#define SERDES_NUM_GROUPS 4 +#define SERDES_GROUP_SIZE 0x400 + +extern bus_addr_t al_devmap_pa; +extern bus_addr_t al_devmap_size; + +extern void mpentry(void); + +int alpine_serdes_resource_get(uint32_t group, bus_space_tag_t *tag, + bus_addr_t *baddr); +static int platform_mp_get_core_cnt(void); +static int alpine_get_cpu_resume_base(u_long *pbase, u_long *psize); +static int alpine_get_nb_base(u_long *pbase, u_long *psize); +static int alpine_get_serdes_base(u_long *pbase, u_long *psize); +int alpine_serdes_resource_get(uint32_t group, bus_space_tag_t *tag, + bus_addr_t *baddr); +static boolean_t alpine_validate_cpu(u_int, phandle_t, u_int, pcell_t *); + +static boolean_t +alpine_validate_cpu(u_int id, phandle_t child, u_int addr_cell, pcell_t *reg) +{ + return fdt_is_compatible(child, "arm,cortex-a15"); +} + +static int +platform_mp_get_core_cnt(void) +{ + static int ncores = 0; + int nchilds; + uint32_t reg; + + /* Calculate ncores value only once */ + if (ncores) + return (ncores); + + reg = cp15_l2ctlr_get(); + ncores = CPUV7_L2CTLR_NPROC(reg); + + nchilds = ofw_cpu_early_foreach(alpine_validate_cpu, false); + + /* Limit CPUs if DTS has configured less than available */ + if ((nchilds > 0) && (nchilds < ncores)) { + printf("SMP: limiting number of active CPUs to %d out of %d\n", + nchilds, ncores); + ncores = nchilds; + } + + return (ncores); +} + +void +platform_mp_init_secondary(void) +{ + + arm_init_secondary_ic(); +} + +void +platform_mp_setmaxid(void) +{ + int core_cnt; + + core_cnt = platform_mp_get_core_cnt(); + mp_maxid = core_cnt - 1; +} + +int +platform_mp_probe(void) +{ + mp_ncpus = platform_mp_get_core_cnt(); + return (1); +} + +static int +alpine_get_cpu_resume_base(u_long *pbase, u_long *psize) +{ + phandle_t node; + u_long base = 0; + u_long size = 0; + + if (pbase == NULL || psize == NULL) + return (EINVAL); + + if ((node = OF_finddevice("/")) == -1) + return (EFAULT); + + if ((node = + ofw_bus_find_compatible(node, "annapurna-labs,al-cpu-resume")) == 0) + return (EFAULT); + + if (fdt_regsize(node, &base, &size)) + return (EFAULT); + + *pbase = base; + *psize = size; + + return (0); +} + +static int +alpine_get_nb_base(u_long *pbase, u_long *psize) +{ + phandle_t node; + u_long base = 0; + u_long size = 0; + + if (pbase == NULL || psize == NULL) + return (EINVAL); + + if ((node = OF_finddevice("/")) == -1) + return (EFAULT); + + if ((node = + ofw_bus_find_compatible(node, "annapurna-labs,al-nb-service")) == 0) + return (EFAULT); + + if (fdt_regsize(node, &base, &size)) + return (EFAULT); + + *pbase = base; + *psize = size; + + return (0); +} + +void +platform_mp_start_ap(void) +{ + uint32_t physaddr; + vm_offset_t vaddr; + uint32_t val; + uint32_t start_mask; + u_long cpu_resume_base; + u_long nb_base; + u_long cpu_resume_size; + u_long nb_size; + bus_addr_t cpu_resume_baddr; + bus_addr_t nb_baddr; + int a; + + if (alpine_get_cpu_resume_base(&cpu_resume_base, &cpu_resume_size)) + panic("Couldn't resolve cpu_resume_base address\n"); + + if (alpine_get_nb_base(&nb_base, &nb_size)) + panic("Couldn't resolve_nb_base address\n"); + + /* Proceed with start addresses for additional CPUs */ + if (bus_space_map(fdtbus_bs_tag, al_devmap_pa + cpu_resume_base, + cpu_resume_size, 0, &cpu_resume_baddr)) + panic("Couldn't map CPU-resume area"); + if (bus_space_map(fdtbus_bs_tag, al_devmap_pa + nb_base, + nb_size, 0, &nb_baddr)) + panic("Couldn't map NB-service area"); + + /* Proceed with start addresses for additional CPUs */ + val = bus_space_read_4(fdtbus_bs_tag, cpu_resume_baddr, + AL_CPU_RESUME_WATERMARK_REG); + if (((val & AL_CPU_RESUME_MAGIC_NUM_MASK) != AL_CPU_RESUME_MAGIC_NUM) || + ((val & AL_CPU_RESUME_MIN_VER_MASK) < AL_CPU_RESUME_MIN_VER)) { + panic("CPU-resume device is not compatible"); + } + + vaddr = (vm_offset_t)mpentry; + physaddr = pmap_kextract(vaddr); + + for (a = 1; a < platform_mp_get_core_cnt(); a++) { + /* Power up the core */ + bus_space_write_4(fdtbus_bs_tag, nb_baddr, + AL_NB_CONFIG_STATUS_PWR_CTRL(a), 0); + mb(); + + /* Enable resume */ + val = bus_space_read_4(fdtbus_bs_tag, cpu_resume_baddr, + AL_CPU_RESUME_PCPU_FLAGS(a)); + val &= ~AL_CPU_RESUME_FLG_PERCPU_DONT_RESUME; + bus_space_write_4(fdtbus_bs_tag, cpu_resume_baddr, + AL_CPU_RESUME_PCPU_FLAGS(a), val); + mb(); + + /* Set resume physical address */ + bus_space_write_4(fdtbus_bs_tag, cpu_resume_baddr, + AL_CPU_RESUME_PCPU_RADDR_REG(a), physaddr); + mb(); + } + + /* Release cores from reset */ + if (bus_space_map(fdtbus_bs_tag, al_devmap_pa + nb_base, + nb_size, 0, &nb_baddr)) + panic("Couldn't map NB-service area"); + + start_mask = (1 << platform_mp_get_core_cnt()) - 1; + + /* Release cores from reset */ + val = bus_space_read_4(fdtbus_bs_tag, nb_baddr, AL_NB_INIT_CONTROL); + val |= start_mask; + bus_space_write_4(fdtbus_bs_tag, nb_baddr, AL_NB_INIT_CONTROL, val); + dsb(); + + bus_space_unmap(fdtbus_bs_tag, nb_baddr, nb_size); + bus_space_unmap(fdtbus_bs_tag, cpu_resume_baddr, cpu_resume_size); +} + +static int +alpine_get_serdes_base(u_long *pbase, u_long *psize) +{ + phandle_t node; + u_long base = 0; + u_long size = 0; + + if (pbase == NULL || psize == NULL) + return (EINVAL); + + if ((node = OF_finddevice("/")) == -1) + return (EFAULT); + + if ((node = + ofw_bus_find_compatible(node, "annapurna-labs,al-serdes")) == 0) + return (EFAULT); + + if (fdt_regsize(node, &base, &size)) + return (EFAULT); + + *pbase = base; + *psize = size; + + return (0); +} + +int +alpine_serdes_resource_get(uint32_t group, bus_space_tag_t *tag, bus_addr_t *baddr) +{ + u_long serdes_base, serdes_size; + int ret; + static bus_addr_t baddr_mapped[SERDES_NUM_GROUPS]; + + if (group >= SERDES_NUM_GROUPS) + return (EINVAL); + + if (baddr_mapped[group]) { + *tag = fdtbus_bs_tag; + *baddr = baddr_mapped[group]; + return (0); + } + + ret = alpine_get_serdes_base(&serdes_base, &serdes_size); + if (ret) + return (ret); + + ret = bus_space_map(fdtbus_bs_tag, + al_devmap_pa + serdes_base + group * SERDES_GROUP_SIZE, + (SERDES_NUM_GROUPS - group) * SERDES_GROUP_SIZE, 0, baddr); + if (ret) + return (ret); + + baddr_mapped[group] = *baddr; + + return (0); +} + +void +platform_ipi_send(cpuset_t cpus, u_int ipi) +{ + + pic_ipi_send(cpus, ipi); +} diff --git a/sys/arm/annapurna/alpine/common.c b/sys/arm/annapurna/alpine/common.c new file mode 100644 index 000000000000..a0fade09128e --- /dev/null +++ b/sys/arm/annapurna/alpine/common.c @@ -0,0 +1,158 @@ +/*- + * Copyright (c) 2013 Ruslan Bukin + * Copyright (c) 2015 Semihalf. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include + +#include +#include + +#include +#include +#include + +#define WDTLOAD 0x000 +#define LOAD_MIN 0x00000001 +#define LOAD_MAX 0xFFFFFFFF +#define WDTVALUE 0x004 +#define WDTCONTROL 0x008 +/* control register masks */ +#define INT_ENABLE (1 << 0) +#define RESET_ENABLE (1 << 1) +#define WDTLOCK 0xC00 +#define UNLOCK 0x1ACCE551 +#define LOCK 0x00000001 + +extern bus_addr_t al_devmap_pa; +struct fdt_fixup_entry fdt_fixup_table[] = { + { NULL, NULL } +}; + +static int alpine_get_wdt_base(uint32_t *pbase, uint32_t *psize); +static int alpine_pic_decode_fdt(uint32_t iparent, uint32_t *intr, + int *interrupt, int *trig, int *pol); + +int alpine_get_devmap_base(bus_addr_t *pa, bus_addr_t *size); + +int alpine_get_devmap_base(bus_addr_t *pa, bus_addr_t *size) +{ + phandle_t node; + + if ((node = OF_finddevice("/")) == 0) + return (ENXIO); + + if ((node = fdt_find_compatible(node, "simple-bus", 1)) == 0) + return (ENXIO); + + return fdt_get_range(node, 0, pa, size); +} + +static int +alpine_get_wdt_base(uint32_t *pbase, uint32_t *psize) +{ + phandle_t node; + u_long base = 0; + u_long size = 0; + + if (pbase == NULL || psize == NULL) + return (EINVAL); + + if ((node = OF_finddevice("/")) == -1) + return (EFAULT); + + if ((node = fdt_find_compatible(node, "simple-bus", 1)) == 0) + return (EFAULT); + + if ((node = + fdt_find_compatible(node, "arm,sp805", 1)) == 0) + return (EFAULT); + + if (fdt_regsize(node, &base, &size)) + return (EFAULT); + + *pbase = base; + *psize = size; + + return (0); +} + +void +cpu_reset(void) +{ + uint32_t wdbase, wdsize; + bus_addr_t wdbaddr; + int ret; + + ret = alpine_get_wdt_base(&wdbase, &wdsize); + if (ret) { + printf("Unable to get WDT base, do power down manually..."); + goto infinite; + } + + ret = bus_space_map(fdtbus_bs_tag, al_devmap_pa + wdbase, + wdsize, 0, &wdbaddr); + if (ret) { + printf("Unable to map WDT base, do power down manually..."); + goto infinite; + } + + bus_space_write_4(fdtbus_bs_tag, wdbaddr, WDTLOCK, UNLOCK); + bus_space_write_4(fdtbus_bs_tag, wdbaddr, WDTLOAD, LOAD_MIN); + bus_space_write_4(fdtbus_bs_tag, wdbaddr, WDTCONTROL, INT_ENABLE | RESET_ENABLE); + +infinite: + while (1) {} +} + +static int +alpine_pic_decode_fdt(uint32_t iparent, uint32_t *intr, int *interrupt, + int *trig, int *pol) +{ + int rv = 0; + + rv = gic_decode_fdt(iparent, intr, interrupt, trig, pol); + if (rv == 0) { + /* This was recognized as our PIC and decoded. */ + interrupt = FDT_MAP_IRQ(iparent, interrupt); + + /* Configure the interrupt if callback provided */ + if (arm_config_irq) + (*arm_config_irq)(*interrupt, *trig, *pol); + } + return (rv); +} + +fdt_pic_decode_t fdt_pic_table[] = { + &alpine_pic_decode_fdt, + NULL +}; diff --git a/sys/arm/annapurna/alpine/files.alpine b/sys/arm/annapurna/alpine/files.alpine new file mode 100644 index 000000000000..fb9b0fee2949 --- /dev/null +++ b/sys/arm/annapurna/alpine/files.alpine @@ -0,0 +1,16 @@ +# $FreeBSD$ + +kern/kern_clocksource.c standard + +arm/arm/bus_space_base.c standard +arm/arm/bus_space_generic.c standard +arm/arm/bus_space_asm_generic.S standard + +arm/versatile/sp804.c standard +arm/versatile/versatile_timer.c standard +dev/uart/uart_dev_ns8250.c optional uart +dev/ofw/ofw_cpu.c standard + +arm/annapurna/alpine/common.c standard +arm/annapurna/alpine/alpine_machdep.c standard +arm/annapurna/alpine/alpine_machdep_mp.c optional smp diff --git a/sys/arm/annapurna/alpine/hal/al_hal_common.h b/sys/arm/annapurna/alpine/hal/al_hal_common.h new file mode 100644 index 000000000000..6e27e1795cb1 --- /dev/null +++ b/sys/arm/annapurna/alpine/hal/al_hal_common.h @@ -0,0 +1,70 @@ +/*- +******************************************************************************** +Copyright (C) 2015 Annapurna Labs Ltd. + +This file may be licensed under the terms of the Annapurna Labs Commercial +License Agreement. + +Alternatively, this file can be distributed under the terms of the GNU General +Public License V2 as published by the Free Software Foundation and can be +found at http://www.gnu.org/licenses/gpl-2.0.html + +Alternatively, redistribution and use in source and binary forms, with or +without modification, are permitted provided that the following conditions are +met: + + * Redistributions of source code must retain the above copyright notice, +this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright +notice, this list of conditions and the following disclaimer in +the documentation and/or other materials provided with the +distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + +/** + * @defgroup group_common HAL Common Layer + * Includes all common header files used by HAL + * @{ + * @file al_hal_common.h + * + */ + +#ifndef __AL_HAL_COMMON_H__ +#define __AL_HAL_COMMON_H__ + +#include "al_hal_plat_types.h" +#include "al_hal_plat_services.h" + +#include "al_hal_types.h" +#include "al_hal_reg_utils.h" + +/* Get the maximal value out of two typed values */ +#define al_max_t(type, x, y) ({ \ + type __max1 = (x); \ + type __max2 = (y); \ + __max1 > __max2 ? __max1 : __max2; }) + +/* Get the minimal value out of two typed values */ +#define al_min_t(type, x, y) ({ \ + type __min1 = (x); \ + type __min2 = (y); \ + __min1 < __min2 ? __min1 : __min2; }) + +/* Get the number of elements in an array */ +#define AL_ARR_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) + +/** @} end of Common group */ +#endif /* __AL_HAL_COMMON_H__ */ diff --git a/sys/arm/annapurna/alpine/hal/al_hal_iofic.h b/sys/arm/annapurna/alpine/hal/al_hal_iofic.h new file mode 100644 index 000000000000..5c19e0a12606 --- /dev/null +++ b/sys/arm/annapurna/alpine/hal/al_hal_iofic.h @@ -0,0 +1,222 @@ +/*- +******************************************************************************** +Copyright (C) 2015 Annapurna Labs Ltd. + +This file may be licensed under the terms of the Annapurna Labs Commercial +License Agreement. + +Alternatively, this file can be distributed under the terms of the GNU General +Public License V2 as published by the Free Software Foundation and can be +found at http://www.gnu.org/licenses/gpl-2.0.html + +Alternatively, redistribution and use in source and binary forms, with or +without modification, are permitted provided that the following conditions are +met: + + * Redistributions of source code must retain the above copyright notice, +this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright +notice, this list of conditions and the following disclaimer in +the documentation and/or other materials provided with the +distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + +/** + * @defgroup group_interrupts Common I/O Fabric Interrupt Controller + * This HAL provides the API for programming the Common I/O Fabric Interrupt + * Controller (IOFIC) found in most of the units attached to the I/O Fabric of + * Alpine platform + * @{ + * @file al_hal_iofic.h + * + * @brief Header file for the interrupt controller that's embedded in various units + * + */ + +#ifndef __AL_HAL_IOFIC_H__ +#define __AL_HAL_IOFIC_H__ + +#include + +/* *INDENT-OFF* */ +#ifdef __cplusplus +extern "C" { +#endif +/* *INDENT-ON* */ + +#define AL_IOFIC_MAX_GROUPS 4 + +/* + * Configurations + */ + +/** + * Configure the interrupt controller registers, actual interrupts are still + * masked at this stage. + * + * @param regs_base regs pointer to interrupt controller registers + * @param group the interrupt group. + * @param flags flags of Interrupt Control Register + * + * @return 0 on success. -EINVAL otherwise. + */ +int al_iofic_config(void __iomem *regs_base, int group, + uint32_t flags); + +/** + * configure the moderation timer resolution for a given group + * Applies for both msix and legacy mode. + * + * @param regs_base pointer to unit registers + * @param group the interrupt group + * @param resolution resolution of the timer interval, the resolution determines the rate + * of decrementing the interval timer, setting value N means that the interval + * timer will be decremented each (N+1) * (0.68) micro seconds. + * + * @return 0 on success. -EINVAL otherwise. + */ +int al_iofic_moder_res_config(void __iomem *regs_base, int group, + uint8_t resolution); + +/** + * configure the moderation timer interval for a given legacy interrupt group + * + * @param regs_base regs pointer to unit registers + * @param group the interrupt group + * @param interval between interrupts in resolution units. 0 disable + * + * @return 0 on success. -EINVAL otherwise. + */ +int al_iofic_legacy_moder_interval_config(void __iomem *regs_base, int group, + uint8_t interval); + +/** + * configure the moderation timer interval for a given msix vector + * + * @param regs_base pointer to unit registers + * @param group the interrupt group + * @param vector vector index + * @param interval interval between interrupts, 0 disable + * + * @return 0 on success. -EINVAL otherwise. + */ +int al_iofic_msix_moder_interval_config(void __iomem *regs_base, int group, + uint8_t vector, uint8_t interval); + +/** +* configure the vmid attributes for a given msix vector. +* +* @param group the interrupt group +* @param vector index +* @param vmid the vmid value +* @param vmid_en take vmid from the intc +* +* @return 0 on success. -EINVAL otherwise. +*/ +int al_iofic_msix_vmid_attributes_config(void __iomem *regs_base, int group, + uint8_t vector, uint32_t vmid, uint8_t vmid_en); + +/** + * return the offset of the unmask register for a given group. + * this function can be used when the upper layer wants to directly + * access the unmask regiter and bypass the al_iofic_unmask() API. + * + * @param regs_base regs pointer to unit registers + * @param group the interrupt group + * @return the offset of the unmask register. + */ +uint32_t __iomem * al_iofic_unmask_offset_get(void __iomem *regs_base, int group); + +/** + * unmask specific interrupts for a given group + * this functions guarantees atomic operations, it is performance optimized as + * it will not require read-modify-write. The unmask done using the interrupt + * mask clear register, so it's safe to call it while the mask is changed by + * the HW (auto mask) or another core. + * + * @param regs_base pointer to unit registers + * @param group the interrupt group + * @param mask bitwise of interrupts to unmask, set bits will be unmasked. + */ +void al_iofic_unmask(void __iomem *regs_base, int group, uint32_t mask); + +/** + * mask specific interrupts for a given group + * this functions modifies interrupt mask register, the callee must make sure + * the mask is not changed by another cpu. + * + * @param regs_base pointer to unit registers + * @param group the interrupt group + * @param mask bitwise of interrupts to mask, set bits will be masked. + */ +void al_iofic_mask(void __iomem *regs_base, int group, uint32_t mask); + +/** + * read the mask register for a given group + * this functions return the interrupt mask register + * + * @param regs_base pointer to unit registers + * @param group the interrupt group + */ +uint32_t al_iofic_read_mask(void __iomem *regs_base, int group); + +/** + * read interrupt cause register for a given group + * this will clear the set bits if the Clear on Read mode enabled. + * @param regs_base pointer to unit registers + * @param group the interrupt group + */ +uint32_t al_iofic_read_cause(void __iomem *regs_base, int group); + +/** + * clear bits in the interrupt cause register for a given group + * + * @param regs_base pointer to unit registers + * @param group the interrupt group + * @param mask bitwise of bits to be cleared, set bits will be cleared. + */ +void al_iofic_clear_cause(void __iomem *regs_base, int group, uint32_t mask); + +/** + * set the cause register for a given group + * this function set the cause register. It will generate an interrupt (if + * the the interrupt isn't masked ) + * + * @param regs_base pointer to unit registers + * @param group the interrupt group + * @param mask bitwise of bits to be set. + */ +void al_iofic_set_cause(void __iomem *regs_base, int group, uint32_t mask); + +/** + * unmask specific interrupts from aborting the udma a given group + * + * @param regs_base pointer to unit registers + * @param group the interrupt group + * @param mask bitwise of interrupts to mask + */ +void al_iofic_abort_mask(void __iomem *regs_base, int group, uint32_t mask); + +/** + * trigger all interrupts that are waiting for moderation timers to expire + * + * @param regs_base pointer to unit registers + * @param group the interrupt group + */ +void al_iofic_interrupt_moderation_reset(void __iomem *regs_base, int group); + +#endif +/** @} end of interrupt controller group */ diff --git a/sys/arm/annapurna/alpine/hal/al_hal_iofic_regs.h b/sys/arm/annapurna/alpine/hal/al_hal_iofic_regs.h new file mode 100644 index 000000000000..81ba20fc9676 --- /dev/null +++ b/sys/arm/annapurna/alpine/hal/al_hal_iofic_regs.h @@ -0,0 +1,127 @@ +/*_ +******************************************************************************** +Copyright (C) 2015 Annapurna Labs Ltd. + +This file may be licensed under the terms of the Annapurna Labs Commercial +License Agreement. + +Alternatively, this file can be distributed under the terms of the GNU General +Public License V2 as published by the Free Software Foundation and can be +found at http://www.gnu.org/licenses/gpl-2.0.html + +Alternatively, redistribution and use in source and binary forms, with or +without modification, are permitted provided that the following conditions are +met: + + * Redistributions of source code must retain the above copyright notice, +this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright +notice, this list of conditions and the following disclaimer in +the documentation and/or other materials provided with the +distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + + +#ifndef __AL_HAL_IOFIC_REG_H +#define __AL_HAL_IOFIC_REG_H + +#ifdef __cplusplus +extern "C" { +#endif +/* +* Unit Registers +*/ + +struct al_iofic_grp_ctrl { + uint32_t int_cause_grp; /* Interrupt Cause RegisterSet by hardware */ + uint32_t rsrvd1; + uint32_t int_cause_set_grp; /* Interrupt Cause Set RegisterWriting 1 to a bit in t ... */ + uint32_t rsrvd2; + uint32_t int_mask_grp; /* Interrupt Mask RegisterIf Auto-mask control bit =TR ... */ + uint32_t rsrvd3; + uint32_t int_mask_clear_grp; /* Interrupt Mask Clear RegisterUsed when auto-mask co ... */ + uint32_t rsrvd4; + uint32_t int_status_grp; /* Interrupt status RegisterThis register latch the st ... */ + uint32_t rsrvd5; + uint32_t int_control_grp; /* Interrupt Control Register */ + uint32_t rsrvd6; + uint32_t int_abort_msk_grp; /* Interrupt Mask RegisterEach bit in this register ma ... */ + uint32_t rsrvd7; + uint32_t int_log_msk_grp; /* Interrupt Log RegisterEach bit in this register mas ... */ + uint32_t rsrvd8; +}; + +struct al_iofic_grp_mod { + uint32_t grp_int_mod_reg; /* Interrupt moderation registerDedicated moderation in ... */ + uint32_t grp_int_vmid_reg; +}; + +struct al_iofic_regs { + struct al_iofic_grp_ctrl ctrl[0]; + uint32_t rsrvd1[0x400 >> 2]; + struct al_iofic_grp_mod grp_int_mod[0][32]; +}; + + +/* +* Registers Fields +*/ + + +/**** int_control_grp register ****/ +/* When Clear_on_Read =1, All bits of Cause register ... */ +#define INT_CONTROL_GRP_CLEAR_ON_READ (1 << 0) +/* (must be set only when MSIX is enabled)When Auto-Ma ... */ +#define INT_CONTROL_GRP_AUTO_MASK (1 << 1) +/* Auto_Clear (RW)When Auto-Clear =1, the bits in the ... */ +#define INT_CONTROL_GRP_AUTO_CLEAR (1 << 2) +/* When Set_on_Posedge =1, the bits in the interrupt c ... */ +#define INT_CONTROL_GRP_SET_ON_POSEDGE (1 << 3) +/* When Moderation_Reset =1, all Moderation timers ass ... */ +#define INT_CONTROL_GRP_MOD_RST (1 << 4) +/* When mask_msi_x =1, No MSI-X from this group is sen ... */ +#define INT_CONTROL_GRP_MASK_MSI_X (1 << 5) +/* MSI-X AWID value, same ID for all cause bits */ +#define INT_CONTROL_GRP_AWID_MASK 0x00000F00 +#define INT_CONTROL_GRP_AWID_SHIFT 8 +/* This value determines the interval between interrup ... */ +#define INT_CONTROL_GRP_MOD_INTV_MASK 0x00FF0000 +#define INT_CONTROL_GRP_MOD_INTV_SHIFT 16 +/* This value determines the Moderation_Timer_Clock sp ... */ +#define INT_CONTROL_GRP_MOD_RES_MASK 0x0F000000 +#define INT_CONTROL_GRP_MOD_RES_SHIFT 24 + +/**** grp_int_mod_reg register ****/ +/* Interrupt Moderation Interval registerDedicated reg ... */ +#define INT_MOD_INTV_MASK 0x000000FF +#define INT_MOD_INTV_SHIFT 0 + +/**** grp_int_vmid_reg register ****/ +/* Interrupt vmid value registerDedicated reg ... */ +#define INT_MSIX_VMID_MASK 0x0000FFFF +#define INT_MSIX_VMID_SHIFT 0 +/* Interrupt vmid_en value registerDedicated reg ... */ +#define INT_MSIX_VMID_EN_SHIFT 31 + +#ifdef __cplusplus +} +#endif + +#endif /* __AL_HAL_IOFIC_REG_H */ + + + + diff --git a/sys/arm/annapurna/alpine/hal/al_hal_nb_regs.h b/sys/arm/annapurna/alpine/hal/al_hal_nb_regs.h new file mode 100644 index 000000000000..9de3bd246865 --- /dev/null +++ b/sys/arm/annapurna/alpine/hal/al_hal_nb_regs.h @@ -0,0 +1,1823 @@ +/*- +******************************************************************************** +Copyright (C) 2015 Annapurna Labs Ltd. + +This file may be licensed under the terms of the Annapurna Labs Commercial +License Agreement. + +Alternatively, this file can be distributed under the terms of the GNU General +Public License V2 as published by the Free Software Foundation and can be +found at http://www.gnu.org/licenses/gpl-2.0.html + +Alternatively, redistribution and use in source and binary forms, with or +without modification, are permitted provided that the following conditions are +met: + + * Redistributions of source code must retain the above copyright notice, +this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright +notice, this list of conditions and the following disclaimer in +the documentation and/or other materials provided with the +distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + +/** + * @{ + * @file al_hal_nb_regs.h + * + * @brief North Bridge service registers + * + */ + +#ifndef __AL_HAL_NB_REGS_H__ +#define __AL_HAL_NB_REGS_H__ + +#include "al_hal_plat_types.h" + +#ifdef __cplusplus +extern "C" { +#endif +/* +* Unit Registers +*/ + + + +struct al_nb_global { + /* [0x0] */ + uint32_t cpus_config; + /* [0x4] */ + uint32_t cpus_secure; + /* [0x8] Force init reset. */ + uint32_t cpus_init_control; + /* [0xc] Force init reset per DECEI mode. */ + uint32_t cpus_init_status; + /* [0x10] */ + uint32_t nb_int_cause; + /* [0x14] */ + uint32_t sev_int_cause; + /* [0x18] */ + uint32_t pmus_int_cause; + /* [0x1c] */ + uint32_t sev_mask; + /* [0x20] */ + uint32_t cpus_hold_reset; + /* [0x24] */ + uint32_t cpus_software_reset; + /* [0x28] */ + uint32_t wd_timer0_reset; + /* [0x2c] */ + uint32_t wd_timer1_reset; + /* [0x30] */ + uint32_t wd_timer2_reset; + /* [0x34] */ + uint32_t wd_timer3_reset; + /* [0x38] */ + uint32_t ddrc_hold_reset; + /* [0x3c] */ + uint32_t fabric_software_reset; + /* [0x40] */ + uint32_t cpus_power_ctrl; + uint32_t rsrvd_0[7]; + /* [0x60] */ + uint32_t acf_base_high; + /* [0x64] */ + uint32_t acf_base_low; + /* [0x68] */ + uint32_t acf_control_override; + /* [0x6c] Read-only that reflects CPU Cluster Local GIC base high address */ + uint32_t lgic_base_high; + /* [0x70] Read-only that reflects CPU Cluster Local GIC base low address */ + uint32_t lgic_base_low; + /* [0x74] Read-only that reflects the device's IOGIC base high address. */ + uint32_t iogic_base_high; + /* [0x78] Read-only that reflects IOGIC base low address */ + uint32_t iogic_base_low; + /* [0x7c] */ + uint32_t io_wr_split_control; + /* [0x80] */ + uint32_t io_rd_rob_control; + /* [0x84] */ + uint32_t sb_pos_error_log_1; + /* [0x88] */ + uint32_t sb_pos_error_log_0; + /* [0x8c] */ + uint32_t c2swb_config; + /* [0x90] */ + uint32_t msix_error_log; + /* [0x94] */ + uint32_t error_cause; + /* [0x98] */ + uint32_t error_mask; + uint32_t rsrvd_1; + /* [0xa0] */ + uint32_t qos_peak_control; + /* [0xa4] */ + uint32_t qos_set_control; + /* [0xa8] */ + uint32_t ddr_qos; + uint32_t rsrvd_2[9]; + /* [0xd0] */ + uint32_t acf_misc; + /* [0xd4] */ + uint32_t config_bus_control; + uint32_t rsrvd_3[2]; + /* [0xe0] */ + uint32_t pos_id_match; + uint32_t rsrvd_4[3]; + /* [0xf0] */ + uint32_t sb_sel_override_awuser; + /* [0xf4] */ + uint32_t sb_override_awuser; + /* [0xf8] */ + uint32_t sb_sel_override_aruser; + /* [0xfc] */ + uint32_t sb_override_aruser; + /* [0x100] */ + uint32_t cpu_max_pd_timer; + /* [0x104] */ + uint32_t cpu_max_pu_timer; + uint32_t rsrvd_5[2]; + /* [0x110] */ + uint32_t auto_ddr_self_refresh_counter; + uint32_t rsrvd_6[3]; + /* [0x120] */ + uint32_t coresight_pd; + /* [0x124] */ + uint32_t coresight_internal_0; + /* [0x128] */ + uint32_t coresight_dbgromaddr; + /* [0x12c] */ + uint32_t coresight_dbgselfaddr; + /* [0x130] */ + uint32_t coresght_targetid; + /* [0x134] */ + uint32_t coresght_targetid0; + uint32_t rsrvd_7[10]; + /* [0x160] */ + uint32_t sb_force_same_id_cfg_0; + /* [0x164] */ + uint32_t sb_mstr_force_same_id_sel_0; + /* [0x168] */ + uint32_t sb_force_same_id_cfg_1; + /* [0x16c] */ + uint32_t sb_mstr_force_same_id_sel_1; + uint32_t rsrvd[932]; +}; +struct al_nb_system_counter { + /* [0x0] */ + uint32_t cnt_control; + /* [0x4] */ + uint32_t cnt_base_freq; + /* [0x8] */ + uint32_t cnt_low; + /* [0xc] */ + uint32_t cnt_high; + /* [0x10] */ + uint32_t cnt_init_low; + /* [0x14] */ + uint32_t cnt_init_high; + uint32_t rsrvd[58]; +}; +struct al_nb_rams_control_misc { + /* [0x0] */ + uint32_t ca15_rf_misc; + uint32_t rsrvd_0; + /* [0x8] */ + uint32_t nb_rf_misc; + uint32_t rsrvd[61]; +}; +struct al_nb_ca15_rams_control { + /* [0x0] */ + uint32_t rf_0; + /* [0x4] */ + uint32_t rf_1; + /* [0x8] */ + uint32_t rf_2; + uint32_t rsrvd; +}; +struct al_nb_semaphores { + /* [0x0] This configuration is only sampled during reset of the processor */ + uint32_t lockn; +}; +struct al_nb_debug { + /* [0x0] */ + uint32_t ca15_outputs_1; + /* [0x4] */ + uint32_t ca15_outputs_2; + uint32_t rsrvd_0[2]; + /* [0x10] */ + uint32_t cpu_msg[4]; + /* [0x20] */ + uint32_t rsv0_config; + /* [0x24] */ + uint32_t rsv1_config; + uint32_t rsrvd_1[2]; + /* [0x30] */ + uint32_t rsv0_status; + /* [0x34] */ + uint32_t rsv1_status; + uint32_t rsrvd_2[2]; + /* [0x40] */ + uint32_t ddrc; + /* [0x44] */ + uint32_t ddrc_phy_smode_control; + /* [0x48] */ + uint32_t ddrc_phy_smode_status; + uint32_t rsrvd_3[5]; + /* [0x60] */ + uint32_t pmc; + uint32_t rsrvd_4[3]; + /* [0x70] */ + uint32_t cpus_general; + /* [0x74] */ + uint32_t cpus_general_1; + uint32_t rsrvd_5[2]; + /* [0x80] */ + uint32_t cpus_int_out; + uint32_t rsrvd_6[3]; + /* [0x90] */ + uint32_t latch_pc_req; + uint32_t rsrvd_7; + /* [0x98] */ + uint32_t latch_pc_low; + /* [0x9c] */ + uint32_t latch_pc_high; + uint32_t rsrvd_8[24]; + /* [0x100] */ + uint32_t track_dump_ctrl; + /* [0x104] */ + uint32_t track_dump_rdata_0; + /* [0x108] */ + uint32_t track_dump_rdata_1; + uint32_t rsrvd_9[5]; + /* [0x120] */ + uint32_t track_events; + uint32_t rsrvd_10[3]; + /* [0x130] */ + uint32_t pos_track_dump_ctrl; + /* [0x134] */ + uint32_t pos_track_dump_rdata_0; + /* [0x138] */ + uint32_t pos_track_dump_rdata_1; + uint32_t rsrvd_11; + /* [0x140] */ + uint32_t c2swb_track_dump_ctrl; + /* [0x144] */ + uint32_t c2swb_track_dump_rdata_0; + /* [0x148] */ + uint32_t c2swb_track_dump_rdata_1; + uint32_t rsrvd_12; + /* [0x150] */ + uint32_t cpus_track_dump_ctrl; + /* [0x154] */ + uint32_t cpus_track_dump_rdata_0; + /* [0x158] */ + uint32_t cpus_track_dump_rdata_1; + uint32_t rsrvd_13; + /* [0x160] */ + uint32_t c2swb_bar_ovrd_high; + /* [0x164] */ + uint32_t c2swb_bar_ovrd_low; + uint32_t rsrvd[38]; +}; +struct al_nb_cpun_config_status { + /* [0x0] This configuration is only sampled during reset of the processor. */ + uint32_t config; + /* [0x4] This configuration is only sampled during reset of the processor. */ + uint32_t config_aarch64; + /* [0x8] */ + uint32_t local_cause_mask; + uint32_t rsrvd_0; + /* [0x10] */ + uint32_t pmus_cause_mask; + /* [0x14] */ + uint32_t sei_cause_mask; + uint32_t rsrvd_1[2]; + /* [0x20] Specifies the state of the CPU with reference to power modes. */ + uint32_t power_ctrl; + /* [0x24] */ + uint32_t power_status; + /* [0x28] */ + uint32_t resume_addr_l; + /* [0x2c] */ + uint32_t resume_addr_h; + uint32_t rsrvd_2[4]; + /* [0x40] */ + uint32_t warm_rst_ctl; + uint32_t rsrvd_3; + /* [0x48] */ + uint32_t rvbar_low; + /* [0x4c] */ + uint32_t rvbar_high; + /* [0x50] */ + uint32_t pmu_snapshot; + uint32_t rsrvd_4[3]; + /* [0x60] */ + uint32_t cpu_msg_in; + uint32_t rsrvd[39]; +}; +struct al_nb_mc_pmu { + /* [0x0] PMU Global Control Register */ + uint32_t pmu_control; + /* [0x4] PMU Global Control Register */ + uint32_t overflow; + uint32_t rsrvd[62]; +}; +struct al_nb_mc_pmu_counters { + /* [0x0] Counter Configuration Register */ + uint32_t cfg; + /* [0x4] Counter Control Register */ + uint32_t cntl; + /* [0x8] Counter Control Register */ + uint32_t low; + /* [0xc] Counter Control Register */ + uint32_t high; + uint32_t rsrvd[4]; +}; +struct al_nb_nb_version { + /* [0x0] Northbridge Revision */ + uint32_t version; + uint32_t rsrvd; +}; +struct al_nb_sriov { + /* [0x0] */ + uint32_t cpu_vmid[4]; + uint32_t rsrvd[4]; +}; +struct al_nb_dram_channels { + /* [0x0] */ + uint32_t dram_0_control; + uint32_t rsrvd_0; + /* [0x8] */ + uint32_t dram_0_status; + uint32_t rsrvd_1; + /* [0x10] */ + uint32_t ddr_int_cause; + uint32_t rsrvd_2; + /* [0x18] */ + uint32_t ddr_cause_mask; + uint32_t rsrvd_3; + /* [0x20] */ + uint32_t address_map; + uint32_t rsrvd_4[3]; + /* [0x30] */ + uint32_t reorder_id_mask_0; + /* [0x34] */ + uint32_t reorder_id_value_0; + /* [0x38] */ + uint32_t reorder_id_mask_1; + /* [0x3c] */ + uint32_t reorder_id_value_1; + /* [0x40] */ + uint32_t reorder_id_mask_2; + /* [0x44] */ + uint32_t reorder_id_value_2; + /* [0x48] */ + uint32_t reorder_id_mask_3; + /* [0x4c] */ + uint32_t reorder_id_value_3; + /* [0x50] */ + uint32_t mrr_control_status; + uint32_t rsrvd[43]; +}; +struct al_nb_ddr_0_mrr { + /* [0x0] Counter Configuration Register */ + uint32_t val; +}; +struct al_nb_push_packet { + /* [0x0] */ + uint32_t pp_config; + uint32_t rsrvd_0[3]; + /* [0x10] */ + uint32_t pp_ext_awuser; + uint32_t rsrvd_1[3]; + /* [0x20] */ + uint32_t pp_base_low; + /* [0x24] */ + uint32_t pp_base_high; + uint32_t rsrvd_2[2]; + /* [0x30] */ + uint32_t pp_sel_awuser; + uint32_t rsrvd[51]; +}; + +struct al_nb_regs { + struct al_nb_global global; /* [0x0] */ + struct al_nb_system_counter system_counter; /* [0x1000] */ + struct al_nb_rams_control_misc rams_control_misc; /* [0x1100] */ + struct al_nb_ca15_rams_control ca15_rams_control[5]; /* [0x1200] */ + uint32_t rsrvd_0[108]; + struct al_nb_semaphores semaphores[64]; /* [0x1400] */ + uint32_t rsrvd_1[320]; + struct al_nb_debug debug; /* [0x1a00] */ + uint32_t rsrvd_2[256]; + struct al_nb_cpun_config_status cpun_config_status[4]; /* [0x2000] */ + uint32_t rsrvd_3[1792]; + struct al_nb_mc_pmu mc_pmu; /* [0x4000] */ + struct al_nb_mc_pmu_counters mc_pmu_counters[4]; /* [0x4100] */ + uint32_t rsrvd_4[160]; + struct al_nb_nb_version nb_version; /* [0x4400] */ + uint32_t rsrvd_5[126]; + struct al_nb_sriov sriov; /* [0x4600] */ + uint32_t rsrvd_6[120]; + struct al_nb_dram_channels dram_channels; /* [0x4800] */ + struct al_nb_ddr_0_mrr ddr_0_mrr[9]; /* [0x4900] */ + uint32_t rsrvd_7[439]; + uint32_t rsrvd_8[1024]; /* [0x5000] */ + struct al_nb_push_packet push_packet; /* [0x6000] */ +}; + + +/* +* Registers Fields +*/ + + +/**** CPUs_Config register ****/ +/* Disable broadcast of barrier onto system bus. +Connect to Processor Cluster SYSBARDISABLE. */ +#define NB_GLOBAL_CPUS_CONFIG_SYSBARDISABLE (1 << 0) +/* Enable broadcast of inner shareable transactions from CPUs. +Connect to Processor Cluster BROADCASTINNER. */ +#define NB_GLOBAL_CPUS_CONFIG_BROADCASTINNER (1 << 1) +/* Disable broadcast of cache maintenance system bus. +Connect to Processor Cluster BROADCASTCACHEMAIN */ +#define NB_GLOBAL_CPUS_CONFIG_BROADCASTCACHEMAINT (1 << 2) +/* Enable broadcast of outer shareable transactions from CPUs. +Connect to Processor Cluster BROADCASTOUTER. */ +#define NB_GLOBAL_CPUS_CONFIG_BROADCASTOUTER (1 << 3) +/* Defines the internal CPU GIC operating frequency ratio with the main CPU clock. +0x0: 1:1 +0x1: 1:2 +0x2: 1:3 +0x3: 1:4 + +Note: This is not in used with CA57 */ +#define NB_GLOBAL_CPUS_CONFIG_PERIPHCLKEN_MASK 0x00000030 +#define NB_GLOBAL_CPUS_CONFIG_PERIPHCLKEN_SHIFT 4 +/* Disables the GIC CPU interface logic and routes the legacy nIRQ, nFIQ, nVIRQ, and nVFIQ +signals directly to the processor: +0 Enable the GIC CPU interface logic. +1 Disable the GIC CPU interface logic. +The processor only samples this signal as it exits reset. */ +#define NB_GLOBAL_CPUS_CONFIG_GIC_DISABLE (1 << 6) +/* Disable L1 data cache and L2 snoop tag RAMs automatic invalidate on reset functionality */ +#define NB_GLOBAL_CPUS_CONFIG_DBG_L1_RESET_DISABLE (1 << 7) +/* Value read in the Cluster ID Affinity Level-1 field, bits[15:8], of the Multiprocessor Affinity +Register (MPIDR). +This signal is only sampled during reset of the processor. */ +#define NB_GLOBAL_CPUS_CONFIG_CLUSTERIDAFF1_MASK 0x00FF0000 +#define NB_GLOBAL_CPUS_CONFIG_CLUSTERIDAFF1_SHIFT 16 +/* Value read in the Cluster ID Affinity Level-2 field, bits[23:16], of the Multiprocessor Affinity +Register (MPIDR). +This signal is only sampled during reset of the processor.. */ +#define NB_GLOBAL_CPUS_CONFIG_CLUSTERIDAFF2_MASK 0xFF000000 +#define NB_GLOBAL_CPUS_CONFIG_CLUSTERIDAFF2_SHIFT 24 + +/**** CPUs_Secure register ****/ +/* DBGEN + */ +#define NB_GLOBAL_CPUS_SECURE_DBGEN (1 << 0) +/* NIDEN + */ +#define NB_GLOBAL_CPUS_SECURE_NIDEN (1 << 1) +/* SPIDEN + */ +#define NB_GLOBAL_CPUS_SECURE_SPIDEN (1 << 2) +/* SPNIDEN + */ +#define NB_GLOBAL_CPUS_SECURE_SPNIDEN (1 << 3) +/* Disable write access to some secure GIC registers */ +#define NB_GLOBAL_CPUS_SECURE_CFGSDISABLE (1 << 4) +/* Disable write access to some secure IOGIC registers */ +#define NB_GLOBAL_CPUS_SECURE_IOGIC_CFGSDISABLE (1 << 5) + +/**** CPUs_Init_Control register ****/ +/* CPU Init Done +Specifies which CPUs' inits are done and can exit poreset. +By default, CPU0 only exits poreset when the CPUs cluster exits power-on-reset and then kicks other CPUs. +If this bit is cleared for a specific CPU, setting it by primary CPU as part of the initialization process will initiate power-on-reset to this specific CPU. */ +#define NB_GLOBAL_CPUS_INIT_CONTROL_CPUS_INITDONE_MASK 0x0000000F +#define NB_GLOBAL_CPUS_INIT_CONTROL_CPUS_INITDONE_SHIFT 0 +/* DBGPWRDNREQ Mask +When CPU does not exist, its DBGPWRDNREQ must be asserted. +If corresponding mask bit is set, the DBGPWDNREQ is deasserted. */ +#define NB_GLOBAL_CPUS_INIT_CONTROL_DBGPWRDNREQ_MASK_MASK 0x000000F0 +#define NB_GLOBAL_CPUS_INIT_CONTROL_DBGPWRDNREQ_MASK_SHIFT 4 +/* Force CPU init power-on-reset exit. +For debug purposes only. */ +#define NB_GLOBAL_CPUS_INIT_CONTROL_FORCE_CPUPOR_MASK 0x00000F00 +#define NB_GLOBAL_CPUS_INIT_CONTROL_FORCE_CPUPOR_SHIFT 8 +/* Force dbgpwrdup signal high +If dbgpwrdup is clear on the processor interface it indicates that the process debug resources are not available for APB access. */ +#define NB_GLOBAL_CPUS_INIT_CONTROL_FORCE_DBGPWRDUP_MASK 0x0000F000 +#define NB_GLOBAL_CPUS_INIT_CONTROL_FORCE_DBGPWRDUP_SHIFT 12 + +/**** CPUs_Init_Status register ****/ +/* Specifies which CPUs are enabled in the device configuration. +sample at rst_cpus_exist[3:0] reset strap. */ +#define NB_GLOBAL_CPUS_INIT_STATUS_CPUS_EXIST_MASK 0x0000000F +#define NB_GLOBAL_CPUS_INIT_STATUS_CPUS_EXIST_SHIFT 0 + +/**** NB_Int_Cause register ****/ +/* + * Each bit corresponds to an IRQ. + * value is 1 for level irq, 0 for trigger irq + * Level IRQ indices: 12-13, 23, 24, 26-29 + */ +#define NB_GLOBAL_NB_INT_CAUSE_LEVEL_IRQ_MASK 0x3D803000 +/* Cross trigger interrupt */ +#define NB_GLOBAL_NB_INT_CAUSE_NCTIIRQ_MASK 0x0000000F +#define NB_GLOBAL_NB_INT_CAUSE_NCTIIRQ_SHIFT 0 +/* Communications channel receive. Receive portion of Data Transfer Register full flag */ +#define NB_GLOBAL_NB_INT_CAUSE_COMMRX_MASK 0x000000F0 +#define NB_GLOBAL_NB_INT_CAUSE_COMMRX_SHIFT 4 +/* Communication channel transmit. Transmit portion of Data Transfer Register empty flag. */ +#define NB_GLOBAL_NB_INT_CAUSE_COMMTX_MASK 0x00000F00 +#define NB_GLOBAL_NB_INT_CAUSE_COMMTX_SHIFT 8 +/* Reserved, read undefined must write as zeros. */ +#define NB_GLOBAL_NB_INT_CAUSE_RESERVED_15_15 (1 << 15) +/* Error indicator for AXI write transactions with a BRESP error condition. Writing 0 to bit[29] of the L2ECTLR clears the error indicator connected to CA15 nAXIERRIRQ. */ +#define NB_GLOBAL_NB_INT_CAUSE_CPU_AXIERRIRQ (1 << 16) +/* Error indicator for: L2 RAM double-bit ECC error, illegal writes to the GIC memory-map region. */ +#define NB_GLOBAL_NB_INT_CAUSE_CPU_INTERRIRQ (1 << 17) +/* Coherent fabric error summary interrupt */ +#define NB_GLOBAL_NB_INT_CAUSE_ACF_ERRORIRQ (1 << 18) +/* DDR Controller ECC Correctable error summary interrupt */ +#define NB_GLOBAL_NB_INT_CAUSE_MCTL_ECC_CORR_ERR (1 << 19) +/* DDR Controller ECC Uncorrectable error summary interrupt */ +#define NB_GLOBAL_NB_INT_CAUSE_MCTL_ECC_UNCORR_ERR (1 << 20) +/* DRAM parity error interrupt */ +#define NB_GLOBAL_NB_INT_CAUSE_MCTL_PARITY_ERR (1 << 21) +/* Reserved, not functional */ +#define NB_GLOBAL_NB_INT_CAUSE_MCTL_WDATARAM_PAR (1 << 22) +/* Error cause summary interrupt */ +#define NB_GLOBAL_NB_INT_CAUSE_ERR_CAUSE_SUM_A0 (1 << 23) +/* SB PoS error */ +#define NB_GLOBAL_NB_INT_CAUSE_SB_POS_ERR (1 << 24) +/* Received msix is not mapped to local GIC or IO-GIC spin */ +#define NB_GLOBAL_NB_INT_CAUSE_MSIX_ERR_INT_M0 (1 << 25) +/* Coresight timestamp overflow */ +#define NB_GLOBAL_NB_INT_CAUSE_CORESIGHT_TS_OVERFLOW_M0 (1 << 26) + +/**** SEV_Int_Cause register ****/ +/* SMMU 0/1 global non-secure fault interrupt */ +#define NB_GLOBAL_SEV_INT_CAUSE_SMMU_GBL_FLT_IRPT_NS_MASK 0x00000003 +#define NB_GLOBAL_SEV_INT_CAUSE_SMMU_GBL_FLT_IRPT_NS_SHIFT 0 +/* SMMU 0/1 non-secure context interrupt */ +#define NB_GLOBAL_SEV_INT_CAUSE_SMMU_CXT_IRPT_NS_MASK 0x0000000C +#define NB_GLOBAL_SEV_INT_CAUSE_SMMU_CXT_IRPT_NS_SHIFT 2 +/* SMMU0/1 Non-secure configuration access fault interrupt */ +#define NB_GLOBAL_SEV_INT_CAUSE_SMMU_CFG_FLT_IRPT_S_MASK 0x00000030 +#define NB_GLOBAL_SEV_INT_CAUSE_SMMU_CFG_FLT_IRPT_S_SHIFT 4 +/* Reserved. Read undefined; must write as zeros. */ +#define NB_GLOBAL_SEV_INT_CAUSE_RESERVED_11_6_MASK 0x00000FC0 +#define NB_GLOBAL_SEV_INT_CAUSE_RESERVED_11_6_SHIFT 6 +/* Reserved. Read undefined; must write as zeros. */ +#define NB_GLOBAL_SEV_INT_CAUSE_RESERVED_31_20_MASK 0xFFF00000 +#define NB_GLOBAL_SEV_INT_CAUSE_RESERVED_31_20_SHIFT 20 + +/**** PMUs_Int_Cause register ****/ +/* CPUs PMU Overflow interrupt */ +#define NB_GLOBAL_PMUS_INT_CAUSE_CPUS_OVFL_MASK 0x0000000F +#define NB_GLOBAL_PMUS_INT_CAUSE_CPUS_OVFL_SHIFT 0 +/* Northbridge PMU overflow */ +#define NB_GLOBAL_PMUS_INT_CAUSE_NB_OVFL (1 << 4) +/* Memory Controller PMU overflow */ +#define NB_GLOBAL_PMUS_INT_CAUSE_MCTL_OVFL (1 << 5) +/* Coherency Interconnect PMU overflow */ +#define NB_GLOBAL_PMUS_INT_CAUSE_CCI_OVFL_MASK 0x000007C0 +#define NB_GLOBAL_PMUS_INT_CAUSE_CCI_OVFL_SHIFT 6 +/* Coherency Interconnect PMU overflow */ +#define NB_GLOBAL_PMUS_INT_CAUSE_SMMU_OVFL_MASK 0x00001800 +#define NB_GLOBAL_PMUS_INT_CAUSE_SMMU_OVFL_SHIFT 11 +/* Reserved. Read undefined; must write as zeros. */ +#define NB_GLOBAL_PMUS_INT_CAUSE_RESERVED_23_13_MASK 0x00FFE000 +#define NB_GLOBAL_PMUS_INT_CAUSE_RESERVED_23_13_SHIFT 13 +/* Southbridge PMUs overflow */ +#define NB_GLOBAL_PMUS_INT_CAUSE_SB_PMUS_OVFL_MASK 0xFF000000 +#define NB_GLOBAL_PMUS_INT_CAUSE_SB_PMUS_OVFL_SHIFT 24 + +/**** CPUs_Hold_Reset register ****/ +/* Shared L2 memory system, interrupt controller and timer logic reset. +Reset is applied only when all processors are in STNDBYWFI state. */ +#define NB_GLOBAL_CPUS_HOLD_RESET_L2RESET (1 << 0) +/* Shared debug domain reset */ +#define NB_GLOBAL_CPUS_HOLD_RESET_PRESETDBG (1 << 1) +/* Individual CPU debug, PTM, watchpoint and breakpoint logic reset */ +#define NB_GLOBAL_CPUS_HOLD_RESET_CPU_DBGRESET_MASK 0x000000F0 +#define NB_GLOBAL_CPUS_HOLD_RESET_CPU_DBGRESET_SHIFT 4 +/* Individual CPU core and VFP/NEON logic reset. +Reset is applied only when specific CPU is in STNDBYWFI state. */ +#define NB_GLOBAL_CPUS_HOLD_RESET_CPU_CORERESET_MASK 0x00000F00 +#define NB_GLOBAL_CPUS_HOLD_RESET_CPU_CORERESET_SHIFT 8 +/* Individual CPU por-on-reset. +Reset is applied only when specific CPU is in STNDBYWFI state. */ +#define NB_GLOBAL_CPUS_HOLD_RESET_CPU_PORESET_MASK 0x0000F000 +#define NB_GLOBAL_CPUS_HOLD_RESET_CPU_PORESET_SHIFT 12 +/* Wait for interrupt mask. +If set, reset is applied without waiting for the specified CPU's STNDBYWFI state. */ +#define NB_GLOBAL_CPUS_HOLD_RESET_WFI_MASK_MASK 0x000F0000 +#define NB_GLOBAL_CPUS_HOLD_RESET_WFI_MASK_SHIFT 16 + +/**** CPUs_Software_Reset register ****/ +/* Write 1. Apply the software reset. */ +#define NB_GLOBAL_CPUS_SOFTWARE_RESET_SWRESET_REQ (1 << 0) +/* Defines the level of software reset. +0x0 - cpu_core: Individual CPU core reset. +0x1 - cpu_poreset: Individual CPU power-on-reset. +0x2 - cpu_dbg: Individual CPU debug reset. +0x3 - cluster_no_dbg: A Cluster reset puts each core into core reset (no dbg) and also resets the interrupt controller and L2 logic. +0x4 - cluster: A Cluster reset puts each core into power-on-reset and also resets the interrupt controller and L2 logic. Debug is active. +0x5 - cluster_poreset: A Cluster power-on-reset puts each core into power-on-reset and also resets the interrupt controller and L2 logic. This include the cluster debug logic. */ +#define NB_GLOBAL_CPUS_SOFTWARE_RESET_LEVEL_MASK 0x0000000E +#define NB_GLOBAL_CPUS_SOFTWARE_RESET_LEVEL_SHIFT 1 +/* Individual CPU core reset. */ +#define NB_GLOBAL_CPUS_SOFTWARE_RESET_LEVEL_CPU_CORE \ + (0x0 << NB_GLOBAL_CPUS_SOFTWARE_RESET_LEVEL_SHIFT) +/* Individual CPU power-on-reset. */ +#define NB_GLOBAL_CPUS_SOFTWARE_RESET_LEVEL_CPU_PORESET \ + (0x1 << NB_GLOBAL_CPUS_SOFTWARE_RESET_LEVEL_SHIFT) +/* Individual CPU debug reset. */ +#define NB_GLOBAL_CPUS_SOFTWARE_RESET_LEVEL_CPU_DBG \ + (0x2 << NB_GLOBAL_CPUS_SOFTWARE_RESET_LEVEL_SHIFT) +/* A Cluster reset puts each core into core reset (no dbg) and a ... */ +#define NB_GLOBAL_CPUS_SOFTWARE_RESET_LEVEL_CLUSTER_NO_DBG \ + (0x3 << NB_GLOBAL_CPUS_SOFTWARE_RESET_LEVEL_SHIFT) +/* A Cluster reset puts each core into power-on-reset and also r ... */ +#define NB_GLOBAL_CPUS_SOFTWARE_RESET_LEVEL_CLUSTER \ + (0x4 << NB_GLOBAL_CPUS_SOFTWARE_RESET_LEVEL_SHIFT) +/* A Cluster power-on-reset puts each core into power-on-reset a ... */ +#define NB_GLOBAL_CPUS_SOFTWARE_RESET_LEVEL_CLUSTER_PORESET \ + (0x5 << NB_GLOBAL_CPUS_SOFTWARE_RESET_LEVEL_SHIFT) +/* Defines which cores to reset when no cluster_poreset is requested. */ +#define NB_GLOBAL_CPUS_SOFTWARE_RESET_CORES_MASK 0x000000F0 +#define NB_GLOBAL_CPUS_SOFTWARE_RESET_CORES_SHIFT 4 +/* CPUn wait for interrupt enable. +Defines which CPU WFI indication to wait for before applying the software reset. */ +#define NB_GLOBAL_CPUS_SOFTWARE_RESET_WFI_MASK_MASK 0x000F0000 +#define NB_GLOBAL_CPUS_SOFTWARE_RESET_WFI_MASK_SHIFT 16 + +/**** WD_Timer0_Reset register ****/ +/* Shared L2 memory system, interrupt controller and timer logic reset */ +#define NB_GLOBAL_WD_TIMER0_RESET_L2RESET (1 << 0) +/* Shared debug domain reset */ +#define NB_GLOBAL_WD_TIMER0_RESET_PRESETDBG (1 << 1) +/* Individual CPU debug PTM, watchpoint and breakpoint logic reset */ +#define NB_GLOBAL_WD_TIMER0_RESET_CPU_DBGRESET_MASK 0x000000F0 +#define NB_GLOBAL_WD_TIMER0_RESET_CPU_DBGRESET_SHIFT 4 +/* Individual CPU core and VFP/NEON logic reset */ +#define NB_GLOBAL_WD_TIMER0_RESET_CPU_CORERESET_MASK 0x00000F00 +#define NB_GLOBAL_WD_TIMER0_RESET_CPU_CORERESET_SHIFT 8 +/* Individual CPU por-on-reset */ +#define NB_GLOBAL_WD_TIMER0_RESET_CPU_PORESET_MASK 0x0000F000 +#define NB_GLOBAL_WD_TIMER0_RESET_CPU_PORESET_SHIFT 12 + +/**** WD_Timer1_Reset register ****/ +/* Shared L2 memory system, interrupt controller and timer logic reset */ +#define NB_GLOBAL_WD_TIMER1_RESET_L2RESET (1 << 0) +/* Shared debug domain reset */ +#define NB_GLOBAL_WD_TIMER1_RESET_PRESETDBG (1 << 1) +/* Individual CPU debug PTM, watchpoint and breakpoint logic reset */ +#define NB_GLOBAL_WD_TIMER1_RESET_CPU_DBGRESET_MASK 0x000000F0 +#define NB_GLOBAL_WD_TIMER1_RESET_CPU_DBGRESET_SHIFT 4 +/* Individual CPU core and VFP/NEON logic reset */ +#define NB_GLOBAL_WD_TIMER1_RESET_CPU_CORERESET_MASK 0x00000F00 +#define NB_GLOBAL_WD_TIMER1_RESET_CPU_CORERESET_SHIFT 8 +/* Individual CPU por-on-reset */ +#define NB_GLOBAL_WD_TIMER1_RESET_CPU_PORESET_MASK 0x0000F000 +#define NB_GLOBAL_WD_TIMER1_RESET_CPU_PORESET_SHIFT 12 + +/**** WD_Timer2_Reset register ****/ +/* Shared L2 memory system, interrupt controller and timer logic reset */ +#define NB_GLOBAL_WD_TIMER2_RESET_L2RESET (1 << 0) +/* Shared debug domain reset */ +#define NB_GLOBAL_WD_TIMER2_RESET_PRESETDBG (1 << 1) +/* Individual CPU debug, PTM, watchpoint and breakpoint logic reset */ +#define NB_GLOBAL_WD_TIMER2_RESET_CPU_DBGRESET_MASK 0x000000F0 +#define NB_GLOBAL_WD_TIMER2_RESET_CPU_DBGRESET_SHIFT 4 +/* Individual CPU core and VFP/NEON logic reset */ +#define NB_GLOBAL_WD_TIMER2_RESET_CPU_CORERESET_MASK 0x00000F00 +#define NB_GLOBAL_WD_TIMER2_RESET_CPU_CORERESET_SHIFT 8 +/* Individual CPU por-on-reset */ +#define NB_GLOBAL_WD_TIMER2_RESET_CPU_PORESET_MASK 0x0000F000 +#define NB_GLOBAL_WD_TIMER2_RESET_CPU_PORESET_SHIFT 12 + +/**** WD_Timer3_Reset register ****/ +/* Shared L2 memory system, interrupt controller and timer logic reset */ +#define NB_GLOBAL_WD_TIMER3_RESET_L2RESET (1 << 0) +/* Shared debug domain reset */ +#define NB_GLOBAL_WD_TIMER3_RESET_PRESETDBG (1 << 1) +/* Individual CPU debug, PTM, watchpoint and breakpoint logic reset */ +#define NB_GLOBAL_WD_TIMER3_RESET_CPU_DBGRESET_MASK 0x000000F0 +#define NB_GLOBAL_WD_TIMER3_RESET_CPU_DBGRESET_SHIFT 4 +/* Individual CPU core and VFP/NEON logic reset */ +#define NB_GLOBAL_WD_TIMER3_RESET_CPU_CORERESET_MASK 0x00000F00 +#define NB_GLOBAL_WD_TIMER3_RESET_CPU_CORERESET_SHIFT 8 +/* Individual CPU por-on-reset */ +#define NB_GLOBAL_WD_TIMER3_RESET_CPU_PORESET_MASK 0x0000F000 +#define NB_GLOBAL_WD_TIMER3_RESET_CPU_PORESET_SHIFT 12 + +/**** DDRC_Hold_Reset register ****/ +/* DDR Control and PHY memory mapped registers reset control +0 - Reset is deasserted. +1 - Reset is asserted (active). */ +#define NB_GLOBAL_DDRC_HOLD_RESET_APB_SYNC_RESET (1 << 0) +/* DDR Control Core reset control +0 - Reset is deasserted. +1 - Reset is asserted. +This field must be set to 0 to start the initialization process after configuring the DDR Controller registers. */ +#define NB_GLOBAL_DDRC_HOLD_RESET_CORE_SYNC_RESET (1 << 1) +/* DDR Control AXI Interface reset control +0 - Reset is deasserted. +1 - Reset is asserted. +This field must not be set to 0 while core_sync_reset is set to 1. */ +#define NB_GLOBAL_DDRC_HOLD_RESET_AXI_SYNC_RESET (1 << 2) +/* DDR PUB Controller reset control +0 - Reset is deasserted. +1 - Reset is asserted. +This field must be set to 0 to start the initialization process after configuring the PUB Controller registers. */ +#define NB_GLOBAL_DDRC_HOLD_RESET_PUB_CTL_SYNC_RESET (1 << 3) +/* DDR PUB SDR Controller reset control +0 - Reset is deasserted. +1 - Reset is asserted. +This field must be set to 0 to start the initialization process after configuring the PUB Controller registers. */ +#define NB_GLOBAL_DDRC_HOLD_RESET_PUB_SDR_SYNC_RESET (1 << 4) +/* DDR PHY reset control +0 - Reset is deasserted. +1 - Reset is asserted. */ +#define NB_GLOBAL_DDRC_HOLD_RESET_PHY_SYNC_RESET (1 << 5) +/* Memory initialization input to DDR SRAM for parity check support */ +#define NB_GLOBAL_DDRC_HOLD_RESET_DDR_UNIT_MEM_INIT (1 << 6) + +/**** Fabric_Software_Reset register ****/ +/* Write 1 apply the software reset. */ +#define NB_GLOBAL_FABRIC_SOFTWARE_RESET_SWRESET_REQ (1 << 0) +/* Defines the level of software reset: +0x0 - fabric: Fabric reset +0x1 - gic: GIC reset +0x2 - smmu: SMMU reset */ +#define NB_GLOBAL_FABRIC_SOFTWARE_RESET_LEVEL_MASK 0x0000000E +#define NB_GLOBAL_FABRIC_SOFTWARE_RESET_LEVEL_SHIFT 1 +/* Fabric reset */ +#define NB_GLOBAL_FABRIC_SOFTWARE_RESET_LEVEL_FABRIC \ + (0x0 << NB_GLOBAL_FABRIC_SOFTWARE_RESET_LEVEL_SHIFT) +/* GIC reset */ +#define NB_GLOBAL_FABRIC_SOFTWARE_RESET_LEVEL_GIC \ + (0x1 << NB_GLOBAL_FABRIC_SOFTWARE_RESET_LEVEL_SHIFT) +/* SMMU reset */ +#define NB_GLOBAL_FABRIC_SOFTWARE_RESET_LEVEL_SMMU \ + (0x2 << NB_GLOBAL_FABRIC_SOFTWARE_RESET_LEVEL_SHIFT) +/* CPUn waiting for interrupt enable. +Defines which CPU WFI indication to wait before applying the software reset. */ +#define NB_GLOBAL_FABRIC_SOFTWARE_RESET_WFI_MASK_MASK 0x000F0000 +#define NB_GLOBAL_FABRIC_SOFTWARE_RESET_WFI_MASK_SHIFT 16 + +/**** CPUs_Power_Ctrl register ****/ +/* L2 WFI enable +When all the processors are in WFI mode or powered-down, the shared L2 memory system Power Management controller resumes clock on any interrupt. +Power management controller resumes clock on snoop request. +NOT IMPLEMENTED */ +#define NB_GLOBAL_CPUS_POWER_CTRL_L2WFI_EN (1 << 0) +/* L2 WFI status */ +#define NB_GLOBAL_CPUS_POWER_CTRL_L2WFI_STATUS (1 << 1) +/* L2 RAMs Power Down +Power down the L2 RAMs. L2 caches must be flushed prior to entering this state. */ +#define NB_GLOBAL_CPUS_POWER_CTRL_L2RAMS_PWRDN_EN (1 << 2) +/* L2 RAMs power down status */ +#define NB_GLOBAL_CPUS_POWER_CTRL_L2RAMS_PWRDN_STATUS (1 << 3) +/* CPU state condition to enable L2 RAM power down +0 - Power down +1 - WFI +NOT IMPLEMENTED */ +#define NB_GLOBAL_CPUS_POWER_CTRL_L2RAMS_PWRDN_CPUS_STATE_MASK 0x000000F0 +#define NB_GLOBAL_CPUS_POWER_CTRL_L2RAMS_PWRDN_CPUS_STATE_SHIFT 4 +/* Enable external debugger over power-down. +Provides support for external debug over power down. If any or all of the processors are powered down, the SoC can still use the debug facilities if the debug PCLKDBG domain is powered up. */ +#define NB_GLOBAL_CPUS_POWER_CTRL_EXT_DEBUGGER_OVER_PD_EN (1 << 8) +/* L2 hardware flush request. This signal indicates: +0 L2 hardware flush request is not asserted. flush is performed by SW +1 L2 hardware flush request is asserted by power management block as part of cluster rams power down flow. HW starts L2 flush flow when all CPUs are in WFI */ +#define NB_GLOBAL_CPUS_POWER_CTRL_L2FLUSH_EN (1 << 9) +/* Force wakeup the CPU in L2RAM power down +INTERNAL DEBUG PURPOSE ONLY */ +#define NB_GLOBAL_CPUS_POWER_CTRL_FORCE_CPUS_OK_PWRUP (1 << 27) +/* L2 RAMs power down SM status */ +#define NB_GLOBAL_CPUS_POWER_CTRL_L2RAMS_PWRDN_SM_STATUS_MASK 0xF0000000 +#define NB_GLOBAL_CPUS_POWER_CTRL_L2RAMS_PWRDN_SM_STATUS_SHIFT 28 + +/**** ACF_Base_High register ****/ +/* Coherency Fabric registers base [39:32]. */ +#define NB_GLOBAL_ACF_BASE_HIGH_BASE_39_32_MASK 0x000000FF +#define NB_GLOBAL_ACF_BASE_HIGH_BASE_39_32_SHIFT 0 +/* Coherency Fabric registers base [31:15] */ +#define NB_GLOBAL_ACF_BASE_LOW_BASED_31_15_MASK 0xFFFF8000 +#define NB_GLOBAL_ACF_BASE_LOW_BASED_31_15_SHIFT 15 + +/**** ACF_Control_Override register ****/ +/* Override the AWCACHE[0] and ARCACHE[0] outputs to be +non-bufferable. One bit exists for each master interface. +Connected to BUFFERABLEOVERRIDE[2:0] */ +#define NB_GLOBAL_ACF_CONTROL_OVERRIDE_BUFFOVRD_MASK 0x00000007 +#define NB_GLOBAL_ACF_CONTROL_OVERRIDE_BUFFOVRD_SHIFT 0 +/* Overrides the ARQOS and AWQOS input signals. One bit exists for each slave +interface. +Connected to QOSOVERRIDE[4:0] */ +#define NB_GLOBAL_ACF_CONTROL_OVERRIDE_QOSOVRD_MASK 0x000000F8 +#define NB_GLOBAL_ACF_CONTROL_OVERRIDE_QOSOVRD_SHIFT 3 +/* If LOW, then AC requests are never issued on the corresponding slave +interface. One bit exists for each slave interface. +Connected to ACCHANNELEN[4:0]. */ +#define NB_GLOBAL_ACF_CONTROL_OVERRIDE_ACE_CH_EN_MASK 0x00001F00 +#define NB_GLOBAL_ACF_CONTROL_OVERRIDE_ACE_CH_EN_SHIFT 8 +/* Internal register: +Enables 4k hazard of post-barrier vs pre-barrier transactions. Otherwise, 64B hazard granularity is applied. */ +#define NB_GLOBAL_ACF_CONTROL_OVERRIDE_DMB_4K_HAZARD_EN (1 << 13) + +/**** LGIC_Base_High register ****/ +/* GIC registers base [39:32]. +This value is sampled into the CP15 Configuration Base Address Register (CBAR) at reset. */ +#define NB_GLOBAL_LGIC_BASE_HIGH_BASE_39_32_MASK 0x000000FF +#define NB_GLOBAL_LGIC_BASE_HIGH_BASE_39_32_SHIFT 0 +#define NB_GLOBAL_LGIC_BASE_HIGH_BASE_43_32_MASK_PKR 0x00000FFF +#define NB_GLOBAL_LGIC_BASE_HIGH_BASE_43_32_SHIFT_PKR 0 +/* GIC registers base [31:15]. +This value is sampled into the CP15 Configuration Base Address Register (CBAR) at reset */ +#define NB_GLOBAL_LGIC_BASE_LOW_BASED_31_15_MASK 0xFFFF8000 +#define NB_GLOBAL_LGIC_BASE_LOW_BASED_31_15_SHIFT 15 + +/**** IOGIC_Base_High register ****/ +/* IOGIC registers base [39:32] */ +#define NB_GLOBAL_IOGIC_BASE_HIGH_BASE_39_32_MASK 0x000000FF +#define NB_GLOBAL_IOGIC_BASE_HIGH_BASE_39_32_SHIFT 0 +/* IOGIC registers base [31:15] */ +#define NB_GLOBAL_IOGIC_BASE_LOW_BASED_31_15_MASK 0xFFFF8000 +#define NB_GLOBAL_IOGIC_BASE_LOW_BASED_31_15_SHIFT 15 + +/**** IO_Wr_Split_Control register ****/ +/* Write splitters bypass. +[0] Splitter 0 bypass enable +[1] Splitter 1 bypass enable */ +#define NB_GLOBAL_IO_WR_SPLIT_CONTROL_WR_SPLT_BYPASS_MASK 0x00000003 +#define NB_GLOBAL_IO_WR_SPLIT_CONTROL_WR_SPLT_BYPASS_SHIFT 0 +/* Write splitters store and forward. +If store and forward is disabled, splitter does not check non-active BE in the middle of a transaction. */ +#define NB_GLOBAL_IO_WR_SPLIT_CONTROL_WR_SPLT_ST_FW_MASK 0x0000000C +#define NB_GLOBAL_IO_WR_SPLIT_CONTROL_WR_SPLT_ST_FW_SHIFT 2 +/* Write splitters unmodify snoop type. +Disables modifying snoop type from Clean & Invalidate to Invalidate when conditions enable it. Only split operation to 64B is applied. */ +#define NB_GLOBAL_IO_WR_SPLIT_CONTROL_WR_SPLT_UNMODIFY_SNP_MASK 0x00000030 +#define NB_GLOBAL_IO_WR_SPLIT_CONTROL_WR_SPLT_UNMODIFY_SNP_SHIFT 4 +/* Write splitters unsplit non-coherent access. +Disables splitting of non-coherent access to cache-line chunks. */ +#define NB_GLOBAL_IO_WR_SPLIT_CONTROL_WR_SPLT_UNSPLIT_NOSNP_MASK 0x000000C0 +#define NB_GLOBAL_IO_WR_SPLIT_CONTROL_WR_SPLT_UNSPLIT_NOSNP_SHIFT 6 +/* Write splitter rate limit. */ +#define NB_GLOBAL_IO_WR_SPLIT_CONTROL_WR0_SPLT_RATE_LIMIT_MASK 0x00001F00 +#define NB_GLOBAL_IO_WR_SPLIT_CONTROL_WR0_SPLT_RATE_LIMIT_SHIFT 8 +/* Write splitter rate limit */ +#define NB_GLOBAL_IO_WR_SPLIT_CONTROL_WR1_SPLT_RATE_LIMIT_MASK 0x0003E000 +#define NB_GLOBAL_IO_WR_SPLIT_CONTROL_WR1_SPLT_RATE_LIMIT_SHIFT 13 +/* Write splitters 64bit remap enable +Enables remapping of 64bit transactions */ +#define NB_GLOBAL_IO_WR_SPLIT_CONTROL_WR_SPLT_REMAP_64BIT_EN_MASK 0x000C0000 +#define NB_GLOBAL_IO_WR_SPLIT_CONTROL_WR_SPLT_REMAP_64BIT_EN_SHIFT 18 +/* Clear is not supported. This bit was changed to wr_pack_disable. +In default mode, AWADDR waits for WDATA. */ +#define NB_GLOBAL_IO_WR_SPLIT_CONTROL_WR_SPLT_CLEAR_MASK 0xC0000000 +#define NB_GLOBAL_IO_WR_SPLIT_CONTROL_WR_SPLT_CLEAR_SHIFT 30 + +/**** IO_Rd_ROB_Control register ****/ +/* Read ROB Bypass +[0] Rd ROB 0 bypass enable. +[1] Rd ROB 1 bypass enable. */ +#define NB_GLOBAL_IO_RD_ROB_CONTROL_RD_ROB_BYPASS_MASK 0x00000003 +#define NB_GLOBAL_IO_RD_ROB_CONTROL_RD_ROB_BYPASS_SHIFT 0 +/* Read ROB in order. +Return data in the order of request acceptance. */ +#define NB_GLOBAL_IO_RD_ROB_CONTROL_RD_ROB_INORDER_MASK 0x0000000C +#define NB_GLOBAL_IO_RD_ROB_CONTROL_RD_ROB_INORDER_SHIFT 2 +/* Read ROB response rate +When enabled drops one cycle from back to back read responses */ +#define NB_GLOBAL_IO_RD_ROB_CONTROL_RD_ROB_RSP_RATE_MASK 0x00000030 +#define NB_GLOBAL_IO_RD_ROB_CONTROL_RD_ROB_RSP_RATE_SHIFT 4 +/* Read splitter rate limit */ +#define NB_GLOBAL_IO_RD_ROB_CONTROL_RD0_ROB_RATE_LIMIT_MASK 0x00001F00 +#define NB_GLOBAL_IO_RD_ROB_CONTROL_RD0_ROB_RATE_LIMIT_SHIFT 8 +/* Read splitter rate limit */ +#define NB_GLOBAL_IO_RD_ROB_CONTROL_RD1_ROB_RATE_LIMIT_MASK 0x0003E000 +#define NB_GLOBAL_IO_RD_ROB_CONTROL_RD1_ROB_RATE_LIMIT_SHIFT 13 + +/**** SB_PoS_Error_Log_1 register ****/ +/* Error Log 1 +[7:0] address_high +[16:8] request id +[18:17] bresp */ +#define NB_GLOBAL_SB_POS_ERROR_LOG_1_ERR_LOG_MASK 0x7FFFFFFF +#define NB_GLOBAL_SB_POS_ERROR_LOG_1_ERR_LOG_SHIFT 0 +/* Valid logged error +Set on SB PoS error occurrence on capturing the error information. Subsequent errors will not be captured until the valid bit is cleared. +The SB PoS reports on write errors. +When valid, an interrupt is set in the NB Cause Register. */ +#define NB_GLOBAL_SB_POS_ERROR_LOG_1_VALID (1 << 31) + +/**** MSIx_Error_Log register ****/ +/* Error Log +Corresponds to MSIx address message [30:0]. */ +#define NB_GLOBAL_MSIX_ERROR_LOG_ERR_LOG_MASK 0x7FFFFFFF +#define NB_GLOBAL_MSIX_ERROR_LOG_ERR_LOG_SHIFT 0 +/* Valid logged error */ +#define NB_GLOBAL_MSIX_ERROR_LOG_VALID (1 << 31) + +/**** Error_Cause register ****/ +/* Received msix is not mapped to local GIC or IO-GIC spin */ +#define NB_GLOBAL_ERROR_CAUSE_MSIX_ERR_INT (1 << 2) +/* Coresight timestamp overflow */ +#define NB_GLOBAL_ERROR_CAUSE_CORESIGHT_TS_OVERFLOW (1 << 3) +/* Write data parity error from SB channel 0. */ +#define NB_GLOBAL_ERROR_CAUSE_SB0_WRDATA_PERR (1 << 4) +/* Write data parity error from SB channel 1. */ +#define NB_GLOBAL_ERROR_CAUSE_SB1_WRDATA_PERR (1 << 5) +/* Read data parity error from SB slaves. */ +#define NB_GLOBAL_ERROR_CAUSE_SB_SLV_RDATA_PERR (1 << 6) +/* Local GIC uncorrectable ECC error */ +#define NB_GLOBAL_ERROR_CAUSE_LOCAL_GIC_ECC_FATAL (1 << 7) +/* SB PoS error */ +#define NB_GLOBAL_ERROR_CAUSE_SB_POS_ERR (1 << 8) +/* Coherent fabric error summary interrupt */ +#define NB_GLOBAL_ERROR_CAUSE_ACF_ERRORIRQ (1 << 9) +/* Error indicator for AXI write transactions with a BRESP error condition. Writing 0 to bit[29] of the L2ECTLR clears the error indicator connected to CA15 nAXIERRIRQ. */ +#define NB_GLOBAL_ERROR_CAUSE_CPU_AXIERRIRQ (1 << 10) +/* Error indicator for: L2 RAM double-bit ECC error, illegal writes to the GIC memory-map region. */ +#define NB_GLOBAL_ERROR_CAUSE_CPU_INTERRIRQ (1 << 12) +/* DDR cause summery interrupt */ +#define NB_GLOBAL_ERROR_CAUSE_DDR_CAUSE_SUM (1 << 14) + +/**** QoS_Peak_Control register ****/ +/* Peak Read Low Threshold +When the number of outstanding read transactions from SB masters is below this value, the CPU is assigned high-priority QoS. */ +#define NB_GLOBAL_QOS_PEAK_CONTROL_PEAK_RD_L_THRESHOLD_MASK 0x0000007F +#define NB_GLOBAL_QOS_PEAK_CONTROL_PEAK_RD_L_THRESHOLD_SHIFT 0 +/* Peak Read High Threshold +When the number of outstanding read transactions from SB masters exceeds this value, the CPU is assigned high-priority QoS. */ +#define NB_GLOBAL_QOS_PEAK_CONTROL_PEAK_RD_H_THRESHOLD_MASK 0x00007F00 +#define NB_GLOBAL_QOS_PEAK_CONTROL_PEAK_RD_H_THRESHOLD_SHIFT 8 +/* Peak Write Low Threshold +When the number of outstanding write transactions from SB masters is below this value, the CPU is assigned high-priority QoS */ +#define NB_GLOBAL_QOS_PEAK_CONTROL_PEAK_WR_L_THRESHOLD_MASK 0x007F0000 +#define NB_GLOBAL_QOS_PEAK_CONTROL_PEAK_WR_L_THRESHOLD_SHIFT 16 +/* Peak Write High Threshold +When the number of outstanding write transactions from SB masters exceeds this value, the CPU is assigned high-priority QoS. */ +#define NB_GLOBAL_QOS_PEAK_CONTROL_PEAK_WR_H_THRESHOLD_MASK 0x7F000000 +#define NB_GLOBAL_QOS_PEAK_CONTROL_PEAK_WR_H_THRESHOLD_SHIFT 24 + +/**** QoS_Set_Control register ****/ +/* CPU Low priority Read QoS */ +#define NB_GLOBAL_QOS_SET_CONTROL_CPU_LP_ARQOS_MASK 0x0000000F +#define NB_GLOBAL_QOS_SET_CONTROL_CPU_LP_ARQOS_SHIFT 0 +/* CPU High priority Read QoS */ +#define NB_GLOBAL_QOS_SET_CONTROL_CPU_HP_ARQOS_MASK 0x000000F0 +#define NB_GLOBAL_QOS_SET_CONTROL_CPU_HP_ARQOS_SHIFT 4 +/* CPU Low priority Write QoS */ +#define NB_GLOBAL_QOS_SET_CONTROL_CPU_LP_AWQOS_MASK 0x00000F00 +#define NB_GLOBAL_QOS_SET_CONTROL_CPU_LP_AWQOS_SHIFT 8 +/* CPU High priority Write QoS */ +#define NB_GLOBAL_QOS_SET_CONTROL_CPU_HP_AWQOS_MASK 0x0000F000 +#define NB_GLOBAL_QOS_SET_CONTROL_CPU_HP_AWQOS_SHIFT 12 +/* SB Low priority Read QoS */ +#define NB_GLOBAL_QOS_SET_CONTROL_SB_LP_ARQOS_MASK 0x000F0000 +#define NB_GLOBAL_QOS_SET_CONTROL_SB_LP_ARQOS_SHIFT 16 +/* SB Low-priority Write QoS */ +#define NB_GLOBAL_QOS_SET_CONTROL_SB_LP_AWQOS_MASK 0x00F00000 +#define NB_GLOBAL_QOS_SET_CONTROL_SB_LP_AWQOS_SHIFT 20 + +/**** DDR_QoS register ****/ +/* High Priority Read Threshold +Limits the number of outstanding high priority reads in the system through the memory controller. +This parameter is programmed in conjunction with number of outstanding high priority reads supported by the DDR controller. */ +#define NB_GLOBAL_DDR_QOS_HIGH_PRIO_THRESHOLD_MASK 0x0000007F +#define NB_GLOBAL_DDR_QOS_HIGH_PRIO_THRESHOLD_SHIFT 0 +/* DDR Low Priority QoS +Fabric priority below this value is mapped to DDR low priority queue. */ +#define NB_GLOBAL_DDR_QOS_LP_QOS_MASK 0x00000F00 +#define NB_GLOBAL_DDR_QOS_LP_QOS_SHIFT 8 + +/**** ACF_Misc register ****/ +/* Disable DDR Write Chop +Performance optimization feature to chop non-active data beats to the DDR. */ +#define NB_GLOBAL_ACF_MISC_DDR_WR_CHOP_DIS (1 << 0) +/* Disable SB-2-SB path through NB fabric. */ +#define NB_GLOBAL_ACF_MISC_SB2SB_PATH_DIS (1 << 1) +/* Disable ETR tracing to non-DDR. */ +#define NB_GLOBAL_ACF_MISC_ETR2SB_PATH_DIS (1 << 2) +/* Disable ETR tracing to non-DDR. */ +#define NB_GLOBAL_ACF_MISC_CPU2MSIX_DIS (1 << 3) +/* Disable CPU generation of MSIx +By default, the CPU can set any MSIx message results by setting any SPIn bit in the local and IO-GIC. */ +#define NB_GLOBAL_ACF_MISC_MSIX_TERMINATE_DIS (1 << 4) +/* Disable snoop override for MSIx +By default, an MSIx transaction is downgraded to non-coherent. */ +#define NB_GLOBAL_ACF_MISC_MSIX_SNOOPOVRD_DIS (1 << 5) +/* POS bypass */ +#define NB_GLOBAL_ACF_MISC_POS_BYPASS (1 << 6) +/* PoS ReadStronglyOrdered enable +SO read forces flushing of all prior writes */ +#define NB_GLOBAL_ACF_MISC_POS_RSO_EN (1 << 7) +/* WRAP to INC transfer enable */ +#define NB_GLOBAL_ACF_MISC_POS_WRAP2INC (1 << 8) +/* PoS DSB flush Disable +On DSB from CPU, PoS blocks the progress of post-barrier reads and writes until all pre-barrier writes have been completed. */ +#define NB_GLOBAL_ACF_MISC_POS_DSB_FLUSH_DIS (1 << 9) +/* PoS DMB Flush Disable +On DMB from CPU, the PoS blocks the progress of post-barrier non-buffereable reads or writes when there are outstanding non-bufferable writes that have not yet been completed. +Other access types are hazard check against the pre-barrier requests. */ +#define NB_GLOBAL_ACF_MISC_POS_DMB_FLUSH_DIS (1 << 10) +/* change DMB functionality to DSB (block and drain) */ +#define NB_GLOBAL_ACF_MISC_POS_DMB_TO_DSB_EN (1 << 11) +/* Disable write after read stall when accessing IO fabric slaves. */ +#define NB_GLOBAL_ACF_MISC_M0_WAR_STALL_DIS (1 << 12) +/* Disable write after read stall when accessing DDR */ +#define NB_GLOBAL_ACF_MISC_M1_WAR_STALL_DIS (1 << 13) +/* Disable counter (wait 1000 NB cycles) before applying PoS enable/disable configuration */ +#define NB_GLOBAL_ACF_MISC_POS_CONFIG_CNT_DIS (1 << 14) +/* Disable wr spliter A0 bug fixes */ +#define NB_GLOBAL_ACF_MISC_WRSPLT_ALPINE_M0_MODE (1 << 16) +/* Disable wr spliter PKR bug fixes */ +#define NB_GLOBAL_ACF_MISC_WRSPLT_ALPINE_A0_MODE (1 << 17) +/* Override the address parity calucation for write transactions going to IO-fabric */ +#define NB_GLOBAL_ACF_MISC_NB_NIC_AWADDR_PAR_OVRD (1 << 18) +/* Override the data parity calucation for write transactions going to IO-fabric */ +#define NB_GLOBAL_ACF_MISC_NB_NIC_WDATA_PAR_OVRD (1 << 19) +/* Override the address parity calucation for read transactions going to IO-fabric */ +#define NB_GLOBAL_ACF_MISC_NB_NIC_ARADDR_PAR_OVRD (1 << 20) +/* Halts CPU AXI interface (Ar/Aw channels), not allowing the CPU to send additional transactions */ +#define NB_GLOBAL_ACF_MISC_CPU_AXI_HALT (1 << 23) +/* Disable early arbar termination when fabric write buffer is enabled. */ +#define NB_GLOBAL_ACF_MISC_CCIWB_EARLY_ARBAR_TERM_DIS (1 << 24) +/* Enable wire interrupts connectivity to IO-GIC IRQs */ +#define NB_GLOBAL_ACF_MISC_IOGIC_CHIP_SPI_EN (1 << 25) +/* Enable DMB flush request to NB to SB PoS when barrier is terminted inside the processor cluster */ +#define NB_GLOBAL_ACF_MISC_CPU_DSB_FLUSH_DIS (1 << 26) +/* Enable DMB flush request to NB to SB PoS when barrier is terminted inside the processor cluster */ +#define NB_GLOBAL_ACF_MISC_CPU_DMB_FLUSH_DIS (1 << 27) +/* Peakrock only: remap CPU address above 40 bits to Slave Error +INTERNAL */ +#define NB_GLOBAL_ACF_MISC_ADDR43_40_REMAP_DIS (1 << 28) +/* Enable CPU WriteUnique to WriteNoSnoop trasform */ +#define NB_GLOBAL_ACF_MISC_CPU_WU2WNS_EN (1 << 29) +/* Disable device after device check */ +#define NB_GLOBAL_ACF_MISC_WR_POS_DEV_AFTER_DEV_DIS (1 << 30) +/* Disable wrap to inc on write */ +#define NB_GLOBAL_ACF_MISC_WR_INC2WRAP_EN (1 << 31) + +/**** Config_Bus_Control register ****/ +/* Write slave error enable */ +#define NB_GLOBAL_CONFIG_BUS_CONTROL_WR_SLV_ERR_EN (1 << 0) +/* Write decode error enable */ +#define NB_GLOBAL_CONFIG_BUS_CONTROL_WR_DEC_ERR_EN (1 << 1) +/* Read slave error enable */ +#define NB_GLOBAL_CONFIG_BUS_CONTROL_RD_SLV_ERR_EN (1 << 2) +/* Read decode error enable */ +#define NB_GLOBAL_CONFIG_BUS_CONTROL_RD_DEC_ERR_EN (1 << 3) +/* Ignore Write ID */ +#define NB_GLOBAL_CONFIG_BUS_CONTROL_IGNORE_WR_ID (1 << 4) +/* Timeout limit before terminating configuration bus access with slave error */ +#define NB_GLOBAL_CONFIG_BUS_CONTROL_TIMEOUT_LIMIT_MASK 0xFFFFFF00 +#define NB_GLOBAL_CONFIG_BUS_CONTROL_TIMEOUT_LIMIT_SHIFT 8 + +/**** Pos_ID_Match register ****/ +/* Enable Device (GRE and nGRE) after Device ID hazard */ +#define NB_GLOBAL_POS_ID_MATCH_ENABLE (1 << 0) +/* ID Field Mask +If set, corresonpding ID bits are not used for ID match */ +#define NB_GLOBAL_POS_ID_MATCH_MASK_MASK 0xFFFF0000 +#define NB_GLOBAL_POS_ID_MATCH_MASK_SHIFT 16 + +/**** sb_sel_override_awuser register ****/ +/* Select whether to use transaction awuser or sb_override_awuser value for awuser field on outgoing write transactions to SB. +Each bit if set to 1 selects the corresponding sb_override_awuser bit. Otherwise, selects the corersponding transaction awuser bit. */ +#define NB_GLOBAL_SB_SEL_OVERRIDE_AWUSER_SEL_MASK 0x03FFFFFF +#define NB_GLOBAL_SB_SEL_OVERRIDE_AWUSER_SEL_SHIFT 0 + +/**** sb_override_awuser register ****/ +/* Awuser to use on overriden transactions +Only applicable if sel_override_awuser.sel is set to 1'b1 for the coressponding bit */ +#define NB_GLOBAL_SB_OVERRIDE_AWUSER_AWUSER_MASK 0x03FFFFFF +#define NB_GLOBAL_SB_OVERRIDE_AWUSER_AWUSER_SHIFT 0 + +/**** sb_sel_override_aruser register ****/ +/* Select whether to use transaction aruser or sb_override_aruser value for aruser field on outgoing read transactions to SB. +Each bit if set to 1 selects the corresponding sb_override_aruser bit. Otherwise, selects the corersponding transaction aruser bit. */ +#define NB_GLOBAL_SB_SEL_OVERRIDE_ARUSER_SEL_MASK 0x03FFFFFF +#define NB_GLOBAL_SB_SEL_OVERRIDE_ARUSER_SEL_SHIFT 0 + +/**** sb_override_aruser register ****/ +/* Aruser to use on overriden transactions +Only applicable if sb_sel_override_aruser.sel is set to 1'b1 for the coressponding bit */ +#define NB_GLOBAL_SB_OVERRIDE_ARUSER_ARUSER_MASK 0x03FFFFFF +#define NB_GLOBAL_SB_OVERRIDE_ARUSER_ARUSER_SHIFT 0 + +/**** Coresight_PD register ****/ +/* ETF0 RAM force power down */ +#define NB_GLOBAL_CORESIGHT_PD_ETF0_RAM_FORCE_PD (1 << 0) +/* ETF1 RAM force power down */ +#define NB_GLOBAL_CORESIGHT_PD_ETF1_RAM_FORCE_PD (1 << 1) +/* ETF0 RAM force clock gate */ +#define NB_GLOBAL_CORESIGHT_PD_ETF0_RAM_FORCE_CG (1 << 2) +/* ETF1 RAM force clock gate */ +#define NB_GLOBAL_CORESIGHT_PD_ETF1_RAM_FORCE_CG (1 << 3) +/* APBIC clock enable */ +#define NB_GLOBAL_CORESIGHT_PD_APBICLKEN (1 << 4) +/* DAP system clock enable */ +#define NB_GLOBAL_CORESIGHT_PD_DAP_SYS_CLKEN (1 << 5) + +/**** Coresight_INTERNAL_0 register ****/ + +#define NB_GLOBAL_CORESIGHT_INTERNAL_0_CTIAPBSBYPASS (1 << 0) +/* CA15 CTM and Coresight CTI operate at same clock, bypass modes can be enabled but it's being set to bypass disable to break timing path. */ +#define NB_GLOBAL_CORESIGHT_INTERNAL_0_CISBYPASS (1 << 1) +/* CA15 CTM and Coresight CTI operate according to the same clock. +Bypass modes can be enabled, but it is set to bypass disable, to break the timing path. */ +#define NB_GLOBAL_CORESIGHT_INTERNAL_0_CIHSBYPASS_MASK 0x0000003C +#define NB_GLOBAL_CORESIGHT_INTERNAL_0_CIHSBYPASS_SHIFT 2 + +/**** Coresight_DBGROMADDR register ****/ +/* Valid signal for DBGROMADDR. +Connected to DBGROMADDRV */ +#define NB_GLOBAL_CORESIGHT_DBGROMADDR_VALID (1 << 0) +/* Specifies bits [39:12] of the ROM table physical address. */ +#define NB_GLOBAL_CORESIGHT_DBGROMADDR_ADDR_39_12_MASK 0x3FFFFFFC +#define NB_GLOBAL_CORESIGHT_DBGROMADDR_ADDR_39_12_SHIFT 2 + +/**** Coresight_DBGSELFADDR register ****/ +/* Valid signal for DBGROMADDR. +Connected to DBGROMADDRV */ +#define NB_GLOBAL_CORESIGHT_DBGSELFADDR_VALID (1 << 0) +/* Specifies bits [18:17] of the two's complement signed offset from the ROM table physical address to the physical address where the debug registers are memory-mapped. +Note: The CA15 debug unit starts at offset 0x1 within the Coresight cluster. */ +#define NB_GLOBAL_CORESIGHT_DBGSELFADDR_ADDR_18_17_MASK 0x00000180 +#define NB_GLOBAL_CORESIGHT_DBGSELFADDR_ADDR_18_17_SHIFT 7 +/* Specifies bits [39:19] of the two's complement signed offset from the ROM table physical address to the physical address where the debug registers are memory-mapped. +Note: The CA15 debug unit starts at offset 0x1 within the Coresight cluster, so this offset if fixed to zero. */ +#define NB_GLOBAL_CORESIGHT_DBGSELFADDR_ADDR_39_19_MASK 0x3FFFFE00 +#define NB_GLOBAL_CORESIGHT_DBGSELFADDR_ADDR_39_19_SHIFT 9 + +/**** SB_force_same_id_cfg_0 register ****/ +/* Enables force same id mechanism for SB port 0 */ +#define NB_GLOBAL_SB_FORCE_SAME_ID_CFG_0_FORCE_SAME_ID_EN (1 << 0) +/* Enables MSIx stall when write transactions from same ID mechanism are in progress for SB port 0 */ +#define NB_GLOBAL_SB_FORCE_SAME_ID_CFG_0_FORCE_SAME_ID_MSIX_STALL_EN (1 << 1) +/* Mask for choosing which ID bits to match for indicating the originating master */ +#define NB_GLOBAL_SB_FORCE_SAME_ID_CFG_0_SB_MSTR_ID_MASK_MASK 0x000000F8 +#define NB_GLOBAL_SB_FORCE_SAME_ID_CFG_0_SB_MSTR_ID_MASK_SHIFT 3 + +/**** SB_force_same_id_cfg_1 register ****/ +/* Enables force same id mechanism for SB port 1 */ +#define NB_GLOBAL_SB_FORCE_SAME_ID_CFG_1_FORCE_SAME_ID_EN (1 << 0) +/* Enables MSIx stall when write transactions from same ID mechanism are in progress for SB port 1 */ +#define NB_GLOBAL_SB_FORCE_SAME_ID_CFG_1_FORCE_SAME_ID_MSIX_STALL_EN (1 << 1) +/* Mask for choosing which ID bits to match for indicating the originating master */ +#define NB_GLOBAL_SB_FORCE_SAME_ID_CFG_1_SB_MSTR_ID_MASK_MASK 0x000000F8 +#define NB_GLOBAL_SB_FORCE_SAME_ID_CFG_1_SB_MSTR_ID_MASK_SHIFT 3 + +/**** Cnt_Control register ****/ +/* System counter enable +Counter is enabled after reset. */ +#define NB_SYSTEM_COUNTER_CNT_CONTROL_EN (1 << 0) +/* System counter restart +Initial value is reloaded from Counter_Init_L and Counter_Init_H registers. +Transition from 0 to 1 reloads the register. */ +#define NB_SYSTEM_COUNTER_CNT_CONTROL_RESTART (1 << 1) +/* Disable CTI trigger out that halt the counter progress */ +#define NB_SYSTEM_COUNTER_CNT_CONTROL_CTI_TRIGOUT_HALT_DIS (1 << 2) +/* System counter tick +Specifies the counter tick rate relative to the Northbridge clock, e.g., the counter is incremented every 16 NB cycles if programmed to 0x0f. */ +#define NB_SYSTEM_COUNTER_CNT_CONTROL_SCALE_MASK 0x0000FF00 +#define NB_SYSTEM_COUNTER_CNT_CONTROL_SCALE_SHIFT 8 + +/**** CA15_RF_Misc register ****/ + +#define NB_RAMS_CONTROL_MISC_CA15_RF_MISC_NONECPU_RF_MISC_MASK 0x0000000F +#define NB_RAMS_CONTROL_MISC_CA15_RF_MISC_NONECPU_RF_MISC_SHIFT 0 + +#define NB_RAMS_CONTROL_MISC_CA15_RF_MISC_CPU_RF_MISC_MASK 0x00FFFF00 +#define NB_RAMS_CONTROL_MISC_CA15_RF_MISC_CPU_RF_MISC_SHIFT 8 +/* Pause for CPUs from the time all power is up to the time the SRAMs start opening. */ +#define NB_RAMS_CONTROL_MISC_CA15_RF_MISC_PWR_UP_PAUSE_MASK 0xF8000000 +#define NB_RAMS_CONTROL_MISC_CA15_RF_MISC_PWR_UP_PAUSE_SHIFT 27 + +/**** NB_RF_Misc register ****/ +/* SMMU TLB RAMs force power down */ +#define NB_RAMS_CONTROL_MISC_NB_RF_MISC_SMMU_RAM_FORCE_PD (1 << 0) + +/**** Lockn register ****/ +/* Semaphore Lock +CPU reads it: +If current value ==0, return 0 to CPU but set bit to 1. (CPU knows it captured the semaphore.) +If current value ==1, return 1 to CPU. (CPU knows it is already used and waits.) +CPU writes 0 to it to release the semaphore. */ +#define NB_SEMAPHORES_LOCKN_LOCK (1 << 0) + +/**** CA15_outputs_1 register ****/ +/* + */ +#define NB_DEBUG_CA15_OUTPUTS_1_STANDBYWFI_MASK 0x0000000F +#define NB_DEBUG_CA15_OUTPUTS_1_STANDBYWFI_SHIFT 0 +/* + */ +#define NB_DEBUG_CA15_OUTPUTS_1_CPU_PWR_DN_ACK_MASK 0x000000F0 +#define NB_DEBUG_CA15_OUTPUTS_1_CPU_PWR_DN_ACK_SHIFT 4 +/* + */ +#define NB_DEBUG_CA15_OUTPUTS_1_IRQOUT_N_MASK 0x00000F00 +#define NB_DEBUG_CA15_OUTPUTS_1_IRQOUT_N_SHIFT 8 +/* + */ +#define NB_DEBUG_CA15_OUTPUTS_1_FIQOUT_N_MASK 0x0000F000 +#define NB_DEBUG_CA15_OUTPUTS_1_FIQOUT_N_SHIFT 12 +/* + */ +#define NB_DEBUG_CA15_OUTPUTS_1_CNTHPIRQ_N_MASK 0x000F0000 +#define NB_DEBUG_CA15_OUTPUTS_1_CNTHPIRQ_N_SHIFT 16 +/* + */ +#define NB_DEBUG_CA15_OUTPUTS_1_NCNTPNSIRQ_N_MASK 0x00F00000 +#define NB_DEBUG_CA15_OUTPUTS_1_NCNTPNSIRQ_N_SHIFT 20 +/* + */ +#define NB_DEBUG_CA15_OUTPUTS_1_NCNTPSIRQ_N_MASK 0x0F000000 +#define NB_DEBUG_CA15_OUTPUTS_1_NCNTPSIRQ_N_SHIFT 24 +/* + */ +#define NB_DEBUG_CA15_OUTPUTS_1_NCNTVIRQ_N_MASK 0xF0000000 +#define NB_DEBUG_CA15_OUTPUTS_1_NCNTVIRQ_N_SHIFT 28 + +/**** CA15_outputs_2 register ****/ +/* + */ +#define NB_DEBUG_CA15_OUTPUTS_2_STANDBYWFIL2 (1 << 0) +/* + */ +#define NB_DEBUG_CA15_OUTPUTS_2_L2RAM_PWR_DN_ACK (1 << 1) +/* Indicates for each CPU if coherency is enabled + */ +#define NB_DEBUG_CA15_OUTPUTS_2_SMPEN_MASK 0x0000003C +#define NB_DEBUG_CA15_OUTPUTS_2_SMPEN_SHIFT 2 + +/**** cpu_msg register ****/ +/* Status/ASCII code */ +#define NB_DEBUG_CPU_MSG_STATUS_MASK 0x000000FF +#define NB_DEBUG_CPU_MSG_STATUS_SHIFT 0 +/* Toggle with each ASCII write */ +#define NB_DEBUG_CPU_MSG_ASCII_TOGGLE (1 << 8) +/* Signals ASCII */ +#define NB_DEBUG_CPU_MSG_ASCII (1 << 9) + +#define NB_DEBUG_CPU_MSG_RESERVED_11_10_MASK 0x00000C00 +#define NB_DEBUG_CPU_MSG_RESERVED_11_10_SHIFT 10 +/* Signals new section started in S/W */ +#define NB_DEBUG_CPU_MSG_SECTION_START (1 << 12) + +#define NB_DEBUG_CPU_MSG_RESERVED_13 (1 << 13) +/* Signals a single CPU is done. */ +#define NB_DEBUG_CPU_MSG_CPU_DONE (1 << 14) +/* Signals test is done */ +#define NB_DEBUG_CPU_MSG_TEST_DONE (1 << 15) + +/**** ddrc register ****/ +/* External DLL calibration request. Also compensates for VT variations, such as an external request for the controller (can be performed automatically by the controller at the normal settings). */ +#define NB_DEBUG_DDRC_DLL_CALIB_EXT_REQ (1 << 0) +/* External request to perform short (long is performed during initialization) and/or ODT calibration. */ +#define NB_DEBUG_DDRC_ZQ_SHORT_CALIB_EXT_REQ (1 << 1) +/* External request to perform a refresh command to a specific bank. Usually performed automatically by the controller, however, the controller supports disabling of the automatic mechanism, and use of an external pulse instead. */ +#define NB_DEBUG_DDRC_RANK_REFRESH_EXT_REQ_MASK 0x0000003C +#define NB_DEBUG_DDRC_RANK_REFRESH_EXT_REQ_SHIFT 2 + +/**** ddrc_phy_smode_control register ****/ +/* DDR PHY special mode */ +#define NB_DEBUG_DDRC_PHY_SMODE_CONTROL_CTL_MASK 0x0000FFFF +#define NB_DEBUG_DDRC_PHY_SMODE_CONTROL_CTL_SHIFT 0 + +/**** ddrc_phy_smode_status register ****/ +/* DDR PHY special mode */ +#define NB_DEBUG_DDRC_PHY_SMODE_STATUS_STT_MASK 0x0000FFFF +#define NB_DEBUG_DDRC_PHY_SMODE_STATUS_STT_SHIFT 0 + +/**** pmc register ****/ +/* Enable system control on NB DRO */ +#define NB_DEBUG_PMC_SYS_EN (1 << 0) +/* NB PMC HVT35 counter value */ +#define NB_DEBUG_PMC_HVT35_VAL_14_0_MASK 0x0000FFFE +#define NB_DEBUG_PMC_HVT35_VAL_14_0_SHIFT 1 +/* NB PMC SVT31 counter value */ +#define NB_DEBUG_PMC_SVT31_VAL_14_0_MASK 0x7FFF0000 +#define NB_DEBUG_PMC_SVT31_VAL_14_0_SHIFT 16 + +/**** cpus_general register ****/ +/* Swaps sysaddr[16:14] with sysaddr[19:17] for DDR access*/ +#define NB_DEBUG_CPUS_GENERAL_ADDR_MAP_ECO (1 << 23) + +/**** cpus_int_out register ****/ +/* Defines which CPUs' FIQ will be triggered out through the cpus_int_out[1] pinout. */ +#define NB_DEBUG_CPUS_INT_OUT_FIQ_EN_MASK 0x0000000F +#define NB_DEBUG_CPUS_INT_OUT_FIQ_EN_SHIFT 0 +/* Defines which CPUs' IRQ will be triggered out through the cpus_int_out[0] pinout. */ +#define NB_DEBUG_CPUS_INT_OUT_IRQ_EN_MASK 0x000000F0 +#define NB_DEBUG_CPUS_INT_OUT_IRQ_EN_SHIFT 4 +/* Defines which CPUs' SEI will be triggered out through the cpus_int_out[0] pinout. */ +#define NB_DEBUG_CPUS_INT_OUT_IRQ_SEI_EN_MASK 0x00000F00 +#define NB_DEBUG_CPUS_INT_OUT_IRQ_SEI_EN_SHIFT 8 + +/**** latch_pc_req register ****/ +/* If set, request to latch execution PC from processor cluster */ +#define NB_DEBUG_LATCH_PC_REQ_EN (1 << 0) +/* target CPU id to latch its execution PC */ +#define NB_DEBUG_LATCH_PC_REQ_CPU_ID_MASK 0x000000F0 +#define NB_DEBUG_LATCH_PC_REQ_CPU_ID_SHIFT 4 + +/**** latch_pc_low register ****/ +/* Set by hardware when the processor cluster ack the PC latch request. +Clear on read latch_pc_high */ +#define NB_DEBUG_LATCH_PC_LOW_VALID (1 << 0) +/* Latched PC value [31:1] */ +#define NB_DEBUG_LATCH_PC_LOW_VAL_MASK 0xFFFFFFFE +#define NB_DEBUG_LATCH_PC_LOW_VAL_SHIFT 1 + +/**** track_dump_ctrl register ****/ +/* [24:16]: Queue entry pointer +[2] Target queue: 1'b0: HazardTrack or 1'b1: AmiRMI queues +[1:0]: CCI target master: 2'b00: M0, 2'b01: M1, 2'b10: M2 */ +#define NB_DEBUG_TRACK_DUMP_CTRL_PTR_MASK 0x7FFFFFFF +#define NB_DEBUG_TRACK_DUMP_CTRL_PTR_SHIFT 0 +/* Track Dump Request +If set, queue entry info is latched on track_dump_rdata register. +Program the pointer and target queue. +This is a full handshake register. +Read bit from track_dump_rdata register. If set, clear the request field before triggering a new request. */ +#define NB_DEBUG_TRACK_DUMP_CTRL_REQ (1 << 31) + +/**** track_dump_rdata_0 register ****/ +/* Valid */ +#define NB_DEBUG_TRACK_DUMP_RDATA_0_VALID (1 << 0) +/* Low data */ +#define NB_DEBUG_TRACK_DUMP_RDATA_0_DATA_MASK 0xFFFFFFFE +#define NB_DEBUG_TRACK_DUMP_RDATA_0_DATA_SHIFT 1 + +/**** pos_track_dump_ctrl register ****/ +/* [24:16]: queue entry pointer */ +#define NB_DEBUG_POS_TRACK_DUMP_CTRL_PTR_MASK 0x7FFFFFFF +#define NB_DEBUG_POS_TRACK_DUMP_CTRL_PTR_SHIFT 0 +/* Track Dump Request +If set, queue entry info is latched on track_dump_rdata register. +Program the pointer and target queue. +This is a full handshake register +Read bit from track_dump_rdata register. If set, clear the request field before triggering a new request. */ +#define NB_DEBUG_POS_TRACK_DUMP_CTRL_REQ (1 << 31) + +/**** pos_track_dump_rdata_0 register ****/ +/* Valid */ +#define NB_DEBUG_POS_TRACK_DUMP_RDATA_0_VALID (1 << 0) +/* Low data */ +#define NB_DEBUG_POS_TRACK_DUMP_RDATA_0_DATA_MASK 0xFFFFFFFE +#define NB_DEBUG_POS_TRACK_DUMP_RDATA_0_DATA_SHIFT 1 + +/**** c2swb_track_dump_ctrl register ****/ +/* [24:16]: Queue entry pointer */ +#define NB_DEBUG_C2SWB_TRACK_DUMP_CTRL_PTR_MASK 0x7FFFFFFF +#define NB_DEBUG_C2SWB_TRACK_DUMP_CTRL_PTR_SHIFT 0 +/* Track Dump Request +If set, queue entry info is latched on track_dump_rdata register. +Program the pointer and target queue. +This is a full handshake register +Read bit from track_dump_rdata register. If set, clear the request field before triggering a new request. */ +#define NB_DEBUG_C2SWB_TRACK_DUMP_CTRL_REQ (1 << 31) + +/**** c2swb_track_dump_rdata_0 register ****/ +/* Valid */ +#define NB_DEBUG_C2SWB_TRACK_DUMP_RDATA_0_VALID (1 << 0) +/* Low data */ +#define NB_DEBUG_C2SWB_TRACK_DUMP_RDATA_0_DATA_MASK 0xFFFFFFFE +#define NB_DEBUG_C2SWB_TRACK_DUMP_RDATA_0_DATA_SHIFT 1 + +/**** cpus_track_dump_ctrl register ****/ +/* [24:16]: Queue entry pointer +[3:2] Target queue - 0:ASI, 1: AMI +[1:0]: Target Processor Cluster - 0: Cluster0, 1: Cluster1 */ +#define NB_DEBUG_CPUS_TRACK_DUMP_CTRL_PTR_MASK 0x7FFFFFFF +#define NB_DEBUG_CPUS_TRACK_DUMP_CTRL_PTR_SHIFT 0 +/* Track Dump Request +If set, queue entry info is latched on track_dump_rdata register. +Program the pointer and target queue. +This is a full handshake register +Read bit from track_dump_rdata register. If set, clear the request field before triggering a new request. */ +#define NB_DEBUG_CPUS_TRACK_DUMP_CTRL_REQ (1 << 31) + +/**** cpus_track_dump_rdata_0 register ****/ +/* Valid */ +#define NB_DEBUG_CPUS_TRACK_DUMP_RDATA_0_VALID (1 << 0) +/* Low data */ +#define NB_DEBUG_CPUS_TRACK_DUMP_RDATA_0_DATA_MASK 0xFFFFFFFE +#define NB_DEBUG_CPUS_TRACK_DUMP_RDATA_0_DATA_SHIFT 1 + +/**** c2swb_bar_ovrd_high register ****/ +/* Read barrier is progressed downstream when not terminated in the CCI. +By specification, barrier address is 0x0. +This register enables barrier address OVRD to a programmable value. */ +#define NB_DEBUG_C2SWB_BAR_OVRD_HIGH_RD_ADDR_OVRD_EN (1 << 0) +/* Address bits 39:32 */ +#define NB_DEBUG_C2SWB_BAR_OVRD_HIGH_ADDR_39_32_MASK 0x00FF0000 +#define NB_DEBUG_C2SWB_BAR_OVRD_HIGH_ADDR_39_32_SHIFT 16 + +/**** Config register ****/ +/* Individual processor control of the endianness configuration at reset. It sets the initial value of the EE bit in the CP15 System Control Register (SCTLR) related to CFGEND input: +little - 0x0: Little endian +bit - 0x1: Bit endian */ +#define NB_CPUN_CONFIG_STATUS_CONFIG_ENDIAN (1 << 0) +/* Individual processor control of the default exception handling state. It sets the initial value of the TE bit in the CP15 System Control Register (SCTLR) related to CFGTE input: +arm: 0x0: Exception operates ARM code. +Thumb: 0x1: Exception operates Thumb code. */ +#define NB_CPUN_CONFIG_STATUS_CONFIG_TE (1 << 1) +/* Individual processor control of the location of the exception vectors at reset. It sets the initial value of the V bit in the CP15 System Control Register (SCTLR). +Connected to VINITHIGH input. +low - 0x0: Exception vectors start at address 0x00000000. +high - 0x1: Exception vectors start at address 0xFFFF0000. */ +#define NB_CPUN_CONFIG_STATUS_CONFIG_VINITHI (1 << 2) +/* Individual processor control to disable write access to some secure CP15 registers +connected to CP15SDISABLE input. */ +#define NB_CPUN_CONFIG_STATUS_CONFIG_CP15DISABLE (1 << 3) +/* Force Write init implementation to ConfigAARch64 register */ +#define NB_CPUN_CONFIG_STATUS_CONFIG_AARCH64_REG_FORCE_WINIT (1 << 4) +/* Force Write Once implementation to ConfigAARch64 register. */ +#define NB_CPUN_CONFIG_STATUS_CONFIG_AARCH64_REG_FORCE_WONCE (1 << 5) + +/**** Config_AARch64 register ****/ +/* Individual processor register width state. The register width states are: +0 AArch32. +1 AArch64. +This signal is only sampled during reset of the processor. +This is Write Init register */ +#define NB_CPUN_CONFIG_STATUS_CONFIG_AARCH64_AA64_NAA32 (1 << 0) +/* Individual processor Cryptography engine disable: +0 Enable the Cryptography engine. +1 Disable the Cryptography engine. +This signal is only sampled during reset of the processor */ +#define NB_CPUN_CONFIG_STATUS_CONFIG_AARCH64_CRYPTO_DIS (1 << 1) + +/**** Power_Ctrl register ****/ +/* Individual CPU power mode transition request +If requested to enter power mode other than normal mode, low power state is resumed whenever CPU reenters STNDBYWFI state: +normal: 0x0: normal power state +deep_idle: 0x2: Dormant power mode state +poweredoff: 0x3: Powered-off power mode */ +#define NB_CPUN_CONFIG_STATUS_POWER_CTRL_PM_REQ_MASK 0x00000003 +#define NB_CPUN_CONFIG_STATUS_POWER_CTRL_PM_REQ_SHIFT 0 +/* Normal power mode state */ +#define NB_CPUN_CONFIG_STATUS_POWER_CTRL_PM_REQ_NORMAL \ + (0x0 << NB_CPUN_CONFIG_STATUS_POWER_CTRL_PM_REQ_SHIFT) +/* Dormant power mode state */ +#define NB_CPUN_CONFIG_STATUS_POWER_CTRL_PM_REQ_DEEP_IDLE \ + (0x2 << NB_CPUN_CONFIG_STATUS_POWER_CTRL_PM_REQ_SHIFT) +/* Powered-off power mode */ +#define NB_CPUN_CONFIG_STATUS_POWER_CTRL_PM_REQ_POWEREDOFF \ + (0x3 << NB_CPUN_CONFIG_STATUS_POWER_CTRL_PM_REQ_SHIFT) +/* Power down regret disable +When power down regret is enabled, the powerdown enter flow can be halted whenever a valid wakeup event occurs. */ +#define NB_CPUN_CONFIG_STATUS_POWER_CTRL_PWRDN_RGRT_DIS (1 << 16) +/* Power down emulation enable +If set, the entire power down sequence is applied, but the CPU is placed in soft reset instead of hardware power down. */ +#define NB_CPUN_CONFIG_STATUS_POWER_CTRL_PWRDN_EMULATE (1 << 17) +/* Disable wakeup from Local--GIC FIQ. */ +#define NB_CPUN_CONFIG_STATUS_POWER_CTRL_WU_LGIC_FIQ_DIS (1 << 18) +/* Disable wakeup from Local-GIC IRQ. */ +#define NB_CPUN_CONFIG_STATUS_POWER_CTRL_WU_LGIC_IRQ_DIS (1 << 19) +/* Disable wakeup from IO-GIC FIQ. */ +#define NB_CPUN_CONFIG_STATUS_POWER_CTRL_WU_IOGIC_FIQ_DIS (1 << 20) +/* Disable wakeup from IO-GIC IRQ. */ +#define NB_CPUN_CONFIG_STATUS_POWER_CTRL_WU_IOGIC_IRQ_DIS (1 << 21) +/* Disable scheduling of interrrupts in GIC(500) to non-active CPU */ +#define NB_CPUN_CONFIG_STATUS_POWER_CTRL_IOGIC_DIS_CPU (1 << 22) + +/**** Power_Status register ****/ +/* Read-only bits that reflect the individual CPU power mode status. +Default value for non-exist CPU is 2b11: +normal - 0x0: Normal mode +por - 0x1: por on reset mode +deep_idle - 0x2: Dormant power mode state +poweredoff - 0x3: Powered-off power mode */ +#define NB_CPUN_CONFIG_STATUS_POWER_STATUS_CPU_PM_MASK 0x00000003 +#define NB_CPUN_CONFIG_STATUS_POWER_STATUS_CPU_PM_SHIFT 0 +/* Normal power mode state */ +#define NB_CPUN_CONFIG_STATUS_POWER_STATUS_CPU_PM_NORMAL \ + (0x0 << NB_CPUN_CONFIG_STATUS_POWER_STATUS_CPU_PM_SHIFT) +/* Idle power mode state (WFI) */ +#define NB_CPUN_CONFIG_STATUS_POWER_STATUS_CPU_PM_IDLE \ + (0x1 << NB_CPUN_CONFIG_STATUS_POWER_STATUS_CPU_PM_SHIFT) +/* Dormant power mode state */ +#define NB_CPUN_CONFIG_STATUS_POWER_STATUS_CPU_PM_DEEP_IDLE \ + (0x2 << NB_CPUN_CONFIG_STATUS_POWER_STATUS_CPU_PM_SHIFT) +/* Powered-off power mode */ +#define NB_CPUN_CONFIG_STATUS_POWER_STATUS_CPU_PM_POWEREDOFF \ + (0x3 << NB_CPUN_CONFIG_STATUS_POWER_STATUS_CPU_PM_SHIFT) +/* WFI status */ +#define NB_CPUN_CONFIG_STATUS_POWER_STATUS_WFI (1 << 2) +/* WFE status */ +#define NB_CPUN_CONFIG_STATUS_POWER_STATUS_WFE (1 << 3) + +/**** Warm_Rst_Ctl register ****/ +/* Disable CPU Warm Reset when warmrstreq is asserted + +When the Reset Request bit in the RMR or RMR_EL3 register is set to 1 in the CPU Core , the processor asserts the WARMRSTREQ signal and the SoC reset controller use this request to trigger a Warm reset of the processor and change the register width state. */ +#define NB_CPUN_CONFIG_STATUS_WARM_RST_CTL_REQ_DIS (1 << 0) +/* Disable waiting WFI on Warm Reset */ +#define NB_CPUN_CONFIG_STATUS_WARM_RST_CTL_WFI_DIS (1 << 1) +/* CPU Core AARach64 reset vector bar +This is Write Once register (controlled by aarch64_reg_force_* fields) */ +#define NB_CPUN_CONFIG_STATUS_RVBAR_LOW_ADDR_31_2_MASK 0xFFFFFFFC +#define NB_CPUN_CONFIG_STATUS_RVBAR_LOW_ADDR_31_2_SHIFT 2 + +/**** Rvbar_High register ****/ +/* CPU Core AARach64 reset vector bar high bits +This is Write Once register (controlled by aarch64_reg_force_* fields) */ +#define NB_CPUN_CONFIG_STATUS_RVBAR_HIGH_ADDR_43_32_MASK 0x00000FFF +#define NB_CPUN_CONFIG_STATUS_RVBAR_HIGH_ADDR_43_32_SHIFT 0 + +/**** pmu_snapshot register ****/ +/* PMU Snapshot Request */ +#define NB_CPUN_CONFIG_STATUS_PMU_SNAPSHOT_REQ (1 << 0) +/* 0: HW deassert requests when received ack +1: SW deasserts request when received done */ +#define NB_CPUN_CONFIG_STATUS_PMU_SNAPSHOT_MODE (1 << 1) +/* Snapshot process completed */ +#define NB_CPUN_CONFIG_STATUS_PMU_SNAPSHOT_DONE (1 << 31) + +/**** cpu_msg_in register ****/ +/* CPU read this register to receive input (char) from simulation. */ +#define NB_CPUN_CONFIG_STATUS_CPU_MSG_IN_DATA_MASK 0x000000FF +#define NB_CPUN_CONFIG_STATUS_CPU_MSG_IN_DATA_SHIFT 0 +/* Indicates the data is valid. +Cleared on read */ +#define NB_CPUN_CONFIG_STATUS_CPU_MSG_IN_VALID (1 << 8) + +/**** PMU_Control register ****/ +/* Disable all counters +When this bit is clear, counter state is determined through the specific counter control register */ +#define NB_MC_PMU_PMU_CONTROL_DISABLE_ALL (1 << 0) +/* Pause all counters. +When this bit is clear, counter state is determined through the specific counter control register. */ +#define NB_MC_PMU_PMU_CONTROL_PAUSE_ALL (1 << 1) +/* Overflow interrupt enable: +disable - 0x0: Disable interrupt on overflow. +enable - 0x1: Enable interrupt on overflow. */ +#define NB_MC_PMU_PMU_CONTROL_OVRF_INTR_EN (1 << 2) +/* Number of monitored events supported by the PMU. */ +#define NB_MC_PMU_PMU_CONTROL_NUM_OF_EVENTS_MASK 0x00FC0000 +#define NB_MC_PMU_PMU_CONTROL_NUM_OF_EVENTS_SHIFT 18 +#define NB_MC_PMU_PMU_CONTROL_NUM_OF_EVENTS_SHIFT_ALPINE 19 +/* Number of counters implemented by PMU. */ +#define NB_MC_PMU_PMU_CONTROL_NUM_OF_CNTS_MASK 0x0F000000 +#define NB_MC_PMU_PMU_CONTROL_NUM_OF_CNTS_SHIFT 24 + +/**** Cfg register ****/ +/* Event select */ +#define NB_MC_PMU_COUNTERS_CFG_EVENT_SEL_MASK 0x0000003F +#define NB_MC_PMU_COUNTERS_CFG_EVENT_SEL_SHIFT 0 +/* Enable setting of counter low overflow status bit: +disable - 0x0: Disable setting. +enable - 0x1: Enable setting. */ +#define NB_MC_PMU_COUNTERS_CFG_OVRF_LOW_STT_EN (1 << 6) +/* Enable setting of counter high overflow status bit: +disable - 0x0: Disable setting. +enable - 0x1: Enable setting. */ +#define NB_MC_PMU_COUNTERS_CFG_OVRF_HIGH_STT_EN (1 << 7) +/* Enable pause on trigger in assertion: +disable - 0x0: Disable pause. +enable - 0x1: Enable pause. */ +#define NB_MC_PMU_COUNTERS_CFG_TRIGIN_PAUSE_EN (1 << 8) +/* Enable increment trigger out for trace. +Trigger is generated whenever counter reaches value: +disable - 0x0: Disable trigger out. +enable - 0x1: Enable trigger out. */ +#define NB_MC_PMU_COUNTERS_CFG_TRIGOUT_EN (1 << 9) +/* Trigger out granule value +Specifies the number of events counted between two consecutive trigger out events +0x0: 1 - Trigger out on every event occurrence. +0x1: 2 - Trigger out on every two events. +... +0xn: 2^(n-1) - Trigger out on event 2^(n-1) events. +... +0x1F: 2^31 */ +#define NB_MC_PMU_COUNTERS_CFG_TRIGOUT_GRANULA_MASK 0x00007C00 +#define NB_MC_PMU_COUNTERS_CFG_TRIGOUT_GRANULA_SHIFT 10 +/* Pause on overflow bitmask +If set for counter , current counter pauses counting when counter is overflowed, including self-pause. +Bit [16]: counter 0 +Bit [17]: counter 1 +Note: This field must be changed for larger counters. */ +#define NB_MC_PMU_COUNTERS_CFG_PAUSE_ON_OVRF_BITMASK_MASK 0x000F0000 +#define NB_MC_PMU_COUNTERS_CFG_PAUSE_ON_OVRF_BITMASK_SHIFT 16 + +/**** Cntl register ****/ +/* Set the counter state to disable, enable, or pause: +0x0 - disable: Disable counter. +0x1 - enable: Enable counter. +0x3 - pause: Pause counter. */ +#define NB_MC_PMU_COUNTERS_CNTL_CNT_STATE_MASK 0x00000003 +#define NB_MC_PMU_COUNTERS_CNTL_CNT_STATE_SHIFT 0 +/* Disable counter. */ +#define NB_MC_PMU_COUNTERS_CNTL_CNT_STATE_DISABLE \ + (0x0 << NB_MC_PMU_COUNTERS_CNTL_CNT_STATE_SHIFT) +/* Enable counter. */ +#define NB_MC_PMU_COUNTERS_CNTL_CNT_STATE_ENABLE \ + (0x1 << NB_MC_PMU_COUNTERS_CNTL_CNT_STATE_SHIFT) +/* Pause counter. */ +#define NB_MC_PMU_COUNTERS_CNTL_CNT_STATE_PAUSE \ + (0x3 << NB_MC_PMU_COUNTERS_CNTL_CNT_STATE_SHIFT) + +/**** High register ****/ +/* Counter high value */ +#define NB_MC_PMU_COUNTERS_HIGH_COUNTER_MASK 0x0000FFFF +#define NB_MC_PMU_COUNTERS_HIGH_COUNTER_SHIFT 0 + +/**** version register ****/ +/* Revision number (Minor) */ +#define NB_NB_VERSION_VERSION_RELEASE_NUM_MINOR_MASK 0x000000FF +#define NB_NB_VERSION_VERSION_RELEASE_NUM_MINOR_SHIFT 0 +/* Revision number (Major) */ +#define NB_NB_VERSION_VERSION_RELEASE_NUM_MAJOR_MASK 0x0000FF00 +#define NB_NB_VERSION_VERSION_RELEASE_NUM_MAJOR_SHIFT 8 +/* Date of release */ +#define NB_NB_VERSION_VERSION_DATE_DAY_MASK 0x001F0000 +#define NB_NB_VERSION_VERSION_DATE_DAY_SHIFT 16 +/* Month of release */ +#define NB_NB_VERSION_VERSION_DATA_MONTH_MASK 0x01E00000 +#define NB_NB_VERSION_VERSION_DATA_MONTH_SHIFT 21 +/* Year of release (starting from 2000) */ +#define NB_NB_VERSION_VERSION_DATE_YEAR_MASK 0x3E000000 +#define NB_NB_VERSION_VERSION_DATE_YEAR_SHIFT 25 +/* Reserved */ +#define NB_NB_VERSION_VERSION_RESERVED_MASK 0xC0000000 +#define NB_NB_VERSION_VERSION_RESERVED_SHIFT 30 + +/**** cpu_vmid register ****/ +/* Target VMID */ +#define NB_SRIOV_CPU_VMID_VAL_MASK 0x000000FF +#define NB_SRIOV_CPU_VMID_VAL_SHIFT 0 + +/**** DRAM_0_Control register ****/ +/* Controller Idle +Indicates to the DDR PHY, if set, that the memory controller is idle */ +#define NB_DRAM_CHANNELS_DRAM_0_CONTROL_DDR_PHY_CTL_IDLE (1 << 0) +/* Disable clear exclusive monitor request from DDR controller to CPU +Clear request is triggered whenever an exlusive monitor inside the DDR controller is being invalidated. */ +#define NB_DRAM_CHANNELS_DRAM_0_CONTROL_DDR_EXMON_REQ_DIS (1 << 1) + +/**** DRAM_0_Status register ****/ +/* Bypass Mode: Indicates if set that the PHY is in PLL bypass mod */ +#define NB_DRAM_CHANNELS_DRAM_0_STATUS_DDR_PHY_BYP_MODE (1 << 0) +/* Number of available AXI transactions (used positions) in the DDR controller read address FIFO. */ +#define NB_DRAM_CHANNELS_DRAM_0_STATUS_RAQ_WCOUNT_MASK 0x00000030 +#define NB_DRAM_CHANNELS_DRAM_0_STATUS_RAQ_WCOUNT_SHIFT 4 +/* Number of available AXI transactions (used positions) in the DDR controller write address FIFO */ +#define NB_DRAM_CHANNELS_DRAM_0_STATUS_WAQ_WCOUNT_0_MASK 0x000000C0 +#define NB_DRAM_CHANNELS_DRAM_0_STATUS_WAQ_WCOUNT_0_SHIFT 6 +/* Number of available Low priority read CAM slots (free positions) in the DDR controller. +Each slots holds a DRAM burst */ +#define NB_DRAM_CHANNELS_DRAM_0_STATUS_LPR_CREDIT_CNT_MASK 0x00007F00 +#define NB_DRAM_CHANNELS_DRAM_0_STATUS_LPR_CREDIT_CNT_SHIFT 8 +/* Number of available High priority read CAM slots (free positions) in the DDR controller. +Each slots holds a DRAM burst */ +#define NB_DRAM_CHANNELS_DRAM_0_STATUS_HPR_CREDIT_CNT_MASK 0x003F8000 +#define NB_DRAM_CHANNELS_DRAM_0_STATUS_HPR_CREDIT_CNT_SHIFT 15 +/* Number of available write CAM slots (free positions) in the DDR controller. +Each slots holds a DRAM burst */ +#define NB_DRAM_CHANNELS_DRAM_0_STATUS_WR_CREDIT_CNT_MASK 0x1FC00000 +#define NB_DRAM_CHANNELS_DRAM_0_STATUS_WR_CREDIT_CNT_SHIFT 22 + +/**** DDR_Int_Cause register ****/ +/* This interrupt is asserted when a correctable ECC error is detected */ +#define NB_DRAM_CHANNELS_DDR_INT_CAUSE_ECC_CORRECTED_ERR (1 << 0) +/* This interrupt is asserted when a uncorrectable ECC error is detected */ +#define NB_DRAM_CHANNELS_DDR_INT_CAUSE_ECC_UNCORRECTED_ERR (1 << 1) +/* This interrupt is asserted when a parity or CRC error is detected on the DFI interface */ +#define NB_DRAM_CHANNELS_DDR_INT_CAUSE_DFI_ALERT_ERR (1 << 2) +/* On-Chip Write data parity error interrupt on output */ +#define NB_DRAM_CHANNELS_DDR_INT_CAUSE_PAR_WDATA_OUT_ERR (1 << 3) +/* This interrupt is asserted when a parity error due to MRS is detected on the DFI interface */ +#define NB_DRAM_CHANNELS_DDR_INT_CAUSE_DFI_ALERT_ERR_FATL (1 << 4) +/* This interrupt is asserted when the CRC/parity retry counter reaches it maximum value */ +#define NB_DRAM_CHANNELS_DDR_INT_CAUSE_DFI_ALERT_ERR_MAX_REACHED (1 << 5) +/* AXI Read address parity error interrupt. +This interrupt is asserted when an on-chip parity error occurred on the DDR controller AXI read address. */ +#define NB_DRAM_CHANNELS_DDR_INT_CAUSE_PAR_RADDR_ERR (1 << 6) +/* AXI Read data parity error interrupt. +This interrupt is asserted when an on-chip parity error occurred on the DDR controller AXI read data */ +#define NB_DRAM_CHANNELS_DDR_INT_CAUSE_PAR_RDATA_ERR (1 << 7) +/* AXI Write address parity error interrupt. +This interrupt is asserted when an on-chip parity error occurred on the DDR controller AXI write address. */ +#define NB_DRAM_CHANNELS_DDR_INT_CAUSE_PAR_WADDR_ERR (1 << 8) +/* AXI Write data parity error interrupt on input. +This interrupt is asserted when an on-chip parity error occurred on the DDR controller AXI write data */ +#define NB_DRAM_CHANNELS_DDR_INT_CAUSE_PAR_WDATA_IN_ERR (1 << 9) + +/**** Address_Map register ****/ +/* Controls which system address bit will be mapped to DDR row bit 2. +This field is only used when addrmap_part_en == 1 */ +#define NB_DRAM_CHANNELS_ADDRESS_MAP_ADDRMAP_ROW_B2_MASK 0x0000000F +#define NB_DRAM_CHANNELS_ADDRESS_MAP_ADDRMAP_ROW_B2_SHIFT 0 +/* Controls which system address bit will be mapped to DDR row bit 3. +This field is only used when addrmap_part_en == 1 */ +#define NB_DRAM_CHANNELS_ADDRESS_MAP_ADDRMAP_ROW_B3_MASK 0x000003C0 +#define NB_DRAM_CHANNELS_ADDRESS_MAP_ADDRMAP_ROW_B3_SHIFT 6 +/* Controls which system address bit will be mapped to DDR row bit 4. +This field is only used when addrmap_part_en == 1 */ +#define NB_DRAM_CHANNELS_ADDRESS_MAP_ADDRMAP_ROW_B4_MASK 0x0000F000 +#define NB_DRAM_CHANNELS_ADDRESS_MAP_ADDRMAP_ROW_B4_SHIFT 12 +/* Controls which system address bit will be mapped to DDR row bit 5. +This field is only used when addrmap_part_en == 1 */ +#define NB_DRAM_CHANNELS_ADDRESS_MAP_ADDRMAP_ROW_B5_MASK 0x003C0000 +#define NB_DRAM_CHANNELS_ADDRESS_MAP_ADDRMAP_ROW_B5_SHIFT 18 +/* Enables partitioning of the address mapping control. +When set, addrmap_row_b2-5 are used inside DDR controler instead of the built in address mapping registers */ +#define NB_DRAM_CHANNELS_ADDRESS_MAP_ADDRMAP_PART_EN (1 << 31) + +/**** Reorder_ID_Mask register ****/ +/* DDR Read Reorder buffer ID mask. +If incoming read transaction ID ANDed with mask is equal Reorder_ID_Value, then the transaction is mapped to the DDR controller bypass channel. +Setting this register to 0 will disable the check */ +#define NB_DRAM_CHANNELS_REORDER_ID_MASK_MASK_MASK 0x003FFFFF +#define NB_DRAM_CHANNELS_REORDER_ID_MASK_MASK_SHIFT 0 + +/**** Reorder_ID_Value register ****/ +/* DDR Read Reorder buffer ID value +If incoming read transaction ID ANDed with Reorder_ID_Mask is equal to this register, then the transaction is mapped to the DDR controller bypass channel */ +#define NB_DRAM_CHANNELS_REORDER_ID_VALUE_VALUE_MASK 0x003FFFFF +#define NB_DRAM_CHANNELS_REORDER_ID_VALUE_VALUE_SHIFT 0 + +/**** MRR_Control_Status register ****/ +/* DDR4 Mode Register Read Data Valid */ +#define NB_DRAM_CHANNELS_MRR_CONTROL_STATUS_MRR_VLD (1 << 0) +/* MRR Ack, when asserted it clears the mrr_val indication and ready to load new MRR data. Write 1 to clear and then 0 */ +#define NB_DRAM_CHANNELS_MRR_CONTROL_STATUS_MRR_ACK (1 << 16) + +/**** pp_config register ****/ +/* Bypass PP module (formality equivalent) */ +#define NB_PUSH_PACKET_PP_CONFIG_FM_BYPASS (1 << 0) +/* Bypass PP module */ +#define NB_PUSH_PACKET_PP_CONFIG_BYPASS (1 << 1) +/* Force Cleanup of entries */ +#define NB_PUSH_PACKET_PP_CONFIG_CLEAR (1 << 2) +/* Enable forwarding DECERR response */ +#define NB_PUSH_PACKET_PP_CONFIG_DECERR_EN (1 << 3) +/* Enable forwarding SLVERR response */ +#define NB_PUSH_PACKET_PP_CONFIG_SLVERR_EN (1 << 4) +/* Enable forwarding of data parity generation */ +#define NB_PUSH_PACKET_PP_CONFIG_PAR_GEN_EN (1 << 5) +/* Select channel on 8K boundaries ([15:13]) instead of 64k boundaries ([18:16]). */ +#define NB_PUSH_PACKET_PP_CONFIG_SEL_8K (1 << 6) +/* Forces awuser to be as configured in ext_awuser register. +Not functional */ +#define NB_PUSH_PACKET_PP_CONFIG_SEL_EXT_AWUSER (1 << 7) +/* Enables PP channel. +1 bit per channel */ +#define NB_PUSH_PACKET_PP_CONFIG_CHANNEL_ENABLE_MASK 0x00030000 +#define NB_PUSH_PACKET_PP_CONFIG_CHANNEL_ENABLE_SHIFT 16 + +#define NB_PUSH_PACKET_PP_CONFIG_CHANNEL_ENABLE(i) \ + (1 << (NB_PUSH_PACKET_PP_CONFIG_CHANNEL_ENABLE_SHIFT + i)) + +/**** pp_ext_awuser register ****/ +/* Awuser to use on PP transactions +Only applicable if config.sel_ext_awuser is set to 1'b1 +Parity bits are still generated per transaction */ +#define NB_PUSH_PACKET_PP_EXT_AWUSER_AWUSER_MASK 0x03FFFFFF +#define NB_PUSH_PACKET_PP_EXT_AWUSER_AWUSER_SHIFT 0 + +/**** pp_sel_awuser register ****/ +/* Select whether to use addr[63:48] or PP awmisc as vmid. +Each bit if set to 1 selects the corresponding address bit. Otherwise, selects the corersponding awmis bit. */ +#define NB_PUSH_PACKET_PP_SEL_AWUSER_SEL_MASK 0x0000FFFF +#define NB_PUSH_PACKET_PP_SEL_AWUSER_SEL_SHIFT 0 + +#ifdef __cplusplus +} +#endif + +#endif /* __AL_HAL_NB_REGS_H__ */ + +/** @} end of ... group */ + + diff --git a/sys/arm/annapurna/alpine/hal/al_hal_pbs_regs.h b/sys/arm/annapurna/alpine/hal/al_hal_pbs_regs.h new file mode 100644 index 000000000000..b1f9c4f44d93 --- /dev/null +++ b/sys/arm/annapurna/alpine/hal/al_hal_pbs_regs.h @@ -0,0 +1,2751 @@ +/*- +******************************************************************************** +Copyright (C) 2015 Annapurna Labs Ltd. + +This file may be licensed under the terms of the Annapurna Labs Commercial +License Agreement. + +Alternatively, this file can be distributed under the terms of the GNU General +Public License V2 as published by the Free Software Foundation and can be +found at http://www.gnu.org/licenses/gpl-2.0.html + +Alternatively, redistribution and use in source and binary forms, with or +without modification, are permitted provided that the following conditions are +met: + + * Redistributions of source code must retain the above copyright notice, +this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright +notice, this list of conditions and the following disclaimer in +the documentation and/or other materials provided with the +distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + +/** + * @{ + * @file al_hal_pbs_regs.h + * + * @brief ... registers + * + */ + +#ifndef __AL_HAL_PBS_REGS_H__ +#define __AL_HAL_PBS_REGS_H__ + +#include "al_hal_plat_types.h" + +#ifdef __cplusplus +extern "C" { +#endif +/* +* Unit Registers +*/ + + + +struct al_pbs_unit { + /* [0x0] Conf_bus, Configuration of the SB */ + uint32_t conf_bus; + /* [0x4] PASW high */ + uint32_t dram_0_nb_bar_high; + /* [0x8] PASW low */ + uint32_t dram_0_nb_bar_low; + /* [0xc] PASW high */ + uint32_t dram_1_nb_bar_high; + /* [0x10] PASW low */ + uint32_t dram_1_nb_bar_low; + /* [0x14] PASW high */ + uint32_t dram_2_nb_bar_high; + /* [0x18] PASW low */ + uint32_t dram_2_nb_bar_low; + /* [0x1c] PASW high */ + uint32_t dram_3_nb_bar_high; + /* [0x20] PASW low */ + uint32_t dram_3_nb_bar_low; + /* [0x24] PASW high */ + uint32_t msix_nb_bar_high; + /* [0x28] PASW low */ + uint32_t msix_nb_bar_low; + /* [0x2c] PASW high */ + uint32_t dram_0_sb_bar_high; + /* [0x30] PASW low */ + uint32_t dram_0_sb_bar_low; + /* [0x34] PASW high */ + uint32_t dram_1_sb_bar_high; + /* [0x38] PASW low */ + uint32_t dram_1_sb_bar_low; + /* [0x3c] PASW high */ + uint32_t dram_2_sb_bar_high; + /* [0x40] PASW low */ + uint32_t dram_2_sb_bar_low; + /* [0x44] PASW high */ + uint32_t dram_3_sb_bar_high; + /* [0x48] PASW low */ + uint32_t dram_3_sb_bar_low; + /* [0x4c] PASW high */ + uint32_t msix_sb_bar_high; + /* [0x50] PASW low */ + uint32_t msix_sb_bar_low; + /* [0x54] PASW high */ + uint32_t pcie_mem0_bar_high; + /* [0x58] PASW low */ + uint32_t pcie_mem0_bar_low; + /* [0x5c] PASW high */ + uint32_t pcie_mem1_bar_high; + /* [0x60] PASW low */ + uint32_t pcie_mem1_bar_low; + /* [0x64] PASW high */ + uint32_t pcie_mem2_bar_high; + /* [0x68] PASW low */ + uint32_t pcie_mem2_bar_low; + /* [0x6c] PASW high */ + uint32_t pcie_ext_ecam0_bar_high; + /* [0x70] PASW low */ + uint32_t pcie_ext_ecam0_bar_low; + /* [0x74] PASW high */ + uint32_t pcie_ext_ecam1_bar_high; + /* [0x78] PASW low */ + uint32_t pcie_ext_ecam1_bar_low; + /* [0x7c] PASW high */ + uint32_t pcie_ext_ecam2_bar_high; + /* [0x80] PASW low */ + uint32_t pcie_ext_ecam2_bar_low; + /* [0x84] PASW high */ + uint32_t pbs_nor_bar_high; + /* [0x88] PASW low */ + uint32_t pbs_nor_bar_low; + /* [0x8c] PASW high */ + uint32_t pbs_spi_bar_high; + /* [0x90] PASW low */ + uint32_t pbs_spi_bar_low; + uint32_t rsrvd_0[3]; + /* [0xa0] PASW high */ + uint32_t pbs_nand_bar_high; + /* [0xa4] PASW low */ + uint32_t pbs_nand_bar_low; + /* [0xa8] PASW high */ + uint32_t pbs_int_mem_bar_high; + /* [0xac] PASW low */ + uint32_t pbs_int_mem_bar_low; + /* [0xb0] PASW high */ + uint32_t pbs_boot_bar_high; + /* [0xb4] PASW low */ + uint32_t pbs_boot_bar_low; + /* [0xb8] PASW high */ + uint32_t nb_int_bar_high; + /* [0xbc] PASW low */ + uint32_t nb_int_bar_low; + /* [0xc0] PASW high */ + uint32_t nb_stm_bar_high; + /* [0xc4] PASW low */ + uint32_t nb_stm_bar_low; + /* [0xc8] PASW high */ + uint32_t pcie_ecam_int_bar_high; + /* [0xcc] PASW low */ + uint32_t pcie_ecam_int_bar_low; + /* [0xd0] PASW high */ + uint32_t pcie_mem_int_bar_high; + /* [0xd4] PASW low */ + uint32_t pcie_mem_int_bar_low; + /* [0xd8] Control */ + uint32_t winit_cntl; + /* [0xdc] Control */ + uint32_t latch_bars; + /* [0xe0] Control */ + uint32_t pcie_conf_0; + /* [0xe4] Control */ + uint32_t pcie_conf_1; + /* [0xe8] Control */ + uint32_t serdes_mux_pipe; + /* [0xec] Control */ + uint32_t dma_io_master_map; + /* [0xf0] Status */ + uint32_t i2c_pld_status_high; + /* [0xf4] Status */ + uint32_t i2c_pld_status_low; + /* [0xf8] Status */ + uint32_t spi_dbg_status_high; + /* [0xfc] Status */ + uint32_t spi_dbg_status_low; + /* [0x100] Status */ + uint32_t spi_mst_status_high; + /* [0x104] Status */ + uint32_t spi_mst_status_low; + /* [0x108] Log */ + uint32_t mem_pbs_parity_err_high; + /* [0x10c] Log */ + uint32_t mem_pbs_parity_err_low; + /* [0x110] Log */ + uint32_t boot_strap; + /* [0x114] Conf */ + uint32_t cfg_axi_conf_0; + /* [0x118] Conf */ + uint32_t cfg_axi_conf_1; + /* [0x11c] Conf */ + uint32_t cfg_axi_conf_2; + /* [0x120] Conf */ + uint32_t cfg_axi_conf_3; + /* [0x124] Conf */ + uint32_t spi_mst_conf_0; + /* [0x128] Conf */ + uint32_t spi_mst_conf_1; + /* [0x12c] Conf */ + uint32_t spi_slv_conf_0; + /* [0x130] Conf */ + uint32_t apb_mem_conf_int; + /* [0x134] PASW remap register */ + uint32_t sb2nb_cfg_dram_remap; + /* [0x138] Control */ + uint32_t pbs_mux_sel_0; + /* [0x13c] Control */ + uint32_t pbs_mux_sel_1; + /* [0x140] Control */ + uint32_t pbs_mux_sel_2; + /* [0x144] Control */ + uint32_t pbs_mux_sel_3; + /* [0x148] PASW high */ + uint32_t sb_int_bar_high; + /* [0x14c] PASW low */ + uint32_t sb_int_bar_low; + /* [0x150] log */ + uint32_t ufc_pbs_parity_err_high; + /* [0x154] log */ + uint32_t ufc_pbs_parity_err_low; + /* [0x158] Cntl - internal */ + uint32_t gen_conf; + /* [0x15c] Device ID and Rev ID */ + uint32_t chip_id; + /* [0x160] Status - internal */ + uint32_t uart0_debug; + /* [0x164] Status - internal */ + uint32_t uart1_debug; + /* [0x168] Status - internal */ + uint32_t uart2_debug; + /* [0x16c] Status - internal */ + uint32_t uart3_debug; + /* [0x170] Control - internal */ + uint32_t uart0_conf_status; + /* [0x174] Control - internal */ + uint32_t uart1_conf_status; + /* [0x178] Control - internal */ + uint32_t uart2_conf_status; + /* [0x17c] Control - internal */ + uint32_t uart3_conf_status; + /* [0x180] Control - internal */ + uint32_t gpio0_conf_status; + /* [0x184] Control - internal */ + uint32_t gpio1_conf_status; + /* [0x188] Control - internal */ + uint32_t gpio2_conf_status; + /* [0x18c] Control - internal */ + uint32_t gpio3_conf_status; + /* [0x190] Control - internal */ + uint32_t gpio4_conf_status; + /* [0x194] Control - internal */ + uint32_t i2c_gen_conf_status; + /* [0x198] Control - internal */ + uint32_t i2c_gen_debug; + /* [0x19c] Cntl */ + uint32_t watch_dog_reset_out; + /* [0x1a0] Cntl */ + uint32_t otp_magic_num; + /* + * [0x1a4] Control - internal + */ + uint32_t otp_cntl; + /* [0x1a8] Cfg - internal */ + uint32_t otp_cfg_0; + /* [0x1ac] Cfg - internal */ + uint32_t otp_cfg_1; + /* [0x1b0] Cfg - internal */ + uint32_t otp_cfg_3; + /* [0x1b4] Cfg */ + uint32_t cfg_nand_0; + /* [0x1b8] Cfg */ + uint32_t cfg_nand_1; + /* [0x1bc] Cfg-- timing parameters internal. */ + uint32_t cfg_nand_2; + /* [0x1c0] Cfg - internal */ + uint32_t cfg_nand_3; + /* [0x1c4] PASW high */ + uint32_t nb_nic_regs_bar_high; + /* [0x1c8] PASW low */ + uint32_t nb_nic_regs_bar_low; + /* [0x1cc] PASW high */ + uint32_t sb_nic_regs_bar_high; + /* [0x1d0] PASW low */ + uint32_t sb_nic_regs_bar_low; + /* [0x1d4] Control */ + uint32_t serdes_mux_multi_0; + /* [0x1d8] Control */ + uint32_t serdes_mux_multi_1; + /* [0x1dc] Control - not in use any more - internal */ + uint32_t pbs_ulpi_mux_conf; + /* [0x1e0] Cntl */ + uint32_t wr_once_dbg_dis_ovrd_reg; + /* [0x1e4] Cntl - internal */ + uint32_t gpio5_conf_status; + /* [0x1e8] PASW high */ + uint32_t pcie_mem3_bar_high; + /* [0x1ec] PASW low */ + uint32_t pcie_mem3_bar_low; + /* [0x1f0] PASW high */ + uint32_t pcie_mem4_bar_high; + /* [0x1f4] PASW low */ + uint32_t pcie_mem4_bar_low; + /* [0x1f8] PASW high */ + uint32_t pcie_mem5_bar_high; + /* [0x1fc] PASW low */ + uint32_t pcie_mem5_bar_low; + /* [0x200] PASW high */ + uint32_t pcie_ext_ecam3_bar_high; + /* [0x204] PASW low */ + uint32_t pcie_ext_ecam3_bar_low; + /* [0x208] PASW high */ + uint32_t pcie_ext_ecam4_bar_high; + /* [0x20c] PASW low */ + uint32_t pcie_ext_ecam4_bar_low; + /* [0x210] PASW high */ + uint32_t pcie_ext_ecam5_bar_high; + /* [0x214] PASW low */ + uint32_t pcie_ext_ecam5_bar_low; + /* [0x218] PASW high */ + uint32_t low_latency_sram_bar_high; + /* [0x21c] PASW low */ + uint32_t low_latency_sram_bar_low; + /* [0x220] Control */ + uint32_t pbs_mux_sel_4; + /* [0x224] Control */ + uint32_t pbs_mux_sel_5; + /* [0x228] Control */ + uint32_t serdes_mux_eth; + /* [0x22c] Control */ + uint32_t serdes_mux_pcie; + /* [0x230] Control */ + uint32_t serdes_mux_sata; + uint32_t rsrvd[7]; +}; +struct al_pbs_low_latency_sram_remap { + /* [0x0] PBS MEM Remap */ + uint32_t bar1_orig; + /* [0x4] PBS MEM Remap */ + uint32_t bar1_remap; + /* [0x8] ETH0 MEM Remap */ + uint32_t bar2_orig; + /* [0xc] ETH0 MEM Remap */ + uint32_t bar2_remap; + /* [0x10] ETH1 MEM Remap */ + uint32_t bar3_orig; + /* [0x14] ETH1 MEM Remap */ + uint32_t bar3_remap; + /* [0x18] ETH2 MEM Remap */ + uint32_t bar4_orig; + /* [0x1c] ETH2 MEM Remap */ + uint32_t bar4_remap; + /* [0x20] ETH3 MEM Remap */ + uint32_t bar5_orig; + /* [0x24] ETH3 MEM Remap */ + uint32_t bar5_remap; + /* [0x28] CRYPTO0 MEM Remap */ + uint32_t bar6_orig; + /* [0x2c] CRYPTO0 MEM Remap */ + uint32_t bar6_remap; + /* [0x30] RAID0 MEM Remap */ + uint32_t bar7_orig; + /* [0x34] RAID0 MEM Remap */ + uint32_t bar7_remap; + /* [0x38] CRYPTO1 MEM Remap */ + uint32_t bar8_orig; + /* [0x3c] CRYPTO1 MEM Remap */ + uint32_t bar8_remap; + /* [0x40] RAID1 MEM Remap */ + uint32_t bar9_orig; + /* [0x44] RAID2 MEM Remap */ + uint32_t bar9_remap; + /* [0x48] RESERVED MEM Remap */ + uint32_t bar10_orig; + /* [0x4c] RESERVED MEM Remap */ + uint32_t bar10_remap; +}; +struct al_pbs_target_id_enforcement { + /* [0x0] target enforcement */ + uint32_t cpu; + /* [0x4] target enforcement mask (bits which are 0 are not compared) */ + uint32_t cpu_mask; + /* [0x8] target enforcement */ + uint32_t debug_nb; + /* [0xc] target enforcement mask (bits which are 0 are not compared) */ + uint32_t debug_nb_mask; + /* [0x10] target enforcement */ + uint32_t debug_sb; + /* [0x14] target enforcement mask (bits which are 0 are not compared) */ + uint32_t debug_sb_mask; + /* [0x18] target enforcement */ + uint32_t eth_0; + /* [0x1c] target enforcement mask (bits which are 0 are not compared) */ + uint32_t eth_0_mask; + /* [0x20] target enforcement */ + uint32_t eth_1; + /* [0x24] target enforcement mask (bits which are 0 are not compared) */ + uint32_t eth_1_mask; + /* [0x28] target enforcement */ + uint32_t eth_2; + /* [0x2c] target enforcement mask (bits which are 0 are not compared) */ + uint32_t eth_2_mask; + /* [0x30] target enforcement */ + uint32_t eth_3; + /* [0x34] target enforcement mask (bits which are 0 are not compared) */ + uint32_t eth_3_mask; + /* [0x38] target enforcement */ + uint32_t sata_0; + /* [0x3c] target enforcement mask (bits which are 0 are not compared) */ + uint32_t sata_0_mask; + /* [0x40] target enforcement */ + uint32_t sata_1; + /* [0x44] target enforcement mask (bits which are 0 are not compared) */ + uint32_t sata_1_mask; + /* [0x48] target enforcement */ + uint32_t crypto_0; + /* [0x4c] target enforcement mask (bits which are 0 are not compared) */ + uint32_t crypto_0_mask; + /* [0x50] target enforcement */ + uint32_t crypto_1; + /* [0x54] target enforcement mask (bits which are 0 are not compared) */ + uint32_t crypto_1_mask; + /* [0x58] target enforcement */ + uint32_t pcie_0; + /* [0x5c] target enforcement mask (bits which are 0 are not compared) */ + uint32_t pcie_0_mask; + /* [0x60] target enforcement */ + uint32_t pcie_1; + /* [0x64] target enforcement mask (bits which are 0 are not compared) */ + uint32_t pcie_1_mask; + /* [0x68] target enforcement */ + uint32_t pcie_2; + /* [0x6c] target enforcement mask (bits which are 0 are not compared) */ + uint32_t pcie_2_mask; + /* [0x70] target enforcement */ + uint32_t pcie_3; + /* [0x74] target enforcement mask (bits which are 0 are not compared) */ + uint32_t pcie_3_mask; + /* [0x78] Control */ + uint32_t latch; + uint32_t rsrvd[9]; +}; + +struct al_pbs_regs { + struct al_pbs_unit unit; /* [0x0] */ +struct al_pbs_low_latency_sram_remap low_latency_sram_remap; +/* [0x250] */ + uint32_t rsrvd_0[88]; + struct al_pbs_target_id_enforcement target_id_enforcement; /* [0x400] */ +}; + + +/* +* Registers Fields +*/ + + +/**** conf_bus register ****/ +/* Read slave error enable */ +#define PBS_UNIT_CONF_BUS_RD_SLVERR_EN (1 << 0) +/* Write slave error enable */ +#define PBS_UNIT_CONF_BUS_WR_SLVERR_EN (1 << 1) +/* Read decode error enable */ +#define PBS_UNIT_CONF_BUS_RD_DECERR_EN (1 << 2) +/* Write decode error enable */ +#define PBS_UNIT_CONF_BUS_WR_DECERR_EN (1 << 3) +/* For debug clear the APB SM */ +#define PBS_UNIT_CONF_BUS_CLR_APB_FSM (1 << 4) +/* For debug clear the WFIFO */ +#define PBS_UNIT_CONF_BUS_CLR_WFIFO_CLEAR (1 << 5) +/* Arbiter between read and write channel */ +#define PBS_UNIT_CONF_BUS_WRR_CNT_MASK 0x000001C0 +#define PBS_UNIT_CONF_BUS_WRR_CNT_SHIFT 6 + + +/* general PASWS */ +/* window size = 2 ^ (15 + win_size), zero value disable the win ... */ +#define PBS_PASW_WIN_SIZE_MASK 0x0000003F +#define PBS_PASW_WIN_SIZE_SHIFT 0 +/* reserved fields */ +#define PBS_PASW_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_PASW_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_PASW_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_PASW_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** dram_0_nb_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_DRAM_0_NB_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_DRAM_0_NB_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_DRAM_0_NB_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_DRAM_0_NB_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_DRAM_0_NB_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_DRAM_0_NB_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** dram_1_nb_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_DRAM_1_NB_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_DRAM_1_NB_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_DRAM_1_NB_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_DRAM_1_NB_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_DRAM_1_NB_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_DRAM_1_NB_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** dram_2_nb_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_DRAM_2_NB_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_DRAM_2_NB_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_DRAM_2_NB_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_DRAM_2_NB_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_DRAM_2_NB_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_DRAM_2_NB_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** dram_3_nb_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_DRAM_3_NB_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_DRAM_3_NB_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_DRAM_3_NB_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_DRAM_3_NB_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_DRAM_3_NB_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_DRAM_3_NB_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** msix_nb_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_MSIX_NB_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_MSIX_NB_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_MSIX_NB_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_MSIX_NB_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_MSIX_NB_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_MSIX_NB_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** dram_0_sb_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_DRAM_0_SB_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_DRAM_0_SB_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_DRAM_0_SB_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_DRAM_0_SB_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_DRAM_0_SB_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_DRAM_0_SB_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** dram_1_sb_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_DRAM_1_SB_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_DRAM_1_SB_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_DRAM_1_SB_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_DRAM_1_SB_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_DRAM_1_SB_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_DRAM_1_SB_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** dram_2_sb_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_DRAM_2_SB_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_DRAM_2_SB_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_DRAM_2_SB_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_DRAM_2_SB_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_DRAM_2_SB_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_DRAM_2_SB_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** dram_3_sb_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_DRAM_3_SB_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_DRAM_3_SB_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_DRAM_3_SB_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_DRAM_3_SB_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_DRAM_3_SB_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_DRAM_3_SB_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** msix_sb_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_MSIX_SB_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_MSIX_SB_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_MSIX_SB_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_MSIX_SB_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_MSIX_SB_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_MSIX_SB_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** pcie_mem0_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_PCIE_MEM0_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_PCIE_MEM0_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_PCIE_MEM0_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_PCIE_MEM0_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_PCIE_MEM0_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_PCIE_MEM0_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** pcie_mem1_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_PCIE_MEM1_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_PCIE_MEM1_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_PCIE_MEM1_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_PCIE_MEM1_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_PCIE_MEM1_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_PCIE_MEM1_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** pcie_mem2_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_PCIE_MEM2_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_PCIE_MEM2_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_PCIE_MEM2_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_PCIE_MEM2_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_PCIE_MEM2_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_PCIE_MEM2_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** pcie_ext_ecam0_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_PCIE_EXT_ECAM0_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_PCIE_EXT_ECAM0_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_PCIE_EXT_ECAM0_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_PCIE_EXT_ECAM0_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_PCIE_EXT_ECAM0_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_PCIE_EXT_ECAM0_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** pcie_ext_ecam1_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_PCIE_EXT_ECAM1_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_PCIE_EXT_ECAM1_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_PCIE_EXT_ECAM1_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_PCIE_EXT_ECAM1_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_PCIE_EXT_ECAM1_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_PCIE_EXT_ECAM1_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** pcie_ext_ecam2_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_PCIE_EXT_ECAM2_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_PCIE_EXT_ECAM2_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_PCIE_EXT_ECAM2_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_PCIE_EXT_ECAM2_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_PCIE_EXT_ECAM2_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_PCIE_EXT_ECAM2_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** pbs_nor_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_PBS_NOR_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_PBS_NOR_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_PBS_NOR_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_PBS_NOR_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_PBS_NOR_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_PBS_NOR_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** pbs_spi_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_PBS_SPI_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_PBS_SPI_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_PBS_SPI_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_PBS_SPI_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_PBS_SPI_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_PBS_SPI_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** pbs_nand_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_PBS_NAND_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_PBS_NAND_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_PBS_NAND_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_PBS_NAND_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_PBS_NAND_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_PBS_NAND_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** pbs_int_mem_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_PBS_INT_MEM_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_PBS_INT_MEM_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_PBS_INT_MEM_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_PBS_INT_MEM_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_PBS_INT_MEM_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_PBS_INT_MEM_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** pbs_boot_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_PBS_BOOT_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_PBS_BOOT_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_PBS_BOOT_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_PBS_BOOT_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_PBS_BOOT_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_PBS_BOOT_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** nb_int_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_NB_INT_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_NB_INT_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_NB_INT_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_NB_INT_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_NB_INT_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_NB_INT_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** nb_stm_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_NB_STM_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_NB_STM_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_NB_STM_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_NB_STM_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_NB_STM_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_NB_STM_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** pcie_ecam_int_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_PCIE_ECAM_INT_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_PCIE_ECAM_INT_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_PCIE_ECAM_INT_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_PCIE_ECAM_INT_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_PCIE_ECAM_INT_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_PCIE_ECAM_INT_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** pcie_mem_int_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_PCIE_MEM_INT_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_PCIE_MEM_INT_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_PCIE_MEM_INT_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_PCIE_MEM_INT_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_PCIE_MEM_INT_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_PCIE_MEM_INT_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** winit_cntl register ****/ +/* When set, enables access to winit regs, in normal mode. */ +#define PBS_UNIT_WINIT_CNTL_ENABLE_WINIT_REGS_ACCESS (1 << 0) +/* Reserved */ +#define PBS_UNIT_WINIT_CNTL_RSRVD_MASK 0xFFFFFFFE +#define PBS_UNIT_WINIT_CNTL_RSRVD_SHIFT 1 + +/**** latch_bars register ****/ +/* + * Software clears this bit before any bar update, and set it after all bars + * updated. + */ +#define PBS_UNIT_LATCH_BARS_ENABLE (1 << 0) +/* Reserved */ +#define PBS_UNIT_LATCH_BARS_RSRVD_MASK 0xFFFFFFFE +#define PBS_UNIT_LATCH_BARS_RSRVD_SHIFT 1 + +/**** pcie_conf_0 register ****/ +/* NOT_use, config internal inside each PCIe core */ +#define PBS_UNIT_PCIE_CONF_0_DEVS_TYPE_MASK 0x00000FFF +#define PBS_UNIT_PCIE_CONF_0_DEVS_TYPE_SHIFT 0 +/* sys_aux_det value */ +#define PBS_UNIT_PCIE_CONF_0_SYS_AUX_PWR_DET_VEC_MASK 0x00007000 +#define PBS_UNIT_PCIE_CONF_0_SYS_AUX_PWR_DET_VEC_SHIFT 12 +/* Reserved */ +#define PBS_UNIT_PCIE_CONF_0_RSRVD_MASK 0xFFFF8000 +#define PBS_UNIT_PCIE_CONF_0_RSRVD_SHIFT 15 + +/**** pcie_conf_1 register ****/ +/* + * Which PCIe exists? The PCIe device is under reset until the corresponding bit + * is set. + */ +#define PBS_UNIT_PCIE_CONF_1_PCIE_EXIST_MASK 0x0000003F +#define PBS_UNIT_PCIE_CONF_1_PCIE_EXIST_SHIFT 0 +/* Reserved */ +#define PBS_UNIT_PCIE_CONF_1_RSRVD_MASK 0xFFFFFFC0 +#define PBS_UNIT_PCIE_CONF_1_RSRVD_SHIFT 6 + +/**** serdes_mux_pipe register ****/ +/* SerDes one hot mux control. For details see datasheet. */ +#define PBS_UNIT_SERDES_MUX_PIPE_SELECT_OH_SERDES_2_MASK 0x00000007 +#define PBS_UNIT_SERDES_MUX_PIPE_SELECT_OH_SERDES_2_SHIFT 0 +/* Reserved */ +#define PBS_UNIT_SERDES_MUX_PIPE_RSRVD_3 (1 << 3) +/* SerDes one hot mux control. For details see datasheet. */ +#define PBS_UNIT_SERDES_MUX_PIPE_SELECT_OH_SERDES_3_MASK 0x00000070 +#define PBS_UNIT_SERDES_MUX_PIPE_SELECT_OH_SERDES_3_SHIFT 4 +/* Reserved */ +#define PBS_UNIT_SERDES_MUX_PIPE_RSRVD_7 (1 << 7) +/* SerDes one hot mux control. For details see datasheet. */ +#define PBS_UNIT_SERDES_MUX_PIPE_SELECT_OH_PCI_B_0_MASK 0x00000300 +#define PBS_UNIT_SERDES_MUX_PIPE_SELECT_OH_PCI_B_0_SHIFT 8 +/* SerDes one hot mux control. For details see datasheet. */ +#define PBS_UNIT_SERDES_MUX_PIPE_SELECT_OH_PCI_B_1_MASK 0x00000C00 +#define PBS_UNIT_SERDES_MUX_PIPE_SELECT_OH_PCI_B_1_SHIFT 10 +/* SerDes one hot mux control. For details see datasheet. */ +#define PBS_UNIT_SERDES_MUX_PIPE_SELECT_OH_PCI_C_0_MASK 0x00003000 +#define PBS_UNIT_SERDES_MUX_PIPE_SELECT_OH_PCI_C_0_SHIFT 12 +/* SerDes one hot mux control. For details see datasheet. */ +#define PBS_UNIT_SERDES_MUX_PIPE_SELECT_OH_PCI_C_1_MASK 0x0000C000 +#define PBS_UNIT_SERDES_MUX_PIPE_SELECT_OH_PCI_C_1_SHIFT 14 +/* SerDes one hot mux control. For details see datasheet. */ +#define PBS_UNIT_SERDES_MUX_PIPE_SELECT_OH_USB_A_0_MASK 0x00030000 +#define PBS_UNIT_SERDES_MUX_PIPE_SELECT_OH_USB_A_0_SHIFT 16 +/* SerDes one hot mux control. For details see datasheet. */ +#define PBS_UNIT_SERDES_MUX_PIPE_SELECT_OH_USB_B_0_MASK 0x000C0000 +#define PBS_UNIT_SERDES_MUX_PIPE_SELECT_OH_USB_B_0_SHIFT 18 +/* SerDes one hot mux control. For details see datasheet. */ +#define PBS_UNIT_SERDES_MUX_PIPE_SELECT_OH_CLKI_SER_2_MASK 0x00300000 +#define PBS_UNIT_SERDES_MUX_PIPE_SELECT_OH_CLKI_SER_2_SHIFT 20 +/* Reserved */ +#define PBS_UNIT_SERDES_MUX_PIPE_RSRVD_23_22_MASK 0x00C00000 +#define PBS_UNIT_SERDES_MUX_PIPE_RSRVD_23_22_SHIFT 22 +/* SerDes one hot mux control. For details see datasheet. */ +#define PBS_UNIT_SERDES_MUX_PIPE_SELECT_OH_CLKI_SER_3_MASK 0x07000000 +#define PBS_UNIT_SERDES_MUX_PIPE_SELECT_OH_CLKI_SER_3_SHIFT 24 +/* Reserved */ +#define PBS_UNIT_SERDES_MUX_PIPE_RSRVD_MASK 0xF8000000 +#define PBS_UNIT_SERDES_MUX_PIPE_RSRVD_SHIFT 27 + +/* + * 2'b01 - select pcie_b[0] + * 2'b10 - select pcie_a[2] + */ +#define PBS_UNIT_SERDES_MUX_PIPE_PKR_SELECT_OH_SERDES_2_MASK 0x00000003 +#define PBS_UNIT_SERDES_MUX_PIPE_PKR_SELECT_OH_SERDES_2_SHIFT 0 +/* + * 2'b01 - select pcie_b[1] + * 2'b10 - select pcie_a[3] + */ +#define PBS_UNIT_SERDES_MUX_PIPE_PKR_SELECT_OH_SERDES_3_MASK 0x00000030 +#define PBS_UNIT_SERDES_MUX_PIPE_PKR_SELECT_OH_SERDES_3_SHIFT 4 +/* + * 2'b01 - select pcie_b[0] + * 2'b10 - select pcie_a[4] + */ +#define PBS_UNIT_SERDES_MUX_PIPE_PKR_SELECT_OH_SERDES_4_MASK 0x00000300 +#define PBS_UNIT_SERDES_MUX_PIPE_PKR_SELECT_OH_SERDES_4_SHIFT 8 +/* + * 2'b01 - select pcie_b[1] + * 2'b10 - select pcie_a[5] + */ +#define PBS_UNIT_SERDES_MUX_PIPE_PKR_SELECT_OH_SERDES_5_MASK 0x00003000 +#define PBS_UNIT_SERDES_MUX_PIPE_PKR_SELECT_OH_SERDES_5_SHIFT 12 +/* + * 2'b01 - select pcie_b[2] + * 2'b10 - select pcie_a[6] + */ +#define PBS_UNIT_SERDES_MUX_PIPE_PKR_SELECT_OH_SERDES_6_MASK 0x00030000 +#define PBS_UNIT_SERDES_MUX_PIPE_PKR_SELECT_OH_SERDES_6_SHIFT 16 +/* + * 2'b01 - select pcie_b[3] + * 2'b10 - select pcie_a[7] + */ +#define PBS_UNIT_SERDES_MUX_PIPE_PKR_SELECT_OH_SERDES_7_MASK 0x00300000 +#define PBS_UNIT_SERDES_MUX_PIPE_PKR_SELECT_OH_SERDES_7_SHIFT 20 +/* + * 2'b01 - select pcie_d[0] + * 2'b10 - select pcie_c[2] + */ +#define PBS_UNIT_SERDES_MUX_PIPE_PKR_SELECT_OH_SERDES_10_MASK 0x03000000 +#define PBS_UNIT_SERDES_MUX_PIPE_PKR_SELECT_OH_SERDES_10_SHIFT 24 +/* + * 2'b01 - select pcie_d[1] + * 2'b10 - select pcie_c[3] + */ +#define PBS_UNIT_SERDES_MUX_PIPE_PKR_SELECT_OH_SERDES_11_MASK 0x30000000 +#define PBS_UNIT_SERDES_MUX_PIPE_PKR_SELECT_OH_SERDES_11_SHIFT 28 + +/**** dma_io_master_map register ****/ +/* + * [0]: When set, maps all the io_dma transactions to the NB/DRAM, regardless of + * the window hit. + * [1]: When set, maps all the eth_0 transactions to the NB/DRAM, regardless of + * the window hit. + * [2]: When set, maps all the eth_2 transaction to the NB/DRAM, regardless of + * the window hit. + * [3]: When set, maps all the sata_0 transactions to the NB/DRAM, regardless of + * the window hit. + * [4]: When set, maps all the sata_1 transactions to the NB/DRAM, regardless of + * the window hit. + * [5]: When set, maps all the pcie_0 master transactions to the NB/DRAM, + * regardless of the window hit. + * [6]: When set, maps all the SPI debug port transactions to the NB/DRAM, + * regardless of the window hit. + * [7]: When set, maps all the CPU debug port transactions to the NB/DRAM, + * regardless of the window hit. + * [8] When set, maps all the Crypto transactions to the NB/DRAM, regardless of + * the window hit. + * [15:9] - Reserved + */ +#define PBS_UNIT_DMA_IO_MASTER_MAP_CNTL_MASK 0x0000FFFF +#define PBS_UNIT_DMA_IO_MASTER_MAP_CNTL_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_DMA_IO_MASTER_MAP_RSRVD_MASK 0xFFFF0000 +#define PBS_UNIT_DMA_IO_MASTER_MAP_RSRVD_SHIFT 16 + +/**** i2c_pld_status_high register ****/ +/* I2C pre-load status */ +#define PBS_UNIT_I2C_PLD_STATUS_HIGH_STATUS_MASK 0x000000FF +#define PBS_UNIT_I2C_PLD_STATUS_HIGH_STATUS_SHIFT 0 + +/**** spi_dbg_status_high register ****/ +/* SPI DBG load status */ +#define PBS_UNIT_SPI_DBG_STATUS_HIGH_STATUS_MASK 0x000000FF +#define PBS_UNIT_SPI_DBG_STATUS_HIGH_STATUS_SHIFT 0 + +/**** spi_mst_status_high register ****/ +/* SP IMST load status */ +#define PBS_UNIT_SPI_MST_STATUS_HIGH_STATUS_MASK 0x000000FF +#define PBS_UNIT_SPI_MST_STATUS_HIGH_STATUS_SHIFT 0 + +/**** mem_pbs_parity_err_high register ****/ +/* Address latch in the case of a parity error */ +#define PBS_UNIT_MEM_PBS_PARITY_ERR_HIGH_ADDR_MASK 0x000000FF +#define PBS_UNIT_MEM_PBS_PARITY_ERR_HIGH_ADDR_SHIFT 0 + +/**** cfg_axi_conf_0 register ****/ +/* Sets the AXI field in the I2C preloader interface. */ +#define PBS_UNIT_CFG_AXI_CONF_0_DBG_RD_ID_MASK 0x0000007F +#define PBS_UNIT_CFG_AXI_CONF_0_DBG_RD_ID_SHIFT 0 +/* Sets the AXI field in the I2C preloader interface. */ +#define PBS_UNIT_CFG_AXI_CONF_0_DBG_WR_ID_MASK 0x00003F80 +#define PBS_UNIT_CFG_AXI_CONF_0_DBG_WR_ID_SHIFT 7 +/* Sets the AXI field in the I2C preloader interface. */ +#define PBS_UNIT_CFG_AXI_CONF_0_PLD_WR_ID_MASK 0x001FC000 +#define PBS_UNIT_CFG_AXI_CONF_0_PLD_WR_ID_SHIFT 14 +/* Sets the AXI field in the SPI debug interface. */ +#define PBS_UNIT_CFG_AXI_CONF_0_DBG_AWCACHE_MASK 0x01E00000 +#define PBS_UNIT_CFG_AXI_CONF_0_DBG_AWCACHE_SHIFT 21 +/* Sets the AXI field in the SPI debug interface. */ +#define PBS_UNIT_CFG_AXI_CONF_0_DBG_ARCACHE_MASK 0x1E000000 +#define PBS_UNIT_CFG_AXI_CONF_0_DBG_ARCACHE_SHIFT 25 +/* Sets the AXI field in the SPI debug interface. */ +#define PBS_UNIT_CFG_AXI_CONF_0_DBG_AXPROT_MASK 0xE0000000 +#define PBS_UNIT_CFG_AXI_CONF_0_DBG_AXPROT_SHIFT 29 + +/**** cfg_axi_conf_1 register ****/ +/* Sets the AXI field in the SPI debug interface. */ +#define PBS_UNIT_CFG_AXI_CONF_1_DBG_ARUSER_MASK 0x03FFFFFF +#define PBS_UNIT_CFG_AXI_CONF_1_DBG_ARUSER_SHIFT 0 +/* Sets the AXI field in the SPI debug interface. */ +#define PBS_UNIT_CFG_AXI_CONF_1_DBG_ARQOS_MASK 0x3C000000 +#define PBS_UNIT_CFG_AXI_CONF_1_DBG_ARQOS_SHIFT 26 + +/**** cfg_axi_conf_2 register ****/ +/* Sets the AXI field in the SPI debug interface. */ +#define PBS_UNIT_CFG_AXI_CONF_2_DBG_AWUSER_MASK 0x03FFFFFF +#define PBS_UNIT_CFG_AXI_CONF_2_DBG_AWUSER_SHIFT 0 +/* Sets the AXI field in the SPI debug interface. */ +#define PBS_UNIT_CFG_AXI_CONF_2_DBG_AWQOS_MASK 0x3C000000 +#define PBS_UNIT_CFG_AXI_CONF_2_DBG_AWQOS_SHIFT 26 + +/**** spi_mst_conf_0 register ****/ +/* + * Sets the SPI master Configuration. For details see the SPI section in the + * documentation. + */ +#define PBS_UNIT_SPI_MST_CONF_0_CFG_SPI_MST_SRL (1 << 0) +/* + * Sets the SPI master Configuration. For details see the SPI section in the + * documentation. + */ +#define PBS_UNIT_SPI_MST_CONF_0_CFG_SPI_MST_SCPOL (1 << 1) +/* + * Sets the SPI master Configuration. For details see the SPI section in the + * documentation. + */ +#define PBS_UNIT_SPI_MST_CONF_0_CFG_SPI_MST_SCPH (1 << 2) +/* + * Set the SPI master configuration. For details see the SPI section in the + * documentation. + */ +#define PBS_UNIT_SPI_MST_CONF_0_CFG_SPI_MST_SER_MASK 0x00000078 +#define PBS_UNIT_SPI_MST_CONF_0_CFG_SPI_MST_SER_SHIFT 3 +/* + * Set the SPI master configuration. For details see the SPI section in the + * documentation. + */ +#define PBS_UNIT_SPI_MST_CONF_0_CFG_SPI_MST_BAUD_MASK 0x007FFF80 +#define PBS_UNIT_SPI_MST_CONF_0_CFG_SPI_MST_BAUD_SHIFT 7 +/* + * Sets the SPI master configuration. For details see the SPI section in the + * documentation. + */ +#define PBS_UNIT_SPI_MST_CONF_0_CFG_SPI_MST_RD_CMD_MASK 0x7F800000 +#define PBS_UNIT_SPI_MST_CONF_0_CFG_SPI_MST_RD_CMD_SHIFT 23 + +/**** spi_mst_conf_1 register ****/ +/* + * Sets the SPI master Configuration. For details see the SPI section in the + * documentation. + */ +#define PBS_UNIT_SPI_MST_CONF_1_CFG_SPI_MST_WR_CMD_MASK 0x000000FF +#define PBS_UNIT_SPI_MST_CONF_1_CFG_SPI_MST_WR_CMD_SHIFT 0 +/* + * Sets the SPI master Configuration. For details see the SPI section in the + * documentation. + */ +#define PBS_UNIT_SPI_MST_CONF_1_CFG_SPI_MST_ADDR_BYTES_NUM_MASK 0x00000700 +#define PBS_UNIT_SPI_MST_CONF_1_CFG_SPI_MST_ADDR_BYTES_NUM_SHIFT 8 +/* + * Sets the SPI master Configuration. For details see the SPI section in the + * documentation. + */ +#define PBS_UNIT_SPI_MST_CONF_1_CFG_SPI_MST_TMODE_MASK 0x00001800 +#define PBS_UNIT_SPI_MST_CONF_1_CFG_SPI_MST_TMODE_SHIFT 11 +/* + * Sets the SPI master Configuration. For details see the SPI section in the + * documentation. + */ +#define PBS_UNIT_SPI_MST_CONF_1_CFG_SPI_MST_FAST_RD (1 << 13) + +/**** spi_slv_conf_0 register ****/ +/* + * Sets the SPI slave configuration. For details see the SPI section in the + * documentation. + */ +#define PBS_UNIT_SPI_SLV_CONF_0_CFG_SPI_SLV_BAUD_MASK 0x0000FFFF +#define PBS_UNIT_SPI_SLV_CONF_0_CFG_SPI_SLV_BAUD_SHIFT 0 +/* Value. The reset value is according to bootstrap. */ +#define PBS_UNIT_SPI_SLV_CONF_0_CFG_SPI_SLV_SCPOL (1 << 16) +/* Value. The reset value is according to bootstrap. */ +#define PBS_UNIT_SPI_SLV_CONF_0_CFG_SPI_SLV_SCPH (1 << 17) +/* + * Sets the SPI slave configuration. For details see the SPI section in the + * documentation. + */ +#define PBS_UNIT_SPI_SLV_CONF_0_CFG_SPI_SLV_SER_MASK 0x03FC0000 +#define PBS_UNIT_SPI_SLV_CONF_0_CFG_SPI_SLV_SER_SHIFT 18 +/* + * Sets the SPI slave configuration. For details see the SPI section in the + * documentation. + */ +#define PBS_UNIT_SPI_SLV_CONF_0_CFG_SPI_SLV_SRL (1 << 26) +/* + * Sets the SPI slave configuration. For details see the SPI section in the + * documentation. + */ +#define PBS_UNIT_SPI_SLV_CONF_0_CFG_SPI_SLV_TMODE_MASK 0x18000000 +#define PBS_UNIT_SPI_SLV_CONF_0_CFG_SPI_SLV_TMODE_SHIFT 27 + +/**** apb_mem_conf_int register ****/ +/* Value-- internal */ +#define PBS_UNIT_APB_MEM_CONF_INT_CFG_PBS_WRR_CNT_MASK 0x00000007 +#define PBS_UNIT_APB_MEM_CONF_INT_CFG_PBS_WRR_CNT_SHIFT 0 +/* Value-- internal */ +#define PBS_UNIT_APB_MEM_CONF_INT_CFG_I2C_PLD_APB_MIX_ARB (1 << 3) +/* Value-- internal */ +#define PBS_UNIT_APB_MEM_CONF_INT_CFG_SPI_DBG_APB_MIX_ARB (1 << 4) +/* Value-- internal */ +#define PBS_UNIT_APB_MEM_CONF_INT_CFG_SPI_MST_APB_MIX_ARB (1 << 5) +/* Value-- internal */ +#define PBS_UNIT_APB_MEM_CONF_INT_CFG_I2C_PLD_CLEAR_FSM (1 << 6) +/* Value-- internal */ +#define PBS_UNIT_APB_MEM_CONF_INT_CFG_SPI_DBG_CLEAR_FSM (1 << 7) +/* Value-- internal */ +#define PBS_UNIT_APB_MEM_CONF_INT_CFG_SPI_MST_CLEAR_FSM (1 << 8) +/* Value-- internal */ +#define PBS_UNIT_APB_MEM_CONF_INT_CFG_PBS_AXI_FSM_CLEAR (1 << 9) +/* Value-- internal */ +#define PBS_UNIT_APB_MEM_CONF_INT_CFG_PBS_AXI_FIFOS_CLEAR (1 << 10) +/* Enables parity protection on the integrated SRAM. */ +#define PBS_UNIT_APB_MEM_CONF_INT_CFG_BOOTROM_PARITY_EN (1 << 11) +/* + * When set, reports a slave error whenthe slave returns an AXI slave error, for + * configuration access to the internal configuration space. + */ +#define PBS_UNIT_APB_MEM_CONF_INT_CFG_RD_SLV_ERR_EN (1 << 12) +/* + * When set, reports a decode error when timeout has occurred for configuration + * access to the internal configuration space. + */ +#define PBS_UNIT_APB_MEM_CONF_INT_CFG_RD_DEC_ERR_EN (1 << 13) +/* + * When set, reports a slave error, when the slave returns an AXI slave error, + * for configuration access to the internal configuration space. + */ +#define PBS_UNIT_APB_MEM_CONF_INT_CFG_WR_SLV_ERR_EN (1 << 14) +/* + * When set, reports a decode error when timeout has occurred for configuration + * access to the internal configuration space. + */ +#define PBS_UNIT_APB_MEM_CONF_INT_CFG_WR_DEC_ERR_EN (1 << 15) + +/**** sb_int_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_SB_INT_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_SB_INT_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_SB_INT_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_SB_INT_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_SB_INT_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_SB_INT_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** ufc_pbs_parity_err_high register ****/ +/* + * Address latch in the case of a parity error in the Flash Controller internal + * memories. + */ +#define PBS_UNIT_UFC_PBS_PARITY_ERR_HIGH_ADDR_MASK 0x000000FF +#define PBS_UNIT_UFC_PBS_PARITY_ERR_HIGH_ADDR_SHIFT 0 + +/**** chip_id register ****/ +/* [15:0] : Dev Rev ID */ +#define PBS_UNIT_CHIP_ID_DEV_REV_ID_MASK 0x0000FFFF +#define PBS_UNIT_CHIP_ID_DEV_REV_ID_SHIFT 0 +/* [31:16] : 0x0 - Dev ID */ +#define PBS_UNIT_CHIP_ID_DEV_ID_MASK 0xFFFF0000 +#define PBS_UNIT_CHIP_ID_DEV_ID_SHIFT 16 + +#define PBS_UNIT_CHIP_ID_DEV_ID_ALPINE 0 +#define PBS_UNIT_CHIP_ID_DEV_ID_PEAKROCK 1 +#define PBS_UNIT_CHIP_ID_DEV_ID_COYOTE 2 + +/**** uart0_conf_status register ****/ +/* + * Conf: + * // [0] -- DSR_N RW bit + * // [1] -- DCD_N RW bit + * // [2] -- RI_N bit + * // [3] -- dma_tx_ack_n + * // [4] -- dma_rx_ack_n + */ +#define PBS_UNIT_UART0_CONF_STATUS_CONF_MASK 0x0000FFFF +#define PBS_UNIT_UART0_CONF_STATUS_CONF_SHIFT 0 +/* + * Status: + * // [16] -- dtr_n RO bit + * // [17] -- OUT1_N RO bit + * // [18] -- OUT2_N RO bit + * // [19] -- dma_tx_req_n RO bit + * // [20] -- dma_tx_single_n RO bit + * // [21] -- dma_rx_req_n RO bit + * // [22] -- dma_rx_single_n RO bit + * // [23] -- uart_lp_req_pclk RO bit + * // [24] -- baudout_n RO bit + */ +#define PBS_UNIT_UART0_CONF_STATUS_STATUS_MASK 0xFFFF0000 +#define PBS_UNIT_UART0_CONF_STATUS_STATUS_SHIFT 16 + +/**** uart1_conf_status register ****/ +/* + * Conf: // [0] -- DSR_N RW bit // [1] -- DCD_N RW bit // [2] -- RI_N bit // [3] + * -- dma_tx_ack_n // [4] - dma_rx_ack_n + */ +#define PBS_UNIT_UART1_CONF_STATUS_CONF_MASK 0x0000FFFF +#define PBS_UNIT_UART1_CONF_STATUS_CONF_SHIFT 0 +/* + * Status: // [16] -- dtr_n RO bit // [17] -- OUT1_N RO bit // [18] -- OUT2_N RO + * bit // [19] -- dma_tx_req_n RO bit // [20] -- dma_tx_single_n RO bit // [21] + * -- dma_rx_req_n RO bit // [22] -- dma_rx_single_n RO bit // [23] -- + * uart_lp_req_pclk RO bit // [24] -- baudout_n RO bit + */ +#define PBS_UNIT_UART1_CONF_STATUS_STATUS_MASK 0xFFFF0000 +#define PBS_UNIT_UART1_CONF_STATUS_STATUS_SHIFT 16 + +/**** uart2_conf_status register ****/ +/* + * Conf: // [0] -- DSR_N RW bit // [1] -- DCD_N RW bit // [2] -- RI_N bit // [3] + * -- dma_tx_ack_n // [4] - dma_rx_ack_n + */ +#define PBS_UNIT_UART2_CONF_STATUS_CONF_MASK 0x0000FFFF +#define PBS_UNIT_UART2_CONF_STATUS_CONF_SHIFT 0 +/* + * Status: // [16] -- dtr_n RO bit // [17] -- OUT1_N RO bit // [18] -- OUT2_N RO + * bit // [19] -- dma_tx_req_n RO bit // [20] -- dma_tx_single_n RO bit // [21] + * -- dma_rx_req_n RO bit // [22] -- dma_rx_single_n RO bit // [23] -- + * uart_lp_req_pclk RO bit // [24] -- baudout_n RO bit + */ +#define PBS_UNIT_UART2_CONF_STATUS_STATUS_MASK 0xFFFF0000 +#define PBS_UNIT_UART2_CONF_STATUS_STATUS_SHIFT 16 + +/**** uart3_conf_status register ****/ +/* + * Conf: // [0] -- DSR_N RW bit // [1] -- DCD_N RW bit // [2] -- RI_N bit // [3] + * -- dma_tx_ack_n // [4] - dma_rx_ack_n + */ +#define PBS_UNIT_UART3_CONF_STATUS_CONF_MASK 0x0000FFFF +#define PBS_UNIT_UART3_CONF_STATUS_CONF_SHIFT 0 +/* + * Status: // [16] -- dtr_n RO bit // [17] -- OUT1_N RO bit // [18] -- OUT2_N RO + * bit // [19] -- dma_tx_req_n RO bit // [20] -- dma_tx_single_n RO bit // [21] + * -- dma_rx_req_n RO bit // [22] -- dma_rx_single_n RO bit // [23] -- + * uart_lp_req_pclk RO bit // [24] -- baudout_n RO bit + */ +#define PBS_UNIT_UART3_CONF_STATUS_STATUS_MASK 0xFFFF0000 +#define PBS_UNIT_UART3_CONF_STATUS_STATUS_SHIFT 16 + +/**** gpio0_conf_status register ****/ +/* + * Cntl: + * // [7:0] nGPAFEN; // from regfile + * // [15:8] GPAFOUT; // from regfile + */ +#define PBS_UNIT_GPIO0_CONF_STATUS_CONF_MASK 0x0000FFFF +#define PBS_UNIT_GPIO0_CONF_STATUS_CONF_SHIFT 0 +/* + * Status: + * // [24:16] GPAFIN; // to regfile + */ +#define PBS_UNIT_GPIO0_CONF_STATUS_STATUS_MASK 0xFFFF0000 +#define PBS_UNIT_GPIO0_CONF_STATUS_STATUS_SHIFT 16 + +/**** gpio1_conf_status register ****/ +/* + * Cntl: + * // [7:0] nGPAFEN; // from regfile + * // [15:8] GPAFOUT; // from regfile + */ +#define PBS_UNIT_GPIO1_CONF_STATUS_CONF_MASK 0x0000FFFF +#define PBS_UNIT_GPIO1_CONF_STATUS_CONF_SHIFT 0 +/* + * Status: + * // [24:16] GPAFIN; // to regfile + */ +#define PBS_UNIT_GPIO1_CONF_STATUS_STATUS_MASK 0xFFFF0000 +#define PBS_UNIT_GPIO1_CONF_STATUS_STATUS_SHIFT 16 + +/**** gpio2_conf_status register ****/ +/* + * Cntl: + * // [7:0] nGPAFEN; // from regfile + * // [15:8] GPAFOUT; // from regfile + */ +#define PBS_UNIT_GPIO2_CONF_STATUS_CONF_MASK 0x0000FFFF +#define PBS_UNIT_GPIO2_CONF_STATUS_CONF_SHIFT 0 +/* + * Status: + * // [24:16] GPAFIN; // to regfile + */ +#define PBS_UNIT_GPIO2_CONF_STATUS_STATUS_MASK 0xFFFF0000 +#define PBS_UNIT_GPIO2_CONF_STATUS_STATUS_SHIFT 16 + +/**** gpio3_conf_status register ****/ +/* + * Cntl: + * // [7:0] nGPAFEN; // from regfile + * // [15:8] GPAFOUT; // from regfile + */ +#define PBS_UNIT_GPIO3_CONF_STATUS_CONF_MASK 0x0000FFFF +#define PBS_UNIT_GPIO3_CONF_STATUS_CONF_SHIFT 0 +/* + * Status: + * // [24:16] GPAFIN; // to regfile + */ +#define PBS_UNIT_GPIO3_CONF_STATUS_STATUS_MASK 0xFFFF0000 +#define PBS_UNIT_GPIO3_CONF_STATUS_STATUS_SHIFT 16 + +/**** gpio4_conf_status register ****/ +/* + * Cntl: + * // [7:0] nGPAFEN; // from regfile + * // [15:8] GPAFOUT; // from regfile + */ +#define PBS_UNIT_GPIO4_CONF_STATUS_CONF_MASK 0x0000FFFF +#define PBS_UNIT_GPIO4_CONF_STATUS_CONF_SHIFT 0 +/* + * Status: + * // [24:16] GPAFIN; // to regfile + */ +#define PBS_UNIT_GPIO4_CONF_STATUS_STATUS_MASK 0xFFFF0000 +#define PBS_UNIT_GPIO4_CONF_STATUS_STATUS_SHIFT 16 + +/**** i2c_gen_conf_status register ****/ +/* + * cntl + * // [0] -- dma_tx_ack + * // [1] -- dma_rx_ack + */ +#define PBS_UNIT_I2C_GEN_CONF_STATUS_CONF_MASK 0x0000FFFF +#define PBS_UNIT_I2C_GEN_CONF_STATUS_CONF_SHIFT 0 +/* + * Status + * + * // [16] -- dma_tx_req RO bit + * // [17] -- dma_tx_single RO bit + * // [18] -- dma_rx_req RO bit + * // [19] -- dma_rx_single RO bit + */ +#define PBS_UNIT_I2C_GEN_CONF_STATUS_STATUS_MASK 0xFFFF0000 +#define PBS_UNIT_I2C_GEN_CONF_STATUS_STATUS_SHIFT 16 + +/**** watch_dog_reset_out register ****/ +/* + * [0] If set to 1'b1, WD0 cannot generate reset_out_n + * [1] If set to 1'b1, WD1 cannot generate reset_out_n + * [2] If set to 1'b1, WD2 cannot generate reset_out_n + * [3] If set to 1'b1, WD3 cannot generate reset_out_n + * [4] If set to 1'b1, WD4 cannot generate reset_out_n + * [5] If set to 1'b1, WD5 cannot generate reset_out_n + * [6] If set to 1'b1, WD6 cannot generate reset_out_n + * [7] If set to 1'b1, WD7 cannot generate reset_out_n + */ +#define PBS_UNIT_WATCH_DOG_RESET_OUT_DISABLE_MASK 0x000000FF +#define PBS_UNIT_WATCH_DOG_RESET_OUT_DISABLE_SHIFT 0 + +/**** otp_cntl register ****/ +/* from reg file Config To bypass the copy from OTPW to OTPR */ +#define PBS_UNIT_OTP_CNTL_IGNORE_OTPW (1 << 0) +/* Not in use.Comes from bond. */ +#define PBS_UNIT_OTP_CNTL_IGNORE_PRELOAD (1 << 1) +/* Margin read from the fuse box */ +#define PBS_UNIT_OTP_CNTL_OTPW_MARGIN_READ (1 << 2) +/* Indicates when OTPis busy. */ +#define PBS_UNIT_OTP_CNTL_OTP_BUSY (1 << 3) + +/**** otp_cfg_0 register ****/ +/* Cfg to OTP cntl. */ +#define PBS_UNIT_OTP_CFG_0_CFG_OTPW_PWRDN_CNT_MASK 0x0000FFFF +#define PBS_UNIT_OTP_CFG_0_CFG_OTPW_PWRDN_CNT_SHIFT 0 +/* Cfg to OTP cntl. */ +#define PBS_UNIT_OTP_CFG_0_CFG_OTPW_READ_CNT_MASK 0xFFFF0000 +#define PBS_UNIT_OTP_CFG_0_CFG_OTPW_READ_CNT_SHIFT 16 + +/**** otp_cfg_1 register ****/ +/* Cfg to OTP cntl. */ +#define PBS_UNIT_OTP_CFG_1_CFG_OTPW_PGM_CNT_MASK 0x0000FFFF +#define PBS_UNIT_OTP_CFG_1_CFG_OTPW_PGM_CNT_SHIFT 0 +/* Cfg to OTP cntl. */ +#define PBS_UNIT_OTP_CFG_1_CFG_OTPW_PREP_CNT_MASK 0xFFFF0000 +#define PBS_UNIT_OTP_CFG_1_CFG_OTPW_PREP_CNT_SHIFT 16 + +/**** otp_cfg_3 register ****/ +/* Cfg to OTP cntl. */ +#define PBS_UNIT_OTP_CFG_3_CFG_OTPW_PS18_CNT_MASK 0x0000FFFF +#define PBS_UNIT_OTP_CFG_3_CFG_OTPW_PS18_CNT_SHIFT 0 +/* Cfg to OTP cntl. */ +#define PBS_UNIT_OTP_CFG_3_CFG_OTPW_PWRUP_CNT_MASK 0xFFFF0000 +#define PBS_UNIT_OTP_CFG_3_CFG_OTPW_PWRUP_CNT_SHIFT 16 + +/**** nb_nic_regs_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_NB_NIC_REGS_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_NB_NIC_REGS_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_NB_NIC_REGS_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_NB_NIC_REGS_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_NB_NIC_REGS_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_NB_NIC_REGS_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** sb_nic_regs_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_SB_NIC_REGS_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_SB_NIC_REGS_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_SB_NIC_REGS_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_SB_NIC_REGS_BAR_LOW_RSRVD_SHIFT 6 +/* bar low address 16 MSB bits */ +#define PBS_UNIT_SB_NIC_REGS_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_SB_NIC_REGS_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** serdes_mux_multi_0 register ****/ +/* SerDes one hot mux control. For details see datasheet. */ +#define PBS_UNIT_SERDES_MUX_MULTI_0_SELECT_OH_SERDES_8_MASK 0x00000007 +#define PBS_UNIT_SERDES_MUX_MULTI_0_SELECT_OH_SERDES_8_SHIFT 0 +/* Reserved */ +#define PBS_UNIT_SERDES_MUX_MULTI_0_RSRVD_3 (1 << 3) +/* SerDes one hot mux control. For details see datasheet. */ +#define PBS_UNIT_SERDES_MUX_MULTI_0_SELECT_OH_SERDES_9_MASK 0x00000070 +#define PBS_UNIT_SERDES_MUX_MULTI_0_SELECT_OH_SERDES_9_SHIFT 4 +/* Reserved */ +#define PBS_UNIT_SERDES_MUX_MULTI_0_RSRVD_7 (1 << 7) +/* SerDes one hot mux control. For details see datasheet. */ +#define PBS_UNIT_SERDES_MUX_MULTI_0_SELECT_OH_SERDES_10_MASK 0x00000700 +#define PBS_UNIT_SERDES_MUX_MULTI_0_SELECT_OH_SERDES_10_SHIFT 8 +/* Reserved */ +#define PBS_UNIT_SERDES_MUX_MULTI_0_RSRVD_11 (1 << 11) +/* SerDes one hot mux control. For details see datasheet. */ +#define PBS_UNIT_SERDES_MUX_MULTI_0_SELECT_OH_SERDES_11_MASK 0x00007000 +#define PBS_UNIT_SERDES_MUX_MULTI_0_SELECT_OH_SERDES_11_SHIFT 12 +/* Reserved */ +#define PBS_UNIT_SERDES_MUX_MULTI_0_RSRVD_15 (1 << 15) +/* SerDes one hot mux control. For details see datasheet. */ +#define PBS_UNIT_SERDES_MUX_MULTI_0_SELECT_OH_SERDES_12_MASK 0x00030000 +#define PBS_UNIT_SERDES_MUX_MULTI_0_SELECT_OH_SERDES_12_SHIFT 16 +/* SerDes one hot mux control. For details see datasheet. */ +#define PBS_UNIT_SERDES_MUX_MULTI_0_SELECT_OH_SERDES_13_MASK 0x000C0000 +#define PBS_UNIT_SERDES_MUX_MULTI_0_SELECT_OH_SERDES_13_SHIFT 18 +/* SerDes one hot mux control. For details see datasheet. */ +#define PBS_UNIT_SERDES_MUX_MULTI_0_SELECT_OH_SERDES_14_MASK 0x00300000 +#define PBS_UNIT_SERDES_MUX_MULTI_0_SELECT_OH_SERDES_14_SHIFT 20 +/* SerDes one hot mux control. For details see datasheet. */ +#define PBS_UNIT_SERDES_MUX_MULTI_0_SELECT_OH_SERDES_15_MASK 0x00C00000 +#define PBS_UNIT_SERDES_MUX_MULTI_0_SELECT_OH_SERDES_15_SHIFT 22 +/* Reserved */ +#define PBS_UNIT_SERDES_MUX_MULTI_0_RSRVD_MASK 0xFF000000 +#define PBS_UNIT_SERDES_MUX_MULTI_0_RSRVD_SHIFT 24 + +/* + * 2'b01 - select sata_b[0] + * 2'b10 - select eth_a[0] + */ +#define PBS_UNIT_SERDES_MUX_MULTI_0_PKR_SELECT_OH_SERDES_8_MASK 0x00000003 +#define PBS_UNIT_SERDES_MUX_MULTI_0_PKR_SELECT_OH_SERDES_8_SHIFT 0 +/* + * 3'b001 - select sata_b[1] + * 3'b010 - select eth_b[0] + * 3'b100 - select eth_a[1] + */ +#define PBS_UNIT_SERDES_MUX_MULTI_0_PKR_SELECT_OH_SERDES_9_MASK 0x00000070 +#define PBS_UNIT_SERDES_MUX_MULTI_0_PKR_SELECT_OH_SERDES_9_SHIFT 4 +/* + * 3'b001 - select sata_b[2] + * 3'b010 - select eth_c[0] + * 3'b100 - select eth_a[2] + */ +#define PBS_UNIT_SERDES_MUX_MULTI_0_PKR_SELECT_OH_SERDES_10_MASK 0x00000700 +#define PBS_UNIT_SERDES_MUX_MULTI_0_PKR_SELECT_OH_SERDES_10_SHIFT 8 +/* + * 3'b001 - select sata_b[3] + * 3'b010 - select eth_d[0] + * 3'b100 - select eth_a[3] + */ +#define PBS_UNIT_SERDES_MUX_MULTI_0_PKR_SELECT_OH_SERDES_11_MASK 0x00007000 +#define PBS_UNIT_SERDES_MUX_MULTI_0_PKR_SELECT_OH_SERDES_11_SHIFT 12 +/* + * 2'b01 - select eth_a[0] + * 2'b10 - select sata_a[0] + */ +#define PBS_UNIT_SERDES_MUX_MULTI_0_PKR_SELECT_OH_SERDES_12_MASK 0x00030000 +#define PBS_UNIT_SERDES_MUX_MULTI_0_PKR_SELECT_OH_SERDES_12_SHIFT 16 +/* + * 3'b001 - select eth_b[0] + * 3'b010 - select eth_c[1] + * 3'b100 - select sata_a[1] + */ +#define PBS_UNIT_SERDES_MUX_MULTI_0_PKR_SELECT_OH_SERDES_13_MASK 0x00700000 +#define PBS_UNIT_SERDES_MUX_MULTI_0_PKR_SELECT_OH_SERDES_13_SHIFT 20 +/* + * 3'b001 - select eth_a[0] + * 3'b010 - select eth_c[2] + * 3'b100 - select sata_a[2] + */ +#define PBS_UNIT_SERDES_MUX_MULTI_0_PKR_SELECT_OH_SERDES_14_MASK 0x07000000 +#define PBS_UNIT_SERDES_MUX_MULTI_0_PKR_SELECT_OH_SERDES_14_SHIFT 24 +/* + * 3'b001 - select eth_d[0] + * 3'b010 - select eth_c[3] + * 3'b100 - select sata_a[3] + */ +#define PBS_UNIT_SERDES_MUX_MULTI_0_PKR_SELECT_OH_SERDES_15_MASK 0x70000000 +#define PBS_UNIT_SERDES_MUX_MULTI_0_PKR_SELECT_OH_SERDES_15_SHIFT 28 + +/**** serdes_mux_multi_1 register ****/ +/* SerDes one hot mux control. For details see datasheet. */ +#define PBS_UNIT_SERDES_MUX_MULTI_1_SELECT_OH_ETH_A_0_MASK 0x00000003 +#define PBS_UNIT_SERDES_MUX_MULTI_1_SELECT_OH_ETH_A_0_SHIFT 0 +/* Reserved */ +#define PBS_UNIT_SERDES_MUX_MULTI_1_RSRVD_3_2_MASK 0x0000000C +#define PBS_UNIT_SERDES_MUX_MULTI_1_RSRVD_3_2_SHIFT 2 +/* SerDes one hot mux control. For details see datasheet. */ +#define PBS_UNIT_SERDES_MUX_MULTI_1_SELECT_OH_ETH_B_0_MASK 0x00000070 +#define PBS_UNIT_SERDES_MUX_MULTI_1_SELECT_OH_ETH_B_0_SHIFT 4 +/* Reserved */ +#define PBS_UNIT_SERDES_MUX_MULTI_1_RSRVD_7 (1 << 7) +/* SerDes one hot mux control. For details see datasheet. */ +#define PBS_UNIT_SERDES_MUX_MULTI_1_SELECT_OH_ETH_C_0_MASK 0x00000300 +#define PBS_UNIT_SERDES_MUX_MULTI_1_SELECT_OH_ETH_C_0_SHIFT 8 +/* Reserved */ +#define PBS_UNIT_SERDES_MUX_MULTI_1_RSRVD_11_10_MASK 0x00000C00 +#define PBS_UNIT_SERDES_MUX_MULTI_1_RSRVD_11_10_SHIFT 10 +/* SerDes one hot mux control. For details see datasheet. */ +#define PBS_UNIT_SERDES_MUX_MULTI_1_SELECT_OH_ETH_D_0_MASK 0x00007000 +#define PBS_UNIT_SERDES_MUX_MULTI_1_SELECT_OH_ETH_D_0_SHIFT 12 +/* Reserved */ +#define PBS_UNIT_SERDES_MUX_MULTI_1_RSRVD_MASK 0xFFFF8000 +#define PBS_UNIT_SERDES_MUX_MULTI_1_RSRVD_SHIFT 15 + +/**** pbs_ulpi_mux_conf register ****/ +/* + * Value 0 - Select dedicated pins for the USB-1 inputs. + * Value 1 - Select PBS mux pins for the USB-1 inputs. + * [0] ULPI_B_CLK + * [1] ULPI_B_DIR + * [2] ULPI_B_NXT + * [10:3] ULPI_B_DATA[7:0] + */ +#define PBS_UNIT_PBS_ULPI_MUX_CONF_SEL_UPLI_IN_PBSMUX_MASK 0x000007FF +#define PBS_UNIT_PBS_ULPI_MUX_CONF_SEL_UPLI_IN_PBSMUX_SHIFT 0 +/* + * [3] - Force to zero + * [2] == 1 - Force register selection + * [1 : 0] -Binary selection of the input in bypass mode + */ +#define PBS_UNIT_PBS_ULPI_MUX_CONF_REG_MDIO_BYPASS_SEL_MASK 0x0000F000 +#define PBS_UNIT_PBS_ULPI_MUX_CONF_REG_MDIO_BYPASS_SEL_SHIFT 12 +/* + * [0] Sets the clk_ulpi OE for USB0, 1'b0 set to input, 1'b1 set to output. + * [1] Sets the clk_ulpi OE for USB01, 1'b0 set to input, 1'b1 set to output. + */ +#define PBS_UNIT_PBS_ULPI_MUX_CONF_RSRVD_MASK 0xFFFF0000 +#define PBS_UNIT_PBS_ULPI_MUX_CONF_RSRVD_SHIFT 16 + +/**** wr_once_dbg_dis_ovrd_reg register ****/ +/* This register can be written only once. Use in the secure boot process. */ +#define PBS_UNIT_WR_ONCE_DBG_DIS_OVRD_REG_WR_ONCE_DBG_DIS_OVRD (1 << 0) + +#define PBS_UNIT_WR_ONCE_DBG_DIS_OVRD_REG_RSRVD_MASK 0xFFFFFFFE +#define PBS_UNIT_WR_ONCE_DBG_DIS_OVRD_REG_RSRVD_SHIFT 1 + +/**** gpio5_conf_status register ****/ +/* + * Cntl: // [7:0] nGPAFEN; // from regfile // [15:8] GPAFOUT; // from regfile + */ +#define PBS_UNIT_GPIO5_CONF_STATUS_CONF_MASK 0x0000FFFF +#define PBS_UNIT_GPIO5_CONF_STATUS_CONF_SHIFT 0 +/* Status: // [24:16] GPAFIN; // to regfile */ +#define PBS_UNIT_GPIO5_CONF_STATUS_STATUS_MASK 0xFFFF0000 +#define PBS_UNIT_GPIO5_CONF_STATUS_STATUS_SHIFT 16 + +/**** pcie_mem3_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_PCIE_MEM3_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_PCIE_MEM3_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_PCIE_MEM3_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_PCIE_MEM3_BAR_LOW_RSRVD_SHIFT 6 +/* Reserved */ +#define PBS_UNIT_PCIE_MEM3_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_PCIE_MEM3_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** pcie_mem4_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_PCIE_MEM4_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_PCIE_MEM4_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_PCIE_MEM4_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_PCIE_MEM4_BAR_LOW_RSRVD_SHIFT 6 +/* Reserved */ +#define PBS_UNIT_PCIE_MEM4_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_PCIE_MEM4_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** pcie_mem5_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_PCIE_MEM5_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_PCIE_MEM5_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_PCIE_MEM5_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_PCIE_MEM5_BAR_LOW_RSRVD_SHIFT 6 +/* Reserved */ +#define PBS_UNIT_PCIE_MEM5_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_PCIE_MEM5_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** pcie_ext_ecam3_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_PCIE_EXT_ECAM3_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_PCIE_EXT_ECAM3_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_PCIE_EXT_ECAM3_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_PCIE_EXT_ECAM3_BAR_LOW_RSRVD_SHIFT 6 +/* Reserved */ +#define PBS_UNIT_PCIE_EXT_ECAM3_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_PCIE_EXT_ECAM3_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** pcie_ext_ecam4_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_PCIE_EXT_ECAM4_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_PCIE_EXT_ECAM4_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_PCIE_EXT_ECAM4_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_PCIE_EXT_ECAM4_BAR_LOW_RSRVD_SHIFT 6 +/* Reserved */ +#define PBS_UNIT_PCIE_EXT_ECAM4_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_PCIE_EXT_ECAM4_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** pcie_ext_ecam5_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_PCIE_EXT_ECAM5_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_PCIE_EXT_ECAM5_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_PCIE_EXT_ECAM5_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_PCIE_EXT_ECAM5_BAR_LOW_RSRVD_SHIFT 6 +/* Reserved */ +#define PBS_UNIT_PCIE_EXT_ECAM5_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_PCIE_EXT_ECAM5_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** low_latency_sram_bar_low register ****/ +/* Window size = 2 ^ (15 + win_size). Zero value: disable the window. */ +#define PBS_UNIT_LOW_LATENCY_SRAM_BAR_LOW_WIN_SIZE_MASK 0x0000003F +#define PBS_UNIT_LOW_LATENCY_SRAM_BAR_LOW_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_UNIT_LOW_LATENCY_SRAM_BAR_LOW_RSRVD_MASK 0x0000FFC0 +#define PBS_UNIT_LOW_LATENCY_SRAM_BAR_LOW_RSRVD_SHIFT 6 +/* Reserved */ +#define PBS_UNIT_LOW_LATENCY_SRAM_BAR_LOW_ADDR_HIGH_MASK 0xFFFF0000 +#define PBS_UNIT_LOW_LATENCY_SRAM_BAR_LOW_ADDR_HIGH_SHIFT 16 + +/**** pbs_sb2nb_cfg_dram_remap register ****/ +#define PBS_UNIT_SB2NB_REMAP_BASE_ADDR_SHIFT 5 +#define PBS_UNIT_SB2NB_REMAP_BASE_ADDR_MASK 0x0000FFE0 +#define PBS_UNIT_SB2NB_REMAP_TRANSL_BASE_ADDR_SHIFT 21 +#define PBS_UNIT_SB2NB_REMAP_TRANSL_BASE_ADDR_MASK 0xFFE00000 + +/* For remapping are used bits [39 - 29] of DRAM 40bit Physical address */ +#define PBS_UNIT_DRAM_SRC_REMAP_BASE_ADDR_SHIFT 29 +#define PBS_UNIT_DRAM_DST_REMAP_BASE_ADDR_SHIFT 29 +#define PBS_UNIT_DRAM_REMAP_BASE_ADDR_MASK 0xFFE0000000UL + + +/**** serdes_mux_eth register ****/ +/* + * 2'b01 - eth_a[0] from serdes_8 + * 2'b10 - eth_a[0] from serdes_14 + */ +#define PBS_UNIT_SERDES_MUX_ETH_PKR_SELECT_OH_ETH_A_0_MASK 0x00000003 +#define PBS_UNIT_SERDES_MUX_ETH_PKR_SELECT_OH_ETH_A_0_SHIFT 0 +/* + * 2'b01 - eth_b[0] from serdes_9 + * 2'b10 - eth_b[0] from serdes_13 + */ +#define PBS_UNIT_SERDES_MUX_ETH_PKR_SELECT_OH_ETH_B_0_MASK 0x00000030 +#define PBS_UNIT_SERDES_MUX_ETH_PKR_SELECT_OH_ETH_B_0_SHIFT 4 +/* + * 2'b01 - eth_c[0] from serdes_10 + * 2'b10 - eth_c[0] from serdes_12 + */ +#define PBS_UNIT_SERDES_MUX_ETH_PKR_SELECT_OH_ETH_C_0_MASK 0x00000300 +#define PBS_UNIT_SERDES_MUX_ETH_PKR_SELECT_OH_ETH_C_0_SHIFT 8 +/* + * 2'b01 - eth_d[0] from serdes_11 + * 2'b10 - eth_d[0] from serdes_15 + */ +#define PBS_UNIT_SERDES_MUX_ETH_PKR_SELECT_OH_ETH_D_0_MASK 0x00003000 +#define PBS_UNIT_SERDES_MUX_ETH_PKR_SELECT_OH_ETH_D_0_SHIFT 12 +/* which lane's is master clk */ +#define PBS_UNIT_SERDES_MUX_ETH_PKR_SELECT_OH_ETH_A_ICK_MASTER_MASK 0x00030000 +#define PBS_UNIT_SERDES_MUX_ETH_PKR_SELECT_OH_ETH_A_ICK_MASTER_SHIFT 16 +/* which lane's is master clk */ +#define PBS_UNIT_SERDES_MUX_ETH_PKR_SELECT_OH_ETH_C_ICK_MASTER_MASK 0x00300000 +#define PBS_UNIT_SERDES_MUX_ETH_PKR_SELECT_OH_ETH_C_ICK_MASTER_SHIFT 20 +/* enable xlaui on eth a */ +#define PBS_UNIT_SERDES_MUX_ETH_PKR_SELECT_OH_ETH_A_XLAUI_ENABLE (1 << 24) +/* enable xlaui on eth c */ +#define PBS_UNIT_SERDES_MUX_ETH_PKR_SELECT_OH_ETH_C_XLAUI_ENABLE (1 << 28) + +/**** serdes_mux_pcie register ****/ +/* + * 2'b01 - select pcie_b[0] from serdes 2 + * 2'b10 - select pcie_b[0] from serdes 4 + */ +#define PBS_UNIT_SERDES_MUX_PCIE_PKR_SELECT_OH_PCIE_B_0_MASK 0x00000003 +#define PBS_UNIT_SERDES_MUX_PCIE_PKR_SELECT_OH_PCIE_B_0_SHIFT 0 +/* + * 2'b01 - select pcie_b[1] from serdes 3 + * 2'b10 - select pcie_b[1] from serdes 5 + */ +#define PBS_UNIT_SERDES_MUX_PCIE_PKR_SELECT_OH_PCIE_B_1_MASK 0x00000030 +#define PBS_UNIT_SERDES_MUX_PCIE_PKR_SELECT_OH_PCIE_B_1_SHIFT 4 +/* + * 2'b01 - select pcie_d[0] from serdes 10 + * 2'b10 - select pcie_d[0] from serdes 12 + */ +#define PBS_UNIT_SERDES_MUX_PCIE_PKR_SELECT_OH_PCIE_D_0_MASK 0x00000300 +#define PBS_UNIT_SERDES_MUX_PCIE_PKR_SELECT_OH_PCIE_D_0_SHIFT 8 +/* + * 2'b01 - select pcie_d[1] from serdes 11 + * 2'b10 - select pcie_d[1] from serdes 13 + */ +#define PBS_UNIT_SERDES_MUX_PCIE_PKR_SELECT_OH_PCIE_D_1_MASK 0x00003000 +#define PBS_UNIT_SERDES_MUX_PCIE_PKR_SELECT_OH_PCIE_D_1_SHIFT 12 + +/**** serdes_mux_sata register ****/ +/* + * 2'b01 - select sata_a from serdes group 1 + * 2'b10 - select sata_a from serdes group 3 + */ +#define PBS_UNIT_SERDES_MUX_SATA_SELECT_OH_SATA_A_MASK 0x00000003 +#define PBS_UNIT_SERDES_MUX_SATA_SELECT_OH_SATA_A_SHIFT 0 +/* Reserved */ +#define PBS_UNIT_SERDES_MUX_SATA_RESERVED_3_2_MASK 0x0000000C +#define PBS_UNIT_SERDES_MUX_SATA_RESERVED_3_2_SHIFT 2 +/* Reserved */ +#define PBS_UNIT_SERDES_MUX_SATA_RESERVED_MASK 0xFFFFFFF0 +#define PBS_UNIT_SERDES_MUX_SATA_RESERVED_SHIFT 4 + +/**** bar1_orig register ****/ +/* + * Window size = 2 ^ (11 + win_size). + * Zero value: disable the window. + */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR1_ORIG_WIN_SIZE_MASK 0x00000007 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR1_ORIG_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR1_ORIG_RSRVD_MASK 0x00000FF8 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR1_ORIG_RSRVD_SHIFT 3 +/* + * offset within the SRAM, in resolution of 4KB. + * Only offsets which are inside the boundaries of the SRAM bar are allowed + */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR1_ORIG_ADDR_HIGH_MASK 0xFFFFF000 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR1_ORIG_ADDR_HIGH_SHIFT 12 + +/**** bar1_remap register ****/ +/* Reserved fields */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR1_REMAP_RSRVD_MASK 0x00000FFF +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR1_REMAP_RSRVD_SHIFT 0 +/* remapped address */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR1_REMAP_ADDR_HIGH_MASK 0xFFFFF000 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR1_REMAP_ADDR_HIGH_SHIFT 12 + +/**** bar2_orig register ****/ +/* + * Window size = 2 ^ (11 + win_size). + * Zero value: disable the window. + */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR2_ORIG_WIN_SIZE_MASK 0x00000007 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR2_ORIG_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR2_ORIG_RSRVD_MASK 0x00000FF8 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR2_ORIG_RSRVD_SHIFT 3 +/* + * offset within the SRAM, in resolution of 4KB. + * Only offsets which are inside the boundaries of the SRAM bar are allowed + */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR2_ORIG_ADDR_HIGH_MASK 0xFFFFF000 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR2_ORIG_ADDR_HIGH_SHIFT 12 + +/**** bar2_remap register ****/ +/* Reserved fields */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR2_REMAP_RSRVD_MASK 0x00000FFF +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR2_REMAP_RSRVD_SHIFT 0 +/* remapped address */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR2_REMAP_ADDR_HIGH_MASK 0xFFFFF000 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR2_REMAP_ADDR_HIGH_SHIFT 12 + +/**** bar3_orig register ****/ +/* + * Window size = 2 ^ (11 + win_size). + * Zero value: disable the window. + */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR3_ORIG_WIN_SIZE_MASK 0x00000007 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR3_ORIG_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR3_ORIG_RSRVD_MASK 0x00000FF8 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR3_ORIG_RSRVD_SHIFT 3 +/* + * offset within the SRAM, in resolution of 4KB. + * Only offsets which are inside the boundaries of the SRAM bar are allowed + */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR3_ORIG_ADDR_HIGH_MASK 0xFFFFF000 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR3_ORIG_ADDR_HIGH_SHIFT 12 + +/**** bar3_remap register ****/ +/* Reserved fields */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR3_REMAP_RSRVD_MASK 0x00000FFF +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR3_REMAP_RSRVD_SHIFT 0 +/* remapped address */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR3_REMAP_ADDR_HIGH_MASK 0xFFFFF000 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR3_REMAP_ADDR_HIGH_SHIFT 12 + +/**** bar4_orig register ****/ +/* + * Window size = 2 ^ (11 + win_size). + * Zero value: disable the window. + */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR4_ORIG_WIN_SIZE_MASK 0x00000007 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR4_ORIG_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR4_ORIG_RSRVD_MASK 0x00000FF8 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR4_ORIG_RSRVD_SHIFT 3 +/* + * offset within the SRAM, in resolution of 4KB. + * Only offsets which are inside the boundaries of the SRAM bar are allowed + */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR4_ORIG_ADDR_HIGH_MASK 0xFFFFF000 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR4_ORIG_ADDR_HIGH_SHIFT 12 + +/**** bar4_remap register ****/ +/* Reserved fields */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR4_REMAP_RSRVD_MASK 0x00000FFF +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR4_REMAP_RSRVD_SHIFT 0 +/* remapped address */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR4_REMAP_ADDR_HIGH_MASK 0xFFFFF000 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR4_REMAP_ADDR_HIGH_SHIFT 12 + +/**** bar5_orig register ****/ +/* + * Window size = 2 ^ (11 + win_size). + * Zero value: disable the window. + */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR5_ORIG_WIN_SIZE_MASK 0x00000007 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR5_ORIG_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR5_ORIG_RSRVD_MASK 0x00000FF8 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR5_ORIG_RSRVD_SHIFT 3 +/* + * offset within the SRAM, in resolution of 4KB. + * Only offsets which are inside the boundaries of the SRAM bar are allowed + */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR5_ORIG_ADDR_HIGH_MASK 0xFFFFF000 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR5_ORIG_ADDR_HIGH_SHIFT 12 + +/**** bar5_remap register ****/ +/* Reserved fields */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR5_REMAP_RSRVD_MASK 0x00000FFF +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR5_REMAP_RSRVD_SHIFT 0 +/* remapped address */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR5_REMAP_ADDR_HIGH_MASK 0xFFFFF000 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR5_REMAP_ADDR_HIGH_SHIFT 12 + +/**** bar6_orig register ****/ +/* + * Window size = 2 ^ (11 + win_size). + * Zero value: disable the window. + */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR6_ORIG_WIN_SIZE_MASK 0x00000007 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR6_ORIG_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR6_ORIG_RSRVD_MASK 0x00000FF8 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR6_ORIG_RSRVD_SHIFT 3 +/* + * offset within the SRAM, in resolution of 4KB. + * Only offsets which are inside the boundaries of the SRAM bar are allowed + */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR6_ORIG_ADDR_HIGH_MASK 0xFFFFF000 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR6_ORIG_ADDR_HIGH_SHIFT 12 + +/**** bar6_remap register ****/ +/* Reserved fields */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR6_REMAP_RSRVD_MASK 0x00000FFF +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR6_REMAP_RSRVD_SHIFT 0 +/* remapped address */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR6_REMAP_ADDR_HIGH_MASK 0xFFFFF000 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR6_REMAP_ADDR_HIGH_SHIFT 12 + +/**** bar7_orig register ****/ +/* + * Window size = 2 ^ (11 + win_size). + * Zero value: disable the window. + */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR7_ORIG_WIN_SIZE_MASK 0x00000007 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR7_ORIG_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR7_ORIG_RSRVD_MASK 0x00000FF8 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR7_ORIG_RSRVD_SHIFT 3 +/* + * offset within the SRAM, in resolution of 4KB. + * Only offsets which are inside the boundaries of the SRAM bar are allowed + */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR7_ORIG_ADDR_HIGH_MASK 0xFFFFF000 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR7_ORIG_ADDR_HIGH_SHIFT 12 + +/**** bar7_remap register ****/ +/* Reserved fields */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR7_REMAP_RSRVD_MASK 0x00000FFF +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR7_REMAP_RSRVD_SHIFT 0 +/* remapped address */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR7_REMAP_ADDR_HIGH_MASK 0xFFFFF000 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR7_REMAP_ADDR_HIGH_SHIFT 12 + +/**** bar8_orig register ****/ +/* + * Window size = 2 ^ (11 + win_size). + * Zero value: disable the window. + */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR8_ORIG_WIN_SIZE_MASK 0x00000007 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR8_ORIG_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR8_ORIG_RSRVD_MASK 0x00000FF8 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR8_ORIG_RSRVD_SHIFT 3 +/* + * offset within the SRAM, in resolution of 4KB. + * Only offsets which are inside the boundaries of the SRAM bar are allowed + */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR8_ORIG_ADDR_HIGH_MASK 0xFFFFF000 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR8_ORIG_ADDR_HIGH_SHIFT 12 + +/**** bar8_remap register ****/ +/* Reserved fields */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR8_REMAP_RSRVD_MASK 0x00000FFF +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR8_REMAP_RSRVD_SHIFT 0 +/* remapped address */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR8_REMAP_ADDR_HIGH_MASK 0xFFFFF000 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR8_REMAP_ADDR_HIGH_SHIFT 12 + +/**** bar9_orig register ****/ +/* + * Window size = 2 ^ (11 + win_size). + * Zero value: disable the window. + */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR9_ORIG_WIN_SIZE_MASK 0x00000007 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR9_ORIG_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR9_ORIG_RSRVD_MASK 0x00000FF8 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR9_ORIG_RSRVD_SHIFT 3 +/* + * offset within the SRAM, in resolution of 4KB. + * Only offsets which are inside the boundaries of the SRAM bar are allowed + */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR9_ORIG_ADDR_HIGH_MASK 0xFFFFF000 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR9_ORIG_ADDR_HIGH_SHIFT 12 + +/**** bar9_remap register ****/ +/* Reserved fields */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR9_REMAP_RSRVD_MASK 0x00000FFF +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR9_REMAP_RSRVD_SHIFT 0 +/* remapped address */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR9_REMAP_ADDR_HIGH_MASK 0xFFFFF000 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR9_REMAP_ADDR_HIGH_SHIFT 12 + +/**** bar10_orig register ****/ +/* + * Window size = 2 ^ (11 + win_size). + * Zero value: disable the window. + */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR10_ORIG_WIN_SIZE_MASK 0x00000007 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR10_ORIG_WIN_SIZE_SHIFT 0 +/* Reserved fields */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR10_ORIG_RSRVD_MASK 0x00000FF8 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR10_ORIG_RSRVD_SHIFT 3 +/* + * offset within the SRAM, in resolution of 4KB. + * Only offsets which are inside the boundaries of the SRAM bar are allowed + */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR10_ORIG_ADDR_HIGH_MASK 0xFFFFF000 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR10_ORIG_ADDR_HIGH_SHIFT 12 + +/**** bar10_remap register ****/ +/* Reserved fields */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR10_REMAP_RSRVD_MASK 0x00000FFF +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR10_REMAP_RSRVD_SHIFT 0 +/* remapped address */ +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR10_REMAP_ADDR_HIGH_MASK 0xFFFFF000 +#define PBS_LOW_LATENCY_SRAM_REMAP_BAR10_REMAP_ADDR_HIGH_SHIFT 12 + +/**** cpu register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_CPU_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_CPU_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_CPU_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_CPU_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_CPU_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_CPU_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_CPU_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_CPU_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_CPU_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_CPU_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_CPU_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_CPU_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_CPU_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_CPU_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_CPU_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_CPU_DRAM_SHIFT 28 + +/**** cpu_mask register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_CPU_MASK_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_CPU_MASK_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_CPU_MASK_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_CPU_MASK_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_CPU_MASK_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_CPU_MASK_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_CPU_MASK_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_CPU_MASK_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_CPU_MASK_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_CPU_MASK_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_CPU_MASK_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_CPU_MASK_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_CPU_MASK_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_CPU_MASK_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_CPU_MASK_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_CPU_MASK_DRAM_SHIFT 28 + +/**** debug_nb register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_DRAM_SHIFT 28 + +/**** debug_nb_mask register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_MASK_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_MASK_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_MASK_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_MASK_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_MASK_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_MASK_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_MASK_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_MASK_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_MASK_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_MASK_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_MASK_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_MASK_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_MASK_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_MASK_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_MASK_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_NB_MASK_DRAM_SHIFT 28 + +/**** debug_sb register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_DRAM_SHIFT 28 + +/**** debug_sb_mask register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_MASK_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_MASK_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_MASK_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_MASK_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_MASK_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_MASK_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_MASK_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_MASK_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_MASK_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_MASK_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_MASK_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_MASK_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_MASK_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_MASK_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_MASK_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_DEBUG_SB_MASK_DRAM_SHIFT 28 + +/**** eth_0 register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_DRAM_SHIFT 28 + +/**** eth_0_mask register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_MASK_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_MASK_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_MASK_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_MASK_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_MASK_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_MASK_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_MASK_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_MASK_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_MASK_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_MASK_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_MASK_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_MASK_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_MASK_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_MASK_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_MASK_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_0_MASK_DRAM_SHIFT 28 + +/**** eth_1 register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_DRAM_SHIFT 28 + +/**** eth_1_mask register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_MASK_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_MASK_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_MASK_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_MASK_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_MASK_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_MASK_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_MASK_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_MASK_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_MASK_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_MASK_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_MASK_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_MASK_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_MASK_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_MASK_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_MASK_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_1_MASK_DRAM_SHIFT 28 + +/**** eth_2 register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_DRAM_SHIFT 28 + +/**** eth_2_mask register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_MASK_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_MASK_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_MASK_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_MASK_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_MASK_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_MASK_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_MASK_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_MASK_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_MASK_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_MASK_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_MASK_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_MASK_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_MASK_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_MASK_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_MASK_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_2_MASK_DRAM_SHIFT 28 + +/**** eth_3 register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_DRAM_SHIFT 28 + +/**** eth_3_mask register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_MASK_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_MASK_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_MASK_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_MASK_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_MASK_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_MASK_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_MASK_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_MASK_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_MASK_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_MASK_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_MASK_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_MASK_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_MASK_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_MASK_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_MASK_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_ETH_3_MASK_DRAM_SHIFT 28 + +/**** sata_0 register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_DRAM_SHIFT 28 + +/**** sata_0_mask register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_MASK_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_MASK_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_MASK_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_MASK_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_MASK_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_MASK_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_MASK_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_MASK_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_MASK_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_MASK_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_MASK_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_MASK_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_MASK_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_MASK_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_MASK_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_0_MASK_DRAM_SHIFT 28 + +/**** sata_1 register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_DRAM_SHIFT 28 + +/**** sata_1_mask register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_MASK_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_MASK_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_MASK_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_MASK_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_MASK_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_MASK_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_MASK_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_MASK_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_MASK_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_MASK_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_MASK_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_MASK_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_MASK_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_MASK_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_MASK_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_SATA_1_MASK_DRAM_SHIFT 28 + +/**** crypto_0 register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_DRAM_SHIFT 28 + +/**** crypto_0_mask register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_MASK_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_MASK_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_MASK_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_MASK_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_MASK_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_MASK_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_MASK_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_MASK_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_MASK_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_MASK_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_MASK_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_MASK_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_MASK_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_MASK_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_MASK_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_0_MASK_DRAM_SHIFT 28 + +/**** crypto_1 register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_DRAM_SHIFT 28 + +/**** crypto_1_mask register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_MASK_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_MASK_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_MASK_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_MASK_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_MASK_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_MASK_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_MASK_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_MASK_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_MASK_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_MASK_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_MASK_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_MASK_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_MASK_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_MASK_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_MASK_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_CRYPTO_1_MASK_DRAM_SHIFT 28 + +/**** pcie_0 register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_DRAM_SHIFT 28 + +/**** pcie_0_mask register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_MASK_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_MASK_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_MASK_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_MASK_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_MASK_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_MASK_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_MASK_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_MASK_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_MASK_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_MASK_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_MASK_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_MASK_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_MASK_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_MASK_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_MASK_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_0_MASK_DRAM_SHIFT 28 + +/**** pcie_1 register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_DRAM_SHIFT 28 + +/**** pcie_1_mask register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_MASK_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_MASK_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_MASK_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_MASK_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_MASK_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_MASK_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_MASK_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_MASK_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_MASK_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_MASK_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_MASK_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_MASK_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_MASK_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_MASK_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_MASK_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_1_MASK_DRAM_SHIFT 28 + +/**** pcie_2 register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_DRAM_SHIFT 28 + +/**** pcie_2_mask register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_MASK_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_MASK_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_MASK_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_MASK_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_MASK_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_MASK_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_MASK_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_MASK_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_MASK_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_MASK_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_MASK_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_MASK_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_MASK_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_MASK_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_MASK_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_2_MASK_DRAM_SHIFT 28 + +/**** pcie_3 register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_DRAM_SHIFT 28 + +/**** pcie_3_mask register ****/ +/* map transactions according to address decoding */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_MASK_NO_ENFORCEMENT_MASK 0x0000000F +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_MASK_NO_ENFORCEMENT_SHIFT 0 +/* map transactions to pcie_0 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_MASK_PCIE_0_MASK 0x000000F0 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_MASK_PCIE_0_SHIFT 4 +/* map transactions to pcie_1 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_MASK_PCIE_1_MASK 0x00000F00 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_MASK_PCIE_1_SHIFT 8 +/* map transactions to pcie_2 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_MASK_PCIE_2_MASK 0x0000F000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_MASK_PCIE_2_SHIFT 12 +/* map transactions to pcie_3 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_MASK_PCIE_3_MASK 0x000F0000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_MASK_PCIE_3_SHIFT 16 +/* map transactions to pcie_4 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_MASK_PCIE_4_MASK 0x00F00000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_MASK_PCIE_4_SHIFT 20 +/* map transactions to pcie_5 */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_MASK_PCIE_5_MASK 0x0F000000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_MASK_PCIE_5_SHIFT 24 +/* map transactions to dram */ +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_MASK_DRAM_MASK 0xF0000000 +#define PBS_TARGET_ID_ENFORCEMENT_PCIE_3_MASK_DRAM_SHIFT 28 + +/**** latch register ****/ +/* + * Software clears this bit before any bar update, and set it after all bars + * updated. + */ +#define PBS_TARGET_ID_ENFORCEMENT_LATCH_ENABLE (1 << 0) + +#ifdef __cplusplus +} +#endif + +#endif /* __AL_HAL_PBS_REGS_H__ */ + +/** @} end of ... group */ + + diff --git a/sys/arm/annapurna/alpine/hal/al_hal_pcie.c b/sys/arm/annapurna/alpine/hal/al_hal_pcie.c new file mode 100644 index 000000000000..3a221d365732 --- /dev/null +++ b/sys/arm/annapurna/alpine/hal/al_hal_pcie.c @@ -0,0 +1,2788 @@ +/*- +******************************************************************************** +Copyright (C) 2015 Annapurna Labs Ltd. + +This file may be licensed under the terms of the Annapurna Labs Commercial +License Agreement. + +Alternatively, this file can be distributed under the terms of the GNU General +Public License V2 as published by the Free Software Foundation and can be +found at http://www.gnu.org/licenses/gpl-2.0.html + +Alternatively, redistribution and use in source and binary forms, with or +without modification, are permitted provided that the following conditions are +met: + + * Redistributions of source code must retain the above copyright notice, +this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright +notice, this list of conditions and the following disclaimer in +the documentation and/or other materials provided with the +distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include + +#include "al_hal_pcie.h" +#include "al_hal_pbs_regs.h" +#include "al_hal_unit_adapter_regs.h" + +/** + * Parameter definitions + */ +#define AL_PCIE_AXI_REGS_OFFSET 0x0 + +#define AL_PCIE_LTSSM_STATE_L0 0x11 +#define AL_PCIE_LTSSM_STATE_L0S 0x12 +#define AL_PCIE_DEVCTL_PAYLOAD_128B 0x00 +#define AL_PCIE_DEVCTL_PAYLOAD_256B 0x20 + +#define AL_PCIE_SECBUS_DEFAULT 0x1 +#define AL_PCIE_SUBBUS_DEFAULT 0x1 +#define AL_PCIE_LINKUP_WAIT_INTERVAL 50 /* measured in usec */ +#define AL_PCIE_LINKUP_WAIT_INTERVALS_PER_SEC 20 + +#define AL_PCIE_LINKUP_RETRIES 8 + +#define AL_PCIE_MAX_32_MEMORY_BAR_SIZE (0x100000000ULL) +#define AL_PCIE_MIN_MEMORY_BAR_SIZE (1 << 12) +#define AL_PCIE_MIN_IO_BAR_SIZE (1 << 8) + +/** + * inbound header credits and outstanding outbound reads defaults + */ +/** RC - Revisions 1/2 */ +#define AL_PCIE_REV_1_2_RC_OB_OS_READS_DEFAULT (8) +#define AL_PCIE_REV_1_2_RC_NOF_CPL_HDR_DEFAULT (41) +#define AL_PCIE_REV_1_2_RC_NOF_NP_HDR_DEFAULT (25) +#define AL_PCIE_REV_1_2_RC_NOF_P_HDR_DEFAULT (31) +/** EP - Revisions 1/2 */ +#define AL_PCIE_REV_1_2_EP_OB_OS_READS_DEFAULT (15) +#define AL_PCIE_REV_1_2_EP_NOF_CPL_HDR_DEFAULT (76) +#define AL_PCIE_REV_1_2_EP_NOF_NP_HDR_DEFAULT (6) +#define AL_PCIE_REV_1_2_EP_NOF_P_HDR_DEFAULT (15) +/** RC - Revision 3 */ +#define AL_PCIE_REV_3_RC_OB_OS_READS_DEFAULT (32) +#define AL_PCIE_REV_3_RC_NOF_CPL_HDR_DEFAULT (161) +#define AL_PCIE_REV_3_RC_NOF_NP_HDR_DEFAULT (38) +#define AL_PCIE_REV_3_RC_NOF_P_HDR_DEFAULT (60) +/** EP - Revision 3 */ +#define AL_PCIE_REV_3_EP_OB_OS_READS_DEFAULT (32) +#define AL_PCIE_REV_3_EP_NOF_CPL_HDR_DEFAULT (161) +#define AL_PCIE_REV_3_EP_NOF_NP_HDR_DEFAULT (38) +#define AL_PCIE_REV_3_EP_NOF_P_HDR_DEFAULT (60) + +/** + * MACROS + */ +#define AL_PCIE_PARSE_LANES(v) (((1 << v) - 1) << \ + PCIE_REVX_AXI_MISC_PCIE_GLOBAL_CONF_NOF_ACT_LANES_SHIFT) + +/** + * Static functions + */ +static void +al_pcie_port_wr_to_ro_set(struct al_pcie_port *pcie_port, al_bool enable) +{ + /* when disabling writes to RO, make sure any previous writes to + * config space were committed + */ + if (enable == AL_FALSE) + al_local_data_memory_barrier(); + + al_reg_write32(&pcie_port->regs->port_regs->rd_only_wr_en, + (enable == AL_TRUE) ? 1 : 0); + + /* when enabling writes to RO, make sure it is committed before trying + * to write to RO config space + */ + if (enable == AL_TRUE) + al_local_data_memory_barrier(); +} + +/** helper function to access dbi_cs2 registers */ +static void +al_reg_write32_dbi_cs2( + struct al_pcie_port *pcie_port, + uint32_t *offset, + uint32_t val) +{ + uintptr_t cs2_bit = + (pcie_port->rev_id == AL_PCIE_REV_ID_3) ? 0x4000 : 0x1000; + + al_reg_write32((uint32_t *)((uintptr_t)offset | cs2_bit), val); +} + +static unsigned int +al_pcie_speed_gen_code(enum al_pcie_link_speed speed) +{ + if (speed == AL_PCIE_LINK_SPEED_GEN1) + return 1; + if (speed == AL_PCIE_LINK_SPEED_GEN2) + return 2; + if (speed == AL_PCIE_LINK_SPEED_GEN3) + return 3; + /* must not be reached */ + return 0; +} + +static inline void +al_pcie_port_link_speed_ctrl_set( + struct al_pcie_port *pcie_port, + enum al_pcie_link_speed max_speed) +{ + struct al_pcie_regs *regs = pcie_port->regs; + + al_pcie_port_wr_to_ro_set(pcie_port, AL_TRUE); + + if (max_speed != AL_PCIE_LINK_SPEED_DEFAULT) { + uint16_t max_speed_val = (uint16_t)al_pcie_speed_gen_code(max_speed); + al_reg_write32_masked( + (uint32_t __iomem *)(regs->core_space[0].pcie_link_cap_base), + 0xF, max_speed_val); + al_reg_write32_masked( + (uint32_t __iomem *)(regs->core_space[0].pcie_cap_base + + (AL_PCI_EXP_LNKCTL2 >> 2)), + 0xF, max_speed_val); + } + + al_pcie_port_wr_to_ro_set(pcie_port, AL_FALSE); +} + +static int +al_pcie_port_link_config( + struct al_pcie_port *pcie_port, + const struct al_pcie_link_params *link_params) +{ + struct al_pcie_regs *regs = pcie_port->regs; + uint8_t max_lanes = pcie_port->max_lanes; + + if ((link_params->max_payload_size != AL_PCIE_MPS_DEFAULT) && + (link_params->max_payload_size != AL_PCIE_MPS_128) && + (link_params->max_payload_size != AL_PCIE_MPS_256)) { + al_err("PCIe %d: unsupported Max Payload Size (%u)\n", + pcie_port->port_id, link_params->max_payload_size); + return -EINVAL; + } + + al_dbg("PCIe %d: link config: max speed gen %d, max lanes %d, reversal %s\n", + pcie_port->port_id, link_params->max_speed, + pcie_port->max_lanes, link_params->enable_reversal? "enable" : "disable"); + + al_pcie_port_link_speed_ctrl_set(pcie_port, link_params->max_speed); + + /* Change Max Payload Size, if needed. + * The Max Payload Size is only valid for PF0. + */ + if (link_params->max_payload_size != AL_PCIE_MPS_DEFAULT) + al_reg_write32_masked(regs->core_space[0].pcie_dev_ctrl_status, + PCIE_PORT_DEV_CTRL_STATUS_MPS_MASK, + link_params->max_payload_size << + PCIE_PORT_DEV_CTRL_STATUS_MPS_SHIFT); + + /** Snap from PCIe core spec: + * Link Mode Enable. Sets the number of lanes in the link that you want + * to connect to the link partner. When you have unused lanes in your + * system, then you must change the value in this register to reflect + * the number of lanes. You must also change the value in the + * "Predetermined Number of Lanes" field of the "Link Width and Speed + * Change Control Register". + * 000001: x1 + * 000011: x2 + * 000111: x4 + * 001111: x8 + * 011111: x16 + * 111111: x32 (not supported) + */ + al_reg_write32_masked(®s->port_regs->gen2_ctrl, + PCIE_PORT_GEN2_CTRL_NUM_OF_LANES_MASK, + max_lanes << PCIE_PORT_GEN2_CTRL_NUM_OF_LANES_SHIFT); + al_reg_write32_masked(®s->port_regs->port_link_ctrl, + PCIE_PORT_LINK_CTRL_LINK_CAPABLE_MASK, + (max_lanes + (max_lanes-1)) + << PCIE_PORT_LINK_CTRL_LINK_CAPABLE_SHIFT); + + /* TODO: add support for reversal mode */ + if (link_params->enable_reversal) { + al_err("PCIe %d: enabling reversal mode not implemented\n", + pcie_port->port_id); + return -ENOSYS; + } + return 0; +} + +static void +al_pcie_port_ram_parity_int_config( + struct al_pcie_port *pcie_port, + al_bool enable) +{ + struct al_pcie_regs *regs = pcie_port->regs; + + al_reg_write32(®s->app.parity->en_core, + (enable == AL_TRUE) ? 0xffffffff : 0x0); + + al_reg_write32_masked(®s->app.int_grp_b->mask, + PCIE_W_INT_GRP_B_CAUSE_B_PARITY_ERROR_CORE, + (enable != AL_TRUE) ? + PCIE_W_INT_GRP_B_CAUSE_B_PARITY_ERROR_CORE : 0); + +} + +static void +al_pcie_port_axi_parity_int_config( + struct al_pcie_port *pcie_port, + al_bool enable) +{ + struct al_pcie_regs *regs = pcie_port->regs; + uint32_t parity_enable_mask = 0xffffffff; + + /** + * Addressing RMN: 5603 + * + * RMN description: + * u4_ram2p signal false parity error + * + * Software flow: + * Disable parity check for this memory + */ + if (pcie_port->rev_id >= AL_PCIE_REV_ID_3) + parity_enable_mask &= ~PCIE_AXI_PARITY_EN_AXI_U4_RAM2P; + + al_reg_write32(regs->axi.parity.en_axi, + (enable == AL_TRUE) ? parity_enable_mask : 0x0); + + if (pcie_port->rev_id == AL_PCIE_REV_ID_3) { + al_reg_write32_masked(regs->axi.ctrl.global, + PCIE_REV3_AXI_CTRL_GLOBAL_PARITY_CALC_EN_MSTR | + PCIE_REV3_AXI_CTRL_GLOBAL_PARITY_ERR_EN_RD | + PCIE_REV3_AXI_CTRL_GLOBAL_PARITY_CALC_EN_SLV | + PCIE_REV3_AXI_CTRL_GLOBAL_PARITY_ERR_EN_WR, + (enable == AL_TRUE) ? + PCIE_REV3_AXI_CTRL_GLOBAL_PARITY_CALC_EN_MSTR | + PCIE_REV3_AXI_CTRL_GLOBAL_PARITY_ERR_EN_RD | + PCIE_REV3_AXI_CTRL_GLOBAL_PARITY_CALC_EN_SLV | + PCIE_REV3_AXI_CTRL_GLOBAL_PARITY_ERR_EN_WR : + PCIE_REV3_AXI_CTRL_GLOBAL_PARITY_CALC_EN_SLV); + } else { + al_reg_write32_masked(regs->axi.ctrl.global, + PCIE_REV1_2_AXI_CTRL_GLOBAL_PARITY_CALC_EN_MSTR | + PCIE_REV1_2_AXI_CTRL_GLOBAL_PARITY_ERR_EN_RD | + PCIE_REV1_2_AXI_CTRL_GLOBAL_PARITY_CALC_EN_SLV | + PCIE_REV1_2_AXI_CTRL_GLOBAL_PARITY_ERR_EN_WR, + (enable == AL_TRUE) ? + PCIE_REV1_2_AXI_CTRL_GLOBAL_PARITY_CALC_EN_MSTR | + PCIE_REV1_2_AXI_CTRL_GLOBAL_PARITY_ERR_EN_RD | + PCIE_REV1_2_AXI_CTRL_GLOBAL_PARITY_CALC_EN_SLV | + PCIE_REV1_2_AXI_CTRL_GLOBAL_PARITY_ERR_EN_WR : + PCIE_REV1_2_AXI_CTRL_GLOBAL_PARITY_CALC_EN_SLV); + } + + al_reg_write32_masked(®s->axi.int_grp_a->mask, + PCIE_AXI_INT_GRP_A_CAUSE_PARITY_ERR_DATA_PATH_RD | + PCIE_AXI_INT_GRP_A_CAUSE_PARITY_ERR_OUT_ADDR_RD | + PCIE_AXI_INT_GRP_A_CAUSE_PARITY_ERR_OUT_ADDR_WR | + PCIE_AXI_INT_GRP_A_CAUSE_PARITY_ERR_OUT_DATA_WR | + PCIE_AXI_INT_GRP_A_CAUSE_PARITY_ERROR_AXI, + (enable != AL_TRUE) ? + (PCIE_AXI_INT_GRP_A_CAUSE_PARITY_ERR_DATA_PATH_RD | + PCIE_AXI_INT_GRP_A_CAUSE_PARITY_ERR_OUT_ADDR_RD | + PCIE_AXI_INT_GRP_A_CAUSE_PARITY_ERR_OUT_ADDR_WR | + PCIE_AXI_INT_GRP_A_CAUSE_PARITY_ERR_OUT_DATA_WR | + PCIE_AXI_INT_GRP_A_CAUSE_PARITY_ERROR_AXI) : 0); +} + +static void +al_pcie_port_relaxed_pcie_ordering_config( + struct al_pcie_port *pcie_port, + struct al_pcie_relaxed_ordering_params *relaxed_ordering_params) +{ + struct al_pcie_regs *regs = pcie_port->regs; + enum al_pcie_operating_mode op_mode = al_pcie_operating_mode_get(pcie_port); + /** + * Default: + * - RC: Rx relaxed ordering only + * - EP: TX relaxed ordering only + */ + al_bool tx_relaxed_ordering = (op_mode == AL_PCIE_OPERATING_MODE_RC ? AL_FALSE : AL_TRUE); + al_bool rx_relaxed_ordering = (op_mode == AL_PCIE_OPERATING_MODE_RC ? AL_TRUE : AL_FALSE); + + if (relaxed_ordering_params) { + tx_relaxed_ordering = relaxed_ordering_params->enable_tx_relaxed_ordering; + rx_relaxed_ordering = relaxed_ordering_params->enable_rx_relaxed_ordering; + } + + /** PCIe ordering: + * - disable outbound completion must be stalled behind outbound write + * ordering rule enforcement is disabled for root-port + * - disables read completion on the master port push slave writes for end-point + */ + al_reg_write32_masked( + regs->axi.ordering.pos_cntl, + PCIE_AXI_POS_ORDER_BYPASS_CMPL_AFTER_WR_FIX | + PCIE_AXI_POS_ORDER_EP_CMPL_AFTER_WR_DIS | + PCIE_AXI_POS_ORDER_EP_CMPL_AFTER_WR_SUPPORT_INTERLV_DIS | + PCIE_AXI_POS_ORDER_SEGMENT_BUFFER_DONT_WAIT_FOR_P_WRITES, + (tx_relaxed_ordering ? + (PCIE_AXI_POS_ORDER_BYPASS_CMPL_AFTER_WR_FIX | + PCIE_AXI_POS_ORDER_SEGMENT_BUFFER_DONT_WAIT_FOR_P_WRITES) : 0) | + (rx_relaxed_ordering ? + (PCIE_AXI_POS_ORDER_EP_CMPL_AFTER_WR_DIS | + PCIE_AXI_POS_ORDER_EP_CMPL_AFTER_WR_SUPPORT_INTERLV_DIS) : 0)); +} + +static int +al_pcie_rev_id_get( + void __iomem *pbs_reg_base, + void __iomem *pcie_reg_base) +{ + uint32_t chip_id; + uint16_t chip_id_dev; + uint8_t rev_id; + struct al_pbs_regs *pbs_regs = pbs_reg_base; + + /* get revision ID from PBS' chip_id register */ + chip_id = al_reg_read32(&pbs_regs->unit.chip_id); + chip_id_dev = AL_REG_FIELD_GET(chip_id, + PBS_UNIT_CHIP_ID_DEV_ID_MASK, + PBS_UNIT_CHIP_ID_DEV_ID_SHIFT); + + if (chip_id_dev == PBS_UNIT_CHIP_ID_DEV_ID_ALPINE) { + rev_id = AL_REG_FIELD_GET( + chip_id, + PBS_UNIT_CHIP_ID_DEV_REV_ID_MASK, + PBS_UNIT_CHIP_ID_DEV_REV_ID_SHIFT); + } else if (chip_id_dev == PBS_UNIT_CHIP_ID_DEV_ID_PEAKROCK) { + struct al_pcie_revx_regs __iomem *regs = + (struct al_pcie_revx_regs __iomem *)pcie_reg_base; + uint32_t dev_id; + + dev_id = al_reg_read32(®s->axi.device_id.device_rev_id) & + PCIE_AXI_DEVICE_ID_REG_DEV_ID_MASK; + if (dev_id == PCIE_AXI_DEVICE_ID_REG_DEV_ID_X4) { + rev_id = AL_PCIE_REV_ID_2; + } else if (dev_id == PCIE_AXI_DEVICE_ID_REG_DEV_ID_X8) { + rev_id = AL_PCIE_REV_ID_3; + } else { + al_warn("%s: Revision ID is unknown\n", + __func__); + return -EINVAL; + } + } else { + al_warn("%s: Revision ID is unknown\n", + __func__); + return -EINVAL; + } + return rev_id; +} + +static int +al_pcie_port_lat_rply_timers_config( + struct al_pcie_port *pcie_port, + const struct al_pcie_latency_replay_timers *lat_rply_timers) +{ + struct al_pcie_regs *regs = pcie_port->regs; + uint32_t reg = 0; + + AL_REG_FIELD_SET(reg, 0xFFFF, 0, lat_rply_timers->round_trip_lat_limit); + AL_REG_FIELD_SET(reg, 0xFFFF0000, 16, lat_rply_timers->replay_timer_limit); + + al_reg_write32(®s->port_regs->ack_lat_rply_timer, reg); + return 0; +} + +static void +al_pcie_ib_hcrd_os_ob_reads_config_default( + struct al_pcie_port *pcie_port) +{ + + struct al_pcie_ib_hcrd_os_ob_reads_config ib_hcrd_os_ob_reads_config; + + switch (al_pcie_operating_mode_get(pcie_port)) { + case AL_PCIE_OPERATING_MODE_RC: + if (pcie_port->rev_id == AL_PCIE_REV_ID_3) { + ib_hcrd_os_ob_reads_config.nof_outstanding_ob_reads = + AL_PCIE_REV_3_RC_OB_OS_READS_DEFAULT; + ib_hcrd_os_ob_reads_config.nof_cpl_hdr = + AL_PCIE_REV_3_RC_NOF_CPL_HDR_DEFAULT; + ib_hcrd_os_ob_reads_config.nof_np_hdr = + AL_PCIE_REV_3_RC_NOF_NP_HDR_DEFAULT; + ib_hcrd_os_ob_reads_config.nof_p_hdr = + AL_PCIE_REV_3_RC_NOF_P_HDR_DEFAULT; + } else { + ib_hcrd_os_ob_reads_config.nof_outstanding_ob_reads = + AL_PCIE_REV_1_2_RC_OB_OS_READS_DEFAULT; + ib_hcrd_os_ob_reads_config.nof_cpl_hdr = + AL_PCIE_REV_1_2_RC_NOF_CPL_HDR_DEFAULT; + ib_hcrd_os_ob_reads_config.nof_np_hdr = + AL_PCIE_REV_1_2_RC_NOF_NP_HDR_DEFAULT; + ib_hcrd_os_ob_reads_config.nof_p_hdr = + AL_PCIE_REV_1_2_RC_NOF_P_HDR_DEFAULT; + } + break; + + case AL_PCIE_OPERATING_MODE_EP: + if (pcie_port->rev_id == AL_PCIE_REV_ID_3) { + ib_hcrd_os_ob_reads_config.nof_outstanding_ob_reads = + AL_PCIE_REV_3_EP_OB_OS_READS_DEFAULT; + ib_hcrd_os_ob_reads_config.nof_cpl_hdr = + AL_PCIE_REV_3_EP_NOF_CPL_HDR_DEFAULT; + ib_hcrd_os_ob_reads_config.nof_np_hdr = + AL_PCIE_REV_3_EP_NOF_NP_HDR_DEFAULT; + ib_hcrd_os_ob_reads_config.nof_p_hdr = + AL_PCIE_REV_3_EP_NOF_P_HDR_DEFAULT; + } else { + ib_hcrd_os_ob_reads_config.nof_outstanding_ob_reads = + AL_PCIE_REV_1_2_EP_OB_OS_READS_DEFAULT; + ib_hcrd_os_ob_reads_config.nof_cpl_hdr = + AL_PCIE_REV_1_2_EP_NOF_CPL_HDR_DEFAULT; + ib_hcrd_os_ob_reads_config.nof_np_hdr = + AL_PCIE_REV_1_2_EP_NOF_NP_HDR_DEFAULT; + ib_hcrd_os_ob_reads_config.nof_p_hdr = + AL_PCIE_REV_1_2_EP_NOF_P_HDR_DEFAULT; + } + break; + + default: + al_err("PCIe %d: outstanding outbound transactions could not be configured - unknown operating mode\n", + pcie_port->port_id); + al_assert(0); + } + + al_pcie_port_ib_hcrd_os_ob_reads_config(pcie_port, &ib_hcrd_os_ob_reads_config); +}; + +/** return AL_TRUE is link started (LTSSM enabled) and AL_FALSE otherwise */ +static al_bool +al_pcie_is_link_started(struct al_pcie_port *pcie_port) +{ + struct al_pcie_regs *regs = (struct al_pcie_regs *)pcie_port->regs; + + uint32_t port_init = al_reg_read32(regs->app.global_ctrl.port_init); + uint8_t ltssm_en = AL_REG_FIELD_GET(port_init, + PCIE_W_GLOBAL_CTRL_PORT_INIT_APP_LTSSM_EN_MASK, + PCIE_W_GLOBAL_CTRL_PORT_INIT_APP_LTSSM_EN_SHIFT); + + return ltssm_en; +} + +/** return AL_TRUE if link is up, AL_FALSE otherwise */ +static al_bool +al_pcie_check_link( + struct al_pcie_port *pcie_port, + uint8_t *ltssm_ret) +{ + struct al_pcie_regs *regs = (struct al_pcie_regs *)pcie_port->regs; + uint32_t info_0; + uint8_t ltssm_state; + + info_0 = al_reg_read32(®s->app.debug->info_0); + + ltssm_state = AL_REG_FIELD_GET(info_0, + PCIE_W_DEBUG_INFO_0_LTSSM_STATE_MASK, + PCIE_W_DEBUG_INFO_0_LTSSM_STATE_SHIFT); + + al_dbg("PCIe %d: Port Debug 0: 0x%08x. LTSSM state :0x%x\n", + pcie_port->port_id, info_0, ltssm_state); + + if (ltssm_ret) + *ltssm_ret = ltssm_state; + + if ((ltssm_state == AL_PCIE_LTSSM_STATE_L0) || + (ltssm_state == AL_PCIE_LTSSM_STATE_L0S)) + return AL_TRUE; + return AL_FALSE; +} + +static int +al_pcie_port_gen2_params_config(struct al_pcie_port *pcie_port, + const struct al_pcie_gen2_params *gen2_params) +{ + struct al_pcie_regs *regs = pcie_port->regs; + uint32_t gen2_ctrl; + + al_dbg("PCIe %d: Gen2 params config: Tx Swing %s, interrupt on link Eq %s, set Deemphasis %s\n", + pcie_port->port_id, + gen2_params->tx_swing_low ? "Low" : "Full", + gen2_params->tx_compliance_receive_enable? "enable" : "disable", + gen2_params->set_deemphasis? "enable" : "disable"); + + gen2_ctrl = al_reg_read32(®s->port_regs->gen2_ctrl); + + if (gen2_params->tx_swing_low) + AL_REG_BIT_SET(gen2_ctrl, PCIE_PORT_GEN2_CTRL_TX_SWING_LOW_SHIFT); + else + AL_REG_BIT_CLEAR(gen2_ctrl, PCIE_PORT_GEN2_CTRL_TX_SWING_LOW_SHIFT); + + if (gen2_params->tx_compliance_receive_enable) + AL_REG_BIT_SET(gen2_ctrl, PCIE_PORT_GEN2_CTRL_TX_COMPLIANCE_RCV_SHIFT); + else + AL_REG_BIT_CLEAR(gen2_ctrl, PCIE_PORT_GEN2_CTRL_TX_COMPLIANCE_RCV_SHIFT); + + if (gen2_params->set_deemphasis) + AL_REG_BIT_SET(gen2_ctrl, PCIE_PORT_GEN2_CTRL_DEEMPHASIS_SET_SHIFT); + else + AL_REG_BIT_CLEAR(gen2_ctrl, PCIE_PORT_GEN2_CTRL_DEEMPHASIS_SET_SHIFT); + + al_reg_write32(®s->port_regs->gen2_ctrl, gen2_ctrl); + + return 0; +} + + +static uint16_t +gen3_lane_eq_param_to_val(const struct al_pcie_gen3_lane_eq_params *eq_params) +{ + uint16_t eq_control = 0; + + eq_control = eq_params->downstream_port_transmitter_preset & 0xF; + eq_control |= (eq_params->downstream_port_receiver_preset_hint & 0x7) << 4; + eq_control |= (eq_params->upstream_port_transmitter_preset & 0xF) << 8; + eq_control |= (eq_params->upstream_port_receiver_preset_hint & 0x7) << 12; + + return eq_control; +} + +static int +al_pcie_port_gen3_params_config(struct al_pcie_port *pcie_port, + const struct al_pcie_gen3_params *gen3_params) +{ + struct al_pcie_regs *regs = pcie_port->regs; + uint32_t reg = 0; + uint16_t __iomem *lanes_eq_base = (uint16_t __iomem *)(regs->core_space[0].pcie_sec_ext_cap_base + (0xC >> 2)); + int i; + + al_dbg("PCIe %d: Gen3 params config: Equalization %s, interrupt on link Eq %s\n", + pcie_port->port_id, + gen3_params->perform_eq ? "enable" : "disable", + gen3_params->interrupt_enable_on_link_eq_request? "enable" : "disable"); + + if (gen3_params->perform_eq) + AL_REG_BIT_SET(reg, 0); + if (gen3_params->interrupt_enable_on_link_eq_request) + AL_REG_BIT_SET(reg, 1); + + al_reg_write32(regs->core_space[0].pcie_sec_ext_cap_base + (4 >> 2), + reg); + + al_pcie_port_wr_to_ro_set(pcie_port, AL_TRUE); + + for (i = 0; i < gen3_params->eq_params_elements; i += 2) { + uint32_t eq_control = + (uint32_t)gen3_lane_eq_param_to_val(gen3_params->eq_params + i) | + (uint32_t)gen3_lane_eq_param_to_val(gen3_params->eq_params + i + 1) << 16; + + al_dbg("PCIe %d: Set EQ (0x%08x) for lane %d, %d\n", pcie_port->port_id, eq_control, i, i + 1); + al_reg_write32((uint32_t *)(lanes_eq_base + i), eq_control); + } + + al_pcie_port_wr_to_ro_set(pcie_port, AL_FALSE); + + reg = al_reg_read32(®s->port_regs->gen3_ctrl); + if (gen3_params->eq_disable) + AL_REG_BIT_SET(reg, PCIE_PORT_GEN3_CTRL_EQ_DISABLE_SHIFT); + else + AL_REG_BIT_CLEAR(reg, PCIE_PORT_GEN3_CTRL_EQ_DISABLE_SHIFT); + + if (gen3_params->eq_phase2_3_disable) + AL_REG_BIT_SET(reg, PCIE_PORT_GEN3_CTRL_EQ_PHASE_2_3_DISABLE_SHIFT); + else + AL_REG_BIT_CLEAR(reg, PCIE_PORT_GEN3_CTRL_EQ_PHASE_2_3_DISABLE_SHIFT); + + al_reg_write32(®s->port_regs->gen3_ctrl, reg); + + reg = 0; + AL_REG_FIELD_SET(reg, PCIE_PORT_GEN3_EQ_LF_MASK, + PCIE_PORT_GEN3_EQ_LF_SHIFT, + gen3_params->local_lf); + AL_REG_FIELD_SET(reg, PCIE_PORT_GEN3_EQ_FS_MASK, + PCIE_PORT_GEN3_EQ_FS_SHIFT, + gen3_params->local_fs); + + al_reg_write32(®s->port_regs->gen3_eq_fs_lf, reg); + + reg = 0; + AL_REG_FIELD_SET(reg, PCIE_AXI_MISC_ZERO_LANEX_PHY_MAC_LOCAL_LF_MASK, + PCIE_AXI_MISC_ZERO_LANEX_PHY_MAC_LOCAL_LF_SHIFT, + gen3_params->local_lf); + AL_REG_FIELD_SET(reg, PCIE_AXI_MISC_ZERO_LANEX_PHY_MAC_LOCAL_FS_MASK, + PCIE_AXI_MISC_ZERO_LANEX_PHY_MAC_LOCAL_FS_SHIFT, + gen3_params->local_fs); + al_reg_write32(regs->axi.conf.zero_lane0, reg); + al_reg_write32(regs->axi.conf.zero_lane1, reg); + al_reg_write32(regs->axi.conf.zero_lane2, reg); + al_reg_write32(regs->axi.conf.zero_lane3, reg); + if (pcie_port->rev_id == AL_PCIE_REV_ID_3) { + al_reg_write32(regs->axi.conf.zero_lane4, reg); + al_reg_write32(regs->axi.conf.zero_lane5, reg); + al_reg_write32(regs->axi.conf.zero_lane6, reg); + al_reg_write32(regs->axi.conf.zero_lane7, reg); + } + + /* + * Gen3 EQ Control Register: + * - Preset Request Vector - request 9 + * - Behavior After 24 ms Timeout (when optimal settings are not + * found): Recovery.Equalization.RcvrLock + * - Phase2_3 2 ms Timeout Disable + * - Feedback Mode - Figure Of Merit + */ + reg = 0x00020031; + al_reg_write32(®s->port_regs->gen3_eq_ctrl, reg); + + return 0; +} + +static int +al_pcie_port_tl_credits_config( + struct al_pcie_port *pcie_port, + const struct al_pcie_tl_credits_params *tl_credits __attribute__((__unused__))) +{ + al_err("PCIe %d: transport layer credits config not implemented\n", + pcie_port->port_id); + + return -ENOSYS; + +} + +static int +al_pcie_port_pf_params_config(struct al_pcie_pf *pcie_pf, + const struct al_pcie_pf_config_params *pf_params) +{ + struct al_pcie_port *pcie_port = pcie_pf->pcie_port; + struct al_pcie_regs *regs = pcie_port->regs; + unsigned int pf_num = pcie_pf->pf_num; + int bar_idx; + int ret; + + al_pcie_port_wr_to_ro_set(pcie_port, AL_TRUE); + + /* Disable D1 and D3hot capabilities */ + if (pf_params->cap_d1_d3hot_dis) + al_reg_write32_masked( + regs->core_space[pf_num].pcie_pm_cap_base, + AL_FIELD_MASK(26, 25) | AL_FIELD_MASK(31, 28), 0); + + /* Disable FLR capability */ + if (pf_params->cap_flr_dis) + al_reg_write32_masked( + regs->core_space[pf_num].pcie_dev_cap_base, + AL_BIT(28), 0); + + /* Disable ASPM capability */ + if (pf_params->cap_aspm_dis) { + al_reg_write32_masked( + regs->core_space[pf_num].pcie_cap_base + (AL_PCI_EXP_LNKCAP >> 2), + AL_PCI_EXP_LNKCAP_ASPMS, 0); + } else if (pcie_port->rev_id == AL_PCIE_REV_ID_0) { + al_warn("%s: ASPM support is enabled, please disable it\n", + __func__); + ret = -EINVAL; + goto done; + } + + if (!pf_params->bar_params_valid) { + ret = 0; + goto done; + } + + for (bar_idx = 0; bar_idx < 6;){ /* bar_idx will be incremented depending on bar type */ + const struct al_pcie_ep_bar_params *params = pf_params->bar_params + bar_idx; + uint32_t mask = 0; + uint32_t ctrl = 0; + uint32_t __iomem *bar_addr = ®s->core_space[pf_num].config_header[(AL_PCI_BASE_ADDRESS_0 >> 2) + bar_idx]; + + if (params->enable) { + uint64_t size = params->size; + + if (params->memory_64_bit) { + const struct al_pcie_ep_bar_params *next_params = params + 1; + /* 64 bars start at even index (BAR0, BAR 2 or BAR 4) */ + if (bar_idx & 1) { + ret = -EINVAL; + goto done; + } + + /* next BAR must be disabled */ + if (next_params->enable) { + ret = -EINVAL; + goto done; + } + + /* 64 bar must be memory bar */ + if (!params->memory_space) { + ret = -EINVAL; + goto done; + } + } else { + if (size > AL_PCIE_MAX_32_MEMORY_BAR_SIZE) + return -EINVAL; + /* 32 bit space can't be prefetchable */ + if (params->memory_is_prefetchable) { + ret = -EINVAL; + goto done; + } + } + + if (params->memory_space) { + if (size < AL_PCIE_MIN_MEMORY_BAR_SIZE) { + al_err("PCIe %d: memory BAR %d: size (0x%llx) less that minimal allowed value\n", + pcie_port->port_id, bar_idx, size); + ret = -EINVAL; + goto done; + } + } else { + /* IO can't be prefetchable */ + if (params->memory_is_prefetchable) { + ret = -EINVAL; + goto done; + } + + if (size < AL_PCIE_MIN_IO_BAR_SIZE) { + al_err("PCIe %d: IO BAR %d: size (0x%llx) less that minimal allowed value\n", + pcie_port->port_id, bar_idx, size); + ret = -EINVAL; + goto done; + } + } + + /* size must be power of 2 */ + if (size & (size - 1)) { + al_err("PCIe %d: BAR %d:size (0x%llx) must be " + "power of 2\n", + pcie_port->port_id, bar_idx, size); + ret = -EINVAL; + goto done; + } + + /* If BAR is 64-bit, disable the next BAR before + * configuring this one + */ + if (params->memory_64_bit) + al_reg_write32_dbi_cs2(pcie_port, bar_addr + 1, 0); + + mask = 1; /* enable bit*/ + mask |= (params->size - 1) & 0xFFFFFFFF; + + al_reg_write32_dbi_cs2(pcie_port, bar_addr , mask); + + if (params->memory_space == AL_FALSE) + ctrl = AL_PCI_BASE_ADDRESS_SPACE_IO; + if (params->memory_64_bit) + ctrl |= AL_PCI_BASE_ADDRESS_MEM_TYPE_64; + if (params->memory_is_prefetchable) + ctrl |= AL_PCI_BASE_ADDRESS_MEM_PREFETCH; + al_reg_write32(bar_addr, ctrl); + + if (params->memory_64_bit) { + mask = ((params->size - 1) >> 32) & 0xFFFFFFFF; + al_reg_write32_dbi_cs2(pcie_port, bar_addr + 1, mask); + } + + } else { + al_reg_write32_dbi_cs2(pcie_port, bar_addr , mask); + } + if (params->enable && params->memory_64_bit) + bar_idx += 2; + else + bar_idx += 1; + } + + if (pf_params->exp_bar_params.enable) { + if (pcie_port->rev_id != AL_PCIE_REV_ID_3) { + al_err("PCIe %d: Expansion BAR enable not supported\n", pcie_port->port_id); + ret = -ENOSYS; + goto done; + } else { + /* Enable exp ROM */ + uint32_t __iomem *exp_rom_bar_addr = + ®s->core_space[pf_num].config_header[AL_PCI_EXP_ROM_BASE_ADDRESS >> 2]; + uint32_t mask = 1; /* enable bit*/ + mask |= (pf_params->exp_bar_params.size - 1) & 0xFFFFFFFF; + al_reg_write32_dbi_cs2(pcie_port, exp_rom_bar_addr , mask); + } + } else if (pcie_port->rev_id == AL_PCIE_REV_ID_3) { + /* Disable exp ROM */ + uint32_t __iomem *exp_rom_bar_addr = + ®s->core_space[pf_num].config_header[AL_PCI_EXP_ROM_BASE_ADDRESS >> 2]; + al_reg_write32_dbi_cs2(pcie_port, exp_rom_bar_addr , 0); + } + + /* Open CPU generated msi and legacy interrupts in pcie wrapper logic */ + if ((pcie_port->rev_id == AL_PCIE_REV_ID_0) || + (pcie_port->rev_id == AL_PCIE_REV_ID_1)) { + al_reg_write32(regs->app.soc_int[pf_num].mask_inta_leg_0, (1 << 21)); + } else if ((pcie_port->rev_id == AL_PCIE_REV_ID_2) || + (pcie_port->rev_id == AL_PCIE_REV_ID_3)) { + al_reg_write32(regs->app.soc_int[pf_num].mask_inta_leg_3, (1 << 18)); + } else { + al_assert(0); + ret = -ENOSYS; + goto done; + } + + /** + * Addressing RMN: 1547 + * + * RMN description: + * 1. Whenever writing to 0x2xx offset, the write also happens to + * 0x3xx address, meaning two registers are written instead of one. + * 2. Read and write from 0x3xx work ok. + * + * Software flow: + * Backup the value of the app.int_grp_a.mask_a register, because + * app.int_grp_a.mask_clear_a gets overwritten during the write to + * app.soc.mask_msi_leg_0 register. + * Restore the original value after the write to app.soc.mask_msi_leg_0 + * register. + */ + if (pcie_port->rev_id == AL_PCIE_REV_ID_0) { + uint32_t backup; + + backup = al_reg_read32(®s->app.int_grp_a->mask); + al_reg_write32(regs->app.soc_int[pf_num].mask_msi_leg_0, (1 << 22)); + al_reg_write32(®s->app.int_grp_a->mask, backup); + } else if (pcie_port->rev_id == AL_PCIE_REV_ID_1) { + al_reg_write32(regs->app.soc_int[pf_num].mask_msi_leg_0, (1 << 22)); + } else if ((pcie_port->rev_id == AL_PCIE_REV_ID_2) || + (pcie_port->rev_id == AL_PCIE_REV_ID_3)) { + al_reg_write32(regs->app.soc_int[pf_num].mask_msi_leg_3, (1 << 19)); + } else { + al_assert(0); + ret = -ENOSYS; + goto done; + } + + ret = 0; + +done: + al_pcie_port_wr_to_ro_set(pcie_port, AL_FALSE); + + return ret; +} + +static void +al_pcie_port_features_config( + struct al_pcie_port *pcie_port, + const struct al_pcie_features *features) +{ + struct al_pcie_regs *regs = pcie_port->regs; + + al_assert(pcie_port->rev_id > AL_PCIE_REV_ID_0); + + al_reg_write32_masked( + ®s->app.ctrl_gen->features, + PCIE_W_CTRL_GEN_FEATURES_SATA_EP_MSI_FIX, + features->sata_ep_msi_fix ? + PCIE_W_CTRL_GEN_FEATURES_SATA_EP_MSI_FIX : 0); +} + +static int +al_pcie_port_sris_config( + struct al_pcie_port *pcie_port, + struct al_pcie_sris_params *sris_params, + enum al_pcie_link_speed link_speed) +{ + int rc = 0; + struct al_pcie_regs *regs = pcie_port->regs; + + if (sris_params->use_defaults) { + sris_params->kp_counter_gen3 = (pcie_port->rev_id > AL_PCIE_REV_ID_1) ? + PCIE_SRIS_KP_COUNTER_GEN3_DEFAULT_VAL : 0; + sris_params->kp_counter_gen21 = PCIE_SRIS_KP_COUNTER_GEN21_DEFAULT_VAL; + + al_dbg("PCIe %d: configuring SRIS with default values kp_gen3[%d] kp_gen21[%d]\n", + pcie_port->port_id, + sris_params->kp_counter_gen3, + sris_params->kp_counter_gen21); + } + + switch (pcie_port->rev_id) { + case AL_PCIE_REV_ID_3: + case AL_PCIE_REV_ID_2: + al_reg_write32_masked(regs->app.global_ctrl.sris_kp_counter, + PCIE_W_GLOBAL_CTRL_SRIS_KP_COUNTER_VALUE_GEN3_SRIS_MASK | + PCIE_W_GLOBAL_CTRL_SRIS_KP_COUNTER_VALUE_GEN21_SRIS_MASK | + PCIE_W_GLOBAL_CTRL_SRIS_KP_COUNTER_VALUE_PCIE_X4_SRIS_EN, + (sris_params->kp_counter_gen3 << + PCIE_W_GLOBAL_CTRL_SRIS_KP_COUNTER_VALUE_GEN3_SRIS_SHIFT) | + (sris_params->kp_counter_gen21 << + PCIE_W_GLOBAL_CTRL_SRIS_KP_COUNTER_VALUE_GEN21_SRIS_SHIFT) | + PCIE_W_GLOBAL_CTRL_SRIS_KP_COUNTER_VALUE_PCIE_X4_SRIS_EN); + break; + + case AL_PCIE_REV_ID_1: + if ((link_speed == AL_PCIE_LINK_SPEED_GEN3) && (sris_params->kp_counter_gen3)) { + al_err("PCIe %d: cannot config Gen%d SRIS with rev_id[%d]\n", + pcie_port->port_id, al_pcie_speed_gen_code(link_speed), + pcie_port->rev_id); + return -EINVAL; + } + + al_reg_write32_masked(®s->port_regs->filter_mask_reg_1, + PCIE_FLT_MASK_SKP_INT_VAL_MASK, + sris_params->kp_counter_gen21); + break; + + default: + al_err("PCIe %d: SRIS config is not supported in rev_id[%d]\n", + pcie_port->port_id, pcie_port->rev_id); + al_assert(0); + return -EINVAL; + } + + return rc; +} + +static void +al_pcie_port_ib_hcrd_config(struct al_pcie_port *pcie_port) +{ + struct al_pcie_regs *regs = pcie_port->regs; + + al_reg_write32_masked( + ®s->port_regs->vc0_posted_rcv_q_ctrl, + RADM_PQ_HCRD_VC0_MASK, + (pcie_port->ib_hcrd_config.nof_p_hdr - 1) + << RADM_PQ_HCRD_VC0_SHIFT); + + al_reg_write32_masked( + ®s->port_regs->vc0_non_posted_rcv_q_ctrl, + RADM_NPQ_HCRD_VC0_MASK, + (pcie_port->ib_hcrd_config.nof_np_hdr - 1) + << RADM_NPQ_HCRD_VC0_SHIFT); +} + +static unsigned int +al_pcie_port_max_num_of_pfs_get(struct al_pcie_port *pcie_port) +{ + struct al_pcie_regs *regs = pcie_port->regs; + uint32_t max_func_num; + uint32_t max_num_of_pfs; + + /** + * Only in REV3, when port is already enabled, max_num_of_pfs is already + * initialized, return it. Otherwise, return default: 1 PF + */ + if ((pcie_port->rev_id == AL_PCIE_REV_ID_3) + && al_pcie_port_is_enabled(pcie_port)) { + max_func_num = al_reg_read32(®s->port_regs->timer_ctrl_max_func_num); + max_num_of_pfs = AL_REG_FIELD_GET(max_func_num, PCIE_PORT_GEN3_MAX_FUNC_NUM, 0) + 1; + return max_num_of_pfs; + } + return 1; +} + +/******************************************************************************/ +/***************************** API Implementation *****************************/ +/******************************************************************************/ + +/*************************** PCIe Initialization API **************************/ + +/** + * Initializes a PCIe port handle structure + * Caution: this function should not read/write to any register except for + * reading RO register (REV_ID for example) + */ +int +al_pcie_port_handle_init( + struct al_pcie_port *pcie_port, + void __iomem *pcie_reg_base, + void __iomem *pbs_reg_base, + unsigned int port_id) +{ + int i, ret; + + pcie_port->pcie_reg_base = pcie_reg_base; + pcie_port->regs = &pcie_port->regs_ptrs; + pcie_port->ex_regs = NULL; + pcie_port->pbs_regs = pbs_reg_base; + pcie_port->port_id = port_id; + pcie_port->max_lanes = 0; + + ret = al_pcie_rev_id_get(pbs_reg_base, pcie_reg_base); + if (ret < 0) + return ret; + + pcie_port->rev_id = ret; + + /* Zero all regs */ + al_memset(pcie_port->regs, 0, sizeof(struct al_pcie_regs)); + + if ((pcie_port->rev_id == AL_PCIE_REV_ID_0) || + (pcie_port->rev_id == AL_PCIE_REV_ID_1)) { + struct al_pcie_rev1_regs __iomem *regs = + (struct al_pcie_rev1_regs __iomem *)pcie_reg_base; + + pcie_port->regs->axi.ctrl.global = ®s->axi.ctrl.global; + pcie_port->regs->axi.ctrl.master_arctl = ®s->axi.ctrl.master_arctl; + pcie_port->regs->axi.ctrl.master_awctl = ®s->axi.ctrl.master_awctl; + pcie_port->regs->axi.ctrl.slv_ctl = ®s->axi.ctrl.slv_ctl; + pcie_port->regs->axi.ob_ctrl.cfg_target_bus = ®s->axi.ob_ctrl.cfg_target_bus; + pcie_port->regs->axi.ob_ctrl.cfg_control = ®s->axi.ob_ctrl.cfg_control; + pcie_port->regs->axi.ob_ctrl.io_start_l = ®s->axi.ob_ctrl.io_start_l; + pcie_port->regs->axi.ob_ctrl.io_start_h = ®s->axi.ob_ctrl.io_start_h; + pcie_port->regs->axi.ob_ctrl.io_limit_l = ®s->axi.ob_ctrl.io_limit_l; + pcie_port->regs->axi.ob_ctrl.io_limit_h = ®s->axi.ob_ctrl.io_limit_h; + pcie_port->regs->axi.pcie_global.conf = ®s->axi.pcie_global.conf; + pcie_port->regs->axi.conf.zero_lane0 = ®s->axi.conf.zero_lane0; + pcie_port->regs->axi.conf.zero_lane1 = ®s->axi.conf.zero_lane1; + pcie_port->regs->axi.conf.zero_lane2 = ®s->axi.conf.zero_lane2; + pcie_port->regs->axi.conf.zero_lane3 = ®s->axi.conf.zero_lane3; + pcie_port->regs->axi.status.lane[0] = ®s->axi.status.lane0; + pcie_port->regs->axi.status.lane[1] = ®s->axi.status.lane1; + pcie_port->regs->axi.status.lane[2] = ®s->axi.status.lane2; + pcie_port->regs->axi.status.lane[3] = ®s->axi.status.lane3; + pcie_port->regs->axi.parity.en_axi = ®s->axi.parity.en_axi; + pcie_port->regs->axi.ordering.pos_cntl = ®s->axi.ordering.pos_cntl; + pcie_port->regs->axi.pre_configuration.pcie_core_setup = ®s->axi.pre_configuration.pcie_core_setup; + pcie_port->regs->axi.init_fc.cfg = ®s->axi.init_fc.cfg; + pcie_port->regs->axi.int_grp_a = ®s->axi.int_grp_a; + + pcie_port->regs->app.global_ctrl.port_init = ®s->app.global_ctrl.port_init; + pcie_port->regs->app.global_ctrl.pm_control = ®s->app.global_ctrl.pm_control; + pcie_port->regs->app.global_ctrl.events_gen[0] = ®s->app.global_ctrl.events_gen; + pcie_port->regs->app.debug = ®s->app.debug; + pcie_port->regs->app.soc_int[0].mask_inta_leg_0 = ®s->app.soc_int.mask_inta_leg_0; + pcie_port->regs->app.soc_int[0].mask_msi_leg_0 = ®s->app.soc_int.mask_msi_leg_0; + pcie_port->regs->app.ctrl_gen = ®s->app.ctrl_gen; + pcie_port->regs->app.parity = ®s->app.parity; + pcie_port->regs->app.atu.in_mask_pair = regs->app.atu.in_mask_pair; + pcie_port->regs->app.atu.out_mask_pair = regs->app.atu.out_mask_pair; + + if (pcie_port->rev_id == AL_PCIE_REV_ID_0) { + pcie_port->regs->app.int_grp_a = ®s->app.int_grp_a_m0; + pcie_port->regs->app.int_grp_b = ®s->app.int_grp_b_m0; + } else { + pcie_port->regs->app.int_grp_a = ®s->app.int_grp_a; + pcie_port->regs->app.int_grp_b = ®s->app.int_grp_b; + } + + pcie_port->regs->core_space[0].config_header = regs->core_space.config_header; + pcie_port->regs->core_space[0].pcie_pm_cap_base = ®s->core_space.pcie_pm_cap_base; + pcie_port->regs->core_space[0].pcie_cap_base = ®s->core_space.pcie_cap_base; + pcie_port->regs->core_space[0].pcie_dev_cap_base = ®s->core_space.pcie_dev_cap_base; + pcie_port->regs->core_space[0].pcie_dev_ctrl_status = ®s->core_space.pcie_dev_ctrl_status; + pcie_port->regs->core_space[0].pcie_link_cap_base = ®s->core_space.pcie_link_cap_base; + pcie_port->regs->core_space[0].msix_cap_base = ®s->core_space.msix_cap_base; + pcie_port->regs->core_space[0].aer = ®s->core_space.aer; + pcie_port->regs->core_space[0].pcie_sec_ext_cap_base = ®s->core_space.pcie_sec_ext_cap_base; + + pcie_port->regs->port_regs = ®s->core_space.port_regs; + + } else if (pcie_port->rev_id == AL_PCIE_REV_ID_2) { + struct al_pcie_rev2_regs __iomem *regs = + (struct al_pcie_rev2_regs __iomem *)pcie_reg_base; + + pcie_port->regs->axi.ctrl.global = ®s->axi.ctrl.global; + pcie_port->regs->axi.ctrl.master_arctl = ®s->axi.ctrl.master_arctl; + pcie_port->regs->axi.ctrl.master_awctl = ®s->axi.ctrl.master_awctl; + pcie_port->regs->axi.ctrl.slv_ctl = ®s->axi.ctrl.slv_ctl; + pcie_port->regs->axi.ob_ctrl.cfg_target_bus = ®s->axi.ob_ctrl.cfg_target_bus; + pcie_port->regs->axi.ob_ctrl.cfg_control = ®s->axi.ob_ctrl.cfg_control; + pcie_port->regs->axi.ob_ctrl.io_start_l = ®s->axi.ob_ctrl.io_start_l; + pcie_port->regs->axi.ob_ctrl.io_start_h = ®s->axi.ob_ctrl.io_start_h; + pcie_port->regs->axi.ob_ctrl.io_limit_l = ®s->axi.ob_ctrl.io_limit_l; + pcie_port->regs->axi.ob_ctrl.io_limit_h = ®s->axi.ob_ctrl.io_limit_h; + pcie_port->regs->axi.pcie_global.conf = ®s->axi.pcie_global.conf; + pcie_port->regs->axi.conf.zero_lane0 = ®s->axi.conf.zero_lane0; + pcie_port->regs->axi.conf.zero_lane1 = ®s->axi.conf.zero_lane1; + pcie_port->regs->axi.conf.zero_lane2 = ®s->axi.conf.zero_lane2; + pcie_port->regs->axi.conf.zero_lane3 = ®s->axi.conf.zero_lane3; + pcie_port->regs->axi.status.lane[0] = ®s->axi.status.lane0; + pcie_port->regs->axi.status.lane[1] = ®s->axi.status.lane1; + pcie_port->regs->axi.status.lane[2] = ®s->axi.status.lane2; + pcie_port->regs->axi.status.lane[3] = ®s->axi.status.lane3; + pcie_port->regs->axi.parity.en_axi = ®s->axi.parity.en_axi; + pcie_port->regs->axi.ordering.pos_cntl = ®s->axi.ordering.pos_cntl; + pcie_port->regs->axi.pre_configuration.pcie_core_setup = ®s->axi.pre_configuration.pcie_core_setup; + pcie_port->regs->axi.init_fc.cfg = ®s->axi.init_fc.cfg; + pcie_port->regs->axi.int_grp_a = ®s->axi.int_grp_a; + + pcie_port->regs->app.global_ctrl.port_init = ®s->app.global_ctrl.port_init; + pcie_port->regs->app.global_ctrl.pm_control = ®s->app.global_ctrl.pm_control; + pcie_port->regs->app.global_ctrl.events_gen[0] = ®s->app.global_ctrl.events_gen; + pcie_port->regs->app.global_ctrl.corr_err_sts_int = ®s->app.global_ctrl.pended_corr_err_sts_int; + pcie_port->regs->app.global_ctrl.uncorr_err_sts_int = ®s->app.global_ctrl.pended_uncorr_err_sts_int; + pcie_port->regs->app.debug = ®s->app.debug; + pcie_port->regs->app.ap_user_send_msg = ®s->app.ap_user_send_msg; + pcie_port->regs->app.soc_int[0].mask_inta_leg_0 = ®s->app.soc_int.mask_inta_leg_0; + pcie_port->regs->app.soc_int[0].mask_inta_leg_3 = ®s->app.soc_int.mask_inta_leg_3; + pcie_port->regs->app.soc_int[0].mask_msi_leg_0 = ®s->app.soc_int.mask_msi_leg_0; + pcie_port->regs->app.soc_int[0].mask_msi_leg_3 = ®s->app.soc_int.mask_msi_leg_3; + pcie_port->regs->app.ctrl_gen = ®s->app.ctrl_gen; + pcie_port->regs->app.parity = ®s->app.parity; + pcie_port->regs->app.atu.in_mask_pair = regs->app.atu.in_mask_pair; + pcie_port->regs->app.atu.out_mask_pair = regs->app.atu.out_mask_pair; + pcie_port->regs->app.status_per_func[0] = ®s->app.status_per_func; + pcie_port->regs->app.int_grp_a = ®s->app.int_grp_a; + pcie_port->regs->app.int_grp_b = ®s->app.int_grp_b; + + pcie_port->regs->core_space[0].config_header = regs->core_space.config_header; + pcie_port->regs->core_space[0].pcie_pm_cap_base = ®s->core_space.pcie_pm_cap_base; + pcie_port->regs->core_space[0].pcie_cap_base = ®s->core_space.pcie_cap_base; + pcie_port->regs->core_space[0].pcie_dev_cap_base = ®s->core_space.pcie_dev_cap_base; + pcie_port->regs->core_space[0].pcie_dev_ctrl_status = ®s->core_space.pcie_dev_ctrl_status; + pcie_port->regs->core_space[0].pcie_link_cap_base = ®s->core_space.pcie_link_cap_base; + pcie_port->regs->core_space[0].msix_cap_base = ®s->core_space.msix_cap_base; + pcie_port->regs->core_space[0].aer = ®s->core_space.aer; + pcie_port->regs->core_space[0].pcie_sec_ext_cap_base = ®s->core_space.pcie_sec_ext_cap_base; + + pcie_port->regs->port_regs = ®s->core_space.port_regs; + + } else if (pcie_port->rev_id == AL_PCIE_REV_ID_3) { + struct al_pcie_rev3_regs __iomem *regs = + (struct al_pcie_rev3_regs __iomem *)pcie_reg_base; + pcie_port->regs->axi.ctrl.global = ®s->axi.ctrl.global; + pcie_port->regs->axi.ctrl.master_arctl = ®s->axi.ctrl.master_arctl; + pcie_port->regs->axi.ctrl.master_awctl = ®s->axi.ctrl.master_awctl; + pcie_port->regs->axi.ctrl.slv_ctl = ®s->axi.ctrl.slv_ctl; + pcie_port->regs->axi.ob_ctrl.cfg_target_bus = ®s->axi.ob_ctrl.cfg_target_bus; + pcie_port->regs->axi.ob_ctrl.cfg_control = ®s->axi.ob_ctrl.cfg_control; + pcie_port->regs->axi.ob_ctrl.io_start_l = ®s->axi.ob_ctrl.io_start_l; + pcie_port->regs->axi.ob_ctrl.io_start_h = ®s->axi.ob_ctrl.io_start_h; + pcie_port->regs->axi.ob_ctrl.io_limit_l = ®s->axi.ob_ctrl.io_limit_l; + pcie_port->regs->axi.ob_ctrl.io_limit_h = ®s->axi.ob_ctrl.io_limit_h; + pcie_port->regs->axi.pcie_global.conf = ®s->axi.pcie_global.conf; + pcie_port->regs->axi.conf.zero_lane0 = ®s->axi.conf.zero_lane0; + pcie_port->regs->axi.conf.zero_lane1 = ®s->axi.conf.zero_lane1; + pcie_port->regs->axi.conf.zero_lane2 = ®s->axi.conf.zero_lane2; + pcie_port->regs->axi.conf.zero_lane3 = ®s->axi.conf.zero_lane3; + pcie_port->regs->axi.conf.zero_lane4 = ®s->axi.conf.zero_lane4; + pcie_port->regs->axi.conf.zero_lane5 = ®s->axi.conf.zero_lane5; + pcie_port->regs->axi.conf.zero_lane6 = ®s->axi.conf.zero_lane6; + pcie_port->regs->axi.conf.zero_lane7 = ®s->axi.conf.zero_lane7; + pcie_port->regs->axi.status.lane[0] = ®s->axi.status.lane0; + pcie_port->regs->axi.status.lane[1] = ®s->axi.status.lane1; + pcie_port->regs->axi.status.lane[2] = ®s->axi.status.lane2; + pcie_port->regs->axi.status.lane[3] = ®s->axi.status.lane3; + pcie_port->regs->axi.status.lane[4] = ®s->axi.status.lane4; + pcie_port->regs->axi.status.lane[5] = ®s->axi.status.lane5; + pcie_port->regs->axi.status.lane[6] = ®s->axi.status.lane6; + pcie_port->regs->axi.status.lane[7] = ®s->axi.status.lane7; + pcie_port->regs->axi.parity.en_axi = ®s->axi.parity.en_axi; + pcie_port->regs->axi.ordering.pos_cntl = ®s->axi.ordering.pos_cntl; + pcie_port->regs->axi.pre_configuration.pcie_core_setup = ®s->axi.pre_configuration.pcie_core_setup; + pcie_port->regs->axi.init_fc.cfg = ®s->axi.init_fc.cfg; + pcie_port->regs->axi.int_grp_a = ®s->axi.int_grp_a; + pcie_port->regs->axi.axi_attr_ovrd.write_msg_ctrl_0 = ®s->axi.axi_attr_ovrd.write_msg_ctrl_0; + pcie_port->regs->axi.axi_attr_ovrd.write_msg_ctrl_1 = ®s->axi.axi_attr_ovrd.write_msg_ctrl_1; + pcie_port->regs->axi.axi_attr_ovrd.pf_sel = ®s->axi.axi_attr_ovrd.pf_sel; + + for (i = 0; i < AL_MAX_NUM_OF_PFS; i++) { + pcie_port->regs->axi.pf_axi_attr_ovrd[i].func_ctrl_0 = ®s->axi.pf_axi_attr_ovrd[i].func_ctrl_0; + pcie_port->regs->axi.pf_axi_attr_ovrd[i].func_ctrl_1 = ®s->axi.pf_axi_attr_ovrd[i].func_ctrl_1; + pcie_port->regs->axi.pf_axi_attr_ovrd[i].func_ctrl_2 = ®s->axi.pf_axi_attr_ovrd[i].func_ctrl_2; + pcie_port->regs->axi.pf_axi_attr_ovrd[i].func_ctrl_3 = ®s->axi.pf_axi_attr_ovrd[i].func_ctrl_3; + pcie_port->regs->axi.pf_axi_attr_ovrd[i].func_ctrl_4 = ®s->axi.pf_axi_attr_ovrd[i].func_ctrl_4; + pcie_port->regs->axi.pf_axi_attr_ovrd[i].func_ctrl_5 = ®s->axi.pf_axi_attr_ovrd[i].func_ctrl_5; + pcie_port->regs->axi.pf_axi_attr_ovrd[i].func_ctrl_6 = ®s->axi.pf_axi_attr_ovrd[i].func_ctrl_6; + pcie_port->regs->axi.pf_axi_attr_ovrd[i].func_ctrl_7 = ®s->axi.pf_axi_attr_ovrd[i].func_ctrl_7; + pcie_port->regs->axi.pf_axi_attr_ovrd[i].func_ctrl_8 = ®s->axi.pf_axi_attr_ovrd[i].func_ctrl_8; + pcie_port->regs->axi.pf_axi_attr_ovrd[i].func_ctrl_9 = ®s->axi.pf_axi_attr_ovrd[i].func_ctrl_9; + } + + pcie_port->regs->axi.msg_attr_axuser_table.entry_vec = ®s->axi.msg_attr_axuser_table.entry_vec; + + pcie_port->regs->app.global_ctrl.port_init = ®s->app.global_ctrl.port_init; + pcie_port->regs->app.global_ctrl.pm_control = ®s->app.global_ctrl.pm_control; + pcie_port->regs->app.global_ctrl.corr_err_sts_int = ®s->app.global_ctrl.pended_corr_err_sts_int; + pcie_port->regs->app.global_ctrl.uncorr_err_sts_int = ®s->app.global_ctrl.pended_uncorr_err_sts_int; + + for (i = 0; i < AL_MAX_NUM_OF_PFS; i++) { + pcie_port->regs->app.global_ctrl.events_gen[i] = ®s->app.events_gen_per_func[i].events_gen; + } + + pcie_port->regs->app.global_ctrl.sris_kp_counter = ®s->app.global_ctrl.sris_kp_counter_value; + pcie_port->regs->app.debug = ®s->app.debug; + + for (i = 0; i < AL_MAX_NUM_OF_PFS; i++) { + pcie_port->regs->app.soc_int[i].mask_inta_leg_0 = ®s->app.soc_int_per_func[i].mask_inta_leg_0; + pcie_port->regs->app.soc_int[i].mask_inta_leg_3 = ®s->app.soc_int_per_func[i].mask_inta_leg_3; + pcie_port->regs->app.soc_int[i].mask_msi_leg_0 = ®s->app.soc_int_per_func[i].mask_msi_leg_0; + pcie_port->regs->app.soc_int[i].mask_msi_leg_3 = ®s->app.soc_int_per_func[i].mask_msi_leg_3; + } + + pcie_port->regs->app.ap_user_send_msg = ®s->app.ap_user_send_msg; + pcie_port->regs->app.ctrl_gen = ®s->app.ctrl_gen; + pcie_port->regs->app.parity = ®s->app.parity; + pcie_port->regs->app.atu.in_mask_pair = regs->app.atu.in_mask_pair; + pcie_port->regs->app.atu.out_mask_pair = regs->app.atu.out_mask_pair; + + for (i = 0; i < AL_MAX_NUM_OF_PFS; i++) + pcie_port->regs->app.status_per_func[i] = ®s->app.status_per_func[i]; + + pcie_port->regs->app.int_grp_a = ®s->app.int_grp_a; + pcie_port->regs->app.int_grp_b = ®s->app.int_grp_b; + pcie_port->regs->app.int_grp_c = ®s->app.int_grp_c; + pcie_port->regs->app.int_grp_d = ®s->app.int_grp_d; + + for (i = 0; i < AL_MAX_NUM_OF_PFS; i++) { + pcie_port->regs->core_space[i].config_header = regs->core_space.func[i].config_header; + pcie_port->regs->core_space[i].pcie_pm_cap_base = ®s->core_space.func[i].pcie_pm_cap_base; + pcie_port->regs->core_space[i].pcie_cap_base = ®s->core_space.func[i].pcie_cap_base; + pcie_port->regs->core_space[i].pcie_dev_cap_base = ®s->core_space.func[i].pcie_dev_cap_base; + pcie_port->regs->core_space[i].pcie_dev_ctrl_status = ®s->core_space.func[i].pcie_dev_ctrl_status; + pcie_port->regs->core_space[i].pcie_link_cap_base = ®s->core_space.func[i].pcie_link_cap_base; + pcie_port->regs->core_space[i].msix_cap_base = ®s->core_space.func[i].msix_cap_base; + pcie_port->regs->core_space[i].aer = ®s->core_space.func[i].aer; + pcie_port->regs->core_space[i].tph_cap_base = ®s->core_space.func[i].tph_cap_base; + + } + + /* secondary extension capability only for PF0 */ + pcie_port->regs->core_space[0].pcie_sec_ext_cap_base = ®s->core_space.func[0].pcie_sec_ext_cap_base; + + pcie_port->regs->port_regs = ®s->core_space.func[0].port_regs; + + } else { + al_warn("%s: Revision ID is unknown\n", + __func__); + return -EINVAL; + } + + /* set maximum number of physical functions */ + pcie_port->max_num_of_pfs = al_pcie_port_max_num_of_pfs_get(pcie_port); + + al_dbg("pcie port handle initialized. port id: %d, rev_id %d, regs base %p\n", + port_id, pcie_port->rev_id, pcie_reg_base); + return 0; +} + +/** + * Initializes a PCIe Physical function handle structure + * Caution: this function should not read/write to any register except for + * reading RO register (REV_ID for example) + */ +int +al_pcie_pf_handle_init( + struct al_pcie_pf *pcie_pf, + struct al_pcie_port *pcie_port, + unsigned int pf_num) +{ + enum al_pcie_operating_mode op_mode = al_pcie_operating_mode_get(pcie_port); + al_assert(pf_num < pcie_port->max_num_of_pfs); + + if (op_mode != AL_PCIE_OPERATING_MODE_EP) { + al_err("PCIe %d: can't init PF handle with operating mode [%d]\n", + pcie_port->port_id, op_mode); + return -EINVAL; + } + + pcie_pf->pf_num = pf_num; + pcie_pf->pcie_port = pcie_port; + + al_dbg("PCIe %d: pf handle initialized. pf number: %d, rev_id %d, regs %p\n", + pcie_port->port_id, pcie_pf->pf_num, pcie_port->rev_id, + pcie_port->regs); + return 0; +} + +/************************** Pre PCIe Port Enable API **************************/ + +/** configure pcie operating mode (root complex or endpoint) */ +int +al_pcie_port_operating_mode_config( + struct al_pcie_port *pcie_port, + enum al_pcie_operating_mode mode) +{ + struct al_pcie_regs *regs = pcie_port->regs; + uint32_t reg, device_type, new_device_type; + + if (al_pcie_port_is_enabled(pcie_port)) { + al_err("PCIe %d: already enabled, cannot set operating mode\n", + pcie_port->port_id); + return -EINVAL; + } + + reg = al_reg_read32(regs->axi.pcie_global.conf); + + device_type = AL_REG_FIELD_GET(reg, + PCIE_AXI_MISC_PCIE_GLOBAL_CONF_DEV_TYPE_MASK, + PCIE_AXI_MISC_PCIE_GLOBAL_CONF_DEV_TYPE_SHIFT); + if (mode == AL_PCIE_OPERATING_MODE_EP) { + new_device_type = PCIE_AXI_MISC_PCIE_GLOBAL_CONF_DEV_TYPE_EP; + } else if (mode == AL_PCIE_OPERATING_MODE_RC) { + new_device_type = PCIE_AXI_MISC_PCIE_GLOBAL_CONF_DEV_TYPE_RC; + + if (pcie_port->rev_id == AL_PCIE_REV_ID_3) { + /* config 1 PF in RC mode */ + al_reg_write32_masked(regs->axi.axi_attr_ovrd.pf_sel, + PCIE_AXI_AXI_ATTR_OVRD_PF_SEL_PF_BIT0_OVRD_FROM_AXUSER | + PCIE_AXI_AXI_ATTR_OVRD_PF_SEL_PF_BIT0_OVRD_FROM_REG | + PCIE_AXI_AXI_ATTR_OVRD_PF_SEL_PF_BIT0_ADDR_OFFSET_MASK | + PCIE_AXI_AXI_ATTR_OVRD_PF_SEL_CFG_PF_BIT0_OVRD | + PCIE_AXI_AXI_ATTR_OVRD_PF_SEL_PF_BIT1_OVRD_FROM_AXUSER | + PCIE_AXI_AXI_ATTR_OVRD_PF_SEL_PF_BIT1_OVRD_FROM_REG | + PCIE_AXI_AXI_ATTR_OVRD_PF_SEL_PF_BIT1_ADDR_OFFSET_MASK | + PCIE_AXI_AXI_ATTR_OVRD_PF_SEL_CFG_PF_BIT1_OVRD, + PCIE_AXI_AXI_ATTR_OVRD_PF_SEL_PF_BIT0_OVRD_FROM_REG | + PCIE_AXI_AXI_ATTR_OVRD_PF_SEL_PF_BIT1_OVRD_FROM_REG); + } + } else { + al_err("PCIe %d: unknown operating mode: %d\n", pcie_port->port_id, mode); + return -EINVAL; + } + + if (new_device_type == device_type) { + al_dbg("PCIe %d: operating mode already set to %s\n", + pcie_port->port_id, (mode == AL_PCIE_OPERATING_MODE_EP) ? + "EndPoint" : "Root Complex"); + return 0; + } + al_info("PCIe %d: set operating mode to %s\n", + pcie_port->port_id, (mode == AL_PCIE_OPERATING_MODE_EP) ? + "EndPoint" : "Root Complex"); + AL_REG_FIELD_SET(reg, PCIE_AXI_MISC_PCIE_GLOBAL_CONF_DEV_TYPE_MASK, + PCIE_AXI_MISC_PCIE_GLOBAL_CONF_DEV_TYPE_SHIFT, + new_device_type); + + al_reg_write32(regs->axi.pcie_global.conf, reg); + + return 0; +} + +int +al_pcie_port_max_lanes_set(struct al_pcie_port *pcie_port, uint8_t lanes) +{ + struct al_pcie_regs *regs = pcie_port->regs; + + if (al_pcie_port_is_enabled(pcie_port)) { + al_err("PCIe %d: already enabled, cannot set max lanes\n", + pcie_port->port_id); + return -EINVAL; + } + + /* convert to bitmask format (4 ->'b1111, 2 ->'b11, 1 -> 'b1) */ + uint32_t active_lanes_val = AL_PCIE_PARSE_LANES(lanes); + + al_reg_write32_masked(regs->axi.pcie_global.conf, + (pcie_port->rev_id == AL_PCIE_REV_ID_3) ? + PCIE_REV3_AXI_MISC_PCIE_GLOBAL_CONF_NOF_ACT_LANES_MASK : + PCIE_REV1_2_AXI_MISC_PCIE_GLOBAL_CONF_NOF_ACT_LANES_MASK, + active_lanes_val); + + pcie_port->max_lanes = lanes; + return 0; +} + +int +al_pcie_port_max_num_of_pfs_set( + struct al_pcie_port *pcie_port, + uint8_t max_num_of_pfs) +{ + if (al_pcie_port_is_enabled(pcie_port)) { + al_err("PCIe %d: already enabled, cannot set max num of PFs\n", + pcie_port->port_id); + return -EINVAL; + } + + if (pcie_port->rev_id == AL_PCIE_REV_ID_3) + al_assert(max_num_of_pfs <= REV3_MAX_NUM_OF_PFS); + else + al_assert(max_num_of_pfs == REV1_2_MAX_NUM_OF_PFS); + + pcie_port->max_num_of_pfs = max_num_of_pfs; + + return 0; +} + +/* Inbound header credits and outstanding outbound reads configuration */ +int +al_pcie_port_ib_hcrd_os_ob_reads_config( + struct al_pcie_port *pcie_port, + struct al_pcie_ib_hcrd_os_ob_reads_config *ib_hcrd_os_ob_reads_config) +{ + struct al_pcie_regs *regs = pcie_port->regs; + + if (al_pcie_port_is_enabled(pcie_port)) { + al_err("PCIe %d: already enabled, cannot configure IB credits and OB OS reads\n", + pcie_port->port_id); + return -EINVAL; + } + + al_assert(ib_hcrd_os_ob_reads_config->nof_np_hdr > 0); + + al_assert(ib_hcrd_os_ob_reads_config->nof_p_hdr > 0); + + al_assert(ib_hcrd_os_ob_reads_config->nof_cpl_hdr > 0); + + if (pcie_port->rev_id == AL_PCIE_REV_ID_3) { + al_assert( + (ib_hcrd_os_ob_reads_config->nof_cpl_hdr + + ib_hcrd_os_ob_reads_config->nof_np_hdr + + ib_hcrd_os_ob_reads_config->nof_p_hdr) == + AL_PCIE_REV3_IB_HCRD_SUM); + + al_reg_write32_masked( + regs->axi.init_fc.cfg, + PCIE_AXI_REV3_INIT_FC_CFG_NOF_P_HDR_MASK | + PCIE_AXI_REV3_INIT_FC_CFG_NOF_NP_HDR_MASK | + PCIE_AXI_REV3_INIT_FC_CFG_NOF_CPL_HDR_MASK, + (ib_hcrd_os_ob_reads_config->nof_p_hdr << + PCIE_AXI_REV3_INIT_FC_CFG_NOF_P_HDR_SHIFT) | + (ib_hcrd_os_ob_reads_config->nof_np_hdr << + PCIE_AXI_REV3_INIT_FC_CFG_NOF_NP_HDR_SHIFT) | + (ib_hcrd_os_ob_reads_config->nof_cpl_hdr << + PCIE_AXI_REV3_INIT_FC_CFG_NOF_CPL_HDR_SHIFT)); + } else { + al_assert( + (ib_hcrd_os_ob_reads_config->nof_cpl_hdr + + ib_hcrd_os_ob_reads_config->nof_np_hdr + + ib_hcrd_os_ob_reads_config->nof_p_hdr) == + AL_PCIE_REV_1_2_IB_HCRD_SUM); + + al_reg_write32_masked( + regs->axi.init_fc.cfg, + PCIE_AXI_REV1_2_INIT_FC_CFG_NOF_P_HDR_MASK | + PCIE_AXI_REV1_2_INIT_FC_CFG_NOF_NP_HDR_MASK | + PCIE_AXI_REV1_2_INIT_FC_CFG_NOF_CPL_HDR_MASK, + (ib_hcrd_os_ob_reads_config->nof_p_hdr << + PCIE_AXI_REV1_2_INIT_FC_CFG_NOF_P_HDR_SHIFT) | + (ib_hcrd_os_ob_reads_config->nof_np_hdr << + PCIE_AXI_REV1_2_INIT_FC_CFG_NOF_NP_HDR_SHIFT) | + (ib_hcrd_os_ob_reads_config->nof_cpl_hdr << + PCIE_AXI_REV1_2_INIT_FC_CFG_NOF_CPL_HDR_SHIFT)); + } + + al_reg_write32_masked( + regs->axi.pre_configuration.pcie_core_setup, + PCIE_AXI_CORE_SETUP_NOF_READS_ONSLAVE_INTRF_PCIE_CORE_MASK, + ib_hcrd_os_ob_reads_config->nof_outstanding_ob_reads << + PCIE_AXI_CORE_SETUP_NOF_READS_ONSLAVE_INTRF_PCIE_CORE_SHIFT); + + /* Store 'nof_p_hdr' and 'nof_np_hdr' to be set in the core later */ + pcie_port->ib_hcrd_config.nof_np_hdr = + ib_hcrd_os_ob_reads_config->nof_np_hdr; + pcie_port->ib_hcrd_config.nof_p_hdr = + ib_hcrd_os_ob_reads_config->nof_p_hdr; + + return 0; +} + +enum al_pcie_operating_mode +al_pcie_operating_mode_get( + struct al_pcie_port *pcie_port) +{ + struct al_pcie_regs *regs = pcie_port->regs; + uint32_t reg, device_type; + + al_assert(pcie_port); + + reg = al_reg_read32(regs->axi.pcie_global.conf); + + device_type = AL_REG_FIELD_GET(reg, + PCIE_AXI_MISC_PCIE_GLOBAL_CONF_DEV_TYPE_MASK, + PCIE_AXI_MISC_PCIE_GLOBAL_CONF_DEV_TYPE_SHIFT); + + switch (device_type) { + case PCIE_AXI_MISC_PCIE_GLOBAL_CONF_DEV_TYPE_EP: + return AL_PCIE_OPERATING_MODE_EP; + case PCIE_AXI_MISC_PCIE_GLOBAL_CONF_DEV_TYPE_RC: + return AL_PCIE_OPERATING_MODE_RC; + default: + al_err("PCIe %d: unknown device type (%d) in global conf register.\n", + pcie_port->port_id, device_type); + } + return AL_PCIE_OPERATING_MODE_UNKNOWN; +} + +/**************************** PCIe Port Enable API ****************************/ + +/** Enable PCIe port (deassert reset) */ +int +al_pcie_port_enable(struct al_pcie_port *pcie_port) +{ + struct al_pbs_regs *pbs_reg_base = + (struct al_pbs_regs *)pcie_port->pbs_regs; + struct al_pcie_regs *regs = pcie_port->regs; + unsigned int port_id = pcie_port->port_id; + + /* pre-port-enable default functionality should be here */ + + /** + * Set inbound header credit and outstanding outbound reads defaults + * Must be called before port enable (PCIE_EXIST) + */ + al_pcie_ib_hcrd_os_ob_reads_config_default(pcie_port); + + /* + * Disable ATS capability + * - must be done before core reset deasserted + * - rev_id 0 - no effect, but no harm + */ + if ((pcie_port->rev_id == AL_PCIE_REV_ID_0) || + (pcie_port->rev_id == AL_PCIE_REV_ID_1) || + (pcie_port->rev_id == AL_PCIE_REV_ID_2)) { + al_reg_write32_masked( + regs->axi.ordering.pos_cntl, + PCIE_AXI_CORE_SETUP_ATS_CAP_DIS, + PCIE_AXI_CORE_SETUP_ATS_CAP_DIS); + } + + /* Deassert core reset */ + al_reg_write32_masked( + &pbs_reg_base->unit.pcie_conf_1, + 1 << (port_id + PBS_UNIT_PCIE_CONF_1_PCIE_EXIST_SHIFT), + 1 << (port_id + PBS_UNIT_PCIE_CONF_1_PCIE_EXIST_SHIFT)); + + return 0; +} + +/** Disable PCIe port (assert reset) */ +void +al_pcie_port_disable(struct al_pcie_port *pcie_port) +{ + struct al_pbs_regs *pbs_reg_base = + (struct al_pbs_regs *)pcie_port->pbs_regs; + unsigned int port_id = pcie_port->port_id; + + if (!al_pcie_port_is_enabled(pcie_port)) { + al_warn("PCIe %d: trying to disable a non-enabled port\n", + pcie_port->port_id); + } + + /* Assert core reset */ + al_reg_write32_masked( + &pbs_reg_base->unit.pcie_conf_1, + 1 << (port_id + PBS_UNIT_PCIE_CONF_1_PCIE_EXIST_SHIFT), + 0); +} + +int +al_pcie_port_memory_shutdown_set( + struct al_pcie_port *pcie_port, + al_bool enable) +{ + struct al_pcie_regs *regs = pcie_port->regs; + uint32_t mask = (pcie_port->rev_id == AL_PCIE_REV_ID_3) ? + PCIE_REV3_AXI_MISC_PCIE_GLOBAL_CONF_MEM_SHUTDOWN : + PCIE_REV1_2_AXI_MISC_PCIE_GLOBAL_CONF_MEM_SHUTDOWN; + + if (!al_pcie_port_is_enabled(pcie_port)) { + al_err("PCIe %d: not enabled, cannot shutdown memory\n", + pcie_port->port_id); + return -EINVAL; + } + + al_reg_write32_masked(regs->axi.pcie_global.conf, + mask, enable == AL_TRUE ? mask : 0); + + return 0; +} + +al_bool +al_pcie_port_is_enabled(struct al_pcie_port *pcie_port) +{ + struct al_pbs_regs *pbs_reg_base = (struct al_pbs_regs *)pcie_port->pbs_regs; + uint32_t pcie_exist = al_reg_read32(&pbs_reg_base->unit.pcie_conf_1); + + uint32_t ports_enabled = AL_REG_FIELD_GET(pcie_exist, + PBS_UNIT_PCIE_CONF_1_PCIE_EXIST_MASK, + PBS_UNIT_PCIE_CONF_1_PCIE_EXIST_SHIFT); + + return (AL_REG_FIELD_GET(ports_enabled, AL_BIT(pcie_port->port_id), + pcie_port->port_id) == 1); +} + +/*************************** PCIe Configuration API ***************************/ + +/** configure pcie port (link params, etc..) */ +int +al_pcie_port_config(struct al_pcie_port *pcie_port, + const struct al_pcie_port_config_params *params) +{ + struct al_pcie_regs *regs = pcie_port->regs; + enum al_pcie_operating_mode op_mode; + int status = 0; + int i; + + if (!al_pcie_port_is_enabled(pcie_port)) { + al_err("PCIe %d: port not enabled, cannot configure port\n", + pcie_port->port_id); + return -EINVAL; + } + + if (al_pcie_is_link_started(pcie_port)) { + al_err("PCIe %d: link already started, cannot configure port\n", + pcie_port->port_id); + return -EINVAL; + } + + al_assert(pcie_port); + al_assert(params); + + al_dbg("PCIe %d: port config\n", pcie_port->port_id); + + op_mode = al_pcie_operating_mode_get(pcie_port); + + /* if max lanes not specifies, read it from register */ + if (pcie_port->max_lanes == 0) { + uint32_t global_conf = al_reg_read32(regs->axi.pcie_global.conf); + uint32_t act_lanes = AL_REG_FIELD_GET(global_conf, + (pcie_port->rev_id == AL_PCIE_REV_ID_3) ? + PCIE_REV3_AXI_MISC_PCIE_GLOBAL_CONF_NOF_ACT_LANES_MASK : + PCIE_REV1_2_AXI_MISC_PCIE_GLOBAL_CONF_NOF_ACT_LANES_MASK, + PCIE_REVX_AXI_MISC_PCIE_GLOBAL_CONF_NOF_ACT_LANES_SHIFT); + + switch(act_lanes) { + case 0x1: + pcie_port->max_lanes = 1; + break; + case 0x3: + pcie_port->max_lanes = 2; + break; + case 0xf: + pcie_port->max_lanes = 4; + break; + case 0xff: + pcie_port->max_lanes = 8; + break; + default: + pcie_port->max_lanes = 0; + al_err("PCIe %d: invalid max lanes val (0x%x)\n", pcie_port->port_id, act_lanes); + break; + } + } + + if (params->link_params) + status = al_pcie_port_link_config(pcie_port, params->link_params); + if (status) + goto done; + + /* Change max read request size to 256 bytes + * Max Payload Size is remained untouched- it is the responsibility of + * the host to change the MPS, if needed. + */ + for (i = 0; i < AL_MAX_NUM_OF_PFS; i++) { + al_reg_write32_masked(regs->core_space[i].pcie_dev_ctrl_status, + PCIE_PORT_DEV_CTRL_STATUS_MRRS_MASK, + PCIE_PORT_DEV_CTRL_STATUS_MRRS_VAL_256); + if (pcie_port->rev_id != AL_PCIE_REV_ID_3) + break; + } + + if (pcie_port->rev_id == AL_PCIE_REV_ID_3) { + /* Set maximum physical function numbers */ + al_reg_write32_masked( + ®s->port_regs->timer_ctrl_max_func_num, + PCIE_PORT_GEN3_MAX_FUNC_NUM, + pcie_port->max_num_of_pfs - 1); + + al_pcie_port_wr_to_ro_set(pcie_port, AL_TRUE); + + /** + * in EP mode, when we have more than 1 PF we need to assert + * multi-pf support so the host scan all PFs + */ + if ((op_mode == AL_PCIE_OPERATING_MODE_EP) && (pcie_port->max_num_of_pfs > 1)) { + al_reg_write32_masked((uint32_t __iomem *) + (®s->core_space[0].config_header[0] + + (PCIE_BIST_HEADER_TYPE_BASE >> 2)), + PCIE_BIST_HEADER_TYPE_MULTI_FUNC_MASK, + PCIE_BIST_HEADER_TYPE_MULTI_FUNC_MASK); + } + + /* Disable TPH next pointer */ + for (i = 0; i < AL_MAX_NUM_OF_PFS; i++) { + al_reg_write32_masked(regs->core_space[i].tph_cap_base, + PCIE_TPH_NEXT_POINTER, 0); + } + + al_pcie_port_wr_to_ro_set(pcie_port, AL_FALSE); + } + + + status = al_pcie_port_snoop_config(pcie_port, params->enable_axi_snoop); + if (status) + goto done; + + al_pcie_port_ram_parity_int_config(pcie_port, params->enable_ram_parity_int); + + al_pcie_port_axi_parity_int_config(pcie_port, params->enable_axi_parity_int); + + al_pcie_port_relaxed_pcie_ordering_config(pcie_port, params->relaxed_ordering_params); + + if (params->lat_rply_timers) + status = al_pcie_port_lat_rply_timers_config(pcie_port, params->lat_rply_timers); + if (status) + goto done; + + if (params->gen2_params) + status = al_pcie_port_gen2_params_config(pcie_port, params->gen2_params); + if (status) + goto done; + + if (params->gen3_params) + status = al_pcie_port_gen3_params_config(pcie_port, params->gen3_params); + if (status) + goto done; + + if (params->tl_credits) + status = al_pcie_port_tl_credits_config(pcie_port, params->tl_credits); + if (status) + goto done; + + if (params->features) + al_pcie_port_features_config(pcie_port, params->features); + + if (params->sris_params) + status = al_pcie_port_sris_config(pcie_port, params->sris_params, + params->link_params->max_speed); + if (status) + goto done; + + al_pcie_port_ib_hcrd_config(pcie_port); + + if (params->fast_link_mode) { + al_reg_write32_masked(®s->port_regs->port_link_ctrl, + 1 << PCIE_PORT_LINK_CTRL_FAST_LINK_EN_SHIFT, + 1 << PCIE_PORT_LINK_CTRL_FAST_LINK_EN_SHIFT); + } + + if (params->enable_axi_slave_err_resp) + al_reg_write32_masked(®s->port_regs->axi_slave_err_resp, + 1 << PCIE_PORT_AXI_SLAVE_ERR_RESP_ALL_MAPPING_SHIFT, + 1 << PCIE_PORT_AXI_SLAVE_ERR_RESP_ALL_MAPPING_SHIFT); + + /** + * Addressing RMN: 5477 + * + * RMN description: + * address-decoder logic performs sub-target decoding even for transactions + * which undergo target enforcement. thus, in case transaction's address is + * inside any ECAM bar, the sub-target decoding will be set to ECAM, which + * causes wrong handling by PCIe unit + * + * Software flow: + * on EP mode only, turning on the iATU-enable bit (with the relevant mask + * below) allows the PCIe unit to discard the ECAM bit which was asserted + * by-mistake in the address-decoder + */ + if (op_mode == AL_PCIE_OPERATING_MODE_EP) { + al_reg_write32_masked(regs->axi.ob_ctrl.cfg_target_bus, + PCIE_AXI_MISC_OB_CTRL_CFG_TARGET_BUS_MASK_MASK, + (0) << PCIE_AXI_MISC_OB_CTRL_CFG_TARGET_BUS_MASK_SHIFT); + al_reg_write32_masked(regs->axi.ob_ctrl.cfg_control, + PCIE_AXI_MISC_OB_CTRL_CFG_CONTROL_IATU_EN, + PCIE_AXI_MISC_OB_CTRL_CFG_CONTROL_IATU_EN); + } + + if (op_mode == AL_PCIE_OPERATING_MODE_RC) { + /** + * enable memory and I/O access from port when in RC mode + * in RC mode, only core_space[0] is valid. + */ + al_reg_write16_masked( + (uint16_t __iomem *)(®s->core_space[0].config_header[0] + (0x4 >> 2)), + 0x7, /* Mem, MSE, IO */ + 0x7); + + /* change the class code to match pci bridge */ + al_pcie_port_wr_to_ro_set(pcie_port, AL_TRUE); + + al_reg_write32_masked( + (uint32_t __iomem *)(®s->core_space[0].config_header[0] + + (PCI_CLASS_REVISION >> 2)), + 0xFFFFFF00, + 0x06040000); + + al_pcie_port_wr_to_ro_set(pcie_port, AL_FALSE); + + /** + * Addressing RMN: 5702 + * + * RMN description: + * target bus mask default value in HW is: 0xFE, this enforces + * setting the target bus for ports 1 and 3 when running on RC + * mode since bit[20] in ECAM address in these cases is set + * + * Software flow: + * on RC mode only, set target-bus value to 0xFF to prevent this + * enforcement + */ + al_reg_write32_masked(regs->axi.ob_ctrl.cfg_target_bus, + PCIE_AXI_MISC_OB_CTRL_CFG_TARGET_BUS_MASK_MASK, + PCIE_AXI_MISC_OB_CTRL_CFG_TARGET_BUS_MASK_MASK); + } +done: + al_dbg("PCIe %d: port config %s\n", pcie_port->port_id, status? "failed": "done"); + + return status; +} + +int +al_pcie_pf_config( + struct al_pcie_pf *pcie_pf, + const struct al_pcie_pf_config_params *params) +{ + struct al_pcie_port *pcie_port; + int status = 0; + + al_assert(pcie_pf); + al_assert(params); + + pcie_port = pcie_pf->pcie_port; + + if (!al_pcie_port_is_enabled(pcie_port)) { + al_err("PCIe %d: port not enabled, cannot configure port\n", pcie_port->port_id); + return -EINVAL; + } + + al_dbg("PCIe %d: pf %d config\n", pcie_port->port_id, pcie_pf->pf_num); + + if (params) + status = al_pcie_port_pf_params_config(pcie_pf, params); + if (status) + goto done; + +done: + al_dbg("PCIe %d: pf %d config %s\n", + pcie_port->port_id, pcie_pf->pf_num, status ? "failed" : "done"); + + return status; +} + +/************************** PCIe Link Operations API **************************/ + +/* start pcie link */ +int +al_pcie_link_start(struct al_pcie_port *pcie_port) +{ + struct al_pcie_regs *regs = (struct al_pcie_regs *)pcie_port->regs; + + if (!al_pcie_port_is_enabled(pcie_port)) { + al_err("PCIe %d: port not enabled, cannot start link\n", + pcie_port->port_id); + return -EINVAL; + } + + al_dbg("PCIe_%d: start port link.\n", pcie_port->port_id); + + al_reg_write32_masked( + regs->app.global_ctrl.port_init, + PCIE_W_GLOBAL_CTRL_PORT_INIT_APP_LTSSM_EN_MASK, + PCIE_W_GLOBAL_CTRL_PORT_INIT_APP_LTSSM_EN_MASK); + + return 0; +} + +/* stop pcie link */ +int +al_pcie_link_stop(struct al_pcie_port *pcie_port) +{ + struct al_pcie_regs *regs = (struct al_pcie_regs *)pcie_port->regs; + + if (!al_pcie_is_link_started(pcie_port)) { + al_warn("PCIe %d: trying to stop a non-started link\n", + pcie_port->port_id); + } + + al_dbg("PCIe_%d: stop port link.\n", pcie_port->port_id); + + al_reg_write32_masked( + regs->app.global_ctrl.port_init, + PCIE_W_GLOBAL_CTRL_PORT_INIT_APP_LTSSM_EN_MASK, + ~PCIE_W_GLOBAL_CTRL_PORT_INIT_APP_LTSSM_EN_MASK); + + return 0; +} + +/* wait for link up indication */ +int +al_pcie_link_up_wait(struct al_pcie_port *pcie_port, uint32_t timeout_ms) +{ + int wait_count = timeout_ms * AL_PCIE_LINKUP_WAIT_INTERVALS_PER_SEC; + + while (wait_count-- > 0) { + if (al_pcie_check_link(pcie_port, NULL)) { + al_info("PCIe_%d: <<<<<<<<< Link up >>>>>>>>>\n", pcie_port->port_id); + return 0; + } else + al_dbg("PCIe_%d: No link up, %d attempts remaining\n", + pcie_port->port_id, wait_count); + + al_udelay(AL_PCIE_LINKUP_WAIT_INTERVAL); + } + al_info("PCIE_%d: link is not established in time\n", + pcie_port->port_id); + + return ETIMEDOUT; +} + +/** get link status */ +int +al_pcie_link_status(struct al_pcie_port *pcie_port, + struct al_pcie_link_status *status) +{ + struct al_pcie_regs *regs = pcie_port->regs; + uint16_t pcie_lnksta; + + al_assert(status); + + status->link_up = al_pcie_check_link(pcie_port, &status->ltssm_state); + + if (!status->link_up) { + status->speed = AL_PCIE_LINK_SPEED_DEFAULT; + status->lanes = 0; + return 0; + } + + pcie_lnksta = al_reg_read16((uint16_t __iomem *)regs->core_space[0].pcie_cap_base + (AL_PCI_EXP_LNKSTA >> 1)); + + switch(pcie_lnksta & AL_PCI_EXP_LNKSTA_CLS) { + case AL_PCI_EXP_LNKSTA_CLS_2_5GB: + status->speed = AL_PCIE_LINK_SPEED_GEN1; + break; + case AL_PCI_EXP_LNKSTA_CLS_5_0GB: + status->speed = AL_PCIE_LINK_SPEED_GEN2; + break; + case AL_PCI_EXP_LNKSTA_CLS_8_0GB: + status->speed = AL_PCIE_LINK_SPEED_GEN3; + break; + default: + status->speed = AL_PCIE_LINK_SPEED_DEFAULT; + al_err("PCIe %d: unknown link speed indication. PCIE LINK STATUS %x\n", + pcie_port->port_id, pcie_lnksta); + } + status->lanes = (pcie_lnksta & AL_PCI_EXP_LNKSTA_NLW) >> AL_PCI_EXP_LNKSTA_NLW_SHIFT; + al_info("PCIe %d: Link up. speed gen%d negotiated width %d\n", + pcie_port->port_id, status->speed, status->lanes); + + return 0; +} + +/** get lane status */ +void +al_pcie_lane_status_get( + struct al_pcie_port *pcie_port, + unsigned int lane, + struct al_pcie_lane_status *status) +{ + struct al_pcie_regs *regs = pcie_port->regs; + uint32_t lane_status; + uint32_t *reg_ptr; + + al_assert(pcie_port); + al_assert(status); + al_assert((pcie_port->rev_id != AL_PCIE_REV_ID_1) || (lane < REV1_2_MAX_NUM_LANES)); + al_assert((pcie_port->rev_id != AL_PCIE_REV_ID_2) || (lane < REV1_2_MAX_NUM_LANES)); + al_assert((pcie_port->rev_id != AL_PCIE_REV_ID_3) || (lane < REV3_MAX_NUM_LANES)); + + reg_ptr = regs->axi.status.lane[lane]; + + /* Reset field is valid only when same value is read twice */ + do { + lane_status = al_reg_read32(reg_ptr); + status->is_reset = !!(lane_status & PCIE_AXI_STATUS_LANE_IS_RESET); + } while (status->is_reset != (!!(al_reg_read32(reg_ptr) & PCIE_AXI_STATUS_LANE_IS_RESET))); + + status->requested_speed = + (lane_status & PCIE_AXI_STATUS_LANE_REQUESTED_SPEED_MASK) >> + PCIE_AXI_STATUS_LANE_REQUESTED_SPEED_SHIFT; +} + +/** trigger hot reset */ +int +al_pcie_link_hot_reset(struct al_pcie_port *pcie_port, al_bool enable) +{ + struct al_pcie_regs *regs = pcie_port->regs; + uint32_t events_gen; + al_bool app_reset_state; + enum al_pcie_operating_mode op_mode = al_pcie_operating_mode_get(pcie_port); + + if (op_mode != AL_PCIE_OPERATING_MODE_RC) { + al_err("PCIe %d: hot-reset is applicable only for RC mode\n", pcie_port->port_id); + return -EINVAL; + } + + if (!al_pcie_is_link_started(pcie_port)) { + al_err("PCIe %d: link not started, cannot trigger hot-reset\n", pcie_port->port_id); + return -EINVAL; + } + + events_gen = al_reg_read32(regs->app.global_ctrl.events_gen[0]); + app_reset_state = events_gen & PCIE_W_GLOBAL_CTRL_EVENTS_GEN_APP_RST_INIT; + + if (enable && app_reset_state) { + al_err("PCIe %d: link is already in hot-reset state\n", pcie_port->port_id); + return -EINVAL; + } else if ((!enable) && (!(app_reset_state))) { + al_err("PCIe %d: link is already in non-hot-reset state\n", pcie_port->port_id); + return -EINVAL; + } else { + al_dbg("PCIe %d: %s hot-reset\n", pcie_port->port_id, + (enable ? "enabling" : "disabling")); + /* hot-reset functionality is implemented only for function 0 */ + al_reg_write32_masked(regs->app.global_ctrl.events_gen[0], + PCIE_W_GLOBAL_CTRL_EVENTS_GEN_APP_RST_INIT, + (enable ? PCIE_W_GLOBAL_CTRL_EVENTS_GEN_APP_RST_INIT + : ~PCIE_W_GLOBAL_CTRL_EVENTS_GEN_APP_RST_INIT)); + return 0; + } +} + +/** disable port link */ +int +al_pcie_link_disable(struct al_pcie_port *pcie_port, al_bool disable) +{ + struct al_pcie_regs *regs = pcie_port->regs; + uint32_t pcie_lnkctl; + al_bool link_disable_state; + enum al_pcie_operating_mode op_mode = al_pcie_operating_mode_get(pcie_port); + + if (op_mode != AL_PCIE_OPERATING_MODE_RC) { + al_err("PCIe %d: hot-reset is applicable only for RC mode\n", pcie_port->port_id); + return -EINVAL; + } + + if (!al_pcie_is_link_started(pcie_port)) { + al_err("PCIe %d: link not started, cannot disable link\n", pcie_port->port_id); + return -EINVAL; + } + + pcie_lnkctl = al_reg_read32(regs->core_space[0].pcie_cap_base + (AL_PCI_EXP_LNKCTL >> 1)); + link_disable_state = pcie_lnkctl & AL_PCI_EXP_LNKCTL_LNK_DIS; + + if (disable && link_disable_state) { + al_err("PCIe %d: link is already in disable state\n", pcie_port->port_id); + return -EINVAL; + } else if ((!disable) && (!(link_disable_state))) { + al_err("PCIe %d: link is already in enable state\n", pcie_port->port_id); + return -EINVAL; + } + + al_dbg("PCIe %d: %s port\n", pcie_port->port_id, (disable ? "disabling" : "enabling")); + al_reg_write32_masked(regs->core_space[0].pcie_cap_base + (AL_PCI_EXP_LNKCTL >> 1), + AL_PCI_EXP_LNKCTL_LNK_DIS, + (disable ? AL_PCI_EXP_LNKCTL_LNK_DIS : ~AL_PCI_EXP_LNKCTL_LNK_DIS)); + return 0; +} + +/** retrain link */ +int +al_pcie_link_retrain(struct al_pcie_port *pcie_port) +{ + struct al_pcie_regs *regs = pcie_port->regs; + enum al_pcie_operating_mode op_mode = al_pcie_operating_mode_get(pcie_port); + + if (op_mode != AL_PCIE_OPERATING_MODE_RC) { + al_err("PCIe %d: link-retrain is applicable only for RC mode\n", + pcie_port->port_id); + return -EINVAL; + } + + if (!al_pcie_is_link_started(pcie_port)) { + al_err("PCIe %d: link not started, cannot link-retrain\n", pcie_port->port_id); + return -EINVAL; + } + + al_reg_write32_masked(regs->core_space[0].pcie_cap_base + (AL_PCI_EXP_LNKCTL >> 1), + AL_PCI_EXP_LNKCTL_LNK_RTRN, AL_PCI_EXP_LNKCTL_LNK_RTRN); + + return 0; +} + +/* trigger speed change */ +int +al_pcie_link_change_speed(struct al_pcie_port *pcie_port, + enum al_pcie_link_speed new_speed) +{ + struct al_pcie_regs *regs = pcie_port->regs; + + if (!al_pcie_is_link_started(pcie_port)) { + al_err("PCIe %d: link not started, cannot change speed\n", pcie_port->port_id); + return -EINVAL; + } + + al_dbg("PCIe %d: changing speed to %d\n", pcie_port->port_id, new_speed); + + al_pcie_port_link_speed_ctrl_set(pcie_port, new_speed); + + al_reg_write32_masked(®s->port_regs->gen2_ctrl, + PCIE_PORT_GEN2_CTRL_DIRECT_SPEED_CHANGE, + PCIE_PORT_GEN2_CTRL_DIRECT_SPEED_CHANGE); + + return 0; +} + +/* TODO: check if this function needed */ +int +al_pcie_link_change_width(struct al_pcie_port *pcie_port, + uint8_t width __attribute__((__unused__))) +{ + al_err("PCIe %d: link change width not implemented\n", + pcie_port->port_id); + + return -ENOSYS; +} + +/**************************** Post Link Start API *****************************/ + +/************************** Snoop Configuration API ***************************/ + +int +al_pcie_port_snoop_config(struct al_pcie_port *pcie_port, al_bool enable_axi_snoop) +{ + struct al_pcie_regs *regs = pcie_port->regs; + + /* Set snoop mode */ + al_info("PCIE_%d: snoop mode %s\n", + pcie_port->port_id, enable_axi_snoop ? "enable" : "disable"); + + if (enable_axi_snoop) { + al_reg_write32_masked(regs->axi.ctrl.master_arctl, + PCIE_AXI_CTRL_MASTER_ARCTL_OVR_SNOOP | PCIE_AXI_CTRL_MASTER_ARCTL_SNOOP, + PCIE_AXI_CTRL_MASTER_ARCTL_OVR_SNOOP | PCIE_AXI_CTRL_MASTER_ARCTL_SNOOP); + + al_reg_write32_masked(regs->axi.ctrl.master_awctl, + PCIE_AXI_CTRL_MASTER_AWCTL_OVR_SNOOP | PCIE_AXI_CTRL_MASTER_AWCTL_SNOOP, + PCIE_AXI_CTRL_MASTER_AWCTL_OVR_SNOOP | PCIE_AXI_CTRL_MASTER_AWCTL_SNOOP); + } else { + al_reg_write32_masked(regs->axi.ctrl.master_arctl, + PCIE_AXI_CTRL_MASTER_ARCTL_OVR_SNOOP | PCIE_AXI_CTRL_MASTER_ARCTL_SNOOP, + PCIE_AXI_CTRL_MASTER_ARCTL_OVR_SNOOP); + + al_reg_write32_masked(regs->axi.ctrl.master_awctl, + PCIE_AXI_CTRL_MASTER_AWCTL_OVR_SNOOP | PCIE_AXI_CTRL_MASTER_AWCTL_SNOOP, + PCIE_AXI_CTRL_MASTER_AWCTL_OVR_SNOOP); + } + return 0; +} + +/************************** Configuration Space API ***************************/ + +/** get base address of pci configuration space header */ +int +al_pcie_config_space_get(struct al_pcie_pf *pcie_pf, + uint8_t __iomem **addr) +{ + struct al_pcie_regs *regs = pcie_pf->pcie_port->regs; + + *addr = (uint8_t __iomem *)®s->core_space[pcie_pf->pf_num].config_header[0]; + return 0; +} + +/* Read data from the local configuration space */ +uint32_t +al_pcie_local_cfg_space_read( + struct al_pcie_pf *pcie_pf, + unsigned int reg_offset) +{ + struct al_pcie_regs *regs = pcie_pf->pcie_port->regs; + uint32_t data; + + data = al_reg_read32(®s->core_space[pcie_pf->pf_num].config_header[reg_offset]); + + return data; +} + +/* Write data to the local configuration space */ +void +al_pcie_local_cfg_space_write( + struct al_pcie_pf *pcie_pf, + unsigned int reg_offset, + uint32_t data, + al_bool cs2, + al_bool allow_ro_wr) +{ + struct al_pcie_port *pcie_port = pcie_pf->pcie_port; + struct al_pcie_regs *regs = pcie_port->regs; + unsigned int pf_num = pcie_pf->pf_num; + uint32_t *offset = ®s->core_space[pf_num].config_header[reg_offset]; + + if (allow_ro_wr) + al_pcie_port_wr_to_ro_set(pcie_port, AL_TRUE); + + if (cs2 == AL_FALSE) + al_reg_write32(offset, data); + else + al_reg_write32_dbi_cs2(pcie_port, offset, data); + + if (allow_ro_wr) + al_pcie_port_wr_to_ro_set(pcie_port, AL_FALSE); +} + +/** set target_bus and mask_target_bus */ +int +al_pcie_target_bus_set( + struct al_pcie_port *pcie_port, + uint8_t target_bus, + uint8_t mask_target_bus) +{ + struct al_pcie_regs *regs = (struct al_pcie_regs *)pcie_port->regs; + uint32_t reg; + + reg = al_reg_read32(regs->axi.ob_ctrl.cfg_target_bus); + AL_REG_FIELD_SET(reg, PCIE_AXI_MISC_OB_CTRL_CFG_TARGET_BUS_MASK_MASK, + PCIE_AXI_MISC_OB_CTRL_CFG_TARGET_BUS_MASK_SHIFT, + mask_target_bus); + AL_REG_FIELD_SET(reg, PCIE_AXI_MISC_OB_CTRL_CFG_TARGET_BUS_BUSNUM_MASK, + PCIE_AXI_MISC_OB_CTRL_CFG_TARGET_BUS_BUSNUM_SHIFT, + target_bus); + al_reg_write32(regs->axi.ob_ctrl.cfg_target_bus, reg); + return 0; +} + +/** get target_bus and mask_target_bus */ +int +al_pcie_target_bus_get( + struct al_pcie_port *pcie_port, + uint8_t *target_bus, + uint8_t *mask_target_bus) +{ + struct al_pcie_regs *regs = (struct al_pcie_regs *)pcie_port->regs; + uint32_t reg; + + al_assert(target_bus); + al_assert(mask_target_bus); + + reg = al_reg_read32(regs->axi.ob_ctrl.cfg_target_bus); + + *mask_target_bus = AL_REG_FIELD_GET(reg, + PCIE_AXI_MISC_OB_CTRL_CFG_TARGET_BUS_MASK_MASK, + PCIE_AXI_MISC_OB_CTRL_CFG_TARGET_BUS_MASK_SHIFT); + *target_bus = AL_REG_FIELD_GET(reg, + PCIE_AXI_MISC_OB_CTRL_CFG_TARGET_BUS_BUSNUM_MASK, + PCIE_AXI_MISC_OB_CTRL_CFG_TARGET_BUS_BUSNUM_SHIFT); + return 0; +} + +/** Set secondary bus number */ +int +al_pcie_secondary_bus_set(struct al_pcie_port *pcie_port, uint8_t secbus) +{ + struct al_pcie_regs *regs = pcie_port->regs; + + uint32_t secbus_val = (secbus << + PCIE_AXI_MISC_OB_CTRL_CFG_CONTROL_SEC_BUS_SHIFT); + + al_reg_write32_masked( + regs->axi.ob_ctrl.cfg_control, + PCIE_AXI_MISC_OB_CTRL_CFG_CONTROL_SEC_BUS_MASK, + secbus_val); + return 0; +} + +/** Set sub-ordinary bus number */ +int +al_pcie_subordinary_bus_set(struct al_pcie_port *pcie_port, uint8_t subbus) +{ + struct al_pcie_regs *regs = pcie_port->regs; + + uint32_t subbus_val = (subbus << + PCIE_AXI_MISC_OB_CTRL_CFG_CONTROL_SUBBUS_SHIFT); + + al_reg_write32_masked( + regs->axi.ob_ctrl.cfg_control, + PCIE_AXI_MISC_OB_CTRL_CFG_CONTROL_SUBBUS_MASK, + subbus_val); + return 0; +} + +/* Enable/disable deferring incoming configuration requests */ +void +al_pcie_app_req_retry_set( + struct al_pcie_port *pcie_port, + al_bool en) +{ + struct al_pcie_regs *regs = pcie_port->regs; + uint32_t mask = (pcie_port->rev_id == AL_PCIE_REV_ID_3) ? + PCIE_W_REV3_GLOBAL_CTRL_PM_CONTROL_APP_REQ_RETRY_EN : + PCIE_W_REV1_2_GLOBAL_CTRL_PM_CONTROL_APP_REQ_RETRY_EN; + + al_reg_write32_masked(regs->app.global_ctrl.pm_control, + mask, (en == AL_TRUE) ? mask : 0); +} + +/*************** Internal Address Translation Unit (ATU) API ******************/ + +/** program internal ATU region entry */ +int +al_pcie_atu_region_set( + struct al_pcie_port *pcie_port, + struct al_pcie_atu_region *atu_region) +{ + struct al_pcie_regs *regs = pcie_port->regs; + enum al_pcie_operating_mode op_mode = al_pcie_operating_mode_get(pcie_port); + uint32_t reg = 0; + + /** + * Addressing RMN: 5384 + * + * RMN description: + * From SNPS (also included in the data book) Dynamic iATU Programming + * With AHB/AXI Bridge Module When the bridge slave interface clock + * (hresetn or slv_aclk) is asynchronous to the PCIe native core clock + * (core_clk), you must not update the iATU registers while operations + * are in progress on the AHB/AXI bridge slave interface. The iATU + * registers are in the core_clk clock domain. The register outputs are + * used in the AHB/AXI bridge slave interface clock domain. There is no + * synchronization logic between these registers and the AHB/AXI bridge + * slave interface. + * + * Software flow: + * Do not allow configuring Outbound iATU after link is started + */ + if ((atu_region->direction == AL_PCIE_ATU_DIR_OUTBOUND) + && (al_pcie_is_link_started(pcie_port))) { + if (!atu_region->enforce_ob_atu_region_set) { + al_err("PCIe %d: setting OB iATU after link is started is not allowed\n", + pcie_port->port_id); + return -EINVAL; + } else { + al_info("PCIe %d: setting OB iATU even after link is started\n", + pcie_port->port_id); + } + } + + /*TODO : add sanity check */ + AL_REG_FIELD_SET(reg, 0xF, 0, atu_region->index); + AL_REG_BIT_VAL_SET(reg, 31, atu_region->direction); + al_reg_write32(®s->port_regs->iatu.index, reg); + + al_reg_write32(®s->port_regs->iatu.lower_base_addr, + (uint32_t)(atu_region->base_addr & 0xFFFFFFFF)); + al_reg_write32(®s->port_regs->iatu.upper_base_addr, + (uint32_t)((atu_region->base_addr >> 32)& 0xFFFFFFFF)); + al_reg_write32(®s->port_regs->iatu.lower_target_addr, + (uint32_t)(atu_region->target_addr & 0xFFFFFFFF)); + al_reg_write32(®s->port_regs->iatu.upper_target_addr, + (uint32_t)((atu_region->target_addr >> 32)& 0xFFFFFFFF)); + + /* configure the limit, not needed when working in BAR match mode */ + if (atu_region->match_mode == 0) { + uint32_t limit_reg_val; + if (pcie_port->rev_id > AL_PCIE_REV_ID_0) { + uint32_t *limit_ext_reg = + (atu_region->direction == AL_PCIE_ATU_DIR_OUTBOUND) ? + ®s->app.atu.out_mask_pair[atu_region->index / 2] : + ®s->app.atu.in_mask_pair[atu_region->index / 2]; + uint32_t limit_ext_reg_mask = + (atu_region->index % 2) ? + PCIE_W_ATU_MASK_EVEN_ODD_ATU_MASK_40_32_ODD_MASK : + PCIE_W_ATU_MASK_EVEN_ODD_ATU_MASK_40_32_EVEN_MASK; + unsigned int limit_ext_reg_shift = + (atu_region->index % 2) ? + PCIE_W_ATU_MASK_EVEN_ODD_ATU_MASK_40_32_ODD_SHIFT : + PCIE_W_ATU_MASK_EVEN_ODD_ATU_MASK_40_32_EVEN_SHIFT; + uint64_t limit_sz_msk = + atu_region->limit - atu_region->base_addr; + uint32_t limit_ext_reg_val = (uint32_t)(((limit_sz_msk) >> + 32) & 0xFFFFFFFF); + + if (limit_ext_reg_val) { + limit_reg_val = (uint32_t)((limit_sz_msk) & 0xFFFFFFFF); + al_assert(limit_reg_val == 0xFFFFFFFF); + } else { + limit_reg_val = (uint32_t)(atu_region->limit & + 0xFFFFFFFF); + } + + al_reg_write32_masked( + limit_ext_reg, + limit_ext_reg_mask, + limit_ext_reg_val << limit_ext_reg_shift); + } else { + limit_reg_val = (uint32_t)(atu_region->limit & 0xFFFFFFFF); + } + + al_reg_write32(®s->port_regs->iatu.limit_addr, + limit_reg_val); + } + + reg = 0; + AL_REG_FIELD_SET(reg, 0x1F, 0, atu_region->tlp_type); + AL_REG_FIELD_SET(reg, 0x3 << 9, 9, atu_region->attr); + + + if ((pcie_port->rev_id == AL_PCIE_REV_ID_3) + && (op_mode == AL_PCIE_OPERATING_MODE_EP) + && (atu_region->function_match_bypass_mode)) { + AL_REG_FIELD_SET(reg, + PCIE_IATU_CR1_FUNC_NUM_MASK, + PCIE_IATU_CR1_FUNC_NUM_SHIFT, + atu_region->function_match_bypass_mode_number); + } + + al_reg_write32(®s->port_regs->iatu.cr1, reg); + + /* Enable/disable the region. */ + reg = 0; + AL_REG_FIELD_SET(reg, 0xFF, 0, atu_region->msg_code); + AL_REG_FIELD_SET(reg, 0x700, 8, atu_region->bar_number); + AL_REG_FIELD_SET(reg, 0x3 << 24, 24, atu_region->response); + AL_REG_BIT_VAL_SET(reg, 16, atu_region->enable_attr_match_mode == AL_TRUE); + AL_REG_BIT_VAL_SET(reg, 21, atu_region->enable_msg_match_mode == AL_TRUE); + AL_REG_BIT_VAL_SET(reg, 28, atu_region->cfg_shift_mode == AL_TRUE); + AL_REG_BIT_VAL_SET(reg, 29, atu_region->invert_matching == AL_TRUE); + if (atu_region->tlp_type == AL_PCIE_TLP_TYPE_MEM || atu_region->tlp_type == AL_PCIE_TLP_TYPE_IO) + AL_REG_BIT_VAL_SET(reg, 30, !!atu_region->match_mode); + AL_REG_BIT_VAL_SET(reg, 31, !!atu_region->enable); + + /* In outbound, enable function bypass + * In inbound, enable function match mode + * Note: this is the same bit, has different meanings in ob/ib ATUs + */ + if (op_mode == AL_PCIE_OPERATING_MODE_EP) + AL_REG_FIELD_SET(reg, + PCIE_IATU_CR2_FUNC_NUM_TRANS_BYPASS_FUNC_MATCH_ENABLE_MASK, + PCIE_IATU_CR2_FUNC_NUM_TRANS_BYPASS_FUNC_MATCH_ENABLE_SHIFT, + atu_region->function_match_bypass_mode ? 0x1 : 0x0); + + al_reg_write32(®s->port_regs->iatu.cr2, reg); + + return 0; +} + +/** obtains internal ATU region base/target addresses */ +void +al_pcie_atu_region_get_fields( + struct al_pcie_port *pcie_port, + enum al_pcie_atu_dir direction, uint8_t index, + al_bool *enable, uint64_t *base_addr, uint64_t *target_addr) +{ + struct al_pcie_regs *regs = pcie_port->regs; + uint64_t high_addr; + uint32_t reg = 0; + + AL_REG_FIELD_SET(reg, 0xF, 0, index); + AL_REG_BIT_VAL_SET(reg, 31, direction); + al_reg_write32(®s->port_regs->iatu.index, reg); + + *base_addr = al_reg_read32(®s->port_regs->iatu.lower_base_addr); + high_addr = al_reg_read32(®s->port_regs->iatu.upper_base_addr); + high_addr <<= 32; + *base_addr |= high_addr; + + *target_addr = al_reg_read32(®s->port_regs->iatu.lower_target_addr); + high_addr = al_reg_read32(®s->port_regs->iatu.upper_target_addr); + high_addr <<= 32; + *target_addr |= high_addr; + + reg = al_reg_read32(®s->port_regs->iatu.cr1); + *enable = AL_REG_BIT_GET(reg, 31) ? AL_TRUE : AL_FALSE; +} + +void +al_pcie_axi_io_config( + struct al_pcie_port *pcie_port, + al_phys_addr_t start, + al_phys_addr_t end) +{ + struct al_pcie_regs *regs = pcie_port->regs; + + al_reg_write32(regs->axi.ob_ctrl.io_start_h, + (uint32_t)((start >> 32) & 0xFFFFFFFF)); + + al_reg_write32(regs->axi.ob_ctrl.io_start_l, + (uint32_t)(start & 0xFFFFFFFF)); + + al_reg_write32(regs->axi.ob_ctrl.io_limit_h, + (uint32_t)((end >> 32) & 0xFFFFFFFF)); + + al_reg_write32(regs->axi.ob_ctrl.io_limit_l, + (uint32_t)(end & 0xFFFFFFFF)); + + al_reg_write32_masked(regs->axi.ctrl.slv_ctl, + PCIE_AXI_CTRL_SLV_CTRL_IO_BAR_EN, + PCIE_AXI_CTRL_SLV_CTRL_IO_BAR_EN); +} + +/************** Interrupt generation (Endpoint mode Only) API *****************/ + +/** generate INTx Assert/DeAssert Message */ +int +al_pcie_legacy_int_gen( + struct al_pcie_pf *pcie_pf, + al_bool assert, + enum al_pcie_legacy_int_type type) +{ + struct al_pcie_regs *regs = pcie_pf->pcie_port->regs; + unsigned int pf_num = pcie_pf->pf_num; + uint32_t reg; + + al_assert(type == AL_PCIE_LEGACY_INTA); /* only INTA supported */ + reg = al_reg_read32(regs->app.global_ctrl.events_gen[pf_num]); + AL_REG_BIT_VAL_SET(reg, 3, !!assert); + al_reg_write32(regs->app.global_ctrl.events_gen[pf_num], reg); + + return 0; +} + +/** generate MSI interrupt */ +int +al_pcie_msi_int_gen(struct al_pcie_pf *pcie_pf, uint8_t vector) +{ + struct al_pcie_regs *regs = pcie_pf->pcie_port->regs; + unsigned int pf_num = pcie_pf->pf_num; + uint32_t reg; + + /* set msi vector and clear MSI request */ + reg = al_reg_read32(regs->app.global_ctrl.events_gen[pf_num]); + AL_REG_BIT_CLEAR(reg, 4); + AL_REG_FIELD_SET(reg, + PCIE_W_GLOBAL_CTRL_EVENTS_GEN_MSI_VECTOR_MASK, + PCIE_W_GLOBAL_CTRL_EVENTS_GEN_MSI_VECTOR_SHIFT, + vector); + al_reg_write32(regs->app.global_ctrl.events_gen[pf_num], reg); + /* set MSI request */ + AL_REG_BIT_SET(reg, 4); + al_reg_write32(regs->app.global_ctrl.events_gen[pf_num], reg); + + return 0; +} + +/** configure MSIX capability */ +int +al_pcie_msix_config( + struct al_pcie_pf *pcie_pf, + struct al_pcie_msix_params *msix_params) +{ + struct al_pcie_regs *regs = pcie_pf->pcie_port->regs; + unsigned int pf_num = pcie_pf->pf_num; + uint32_t msix_reg0; + + al_pcie_port_wr_to_ro_set(pcie_pf->pcie_port, AL_TRUE); + + msix_reg0 = al_reg_read32(regs->core_space[pf_num].msix_cap_base); + + msix_reg0 &= ~(AL_PCI_MSIX_MSGCTRL_TBL_SIZE << AL_PCI_MSIX_MSGCTRL_TBL_SIZE_SHIFT); + msix_reg0 |= ((msix_params->table_size - 1) & AL_PCI_MSIX_MSGCTRL_TBL_SIZE) << + AL_PCI_MSIX_MSGCTRL_TBL_SIZE_SHIFT; + al_reg_write32(regs->core_space[pf_num].msix_cap_base, msix_reg0); + + /* Table offset & BAR */ + al_reg_write32(regs->core_space[pf_num].msix_cap_base + (AL_PCI_MSIX_TABLE >> 2), + (msix_params->table_offset & AL_PCI_MSIX_TABLE_OFFSET) | + (msix_params->table_bar & AL_PCI_MSIX_TABLE_BAR)); + /* PBA offset & BAR */ + al_reg_write32(regs->core_space[pf_num].msix_cap_base + (AL_PCI_MSIX_PBA >> 2), + (msix_params->pba_offset & AL_PCI_MSIX_PBA_OFFSET) | + (msix_params->pba_bar & AL_PCI_MSIX_PBA_BAR)); + + al_pcie_port_wr_to_ro_set(pcie_pf->pcie_port, AL_FALSE); + + return 0; +} + +/** check whether MSIX is enabled */ +al_bool +al_pcie_msix_enabled(struct al_pcie_pf *pcie_pf) +{ + struct al_pcie_regs *regs = pcie_pf->pcie_port->regs; + uint32_t msix_reg0 = al_reg_read32(regs->core_space[pcie_pf->pf_num].msix_cap_base); + + if (msix_reg0 & AL_PCI_MSIX_MSGCTRL_EN) + return AL_TRUE; + return AL_FALSE; +} + +/** check whether MSIX is masked */ +al_bool +al_pcie_msix_masked(struct al_pcie_pf *pcie_pf) +{ + struct al_pcie_regs *regs = pcie_pf->pcie_port->regs; + uint32_t msix_reg0 = al_reg_read32(regs->core_space[pcie_pf->pf_num].msix_cap_base); + + if (msix_reg0 & AL_PCI_MSIX_MSGCTRL_MASK) + return AL_TRUE; + return AL_FALSE; +} + +/******************** Advanced Error Reporting (AER) API **********************/ + +/** configure AER capability */ +int +al_pcie_aer_config( + struct al_pcie_pf *pcie_pf, + struct al_pcie_aer_params *params) +{ + struct al_pcie_regs *regs = pcie_pf->pcie_port->regs; + struct al_pcie_core_aer_regs *aer_regs = regs->core_space[pcie_pf->pf_num].aer; + uint32_t reg_val; + + reg_val = al_reg_read32(&aer_regs->header); + + if (((reg_val & PCIE_AER_CAP_ID_MASK) >> PCIE_AER_CAP_ID_SHIFT) != + PCIE_AER_CAP_ID_VAL) + return -EIO; + + if (((reg_val & PCIE_AER_CAP_VER_MASK) >> PCIE_AER_CAP_VER_SHIFT) != + PCIE_AER_CAP_VER_VAL) + return -EIO; + + al_reg_write32(&aer_regs->corr_err_mask, ~params->enabled_corr_err); + + al_reg_write32(&aer_regs->uncorr_err_mask, + (~params->enabled_uncorr_non_fatal_err) | + (~params->enabled_uncorr_fatal_err)); + + al_reg_write32(&aer_regs->uncorr_err_severity, + params->enabled_uncorr_fatal_err); + + al_reg_write32(&aer_regs->cap_and_ctrl, + (params->ecrc_gen_en ? PCIE_AER_CTRL_STAT_ECRC_GEN_EN : 0) | + (params->ecrc_chk_en ? PCIE_AER_CTRL_STAT_ECRC_CHK_EN : 0)); + + al_reg_write32_masked( + regs->core_space[pcie_pf->pf_num].pcie_dev_ctrl_status, + PCIE_PORT_DEV_CTRL_STATUS_CORR_ERR_REPORT_EN | + PCIE_PORT_DEV_CTRL_STATUS_NON_FTL_ERR_REPORT_EN | + PCIE_PORT_DEV_CTRL_STATUS_FTL_ERR_REPORT_EN | + PCIE_PORT_DEV_CTRL_STATUS_UNSUP_REQ_REPORT_EN, + (params->enabled_corr_err ? + PCIE_PORT_DEV_CTRL_STATUS_CORR_ERR_REPORT_EN : 0) | + (params->enabled_uncorr_non_fatal_err ? + PCIE_PORT_DEV_CTRL_STATUS_NON_FTL_ERR_REPORT_EN : 0) | + (params->enabled_uncorr_fatal_err ? + PCIE_PORT_DEV_CTRL_STATUS_FTL_ERR_REPORT_EN : 0) | + ((params->enabled_uncorr_non_fatal_err & + AL_PCIE_AER_UNCORR_UNSUPRT_REQ_ERR) ? + PCIE_PORT_DEV_CTRL_STATUS_UNSUP_REQ_REPORT_EN : 0) | + ((params->enabled_uncorr_fatal_err & + AL_PCIE_AER_UNCORR_UNSUPRT_REQ_ERR) ? + PCIE_PORT_DEV_CTRL_STATUS_UNSUP_REQ_REPORT_EN : 0)); + + return 0; +} + +/** AER uncorretable errors get and clear */ +unsigned int +al_pcie_aer_uncorr_get_and_clear(struct al_pcie_pf *pcie_pf) +{ + struct al_pcie_regs *regs = pcie_pf->pcie_port->regs; + struct al_pcie_core_aer_regs *aer_regs = regs->core_space[pcie_pf->pf_num].aer; + uint32_t reg_val; + + reg_val = al_reg_read32(&aer_regs->uncorr_err_stat); + al_reg_write32(&aer_regs->uncorr_err_stat, reg_val); + + return reg_val; +} + +/** AER corretable errors get and clear */ +unsigned int +al_pcie_aer_corr_get_and_clear(struct al_pcie_pf *pcie_pf) +{ + struct al_pcie_regs *regs = pcie_pf->pcie_port->regs; + struct al_pcie_core_aer_regs *aer_regs = regs->core_space[pcie_pf->pf_num].aer; + uint32_t reg_val; + + reg_val = al_reg_read32(&aer_regs->corr_err_stat); + al_reg_write32(&aer_regs->corr_err_stat, reg_val); + + return reg_val; +} + +#if (AL_PCIE_AER_ERR_TLP_HDR_NUM_DWORDS != 4) +#error Wrong assumption! +#endif + +/** AER get the header for the TLP corresponding to a detected error */ +void +al_pcie_aer_err_tlp_hdr_get( + struct al_pcie_pf *pcie_pf, + uint32_t hdr[AL_PCIE_AER_ERR_TLP_HDR_NUM_DWORDS]) +{ + struct al_pcie_regs *regs = pcie_pf->pcie_port->regs; + struct al_pcie_core_aer_regs *aer_regs = regs->core_space[pcie_pf->pf_num].aer; + int i; + + for (i = 0; i < AL_PCIE_AER_ERR_TLP_HDR_NUM_DWORDS; i++) + hdr[i] = al_reg_read32(&aer_regs->header_log[i]); +} + +/********************** Loopback mode (RC and Endpoint modes) ************/ + +/** enter local pipe loopback mode */ +int +al_pcie_local_pipe_loopback_enter(struct al_pcie_port *pcie_port) +{ + struct al_pcie_regs *regs = pcie_port->regs; + + al_dbg("PCIe %d: Enter LOCAL PIPE Loopback mode", pcie_port->port_id); + + al_reg_write32_masked(®s->port_regs->pipe_loopback_ctrl, + 1 << PCIE_PORT_PIPE_LOOPBACK_CTRL_PIPE_LB_EN_SHIFT, + 1 << PCIE_PORT_PIPE_LOOPBACK_CTRL_PIPE_LB_EN_SHIFT); + + al_reg_write32_masked(®s->port_regs->port_link_ctrl, + 1 << PCIE_PORT_LINK_CTRL_LB_EN_SHIFT, + 1 << PCIE_PORT_LINK_CTRL_LB_EN_SHIFT); + + return 0; +} + +/** + * @brief exit local pipe loopback mode + * + * @param pcie_port pcie port handle + * @return 0 if no error found + */ +int +al_pcie_local_pipe_loopback_exit(struct al_pcie_port *pcie_port) +{ + struct al_pcie_regs *regs = pcie_port->regs; + + al_dbg("PCIe %d: Exit LOCAL PIPE Loopback mode", pcie_port->port_id); + + al_reg_write32_masked(®s->port_regs->pipe_loopback_ctrl, + 1 << PCIE_PORT_PIPE_LOOPBACK_CTRL_PIPE_LB_EN_SHIFT, + 0); + + al_reg_write32_masked(®s->port_regs->port_link_ctrl, + 1 << PCIE_PORT_LINK_CTRL_LB_EN_SHIFT, + 0); + return 0; +} + +/** enter remote loopback mode */ +int +al_pcie_remote_loopback_enter(struct al_pcie_port *pcie_port) +{ + struct al_pcie_regs *regs = pcie_port->regs; + + al_dbg("PCIe %d: Enter REMOTE Loopback mode", pcie_port->port_id); + + al_reg_write32_masked(®s->port_regs->port_link_ctrl, + 1 << PCIE_PORT_PIPE_LOOPBACK_CTRL_PIPE_LB_EN_SHIFT, + 1 << PCIE_PORT_PIPE_LOOPBACK_CTRL_PIPE_LB_EN_SHIFT); + + return 0; +} + +/** + * @brief exit remote loopback mode + * + * @param pcie_port pcie port handle + * @return 0 if no error found + */ +int +al_pcie_remote_loopback_exit(struct al_pcie_port *pcie_port) +{ + struct al_pcie_regs *regs = pcie_port->regs; + + al_dbg("PCIe %d: Exit REMOTE Loopback mode", pcie_port->port_id); + + al_reg_write32_masked(®s->port_regs->port_link_ctrl, + 1 << PCIE_PORT_LINK_CTRL_LB_EN_SHIFT, + 0); + return 0; +} diff --git a/sys/arm/annapurna/alpine/hal/al_hal_pcie.h b/sys/arm/annapurna/alpine/hal/al_hal_pcie.h new file mode 100644 index 000000000000..1ddc8eb70749 --- /dev/null +++ b/sys/arm/annapurna/alpine/hal/al_hal_pcie.h @@ -0,0 +1,1157 @@ +/*- +******************************************************************************** +Copyright (C) 2015 Annapurna Labs Ltd. + +This file may be licensed under the terms of the Annapurna Labs Commercial +License Agreement. + +Alternatively, this file can be distributed under the terms of the GNU General +Public License V2 as published by the Free Software Foundation and can be +found at http://www.gnu.org/licenses/gpl-2.0.html + +Alternatively, redistribution and use in source and binary forms, with or +without modification, are permitted provided that the following conditions are +met: + + * Redistributions of source code must retain the above copyright notice, +this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright +notice, this list of conditions and the following disclaimer in +the documentation and/or other materials provided with the +distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + +/** + * @defgroup grouppcie PCI Express Controller + * @{ + * @section overview Overview + * This header file provide API for the HAL driver of the pcie port, the driver + * provides the following functionalities: + * - Port initialization + * - Link operation + * - Interrupts transactions generation (Endpoint mode). + * - Configuration Access management functions + * - Internal Translation Unit programming + * + * This API does not provide the following: + * - PCIe transactions generation and reception (except interrupts as mentioned + * above) as this functionality is done by the port without need for sw + * intervention. + * - Configuration Access: those transactions are generated automatically by + * the port (ECAM or ATU mode) when the CPU issues memory transaction + * through the fabric toward the PCIe port. This API provides management + * function for controlling the Configuration Access type and bus destination + * - Interrupt Handling. + * - Message Generation: common used messages are automatically generated, also, + * the ATU generic mechanism for generating various kind of messages. + * - PCIe Port Management: both link and port power management features can be + * managed using the PCI/PCIe standard power management and PCIe capabilities + * registers. + * - PCIe link and protocol error handling: the feature can be managed using + * the Advanced Error Handling PCIe capability registers. + * + * @section flows Software Flows + * @subsection init Initialization + * - allocation and set zeros al_pcie_port and al_pcie_pf structures handles + * - call al_pcie_port_handle_init() with pointer to the allocated + * al_pcie_port handle, address of the port internal registers space, and + * port id. + * - call al_pcie_pf_handle_init() with pointer to the al_pcie_port handle + * and pf_number. + * - set the port mode, End-Point or Root-Compex (default). + * - set number of lanes connected to the controller. + * - enable the controller using the al_pcie_port_enable(). note that this + * function expect the virtual address of the PBS Functional Registers. + * - wait for 2000 South-bridge cycles. + * - prepare al_pcie_port_config_params and al_pcie_pf_config_params + * structures depending on chip, board and system configuration. + * for example, when using the port as root complex, the operating_mode + * field should be set to AL_PCIE_OPERATING_MODE_RC. In this example we + * prepare the following configuration: + * For port configuration + * - Root Complex mode + * - Set the Max Link Speed to Gen2 + * - Set the max lanes width to 2 (x2) + * - Disable reversal mode + * - Enable Snoops to support I/O Hardware cache coherency + * - Enable pcie core RAM parity + * - Enable pcie core AXI parity + * - Keep transaction layer default credits + * For pf configuration + * - No EP parameters + * - No SR-IOV parameters + * so the structures we prepare: + * @code + * - struct al_pcie_link_params link_params = { + * AL_PCIE_LINK_SPEED_GEN2, + * AL_FALSE, // disable reversal mode + * AL_PCIE_MPS_DEFAULT}; + * + * - struct al_pcie_port_config_params config_params = { + * &link_params, + * AL_TRUE, // enable Snoop for inbound memory transactions + * AL_TRUE, // enable pcie port RAM parity + * AL_TRUE, // enable pcie port AXI parity + * NULL, // use default latency/replay timers + * NULL, // use default gen2 pipe params + * NULL, // gen3_params not needed when max speed set to Gen2 + * NULL, // don't change TL credits + * NULL, // end point params not needed + * AL_FALSE, //no fast link + * AL_FALSE}; //return 0xFFFFFFFF for read transactions with + * //pci target error + * @endcode + * - now call al_pcie_port_config() with pcie_port and port_config_params + * @subsection link-init Link Initialization + * - once the port configured, we can start PCIe link: + * - call al_pcie_link_start() + * - call al_pcie_link_up_wait() + * - allocate al_pcie_link_status struct and call al_pcie_link_status() and + * check the link is established. + * + * @subsection cap Configuration Access Preparation + * - Once the link is established, we can prepare the port for pci + * configuration access, this stage requires system knowledge about the PCI + * buses enumeration. For example, if 5 buses were discovered on previously + * scanned root complex port, then we should start enumeration from bus 5 (PCI + * secondary bus), the sub-ordinary bus will be temporarily set to maximum + * value (255) until the scan process under this bus is finished, then it will + * updated to the maximum bus value found. So we use the following sequence: + * - call al_pcie_secondary_bus_set() with sec-bus = 5 + * - call al_pcie_subordinary_bus_set() with sub-bus = 255 + * + * @subsection cfg Configuration (Cfg) Access Generation + * - we assume using ECAM method, in this method, the software issues pcie Cfg + * access by accessing the ECAM memory space of the pcie port. For example, to + * issue 4 byte Cfg Read from bus B, Device D, Function F and register R, the + * software issues 4 byte read access to the following physical address + * ECAM base address of the port + (B << 20) + (D << 15) + (F << 12) + R. + * But, as the default size of the ECAM address space is less than + * needed full range (256MB), we modify the target_bus value prior to Cfg + * access in order make the port generate Cfg access with bus value set to the + * value of the target_bus rather than bits 27:20 of the physical address. + * - call al_pcie_target_bus_set() with target_bus set to the required bus of + * the next Cfg access to be issued, mask_target_bus will be set to 0xff. + * no need to call that function if the next Cfg access bus equals to the last + * value set to target_bus. + * + * @file al_hal_pcie.h + * @brief HAL Driver Header for the Annapurna Labs PCI Express port. + */ + +#ifndef _AL_HAL_PCIE_H_ +#define _AL_HAL_PCIE_H_ + +#include "al_hal_common.h" +#include "al_hal_pcie_regs.h" + +/******************************************************************************/ +/********************************* Constants **********************************/ +/******************************************************************************/ + +/** Inbound header credits sum - rev 0/1/2 */ +#define AL_PCIE_REV_1_2_IB_HCRD_SUM 97 +/** Inbound header credits sum - rev 3 */ +#define AL_PCIE_REV3_IB_HCRD_SUM 259 + +/** Number of extended registers */ +#define AL_PCIE_EX_REGS_NUM 40 + +/******************************************************************************* + * PCIe AER uncorrectable error bits + * To be used with the following functions: + * - al_pcie_aer_config + * - al_pcie_aer_uncorr_get_and_clear + ******************************************************************************/ +/** Data Link Protocol Error */ +#define AL_PCIE_AER_UNCORR_DLP_ERR AL_BIT(4) +/** Poisoned TLP */ +#define AL_PCIE_AER_UNCORR_POISIONED_TLP AL_BIT(12) +/** Flow Control Protocol Error */ +#define AL_PCIE_AER_UNCORR_FLOW_CTRL_ERR AL_BIT(13) +/** Completion Timeout */ +#define AL_PCIE_AER_UNCORR_COMPL_TO AL_BIT(14) +/** Completer Abort */ +#define AL_PCIE_AER_UNCORR_COMPL_ABT AL_BIT(15) +/** Unexpected Completion */ +#define AL_PCIE_AER_UNCORR_UNEXPCTED_COMPL AL_BIT(16) +/** Receiver Overflow */ +#define AL_PCIE_AER_UNCORR_RCV_OVRFLW AL_BIT(17) +/** Malformed TLP */ +#define AL_PCIE_AER_UNCORR_MLFRM_TLP AL_BIT(18) +/** ECRC Error */ +#define AL_PCIE_AER_UNCORR_ECRC_ERR AL_BIT(19) +/** Unsupported Request Error */ +#define AL_PCIE_AER_UNCORR_UNSUPRT_REQ_ERR AL_BIT(20) +/** Uncorrectable Internal Error */ +#define AL_PCIE_AER_UNCORR_INT_ERR AL_BIT(22) +/** AtomicOp Egress Blocked */ +#define AL_PCIE_AER_UNCORR_ATOMIC_EGRESS_BLK AL_BIT(24) + +/******************************************************************************* + * PCIe AER correctable error bits + * To be used with the following functions: + * - al_pcie_aer_config + * - al_pcie_aer_corr_get_and_clear + ******************************************************************************/ +/** Receiver Error */ +#define AL_PCIE_AER_CORR_RCV_ERR AL_BIT(0) +/** Bad TLP */ +#define AL_PCIE_AER_CORR_BAD_TLP AL_BIT(6) +/** Bad DLLP */ +#define AL_PCIE_AER_CORR_BAD_DLLP AL_BIT(7) +/** REPLAY_NUM Rollover */ +#define AL_PCIE_AER_CORR_RPLY_NUM_ROLL_OVR AL_BIT(8) +/** Replay Timer Timeout */ +#define AL_PCIE_AER_CORR_RPLY_TMR_TO AL_BIT(12) +/** Advisory Non-Fatal Error */ +#define AL_PCIE_AER_CORR_ADVISORY_NON_FTL_ERR AL_BIT(13) +/** Corrected Internal Error */ +#define AL_PCIE_AER_CORR_INT_ERR AL_BIT(14) + +/** The AER erroneous TLP header length [num DWORDs] */ +#define AL_PCIE_AER_ERR_TLP_HDR_NUM_DWORDS 4 + +/******************************************************************************/ +/************************* Data Structures and Types **************************/ +/******************************************************************************/ + +/** + * al_pcie_ib_hcrd_config: data structure internally used in order to config + * inbound posted/non-posted parameters. + * Note: it's required to have this structure in pcie_port handle since it has + * a state (required/not-required) which is determined by outbound + * outstanding configuration + */ +struct al_pcie_ib_hcrd_config { + /* Internally used - see 'al_pcie_ib_hcrd_os_ob_reads_config' */ + unsigned int nof_np_hdr; + + /* Internally used - see 'al_pcie_ib_hcrd_os_ob_reads_config' */ + unsigned int nof_p_hdr; +}; + +/* The Max Payload Size. Measured in bytes. + * DEFAULT: do not change the current MPS + */ +enum al_pcie_max_payload_size { + AL_PCIE_MPS_DEFAULT, + AL_PCIE_MPS_128 = 0, + AL_PCIE_MPS_256 = 1, + AL_PCIE_MPS_512 = 2, + AL_PCIE_MPS_1024 = 3, + AL_PCIE_MPS_2048 = 4, + AL_PCIE_MPS_4096 = 5, +}; + +/** + * al_pcie_port: data structure used by the HAL to handle a specific pcie port. + * this structure is allocated and set to zeros by the upper layer, then it is + * initialized by the al_pcie_port_handle_init() that should be called before any + * other function of this API. later, this handle passed to the API functions. + */ +struct al_pcie_port { + void __iomem *pcie_reg_base; + struct al_pcie_regs regs_ptrs; + struct al_pcie_regs *regs; + uint32_t *ex_regs_ptrs[AL_PCIE_EX_REGS_NUM]; + void *ex_regs; + void __iomem *pbs_regs; + + /* Revision ID */ + uint8_t rev_id; + unsigned int port_id; + uint8_t max_lanes; + uint8_t max_num_of_pfs; + + /* Internally used */ + struct al_pcie_ib_hcrd_config ib_hcrd_config; +}; + +/** + * al_pcie_pf: the pf handle, a data structure used to handle PF specific + * functionality. Initialized using "al_pcie_pf_handle_init()" + */ +struct al_pcie_pf { + unsigned int pf_num; + struct al_pcie_port *pcie_port; +}; + +/** Operating mode (endpoint, root complex) */ +enum al_pcie_operating_mode { + AL_PCIE_OPERATING_MODE_EP, + AL_PCIE_OPERATING_MODE_RC, + AL_PCIE_OPERATING_MODE_UNKNOWN +}; + +/* The maximum link speed, measured GT/s (Giga transfer / second) + * DEFAULT: do not change the current speed + * GEN1: 2.5 GT/s + * GEN2: 5 GT/s + * GEN3: 8GT/s + * + * Note: The values of this enumerator are important for proper behavior + */ +enum al_pcie_link_speed { + AL_PCIE_LINK_SPEED_DEFAULT, + AL_PCIE_LINK_SPEED_GEN1 = 1, + AL_PCIE_LINK_SPEED_GEN2 = 2, + AL_PCIE_LINK_SPEED_GEN3 = 3 +}; + +/** PCIe capabilities that supported by a specific port */ +struct al_pcie_max_capability { + al_bool end_point_mode_supported; + al_bool root_complex_mode_supported; + enum al_pcie_link_speed max_speed; + uint8_t max_lanes; + al_bool reversal_supported; + uint8_t atu_regions_num; + uint32_t atu_min_size; +}; + +/** PCIe link related parameters */ +struct al_pcie_link_params { + enum al_pcie_link_speed max_speed; + al_bool enable_reversal; + enum al_pcie_max_payload_size max_payload_size; + +}; + +/** PCIe gen2 link parameters */ +struct al_pcie_gen2_params { + al_bool tx_swing_low; /* set tx swing low when true, and tx swing full when false */ + al_bool tx_compliance_receive_enable; + al_bool set_deemphasis; +}; + +/** PCIe gen 3 standard per lane equalization parameters */ +struct al_pcie_gen3_lane_eq_params { + uint8_t downstream_port_transmitter_preset; + uint8_t downstream_port_receiver_preset_hint; + uint8_t upstream_port_transmitter_preset; + uint8_t upstream_port_receiver_preset_hint; +}; + +/** PCIe gen 3 equalization parameters */ +struct al_pcie_gen3_params { + al_bool perform_eq; + al_bool interrupt_enable_on_link_eq_request; + struct al_pcie_gen3_lane_eq_params *eq_params; /* array of lanes params */ + int eq_params_elements; /* number of elements in the eq_params array */ + + al_bool eq_disable; /* disables the equalization feature */ + al_bool eq_phase2_3_disable; /* Equalization Phase 2 and Phase 3 */ + /* Disable (RC mode only) */ + uint8_t local_lf; /* Full Swing (FS) Value for Gen3 Transmit Equalization */ + /* Value Range: 12 through 63 (decimal).*/ + + uint8_t local_fs; /* Low Frequency (LF) Value for Gen3 Transmit Equalization */ +}; + +/** Transport Layer credits parameters */ +struct al_pcie_tl_credits_params { +}; + +/** Various configuration features */ +struct al_pcie_features { + /** + * Enable MSI fix from the SATA to the PCIe EP + * Only valid for port 0, when enabled as EP + */ + al_bool sata_ep_msi_fix; +}; + +/** + * Inbound posted/non-posted header credits and outstanding outbound reads + * completion header configuration + * + * Constraints: + * - nof_cpl_hdr + nof_np_hdr + nof_p_hdr == + * AL_PCIE_REV_1_2_IB_HCRD_SUM/AL_PCIE_REV3_IB_HCRD_SUM + * - nof_cpl_hdr > 0 + * - nof_p_hdr > 0 + * - nof_np_hdr > 0 + */ +struct al_pcie_ib_hcrd_os_ob_reads_config { + /** Max number of outstanding outbound reads */ + uint8_t nof_outstanding_ob_reads; + + /** + * This value set the possible outstanding headers CMPLs , the core + * can get (the core always advertise infinite credits for CMPLs). + */ + unsigned int nof_cpl_hdr; + + /** + * This value set the possible outstanding headers reads (non-posted + * transactions), the core can get (it set the value in the init FC + * process). + */ + unsigned int nof_np_hdr; + + /** + * This value set the possible outstanding headers writes (posted + * transactions), the core can get (it set the value in the init FC + * process). + */ + unsigned int nof_p_hdr; +}; + +/** PCIe Ack/Nak Latency and Replay timers */ +struct al_pcie_latency_replay_timers { + uint16_t round_trip_lat_limit; + uint16_t replay_timer_limit; +}; + +/* SRIS KP counter values */ +struct al_pcie_sris_params { + /** set to AL_TRUE to use defaults and ignore the other parameters */ + al_bool use_defaults; + uint16_t kp_counter_gen3; /* only for Gen3 */ + uint16_t kp_counter_gen21; +}; + +/** Relaxed ordering params */ +struct al_pcie_relaxed_ordering_params { + al_bool enable_tx_relaxed_ordering; + al_bool enable_rx_relaxed_ordering; +}; + +/** PCIe port configuration parameters + * This structure includes the parameters that the HAL should apply to the port + * (by al_pcie_port_config()). + * The fields that are pointers (e.g. link_params) can be set to NULL, in that + * case, the al_pcie_port_config() will keep the current HW settings. + */ +struct al_pcie_port_config_params { + struct al_pcie_link_params *link_params; + al_bool enable_axi_snoop; + al_bool enable_ram_parity_int; + al_bool enable_axi_parity_int; + struct al_pcie_latency_replay_timers *lat_rply_timers; + struct al_pcie_gen2_params *gen2_params; + struct al_pcie_gen3_params *gen3_params; + struct al_pcie_tl_credits_params *tl_credits; + struct al_pcie_features *features; + /* Sets all internal timers to Fast Mode for speeding up simulation.*/ + al_bool fast_link_mode; + /* + * when true, the PCI unit will return Slave Error/Decoding Error to the master unit in case + * of error. when false, the value 0xFFFFFFFF will be returned without error indication. + */ + al_bool enable_axi_slave_err_resp; + struct al_pcie_sris_params *sris_params; + struct al_pcie_relaxed_ordering_params *relaxed_ordering_params; +}; + +/** BAR register configuration parameters (Endpoint Mode only) */ +struct al_pcie_ep_bar_params { + al_bool enable; + al_bool memory_space; /**< memory or io */ + al_bool memory_64_bit; /**< is memory space is 64 bit */ + al_bool memory_is_prefetchable; + uint64_t size; /* the bar size in bytes */ +}; + +/** PF config params (EP mode only) */ +struct al_pcie_pf_config_params { + al_bool cap_d1_d3hot_dis; + al_bool cap_flr_dis; + al_bool cap_aspm_dis; + al_bool bar_params_valid; + struct al_pcie_ep_bar_params bar_params[6]; + struct al_pcie_ep_bar_params exp_bar_params;/* expansion ROM BAR*/ +}; + +/** PCIe link status */ +struct al_pcie_link_status { + al_bool link_up; + enum al_pcie_link_speed speed; + uint8_t lanes; + uint8_t ltssm_state; +}; + +/** PCIe lane status */ +struct al_pcie_lane_status { + al_bool is_reset; + enum al_pcie_link_speed requested_speed; +}; + +/** PCIe MSIX capability configuration parameters */ +struct al_pcie_msix_params { + uint16_t table_size; + uint16_t table_offset; + uint8_t table_bar; + uint16_t pba_offset; + uint16_t pba_bar; +}; + +/** PCIE AER capability parameters */ +struct al_pcie_aer_params { + /** ECRC Generation Enable */ + al_bool ecrc_gen_en; + /** ECRC Check Enable */ + al_bool ecrc_chk_en; + + /** + * Enabled reporting of correctable errors (bit mask) + * See 'AL_PCIE_AER_CORR_*' for details + * 0 - no reporting at all + */ + unsigned int enabled_corr_err; + /** + * Enabled reporting of non-fatal uncorrectable errors (bit mask) + * See 'AL_PCIE_AER_UNCORR_*' for details + * 0 - no reporting at all + */ + unsigned int enabled_uncorr_non_fatal_err; + /** + * Enabled reporting of fatal uncorrectable errors (bit mask) + * See 'AL_PCIE_AER_UNCORR_*' for details + * 0 - no reporting at all + */ + unsigned int enabled_uncorr_fatal_err; +}; + +/******************************************************************************/ +/********************************** PCIe API **********************************/ +/******************************************************************************/ + +/*************************** PCIe Initialization API **************************/ + +/** + * Initializes a PCIe port handle structure. + * + * @param pcie_port an allocated, non-initialized instance. + * @param pcie_reg_base the virtual base address of the port internal + * registers + * @param pbs_reg_base the virtual base address of the pbs functional + * registers + * @param port_id the port id (used mainly for debug messages) + * + * @return 0 if no error found. + */ +int al_pcie_port_handle_init(struct al_pcie_port *pcie_port, + void __iomem *pcie_reg_base, + void __iomem *pbs_reg_base, + unsigned int port_id); + +/** + * Initializes a PCIe pf handle structure + * @param pcie_pf an allocated, non-initialized instance of pf handle + * @param pcie_port pcie port handle + * @param pf_num physical function number + * @return 0 if no error found + */ +int al_pcie_pf_handle_init( + struct al_pcie_pf *pcie_pf, + struct al_pcie_port *pcie_port, + unsigned int pf_num); + +/************************** Pre PCIe Port Enable API **************************/ + +/** + * @brief set current pcie operating mode (root complex or endpoint) + * This function can be called only before enabling the controller using + * al_pcie_port_enable(). + * + * @param pcie_port pcie port handle + * @param mode pcie operating mode + * + * @return 0 if no error found. + */ +int al_pcie_port_operating_mode_config(struct al_pcie_port *pcie_port, + enum al_pcie_operating_mode mode); + +/** + * Configure number of lanes connected to this port. + * This function can be called only before enabling the controller using al_pcie_port_enable(). + * + * @param pcie_port pcie port handle + * @param lanes number of lanes + * Note: this function must be called before any al_pcie_port_config() calls + * + * @return 0 if no error found. + */ +int al_pcie_port_max_lanes_set(struct al_pcie_port *pcie_port, uint8_t lanes); + +/** + * Set maximum physical function numbers + * @param pcie_port pcie port handle + * @param max_num_of_pfs number of physical functions + * Note: this function must be called before any al_pcie_pf_config() calls + */ +int al_pcie_port_max_num_of_pfs_set( + struct al_pcie_port *pcie_port, + uint8_t max_num_of_pfs); + +/** + * @brief Inbound posted/non-posted header credits and outstanding outbound + * reads completion header configuration + * + * @param pcie_port pcie port handle + * @param ib_hcrd_os_ob_reads_config + * Inbound header credits and outstanding outbound reads + * configuration + */ +int al_pcie_port_ib_hcrd_os_ob_reads_config( + struct al_pcie_port *pcie_port, + struct al_pcie_ib_hcrd_os_ob_reads_config *ib_hcrd_os_ob_reads_config); + +/** return PCIe operating mode + * @param pcie_port pcie port handle + * @return operating mode + */ +enum al_pcie_operating_mode al_pcie_operating_mode_get( + struct al_pcie_port *pcie_port); + +/**************************** PCIe Port Enable API ****************************/ + +/** Enable PCIe unit (deassert reset) + * + * @param pcie_port pcie port handle + * + * @return 0 if no error found. + */ +int al_pcie_port_enable(struct al_pcie_port *pcie_port); + +/** Disable PCIe unit (assert reset) + * + * @param pcie_port pcie port handle + */ +void al_pcie_port_disable(struct al_pcie_port *pcie_port); + +/** + * Port memory shutdown/up + * Caution: This function can be called only when the controller is disabled + * + * @param pcie_port pcie port handle + * @param enable memory shutdown enable or disable + * + */ +int al_pcie_port_memory_shutdown_set( + struct al_pcie_port *pcie_port, + al_bool enable); + +/** + * Check if port enabled or not + * @param pcie_port pcie port handle + * @return AL_TRUE of port enabled and AL_FALSE otherwise + */ +al_bool al_pcie_port_is_enabled(struct al_pcie_port *pcie_port); + +/*************************** PCIe Configuration API ***************************/ + +/** + * @brief configure pcie port (mode, link params, etc..) + * this function must be called before initializing the link + * + * @param pcie_port pcie port handle + * @param params configuration structure. + * + * @return 0 if no error found + */ +int al_pcie_port_config(struct al_pcie_port *pcie_port, + const struct al_pcie_port_config_params *params); + +/** + * @brief Configure a specific PF (EP params, sriov params, ...) + * this function must be called before any datapath transactions + * + * @param pcie_pf pcie pf handle + * @param params configuration structure. + * + * @return 0 if no error found + */ +int al_pcie_pf_config( + struct al_pcie_pf *pcie_pf, + const struct al_pcie_pf_config_params *params); + +/************************** PCIe Link Operations API **************************/ + +/** + * @brief start pcie link + * + * @param pcie_port pcie port handle + * + * @return 0 if no error found + */ +int al_pcie_link_start(struct al_pcie_port *pcie_port); + +/** + * @brief stop pcie link + * + * @param pcie_port pcie port handle + * + * @return 0 if no error found + */ +int al_pcie_link_stop(struct al_pcie_port *pcie_port); + +/** + * @brief trigger link-disable + * + * @param pcie_port pcie port handle + * @param disable AL_TRUE to disable the link and AL_FALSE to enable it + * + * Note: this functionality differs from "al_pcie_link_stop" as it's a spec + * functionality where both sides of the PCIe agrees to disable the link + * @return 0 if no error found + */ +int al_pcie_link_disable(struct al_pcie_port *pcie_port, al_bool disable); + +/** + * @brief wait for link up indication + * this function waits for link up indication, it polls LTSSM state until link is ready + * + * @param pcie_port pcie port handle + * @param timeout_ms maximum timeout in milli-seconds to wait for link up + * + * @return 0 if link up indication detected + * -ETIME if not. + */ +int al_pcie_link_up_wait(struct al_pcie_port *pcie_port, uint32_t timeout_ms); + +/** + * @brief get link status + * + * @param pcie_port pcie port handle + * @param status structure for link status + * + * @return 0 if no error found + */ +int al_pcie_link_status(struct al_pcie_port *pcie_port, struct al_pcie_link_status *status); + +/** + * @brief get lane status + * + * @param pcie_port + * pcie port handle + * @param lane + * PCIe lane + * @param status + * Pointer to returned structure for lane status + * + */ +void al_pcie_lane_status_get( + struct al_pcie_port *pcie_port, + unsigned int lane, + struct al_pcie_lane_status *status); + +/** + * @brief trigger hot reset + * + * @param pcie_port pcie port handle + * @param enable AL_TRUE to enable hot-reset and AL_FALSE to disable it + * + * @return 0 if no error found + */ +int al_pcie_link_hot_reset(struct al_pcie_port *pcie_port, al_bool enable); + +/** + * @brief trigger link-retain + * this function initiates Link retraining by directing the Physical Layer LTSSM + * to the Recovery state. If the LTSSM is already in Recovery or Configuration, + * re-entering Recovery is permitted but not required. + + * @param pcie_port pcie port handle + * + * Note: there's no need to disable initiating link-retrain + * @return 0 if no error found + */ +int al_pcie_link_retrain(struct al_pcie_port *pcie_port); + +/** + * @brief change port speed + * this function changes the port speed, it doesn't wait for link re-establishment + * + * @param pcie_port pcie port handle + * @param new_speed the new speed gen to set + * + * @return 0 if no error found + */ +int al_pcie_link_change_speed(struct al_pcie_port *pcie_port, enum al_pcie_link_speed new_speed); + +/* TODO: check if this function needed */ +int al_pcie_link_change_width(struct al_pcie_port *pcie_port, uint8_t width); + +/**************************** Post Link Start API *****************************/ + +/************************** Snoop Configuration API ***************************/ + +/** + * @brief configure pcie port axi snoop + * + * @param pcie_port pcie port handle + * @param enable_axi_snoop enable snoop. + * + * @return 0 if no error found + */ +/* TODO: Can this API be called after port enable? */ +int al_pcie_port_snoop_config(struct al_pcie_port *pcie_port, + al_bool enable_axi_snoop); + +/************************** Configuration Space API ***************************/ + +/** + * Configuration Space Access Through PCI-E_ECAM_Ext PASW (RC mode only) + */ + +/** + * @brief get base address of pci configuration space header + * @param pcie_pf pcie pf handle + * @param addr pointer for returned address; + * @return 0 if no error found + */ +int al_pcie_config_space_get( + struct al_pcie_pf *pcie_pf, + uint8_t __iomem **addr); + +/** + * Read data from the local configuration space + * + * @param pcie_pf pcie pf handle + * @param reg_offset Configuration space register offset + * @return Read data + */ +uint32_t al_pcie_local_cfg_space_read( + struct al_pcie_pf *pcie_pf, + unsigned int reg_offset); + +/** + * Write data to the local configuration space + * + * @param pcie_pf PCIe pf handle + * @param reg_offset Configuration space register offset + * @param data Data to write + * @param cs2 Should be AL_TRUE if dbi_cs2 must be asserted + * to enable writing to this register, according to + * the PCIe Core specifications + * @param allow_ro_wr AL_TRUE to allow writing into read-only regs + * + */ +void al_pcie_local_cfg_space_write( + struct al_pcie_pf *pcie_pf, + unsigned int reg_offset, + uint32_t data, + al_bool cs2, + al_bool allow_ro_wr); + +/** + * @brief set target_bus and mask_target_bus + * @param pcie_port pcie port handle + * @param target_bus + * @param mask_target_bus + * @return 0 if no error found + */ +int al_pcie_target_bus_set(struct al_pcie_port *pcie_port, + uint8_t target_bus, + uint8_t mask_target_bus); + +/** + * @brief get target_bus and mask_target_bus + * @param pcie_port pcie port handle + * @param target_bus + * @param mask_target_bus + * @return 0 if no error found + */ +int al_pcie_target_bus_get(struct al_pcie_port *pcie_port, + uint8_t *target_bus, + uint8_t *mask_target_bus); + +/** + * Set secondary bus number + * + * @param pcie_port pcie port handle + * @param secbus pci secondary bus number + * + * @return 0 if no error found. + */ +int al_pcie_secondary_bus_set(struct al_pcie_port *pcie_port, uint8_t secbus); + +/** + * Set subordinary bus number + * + * @param pcie_port pcie port handle + * @param subbus the highest bus number of all of the buses that can be reached + * downstream of the PCIE instance. + * + * @return 0 if no error found. + */ +int al_pcie_subordinary_bus_set(struct al_pcie_port *pcie_port,uint8_t subbus); + +/** + * @brief Enable/disable deferring incoming configuration requests until + * initialization is complete. When enabled, the core completes incoming + * configuration requests with a Configuration Request Retry Status. + * Other incoming Requests complete with Unsupported Request status. + * + * @param pcie_port pcie port handle + * @param en enable/disable + */ +void al_pcie_app_req_retry_set(struct al_pcie_port *pcie_port, al_bool en); + +/*************** Internal Address Translation Unit (ATU) API ******************/ + +enum al_pcie_atu_dir { + AL_PCIE_ATU_DIR_OUTBOUND = 0, + AL_PCIE_ATU_DIR_INBOUND = 1, +}; + +enum al_pcie_atu_tlp { + AL_PCIE_TLP_TYPE_MEM = 0, + AL_PCIE_TLP_TYPE_IO = 2, + AL_PCIE_TLP_TYPE_CFG0 = 4, + AL_PCIE_TLP_TYPE_CFG1 = 5, + AL_PCIE_TLP_TYPE_MSG = 0x10, + AL_PCIE_TLP_TYPE_RESERVED = 0x1f +}; + +enum al_pcie_atu_response { + AL_PCIE_RESPONSE_NORMAL = 0, + AL_PCIE_RESPONSE_UR = 1, + AL_PCIE_RESPONSE_CA = 2 +}; + +struct al_pcie_atu_region { + al_bool enable; + /* outbound or inbound */ + enum al_pcie_atu_dir direction; + /* region index */ + uint8_t index; + uint64_t base_addr; + /** limit marks the region's end address. only bits [39:0] are valid + * given the Alpine PoC maximum physical address space + */ + uint64_t limit; + /** the address that matches will be translated to this address + offset + */ + uint64_t target_addr; + al_bool invert_matching; + /* pcie tlp type*/ + enum al_pcie_atu_tlp tlp_type; + /* pcie frame header attr field*/ + uint8_t attr; + /** + * outbound specific params + */ + /* pcie message code */ + uint8_t msg_code; + al_bool cfg_shift_mode; + /** + * inbound specific params + */ + uint8_t bar_number; + /* BAR match mode, used in EP for MEM and IO tlps*/ + uint8_t match_mode; + /** + * For outbound: enables taking the function number of the translated + * TLP from the PCIe core. For inbound: enables ATU function match mode + * Note: this boolean is ignored in RC mode + */ + al_bool function_match_bypass_mode; + /** + * The function number to match/bypass (see previous parameter) + * Note: this parameter is ignored when previous param is FALSE + */ + uint8_t function_match_bypass_mode_number; + /* response code */ + enum al_pcie_atu_response response; + al_bool enable_attr_match_mode; + al_bool enable_msg_match_mode; + /** + * USE WITH CAUTION: setting this boolean to AL_TRUE allows setting the + * outbound ATU even after link is already started. DO NOT SET this + * boolean to AL_TRUE unless there have been NO traffic before calling + * al_pcie_atu_region_set function + */ + al_bool enforce_ob_atu_region_set; +}; + +/** + * @brief program internal ATU region entry + * @param pcie_port pcie port handle + * @param atu_region data structure that contains the region index and the + * translation parameters + * @return 0 if no error + */ +int al_pcie_atu_region_set( + struct al_pcie_port *pcie_port, + struct al_pcie_atu_region *atu_region); + +/** + * @brief get internal ATU is enabled and base/target addresses + * @param pcie_port pcie port handle + * @param direction input: iATU direction (IB/OB) + * @param index input: iATU index + * @param enable output: AL_TRUE if the iATU is enabled + * @param base_addr output: the iATU base address + * @param target_addr output: the iATU target address + */ +void al_pcie_atu_region_get_fields( + struct al_pcie_port *pcie_port, + enum al_pcie_atu_dir direction, uint8_t index, + al_bool *enable, uint64_t *base_addr, uint64_t *target_addr); + +/** + * @brief Configure axi io bar. + * every hit to this bar will override size to 4 bytes. + * @param pcie_port pcie port handle + * @param start the first address of the memory + * @param end the last address of the memory + * @return + */ +void al_pcie_axi_io_config( + struct al_pcie_port *pcie_port, + al_phys_addr_t start, + al_phys_addr_t end); + +/************** Interrupt generation (Endpoint mode Only) API *****************/ + +enum al_pcie_legacy_int_type{ + AL_PCIE_LEGACY_INTA = 0, + AL_PCIE_LEGACY_INTB, + AL_PCIE_LEGACY_INTC, + AL_PCIE_LEGACY_INTD +}; + +/** + * @brief generate INTx Assert/DeAssert Message + * @param pcie_pf pcie pf handle + * @param assert when true, Assert Message is sent + * @param type type of message (INTA, INTB, etc) + * @return 0 if no error found + */ +int al_pcie_legacy_int_gen( + struct al_pcie_pf *pcie_pf, + al_bool assert, + enum al_pcie_legacy_int_type type); + +/** + * @brief generate MSI interrupt + * @param pcie_pf pcie pf handle + * @param vector the vector index to send interrupt for. + * @return 0 if no error found + */ +int al_pcie_msi_int_gen(struct al_pcie_pf *pcie_pf, uint8_t vector); + +/** + * @brief configure MSIX capability + * @param pcie_pf pcie pf handle + * @param msix_params MSIX capability configuration parameters + * @return 0 if no error found + */ +int al_pcie_msix_config( + struct al_pcie_pf *pcie_pf, + struct al_pcie_msix_params *msix_params); + +/** + * @brief check whether MSIX capability is enabled + * @param pcie_pf pcie pf handle + * @return AL_TRUE if MSIX capability is enabled, AL_FALSE otherwise + */ +al_bool al_pcie_msix_enabled(struct al_pcie_pf *pcie_pf); + +/** + * @brief check whether MSIX capability is masked + * @param pcie_pf pcie pf handle + * @return AL_TRUE if MSIX capability is masked, AL_FALSE otherwise + */ +al_bool al_pcie_msix_masked(struct al_pcie_pf *pcie_pf); + +/******************** Advanced Error Reporting (AER) API **********************/ + +/** + * @brief configure AER capability + * @param pcie_pf pcie pf handle + * @param params AER capability configuration parameters + * @return 0 if no error found + */ +int al_pcie_aer_config( + struct al_pcie_pf *pcie_pf, + struct al_pcie_aer_params *params); + +/** + * @brief AER uncorretable errors get and clear + * @param pcie_pf pcie pf handle + * @return bit mask of uncorrectable errors - see 'AL_PCIE_AER_UNCORR_*' for + * details + */ +unsigned int al_pcie_aer_uncorr_get_and_clear(struct al_pcie_pf *pcie_pf); + +/** + * @brief AER corretable errors get and clear + * @param pcie_pf pcie pf handle + * @return bit mask of correctable errors - see 'AL_PCIE_AER_CORR_*' for + * details + */ +unsigned int al_pcie_aer_corr_get_and_clear(struct al_pcie_pf *pcie_pf); + +/** + * @brief AER get the header for the TLP corresponding to a detected error + * @param pcie_pf pcie pf handle + * @param hdr pointer to an array for getting the header + */ +void al_pcie_aer_err_tlp_hdr_get( + struct al_pcie_pf *pcie_pf, + uint32_t hdr[AL_PCIE_AER_ERR_TLP_HDR_NUM_DWORDS]); + +/******************** Loop-Back mode (RC and Endpoint modes) ******************/ + +/** + * @brief enter local pipe loop-back mode + * This mode will connect the pipe RX signals to TX. + * no need to start link when using this mode. + * Gen3 equalization must be disabled before enabling this mode + * The caller must make sure the port is ready to accept the TLPs it sends to + * itself. for example, BARs should be initialized before sending memory TLPs. + * + * @param pcie_port pcie port handle + * @return 0 if no error found + */ +int al_pcie_local_pipe_loopback_enter(struct al_pcie_port *pcie_port); + +/** + * @brief exit local pipe loopback mode + * + * @param pcie_port pcie port handle + * @return 0 if no error found + */ +int al_pcie_local_pipe_loopback_exit(struct al_pcie_port *pcie_port); + +/** + * @brief enter master remote loopback mode + * No need to configure the link partner to enter slave remote loopback mode + * as this should be done as response to special training sequence directives + * when master works in remote loopback mode. + * The caller must make sure the port is ready to accept the TLPs it sends to + * itself. for example, BARs should be initialized before sending memory TLPs. + * + * @param pcie_port pcie port handle + * @return 0 if no error found + */ +int al_pcie_remote_loopback_enter(struct al_pcie_port *pcie_port); + +/** + * @brief exit remote loopback mode + * + * @param pcie_port pcie port handle + * @return 0 if no error found + */ +int al_pcie_remote_loopback_exit(struct al_pcie_port *pcie_port); + +#endif +/** @} end of grouppcie group */ diff --git a/sys/arm/annapurna/alpine/hal/al_hal_pcie_axi_reg.h b/sys/arm/annapurna/alpine/hal/al_hal_pcie_axi_reg.h new file mode 100644 index 000000000000..04d4bfdbca3f --- /dev/null +++ b/sys/arm/annapurna/alpine/hal/al_hal_pcie_axi_reg.h @@ -0,0 +1,1501 @@ +/*- +******************************************************************************** +Copyright (C) 2015 Annapurna Labs Ltd. + +This file may be licensed under the terms of the Annapurna Labs Commercial +License Agreement. + +Alternatively, this file can be distributed under the terms of the GNU General +Public License V2 as published by the Free Software Foundation and can be +found at http://www.gnu.org/licenses/gpl-2.0.html + +Alternatively, redistribution and use in source and binary forms, with or +without modification, are permitted provided that the following conditions are +met: + + * Redistributions of source code must retain the above copyright notice, +this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright +notice, this list of conditions and the following disclaimer in +the documentation and/or other materials provided with the +distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + + +#ifndef __AL_PCIE_HAL_AXI_REG_H__ +#define __AL_PCIE_HAL_AXI_REG_H__ + +#include "al_hal_plat_types.h" + +#ifdef __cplusplus +extern "C" { +#endif +/* +* Unit Registers +*/ + + + +struct al_pcie_rev1_2_axi_ctrl { + /* [0x0] */ + uint32_t global; + uint32_t rsrvd_0; + /* [0x8] */ + uint32_t master_bctl; + /* [0xc] */ + uint32_t master_rctl; + /* [0x10] */ + uint32_t master_ctl; + /* [0x14] */ + uint32_t master_arctl; + /* [0x18] */ + uint32_t master_awctl; + /* [0x1c] */ + uint32_t slave_rctl; + /* [0x20] */ + uint32_t slv_wctl; + /* [0x24] */ + uint32_t slv_ctl; + /* [0x28] */ + uint32_t dbi_ctl; + /* [0x2c] */ + uint32_t vmid_mask; + uint32_t rsrvd[4]; +}; +struct al_pcie_rev3_axi_ctrl { + /* [0x0] */ + uint32_t global; + uint32_t rsrvd_0; + /* [0x8] */ + uint32_t master_bctl; + /* [0xc] */ + uint32_t master_rctl; + /* [0x10] */ + uint32_t master_ctl; + /* [0x14] */ + uint32_t master_arctl; + /* [0x18] */ + uint32_t master_awctl; + /* [0x1c] */ + uint32_t slave_rctl; + /* [0x20] */ + uint32_t slv_wctl; + /* [0x24] */ + uint32_t slv_ctl; + /* [0x28] */ + uint32_t dbi_ctl; + /* [0x2c] */ + uint32_t vmid_mask; +}; +struct al_pcie_rev1_axi_ob_ctrl { + /* [0x0] */ + uint32_t cfg_target_bus; + /* [0x4] */ + uint32_t cfg_control; + /* [0x8] */ + uint32_t io_start_l; + /* [0xc] */ + uint32_t io_start_h; + /* [0x10] */ + uint32_t io_limit_l; + /* [0x14] */ + uint32_t io_limit_h; + /* [0x18] */ + uint32_t msg_start_l; + /* [0x1c] */ + uint32_t msg_start_h; + /* [0x20] */ + uint32_t msg_limit_l; + /* [0x24] */ + uint32_t msg_limit_h; + uint32_t rsrvd[6]; +}; +struct al_pcie_rev2_axi_ob_ctrl { + /* [0x0] */ + uint32_t cfg_target_bus; + /* [0x4] */ + uint32_t cfg_control; + /* [0x8] */ + uint32_t io_start_l; + /* [0xc] */ + uint32_t io_start_h; + /* [0x10] */ + uint32_t io_limit_l; + /* [0x14] */ + uint32_t io_limit_h; + /* [0x18] */ + uint32_t msg_start_l; + /* [0x1c] */ + uint32_t msg_start_h; + /* [0x20] */ + uint32_t msg_limit_l; + /* [0x24] */ + uint32_t msg_limit_h; + /* + * [0x28] this register override the VMID field in the AXUSER [19:4], + * for the AXI master port. + */ + uint32_t vmid_reg_ovrd; + /* [0x2c] this register override the ADDR[63:32] AXI master port. */ + uint32_t addr_high_reg_ovrd_value; + /* [0x30] this register override the ADDR[63:32] AXI master port. */ + uint32_t addr_high_reg_ovrd_sel; + /* + * [0x34] Define the size to replace in the master axi address bits + * [63:32] + */ + uint32_t addr_size_replace; + uint32_t rsrvd[2]; +}; +struct al_pcie_rev3_axi_ob_ctrl { + /* [0x0] */ + uint32_t cfg_target_bus; + /* [0x4] */ + uint32_t cfg_control; + /* [0x8] */ + uint32_t io_start_l; + /* [0xc] */ + uint32_t io_start_h; + /* [0x10] */ + uint32_t io_limit_l; + /* [0x14] */ + uint32_t io_limit_h; + /* [0x18] */ + uint32_t aw_msg_start_l; + /* [0x1c] */ + uint32_t aw_msg_start_h; + /* [0x20] */ + uint32_t aw_msg_limit_l; + /* [0x24] */ + uint32_t aw_msg_limit_h; + /* [0x28] */ + uint32_t ar_msg_start_l; + /* [0x2c] */ + uint32_t ar_msg_start_h; + /* [0x30] */ + uint32_t ar_msg_limit_l; + /* [0x34] */ + uint32_t ar_msg_limit_h; + /* [0x38] */ + uint32_t io_addr_mask_h; + /* [0x3c] */ + uint32_t ar_msg_addr_mask_h; + /* [0x40] */ + uint32_t aw_msg_addr_mask_h; + /* + * [0x44] this register override the VMID field in the AXUSER [19:4], + * for the AXI master port. + */ + uint32_t vmid_reg_ovrd; + /* [0x48] this register override the ADDR[63:32] AXI master port. */ + uint32_t addr_high_reg_ovrd_value; + /* [0x4c] this register override the ADDR[63:32] AXI master port. */ + uint32_t addr_high_reg_ovrd_sel; + /* + * [0x50] Define the size to replace in the master axi address bits + * [63:32] + */ + uint32_t addr_size_replace; + uint32_t rsrvd[3]; +}; +struct al_pcie_revx_axi_msg { + /* [0x0] */ + uint32_t addr_high; + /* [0x4] */ + uint32_t addr_low; + /* [0x8] */ + uint32_t type; +}; +struct al_pcie_revx_axi_pcie_status { + /* [0x0] */ + uint32_t debug; +}; +struct al_pcie_revx_axi_rd_parity { + /* [0x0] */ + uint32_t log_high; + /* [0x4] */ + uint32_t log_low; +}; +struct al_pcie_revx_axi_rd_cmpl { + /* [0x0] */ + uint32_t cmpl_log_high; + /* [0x4] */ + uint32_t cmpl_log_low; +}; +struct al_pcie_revx_axi_rd_to { + /* [0x0] */ + uint32_t to_log_high; + /* [0x4] */ + uint32_t to_log_low; +}; +struct al_pcie_revx_axi_wr_cmpl { + /* [0x0] */ + uint32_t wr_cmpl_log_high; + /* [0x4] */ + uint32_t wr_cmpl_log_low; +}; +struct al_pcie_revx_axi_wr_to { + /* [0x0] */ + uint32_t wr_to_log_high; + /* [0x4] */ + uint32_t wr_to_log_low; +}; +struct al_pcie_revx_axi_pcie_global { + /* [0x0] */ + uint32_t conf; +}; +struct al_pcie_rev1_2_axi_status { + /* [0x0] */ + uint32_t lane0; + /* [0x4] */ + uint32_t lane1; + /* [0x8] */ + uint32_t lane2; + /* [0xc] */ + uint32_t lane3; +}; +struct al_pcie_rev3_axi_status { + /* [0x0] */ + uint32_t lane0; + /* [0x4] */ + uint32_t lane1; + /* [0x8] */ + uint32_t lane2; + /* [0xc] */ + uint32_t lane3; + /* [0x10] */ + uint32_t lane4; + /* [0x14] */ + uint32_t lane5; + /* [0x18] */ + uint32_t lane6; + /* [0x1c] */ + uint32_t lane7; + uint32_t rsrvd[8]; +}; +struct al_pcie_rev1_2_axi_conf { + /* [0x0] */ + uint32_t zero_lane0; + /* [0x4] */ + uint32_t zero_lane1; + /* [0x8] */ + uint32_t zero_lane2; + /* [0xc] */ + uint32_t zero_lane3; + /* [0x10] */ + uint32_t one_lane0; + /* [0x14] */ + uint32_t one_lane1; + /* [0x18] */ + uint32_t one_lane2; + /* [0x1c] */ + uint32_t one_lane3; +}; +struct al_pcie_rev3_axi_conf { + /* [0x0] */ + uint32_t zero_lane0; + /* [0x4] */ + uint32_t zero_lane1; + /* [0x8] */ + uint32_t zero_lane2; + /* [0xc] */ + uint32_t zero_lane3; + /* [0x10] */ + uint32_t zero_lane4; + /* [0x14] */ + uint32_t zero_lane5; + /* [0x18] */ + uint32_t zero_lane6; + /* [0x1c] */ + uint32_t zero_lane7; + /* [0x20] */ + uint32_t one_lane0; + /* [0x24] */ + uint32_t one_lane1; + /* [0x28] */ + uint32_t one_lane2; + /* [0x2c] */ + uint32_t one_lane3; + /* [0x30] */ + uint32_t one_lane4; + /* [0x34] */ + uint32_t one_lane5; + /* [0x38] */ + uint32_t one_lane6; + /* [0x3c] */ + uint32_t one_lane7; + uint32_t rsrvd[16]; +}; + +struct al_pcie_revx_axi_msg_attr_axuser_table { + /* [0x0] 4 option, the index comes from */ + uint32_t entry_vec; +}; + +struct al_pcie_revx_axi_parity { + /* [0x0] */ + uint32_t en_axi; + /* [0x4] */ + uint32_t status_axi; +}; +struct al_pcie_revx_axi_pos_logged { + /* [0x0] */ + uint32_t error_low; + /* [0x4] */ + uint32_t error_high; +}; +struct al_pcie_revx_axi_ordering { + /* [0x0] */ + uint32_t pos_cntl; +}; +struct al_pcie_revx_axi_link_down { + /* [0x0] */ + uint32_t reset_extend; +}; +struct al_pcie_revx_axi_pre_configuration { + /* [0x0] */ + uint32_t pcie_core_setup; +}; +struct al_pcie_revx_axi_init_fc { + /* + * Revision 1/2: + * [0x0] The sum of all the fields below must be 97 + * Revision 3: + * [0x0] The sum of all the fields below must be 259 + * */ + uint32_t cfg; +}; +struct al_pcie_revx_axi_int_grp_a_axi { + /* + * [0x0] Interrupt Cause Register + * Set by hardware. + * - If MSI-X is enabled, and auto_clear control bit =TRUE, + * automatically cleared after MSI-X message associated with this + * specific interrupt bit is sent (MSI-X acknowledge is received). + * - Software can set a bit in this register by writing 1 to the + * associated bit in the Interrupt Cause Set register. + * Write-0 clears a bit. Write-1 has no effect. + * - On CPU Read -- If clear_on_read control bit =TRUE, automatically + * cleared (all bits are cleared). + * When there is a conflict, and on the same clock cycle hardware tries + * to set a bit in the Interrupt Cause register, the specific bit is set + * to ensure the interrupt indication is not lost. + */ + uint32_t cause; + uint32_t rsrvd_0; + /* + * [0x8] Interrupt Cause Set Register + * Writing 1 to a bit in this register sets its corresponding cause bit, + * enabling software to generate a hardware interrupt. Write 0 has no + * effect. + */ + uint32_t cause_set; + uint32_t rsrvd_1; + /* + * [0x10] Interrupt Mask Register + * If Auto-mask control bit =TRUE, automatically set to 1 after MSI-X + * message associate to the associate interrupt bit is sent (AXI write + * acknowledge is received) + */ + uint32_t mask; + uint32_t rsrvd_2; + /* + * [0x18] Interrupt Mask Clear Register + * Used when auto-mask control bit=True. It enables the CPU to clear a + * specific bit, preventing a scenario in which the CPU overrides + * another bit with 1 (old value) that hardware has just cleared to 0. + * Writing 0 to this register clears its corresponding mask bit. Write 1 + * has no effect. + */ + uint32_t mask_clear; + uint32_t rsrvd_3; + /* + * [0x20] Interrupt Status Register + * This register latches the status of the interrupt source. + */ + uint32_t status; + uint32_t rsrvd_4; + /* [0x28] Interrupt Control Register */ + uint32_t control; + uint32_t rsrvd_5; + /* + * [0x30] Interrupt Mask Register + * Each bit in this register masks the corresponding cause bit for + * generating an Abort signal. Its default value is determined by unit + * instantiation. + * Abort = Wire-OR of Cause & !Interrupt_Abort_Mask). + * This register provides an error handling configuration for error + * interrupts. + */ + uint32_t abort_mask; + uint32_t rsrvd_6; + /* + * [0x38] Interrupt Log Register + * Each bit in this register masks the corresponding cause bit for + * capturing the log registers. Its default value is determined by unit + * instantiatio.n + * Log_capture = Wire-OR of Cause & !Interrupt_Log_Mask). + * This register provides an error handling configuration for error + * interrupts. + */ + uint32_t log_mask; + uint32_t rsrvd; +}; + +struct al_pcie_rev3_axi_eq_ovrd_tx_rx_values { + /* [0x0] */ + uint32_t cfg_0; + /* [0x4] */ + uint32_t cfg_1; + /* [0x8] */ + uint32_t cfg_2; + /* [0xc] */ + uint32_t cfg_3; + /* [0x10] */ + uint32_t cfg_4; + /* [0x14] */ + uint32_t cfg_5; + /* [0x18] */ + uint32_t cfg_6; + /* [0x1c] */ + uint32_t cfg_7; + /* [0x20] */ + uint32_t cfg_8; + /* [0x24] */ + uint32_t cfg_9; + /* [0x28] */ + uint32_t cfg_10; + /* [0x2c] */ + uint32_t cfg_11; + uint32_t rsrvd[12]; +}; +struct al_pcie_rev3_axi_dbg_outstading_trans_axi { + /* [0x0] */ + uint32_t read_master_counter; + /* [0x4] */ + uint32_t write_master_counter; + /* [0x8] */ + uint32_t read_slave_counter; +}; +struct al_pcie_revx_axi_device_id { + /* [0x0] */ + uint32_t device_rev_id; +}; +struct al_pcie_revx_axi_power_mang_ovrd_cntl { + /* [0x0] */ + uint32_t cfg_static_nof_elidle; + /* [0x4] */ + uint32_t cfg_l0s_wait_ovrd; + /* [0x8] */ + uint32_t cfg_l12_wait_ovrd; + /* [0xc] */ + uint32_t cfg_l0s_delay_in_p0s; + /* [0x10] */ + uint32_t cfg_l12_delay_in_p12; + /* [0x14] */ + uint32_t cfg_l12_delay_in_p12_clk_rst; + /* [0x18] */ + uint32_t cfg_delay_powerdown_bus; + uint32_t rsrvd; +}; +struct al_pcie_rev3_axi_dbg_outstading_trans_axi_write { + /* [0x0] */ + uint32_t slave_counter; +}; +struct al_pcie_rev3_axi_attr_ovrd { + /* + * [0x0] In case of hit on the io message bar and + * a*_cfg_outbound_msg_no_snoop_n, the message attributes come from this + * register + */ + uint32_t write_msg_ctrl_0; + /* [0x4] in case of message this register set the below attributes */ + uint32_t write_msg_ctrl_1; + /* + * [0x8] In case of hit on the io message bar and + * a*_cfg_outbound_msg_no_snoop_n, the message attributes come from this + * register + */ + uint32_t read_msg_ctrl_0; + /* [0xc] in case of message this register set the below attributes */ + uint32_t read_msg_ctrl_1; + /* [0x10] in case of message this register set the below attributes */ + uint32_t pf_sel; + uint32_t rsrvd[3]; +}; +struct al_pcie_rev3_axi_pf_axi_attr_ovrd { + /* + * [0x0] In case of hit on the io message bar and + * a*_cfg_outbound_msg_no_snoop_n, the message attributes come from this + * register + */ + uint32_t func_ctrl_0; + /* [0x4] in case of message this register set the below attributes */ + uint32_t func_ctrl_1; + /* + * [0x8] In case of hit on the io message bar and + * a*_cfg_outbound_msg_no_snoop_n, the message attributes come from this + * register + */ + uint32_t func_ctrl_2; + /* + * [0xc] In case of hit on the io message bar and + * a*_cfg_outbound_msg_no_snoop_n, the message attributes come from this + * register + */ + uint32_t func_ctrl_3; + /* + * [0x10] In case of hit on the io message bar and + * a*_cfg_outbound_msg_no_snoop_n, the message attributes come from this + * register + */ + uint32_t func_ctrl_4; + /* + * [0x14] In case of hit on the io message bar and + * a*_cfg_outbound_msg_no_snoop_n, the message attributes come from this + * register + */ + uint32_t func_ctrl_5; + /* + * [0x18] In case of hit on the io message bar and + * a*_cfg_outbound_msg_no_snoop_n, the message attributes come from this + * register + */ + uint32_t func_ctrl_6; + /* + * [0x1c] In case of hit on the io message bar and + * a*_cfg_outbound_msg_no_snoop_n, the message attributes come from this + * register + */ + uint32_t func_ctrl_7; + /* + * [0x20] In case of hit on the io message bar and + * a*_cfg_outbound_msg_no_snoop_n, the message attributes come from this + * register + */ + uint32_t func_ctrl_8; + /* + * [0x24] In case of hit on the io message bar and + * a*_cfg_outbound_msg_no_snoop_n, the message attributes come from this + * register + */ + uint32_t func_ctrl_9; + uint32_t rsrvd[6]; +}; + +struct al_pcie_revx_axi_regs { + uint32_t rsrvd_0[91]; + struct al_pcie_revx_axi_device_id device_id; /* [0x16c] */ +}; + +struct al_pcie_rev1_axi_regs { + struct al_pcie_rev1_2_axi_ctrl ctrl; /* [0x0] */ + struct al_pcie_rev1_axi_ob_ctrl ob_ctrl; /* [0x40] */ + uint32_t rsrvd_0[4]; + struct al_pcie_revx_axi_msg msg; /* [0x90] */ + struct al_pcie_revx_axi_pcie_status pcie_status; /* [0x9c] */ + struct al_pcie_revx_axi_rd_parity rd_parity; /* [0xa0] */ + struct al_pcie_revx_axi_rd_cmpl rd_cmpl; /* [0xa8] */ + struct al_pcie_revx_axi_rd_to rd_to; /* [0xb0] */ + struct al_pcie_revx_axi_wr_cmpl wr_cmpl; /* [0xb8] */ + struct al_pcie_revx_axi_wr_to wr_to; /* [0xc0] */ + struct al_pcie_revx_axi_pcie_global pcie_global; /* [0xc8] */ + struct al_pcie_rev1_2_axi_status status; /* [0xcc] */ + struct al_pcie_rev1_2_axi_conf conf; /* [0xdc] */ + struct al_pcie_revx_axi_parity parity; /* [0xfc] */ + struct al_pcie_revx_axi_pos_logged pos_logged; /* [0x104] */ + struct al_pcie_revx_axi_ordering ordering; /* [0x10c] */ + struct al_pcie_revx_axi_link_down link_down; /* [0x110] */ + struct al_pcie_revx_axi_pre_configuration pre_configuration; /* [0x114] */ + struct al_pcie_revx_axi_init_fc init_fc; /* [0x118] */ + uint32_t rsrvd_1[20]; + struct al_pcie_revx_axi_device_id device_id; /* [0x16c] */ + uint32_t rsrvd_2[36]; + struct al_pcie_revx_axi_int_grp_a_axi int_grp_a; /* [0x200] */ +}; + +struct al_pcie_rev2_axi_regs { + struct al_pcie_rev1_2_axi_ctrl ctrl; /* [0x0] */ + struct al_pcie_rev2_axi_ob_ctrl ob_ctrl; /* [0x40] */ + uint32_t rsrvd_0[4]; + struct al_pcie_revx_axi_msg msg; /* [0x90] */ + struct al_pcie_revx_axi_pcie_status pcie_status; /* [0x9c] */ + struct al_pcie_revx_axi_rd_parity rd_parity; /* [0xa0] */ + struct al_pcie_revx_axi_rd_cmpl rd_cmpl; /* [0xa8] */ + struct al_pcie_revx_axi_rd_to rd_to; /* [0xb0] */ + struct al_pcie_revx_axi_wr_cmpl wr_cmpl; /* [0xb8] */ + struct al_pcie_revx_axi_wr_to wr_to; /* [0xc0] */ + struct al_pcie_revx_axi_pcie_global pcie_global; /* [0xc8] */ + struct al_pcie_rev1_2_axi_status status; /* [0xcc] */ + struct al_pcie_rev1_2_axi_conf conf; /* [0xdc] */ + struct al_pcie_revx_axi_parity parity; /* [0xfc] */ + struct al_pcie_revx_axi_pos_logged pos_logged; /* [0x104] */ + struct al_pcie_revx_axi_ordering ordering; /* [0x10c] */ + struct al_pcie_revx_axi_link_down link_down; /* [0x110] */ + struct al_pcie_revx_axi_pre_configuration pre_configuration; /* [0x114] */ + struct al_pcie_revx_axi_init_fc init_fc; /* [0x118] */ + uint32_t rsrvd_1[20]; + struct al_pcie_revx_axi_device_id device_id; /* [0x16c] */ + uint32_t rsrvd_2[36]; + struct al_pcie_revx_axi_int_grp_a_axi int_grp_a; /* [0x200] */ +}; + +struct al_pcie_rev3_axi_regs { + struct al_pcie_rev3_axi_ctrl ctrl; /* [0x0] */ + struct al_pcie_rev3_axi_ob_ctrl ob_ctrl;/* [0x30] */ + struct al_pcie_revx_axi_msg msg; /* [0x90] */ + struct al_pcie_revx_axi_pcie_status pcie_status; /* [0x9c] */ + struct al_pcie_revx_axi_rd_parity rd_parity; /* [0xa0] */ + struct al_pcie_revx_axi_rd_cmpl rd_cmpl; /* [0xa8] */ + struct al_pcie_revx_axi_rd_to rd_to; /* [0xb0] */ + struct al_pcie_revx_axi_wr_cmpl wr_cmpl; /* [0xb8] */ + struct al_pcie_revx_axi_wr_to wr_to; /* [0xc0] */ + struct al_pcie_revx_axi_pcie_global pcie_global; /* [0xc8] */ + uint32_t rsrvd_0; + struct al_pcie_revx_axi_parity parity; /* [0xd0] */ + struct al_pcie_revx_axi_pos_logged pos_logged; /* [0xd8] */ + struct al_pcie_revx_axi_ordering ordering; /* [0xe0] */ + struct al_pcie_revx_axi_link_down link_down; /* [0xe4] */ + struct al_pcie_revx_axi_pre_configuration pre_configuration;/* [0xe8] */ + struct al_pcie_revx_axi_init_fc init_fc; /* [0xec] */ + uint32_t rsrvd_1[4]; + struct al_pcie_rev3_axi_eq_ovrd_tx_rx_values eq_ovrd_tx_rx_values;/* [0x100] */ + struct al_pcie_rev3_axi_dbg_outstading_trans_axi dbg_outstading_trans_axi;/* [0x160] */ + struct al_pcie_revx_axi_device_id device_id; /* [0x16c] */ + struct al_pcie_revx_axi_power_mang_ovrd_cntl power_mang_ovrd_cntl;/* [0x170] */ + struct al_pcie_rev3_axi_dbg_outstading_trans_axi_write dbg_outstading_trans_axi_write;/* [0x190] */ + uint32_t rsrvd_2[3]; + struct al_pcie_rev3_axi_attr_ovrd axi_attr_ovrd; /* [0x1a0] */ + struct al_pcie_rev3_axi_pf_axi_attr_ovrd pf_axi_attr_ovrd[REV3_MAX_NUM_OF_PFS];/* [0x1c0] */ + uint32_t rsrvd_3[64]; + struct al_pcie_rev3_axi_status status; /* [0x3c0] */ + struct al_pcie_rev3_axi_conf conf; /* [0x400] */ + uint32_t rsrvd_4[32]; + struct al_pcie_revx_axi_msg_attr_axuser_table msg_attr_axuser_table; /* [0x500] */ + uint32_t rsrvd_5[191]; + struct al_pcie_revx_axi_int_grp_a_axi int_grp_a; /* [0x800] */ +}; + +/* +* Registers Fields +*/ + +/**** Device ID register ****/ +#define PCIE_AXI_DEVICE_ID_REG_DEV_ID_MASK AL_FIELD_MASK(31, 16) +#define PCIE_AXI_DEVICE_ID_REG_DEV_ID_SHIFT 16 +#define PCIE_AXI_DEVICE_ID_REG_DEV_ID_X4 (0 << PCIE_AXI_DEVICE_ID_REG_DEV_ID_SHIFT) +#define PCIE_AXI_DEVICE_ID_REG_DEV_ID_X8 (2 << PCIE_AXI_DEVICE_ID_REG_DEV_ID_SHIFT) +#define PCIE_AXI_DEVICE_ID_REG_REV_ID_MASK AL_FIELD_MASK(15, 0) +#define PCIE_AXI_DEVICE_ID_REG_REV_ID_SHIFT 0 + +/**** Global register ****/ +/* + * Not in use. + * Disable completion after inbound posted ordering enforcement to AXI bridge. + */ +#define PCIE_AXI_CTRL_GLOBAL_CPL_AFTER_P_ORDER_DIS (1 << 0) +/* + * Not in use. + * Enforce completion after write ordering on AXI bridge. Only for CPU read + * requests. + */ +#define PCIE_AXI_CTRL_GLOBAL_CPU_CPL_ONLY_EN (1 << 1) +/* When linked down, map all transactions to PCIe to DEC ERR. */ +#define PCIE_AXI_CTRL_GLOBAL_BLOCK_PCIE_SLAVE_EN (1 << 2) +/* + * Wait for the NIC to flush before enabling reset to the PCIe core, on a link + * down event. + */ +#define PCIE_AXI_CTRL_GLOBAL_WAIT_SLV_FLUSH_EN (1 << 3) +/* + * When the BME is cleared and this bit is set, it causes all transactions that + * do not get to the PCIe to be returned with DECERR. + */ +#define PCIE_REV1_2_AXI_CTRL_GLOBAL_MEM_BAR_MAP_TO_ERR (1 << 4) +#define PCIE_REV3_AXI_CTRL_GLOBAL_MEM_BAR_MAP_TO_ERR_MASK 0x00000FF0 +#define PCIE_REV3_AXI_CTRL_GLOBAL_MEM_BAR_MAP_TO_ERR_SHIFT 4 +/* + * Wait for the DBI port (the port that enables access to the internal PCIe core + * registers) to flush before enabling reset to the PCIe core on link down + * event. + */ +#define PCIE_REV1_2_AXI_CTRL_GLOBAL_WAIT_DBI_FLUSH_EN (1 << 5) +#define PCIE_REV3_AXI_CTRL_GLOBAL_WAIT_DBI_FLUSH_EN (1 << 12) +/* Reserved. Read undefined; must read as zeros. */ +#define PCIE_REV3_AXI_CTRL_GLOBAL_CFG_FLUSH_DBI_AXI (1 << 13) +/* Reserved. Read undefined; must read as zeros. */ +#define PCIE_REV3_AXI_CTRL_GLOBAL_CFG_HOLD_LNKDWN_RESET_SW (1 << 14) +/* Reserved. Read undefined; must read as zeros. */ +#define PCIE_REV3_AXI_CTRL_GLOBAL_CFG_MASK_CORECLK_ACT_CLK_RST (1 << 15) +/* Reserved. Read undefined; must read as zeros. */ +#define PCIE_REV3_AXI_CTRL_GLOBAL_CFG_MASK_RXELECIDLE_CLK_RST (1 << 16) +/* Reserved. Read undefined; must read as zeros. */ +#define PCIE_REV3_AXI_CTRL_GLOBAL_CFG_ALLOW_NONSTICKY_RESET_WHEN_LNKDOWN_CLK_RST (1 << 17) + +/* + * When set, adds parity on the write and read address channels, and write data + * channel. + */ +#define PCIE_REV1_2_AXI_CTRL_GLOBAL_PARITY_CALC_EN_MSTR (1 << 16) +#define PCIE_REV3_AXI_CTRL_GLOBAL_PARITY_CALC_EN_MSTR (1 << 18) +/* When set, enables parity check on the read data. */ +#define PCIE_REV1_2_AXI_CTRL_GLOBAL_PARITY_ERR_EN_RD (1 << 17) +#define PCIE_REV3_AXI_CTRL_GLOBAL_PARITY_ERR_EN_RD (1 << 19) +/* + * When set, adds parity on the RD data channel. + */ +#define PCIE_REV1_2_AXI_CTRL_GLOBAL_PARITY_CALC_EN_SLV (1 << 18) +#define PCIE_REV3_AXI_CTRL_GLOBAL_PARITY_CALC_EN_SLV (1 << 20) +/* + * When set, enables parity check on the write data. + */ +#define PCIE_REV1_2_AXI_CTRL_GLOBAL_PARITY_ERR_EN_WR (1 << 19) +#define PCIE_REV3_AXI_CTRL_GLOBAL_PARITY_ERR_EN_WR (1 << 21) +/* + * When set, error track for timeout and parity is disabled, i.e., the logged + * address for parity/timeout/cmpl errors on the AXI master port is not valid, + * and timeout and completion errors check are disabled. + */ +#define PCIE_REV1_2_AXI_CTRL_GLOBAL_ERROR_TRACK_DIS (1 << 20) +#define PCIE_REV3_AXI_CTRL_GLOBAL_ERROR_TRACK_DIS (1 << 22) + +/**** Master_Arctl register ****/ +/* override arcache */ +#define PCIE_AXI_CTRL_MASTER_ARCTL_OVR_ARCACHE (1 << 0) +/* arache value */ +#define PCIE_AXI_CTRL_MASTER_ARCTL_ARACHE_VA_MASK 0x0000001E +#define PCIE_AXI_CTRL_MASTER_ARCTL_ARACHE_VA_SHIFT 1 +/* arprot override */ +#define PCIE_AXI_CTRL_MASTER_ARCTL_ARPROT_OVR (1 << 5) +/* arprot value */ +#define PCIE_AXI_CTRL_MASTER_ARCTL_ARPROT_VALUE_MASK 0x000001C0 +#define PCIE_AXI_CTRL_MASTER_ARCTL_ARPROT_VALUE_SHIFT 6 +/* vmid val */ +#define PCIE_AXI_CTRL_MASTER_ARCTL_VMID_VAL_MASK 0x01FFFE00 +#define PCIE_AXI_CTRL_MASTER_ARCTL_VMID_VAL_SHIFT 9 +/* IPA value */ +#define PCIE_AXI_CTRL_MASTER_ARCTL_IPA_VAL (1 << 25) +/* overide snoop inidcation, if not set take it from mstr_armisc ... */ +#define PCIE_AXI_CTRL_MASTER_ARCTL_OVR_SNOOP (1 << 26) +/* +snoop indication value when override */ +#define PCIE_AXI_CTRL_MASTER_ARCTL_SNOOP (1 << 27) +/* +arqos value */ +#define PCIE_AXI_CTRL_MASTER_ARCTL_ARQOS_MASK 0xF0000000 +#define PCIE_AXI_CTRL_MASTER_ARCTL_ARQOS_SHIFT 28 + +/**** Master_Awctl register ****/ +/* override arcache */ +#define PCIE_AXI_CTRL_MASTER_AWCTL_OVR_ARCACHE (1 << 0) +/* awache value */ +#define PCIE_AXI_CTRL_MASTER_AWCTL_AWACHE_VA_MASK 0x0000001E +#define PCIE_AXI_CTRL_MASTER_AWCTL_AWACHE_VA_SHIFT 1 +/* awprot override */ +#define PCIE_AXI_CTRL_MASTER_AWCTL_AWPROT_OVR (1 << 5) +/* awprot value */ +#define PCIE_AXI_CTRL_MASTER_AWCTL_AWPROT_VALUE_MASK 0x000001C0 +#define PCIE_AXI_CTRL_MASTER_AWCTL_AWPROT_VALUE_SHIFT 6 +/* vmid val */ +#define PCIE_AXI_CTRL_MASTER_AWCTL_VMID_VAL_MASK 0x01FFFE00 +#define PCIE_AXI_CTRL_MASTER_AWCTL_VMID_VAL_SHIFT 9 +/* IPA value */ +#define PCIE_AXI_CTRL_MASTER_AWCTL_IPA_VAL (1 << 25) +/* overide snoop inidcation, if not set take it from mstr_armisc ... */ +#define PCIE_AXI_CTRL_MASTER_AWCTL_OVR_SNOOP (1 << 26) +/* +snoop indication value when override */ +#define PCIE_AXI_CTRL_MASTER_AWCTL_SNOOP (1 << 27) +/* +awqos value */ +#define PCIE_AXI_CTRL_MASTER_AWCTL_AWQOS_MASK 0xF0000000 +#define PCIE_AXI_CTRL_MASTER_AWCTL_AWQOS_SHIFT 28 + +/**** slv_ctl register ****/ +#define PCIE_AXI_CTRL_SLV_CTRL_IO_BAR_EN (1 << 6) + +/**** Cfg_Target_Bus register ****/ +/* + * Defines which MSBs to complete the number of the bust that arrived from ECAM. + * If set to 0, take the bit from the ECAM bar, otherwise from the busnum of + * this register. + * The LSB for the bus number comes on the addr[*:20]. + */ +#define PCIE_AXI_MISC_OB_CTRL_CFG_TARGET_BUS_MASK_MASK 0x000000FF +#define PCIE_AXI_MISC_OB_CTRL_CFG_TARGET_BUS_MASK_SHIFT 0 +/* Target bus number for outbound configuration type0 and type1 access */ +#define PCIE_AXI_MISC_OB_CTRL_CFG_TARGET_BUS_BUSNUM_MASK 0x0000FF00 +#define PCIE_AXI_MISC_OB_CTRL_CFG_TARGET_BUS_BUSNUM_SHIFT 8 + +/**** Cfg_Control register ****/ +/* Primary bus number */ +#define PCIE_AXI_MISC_OB_CTRL_CFG_CONTROL_PBUS_MASK 0x000000FF +#define PCIE_AXI_MISC_OB_CTRL_CFG_CONTROL_PBUS_SHIFT 0 +/* + * + * Subordinate bus number + */ +#define PCIE_AXI_MISC_OB_CTRL_CFG_CONTROL_SUBBUS_MASK 0x0000FF00 +#define PCIE_AXI_MISC_OB_CTRL_CFG_CONTROL_SUBBUS_SHIFT 8 +/* Secondary bus nnumber */ +#define PCIE_AXI_MISC_OB_CTRL_CFG_CONTROL_SEC_BUS_MASK 0x00FF0000 +#define PCIE_AXI_MISC_OB_CTRL_CFG_CONTROL_SEC_BUS_SHIFT 16 +/* Enable outbound configuration access through iATU. */ +#define PCIE_AXI_MISC_OB_CTRL_CFG_CONTROL_IATU_EN (1 << 31) + +/**** IO_Start_H register ****/ +/* + * + * Outbound ATIU I/O start address high + */ +#define PCIE_AXI_MISC_OB_CTRL_IO_START_H_ADDR_MASK 0x000003FF +#define PCIE_AXI_MISC_OB_CTRL_IO_START_H_ADDR_SHIFT 0 + +/**** IO_Limit_H register ****/ +/* + * + * Outbound ATIU I/O limit address high + */ +#define PCIE_AXI_MISC_OB_CTRL_IO_LIMIT_H_ADDR_MASK 0x000003FF +#define PCIE_AXI_MISC_OB_CTRL_IO_LIMIT_H_ADDR_SHIFT 0 + +/**** Msg_Start_H register ****/ +/* + * + * Outbound ATIU msg-no-data start address high + */ +#define PCIE_AXI_MISC_OB_CTRL_MSG_START_H_ADDR_MASK 0x000003FF +#define PCIE_AXI_MISC_OB_CTRL_MSG_START_H_ADDR_SHIFT 0 + +/**** Msg_Limit_H register ****/ +/* + * + * Outbound ATIU msg-no-data limit address high + */ +#define PCIE_AXI_MISC_OB_CTRL_MSG_LIMIT_H_ADDR_MASK 0x000003FF +#define PCIE_AXI_MISC_OB_CTRL_MSG_LIMIT_H_ADDR_SHIFT 0 + +/**** vmid_reg_ovrd register ****/ +/* + * select if to take the value from register or from address[63:48]: + * 1'b1: register value. + * 1'b0: from address[63:48] + */ +#define PCIE_AXI_MISC_OB_CTRL_VMID_REG_OVRD_SEL_MASK 0x0000FFFF +#define PCIE_AXI_MISC_OB_CTRL_VMID_REG_OVRD_SEL_SHIFT 0 +/* vmid override value. */ +#define PCIE_AXI_MISC_OB_CTRL_VMID_REG_OVRD_VALUE_MASK 0xFFFF0000 +#define PCIE_AXI_MISC_OB_CTRL_VMID_REG_OVRD_VALUE_SHIFT 16 + +/**** addr_size_replace register ****/ +/* + * Size in bits to replace from bit [63:64-N], when equal zero no replace is + * done. + */ +#define PCIE_AXI_MISC_OB_CTRL_ADDR_SIZE_REPLACE_VALUE_MASK 0x0000FFFF +#define PCIE_AXI_MISC_OB_CTRL_ADDR_SIZE_REPLACE_VALUE_SHIFT 0 +/* Reserved. */ +#define PCIE_AXI_MISC_OB_CTRL_ADDR_SIZE_REPLACE_RSRVD_MASK 0xFFFF0000 +#define PCIE_AXI_MISC_OB_CTRL_ADDR_SIZE_REPLACE_RSRVD_SHIFT 16 + +/**** type register ****/ +/* Type of message */ +#define PCIE_AXI_MISC_MSG_TYPE_TYPE_MASK 0x00FFFFFF +#define PCIE_AXI_MISC_MSG_TYPE_TYPE_SHIFT 0 +/* Reserved */ +#define PCIE_AXI_MISC_MSG_TYPE_RSRVD_MASK 0xFF000000 +#define PCIE_AXI_MISC_MSG_TYPE_RSRVD_SHIFT 24 + +/**** debug register ****/ +/* Causes ACI PCIe reset, including ,master/slave/DBI (registers). */ +#define PCIE_AXI_MISC_PCIE_STATUS_DEBUG_AXI_BRIDGE_RESET (1 << 0) +/* + * Causes reset of the entire PCIe core (including the AXI bridge). + * When set, the software must not address the PCI core (through the MEM space + * and REG space). + */ +#define PCIE_AXI_MISC_PCIE_STATUS_DEBUG_CORE_RESET (1 << 1) +/* + * Indicates that the SB is empty from the request to the PCIe (not including + * registers). + */ +#define PCIE_AXI_MISC_PCIE_STATUS_DEBUG_SB_FLUSH_OB_STATUS (1 << 2) +/* MAP and transaction to the PCIe core to ERROR. */ +#define PCIE_AXI_MISC_PCIE_STATUS_DEBUG_SB_MAP_TO_ERR (1 << 3) +/* Indicates that the pcie_core clock is gated off */ +#define PCIE_AXI_MISC_PCIE_STATUS_DEBUG_CORE_CLK_GATE_OFF (1 << 4) +/* Reserved */ +#define PCIE_AXI_MISC_PCIE_STATUS_DEBUG_RSRVD_MASK 0xFFFFFFE0 +#define PCIE_AXI_MISC_PCIE_STATUS_DEBUG_RSRVD_SHIFT 5 + +/**** conf register ****/ +/* + * Device Type + * Indicates the specific type of this PCI Express Function. It is also used to + * set the + * Device/Port Type field. + * + * 4'b0000: PCI Express Endpoint + * 4'b0001: Legacy PCI Express Endpoint + * 4'b0100: Root Port of PCI Express Root Complex + * + * Must be programmed before link training sequence, according to the reset + * strap. + * Change this register should be when the pci_exist (in the PBS regfile) is + * zero. + */ +#define PCIE_AXI_MISC_PCIE_GLOBAL_CONF_DEV_TYPE_MASK 0x0000000F +#define PCIE_AXI_MISC_PCIE_GLOBAL_CONF_DEV_TYPE_SHIFT 0 +/* + * [i] - Lane i active + * Change this register should be when the pci_exist (in the PBS regfile) is + * zero. + */ +#define PCIE_REV1_2_AXI_MISC_PCIE_GLOBAL_CONF_NOF_ACT_LANES_MASK 0x000000F0 +#define PCIE_REV1_2_AXI_MISC_PCIE_GLOBAL_CONF_RESERVED_MASK 0xFFFFFF00 +#define PCIE_REV1_2_AXI_MISC_PCIE_GLOBAL_CONF_RESERVED_SHIFT 8 +#define PCIE_REVX_AXI_MISC_PCIE_GLOBAL_CONF_NOF_ACT_LANES_SHIFT 4 +#define PCIE_REV3_AXI_MISC_PCIE_GLOBAL_CONF_NOF_ACT_LANES_MASK 0x000FFFF0 +#define PCIE_REV3_AXI_MISC_PCIE_GLOBAL_CONF_RESERVED_MASK 0xFFF00000 +#define PCIE_REV3_AXI_MISC_PCIE_GLOBAL_CONF_RESERVED_SHIFT 20 + +#define PCIE_REV1_2_AXI_MISC_PCIE_GLOBAL_CONF_MEM_SHUTDOWN 0x100 +#define PCIE_REV3_AXI_MISC_PCIE_GLOBAL_CONF_MEM_SHUTDOWN 0x100000 + +/**** laneX register ****/ +#define PCIE_AXI_STATUS_LANE_IS_RESET AL_BIT(13) +#define PCIE_AXI_STATUS_LANE_REQUESTED_SPEED_MASK AL_FIELD_MASK(2, 0) +#define PCIE_AXI_STATUS_LANE_REQUESTED_SPEED_SHIFT 0 + +/**** zero_laneX register ****/ +/* phy_mac_local_fs */ +#define PCIE_AXI_MISC_ZERO_LANEX_PHY_MAC_LOCAL_FS_MASK 0x0000003f +#define PCIE_AXI_MISC_ZERO_LANEX_PHY_MAC_LOCAL_FS_SHIFT 0 +/* phy_mac_local_lf */ +#define PCIE_AXI_MISC_ZERO_LANEX_PHY_MAC_LOCAL_LF_MASK 0x00000fc0 +#define PCIE_AXI_MISC_ZERO_LANEX_PHY_MAC_LOCAL_LF_SHIFT 6 + +/**** en_axi register ****/ +/* u4_ram2p */ +#define PCIE_AXI_PARITY_EN_AXI_U4_RAM2P AL_BIT(1) + +/**** pos_cntl register ****/ +/* Disables POS. */ +#define PCIE_AXI_POS_ORDER_AXI_POS_BYPASS (1 << 0) +/* Clear the POS data structure. */ +#define PCIE_AXI_POS_ORDER_AXI_POS_CLEAR (1 << 1) +/* Read push all write. */ +#define PCIE_AXI_POS_ORDER_AXI_POS_RSO_ENABLE (1 << 2) +/* + * Causes the PCIe core to wait for all the BRESPs before issuing a read + * request. + */ +#define PCIE_AXI_POS_ORDER_AXI_DW_RD_FLUSH_WR (1 << 3) +/* + * When set, to 1'b1 supports interleaving data return from the PCIe core. Valid + * only when cfg_bypass_cmpl_after_write_fix is set. + */ +#define PCIE_AXI_POS_ORDER_RD_CMPL_AFTER_WR_SUPPORT_RD_INTERLV (1 << 4) +/* When set, to 1'b1 disables read completion after write ordering. */ +#define PCIE_AXI_POS_ORDER_BYPASS_CMPL_AFTER_WR_FIX (1 << 5) +/* + * When set, disables EP mode read cmpl on the master port push slave writes, + * when each read response from the master is not interleaved. + */ +#define PCIE_AXI_POS_ORDER_EP_CMPL_AFTER_WR_DIS (1 << 6) +/* When set, disables EP mode read cmpl on the master port push slave writes. */ +#define PCIE_AXI_POS_ORDER_EP_CMPL_AFTER_WR_SUPPORT_INTERLV_DIS (1 << 7) +/* should be zero */ +#define PCIE_AXI_POS_ORDER_9_8 AL_FIELD_MASK(9, 8) +/* Give the segmentation buffer not to wait for P writes to end in the AXI + * bridge before releasing the CMPL. + */ +#define PCIE_AXI_POS_ORDER_SEGMENT_BUFFER_DONT_WAIT_FOR_P_WRITES AL_BIT(10) +/* should be zero */ +#define PCIE_AXI_POS_ORDER_11 AL_BIT(11) +/** + * When set cause pcie core to send ready in the middle of the read data + * burst returning from the DRAM to the PCIe core + */ +#define PCIE_AXI_POS_ORDER_SEND_READY_ON_READ_DATA_BURST AL_BIT(12) +/* When set disable the ATS CAP. */ +#define PCIE_AXI_CORE_SETUP_ATS_CAP_DIS AL_BIT(13) +/* When set disable D3/D2/D1 PME support */ +#define PCIE_AXI_POS_ORDER_DISABLE_DX_PME AL_BIT(14) +/* When set enable nonsticky reset when linkdown hot reset */ +#define PCIE_AXI_POS_ORDER_ENABLE_NONSTICKY_RESET_ON_HOT_RESET AL_BIT(15) +/* When set, terminate message with data as UR request */ +#define PCIE_AXI_TERMINATE_DATA_MSG_AS_UR_REQ AL_BIT(16) + +/**** pcie_core_setup register ****/ +/* + * This Value delay the rate change to the serdes, until the EIOS is sent by the + * serdes. Should be program before the pcie_exist, is asserted. + */ +#define PCIE_AXI_CORE_SETUP_DELAY_MAC_PHY_RATE_MASK 0x000000FF +#define PCIE_AXI_CORE_SETUP_DELAY_MAC_PHY_RATE_SHIFT 0 +/* + * Limit the number of outstanding AXI reads that the PCIe core can get. Should + * be program before the pcie_exist, is asserted. + */ +#define PCIE_AXI_CORE_SETUP_NOF_READS_ONSLAVE_INTRF_PCIE_CORE_MASK 0x0000FF00 +#define PCIE_AXI_CORE_SETUP_NOF_READS_ONSLAVE_INTRF_PCIE_CORE_SHIFT 8 +/* Enable the sriov feature. */ +#define PCIE_AXI_REV1_2_CORE_SETUP_SRIOV_ENABLE AL_BIT(16) +/* not in use */ +#define PCIE_AXI_REV3_CORE_SETUP_NOT_IN_USE (1 << 16) +/* Reserved. Read undefined; must read as zeros. */ +#define PCIE_AXI_REV3_CORE_SETUP_CFG_DELAY_AFTER_PCIE_EXIST_MASK 0x0FFE0000 +#define PCIE_AXI_REV3_CORE_SETUP_CFG_DELAY_AFTER_PCIE_EXIST_SHIFT 17 + +/**** cfg register ****/ +/* This value set the possible out standing headers writes (post ... */ +#define PCIE_AXI_REV1_2_INIT_FC_CFG_NOF_P_HDR_MASK 0x0000007F +#define PCIE_AXI_REV1_2_INIT_FC_CFG_NOF_P_HDR_SHIFT 0 +/* This value set the possible out standing headers reads (non-p ... */ +#define PCIE_AXI_REV1_2_INIT_FC_CFG_NOF_NP_HDR_MASK 0x00003F80 +#define PCIE_AXI_REV1_2_INIT_FC_CFG_NOF_NP_HDR_SHIFT 7 +/* This value set the possible out standing headers CMPLs , the ... */ +#define PCIE_AXI_REV1_2_INIT_FC_CFG_NOF_CPL_HDR_MASK 0x001FC000 +#define PCIE_AXI_REV1_2_INIT_FC_CFG_NOF_CPL_HDR_SHIFT 14 + +#define PCIE_AXI_REV1_2_INIT_FC_CFG_RSRVD_MASK 0xFFE00000 +#define PCIE_AXI_REV1_2_INIT_FC_CFG_RSRVD_SHIFT 21 + +/* This value set the possible out standing headers writes (post ... */ +#define PCIE_AXI_REV3_INIT_FC_CFG_NOF_P_HDR_MASK 0x000001FF +#define PCIE_AXI_REV3_INIT_FC_CFG_NOF_P_HDR_SHIFT 0 +/* This value set the possible out standing headers reads (non-p ... */ +#define PCIE_AXI_REV3_INIT_FC_CFG_NOF_NP_HDR_MASK 0x0003FE00 +#define PCIE_AXI_REV3_INIT_FC_CFG_NOF_NP_HDR_SHIFT 9 +/* This value set the possible out standing headers CMPLs , the ... */ +#define PCIE_AXI_REV3_INIT_FC_CFG_NOF_CPL_HDR_MASK 0x07FC0000 +#define PCIE_AXI_REV3_INIT_FC_CFG_NOF_CPL_HDR_SHIFT 18 + /* + * [27] cfg_cpl_p_rr: do round robin on the SB output btw Posted and CPL. + * [28] cfg_np_pass_p_rr, in case RR between CPL AND P, allow to pass NP in case + * p is empty. + * [29] cfg_np_part_of_rr_arb: NP also is a part of the round robin arbiter. + */ +#define PCIE_AXI_REV3_INIT_FC_CFG_RSRVD_MASK 0xF8000000 +#define PCIE_AXI_REV3_INIT_FC_CFG_RSRVD_SHIFT 27 + +/**** write_msg_ctrl_0 register ****/ +/* + * choose if 17 in the AXUSER indicate message hint (1'b1) or no snoop + * indication (1'b0) + */ +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_0_AW_CFG_OUTBOUND_MSG_NO_SNOOP_N (1 << 0) +/* this bit define if the message is with data or without */ +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_0_AW_CFG_MSG_WITH_DATA (1 << 1) +/* message code for message with data. */ +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_0_AW_CFG_MSG_CODE_DATA_MASK 0x000003FC +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_0_AW_CFG_MSG_CODE_DATA_SHIFT 2 +/* message code for message without data. */ +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_0_AW_CFG_MSG_CODE_MASK 0x0003FC00 +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_0_AW_CFG_MSG_CODE_SHIFT 10 +/* message ST value */ +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_0_AW_CFG_MSG_ST_MASK 0x03FC0000 +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_0_AW_CFG_MSG_ST_SHIFT 18 +/* message NO-SNOOP */ +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_0_AW_CFG_MSG_NO_SNOOP (1 << 26) +/* message TH bit */ +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_0_AW_CFG_MSG_TH (1 << 27) +/* message PH bits */ +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_0_AW_CFG_MSG_PH_MASK 0x30000000 +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_0_AW_CFG_MSG_PH_SHIFT 28 +/* Rsrvd */ +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_0_RSRVD_MASK 0xC0000000 +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_0_RSRVD_SHIFT 30 + +/**** write_msg_ctrl_1 register ****/ +/* message type */ +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_1_AW_CFG_MISC_MSG_TYPE_VALUE_MASK 0x0000001F +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_1_AW_CFG_MISC_MSG_TYPE_VALUE_SHIFT 0 +/* this bit define if the message is with data or without */ +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_1_AW_CFG_MSG_DATA_TYPE_VALUE_MASK 0x000003E0 +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_1_AW_CFG_MSG_DATA_TYPE_VALUE_SHIFT 5 +/* override axi size for message with no data. */ +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_1_AW_CFG_MSG_NO_DATA_AXI_SIZE_OVRD (1 << 10) +/* override the AXI size to the pcie core for message with no data. */ +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_1_AW_CFG_MSG_NO_DATA_AXI_SIZE_MSG_MASK 0x00003800 +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_1_AW_CFG_MSG_NO_DATA_AXI_SIZE_MSG_SHIFT 11 +/* override axi size for message with data. */ +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_1_AW_CFG_MSG_DATA_AXI_SIZE_OVRD (1 << 14) +/* override the AXI size to the pcie core for message with data. */ +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_1_AW_CFG_MSG_DATA_AXI_SIZE_MSG_MASK 0x00038000 +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_1_AW_CFG_MSG_DATA_AXI_SIZE_MSG_SHIFT 15 +/* Rsrvd */ +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_1_RSRVD_MASK 0xFFFC0000 +#define PCIE_AXI_AXI_ATTR_OVRD_WR_MSG_CTRL_1_RSRVD_SHIFT 18 + +/**** read_msg_ctrl_0 register ****/ +/* + * choose if 17 in the AXUSER indicate message hint (1'b1) or no snoop + * indication (1'b0) + */ +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_0_AR_CFG_OUTBOUND_MSG_NO_SNOOP_N (1 << 0) +/* this bit define if the message is with data or without */ +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_0_AR_CFG_MSG_WITH_DATA (1 << 1) +/* message code for message with data. */ +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_0_AR_CFG_MSG_CODE_DATA_MASK 0x000003FC +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_0_AR_CFG_MSG_CODE_DATA_SHIFT 2 +/* message code for message without data. */ +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_0_AR_CFG_MSG_CODE_MASK 0x0003FC00 +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_0_AR_CFG_MSG_CODE_SHIFT 10 +/* message ST value */ +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_0_AR_CFG_MSG_ST_MASK 0x03FC0000 +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_0_AR_CFG_MSG_ST_SHIFT 18 +/* message NO-SNOOP */ +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_0_AR_CFG_MSG_NO_SNOOP (1 << 26) +/* message TH bit */ +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_0_AR_CFG_MSG_TH (1 << 27) +/* message PH bits */ +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_0_AR_CFG_MSG_PH_MASK 0x30000000 +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_0_AR_CFG_MSG_PH_SHIFT 28 +/* Rsrvd */ +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_0_RSRVD_MASK 0xC0000000 +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_0_RSRVD_SHIFT 30 + +/**** read_msg_ctrl_1 register ****/ +/* message type */ +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_1_AR_CFG_MISC_MSG_TYPE_VALUE_MASK 0x0000001F +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_1_AR_CFG_MISC_MSG_TYPE_VALUE_SHIFT 0 +/* this bit define if the message is with data or without */ +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_1_AR_CFG_MSG_DATA_TYPE_VALUE_MASK 0x000003E0 +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_1_AR_CFG_MSG_DATA_TYPE_VALUE_SHIFT 5 +/* override axi size for message with no data. */ +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_1_AR_CFG_MSG_NO_DATA_AXI_SIZE_OVRD (1 << 10) +/* override the AXI size to the pcie core for message with no data. */ +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_1_AR_CFG_MSG_NO_DATA_AXI_SIZE_MSG_MASK 0x00003800 +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_1_AR_CFG_MSG_NO_DATA_AXI_SIZE_MSG_SHIFT 11 +/* override axi size for message with data. */ +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_1_AR_CFG_MSG_DATA_AXI_SIZE_OVRD (1 << 14) +/* override the AXI size to the pcie core for message with data. */ +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_1_AR_CFG_MSG_DATA_AXI_SIZE_MSG_MASK 0x00038000 +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_1_AR_CFG_MSG_DATA_AXI_SIZE_MSG_SHIFT 15 +/* Rsrvd */ +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_1_RSRVD_MASK 0xFFFC0000 +#define PCIE_AXI_AXI_ATTR_OVRD_READ_MSG_CTRL_1_RSRVD_SHIFT 18 + +/**** pf_sel register ****/ +/* message type */ +#define PCIE_AXI_AXI_ATTR_OVRD_PF_SEL_PF_BIT0_OVRD_FROM_AXUSER (1 << 0) +/* this bit define if the message is with data or without */ +#define PCIE_AXI_AXI_ATTR_OVRD_PF_SEL_PF_BIT0_OVRD_FROM_REG (1 << 1) +/* override axi size for message with no data. */ +#define PCIE_AXI_AXI_ATTR_OVRD_PF_SEL_PF_BIT0_ADDR_OFFSET_MASK 0x0000003C +#define PCIE_AXI_AXI_ATTR_OVRD_PF_SEL_PF_BIT0_ADDR_OFFSET_SHIFT 2 +/* override the AXI size to the pcie core for message with no data. */ +#define PCIE_AXI_AXI_ATTR_OVRD_PF_SEL_CFG_PF_BIT0_OVRD (1 << 6) +/* Rsrvd */ +#define PCIE_AXI_AXI_ATTR_OVRD_PF_SEL_RSRVD_7 (1 << 7) +/* message type */ +#define PCIE_AXI_AXI_ATTR_OVRD_PF_SEL_PF_BIT1_OVRD_FROM_AXUSER (1 << 8) +/* this bit define if the message is with data or without */ +#define PCIE_AXI_AXI_ATTR_OVRD_PF_SEL_PF_BIT1_OVRD_FROM_REG (1 << 9) +/* override axi size for message with no data. */ +#define PCIE_AXI_AXI_ATTR_OVRD_PF_SEL_PF_BIT1_ADDR_OFFSET_MASK 0x00003C00 +#define PCIE_AXI_AXI_ATTR_OVRD_PF_SEL_PF_BIT1_ADDR_OFFSET_SHIFT 10 +/* override the AXI size to the pcie core for message with no data. */ +#define PCIE_AXI_AXI_ATTR_OVRD_PF_SEL_CFG_PF_BIT1_OVRD (1 << 14) +/* Rsrvd */ +#define PCIE_AXI_AXI_ATTR_OVRD_PF_SEL_RSRVD_MASK 0xFFFF8000 +#define PCIE_AXI_AXI_ATTR_OVRD_PF_SEL_RSRVD_SHIFT 15 + + /**** func_ctrl_0 register ****/ +/* choose the field from the axuser */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_0_PF_VEC_TH_OVRD_FROM_AXUSER (1 << 0) +/* choose the field from register */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_0_PF_VEC_TH_OVRD_FROM_REG (1 << 1) +/* field offset from the address portions according to the spec */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_0_PF_VEC_TH_ADDR_OFFSET_MASK 0x0000003C +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_0_PF_VEC_TH_ADDR_OFFSET_SHIFT 2 +/* register value override */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_0_CFG_TH_OVRD (1 << 6) +/* choose the field from the axuser */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_0_PF_VEC_ST_VEC_OVRD_FROM_AXUSER_MASK 0x00007F80 +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_0_PF_VEC_ST_VEC_OVRD_FROM_AXUSER_SHIFT 7 +/* choose the field from register */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_0_PF_VEC_ST_VEC_OVRD_FROM_REG_MASK 0x007F8000 +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_0_PF_VEC_ST_VEC_OVRD_FROM_REG_SHIFT 15 +/* register value override */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_0_CFG_ST_VEC_OVRD_MASK 0x7F800000 +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_0_CFG_ST_VEC_OVRD_SHIFT 23 +/* Rsrvd */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_0_RSRVD (1 << 31) + +/**** func_ctrl_2 register ****/ +/* choose the field from the axuser */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_2_PF_VEC_PH_VEC_OVRD_FROM_AXUSER_MASK 0x00000003 +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_2_PF_VEC_PH_VEC_OVRD_FROM_AXUSER_SHIFT 0 +/* choose the field from register */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_2_PF_VEC_PH_VEC_OVRD_FROM_REG_MASK 0x0000000C +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_2_PF_VEC_PH_VEC_OVRD_FROM_REG_SHIFT 2 +/* in case the field take from the address, offset field for each bit. */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_2_PF_VEC_PH_VEC_ADDR_OFFSET_MASK 0x00000FF0 +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_2_PF_VEC_PH_VEC_ADDR_OFFSET_SHIFT 4 +/* register value override */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_2_CFG_PH_VEC_OVRD_MASK 0x00003000 +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_2_CFG_PH_VEC_OVRD_SHIFT 12 +/* Rsrvd */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_2_RSRVD_14_15_MASK 0x0000C000 +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_2_RSRVD_14_15_SHIFT 14 +/* choose the field from the axuser */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_2_PF_VEC_VMID89_VEC_OVRD_FROM_AXUSER_MASK 0x00030000 +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_2_PF_VEC_VMID89_VEC_OVRD_FROM_AXUSER_SHIFT 16 +/* choose the field from register */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_2_PF_VEC_VMID89_VEC_OVRD_FROM_REG_MASK 0x000C0000 +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_2_PF_VEC_VMID89_VEC_OVRD_FROM_REG_SHIFT 18 +/* in case the field take from the address, offset field for each bit. */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_2_PF_VEC_VMID89_VEC_ADDR_OFFSET_MASK 0x0FF00000 +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_2_PF_VEC_VMID89_VEC_ADDR_OFFSET_SHIFT 20 +/* register value override */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_2_CFG_VMID89_VEC_OVRD_MASK 0x30000000 +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_2_CFG_VMID89_VEC_OVRD_SHIFT 28 +/* Rsrvd */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_2_RSRVD_MASK 0xC0000000 +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_2_RSRVD_SHIFT 30 + +/**** func_ctrl_3 register ****/ +/* + * When set take the corresponding bit address from register + * pf_vec_mem_addr44_53_ovrd + */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_3_PF_VEC_MEM_ADDR44_53_SEL_MASK 0x000003FF +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_3_PF_VEC_MEM_ADDR44_53_SEL_SHIFT 0 +/* override value. */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_3_PF_VEC_MEM_ADDR44_53_OVRD_MASK 0x000FFC00 +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_3_PF_VEC_MEM_ADDR44_53_OVRD_SHIFT 10 +/* + * When set take the corresponding bit address from register + * pf_vec_mem_addr54_63_ovrd + */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_3_PF_VEC_MEM_ADDR54_63_SEL_MASK 0x3FF00000 +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_3_PF_VEC_MEM_ADDR54_63_SEL_SHIFT 20 +/* Rsrvd */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_3_RSRVD_MASK 0xC0000000 +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_3_RSRVD_SHIFT 30 + +/**** func_ctrl_4 register ****/ +/* When set take the corresponding bit address from vmid value. */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_4_PF_VEC_MEM_ADDR54_63_SEL_VMID_MASK 0x000003FF +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_4_PF_VEC_MEM_ADDR54_63_SEL_VMID_SHIFT 0 +/* override value. */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_4_PF_VEC_MEM_ADDR54_63_OVRD_MASK 0x000FFC00 +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_4_PF_VEC_MEM_ADDR54_63_OVRD_SHIFT 10 +/* Rsrvd */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_4_RSRVD_MASK 0xFFF00000 +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_4_RSRVD_SHIFT 20 + +/**** func_ctrl_5 register ****/ +/* + * When set take the corresponding bit address [63:44] from + * aw_pf_vec_msg_addr_ovrd + */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_5_AW_PF_VEC_MSG_ADDR_SEL_MASK 0x000FFFFF +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_5_AW_PF_VEC_MSG_ADDR_SEL_SHIFT 0 +/* Rsrvd */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_5_RSRVD_MASK 0xFFF00000 +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_5_RSRVD_SHIFT 20 + +/**** func_ctrl_6 register ****/ +/* override value. */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_6_AW_PF_VEC_MSG_ADDR_OVRD_MASK 0x000FFFFF +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_6_AW_PF_VEC_MSG_ADDR_OVRD_SHIFT 0 +/* Rsrvd */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_6_RSRVD_MASK 0xFFF00000 +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_6_RSRVD_SHIFT 20 + +/**** func_ctrl_7 register ****/ +/* + * When set take the corresponding bit address [63:44] from + * ar_pf_vec_msg_addr_ovrd + */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_7_AR_PF_VEC_MSG_ADDR_SEL_MASK 0x000FFFFF +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_7_AR_PF_VEC_MSG_ADDR_SEL_SHIFT 0 +/* Rsrvd */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_7_RSRVD_MASK 0xFFF00000 +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_7_RSRVD_SHIFT 20 + +/**** func_ctrl_8 register ****/ +/* override value. */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_8_AR_PF_VEC_MSG_ADDR_OVRD_MASK 0x000FFFFF +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_8_AR_PF_VEC_MSG_ADDR_OVRD_SHIFT 0 +/* Rsrvd */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_8_RSRVD_MASK 0xFFF00000 +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_8_RSRVD_SHIFT 20 + +/**** func_ctrl_9 register ****/ +/* no snoop override */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_9_PF_VEC_NO_SNOOP_OVRD (1 << 0) +/* no snoop override value */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_9_PF_VEC_NO_SNOOP_OVRD_VALUE (1 << 1) +/* atu bypass override */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_9_PF_VEC_ATU_BYPASS_OVRD (1 << 2) +/* atu bypass override value */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_9_PF_VEC_ATU_BYPASS_OVRD_VALUE (1 << 3) +/* Rsrvd */ +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_9_RSRVD_MASK 0xFFFFFFF0 +#define PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_9_RSRVD_SHIFT 4 + +/**** entry_vec register ****/ +/* entry0 */ +#define PCIE_AXI_MSG_ATTR_AXUSER_TABLE_ENTRY_VEC_ENTRY_0_MASK 0x0000001F +#define PCIE_AXI_MSG_ATTR_AXUSER_TABLE_ENTRY_VEC_ENTRY_0_SHIFT 0 +/* entry1 */ +#define PCIE_AXI_MSG_ATTR_AXUSER_TABLE_ENTRY_VEC_ENTRY_1_MASK 0x000003E0 +#define PCIE_AXI_MSG_ATTR_AXUSER_TABLE_ENTRY_VEC_ENTRY_1_SHIFT 5 +/* entry2 */ +#define PCIE_AXI_MSG_ATTR_AXUSER_TABLE_ENTRY_VEC_ENTRY_2_MASK 0x00007C00 +#define PCIE_AXI_MSG_ATTR_AXUSER_TABLE_ENTRY_VEC_ENTRY_2_SHIFT 10 +/* entry3 */ +#define PCIE_AXI_MSG_ATTR_AXUSER_TABLE_ENTRY_VEC_ENTRY_3_MASK 0x000F8000 +#define PCIE_AXI_MSG_ATTR_AXUSER_TABLE_ENTRY_VEC_ENTRY_3_SHIFT 15 +/* atu bypass for message "write" */ +#define PCIE_AXI_MSG_ATTR_AXUSER_TABLE_ENTRY_VEC_AW_MSG_ATU_BYPASS (1 << 20) +/* atu bypass for message "read" */ +#define PCIE_AXI_MSG_ATTR_AXUSER_TABLE_ENTRY_VEC_AR_MSG_ATU_BYPASS (1 << 21) +/* Rsrvd */ +#define PCIE_AXI_MSG_ATTR_AXUSER_TABLE_ENTRY_VEC_RSRVD_MASK 0xFFC00000 +#define PCIE_AXI_MSG_ATTR_AXUSER_TABLE_ENTRY_VEC_RSRVD_SHIFT 22 + +/**** int_cause_grp_A_axi register ****/ +/* + * Master Response Composer Lookup Error + * Overflow that occurred in a lookup table of the Outbound responses. This + * indicates that there was a violation for the number of outstanding NP + * requests issued for the Inbound direction. + * Write zero to clear. + */ +#define PCIE_AXI_INT_GRP_A_CAUSE_GM_COMPOSER_LOOKUP_ERR (1 << 0) +/* + * Indicates a PARITY ERROR on the master data read channel. + * Write zero to clear. + */ +#define PCIE_AXI_INT_GRP_A_CAUSE_PARITY_ERR_DATA_PATH_RD (1 << 2) +/* + * Indicates a PARITY ERROR on the slave addr read channel. + * Write zero to clear. + */ +#define PCIE_AXI_INT_GRP_A_CAUSE_PARITY_ERR_OUT_ADDR_RD (1 << 3) +/* + * Indicates a PARITY ERROR on the slave addr write channel. + * Write zero to clear. + */ +#define PCIE_AXI_INT_GRP_A_CAUSE_PARITY_ERR_OUT_ADDR_WR (1 << 4) +/* + * Indicates a PARITY ERROR on the slave data write channel. + * Write zero to clear. + */ +#define PCIE_AXI_INT_GRP_A_CAUSE_PARITY_ERR_OUT_DATA_WR (1 << 5) +/* Reserved */ +#define PCIE_AXI_INT_GRP_A_CAUSE_RESERVED_6 (1 << 6) +/* + * Software error: ECAM write request with invalid bus number. + * Write Zero to clear + */ +#define PCIE_AXI_INT_GRP_A_CAUSE_SW_ECAM_ERR_RD (1 << 7) +/* + * Software error: ECAM read request with invalid bus number. + * Write Zero to clear. + */ +#define PCIE_AXI_INT_GRP_A_CAUSE_SW_ECAM_ERR_WR (1 << 8) +/* Indicates an ERROR in the PCIe application cause register. */ +#define PCIE_AXI_INT_GRP_A_CAUSE_PCIE_CORE_INT (1 << 9) +/* + * Whenever the Master AXI finishes writing a message, it sets this bit. + * Whenever the int is cleared, the message information MSG_* regs are no longer + * valid. + */ +#define PCIE_AXI_INT_GRP_A_CAUSE_MSTR_AXI_GETOUT_MSG (1 << 10) +/* Read AXI compilation has ERROR. */ +#define PCIE_AXI_INT_GRP_A_CAUSE_RD_CMPL_ERR (1 << 11) +/* Write AXI compilation has ERROR. */ +#define PCIE_AXI_INT_GRP_A_CAUSE_WR_CMPL_ERR (1 << 12) +/* Read AXI compilation has timed out. */ +#define PCIE_AXI_INT_GRP_A_CAUSE_RD_CMPL_TO (1 << 13) +/* Write AXI compilation has timed out. */ +#define PCIE_AXI_INT_GRP_A_CAUSE_WR_CMPL_TO (1 << 14) +/* Parity error AXI domain */ +#define PCIE_AXI_INT_GRP_A_CAUSE_PARITY_ERROR_AXI (1 << 15) +/* POS error interrupt */ +#define PCIE_AXI_INT_GRP_A_CAUSE_POS_AXI_BRESP (1 << 16) +/* The outstanding write counter become full should never happen */ +#define PCIE_AXI_INT_GRP_A_CAUSE_WRITE_CNT_FULL_ERR (1 << 17) +/* BRESP received before the write counter increment. */ +#define PCIE_AXI_INT_GRP_A_CAUSE_BRESP_BEFORE_WR_CNT_INC_ERR (1 << 18) + +/**** int_control_grp_A_axi register ****/ +/* When Clear_on_Read =1, all bits of the Cause register are cleared on read. */ +#define PCIE_AXI_INT_GRP_A_CTRL_CLEAR_ON_READ (1 << 0) +/* + * (Must be set only when MSIX is enabled.) + * When Auto-Mask =1 and an MSI-X ACK for this bit is received, its + * corresponding bit in the mask register is set, masking future interrupts. + */ +#define PCIE_AXI_INT_GRP_A_CTRL_AUTO_MASK (1 << 1) +/* + * Auto_Clear (RW) + * When Auto-Clear =1, the bits in the Interrupt Cause register are auto-cleared + * after MSI-X is acknowledged. Must be used only if MSI-X is enabled. + */ +#define PCIE_AXI_INT_GRP_A_CTRL_AUTO_CLEAR (1 << 2) +/* + * When set,_on_Posedge =1, the bits in the Interrupt Cause register are set on + * the posedge of the interrupt source, i.e., when interrupt source =1 and + * Interrupt Status = 0. + * When set,_on_Posedge =0, the bits in the Interrupt Cause register are set + * when interrupt source =1. + */ +#define PCIE_AXI_INT_GRP_A_CTRL_SET_ON_POS (1 << 3) +/* + * When Moderation_Reset =1, all Moderation timers associated with the interrupt + * cause bits are cleared to 0, enabling immediate interrupt assertion if any + * unmasked cause bit is set to 1. This bit is self-negated. + */ +#define PCIE_AXI_INT_GRP_A_CTRL_MOD_RST (1 << 4) +/* + * When mask_msi_x =1, no MSI-X from this group is sent. This bit is set to 1 + * when the associate summary bit in this group is used to generate a single + * MSI-X for this group. + */ +#define PCIE_AXI_INT_GRP_A_CTRL_MASK_MSI_X (1 << 5) +/* MSI-X AWID value. Same ID for all cause bits. */ +#define PCIE_AXI_INT_GRP_A_CTRL_AWID_MASK 0x00000F00 +#define PCIE_AXI_INT_GRP_A_CTRL_AWID_SHIFT 8 +/* + * This value determines the interval between interrupts. Writing ZERO disables + * Moderation. + */ +#define PCIE_AXI_INT_GRP_A_CTRL_MOD_INTV_MASK 0x00FF0000 +#define PCIE_AXI_INT_GRP_A_CTRL_MOD_INTV_SHIFT 16 +/* + * This value determines the Moderation_Timer_Clock speed. + * 0- Moderation-timer is decremented every 1x256 SB clock cycles ~1uS. + * 1- Moderation-timer is decremented every 2x256 SB clock cycles ~2uS. + * N- Moderation-timer is decremented every Nx256 SB clock cycles ~(N+1) uS. + */ +#define PCIE_AXI_INT_GRP_A_CTRL_MOD_RES_MASK 0x0F000000 +#define PCIE_AXI_INT_GRP_A_CTRL_MOD_RES_SHIFT 24 + +#ifdef __cplusplus +} +#endif + +#endif /* __AL_HAL_pcie_axi_REG_H */ + +/** @} end of ... group */ diff --git a/sys/arm/annapurna/alpine/hal/al_hal_pcie_interrupts.h b/sys/arm/annapurna/alpine/hal/al_hal_pcie_interrupts.h new file mode 100644 index 000000000000..357971ca63cb --- /dev/null +++ b/sys/arm/annapurna/alpine/hal/al_hal_pcie_interrupts.h @@ -0,0 +1,271 @@ +/*- +******************************************************************************** +Copyright (C) 2015 Annapurna Labs Ltd. + +This file may be licensed under the terms of the Annapurna Labs Commercial +License Agreement. + +Alternatively, this file can be distributed under the terms of the GNU General +Public License V2 as published by the Free Software Foundation and can be +found at http://www.gnu.org/licenses/gpl-2.0.html + +Alternatively, redistribution and use in source and binary forms, with or +without modification, are permitted provided that the following conditions are +met: + + * Redistributions of source code must retain the above copyright notice, +this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright +notice, this list of conditions and the following disclaimer in +the documentation and/or other materials provided with the +distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + +#ifndef _AL_HAL_PCIE_INTERRUPTS_H_ +#define _AL_HAL_PCIE_INTERRUPTS_H_ + +#include "al_hal_common.h" +#include "al_hal_pcie.h" +#include "al_hal_iofic.h" + +/** + * @defgroup group_pcie_interrupts PCIe interrupts + * @ingroup grouppcie + * @{ + * The PCIe interrupts HAL can be used to control PCIe unit interrupts. + * There are 5 groups of interrupts: app group A, B, C, D and AXI. + * Only 2 interrupts go from the pcie unit to the GIC: + * 1. Summary for all the int groups (AXI+APP CORE). + * 2. INTA assert/deassert (RC only). + * For the specific GIC interrupt line, please check the architecture reference + * manual. + * The reset mask state of all interrupts is: Masked + * + * @file al_hal_pcie_interrupts.h + * + */ + +/** + * PCIe interrupt groups + */ +enum al_pcie_int_group { + AL_PCIE_INT_GRP_A, + AL_PCIE_INT_GRP_B, + AL_PCIE_INT_GRP_C, /* Rev3 only */ + AL_PCIE_INT_GRP_D, /* Rev3 only */ + AL_PCIE_INT_GRP_AXI_A, +}; + +/** + * App group A interrupts mask - don't change + * All interrupts not listed below should be masked + */ +enum al_pcie_app_int_grp_a { + /** [RC only] Deassert_INTD received */ + AL_PCIE_APP_INT_DEASSERT_INTD = AL_BIT(0), + /** [RC only] Deassert_INTC received */ + AL_PCIE_APP_INT_DEASSERT_INTC = AL_BIT(1), + /** [RC only] Deassert_INTB received */ + AL_PCIE_APP_INT_DEASSERT_INTB = AL_BIT(2), + /** + * [RC only] Deassert_INTA received - there's a didcated GIC interrupt + * line that reflects the status of ASSERT/DEASSERT of INTA + */ + AL_PCIE_APP_INT_DEASSERT_INTA = AL_BIT(3), + /** [RC only] Assert_INTD received */ + AL_PCIE_APP_INT_ASSERT_INTD = AL_BIT(4), + /** [RC only] Assert_INTC received */ + AL_PCIE_APP_INT_ASSERT_INTC = AL_BIT(5), + /** [RC only] Assert_INTB received */ + AL_PCIE_APP_INT_ASSERT_INTB = AL_BIT(6), + /** + * [RC only] Assert_INTA received - there's a didcated GIC interrupt + * line that reflects the status of ASSERT/DEASSERT of INTA + */ + AL_PCIE_APP_INT_ASSERT_INTA = AL_BIT(7), + /** [RC only] MSI Controller Interrupt */ + AL_PCIE_APP_INT_MSI_CNTR_RCV_INT = AL_BIT(8), + /** [EP only] MSI sent grant */ + AL_PCIE_APP_INT_MSI_TRNS_GNT = AL_BIT(9), + /** [RC only] System error detected (ERR_COR, ERR_FATAL, ERR_NONFATAL) */ + AL_PCIE_APP_INT_SYS_ERR_RC = AL_BIT(10), + /** [EP only] Software initiates FLR on a Physical Function */ + AL_PCIE_APP_INT_FLR_PF_ACTIVE = AL_BIT(11), + /** [RC only] Root Error Command register assertion notification */ + AL_PCIE_APP_INT_AER_RC_ERR = AL_BIT(12), + /** [RC only] Root Error Command register assertion notification With MSI or MSIX enabled */ + AL_PCIE_APP_INT_AER_RC_ERR_MSI = AL_BIT(13), + /** [RC only] PME Status bit assertion in the Root Status register With INTA */ + AL_PCIE_APP_INT_PME_INT = AL_BIT(15), + /** [RC only] PME Status bit assertion in the Root Status register With MSI or MSIX enabled */ + AL_PCIE_APP_INT_PME_MSI = AL_BIT(16), + /** [RC/EP] The core assert link down event, whenever the link is going down */ + AL_PCIE_APP_INT_LINK_DOWN = AL_BIT(21), + /** [EP only] When the EP gets a command to shut down, signal the software to block any new TLP. */ + AL_PCIE_APP_INT_PM_XTLH_BLOCK_TLP = AL_BIT(22), + /** [RC/EP] PHY/MAC link up */ + AL_PCIE_APP_INT_XMLH_LINK_UP = AL_BIT(23), + /** [RC/EP] Data link up */ + AL_PCIE_APP_INT_RDLH_LINK_UP = AL_BIT(24), + /** [RC/EP] The LTSSM is in RCVRY_LOCK state. */ + AL_PCIE_APP_INT_LTSSM_RCVRY_STATE = AL_BIT(25), + /** + * [RC/EP] CFG write transaction to the configuration space by the RC peer + * For RC the int/ will be set from DBI write (internal SoC write)] + */ + AL_PCIE_APP_INT_CFG_WR = AL_BIT(26), + /** [EP only] CFG access in EP mode */ + AL_PCIE_APP_INT_CFG_ACCESS = AL_BIT(31), +}; + +/** + * App group B interrupts mask - don't change + * All interrupts not listed below should be masked + */ +enum al_pcie_app_int_grp_b { + /** [RC only] PM_PME Message received */ + AL_PCIE_APP_INT_GRP_B_PM_PME_MSG_RCVD = AL_BIT(0), + /** [RC only] PME_TO_Ack Message received */ + AL_PCIE_APP_INT_GRP_B_PME_TO_ACK_MSG_RCVD = AL_BIT(1), + /** [EP only] PME_Turn_Off Message received */ + AL_PCIE_APP_INT_GRP_B_PME_TURN_OFF_MSG_RCVD = AL_BIT(2), + /** [RC only] ERR_CORR Message received */ + AL_PCIE_APP_INT_GRP_B_CORR_ERR_MSG_RCVD = AL_BIT(3), + /** [RC only] ERR_NONFATAL Message received */ + AL_PCIE_APP_INT_GRP_B_NON_FTL_ERR_MSG_RCVD = AL_BIT(4), + /** [RC only] ERR_FATAL Message received */ + AL_PCIE_APP_INT_GRP_B_FTL_ERR_MSG_RCVD = AL_BIT(5), + /** + * [RC/EP] Vendor Defined Message received + * Asserted when a vevdor message is received (with no data), buffers 2 + * messages only, and latch the headers in registers + */ + AL_PCIE_APP_INT_GRP_B_VNDR_MSG_A_RCVD = AL_BIT(6), + /** + * [RC/EP] Vendor Defined Message received + * Asserted when a vevdor message is received (with no data), buffers 2 + * messages only, and latch the headers in registers + */ + AL_PCIE_APP_INT_GRP_B_VNDR_MSG_B_RCVD = AL_BIT(7), + /** [EP only] Link Autonomous Bandwidth Status is updated */ + AL_PCIE_APP_INT_GRP_B_LNK_BW_UPD = AL_BIT(12), + /** [EP only] Link Equalization Request bit in the Link Status 2 Register has been set */ + AL_PCIE_APP_INT_GRP_B_LNK_EQ_REQ = AL_BIT(13), + /** [RC/EP] OB Vendor message request is granted by the PCIe core */ + AL_PCIE_APP_INT_GRP_B_OB_VNDR_MSG_REQ_GRNT = AL_BIT(14), + /** [RC only] CPL timeout from the PCIe core indiication */ + AL_PCIE_APP_INT_GRP_B_CPL_TO = AL_BIT(15), + /** [RC/EP] Slave Response Composer Lookup Error */ + AL_PCIE_APP_INT_GRP_B_SLV_RESP_COMP_LKUP_ERR = AL_BIT(16), + /** [RC/EP] Parity Error */ + AL_PCIE_APP_INT_GRP_B_PARITY_ERR = AL_BIT(17), + /** [EP only] Speed change request */ + AL_PCIE_APP_INT_GRP_B_SPEED_CHANGE = AL_BIT(31), +}; + +/** + * AXI interrupts mask - don't change + * These are internal errors that can happen on the internal chip interface + * between the PCIe port and the I/O Fabric over the AXI bus. The notion of + * master and slave refer to the PCIe port master interface towards the I/O + * Fabric (i.e. for inbound PCIe writes/reads toward the I/O Fabric), while the + * slave interface refer to the I/O Fabric to PCIe port interface where the + * internal chip DMAs and CPU cluster is initiating transactions. + * All interrupts not listed below should be masked. + */ +enum al_pcie_axi_int { + /** [RC/EP] Master Response Composer Lookup Error */ + AL_PCIE_AXI_INT_MSTR_RESP_COMP_LKUP_ERR = AL_BIT(0), + /** [RC/EP] PARITY ERROR on the master data read channel */ + AL_PCIE_AXI_INT_PARITY_ERR_MSTR_DATA_RD_CHNL = AL_BIT(2), + /** [RC/EP] PARITY ERROR on the slave addr read channel */ + AL_PCIE_AXI_INT_PARITY_ERR_SLV_ADDR_RD_CHNL = AL_BIT(3), + /** [RC/EP] PARITY ERROR on the slave addr write channel */ + AL_PCIE_AXI_INT_PARITY_ERR_SLV_ADDR_WR_CHNL = AL_BIT(4), + /** [RC/EP] PARITY ERROR on the slave data write channel */ + AL_PCIE_AXI_INT_PARITY_ERR_SLV_DATA_WR_CHNL = AL_BIT(5), + /** [RC only] Software error: ECAM write request with invalid bus number */ + AL_PCIE_AXI_INT_ECAM_WR_REQ_INVLD_BUS_NUM = AL_BIT(7), + /** [RC only] Software error: ECAM read request with invalid bus number */ + AL_PCIE_AXI_INT_ECAM_RD_REQ_INVLD_BUS_NUM = AL_BIT(8), + /** [RC/EP] Read AXI completion has ERROR */ + AL_PCIE_AXI_INT_RD_AXI_COMPL_ERR = AL_BIT(11), + /** [RC/EP] Write AXI completion has ERROR */ + AL_PCIE_AXI_INT_WR_AXI_COMPL_ERR = AL_BIT(12), + /** [RC/EP] Read AXI completion has timed out */ + AL_PCIE_AXI_INT_RD_AXI_COMPL_TO = AL_BIT(13), + /** [RC/EP] Write AXI completion has timed out */ + AL_PCIE_AXI_INT_WR_AXI_COMPL_TO = AL_BIT(14), + /** [RC/EP] Parity error AXI domain */ + AL_PCIE_AXI_INT_AXI_DOM_PARITY_ERR = AL_BIT(15), + /** [RC/EP] POS error interrupt */ + AL_PCIE_AXI_INT_POS_ERR = AL_BIT(16), +}; + +/** + * @brief Initialize and configure PCIe controller interrupts + * Doesn't change the mask state of the interrupts + * The reset mask state of all interrupts is: Masked + * + * @param pcie_port pcie port handle + */ +void al_pcie_ints_config(struct al_pcie_port *pcie_port); + +/** + * Unmask PCIe app group interrupts + * @param pcie_port pcie_port pcie port handle + * @param int_group interrupt group + * @param int_mask int_mask interrupts to unmask ('1' to unmask) + */ +void al_pcie_app_int_grp_unmask( + struct al_pcie_port *pcie_port, + enum al_pcie_int_group int_group, + uint32_t int_mask); + +/** + * Mask PCIe app group interrupts + * @param pcie_port pcie_port pcie port handle + * @param int_group interrupt group + * @param int_mask int_mask interrupts to unmask ('1' to mask) + */ +void al_pcie_app_int_grp_mask( + struct al_pcie_port *pcie_port, + enum al_pcie_int_group int_group, + uint32_t int_mask); + +/** + * Clear the PCIe app group interrupt cause + * @param pcie_port pcie port handle + * @param int_group interrupt group + * @param int_cause interrupt cause + */ +void al_pcie_app_int_grp_cause_clear( + struct al_pcie_port *pcie_port, + enum al_pcie_int_group int_group, + uint32_t int_cause); + +/** + * Read PCIe app group interrupt cause + * @param pcie_port pcie port handle + * @param int_group interrupt group + * @return interrupt cause or 0 in case the group is not supported + */ +uint32_t al_pcie_app_int_grp_cause_read( + struct al_pcie_port *pcie_port, + enum al_pcie_int_group int_group); + +#endif +/** @} end of group_pcie_interrupts group */ diff --git a/sys/arm/annapurna/alpine/hal/al_hal_pcie_regs.h b/sys/arm/annapurna/alpine/hal/al_hal_pcie_regs.h new file mode 100644 index 000000000000..15c5735e279f --- /dev/null +++ b/sys/arm/annapurna/alpine/hal/al_hal_pcie_regs.h @@ -0,0 +1,594 @@ +/*- +******************************************************************************** +Copyright (C) 2015 Annapurna Labs Ltd. + +This file may be licensed under the terms of the Annapurna Labs Commercial +License Agreement. + +Alternatively, this file can be distributed under the terms of the GNU General +Public License V2 as published by the Free Software Foundation and can be +found at http://www.gnu.org/licenses/gpl-2.0.html + +Alternatively, redistribution and use in source and binary forms, with or +without modification, are permitted provided that the following conditions are +met: + + * Redistributions of source code must retain the above copyright notice, +this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright +notice, this list of conditions and the following disclaimer in +the documentation and/or other materials provided with the +distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + +#ifndef __AL_HAL_PCIE_REGS_H__ +#define __AL_HAL_PCIE_REGS_H__ + +/* Note: Definitions before the includes so axi/wrapper regs sees them */ + +/** Maximum physical functions supported */ +#define REV1_2_MAX_NUM_OF_PFS 1 +#define REV3_MAX_NUM_OF_PFS 4 +#define AL_MAX_NUM_OF_PFS 4 /* the maximum between all Revisions */ + +#include "al_hal_pcie_axi_reg.h" +#ifndef AL_PCIE_EX +#include "al_hal_pcie_w_reg.h" +#else +#include "al_hal_pcie_w_reg_ex.h" +#endif + +/** + * Revision IDs: + * ID_0: SlickRock M0 + * ID_1: SlickRock A0 + * ID_2: PeakRock x4 + * ID_3: PeakRock x8 + */ +#define AL_PCIE_REV_ID_0 0 +#define AL_PCIE_REV_ID_1 1 +#define AL_PCIE_REV_ID_2 2 +#define AL_PCIE_REV_ID_3 3 + +#define AL_PCIE_AXI_REGS_OFFSET 0x0 +#define AL_PCIE_REV_1_2_APP_REGS_OFFSET 0x1000 +#define AL_PCIE_REV_3_APP_REGS_OFFSET 0x2000 +#define AL_PCIE_REV_1_2_CORE_CONF_BASE_OFFSET 0x2000 +#define AL_PCIE_REV_3_CORE_CONF_BASE_OFFSET 0x10000 + +/** Maximum number of lanes supported */ +#define REV1_2_MAX_NUM_LANES 4 +#define REV3_MAX_NUM_LANES 8 +#define AL_MAX_NUM_OF_LANES 8 /* the maximum between all Revisions */ + +struct al_pcie_core_iatu_regs { + uint32_t index; + uint32_t cr1; + uint32_t cr2; + uint32_t lower_base_addr; + uint32_t upper_base_addr; + uint32_t limit_addr; + uint32_t lower_target_addr; + uint32_t upper_target_addr; + uint32_t cr3; + uint32_t rsrvd[(0x270 - 0x224) >> 2]; +}; + +struct al_pcie_core_port_regs { + uint32_t ack_lat_rply_timer; + uint32_t reserved1[(0x10 - 0x4) >> 2]; + uint32_t port_link_ctrl; + uint32_t reserved2[(0x18 - 0x14) >> 2]; + uint32_t timer_ctrl_max_func_num; + uint32_t filter_mask_reg_1; + uint32_t reserved3[(0x48 - 0x20) >> 2]; + uint32_t vc0_posted_rcv_q_ctrl; + uint32_t vc0_non_posted_rcv_q_ctrl; + uint32_t vc0_comp_rcv_q_ctrl; + uint32_t reserved4[(0x10C - 0x54) >> 2]; + uint32_t gen2_ctrl; + uint32_t reserved5[(0x190 - 0x110) >> 2]; + uint32_t gen3_ctrl; + uint32_t gen3_eq_fs_lf; + uint32_t gen3_eq_preset_to_coef_map; + uint32_t gen3_eq_preset_idx; + uint32_t reserved6; + uint32_t gen3_eq_status; + uint32_t gen3_eq_ctrl; + uint32_t reserved7[(0x1B8 - 0x1AC) >> 2]; + uint32_t pipe_loopback_ctrl; + uint32_t rd_only_wr_en; + uint32_t reserved8[(0x1D0 - 0x1C0) >> 2]; + uint32_t axi_slave_err_resp; + uint32_t reserved9[(0x200 - 0x1D4) >> 2]; + struct al_pcie_core_iatu_regs iatu; + uint32_t reserved10[(0x448 - 0x270) >> 2]; +}; + +struct al_pcie_core_aer_regs { + /* 0x0 - PCI Express Extended Capability Header */ + uint32_t header; + /* 0x4 - Uncorrectable Error Status Register */ + uint32_t uncorr_err_stat; + /* 0x8 - Uncorrectable Error Mask Register */ + uint32_t uncorr_err_mask; + /* 0xc - Uncorrectable Error Severity Register */ + uint32_t uncorr_err_severity; + /* 0x10 - Correctable Error Status Register */ + uint32_t corr_err_stat; + /* 0x14 - Correctable Error Mask Register */ + uint32_t corr_err_mask; + /* 0x18 - Advanced Error Capabilities and Control Register */ + uint32_t cap_and_ctrl; + /* 0x1c - Header Log Registers */ + uint32_t header_log[4]; + /* 0x2c - Root Error Command Register */ + uint32_t root_err_cmd; + /* 0x30 - Root Error Status Register */ + uint32_t root_err_stat; + /* 0x34 - Error Source Identification Register */ + uint32_t err_src_id; +}; + +struct al_pcie_core_reg_space_rev_1_2 { + uint32_t config_header[0x40 >> 2]; + uint32_t pcie_pm_cap_base; + uint32_t reserved1[(0x70 - 0x44) >> 2]; + uint32_t pcie_cap_base; + uint32_t pcie_dev_cap_base; + uint32_t pcie_dev_ctrl_status; + uint32_t pcie_link_cap_base; + uint32_t reserved2[(0xB0 - 0x80) >> 2]; + uint32_t msix_cap_base; + uint32_t reserved3[(0x100 - 0xB4) >> 2]; + struct al_pcie_core_aer_regs aer; + uint32_t reserved4[(0x150 - + (0x100 + + sizeof(struct al_pcie_core_aer_regs))) >> 2]; + uint32_t pcie_sec_ext_cap_base; + uint32_t reserved5[(0x700 - 0x154) >> 2]; + struct al_pcie_core_port_regs port_regs; + uint32_t reserved6[(0x1000 - + (0x700 + + sizeof(struct al_pcie_core_port_regs))) >> 2]; +}; + +struct al_pcie_core_reg_space_rev_3 { + uint32_t config_header[0x40 >> 2]; + uint32_t pcie_pm_cap_base; + uint32_t reserved1[(0x70 - 0x44) >> 2]; + uint32_t pcie_cap_base; + uint32_t pcie_dev_cap_base; + uint32_t pcie_dev_ctrl_status; + uint32_t pcie_link_cap_base; + uint32_t reserved2[(0xB0 - 0x80) >> 2]; + uint32_t msix_cap_base; + uint32_t reserved3[(0x100 - 0xB4) >> 2]; + struct al_pcie_core_aer_regs aer; + uint32_t reserved4[(0x158 - + (0x100 + + sizeof(struct al_pcie_core_aer_regs))) >> 2]; + /* pcie_sec_cap is only applicable for function 0 */ + uint32_t pcie_sec_ext_cap_base; + uint32_t reserved5[(0x178 - 0x15C) >> 2]; + /* tph capability is only applicable for rev3 */ + uint32_t tph_cap_base; + uint32_t reserved6[(0x700 - 0x17C) >> 2]; + /* port_regs is only applicable for function 0 */ + struct al_pcie_core_port_regs port_regs; + uint32_t reserved7[(0x1000 - + (0x700 + + sizeof(struct al_pcie_core_port_regs))) >> 2]; +}; + +struct al_pcie_rev3_core_reg_space { + struct al_pcie_core_reg_space_rev_3 func[REV3_MAX_NUM_OF_PFS]; +}; + +struct al_pcie_core_reg_space { + uint32_t *config_header; + uint32_t *pcie_pm_cap_base; + uint32_t *pcie_cap_base; + uint32_t *pcie_dev_cap_base; + uint32_t *pcie_dev_ctrl_status; + uint32_t *pcie_link_cap_base; + uint32_t *msix_cap_base; + struct al_pcie_core_aer_regs *aer; + uint32_t *pcie_sec_ext_cap_base; + uint32_t *tph_cap_base; +}; + +struct al_pcie_revx_regs { + struct al_pcie_revx_axi_regs __iomem axi; +}; + +struct al_pcie_rev1_regs { + struct al_pcie_rev1_axi_regs __iomem axi; + uint32_t reserved1[(AL_PCIE_REV_1_2_APP_REGS_OFFSET - + (AL_PCIE_AXI_REGS_OFFSET + + sizeof(struct al_pcie_rev1_axi_regs))) >> 2]; + struct al_pcie_rev1_w_regs __iomem app; + uint32_t reserved2[(AL_PCIE_REV_1_2_CORE_CONF_BASE_OFFSET - + (AL_PCIE_REV_1_2_APP_REGS_OFFSET + + sizeof(struct al_pcie_rev1_w_regs))) >> 2]; + struct al_pcie_core_reg_space_rev_1_2 core_space; +}; + +struct al_pcie_rev2_regs { + struct al_pcie_rev2_axi_regs __iomem axi; + uint32_t reserved1[(AL_PCIE_REV_1_2_APP_REGS_OFFSET - + (AL_PCIE_AXI_REGS_OFFSET + + sizeof(struct al_pcie_rev2_axi_regs))) >> 2]; + struct al_pcie_rev2_w_regs __iomem app; + uint32_t reserved2[(AL_PCIE_REV_1_2_CORE_CONF_BASE_OFFSET - + (AL_PCIE_REV_1_2_APP_REGS_OFFSET + + sizeof(struct al_pcie_rev2_w_regs))) >> 2]; + struct al_pcie_core_reg_space_rev_1_2 core_space; +}; + +struct al_pcie_rev3_regs { + struct al_pcie_rev3_axi_regs __iomem axi; + uint32_t reserved1[(AL_PCIE_REV_3_APP_REGS_OFFSET - + (AL_PCIE_AXI_REGS_OFFSET + + sizeof(struct al_pcie_rev3_axi_regs))) >> 2]; + struct al_pcie_rev3_w_regs __iomem app; + uint32_t reserved2[(AL_PCIE_REV_3_CORE_CONF_BASE_OFFSET - + (AL_PCIE_REV_3_APP_REGS_OFFSET + + sizeof(struct al_pcie_rev3_w_regs))) >> 2]; + struct al_pcie_rev3_core_reg_space core_space; +}; + +struct al_pcie_axi_ctrl { + uint32_t *global; + uint32_t *master_arctl; + uint32_t *master_awctl; + uint32_t *slv_ctl; +}; + +struct al_pcie_axi_ob_ctrl { + uint32_t *cfg_target_bus; + uint32_t *cfg_control; + uint32_t *io_start_l; + uint32_t *io_start_h; + uint32_t *io_limit_l; + uint32_t *io_limit_h; +}; + +struct al_pcie_axi_pcie_global { + uint32_t *conf; +}; + +struct al_pcie_axi_conf { + uint32_t *zero_lane0; + uint32_t *zero_lane1; + uint32_t *zero_lane2; + uint32_t *zero_lane3; + uint32_t *zero_lane4; + uint32_t *zero_lane5; + uint32_t *zero_lane6; + uint32_t *zero_lane7; +}; + +struct al_pcie_axi_status { + uint32_t *lane[AL_MAX_NUM_OF_LANES]; +}; + +struct al_pcie_axi_parity { + uint32_t *en_axi; +}; + +struct al_pcie_axi_ordering { + uint32_t *pos_cntl; +}; + +struct al_pcie_axi_pre_configuration { + uint32_t *pcie_core_setup; +}; + +struct al_pcie_axi_init_fc { + uint32_t *cfg; +}; + +struct al_pcie_axi_attr_ovrd { + uint32_t *write_msg_ctrl_0; + uint32_t *write_msg_ctrl_1; + uint32_t *pf_sel; +}; + +struct al_pcie_axi_pf_axi_attr_ovrd { + uint32_t *func_ctrl_0; + uint32_t *func_ctrl_1; + uint32_t *func_ctrl_2; + uint32_t *func_ctrl_3; + uint32_t *func_ctrl_4; + uint32_t *func_ctrl_5; + uint32_t *func_ctrl_6; + uint32_t *func_ctrl_7; + uint32_t *func_ctrl_8; + uint32_t *func_ctrl_9; +}; + +struct al_pcie_axi_msg_attr_axuser_table { + uint32_t *entry_vec; +}; + +struct al_pcie_axi_regs { + struct al_pcie_axi_ctrl ctrl; + struct al_pcie_axi_ob_ctrl ob_ctrl; + struct al_pcie_axi_pcie_global pcie_global; + struct al_pcie_axi_conf conf; + struct al_pcie_axi_status status; + struct al_pcie_axi_parity parity; + struct al_pcie_axi_ordering ordering; + struct al_pcie_axi_pre_configuration pre_configuration; + struct al_pcie_axi_init_fc init_fc; + struct al_pcie_revx_axi_int_grp_a_axi *int_grp_a; + /* Rev3 only */ + struct al_pcie_axi_attr_ovrd axi_attr_ovrd; + struct al_pcie_axi_pf_axi_attr_ovrd pf_axi_attr_ovrd[REV3_MAX_NUM_OF_PFS]; + struct al_pcie_axi_msg_attr_axuser_table msg_attr_axuser_table; +}; + +struct al_pcie_w_global_ctrl { + uint32_t *port_init; + uint32_t *pm_control; + uint32_t *events_gen[REV3_MAX_NUM_OF_PFS]; + uint32_t *corr_err_sts_int; + uint32_t *uncorr_err_sts_int; + uint32_t *sris_kp_counter; +}; + +struct al_pcie_w_soc_int { + uint32_t *mask_inta_leg_0; + uint32_t *mask_inta_leg_3; /* Rev 2/3 only */ + uint32_t *mask_msi_leg_0; + uint32_t *mask_msi_leg_3; /* Rev 2/3 only */ +}; +struct al_pcie_w_atu { + uint32_t *in_mask_pair; + uint32_t *out_mask_pair; +}; + +struct al_pcie_w_regs { + struct al_pcie_w_global_ctrl global_ctrl; + struct al_pcie_revx_w_debug *debug; + struct al_pcie_revx_w_ap_user_send_msg *ap_user_send_msg; + struct al_pcie_w_soc_int soc_int[REV3_MAX_NUM_OF_PFS]; + struct al_pcie_revx_w_cntl_gen *ctrl_gen; + struct al_pcie_revx_w_parity *parity; + struct al_pcie_w_atu atu; + struct al_pcie_revx_w_status_per_func *status_per_func[REV3_MAX_NUM_OF_PFS]; + struct al_pcie_revx_w_int_grp *int_grp_a; + struct al_pcie_revx_w_int_grp *int_grp_b; + struct al_pcie_revx_w_int_grp *int_grp_c; + struct al_pcie_revx_w_int_grp *int_grp_d; +}; + +struct al_pcie_regs { + struct al_pcie_axi_regs axi; + struct al_pcie_w_regs app; + struct al_pcie_core_port_regs *port_regs; + struct al_pcie_core_reg_space core_space[REV3_MAX_NUM_OF_PFS]; +}; + +#define PCIE_AXI_MISC_PCIE_GLOBAL_CONF_DEV_TYPE_EP 0 +#define PCIE_AXI_MISC_PCIE_GLOBAL_CONF_DEV_TYPE_RC 4 + +#define PCIE_PORT_GEN2_CTRL_DIRECT_SPEED_CHANGE AL_BIT(17) +#define PCIE_PORT_GEN2_CTRL_TX_SWING_LOW_SHIFT 18 +#define PCIE_PORT_GEN2_CTRL_TX_COMPLIANCE_RCV_SHIFT 19 +#define PCIE_PORT_GEN2_CTRL_DEEMPHASIS_SET_SHIFT 20 +#define PCIE_PORT_GEN2_CTRL_NUM_OF_LANES_MASK AL_FIELD_MASK(12, 8) +#define PCIE_PORT_GEN2_CTRL_NUM_OF_LANES_SHIFT 8 + +#define PCIE_PORT_GEN3_CTRL_EQ_PHASE_2_3_DISABLE_SHIFT 9 +#define PCIE_PORT_GEN3_CTRL_EQ_DISABLE_SHIFT 16 + +#define PCIE_PORT_GEN3_EQ_LF_SHIFT 0 +#define PCIE_PORT_GEN3_EQ_LF_MASK 0x3f +#define PCIE_PORT_GEN3_EQ_FS_SHIFT 6 +#define PCIE_PORT_GEN3_EQ_FS_MASK (0x3f << PCIE_PORT_GEN3_EQ_FS_SHIFT) + +#define PCIE_PORT_LINK_CTRL_LB_EN_SHIFT 2 +#define PCIE_PORT_LINK_CTRL_FAST_LINK_EN_SHIFT 7 +#define PCIE_PORT_LINK_CTRL_LINK_CAPABLE_MASK AL_FIELD_MASK(21, 16) +#define PCIE_PORT_LINK_CTRL_LINK_CAPABLE_SHIFT 16 + +#define PCIE_PORT_PIPE_LOOPBACK_CTRL_PIPE_LB_EN_SHIFT 31 + +#define PCIE_PORT_AXI_SLAVE_ERR_RESP_ALL_MAPPING_SHIFT 0 + +/** timer_ctrl_max_func_num register + * Max physical function number (for example: 0 for 1PF, 3 for 4PFs) + */ +#define PCIE_PORT_GEN3_MAX_FUNC_NUM AL_FIELD_MASK(7, 0) + +/* filter_mask_reg_1 register */ +/** + * SKP Interval Value. + * The number of symbol times to wait between transmitting SKP ordered sets + */ +#define PCIE_FLT_MASK_SKP_INT_VAL_MASK AL_FIELD_MASK(10, 0) + +/* + * 0: Treat Function MisMatched TLPs as UR + * 1: Treat Function MisMatched TLPs as Supported + */ +#define CX_FLT_MASK_UR_FUNC_MISMATCH AL_BIT(16) + +/* + * 0: Treat CFG type1 TLPs as UR for EP; Supported for RC + * 1: Treat CFG type1 TLPs as Supported for EP; UR for RC + */ +#define CX_FLT_MASK_CFG_TYPE1_RE_AS_UR AL_BIT(19) + +/* + * 0: Enforce requester id match for received CPL TLPs. + * A violation results in cpl_abort, and possibly AER of unexp_cpl_err, + * cpl_rcvd_ur, cpl_rcvd_ca + * 1: Mask requester id match for received CPL TLPs + */ +#define CX_FLT_MASK_CPL_REQID_MATCH AL_BIT(22) + +/* + * 0: Enforce function match for received CPL TLPs. + * A violation results in cpl_abort, and possibly AER of unexp_cpl_err, + * cpl_rcvd_ur, cpl_rcvd_ca + * 1: Mask function match for received CPL TLPs + */ +#define CX_FLT_MASK_CPL_FUNC_MATCH AL_BIT(23) + +/* vc0_posted_rcv_q_ctrl register */ +#define RADM_PQ_HCRD_VC0_MASK AL_FIELD_MASK(19, 12) +#define RADM_PQ_HCRD_VC0_SHIFT 12 + +/* vc0_non_posted_rcv_q_ctrl register */ +#define RADM_NPQ_HCRD_VC0_MASK AL_FIELD_MASK(19, 12) +#define RADM_NPQ_HCRD_VC0_SHIFT 12 + +/* vc0_comp_rcv_q_ctrl register */ +#define RADM_CPLQ_HCRD_VC0_MASK AL_FIELD_MASK(19, 12) +#define RADM_CPLQ_HCRD_VC0_SHIFT 12 + +/**** iATU, Control Register 1 ****/ + +/** + * When the Address and BAR matching logic in the core indicate that a MEM-I/O + * transaction matches a BAR in the function corresponding to this value, then + * address translation proceeds. This check is only performed if the "Function + * Number Match Enable" bit of the "iATU Control 2 Register" is set + */ +#define PCIE_IATU_CR1_FUNC_NUM_MASK AL_FIELD_MASK(24, 20) +#define PCIE_IATU_CR1_FUNC_NUM_SHIFT 20 + +/**** iATU, Control Register 2 ****/ +/** For outbound regions, the Function Number Translation Bypass mode enables + * taking the function number of the translated TLP from the PCIe core + * interface and not from the "Function Number" field of CR1. + * For inbound regions, this bit should be asserted when physical function + * match mode needs to be enabled + */ +#define PCIE_IATU_CR2_FUNC_NUM_TRANS_BYPASS_FUNC_MATCH_ENABLE_MASK AL_BIT(19) +#define PCIE_IATU_CR2_FUNC_NUM_TRANS_BYPASS_FUNC_MATCH_ENABLE_SHIFT 19 + +/* pcie_dev_ctrl_status register */ +#define PCIE_PORT_DEV_CTRL_STATUS_CORR_ERR_REPORT_EN AL_BIT(0) +#define PCIE_PORT_DEV_CTRL_STATUS_NON_FTL_ERR_REPORT_EN AL_BIT(1) +#define PCIE_PORT_DEV_CTRL_STATUS_FTL_ERR_REPORT_EN AL_BIT(2) +#define PCIE_PORT_DEV_CTRL_STATUS_UNSUP_REQ_REPORT_EN AL_BIT(3) + +#define PCIE_PORT_DEV_CTRL_STATUS_MPS_MASK AL_FIELD_MASK(7, 5) +#define PCIE_PORT_DEV_CTRL_STATUS_MPS_SHIFT 5 +#define PCIE_PORT_DEV_CTRL_STATUS_MPS_VAL_256 (1 << PCIE_PORT_DEV_CTRL_STATUS_MPS_SHIFT) + +#define PCIE_PORT_DEV_CTRL_STATUS_MRRS_MASK AL_FIELD_MASK(14, 12) +#define PCIE_PORT_DEV_CTRL_STATUS_MRRS_SHIFT 12 +#define PCIE_PORT_DEV_CTRL_STATUS_MRRS_VAL_256 (1 << PCIE_PORT_DEV_CTRL_STATUS_MRRS_SHIFT) + +/****************************************************************************** + * AER registers + ******************************************************************************/ +/* PCI Express Extended Capability ID */ +#define PCIE_AER_CAP_ID_MASK AL_FIELD_MASK(15, 0) +#define PCIE_AER_CAP_ID_SHIFT 0 +#define PCIE_AER_CAP_ID_VAL 1 +/* Capability Version */ +#define PCIE_AER_CAP_VER_MASK AL_FIELD_MASK(19, 16) +#define PCIE_AER_CAP_VER_SHIFT 16 +#define PCIE_AER_CAP_VER_VAL 2 + +/* First Error Pointer */ +#define PCIE_AER_CTRL_STAT_FIRST_ERR_PTR_MASK AL_FIELD_MASK(4, 0) +#define PCIE_AER_CTRL_STAT_FIRST_ERR_PTR_SHIFT 0 +/* ECRC Generation Capability */ +#define PCIE_AER_CTRL_STAT_ECRC_GEN_SUPPORTED AL_BIT(5) +/* ECRC Generation Enable */ +#define PCIE_AER_CTRL_STAT_ECRC_GEN_EN AL_BIT(6) +/* ECRC Check Capable */ +#define PCIE_AER_CTRL_STAT_ECRC_CHK_SUPPORTED AL_BIT(7) +/* ECRC Check Enable */ +#define PCIE_AER_CTRL_STAT_ECRC_CHK_EN AL_BIT(8) + +/* Correctable Error Reporting Enable */ +#define PCIE_AER_ROOT_ERR_CMD_CORR_ERR_RPRT_EN AL_BIT(0) +/* Non-Fatal Error Reporting Enable */ +#define PCIE_AER_ROOT_ERR_CMD_NON_FTL_ERR_RPRT_EN AL_BIT(1) +/* Fatal Error Reporting Enable */ +#define PCIE_AER_ROOT_ERR_CMD_FTL_ERR_RPRT_EN AL_BIT(2) + +/* ERR_COR Received */ +#define PCIE_AER_ROOT_ERR_STAT_CORR_ERR AL_BIT(0) +/* Multiple ERR_COR Received */ +#define PCIE_AER_ROOT_ERR_STAT_CORR_ERR_MULTI AL_BIT(1) +/* ERR_FATAL/NONFATAL Received */ +#define PCIE_AER_ROOT_ERR_STAT_FTL_NON_FTL_ERR AL_BIT(2) +/* Multiple ERR_FATAL/NONFATAL Received */ +#define PCIE_AER_ROOT_ERR_STAT_FTL_NON_FTL_ERR_MULTI AL_BIT(3) +/* First Uncorrectable Fatal */ +#define PCIE_AER_ROOT_ERR_STAT_FIRST_UNCORR_FTL AL_BIT(4) +/* Non-Fatal Error Messages Received */ +#define PCIE_AER_ROOT_ERR_STAT_NON_FTL_RCVD AL_BIT(5) +/* Fatal Error Messages Received */ +#define PCIE_AER_ROOT_ERR_STAT_FTL_RCVD AL_BIT(6) +/* Advanced Error Interrupt Message Number */ +#define PCIE_AER_ROOT_ERR_STAT_ERR_INT_MSG_NUM_MASK AL_FIELD_MASK(31, 27) +#define PCIE_AER_ROOT_ERR_STAT_ERR_INT_MSG_NUM_SHIFT 27 + +/* ERR_COR Source Identification */ +#define PCIE_AER_SRC_ID_CORR_ERR_MASK AL_FIELD_MASK(15, 0) +#define PCIE_AER_SRC_ID_CORR_ERR_SHIFT 0 +/* ERR_FATAL/NONFATAL Source Identification */ +#define PCIE_AER_SRC_ID_CORR_ERR_FTL_NON_FTL_MASK AL_FIELD_MASK(31, 16) +#define PCIE_AER_SRC_ID_CORR_ERR_FTL_NON_FTL_SHIFT 16 + +/* AER message */ +#define PCIE_AER_MSG_REQID_MASK AL_FIELD_MASK(31, 16) +#define PCIE_AER_MSG_REQID_SHIFT 16 +#define PCIE_AER_MSG_TYPE_MASK AL_FIELD_MASK(15, 8) +#define PCIE_AER_MSG_TYPE_SHIFT 8 +#define PCIE_AER_MSG_RESERVED AL_FIELD_MASK(7, 1) +#define PCIE_AER_MSG_VALID AL_BIT(0) +/* AER message ack */ +#define PCIE_AER_MSG_ACK AL_BIT(0) +/* AER errors definitions */ +#define AL_PCIE_AER_TYPE_CORR (0x30) +#define AL_PCIE_AER_TYPE_NON_FATAL (0x31) +#define AL_PCIE_AER_TYPE_FATAL (0x33) +/* Requester ID Bus */ +#define AL_PCIE_REQID_BUS_NUM_SHIFT (8) + +/****************************************************************************** + * TPH registers + ******************************************************************************/ +#define PCIE_TPH_NEXT_POINTER AL_FIELD_MASK(31, 20) + +/****************************************************************************** + * Config Header registers + ******************************************************************************/ +/** + * see BIST_HEADER_TYPE_LATENCY_CACHE_LINE_SIZE_REG in core spec + * Note: valid only for EP mode + */ +#define PCIE_BIST_HEADER_TYPE_BASE 0xc +#define PCIE_BIST_HEADER_TYPE_MULTI_FUNC_MASK AL_BIT(23) + +/****************************************************************************** + * SRIS KP counters default values + ******************************************************************************/ +#define PCIE_SRIS_KP_COUNTER_GEN3_DEFAULT_VAL (0x24) +#define PCIE_SRIS_KP_COUNTER_GEN21_DEFAULT_VAL (0x4B) + +#endif diff --git a/sys/arm/annapurna/alpine/hal/al_hal_pcie_w_reg.h b/sys/arm/annapurna/alpine/hal/al_hal_pcie_w_reg.h new file mode 100644 index 000000000000..44e9d952655d --- /dev/null +++ b/sys/arm/annapurna/alpine/hal/al_hal_pcie_w_reg.h @@ -0,0 +1,1505 @@ +/*- +******************************************************************************** +Copyright (C) 2015 Annapurna Labs Ltd. + +This file may be licensed under the terms of the Annapurna Labs Commercial +License Agreement. + +Alternatively, this file can be distributed under the terms of the GNU General +Public License V2 as published by the Free Software Foundation and can be +found at http://www.gnu.org/licenses/gpl-2.0.html + +Alternatively, redistribution and use in source and binary forms, with or +without modification, are permitted provided that the following conditions are +met: + + * Redistributions of source code must retain the above copyright notice, +this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright +notice, this list of conditions and the following disclaimer in +the documentation and/or other materials provided with the +distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + + +#ifndef __AL_HAL_PCIE_W_REG_H__ +#define __AL_HAL_PCIE_W_REG_H__ + +#ifdef __cplusplus +extern "C" { +#endif +/* +* Unit Registers +*/ + + + +struct al_pcie_rev1_w_global_ctrl { + /* [0x0] */ + uint32_t port_init; + /* [0x4] */ + uint32_t port_status; + /* [0x8] */ + uint32_t pm_control; + uint32_t rsrvd_0; + /* [0x10] */ + uint32_t events_gen; + uint32_t rsrvd[3]; +}; +struct al_pcie_rev2_w_global_ctrl { + /* [0x0] */ + uint32_t port_init; + /* [0x4] */ + uint32_t port_status; + /* [0x8] */ + uint32_t pm_control; + uint32_t rsrvd_0; + /* [0x10] */ + uint32_t events_gen; + /* [0x14] */ + uint32_t pended_corr_err_sts_int; + /* [0x18] */ + uint32_t pended_uncorr_err_sts_int; + /* [0x1c] */ + uint32_t sris_kp_counter_value; +}; +struct al_pcie_rev3_w_global_ctrl { + /* [0x0] */ + uint32_t port_init; + /* [0x4] */ + uint32_t port_status; + /* [0x8] */ + uint32_t pm_control; + /* [0xc] */ + uint32_t pended_corr_err_sts_int; + /* [0x10] */ + uint32_t pended_uncorr_err_sts_int; + /* [0x14] */ + uint32_t sris_kp_counter_value; + uint32_t rsrvd[2]; +}; + +struct al_pcie_rev3_w_events_gen_per_func { + /* [0x0] */ + uint32_t events_gen; +}; +struct al_pcie_rev3_w_pm_state_per_func { + /* [0x0] */ + uint32_t pm_state_per_func; +}; +struct al_pcie_rev3_w_cfg_bars_ovrd { + /* [0x0] */ + uint32_t bar0_mask_lsb; + /* [0x4] */ + uint32_t bar0_mask_msb; + /* [0x8] */ + uint32_t bar0_limit_lsb; + /* [0xc] */ + uint32_t bar0_limit_msb; + /* [0x10] */ + uint32_t bar0_start_lsb; + /* [0x14] */ + uint32_t bar0_start_msb; + /* [0x18] */ + uint32_t bar0_ctrl; + /* [0x1c] */ + uint32_t bar1_mask_lsb; + /* [0x20] */ + uint32_t bar1_mask_msb; + /* [0x24] */ + uint32_t bar1_limit_lsb; + /* [0x28] */ + uint32_t bar1_limit_msb; + /* [0x2c] */ + uint32_t bar1_start_lsb; + /* [0x30] */ + uint32_t bar1_start_msb; + /* [0x34] */ + uint32_t bar1_ctrl; + /* [0x38] */ + uint32_t bar2_mask_lsb; + /* [0x3c] */ + uint32_t bar2_mask_msb; + /* [0x40] */ + uint32_t bar2_limit_lsb; + /* [0x44] */ + uint32_t bar2_limit_msb; + /* [0x48] */ + uint32_t bar2_start_lsb; + /* [0x4c] */ + uint32_t bar2_start_msb; + /* [0x50] */ + uint32_t bar2_ctrl; + /* [0x54] */ + uint32_t bar3_mask_lsb; + /* [0x58] */ + uint32_t bar3_mask_msb; + /* [0x5c] */ + uint32_t bar3_limit_lsb; + /* [0x60] */ + uint32_t bar3_limit_msb; + /* [0x64] */ + uint32_t bar3_start_lsb; + /* [0x68] */ + uint32_t bar3_start_msb; + /* [0x6c] */ + uint32_t bar3_ctrl; + /* [0x70] */ + uint32_t bar4_mask_lsb; + /* [0x74] */ + uint32_t bar4_mask_msb; + /* [0x78] */ + uint32_t bar4_limit_lsb; + /* [0x7c] */ + uint32_t bar4_limit_msb; + /* [0x80] */ + uint32_t bar4_start_lsb; + /* [0x84] */ + uint32_t bar4_start_msb; + /* [0x88] */ + uint32_t bar4_ctrl; + /* [0x8c] */ + uint32_t bar5_mask_lsb; + /* [0x90] */ + uint32_t bar5_mask_msb; + /* [0x94] */ + uint32_t bar5_limit_lsb; + /* [0x98] */ + uint32_t bar5_limit_msb; + /* [0x9c] */ + uint32_t bar5_start_lsb; + /* [0xa0] */ + uint32_t bar5_start_msb; + /* [0xa4] */ + uint32_t bar5_ctrl; + uint32_t rsrvd[2]; +}; + +struct al_pcie_revx_w_debug { + /* [0x0] */ + uint32_t info_0; + /* [0x4] */ + uint32_t info_1; + /* [0x8] */ + uint32_t info_2; + /* [0xc] */ + uint32_t info_3; +}; +struct al_pcie_revx_w_ob_ven_msg { + /* [0x0] */ + uint32_t control; + /* [0x4] */ + uint32_t param_1; + /* [0x8] */ + uint32_t param_2; + /* [0xc] */ + uint32_t data_high; + uint32_t rsrvd_0; + /* [0x14] */ + uint32_t data_low; +}; +struct al_pcie_revx_w_ap_user_send_msg { + /* [0x0] */ + uint32_t req_info; + /* [0x4] */ + uint32_t ack_info; +}; +struct al_pcie_revx_w_link_down { + /* [0x0] */ + uint32_t reset_delay; + /* [0x4] */ + uint32_t reset_extend_rsrvd; +}; +struct al_pcie_revx_w_cntl_gen { + /* [0x0] */ + uint32_t features; +}; +struct al_pcie_revx_w_parity { + /* [0x0] */ + uint32_t en_core; + /* [0x4] */ + uint32_t status_core; +}; +struct al_pcie_revx_w_last_wr { + /* [0x0] */ + uint32_t cfg_addr; +}; +struct al_pcie_rev1_2_w_atu { + /* [0x0] */ + uint32_t in_mask_pair[6]; + /* [0x18] */ + uint32_t out_mask_pair[6]; +}; +struct al_pcie_rev3_w_atu { + /* [0x0] */ + uint32_t in_mask_pair[12]; + /* [0x30] */ + uint32_t out_mask_pair[8]; + /* [0x50] */ + uint32_t reg_out_mask; + uint32_t rsrvd[11]; +}; +struct al_pcie_rev3_w_cfg_func_ext { + /* [0x0] */ + uint32_t cfg; +}; +struct al_pcie_rev3_w_app_hdr_interface_send { + /* [0x0] */ + uint32_t app_hdr_31_0; + /* [0x4] */ + uint32_t app_hdr_63_32; + /* [0x8] */ + uint32_t app_hdr_95_64; + /* [0xc] */ + uint32_t app_hdr_127_96; + /* [0x10] */ + uint32_t app_err_bus; + /* [0x14] */ + uint32_t app_func_num_advisory; + /* [0x18] */ + uint32_t app_hdr_cmd; +}; +struct al_pcie_rev3_w_diag_command { + /* [0x0] */ + uint32_t diag_ctrl; +}; +struct al_pcie_rev1_w_soc_int { + /* [0x0] */ + uint32_t status_0; + /* [0x4] */ + uint32_t status_1; + /* [0x8] */ + uint32_t status_2; + /* [0xc] */ + uint32_t mask_inta_leg_0; + /* [0x10] */ + uint32_t mask_inta_leg_1; + /* [0x14] */ + uint32_t mask_inta_leg_2; + /* [0x18] */ + uint32_t mask_msi_leg_0; + /* [0x1c] */ + uint32_t mask_msi_leg_1; + /* [0x20] */ + uint32_t mask_msi_leg_2; + /* [0x24] */ + uint32_t msi_leg_cntl; +}; +struct al_pcie_rev2_w_soc_int { + /* [0x0] */ + uint32_t status_0; + /* [0x4] */ + uint32_t status_1; + /* [0x8] */ + uint32_t status_2; + /* [0xc] */ + uint32_t status_3; + /* [0x10] */ + uint32_t mask_inta_leg_0; + /* [0x14] */ + uint32_t mask_inta_leg_1; + /* [0x18] */ + uint32_t mask_inta_leg_2; + /* [0x1c] */ + uint32_t mask_inta_leg_3; + /* [0x20] */ + uint32_t mask_msi_leg_0; + /* [0x24] */ + uint32_t mask_msi_leg_1; + /* [0x28] */ + uint32_t mask_msi_leg_2; + /* [0x2c] */ + uint32_t mask_msi_leg_3; + /* [0x30] */ + uint32_t msi_leg_cntl; +}; +struct al_pcie_rev3_w_soc_int_per_func { + /* [0x0] */ + uint32_t status_0; + /* [0x4] */ + uint32_t status_1; + /* [0x8] */ + uint32_t status_2; + /* [0xc] */ + uint32_t status_3; + /* [0x10] */ + uint32_t mask_inta_leg_0; + /* [0x14] */ + uint32_t mask_inta_leg_1; + /* [0x18] */ + uint32_t mask_inta_leg_2; + /* [0x1c] */ + uint32_t mask_inta_leg_3; + /* [0x20] */ + uint32_t mask_msi_leg_0; + /* [0x24] */ + uint32_t mask_msi_leg_1; + /* [0x28] */ + uint32_t mask_msi_leg_2; + /* [0x2c] */ + uint32_t mask_msi_leg_3; + /* [0x30] */ + uint32_t msi_leg_cntl; +}; + +struct al_pcie_revx_w_ap_err { + /* + * [0x0] latch the header in case of any error occur in the core, read + * on clear of the last register in the bind. + */ + uint32_t hdr_log; +}; +struct al_pcie_revx_w_status_per_func { + /* + * [0x0] latch the header in case of any error occure in the core, read + * on clear of the last register in the bind. + */ + uint32_t status_per_func; +}; +struct al_pcie_revx_w_int_grp { + /* + * [0x0] Interrupt Cause Register + * Set by hardware + * - If MSI-X is enabled and auto_clear control bit =TRUE, automatically + * cleared after MSI-X message associated with this specific interrupt + * bit is sent (MSI-X acknowledge is received). + * - Software can set a bit in this register by writing 1 to the + * associated bit in the Interrupt Cause Set register + * Write-0 clears a bit. Write-1 has no effect. + * - On CPU Read - If clear_on_read control bit =TRUE, automatically + * cleared (all bits are cleared). + * When there is a conflict and on the same clock cycle, hardware tries + * to set a bit in the Interrupt Cause register, the specific bit is set + * to ensure the interrupt indication is not lost. + */ + uint32_t cause; + uint32_t rsrvd_0; + /* + * [0x8] Interrupt Cause Set Register + * Writing 1 to a bit in this register sets its corresponding cause bit, + * enabling software to generate a hardware interrupt. Write 0 has no + * effect. + */ + uint32_t cause_set; + uint32_t rsrvd_1; + /* + * [0x10] Interrupt Mask Register + * If Auto-mask control bit =TRUE, automatically set to 1 after MSI-X + * message associatd with the associated interrupt bit is sent (AXI + * write acknowledge is received). + */ + uint32_t mask; + uint32_t rsrvd_2; + /* + * [0x18] Interrupt Mask Clear Register + * Used when auto-mask control bit=True. Enables CPU to clear a specific + * bit. It prevents a scenario in which the CPU overrides another bit + * with 1 (old value) that hardware has just cleared to 0. + * Write 0 to this register clears its corresponding mask bit. Write 1 + * has no effect. + */ + uint32_t mask_clear; + uint32_t rsrvd_3; + /* + * [0x20] Interrupt Status Register + * This register latches the status of the interrupt source. + */ + uint32_t status; + uint32_t rsrvd_4; + /* [0x28] Interrupt Control Register */ + uint32_t control; + uint32_t rsrvd_5; + /* + * [0x30] Interrupt Mask Register + * Each bit in this register masks the corresponding cause bit for + * generating an Abort signal. Its default value is determined by unit + * instantiation. + * (Abort = Wire-OR of Cause & !Interrupt_Abort_Mask) + * This register provides error handling configuration for error + * interrupts + */ + uint32_t abort_mask; + uint32_t rsrvd_6; + /* + * [0x38] Interrupt Log Register + * Each bit in this register masks the corresponding cause bit for + * capturing the log registers. Its default value is determined by unit + * instantiation. + * (Log_capture = Wire-OR of Cause & !Interrupt_Log_Mask) + * This register provides error handling configuration for error + * interrupts. + */ + uint32_t log_mask; + uint32_t rsrvd; +}; + +struct al_pcie_rev1_w_regs { + struct al_pcie_rev1_w_global_ctrl global_ctrl; /* [0x0] */ + uint32_t rsrvd_0[24]; + struct al_pcie_revx_w_debug debug; /* [0x80] */ + struct al_pcie_revx_w_ob_ven_msg ob_ven_msg; /* [0x90] */ + uint32_t rsrvd_1[86]; + struct al_pcie_rev1_w_soc_int soc_int; /* [0x200] */ + struct al_pcie_revx_w_link_down link_down; /* [0x228] */ + struct al_pcie_revx_w_cntl_gen ctrl_gen; /* [0x230] */ + struct al_pcie_revx_w_parity parity; /* [0x234] */ + struct al_pcie_revx_w_last_wr last_wr; /* [0x23c] */ + struct al_pcie_rev1_2_w_atu atu; /* [0x240] */ + uint32_t rsrvd_2[36]; + struct al_pcie_revx_w_int_grp int_grp_a_m0; /* [0x300] */ + struct al_pcie_revx_w_int_grp int_grp_b_m0; /* [0x340] */ + uint32_t rsrvd_3[32]; + struct al_pcie_revx_w_int_grp int_grp_a; /* [0x400] */ + struct al_pcie_revx_w_int_grp int_grp_b; /* [0x440] */ +}; + +struct al_pcie_rev2_w_regs { + struct al_pcie_rev2_w_global_ctrl global_ctrl; /* [0x0] */ + uint32_t rsrvd_0[24]; + struct al_pcie_revx_w_debug debug; /* [0x80] */ + struct al_pcie_revx_w_ob_ven_msg ob_ven_msg; /* [0x90] */ + struct al_pcie_revx_w_ap_user_send_msg ap_user_send_msg; /* [0xa8] */ + uint32_t rsrvd_1[20]; + struct al_pcie_rev2_w_soc_int soc_int; /* [0x100] */ + uint32_t rsrvd_2[61]; + struct al_pcie_revx_w_link_down link_down; /* [0x228] */ + struct al_pcie_revx_w_cntl_gen ctrl_gen; /* [0x230] */ + struct al_pcie_revx_w_parity parity; /* [0x234] */ + struct al_pcie_revx_w_last_wr last_wr; /* [0x23c] */ + struct al_pcie_rev1_2_w_atu atu; /* [0x240] */ + uint32_t rsrvd_3[6]; + struct al_pcie_revx_w_ap_err ap_err[4]; /* [0x288] */ + uint32_t rsrvd_4[26]; + struct al_pcie_revx_w_status_per_func status_per_func; /* [0x300] */ + uint32_t rsrvd_5[63]; + struct al_pcie_revx_w_int_grp int_grp_a; /* [0x400] */ + struct al_pcie_revx_w_int_grp int_grp_b; /* [0x440] */ +}; + +struct al_pcie_rev3_w_regs { + struct al_pcie_rev3_w_global_ctrl global_ctrl; /* [0x0] */ + uint32_t rsrvd_0[24]; + struct al_pcie_revx_w_debug debug; /* [0x80] */ + struct al_pcie_revx_w_ob_ven_msg ob_ven_msg; /* [0x90] */ + struct al_pcie_revx_w_ap_user_send_msg ap_user_send_msg; /* [0xa8] */ + uint32_t rsrvd_1[94]; + struct al_pcie_revx_w_link_down link_down; /* [0x228] */ + struct al_pcie_revx_w_cntl_gen ctrl_gen; /* [0x230] */ + struct al_pcie_revx_w_parity parity; /* [0x234] */ + struct al_pcie_revx_w_last_wr last_wr; /* [0x23c] */ + struct al_pcie_rev3_w_atu atu; /* [0x240] */ + uint32_t rsrvd_2[8]; + struct al_pcie_rev3_w_cfg_func_ext cfg_func_ext; /* [0x2e0] */ + struct al_pcie_rev3_w_app_hdr_interface_send app_hdr_interface_send;/* [0x2e4] */ + struct al_pcie_rev3_w_diag_command diag_command; /* [0x300] */ + uint32_t rsrvd_3[3]; + struct al_pcie_rev3_w_soc_int_per_func soc_int_per_func[REV3_MAX_NUM_OF_PFS]; /* [0x310] */ + uint32_t rsrvd_4[44]; + struct al_pcie_rev3_w_events_gen_per_func events_gen_per_func[REV3_MAX_NUM_OF_PFS]; /* [0x490] */ + uint32_t rsrvd_5[4]; + struct al_pcie_rev3_w_pm_state_per_func pm_state_per_func[REV3_MAX_NUM_OF_PFS];/* [0x4b0] */ + uint32_t rsrvd_6[16]; + struct al_pcie_rev3_w_cfg_bars_ovrd cfg_bars_ovrd[REV3_MAX_NUM_OF_PFS]; /* [0x500] */ + uint32_t rsrvd_7[176]; + uint32_t rsrvd_8[16]; + struct al_pcie_revx_w_ap_err ap_err[5]; /* [0xac0] */ + uint32_t rsrvd_9[11]; + struct al_pcie_revx_w_status_per_func status_per_func[4]; /* [0xb00] */ + uint32_t rsrvd_10[316]; + struct al_pcie_revx_w_int_grp int_grp_a; /* [0x1000] */ + struct al_pcie_revx_w_int_grp int_grp_b; /* [0x1040] */ + struct al_pcie_revx_w_int_grp int_grp_c; /* [0x1080] */ + struct al_pcie_revx_w_int_grp int_grp_d; /* [0x10c0] */ +}; + +/* +* Registers Fields +*/ + + +/**** Port_Init register ****/ +/* Enable port to start LTSSM Link Training */ +#define PCIE_W_GLOBAL_CTRL_PORT_INIT_APP_LTSSM_EN_MASK (1 << 0) +#define PCIE_W_GLOBAL_CTRL_PORT_INIT_APP_LTSSM_EN_SHIFT (0) +/* + * Device Type + * Indicates the specific type of this PCIe Function. It is also used to set the + * Device/Port Type field. + * 4'b0000: PCIe Endpoint + * 4'b0001: Legacy PCIe Endpoint + * 4'b0100: Root Port of PCIe Root Complex + * Must be programmed before link training sequence. According to the reset + * strap + */ +#define PCIE_W_GLOBAL_CTRL_PORT_INIT_DEVICE_TYPE_MASK 0x000000F0 +#define PCIE_W_GLOBAL_CTRL_PORT_INIT_DEVICE_TYPE_SHIFT 4 +/* + * Performs Manual Lane reversal for transmit Lanes. + * Must be programmed before link training sequence. + */ +#define PCIE_W_GLOBAL_CTRL_PORT_INIT_TX_LANE_FLIP_EN (1 << 8) +/* + * Performs Manual Lane reversal for receive Lanes. + * Must be programmed before link training sequence. + */ +#define PCIE_W_GLOBAL_CTRL_PORT_INIT_RX_LANE_FLIP_EN (1 << 9) +/* + * Auxiliary Power Detected + * Indicates that auxiliary power (Vaux) is present. This one move to reset + * strap from + */ +#define PCIE_W_GLOBAL_CTRL_PORT_INIT_SYS_AUX_PWR_DET_NOT_USE (1 << 10) + +/**** Port_Status register ****/ +/* PHY Link up/down indicator */ +#define PCIE_W_GLOBAL_CTRL_PORT_STS_PHY_LINK_UP (1 << 0) +/* + * Data Link Layer up/down indicator + * This status from the Flow Control Initialization State Machine indicates that + * Flow Control has been initiated and the Data Link Layer is ready to transmit + * and receive packets. + */ +#define PCIE_W_GLOBAL_CTRL_PORT_STS_DL_LINK_UP (1 << 1) +/* Reset request due to link down status. */ +#define PCIE_W_GLOBAL_CTRL_PORT_STS_LINK_REQ_RST (1 << 2) +/* Power management is in L0s state.. */ +#define PCIE_W_GLOBAL_CTRL_PORT_STS_PM_LINKST_IN_L0S (1 << 3) +/* Power management is in L1 state. */ +#define PCIE_W_GLOBAL_CTRL_PORT_STS_PM_LINKST_IN_L1 (1 << 4) +/* Power management is in L2 state. */ +#define PCIE_W_GLOBAL_CTRL_PORT_STS_PM_LINKST_IN_L2 (1 << 5) +/* Power management is exiting L2 state. */ +#define PCIE_W_GLOBAL_CTRL_PORT_STS_PM_LINKST_L2_EXIT (1 << 6) +/* Power state of the device. */ +#define PCIE_W_GLOBAL_CTRL_PORT_STS_PM_DSTATE_MASK 0x00000380 +#define PCIE_W_GLOBAL_CTRL_PORT_STS_PM_DSTATE_SHIFT 7 +/* tie to zero. */ +#define PCIE_W_GLOBAL_CTRL_PORT_STS_XMLH_IN_RL0S (1 << 10) +/* Timeout count before flush */ +#define PCIE_W_GLOBAL_CTRL_PORT_STS_LINK_TOUT_FLUSH_NOT (1 << 11) +/* Segmentation buffer not empty */ +#define PCIE_W_GLOBAL_CTRL_PORT_STS_RADM_Q_NOT_EMPTY (1 << 12) +/* + * Clock Turnoff Request + * Allows clock generation module to turn off core_clk based on the current + * power management state: + * 0: core_clk is required to be active for the current power state. + * 1: The current power state allows core_clk to be shut down. + * This does not indicate the clock requirement for the PHY. + */ +#define PCIE_W_GLOBAL_CTRL_PORT_STS_CORE_CLK_REQ_N (1 << 31) + +/**** PM_Control register ****/ +/* + * Wake Up. Used by application logic to wake up the PMC state machine from a + * D1, D2, or D3 power state. EP mode only. Change the value from 0 to 1 to send + * the message. Per function the upper bits are not use for ocie core less than + * 8 functions + */ +#define PCIE_W_REV1_2_GLOBAL_CTRL_PM_CONTROL_PM_XMT_PME (1 << 0) +#define PCIE_W_REV3_GLOBAL_CTRL_PM_CONTROL_PM_XMT_PME_FUNC_MASK 0x000000FF +#define PCIE_W_REV3_GLOBAL_CTRL_PM_CONTROL_PM_XMT_PME_FUNC_SHIFT 0 +/* + * Request to Enter ASPM L1. + * The core ignores the L1 entry request on app_req_entr_l1 when it is busy + * processing a transaction. + */ +#define PCIE_W_REV1_2_GLOBAL_CTRL_PM_CONTROL_REQ_ENTR_L1 (1 << 3) +#define PCIE_W_REV3_GLOBAL_CTRL_PM_CONTROL_REQ_ENTR_L1 (1 << 8) +/* + * Request to exit ASPM L1. + * Only effective if L1 is enabled. + */ +#define PCIE_W_REV1_2_GLOBAL_CTRL_PM_CONTROL_REQ_EXIT_L1 (1 << 4) +#define PCIE_W_REV3_GLOBAL_CTRL_PM_CONTROL_REQ_EXIT_L1 (1 << 9) +/* + * Indication that component is ready to enter the L23 state. The core delays + * sending PM_Enter_L23 (in response to PM_Turn_Off) until this signal becomes + * active. + * EP mode + */ +#define PCIE_W_REV1_2_GLOBAL_CTRL_PM_CONTROL_READY_ENTR_L23 (1 << 5) +#define PCIE_W_REV3_GLOBAL_CTRL_PM_CONTROL_READY_ENTR_L23 (1 << 10) +/* + * Request to generate a PM_Turn_Off Message to communicate transition to L2/L3 + * Ready state to downstream components. Host must wait PM_Turn_Off_Ack messages + * acceptance RC mode. + */ +#define PCIE_W_REV1_2_GLOBAL_CTRL_PM_CONTROL_PM_XMT_TURNOFF (1 << 6) +#define PCIE_W_REV3_GLOBAL_CTRL_PM_CONTROL_PM_XMT_TURNOFF (1 << 11) +/* + * Provides a capability to defer incoming Configuration Requests until + * initialization is complete. When app_req_retry_en is asserted, the core + * completes incoming Configuration Requests with a Configuration Request Retry + * Status. Other incoming Requests complete with Unsupported Request status. + */ +#define PCIE_W_REV1_2_GLOBAL_CTRL_PM_CONTROL_APP_REQ_RETRY_EN (1 << 7) +#define PCIE_W_REV3_GLOBAL_CTRL_PM_CONTROL_APP_REQ_RETRY_EN (1 << 12) +/* + * Core core gate enable + * If set, core_clk is gated off whenever a clock turnoff request allows the + * clock generation module to turn off core_clk (Port_Status.core_clk_req_n + * field), and the PHY supports a request to disable clock gating. If not, the + * core clock turns off in P2 mode in any case (PIPE). + */ +#define PCIE_W_GLOBAL_CTRL_PM_CONTROL_CORE_CLK_GATE (1 << 31) + +/**** sris_kp_counter_value register ****/ +/* skp counter when SRIS disable */ +#define PCIE_W_GLOBAL_CTRL_SRIS_KP_COUNTER_VALUE_GEN3_NO_SRIS_MASK 0x000001FF +#define PCIE_W_GLOBAL_CTRL_SRIS_KP_COUNTER_VALUE_GEN3_NO_SRIS_SHIFT 0 +/* skp counter when SRIS enable */ +#define PCIE_W_GLOBAL_CTRL_SRIS_KP_COUNTER_VALUE_GEN3_SRIS_MASK 0x0003FE00 +#define PCIE_W_GLOBAL_CTRL_SRIS_KP_COUNTER_VALUE_GEN3_SRIS_SHIFT 9 +/* skp counter when SRIS enable for gen3 */ +#define PCIE_W_GLOBAL_CTRL_SRIS_KP_COUNTER_VALUE_GEN21_SRIS_MASK 0x1FFC0000 +#define PCIE_W_GLOBAL_CTRL_SRIS_KP_COUNTER_VALUE_GEN21_SRIS_SHIFT 18 +/* mask the interrupt to the soc in case correctable error occur in the ARI. */ +#define PCIE_W_GLOBAL_CTRL_SRIS_KP_COUNTER_VALUE_RSRVD_MASK 0x60000000 +#define PCIE_W_GLOBAL_CTRL_SRIS_KP_COUNTER_VALUE_RSRVD_SHIFT 29 +/* not in use in the pcie_x8 core. */ +#define PCIE_W_GLOBAL_CTRL_SRIS_KP_COUNTER_VALUE_PCIE_X4_SRIS_EN (1 << 31) + +/**** Events_Gen register ****/ +/* INT_D. Not supported */ +#define PCIE_W_GLOBAL_CTRL_EVENTS_GEN_ASSERT_INTD (1 << 0) +/* INT_C. Not supported */ +#define PCIE_W_GLOBAL_CTRL_EVENTS_GEN_ASSERT_INTC (1 << 1) +/* INT_B. Not supported */ +#define PCIE_W_GLOBAL_CTRL_EVENTS_GEN_ASSERT_INTB (1 << 2) +/* Transmit INT_A Interrupt ControlEvery transition from 0 to 1 ... */ +#define PCIE_W_GLOBAL_CTRL_EVENTS_GEN_ASSERT_INTA (1 << 3) +/* A request to generate an outbound MSI interrupt when MSI is e ... */ +#define PCIE_W_GLOBAL_CTRL_EVENTS_GEN_MSI_TRNS_REQ (1 << 4) +/* Set the MSI vector before issuing msi_trans_req. */ +#define PCIE_W_GLOBAL_CTRL_EVENTS_GEN_MSI_VECTOR_MASK 0x000003E0 +#define PCIE_W_GLOBAL_CTRL_EVENTS_GEN_MSI_VECTOR_SHIFT 5 +/* The application requests hot reset to a downstream device */ +#define PCIE_W_GLOBAL_CTRL_EVENTS_GEN_APP_RST_INIT (1 << 10) +/* The application request unlock message to be sent */ +#define PCIE_W_GLOBAL_CTRL_EVENTS_GEN_UNLOCK_GEN (1 << 30) +/* Indicates that FLR on a Physical Function has been completed */ +#define PCIE_W_GLOBAL_CTRL_EVENTS_GEN_FLR_PF_DONE (1 << 31) + +/**** Cpl_TO_Info register ****/ +/* The Traffic Class of the timed out CPL */ +#define PCIE_W_LCL_LOG_CPL_TO_INFO_TC_MASK 0x00000003 +#define PCIE_W_LCL_LOG_CPL_TO_INFO_TC_SHIFT 0 +/* Indicates which Virtual Function (VF) had a CPL timeout */ +#define PCIE_W_LCL_LOG_CPL_TO_INFO_FUN_NUM_MASK 0x000000FC +#define PCIE_W_LCL_LOG_CPL_TO_INFO_FUN_NUM_SHIFT 2 +/* The Tag field of the timed out CPL */ +#define PCIE_W_LCL_LOG_CPL_TO_INFO_TAG_MASK 0x0000FF00 +#define PCIE_W_LCL_LOG_CPL_TO_INFO_TAG_SHIFT 8 +/* The Attributes field of the timed out CPL */ +#define PCIE_W_LCL_LOG_CPL_TO_INFO_ATTR_MASK 0x00030000 +#define PCIE_W_LCL_LOG_CPL_TO_INFO_ATTR_SHIFT 16 +/* The Len field of the timed out CPL */ +#define PCIE_W_LCL_LOG_CPL_TO_INFO_LEN_MASK 0x3FFC0000 +#define PCIE_W_LCL_LOG_CPL_TO_INFO_LEN_SHIFT 18 +/* + * Write 1 to this field to clear the information logged in the register. New + * logged information will only be valid when the interrupt is cleared . + */ +#define PCIE_W_LCL_LOG_CPL_TO_INFO_VALID (1 << 31) +#define PCIE_W_LCL_LOG_CPL_TO_INFO_VALID_SHIFT (31) + +/**** Rcv_Msg0_0 register ****/ +/* The Requester ID of the received message */ +#define PCIE_W_LCL_LOG_RCV_MSG0_0_REQ_ID_MASK 0x0000FFFF +#define PCIE_W_LCL_LOG_RCV_MSG0_0_REQ_ID_SHIFT 0 +/* + * Valid logged message + * Writing 1 to this bit enables new message capturing. Write one to clear + */ +#define PCIE_W_LCL_LOG_RCV_MSG0_0_VALID (1 << 31) + +/**** Rcv_Msg1_0 register ****/ +/* The Requester ID of the received message */ +#define PCIE_W_LCL_LOG_RCV_MSG1_0_REQ_ID_MASK 0x0000FFFF +#define PCIE_W_LCL_LOG_RCV_MSG1_0_REQ_ID_SHIFT 0 +/* + * Valid logged message + * Writing 1 to this bit enables new message capturing. Write one to clear + */ +#define PCIE_W_LCL_LOG_RCV_MSG1_0_VALID (1 << 31) + +/**** Core_Queues_Status register ****/ +/* + * Indicates which entries in the CPL lookup table + * have valid entries stored. NOT supported. + */ +#define PCIE_W_LCL_LOG_CORE_Q_STATUS_CPL_LUT_VALID_MASK 0x0000FFFF +#define PCIE_W_LCL_LOG_CORE_Q_STATUS_CPL_LUT_VALID_SHIFT 0 + +/**** Cpl_to register ****/ +#define PCIE_W_LCL_LOG_CPL_TO_REQID_MASK 0x0000FFFF +#define PCIE_W_LCL_LOG_CPL_TO_REQID_SHIFT 0 + +/**** Debug_Info_0 register ****/ +/* Indicates the current power state */ +#define PCIE_W_DEBUG_INFO_0_PM_CURRENT_STATE_MASK 0x00000007 +#define PCIE_W_DEBUG_INFO_0_PM_CURRENT_STATE_SHIFT 0 +/* Current state of the LTSSM */ +#define PCIE_W_DEBUG_INFO_0_LTSSM_STATE_MASK 0x000001F8 +#define PCIE_W_DEBUG_INFO_0_LTSSM_STATE_SHIFT 3 +/* Decode of the Recovery. Equalization LTSSM state */ +#define PCIE_W_DEBUG_INFO_0_LTSSM_STATE_RCVRY_EQ (1 << 9) +/* State of selected internal signals, for debug purposes only */ +#define PCIE_W_DEBUG_INFO_0_CXPL_DEBUG_INFO_EI_MASK 0x03FFFC00 +#define PCIE_W_DEBUG_INFO_0_CXPL_DEBUG_INFO_EI_SHIFT 10 + +/**** control register ****/ +/* Indication to send vendor message; when clear the message was sent. */ +#define PCIE_W_OB_VEN_MSG_CONTROL_REQ (1 << 0) + +/**** param_1 register ****/ +/* Vendor message parameters */ +#define PCIE_W_OB_VEN_MSG_PARAM_1_FMT_MASK 0x00000003 +#define PCIE_W_OB_VEN_MSG_PARAM_1_FMT_SHIFT 0 +/* Vendor message parameters */ +#define PCIE_W_OB_VEN_MSG_PARAM_1_TYPE_MASK 0x0000007C +#define PCIE_W_OB_VEN_MSG_PARAM_1_TYPE_SHIFT 2 +/* Vendor message parameters */ +#define PCIE_W_OB_VEN_MSG_PARAM_1_TC_MASK 0x00000380 +#define PCIE_W_OB_VEN_MSG_PARAM_1_TC_SHIFT 7 +/* Vendor message parameters */ +#define PCIE_W_OB_VEN_MSG_PARAM_1_TD (1 << 10) +/* Vendor message parameters */ +#define PCIE_W_OB_VEN_MSG_PARAM_1_EP (1 << 11) +/* Vendor message parameters */ +#define PCIE_W_OB_VEN_MSG_PARAM_1_ATTR_MASK 0x00003000 +#define PCIE_W_OB_VEN_MSG_PARAM_1_ATTR_SHIFT 12 +/* Vendor message parameters */ +#define PCIE_W_OB_VEN_MSG_PARAM_1_LEN_MASK 0x00FFC000 +#define PCIE_W_OB_VEN_MSG_PARAM_1_LEN_SHIFT 14 +/* Vendor message parameters */ +#define PCIE_W_OB_VEN_MSG_PARAM_1_TAG_MASK 0xFF000000 +#define PCIE_W_OB_VEN_MSG_PARAM_1_TAG_SHIFT 24 + +/**** param_2 register ****/ +/* Vendor message parameters */ +#define PCIE_W_OB_VEN_MSG_PARAM_2_REQ_ID_MASK 0x0000FFFF +#define PCIE_W_OB_VEN_MSG_PARAM_2_REQ_ID_SHIFT 0 +/* Vendor message parameters */ +#define PCIE_W_OB_VEN_MSG_PARAM_2_CODE_MASK 0x00FF0000 +#define PCIE_W_OB_VEN_MSG_PARAM_2_CODE_SHIFT 16 +/* Vendor message parameters */ +#define PCIE_W_OB_VEN_MSG_PARAM_2_RSVD_31_24_MASK 0xFF000000 +#define PCIE_W_OB_VEN_MSG_PARAM_2_RSVD_31_24_SHIFT 24 + +/**** ack_info register ****/ +/* Vendor message parameters */ +#define PCIE_W_AP_USER_SEND_MSG_ACK_INFO_ACK (1 << 0) + +/**** features register ****/ +/* Enable MSI fix from the SATA to the PCIe EP - Only valid for port zero */ +#define PCIE_W_CTRL_GEN_FEATURES_SATA_EP_MSI_FIX AL_BIT(16) + +/**** in/out_mask_x_y register ****/ +/* When bit [i] set to 1 it maks the compare in the atu_in/out wind ... */ +#define PCIE_W_ATU_MASK_EVEN_ODD_ATU_MASK_40_32_EVEN_MASK 0x0000FFFF +#define PCIE_W_ATU_MASK_EVEN_ODD_ATU_MASK_40_32_EVEN_SHIFT 0 +/* When bit [i] set to 1 it maks the compare in the atu_in/out wind ... */ +#define PCIE_W_ATU_MASK_EVEN_ODD_ATU_MASK_40_32_ODD_MASK 0xFFFF0000 +#define PCIE_W_ATU_MASK_EVEN_ODD_ATU_MASK_40_32_ODD_SHIFT 16 + +/**** cfg register ****/ +/* + * The 2-bit TPH Requester Enabled field of each TPH + * Requester Control register. + */ +#define PCIE_W_CFG_FUNC_EXT_CFG_CFG_TPH_REQ_EN_MASK 0x000000FF +#define PCIE_W_CFG_FUNC_EXT_CFG_CFG_TPH_REQ_EN_SHIFT 0 +/* SRIS mode enable. */ +#define PCIE_W_CFG_FUNC_EXT_CFG_APP_SRIS_MODE (1 << 8) +/* + * + */ +#define PCIE_W_CFG_FUNC_EXT_CFG_RSRVD_MASK 0xFFFFFE00 +#define PCIE_W_CFG_FUNC_EXT_CFG_RSRVD_SHIFT 9 + +/**** app_func_num_advisory register ****/ +/* + * The number of the function that is reporting the error + * indicated app_err_bus, valid when app_hdr_valid is asserted. + * Correctable and Uncorrected Internal errors (app_err_bus[10:9]) are + * not function specific, and are recorded for all physical functions, + * regardless of the value this bus. Function numbering starts at '0'. + */ +#define PCIE_W_APP_HDR_INTERFACE_SEND_APP_FUNC_NUM_ADVISORY_APP_ERR_FUNC_NUM_MASK 0x0000FFFF +#define PCIE_W_APP_HDR_INTERFACE_SEND_APP_FUNC_NUM_ADVISORY_APP_ERR_FUNC_NUM_SHIFT 0 +/* + * Description: Indicates that your application error is an advisory + * error. Your application should assert app_err_advisory under either + * of the following conditions: + * - The core is configured to mask completion timeout errors, your + * application is reporting a completion timeout error app_err_bus, + * and your application intends to resend the request. In such cases + * the error is an advisory error, as described in PCI Express 3.0 + * Specification. When your application does not intend to resend + * the request, then your application must keep app_err_advisory + * de-asserted when reporting a completion timeout error. + * - The core is configured to forward poisoned TLPs to your + * application and your application is going to treat the poisoned + * TLP as a normal TLP, as described in PCI Express 3.0 + * Specification. Upon receipt of a poisoned TLP, your application + * must report the error app_err_bus, and either assert + * app_err_advisory (to indicate an advisory error) or de-assert + * app_err_advisory (to indicate that your application is dropping the + * TLP). + * For more details, see the PCI Express 3.0 Specification to determine + * when an application error is an advisory error. + */ +#define PCIE_W_APP_HDR_INTERFACE_SEND_APP_FUNC_NUM_ADVISORY_APP_ERR_ADVISORY (1 << 16) +/* + * Rsrvd. + */ +#define PCIE_W_APP_HDR_INTERFACE_SEND_APP_FUNC_NUM_ADVISORY_RSRVD_MASK 0xFFFE0000 +#define PCIE_W_APP_HDR_INTERFACE_SEND_APP_FUNC_NUM_ADVISORY_RSRVD_SHIFT 17 + +/**** app_hdr_cmd register ****/ +/* + * When set the header is send (need to clear before sending the next message). + */ +#define PCIE_W_APP_HDR_INTERFACE_SEND_APP_HDR_CMD_APP_HDR_VALID (1 << 0) +/* + * Rsrvd. + */ +#define PCIE_W_APP_HDR_INTERFACE_SEND_APP_HDR_CMD_RSRVD_MASK 0xFFFFFFFE +#define PCIE_W_APP_HDR_INTERFACE_SEND_APP_HDR_CMD_RSRVD_SHIFT 1 + +/**** diag_ctrl register ****/ +/* + * The 2-bit TPH Requester Enabled field of each TPH + * Requester Control register. + */ +#define PCIE_W_DIAG_COMMAND_DIAG_CTRL_DIAG_CTRL_BUS_MASK 0x00000007 +#define PCIE_W_DIAG_COMMAND_DIAG_CTRL_DIAG_CTRL_BUS_SHIFT 0 +/* + * + */ +#define PCIE_W_DIAG_COMMAND_DIAG_CTRL_RSRVD_MASK 0xFFFFFFF8 +#define PCIE_W_DIAG_COMMAND_DIAG_CTRL_RSRVD_SHIFT 3 + + +/**** Events_Gen register ****/ +/* INT_D. Not supported */ +#define PCIE_W_GLOBAL_CTRL_EVENTS_GEN_ASSERT_INTD (1 << 0) +/* INT_C. Not supported */ +#define PCIE_W_GLOBAL_CTRL_EVENTS_GEN_ASSERT_INTC (1 << 1) +/* INT_B. Not supported */ +#define PCIE_W_GLOBAL_CTRL_EVENTS_GEN_ASSERT_INTB (1 << 2) +/* + * Transmit INT_A Interrupt Control + * Every transition from 0 to 1 schedules an Assert_ INT interrupt message for + * transmit. + * Every transition from 1 to 0, schedules a Deassert_INT interrupt message for + * transmit. Which interrupt, the PCIe only use INTA message. + */ +#define PCIE_W_GLOBAL_CTRL_EVENTS_GEN_ASSERT_INTA (1 << 3) +/* + * A request to generate an outbound MSI interrupt when MSI is enabled. Change + * from 1'b0 to 1'b1 to create an MSI write to be sent. + */ +#define PCIE_W_GLOBAL_CTRL_EVENTS_GEN_MSI_TRNS_REQ (1 << 4) +/* Set the MSI vector before issuing msi_trans_req. */ +#define PCIE_W_GLOBAL_CTRL_EVENTS_GEN_MSI_VECTOR_MASK 0x000003E0 +#define PCIE_W_GLOBAL_CTRL_EVENTS_GEN_MSI_VECTOR_SHIFT 5 +/* + * The application requests hot reset to a downstream device. Change the value + * from 0 to 1 to send hot reset. Only func 0 is supported. + */ +#define PCIE_W_GLOBAL_CTRL_EVENTS_GEN_APP_RST_INIT (1 << 10) +/* + * The application request unlock message to be sent. Change the value from 0 to + * 1 to send the message. Only func 0 is supported. + */ +#define PCIE_W_GLOBAL_CTRL_EVENTS_GEN_UNLOCK_GEN (1 << 30) +/* Indicates that FLR on a Physical Function has been completed. */ +#define PCIE_W_GLOBAL_CTRL_EVENTS_GEN_FLR_PF_DONE (1 << 31) + +/**** pm_state_per_func register ****/ +/* + * Description: The current power management D-state of the + * function: + * \u25a0 000b: D0 + * \u25a0 001b: D1 + * \u25a0 010b: D2 + * \u25a0 011b: D3 + * \u25a0 100b: Uninitialized + * \u25a0 Other values: Not applicable + * There are 3 bits of pm_dstate for each configured function. + */ +#define PCIE_W_PM_STATE_PER_FUNC_PM_STATE_PER_FUNC_PM_DSTATE_MASK 0x0000000F +#define PCIE_W_PM_STATE_PER_FUNC_PM_STATE_PER_FUNC_PM_DSTATE_SHIFT 0 +/* + * PME Status bit from the PMCSR. There is 1 bit of + * pm_status for each configured function + */ +#define PCIE_W_PM_STATE_PER_FUNC_PM_STATE_PER_FUNC_PM_STATUS (1 << 4) +/* + * PME Enable bit in the PMCSR. There is 1 bit of + * pm_pme_en for each configured function. + */ +#define PCIE_W_PM_STATE_PER_FUNC_PM_STATE_PER_FUNC_PM_PME_EN (1 << 5) +/* + * Auxiliary Power Enable bit in the Device Control + * register. There is 1 bit of aux_pm_en for each configured function. + */ +#define PCIE_W_PM_STATE_PER_FUNC_PM_STATE_PER_FUNC_AUX_PME_EN (1 << 6) +/* + * This field should be set according to the MAX_FUNC_NUM set in the PCIe core, + * it uses as mask (bit per function) to the dsate when set to zero. + */ +#define PCIE_W_PM_STATE_PER_FUNC_PM_STATE_PER_FUNC_ASPM_PF_ENABLE_MAX_FUNC_NUMBER (1 << 7) +/* + * This field should be set according to the MAX_FUNC_NUM set in the PCIe core, + * it uses as mask (bit per function) to the ASPM contrl bit, when set to zero. + */ +#define PCIE_W_PM_STATE_PER_FUNC_PM_STATE_PER_FUNC_DSATE_PF_ENABLE_MAX_FUNC_NUMBER (1 << 8) + +/**** bar0_ctrl register ****/ +/* bar is en and override the internal PF bar. */ +#define PCIE_W_CFG_BARS_OVRD_BAR0_CTRL_BAR_EN_MASK 0x00000003 +#define PCIE_W_CFG_BARS_OVRD_BAR0_CTRL_BAR_EN_SHIFT 0 +/* bar is io */ +#define PCIE_W_CFG_BARS_OVRD_BAR0_CTRL_BAR_IO_MASK 0x0000000C +#define PCIE_W_CFG_BARS_OVRD_BAR0_CTRL_BAR_IO_SHIFT 2 +/* Reserved. */ +#define PCIE_W_CFG_BARS_OVRD_BAR0_CTRL_RSRVS_MASK 0xFFFFFFF0 +#define PCIE_W_CFG_BARS_OVRD_BAR0_CTRL_RSRVS_SHIFT 4 + +/**** bar1_ctrl register ****/ +/* bar is en and override the internal PF bar. */ +#define PCIE_W_CFG_BARS_OVRD_BAR1_CTRL_BAR_EN_MASK 0x00000003 +#define PCIE_W_CFG_BARS_OVRD_BAR1_CTRL_BAR_EN_SHIFT 0 +/* bar is io */ +#define PCIE_W_CFG_BARS_OVRD_BAR1_CTRL_BAR_IO_MASK 0x0000000C +#define PCIE_W_CFG_BARS_OVRD_BAR1_CTRL_BAR_IO_SHIFT 2 +/* Reserved. */ +#define PCIE_W_CFG_BARS_OVRD_BAR1_CTRL_RSRVS_MASK 0xFFFFFFF0 +#define PCIE_W_CFG_BARS_OVRD_BAR1_CTRL_RSRVS_SHIFT 4 + +/**** bar2_ctrl register ****/ +/* bar is en and override the internal PF bar. */ +#define PCIE_W_CFG_BARS_OVRD_BAR2_CTRL_BAR_EN_MASK 0x00000003 +#define PCIE_W_CFG_BARS_OVRD_BAR2_CTRL_BAR_EN_SHIFT 0 +/* bar is io */ +#define PCIE_W_CFG_BARS_OVRD_BAR2_CTRL_BAR_IO_MASK 0x0000000C +#define PCIE_W_CFG_BARS_OVRD_BAR2_CTRL_BAR_IO_SHIFT 2 +/* Reserved. */ +#define PCIE_W_CFG_BARS_OVRD_BAR2_CTRL_RSRVS_MASK 0xFFFFFFF0 +#define PCIE_W_CFG_BARS_OVRD_BAR2_CTRL_RSRVS_SHIFT 4 + +/**** bar3_ctrl register ****/ +/* bar is en and override the internal PF bar. */ +#define PCIE_W_CFG_BARS_OVRD_BAR3_CTRL_BAR_EN_MASK 0x00000003 +#define PCIE_W_CFG_BARS_OVRD_BAR3_CTRL_BAR_EN_SHIFT 0 +/* bar is io */ +#define PCIE_W_CFG_BARS_OVRD_BAR3_CTRL_BAR_IO_MASK 0x0000000C +#define PCIE_W_CFG_BARS_OVRD_BAR3_CTRL_BAR_IO_SHIFT 2 +/* Reserved. */ +#define PCIE_W_CFG_BARS_OVRD_BAR3_CTRL_RSRVS_MASK 0xFFFFFFF0 +#define PCIE_W_CFG_BARS_OVRD_BAR3_CTRL_RSRVS_SHIFT 4 + +/**** bar4_ctrl register ****/ +/* bar is en and override the internal PF bar. */ +#define PCIE_W_CFG_BARS_OVRD_BAR4_CTRL_BAR_EN_MASK 0x00000003 +#define PCIE_W_CFG_BARS_OVRD_BAR4_CTRL_BAR_EN_SHIFT 0 +/* bar is io */ +#define PCIE_W_CFG_BARS_OVRD_BAR4_CTRL_BAR_IO_MASK 0x0000000C +#define PCIE_W_CFG_BARS_OVRD_BAR4_CTRL_BAR_IO_SHIFT 2 +/* Reserved. */ +#define PCIE_W_CFG_BARS_OVRD_BAR4_CTRL_RSRVS_MASK 0xFFFFFFF0 +#define PCIE_W_CFG_BARS_OVRD_BAR4_CTRL_RSRVS_SHIFT 4 + +/**** bar5_ctrl register ****/ +/* bar is en and override the internal PF bar. */ +#define PCIE_W_CFG_BARS_OVRD_BAR5_CTRL_BAR_EN_MASK 0x00000003 +#define PCIE_W_CFG_BARS_OVRD_BAR5_CTRL_BAR_EN_SHIFT 0 +/* bar is io */ +#define PCIE_W_CFG_BARS_OVRD_BAR5_CTRL_BAR_IO_MASK 0x0000000C +#define PCIE_W_CFG_BARS_OVRD_BAR5_CTRL_BAR_IO_SHIFT 2 +/* Reserved. */ +#define PCIE_W_CFG_BARS_OVRD_BAR5_CTRL_RSRVS_MASK 0xFFFFFFF0 +#define PCIE_W_CFG_BARS_OVRD_BAR5_CTRL_RSRVS_SHIFT 4 + +/**** cause_A register ****/ +/* Deassert_INTD received. Write zero to clear this bit. */ +#define PCIE_W_INT_GRP_A_CAUSE_A_DEASSERT_INTD (1 << 0) +/* Deassert_INTC received. Write zero to clear this bit. */ +#define PCIE_W_INT_GRP_A_CAUSE_A_DEASSERT_INTC (1 << 1) +/* Deassert_INTB received. Write zero to clear this bit. */ +#define PCIE_W_INT_GRP_A_CAUSE_A_DEASSERT_INTB (1 << 2) +/* Deassert_INTA received. Write zero to clear this bit. */ +#define PCIE_W_INT_GRP_A_CAUSE_A_DEASSERT_INTA (1 << 3) +/* Assert_INTD received. Write zero to clear this bit. */ +#define PCIE_W_INT_GRP_A_CAUSE_A_ASSERT_INTD (1 << 4) +/* Assert_INTC received. Write zero to clear this bit. */ +#define PCIE_W_INT_GRP_A_CAUSE_A_ASSERT_INTC (1 << 5) +/* Assert_INTC received. Write zero to clear this bit. */ +#define PCIE_W_INT_GRP_A_CAUSE_A_ASSERT_INTB (1 << 6) +/* Assert_INTA received. Write zero to clear this bit. */ +#define PCIE_W_INT_GRP_A_CAUSE_A_ASSERT_INTA (1 << 7) +/* + * MSI Controller Interrupt + * MSI interrupt is being received. Write zero to clear this bit + */ +#define PCIE_W_INT_GRP_A_CAUSE_A_MSI_CNTR_RCV_INT (1 << 8) +/* + * MSI sent grant. Write zero to clear this bit. + */ +#define PCIE_W_INT_GRP_A_CAUSE_A_MSI_TRNS_GNT (1 << 9) +/* + * System error detected + * Indicates if any device in the hierarchy reports any of the following errors + * and the associated enable bit is set in the Root Control register: + * ERR_COR + * ERR_FATAL + * ERR_NONFATAL + * Also asserted when an internal error is detected. Write zero to clear this + * bit. + */ +#define PCIE_W_INT_GRP_A_CAUSE_A_SYS_ERR_RC (1 << 10) +/* + * Set when software initiates FLR on a Physical Function by writing to the + * Initiate FLR register bit of that function Write zero to clear this bit. + */ +#define PCIE_W_REV1_2_INT_GRP_A_CAUSE_A_FLR_PF_ACTIVE (1 << 11) +#define PCIE_W_REV3_INT_GRP_A_CAUSE_A_RSRVD_11 (1 << 11) +/* + * Reported error condition causes a bit to be set in the Root Error Status + * register and the associated error message reporting enable bit is set in the + * Root Error Command Register. Write zero to clear this bit. + */ +#define PCIE_W_REV1_2_INT_GRP_A_CAUSE_A_AER_RC_ERR (1 << 12) +#define PCIE_W_REV3_INT_GRP_A_CAUSE_A_RSRVD_12 (1 << 12) +/* + * The core asserts aer_rc_err_msi when all of the following conditions are + * true: + * - MSI or MSI-X is enabled. + * - A reported error condition causes a bit to be set in the Root Error Status + * register. + * - The associated error message reporting enable bit is set in the Root Error + * Command register Write zero to clear this bit + */ +#define PCIE_W_REV1_2_INT_GRP_A_CAUSE_A_AER_RC_ERR_MSI (1 << 13) +#define PCIE_W_REV3_INT_GRP_A_CAUSE_A_RSRVD_13 (1 << 13) +/* + * Wake Up. Wake up from power management unit. + * The core generates wake to request the system to restore power and clock when + * a beacon has been detected. wake is an active high signal and its rising edge + * should be detected to drive the WAKE# on the connector Write zero to clear + * this bit + */ +#define PCIE_W_INT_GRP_A_CAUSE_A_WAKE (1 << 14) +/* + * The core asserts cfg_pme_int when all of the following conditions are true: + * - INTx Assertion Disable bit in the Command register is 0. + * - PME Interrupt Enable bit in the Root Control register is set to 1. + * - PME Status bit in the Root Status register is set to 1. Write zero to clear + * this bit + */ +#define PCIE_W_REV1_2_INT_GRP_A_CAUSE_A_PME_INT (1 << 15) +#define PCIE_W_REV3_INT_GRP_A_CAUSE_A_RSRVD_15 (1 << 15) +/* + * The core asserts cfg_pme_msi when all of the following conditions are true: + * - MSI or MSI-X is enabled. + * - PME Interrupt Enable bit in the Root Control register is set to 1. + * - PME Status bit in the Root Status register is set to 1. Write zero to clear + * this bit + */ +#define PCIE_W_REV1_2_INT_GRP_A_CAUSE_A_PME_MSI (1 << 16) +#define PCIE_W_REV3_INT_GRP_A_CAUSE_A_RSRVD_16 (1 << 16) +/* + * The core asserts hp_pme when all of the following conditions are true: + * - The PME Enable bit in the Power Management Control and Status register is + * set to 1. + * - Any bit in the Slot Status register transitions from 0 to 1 and the + * associated event notification is enabled in the Slot Control register. Write + * zero to clear this bit + */ +#define PCIE_W_INT_GRP_A_CAUSE_A_HP_PME (1 << 17) +/* + * The core asserts hp_int when all of the following conditions are true: + * - INTx Assertion Disable bit in the Command register is 0. + * - Hot-Plug interrupts are enabled in the Slot Control register. + * - Any bit in the Slot Status register is equal to 1, and the associated event + * notification is enabled in the Slot Control register. Write zero to clear + * this bit + */ +#define PCIE_W_REV1_2_INT_GRP_A_CAUSE_A_HP_INT (1 << 18) +/* The outstanding write counter become full should never happen */ +#define PCIE_W_REV3_INT_GRP_A_CAUSE_A_WRITE_COUNTER_FULL_ERR (1 << 18) + + +/* + * The core asserts hp_msi when the logical AND of the following conditions + * transitions from false to true: + * - MSI or MSI-X is enabled. + * - Hot-Plug interrupts are enabled in the Slot Control register. + * - Any bit in the Slot Status register transitions from 0 to 1 and the + * associated event notification is enabled in the Slot Control register. + */ +#define PCIE_W_INT_GRP_A_CAUSE_A_HP_MSI (1 << 19) +/* Read VPD registers notification */ +#define PCIE_W_REV1_2_INT_GRP_A_CAUSE_A_VPD_INT (1 << 20) +/* not use */ +#define PCIE_W_REV3_INT_GRP_A_CAUSE_A_NOT_USE (1 << 20) + +/* + * The core assert link down event, whenever the link is going down. Write zero + * to clear this bit, pulse signal + */ +#define PCIE_W_INT_GRP_A_CAUSE_A_LINK_DOWN_EVENT (1 << 21) +/* + * When the EP gets a command to shut down, signal the software to block any new + * TLP. + */ +#define PCIE_W_INT_GRP_A_CAUSE_A_PM_XTLH_BLOCK_TLP (1 << 22) +/* PHY/MAC link up */ +#define PCIE_W_INT_GRP_A_CAUSE_A_XMLH_LINK_UP (1 << 23) +/* Data link up */ +#define PCIE_W_INT_GRP_A_CAUSE_A_RDLH_LINK_UP (1 << 24) +/* The ltssm is in RCVRY_LOCK state. */ +#define PCIE_W_INT_GRP_A_CAUSE_A_LTSSM_RCVRY_STATE (1 << 25) +/* + * Config write transaction to the config space by the RC peer, enable this + * interrupt only for EP mode. + */ +#define PCIE_W_INT_GRP_A_CAUSE_A_CFG_WR_EVENT (1 << 26) +/* AER error */ +#define PCIE_W_INT_GRP_A_CAUSE_A_AP_PENDED_CORR_ERR_STS_INT (1 << 28) +/* AER error */ +#define PCIE_W_INT_GRP_A_CAUSE_A_AP_PENDED_UNCORR_ERR_STS_INT (1 << 29) + +/**** control_A register ****/ +/* When Clear_on_Read =1, all bits of Cause register are cleared on read. */ +#define PCIE_W_INT_GRP_A_CONTROL_A_CLEAR_ON_READ (1 << 0) +/* + * (Must be set only when MSIX is enabled.) + * When Auto-Mask =1 and an MSI-X ACK for this bit is received, its + * corresponding bit in the Mask register is set, masking future interrupts. + */ +#define PCIE_W_INT_GRP_A_CONTROL_A_AUTO_MASK (1 << 1) +/* + * Auto_Clear (RW) + * When Auto-Clear =1, the bits in the Interrupt Cause register are auto-cleared + * after MSI-X is acknowledged. Must be used only if MSI-X is enabled. + */ +#define PCIE_W_INT_GRP_A_CONTROL_A_AUTO_CLEAR (1 << 2) +/* + * When Set_on_Posedge =1, the bits in the Interrupt Cause register are set on + * the posedge of the interrupt source, i.e., when interrupt source =1 and + * Interrupt Status = 0. + * When Set_on_Posedge =0, the bits in the Interrupt Cause register are set when + * interrupt source =1. + */ +#define PCIE_W_INT_GRP_A_CONTROL_A_SET_ON_POSEDGE (1 << 3) +/* + * When Moderation_Reset =1, all Moderation timers associated with the interrupt + * cause bits are cleared to 0, enabling immediate interrupt assertion if any + * unmasked cause bit is set to 1. This bit is self-negated. + */ +#define PCIE_W_INT_GRP_A_CONTROL_A_MOD_RST (1 << 4) +/* + * When mask_msi_x =1, no MSI-X from this group is sent. This bit must be set to + * 1 when the associated summary bit in this group is used to generate a single + * MSI-X for this group. + */ +#define PCIE_W_INT_GRP_A_CONTROL_A_MASK_MSI_X (1 << 5) +/* MSI-X AWID value. Same ID for all cause bits. */ +#define PCIE_W_INT_GRP_A_CONTROL_A_AWID_MASK 0x00000F00 +#define PCIE_W_INT_GRP_A_CONTROL_A_AWID_SHIFT 8 +/* + * This value determines the interval between interrupts; writing ZERO disables + * Moderation. + */ +#define PCIE_W_INT_GRP_A_CONTROL_A_MOD_INTV_MASK 0x00FF0000 +#define PCIE_W_INT_GRP_A_CONTROL_A_MOD_INTV_SHIFT 16 +/* + * This value determines the Moderation_Timer_Clock speed. + * 0- Moderation-timer is decremented every 1x256 SB clock cycles ~1uS. + * 1- Moderation-timer is decremented every 2x256 SB clock cycles ~2uS. + * N- Moderation-timer is decremented every Nx256 SB clock cycles ~(N+1) uS. + */ +#define PCIE_W_INT_GRP_A_CONTROL_A_MOD_RES_MASK 0x0F000000 +#define PCIE_W_INT_GRP_A_CONTROL_A_MOD_RES_SHIFT 24 + +/**** cause_B register ****/ +/* Indicates that the core received a PM_PME Message. Write Zero to clear. */ +#define PCIE_W_INT_GRP_B_CAUSE_B_MSG_PM_PME (1 << 0) +/* + * Indicates that the core received a PME_TO_Ack Message. Write Zero to clear. + */ +#define PCIE_W_INT_GRP_B_CAUSE_B_MSG_PM_TO_ACK (1 << 1) +/* + * Indicates that the core received an PME_Turn_Off Message. Write Zero to + * clear. + * EP mode only + */ +#define PCIE_W_INT_GRP_B_CAUSE_B_MSG_PM_TURNOFF (1 << 2) +/* Indicates that the core received an ERR_CORR Message. Write Zero to clear. */ +#define PCIE_W_INT_GRP_B_CAUSE_B_MSG_CORRECTABLE_ERR (1 << 3) +/* + * Indicates that the core received an ERR_NONFATAL Message. Write Zero to + * clear. + */ +#define PCIE_W_INT_GRP_B_CAUSE_B_MSG_NONFATAL_ERR (1 << 4) +/* + * Indicates that the core received an ERR_FATAL Message. Write Zero to clear. + */ +#define PCIE_W_INT_GRP_B_CAUSE_B_MSG_FATAL_ERR (1 << 5) +/* + * Indicates that the core received a Vendor Defined Message. Write Zero to + * clear. + */ +#define PCIE_W_INT_GRP_B_CAUSE_B_MSG_VENDOR_0 (1 << 6) +/* + * Indicates that the core received a Vendor Defined Message. Write Zero to + * clear. + */ +#define PCIE_W_INT_GRP_B_CAUSE_B_MSG_VENDOR_1 (1 << 7) +/* Indicates that the core received an Unlock Message. Write Zero to clear. */ +#define PCIE_W_INT_GRP_B_CAUSE_B_MSG_UNLOCK (1 << 8) +/* + * Notification when the Link Autonomous Bandwidth Status register (Link Status + * register bit 15) is updated and the Link Autonomous Bandwidth Interrupt + * Enable (Link Control register bit 11) is set. This bit is not applicable to, + * and is reserved, for Endpoint device. Write Zero to clear + */ +#define PCIE_W_INT_GRP_B_CAUSE_B_LINK_AUTO_BW_INT (1 << 12) +/* + * Notification that the Link Equalization Request bit in the Link Status 2 + * Register has been set. Write Zero to clear. + */ +#define PCIE_W_INT_GRP_B_CAUSE_B_LINK_EQ_REQ_INT (1 << 13) +/* + * OB Vendor message request is granted by the PCIe core Write Zero to clear. + */ +#define PCIE_W_INT_GRP_B_CAUSE_B_VENDOR_MSG_GRANT (1 << 14) +/* CPL timeout from the PCIe core inidication. Write Zero to clear */ +#define PCIE_W_INT_GRP_B_CAUSE_B_CMP_TIME_OUT (1 << 15) +/* + * Slave Response Composer Lookup Error + * Indicates that an overflow occurred in a lookup table of the Inbound + * responses. This indicates that there was a violation of the number of + * outstanding NP requests issued for the Outbound direction. Write zero to + * clear + */ +#define PCIE_W_INT_GRP_B_CAUSE_B_RADMX_CMPOSER_LOOKUP_ERR (1 << 16) +/* Parity Error */ +#define PCIE_W_INT_GRP_B_CAUSE_B_PARITY_ERROR_CORE (1 << 17) + +/**** control_B register ****/ +/* When Clear_on_Read =1, all bits of the Cause register are cleared on read. */ +#define PCIE_W_INT_GRP_B_CONTROL_B_CLEAR_ON_READ (1 << 0) +/* + * (Must be set only when MSIX is enabled.) + * When Auto-Mask =1 and an MSI-X ACK for this bit is received, its + * corresponding bit in the Mask register is set, masking future interrupts. + */ +#define PCIE_W_INT_GRP_B_CONTROL_B_AUTO_MASK (1 << 1) +/* + * Auto_Clear (RW) + * When Auto-Clear =1, the bits in the Interrupt Cause register are auto-cleared + * after MSI-X is acknowledged. Must be used only if MSI-X is enabled. + */ +#define PCIE_W_INT_GRP_B_CONTROL_B_AUTO_CLEAR (1 << 2) +/* + * When Set_on_Posedge =1, the bits in the interrupt Cause register are set on + * the posedge of the interrupt source, i.e., when Interrupt Source =1 and + * Interrupt Status = 0. + * When Set_on_Posedge =0, the bits in the Interrupt Cause register are set when + * Interrupt Source =1. + */ +#define PCIE_W_INT_GRP_B_CONTROL_B_SET_ON_POSEDGE (1 << 3) +/* + * When Moderation_Reset =1, all Moderation timers associated with the interrupt + * cause bits are cleared to 0, enabling an immediate interrupt assertion if any + * unmasked cause bit is set to 1. This bit is self-negated. + */ +#define PCIE_W_INT_GRP_B_CONTROL_B_MOD_RST (1 << 4) +/* + * When mask_msi_x =1, no MSI-X from this group is sent. This bit must be set to + * 1 when the associated summary bit in this group is used to generate a single + * MSI-X for this group. + */ +#define PCIE_W_INT_GRP_B_CONTROL_B_MASK_MSI_X (1 << 5) +/* MSI-X AWID value. Same ID for all cause bits. */ +#define PCIE_W_INT_GRP_B_CONTROL_B_AWID_MASK 0x00000F00 +#define PCIE_W_INT_GRP_B_CONTROL_B_AWID_SHIFT 8 +/* + * This value determines the interval between interrupts. Writing ZERO disables + * Moderation. + */ +#define PCIE_W_INT_GRP_B_CONTROL_B_MOD_INTV_MASK 0x00FF0000 +#define PCIE_W_INT_GRP_B_CONTROL_B_MOD_INTV_SHIFT 16 +/* + * This value determines the Moderation_Timer_Clock speed. + * 0- Moderation-timer is decremented every 1x256 SB clock cycles ~1uS. + * 1- Moderation-timer is decremented every 2x256 SB clock cycles ~2uS. + * N- Moderation-timer is decremented every Nx256 SB clock cycles ~(N+1) uS. + */ +#define PCIE_W_INT_GRP_B_CONTROL_B_MOD_RES_MASK 0x0F000000 +#define PCIE_W_INT_GRP_B_CONTROL_B_MOD_RES_SHIFT 24 + +/**** cause_C register ****/ +/* VPD interrupt, ot read/write frpm EEPROM */ +#define PCIE_W_INTERRUPT_GRP_C_INT_CAUSE_GRP_C_VPD_INT_FUNC_MASK 0x0000000F +#define PCIE_W_INTERRUPT_GRP_C_INT_CAUSE_GRP_C_VPD_INT_FUNC_SHIFT 0 +/* flr PF active */ +#define PCIE_W_INTERRUPT_GRP_C_INT_CAUSE_GRP_C_CFG_FLR_PF_ACTIVE_MASK 0x000000F0 +#define PCIE_W_INTERRUPT_GRP_C_INT_CAUSE_GRP_C_CFG_FLR_PF_ACTIVE_SHIFT 4 +/* System ERR RC. */ +#define PCIE_W_INTERRUPT_GRP_C_INT_CAUSE_GRP_C_CFG_SYS_ERR_RC_MASK 0x00000F00 +#define PCIE_W_INTERRUPT_GRP_C_INT_CAUSE_GRP_C_CFG_SYS_ERR_RC_SHIFT 8 +/* AER RC INT */ +#define PCIE_W_INTERRUPT_GRP_C_INT_CAUSE_GRP_C_CFG_AER_RC_ERR_INT_MASK 0x0000F000 +#define PCIE_W_INTERRUPT_GRP_C_INT_CAUSE_GRP_C_CFG_AER_RC_ERR_INT_SHIFT 12 +/* AER RC MSI */ +#define PCIE_W_INTERRUPT_GRP_C_INT_CAUSE_GRP_C_CFG_AER_RC_ERR_MSI_MASK 0x000F0000 +#define PCIE_W_INTERRUPT_GRP_C_INT_CAUSE_GRP_C_CFG_AER_RC_ERR_MSI_SHIFT 16 +/* PME MSI */ +#define PCIE_W_INTERRUPT_GRP_C_INT_CAUSE_GRP_C_CFG_PME_MSI_MASK 0x00F00000 +#define PCIE_W_INTERRUPT_GRP_C_INT_CAUSE_GRP_C_CFG_PME_MSI_SHIFT 20 +/* PME int */ +#define PCIE_W_INTERRUPT_GRP_C_INT_CAUSE_GRP_C_CFG_PME_INT_MASK 0x0F000000 +#define PCIE_W_INTERRUPT_GRP_C_INT_CAUSE_GRP_C_CFG_PME_INT_SHIFT 24 +/* SB overflow */ +#define PCIE_W_INTERRUPT_GRP_C_INT_CAUSE_GRP_C_RADM_QOVERFLOW (1 << 28) +/* ecrc was injected through the diag_ctrl bus */ +#define PCIE_W_INTERRUPT_GRP_C_INT_CAUSE_GRP_C_ECRC_INJECTED (1 << 29) +/* lcrc was injected through the diag_ctrl bus */ +#define PCIE_W_INTERRUPT_GRP_C_INT_CAUSE_GRP_C_LCRC_INJECTED (1 << 30) +/* lcrc was injected through the diag_ctrl bus */ +#define PCIE_W_INTERRUPT_GRP_C_INT_CAUSE_GRP_C_RSRVD (1 << 31) + +/**** control_C register ****/ +/* When Clear_on_Read =1, all bits of Cause register are cleared on read. */ +#define PCIE_W_INTERRUPT_GRP_C_INT_CONTROL_GRP_C_CLEAR_ON_READ (1 << 0) +/* + * (Must be set only when MSIX is enabled.) + * When Auto-Mask =1 and an MSI-X ACK for this bit is received, its + * corresponding bit in the Mask register is set, masking future interrupts. + */ +#define PCIE_W_INTERRUPT_GRP_C_INT_CONTROL_GRP_C_AUTO_MASK (1 << 1) +/* + * Auto_Clear (RW) + * When Auto-Clear =1, the bits in the Interrupt Cause register are auto-cleared + * after MSI-X is acknowledged. Must be used only if MSI-X is enabled. + */ +#define PCIE_W_INTERRUPT_GRP_C_INT_CONTROL_GRP_C_AUTO_CLEAR (1 << 2) +/* + * When Set_on_Posedge =1, the bits in the Interrupt Cause register are set on + * the posedge of the interrupt source, i.e., when interrupt source =1 and + * Interrupt Status = 0. + * When Set_on_Posedge =0, the bits in the Interrupt Cause register are set when + * interrupt source =1. + */ +#define PCIE_W_INTERRUPT_GRP_C_INT_CONTROL_GRP_C_SET_ON_POSEDGE (1 << 3) +/* + * When Moderation_Reset =1, all Moderation timers associated with the interrupt + * cause bits are cleared to 0, enabling immediate interrupt assertion if any + * unmasked cause bit is set to 1. This bit is self-negated. + */ +#define PCIE_W_INTERRUPT_GRP_C_INT_CONTROL_GRP_C_MOD_RST (1 << 4) +/* + * When mask_msi_x =1, no MSI-X from this group is sent. This bit must be set to + * 1 when the associated summary bit in this group is used to generate a single + * MSI-X for this group. + */ +#define PCIE_W_INTERRUPT_GRP_C_INT_CONTROL_GRP_C_MASK_MSI_X (1 << 5) +/* MSI-X AWID value. Same ID for all cause bits. */ +#define PCIE_W_INTERRUPT_GRP_C_INT_CONTROL_GRP_C_AWID_MASK 0x00000F00 +#define PCIE_W_INTERRUPT_GRP_C_INT_CONTROL_GRP_C_AWID_SHIFT 8 +/* + * This value determines the interval between interrupts; writing ZERO disables + * Moderation. + */ +#define PCIE_W_INTERRUPT_GRP_C_INT_CONTROL_GRP_C_MOD_INTV_MASK 0x00FF0000 +#define PCIE_W_INTERRUPT_GRP_C_INT_CONTROL_GRP_C_MOD_INTV_SHIFT 16 +/* + * This value determines the Moderation_Timer_Clock speed. + * 0- Moderation-timer is decremented every 1x256 SB clock cycles ~1uS. + * 1- Moderation-timer is decremented every 2x256 SB clock cycles ~2uS. + * N- Moderation-timer is decremented every Nx256 SB clock cycles ~(N+1) uS. + */ +#define PCIE_W_INTERRUPT_GRP_C_INT_CONTROL_GRP_C_MOD_RES_MASK 0x0F000000 +#define PCIE_W_INTERRUPT_GRP_C_INT_CONTROL_GRP_C_MOD_RES_SHIFT 24 + +/**** control_D register ****/ +/* When Clear_on_Read =1, all bits of Cause register are cleared on read. */ +#define PCIE_W_INTERRUPT_GRP_D_INT_CONTROL_GRP_D_CLEAR_ON_READ (1 << 0) +/* + * (Must be set only when MSIX is enabled.) + * When Auto-Mask =1 and an MSI-X ACK for this bit is received, its + * corresponding bit in the Mask register is set, masking future interrupts. + */ +#define PCIE_W_INTERRUPT_GRP_D_INT_CONTROL_GRP_D_AUTO_MASK (1 << 1) +/* + * Auto_Clear (RW) + * When Auto-Clear =1, the bits in the Interrupt Cause register are auto-cleared + * after MSI-X is acknowledged. Must be used only if MSI-X is enabled. + */ +#define PCIE_W_INTERRUPT_GRP_D_INT_CONTROL_GRP_D_AUTO_CLEAR (1 << 2) +/* + * When Set_on_Posedge =1, the bits in the Interrupt Cause register are set on + * the posedge of the interrupt source, i.e., when interrupt source =1 and + * Interrupt Status = 0. + * When Set_on_Posedge =0, the bits in the Interrupt Cause register are set when + * interrupt source =1. + */ +#define PCIE_W_INTERRUPT_GRP_D_INT_CONTROL_GRP_D_SET_ON_POSEDGE (1 << 3) +/* + * When Moderation_Reset =1, all Moderation timers associated with the interrupt + * cause bits are cleared to 0, enabling immediate interrupt assertion if any + * unmasked cause bit is set to 1. This bit is self-negated. + */ +#define PCIE_W_INTERRUPT_GRP_D_INT_CONTROL_GRP_D_MOD_RST (1 << 4) +/* + * When mask_msi_x =1, no MSI-X from this group is sent. This bit must be set to + * 1 when the associated summary bit in this group is used to generate a single + * MSI-X for this group. + */ +#define PCIE_W_INTERRUPT_GRP_D_INT_CONTROL_GRP_D_MASK_MSI_X (1 << 5) +/* MSI-X AWID value. Same ID for all cause bits. */ +#define PCIE_W_INTERRUPT_GRP_D_INT_CONTROL_GRP_D_AWID_MASK 0x00000F00 +#define PCIE_W_INTERRUPT_GRP_D_INT_CONTROL_GRP_D_AWID_SHIFT 8 +/* + * This value determines the interval between interrupts; writing ZERO disables + * Moderation. + */ +#define PCIE_W_INTERRUPT_GRP_D_INT_CONTROL_GRP_D_MOD_INTV_MASK 0x00FF0000 +#define PCIE_W_INTERRUPT_GRP_D_INT_CONTROL_GRP_D_MOD_INTV_SHIFT 16 +/* + * This value determines the Moderation_Timer_Clock speed. + * 0- Moderation-timer is decremented every 1x256 SB clock cycles ~1uS. + * 1- Moderation-timer is decremented every 2x256 SB clock cycles ~2uS. + * N- Moderation-timer is decremented every Nx256 SB clock cycles ~(N+1) uS. + */ +#define PCIE_W_INTERRUPT_GRP_D_INT_CONTROL_GRP_D_MOD_RES_MASK 0x0F000000 +#define PCIE_W_INTERRUPT_GRP_D_INT_CONTROL_GRP_D_MOD_RES_SHIFT 24 +#ifdef __cplusplus +} +#endif + +#endif /* __AL_HAL_PCIE_W_REG_H */ + +/** @} end of ... group */ + + diff --git a/sys/arm/annapurna/alpine/hal/al_hal_plat_services.h b/sys/arm/annapurna/alpine/hal/al_hal_plat_services.h new file mode 100644 index 000000000000..217bb927f69f --- /dev/null +++ b/sys/arm/annapurna/alpine/hal/al_hal_plat_services.h @@ -0,0 +1,419 @@ +/*- +******************************************************************************* +Copyright (C) 2015 Annapurna Labs Ltd. + +This file may be licensed under the terms of the Annapurna Labs Commercial +License Agreement. + +Alternatively, this file can be distributed under the terms of the GNU General +Public License V2 as published by the Free Software Foundation and can be +found at http://www.gnu.org/licenses/gpl-2.0.html + +Alternatively, redistribution and use in source and binary forms, with or +without modification, are permitted provided that the following conditions are +met: + + * Redistributions of source code must retain the above copyright notice, +this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright +notice, this list of conditions and the following disclaimer in +the documentation and/or other materials provided with the +distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + +/** + * @defgroup group_services Platform Services API + * @{ + * The Platform Services API provides miscellaneous system services to HAL + * drivers, such as: + * - Registers read/write + * - Assertions + * - Memory barriers + * - Endianness conversions + * + * And more. + * @file plat_api/sample/al_hal_plat_services.h + * + * @brief API for Platform services provided for to HAL drivers + * + * + */ + +#ifndef __PLAT_SERVICES_H__ +#define __PLAT_SERVICES_H__ + +#include +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include + +/* Prototypes for all the bus_space structure functions */ +bs_protos(generic); +bs_protos(generic_armv4); + +#define __UNUSED __attribute__((unused)) + +/* *INDENT-OFF* */ +#ifdef __cplusplus +extern "C" { +#endif +/* *INDENT-ON* */ + +/* + * WMA: This is a hack which allows not modifying the __iomem accessing HAL code. + * On ARMv7, bus_handle holds the information about VA of accessed memory. It + * is possible to use direct load/store instruction instead of bus_dma machinery. + * WARNING: This is not guaranteed to stay that way forever, nor that + * on other architectures these variables behave similarly. Keep that + * in mind during porting to other systems. + */ +/** + * Read MMIO 8 bits register + * @param offset register offset + * + * @return register value + */ +static uint8_t al_reg_read8(uint8_t * offset); + +/** + * Read MMIO 16 bits register + * @param offset register offset + * + * @return register value + */ +static uint16_t al_reg_read16(uint16_t * offset); + +/** + * Read MMIO 32 bits register + * @param offset register offset + * + * @return register value + */ +static uint32_t al_reg_read32(uint32_t * offset); + +/** + * Read MMIO 64 bits register + * @param offset register offset + * + * @return register value + */ +uint64_t al_reg_read64(uint64_t * offset); + +/** + * Relaxed read MMIO 32 bits register + * + * Relaxed register read/write functions don't involve cpu instructions that + * force syncronization, nor ordering between the register access and memory + * data access. + * These instructions are used in performance critical code to avoid the + * overhead of the synchronization instructions. + * + * @param offset register offset + * + * @return register value + */ +#define al_bus_dma_to_va(bus_tag, bus_handle) ((void*)bus_handle) + +/** + * Relaxed read MMIO 32 bits register + * + * Relaxed register read/write functions don't involve cpu instructions that + * force syncronization, nor ordering between the register access and memory + * data access. + * These instructions are used in performance critical code to avoid the + * overhead of the synchronization instructions. + * + * @param offset register offset + * + * @return register value + */ +#define al_reg_read32_relaxed(l) generic_bs_r_4(NULL, (bus_space_handle_t)l, 0) + +/** + * Relaxed write to MMIO 32 bits register + * + * Relaxed register read/write functions don't involve cpu instructions that + * force syncronization, nor ordering between the register access and memory + * data access. + * These instructions are used in performance critical code to avoid the + * overhead of the synchronization instructions. + * + * @param offset register offset + * @param val value to write to the register + */ +#define al_reg_write32_relaxed(l,v) generic_bs_w_4(NULL, (bus_space_handle_t)l, 0, v) + +/** + * Write to MMIO 8 bits register + * @param offset register offset + * @param val value to write to the register + */ +#define al_reg_write8(l,v) do { dsb(); generic_bs_w_1(NULL, (bus_space_handle_t)l, 0, v); dmb(); } while (0) + +/** + * Write to MMIO 16 bits register + * @param offset register offset + * @param val value to write to the register + */ +#define al_reg_write16(l,v) do { dsb(); generic_bs_w_2(NULL, (bus_space_handle_t)l, 0, v); dmb(); } while (0) + +/** + * Write to MMIO 32 bits register + * @param offset register offset + * @param val value to write to the register + */ +#define al_reg_write32(l,v) do { dsb(); generic_bs_w_4(NULL, (bus_space_handle_t)l, 0, v); dmb(); } while (0) + +/** + * Write to MMIO 64 bits register + * @param offset register offset + * @param val value to write to the register + */ +#define al_reg_write64(l,v) do { dsb(); generic_bs_w_8(NULL, (bus_space_handle_t)l, 0, v); dmb(); } while (0) + +static inline uint8_t +al_reg_read8(uint8_t *l) +{ + dsb(); + + return (generic_bs_r_1(NULL, (bus_space_handle_t)l, 0)); +} + +static inline uint16_t +al_reg_read16(uint16_t *l) +{ + dsb(); + + return (generic_bs_r_2(NULL, (bus_space_handle_t)l, 0)); +} + +static inline uint32_t +al_reg_read32(uint32_t *l) +{ + dsb(); + + return (generic_bs_r_4(NULL, (bus_space_handle_t)l, 0)); +} + +#define AL_DBG_LEVEL_NONE 0 +#define AL_DBG_LEVEL_ERR 1 +#define AL_DBG_LEVEL_WARN 2 +#define AL_DBG_LEVEL_INFO 3 +#define AL_DBG_LEVEL_DBG 4 + +#define AL_DBG_LEVEL AL_DBG_LEVEL_ERR + +extern struct mtx al_dbg_lock; + +#define AL_DBG_LOCK() mtx_lock_spin(&al_dbg_lock) +#define AL_DBG_UNLOCK() mtx_unlock_spin(&al_dbg_lock) + +/** + * print message + * + * @param format The format string + * @param ... Additional arguments + */ +#define al_print(type, fmt, ...) do { if (AL_DBG_LEVEL >= AL_DBG_LEVEL_NONE) { AL_DBG_LOCK(); printf(fmt, ##__VA_ARGS__); AL_DBG_UNLOCK(); } } while(0) + +/** + * print error message + * + * @param format + */ +#define al_err(...) do { if (AL_DBG_LEVEL >= AL_DBG_LEVEL_ERR) { AL_DBG_LOCK(); printf(__VA_ARGS__); AL_DBG_UNLOCK(); } } while(0) + +/** + * print warning message + * + * @param format + */ +#define al_warn(...) do { if (AL_DBG_LEVEL >= AL_DBG_LEVEL_WARN) { AL_DBG_LOCK(); printf(__VA_ARGS__); AL_DBG_UNLOCK(); } } while(0) + +/** + * print info message + * + * @param format + */ +#define al_info(...) do { if (AL_DBG_LEVEL >= AL_DBG_LEVEL_INFO) { AL_DBG_LOCK(); printf(__VA_ARGS__); AL_DBG_UNLOCK(); } } while(0) + +/** + * print debug message + * + * @param format + */ +#define al_dbg(...) do { if (AL_DBG_LEVEL >= AL_DBG_LEVEL_DBG) { AL_DBG_LOCK(); printf(__VA_ARGS__); AL_DBG_UNLOCK(); } } while(0) + +/** + * Assertion + * + * @param condition + */ +#define al_assert(COND) \ + do { \ + if (!(COND)) \ + al_err( \ + "%s:%d:%s: Assertion failed! (%s)\n", \ + __FILE__, __LINE__, __func__, #COND); \ + } while(AL_FALSE) + +/** + * Make sure data will be visible by other masters (other CPUS and DMA). + * usually this is achieved by the ARM DMB instruction. + */ +static void al_data_memory_barrier(void); + +/** + * Make sure data will be visible by DMA masters, no restriction for other cpus + */ +static inline void +al_data_memory_barrier(void) +{ + dsb(); +} + +/** + * Make sure data will be visible in order by other cpus masters. + */ +static inline void +al_smp_data_memory_barrier(void) +{ + dsb(); +} + +/** + * Make sure write data will be visible in order by other cpus masters. + */ +static inline void +al_local_data_memory_barrier(void) +{ + dsb(); +} + +/** + * al_udelay - micro sec delay + */ +#define al_udelay(u) DELAY(u) + +/** + * al_msleep - mili sec delay + */ +#define al_msleep(m) DELAY((m) * 1000) + +/** + * swap half word to little endian + * + * @param x 16 bit value + * + * @return the value in little endian + */ +#define swap16_to_le(x) htole16(x) +/** + * swap word to little endian + * + * @param x 32 bit value + * + * @return the value in little endian + */ +#define swap32_to_le(x) htole32(x) + +/** + * swap 8 bytes to little endian + * + * @param x 64 bit value + * + * @return the value in little endian + */ +#define swap64_to_le(x) htole64(x) + +/** + * swap half word from little endian + * + * @param x 16 bit value + * + * @return the value in the cpu endianess + */ +#define swap16_from_le(x) le16toh(x) + +/** + * swap word from little endian + * + * @param x 32 bit value + * + * @return the value in the cpu endianess + */ +#define swap32_from_le(x) le32toh(x) + +/** + * swap 8 bytes from little endian + * + * @param x 64 bit value + * + * @return the value in the cpu endianess + */ +#define swap64_from_le(x) le64toh(x) + +/** + * Memory set + * + * @param p memory pointer + * @param val value for setting + * @param cnt number of bytes to set + */ +#define al_memset(p, val, cnt) memset(p, val, cnt) + +/** + * Memory copy + * + * @param p1 memory pointer + * @param p2 memory pointer + * @param cnt number of bytes to copy + */ +#define al_memcpy(p1, p2, cnt) memcpy(p1, p2, cnt) + +/** + * Memory compare + * + * @param p1 memory pointer + * @param p2 memory pointer + * @param cnt number of bytes to compare + */ +#define al_memcmp(p1, p2, cnt) memcmp(p1, p2, cnt) + +/** + * String compare + * + * @param s1 string pointer + * @param s2 string pointer + */ +#define al_strcmp(s1, s2) strcmp(s1, s2) + +#define al_get_cpu_id() 0 + +/* *INDENT-OFF* */ +#ifdef __cplusplus +} +#endif +/* *INDENT-ON* */ +/** @} end of Platform Services API group */ +#endif /* __PLAT_SERVICES_H__ */ diff --git a/sys/arm/annapurna/alpine/hal/al_hal_plat_types.h b/sys/arm/annapurna/alpine/hal/al_hal_plat_types.h new file mode 100644 index 000000000000..43896ae08f71 --- /dev/null +++ b/sys/arm/annapurna/alpine/hal/al_hal_plat_types.h @@ -0,0 +1,94 @@ +/*- +******************************************************************************** +Copyright (C) 2015 Annapurna Labs Ltd. + +This file may be licensed under the terms of the Annapurna Labs Commercial +License Agreement. + +Alternatively, this file can be distributed under the terms of the GNU General +Public License V2 as published by the Free Software Foundation and can be +found at http://www.gnu.org/licenses/gpl-2.0.html + +Alternatively, redistribution and use in source and binary forms, with or +without modification, are permitted provided that the following conditions are +met: + + * Redistributions of source code must retain the above copyright notice, +this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright +notice, this list of conditions and the following disclaimer in +the documentation and/or other materials provided with the +distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + +/** + * @defgroup group_services Platform Services API + * @{ + * @file plat_api/sample/al_hal_plat_types.h + * + */ + +#ifndef __PLAT_TYPES_H__ +#define __PLAT_TYPES_H__ + +#include +#include +#include +#include + +/* *INDENT-OFF* */ +#ifdef __cplusplus +extern "C" { +#endif +/* *INDENT-ON* */ + +/* Basic data types */ +typedef int al_bool; /** boolean */ +#define AL_TRUE 1 +#define AL_FALSE 0 + + +/* define types */ +#ifndef AL_HAVE_TYPES +typedef unsigned char uint8_t; /** unsigned 8 bits */ +typedef unsigned short uint16_t; /** unsigned 16 bits */ +typedef unsigned int uint32_t; /** unsigned 32 bits */ +typedef unsigned long long uint64_t; /** unsigned 64 bits */ + +typedef signed char int8_t; /** signed 8 bits */ +typedef short int int16_t; /** signed 16 bits */ +typedef signed int int32_t; /** signed 32 bits */ + +/** An unsigned int that is guaranteed to be the same size as a pointer */ +/** C99 standard */ +typedef unsigned long uintptr_t; +#endif + + +/** in LPAE mode, the address address is 40 bit, we extend it to 64 bit */ +typedef uint64_t al_phys_addr_t; + +/** this defines the cpu endiancess. */ +#define PLAT_ARCH_IS_LITTLE() AL_TRUE + +/* *INDENT-OFF* */ +#ifdef __cplusplus +} +#endif +/* *INDENT-ON* */ +/** @} end of Platform Services API group */ + +#endif /* __PLAT_TYPES_H__ */ diff --git a/sys/arm/annapurna/alpine/hal/al_hal_reg_utils.h b/sys/arm/annapurna/alpine/hal/al_hal_reg_utils.h new file mode 100644 index 000000000000..f29c3c5247b5 --- /dev/null +++ b/sys/arm/annapurna/alpine/hal/al_hal_reg_utils.h @@ -0,0 +1,188 @@ +/*- +******************************************************************************** +Copyright (C) 2015 Annapurna Labs Ltd. + +This file may be licensed under the terms of the Annapurna Labs Commercial +License Agreement. + +Alternatively, this file can be distributed under the terms of the GNU General +Public License V2 as published by the Free Software Foundation and can be +found at http://www.gnu.org/licenses/gpl-2.0.html + +Alternatively, redistribution and use in source and binary forms, with or +without modification, are permitted provided that the following conditions are +met: + + * Redistributions of source code must retain the above copyright notice, +this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright +notice, this list of conditions and the following disclaimer in +the documentation and/or other materials provided with the +distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + +/** + * @defgroup group_common HAL Common Layer + * @{ + * @file al_hal_reg_utils.h + * + * @brief Register utilities used by HALs and platform layer + * + * + */ + +#ifndef __AL_HAL_REG_UTILS_H__ +#define __AL_HAL_REG_UTILS_H__ + +#include "al_hal_plat_types.h" +#include "al_hal_plat_services.h" + +/* *INDENT-OFF* */ +#ifdef __cplusplus +extern "C" { +#endif +/* *INDENT-ON* */ + +#define AL_BIT(b) (1UL << (b)) + +#define AL_ADDR_LOW(x) ((uint32_t)((al_phys_addr_t)(x))) +#define AL_ADDR_HIGH(x) ((uint32_t)((((al_phys_addr_t)(x)) >> 16) >> 16)) + +/** get field out of 32 bit register */ +#define AL_REG_FIELD_GET(reg, mask, shift) (((reg) & (mask)) >> (shift)) + +/** set field of 32 bit register */ +#define AL_REG_FIELD_SET(reg, mask, shift, val) \ + (reg) = \ + (((reg) & (~(mask))) | \ + ((((unsigned)(val)) << (shift)) & (mask))) + +/** set field of 64 bit register */ +#define AL_REG_FIELD_SET_64(reg, mask, shift, val) \ + ((reg) = \ + (((reg) & (~(mask))) | \ + ((((uint64_t)(val)) << (shift)) & (mask)))) + +/** get single bit out of 32 bit register */ +#define AL_REG_BIT_GET(reg, shift) \ + AL_REG_FIELD_GET(reg, AL_BIT(shift), shift) + +#define AL_REG_BITS_FIELD(shift, val) \ + (((unsigned)(val)) << (shift)) + +/** set single bit field of 32 bit register to a given value */ +#define AL_REG_BIT_VAL_SET(reg, shift, val) \ + AL_REG_FIELD_SET(reg, AL_BIT(shift), shift, val) + +/** set single bit of 32 bit register to 1 */ +#define AL_REG_BIT_SET(reg, shift) \ + AL_REG_BIT_VAL_SET(reg, shift, 1) + +/** clear single bit of 32 bit register */ +#define AL_REG_BIT_CLEAR(reg, shift) \ + AL_REG_BIT_VAL_SET(reg, shift, 0) + + +#define AL_BIT_MASK(n) \ + (AL_BIT(n) - 1) + +#define AL_FIELD_MASK(msb, lsb) \ + (AL_BIT(msb) + AL_BIT_MASK(msb) - AL_BIT_MASK(lsb)) + +/** clear bits specified by clear_mask */ +#define AL_REG_MASK_CLEAR(reg, clear_mask) \ + ((reg) = (((reg) & (~(clear_mask))))) + +/** set bits specified by clear_mask */ +#define AL_REG_MASK_SET(reg, clear_mask) \ + ((reg) = (((reg) | (clear_mask)))) + + +/** clear bits specified by clear_mask, and set bits specified by set_mask */ +#define AL_REG_CLEAR_AND_SET(reg, clear_mask, set_mask) \ + (reg) = (((reg) & (~(clear_mask))) | (set_mask)) + +#define AL_ALIGN_UP(val, size) \ + ((size) * (((val) + (size) - 1) / (size))) + +/** take bits selected by mask from one data, the rest from background */ +#define AL_MASK_VAL(mask, data, background) \ + (((mask) & (data)) | ((~mask) & (background))) + +/** + * 8 bits register masked write + * + * @param reg + * register address + * @param mask + * bits not selected (1) by mask will be left unchanged + * @param data + * data to write. bits not selected by mask ignored. + */ +static inline void +al_reg_write8_masked(uint8_t __iomem *reg, uint8_t mask, uint8_t data) +{ + uint8_t temp; + temp = al_reg_read8(reg); + al_reg_write8(reg, AL_MASK_VAL(mask, data, temp)); +} + + +/** + * 16 bits register masked write + * + * @param reg + * register address + * @param mask + * bits not selected (1) by mask will be left unchanged + * @param data + * data to write. bits not selected by mask ignored. + */ +static inline void +al_reg_write16_masked(uint16_t __iomem *reg, uint16_t mask, uint16_t data) +{ + uint16_t temp; + temp = al_reg_read16(reg); + al_reg_write16(reg, AL_MASK_VAL(mask, data, temp)); +} + + +/** + * 32 bits register masked write + * + * @param reg + * register address + * @param mask + * bits not selected (1) by mask will be left unchanged + * @param data + * data to write. bits not selected by mask ignored. + */ +static inline void +al_reg_write32_masked(uint32_t __iomem *reg, uint32_t mask, uint32_t data) +{ + uint32_t temp; + temp = al_reg_read32(reg); + al_reg_write32(reg, AL_MASK_VAL(mask, data, temp)); +} + +/* *INDENT-OFF* */ +#ifdef __cplusplus +} +#endif +/* *INDENT-ON* */ +/** @} end of Common group */ +#endif + diff --git a/sys/arm/annapurna/alpine/hal/al_hal_types.h b/sys/arm/annapurna/alpine/hal/al_hal_types.h new file mode 100644 index 000000000000..cea839dcfdcc --- /dev/null +++ b/sys/arm/annapurna/alpine/hal/al_hal_types.h @@ -0,0 +1,117 @@ +/*- +******************************************************************************** +Copyright (C) 2015 Annapurna Labs Ltd. + +This file may be licensed under the terms of the Annapurna Labs Commercial +License Agreement. + +Alternatively, this file can be distributed under the terms of the GNU General +Public License V2 as published by the Free Software Foundation and can be +found at http://www.gnu.org/licenses/gpl-2.0.html + +Alternatively, redistribution and use in source and binary forms, with or +without modification, are permitted provided that the following conditions are +met: + + * Redistributions of source code must retain the above copyright notice, +this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright +notice, this list of conditions and the following disclaimer in +the documentation and/or other materials provided with the +distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + +/** + * @defgroup group_common HAL Common Layer + * @{ + * @file al_hal_types.h + * + * @brief macros used by HALs and platform layer + * + */ + +#ifndef __AL_HAL_TYPES_H__ +#define __AL_HAL_TYPES_H__ + +#include "al_hal_plat_types.h" +#include "al_hal_plat_services.h" + +/* *INDENT-OFF* */ +#ifdef __cplusplus +extern "C" { +#endif +/* *INDENT-ON* */ + +/* Common defines */ + +#if (!AL_TRUE) || (AL_FALSE) +#error "AL_TRUE must be non zero and AL_FALSE must be zero" +#endif + +typedef int AL_RETURN; + +#if !defined(NULL) +#define NULL (void *)0 +#endif + +#if !defined(likely) +#define likely(x) (__builtin_expect(!!(x), 1)) +#define unlikely(x) (__builtin_expect(!!(x), 0)) +#endif + + +#ifdef __GNUC__ +#if !defined(__packed) +#define __packed __attribute__ ((packed)) +#endif + /* packed and alinged types */ +#define __packed_a4 __attribute__ ((packed, aligned(4))) +#define __packed_a8 __attribute__ ((packed, aligned(8))) +#define __packed_a16 __attribute__ ((packed, aligned(16))) + +#else +#if !defined(__packed) +#error "__packed is not defined!!" +#endif +#endif + +#if !defined(__iomem) +#define __iomem +#endif + +#if !defined(__cache_aligned) +#ifdef __GNUC__ +#define __cache_aligned __attribute__ ((__aligned__(64))) +#else +#define __cache_aligned +#endif +#endif + +#if !defined(INLINE) +#ifdef __GNUC__ +#define INLINE inline +#else +#define INLINE +#endif +#endif + +/* *INDENT-OFF* */ +#ifdef __cplusplus +} +#endif +/* *INDENT-ON* */ +/** @} end of Common group */ +#endif /* __TYPES_H__ */ diff --git a/sys/arm/annapurna/alpine/hal/al_hal_unit_adapter_regs.h b/sys/arm/annapurna/alpine/hal/al_hal_unit_adapter_regs.h new file mode 100644 index 000000000000..740b959ab43e --- /dev/null +++ b/sys/arm/annapurna/alpine/hal/al_hal_unit_adapter_regs.h @@ -0,0 +1,314 @@ +/*- +******************************************************************************** +Copyright (C) 2015 Annapurna Labs Ltd. + +This file may be licensed under the terms of the Annapurna Labs Commercial +License Agreement. + +Alternatively, this file can be distributed under the terms of the GNU General +Public License V2 as published by the Free Software Foundation and can be +found at http://www.gnu.org/licenses/gpl-2.0.html + +Alternatively, redistribution and use in source and binary forms, with or +without modification, are permitted provided that the following conditions are +met: + + * Redistributions of source code must retain the above copyright notice, +this list of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright +notice, this list of conditions and the following disclaimer in +the documentation and/or other materials provided with the +distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR +ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*******************************************************************************/ + +#ifndef __AL_HAL_UNIT_ADAPTER_REGS_H__ +#define __AL_HAL_UNIT_ADAPTER_REGS_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#define AL_PCI_COMMAND 0x04 /* 16 bits */ +#define AL_PCI_COMMAND_IO 0x1 /* Enable response in I/O space */ +#define AL_PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ +#define AL_PCI_COMMAND_MASTER 0x4 /* Enable bus mastering */ + +#define PCI_CLASS_REVISION 0x08 /* High 24 bits are class, low 8 revision */ + +#define AL_PCI_BASE_ADDRESS_SPACE_IO 0x01 +#define AL_PCI_BASE_ADDRESS_MEM_TYPE_64 0x04 /* 64 bit address */ +#define AL_PCI_BASE_ADDRESS_MEM_PREFETCH 0x08 /* prefetchable? */ +#define AL_PCI_BASE_ADDRESS_DEVICE_ID 0x0c + +#define AL_PCI_BASE_ADDRESS_0 0x10 +#define AL_PCI_BASE_ADDRESS_0_HI 0x14 +#define AL_PCI_BASE_ADDRESS_2 0x18 +#define AL_PCI_BASE_ADDRESS_2_HI 0x1c +#define AL_PCI_BASE_ADDRESS_4 0x20 +#define AL_PCI_BASE_ADDRESS_4_HI 0x24 + +#define AL_PCI_EXP_ROM_BASE_ADDRESS 0x30 + +#define AL_PCI_AXI_CFG_AND_CTR_0 0x110 +#define AL_PCI_AXI_CFG_AND_CTR_1 0x130 +#define AL_PCI_AXI_CFG_AND_CTR_2 0x150 +#define AL_PCI_AXI_CFG_AND_CTR_3 0x170 + +#define AL_PCI_APP_CONTROL 0x220 + +#define AL_PCI_SRIOV_TOTAL_AND_INITIAL_VFS 0x30c + +#define AL_PCI_VF_BASE_ADDRESS_0 0x324 + + +#define AL_PCI_EXP_CAP_BASE 0x40 +#define AL_PCI_EXP_DEVCAP 4 /* Device capabilities */ +#define AL_PCI_EXP_DEVCAP_PAYLOAD 0x07 /* Max_Payload_Size */ +#define AL_PCI_EXP_DEVCAP_PHANTOM 0x18 /* Phantom functions */ +#define AL_PCI_EXP_DEVCAP_EXT_TAG 0x20 /* Extended tags */ +#define AL_PCI_EXP_DEVCAP_L0S 0x1c0 /* L0s Acceptable Latency */ +#define AL_PCI_EXP_DEVCAP_L1 0xe00 /* L1 Acceptable Latency */ +#define AL_PCI_EXP_DEVCAP_ATN_BUT 0x1000 /* Attention Button Present */ +#define AL_PCI_EXP_DEVCAP_ATN_IND 0x2000 /* Attention Indicator Present */ +#define AL_PCI_EXP_DEVCAP_PWR_IND 0x4000 /* Power Indicator Present */ +#define AL_PCI_EXP_DEVCAP_RBER 0x8000 /* Role-Based Error Reporting */ +#define AL_PCI_EXP_DEVCAP_PWR_VAL 0x3fc0000 /* Slot Power Limit Value */ +#define AL_PCI_EXP_DEVCAP_PWR_SCL 0xc000000 /* Slot Power Limit Scale */ +#define AL_PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */ +#define AL_PCI_EXP_DEVCTL 8 /* Device Control */ +#define AL_PCI_EXP_DEVCTL_CERE 0x0001 /* Correctable Error Reporting En. */ +#define AL_PCI_EXP_DEVCTL_NFERE 0x0002 /* Non-Fatal Error Reporting Enable */ +#define AL_PCI_EXP_DEVCTL_FERE 0x0004 /* Fatal Error Reporting Enable */ +#define AL_PCI_EXP_DEVCTL_URRE 0x0008 /* Unsupported Request Reporting En. */ +#define AL_PCI_EXP_DEVCTL_RELAX_EN 0x0010 /* Enable relaxed ordering */ +#define AL_PCI_EXP_DEVCTL_PAYLOAD 0x00e0 /* Max_Payload_Size */ +#define AL_PCI_EXP_DEVCTL_EXT_TAG 0x0100 /* Extended Tag Field Enable */ +#define AL_PCI_EXP_DEVCTL_PHANTOM 0x0200 /* Phantom Functions Enable */ +#define AL_PCI_EXP_DEVCTL_AUX_PME 0x0400 /* Auxiliary Power PM Enable */ +#define AL_PCI_EXP_DEVCTL_NOSNOOP_EN 0x0800 /* Enable No Snoop */ +#define AL_PCI_EXP_DEVCTL_READRQ 0x7000 /* Max_Read_Request_Size */ +#define AL_PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */ +#define AL_PCI_EXP_DEVSTA 0xA /* Device Status */ +#define AL_PCI_EXP_DEVSTA_CED 0x01 /* Correctable Error Detected */ +#define AL_PCI_EXP_DEVSTA_NFED 0x02 /* Non-Fatal Error Detected */ +#define AL_PCI_EXP_DEVSTA_FED 0x04 /* Fatal Error Detected */ +#define AL_PCI_EXP_DEVSTA_URD 0x08 /* Unsupported Request Detected */ +#define AL_PCI_EXP_DEVSTA_AUXPD 0x10 /* AUX Power Detected */ +#define AL_PCI_EXP_DEVSTA_TRPND 0x20 /* Transactions Pending */ +#define AL_PCI_EXP_LNKCAP 0xC /* Link Capabilities */ +#define AL_PCI_EXP_LNKCAP_SLS 0xf /* Supported Link Speeds */ +#define AL_PCI_EXP_LNKCAP_SLS_2_5GB 0x1 /* LNKCAP2 SLS Vector bit 0 (2.5GT/s) */ +#define AL_PCI_EXP_LNKCAP_SLS_5_0GB 0x2 /* LNKCAP2 SLS Vector bit 1 (5.0GT/s) */ +#define AL_PCI_EXP_LNKCAP_MLW 0x3f0 /* Maximum Link Width */ +#define AL_PCI_EXP_LNKCAP_ASPMS 0xc00 /* ASPM Support */ +#define AL_PCI_EXP_LNKCAP_L0SEL 0x7000 /* L0s Exit Latency */ +#define AL_PCI_EXP_LNKCAP_L1EL 0x38000 /* L1 Exit Latency */ +#define AL_PCI_EXP_LNKCAP_CLKPM 0x40000 /* L1 Clock Power Management */ +#define AL_PCI_EXP_LNKCAP_SDERC 0x80000 /* Surprise Down Error Reporting Capable */ +#define AL_PCI_EXP_LNKCAP_DLLLARC 0x100000 /* Data Link Layer Link Active Reporting Capable */ +#define AL_PCI_EXP_LNKCAP_LBNC 0x200000 /* Link Bandwidth Notification Capability */ +#define AL_PCI_EXP_LNKCAP_PN 0xff000000 /* Port Number */ + +#define AL_PCI_EXP_LNKCTL 0x10 /* Link Control */ +#define AL_PCI_EXP_LNKCTL_LNK_DIS 0x4 /* Link Disable Status */ +#define AL_PCI_EXP_LNKCTL_LNK_RTRN 0x5 /* Link Retrain Status */ + +#define AL_PCI_EXP_LNKSTA 0x12 /* Link Status */ +#define AL_PCI_EXP_LNKSTA_CLS 0x000f /* Current Link Speed */ +#define AL_PCI_EXP_LNKSTA_CLS_2_5GB 0x01 /* Current Link Speed 2.5GT/s */ +#define AL_PCI_EXP_LNKSTA_CLS_5_0GB 0x02 /* Current Link Speed 5.0GT/s */ +#define AL_PCI_EXP_LNKSTA_CLS_8_0GB 0x03 /* Current Link Speed 8.0GT/s */ +#define AL_PCI_EXP_LNKSTA_NLW 0x03f0 /* Nogotiated Link Width */ +#define AL_PCI_EXP_LNKSTA_NLW_SHIFT 4 /* start of NLW mask in link status */ +#define AL_PCI_EXP_LNKSTA_LT 0x0800 /* Link Training */ +#define AL_PCI_EXP_LNKSTA_SLC 0x1000 /* Slot Clock Configuration */ +#define AL_PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */ +#define AL_PCI_EXP_LNKSTA_LBMS 0x4000 /* Link Bandwidth Management Status */ +#define AL_PCI_EXP_LNKSTA_LABS 0x8000 /* Link Autonomous Bandwidth Status */ + +#define AL_PCI_EXP_LNKCTL2 0x30 /* Link Control 2 */ + +#define AL_PCI_MSIX_MSGCTRL 0 /* MSIX message control reg */ +#define AL_PCI_MSIX_MSGCTRL_TBL_SIZE 0x7ff /* MSIX table size */ +#define AL_PCI_MSIX_MSGCTRL_TBL_SIZE_SHIFT 16 /* MSIX table size shift */ +#define AL_PCI_MSIX_MSGCTRL_EN 0x80000000 /* MSIX enable */ +#define AL_PCI_MSIX_MSGCTRL_MASK 0x40000000 /* MSIX mask */ + +#define AL_PCI_MSIX_TABLE 0x4 /* MSIX table offset and bar reg */ +#define AL_PCI_MSIX_TABLE_OFFSET 0xfffffff8 /* MSIX table offset */ +#define AL_PCI_MSIX_TABLE_BAR 0x7 /* MSIX table BAR */ + +#define AL_PCI_MSIX_PBA 0x8 /* MSIX pba offset and bar reg */ +#define AL_PCI_MSIX_PBA_OFFSET 0xfffffff8 /* MSIX pba offset */ +#define AL_PCI_MSIX_PBA_BAR 0x7 /* MSIX pba BAR */ + + +/* Adapter power management register 0 */ +#define AL_ADAPTER_PM_0 0x80 +#define AL_ADAPTER_PM_0_PM_NEXT_CAP_MASK 0xff00 +#define AL_ADAPTER_PM_0_PM_NEXT_CAP_SHIFT 8 +#define AL_ADAPTER_PM_0_PM_NEXT_CAP_VAL_MSIX 0x90 + +/* Adapter power management register 1 */ +#define AL_ADAPTER_PM_1 0x84 +#define AL_ADAPTER_PM_1_PME_EN 0x100 /* PM enable */ +#define AL_ADAPTER_PM_1_PWR_STATE_MASK 0x3 /* PM state mask */ +#define AL_ADAPTER_PM_1_PWR_STATE_D3 0x3 /* PM D3 state */ + +/* Sub Master Configuration & Control */ +#define AL_ADAPTER_SMCC 0x110 +#define AL_ADAPTER_SMCC_CONF_2 0x114 + +/* Interrupt_Cause register */ +#define AL_ADAPTER_INT_CAUSE 0x1B0 +#define AL_ADAPTER_INT_CAUSE_WR_ERR AL_BIT(1) +#define AL_ADAPTER_INT_CAUSE_RD_ERR AL_BIT(0) + +/* AXI_Master_Write_Error_Attribute_Latch register */ +/* AXI_Master_Read_Error_Attribute_Latch register */ +#define AL_ADAPTER_AXI_MSTR_WR_ERR_ATTR 0x1B4 +#define AL_ADAPTER_AXI_MSTR_RD_ERR_ATTR 0x1B8 + +#define AL_ADAPTER_AXI_MSTR_RD_WR_ERR_ATTR_COMP_STAT_MASK AL_FIELD_MASK(1, 0) +#define AL_ADAPTER_AXI_MSTR_RD_WR_ERR_ATTR_COMP_STAT_SHIFT 0 +#define AL_ADAPTER_AXI_MSTR_RD_WR_ERR_ATTR_MSTR_ID_MASK AL_FIELD_MASK(4, 2) +#define AL_ADAPTER_AXI_MSTR_RD_WR_ERR_ATTR_MSTR_ID_SHIFT 2 +#define AL_ADAPTER_AXI_MSTR_RD_WR_ERR_ATTR_ADDR_TO AL_BIT(8) +#define AL_ADAPTER_AXI_MSTR_RD_WR_ERR_ATTR_COMP_ERR AL_BIT(9) +#define AL_ADAPTER_AXI_MSTR_RD_WR_ERR_ATTR_COMP_TO AL_BIT(10) +#define AL_ADAPTER_AXI_MSTR_RD_WR_ERR_ATTR_ERR_BLK AL_BIT(11) +#define AL_ADAPTER_AXI_MSTR_RD_ERR_ATTR_RD_PARITY_ERR AL_BIT(12) + +/* Interrupt_Cause_mask register */ +#define AL_ADAPTER_INT_CAUSE_MASK 0x1BC +#define AL_ADAPTER_INT_CAUSE_MASK_WR_ERR AL_BIT(1) +#define AL_ADAPTER_INT_CAUSE_MASK_RD_ERR AL_BIT(0) + +/* AXI_Master_write_error_address_Latch register */ +#define AL_ADAPTER_AXI_MSTR_WR_ERR_LO_LATCH 0x1C0 + +/* AXI_Master_write_error_address_high_Latch register */ +#define AL_ADAPTER_AXI_MSTR_WR_ERR_HI_LATCH 0x1C4 + +/* AXI_Master_read_error_address_Latch register */ +#define AL_ADAPTER_AXI_MSTR_RD_ERR_LO_LATCH 0x1C8 + +/* AXI_Master_read_error_address_high_Latch register */ +#define AL_ADAPTER_AXI_MSTR_RD_ERR_HI_LATCH 0x1CC + +/* AXI_Master_Timeout register */ +#define AL_ADAPTER_AXI_MSTR_TO 0x1D0 +#define AL_ADAPTER_AXI_MSTR_TO_WR_MASK AL_FIELD_MASK(31, 16) +#define AL_ADAPTER_AXI_MSTR_TO_WR_SHIFT 16 +#define AL_ADAPTER_AXI_MSTR_TO_RD_MASK AL_FIELD_MASK(15, 0) +#define AL_ADAPTER_AXI_MSTR_TO_RD_SHIFT 0 + +/* + * Generic control registers + */ + +/* Control 0 */ +#define AL_ADAPTER_GENERIC_CONTROL_0 0x1E0 +/* Control 2 */ +#define AL_ADAPTER_GENERIC_CONTROL_2 0x1E8 +/* Control 3 */ +#define AL_ADAPTER_GENERIC_CONTROL_3 0x1EC +/* Control 9 */ +#define AL_ADAPTER_GENERIC_CONTROL_9 0x218 +/* Control 10 */ +#define AL_ADAPTER_GENERIC_CONTROL_10 0x21C +/* Control 11 */ +#define AL_ADAPTER_GENERIC_CONTROL_11 0x220 +/* Control 12 */ +#define AL_ADAPTER_GENERIC_CONTROL_12 0x224 +/* Control 13 */ +#define AL_ADAPTER_GENERIC_CONTROL_13 0x228 +/* Control 14 */ +#define AL_ADAPTER_GENERIC_CONTROL_14 0x22C +/* Control 15 */ +#define AL_ADAPTER_GENERIC_CONTROL_15 0x230 +/* Control 16 */ +#define AL_ADAPTER_GENERIC_CONTROL_16 0x234 +/* Control 17 */ +#define AL_ADAPTER_GENERIC_CONTROL_17 0x238 +/* Control 18 */ +#define AL_ADAPTER_GENERIC_CONTROL_18 0x23C +/* Control 19 */ +#define AL_ADAPTER_GENERIC_CONTROL_19 0x240 + +/* Enable clock gating */ +#define AL_ADAPTER_GENERIC_CONTROL_0_CLK_GATE_EN 0x01 +/* When set, all transactions through the PCI conf & mem BARs get timeout */ +#define AL_ADAPTER_GENERIC_CONTROL_0_ADAPTER_DIS 0x40 +#define AL_ADAPTER_GENERIC_CONTROL_0_ETH_RESET_1GMAC AL_BIT(18) +#define AL_ADAPTER_GENERIC_CONTROL_0_ETH_RESET_1GMAC_ON_FLR AL_BIT(26) + +/* + * SATA registers only + */ +/* Select 125MHz free running clock from IOFAB main PLL as SATA OOB clock + * instead of using power management ref clock + */ +#define AL_ADAPTER_GENERIC_CONTROL_10_SATA_OOB_CLK_SEL AL_BIT(26) +/* AXUSER selection and value per bit (1 = address, 0 = register) */ +/* Rx */ +#define AL_ADPTR_GEN_CTL_12_SATA_AWUSER_VAL_MASK AL_FIELD_MASK(15, 0) +#define AL_ADPTR_GEN_CTL_12_SATA_AWUSER_VAL_SHIFT 0 +#define AL_ADPTR_GEN_CTL_12_SATA_AWUSER_SEL_MASK AL_FIELD_MASK(31, 16) +#define AL_ADPTR_GEN_CTL_12_SATA_AWUSER_SEL_SHIFT 16 +/* Tx */ +#define AL_ADPTR_GEN_CTL_13_SATA_ARUSER_VAL_MASK AL_FIELD_MASK(15, 0) +#define AL_ADPTR_GEN_CTL_13_SATA_ARUSER_VAL_SHIFT 0 +#define AL_ADPTR_GEN_CTL_13_SATA_ARUSER_SEL_MASK AL_FIELD_MASK(31, 16) +#define AL_ADPTR_GEN_CTL_13_SATA_ARUSER_SEL_SHIFT 16 +/* Central VMID enabler. If set, then each entry will be used as programmed */ +#define AL_ADPTR_GEN_CTL_14_SATA_MSIX_VMID_SEL AL_BIT(0) +/* Allow access to store VMID values per entry */ +#define AL_ADPTR_GEN_CTL_14_SATA_MSIX_VMID_ACCESS_EN AL_BIT(1) +/* VMID Address select */ +/* Tx */ +#define AL_ADPTR_GEN_CTL_14_SATA_VM_ARADDR_SEL_MASK AL_FIELD_MASK(13, 8) +#define AL_ADPTR_GEN_CTL_14_SATA_VM_ARADDR_SEL_SHIFT 8 +/* Rx */ +#define AL_ADPTR_GEN_CTL_14_SATA_VM_AWADDR_SEL_MASK AL_FIELD_MASK(21, 16) +#define AL_ADPTR_GEN_CTL_14_SATA_VM_AWADDR_SEL_SHIFT 16 +/* Address Value */ +/* Rx */ +#define AL_ADPTR_GEN_CTL_15_SATA_VM_AWDDR_HI AL_FIELD_MASK(31, 0) +/* Tx */ +#define AL_ADPTR_GEN_CTL_16_SATA_VM_ARDDR_HI AL_FIELD_MASK(31, 0) + +/* + * ROB registers + */ +/* Read ROB_Enable, when disabled the read ROB is bypassed */ +#define AL_ADPTR_GEN_CTL_19_READ_ROB_EN AL_BIT(0) +/* Read force in-order of every read transaction */ +#define AL_ADPTR_GEN_CTL_19_READ_ROB_FORCE_INORDER AL_BIT(1) +/* Read software reset */ +#define AL_ADPTR_GEN_CTL_19_READ_ROB_SW_RESET AL_BIT(15) +/* Write ROB_Enable, when disabled_the_Write ROB is bypassed */ +#define AL_ADPTR_GEN_CTL_19_WRITE_ROB_EN AL_BIT(16) +/* Write force in-order of every write transaction */ +#define AL_ADPTR_GEN_CTL_19_WRITE_ROB_FORCE_INORDER AL_BIT(17) +/* Write software reset */ +#define AL_ADPTR_GEN_CTL_19_WRITE_ROB_SW_RESET AL_BIT(31) + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/sys/arm/annapurna/alpine/std.alpine b/sys/arm/annapurna/alpine/std.alpine new file mode 100644 index 000000000000..b5774750d7b9 --- /dev/null +++ b/sys/arm/annapurna/alpine/std.alpine @@ -0,0 +1,23 @@ +# $FreeBSD$ + +makeoption ARM_LITTLE_ENDIAN + +cpu CPU_CORTEXA +machine arm armv6 +makeoptions CONF_CFLAGS="-march=armv7a -DAL_HAVE_TYPES" + +makeoptions KERNPHYSADDR=0x00200000 +options KERNPHYSADDR=0x00200000 + +makeoptions KERNVIRTADDR=0xa0200000 +options KERNVIRTADDR=0xa0200000 + +makeoptions KERNBASE=0xa0000000 +options KERNBASE=0xa0000000 + +options ARM_L2_PIPT + +options IPI_IRQ_START=0 +options IPI_IRQ_END=15 + +files "../annapurna/alpine/files.alpine" diff --git a/sys/arm/arm/autoconf.c b/sys/arm/arm/autoconf.c index 417639894bff..f18f67dcda8f 100644 --- a/sys/arm/arm/autoconf.c +++ b/sys/arm/arm/autoconf.c @@ -94,6 +94,7 @@ static void configure_final(void *dummy) { + enable_interrupts(PSR_I | PSR_F); cninit_finish(); cold = 0; } diff --git a/sys/arm/arm/bcopyinout.S b/sys/arm/arm/bcopyinout.S index 3624f9268c88..8885717778d2 100644 --- a/sys/arm/arm/bcopyinout.S +++ b/sys/arm/arm/bcopyinout.S @@ -69,7 +69,7 @@ __FBSDID("$FreeBSD$"); #define SAVE_REGS stmfd sp!, {r4-r11} #define RESTORE_REGS ldmfd sp!, {r4-r11} - + #if defined(_ARM_ARCH_5E) #define HELLOCPP # #define PREFETCH(rx,o) pld [ rx , HELLOCPP (o) ] @@ -88,7 +88,7 @@ __FBSDID("$FreeBSD$"); * r4-r11 are scratch */ ENTRY(copyin) - /* Quick exit if length is zero */ + /* Quick exit if length is zero */ teq r2, #0 moveq r0, #0 RETeq @@ -326,7 +326,7 @@ END(copyin) */ ENTRY(copyout) - /* Quick exit if length is zero */ + /* Quick exit if length is zero */ teq r2, #0 moveq r0, #0 RETeq diff --git a/sys/arm/arm/bcopyinout_xscale.S b/sys/arm/arm/bcopyinout_xscale.S index 487737e65943..ad612001cdeb 100644 --- a/sys/arm/arm/bcopyinout_xscale.S +++ b/sys/arm/arm/bcopyinout_xscale.S @@ -85,7 +85,7 @@ ENTRY(copyin) ldmfd sp!, {r0-r2, r4, lr} moveq r0, #0 RETeq - + .Lnormal: stmfd sp!, {r10-r11, lr} @@ -527,8 +527,8 @@ ENTRY(copyout) ldmfd sp!, {r0-r2, r4, lr} moveq r0, #0 RETeq - -.Lnormale: + +.Lnormale: stmfd sp!, {r10-r11, lr} GET_PCB(r10) @@ -584,7 +584,7 @@ ENTRY(copyout) ldrne ip, [r0], #0x04 subne r2, r2, #0x04 strtne ip, [r1], #0x04 - + stmfd sp!, {r4-r9} /* Free up some registers */ mov r3, #-1 /* Signal restore r4-r9 */ diff --git a/sys/arm/arm/blockio.S b/sys/arm/arm/blockio.S index 28f502b6d678..eb049c1d6cf2 100644 --- a/sys/arm/arm/blockio.S +++ b/sys/arm/arm/blockio.S @@ -43,7 +43,7 @@ * * Created : 08/10/94 * Modified : 22/01/99 -- R.Earnshaw - * Faster, and small tweaks for StrongARM + * Faster, and small tweaks for StrongARM */ #include @@ -251,7 +251,7 @@ ENTRY(outsw) str r3, [r0] str ip, [r0] - + /* mov ip, r3, lsl #16 * orr ip, ip, ip, lsr #16 * str ip, [r0] @@ -358,7 +358,7 @@ ENTRY(outsw16) eor r3, r3, r4, lsl #16 /* r3 = (A^B^A)(B) = (B)(B) */ str r3, [r0] str r4, [r0] - + /* mov r3, r4, lsl #16 * orr r3, r3, r3, lsr #16 * str r3, [r0] diff --git a/sys/arm/arm/bus_space_base.c b/sys/arm/arm/bus_space_base.c index 4e4f33ce35ab..0eeaaa399880 100644 --- a/sys/arm/arm/bus_space_base.c +++ b/sys/arm/arm/bus_space_base.c @@ -116,10 +116,10 @@ static struct bus_space arm_base_bus_space __aligned(CACHE_LINE_SIZE) = { .bs_c_8 = BS_UNIMPLEMENTED, /* read stream (single) */ - .bs_r_1_s = NULL, /* Use inline code in bus.h */ - .bs_r_2_s = NULL, /* Use inline code in bus.h */ - .bs_r_4_s = NULL, /* Use inline code in bus.h */ - .bs_r_8_s = NULL, /* Use inline code in bus.h */ + .bs_r_1_s = NULL, /* Use inline code in bus.h */ + .bs_r_2_s = NULL, /* Use inline code in bus.h */ + .bs_r_4_s = NULL, /* Use inline code in bus.h */ + .bs_r_8_s = NULL, /* Use inline code in bus.h */ /* read multiple stream */ .bs_rm_1_s = generic_bs_rm_1, @@ -134,10 +134,10 @@ static struct bus_space arm_base_bus_space __aligned(CACHE_LINE_SIZE) = { .bs_rr_8_s = BS_UNIMPLEMENTED, /* write stream (single) */ - .bs_w_1_s = NULL, /* Use inline code in bus.h */ - .bs_w_2_s = NULL, /* Use inline code in bus.h */ - .bs_w_4_s = NULL, /* Use inline code in bus.h */ - .bs_w_8_s = NULL, /* Use inline code in bus.h */ + .bs_w_1_s = NULL, /* Use inline code in bus.h */ + .bs_w_2_s = NULL, /* Use inline code in bus.h */ + .bs_w_4_s = NULL, /* Use inline code in bus.h */ + .bs_w_8_s = NULL, /* Use inline code in bus.h */ /* write multiple stream */ .bs_wm_1_s = generic_bs_wm_1, diff --git a/sys/arm/arm/busdma_machdep-v6.c b/sys/arm/arm/busdma_machdep-v6.c index 7236c5a54c1f..67e053bf1b58 100644 --- a/sys/arm/arm/busdma_machdep-v6.c +++ b/sys/arm/arm/busdma_machdep-v6.c @@ -160,7 +160,7 @@ SYSCTL_UINT(_hw_busdma, OID_AUTO, maps_dmamem, CTLFLAG_RD, &maps_dmamem, 0, "Number of active maps for bus_dmamem_alloc buffers"); SYSCTL_UINT(_hw_busdma, OID_AUTO, maps_coherent, CTLFLAG_RD, &maps_coherent, 0, "Number of active maps with BUS_DMA_COHERENT flag set"); -SYSCTL_COUNTER_U64(_hw_busdma, OID_AUTO, maploads_total, CTLFLAG_RD, +SYSCTL_COUNTER_U64(_hw_busdma, OID_AUTO, maploads_total, CTLFLAG_RD, &maploads_total, "Number of load operations performed"); SYSCTL_COUNTER_U64(_hw_busdma, OID_AUTO, maploads_bounced, CTLFLAG_RD, &maploads_bounced, "Number of load operations that used bounce buffers"); @@ -230,14 +230,14 @@ busdma_init(void *dummy) uma_flags = 0; /* Create a cache of buffers in standard (cacheable) memory. */ - standard_allocator = busdma_bufalloc_create("buffer", + standard_allocator = busdma_bufalloc_create("buffer", arm_dcache_align, /* minimum_alignment */ - NULL, /* uma_alloc func */ + NULL, /* uma_alloc func */ NULL, /* uma_free func */ uma_flags); /* uma_zcreate_flags */ #ifdef INVARIANTS - /* + /* * Force UMA zone to allocate service structures like * slabs using own allocator. uma_debug code performs * atomic ops on uma_slab_t fields and safety of this @@ -251,8 +251,8 @@ busdma_init(void *dummy) */ coherent_allocator = busdma_bufalloc_create("coherent", arm_dcache_align, /* minimum_alignment */ - busdma_bufalloc_alloc_uncacheable, - busdma_bufalloc_free_uncacheable, + busdma_bufalloc_alloc_uncacheable, + busdma_bufalloc_free_uncacheable, uma_flags); /* uma_zcreate_flags */ } @@ -343,7 +343,7 @@ cacheline_bounce(bus_dmamap_t map, bus_addr_t addr, bus_size_t size) * address spaces. */ static __inline int -might_bounce(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t addr, +might_bounce(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t addr, bus_size_t size) { @@ -364,7 +364,7 @@ might_bounce(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t addr, * the DMA needs to bounce, otherwise any DMA within the zone bounces. */ static int -must_bounce(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t paddr, +must_bounce(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t paddr, bus_size_t size) { @@ -387,11 +387,11 @@ must_bounce(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t paddr, */ while (dmat != NULL && exclusion_bounce(dmat)) { if ((paddr >= dmat->lowaddr && paddr <= dmat->highaddr) && - (dmat->filter == NULL || + (dmat->filter == NULL || dmat->filter(dmat->filterarg, paddr) != 0)) return (1); dmat = dmat->parent; - } + } return (0); } @@ -554,7 +554,7 @@ bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment, * number of pages in a transfer. */ maxsize = roundup2(maxsize, PAGE_SIZE) + PAGE_SIZE; - + if ((error = alloc_bounce_zone(newtag)) != 0) { free(newtag, M_DEVBUF); return (error); @@ -630,7 +630,7 @@ static int allocate_bz_and_pages(bus_dma_tag_t dmat, bus_dmamap_t mapp) struct bounce_zone *bz; int maxpages; int error; - + if (dmat->bounce_zone == NULL) if ((error = alloc_bounce_zone(dmat)) != 0) return (error); @@ -651,13 +651,13 @@ static int allocate_bz_and_pages(bus_dma_tag_t dmat, bus_dmamap_t mapp) if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0 || (bz->map_count > 0 && bz->total_bpages < maxpages)) { int pages; - + pages = atop(roundup2(dmat->maxsize, PAGE_SIZE)) + 1; pages = MIN(maxpages - bz->total_bpages, pages); pages = MAX(pages, 2); if (alloc_bounce_pages(dmat, pages) < pages) return (ENOMEM); - + if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0) dmat->flags |= BUS_DMA_MIN_ALLOC_COMP; } @@ -676,7 +676,7 @@ allocate_map(bus_dma_tag_t dmat, int mflags) * variable-sized array of sync_list structures. Following that * we allocate enough extra space to hold the array of bus_dma_segments. */ - KASSERT(dmat->nsegments <= MAX_DMA_SEGMENTS, + KASSERT(dmat->nsegments <= MAX_DMA_SEGMENTS, ("cannot allocate %u dma segments (max is %u)", dmat->nsegments, MAX_DMA_SEGMENTS)); segsize = sizeof(struct bus_dma_segment) * dmat->nsegments; @@ -931,7 +931,7 @@ _bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, else paddr = pmap_extract(map->pmap, vaddr); if (must_bounce(dmat, map, paddr, - min(vendaddr - vaddr, (PAGE_SIZE - ((vm_offset_t)vaddr & + min(vendaddr - vaddr, (PAGE_SIZE - ((vm_offset_t)vaddr & PAGE_MASK)))) != 0) { map->pagesneeded++; } @@ -1267,7 +1267,7 @@ _bus_dmamap_fix_user(vm_offset_t buf, bus_size_t len, bus_addr_t curaddr; vm_offset_t va; - /* + /* * each synclist entry is contained within a single page. * this would be needed if BUS_DMASYNC_POSTxxxx was implemented */ @@ -1339,7 +1339,7 @@ _bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op) cpu_dcache_wb_range((vm_offset_t)bpage->vaddr, bpage->datacount); l2cache_wb_range((vm_offset_t)bpage->vaddr, - (vm_offset_t)bpage->busaddr, + (vm_offset_t)bpage->busaddr, bpage->datacount); bpage = STAILQ_NEXT(bpage, links); } @@ -1387,10 +1387,10 @@ _bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op) startv = bpage->vaddr &~ arm_dcache_align_mask; startp = bpage->busaddr &~ arm_dcache_align_mask; len = bpage->datacount; - + if (startv != bpage->vaddr) len += bpage->vaddr & arm_dcache_align_mask; - if (len & arm_dcache_align_mask) + if (len & arm_dcache_align_mask) len = (len - (len & arm_dcache_align_mask)) + arm_dcache_align; @@ -1473,7 +1473,7 @@ _bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op) sl->busaddr, 1); } cpu_dcache_inv_range(sl->vaddr, sl->datacount); - l2cache_inv_range(sl->vaddr, sl->busaddr, + l2cache_inv_range(sl->vaddr, sl->busaddr, sl->datacount); sl++; } @@ -1485,7 +1485,7 @@ _bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op) case BUS_DMASYNC_POSTREAD: case BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE: while (sl != end) { - l2cache_inv_range(sl->vaddr, sl->busaddr, + l2cache_inv_range(sl->vaddr, sl->busaddr, sl->datacount); cpu_dcache_inv_range(sl->vaddr, sl->datacount); sl++; diff --git a/sys/arm/arm/busdma_machdep.c b/sys/arm/arm/busdma_machdep.c index acd8f81ec128..d7498c5d111a 100644 --- a/sys/arm/arm/busdma_machdep.c +++ b/sys/arm/arm/busdma_machdep.c @@ -237,7 +237,7 @@ dmamap_ctor(void *mem, int size, void *arg, int flags) * This is the dtor function passed to uma_zcreate() for the pool of dma maps. * It may need platform-specific changes if this code is copied . */ -static void +static void dmamap_dtor(void *mem, int size, void *arg) { bus_dmamap_t map; @@ -256,9 +256,9 @@ busdma_init(void *dummy) dmamap_ctor, dmamap_dtor, NULL, NULL, UMA_ALIGN_PTR, 0); /* Create a cache of buffers in standard (cacheable) memory. */ - standard_allocator = busdma_bufalloc_create("buffer", + standard_allocator = busdma_bufalloc_create("buffer", arm_dcache_align, /* minimum_alignment */ - NULL, /* uma_alloc func */ + NULL, /* uma_alloc func */ NULL, /* uma_free func */ 0); /* uma_zcreate_flags */ @@ -268,8 +268,8 @@ busdma_init(void *dummy) */ coherent_allocator = busdma_bufalloc_create("coherent", arm_dcache_align, /* minimum_alignment */ - busdma_bufalloc_alloc_uncacheable, - busdma_bufalloc_free_uncacheable, + busdma_bufalloc_alloc_uncacheable, + busdma_bufalloc_free_uncacheable, 0); /* uma_zcreate_flags */ } @@ -308,7 +308,7 @@ run_filter(bus_dma_tag_t dmat, bus_addr_t paddr) || (*dmat->filter)(dmat->filterarg, paddr) != 0)) retval = 1; - dmat = dmat->parent; + dmat = dmat->parent; } while (retval == 0 && dmat != NULL); return (retval); } @@ -531,13 +531,13 @@ bus_dma_tag_destroy(bus_dma_tag_t dmat) #endif if (dmat != NULL) { - + if (dmat->map_count != 0) return (EBUSY); - + while (dmat != NULL) { bus_dma_tag_t parent; - + parent = dmat->parent; atomic_subtract_int(&dmat->ref_count, 1); if (dmat->ref_count == 0) { @@ -588,7 +588,7 @@ bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp) * now, because we can't sleep for resources at map load time. */ if (dmat->segments == NULL) { - dmat->segments = malloc(dmat->nsegments * + dmat->segments = malloc(dmat->nsegments * sizeof(*dmat->segments), M_DEVBUF, M_NOWAIT); if (dmat->segments == NULL) { free(slist, M_DEVBUF); @@ -701,7 +701,7 @@ bus_dmamem_alloc(bus_dma_tag_t dmat, void **vaddrp, int flags, * now, because we can't sleep for resources at map load time. */ if (dmat->segments == NULL) - dmat->segments = malloc(dmat->nsegments * + dmat->segments = malloc(dmat->nsegments * sizeof(*dmat->segments), M_DEVBUF, mflags); slist = malloc(sizeof(*slist) * dmat->nsegments, M_DEVBUF, M_NOWAIT); @@ -918,7 +918,7 @@ _bus_dmamap_addseg(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t curaddr, * memory address to an address in the DMA window. */ curaddr = (curaddr - dr->dr_sysbase) + dr->dr_busbase; - + } seg = *segp; @@ -1206,7 +1206,7 @@ _bus_dmamap_sync_bp(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op) STAILQ_FOREACH(bpage, &map->bpages, links) { if (op & BUS_DMASYNC_PREWRITE) { if (bpage->datavaddr != 0) - bcopy((void *)bpage->datavaddr, + bcopy((void *)bpage->datavaddr, (void *)bpage->vaddr, bpage->datacount); else physcopyout(bpage->dataaddr, diff --git a/sys/arm/arm/copystr.S b/sys/arm/arm/copystr.S index 57c9e700c3df..3ce8499d3d3f 100644 --- a/sys/arm/arm/copystr.S +++ b/sys/arm/arm/copystr.S @@ -38,7 +38,6 @@ * Created : 16/05/95 */ - #include "assym.s" #include #include diff --git a/sys/arm/arm/cpu_asm-v6.S b/sys/arm/arm/cpu_asm-v6.S index b36c9d1f535b..842dae348b26 100644 --- a/sys/arm/arm/cpu_asm-v6.S +++ b/sys/arm/arm/cpu_asm-v6.S @@ -33,10 +33,10 @@ #include #include -/* +/* * Define cache functions used by startup code, which counts on the fact that * only r0-r3,r12 (ip) are modified and no stack space is used. These functions - * must be called with interrupts disabled. Moreover, these work only with + * must be called with interrupts disabled. Moreover, these work only with * caches integrated to CPU (accessible via CP15); systems with an external L2 * cache controller such as a PL310 need separate calls to that device driver * to affect L2 caches. This is not a factor during early kernel startup, as diff --git a/sys/arm/arm/cpufunc.c b/sys/arm/arm/cpufunc.c index a3c82395124d..0b589ed2a1a1 100644 --- a/sys/arm/arm/cpufunc.c +++ b/sys/arm/arm/cpufunc.c @@ -99,8 +99,6 @@ u_int arm_cache_level; u_int arm_cache_type[14]; u_int arm_cache_loc; -/* 1 == use cpu_sleep(), 0 == don't */ -int cpu_do_powersave; int ctrl; #ifdef CPU_ARM9 @@ -363,7 +361,7 @@ struct cpu_functions pj4bv7_cpufuncs = { struct cpu_functions xscale_cpufuncs = { /* CPU functions */ - + cpufunc_id, /* id */ xscale_cpwait, /* cpwait */ @@ -428,7 +426,7 @@ struct cpu_functions xscale_cpufuncs = { #ifdef CPU_XSCALE_81342 struct cpu_functions xscalec3_cpufuncs = { /* CPU functions */ - + cpufunc_id, /* id */ xscale_cpwait, /* cpwait */ @@ -555,63 +553,63 @@ struct cpu_functions fa526_cpufuncs = { #if defined(CPU_ARM1176) struct cpu_functions arm1176_cpufuncs = { /* CPU functions */ - + cpufunc_id, /* id */ cpufunc_nullop, /* cpwait */ - + /* MMU functions */ - + cpufunc_control, /* control */ cpufunc_domains, /* Domain */ arm11x6_setttb, /* Setttb */ cpufunc_faultstatus, /* Faultstatus */ cpufunc_faultaddress, /* Faultaddress */ - + /* TLB functions */ - + arm11_tlb_flushID, /* tlb_flushID */ arm11_tlb_flushID_SE, /* tlb_flushID_SE */ arm11_tlb_flushI, /* tlb_flushI */ arm11_tlb_flushI_SE, /* tlb_flushI_SE */ arm11_tlb_flushD, /* tlb_flushD */ arm11_tlb_flushD_SE, /* tlb_flushD_SE */ - + /* Cache operations */ - + arm11x6_icache_sync_all, /* icache_sync_all */ arm11x6_icache_sync_range, /* icache_sync_range */ - + arm11x6_dcache_wbinv_all, /* dcache_wbinv_all */ armv6_dcache_wbinv_range, /* dcache_wbinv_range */ armv6_dcache_inv_range, /* dcache_inv_range */ armv6_dcache_wb_range, /* dcache_wb_range */ - + armv6_idcache_inv_all, /* idcache_inv_all */ arm11x6_idcache_wbinv_all, /* idcache_wbinv_all */ arm11x6_idcache_wbinv_range, /* idcache_wbinv_range */ - + (void *)cpufunc_nullop, /* l2cache_wbinv_all */ (void *)cpufunc_nullop, /* l2cache_wbinv_range */ (void *)cpufunc_nullop, /* l2cache_inv_range */ (void *)cpufunc_nullop, /* l2cache_wb_range */ (void *)cpufunc_nullop, /* l2cache_drain_writebuf */ - + /* Other functions */ - + arm11x6_flush_prefetchbuf, /* flush_prefetchbuf */ arm11_drain_writebuf, /* drain_writebuf */ cpufunc_nullop, /* flush_brnchtgt_C */ (void *)cpufunc_nullop, /* flush_brnchtgt_E */ - + arm11x6_sleep, /* sleep */ - + /* Soft functions */ - + cpufunc_null_fixup, /* dataabt_fixup */ cpufunc_null_fixup, /* prefetchabt_fixup */ - + arm11_context_switch, /* context_switch */ - + arm11x6_setup /* cpu setup */ }; #endif /*CPU_ARM1176 */ @@ -619,46 +617,46 @@ struct cpu_functions arm1176_cpufuncs = { #if defined(CPU_CORTEXA) || defined(CPU_KRAIT) struct cpu_functions cortexa_cpufuncs = { /* CPU functions */ - + cpufunc_id, /* id */ cpufunc_nullop, /* cpwait */ - + /* MMU functions */ - + cpufunc_control, /* control */ cpufunc_domains, /* Domain */ armv7_setttb, /* Setttb */ cpufunc_faultstatus, /* Faultstatus */ cpufunc_faultaddress, /* Faultaddress */ - - /* + + /* * TLB functions. ARMv7 does all TLB ops based on a unified TLB model * whether the hardware implements separate I+D or not, so we use the * same 'ID' functions for all 3 variations. */ - + armv7_tlb_flushID, /* tlb_flushID */ armv7_tlb_flushID_SE, /* tlb_flushID_SE */ armv7_tlb_flushID, /* tlb_flushI */ armv7_tlb_flushID_SE, /* tlb_flushI_SE */ armv7_tlb_flushID, /* tlb_flushD */ armv7_tlb_flushID_SE, /* tlb_flushD_SE */ - + /* Cache operations */ - + armv7_icache_sync_all, /* icache_sync_all */ armv7_icache_sync_range, /* icache_sync_range */ - + armv7_dcache_wbinv_all, /* dcache_wbinv_all */ armv7_dcache_wbinv_range, /* dcache_wbinv_range */ armv7_dcache_inv_range, /* dcache_inv_range */ armv7_dcache_wb_range, /* dcache_wb_range */ - + armv7_idcache_inv_all, /* idcache_inv_all */ armv7_idcache_wbinv_all, /* idcache_wbinv_all */ armv7_idcache_wbinv_range, /* idcache_wbinv_range */ - - /* + + /* * Note: For CPUs using the PL310 the L2 ops are filled in when the * L2 cache controller is actually enabled. */ @@ -667,23 +665,23 @@ struct cpu_functions cortexa_cpufuncs = { (void *)cpufunc_nullop, /* l2cache_inv_range */ (void *)cpufunc_nullop, /* l2cache_wb_range */ (void *)cpufunc_nullop, /* l2cache_drain_writebuf */ - + /* Other functions */ - + cpufunc_nullop, /* flush_prefetchbuf */ armv7_drain_writebuf, /* drain_writebuf */ cpufunc_nullop, /* flush_brnchtgt_C */ (void *)cpufunc_nullop, /* flush_brnchtgt_E */ - - armv7_sleep, /* sleep */ - + + armv7_cpu_sleep, /* sleep */ + /* Soft functions */ - + cpufunc_null_fixup, /* dataabt_fixup */ cpufunc_null_fixup, /* prefetchabt_fixup */ - + armv7_context_switch, /* context_switch */ - + cortexa_setup /* cpu setup */ }; #endif /* CPU_CORTEXA */ @@ -760,7 +758,7 @@ get_cachetype_cp15() __asm __volatile("mrc p15, 1, %0, c0, c0, 0" : "=r" (csize)); arm_cache_type[sel] = csize; - arm_dcache_align = 1 << + arm_dcache_align = 1 << (CPUV7_CT_xSIZE_LEN(csize) + 4); arm_dcache_align_mask = arm_dcache_align - 1; } @@ -838,11 +836,6 @@ set_cpufuncs() cputype = cpufunc_id(); cputype &= CPU_ID_CPU_MASK; - /* - * NOTE: cpu_do_powersave defaults to off. If we encounter a - * CPU type where we want to use it by default, then we set it. - */ - #ifdef CPU_ARM9 if (((cputype & CPU_ID_IMPLEMENTOR_MASK) == CPU_ID_ARM_LTD || (cputype & CPU_ID_IMPLEMENTOR_MASK) == CPU_ID_TI) && @@ -920,14 +913,12 @@ set_cpufuncs() cpufuncs = cortexa_cpufuncs; cpu_reset_needs_v4_MMU_disable = 1; /* V4 or higher */ get_cachetype_cp15(); - + pmap_pte_init_mmu_v6(); - /* Use powersave on this CPU. */ - cpu_do_powersave = 1; goto out; } #endif /* CPU_CORTEXA */ - + #if defined(CPU_MV_PJ4B) if (cputype == CPU_ID_MV88SV581X_V7 || cputype == CPU_ID_MV88SV584X_V7 || @@ -946,9 +937,6 @@ set_cpufuncs() get_cachetype_cp15(); pmap_pte_init_generic(); - /* Use powersave on this CPU. */ - cpu_do_powersave = 1; - goto out; } #endif /* CPU_FA526 */ @@ -985,9 +973,6 @@ set_cpufuncs() get_cachetype_cp15(); pmap_pte_init_xscale(); - /* Use powersave on this CPU. */ - cpu_do_powersave = 1; - goto out; } #endif /* CPU_XSCALE_PXA2X0 */ @@ -1131,37 +1116,20 @@ cpu_scc_setup_ccnt(void) * you want! */ #ifdef _PMC_USER_READ_WRITE_ -#if defined(CPU_ARM1176) - /* Use the Secure User and Non-secure Access Validation Control Register - * to allow userland access - */ - __asm volatile ("mcr p15, 0, %0, c15, c9, 0\n\t" - : - : "r"(0x00000001)); -#else /* Set PMUSERENR[0] to allow userland access */ - __asm volatile ("mcr p15, 0, %0, c9, c14, 0\n\t" - : - : "r"(0x00000001)); -#endif + cp15_pmuserenr_set(1); #endif #if defined(CPU_ARM1176) /* Set PMCR[2,0] to enable counters and reset CCNT */ - __asm volatile ("mcr p15, 0, %0, c15, c12, 0\n\t" - : - : "r"(0x00000005)); + cp15_pmcr_set(5); #else /* Set up the PMCCNTR register as a cyclecounter: * Set PMINTENCLR to 0xFFFFFFFF to block interrupts * Set PMCR[2,0] to enable counters and reset CCNT * Set PMCNTENSET to 0x80000000 to enable CCNT */ - __asm volatile ("mcr p15, 0, %0, c9, c14, 2\n\t" - "mcr p15, 0, %1, c9, c12, 0\n\t" - "mcr p15, 0, %2, c9, c12, 1\n\t" - : - : "r"(0xFFFFFFFF), - "r"(0x00000005), - "r"(0x80000000)); + cp15_pminten_clr(0xFFFFFFFF); + cp15_pmcr_set(5); + cp15_pmcnten_set(0x80000000); #endif } #endif @@ -1197,7 +1165,7 @@ arm11x6_setup(void) (3 << 30) | /* SBZ */ (1 << 29) | /* FA */ (1 << 28) | /* TR */ - (3 << 26) | /* SBZ */ + (3 << 26) | /* SBZ */ (3 << 19) | /* SBZ */ (1 << 17); /* SBZ */ @@ -1229,19 +1197,18 @@ arm11x6_setup(void) __asm volatile ("mcr\tp15, 0, %0, c7, c7, 0" : : "r"(sbz)); /* Allow detection code to find the VFP if it's fitted. */ - __asm volatile ("mcr\tp15, 0, %0, c1, c0, 2" : : "r" (0x0fffffff)); + cp15_cpacr_set(0x0fffffff); /* Set the control register */ ctrl = cpuctrl; cpu_control(~cpuctrl_wax, cpuctrl); - __asm volatile ("mrc p15, 0, %0, c1, c0, 1\n\t" - "and %1, %0, %2\n\t" - "orr %1, %1, %3\n\t" - "teq %0, %1\n\t" - "mcrne p15, 0, %1, c1, c0, 1\n\t" - : "=r"(tmp), "=r"(tmp2) : - "r"(auxctrl_wax), "r"(auxctrl)); + tmp = cp15_actlr_get(); + tmp2 = tmp; + tmp &= auxctrl_wax; + tmp |= auxctrl; + if (tmp != tmp2) + cp15_actlr_set(tmp); /* And again. */ cpu_idcache_wbinv_all(); @@ -1291,39 +1258,39 @@ void cortexa_setup(void) { int cpuctrl, cpuctrlmask; - + cpuctrlmask = CPU_CONTROL_MMU_ENABLE | /* MMU enable [0] */ CPU_CONTROL_AFLT_ENABLE | /* Alignment fault [1] */ CPU_CONTROL_DC_ENABLE | /* DCache enable [2] */ CPU_CONTROL_BPRD_ENABLE | /* Branch prediction [11] */ CPU_CONTROL_IC_ENABLE | /* ICache enable [12] */ CPU_CONTROL_VECRELOC; /* Vector relocation [13] */ - + cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE | CPU_CONTROL_BPRD_ENABLE; - + #ifndef ARM32_DISABLE_ALIGNMENT_FAULTS cpuctrl |= CPU_CONTROL_AFLT_ENABLE; #endif - + /* Switch to big endian */ #ifdef __ARMEB__ cpuctrl |= CPU_CONTROL_BEND_ENABLE; #endif - + /* Check if the vector page is at the high address (0xffff0000) */ if (vector_page == ARM_VECTORS_HIGH) cpuctrl |= CPU_CONTROL_VECRELOC; - + /* Clear out the cache */ cpu_idcache_wbinv_all(); - + /* Set the control register */ ctrl = cpuctrl; cpu_control(cpuctrlmask, cpuctrl); - + /* And again. */ cpu_idcache_wbinv_all(); #ifdef SMP diff --git a/sys/arm/arm/cpufunc_asm_arm11x6.S b/sys/arm/arm/cpufunc_asm_arm11x6.S index 4d2697a687e5..b88c0fd67ee2 100644 --- a/sys/arm/arm/cpufunc_asm_arm11x6.S +++ b/sys/arm/arm/cpufunc_asm_arm11x6.S @@ -73,7 +73,7 @@ __FBSDID("$FreeBSD$"); * * Erratum 411920 in ARM1136 (fixed in r1p4) * Erratum 415045 in ARM1176 (fixed in r0p5?) - * + * * - value of arg 'reg' Should Be Zero */ #define Invalidate_I_cache(Rtmp1, Rtmp2) \ @@ -150,20 +150,20 @@ ENTRY_NP(arm11x6_icache_sync_range) /* Erratum ARM1176 371367 */ mrs r2, cpsr /* save the CPSR */ cpsid ifa /* disable interrupts (irq,fiq,abort) */ - mov r3, #0 + mov r3, #0 mcr p15, 0, r3, c13, c0, 0 /* write FCSE (uTLB invalidate) */ mcr p15, 0, r3, c7, c5, 4 /* flush prefetch buffer */ - add r3, pc, #0x24 + add r3, pc, #0x24 mcr p15, 0, r3, c7, c13, 1 /* prefetch I-cache line */ mcrr p15, 0, r1, r0, c5 /* invalidate I-cache range */ msr cpsr_cx, r2 /* local_irq_restore */ - nop - nop - nop - nop - nop - nop - nop + nop + nop + nop + nop + nop + nop + nop mcrr p15, 0, r1, r0, c12 /* clean and invalidate D cache range */ /* XXXNH */ mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */ @@ -177,20 +177,20 @@ ENTRY_NP(arm11x6_idcache_wbinv_range) /* Erratum ARM1176 371367 */ mrs r2, cpsr /* save the CPSR */ cpsid ifa /* disable interrupts (irq,fiq,abort) */ - mov r3, #0 + mov r3, #0 mcr p15, 0, r3, c13, c0, 0 /* write FCSE (uTLB invalidate) */ mcr p15, 0, r3, c7, c5, 4 /* flush prefetch buffer */ - add r3, pc, #0x24 + add r3, pc, #0x24 mcr p15, 0, r3, c7, c13, 1 /* prefetch I-cache line */ mcrr p15, 0, r1, r0, c5 /* invalidate I-cache range */ msr cpsr_cx, r2 /* local_irq_restore */ - nop - nop - nop - nop - nop - nop - nop + nop + nop + nop + nop + nop + nop + nop mcrr p15, 0, r1, r0, c14 /* clean and invalidate D cache range */ mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */ @@ -199,7 +199,7 @@ END(arm11x6_idcache_wbinv_range) /* * Preload the cache before issuing the WFI by conditionally disabling the - * mcr intstructions the first time around the loop. Ensure the function is + * mcr intstructions the first time around the loop. Ensure the function is * cacheline aligned. */ .arch armv6 diff --git a/sys/arm/arm/cpufunc_asm_arm9.S b/sys/arm/arm/cpufunc_asm_arm9.S index 24a314245030..9247b0c42b1c 100644 --- a/sys/arm/arm/cpufunc_asm_arm9.S +++ b/sys/arm/arm/cpufunc_asm_arm9.S @@ -130,7 +130,7 @@ ENTRY(arm9_dcache_wb_range) bhi .Larm9_wb_next mov pc, lr END(arm9_dcache_wb_range) - + ENTRY(arm9_dcache_wbinv_range) ldr ip, .Larm9_line_size cmp r1, #0x4000 @@ -147,7 +147,7 @@ ENTRY(arm9_dcache_wbinv_range) bhi .Larm9_wbinv_next mov pc, lr END(arm9_dcache_wbinv_range) - + /* * Note, we must not invalidate everything. If the range is too big we * must use wb-inv of the entire cache. diff --git a/sys/arm/arm/cpufunc_asm_armv6.S b/sys/arm/arm/cpufunc_asm_armv6.S index 7c111c7d1e56..7d3af6eb0593 100644 --- a/sys/arm/arm/cpufunc_asm_armv6.S +++ b/sys/arm/arm/cpufunc_asm_armv6.S @@ -37,7 +37,7 @@ /* * $FreeBSD$ */ - + #include .arch armv6 @@ -69,7 +69,7 @@ ENTRY(armv6_dcache_wb_range) mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */ RET END(armv6_dcache_wb_range) - + /* LINTSTUB: void armv6_dcache_wbinv_range(vaddr_t, vsize_t); */ ENTRY(armv6_dcache_wbinv_range) add r1, r1, r0 @@ -78,7 +78,7 @@ ENTRY(armv6_dcache_wbinv_range) mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */ RET END(armv6_dcache_wbinv_range) - + /* * Note, we must not invalidate everything. If the range is too big we * must use wb-inv of the entire cache. diff --git a/sys/arm/arm/cpufunc_asm_armv7.S b/sys/arm/arm/cpufunc_asm_armv7.S index 7016d7eeffb0..42ccc6dd47e2 100644 --- a/sys/arm/arm/cpufunc_asm_armv7.S +++ b/sys/arm/arm/cpufunc_asm_armv7.S @@ -64,7 +64,7 @@ __FBSDID("$FreeBSD$"); #define PT_OUTER_WT (2 << 3) #define PT_OUTER_WB (3 << 3) #define PT_OUTER_WBWA (1 << 3) - + #ifdef SMP #define PT_ATTR (PT_S|PT_INNER_WBWA|PT_OUTER_WBWA|PT_NOS) #else @@ -366,9 +366,3 @@ ENTRY(armv7_idcache_inv_all) bx lr @ return END(armv7_idcache_inv_all) -ENTRY_NP(armv7_sleep) - dsb - wfi - bx lr -END(armv7_sleep) - diff --git a/sys/arm/arm/cpufunc_asm_xscale_c3.S b/sys/arm/arm/cpufunc_asm_xscale_c3.S index 78fa2d578dcf..cb770a8b873a 100644 --- a/sys/arm/arm/cpufunc_asm_xscale_c3.S +++ b/sys/arm/arm/cpufunc_asm_xscale_c3.S @@ -135,7 +135,7 @@ __FBSDID("$FreeBSD$"); ldr r4, .Lblock_userspace_access ; \ ldr ip, [r4] ; \ orr r0, ip, #1 ; \ - str r0, [r4] + str r0, [r4] #define XSCALE_CACHE_CLEAN_UNBLOCK \ str ip, [r3] ; \ @@ -217,7 +217,7 @@ ENTRY(xscalec3_cache_syncI_rng) CPWAIT_AND_RETURN(r0) END(xscalec3_cache_syncI_rng) - + ENTRY(xscalec3_cache_purgeD_rng) cmp r1, #0x4000 diff --git a/sys/arm/arm/cpuinfo.c b/sys/arm/arm/cpuinfo.c index 46170033a0e6..311eba1f6d22 100644 --- a/sys/arm/arm/cpuinfo.c +++ b/sys/arm/arm/cpuinfo.c @@ -48,7 +48,7 @@ void cpuinfo_init(void) { - cpuinfo.midr = cp15_midr_get(); + cpuinfo.midr = cp15_midr_get(); /* Test old version id schemes first */ if ((cpuinfo.midr & CPU_ID_IMPLEMENTOR_MASK) == CPU_ID_ARM_LTD) { if (CPU_ID_ISOLD(cpuinfo.midr)) { @@ -74,7 +74,7 @@ cpuinfo_init(void) /* non ARM -> must be new id scheme */ cpuinfo.architecture = (cpuinfo.midr >> 16) & 0x0F; cpuinfo.revision = (cpuinfo.midr >> 20) & 0x0F; - } + } /* Parse rest of MIDR */ cpuinfo.implementer = (cpuinfo.midr >> 24) & 0xFF; cpuinfo.part_number = (cpuinfo.midr >> 4) & 0xFFF; @@ -86,11 +86,11 @@ cpuinfo_init(void) cpuinfo.tlbtr = cp15_tlbtr_get(); cpuinfo.mpidr = cp15_mpidr_get(); cpuinfo.revidr = cp15_revidr_get(); - + /* if CPU is not v7 cpu id scheme */ if (cpuinfo.architecture != 0xF) return; - + cpuinfo.id_pfr0 = cp15_id_pfr0_get(); cpuinfo.id_pfr1 = cp15_id_pfr1_get(); cpuinfo.id_dfr0 = cp15_id_dfr0_get(); @@ -131,8 +131,17 @@ cpuinfo_init(void) cpuinfo.security_ext = (cpuinfo.id_pfr1 >> 4) & 0xF; /* L1 Cache sizes */ - cpuinfo.dcache_line_size = 1 << (CPU_CT_DMINLINE(cpuinfo.ctr ) + 2); + if (CPU_CT_FORMAT(cpuinfo.ctr) == CPU_CT_ARMV7) { + cpuinfo.dcache_line_size = + 1 << (CPU_CT_DMINLINE(cpuinfo.ctr) + 2); + cpuinfo.icache_line_size = + 1 << (CPU_CT_IMINLINE(cpuinfo.ctr) + 2); + } else { + cpuinfo.dcache_line_size = + 1 << (CPU_CT_xSIZE_LEN(CPU_CT_DSIZE(cpuinfo.ctr)) + 3); + cpuinfo.icache_line_size = + 1 << (CPU_CT_xSIZE_LEN(CPU_CT_ISIZE(cpuinfo.ctr)) + 3); + } cpuinfo.dcache_line_mask = cpuinfo.dcache_line_size - 1; - cpuinfo.icache_line_size= 1 << (CPU_CT_IMINLINE(cpuinfo.ctr ) + 2); cpuinfo.icache_line_mask = cpuinfo.icache_line_size - 1; } diff --git a/sys/arm/arm/db_disasm.c b/sys/arm/arm/db_disasm.c index d7581fd9c008..2eabf387c3ff 100644 --- a/sys/arm/arm/db_disasm.c +++ b/sys/arm/arm/db_disasm.c @@ -70,7 +70,7 @@ db_disasm_printaddr(u_int address) } vm_offset_t -db_disasm(vm_offset_t loc, boolean_t altfmt) +db_disasm(vm_offset_t loc, bool altfmt) { return disasm(&db_disasm_interface, loc, altfmt); diff --git a/sys/arm/arm/db_interface.c b/sys/arm/arm/db_interface.c index 690665087678..3a2515e7ad49 100644 --- a/sys/arm/arm/db_interface.c +++ b/sys/arm/arm/db_interface.c @@ -326,12 +326,9 @@ branch_taken(u_int insn, db_addr_t pc) default: break; /* XXX */ } - } return (addr + offset); - } - case 0xa: /* b ... */ case 0xb: /* bl ... */ addr = ((insn << 2) & 0x03ffffff); diff --git a/sys/arm/arm/elf_machdep.c b/sys/arm/arm/elf_machdep.c index 598decc3ff81..e5cc6a023240 100644 --- a/sys/arm/arm/elf_machdep.c +++ b/sys/arm/arm/elf_machdep.c @@ -81,6 +81,7 @@ struct sysentvec elf32_freebsd_sysvec = { .sv_fetch_syscall_args = cpu_fetch_syscall_args, .sv_syscallnames = syscallnames, .sv_schedtail = NULL, + .sv_thread_detach = NULL, }; static Elf32_Brandinfo freebsd_brand_info = { diff --git a/sys/arm/arm/elf_trampoline.c b/sys/arm/arm/elf_trampoline.c index bdde6d6ce6e5..296aee1bd0b8 100644 --- a/sys/arm/arm/elf_trampoline.c +++ b/sys/arm/arm/elf_trampoline.c @@ -93,7 +93,7 @@ extern void sheeva_l2cache_wbinv_all(void); #define cpu_idcache_wbinv_all armv7_idcache_wbinv_all #define cpu_l2cache_wbinv_all() #else -#define cpu_l2cache_wbinv_all() +#define cpu_l2cache_wbinv_all() #endif static void armadaxp_idcache_wbinv_all(void); @@ -216,7 +216,7 @@ _startC(void) "mov sp, %1\n" "mov pc, %0\n" : : "r" (target_addr), "r" (tmp_sp)); - + } #endif #ifdef KZIP @@ -225,7 +225,7 @@ _startC(void) sp += 2 * L1_TABLE_SIZE; #endif sp += 1024 * 1024; /* Should be enough for a stack */ - + __asm __volatile("adr %0, 2f\n" "bic %0, %0, #0xff000000\n" "and %1, %1, #0xff000000\n" @@ -366,7 +366,7 @@ get_cachetype_cp15() static void arm9_setup(void) { - + get_cachetype_cp15(); arm9_dcache_sets_inc = 1U << arm_dcache_l2_linesize; arm9_dcache_sets_max = (1U << (arm_dcache_l2_linesize + @@ -490,7 +490,7 @@ load_kernel(unsigned int kstart, unsigned int curaddr,unsigned int func_end, vm_offset_t lastaddr = 0; Elf_Addr ssym = 0; Elf_Dyn *dp; - + eh = (Elf32_Ehdr *)kstart; ssym = 0; entry_point = (void*)eh->e_entry; @@ -504,7 +504,7 @@ load_kernel(unsigned int kstart, unsigned int curaddr,unsigned int func_end, lastaddr = phdr[i].p_vaddr - KERNVIRTADDR + curaddr + phdr[i].p_memsz; } - + /* Save the symbol tables, as there're about to be scratched. */ memcpy(shdr, (void *)(kstart + eh->e_shoff), sizeof(*shdr) * eh->e_shnum); @@ -552,12 +552,12 @@ load_kernel(unsigned int kstart, unsigned int curaddr,unsigned int func_end, lastaddr = roundup(lastaddr, sizeof(shdr[symstrindex].sh_size)); } - + } } if (!d) return ((void *)lastaddr); - + j = eh->e_phnum; for (i = 0; i < j; i++) { volatile char c; @@ -610,7 +610,7 @@ load_kernel(unsigned int kstart, unsigned int curaddr,unsigned int func_end, ((void(*)(void))(entry_point - KERNVIRTADDR + curaddr))(); __asm __volatile(".globl func_end\n" "func_end:"); - + /* NOTREACHED */ return NULL; } @@ -653,7 +653,7 @@ setup_pagetables(unsigned int pt_addr, vm_paddr_t physstart, vm_paddr_t physend, "mov r0, r0\n" "sub pc, pc, #4\n" : "=r" (tmp) : "r" (pd), "r" (domain)); - + /* * XXX: This is the most stupid workaround I've ever wrote. * For some reason, the KB9202 won't boot the kernel unless @@ -680,7 +680,7 @@ __start(void) if (*kernel == 0x1f && kernel[1] == 0x8b) { pt_addr = (((int)&_end + KERNSIZE + 0x100) & ~(L1_TABLE_SIZE - 1)) + L1_TABLE_SIZE; - + #ifdef CPU_ARM9 /* So that idcache_wbinv works; */ if ((cpufunc_id() & 0x0000f000) == 0x00009000) @@ -715,7 +715,7 @@ __start(void) dst = (void *)(((vm_offset_t)dst & ~3)); pt_addr = ((unsigned int)dst &~(L1_TABLE_SIZE - 1)) + L1_TABLE_SIZE; setup_pagetables(pt_addr, (vm_paddr_t)curaddr, - (vm_paddr_t)curaddr + 0x10000000, 0); + (vm_paddr_t)curaddr + 0x10000000, 0); sp = pt_addr + L1_TABLE_SIZE + 8192; sp = sp &~3; dst = (void *)(sp + 4); diff --git a/sys/arm/arm/exception.S b/sys/arm/arm/exception.S index 6b856fcefe4c..2d0ad8c83e8c 100644 --- a/sys/arm/arm/exception.S +++ b/sys/arm/arm/exception.S @@ -63,7 +63,7 @@ _C_LABEL(dtrace_invop_calltrap_addr): .word 0 #endif - .text + .text .align 2 /* @@ -123,7 +123,7 @@ _C_LABEL(dtrace_invop_calltrap_addr): add sp, sp, #(4*17); /* Adjust the stack pointer */ \ ldr lr, [sp], #4; /* Pull the return address */ \ add sp, sp, #4 /* Align the stack */ -#else +#else #define PULLFRAME \ ldr r0, [sp], #4 ; /* Get the SPSR from stack */ \ msr spsr_fsxc, r0; \ @@ -226,7 +226,7 @@ _C_LABEL(dtrace_invop_calltrap_addr): mov r0, r0; /* NOP for previous instruction */ \ add sp, sp, #(4*15); /* Adjust the stack pointer */ \ ldmia sp, {sp, lr, pc}^ /* Restore lr and exit */ -#else +#else #define PULLFRAMEFROMSVCANDEXIT \ ldr r0, [sp], #4; /* Get the SPSR from stack */ \ msr spsr_fsxc, r0; /* restore SPSR */ \ @@ -320,7 +320,7 @@ END(exception_exit) * Entry point for a Prefetch Abort exception. * * The hardware switches to the abort mode stack; we switch to svc32 before - * calling the handler, then return directly to the original mode/stack + * calling the handler, then return directly to the original mode/stack * on exit (without transitioning back through the abort mode stack). */ ASENTRY_NP(prefetch_abort_entry) @@ -340,7 +340,7 @@ END(prefetch_abort_entry) * Entry point for a Data Abort exception. * * The hardware switches to the abort mode stack; we switch to svc32 before - * calling the handler, then return directly to the original mode/stack + * calling the handler, then return directly to the original mode/stack * on exit (without transitioning back through the abort mode stack). */ ASENTRY_NP(data_abort_entry) @@ -360,11 +360,10 @@ END(data_abort_entry) * Entry point for an Undefined Instruction exception. * * The hardware switches to the undefined mode stack; we switch to svc32 before - * calling the handler, then return directly to the original mode/stack + * calling the handler, then return directly to the original mode/stack * on exit (without transitioning back through the undefined mode stack). */ ASENTRY_NP(undefined_entry) - sub lr, lr, #4 /* Adjust the lr. Transition to scv32 */ PUSHFRAMEINSVC /* mode stack, build trapframe there. */ adr lr, exception_exit /* Return from handler via standard */ mov r0, sp /* exception exit routine. Pass the */ @@ -375,7 +374,7 @@ END(undefined_entry) * Entry point for a normal IRQ. * * The hardware switches to the IRQ mode stack; we switch to svc32 before - * calling the handler, then return directly to the original mode/stack + * calling the handler, then return directly to the original mode/stack * on exit (without transitioning back through the IRQ mode stack). */ ASENTRY_NP(irq_entry) @@ -384,12 +383,12 @@ ASENTRY_NP(irq_entry) adr lr, exception_exit /* Return from handler via standard */ mov r0, sp /* exception exit routine. Pass the */ b _C_LABEL(arm_irq_handler)/* trapframe to the handler. */ -END(irq_entry) +END(irq_entry) /* * Entry point for an FIQ interrupt. * - * We don't currently support FIQ handlers very much. Something can + * We don't currently support FIQ handlers very much. Something can * install itself in the FIQ vector using code (that may or may not work * these days) in fiq.c. If nobody does that and an FIQ happens, this * default handler just disables FIQs and otherwise ignores it. @@ -417,7 +416,7 @@ Laddr_exception_msg: END(addr_exception_entry) /* - * Entry point for the system Reset vector. + * Entry point for the system Reset vector. * This should never happen, so panic. */ ASENTRY_NP(reset_entry) @@ -435,8 +434,8 @@ END(reset_entry) * the ARM vectors page (high or low) as part of CPU initialization. The * code that does the copy assumes that page0_data holds one 32-bit word * of data for each of the predefined ARM vectors. It also assumes that - * page0_data follows the vectors in page0, but other stuff can appear - * between the two. We currently leave room between the two for some fiq + * page0_data follows the vectors in page0, but other stuff can appear + * between the two. We currently leave room between the two for some fiq * handler code to be copied in. */ .global _C_LABEL(page0), _C_LABEL(page0_data) diff --git a/sys/arm/arm/fiq.c b/sys/arm/arm/fiq.c index 08f867083e9e..94231dea22c8 100644 --- a/sys/arm/arm/fiq.c +++ b/sys/arm/arm/fiq.c @@ -59,7 +59,7 @@ extern uint32_t fiq_nullhandler_size; * fiq_installhandler: * * Actually install the FIQ handler down at the FIQ vector. - * + * * The FIQ vector is fixed by the hardware definition as the * seventh 32-bit word in the vector page. * diff --git a/sys/arm/arm/fusu.S b/sys/arm/arm/fusu.S index dec49ed0a5c3..06853c456948 100644 --- a/sys/arm/arm/fusu.S +++ b/sys/arm/arm/fusu.S @@ -33,6 +33,7 @@ * */ +#include #include #include #include "assym.s" @@ -40,7 +41,7 @@ __FBSDID("$FreeBSD$"); .syntax unified -#ifdef _ARM_ARCH_6 +#if __ARM_ARCH >= 6 #define GET_PCB(tmp) \ mrc p15, 0, tmp, c13, c0, 4; \ add tmp, tmp, #(TD_PCB) @@ -68,12 +69,12 @@ EENTRY_NP(casuword32) stmfd sp!, {r4, r5} adr r4, .Lcasuwordfault str r4, [r3, #PCB_ONFAULT] -#ifdef _ARM_ARCH_6 -1: +#if __ARM_ARCH >= 6 +1: cmp r0, #KERNBASE mvnhs r0, #0 bhs 2f - + ldrex r5, [r0] cmp r5, r1 movne r0, r5 @@ -105,7 +106,7 @@ END(casuword) str r0, [r3, #PCB_ONFAULT] mvn r0, #0x00000000 ldmfd sp!, {r4, r5} - RET + RET /* * fuword(caddr_t uaddr); diff --git a/sys/arm/arm/gic.c b/sys/arm/arm/gic.c index 45fb903e25af..6fcb7e082215 100644 --- a/sys/arm/arm/gic.c +++ b/sys/arm/arm/gic.c @@ -197,8 +197,8 @@ gic_decode_fdt(uint32_t iparent, uint32_t *intr, int *interrupt, static u_int num_intr_cells; if (num_intr_cells == 0) { - if (OF_searchencprop(OF_node_from_xref(iparent), - "#interrupt-cells", &num_intr_cells, + if (OF_searchencprop(OF_node_from_xref(iparent), + "#interrupt-cells", &num_intr_cells, sizeof(num_intr_cells)) == -1) { num_intr_cells = 1; } diff --git a/sys/arm/arm/intr.c b/sys/arm/arm/intr.c index be8e87c656f0..7ab87cc784eb 100644 --- a/sys/arm/arm/intr.c +++ b/sys/arm/arm/intr.c @@ -78,7 +78,7 @@ int (*arm_config_irq)(int irq, enum intr_trigger trig, /* Data for statistics reporting. */ u_long intrcnt[NIRQ]; -char intrnames[NIRQ * INTRNAME_LEN]; +char intrnames[(NIRQ * INTRNAME_LEN) + 1]; size_t sintrcnt = sizeof(intrcnt); size_t sintrnames = sizeof(intrnames); @@ -149,7 +149,7 @@ arm_setup_irqhandler(const char *name, driver_filter_t *filt, if (error) return; intr_events[irq] = event; - snprintf(&intrnames[irq * INTRNAME_LEN], INTRNAME_LEN, + snprintf(&intrnames[irq * INTRNAME_LEN], INTRNAME_LEN, "irq%d: %-*s", irq, INTRNAME_LEN - 1, name); } intr_event_add_handler(event, name, filt, hand, arg, @@ -164,7 +164,7 @@ arm_remove_irqhandler(int irq, void *cookie) event = intr_events[irq]; arm_mask_irq(irq); - + error = intr_event_remove_handler(cookie); if (!TAILQ_EMPTY(&event->ie_handlers)) diff --git a/sys/arm/arm/machdep.c b/sys/arm/arm/machdep.c index 3ef156b7c082..985ca0cd6f1e 100644 --- a/sys/arm/arm/machdep.c +++ b/sys/arm/arm/machdep.c @@ -59,6 +59,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include #include #include @@ -71,6 +72,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include #include #include @@ -87,6 +89,7 @@ __FBSDID("$FreeBSD$"); #include #include +#include #include #include #include @@ -244,7 +247,7 @@ void board_set_serial(uint64_t serial) { - snprintf(board_serial, sizeof(board_serial)-1, + snprintf(board_serial, sizeof(board_serial)-1, "%016jx", serial); } @@ -296,7 +299,7 @@ sendsig(catcher, ksi, mask) /* make room on the stack */ fp--; - + /* make the stack aligned */ fp = (struct sigframe *)STACKALIGN(fp); /* Populate the siginfo frame. */ @@ -317,17 +320,13 @@ sendsig(catcher, ksi, mask) sigexit(td, SIGILL); } - /* Translate the signal if appropriate. */ - if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) - sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; - /* * Build context to run handler in. We invoke the handler * directly, only returning via the trampoline. Note the * trampoline version numbers are coordinated with machine- * dependent code in libc. */ - + tf->tf_r0 = sig; tf->tf_r1 = (register_t)&fp->sf_si; tf->tf_r2 = (register_t)&fp->sf_uc; @@ -337,6 +336,13 @@ sendsig(catcher, ksi, mask) tf->tf_pc = (register_t)catcher; tf->tf_usr_sp = (register_t)fp; tf->tf_usr_lr = (register_t)(PS_STRINGS - *(p->p_sysent->sv_szsigcode)); + /* Set the mode to enter in the signal handler */ +#if __ARM_ARCH >= 7 + if ((register_t)catcher & 1) + tf->tf_spsr |= PSR_T; + else + tf->tf_spsr &= ~PSR_T; +#endif CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr, tf->tf_usr_sp); @@ -422,7 +428,7 @@ cpu_startup(void *dummy) /* * Display the RAM layout. */ - printf("real memory = %ju (%ju MB)\n", + printf("real memory = %ju (%ju MB)\n", (uintmax_t)arm32_ptob(realmem), (uintmax_t)arm32_ptob(realmem) / mbyte); printf("avail memory = %ju (%ju MB)\n", @@ -484,7 +490,7 @@ cpu_est_clockrate(int cpu_id, uint64_t *rate) void cpu_idle(int busy) { - + CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", busy, curcpu); spinlock_enter(); #ifndef NO_EVENTTIMERS @@ -554,14 +560,14 @@ int set_regs(struct thread *td, struct reg *regs) { struct trapframe *tf = td->td_frame; - + bcopy(regs->r, &tf->tf_r0, sizeof(regs->r)); tf->tf_usr_sp = regs->r_sp; tf->tf_usr_lr = regs->r_lr; tf->tf_pc = regs->r_pc; tf->tf_spsr &= ~PSR_FLAGS; tf->tf_spsr |= regs->r_cpsr & PSR_FLAGS; - return (0); + return (0); } int @@ -625,7 +631,11 @@ ptrace_single_step(struct thread *td) { struct proc *p; int error; - + + /* TODO: This needs to be updated for Thumb-2 */ + if ((td->td_frame->tf_spsr & PSR_T) != 0) + return (EINVAL); + KASSERT(td->td_md.md_ptrace_instr == 0, ("Didn't clear single step")); p = td->td_proc; @@ -649,6 +659,10 @@ ptrace_clear_single_step(struct thread *td) { struct proc *p; + /* TODO: This needs to be updated for Thumb-2 */ + if ((td->td_frame->tf_spsr & PSR_T) != 0) + return (EINVAL); + if (td->td_md.md_ptrace_instr) { p = td->td_proc; PROC_UNLOCK(p); @@ -796,7 +810,7 @@ sys_sigreturn(td, uap) { ucontext_t uc; int spsr; - + if (uap == NULL) return (EFAULT); if (copyin(uap->sigcntxp, &uc, sizeof(uc))) @@ -1003,7 +1017,6 @@ freebsd_parse_boot_param(struct arm_boot_params *abp) ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t); db_fetch_ksymtab(ksym_start, ksym_end); #endif - preload_addr_relocate = KERNVIRTADDR - abp->abp_physaddr; return lastaddr; } #endif @@ -1087,6 +1100,113 @@ set_stackptrs(int cpu) } #endif +#ifdef EFI +#define efi_next_descriptor(ptr, size) \ + ((struct efi_md *)(((uint8_t *) ptr) + size)) + +static void +add_efi_map_entries(struct efi_map_header *efihdr, struct mem_region *mr, + int *mrcnt, uint32_t *memsize) +{ + struct efi_md *map, *p; + const char *type; + size_t efisz, memory_size; + int ndesc, i, j; + + static const char *types[] = { + "Reserved", + "LoaderCode", + "LoaderData", + "BootServicesCode", + "BootServicesData", + "RuntimeServicesCode", + "RuntimeServicesData", + "ConventionalMemory", + "UnusableMemory", + "ACPIReclaimMemory", + "ACPIMemoryNVS", + "MemoryMappedIO", + "MemoryMappedIOPortSpace", + "PalCode" + }; + + *mrcnt = 0; + *memsize = 0; + + /* + * Memory map data provided by UEFI via the GetMemoryMap + * Boot Services API. + */ + efisz = roundup2(sizeof(struct efi_map_header), 0x10); + map = (struct efi_md *)((uint8_t *)efihdr + efisz); + + if (efihdr->descriptor_size == 0) + return; + ndesc = efihdr->memory_size / efihdr->descriptor_size; + + if (boothowto & RB_VERBOSE) + printf("%23s %12s %12s %8s %4s\n", + "Type", "Physical", "Virtual", "#Pages", "Attr"); + + memory_size = 0; + for (i = 0, j = 0, p = map; i < ndesc; i++, + p = efi_next_descriptor(p, efihdr->descriptor_size)) { + if (boothowto & RB_VERBOSE) { + if (p->md_type <= EFI_MD_TYPE_PALCODE) + type = types[p->md_type]; + else + type = ""; + printf("%23s %012llx %12p %08llx ", type, p->md_phys, + p->md_virt, p->md_pages); + if (p->md_attr & EFI_MD_ATTR_UC) + printf("UC "); + if (p->md_attr & EFI_MD_ATTR_WC) + printf("WC "); + if (p->md_attr & EFI_MD_ATTR_WT) + printf("WT "); + if (p->md_attr & EFI_MD_ATTR_WB) + printf("WB "); + if (p->md_attr & EFI_MD_ATTR_UCE) + printf("UCE "); + if (p->md_attr & EFI_MD_ATTR_WP) + printf("WP "); + if (p->md_attr & EFI_MD_ATTR_RP) + printf("RP "); + if (p->md_attr & EFI_MD_ATTR_XP) + printf("XP "); + if (p->md_attr & EFI_MD_ATTR_RT) + printf("RUNTIME"); + printf("\n"); + } + + switch (p->md_type) { + case EFI_MD_TYPE_CODE: + case EFI_MD_TYPE_DATA: + case EFI_MD_TYPE_BS_CODE: + case EFI_MD_TYPE_BS_DATA: + case EFI_MD_TYPE_FREE: + /* + * We're allowed to use any entry with these types. + */ + break; + default: + continue; + } + + j++; + if (j >= FDT_MEM_REGIONS) + break; + + mr[j].mr_start = p->md_phys; + mr[j].mr_size = p->md_pages * PAGE_SIZE; + memory_size += mr[j].mr_size; + } + + *mrcnt = j; + *memsize = memory_size; +} +#endif /* EFI */ + #ifdef FDT static char * kenv_next(char *cp) @@ -1171,7 +1291,7 @@ initarm(struct arm_boot_params *abp) /* Grab reserved memory regions information from device tree. */ if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0) - arm_physmem_exclude_regions(mem_regions, mem_regions_sz, + arm_physmem_exclude_regions(mem_regions, mem_regions_sz, EXFLAG_NODUMP | EXFLAG_NOALLOC); /* Platform-specific initialisation */ @@ -1377,7 +1497,7 @@ initarm(struct arm_boot_params *abp) * * Prepare the list of physical memory available to the vm subsystem. */ - arm_physmem_exclude_region(abp->abp_physaddr, + arm_physmem_exclude_region(abp->abp_physaddr, (virtual_avail - KERNVIRTADDR), EXFLAG_NOALLOC); arm_physmem_init_kernel_globals(); @@ -1398,6 +1518,9 @@ initarm(struct arm_boot_params *abp) char *env; void *kmdp; int err_devmap, mem_regions_sz; +#ifdef EFI + struct efi_map_header *efihdr; +#endif /* get last allocated physical address */ arm_physmem_kernaddr = abp->abp_physaddr; @@ -1430,9 +1553,20 @@ initarm(struct arm_boot_params *abp) if (OF_init((void *)dtbp) != 0) panic("OF_init failed with the found device tree"); - /* Grab physical memory regions information from device tree. */ - if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, &memsize) != 0) - panic("Cannot get physical memory regions"); +#ifdef EFI + efihdr = (struct efi_map_header *)preload_search_info(kmdp, + MODINFO_METADATA | MODINFOMD_EFI_MAP); + if (efihdr != NULL) { + add_efi_map_entries(efihdr, mem_regions, &mem_regions_sz, + &memsize); + } else +#endif + { + /* Grab physical memory regions information from device tree. */ + if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, + &memsize) != 0) + panic("Cannot get physical memory regions"); + } arm_physmem_hardware_regions(mem_regions, mem_regions_sz); /* Grab reserved memory regions information from device tree. */ diff --git a/sys/arm/arm/mp_machdep.c b/sys/arm/arm/mp_machdep.c index 55ba3559d2a6..7a77bc2c34ab 100644 --- a/sys/arm/arm/mp_machdep.c +++ b/sys/arm/arm/mp_machdep.c @@ -185,8 +185,11 @@ init_secondary(int cpu) atomic_add_rel_32(&mp_naps, 1); /* Spin until the BSP releases the APs */ - while (!aps_ready) - ; + while (!atomic_load_acq_int(&aps_ready)) { +#if __ARM_ARCH >= 7 + __asm __volatile("wfe"); +#endif + } /* Initialize curthread */ KASSERT(PCPU_GET(idlethread) != NULL, ("no idle thread")); @@ -219,7 +222,7 @@ init_secondary(int cpu) end = IPI_IRQ_START; #endif #endif - + for (int i = start; i <= end; i++) arm_unmask_irq(i); enable_interrupts(PSR_I); @@ -309,12 +312,6 @@ ipi_handler(void *arg) CTR1(KTR_SMP, "%s: IPI_TLB", __func__); cpufuncs.cf_tlb_flushID(); break; -#ifdef ARM_NEW_PMAP - case IPI_LAZYPMAP: - CTR1(KTR_SMP, "%s: IPI_LAZYPMAP", __func__); - pmap_lazyfix_action(); - break; -#endif default: panic("Unknown IPI 0x%0x on cpu %d", ipi, curcpu); } @@ -347,7 +344,7 @@ release_aps(void *dummy __unused) /* * IPI handler */ - /* + /* * Use 0xdeadbeef as the argument value for irq 0, * if we used 0, the intr code will give the trap frame * pointer instead. @@ -359,6 +356,10 @@ release_aps(void *dummy __unused) arm_unmask_irq(i); } atomic_store_rel_int(&aps_ready, 1); + /* Wake the other threads up */ +#if __ARM_ARCH >= 7 + armv7_sev(); +#endif printf("Release APs\n"); diff --git a/sys/arm/arm/mpcore_timer.c b/sys/arm/arm/mpcore_timer.c index 88060cf45ac3..fb30d38f68a1 100644 --- a/sys/arm/arm/mpcore_timer.c +++ b/sys/arm/arm/mpcore_timer.c @@ -414,7 +414,7 @@ arm_tmr_attach(device_t dev) if (!arm_tmr_freq_varies) tc_err = attach_tc(sc); else if (bootverbose) - device_printf(sc->dev, + device_printf(sc->dev, "not using variable-frequency device as timecounter"); sc->memrid++; sc->irqrid++; @@ -488,7 +488,7 @@ arm_tmr_change_frequency(uint64_t newfreq) * @usec: number of microseconds to delay by * * This function is called all over the kernel and is suppose to provide a - * consistent delay. This function may also be called before the console + * consistent delay. This function may also be called before the console * is setup so no printf's can be called here. * * RETURNS: diff --git a/sys/arm/arm/nexus.c b/sys/arm/arm/nexus.c index 06f2d6ff454f..def6c1ad3cc4 100644 --- a/sys/arm/arm/nexus.c +++ b/sys/arm/arm/nexus.c @@ -127,7 +127,7 @@ static driver_t nexus_driver = { nexus_methods, 1 /* no softc */ }; -EARLY_DRIVER_MODULE(nexus, root, nexus_driver, nexus_devclass, 0, 0, +EARLY_DRIVER_MODULE(nexus, root, nexus_driver, nexus_devclass, 0, 0, BUS_PASS_BUS + BUS_PASS_ORDER_EARLY); static int @@ -236,7 +236,7 @@ nexus_release_resource(device_t bus, device_t child, int type, int rid, struct resource *res) { int error; - + if (rman_get_flags(res) & RF_ACTIVE) { error = bus_deactivate_resource(child, type, rid, res); if (error) diff --git a/sys/arm/arm/physmem.c b/sys/arm/arm/physmem.c index bc72ce264ad5..a92216337949 100644 --- a/sys/arm/arm/physmem.c +++ b/sys/arm/arm/physmem.c @@ -62,7 +62,7 @@ static size_t hwcnt; static size_t excnt; /* - * These "avail lists" are globals used to communicate physical memory layout to + * These "avail lists" are globals used to communicate physical memory layout to * other parts of the kernel. Within the arrays, each value is the starting * address of a contiguous area of physical address space. The values at even * indexes are areas that contain usable memory and the values at odd indexes diff --git a/sys/arm/arm/pl190.c b/sys/arm/arm/pl190.c index 5e811343b413..8cd744e6c993 100644 --- a/sys/arm/arm/pl190.c +++ b/sys/arm/arm/pl190.c @@ -121,7 +121,7 @@ pl190_intc_attach(device_t dev) id = 0; for (i = 3; i >= 0; i--) { - id = (id << 8) | + id = (id << 8) | (intc_vic_read_4(VICPERIPHID + i*4) & 0xff); } @@ -129,7 +129,7 @@ pl190_intc_attach(device_t dev) id = 0; for (i = 3; i >= 0; i--) { - id = (id << 8) | + id = (id << 8) | (intc_vic_read_4(VICPRIMECELLID + i*4) & 0xff); } @@ -152,7 +152,7 @@ static driver_t pl190_intc_driver = { static devclass_t pl190_intc_devclass; -EARLY_DRIVER_MODULE(intc, simplebus, pl190_intc_driver, pl190_intc_devclass, +EARLY_DRIVER_MODULE(intc, simplebus, pl190_intc_driver, pl190_intc_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); int @@ -164,7 +164,7 @@ arm_get_next_irq(int last_irq) /* Sanity check */ if (irq < 0) irq = 0; - + pending = intc_vic_read_4(VICIRQSTATUS); while (irq < VIC_NIRQS) { if (pending & (1 << irq)) diff --git a/sys/arm/arm/pl310.c b/sys/arm/arm/pl310.c index 3305f35c80f8..2fba6a837416 100644 --- a/sys/arm/arm/pl310.c +++ b/sys/arm/arm/pl310.c @@ -50,11 +50,11 @@ __FBSDID("$FreeBSD$"); /* * Define this if you need to disable PL310 for debugging purpose - * Spec: + * Spec: * http://infocenter.arm.com/help/topic/com.arm.doc.ddi0246e/DDI0246E_l2c310_r3p1_trm.pdf */ -/* +/* * Hardcode errata for now * http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0246b/pr01s02s02.html */ @@ -137,7 +137,7 @@ pl310_set_ram_latency(struct pl310_softc *sc, uint32_t which_reg, { uint32_t v; - KASSERT(which_reg == PL310_TAG_RAM_CTRL || + KASSERT(which_reg == PL310_TAG_RAM_CTRL || which_reg == PL310_DATA_RAM_CTRL, ("bad pl310 ram latency register address")); @@ -191,7 +191,7 @@ pl310_wait_background_op(uint32_t off, uint32_t mask) /** * pl310_cache_sync - performs a cache sync operation - * + * * According to the TRM: * * "Before writing to any other register you must perform an explicit @@ -231,7 +231,7 @@ pl310_wbinv_all(void) for (i = 0; i < g_ways_assoc; i++) { for (j = 0; j < g_way_size / g_l2cache_line_size; j++) { - pl310_write4(pl310_softc, + pl310_write4(pl310_softc, PL310_CLEAN_INV_LINE_IDX, (i << 28 | j << 5)); } @@ -278,8 +278,8 @@ pl310_wbinv_range(vm_paddr_t start, vm_size_t size) while (size > 0) { #ifdef PL310_ERRATA_588369 if (pl310_softc->sc_rtl_revision <= CACHE_ID_RELEASE_r1p0) { - /* - * Errata 588369 says that clean + inv may keep the + /* + * Errata 588369 says that clean + inv may keep the * cache line if it was clean, the recommanded * workaround is to clean then invalidate the cache * line, with write-back and cache linefill disabled. @@ -402,10 +402,10 @@ pl310_config_intr(void *arg) pl310_filter, NULL, sc, &sc->sc_irq_h); /* Cache Line Eviction for Counter 0 */ - pl310_write4(sc, PL310_EVENT_COUNTER0_CONF, + pl310_write4(sc, PL310_EVENT_COUNTER0_CONF, EVENT_COUNTER_CONF_INCR | EVENT_COUNTER_CONF_CO); /* Data Read Request for Counter 1 */ - pl310_write4(sc, PL310_EVENT_COUNTER1_CONF, + pl310_write4(sc, PL310_EVENT_COUNTER1_CONF, EVENT_COUNTER_CONF_INCR | EVENT_COUNTER_CONF_DRREQ); /* Enable and clear pending interrupts */ @@ -413,9 +413,9 @@ pl310_config_intr(void *arg) pl310_write4(sc, PL310_INTR_MASK, INTR_MASK_ALL); /* Enable counters and reset C0 and C1 */ - pl310_write4(sc, PL310_EVENT_COUNTER_CTRL, - EVENT_COUNTER_CTRL_ENABLED | - EVENT_COUNTER_CTRL_C0_RESET | + pl310_write4(sc, PL310_EVENT_COUNTER_CTRL, + EVENT_COUNTER_CTRL_ENABLED | + EVENT_COUNTER_CTRL_C0_RESET | EVENT_COUNTER_CTRL_C1_RESET); config_intrhook_disestablish(sc->sc_ich); @@ -426,7 +426,7 @@ pl310_config_intr(void *arg) static int pl310_probe(device_t dev) { - + if (!ofw_bus_status_okay(dev)) return (ENXIO); if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data) @@ -444,7 +444,7 @@ pl310_attach(device_t dev) sc->sc_dev = dev; rid = 0; - sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, + sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); if (sc->sc_mem_res == NULL) panic("%s: Cannot map registers", device_get_name(dev)); @@ -501,7 +501,7 @@ pl310_attach(device_t dev) pl310_write4(pl310_softc, PL310_INV_WAY, 0xffff); pl310_wait_background_op(PL310_INV_WAY, 0xffff); platform_pl310_write_ctrl(sc, CTRL_ENABLED); - device_printf(dev, "L2 Cache enabled: %uKB/%dB %d ways\n", + device_printf(dev, "L2 Cache enabled: %uKB/%dB %d ways\n", (g_l2cache_size / 1024), g_l2cache_line_size, g_ways_assoc); if (bootverbose) pl310_print_config(sc); diff --git a/sys/arm/arm/pmap-v6-new.c b/sys/arm/arm/pmap-v6-new.c index f4042141aec6..89a806cfe757 100644 --- a/sys/arm/arm/pmap-v6-new.c +++ b/sys/arm/arm/pmap-v6-new.c @@ -2166,104 +2166,6 @@ pmap_pinit(pmap_t pmap) return (1); } -#ifdef SMP -/* - * Deal with a SMP shootdown of other users of the pmap that we are - * trying to dispose of. This can be a bit hairy. - */ -static cpuset_t *lazymask; -static ttb_entry_t lazyttb; -static volatile u_int lazywait; - -void -pmap_lazyfix_action(void) -{ - -#ifdef COUNT_IPIS - (*ipi_lazypmap_counts[PCPU_GET(cpuid)])++; -#endif - spinlock_enter(); - if (cp15_ttbr_get() == lazyttb) { - cp15_ttbr_set(curthread->td_pcb->pcb_pagedir); - } - CPU_CLR_ATOMIC(PCPU_GET(cpuid), lazymask); - atomic_store_rel_int(&lazywait, 1); - spinlock_exit(); - -} - -static void -pmap_lazyfix_self(u_int cpuid) -{ - - spinlock_enter(); - if (cp15_ttbr_get() == lazyttb) { - cp15_ttbr_set(curthread->td_pcb->pcb_pagedir); - } - CPU_CLR_ATOMIC(cpuid, lazymask); - spinlock_exit(); -} - -static void -pmap_lazyfix(pmap_t pmap) -{ - cpuset_t mymask, mask; - u_int cpuid, spins; - int lsb; - - mask = pmap->pm_active; - while (!CPU_EMPTY(&mask)) { - spins = 50000000; - - /* Find least significant set bit. */ - lsb = CPU_FFS(&mask); - MPASS(lsb != 0); - lsb--; - CPU_SETOF(lsb, &mask); - mtx_lock_spin(&smp_ipi_mtx); - - lazyttb = pmap_ttb_get(pmap); - cpuid = PCPU_GET(cpuid); - - /* Use a cpuset just for having an easy check. */ - CPU_SETOF(cpuid, &mymask); - if (!CPU_CMP(&mask, &mymask)) { - lazymask = &pmap->pm_active; - pmap_lazyfix_self(cpuid); - } else { - atomic_store_rel_int((u_int *)&lazymask, - (u_int)&pmap->pm_active); - atomic_store_rel_int(&lazywait, 0); - ipi_selected(mask, IPI_LAZYPMAP); - while (lazywait == 0) { - if (--spins == 0) - break; - } - } - mtx_unlock_spin(&smp_ipi_mtx); - if (spins == 0) - printf("%s: spun for 50000000\n", __func__); - mask = pmap->pm_active; - } -} -#else /* SMP */ -/* - * Cleaning up on uniprocessor is easy. For various reasons, we're - * unlikely to have to even execute this code, including the fact - * that the cleanup is deferred until the parent does a wait(2), which - * means that another userland process has run. - */ -static void -pmap_lazyfix(pmap_t pmap) -{ - - if (!CPU_EMPTY(&pmap->pm_active)) { - cp15_ttbr_set(curthread->td_pcb->pcb_pagedir); - CPU_ZERO(&pmap->pm_active); - } -} -#endif /* SMP */ - #ifdef INVARIANTS static boolean_t pt2tab_user_is_empty(pt2_entry_t *tab) @@ -2292,8 +2194,9 @@ pmap_release(pmap_t pmap) pmap->pm_stats.resident_count)); KASSERT(pt2tab_user_is_empty(pmap->pm_pt2tab), ("%s: has allocated user PT2(s)", __func__)); + KASSERT(CPU_EMPTY(&pmap->pm_active), + ("%s: pmap %p is active on some CPU(s)", __func__, pmap)); - pmap_lazyfix(pmap); mtx_lock_spin(&allpmaps_lock); LIST_REMOVE(pmap, pm_list); mtx_unlock_spin(&allpmaps_lock); @@ -6055,7 +5958,7 @@ pmap_kenter_device(vm_offset_t va, vm_size_t size, vm_paddr_t pa) { vm_offset_t sva; - KASSERT((size & PAGE_MASK) == 0, + KASSERT((size & PAGE_MASK) == 0, ("%s: device mapping not page-sized", __func__)); sva = va; @@ -6073,7 +5976,7 @@ pmap_kremove_device(vm_offset_t va, vm_size_t size) { vm_offset_t sva; - KASSERT((size & PAGE_MASK) == 0, + KASSERT((size & PAGE_MASK) == 0, ("%s: device mapping not page-sized", __func__)); sva = va; diff --git a/sys/arm/arm/pmap-v6.c b/sys/arm/arm/pmap-v6.c index 0e0d884c3be5..a9421aa00e57 100644 --- a/sys/arm/arm/pmap-v6.c +++ b/sys/arm/arm/pmap-v6.c @@ -1145,7 +1145,7 @@ vector_page_setprot(int prot) /* * Set referenced flag. * Vectors' page is always desired - * to be allowed to reside in TLB. + * to be allowed to reside in TLB. */ *ptep |= L2_S_REF; @@ -2221,7 +2221,7 @@ pmap_remove_pages(pmap_t pmap) vm_offset_t va; uint32_t inuse, bitmask; int allfree, bit, field, idx; - + rw_wlock(&pvh_global_lock); PMAP_LOCK(pmap); @@ -2455,7 +2455,7 @@ pmap_kenter_device(vm_offset_t va, vm_size_t size, vm_paddr_t pa) { vm_offset_t sva; - KASSERT((size & PAGE_MASK) == 0, + KASSERT((size & PAGE_MASK) == 0, ("%s: device mapping not page-sized", __func__)); sva = va; @@ -2472,7 +2472,7 @@ pmap_kremove_device(vm_offset_t va, vm_size_t size) { vm_offset_t sva; - KASSERT((size & PAGE_MASK) == 0, + KASSERT((size & PAGE_MASK) == 0, ("%s: device mapping not page-sized", __func__)); sva = va; @@ -3093,7 +3093,7 @@ pmap_enter_locked(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, if ((pve = pmap_remove_pv(om, pmap, va))) { is_exec |= PTE_BEEN_EXECD(opte); is_refd |= PTE_BEEN_REFD(opte); - + if (m && ((m->oflags & VPO_UNMANAGED))) pmap_free_pv_entry(pmap, pve); } @@ -3303,7 +3303,7 @@ pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) vm_offset_t next_bucket; vm_paddr_t pa; vm_page_t m; - + rw_wlock(&pvh_global_lock); PMAP_LOCK(pmap); while (sva < eva) { @@ -3572,7 +3572,7 @@ pmap_pv_insert_section(pmap_t pmap, vm_offset_t va, vm_paddr_t pa) pv_entry_t pv; rw_assert(&pvh_global_lock, RA_WLOCKED); - if (pv_entry_count < pv_entry_high_water && + if (pv_entry_count < pv_entry_high_water && (pv = pmap_get_pv_entry(pmap, TRUE)) != NULL) { pv->pv_va = va; pvh = pa_to_pvh(pa); @@ -3661,7 +3661,7 @@ pmap_pv_promote_section(pmap_t pmap, vm_offset_t va, vm_paddr_t pa) * Tries to create a 1MB page mapping. Returns TRUE if successful and * FALSE otherwise. Fails if (1) page is unmanageg, kernel pmap or vectors * page, (2) a mapping already exists at the specified virtual address, or - * (3) a pv entry cannot be allocated without reclaiming another pv entry. + * (3) a pv entry cannot be allocated without reclaiming another pv entry. */ static boolean_t pmap_enter_section(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot) @@ -3692,7 +3692,7 @@ pmap_enter_section(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot) " in pmap %p", va, pmap); return (FALSE); } - pa = VM_PAGE_TO_PHYS(m); + pa = VM_PAGE_TO_PHYS(m); /* * Abort this mapping if its PV entry could not be created. */ @@ -3767,7 +3767,7 @@ pmap_remove_section(pmap_t pmap, vm_offset_t sva) TAILQ_EMPTY(&pvh->pv_list)) vm_page_aflag_clear(m, PGA_WRITEABLE); } - + l2b = pmap_get_l2_bucket(pmap, sva); if (l2b != NULL) { KASSERT(l2b->l2b_occupancy == L2_PTE_NUM_TOTAL, @@ -3879,8 +3879,8 @@ pmap_promote_section(pmap_t pmap, vm_offset_t va) if (!L2_S_EXECUTABLE(firstpte)) prot &= ~VM_PROT_EXECUTE; - /* - * Examine each of the other PTEs in the specified l2_bucket. + /* + * Examine each of the other PTEs in the specified l2_bucket. * Abort if this PTE maps an unexpected 4KB physical page or * does not have identical characteristics to the first PTE. */ @@ -4000,7 +4000,7 @@ pmap_demote_section(pmap_t pmap, vm_offset_t va) /* * According to assumptions described in pmap_promote_section, * kernel is and always should be mapped using 1MB section mappings. - * What more, managed kernel pages were not to be promoted. + * What more, managed kernel pages were not to be promoted. */ KASSERT(pmap != pmap_kernel() && L1_IDX(va) != L1_IDX(vector_page), ("pmap_demote_section: forbidden section mapping")); @@ -4010,7 +4010,7 @@ pmap_demote_section(pmap_t pmap, vm_offset_t va) l1pd = *pl1pd; KASSERT((l1pd & L1_TYPE_MASK) == L1_S_PROTO, ("pmap_demote_section: not section or invalid section")); - + pa = l1pd & L1_S_FRAME; m = PHYS_TO_VM_PAGE(pa); KASSERT((m != NULL && (m->oflags & VPO_UNMANAGED) == 0), @@ -4063,7 +4063,7 @@ pmap_demote_section(pmap_t pmap, vm_offset_t va) /* * If the mapping has changed attributes, update the page table * entries. - */ + */ if ((*firstptep & L2_S_PROMOTE) != (L1_S_DEMOTE(l1pd))) pmap_fill_l2b(l2b, newpte); } @@ -4493,7 +4493,7 @@ pmap_zero_page_gen(vm_page_t m, int off, int size) { struct czpages *czp; - KASSERT(TAILQ_EMPTY(&m->md.pv_list), + KASSERT(TAILQ_EMPTY(&m->md.pv_list), ("pmap_zero_page_gen: page has mappings")); vm_paddr_t phys = VM_PAGE_TO_PHYS(m); @@ -4501,7 +4501,7 @@ pmap_zero_page_gen(vm_page_t m, int off, int size) sched_pin(); czp = &cpu_czpages[PCPU_GET(cpuid)]; mtx_lock(&czp->lock); - + /* * Hook in the page, zero it. */ @@ -4589,7 +4589,7 @@ pmap_copy_page_generic(vm_paddr_t src, vm_paddr_t dst) sched_pin(); czp = &cpu_czpages[PCPU_GET(cpuid)]; mtx_lock(&czp->lock); - + /* * Map the pages into the page hook points, copy them, and purge the * cache for the appropriate page. @@ -5338,7 +5338,7 @@ pmap_dmap_iscurrent(pmap_t pmap) void pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma) { - /* + /* * Remember the memattr in a field that gets used to set the appropriate * bits in the PTEs as mappings are established. */ diff --git a/sys/arm/arm/pmap.c b/sys/arm/arm/pmap.c index e1429a13fd0e..dfd5bcb39ef0 100644 --- a/sys/arm/arm/pmap.c +++ b/sys/arm/arm/pmap.c @@ -1005,7 +1005,7 @@ pmap_l2ptp_ctor(void *mem, int size, void *arg, int flags) l2b = pmap_get_l2_bucket(pmap_kernel(), va); ptep = &l2b->l2b_kva[l2pte_index(va)]; pte = *ptep; - + if ((pte & L2_S_CACHE_MASK) != pte_l2_s_cache_mode_pt) { /* * Page tables must have the cache-mode set to @@ -1357,7 +1357,7 @@ pmap_clearbit(struct vm_page *pg, u_int maskbits) if (!(oflags & maskbits)) { if ((maskbits & PVF_WRITE) && (pv->pv_flags & PVF_NC)) { - if (pg->md.pv_memattr != + if (pg->md.pv_memattr != VM_MEMATTR_UNCACHEABLE) { PMAP_LOCK(pm); l2b = pmap_get_l2_bucket(pm, va); @@ -1955,7 +1955,7 @@ pmap_postinit(void) pt_entry_t *ptep, pte; vm_offset_t va, eva; u_int loop, needed; - + needed = (maxproc / PMAP_DOMAINS) + ((maxproc % PMAP_DOMAINS) ? 1 : 0); needed -= 1; l1 = malloc(sizeof(*l1) * needed, M_VMPMAP, M_WAITOK); @@ -1970,7 +1970,7 @@ pmap_postinit(void) eva = va + L1_TABLE_SIZE; pl1pt = (pd_entry_t *)va; - + while (va < eva) { l2b = pmap_get_l2_bucket(pmap_kernel(), va); ptep = &l2b->l2b_kva[l2pte_index(va)]; @@ -1979,7 +1979,7 @@ pmap_postinit(void) *ptep = pte; PTE_SYNC(ptep); cpu_tlb_flushD_SE(va); - + va += PAGE_SIZE; } pmap_init_l1(l1, pl1pt); @@ -2162,11 +2162,11 @@ pmap_bootstrap(vm_offset_t firstaddr, struct pv_addr *l1pt) PDEBUG(1, printf("firstaddr = %08x, lastaddr = %08x\n", firstaddr, vm_max_kernel_address)); - + virtual_avail = firstaddr; kernel_pmap->pm_l1 = l1; kernel_l1pa = l1pt->pv_pa; - + /* * Scan the L1 translation table created by initarm() and create * the required metadata for all valid mappings found in it. @@ -2187,7 +2187,7 @@ pmap_bootstrap(vm_offset_t firstaddr, struct pv_addr *l1pt) */ pa = (vm_paddr_t)(pde & L1_C_ADDR_MASK); ptep = (pt_entry_t *)kernel_pt_lookup(pa); - + if (ptep == NULL) { panic("pmap_bootstrap: No L2 for va 0x%x, pa 0x%lx", (u_int)l1idx << L1_S_SHIFT, (long unsigned int)pa); @@ -2241,7 +2241,7 @@ pmap_bootstrap(vm_offset_t firstaddr, struct pv_addr *l1pt) } } - + /* * Ensure the primary (kernel) L1 has the correct cache mode for * a page table. Bitch if it is not correctly set. @@ -2267,7 +2267,7 @@ pmap_bootstrap(vm_offset_t firstaddr, struct pv_addr *l1pt) * Initialize the global pv list lock. */ rw_init_flags(&pvh_global_lock, "pmap pv global", RW_RECURSE); - + /* * Reserve some special page table entries/VA space for temporary * mapping of pages. @@ -2281,7 +2281,7 @@ pmap_bootstrap(vm_offset_t firstaddr, struct pv_addr *l1pt) pmap_alloc_specials(&virtual_avail, round_page(size * L2_TABLE_SIZE_REAL) / PAGE_SIZE, &pmap_kernel_l2ptp_kva, NULL); - + size = (size + (L2_BUCKET_SIZE - 1)) / L2_BUCKET_SIZE; pmap_alloc_specials(&virtual_avail, round_page(size * sizeof(struct l2_dtable)) / PAGE_SIZE, @@ -2319,7 +2319,7 @@ void pmap_release(pmap_t pmap) { struct pcb *pcb; - + pmap_idcache_wbinv_all(pmap); cpu_l2cache_wbinv_all(); pmap_tlb_flushID(pmap); @@ -2352,7 +2352,7 @@ pmap_release(pmap_t pmap) } pmap_free_l1(pmap); - + dprintf("pmap_release()\n"); } @@ -2368,7 +2368,7 @@ pmap_grow_map(vm_offset_t va, pt_entry_t cache_mode, vm_paddr_t *pap) pt_entry_t *ptep; vm_paddr_t pa; struct vm_page *pg; - + pg = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_WIRED); if (pg == NULL) return (1); @@ -2530,7 +2530,7 @@ pmap_remove_pages(pmap_t pmap) struct l2_bucket *l2b = NULL; vm_page_t m; pt_entry_t *pt; - + rw_wlock(&pvh_global_lock); PMAP_LOCK(pmap); cpu_idcache_wbinv_all(); @@ -2576,7 +2576,7 @@ pmap_kenter_supersection(vm_offset_t va, uint64_t pa, int flags) pd_entry_t pd = L1_S_PROTO | L1_S_SUPERSEC | (pa & L1_SUP_FRAME) | (((pa >> 32) & 0xf) << 20) | L1_S_PROT(PTE_KERNEL, VM_PROT_READ|VM_PROT_WRITE) | L1_S_DOM(PMAP_DOMAIN_KERNEL); - struct l1_ttable *l1; + struct l1_ttable *l1; vm_offset_t va0, va_end; KASSERT(((va | pa) & L1_SUP_OFFSET) == 0, @@ -2685,7 +2685,7 @@ pmap_kenter_internal(vm_offset_t va, vm_offset_t pa, int flags) rw_wlock(&pvh_global_lock); if (!TAILQ_EMPTY(&m->md.pv_list) || m->md.pv_kva != 0) { if ((pve = pmap_get_pv_entry()) == NULL) - panic("pmap_kenter_internal: no pv entries"); + panic("pmap_kenter_internal: no pv entries"); PMAP_LOCK(pmap_kernel()); pmap_enter_pv(m, pve, pmap_kernel(), va, PVF_WRITE | PVF_UNMAN); @@ -2716,7 +2716,7 @@ pmap_kenter_device(vm_offset_t va, vm_size_t size, vm_paddr_t pa) { vm_offset_t sva; - KASSERT((size & PAGE_MASK) == 0, + KASSERT((size & PAGE_MASK) == 0, ("%s: device mapping not page-sized", __func__)); sva = va; @@ -2733,7 +2733,7 @@ pmap_kremove_device(vm_offset_t va, vm_size_t size) { vm_offset_t sva; - KASSERT((size & PAGE_MASK) == 0, + KASSERT((size & PAGE_MASK) == 0, ("%s: device mapping not page-sized", __func__)); sva = va; @@ -2775,7 +2775,7 @@ pmap_kremove(vm_offset_t va) struct pv_entry *pve; vm_page_t m; vm_offset_t pa; - + l2b = pmap_get_l2_bucket(pmap_kernel(), va); if (!l2b) return; @@ -3287,9 +3287,9 @@ pmap_enter_locked(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, * so no need to re-do referenced emulation here. */ npte |= L2_S_PROTO; - + nflags |= PVF_REF; - + if (m && ((prot & VM_PROT_WRITE) != 0 || (m->md.pvh_attrs & PVF_MOD))) { /* @@ -3310,7 +3310,7 @@ pmap_enter_locked(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, */ npte |= L2_TYPE_INV; } - + if (prot & VM_PROT_WRITE) { npte |= L2_S_PROT_W; if (m != NULL && @@ -3326,7 +3326,7 @@ pmap_enter_locked(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, oflags = pmap_modify_pv(m, pmap, va, PVF_WRITE | PVF_EXEC | PVF_WIRED | PVF_MOD | PVF_REF, nflags); - + /* * We may need to flush the cache if we're * doing rw-ro... @@ -3544,7 +3544,7 @@ pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) pv_entry_t pv; vm_offset_t next_bucket; vm_page_t m; - + rw_wlock(&pvh_global_lock); PMAP_LOCK(pmap); while (sva < eva) { @@ -3690,7 +3690,7 @@ pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) m = PHYS_TO_VM_PAGE(pa); vm_page_hold(m); } - + } else { /* * Note that we can't rely on the validity of the L1 @@ -3717,13 +3717,13 @@ pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) case L2_TYPE_L: pa = (pte & L2_L_FRAME) | (va & L2_L_OFFSET); break; - + default: pa = (pte & L2_S_FRAME) | (va & L2_S_OFFSET); break; } if (vm_page_pa_tryrelock(pmap, pa & PG_FRAME, &paddr)) - goto retry; + goto retry; m = PHYS_TO_VM_PAGE(pa); vm_page_hold(m); } @@ -3743,12 +3743,12 @@ int pmap_pinit(pmap_t pmap) { PDEBUG(1, printf("pmap_pinit: pmap = %08x\n", (uint32_t) pmap)); - + pmap_alloc_l1(pmap); bzero(pmap->pm_l2, sizeof(pmap->pm_l2)); CPU_ZERO(&pmap->pm_active); - + TAILQ_INIT(&pmap->pm_pvlist); bzero(&pmap->pm_stats, sizeof pmap->pm_stats); pmap->pm_stats.resident_count = 1; @@ -3783,7 +3783,7 @@ static pv_entry_t pmap_get_pv_entry(void) { pv_entry_t ret_value; - + pv_entry_count++; if (pv_entry_count > pv_entry_high_water) pagedaemon_wakeup(); @@ -4310,7 +4310,13 @@ pmap_copy_page(vm_page_t src, vm_page_t dst) pmap_copy_page_func(VM_PAGE_TO_PHYS(src), VM_PAGE_TO_PHYS(dst)); } -int unmapped_buf_allowed = 1; +/* + * We have code to do unmapped I/O. However, it isn't quite right and + * causes un-page-aligned I/O to devices to fail (most notably newfs + * or fsck). We give up a little performance to not allow unmapped I/O + * to gain stability. + */ +int unmapped_buf_allowed = 0; void pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[], @@ -4347,7 +4353,7 @@ pmap_page_exists_quick(pmap_t pmap, vm_page_t m) pv_entry_t pv; int loops = 0; boolean_t rv; - + KASSERT((m->oflags & VPO_UNMANAGED) == 0, ("pmap_page_exists_quick: page %p is not managed", m)); rv = FALSE; @@ -4419,7 +4425,7 @@ pmap_is_modified(vm_page_t m) ("pmap_is_modified: page %p is not managed", m)); if (m->md.pvh_attrs & PVF_MOD) return (TRUE); - + return(FALSE); } @@ -4625,7 +4631,7 @@ pmap_link_l2pt(vm_offset_t l1pt, vm_offset_t va, struct pv_addr *l2pv) SLIST_INSERT_HEAD(&kernel_pt_list, l2pv, pv_list); - + } /* @@ -4787,7 +4793,7 @@ pmap_map_chunk(vm_offset_t l1pt, vm_offset_t va, vm_offset_t pa, void pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma) { - /* + /* * Remember the memattr in a field that gets used to set the appropriate * bits in the PTEs as mappings are established. */ diff --git a/sys/arm/arm/pmu.c b/sys/arm/arm/pmu.c index c224525335d1..1b079c0ff49c 100644 --- a/sys/arm/arm/pmu.c +++ b/sys/arm/arm/pmu.c @@ -58,13 +58,16 @@ __FBSDID("$FreeBSD$"); #include #include +#define MAX_RLEN 8 + struct pmu_softc { - struct resource *res[1]; + struct resource *res[MAX_RLEN]; device_t dev; - void *ih; + void *ih[MAX_RLEN]; }; static struct ofw_compat_data compat_data[] = { + {"arm,armv8-pmuv3", 1}, {"arm,cortex-a17-pmu", 1}, {"arm,cortex-a15-pmu", 1}, {"arm,cortex-a12-pmu", 1}, @@ -81,6 +84,13 @@ static struct ofw_compat_data compat_data[] = { static struct resource_spec pmu_spec[] = { { SYS_RES_IRQ, 0, RF_ACTIVE }, + { SYS_RES_IRQ, 1, RF_ACTIVE | RF_OPTIONAL }, + { SYS_RES_IRQ, 2, RF_ACTIVE | RF_OPTIONAL }, + { SYS_RES_IRQ, 3, RF_ACTIVE | RF_OPTIONAL }, + { SYS_RES_IRQ, 4, RF_ACTIVE | RF_OPTIONAL }, + { SYS_RES_IRQ, 5, RF_ACTIVE | RF_OPTIONAL }, + { SYS_RES_IRQ, 6, RF_ACTIVE | RF_OPTIONAL }, + { SYS_RES_IRQ, 7, RF_ACTIVE | RF_OPTIONAL }, { -1, 0 } }; @@ -119,6 +129,7 @@ pmu_attach(device_t dev) { struct pmu_softc *sc; int err; + int i; sc = device_get_softc(dev); sc->dev = dev; @@ -129,11 +140,16 @@ pmu_attach(device_t dev) } /* Setup interrupt handler */ - err = bus_setup_intr(dev, sc->res[0], INTR_MPSAFE | INTR_TYPE_MISC, - pmu_intr, NULL, NULL, &sc->ih); - if (err) { - device_printf(dev, "Unable to setup interrupt handler.\n"); - return (ENXIO); + for (i = 0; i < MAX_RLEN; i++) { + if (sc->res[i] == NULL) + break; + + err = bus_setup_intr(dev, sc->res[i], INTR_MPSAFE | INTR_TYPE_MISC, + pmu_intr, NULL, NULL, &sc->ih[i]); + if (err) { + device_printf(dev, "Unable to setup interrupt handler.\n"); + return (ENXIO); + } } return (0); diff --git a/sys/arm/arm/stdatomic.c b/sys/arm/arm/stdatomic.c index c12a4ab66d36..211f26ac75f2 100644 --- a/sys/arm/arm/stdatomic.c +++ b/sys/arm/arm/stdatomic.c @@ -31,6 +31,7 @@ __FBSDID("$FreeBSD$"); #include #include +#include #include #include @@ -66,16 +67,14 @@ do_sync(void) __asm volatile ("" : : : "memory"); } -#elif defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) +#elif __ARM_ARCH >= 7 static inline void do_sync(void) { __asm volatile ("dmb" : : : "memory"); } -#elif defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) || \ - defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6Z__) || \ - defined(__ARM_ARCH_6ZK__) +#elif __ARM_ARCH >= 6 static inline void do_sync(void) { @@ -90,14 +89,8 @@ do_sync(void) * New C11 __atomic_* API. */ -#if defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) || \ - defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6Z__) || \ - defined(__ARM_ARCH_6ZK__) || \ - defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) - -/* These systems should be supported by the compiler. */ - -#else /* __ARM_ARCH_5__ */ +/* ARMv6+ systems should be supported by the compiler. */ +#if __ARM_ARCH <= 5 /* Clang doesn't allow us to reimplement builtins without this. */ #ifdef __clang__ @@ -331,7 +324,7 @@ EMIT_ALL_OPS_N(4, uint32_t, "ldr", "str", "streq") #endif /* _KERNEL */ -#endif +#endif /* __ARM_ARCH */ #endif /* __CLANG_ATOMICS || __GNUC_ATOMICS */ @@ -365,10 +358,7 @@ EMIT_ALL_OPS_N(4, uint32_t, "ldr", "str", "streq") * Old __sync_* API. */ -#if defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) || \ - defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6Z__) || \ - defined(__ARM_ARCH_6ZK__) || \ - defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) +#if __ARM_ARCH >= 6 /* Implementations for old GCC versions, lacking support for atomics. */ @@ -686,7 +676,7 @@ __strong_reference(__sync_fetch_and_xor_2_c, __sync_fetch_and_xor_2); __strong_reference(__sync_fetch_and_xor_4_c, __sync_fetch_and_xor_4); #endif -#else /* __ARM_ARCH_5__ */ +#else /* __ARM_ARCH < 6 */ #ifdef _KERNEL @@ -881,7 +871,7 @@ __strong_reference(__sync_fetch_and_or_4_c, __sync_fetch_and_or_4); __strong_reference(__sync_fetch_and_xor_1_c, __sync_fetch_and_xor_1); __strong_reference(__sync_fetch_and_xor_2_c, __sync_fetch_and_xor_2); __strong_reference(__sync_fetch_and_xor_4_c, __sync_fetch_and_xor_4); -#endif +#endif /* __ARM_ARCH */ #endif /* _KERNEL */ diff --git a/sys/arm/arm/support.S b/sys/arm/arm/support.S index b095aed33a4f..e26ac8214ff4 100644 --- a/sys/arm/arm/support.S +++ b/sys/arm/arm/support.S @@ -430,7 +430,7 @@ EENTRY(memmove) /* blat 32 bytes at a time */ /* XXX for really big copies perhaps we should use more registers */ -.Lmemmove_floop32: +.Lmemmove_floop32: ldmia r1!, {r3, r4, r12, lr} stmia r0!, {r3, r4, r12, lr} ldmia r1!, {r3, r4, r12, lr} @@ -988,7 +988,7 @@ ENTRY(memcpy) /* blat 32 bytes at a time */ /* XXX for really big copies perhaps we should use more registers */ -.Lmemcpy_loop32: +.Lmemcpy_loop32: ldmia r1!, {r3, r4, r12, lr} stmia r0!, {r3, r4, r12, lr} ldmia r1!, {r3, r4, r12, lr} diff --git a/sys/arm/arm/swtch.S b/sys/arm/arm/swtch.S index 0a0e97ea5c16..1d7b8f3ae008 100644 --- a/sys/arm/arm/swtch.S +++ b/sys/arm/arm/swtch.S @@ -81,6 +81,7 @@ #include "assym.s" #include "opt_sched.h" +#include #include #include #include @@ -88,7 +89,7 @@ __FBSDID("$FreeBSD$"); -#if defined(_ARM_ARCH_6) && defined(SMP) +#if __ARM_ARCH >= 6 && defined(SMP) #define GET_PCPU(tmp, tmp2) \ mrc p15, 0, tmp, c0, c0, 5; \ and tmp, tmp, #0xf; \ @@ -142,7 +143,7 @@ ENTRY(cpu_throw) GET_PCPU(r7, r9) ldr r7, [r5, #(TD_PCB)] /* r7 = new thread's PCB */ - + /* Switch to lwp0 context */ ldr r9, .Lcpufuncs @@ -276,14 +277,14 @@ ENTRY(cpu_switch) ldr r9, [r1, #(TD_MD + MD_RAS_END)] str r9, [r3, #8] #else - /* - * Set new tp. No need to store the old one first, userland can't + /* + * Set new tp. No need to store the old one first, userland can't * change it directly on armv6. */ ldr r9, [r1, #(TD_MD + MD_TP)] mcr p15, 0, r9, c13, c0, 3 #endif - + /* Get the user structure for the new process in r9 */ ldr r9, [r1, #(TD_PCB)] @@ -406,7 +407,7 @@ ENTRY(cpu_switch) cmp r4, r6 beq 1b #endif - + /* XXXSCW: Safe to re-enable FIQs here */ /* rem: r9 = new PCB */ @@ -623,14 +624,6 @@ ENTRY(cpu_switch) cmp r0, r1 /* Switching to the TTB? */ beq sw0 /* same TTB, skip */ -#if 1 /* Lazy context switch */ - /* Don't switch mapping for kernel threads */ - ldr r1, =pmap_kern_ttb - ldr r1, [r1] /* r1 = kernel TTB */ - cmp r0, r1 /* Switching to kernel TTB? */ - beq sw0 /* kernel TTB, skip */ -#endif - #ifdef INVARIANTS cmp r0, #0 /* new thread? */ beq badsw4 /* no, panic */ @@ -801,7 +794,7 @@ END(cpu_switch) ENTRY(savectx) stmfd sp!, {lr} sub sp, sp, #4 - + /* Store all the registers in the thread's pcb */ add r3, r0, #(PCB_R4) stmia r3, {r4-r12, sp, lr, pc} diff --git a/sys/arm/arm/syscall.c b/sys/arm/arm/syscall.c index 9a82b595f471..061fda4fff1f 100644 --- a/sys/arm/arm/syscall.c +++ b/sys/arm/arm/syscall.c @@ -171,16 +171,7 @@ swi_handler(struct trapframe *frame) td->td_frame = frame; td->td_pticks = 0; - /* - * Make sure the program counter is correctly aligned so we - * don't take an alignment fault trying to read the opcode. - * XXX: Fix for Thumb mode - */ - if (__predict_false(((frame->tf_pc - INSN_SIZE) & 3) != 0)) { - call_trapsignal(td, SIGILL, 0); - userret(td, frame); - return; - } + /* * Enable interrupts if they were enabled before the exception. * Since all syscalls *should* come from user mode it will always diff --git a/sys/arm/arm/trap.c b/sys/arm/arm/trap.c index 0f142ce06b5b..26e7bf66b2e8 100644 --- a/sys/arm/arm/trap.c +++ b/sys/arm/arm/trap.c @@ -119,7 +119,7 @@ struct ksig { u_long code; }; struct data_abort { - int (*func)(struct trapframe *, u_int, u_int, struct thread *, + int (*func)(struct trapframe *, u_int, u_int, struct thread *, struct ksig *); const char *desc; }; @@ -763,4 +763,4 @@ badaddr_read(void *addr, size_t size, void *rptr) /* Return EFAULT if the address was invalid, else zero */ return (rv); -} \ No newline at end of file +} diff --git a/sys/arm/arm/undefined.c b/sys/arm/arm/undefined.c index 098001873f77..3b32bc351a58 100644 --- a/sys/arm/arm/undefined.c +++ b/sys/arm/arm/undefined.c @@ -86,6 +86,19 @@ __FBSDID("$FreeBSD$"); #include #endif +#define ARM_COPROC_INSN(insn) (((insn) & (1 << 27)) != 0) +#define ARM_VFP_INSN(insn) ((((insn) & 0xfe000000) == 0xf2000000) || \ + (((insn) & 0xff100000) == 0xf4000000)) +#define ARM_COPROC(insn) (((insn) >> 8) & 0xf) + +#define THUMB_32BIT_INSN(insn) ((insn) >= 0xe800) +#define THUMB_COPROC_INSN(insn) (((insn) & (3 << 26)) == (3 << 26)) +#define THUMB_COPROC_UNDEFINED(insn) (((insn) & 0x3e << 20) == 0) +#define THUMB_VFP_INSN(insn) (((insn) & (3 << 24)) == (3 << 24)) +#define THUMB_COPROC(insn) (((insn) >> 8) & 0xf) + +#define COPROC_VFP 10 + #ifdef KDTRACE_HOOKS int (*dtrace_invop_jump_addr)(struct trapframe *); #endif @@ -179,6 +192,7 @@ undefinedinstruction(struct trapframe *frame) int fault_code; int coprocessor; struct undefined_handler *uh; + int error; #ifdef VERBOSE_ARM32 int s; #endif @@ -192,6 +206,12 @@ undefinedinstruction(struct trapframe *frame) PCPU_INC(cnt.v_trap); +#if __ARM_ARCH >= 7 + if ((frame->tf_spsr & PSR_T) != 0) + frame->tf_pc -= THUMB_INSN_SIZE; + else +#endif + frame->tf_pc -= INSN_SIZE; fault_pc = frame->tf_pc; /* @@ -200,11 +220,72 @@ undefinedinstruction(struct trapframe *frame) */ td = curthread == NULL ? &thread0 : curthread; - /* - * Make sure the program counter is correctly aligned so we - * don't take an alignment fault trying to read the opcode. - */ - if (__predict_false((fault_pc & 3) != 0)) { + coprocessor = 0; + if ((frame->tf_spsr & PSR_T) == 0) { + /* + * Make sure the program counter is correctly aligned so we + * don't take an alignment fault trying to read the opcode. + */ + if (__predict_false((fault_pc & 3) != 0)) { + ksiginfo_init_trap(&ksi); + ksi.ksi_signo = SIGILL; + ksi.ksi_code = ILL_ILLADR; + ksi.ksi_addr = (u_int32_t *)(intptr_t) fault_pc; + trapsignal(td, &ksi); + userret(td, frame); + return; + } + + /* + * Should use fuword() here .. but in the interests of + * squeezing every bit of speed we will just use ReadWord(). + * We know the instruction can be read as was just executed + * so this will never fail unless the kernel is screwed up + * in which case it does not really matter does it ? + */ + + fault_instruction = *(u_int32_t *)fault_pc; + + /* Check for coprocessor instruction */ + + /* + * According to the datasheets you only need to look at bit + * 27 of the instruction to tell the difference between and + * undefined instruction and a coprocessor instruction + * following an undefined instruction trap. + */ + + if (ARM_COPROC_INSN(fault_instruction)) + coprocessor = ARM_COPROC(fault_instruction); + else { /* check for special instructions */ + if (ARM_VFP_INSN(fault_instruction)) + coprocessor = COPROC_VFP; /* vfp / simd */ + } + } else { +#if __ARM_ARCH >= 7 + fault_instruction = *(uint16_t *)fault_pc; + if (THUMB_32BIT_INSN(fault_instruction)) { + fault_instruction <<= 16; + fault_instruction |= *(uint16_t *)(fault_pc + 2); + + /* + * Is it a Coprocessor, Advanced SIMD, or + * Floating-point instruction. + */ + if (THUMB_COPROC_INSN(fault_instruction)) { + if (THUMB_COPROC_UNDEFINED(fault_instruction)) { + /* undefined insn */ + } else if (THUMB_VFP_INSN(fault_instruction)) + coprocessor = COPROC_VFP; + else + coprocessor = + THUMB_COPROC(fault_instruction); + } + } +#else + /* + * No support for Thumb-2 on this cpu + */ ksiginfo_init_trap(&ksi); ksi.ksi_signo = SIGILL; ksi.ksi_code = ILL_ILLADR; @@ -212,41 +293,8 @@ undefinedinstruction(struct trapframe *frame) trapsignal(td, &ksi); userret(td, frame); return; - } - - /* - * Should use fuword() here .. but in the interests of squeezing every - * bit of speed we will just use ReadWord(). We know the instruction - * can be read as was just executed so this will never fail unless the - * kernel is screwed up in which case it does not really matter does - * it ? - */ - - fault_instruction = *(u_int32_t *)fault_pc; - - /* Update vmmeter statistics */ -#if 0 - uvmexp.traps++; #endif - /* Check for coprocessor instruction */ - - /* - * According to the datasheets you only need to look at bit 27 of the - * instruction to tell the difference between and undefined - * instruction and a coprocessor instruction following an undefined - * instruction trap. - */ - - coprocessor = 0; - if ((fault_instruction & (1 << 27)) != 0) - coprocessor = (fault_instruction >> 8) & 0x0f; -#ifdef VFP - else { /* check for special instructions */ - if (((fault_instruction & 0xfe000000) == 0xf2000000) || - ((fault_instruction & 0xff100000) == 0xf4000000)) - coprocessor = 10; /* vfp / simd */ } -#endif /* VFP */ if ((frame->tf_spsr & PSR_MODE) == PSR_USR32_MODE) { /* @@ -264,13 +312,24 @@ undefinedinstruction(struct trapframe *frame) fault_code) == 0) break; - if (fault_code & FAULT_USER && fault_instruction == PTRACE_BREAKPOINT) { - PROC_LOCK(td->td_proc); - _PHOLD(td->td_proc); - ptrace_clear_single_step(td); - _PRELE(td->td_proc); - PROC_UNLOCK(td->td_proc); - return; + if (fault_code & FAULT_USER) { + /* TODO: No support for ptrace from Thumb-2 */ + if ((frame->tf_spsr & PSR_T) == 0 && + fault_instruction == PTRACE_BREAKPOINT) { + PROC_LOCK(td->td_proc); + _PHOLD(td->td_proc); + error = ptrace_clear_single_step(td); + _PRELE(td->td_proc); + PROC_UNLOCK(td->td_proc); + if (error != 0) { + ksiginfo_init_trap(&ksi); + ksi.ksi_signo = SIGILL; + ksi.ksi_code = ILL_ILLOPC; + ksi.ksi_addr = (u_int32_t *)(intptr_t) fault_pc; + trapsignal(td, &ksi); + } + return; + } } if (uh == NULL && (fault_code & FAULT_USER)) { diff --git a/sys/arm/arm/vfp.c b/sys/arm/arm/vfp.c index 38aff98ad1cc..cd2c14ff5df2 100644 --- a/sys/arm/arm/vfp.c +++ b/sys/arm/arm/vfp.c @@ -107,7 +107,7 @@ vfp_init(void) coproc = get_coprocessorACR(); coproc |= COPROC10 | COPROC11; set_coprocessorACR(coproc); - + fpsid = fmrx(fpsid); /* read the vfp system id */ fpexc = fmrx(fpexc); /* read the vfp exception reg */ diff --git a/sys/arm/arm/vm_machdep.c b/sys/arm/arm/vm_machdep.c index 2ab58ea58df7..f38d708bc41a 100644 --- a/sys/arm/arm/vm_machdep.c +++ b/sys/arm/arm/vm_machdep.c @@ -72,6 +72,7 @@ __FBSDID("$FreeBSD$"); #include #include +#include #include #include @@ -107,10 +108,10 @@ cpu_fork(register struct thread *td1, register struct proc *p2, #endif #endif td2->td_pcb = pcb2; - + /* Clone td1's pcb */ bcopy(td1->td_pcb, pcb2, sizeof(*pcb2)); - + /* Point to mdproc and then copy over td1's contents */ mdp2 = &p2->p_md; bcopy(&td1->td_proc->p_md, mdp2, sizeof(*mdp2)); @@ -132,7 +133,7 @@ cpu_fork(register struct thread *td1, register struct proc *p2, pcb2->pcb_vfpcpu = -1; pcb2->pcb_vfpstate.fpscr = VFPSCR_DN | VFPSCR_FZ; - + tf = td2->td_frame; tf->tf_spsr &= ~PSR_C; tf->tf_r0 = 0; @@ -148,7 +149,7 @@ cpu_fork(register struct thread *td1, register struct proc *p2, td2->td_md.md_tp = td1->td_md.md_tp; #endif } - + void cpu_thread_swapin(struct thread *td) { @@ -204,7 +205,12 @@ cpu_set_syscall_retval(struct thread *td, int error) /* * Reconstruct the pc to point at the swi. */ - frame->tf_pc -= INSN_SIZE; +#if __ARM_ARCH >= 7 + if ((frame->tf_spsr & PSR_T) != 0) + frame->tf_pc -= THUMB_INSN_SIZE; + else +#endif + frame->tf_pc -= INSN_SIZE; break; case EJUSTRETURN: /* nothing to do */ @@ -330,7 +336,7 @@ cpu_set_fork_handler(struct thread *td, void (*func)(void *), void *arg) void swi_vm(void *dummy) { - + if (busdma_swi_pending) busdma_swi(); } diff --git a/sys/arm/at91/at91_pio.c b/sys/arm/at91/at91_pio.c index ff36097161e7..0de46c5b9ff1 100644 --- a/sys/arm/at91/at91_pio.c +++ b/sys/arm/at91/at91_pio.c @@ -646,5 +646,9 @@ static driver_t at91_pio_driver = { sizeof(struct at91_pio_softc), }; +#ifdef FDT EARLY_DRIVER_MODULE(at91_pio, at91_pinctrl, at91_pio_driver, at91_pio_devclass, NULL, NULL, BUS_PASS_INTERRUPT); +#else +DRIVER_MODULE(at91_pio, atmelarm, at91_pio_driver, at91_pio_devclass, NULL, NULL); +#endif diff --git a/sys/arm/broadcom/bcm2835/bcm2835_sdhci.c b/sys/arm/broadcom/bcm2835/bcm2835_sdhci.c index e950ec6913b3..33204badd0bf 100644 --- a/sys/arm/broadcom/bcm2835/bcm2835_sdhci.c +++ b/sys/arm/broadcom/bcm2835/bcm2835_sdhci.c @@ -76,23 +76,13 @@ TUNABLE_INT("hw.bcm2835.sdhci.pio_mode", &bcm2835_sdhci_pio_mode); struct bcm_sdhci_softc { device_t sc_dev; - struct mtx sc_mtx; struct resource * sc_mem_res; struct resource * sc_irq_res; bus_space_tag_t sc_bst; bus_space_handle_t sc_bsh; void * sc_intrhand; struct mmc_request * sc_req; - struct mmc_data * sc_data; - uint32_t sc_flags; -#define LPC_SD_FLAGS_IGNORECRC (1 << 0) - int sc_xfer_direction; -#define DIRECTION_READ 0 -#define DIRECTION_WRITE 1 - int sc_xfer_done; - int sc_bus_busy; struct sdhci_slot sc_slot; - int sc_dma_inuse; int sc_dma_ch; bus_dma_tag_t sc_dma_tag; bus_dmamap_t sc_dma_map; @@ -113,11 +103,6 @@ static void bcm_sdhci_intr(void *); static int bcm_sdhci_get_ro(device_t, device_t); static void bcm_sdhci_dma_intr(int ch, void *arg); -#define bcm_sdhci_lock(_sc) \ - mtx_lock(&_sc->sc_mtx); -#define bcm_sdhci_unlock(_sc) \ - mtx_unlock(&_sc->sc_mtx); - static void bcm_sdhci_dmacb(void *arg, bus_dma_segment_t *segs, int nseg, int err) { @@ -187,8 +172,6 @@ bcm_sdhci_attach(device_t dev) if (bootverbose) device_printf(dev, "SDHCI frequency: %dMHz\n", default_freq); - mtx_init(&sc->sc_mtx, "bcm sdhci", "sdhci", MTX_DEF); - rid = 0; sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); @@ -277,7 +260,6 @@ bcm_sdhci_attach(device_t dev) bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res); if (sc->sc_mem_res) bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); - mtx_destroy(&sc->sc_mtx); return (err); } diff --git a/sys/arm/broadcom/bcm2835/bcm2836_mp.c b/sys/arm/broadcom/bcm2835/bcm2836_mp.c index 177f41ec6ed9..717f24208cf2 100644 --- a/sys/arm/broadcom/bcm2835/bcm2836_mp.c +++ b/sys/arm/broadcom/bcm2835/bcm2836_mp.c @@ -123,6 +123,8 @@ platform_mp_start_ap(void) BSWR4(MBOX3CLR_CORE(i), 0xffffffff); } wmb(); + cpu_idcache_wbinv_all(); + cpu_l2cache_wbinv_all(); /* boot secondary CPUs */ for (i = 1; i < mp_ncpus; i++) { @@ -152,9 +154,6 @@ platform_mp_start_ap(void) /* recode AP in CPU map */ CPU_SET(i, &all_cpus); } - - cpu_idcache_wbinv_all(); - cpu_l2cache_wbinv_all(); } void diff --git a/sys/arm/conf/ALPINE b/sys/arm/conf/ALPINE new file mode 100644 index 000000000000..075cc1ff16a2 --- /dev/null +++ b/sys/arm/conf/ALPINE @@ -0,0 +1,78 @@ +# Kernel configuration for Alpine Board. +# +# For more information on this file, please read the config(5) manual page, +# and/or the handbook section on Kernel Configuration Files: +# +# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html +# +# The handbook is also available locally in /usr/share/doc/handbook +# if you've installed the doc distribution, otherwise always see the +# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the +# latest information. +# +# An exhaustive list of options and more detailed explanations of the +# device lines is also present in the ../../conf/NOTES and NOTES files. +# If you are in doubt as to the purpose or necessity of a line, check first +# in NOTES. +# +# $FreeBSD$ + +ident ALPINE + +include "std.armv6" +include "../annapurna/alpine/std.alpine" + +makeoptions MODULES_OVERRIDE="" +makeoptions WERROR="-Werror" + +options HZ=100 +options SCHED_4BSD # 4BSD scheduler +options SMP # Enable multiple cores + +# Debugging +makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols +options ALT_BREAK_TO_DEBUGGER +options KDB +options DDB #Enable the kernel debugger + +# Interrupt controller +device gic + +# Pseudo devices +device loop +device random +device pty +device md +device gpio + +# ATA controllers +device ahci # AHCI-compatible SATA controllers +device ata # Legacy ATA/SATA controllers +options ATA_STATIC_ID # Static device numbering + +# ATA/SCSI peripherals +device scbus # SCSI bus (required for ATA/SCSI) +device ch # SCSI media changers +device da # Direct Access (disks) +device sa # Sequential Access (tape etc) +device cd # CD +device pass # Passthrough device (direct ATA/SCSI access) +device ses # Enclosure Services (SES and SAF-TE) +#device ctl # CAM Target Layer + +# Serial ports +device uart + +# Ethernet +device ether +device mii +device bpf +options DEVICE_POLLING + +# USB ethernet support, requires miibus +device miibus + +#FDT +options FDT +options FDT_DTB_STATIC +makeoptions FDT_DTS_FILE=annapurna-alpine.dts diff --git a/sys/arm/conf/AML8726 b/sys/arm/conf/AML8726 index 125a53dba708..693dae522795 100644 --- a/sys/arm/conf/AML8726 +++ b/sys/arm/conf/AML8726 @@ -27,7 +27,6 @@ options HZ=100 options SCHED_ULE # ULE scheduler options PRINTF_BUFR_SIZE=128 # Prevent printf output being interspersed. options LINUX_BOOT_ABI -options SMP # Enable multiple cores # Debugging makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols @@ -52,6 +51,9 @@ options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed #options BOOTP_NFSV3 #options BOOTP_WIRED_TO=axe0 +# Interrupt controller +device aml_pic + # MMC/SD/SDIO Card slot support device mmc # mmc/sd bus device mmcsd # mmc/sd flash cards diff --git a/sys/arm/conf/BEAGLEBONE b/sys/arm/conf/BEAGLEBONE index 97e2d3d2c1f7..38c6b4a6b9a9 100644 --- a/sys/arm/conf/BEAGLEBONE +++ b/sys/arm/conf/BEAGLEBONE @@ -40,7 +40,7 @@ options PLATFORM # Debugging for use in -current makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols -options BREAK_TO_DEBUGGER +options ALT_BREAK_TO_DEBUGGER #options VERBOSE_SYSINIT # Enable verbose sysinit messages options KDB # Enable kernel debugger support # For minimum debugger support (stable branch) use: @@ -133,5 +133,8 @@ device axe # ASIX Electronics USB Ethernet device usb_template # Control of the gadget device usfs +# Pinmux +device fdt_pinctrl + # Flattened Device Tree options FDT # Configure using FDT/DTB data diff --git a/sys/arm/conf/BWCT b/sys/arm/conf/BWCT index a6f8e4991ae5..a539923efd39 100644 --- a/sys/arm/conf/BWCT +++ b/sys/arm/conf/BWCT @@ -31,10 +31,6 @@ hints "BWCT.hints" makeoptions MODULES_OVERRIDE="" #makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols -options DDB -options KDB -options BREAK_TO_DEBUGGER -options ALT_BREAK_TO_DEBUGGER options SCHED_4BSD # 4BSD scheduler options INET # InterNETworking @@ -45,43 +41,27 @@ options SOFTUPDATES # Enable FFS soft updates support #options UFS_DIRHASH # Improve performance on big directories #options MD_ROOT # MD is a potential root device #options MD_ROOT_SIZE=4096 # 4MB ram disk -#options ROOTDEVNAME=\"ufs:md0\" -#options ROOTDEVNAME=\"ufs:/dev/mmcsd0s1a\" options NFSCL # Network Filesystem Client #options NFSD # Network Filesystem Server #options NFSLOCKD # Network Lock Manager options NFS_ROOT # NFS usable as /, requires NFSCL -options BOOTP_NFSROOT -options BOOTP - -options GEOM_PART_BSD # BSD partition scheme -options GEOM_PART_MBR # MBR partition scheme options TMPFS # Efficient memory filesystem #options MSDOSFS # MSDOS Filesystem #options CD9660 # ISO 9660 Filesystem #options PROCFS # Process filesystem (requires PSEUDOFS) options PSEUDOFS # Pseudo-filesystem framework +options GEOM_PART_BSD # BSD partition scheme +options GEOM_PART_MBR # MBR partition scheme #options SCSI_DELAY=5000 # Delay (in ms) before probing SCSI #options KTRACE # ktrace(1) support options SYSVSHM # SYSV-style shared memory options SYSVMSG # SYSV-style message queues options SYSVSEM # SYSV-style semaphores -options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions -#options NO_SYSCTL_DESCR -options MUTEX_NOINLINE -options RWLOCK_NOINLINE -options NO_FFS_SNAPSHOT -options NO_SWAPPING -device loop -device random -device ether -device vlan -device uart -device ate -device mii -device rlswitch +options _KPOSIX_PRIORITY_SCHEDULING #POSIX P1003_1B real-time extensions # Debugging for use in -current +options KDB # Enable kernel debugger support +options DDB # Enable the kernel debugger #options DEADLKRES # Enable the deadlock resolver #options INVARIANTS # Enable calls of extra sanity checking #options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS @@ -89,27 +69,64 @@ device rlswitch #options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed #options DIAGNOSTIC -device md -device at91_twi # TWI: Two Wire Interface -device at91_spi # SPI: -device at91_ssc -device at91_mci -device mmc # mmc/sd bus -device mmcsd # mmc/sd flash cards -# iic -device iic -device iicbus +options BOOTP +options BOOTP_NFSROOT + +#options ROOTDEVNAME=\"ufs:md0\" +#options ROOTDEVNAME=\"ufs:/dev/mmcsd0s1a\" + +# kernel/memory size reduction +options MUTEX_NOINLINE +options NO_FFS_SNAPSHOT +options NO_SWAPPING +#options NO_SYSCTL_DESCR +options RWLOCK_NOINLINE + +# The `bpf' device enables the Berkeley Packet Filter. +# Be aware of the administrative consequences of enabling this! +# Note that 'bpf' is required for DHCP. +device bpf # Berkeley packet filter + +# Ethernet +device mii # Minimal MII support +device ate # Atmel AT91 Ethernet driver +device rlswitch + +# I2C +device at91_twi # Atmel AT91 Two-wire Interface +device iic # I2C generic I/O device driver +device iicbus # I2C bus system device ds1672 # DS1672 on I2C bus #device iicsmb # smb over i2c bridge #device smbus # Bus support, required for smb below. #device smb -# SPI bus -device spibus -#device at45d # at45db642 and maybe others -device bpf # Berkeley packet filter +# MMC/SD +device at91_mci # Atmel AT91 Multimedia Card Interface +device mmc # MMC/SD bus +device mmcsd # MMC/SD memory card +# DataFlash +device at91_spi # Atmel AT91 Serial Peripheral Interface +device spibus # SPI bus +#device at45d # Atmel AT45D + +# Pseudo devices. +device loop # Network loopback +device random # Entropy device +device ether # Ethernet support +device vlan # 802.1Q VLAN support +device md # Memory "disks" + +# Serial (COM) ports +device uart # Multi-uart driver +options BREAK_TO_DEBUGGER +options ALT_BREAK_TO_DEBUGGER + +# USB support #options USB_DEBUG #device ohci #device usb #device umass # Disks/Mass storage - Requires scbus and da + +device at91_ssc diff --git a/sys/arm/conf/CUBIEBOARD b/sys/arm/conf/CUBIEBOARD index 26283d4381b6..c1df03aa1f09 100644 --- a/sys/arm/conf/CUBIEBOARD +++ b/sys/arm/conf/CUBIEBOARD @@ -29,7 +29,7 @@ options SCHED_4BSD # 4BSD scheduler # Debugging for use in -current makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols -options BREAK_TO_DEBUGGER +options ALT_BREAK_TO_DEBUGGER #options VERBOSE_SYSINIT # Enable verbose sysinit messages options KDB # Enable kernel debugger support # For minimum debugger support (stable branch) use: @@ -53,8 +53,8 @@ options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed options ROOTDEVNAME=\"ufs:/dev/da0s2\" # MMC/SD/SDIO Card slot support -#device mmc # mmc/sd bus -#device mmcsd # mmc/sd flash cards +device mmc # mmc/sd bus +device mmcsd # mmc/sd flash cards # ATA controllers #device ahci # AHCI-compatible SATA controllers @@ -96,8 +96,6 @@ device umass device loop device ether device mii -device smscphy -#device cpsw device bpf device emac diff --git a/sys/arm/conf/CUBIEBOARD2 b/sys/arm/conf/CUBIEBOARD2 index 45311c39930e..c8fded08a4d8 100644 --- a/sys/arm/conf/CUBIEBOARD2 +++ b/sys/arm/conf/CUBIEBOARD2 @@ -30,7 +30,7 @@ options SMP # Enable multiple cores # Debugging for use in -current makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols -options BREAK_TO_DEBUGGER +options ALT_BREAK_TO_DEBUGGER #options VERBOSE_SYSINIT # Enable verbose sysinit messages options KDB # Enable kernel debugger support # For minimum debugger support (stable branch) use: @@ -53,9 +53,12 @@ options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed # Boot device is 2nd slice on MMC/SD card options ROOTDEVNAME=\"ufs:/dev/da0s2\" +# Interrupt controller +device gic + # MMC/SD/SDIO Card slot support -#device mmc # mmc/sd bus -#device mmcsd # mmc/sd flash cards +device mmc # mmc/sd bus +device mmcsd # mmc/sd flash cards # ATA controllers #device ahci # AHCI-compatible SATA controllers @@ -97,8 +100,6 @@ device umass device loop device ether device mii -device smscphy -#device cpsw device bpf device emac diff --git a/sys/arm/conf/DB-88F6XXX b/sys/arm/conf/DB-88F6XXX index 4018bcddc8b8..ec3eff09f563 100644 --- a/sys/arm/conf/DB-88F6XXX +++ b/sys/arm/conf/DB-88F6XXX @@ -10,20 +10,42 @@ include "../mv/kirkwood/std.db88f6xxx" options SOC_MV_KIRKWOOD -#makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols makeoptions WERROR="-Werror" options SCHED_4BSD # 4BSD scheduler options INET # InterNETworking options INET6 # IPv6 communications protocols -options GEOM_PART_BSD # BSD partition scheme -options GEOM_PART_MBR # MBR partition scheme -options TMPFS # Efficient memory filesystem options FFS # Berkeley Fast Filesystem options NANDFS # NAND Filesystem options NFSCL # Network Filesystem Client options NFSLOCKD # Network Lock Manager options NFS_ROOT # NFS usable as /, requires NFSCL +options TMPFS # Efficient memory filesystem +options GEOM_PART_BSD # BSD partition scheme +options GEOM_PART_MBR # MBR partition scheme +options SYSVSHM # SYSV-style shared memory +options SYSVMSG # SYSV-style message queues +options SYSVSEM # SYSV-style semaphores +options _KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions +options MUTEX_NOINLINE +options RWLOCK_NOINLINE +options NO_FFS_SNAPSHOT +options NO_SWAPPING + +# Debugging for use in -current +#makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols +options ALT_BREAK_TO_DEBUGGER +options KDB # Enable kernel debugger support +options DDB # Enable the kernel debugger +#options DEADLKRES # Enable the deadlock resolver +#options INVARIANTS # Enable calls of extra sanity checking +#options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS +options WITNESS # Enable checks to detect deadlocks and cycles +options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed +#options WITNESS_KDB +#options DIAGNOSTIC + +# NFS root from boopt/dhcp options BOOTP options BOOTP_NFSROOT options BOOTP_NFSV3 @@ -31,27 +53,6 @@ options BOOTP_WIRED_TO=mge0 #options ROOTDEVNAME=\"ufs:/dev/da0a\" -options SYSVSHM # SYSV-style shared memory -options SYSVMSG # SYSV-style message queues -options SYSVSEM # SYSV-style semaphores -options _KPOSIX_PRIORITY_SCHEDULING # Posix P1003_1B real-time extensions -options MUTEX_NOINLINE -options RWLOCK_NOINLINE -options NO_FFS_SNAPSHOT -options NO_SWAPPING - -# Debugging -options ALT_BREAK_TO_DEBUGGER -options DDB -#options DEADLKRES # Enable the deadlock resolver -#options DIAGNOSTIC -#options INVARIANTS # Enable calls of extra sanity checking -#options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS -options KDB -options WITNESS # Enable checks to detect deadlocks and cycles -options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed -#options WITNESS_KDB - device pci # Pseudo devices @@ -93,6 +94,6 @@ device mvs device nand # Flattened Device Tree -options FDT +options FDT # Configure using FDT/DTB data options FDT_DTB_STATIC makeoptions FDT_DTS_FILE=db88f6281.dts diff --git a/sys/arm/conf/DOCKSTAR b/sys/arm/conf/DOCKSTAR index 9e739805b16a..b00b3bf29825 100644 --- a/sys/arm/conf/DOCKSTAR +++ b/sys/arm/conf/DOCKSTAR @@ -24,33 +24,53 @@ ident DOCKSTAR include "std.arm" include "../mv/kirkwood/std.db88f6xxx" -makeoptions FDT_DTS_FILE=dockstar.dts - options SOC_MV_KIRKWOOD options SCHED_4BSD # 4BSD scheduler options INET # InterNETworking options INET6 # IPv6 communications protocols -options SOFTUPDATES -options CD9660 # ISO 9660 filesystem options FFS # Berkeley Fast Filesystem -options TMPFS # Efficient memory filesystem -options MSDOSFS # MS DOS File System (FAT, FAT32) +options SOFTUPDATES # Enable FFS soft updates support +options NFSCL # Network Filesystem Client +options NFSLOCKD # Network Lock Manager +#options NFS_ROOT # NFS usable as /, requires NFSCL +options MSDOSFS # MSDOS Filesystem +options CD9660 # ISO 9660 filesystem options NULLFS # NULL filesystem +options TMPFS # Efficient memory filesystem +options GEOM_PART_GPT # GUID Partition Tables +options GEOM_PART_BSD # BSD partition scheme +options GEOM_PART_MBR # MBR partition scheme +options GEOM_LABEL # Provides labelization +options GEOM_ELI # Disk encryption options SYSVSHM # SYSV-style shared memory options SYSVMSG # SYSV-style message queues options SYSVSEM # SYSV-style semaphores -options _KPOSIX_PRIORITY_SCHEDULING # Posix P1003_1B real-time extensions -options GEOM_PART_BSD # BSD partition scheme -options GEOM_PART_MBR # MBR partition scheme -options GEOM_ELI # Disk encryption. -options GEOM_LABEL # Providers labelization. -options GEOM_PART_GPT # GPT partitioning +options _KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions -# Flattened Device Tree -device fdt -options FDT -options FDT_DTB_STATIC +# Debugging for use in -current +makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols +options ALT_BREAK_TO_DEBUGGER +options KDB # Enable kernel debugger support +options DDB # Enable the kernel debugger +options INVARIANTS # Enable calls of extra sanity checking +options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS +#options WITNESS # Enable checks to detect deadlocks and cycles +#options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed +#options WITNESS_KDB +#options DIAGNOSTIC + +# Enable these options for nfs root configured via BOOTP. +#options BOOTP +#options BOOTP_NFSROOT +#options BOOTP_NFSV3 +#options BOOTP_WIRED_TO=mge0 + +# If not using BOOTP, use something like one of these... +#options ROOTDEVNAME=\"ufs:/dev/da0a\" +options ROOTDEVNAME=\"ufs:/dev/da0s1a\" +#options ROOTDEVNAME=\"ufs:/dev/da0p10\" +#options ROOTDEVNAME=\"nfs:192.168.0.254/dreamplug\" # Misc pseudo devices device bpf # Required for DHCP @@ -138,31 +158,7 @@ options ALTQ_PRIQ # Priority Queueing options ALTQ_NOPCC # Required if the TSC is unusable #options ALTQ_DEBUG -# Debugging -makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols -options BREAK_TO_DEBUGGER -options ALT_BREAK_TO_DEBUGGER -options DDB -options KDB -#options DIAGNOSTIC -options INVARIANTS # Enable calls of extra sanity checking -options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS -#options WITNESS # Enable checks to detect deadlocks and cycles -#options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed -#options WITNESS_KDB - -# Enable these options for nfs root configured via BOOTP. -options NFSCL # Network Filesystem Client -options NFSLOCKD # Network Lock Manager -#options NFS_ROOT # NFS usable as /, requires NFSCL -#options BOOTP -#options BOOTP_NFSROOT -#options BOOTP_NFSV3 -#options BOOTP_WIRED_TO=mge0 - -# If not using BOOTP, use something like one of these... -#options ROOTDEVNAME=\"ufs:/dev/da0a\" -options ROOTDEVNAME=\"ufs:/dev/da0s1a\" -#options ROOTDEVNAME=\"ufs:/dev/da0p10\" -#options ROOTDEVNAME=\"nfs:192.168.0.254/dreamplug\" - +# Flattened Device Tree +options FDT # Configure using FDT/DTB data +options FDT_DTB_STATIC +makeoptions FDT_DTS_FILE=dockstar.dts diff --git a/sys/arm/conf/DREAMPLUG-1001 b/sys/arm/conf/DREAMPLUG-1001 index f44599e2712c..3baacaaaff4d 100644 --- a/sys/arm/conf/DREAMPLUG-1001 +++ b/sys/arm/conf/DREAMPLUG-1001 @@ -27,33 +27,53 @@ ident DREAMPLUG-1001 include "std.arm" include "../mv/kirkwood/std.db88f6xxx" -makeoptions FDT_DTS_FILE=dreamplug-1001.dts - options SOC_MV_KIRKWOOD options SCHED_4BSD # 4BSD scheduler options INET # InterNETworking options INET6 # IPv6 communications protocols -options SOFTUPDATES -options TMPFS # Efficient memory filesystem -options CD9660 # ISO 9660 filesystem options FFS # Berkeley Fast Filesystem -options MSDOSFS # MS DOS File System (FAT, FAT32) +options SOFTUPDATES # Enable FFS soft updates support +options NFSCL # Network Filesystem Client +options NFSLOCKD # Network Lock Manager +#options NFS_ROOT # NFS usable as /, requires NFSCL +options MSDOSFS # MSDOS Filesystem +options CD9660 # ISO 9660 filesystem options NULLFS # NULL filesystem +options TMPFS # Efficient memory filesystem +options GEOM_PART_GPT # GUID Partition Tables +options GEOM_PART_BSD # BSD partition scheme +options GEOM_PART_MBR # MBR partition scheme +options GEOM_LABEL # Provides labelization +options GEOM_ELI # Disk encryption options SYSVSHM # SYSV-style shared memory options SYSVMSG # SYSV-style message queues options SYSVSEM # SYSV-style semaphores -options _KPOSIX_PRIORITY_SCHEDULING # Posix P1003_1B real-time extensions -options GEOM_PART_BSD # BSD partition scheme -options GEOM_PART_MBR # MBR partition scheme -options GEOM_ELI # Disk encryption. -options GEOM_LABEL # Providers labelization. -options GEOM_PART_GPT # GPT partitioning +options _KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions -# Flattened Device Tree -device fdt -options FDT -options FDT_DTB_STATIC +# Debugging for use in -current +makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols +options ALT_BREAK_TO_DEBUGGER +options KDB # Enable kernel debugger support +options DDB # Enable the kernel debugger +options INVARIANTS # Enable calls of extra sanity checking +options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS +#options WITNESS # Enable checks to detect deadlocks and cycles +#options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed +#options WITNESS_KDB +#options DIAGNOSTIC + +# Enable these options for nfs root configured via BOOTP. +#options BOOTP +#options BOOTP_NFSROOT +#options BOOTP_NFSV3 +#options BOOTP_WIRED_TO=mge0 + +# If not using BOOTP, use something like one of these... +#options ROOTDEVNAME=\"ufs:/dev/da1a\" +options ROOTDEVNAME=\"ufs:/dev/da1s1a\" +#options ROOTDEVNAME=\"ufs:/dev/da1p10\" +#options ROOTDEVNAME=\"nfs:192.168.0.254/dreamplug\" # Misc pseudo devices device bpf # Required for DHCP @@ -146,34 +166,6 @@ options ALTQ_PRIQ # Priority Queueing options ALTQ_NOPCC # Required if the TSC is unusable #options ALTQ_DEBUG -# Debugging -makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols -options BREAK_TO_DEBUGGER -options ALT_BREAK_TO_DEBUGGER -options DDB -options KDB -#options DIAGNOSTIC -options INVARIANTS # Enable calls of extra sanity checking -options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS -#options WITNESS # Enable checks to detect deadlocks and cycles -#options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed -#options WITNESS_KDB - -# Enable these options for nfs root configured via BOOTP. -options NFSCL # Network Filesystem Client -options NFSLOCKD # Network Lock Manager -#options NFS_ROOT # NFS usable as /, requires NFSCL -#options BOOTP -#options BOOTP_NFSROOT -#options BOOTP_NFSV3 -#options BOOTP_WIRED_TO=mge0 - -# If not using BOOTP, use something like one of these... -#options ROOTDEVNAME=\"ufs:/dev/da1a\" -options ROOTDEVNAME=\"ufs:/dev/da1s1a\" -#options ROOTDEVNAME=\"ufs:/dev/da1p10\" -#options ROOTDEVNAME=\"nfs:192.168.0.254/dreamplug\" - # To use this configuration with the (rare) model 1001N (nand flash), # create a kernel config file that looks like this: # @@ -182,3 +174,7 @@ options ROOTDEVNAME=\"ufs:/dev/da1s1a\" # makeoptions FDT_DTS_FILE=dreamplug-1001N.dts # device nand +# Flattened Device Tree +options FDT # Configure using FDT/DTB data +options FDT_DTB_STATIC +makeoptions FDT_DTS_FILE=dreamplug-1001.dts diff --git a/sys/arm/conf/EB9200 b/sys/arm/conf/EB9200 index afcc530cd5ec..6625783438ff 100644 --- a/sys/arm/conf/EB9200 +++ b/sys/arm/conf/EB9200 @@ -24,8 +24,6 @@ hints "EB9200.hints" makeoptions MODULES_OVERRIDE="" makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols -options DDB -options KDB options SCHED_4BSD # 4BSD scheduler options INET # InterNETworking @@ -41,75 +39,92 @@ options NFSCL # Network Filesystem Client options NFSD # Network Filesystem Server options NFSLOCKD # Network Lock Manager options NFS_ROOT # NFS usable as /, requires NFSCL -options BOOTP_NFSROOT -options BOOTP - -options GEOM_PART_BSD # BSD partition scheme -options GEOM_PART_MBR # MBR partition scheme options TMPFS # Efficient memory filesystem #options MSDOSFS # MSDOS Filesystem #options CD9660 # ISO 9660 Filesystem #options PROCFS # Process filesystem (requires PSEUDOFS) options PSEUDOFS # Pseudo-filesystem framework +options GEOM_PART_BSD # BSD partition scheme +options GEOM_PART_MBR # MBR partition scheme #options SCSI_DELAY=5000 # Delay (in ms) before probing SCSI #options KTRACE # ktrace(1) support options SYSVSHM # SYSV-style shared memory options SYSVMSG # SYSV-style message queues options SYSVSEM # SYSV-style semaphores -options _KPOSIX_PRIORITY_SCHEDULING # Posix P1003_1B real-time extensions -#options NO_SYSCTL_DESCR -# Disable the inlining of mutex, rwlock and sx locks. These eat up a lot -# of space. -options MUTEX_NOINLINE -options RWLOCK_NOINLINE -options SX_NOINLINE -options NO_FFS_SNAPSHOT -options NO_SWAPPING -device random -device loop -device ether -device uart -device ate -device miibus -#device lxtphy - -device at91_cfata -device ata +options _KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions # Debugging for use in -current +options KDB # Enable kernel debugger support +options DDB # Enable the kernel debugger #options DEADLKRES # Enable the deadlock resolver #options INVARIANTS # Enable calls of extra sanity checking #options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS #options WITNESS # Enable checks to detect deadlocks and cycles #options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed -device md -device at91_twi # TWI: Two Wire Interface -device at91_spi # SPI: -device spibus -# MMC/SD -device at91_mci -device mmc -device mmcsd -# iic -device iic -device iicbus +# NFS root from boopt/dhcp +options BOOTP +options BOOTP_NFSROOT + +# Disable the inlining of mutex, rwlock and sx locks. These eat up a lot +# of space. +options MUTEX_NOINLINE +options SX_NOINLINE +options NO_FFS_SNAPSHOT +options NO_SWAPPING +#options NO_SYSCTL_DESCR +options RWLOCK_NOINLINE + +# The `bpf' device enables the Berkeley Packet Filter. +# Be aware of the administrative consequences of enabling this! +# Note that 'bpf' is required for DHCP. +device bpf # Berkeley packet filter + +# Ethernet +device ate # Atmel AT91 Ethernet driver +device miibus +#device lxtphy + +# I2C +device at91_twi # Atmel AT91 Two-wire Interface +device iic # I2C generic I/O device driver +device iicbus # I2C bus system device icee -device bpf -# USB support -options USB_DEBUG # enable debug msgs -device ohci # OHCI localbus->USB interface -device usb # USB Bus (required) -device umass # Disks/Mass storage - Requires scbus and da +# MMC/SD +device at91_mci # Atmel AT91 Multimedia Card Interface +device mmc # MMC/SD bus +device mmcsd # MMC/SD memory card + +device at91_spi # Atmel AT91 Serial Peripheral Interface +device spibus # SPI bus + +# Pseudo devices. +device loop # Network loopback +device random # Entropy device +device ether # Ethernet support +device md # Memory "disks" + # SCSI peripherals device scbus # SCSI bus (required for ATA/SCSI) device da # Direct Access (disks) device cd # CD device pass # Passthrough device (direct ATA/SCSI access) +# Serial (COM) ports +device uart # Multi-uart driver + +# USB support +options USB_DEBUG # enable debug msgs +device ohci # OHCI USB interface +device usb # USB Bus (required) +device umass # Disks/Mass storage - Requires scbus and da + # USB device (gadget) support #device at91_dci # Atmel's usb device #device usfs # emulate a flash #device cdce # emulate an ethernet #device usb_template # Control of the gadget + +device at91_cfata +device ata diff --git a/sys/arm/conf/EFIKA_MX b/sys/arm/conf/EFIKA_MX index dc22943ffc3a..2c4d973598e1 100644 --- a/sys/arm/conf/EFIKA_MX +++ b/sys/arm/conf/EFIKA_MX @@ -38,7 +38,7 @@ options INCLUDE_CONFIG_FILE # Include this file in kernel # Debugging for use in -current makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols -options BREAK_TO_DEBUGGER +options ALT_BREAK_TO_DEBUGGER #options VERBOSE_SYSINIT # Enable verbose sysinit messages options KDB # Enable kernel debugger support # For minimum debugger support (stable branch) use: diff --git a/sys/arm/conf/ETHERNUT5 b/sys/arm/conf/ETHERNUT5 index c91869ad7e2f..4604ff2901b0 100644 --- a/sys/arm/conf/ETHERNUT5 +++ b/sys/arm/conf/ETHERNUT5 @@ -44,13 +44,13 @@ options NFSCL # Network Filesystem Client #options NFSD # Network Filesystem Server options NFSLOCKD # Network Lock Manager options NFS_ROOT # NFS usable as /, requires NFSCL -options GEOM_PART_BSD # BSD partition scheme -options GEOM_PART_MBR # MBR partition scheme options TMPFS # Efficient memory filesystem #options MSDOSFS # MSDOS Filesystem #options CD9660 # ISO 9660 Filesystem #options PROCFS # Process filesystem (requires PSEUDOFS) #options PSEUDOFS # Pseudo-filesystem framework +options GEOM_PART_BSD # BSD partition scheme +options GEOM_PART_MBR # MBR partition scheme #options GEOM_PART_GPT # GUID Partition Tables. #options GEOM_LABEL # Provides labelization #options COMPAT_FREEBSD5 # Compatible with FreeBSD5 @@ -71,10 +71,24 @@ options PRINTF_BUFR_SIZE=128 # Prevent printf output being interspersed. #options MAC # TrustedBSD MAC Framework #options INCLUDE_CONFIG_FILE # Include this file in kernel -# required for netbooting +# Debugging support. Always need this: +#options KDB # Enable kernel debugger support. +# For minimum debugger support (stable branch) use: +#options KDB_TRACE # Print a stack trace for a panic. +# For full debugger support use this instead: +#options DDB # Enable the kernel debugger +#options GDB # Support remote GDB +#options DEADLKRES # Enable the deadlock resolver +#options INVARIANTS # Enable calls of extra sanity checking +#options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS +#options WITNESS # Enable checks to detect deadlocks and cycles +#options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed +#options MALLOC_DEBUG_MAXZONES=8 # Separate malloc(9) zones + +# NFS root from boopt/dhcp options BOOTP -options BOOTP_COMPAT options BOOTP_NFSROOT +options BOOTP_COMPAT options BOOTP_NFSV3 options BOOTP_WIRED_TO=ate0 @@ -88,20 +102,6 @@ options NO_SWAPPING options NO_SYSCTL_DESCR options RWLOCK_NOINLINE -# Debugging support. Always need this: -#options KDB # Enable kernel debugger support. -# For minimum debugger support (stable branch) use: -#options KDB_TRACE # Print a stack trace for a panic. -# For full debugger support use this instead: -#options DDB # Support DDB. -#options GDB # Support remote GDB. -#options DEADLKRES # Enable the deadlock resolver -#options INVARIANTS # Enable calls of extra sanity checking -#options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS -#options WITNESS # Enable checks to detect deadlocks and cycles -#options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed -#options MALLOC_DEBUG_MAXZONES=8 # Separate malloc(9) zones - # The `bpf' device enables the Berkeley Packet Filter. # Be aware of the administrative consequences of enabling this! # Note that 'bpf' is required for DHCP. diff --git a/sys/arm/conf/EXYNOS5.common b/sys/arm/conf/EXYNOS5.common index 0bd6ad66cb97..80c8677dafdf 100644 --- a/sys/arm/conf/EXYNOS5.common +++ b/sys/arm/conf/EXYNOS5.common @@ -58,7 +58,7 @@ options SMP # Enable multiple cores # Debugging for use in -current makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols -options BREAK_TO_DEBUGGER +options ALT_BREAK_TO_DEBUGGER #options VERBOSE_SYSINIT # Enable verbose sysinit messages options KDB # Enable kernel debugger support # For minimum debugger support (stable branch) use: @@ -85,6 +85,9 @@ device mmc # mmc/sd bus device mmcsd # mmc/sd flash cards device dwmmc +# Interrupt controller +device gic + # Pseudo devices device loop diff --git a/sys/arm/conf/HL200 b/sys/arm/conf/HL200 index 43a8148abe72..091ab3952c47 100644 --- a/sys/arm/conf/HL200 +++ b/sys/arm/conf/HL200 @@ -29,8 +29,6 @@ hints "KB920X.hints" makeoptions MODULES_OVERRIDE="" makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols -options DDB -options KDB options SCHED_4BSD # 4BSD scheduler options INET # InterNETworking @@ -41,67 +39,92 @@ options FFS # Berkeley Fast Filesystem #options UFS_DIRHASH # Improve performance on big directories #options MD_ROOT # MD is a potential root device #options MD_ROOT_SIZE=4096 # 4MB ram disk -#options ROOTDEVNAME=\"ufs:/dev/mmcsd0s1a\" options NFSCL # Network Filesystem Client #options NFSD # Network Filesystem Server #options NFSLOCKD # Network Lock Manager options NFS_ROOT # NFS usable as /, requires NFSCL -options BOOTP_NFSROOT -options BOOTP -options BOOTP_NFSV3 -options BOOTP_WIRED_TO=ate0 -options BOOTP_COMPAT - -options GEOM_PART_BSD # BSD partition scheme -options GEOM_PART_MBR # MBR partition scheme options TMPFS # Efficient memory filesystem #options MSDOSFS # MSDOS Filesystem #options CD9660 # ISO 9660 Filesystem #options PROCFS # Process filesystem (requires PSEUDOFS) options PSEUDOFS # Pseudo-filesystem framework +options GEOM_PART_BSD # BSD partition scheme +options GEOM_PART_MBR # MBR partition scheme #options SCSI_DELAY=5000 # Delay (in ms) before probing SCSI #options KTRACE # ktrace(1) support options SYSVSHM # SYSV-style shared memory options SYSVMSG # SYSV-style message queues options SYSVSEM # SYSV-style semaphores -options _KPOSIX_PRIORITY_SCHEDULING # Posix P1003_1B real-time extensions -#options NO_SYSCTL_DESCR -options MUTEX_NOINLINE -options RWLOCK_NOINLINE -options NO_FFS_SNAPSHOT -options NO_SWAPPING -device random -device loop -device ether -device uart -device ate -device mii -device lxtphy +options _KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions # Debugging for use in -current +options KDB # Enable kernel debugger support +options DDB # Enable the kernel debugger #options DEADLKRES # Enable the deadlock resolver #options INVARIANTS # Enable calls of extra sanity checking #options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS #options WITNESS # Enable checks to detect deadlocks and cycles #options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed -device md -device at91_twi # TWI: Two Wire Interface -device at91_spi # SPI: -device spibus -# MMC/SD -device at91_mci -device mmc -device mmcsd -# iic -device iic -device iicbus +options BOOTP +options BOOTP_NFSROOT +options BOOTP_COMPAT +options BOOTP_NFSV3 +options BOOTP_WIRED_TO=ate0 + +# alternatively, boot from a MMC/SD memory card +#options ROOTDEVNAME=\"ufs:/dev/mmcsd0s1a\" + +# kernel/memory size reduction +options MUTEX_NOINLINE +options NO_FFS_SNAPSHOT +options NO_SWAPPING +#options NO_SYSCTL_DESCR +options RWLOCK_NOINLINE + +# The `bpf' device enables the Berkeley Packet Filter. +# Be aware of the administrative consequences of enabling this! +# Note that 'bpf' is required for DHCP. +device bpf # Berkeley packet filter + +# Ethernet +device mii # Minimal MII support +device ate # Atmel AT91 Ethernet driver +device lxtphy + +# I2C +device at91_twi # Atmel AT91 Two-wire Interface +device iic # I2C generic I/O device driver +device iicbus # I2C bus system device icee -device bpf +# MMC/SD +device at91_mci # Atmel AT91 Multimedia Card Interface +device mmc # MMC/SD bus +device mmcsd # MMC/SD memory card + +# DataFlash +device at91_spi # Atmel AT91 Serial Peripheral Interface +device spibus # SPI bus + +# Pseudo devices. +device loop # Network loopback +device random # Entropy device +device ether # Ethernet support +device md # Memory "disks" + +# SCSI peripherals +device scbus # SCSI bus (required for ATA/SCSI) +device da # Direct Access (disks) +device cd # CD +device pass # Passthrough device (direct ATA/SCSI access) + +# Serial (COM) ports +device uart # Multi-uart driver + # USB support options USB_DEBUG # enable debug msgs -device ohci # OHCI localbus->USB interface +device ohci # OHCI USB interface device usb # USB Bus (required) #device udbp # USB Double Bulk Pipe devices device uhid # "Human Interface Devices" @@ -132,11 +155,7 @@ device rum # Ralink Technology RT2501USB wireless NICs device uath # Atheros AR5523 wireless NICs device ural # Ralink Technology RT2500USB wireless NICs device zyd # ZyDAS zd1211/zd1211b wireless NICs -# SCSI peripherals -device scbus # SCSI bus (required for ATA/SCSI) -device da # Direct Access (disks) -device cd # CD -device pass # Passthrough device (direct ATA/SCSI access) + # Wireless NIC cards device wlan # 802.11 support device wlan_wep # 802.11 WEP support diff --git a/sys/arm/conf/HL201 b/sys/arm/conf/HL201 index 2eed9d562c5e..f10723570a1e 100644 --- a/sys/arm/conf/HL201 +++ b/sys/arm/conf/HL201 @@ -27,8 +27,6 @@ include "../at91/std.hl201" makeoptions MODULES_OVERRIDE="" makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols -options DDB -options KDB options SCHED_4BSD # 4BSD scheduler options INET # InterNETworking @@ -40,62 +38,86 @@ options FFS # Berkeley Fast Filesystem #options MD_ROOT # MD is a potential root device #options MD_ROOT_SIZE=4096 # 4MB ram disk options NANDFS # NAND file system -options ROOTDEVNAME=\"ufs:/dev/mmcsd0s1a\" options NFSCL # Network Filesystem Client #options NFSD # Network Filesystem Server #options NFSLOCKD # Network Lock Manager options NFS_ROOT # NFS usable as /, requires NFSCL -#options BOOTP_NFSROOT -#options BOOTP -#options BOOTP_NFSV3 -#options BOOTP_WIRED_TO=ate0 -#options BOOTP_COMPAT - -options ALT_BREAK_TO_DEBUGGER - -options GEOM_PART_BSD # BSD partition scheme -options GEOM_PART_MBR # MBR partition scheme options TMPFS # Efficient memory filesystem #options MSDOSFS # MSDOS Filesystem #options CD9660 # ISO 9660 Filesystem #options PROCFS # Process filesystem (requires PSEUDOFS) options PSEUDOFS # Pseudo-filesystem framework +options GEOM_PART_BSD # BSD partition scheme +options GEOM_PART_MBR # MBR partition scheme #options SCSI_DELAY=5000 # Delay (in ms) before probing SCSI #options KTRACE # ktrace(1) support options SYSVSHM # SYSV-style shared memory options SYSVMSG # SYSV-style message queues options SYSVSEM # SYSV-style semaphores -options _KPOSIX_PRIORITY_SCHEDULING # Posix P1003_1B real-time extensions -options MUTEX_NOINLINE -options RWLOCK_NOINLINE -options NO_FFS_SNAPSHOT -options NO_SWAPPING -device random -device loop -device ether -device uart -device ate -device at91_wdt -device mii -device lxtphy - -# I2C -device at91_twi # Atmel AT91 Two-wire Interface -device iic # I2C generic I/O device driver -device iicbus # I2C bus system +options _KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions # Debugging for use in -current +options KDB # Enable kernel debugger support +options DDB # Enable the kernel debugger #options INVARIANTS # Enable calls of extra sanity checking #options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS #options WITNESS # Enable checks to detect deadlocks and cycles #options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed #options DIAGNOSTIC -device md -device bpf +# NFS root from boopt/dhcp +#options BOOTP +#options BOOTP_NFSROOT +#options BOOTP_COMPAT +#options BOOTP_NFSV3 +#options BOOTP_WIRED_TO=ate0 + +options ROOTDEVNAME=\"ufs:/dev/mmcsd0s1a\" + +# kernel/memory size reduction +options MUTEX_NOINLINE +options NO_FFS_SNAPSHOT +options NO_SWAPPING +options RWLOCK_NOINLINE + +# The `bpf' device enables the Berkeley Packet Filter. +# Be aware of the administrative consequences of enabling this! +# Note that 'bpf' is required for DHCP. +device bpf # Berkeley packet filter + +# Ethernet +device mii # Minimal MII support +device ate # Atmel AT91 Ethernet driver +device lxtphy + +# I2C +device at91_twi # Atmel AT91 Two-wire Interface +device iic # I2C generic I/O device driver +device iicbus # I2C bus system + +# DataFlash +device at91_spi # Atmel AT91 Serial Peripheral Interface +device spibus # SPI bus +device at45d # Atmel AT45D + +# Pseudo devices. +device loop # Network loopback +device random # Entropy device +device ether # Ethernet support +device md # Memory "disks" + +# SCSI peripherals +device scbus # SCSI bus (required for ATA/SCSI) +device da # Direct Access (disks) +device cd # CD +device pass # Passthrough device (direct ATA/SCSI access) + +# Serial (COM) ports +device uart # Multi-uart driver +options ALT_BREAK_TO_DEBUGGER # USB support -device ohci # OHCI localbus->USB interface +device ohci # OHCI USB interface device usb # USB Bus (required) #device udbp # USB Double Bulk Pipe devices device uhid # "Human Interface Devices" @@ -116,11 +138,7 @@ device miibus #device uath # Atheros AR5523 wireless NICs #device ural # Ralink Technology RT2500USB wireless NICs #device zyd # ZyDAS zd1211/zd1211b wireless NICs -# SCSI peripherals -device scbus # SCSI bus (required for ATA/SCSI) -device da # Direct Access (disks) -device cd # CD -device pass # Passthrough device (direct ATA/SCSI access) + # Wireless NIC cards #device wlan # 802.11 support #device wlan_wep # 802.11 WEP support @@ -129,15 +147,12 @@ device pass # Passthrough device (direct ATA/SCSI access) #device wlan_amrr # AMRR transmit rate control algorithm options ROOTDEVNAME=\"ufs:da0s1a\" +# watchdog +device at91_wdt # Atmel AT91 Watchdog Timer + # NAND Flash - my board as 128MB Samsung part, YMMV. device nand # NAND interface on CS3 -# SPI: Data Flash -device at91_spi # SPI: -device spibus -device at45d # at45db642 and maybe others - - # Coming soon, but not yet options FDT options FDT_DTB_STATIC diff --git a/sys/arm/conf/IMX6 b/sys/arm/conf/IMX6 index 332681ab4c3e..f670336a1151 100644 --- a/sys/arm/conf/IMX6 +++ b/sys/arm/conf/IMX6 @@ -58,6 +58,9 @@ options ALT_BREAK_TO_DEBUGGER # Use to enter debugger. # U-Boot stuff lives on slice 1, FreeBSD on slice 2. options ROOTDEVNAME=\"ufs:mmcsd0s2a\" +# Interrupt controller +device gic + # Pseudo devices. device loop # Network loopback device random # Entropy device diff --git a/sys/arm/conf/KB920X b/sys/arm/conf/KB920X index 79be31ab6151..07aa62c00e9f 100644 --- a/sys/arm/conf/KB920X +++ b/sys/arm/conf/KB920X @@ -30,8 +30,6 @@ hints "KB920X.hints" makeoptions MODULES_OVERRIDE="" makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols -options DDB -options KDB options SCHED_4BSD # 4BSD scheduler options INET # InterNETworking @@ -42,67 +40,98 @@ options FFS # Berkeley Fast Filesystem #options UFS_DIRHASH # Improve performance on big directories #options MD_ROOT # MD is a potential root device #options MD_ROOT_SIZE=4096 # 4MB ram disk -options ROOTDEVNAME=\"ufs:/dev/mmcsd0s1a\" options NFSCL # Network Filesystem Client #options NFSD # Network Filesystem Server #options NFSLOCKD # Network Lock Manager #options NFS_ROOT # NFS usable as /, requires NFSCL -#options BOOTP_NFSROOT -#options BOOTP - -options GEOM_PART_BSD # BSD partition scheme -options GEOM_PART_MBR # MBR partition scheme options TMPFS # Efficient memory filesystem #options MSDOSFS # MSDOS Filesystem #options CD9660 # ISO 9660 Filesystem #options PROCFS # Process filesystem (requires PSEUDOFS) options PSEUDOFS # Pseudo-filesystem framework +options GEOM_PART_BSD # BSD partition scheme +options GEOM_PART_MBR # MBR partition scheme #options SCSI_DELAY=5000 # Delay (in ms) before probing SCSI #options KTRACE # ktrace(1) support options SYSVSHM # SYSV-style shared memory options SYSVMSG # SYSV-style message queues options SYSVSEM # SYSV-style semaphores -options _KPOSIX_PRIORITY_SCHEDULING # Posix P1003_1B real-time extensions -#options NO_SYSCTL_DESCR -# Disable the inlining of mutex, rwlock and sx locks. These eat up a lot -# of space. -options MUTEX_NOINLINE -options RWLOCK_NOINLINE -options SX_NOINLINE -options NO_FFS_SNAPSHOT -options NO_SWAPPING -device random -device loop -device ether -device uart -device ate -device mii -device lxtphy +options _KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions # Debugging for use in -current +options KDB # Enable kernel debugger support +options DDB # Enable the kernel debugger #options DEADLKRES # Enable the deadlock resolver #options INVARIANTS # Enable calls of extra sanity checking #options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS #options WITNESS # Enable checks to detect deadlocks and cycles #options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed -device md -device at91_twi # TWI: Two Wire Interface -device at91_spi # SPI: -device spibus -# MMC/SD -device at91_mci -device mmc -device mmcsd -# iic -device iic -device iicbus +# NFS root from boopt/dhcp +#options BOOTP +#options BOOTP_NFSROOT + +# alternatively, boot from a MMC/SD memory card +options ROOTDEVNAME=\"ufs:/dev/mmcsd0s1a\" + +# kernel/memory size reduction +options MUTEX_NOINLINE +options SX_NOINLINE +options NO_FFS_SNAPSHOT +options NO_SWAPPING +#options NO_SYSCTL_DESCR +options RWLOCK_NOINLINE + +# The `bpf' device enables the Berkeley Packet Filter. +# Be aware of the administrative consequences of enabling this! +# Note that 'bpf' is required for DHCP. +device bpf # Berkeley packet filter + +# Ethernet +device mii # Minimal MII support +device ate # Atmel AT91 Ethernet driver +device lxtphy + +# I2C +device at91_twi # Atmel AT91 Two-wire Interface +device iic # I2C generic I/O device driver +device iicbus # I2C bus system device icee -device bpf +# MMC/SD +device at91_mci # Atmel AT91 Multimedia Card Interface +device mmc # MMC/SD bus +device mmcsd # MMC/SD memory card + +# DataFlash +device at91_spi # Atmel AT91 Serial Peripheral Interface +device spibus # SPI bus + +# Pseudo devices. +device loop # Network loopback +device random # Entropy device +device ether # Ethernet support +device md # Memory "disks" + +# SCSI peripherals +device scbus # SCSI bus (required for ATA/SCSI) +device da # Direct Access (disks) +device cd # CD +device pass # Passthrough device (direct ATA/SCSI access) + +# Serial (COM) ports +device uart # Multi-uart driver + +# Wireless NIC cards +device wlan # 802.11 support +device wlan_wep # 802.11 WEP support +device wlan_ccmp # 802.11 CCMP support +device wlan_tkip # 802.11 TKIP support +device wlan_amrr # AMRR transmit rate control algorithm + # USB support options USB_DEBUG # enable debug msgs -device ohci # OHCI localbus->USB interface +device ohci # OHCI USB interface device usb # USB Bus (required) #device udbp # USB Double Bulk Pipe devices device uhid # "Human Interface Devices" @@ -132,17 +161,6 @@ device rum # Ralink Technology RT2501USB wireless NICs device uath # Atheros AR5523 wireless NICs device ural # Ralink Technology RT2500USB wireless NICs device zyd # ZyDAS zd1211/zd1211b wireless NICs -# SCSI peripherals -device scbus # SCSI bus (required for ATA/SCSI) -device da # Direct Access (disks) -device cd # CD -device pass # Passthrough device (direct ATA/SCSI access) -# Wireless NIC cards -device wlan # 802.11 support -device wlan_wep # 802.11 WEP support -device wlan_ccmp # 802.11 CCMP support -device wlan_tkip # 802.11 TKIP support -device wlan_amrr # AMRR transmit rate control algorithm # USB device (gadget) support device at91_dci # Atmel's usb device diff --git a/sys/arm/conf/ODROIDC1 b/sys/arm/conf/ODROIDC1 index 7bb7b565f883..88836e3f6388 100644 --- a/sys/arm/conf/ODROIDC1 +++ b/sys/arm/conf/ODROIDC1 @@ -22,5 +22,10 @@ include "AML8726" ident ODROIDC1 +options SMP # Enable multiple cores + +# Interrupt controller +device gic + options FDT_DTB_STATIC makeoptions FDT_DTS_FILE=odroidc1.dts diff --git a/sys/arm/conf/PANDABOARD b/sys/arm/conf/PANDABOARD index 41e2900671b8..d04b81a637fa 100644 --- a/sys/arm/conf/PANDABOARD +++ b/sys/arm/conf/PANDABOARD @@ -37,7 +37,7 @@ options SMP # Enable multiple cores # Debugging for use in -current makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols -options BREAK_TO_DEBUGGER +options ALT_BREAK_TO_DEBUGGER #options VERBOSE_SYSINIT # Enable verbose sysinit messages options KDB # Enable kernel debugger support # For minimum debugger support (stable branch) use: @@ -57,6 +57,10 @@ options DDB # Enable the kernel debugger #options BOOTP_NFSV3 #options BOOTP_WIRED_TO=ue0 +device fdt_pinctrl +# Interrupt controller +device gic + # MMC/SD/SDIO Card slot support device mmc # mmc/sd bus device mmcsd # mmc/sd flash cards @@ -78,6 +82,7 @@ device pl310 # PL310 L2 cache controller # GPIO device gpio +device gpioled # The following enables MFS as root, this seems similar to an initramfs or initrd # as used in Linux. diff --git a/sys/arm/conf/QILA9G20 b/sys/arm/conf/QILA9G20 index 1d6bff91c297..5117566ac0e4 100644 --- a/sys/arm/conf/QILA9G20 +++ b/sys/arm/conf/QILA9G20 @@ -30,8 +30,6 @@ hints "QILA9G20.hints" makeoptions MODULES_OVERRIDE="" makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols -options DDB -options KDB options SCHED_4BSD # 4BSD scheduler options INET # InterNETworking @@ -46,76 +44,81 @@ options NFSCL # Network Filesystem Client #options NFSD # Network Filesystem Server #options NFSLOCKD # Network Lock Manager #options NFS_ROOT # NFS usable as /, requires NFSCL -#options BOOTP_NFSROOT -#options BOOTP -#options BOOTP_NFSV3 -#options BOOTP_WIRED_TO=ate0 -#options BOOTP_COMPAT - -options ROOTDEVNAME=\"ufs:/dev/mmcsd0s1a\" - -options ALT_BREAK_TO_DEBUGGER - -options GEOM_PART_BSD # BSD partition scheme -options GEOM_PART_MBR # MBR partition scheme options TMPFS # Efficient memory filesystem #options MSDOSFS # MSDOS Filesystem #options CD9660 # ISO 9660 Filesystem #options PROCFS # Process filesystem (requires PSEUDOFS) #options PSEUDOFS # Pseudo-filesystem framework +options GEOM_PART_BSD # BSD partition scheme +options GEOM_PART_MBR # MBR partition scheme #options SCSI_DELAY=5000 # Delay (in ms) before probing SCSI #options KTRACE # ktrace(1) support options SYSVSHM # SYSV-style shared memory options SYSVMSG # SYSV-style message queues options SYSVSEM # SYSV-style semaphores -options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions -options MUTEX_NOINLINE -options RWLOCK_NOINLINE -options NO_FFS_SNAPSHOT -options NO_SWAPPING +options _KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions # Debugging for use in -current +options KDB # Enable kernel debugger support +options DDB # Enable the kernel debugger #options INVARIANTS # Enable calls of extra sanity checking #options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS #options WITNESS # Enable checks to detect deadlocks and cycles #options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed #options DIAGNOSTIC -device random -device loop -device bpf -device ether -device md +# NFS root from boopt/dhcp +#options BOOTP +#options BOOTP_NFSROOT +#options BOOTP_COMPAT +#options BOOTP_NFSV3 +#options BOOTP_WIRED_TO=ate0 -device uart # Serial Ports +# alternatively, boot from a MMC/SD memory card +options ROOTDEVNAME=\"ufs:/dev/mmcsd0s1a\" + +# kernel/memory size reduction +options MUTEX_NOINLINE +options NO_FFS_SNAPSHOT +options NO_SWAPPING +options RWLOCK_NOINLINE + +# The `bpf' device enables the Berkeley Packet Filter. +# Be aware of the administrative consequences of enabling this! +# Note that 'bpf' is required for DHCP. +device bpf # Berkeley packet filter # Ethernet -device ate # Ethernet Driver -device mii -option AT91_ATE_USE_RMII +device mii # Minimal MII support +device ate # Atmel AT91 Ethernet driver +options AT91_ATE_USE_RMII -device at91_twi # TWI: Two Wire Interface (EEPROM) -device at91_wdt # WDT: Watchdog timer +# I2C +device at91_twi # Atmel AT91 Two-wire Interface +device iic # I2C generic I/O device driver +device iicbus # I2C bus system +device icee # NOTE: SPI DataFlash and mci/mmc/mmcsd have hardware # confilict on this card. Use one or the other. # see board_sam9g20ek.c -# SPI: Data Flash -#device at91_spi # SPI: -#device spibus -#device at45d # at45db642 and maybe others - # MMC/SD -device at91_mci -device mmc -device mmcsd -option AT91_MCI_HAS_4WIRE +device at91_mci # Atmel AT91 Multimedia Card Interface +options AT91_MCI_HAS_4WIRE +device mmc # MMC/SD bus +device mmcsd # MMC/SD memory card -# iic -device iic -device iicbus -device icee +# DataFlash +#device at91_spi # Atmel AT91 Serial Peripheral Interface +#device spibus # SPI bus +#device at45d # Atmel AT45D + +# Pseudo devices. +device loop # Network loopback +device random # Entropy device +device ether # Ethernet support +device md # Memory "disks" # SCSI peripherals device scbus # SCSI bus (required for ATA/SCSI) @@ -123,8 +126,12 @@ device da # Direct Access (disks) device cd # CD device pass # Passthrough device (direct ATA/SCSI access) +# Serial (COM) ports +device uart # Multi-uart driver +options ALT_BREAK_TO_DEBUGGER + # USB support -device ohci # OHCI localbus->USB interface +device ohci # OHCI USB interface device usb # USB Bus (required) device umass # Disks/Mass storage - Requires scbus and da device uhid # "Human Interface Devices" @@ -154,3 +161,5 @@ device udav # Davicom DM9601E USB #device wlan_tkip # 802.11 TKIP support #device wlan_amrr # AMRR transmit rate control algorithm +# watchdog +device at91_wdt # Atmel AT91 Watchdog Timer diff --git a/sys/arm/conf/RK3188 b/sys/arm/conf/RK3188 index 9afa7ab7ac59..1c9d0addce09 100644 --- a/sys/arm/conf/RK3188 +++ b/sys/arm/conf/RK3188 @@ -29,7 +29,7 @@ options SMP # Enable multiple cores # Debugging for use in -current makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols -options BREAK_TO_DEBUGGER +options ALT_BREAK_TO_DEBUGGER #options VERBOSE_SYSINIT # Enable verbose sysinit messages options KDB # Enable kernel debugger support # For minimum debugger support (stable branch) use: @@ -45,6 +45,9 @@ options DIAGNOSTIC # Root mount from MMC/SD card options ROOTDEVNAME=\"ufs:/dev/mmcsd0\" +# Interrupt controller +device gic + # MMC/SD/SDIO Card slot support device mmc # mmc/sd bus device mmcsd # mmc/sd flash cards diff --git a/sys/arm/conf/RPI-B b/sys/arm/conf/RPI-B index 9193bcae037f..db5f7678055a 100644 --- a/sys/arm/conf/RPI-B +++ b/sys/arm/conf/RPI-B @@ -30,7 +30,6 @@ options PLATFORM # Debugging for use in -current makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols -options BREAK_TO_DEBUGGER options ALT_BREAK_TO_DEBUGGER #options VERBOSE_SYSINIT # Enable verbose sysinit messages options KDB # Enable kernel debugger support diff --git a/sys/arm/conf/RPI2 b/sys/arm/conf/RPI2 index 27caac997d09..2e5b0549380c 100644 --- a/sys/arm/conf/RPI2 +++ b/sys/arm/conf/RPI2 @@ -31,7 +31,6 @@ options PLATFORM # Debugging for use in -current makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols -options BREAK_TO_DEBUGGER options ALT_BREAK_TO_DEBUGGER #options VERBOSE_SYSINIT # Enable verbose sysinit messages options KDB # Enable kernel debugger support diff --git a/sys/arm/conf/SAM9G20EK b/sys/arm/conf/SAM9G20EK index e12a143272e2..a6816ec7b1b7 100644 --- a/sys/arm/conf/SAM9G20EK +++ b/sys/arm/conf/SAM9G20EK @@ -1,4 +1,5 @@ # Kernel configuration for Atmel AT91SAM9G20EK Rev B. development card +# Many after-market boards follow its conventions. # # For more information on this file, please read the handbook section on # Kernel Configuration Files: @@ -40,8 +41,8 @@ options FFS # Berkeley Fast Filesystem #options MD_ROOT_SIZE=4096 # 4MB ram disk options NANDFS # NAND file system options NFSCL # Network Filesystem Client -#options NFSD # Network Filesystem Server -#options NFSLOCKD # Network Lock Manager +options NFSD # Network Filesystem Server +options NFSLOCKD # Network Lock Manager #options NFS_ROOT # NFS usable as /, requires NFSCL #options MSDOSFS # MSDOS Filesystem #options CD9660 # ISO 9660 Filesystem @@ -59,6 +60,7 @@ options _KPOSIX_PRIORITY_SCHEDULING # Posix P1003_1B real-time extensions # Debugging support. Always need this: options KDB # Enable kernel debugger support options DDB # Enable the kernel debugger +# Always turn these off, even in -current builds, they are too slow. #options INVARIANTS # Enable calls of extra sanity checking #options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS #options WITNESS # Enable checks to detect deadlocks and cycles @@ -72,7 +74,9 @@ options DDB # Enable the kernel debugger #options BOOTP_NFSV3 #options BOOTP_WIRED_TO=ate0 -options ROOTDEVNAME=\"ufs:/dev/mmcsd0s1a\" +# s2 because s1 is reserved for the DOS parittions sometimes needed to +# boot off SD cards on the G20 and newer chips. +options ROOTDEVNAME=\"ufs:/dev/mmcsd0s2a\" # kernel/memory size reduction options MUTEX_NOINLINE @@ -89,7 +93,7 @@ device bpf # Berkeley packet filter # Ethernet device mii # Minimal MII support device ate # Atmel AT91 Ethernet driver -option AT91_ATE_USE_RMII +options AT91_ATE_USE_RMII # I2C device at91_twi # Atmel AT91 Two-wire Interface diff --git a/sys/arm/conf/SAM9X25EK b/sys/arm/conf/SAM9X25EK index 08dc1f59a0fd..ff2e97c4a570 100644 --- a/sys/arm/conf/SAM9X25EK +++ b/sys/arm/conf/SAM9X25EK @@ -35,9 +35,6 @@ options KDB options SCHED_4BSD # 4BSD scheduler options INET # InterNETworking #options INET6 # IPv6 communications protocols -options GEOM_PART_BSD # BSD partition scheme -options GEOM_PART_MBR # MBR partition scheme -options TMPFS # Efficient memory filesystem options FFS # Berkeley Fast Filesystem #options SOFTUPDATES # Enable FFS soft updates support #options UFS_ACL # Support for access control lists @@ -48,30 +45,20 @@ options NFSCL # Network Filesystem Client #options NFSD # Network Filesystem Server #options NFSLOCKD # Network Lock Manager #options NFS_ROOT # NFS usable as /, requires NFSCL -#options BOOTP_NFSROOT -#options BOOTP -#options BOOTP_NFSV3 -#options BOOTP_WIRED_TO=ate0 -#options BOOTP_COMPAT - -options ROOTDEVNAME=\"ufs:/dev/mmcsd0s1a\" - -options ALT_BREAK_TO_DEBUGGER - +options TMPFS # Efficient memory filesystem #options MSDOSFS # MSDOS Filesystem #options CD9660 # ISO 9660 Filesystem #options PROCFS # Process filesystem (requires PSEUDOFS) #options PSEUDOFS # Pseudo-filesystem framework +options GEOM_PART_BSD # BSD partition scheme +options GEOM_PART_MBR # MBR partition scheme #options SCSI_DELAY=5000 # Delay (in ms) before probing SCSI #options KTRACE # ktrace(1) support options SYSVSHM # SYSV-style shared memory options SYSVMSG # SYSV-style message queues options SYSVSEM # SYSV-style semaphores -options _KPOSIX_PRIORITY_SCHEDULING # Posix P1003_1B real-time extensions -options MUTEX_NOINLINE -options RWLOCK_NOINLINE -options NO_FFS_SNAPSHOT -options NO_SWAPPING +options _KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions + # Debugging for use in -current #options INVARIANTS # Enable calls of extra sanity checking @@ -80,43 +67,60 @@ options NO_SWAPPING #options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed #options DIAGNOSTIC -device random -device pty -device loop -device bpf -device ether -device md +# NFS root from boopt/dhcp +#options BOOTP +#options BOOTP_NFSROOT +#options BOOTP_COMPAT +#options BOOTP_NFSV3 +#options BOOTP_WIRED_TO=ate0 -device uart # Serial Ports +# alternatively, boot from a MMC/SD memory card +options ROOTDEVNAME=\"ufs:/dev/mmcsd0s1a\" + +# kernel/memory size reduction +options MUTEX_NOINLINE +options NO_FFS_SNAPSHOT +options NO_SWAPPING +options RWLOCK_NOINLINE + +# The `bpf' device enables the Berkeley Packet Filter. +# Be aware of the administrative consequences of enabling this! +# Note that 'bpf' is required for DHCP. +device bpf # Berkeley packet filter # Ethernet -device ate # Ethernet Driver -device mii -option AT91_ATE_USE_RMII +device mii # Minimal MII support +device ate # Atmel AT91 Ethernet driver +options AT91_ATE_USE_RMII -#device at91_twi # TWI: Two Wire Interface (EEPROM) -device at91_wdt # WDT: Watchdog timer +# I2C +#device at91_twi # Atmel AT91 Two-wire Interface +device iic +device iicbus +device icee # NOTE: SPI DataFlash and mci/mmc/mmcsd have hardware # confilict on this card. Use one or the other. # see board_sam9g20ek.c -# SPI: Data Flash -#device at91_spi # SPI: -#device spibus -#device at45d # at45db642 and maybe others - # MMC/SD -device at91_mci -device mmc -device mmcsd -#option AT91_MCI_SLOT_B -option AT91_MCI_HAS_4WIRE +device at91_mci # Atmel AT91 Multimedia Card Interface +options AT91_MCI_HAS_4WIRE +#options AT91_MCI_SLOT_B +device mmc # MMC/SD bus +device mmcsd # MMC/SD memory card -# iic -device iic -device iicbus -device icee +# DataFlash +#device at91_spi # Atmel AT91 Serial Peripheral Interface +#device spibus # SPI bus +#device at45d # Atmel AT45D + +# Pseudo devices. +device loop # Network loopback +device random # Entropy device +device ether # Ethernet support +device md # Memory "disks" +device pty # SCSI peripherals device scbus # SCSI bus (required for ATA/SCSI) @@ -124,8 +128,12 @@ device da # Direct Access (disks) device cd # CD device pass # Passthrough device (direct ATA/SCSI access) +# Serial (COM) ports +device uart # Multi-uart driver +options ALT_BREAK_TO_DEBUGGER + # USB support -#device ohci # OHCI localbus->USB interface +#device ohci # OHCI USB interface #device usb # USB Bus (required) #device umass # Disks/Mass storage - Requires scbus and da #device uhid # "Human Interface Devices" @@ -155,3 +163,5 @@ device miibus #device wlan_tkip # 802.11 TKIP support #device wlan_amrr # AMRR transmit rate control algorithm +# watchdog +device at91_wdt # Atmel AT91 Watchdog Timer diff --git a/sys/arm/conf/SHEEVAPLUG b/sys/arm/conf/SHEEVAPLUG index 9797cc061be2..507ba75d0ec6 100644 --- a/sys/arm/conf/SHEEVAPLUG +++ b/sys/arm/conf/SHEEVAPLUG @@ -11,20 +11,36 @@ include "../mv/kirkwood/std.db88f6xxx" options SOC_MV_KIRKWOOD -#makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols makeoptions WERROR="-Werror" +options HZ=1000 options SCHED_4BSD # 4BSD scheduler options INET # InterNETworking options INET6 # IPv6 communications protocols -options GEOM_PART_BSD # BSD partition scheme -options GEOM_PART_MBR # MBR partition scheme -options TMPFS # Efficient memory filesystem options FFS # Berkeley Fast Filesystem options NANDFS # NAND Filesystem options NFSCL # Network Filesystem Client options NFSLOCKD # Network Lock Manager options NFS_ROOT # NFS usable as /, requires NFSCL +options TMPFS # Efficient memory filesystem +options GEOM_PART_BSD # BSD partition scheme +options GEOM_PART_MBR # MBR partition scheme +options SYSVSHM # SYSV-style shared memory +options SYSVMSG # SYSV-style message queues +options SYSVSEM # SYSV-style semaphores +options _KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions +options MUTEX_NOINLINE +options RWLOCK_NOINLINE +options NO_FFS_SNAPSHOT +options NO_SWAPPING + +# Debugging for use in -current +#makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols +options ALT_BREAK_TO_DEBUGGER +options KDB # Enable kernel debugger support +options DDB # Enable the kernel debugger + +# NFS root from boopt/dhcp options BOOTP options BOOTP_NFSROOT options BOOTP_NFSV3 @@ -33,23 +49,9 @@ options BOOTP_WIRED_TO=mge0 # Root fs on USB device #options ROOTDEVNAME=\"ufs:/dev/da0a\" -options SYSVSHM # SYSV-style shared memory -options SYSVMSG # SYSV-style message queues -options SYSVSEM # SYSV-style semaphores -options _KPOSIX_PRIORITY_SCHEDULING # Posix P1003_1B real-time extensions -options MUTEX_NOINLINE -options RWLOCK_NOINLINE -options NO_FFS_SNAPSHOT -options NO_SWAPPING - -# Debugging -options ALT_BREAK_TO_DEBUGGER -options DDB -options KDB - # Pseudo devices -device random device loop +device random # Serial ports device uart @@ -60,7 +62,6 @@ device mge # Marvell Gigabit Ethernet controller device mii device e1000phy device bpf -options HZ=1000 options DEVICE_POLLING device vlan @@ -81,6 +82,6 @@ device da device nand # Flattened Device Tree -options FDT +options FDT # Configure using FDT/DTB data options FDT_DTB_STATIC makeoptions FDT_DTS_FILE=sheevaplug.dts diff --git a/sys/arm/conf/SN9G45 b/sys/arm/conf/SN9G45 index e85d613400f3..28d2c25c0b35 100644 --- a/sys/arm/conf/SN9G45 +++ b/sys/arm/conf/SN9G45 @@ -29,8 +29,6 @@ include "../at91/std.sn9g45" makeoptions MODULES_OVERRIDE="" makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols -options DDB -options KDB options SCHED_4BSD # 4BSD scheduler options INET # InterNETworking @@ -45,55 +43,60 @@ options NFSCL # Network Filesystem Client #options NFSD # Network Filesystem Server #options NFSLOCKD # Network Lock Manager #options NFS_ROOT # NFS usable as /, requires NFSCL -#options BOOTP_NFSROOT -#options BOOTP -#options BOOTP_NFSV3 -#options BOOTP_WIRED_TO=ate0 -#options BOOTP_COMPAT - -options ROOTDEVNAME=\"ufs:/dev/da0s1\" - -options ALT_BREAK_TO_DEBUGGER - -options GEOM_PART_BSD # BSD partition scheme -options GEOM_PART_MBR # MBR partition scheme options TMPFS # Efficient memory filesystem #options MSDOSFS # MSDOS Filesystem #options CD9660 # ISO 9660 Filesystem #options PROCFS # Process filesystem (requires PSEUDOFS) #options PSEUDOFS # Pseudo-filesystem framework +options GEOM_PART_BSD # BSD partition scheme +options GEOM_PART_MBR # MBR partition scheme options SCSI_DELAY=1000 # Delay (in ms) before probing SCSI #options KTRACE # ktrace(1) support options SYSVSHM # SYSV-style shared memory options SYSVMSG # SYSV-style message queues options SYSVSEM # SYSV-style semaphores -options _KPOSIX_PRIORITY_SCHEDULING # Posix P1003_1B real-time extensions -options MUTEX_NOINLINE -options RWLOCK_NOINLINE -options NO_FFS_SNAPSHOT -options NO_SWAPPING +options _KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions # Debugging for use in -current +options KDB # Enable kernel debugger support +options DDB # Enable the kernel debugger #options INVARIANTS # Enable calls of extra sanity checking #options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS #options WITNESS # Enable checks to detect deadlocks and cycles #options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed #options DIAGNOSTIC -device random -device loop -device bpf -device ether -device md +# NFS root from boopt/dhcp +#options BOOTP +#options BOOTP_NFSROOT +#options BOOTP_COMPAT +#options BOOTP_NFSV3 +#options BOOTP_WIRED_TO=ate0 -device uart # Serial Ports +# alternatively, boot from a MMC/SD memory card +options ROOTDEVNAME=\"ufs:/dev/da0s1\" + +# kernel/memory size reduction +options MUTEX_NOINLINE +options NO_FFS_SNAPSHOT +options NO_SWAPPING +options RWLOCK_NOINLINE + +# The `bpf' device enables the Berkeley Packet Filter. +# Be aware of the administrative consequences of enabling this! +# Note that 'bpf' is required for DHCP. +device bpf # Berkeley packet filter # Ethernet -device ate # Ethernet Driver -device mii -option AT91_ATE_USE_RMII +device mii # Minimal MII support +device ate # Atmel AT91 Ethernet driver +options AT91_ATE_USE_RMII -device at91_wdt # WDT: Watchdog timer +# Pseudo devices. +device loop # Network loopback +device random # Entropy device +device ether # Ethernet support +device md # Memory "disks" # SCSI peripherals device scbus # SCSI bus (required for ATA/SCSI) @@ -101,8 +104,12 @@ device da # Direct Access (disks) device cd # CD device pass # Passthrough device (direct ATA/SCSI access) +# Serial (COM) ports +device uart # Multi-uart driver +options ALT_BREAK_TO_DEBUGGER + # USB support -device ohci # OHCI localbus->USB interface +device ohci # OHCI USB interface device usb # USB Bus (required) device umass # Disks/Mass storage - Requires scbus and da device uhid # "Human Interface Devices" @@ -132,3 +139,5 @@ device udav # Davicom DM9601E USB #device wlan_tkip # 802.11 TKIP support #device wlan_amrr # AMRR transmit rate control algorithm +# watchdog +device at91_wdt # Atmel AT91 Watchdog Timer diff --git a/sys/arm/conf/SOCKIT.common b/sys/arm/conf/SOCKIT.common index ff817f89554f..f30dca19089b 100644 --- a/sys/arm/conf/SOCKIT.common +++ b/sys/arm/conf/SOCKIT.common @@ -31,7 +31,7 @@ options SMP # Enable multiple cores # Debugging for use in -current makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols -options BREAK_TO_DEBUGGER +options ALT_BREAK_TO_DEBUGGER #options VERBOSE_SYSINIT # Enable verbose sysinit messages options KDB # Enable kernel debugger support # For minimum debugger support (stable branch) use: @@ -51,6 +51,9 @@ options INVARIANT_SUPPORT # Extra sanity checks of internal structures, require #options BOOTP_NFSV3 #options BOOTP_WIRED_TO=ue0 +# Interrupt controller +device gic + # MMC/SD/SDIO Card slot support device mmc # mmc/sd bus device mmcsd # mmc/sd flash cards diff --git a/sys/arm/conf/VIRT b/sys/arm/conf/VIRT index 58efec41f85a..bbaa5d7f745a 100644 --- a/sys/arm/conf/VIRT +++ b/sys/arm/conf/VIRT @@ -24,8 +24,9 @@ include "std.armv6" include "../qemu/std.virt" options HZ=100 -options SCHED_4BSD # 4BSD scheduler +options SCHED_ULE # 4BSD scheduler options PLATFORM +options SMP # Enable multiple cores # Debugging for use in -current makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols @@ -43,6 +44,9 @@ options INVARIANT_SUPPORT # Extra sanity checks of internal structures, require #options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed #options DIAGNOSTIC +# Interrupt controller +device gic + device bpf device loop device ether @@ -52,9 +56,9 @@ device snp device pl011 device psci -device virtio -device virtio_mmio -device virtio_blk +device virtio +device virtio_mmio +device virtio_blk device vtnet device md @@ -63,3 +67,6 @@ device random # Entropy device # Flattened Device Tree options FDT # Configure using FDT/DTB data +# Extensible Firmware Interface +options EFI + diff --git a/sys/arm/conf/VSATV102 b/sys/arm/conf/VSATV102 index b5de5f9a3cbf..f845594c3d59 100644 --- a/sys/arm/conf/VSATV102 +++ b/sys/arm/conf/VSATV102 @@ -22,5 +22,10 @@ include "AML8726" ident VSATV102 +options SMP # Enable multiple cores + +# Interrupt controller +device gic + options FDT_DTB_STATIC makeoptions FDT_DTS_FILE=vsatv102-m6.dts diff --git a/sys/arm/conf/VYBRID b/sys/arm/conf/VYBRID index 7e01756c1b39..ed04653b4b65 100644 --- a/sys/arm/conf/VYBRID +++ b/sys/arm/conf/VYBRID @@ -31,7 +31,7 @@ options SCHED_4BSD # 4BSD scheduler # Debugging for use in -current makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols -options BREAK_TO_DEBUGGER +options ALT_BREAK_TO_DEBUGGER #options VERBOSE_SYSINIT # Enable verbose sysinit messages options KDB # Enable kernel debugger support # For minimum debugger support (stable branch) use: @@ -60,6 +60,9 @@ options RWLOCK_NOINLINE options NO_FFS_SNAPSHOT options NO_SWAPPING +# Interrupt controller +device gic + # MMC/SD/SDIO Card slot support device mmc # mmc/sd bus device mmcsd # mmc/sd flash cards diff --git a/sys/arm/conf/WANDBOARD-QUAD b/sys/arm/conf/WANDBOARD-QUAD deleted file mode 100644 index ac1e49220aea..000000000000 --- a/sys/arm/conf/WANDBOARD-QUAD +++ /dev/null @@ -1,28 +0,0 @@ -# Kernel configuration for Wandboard-Quad -# -# For more information on this file, please read the config(5) manual page, -# and/or the handbook section on Kernel Configuration Files: -# -# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html -# -# The handbook is also available locally in /usr/share/doc/handbook -# if you've installed the doc distribution, otherwise always see the -# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the -# latest information. -# -# An exhaustive list of options and more detailed explanations of the -# device lines is also present in the ../../conf/NOTES and NOTES files. -# If you are in doubt as to the purpose or necessity of a line, check first -# in NOTES. -# -# $FreeBSD$ - -#NO_UNIVERSE - -include "IMX6" -ident WANDBOARD-QUAD - -# Flattened Device Tree -options FDT_DTB_STATIC -makeoptions FDT_DTS_FILE=wandboard-quad.dts - diff --git a/sys/arm/conf/WANDBOARD-SOLO b/sys/arm/conf/WANDBOARD-SOLO deleted file mode 100644 index 0fed03d7aa79..000000000000 --- a/sys/arm/conf/WANDBOARD-SOLO +++ /dev/null @@ -1,28 +0,0 @@ -# Kernel configuration for Wandboard-Solo -# -# For more information on this file, please read the config(5) manual page, -# and/or the handbook section on Kernel Configuration Files: -# -# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html -# -# The handbook is also available locally in /usr/share/doc/handbook -# if you've installed the doc distribution, otherwise always see the -# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the -# latest information. -# -# An exhaustive list of options and more detailed explanations of the -# device lines is also present in the ../../conf/NOTES and NOTES files. -# If you are in doubt as to the purpose or necessity of a line, check first -# in NOTES. -# -# $FreeBSD$ - -include "IMX6" -ident WANDBOARD-SOLO - -nooptions SMP - -# Flattened Device Tree -options FDT_DTB_STATIC -makeoptions FDT_DTS_FILE=wandboard-solo.dts - diff --git a/sys/arm/conf/WANDBOARD-DUAL b/sys/arm/conf/YYHD18 similarity index 83% rename from sys/arm/conf/WANDBOARD-DUAL rename to sys/arm/conf/YYHD18 index c3a2d4d5e5f9..1a251ce9e988 100644 --- a/sys/arm/conf/WANDBOARD-DUAL +++ b/sys/arm/conf/YYHD18 @@ -1,4 +1,4 @@ -# Kernel configuration for Wandboard-Dual +# YYHD18 -- Custom configuration for the Yiyate Android TV box # # For more information on this file, please read the config(5) manual page, # and/or the handbook section on Kernel Configuration Files: @@ -19,10 +19,8 @@ #NO_UNIVERSE -include "IMX6" -ident WANDBOARD-DUAL +include "AML8726" +ident YYHD18 -# Flattened Device Tree options FDT_DTB_STATIC -makeoptions FDT_DTS_FILE=wandboard-dual.dts - +makeoptions FDT_DTS_FILE=yyhd18-m3.dts diff --git a/sys/arm/conf/ZEDBOARD b/sys/arm/conf/ZEDBOARD index 3c31b7452e06..f5fc850759f9 100644 --- a/sys/arm/conf/ZEDBOARD +++ b/sys/arm/conf/ZEDBOARD @@ -30,7 +30,7 @@ options SMP # Enable multiple cores # Debugging for use in -current makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols -#options BREAK_TO_DEBUGGER +options ALT_BREAK_TO_DEBUGGER options KDB # Enable kernel debugger support # For minimum debugger support (stable branch) use: #options KDB_TRACE # Print a stack trace for a panic @@ -50,6 +50,9 @@ options DDB # Enable the kernel debugger options ROOTDEVNAME=\"ufs:mmcsd0s2a\" +# Interrupt controller +device gic + device loop device random device ether diff --git a/sys/arm/freescale/imx/files.imx6 b/sys/arm/freescale/imx/files.imx6 index f38eca4868b8..0a67ea1f8b43 100644 --- a/sys/arm/freescale/imx/files.imx6 +++ b/sys/arm/freescale/imx/files.imx6 @@ -10,7 +10,6 @@ kern/kern_clocksource.c standard # # Standard imx6 devices and support. # -arm/arm/gic.c standard arm/arm/pl310.c standard arm/arm/bus_space_base.c standard arm/arm/mpcore_timer.c standard diff --git a/sys/arm/freescale/imx/imx_sdhci.c b/sys/arm/freescale/imx/imx_sdhci.c index f197309c2336..290a0317e0dd 100644 --- a/sys/arm/freescale/imx/imx_sdhci.c +++ b/sys/arm/freescale/imx/imx_sdhci.c @@ -745,7 +745,7 @@ imx_sdhci_attach(device_t dev) sc->force_card_present = true; } - callout_init(&sc->r1bfix_callout, true); + callout_init(&sc->r1bfix_callout, 1); sdhci_init_slot(dev, &sc->slot, 0); bus_generic_probe(dev); diff --git a/sys/arm/freescale/vybrid/files.vybrid b/sys/arm/freescale/vybrid/files.vybrid index 194a975f0bb3..23617a458678 100644 --- a/sys/arm/freescale/vybrid/files.vybrid +++ b/sys/arm/freescale/vybrid/files.vybrid @@ -6,7 +6,6 @@ arm/arm/bus_space_generic.c standard arm/arm/bus_space_asm_generic.S standard arm/arm/bus_space_base.c standard -arm/arm/gic.c standard arm/arm/mpcore_timer.c standard arm/freescale/vybrid/vf_machdep.c standard diff --git a/sys/arm/include/asm.h b/sys/arm/include/asm.h index 53453d95682e..0c25d7bdc1ab 100644 --- a/sys/arm/include/asm.h +++ b/sys/arm/include/asm.h @@ -87,7 +87,13 @@ */ #define GLOBAL(x) .global x -#define _LEENTRY(x) .type x,_ASM_TYPE_FUNCTION; x: +#ifdef __thumb__ +#define _FUNC_MODE .code 16; .thumb_func +#else +#define _FUNC_MODE .code 32 +#endif + +#define _LEENTRY(x) .type x,_ASM_TYPE_FUNCTION; _FUNC_MODE; x: #define _LEEND(x) /* nothing */ #define _EENTRY(x) GLOBAL(x); _LEENTRY(x) #define _EEND(x) _LEEND(x) @@ -126,7 +132,7 @@ ldr x, [x, got] #define GOT_INIT(got,gotsym,pclabel) \ ldr got, gotsym; \ - pclabel: add got, got, pc + pclabel: add got, pc #ifdef __thumb__ #define GOT_INITSYM(gotsym,pclabel) \ .align 2; \ diff --git a/sys/arm/include/atomic.h b/sys/arm/include/atomic.h index 57fdf717aa81..48b4a33ad2da 100644 --- a/sys/arm/include/atomic.h +++ b/sys/arm/include/atomic.h @@ -151,10 +151,10 @@ atomic_set_64(volatile uint64_t *p, uint64_t val) __asm __volatile( "1: \n" - " ldrexd %[tmp], [%[ptr]]\n" + " ldrexd %Q[tmp], %R[tmp], [%[ptr]]\n" " orr %Q[tmp], %Q[val]\n" " orr %R[tmp], %R[val]\n" - " strexd %[exf], %[tmp], [%[ptr]]\n" + " strexd %[exf], %Q[tmp], %R[tmp], [%[ptr]]\n" " teq %[exf], #0\n" " it ne \n" " bne 1b\n" @@ -204,10 +204,10 @@ atomic_clear_64(volatile uint64_t *p, uint64_t val) __asm __volatile( "1: \n" - " ldrexd %[tmp], [%[ptr]]\n" + " ldrexd %Q[tmp], %R[tmp], [%[ptr]]\n" " bic %Q[tmp], %Q[val]\n" " bic %R[tmp], %R[val]\n" - " strexd %[exf], %[tmp], [%[ptr]]\n" + " strexd %[exf], %Q[tmp], %R[tmp], [%[ptr]]\n" " teq %[exf], #0\n" " it ne \n" " bne 1b\n" @@ -263,13 +263,13 @@ atomic_cmpset_64(volatile uint64_t *p, uint64_t cmpval, uint64_t newval) __asm __volatile( "1: \n" - " ldrexd %[tmp], [%[ptr]]\n" + " ldrexd %Q[tmp], %R[tmp], [%[ptr]]\n" " teq %Q[tmp], %Q[cmpval]\n" " itee eq \n" " teqeq %R[tmp], %R[cmpval]\n" " movne %[ret], #0\n" " bne 2f\n" - " strexd %[ret], %[newval], [%[ptr]]\n" + " strexd %[ret], %Q[newval], %R[newval], [%[ptr]]\n" " teq %[ret], #0\n" " it ne \n" " bne 1b\n" @@ -381,10 +381,10 @@ atomic_add_64(volatile uint64_t *p, uint64_t val) __asm __volatile( "1: \n" - " ldrexd %[tmp], [%[ptr]]\n" + " ldrexd %Q[tmp], %R[tmp], [%[ptr]]\n" " adds %Q[tmp], %Q[val]\n" - " adc %R[tmp], %R[val]\n" - " strexd %[exf], %[tmp], [%[ptr]]\n" + " adc %R[tmp], %R[tmp], %R[val]\n" + " strexd %[exf], %Q[tmp], %R[tmp], [%[ptr]]\n" " teq %[exf], #0\n" " it ne \n" " bne 1b\n" @@ -433,10 +433,10 @@ atomic_subtract_64(volatile uint64_t *p, uint64_t val) __asm __volatile( "1: \n" - " ldrexd %[tmp], [%[ptr]]\n" + " ldrexd %Q[tmp], %R[tmp], [%[ptr]]\n" " subs %Q[tmp], %Q[val]\n" - " sbc %R[tmp], %R[val]\n" - " strexd %[exf], %[tmp], [%[ptr]]\n" + " sbc %R[tmp], %R[tmp], %R[val]\n" + " strexd %[exf], %Q[tmp], %R[tmp], [%[ptr]]\n" " teq %[exf], #0\n" " it ne \n" " bne 1b\n" @@ -536,10 +536,10 @@ atomic_fetchadd_64(volatile uint64_t *p, uint64_t val) __asm __volatile( "1: \n" - " ldrexd %[ret], [%[ptr]]\n" + " ldrexd %Q[tmp], %R[tmp], [%[ptr]]\n" " adds %Q[tmp], %Q[ret], %Q[val]\n" " adc %R[tmp], %R[ret], %R[val]\n" - " strexd %[exf], %[tmp], [%[ptr]]\n" + " strexd %[exf], %Q[tmp], %R[tmp], [%[ptr]]\n" " teq %[exf], #0\n" " it ne \n" " bne 1b\n" @@ -560,10 +560,10 @@ atomic_readandclear_64(volatile uint64_t *p) __asm __volatile( "1: \n" - " ldrexd %[ret], [%[ptr]]\n" + " ldrexd %Q[ret], %R[ret], [%[ptr]]\n" " mov %Q[tmp], #0\n" " mov %R[tmp], #0\n" - " strexd %[exf], %[tmp], [%[ptr]]\n" + " strexd %[exf], %Q[tmp], %R[tmp], [%[ptr]]\n" " teq %[exf], #0\n" " it ne \n" " bne 1b\n" @@ -587,7 +587,7 @@ atomic_load_64(volatile uint64_t *p) */ __asm __volatile( "1: \n" - " ldrexd %[ret], [%[ptr]]\n" + " ldrexd %Q[ret], %R[ret], [%[ptr]]\n" " clrex \n" : [ret] "=&r" (ret) : [ptr] "r" (p) @@ -618,8 +618,8 @@ atomic_store_64(volatile uint64_t *p, uint64_t val) */ __asm __volatile( "1: \n" - " ldrexd %[tmp], [%[ptr]]\n" - " strexd %[exf], %[val], [%[ptr]]\n" + " ldrexd %Q[tmp], %R[tmp], [%[ptr]]\n" + " strexd %[exf], %Q[tmp], %R[tmp], [%[ptr]]\n" " teq %[exf], #0\n" " it ne \n" " bne 1b\n" diff --git a/sys/arm/include/cpu-v6.h b/sys/arm/include/cpu-v6.h index b0d7a7f19d0a..e4a893668cbc 100644 --- a/sys/arm/include/cpu-v6.h +++ b/sys/arm/include/cpu-v6.h @@ -29,12 +29,16 @@ #ifndef MACHINE_CPU_V6_H #define MACHINE_CPU_V6_H +/* There are no user serviceable parts here, they may change without notice */ +#ifndef _KERNEL +#error Only include this file in the kernel +#else + #include "machine/atomic.h" #include "machine/cpufunc.h" #include "machine/cpuinfo.h" #include "machine/sysreg.h" - #define CPU_ASID_KERNEL 0 vm_offset_t dcache_wb_pou_checked(vm_offset_t, vm_size_t); @@ -135,6 +139,8 @@ _WF1(_CP15_ICIMVAU, CP15_ICIMVAU(%0)) /* Instruction cache invalidate */ /* Various control registers */ +_RF0(cp15_cpacr_get, CP15_CPACR(%0)) +_WF1(cp15_cpacr_set, CP15_CPACR(%0)) _RF0(cp15_dfsr_get, CP15_DFSR(%0)) _RF0(cp15_ifsr_get, CP15_IFSR(%0)) _WF1(cp15_prrr_set, CP15_PRRR(%0)) @@ -145,8 +151,10 @@ _RF0(cp15_dfar_get, CP15_DFAR(%0)) _RF0(cp15_ifar_get, CP15_IFAR(%0)) _RF0(cp15_l2ctlr_get, CP15_L2CTLR(%0)) #endif -#if __ARM_ARCH >= 6 +/* ARMv6+ and XScale */ _RF0(cp15_actlr_get, CP15_ACTLR(%0)) +_WF1(cp15_actlr_set, CP15_ACTLR(%0)) +#if __ARM_ARCH >= 6 _WF1(cp15_ats1cpr_set, CP15_ATS1CPR(%0)); _RF0(cp15_par_get, CP15_PAR); _RF0(cp15_sctlr_get, CP15_SCTLR(%0)) @@ -159,7 +167,10 @@ _RF0(cp15_tcmtr_get, CP15_TCMTR(%0)) _RF0(cp15_tlbtr_get, CP15_TLBTR(%0)) _RF0(cp15_mpidr_get, CP15_MPIDR(%0)) _RF0(cp15_revidr_get, CP15_REVIDR(%0)) +_RF0(cp15_ccsidr_get, CP15_CCSIDR(%0)) +_RF0(cp15_clidr_get, CP15_CLIDR(%0)) _RF0(cp15_aidr_get, CP15_AIDR(%0)) +_WF1(cp15_csselr_set, CP15_CSSELR(%0)) _RF0(cp15_id_pfr0_get, CP15_ID_PFR0(%0)) _RF0(cp15_id_pfr1_get, CP15_ID_PFR1(%0)) _RF0(cp15_id_dfr0_get, CP15_ID_DFR0(%0)) @@ -179,6 +190,10 @@ _RF0(cp15_cbar_get, CP15_CBAR(%0)) /* Performance Monitor registers */ #if __ARM_ARCH == 6 && defined(CPU_ARM1176) +_RF0(cp15_pmuserenr_get, CP15_PMUSERENR(%0)) +_WF1(cp15_pmuserenr_set, CP15_PMUSERENR(%0)) +_RF0(cp15_pmcr_get, CP15_PMCR(%0)) +_WF1(cp15_pmcr_set, CP15_PMCR(%0)) _RF0(cp15_pmccntr_get, CP15_PMCCNTR(%0)) _WF1(cp15_pmccntr_set, CP15_PMCCNTR(%0)) #elif __ARM_ARCH > 6 @@ -276,24 +291,29 @@ tlb_flush_all_ng_local(void) /* Flush single TLB entry (even global). */ static __inline void -tlb_flush_local(vm_offset_t sva) +tlb_flush_local(vm_offset_t va) { + KASSERT((va & PAGE_MASK) == 0, ("%s: va %#x not aligned", __func__, va)); + dsb(); - _CP15_TLBIMVA((sva & ~PAGE_MASK ) | CPU_ASID_KERNEL); + _CP15_TLBIMVA(va | CPU_ASID_KERNEL); dsb(); } /* Flush range of TLB entries (even global). */ static __inline void -tlb_flush_range_local(vm_offset_t sva, vm_size_t size) +tlb_flush_range_local(vm_offset_t va, vm_size_t size) { - vm_offset_t va; - vm_offset_t eva = sva + size; + vm_offset_t eva = va + size; + + KASSERT((va & PAGE_MASK) == 0, ("%s: va %#x not aligned", __func__, va)); + KASSERT((size & PAGE_MASK) == 0, ("%s: size %#x not aligned", __func__, + size)); dsb(); - for (va = sva; va < eva; va += PAGE_SIZE) - _CP15_TLBIMVA((va & ~PAGE_MASK ) | CPU_ASID_KERNEL); + for (; va < eva; va += PAGE_SIZE) + _CP15_TLBIMVA(va | CPU_ASID_KERNEL); dsb(); } @@ -319,22 +339,27 @@ tlb_flush_all_ng(void) } static __inline void -tlb_flush(vm_offset_t sva) +tlb_flush(vm_offset_t va) { + KASSERT((va & PAGE_MASK) == 0, ("%s: va %#x not aligned", __func__, va)); + dsb(); - _CP15_TLBIMVAAIS(sva); + _CP15_TLBIMVAAIS(va); dsb(); } static __inline void -tlb_flush_range(vm_offset_t sva, vm_size_t size) +tlb_flush_range(vm_offset_t va, vm_size_t size) { - vm_offset_t va; - vm_offset_t eva = sva + size; + vm_offset_t eva = va + size; + + KASSERT((va & PAGE_MASK) == 0, ("%s: va %#x not aligned", __func__, va)); + KASSERT((size & PAGE_MASK) == 0, ("%s: size %#x not aligned", __func__, + size)); dsb(); - for (va = sva; va < eva; va += PAGE_SIZE) + for (; va < eva; va += PAGE_SIZE) _CP15_TLBIMVAAIS(va); dsb(); } @@ -342,8 +367,8 @@ tlb_flush_range(vm_offset_t sva, vm_size_t size) #define tlb_flush_all() tlb_flush_all_local() #define tlb_flush_all_ng() tlb_flush_all_ng_local() -#define tlb_flush(sva) tlb_flush_local(sva) -#define tlb_flush_range(sva, size) tlb_flush_range_local(sva, size) +#define tlb_flush(va) tlb_flush_local(va) +#define tlb_flush_range(va, size) tlb_flush_range_local(va, size) #endif /* SMP */ @@ -353,13 +378,13 @@ tlb_flush_range(vm_offset_t sva, vm_size_t size) /* Sync I and D caches to PoU */ static __inline void -icache_sync(vm_offset_t sva, vm_size_t size) +icache_sync(vm_offset_t va, vm_size_t size) { - vm_offset_t va; - vm_offset_t eva = sva + size; + vm_offset_t eva = va + size; dsb(); - for (va = sva; va < eva; va += cpuinfo.dcache_line_size) { + va &= ~cpuinfo.dcache_line_mask; + for ( ; va < eva; va += cpuinfo.dcache_line_size) { #if __ARM_ARCH >= 7 && defined SMP _CP15_DCCMVAU(va); #else @@ -404,13 +429,13 @@ bpb_inv_all(void) /* Write back D-cache to PoU */ static __inline void -dcache_wb_pou(vm_offset_t sva, vm_size_t size) +dcache_wb_pou(vm_offset_t va, vm_size_t size) { - vm_offset_t va; - vm_offset_t eva = sva + size; + vm_offset_t eva = va + size; dsb(); - for (va = sva; va < eva; va += cpuinfo.dcache_line_size) { + va &= ~cpuinfo.dcache_line_mask; + for ( ; va < eva; va += cpuinfo.dcache_line_size) { #if __ARM_ARCH >= 7 && defined SMP _CP15_DCCMVAU(va); #else @@ -420,40 +445,46 @@ dcache_wb_pou(vm_offset_t sva, vm_size_t size) dsb(); } -/* Invalidate D-cache to PoC */ +/* + * Invalidate D-cache to PoC + * + * Caches are invalidated from outermost to innermost as fresh cachelines + * flow in this direction. In given range, if there was no dirty cacheline + * in any cache before, no stale cacheline should remain in them after this + * operation finishes. + */ static __inline void -dcache_inv_poc(vm_offset_t sva, vm_paddr_t pa, vm_size_t size) +dcache_inv_poc(vm_offset_t va, vm_paddr_t pa, vm_size_t size) { - vm_offset_t va; - vm_offset_t eva = sva + size; + vm_offset_t eva = va + size; - /* invalidate L1 first */ - for (va = sva; va < eva; va += cpuinfo.dcache_line_size) { - _CP15_DCIMVAC(va); - } dsb(); + /* invalidate L2 first */ + cpu_l2cache_inv_range(pa, size); - /* then L2 */ - cpu_l2cache_inv_range(pa, size); - dsb(); - - /* then L1 again */ - for (va = sva; va < eva; va += cpuinfo.dcache_line_size) { + /* then L1 */ + va &= ~cpuinfo.dcache_line_mask; + for ( ; va < eva; va += cpuinfo.dcache_line_size) { _CP15_DCIMVAC(va); } dsb(); } -/* Write back D-cache to PoC */ +/* + * Write back D-cache to PoC + * + * Caches are written back from innermost to outermost as dirty cachelines + * flow in this direction. In given range, no dirty cacheline should remain + * in any cache after this operation finishes. + */ static __inline void -dcache_wb_poc(vm_offset_t sva, vm_paddr_t pa, vm_size_t size) +dcache_wb_poc(vm_offset_t va, vm_paddr_t pa, vm_size_t size) { - vm_offset_t va; - vm_offset_t eva = sva + size; + vm_offset_t eva = va + size; dsb(); - - for (va = sva; va < eva; va += cpuinfo.dcache_line_size) { + va &= ~cpuinfo.dcache_line_mask; + for ( ; va < eva; va += cpuinfo.dcache_line_size) { _CP15_DCCMVAC(va); } dsb(); @@ -469,9 +500,9 @@ dcache_wbinv_poc(vm_offset_t sva, vm_paddr_t pa, vm_size_t size) vm_offset_t eva = sva + size; dsb(); - /* write back L1 first */ - for (va = sva; va < eva; va += cpuinfo.dcache_line_size) { + va = sva & ~cpuinfo.dcache_line_mask; + for ( ; va < eva; va += cpuinfo.dcache_line_size) { _CP15_DCCMVAC(va); } dsb(); @@ -480,7 +511,8 @@ dcache_wbinv_poc(vm_offset_t sva, vm_paddr_t pa, vm_size_t size) cpu_l2cache_wbinv_range(pa, size); /* then invalidate L1 */ - for (va = sva; va < eva; va += cpuinfo.dcache_line_size) { + va = sva & ~cpuinfo.dcache_line_mask; + for ( ; va < eva; va += cpuinfo.dcache_line_size) { _CP15_DCIMVAC(va); } dsb(); @@ -499,4 +531,6 @@ cp15_ttbr_set(uint32_t reg) tlb_flush_all_ng_local(); } +#endif /* _KERNEL */ + #endif /* !MACHINE_CPU_V6_H */ diff --git a/sys/arm/include/cpufunc.h b/sys/arm/include/cpufunc.h index 4d355d4a57da..5d1a72adedd8 100644 --- a/sys/arm/include/cpufunc.h +++ b/sys/arm/include/cpufunc.h @@ -376,7 +376,6 @@ void armv7_setup (void); void armv7_context_switch (void); void armv7_drain_writebuf (void); void armv7_sev (void); -void armv7_sleep (int unused); u_int armv7_auxctrl (u_int, u_int); void armadaxp_idcache_wbinv_all (void); diff --git a/sys/arm/include/elf.h b/sys/arm/include/elf.h index abe7b470330f..926268290101 100644 --- a/sys/arm/include/elf.h +++ b/sys/arm/include/elf.h @@ -63,21 +63,21 @@ __ElfType(Auxinfo); */ /* Values for a_type. */ -#define AT_NULL 0 /* Terminates the vector. */ -#define AT_IGNORE 1 /* Ignored entry. */ -#define AT_EXECFD 2 /* File descriptor of program to load. */ -#define AT_PHDR 3 /* Program header of program already loaded. */ -#define AT_PHENT 4 /* Size of each program header entry. */ -#define AT_PHNUM 5 /* Number of program header entries. */ -#define AT_PAGESZ 6 /* Page size in bytes. */ -#define AT_BASE 7 /* Interpreter's base address. */ -#define AT_FLAGS 8 /* Flags (unused). */ -#define AT_ENTRY 9 /* Where interpreter should transfer control. */ -#define AT_NOTELF 10 /* Program is not ELF ?? */ -#define AT_UID 11 /* Real uid. */ -#define AT_EUID 12 /* Effective uid. */ -#define AT_GID 13 /* Real gid. */ -#define AT_EGID 14 /* Effective gid. */ +#define AT_NULL 0 /* Terminates the vector. */ +#define AT_IGNORE 1 /* Ignored entry. */ +#define AT_EXECFD 2 /* File descriptor of program to load. */ +#define AT_PHDR 3 /* Program header of program already loaded. */ +#define AT_PHENT 4 /* Size of each program header entry. */ +#define AT_PHNUM 5 /* Number of program header entries. */ +#define AT_PAGESZ 6 /* Page size in bytes. */ +#define AT_BASE 7 /* Interpreter's base address. */ +#define AT_FLAGS 8 /* Flags (unused). */ +#define AT_ENTRY 9 /* Where interpreter should transfer control. */ +#define AT_NOTELF 10 /* Program is not ELF ?? */ +#define AT_UID 11 /* Real uid. */ +#define AT_EUID 12 /* Effective uid. */ +#define AT_GID 13 /* Real gid. */ +#define AT_EGID 14 /* Effective gid. */ #define AT_EXECPATH 15 /* Path to the executable. */ #define AT_CANARY 16 /* Canary for SSP */ #define AT_CANARYLEN 17 /* Length of the canary. */ @@ -87,10 +87,11 @@ __ElfType(Auxinfo); #define AT_PAGESIZESLEN 21 /* Number of pagesizes. */ #define AT_TIMEKEEP 22 /* Pointer to timehands. */ #define AT_STACKPROT 23 /* Initial stack protection. */ +#define AT_EHDRFLAGS 24 /* e_flags field from elf hdr */ -#define AT_COUNT 24 /* Count of defined aux entry types. */ +#define AT_COUNT 25 /* Count of defined aux entry types. */ -#define R_ARM_COUNT 33 /* Count of defined relocation types. */ +#define R_ARM_COUNT 33 /* Count of defined relocation types. */ /* Define "machine" characteristics */ @@ -104,16 +105,16 @@ __ElfType(Auxinfo); #define ELF_TARG_VER 1 /* Defines specific for arm headers */ -#define EF_ARM_EABI_VERSION(x) (((x) & EF_ARM_EABIMASK) >> 24) -#define EF_ARM_EABI_VERSION_UNKNOWN 0 -#define EF_ARM_EABI_FREEBSD_MIN 4 +#define EF_ARM_EABI_VERSION(x) (((x) & EF_ARM_EABIMASK) >> 24) +#define EF_ARM_EABI_VERSION_UNKNOWN 0 +#define EF_ARM_EABI_FREEBSD_MIN 4 /* * Magic number for the elf trampoline, chosen wisely to be an immediate * value. */ -#define MAGIC_TRAMP_NUMBER 0x5c000003 +#define MAGIC_TRAMP_NUMBER 0x5c000003 -#define ET_DYN_LOAD_ADDR 0x12000 +#define ET_DYN_LOAD_ADDR 0x12000 #endif /* !_MACHINE_ELF_H_ */ diff --git a/sys/arm/include/pmap-v6.h b/sys/arm/include/pmap-v6.h index bb586824fa04..304dec6c0bda 100644 --- a/sys/arm/include/pmap-v6.h +++ b/sys/arm/include/pmap-v6.h @@ -193,7 +193,6 @@ void pmap_unmapdev(vm_offset_t, vm_size_t); void pmap_kenter_device(vm_offset_t, vm_size_t, vm_paddr_t); void pmap_kremove_device(vm_offset_t, vm_size_t); void pmap_set_pcb_pagedir(pmap_t , struct pcb *); -void pmap_lazyfix_action(void); void pmap_tlb_flush(pmap_t , vm_offset_t ); void pmap_tlb_flush_range(pmap_t , vm_offset_t , vm_size_t ); diff --git a/sys/arm/include/proc.h b/sys/arm/include/proc.h index 4ffbec59d86a..a86df3557ccc 100644 --- a/sys/arm/include/proc.h +++ b/sys/arm/include/proc.h @@ -68,15 +68,20 @@ struct mdproc { #endif #define MAXARGS 8 +/* + * This holds the syscall state for a single system call. + * As some syscall arguments may be 64-bit aligned we need to ensure the + * args value is 64-bit aligned. The ABI will then ensure any 64-bit + * arguments are already correctly aligned, even if they were passed in + * via registers, we just need to make sure we copy them to an algned + * buffer. + */ struct syscall_args { u_int code; struct sysent *callp; register_t args[MAXARGS]; int narg; u_int nap; -#ifndef __ARM_EABI__ - u_int32_t insn; -#endif -}; +} __aligned(8); #endif /* !_MACHINE_PROC_H_ */ diff --git a/sys/arm/include/smp.h b/sys/arm/include/smp.h index 1abe3988f1a3..bce8b4f342c0 100644 --- a/sys/arm/include/smp.h +++ b/sys/arm/include/smp.h @@ -14,7 +14,6 @@ #define IPI_HARDCLOCK 6 #define IPI_TLB 7 #define IPI_CACHE 8 -#define IPI_LAZYPMAP 9 void init_secondary(int cpu); void mpentry(void); diff --git a/sys/arm/include/sysreg.h b/sys/arm/include/sysreg.h index fb1348736ece..31097e9a1650 100644 --- a/sys/arm/include/sysreg.h +++ b/sys/arm/include/sysreg.h @@ -210,6 +210,8 @@ * CP15 C9 registers */ #if __ARM_ARCH == 6 && defined(CPU_ARM1176) +#define CP15_PMUSERENR(rr) p15, 0, rr, c15, c9, 0 /* Access Validation Control Register */ +#define CP15_PMCR(rr) p15, 0, rr, c15, c12, 0 /* Performance Monitor Control Register */ #define CP15_PMCCNTR(rr) p15, 0, rr, c15, c12, 1 /* PM Cycle Count Register */ #elif __ARM_ARCH > 6 #define CP15_L2CTLR(rr) p15, 1, rr, c9, c0, 2 /* L2 Control Register */ diff --git a/sys/arm/qemu/files.qemu b/sys/arm/qemu/files.qemu index d23524ece953..48d7e4a8614f 100644 --- a/sys/arm/qemu/files.qemu +++ b/sys/arm/qemu/files.qemu @@ -10,7 +10,9 @@ kern/kern_clocksource.c standard # # Standard qemu virt devices and support. # -arm/arm/gic.c standard arm/arm/generic_timer.c standard arm/qemu/virt_common.c standard arm/qemu/virt_machdep.c standard +arm/qemu/virt_mp.c optional smp + +dev/ofw/ofw_cpu.c standard diff --git a/sys/arm/qemu/virt_mp.c b/sys/arm/qemu/virt_mp.c new file mode 100644 index 000000000000..4942745e109f --- /dev/null +++ b/sys/arm/qemu/virt_mp.c @@ -0,0 +1,119 @@ +/*- + * Copyright (c) 2015 Andrew Turner + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include + +#include +#include + +#include +#include + +#include +#include +#include + +static int running_cpus; + +int +platform_mp_probe(void) +{ + int ncpus; + + ncpus = ofw_cpu_early_foreach(NULL, true); + if (ncpus <= 1) { + mp_ncpus = 1; + return (0); + } + + mp_ncpus = MIN(ncpus, MAXCPU); + + return (1); +} + +static boolean_t +virt_maxid(u_int id, phandle_t node, u_int addr_cells, pcell_t *reg) +{ + + if (mp_maxid < id) + mp_maxid = id; + + return (true); +} + +void +platform_mp_setmaxid(void) +{ + + mp_maxid = PCPU_GET(cpuid); + ofw_cpu_early_foreach(virt_maxid, true); +} + +static boolean_t +virt_start_ap(u_int id, phandle_t node, u_int addr_cells, pcell_t *reg) +{ + int err; + + if (running_cpus >= mp_ncpus) + return (false); + running_cpus++; + + err = psci_cpu_on(*reg, pmap_kextract((vm_offset_t)mpentry), id); + + if (err != PSCI_RETVAL_SUCCESS) + return (false); + + return (true); +} + +void +platform_mp_start_ap(void) +{ + + ofw_cpu_early_foreach(virt_start_ap, true); +} + +void +platform_mp_init_secondary(void) +{ + + arm_init_secondary_ic(); +} + +void +platform_ipi_send(cpuset_t cpus, u_int ipi) +{ + + pic_ipi_send(cpus, ipi); +} diff --git a/sys/arm/rockchip/files.rk30xx b/sys/arm/rockchip/files.rk30xx index bfce36c41a80..de2fe9e83cb3 100644 --- a/sys/arm/rockchip/files.rk30xx +++ b/sys/arm/rockchip/files.rk30xx @@ -4,7 +4,6 @@ kern/kern_clocksource.c standard arm/arm/bus_space_asm_generic.S standard arm/arm/bus_space_generic.c standard -arm/arm/gic.c standard arm/arm/mpcore_timer.c standard arm/arm/bus_space_base.c standard diff --git a/sys/arm/samsung/exynos/files.exynos5 b/sys/arm/samsung/exynos/files.exynos5 index 2e84f6c43639..347f3e59ed29 100644 --- a/sys/arm/samsung/exynos/files.exynos5 +++ b/sys/arm/samsung/exynos/files.exynos5 @@ -6,7 +6,6 @@ arm/arm/bus_space_generic.c standard arm/arm/bus_space_asm_generic.S standard arm/arm/bus_space_base.c standard -arm/arm/gic.c standard arm/arm/generic_timer.c standard arm/samsung/exynos/exynos5_mct.c standard diff --git a/sys/arm/ti/aintc.c b/sys/arm/ti/aintc.c index d54594c3c52e..fe4172337854 100644 --- a/sys/arm/ti/aintc.c +++ b/sys/arm/ti/aintc.c @@ -69,7 +69,6 @@ static struct resource_spec ti_aintc_spec[] = { { -1, 0 } }; - static struct ti_aintc_softc *ti_aintc_sc = NULL; #define aintc_read_4(_sc, reg) \ @@ -77,6 +76,12 @@ static struct ti_aintc_softc *ti_aintc_sc = NULL; #define aintc_write_4(_sc, reg, val) \ bus_space_write_4((_sc)->aintc_bst, (_sc)->aintc_bsh, (reg), (val)) +/* List of compatible strings for FDT tree */ +static struct ofw_compat_data compat_data[] = { + {"ti,am33xx-intc", 1}, + {"ti,omap2-intc", 1}, + {NULL, 0}, +}; static void aintc_post_filter(void *arg) @@ -92,9 +97,9 @@ ti_aintc_probe(device_t dev) if (!ofw_bus_status_okay(dev)) return (ENXIO); - - if (!ofw_bus_is_compatible(dev, "ti,aintc")) + if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) return (ENXIO); + device_set_desc(dev, "TI AINTC Interrupt Controller"); return (BUS_PROBE_DEFAULT); } diff --git a/sys/arm/ti/am335x/am335x_dmtimer.c b/sys/arm/ti/am335x/am335x_dmtimer.c index 7ba171e72112..d93cc50b58c0 100644 --- a/sys/arm/ti/am335x/am335x_dmtimer.c +++ b/sys/arm/ti/am335x/am335x_dmtimer.c @@ -54,7 +54,8 @@ __FBSDID("$FreeBSD$"); #include #include -#include +#include +#include #define AM335X_NUM_TIMERS 8 @@ -109,78 +110,38 @@ __FBSDID("$FreeBSD$"); #define DEFAULT_ET_TIMER 2 #define DEFAULT_TC_TIMER 3 +#define DMTIMER_READ4(sc, reg) (bus_read_4((sc)->tmr_mem_res, (reg))) +#define DMTIMER_WRITE4(sc, reg, val) (bus_write_4((sc)->tmr_mem_res, (reg), (val))) + struct am335x_dmtimer_softc { - struct resource * tmr_mem_res[AM335X_NUM_TIMERS]; - struct resource * tmr_irq_res[AM335X_NUM_TIMERS]; + device_t dev; + int tmr_mem_rid; + struct resource * tmr_mem_res; + int tmr_irq_rid; + struct resource * tmr_irq_res; + void *tmr_irq_handler; uint32_t sysclk_freq; - uint32_t tc_num; /* Which timer number is tc. */ - uint32_t tc_tclr; /* Cached tc TCLR register. */ - struct resource * tc_memres; /* Resources for tc timer. */ - uint32_t et_num; /* Which timer number is et. */ - uint32_t et_tclr; /* Cached et TCLR register. */ - struct resource * et_memres; /* Resources for et timer. */ + uint32_t tclr; /* Cached TCLR register. */ int pps_curmode; /* Edge mode now set in hw. */ struct task pps_task; /* For pps_event handling. */ struct cdev * pps_cdev; struct pps_state pps; - struct timecounter tc; - struct eventtimer et; + + union { + struct timecounter tc; + struct eventtimer et; + } func; }; -static struct am335x_dmtimer_softc *am335x_dmtimer_sc; +static struct am335x_dmtimer_softc *am335x_dmtimer_et_sc = NULL; +static struct am335x_dmtimer_softc *am335x_dmtimer_tc_sc = NULL; -static struct resource_spec am335x_dmtimer_mem_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, - { SYS_RES_MEMORY, 1, RF_ACTIVE }, - { SYS_RES_MEMORY, 2, RF_ACTIVE }, - { SYS_RES_MEMORY, 3, RF_ACTIVE }, - { SYS_RES_MEMORY, 4, RF_ACTIVE }, - { SYS_RES_MEMORY, 5, RF_ACTIVE }, - { SYS_RES_MEMORY, 6, RF_ACTIVE }, - { SYS_RES_MEMORY, 7, RF_ACTIVE }, - { -1, 0, 0 } -}; -static struct resource_spec am335x_dmtimer_irq_spec[] = { - { SYS_RES_IRQ, 0, RF_ACTIVE }, - { SYS_RES_IRQ, 1, RF_ACTIVE }, - { SYS_RES_IRQ, 2, RF_ACTIVE }, - { SYS_RES_IRQ, 3, RF_ACTIVE }, - { SYS_RES_IRQ, 4, RF_ACTIVE }, - { SYS_RES_IRQ, 5, RF_ACTIVE }, - { SYS_RES_IRQ, 6, RF_ACTIVE }, - { SYS_RES_IRQ, 7, RF_ACTIVE }, - { -1, 0, 0 } -}; -static inline uint32_t -am335x_dmtimer_tc_read_4(struct am335x_dmtimer_softc *sc, uint32_t reg) -{ - - return (bus_read_4(sc->tc_memres, reg)); -} - -static inline void -am335x_dmtimer_tc_write_4(struct am335x_dmtimer_softc *sc, uint32_t reg, - uint32_t val) -{ - - bus_write_4(sc->tc_memres, reg, val); -} - -static inline uint32_t -am335x_dmtimer_et_read_4(struct am335x_dmtimer_softc *sc, uint32_t reg) -{ - - return (bus_read_4(sc->et_memres, reg)); -} - -static inline void -am335x_dmtimer_et_write_4(struct am335x_dmtimer_softc *sc, uint32_t reg, - uint32_t val) -{ - - bus_write_4(sc->et_memres, reg, val); -} +#ifdef PPS_SYNC +/* -1 - not detected, 0 - not found, > 0 - timerX module */ +static int am335x_dmtimer_pps_module = -1; +static const char *am335x_dmtimer_pps_hwmod = NULL; +#endif /* * PPS driver routines, included when the kernel is built with option PPS_SYNC. @@ -215,19 +176,19 @@ am335x_dmtimer_set_capture_mode(struct am335x_dmtimer_softc *sc, bool force_off) return; sc->pps_curmode = newmode; - sc->tc_tclr &= ~DMT_TCLR_CAPTRAN_MASK; + sc->tclr &= ~DMT_TCLR_CAPTRAN_MASK; switch (newmode) { case PPS_CAPTUREASSERT: - sc->tc_tclr |= DMT_TCLR_CAPTRAN_LOHI; + sc->tclr |= DMT_TCLR_CAPTRAN_LOHI; break; case PPS_CAPTURECLEAR: - sc->tc_tclr |= DMT_TCLR_CAPTRAN_HILO; + sc->tclr |= DMT_TCLR_CAPTRAN_HILO; break; default: /* It can't be BOTH, so it's disabled. */ break; } - am335x_dmtimer_tc_write_4(sc, DMT_TCLR, sc->tc_tclr); + DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr); } static void @@ -244,10 +205,10 @@ am335x_dmtimer_tc_poll_pps(struct timecounter *tc) * TCAR status to re-arm the capture for the next second, we have to * write to the IRQ status register, not the RAW register. Quirky. */ - if (am335x_dmtimer_tc_read_4(sc, DMT_IRQSTATUS_RAW) & DMT_IRQ_TCAR) { + if (DMTIMER_READ4(sc, DMT_IRQSTATUS_RAW) & DMT_IRQ_TCAR) { pps_capture(&sc->pps); - sc->pps.capcount = am335x_dmtimer_tc_read_4(sc, DMT_TCAR1); - am335x_dmtimer_tc_write_4(sc, DMT_IRQSTATUS, DMT_IRQ_TCAR); + sc->pps.capcount = DMTIMER_READ4(sc, DMT_TCAR1); + DMTIMER_WRITE4(sc, DMT_IRQSTATUS, DMT_IRQ_TCAR); taskqueue_enqueue_fast(taskqueue_fast, &sc->pps_task); } } @@ -339,21 +300,15 @@ static struct cdevsw am335x_dmtimer_pps_cdevsw = { .d_name = PPS_CDEV_NAME, }; -/* - * Set up the PPS cdev and the the kernel timepps stuff. - * - * Note that this routine cannot touch the hardware, because bus space resources - * are not fully set up yet when this is called. - */ -static int -am335x_dmtimer_pps_init(device_t dev, struct am335x_dmtimer_softc *sc) +static void +am335x_dmtimer_pps_find() { - int i, timer_num, unit; + int i; unsigned int padstate; const char * padmux; struct padinfo { char * ballname; - char * muxname; + const char * muxname; int timer_num; } padinfo[] = { {"GPMC_ADVn_ALE", "timer4", 4}, @@ -370,21 +325,47 @@ am335x_dmtimer_pps_init(device_t dev, struct am335x_dmtimer_softc *sc) * is configured for input. The right symbolic values aren't exported * yet from ti_scm.h. */ - timer_num = 0; - for (i = 0; i < nitems(padinfo) && timer_num == 0; ++i) { - if (ti_scm_padconf_get(padinfo[i].ballname, &padmux, + am335x_dmtimer_pps_module = 0; + for (i = 0; i < nitems(padinfo) && am335x_dmtimer_pps_module == 0; ++i) { + if (ti_pinmux_padconf_get(padinfo[i].ballname, &padmux, &padstate) == 0) { if (strcasecmp(padinfo[i].muxname, padmux) == 0 && - (padstate & (0x01 << 5))) - timer_num = padinfo[i].timer_num; + (padstate & (0x01 << 5))) { + am335x_dmtimer_pps_module = padinfo[i].timer_num; + am335x_dmtimer_pps_hwmod = padinfo[i].muxname; + } } } - if (timer_num == 0) { - device_printf(dev, "No DMTimer found with capture pin " + + if (am335x_dmtimer_pps_module == 0) { + printf("am335x_dmtimer: No DMTimer found with capture pin " "configured as input; PPS driver disabled.\n"); - return (DEFAULT_TC_TIMER); } +} + +/* + * Set up the PPS cdev and the the kernel timepps stuff. + * + * Note that this routine cannot touch the hardware, because bus space resources + * are not fully set up yet when this is called. + */ +static void +am335x_dmtimer_pps_init(device_t dev, struct am335x_dmtimer_softc *sc) +{ + int unit; + + if (am335x_dmtimer_pps_module == -1) + am335x_dmtimer_pps_find(); + + /* No PPS input */ + if (am335x_dmtimer_pps_module == 0) + return; + + /* Not PPS-enabled input */ + if ((am335x_dmtimer_pps_module > 0) && + (!ti_hwmods_contains(dev, am335x_dmtimer_pps_hwmod))) + return; /* * Indicate our capabilities (pretty much just capture of either edge). @@ -398,35 +379,21 @@ am335x_dmtimer_pps_init(device_t dev, struct am335x_dmtimer_softc *sc) * Set up to capture the PPS via timecounter polling, and init the task * that does deferred pps_event() processing after capture. */ - sc->tc.tc_poll_pps = am335x_dmtimer_tc_poll_pps; + sc->func.tc.tc_poll_pps = am335x_dmtimer_tc_poll_pps; TASK_INIT(&sc->pps_task, 0, am335x_dmtimer_process_pps_event, sc); /* Create the PPS cdev. */ - unit = device_get_unit(dev); sc->pps_cdev = make_dev(&am335x_dmtimer_pps_cdevsw, unit, - UID_ROOT, GID_WHEEL, 0600, PPS_CDEV_NAME "%d", unit); + UID_ROOT, GID_WHEEL, 0600, PPS_CDEV_NAME); sc->pps_cdev->si_drv1 = sc; + unit = device_get_unit(sc->pps_cdev); device_printf(dev, "Using DMTimer%d for PPS device /dev/%s%d\n", - timer_num, PPS_CDEV_NAME, unit); - - return (timer_num); + am335x_dmtimer_pps_module, PPS_CDEV_NAME, unit); } -#else /* PPS_SYNC */ +#endif -static int -am335x_dmtimer_pps_init(device_t dev, struct am335x_dmtimer_softc *sc) -{ - - /* - * When PPS support is not compiled in, there's no need to use a timer - * that has an associated capture-input pin, so use the default. - */ - return (DEFAULT_TC_TIMER); -} - -#endif /* PPS_SYNC */ /* * End of PPS driver code. */ @@ -438,7 +405,7 @@ am335x_dmtimer_tc_get_timecount(struct timecounter *tc) sc = tc->tc_priv; - return (am335x_dmtimer_tc_read_4(sc, DMT_TCRR)); + return (DMTIMER_READ4(sc, DMT_TCRR)); } static int @@ -462,13 +429,13 @@ am335x_dmtimer_start(struct eventtimer *et, sbintime_t first, sbintime_t period) * from the et_event_cb() routine dispatched from our own handler, but * it's not clear to me that that's the only case possible. */ - sc->et_tclr &= ~(DMT_TCLR_START | DMT_TCLR_AUTOLOAD); - am335x_dmtimer_et_write_4(sc, DMT_TCLR, sc->et_tclr); - am335x_dmtimer_et_write_4(sc, DMT_IRQSTATUS, DMT_IRQ_OVF); + sc->tclr &= ~(DMT_TCLR_START | DMT_TCLR_AUTOLOAD); + DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr); + DMTIMER_WRITE4(sc, DMT_IRQSTATUS, DMT_IRQ_OVF); if (period != 0) { reload_count = ((uint32_t)et->et_frequency * period) >> 32; - sc->et_tclr |= DMT_TCLR_AUTOLOAD; + sc->tclr |= DMT_TCLR_AUTOLOAD; } else { reload_count = 0; } @@ -482,13 +449,13 @@ am335x_dmtimer_start(struct eventtimer *et, sbintime_t first, sbintime_t period) * Set auto-reload and current-count values. This timer hardware counts * up from the initial/reload value and interrupts on the zero rollover. */ - am335x_dmtimer_et_write_4(sc, DMT_TLDR, 0xFFFFFFFF - reload_count); - am335x_dmtimer_et_write_4(sc, DMT_TCRR, 0xFFFFFFFF - initial_count); + DMTIMER_WRITE4(sc, DMT_TLDR, 0xFFFFFFFF - reload_count); + DMTIMER_WRITE4(sc, DMT_TCRR, 0xFFFFFFFF - initial_count); /* Enable overflow interrupt, and start the timer. */ - am335x_dmtimer_et_write_4(sc, DMT_IRQENABLE_SET, DMT_IRQ_OVF); - sc->et_tclr |= DMT_TCLR_START; - am335x_dmtimer_et_write_4(sc, DMT_TCLR, sc->et_tclr); + DMTIMER_WRITE4(sc, DMT_IRQENABLE_SET, DMT_IRQ_OVF); + sc->tclr |= DMT_TCLR_START; + DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr); return (0); } @@ -501,10 +468,10 @@ am335x_dmtimer_stop(struct eventtimer *et) sc = et->et_priv; /* Stop timer, disable and clear interrupt. */ - sc->et_tclr &= ~(DMT_TCLR_START | DMT_TCLR_AUTOLOAD); - am335x_dmtimer_et_write_4(sc, DMT_TCLR, sc->et_tclr); - am335x_dmtimer_et_write_4(sc, DMT_IRQENABLE_CLR, DMT_IRQ_OVF); - am335x_dmtimer_et_write_4(sc, DMT_IRQSTATUS, DMT_IRQ_OVF); + sc->tclr &= ~(DMT_TCLR_START | DMT_TCLR_AUTOLOAD); + DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr); + DMTIMER_WRITE4(sc, DMT_IRQENABLE_CLR, DMT_IRQ_OVF); + DMTIMER_WRITE4(sc, DMT_IRQSTATUS, DMT_IRQ_OVF); return (0); } @@ -516,13 +483,96 @@ am335x_dmtimer_intr(void *arg) sc = arg; /* Ack the interrupt, and invoke the callback if it's still enabled. */ - am335x_dmtimer_et_write_4(sc, DMT_IRQSTATUS, DMT_IRQ_OVF); - if (sc->et.et_active) - sc->et.et_event_cb(&sc->et, sc->et.et_arg); + DMTIMER_WRITE4(sc, DMT_IRQSTATUS, DMT_IRQ_OVF); + if (sc->func.et.et_active) + sc->func.et.et_event_cb(&sc->func.et, sc->func.et.et_arg); return (FILTER_HANDLED); } +/* + * Checks if timer is suitable to be system timer + */ +static int +am335x_dmtimer_system_compatible(device_t dev) +{ + phandle_t node; + + node = ofw_bus_get_node(dev); + if (OF_hasprop(node, "ti,timer-alwon")) + return (0); + + return (1); +} + +static int +am335x_dmtimer_init_et(struct am335x_dmtimer_softc *sc) +{ + if (am335x_dmtimer_et_sc != NULL) + return (EEXIST); + +#ifdef PPS_SYNC + if ((am335x_dmtimer_pps_module > 0) && + (!ti_hwmods_contains(sc->dev, am335x_dmtimer_pps_hwmod))) { + device_printf(sc->dev, "not PPS enabled\n"); + return (ENXIO); + } +#endif + + /* Setup eventtimer interrupt handler. */ + if (bus_setup_intr(sc->dev, sc->tmr_irq_res, INTR_TYPE_CLK, + am335x_dmtimer_intr, NULL, sc, &sc->tmr_irq_handler) != 0) { + device_printf(sc->dev, "Unable to setup the clock irq handler.\n"); + return (ENXIO); + } + + sc->func.et.et_name = "AM335x Eventtimer"; + sc->func.et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT; + sc->func.et.et_quality = 1000; + sc->func.et.et_frequency = sc->sysclk_freq; + sc->func.et.et_min_period = + ((0x00000005LLU << 32) / sc->func.et.et_frequency); + sc->func.et.et_max_period = + (0xfffffffeLLU << 32) / sc->func.et.et_frequency; + sc->func.et.et_start = am335x_dmtimer_start; + sc->func.et.et_stop = am335x_dmtimer_stop; + sc->func.et.et_priv = sc; + et_register(&sc->func.et); + + am335x_dmtimer_et_sc = sc; + + return (0); +} + +static int +am335x_dmtimer_init_tc(struct am335x_dmtimer_softc *sc) +{ + if (am335x_dmtimer_tc_sc != NULL) + return (EEXIST); + + /* Set up timecounter, start it, register it. */ + DMTIMER_WRITE4(sc, DMT_TSICR, DMT_TSICR_RESET); + while (DMTIMER_READ4(sc, DMT_TIOCP_CFG) & DMT_TIOCP_RESET) + continue; + + sc->tclr |= DMT_TCLR_START | DMT_TCLR_AUTOLOAD; + DMTIMER_WRITE4(sc, DMT_TLDR, 0); + DMTIMER_WRITE4(sc, DMT_TCRR, 0); + DMTIMER_WRITE4(sc, DMT_TCLR, sc->tclr); + + sc->func.tc.tc_name = "AM335x Timecounter"; + sc->func.tc.tc_get_timecount = am335x_dmtimer_tc_get_timecount; + sc->func.tc.tc_counter_mask = ~0u; + sc->func.tc.tc_frequency = sc->sysclk_freq; + sc->func.tc.tc_quality = 1000; + sc->func.tc.tc_priv = sc; + tc_init(&sc->func.tc); + + am335x_dmtimer_tc_sc = sc; + + return (0); +} + static int am335x_dmtimer_probe(device_t dev) { @@ -530,7 +580,8 @@ am335x_dmtimer_probe(device_t dev) if (!ofw_bus_status_okay(dev)) return (ENXIO); - if (ofw_bus_is_compatible(dev, "ti,am335x-dmtimer")) { + if (ofw_bus_is_compatible(dev, "ti,am335x-timer-1ms") || + ofw_bus_is_compatible(dev, "ti,am335x-timer")) { device_set_desc(dev, "AM335x DMTimer"); return(BUS_PROBE_DEFAULT); } @@ -542,8 +593,9 @@ static int am335x_dmtimer_attach(device_t dev) { struct am335x_dmtimer_softc *sc; - void *ihl; int err; + clk_ident_t timer_id; + int enable; /* * Note that if this routine returns an error status rather than running @@ -552,9 +604,7 @@ am335x_dmtimer_attach(device_t dev) */ sc = device_get_softc(dev); - - if (am335x_dmtimer_sc != NULL) - return (EINVAL); + sc->dev = dev; /* Get the base clock frequency. */ err = ti_prcm_clk_get_source_freq(SYS_CLK, &sc->sysclk_freq); @@ -564,82 +614,61 @@ am335x_dmtimer_attach(device_t dev) } /* Request the memory resources. */ - err = bus_alloc_resources(dev, am335x_dmtimer_mem_spec, - sc->tmr_mem_res); - if (err) { + sc->tmr_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, + &sc->tmr_mem_rid, RF_ACTIVE); + if (sc->tmr_mem_res == NULL) { device_printf(dev, "Error: could not allocate mem resources\n"); return (ENXIO); } /* Request the IRQ resources. */ - err = bus_alloc_resources(dev, am335x_dmtimer_irq_spec, - sc->tmr_irq_res); + sc->tmr_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, + &sc->tmr_irq_rid, RF_ACTIVE); if (err) { + bus_release_resource(dev, SYS_RES_MEMORY, sc->tmr_mem_rid, + sc->tmr_mem_res); device_printf(dev, "Error: could not allocate irq resources\n"); return (ENXIO); } - /* - * Use the default eventtimer. Let the PPS init routine decide which - * timer to use for the timecounter. - */ - sc->et_num = DEFAULT_ET_TIMER; - sc->tc_num = am335x_dmtimer_pps_init(dev, sc); +#ifdef PPS_SYNC + am335x_dmtimer_pps_init(dev, sc); +#endif - sc->et_memres = sc->tmr_mem_res[sc->et_num]; - sc->tc_memres = sc->tmr_mem_res[sc->tc_num]; - - /* Enable clocks and power on the chosen devices. */ - err = ti_prcm_clk_set_source(DMTIMER0_CLK + sc->et_num, SYSCLK_CLK); - err |= ti_prcm_clk_enable(DMTIMER0_CLK + sc->et_num); - err |= ti_prcm_clk_set_source(DMTIMER0_CLK + sc->tc_num, SYSCLK_CLK); - err |= ti_prcm_clk_enable(DMTIMER0_CLK + sc->tc_num); - if (err) { - device_printf(dev, "Error: could not enable timer clock\n"); - return (ENXIO); + enable = 0; + /* Try to use as a timecounter or event timer */ + if (am335x_dmtimer_system_compatible(dev)) { + if (am335x_dmtimer_init_tc(sc) == 0) + enable = 1; + else if (am335x_dmtimer_init_et(sc) == 0) + enable = 1; } - /* Setup eventtimer interrupt handler. */ - if (bus_setup_intr(dev, sc->tmr_irq_res[sc->et_num], INTR_TYPE_CLK, - am335x_dmtimer_intr, NULL, sc, &ihl) != 0) { - device_printf(dev, "Unable to setup the clock irq handler.\n"); - return (ENXIO); + if (enable) { + /* Enable clocks and power on the chosen devices. */ + timer_id = ti_hwmods_get_clock(dev); + if (timer_id == INVALID_CLK_IDENT) { + bus_release_resource(dev, SYS_RES_MEMORY, sc->tmr_mem_rid, + sc->tmr_mem_res); + bus_release_resource(dev, SYS_RES_IRQ, sc->tmr_irq_rid, + sc->tmr_irq_res); + device_printf(dev, "failed to get device id using ti,hwmods\n"); + return (ENXIO); + } + + err = ti_prcm_clk_set_source(timer_id, SYSCLK_CLK); + err |= ti_prcm_clk_enable(timer_id); + + if (err) { + bus_release_resource(dev, SYS_RES_MEMORY, sc->tmr_mem_rid, + sc->tmr_mem_res); + bus_release_resource(dev, SYS_RES_IRQ, sc->tmr_irq_rid, + sc->tmr_irq_res); + device_printf(dev, "Error: could not enable timer clock\n"); + return (ENXIO); + } } - /* Set up timecounter, start it, register it. */ - am335x_dmtimer_tc_write_4(sc, DMT_TSICR, DMT_TSICR_RESET); - while (am335x_dmtimer_tc_read_4(sc, DMT_TIOCP_CFG) & DMT_TIOCP_RESET) - continue; - - sc->tc_tclr |= DMT_TCLR_START | DMT_TCLR_AUTOLOAD; - am335x_dmtimer_tc_write_4(sc, DMT_TLDR, 0); - am335x_dmtimer_tc_write_4(sc, DMT_TCRR, 0); - am335x_dmtimer_tc_write_4(sc, DMT_TCLR, sc->tc_tclr); - - sc->tc.tc_name = "AM335x Timecounter"; - sc->tc.tc_get_timecount = am335x_dmtimer_tc_get_timecount; - sc->tc.tc_counter_mask = ~0u; - sc->tc.tc_frequency = sc->sysclk_freq; - sc->tc.tc_quality = 1000; - sc->tc.tc_priv = sc; - tc_init(&sc->tc); - - sc->et.et_name = "AM335x Eventtimer"; - sc->et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT; - sc->et.et_quality = 1000; - sc->et.et_frequency = sc->sysclk_freq; - sc->et.et_min_period = - ((0x00000005LLU << 32) / sc->et.et_frequency); - sc->et.et_max_period = - (0xfffffffeLLU << 32) / sc->et.et_frequency; - sc->et.et_start = am335x_dmtimer_start; - sc->et.et_stop = am335x_dmtimer_stop; - sc->et.et_priv = sc; - et_register(&sc->et); - - /* Store a pointer to the softc for use in DELAY(). */ - am335x_dmtimer_sc = sc; - return (0); } @@ -667,7 +696,7 @@ DELAY(int usec) int32_t counts; uint32_t first, last; - sc = am335x_dmtimer_sc; + sc = am335x_dmtimer_tc_sc; if (sc == NULL) { for (; usec > 0; usec--) @@ -680,10 +709,10 @@ DELAY(int usec) /* Get the number of times to count */ counts = (usec + 1) * (sc->sysclk_freq / 1000000); - first = am335x_dmtimer_tc_read_4(sc, DMT_TCRR); + first = DMTIMER_READ4(sc, DMT_TCRR); while (counts > 0) { - last = am335x_dmtimer_tc_read_4(sc, DMT_TCRR); + last = DMTIMER_READ4(sc, DMT_TCRR); if (last > first) { counts -= (int32_t)(last - first); } else { diff --git a/sys/arm/ti/am335x/am335x_ecap.c b/sys/arm/ti/am335x/am335x_ecap.c new file mode 100644 index 000000000000..eba5f722aedc --- /dev/null +++ b/sys/arm/ti/am335x/am335x_ecap.c @@ -0,0 +1,201 @@ +/*- + * Copyright (c) 2013 Oleksandr Tymoshenko + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include +#include + +#include "am335x_pwm.h" + +#define ECAP_TSCTR 0x00 +#define ECAP_CAP1 0x08 +#define ECAP_CAP2 0x0C +#define ECAP_CAP3 0x10 +#define ECAP_CAP4 0x14 +#define ECAP_ECCTL2 0x2A +#define ECCTL2_MODE_APWM (1 << 9) +#define ECCTL2_SYNCO_SEL (3 << 6) +#define ECCTL2_TSCTRSTOP_FREERUN (1 << 4) + +#define ECAP_READ2(_sc, reg) bus_read_2((_sc)->sc_mem_res, reg); +#define ECAP_WRITE2(_sc, reg, value) \ + bus_write_2((_sc)->sc_mem_res, reg, value); +#define ECAP_READ4(_sc, reg) bus_read_4((_sc)->sc_mem_res, reg); +#define ECAP_WRITE4(_sc, reg, value) \ + bus_write_4((_sc)->sc_mem_res, reg, value); + +#define PWM_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) +#define PWM_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) +#define PWM_LOCK_INIT(_sc) mtx_init(&(_sc)->sc_mtx, \ + device_get_nameunit(_sc->sc_dev), "am335x_ecap softc", MTX_DEF) +#define PWM_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx) + +static device_probe_t am335x_ecap_probe; +static device_attach_t am335x_ecap_attach; +static device_detach_t am335x_ecap_detach; + +struct am335x_ecap_softc { + device_t sc_dev; + struct mtx sc_mtx; + struct resource *sc_mem_res; + int sc_mem_rid; +}; + +static device_method_t am335x_ecap_methods[] = { + DEVMETHOD(device_probe, am335x_ecap_probe), + DEVMETHOD(device_attach, am335x_ecap_attach), + DEVMETHOD(device_detach, am335x_ecap_detach), + + DEVMETHOD_END +}; + +static driver_t am335x_ecap_driver = { + "am335x_ecap", + am335x_ecap_methods, + sizeof(struct am335x_ecap_softc), +}; + +static devclass_t am335x_ecap_devclass; + +/* + * API function to set period/duty cycles for ECAPx + */ +int +am335x_pwm_config_ecap(int unit, int period, int duty) +{ + device_t dev; + struct am335x_ecap_softc *sc; + uint16_t reg; + + dev = devclass_get_device(am335x_ecap_devclass, unit); + if (dev == NULL) + return (ENXIO); + + if (duty > period) + return (EINVAL); + + if (period == 0) + return (EINVAL); + + sc = device_get_softc(dev); + PWM_LOCK(sc); + + reg = ECAP_READ2(sc, ECAP_ECCTL2); + reg |= ECCTL2_MODE_APWM | ECCTL2_TSCTRSTOP_FREERUN | ECCTL2_SYNCO_SEL; + ECAP_WRITE2(sc, ECAP_ECCTL2, reg); + + /* CAP3 in APWM mode is APRD shadow register */ + ECAP_WRITE4(sc, ECAP_CAP3, period - 1); + + /* CAP4 in APWM mode is ACMP shadow register */ + ECAP_WRITE4(sc, ECAP_CAP4, duty); + /* Restart counter */ + ECAP_WRITE4(sc, ECAP_TSCTR, 0); + + PWM_UNLOCK(sc); + + return (0); +} + +static int +am335x_ecap_probe(device_t dev) +{ + + if (!ofw_bus_status_okay(dev)) + return (ENXIO); + + if (!ofw_bus_is_compatible(dev, "ti,am33xx-ecap")) + return (ENXIO); + + device_set_desc(dev, "AM335x eCAP"); + + return (BUS_PROBE_DEFAULT); +} + +static int +am335x_ecap_attach(device_t dev) +{ + struct am335x_ecap_softc *sc; + + sc = device_get_softc(dev); + sc->sc_dev = dev; + + PWM_LOCK_INIT(sc); + + sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, + &sc->sc_mem_rid, RF_ACTIVE); + if (sc->sc_mem_res == NULL) { + device_printf(dev, "cannot allocate memory resources\n"); + goto fail; + } + + return (0); + +fail: + PWM_LOCK_DESTROY(sc); + return (ENXIO); +} + +static int +am335x_ecap_detach(device_t dev) +{ + struct am335x_ecap_softc *sc; + + sc = device_get_softc(dev); + + PWM_LOCK(sc); + if (sc->sc_mem_res) + bus_release_resource(dev, SYS_RES_MEMORY, + sc->sc_mem_rid, sc->sc_mem_res); + PWM_UNLOCK(sc); + + PWM_LOCK_DESTROY(sc); + + + return (0); +} + +DRIVER_MODULE(am335x_ecap, am335x_pwmss, am335x_ecap_driver, am335x_ecap_devclass, 0, 0); +MODULE_VERSION(am335x_ecap, 1); +MODULE_DEPEND(am335x_ecap, am335x_pwmss, 1, 1, 1); diff --git a/sys/arm/ti/am335x/am335x_pwm.c b/sys/arm/ti/am335x/am335x_ehrpwm.c similarity index 64% rename from sys/arm/ti/am335x/am335x_pwm.c rename to sys/arm/ti/am335x/am335x_ehrpwm.c index b544d643562b..331331fcd94c 100644 --- a/sys/arm/ti/am335x/am335x_pwm.c +++ b/sys/arm/ti/am335x/am335x_ehrpwm.c @@ -46,11 +46,7 @@ __FBSDID("$FreeBSD$"); #include #include -#include -#include - #include "am335x_pwm.h" -#include "am335x_scm.h" /* In ticks */ #define DEFAULT_PWM_PERIOD 1000 @@ -59,47 +55,12 @@ __FBSDID("$FreeBSD$"); #define PWM_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) #define PWM_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) #define PWM_LOCK_INIT(_sc) mtx_init(&(_sc)->sc_mtx, \ - device_get_nameunit(_sc->sc_dev), "am335x_pwm softc", MTX_DEF) + device_get_nameunit(_sc->sc_dev), "am335x_ehrpwm softc", MTX_DEF) #define PWM_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx) -static struct resource_spec am335x_pwm_mem_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, /* PWMSS */ - { SYS_RES_MEMORY, 1, RF_ACTIVE }, /* eCAP */ - { SYS_RES_MEMORY, 2, RF_ACTIVE }, /* eQEP */ - { SYS_RES_MEMORY, 3, RF_ACTIVE }, /*ePWM */ - { -1, 0, 0 } -}; - -#define PWMSS_READ4(_sc, reg) bus_read_4((_sc)->sc_mem_res[0], reg); -#define PWMSS_WRITE4(_sc, reg, value) \ - bus_write_4((_sc)->sc_mem_res[0], reg, value); - -#define ECAP_READ2(_sc, reg) bus_read_2((_sc)->sc_mem_res[1], reg); -#define ECAP_WRITE2(_sc, reg, value) \ - bus_write_2((_sc)->sc_mem_res[1], reg, value); -#define ECAP_READ4(_sc, reg) bus_read_4((_sc)->sc_mem_res[1], reg); -#define ECAP_WRITE4(_sc, reg, value) \ - bus_write_4((_sc)->sc_mem_res[1], reg, value); - -#define EPWM_READ2(_sc, reg) bus_read_2((_sc)->sc_mem_res[3], reg); +#define EPWM_READ2(_sc, reg) bus_read_2((_sc)->sc_mem_res, reg); #define EPWM_WRITE2(_sc, reg, value) \ - bus_write_2((_sc)->sc_mem_res[3], reg, value); - -#define PWMSS_IDVER 0x00 -#define PWMSS_SYSCONFIG 0x04 -#define PWMSS_CLKCONFIG 0x08 -#define CLKCONFIG_EPWMCLK_EN (1 << 8) -#define PWMSS_CLKSTATUS 0x0C - -#define ECAP_TSCTR 0x00 -#define ECAP_CAP1 0x08 -#define ECAP_CAP2 0x0C -#define ECAP_CAP3 0x10 -#define ECAP_CAP4 0x14 -#define ECAP_ECCTL2 0x2A -#define ECCTL2_MODE_APWM (1 << 9) -#define ECCTL2_SYNCO_SEL (3 << 6) -#define ECCTL2_TSCTRSTOP_FREERUN (1 << 4) + bus_write_2((_sc)->sc_mem_res, reg, value); #define EPWM_TBCTL 0x00 #define TBCTL_FREERUN (2 << 14) @@ -169,17 +130,17 @@ static struct resource_spec am335x_pwm_mem_spec[] = { #define HRCTL_DELMODE_FALL 2 #define HRCTL_DELMODE_RISE 1 -static device_probe_t am335x_pwm_probe; -static device_attach_t am335x_pwm_attach; -static device_detach_t am335x_pwm_detach; - -static int am335x_pwm_clkdiv[8] = { 1, 2, 4, 8, 16, 32, 64, 128 }; +static device_probe_t am335x_ehrpwm_probe; +static device_attach_t am335x_ehrpwm_attach; +static device_detach_t am335x_ehrpwm_detach; -struct am335x_pwm_softc { +static int am335x_ehrpwm_clkdiv[8] = { 1, 2, 4, 8, 16, 32, 64, 128 }; + +struct am335x_ehrpwm_softc { device_t sc_dev; struct mtx sc_mtx; - struct resource *sc_mem_res[4]; - int sc_id; + struct resource *sc_mem_res; + int sc_mem_rid; /* sysctl for configuration */ int sc_pwm_clkdiv; int sc_pwm_freq; @@ -193,79 +154,39 @@ struct am335x_pwm_softc { uint32_t sc_pwm_dutyB; }; -static device_method_t am335x_pwm_methods[] = { - DEVMETHOD(device_probe, am335x_pwm_probe), - DEVMETHOD(device_attach, am335x_pwm_attach), - DEVMETHOD(device_detach, am335x_pwm_detach), +static device_method_t am335x_ehrpwm_methods[] = { + DEVMETHOD(device_probe, am335x_ehrpwm_probe), + DEVMETHOD(device_attach, am335x_ehrpwm_attach), + DEVMETHOD(device_detach, am335x_ehrpwm_detach), DEVMETHOD_END }; -static driver_t am335x_pwm_driver = { - "am335x_pwm", - am335x_pwm_methods, - sizeof(struct am335x_pwm_softc), +static driver_t am335x_ehrpwm_driver = { + "am335x_ehrpwm", + am335x_ehrpwm_methods, + sizeof(struct am335x_ehrpwm_softc), }; -static devclass_t am335x_pwm_devclass; - -/* - * API function to set period/duty cycles for ECASx - */ -int -am335x_pwm_config_ecas(int unit, int period, int duty) -{ - device_t dev; - struct am335x_pwm_softc *sc; - uint16_t reg; - - dev = devclass_get_device(am335x_pwm_devclass, unit); - if (dev == NULL) - return (ENXIO); - - if (duty > period) - return (EINVAL); - - if (period == 0) - return (EINVAL); - - sc = device_get_softc(dev); - PWM_LOCK(sc); - - reg = ECAP_READ2(sc, ECAP_ECCTL2); - reg |= ECCTL2_MODE_APWM | ECCTL2_TSCTRSTOP_FREERUN | ECCTL2_SYNCO_SEL; - ECAP_WRITE2(sc, ECAP_ECCTL2, reg); - - /* CAP3 in APWM mode is APRD shadow register */ - ECAP_WRITE4(sc, ECAP_CAP3, period - 1); - - /* CAP4 in APWM mode is ACMP shadow register */ - ECAP_WRITE4(sc, ECAP_CAP4, duty); - /* Restart counter */ - ECAP_WRITE4(sc, ECAP_TSCTR, 0); - - PWM_UNLOCK(sc); - - return (0); -} +static devclass_t am335x_ehrpwm_devclass; static void -am335x_pwm_freq(struct am335x_pwm_softc *sc) +am335x_ehrpwm_freq(struct am335x_ehrpwm_softc *sc) { int clkdiv; - clkdiv = am335x_pwm_clkdiv[sc->sc_pwm_clkdiv]; + clkdiv = am335x_ehrpwm_clkdiv[sc->sc_pwm_clkdiv]; sc->sc_pwm_freq = PWM_CLOCK / (1 * clkdiv) / sc->sc_pwm_period; } static int -am335x_pwm_sysctl_freq(SYSCTL_HANDLER_ARGS) +am335x_ehrpwm_sysctl_freq(SYSCTL_HANDLER_ARGS) { int clkdiv, error, freq, i, period; - struct am335x_pwm_softc *sc; + struct am335x_ehrpwm_softc *sc; uint32_t reg; - sc = (struct am335x_pwm_softc *)arg1; + sc = (struct am335x_ehrpwm_softc *)arg1; PWM_LOCK(sc); freq = sc->sc_pwm_freq; @@ -280,8 +201,8 @@ am335x_pwm_sysctl_freq(SYSCTL_HANDLER_ARGS) PWM_LOCK(sc); if (freq != sc->sc_pwm_freq) { - for (i = nitems(am335x_pwm_clkdiv) - 1; i >= 0; i--) { - clkdiv = am335x_pwm_clkdiv[i]; + for (i = nitems(am335x_ehrpwm_clkdiv) - 1; i >= 0; i--) { + clkdiv = am335x_ehrpwm_clkdiv[i]; period = PWM_CLOCK / clkdiv / freq; if (period > USHRT_MAX) break; @@ -300,7 +221,7 @@ am335x_pwm_sysctl_freq(SYSCTL_HANDLER_ARGS) EPWM_WRITE2(sc, EPWM_TBCTL, reg); /* Update the period settings. */ EPWM_WRITE2(sc, EPWM_TBPRD, sc->sc_pwm_period - 1); - am335x_pwm_freq(sc); + am335x_ehrpwm_freq(sc); } PWM_UNLOCK(sc); @@ -308,16 +229,16 @@ am335x_pwm_sysctl_freq(SYSCTL_HANDLER_ARGS) } static int -am335x_pwm_sysctl_clkdiv(SYSCTL_HANDLER_ARGS) +am335x_ehrpwm_sysctl_clkdiv(SYSCTL_HANDLER_ARGS) { int error, i, clkdiv; - struct am335x_pwm_softc *sc; + struct am335x_ehrpwm_softc *sc; uint32_t reg; - sc = (struct am335x_pwm_softc *)arg1; + sc = (struct am335x_ehrpwm_softc *)arg1; PWM_LOCK(sc); - clkdiv = am335x_pwm_clkdiv[sc->sc_pwm_clkdiv]; + clkdiv = am335x_ehrpwm_clkdiv[sc->sc_pwm_clkdiv]; PWM_UNLOCK(sc); error = sysctl_handle_int(oidp, &clkdiv, sizeof(clkdiv), req); @@ -325,16 +246,16 @@ am335x_pwm_sysctl_clkdiv(SYSCTL_HANDLER_ARGS) return (error); PWM_LOCK(sc); - if (clkdiv != am335x_pwm_clkdiv[sc->sc_pwm_clkdiv]) { - for (i = 0; i < nitems(am335x_pwm_clkdiv); i++) - if (clkdiv >= am335x_pwm_clkdiv[i]) + if (clkdiv != am335x_ehrpwm_clkdiv[sc->sc_pwm_clkdiv]) { + for (i = 0; i < nitems(am335x_ehrpwm_clkdiv); i++) + if (clkdiv >= am335x_ehrpwm_clkdiv[i]) sc->sc_pwm_clkdiv = i; reg = EPWM_READ2(sc, EPWM_TBCTL); reg &= ~TBCTL_CLKDIV_MASK; reg |= TBCTL_CLKDIV(sc->sc_pwm_clkdiv); EPWM_WRITE2(sc, EPWM_TBCTL, reg); - am335x_pwm_freq(sc); + am335x_ehrpwm_freq(sc); } PWM_UNLOCK(sc); @@ -342,12 +263,12 @@ am335x_pwm_sysctl_clkdiv(SYSCTL_HANDLER_ARGS) } static int -am335x_pwm_sysctl_duty(SYSCTL_HANDLER_ARGS) +am335x_ehrpwm_sysctl_duty(SYSCTL_HANDLER_ARGS) { - struct am335x_pwm_softc *sc = (struct am335x_pwm_softc*)arg1; + struct am335x_ehrpwm_softc *sc = (struct am335x_ehrpwm_softc*)arg1; int error; uint32_t duty; - + if (oidp == sc->sc_chanA_oid) duty = sc->sc_pwm_dutyA; else @@ -377,12 +298,12 @@ am335x_pwm_sysctl_duty(SYSCTL_HANDLER_ARGS) } static int -am335x_pwm_sysctl_period(SYSCTL_HANDLER_ARGS) +am335x_ehrpwm_sysctl_period(SYSCTL_HANDLER_ARGS) { - struct am335x_pwm_softc *sc = (struct am335x_pwm_softc*)arg1; + struct am335x_ehrpwm_softc *sc = (struct am335x_ehrpwm_softc*)arg1; int error; uint32_t period; - + period = sc->sc_pwm_period; error = sysctl_handle_int(oidp, &period, 0, req); @@ -404,85 +325,70 @@ am335x_pwm_sysctl_period(SYSCTL_HANDLER_ARGS) /* Update the period settings. */ sc->sc_pwm_period = period; EPWM_WRITE2(sc, EPWM_TBPRD, period - 1); - am335x_pwm_freq(sc); + am335x_ehrpwm_freq(sc); PWM_UNLOCK(sc); return (error); } static int -am335x_pwm_probe(device_t dev) +am335x_ehrpwm_probe(device_t dev) { if (!ofw_bus_status_okay(dev)) return (ENXIO); - if (!ofw_bus_is_compatible(dev, "ti,am335x-pwm")) + if (!ofw_bus_is_compatible(dev, "ti,am33xx-ehrpwm")) return (ENXIO); - device_set_desc(dev, "AM335x PWM"); + device_set_desc(dev, "AM335x EHRPWM"); return (BUS_PROBE_DEFAULT); } static int -am335x_pwm_attach(device_t dev) +am335x_ehrpwm_attach(device_t dev) { - struct am335x_pwm_softc *sc; - int err; + struct am335x_ehrpwm_softc *sc; uint32_t reg; - phandle_t node; - pcell_t did; struct sysctl_ctx_list *ctx; struct sysctl_oid *tree; sc = device_get_softc(dev); sc->sc_dev = dev; - /* Get the PWM module id */ - node = ofw_bus_get_node(dev); - if ((OF_getprop(node, "pwm-device-id", &did, sizeof(did))) <= 0) { - device_printf(dev, "missing pwm-device-id attribute in FDT\n"); - return (ENXIO); - } - sc->sc_id = fdt32_to_cpu(did); PWM_LOCK_INIT(sc); - err = bus_alloc_resources(dev, am335x_pwm_mem_spec, - sc->sc_mem_res); - if (err) { + sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, + &sc->sc_mem_rid, RF_ACTIVE); + if (sc->sc_mem_res == NULL) { device_printf(dev, "cannot allocate memory resources\n"); goto fail; } - ti_prcm_clk_enable(PWMSS0_CLK + sc->sc_id); - ti_scm_reg_read_4(SCM_PWMSS_CTRL, ®); - reg |= (1 << sc->sc_id); - ti_scm_reg_write_4(SCM_PWMSS_CTRL, reg); - /* Init backlight interface */ ctx = device_get_sysctl_ctx(sc->sc_dev); tree = device_get_sysctl_tree(sc->sc_dev); sc->sc_clkdiv_oid = SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "clkdiv", CTLTYPE_INT | CTLFLAG_RW, sc, 0, - am335x_pwm_sysctl_clkdiv, "I", "PWM clock prescaler"); + am335x_ehrpwm_sysctl_clkdiv, "I", "PWM clock prescaler"); sc->sc_freq_oid = SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "freq", CTLTYPE_INT | CTLFLAG_RW, sc, 0, - am335x_pwm_sysctl_freq, "I", "PWM frequency"); + am335x_ehrpwm_sysctl_freq, "I", "PWM frequency"); sc->sc_period_oid = SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "period", CTLTYPE_INT | CTLFLAG_RW, sc, 0, - am335x_pwm_sysctl_period, "I", "PWM period"); + am335x_ehrpwm_sysctl_period, "I", "PWM period"); sc->sc_chanA_oid = SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "dutyA", CTLTYPE_INT | CTLFLAG_RW, sc, 0, - am335x_pwm_sysctl_duty, "I", "Channel A duty cycles"); + am335x_ehrpwm_sysctl_duty, "I", "Channel A duty cycles"); sc->sc_chanB_oid = SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "dutyB", CTLTYPE_INT | CTLFLAG_RW, sc, 0, - am335x_pwm_sysctl_duty, "I", "Channel B duty cycles"); + am335x_ehrpwm_sysctl_duty, "I", "Channel B duty cycles"); /* CONFIGURE EPWM1 */ reg = EPWM_READ2(sc, EPWM_TBCTL); @@ -492,7 +398,7 @@ am335x_pwm_attach(device_t dev) sc->sc_pwm_period = DEFAULT_PWM_PERIOD; sc->sc_pwm_dutyA = 0; sc->sc_pwm_dutyB = 0; - am335x_pwm_freq(sc); + am335x_ehrpwm_freq(sc); EPWM_WRITE2(sc, EPWM_TBPRD, sc->sc_pwm_period - 1); EPWM_WRITE2(sc, EPWM_CMPA, sc->sc_pwm_dutyA); @@ -512,24 +418,24 @@ am335x_pwm_attach(device_t dev) return (0); fail: PWM_LOCK_DESTROY(sc); - if (sc->sc_mem_res[0]) - bus_release_resources(dev, am335x_pwm_mem_spec, - sc->sc_mem_res); + if (sc->sc_mem_res) + bus_release_resource(dev, SYS_RES_MEMORY, + sc->sc_mem_rid, sc->sc_mem_res); return(ENXIO); } static int -am335x_pwm_detach(device_t dev) +am335x_ehrpwm_detach(device_t dev) { - struct am335x_pwm_softc *sc; + struct am335x_ehrpwm_softc *sc; sc = device_get_softc(dev); PWM_LOCK(sc); - if (sc->sc_mem_res[0]) - bus_release_resources(dev, am335x_pwm_mem_spec, - sc->sc_mem_res); + if (sc->sc_mem_res) + bus_release_resource(dev, SYS_RES_MEMORY, + sc->sc_mem_rid, sc->sc_mem_res); PWM_UNLOCK(sc); PWM_LOCK_DESTROY(sc); @@ -537,6 +443,6 @@ am335x_pwm_detach(device_t dev) return (0); } -DRIVER_MODULE(am335x_pwm, simplebus, am335x_pwm_driver, am335x_pwm_devclass, 0, 0); -MODULE_VERSION(am335x_pwm, 1); -MODULE_DEPEND(am335x_pwm, simplebus, 1, 1, 1); +DRIVER_MODULE(am335x_ehrpwm, am335x_pwmss, am335x_ehrpwm_driver, am335x_ehrpwm_devclass, 0, 0); +MODULE_VERSION(am335x_ehrpwm, 1); +MODULE_DEPEND(am335x_ehrpwm, am335x_pwmss, 1, 1, 1); diff --git a/sys/arm/ti/am335x/am335x_gpio.c b/sys/arm/ti/am335x/am335x_gpio.c index 6aded043dd05..a635c3733b15 100644 --- a/sys/arm/ti/am335x/am335x_gpio.c +++ b/sys/arm/ti/am335x/am335x_gpio.c @@ -51,7 +51,7 @@ __FBSDID("$FreeBSD$"); #include #include -#include +#include #include @@ -86,6 +86,8 @@ static int am335x_gpio_set_flags(device_t dev, uint32_t gpio, uint32_t flags) { unsigned int state = 0; + struct ti_gpio_softc *sc = device_get_softc(dev); + if (flags & GPIO_PIN_OUTPUT) { if (flags & GPIO_PIN_PULLUP) state = PADCONF_OUTPUT_PULLUP; @@ -99,15 +101,16 @@ am335x_gpio_set_flags(device_t dev, uint32_t gpio, uint32_t flags) else state = PADCONF_INPUT; } - return ti_scm_padconf_set_gpiomode(gpio, state); + return ti_pinmux_padconf_set_gpiomode(sc->sc_bank*32 + gpio, state); } static int am335x_gpio_get_flags(device_t dev, uint32_t gpio, uint32_t *flags) { unsigned int state; + struct ti_gpio_softc *sc = device_get_softc(dev); - if (ti_scm_padconf_get_gpiomode(gpio, &state) != 0) { + if (ti_pinmux_padconf_get_gpiomode(sc->sc_bank*32 + gpio, &state) != 0) { *flags = 0; return (EINVAL); } else { diff --git a/sys/arm/ti/am335x/am335x_lcd.c b/sys/arm/ti/am335x/am335x_lcd.c index 053567ec3086..501042a9fcd2 100644 --- a/sys/arm/ti/am335x/am335x_lcd.c +++ b/sys/arm/ti/am335x/am335x_lcd.c @@ -242,7 +242,7 @@ am335x_lcd_sysctl_backlight(SYSCTL_HANDLER_ARGS) backlight = 100; LCD_LOCK(sc); - error = am335x_pwm_config_ecas(PWM_UNIT, PWM_PERIOD, + error = am335x_pwm_config_ecap(PWM_UNIT, PWM_PERIOD, backlight*PWM_PERIOD/100); if (error == 0) sc->sc_backlight = backlight; @@ -252,12 +252,10 @@ am335x_lcd_sysctl_backlight(SYSCTL_HANDLER_ARGS) } static int -am335x_read_panel_property(device_t dev, const char *name, uint32_t *val) +am335x_read_property(device_t dev, phandle_t node, const char *name, uint32_t *val) { - phandle_t node; pcell_t cell; - node = ofw_bus_get_node(dev); if ((OF_getprop(node, name, &cell, sizeof(cell))) <= 0) { device_printf(dev, "missing '%s' attribute in LCD panel info\n", name); @@ -270,85 +268,116 @@ am335x_read_panel_property(device_t dev, const char *name, uint32_t *val) } static int -am335x_read_panel_info(device_t dev, struct panel_info *panel) +am335x_read_timing(device_t dev, phandle_t node, struct panel_info *panel) { int error; + phandle_t timings_node, timing_node, native; + + timings_node = ofw_bus_find_child(node, "display-timings"); + if (timings_node == 0) { + device_printf(dev, "no \"display-timings\" node\n"); + return (-1); + } + + if (OF_searchencprop(timings_node, "native-mode", &native, + sizeof(native)) == -1) { + device_printf(dev, "no \"native-mode\" reference in \"timings\" node\n"); + return (-1); + } + + timing_node = OF_node_from_xref(native); error = 0; - if ((error = am335x_read_panel_property(dev, - "panel_width", &panel->panel_width))) + if ((error = am335x_read_property(dev, timing_node, + "hactive", &panel->panel_width))) goto out; - if ((error = am335x_read_panel_property(dev, - "panel_height", &panel->panel_height))) + if ((error = am335x_read_property(dev, timing_node, + "vactive", &panel->panel_height))) goto out; - if ((error = am335x_read_panel_property(dev, - "panel_hfp", &panel->panel_hfp))) + if ((error = am335x_read_property(dev, timing_node, + "hfront-porch", &panel->panel_hfp))) goto out; - if ((error = am335x_read_panel_property(dev, - "panel_hbp", &panel->panel_hbp))) + if ((error = am335x_read_property(dev, timing_node, + "hback-porch", &panel->panel_hbp))) goto out; - if ((error = am335x_read_panel_property(dev, - "panel_hsw", &panel->panel_hsw))) + if ((error = am335x_read_property(dev, timing_node, + "hsync-len", &panel->panel_hsw))) goto out; - if ((error = am335x_read_panel_property(dev, - "panel_vfp", &panel->panel_vfp))) + if ((error = am335x_read_property(dev, timing_node, + "vfront-porch", &panel->panel_vfp))) goto out; - if ((error = am335x_read_panel_property(dev, - "panel_vbp", &panel->panel_vbp))) + if ((error = am335x_read_property(dev, timing_node, + "vback-porch", &panel->panel_vbp))) goto out; - if ((error = am335x_read_panel_property(dev, - "panel_vsw", &panel->panel_vsw))) + if ((error = am335x_read_property(dev, timing_node, + "vsync-len", &panel->panel_vsw))) goto out; - if ((error = am335x_read_panel_property(dev, - "panel_pxl_clk", &panel->panel_pxl_clk))) + if ((error = am335x_read_property(dev, timing_node, + "clock-frequency", &panel->panel_pxl_clk))) goto out; - if ((error = am335x_read_panel_property(dev, - "panel_invert_pxl_clk", &panel->panel_invert_pxl_clk))) + if ((error = am335x_read_property(dev, timing_node, + "pixelclk-active", &panel->pixelclk_active))) goto out; - if ((error = am335x_read_panel_property(dev, - "ac_bias", &panel->ac_bias))) + if ((error = am335x_read_property(dev, timing_node, + "hsync-active", &panel->hsync_active))) goto out; - if ((error = am335x_read_panel_property(dev, - "ac_bias_intrpt", &panel->ac_bias_intrpt))) + if ((error = am335x_read_property(dev, timing_node, + "vsync-active", &panel->vsync_active))) goto out; - if ((error = am335x_read_panel_property(dev, - "dma_burst_sz", &panel->dma_burst_sz))) +out: + return (error); +} + +static int +am335x_read_panel_info(device_t dev, phandle_t node, struct panel_info *panel) +{ + int error; + phandle_t panel_info_node; + + panel_info_node = ofw_bus_find_child(node, "panel-info"); + if (panel_info_node == 0) + return (-1); + + error = 0; + + if ((error = am335x_read_property(dev, panel_info_node, + "ac-bias", &panel->ac_bias))) goto out; - if ((error = am335x_read_panel_property(dev, + if ((error = am335x_read_property(dev, panel_info_node, + "ac-bias-intrpt", &panel->ac_bias_intrpt))) + goto out; + + if ((error = am335x_read_property(dev, panel_info_node, + "dma-burst-sz", &panel->dma_burst_sz))) + goto out; + + if ((error = am335x_read_property(dev, panel_info_node, "bpp", &panel->bpp))) goto out; - if ((error = am335x_read_panel_property(dev, + if ((error = am335x_read_property(dev, panel_info_node, "fdd", &panel->fdd))) goto out; - if ((error = am335x_read_panel_property(dev, - "invert_line_clock", &panel->invert_line_clock))) + if ((error = am335x_read_property(dev, panel_info_node, + "sync-edge", &panel->sync_edge))) goto out; - if ((error = am335x_read_panel_property(dev, - "invert_frm_clock", &panel->invert_frm_clock))) - goto out; - - if ((error = am335x_read_panel_property(dev, - "sync_edge", &panel->sync_edge))) - goto out; - - error = am335x_read_panel_property(dev, - "sync_ctrl", &panel->sync_ctrl); + error = am335x_read_property(dev, panel_info_node, + "sync-ctrl", &panel->sync_ctrl); out: return (error); @@ -423,7 +452,7 @@ am335x_lcd_probe(device_t dev) if (!ofw_bus_status_okay(dev)) return (ENXIO); - if (!ofw_bus_is_compatible(dev, "ti,am335x-lcd")) + if (!ofw_bus_is_compatible(dev, "ti,am33xx-tilcdc")) return (ENXIO); device_set_desc(dev, "AM335x LCD controller"); @@ -454,12 +483,32 @@ am335x_lcd_attach(device_t dev) uint32_t hbp, hfp, hsw; uint32_t vbp, vfp, vsw; uint32_t width, height; + phandle_t root, panel_node; sc = device_get_softc(dev); sc->sc_dev = dev; - if (am335x_read_panel_info(dev, &panel)) + root = OF_finddevice("/"); + if (root == 0) { + device_printf(dev, "failed to get FDT root node\n"); return (ENXIO); + } + + panel_node = fdt_find_compatible(root, "ti,tilcdc,panel", 1); + if (panel_node == 0) { + device_printf(dev, "failed to find compatible panel in FDT blob\n"); + return (ENXIO); + } + + if (am335x_read_panel_info(dev, panel_node, &panel)) { + device_printf(dev, "failed to read panel info\n"); + return (ENXIO); + } + + if (am335x_read_timing(dev, panel_node, &panel)) { + device_printf(dev, "failed to read timings\n"); + return (ENXIO); + } int ref_freq = 0; ti_prcm_clk_enable(LCDC_CLK); @@ -593,11 +642,11 @@ am335x_lcd_attach(device_t dev) timing2 |= RASTER_TIMING_2_PHSVS_RISE; else timing2 |= RASTER_TIMING_2_PHSVS_FALL; - if (panel.invert_line_clock) + if (panel.hsync_active == 0) timing2 |= RASTER_TIMING_2_IHS; - if (panel.invert_frm_clock) + if (panel.vsync_active == 0) timing2 |= RASTER_TIMING_2_IVS; - if (panel.panel_invert_pxl_clk) + if (panel.pixelclk_active == 0) timing2 |= RASTER_TIMING_2_IPC; /* AC bias */ @@ -676,7 +725,7 @@ am335x_lcd_attach(device_t dev) am335x_lcd_sysctl_backlight, "I", "LCD backlight"); sc->sc_backlight = 0; /* Check if eCAS interface is available at this point */ - if (am335x_pwm_config_ecas(PWM_UNIT, + if (am335x_pwm_config_ecap(PWM_UNIT, PWM_PERIOD, PWM_PERIOD) == 0) sc->sc_backlight = 100; diff --git a/sys/arm/ti/am335x/am335x_lcd.h b/sys/arm/ti/am335x/am335x_lcd.h index afc8901915d6..e3c82db85a70 100644 --- a/sys/arm/ti/am335x/am335x_lcd.h +++ b/sys/arm/ti/am335x/am335x_lcd.h @@ -42,12 +42,12 @@ struct panel_info { uint32_t dma_burst_sz; uint32_t bpp; uint32_t fdd; - uint32_t invert_line_clock; - uint32_t invert_frm_clock; + uint32_t hsync_active; + uint32_t vsync_active; uint32_t sync_edge; uint32_t sync_ctrl; uint32_t panel_pxl_clk; - uint32_t panel_invert_pxl_clk; + uint32_t pixelclk_active; }; int am335x_lcd_syscons_setup(vm_offset_t vaddr, vm_paddr_t paddr, diff --git a/sys/arm/ti/am335x/am335x_musb.c b/sys/arm/ti/am335x/am335x_musb.c new file mode 100644 index 000000000000..b92be0d20dec --- /dev/null +++ b/sys/arm/ti/am335x/am335x_musb.c @@ -0,0 +1,417 @@ +/*- + * Copyright (c) 2013 Oleksandr Tymoshenko + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include + +#define USB_DEBUG_VAR usbssdebug + +#include +#include +#include +#include + +#include + +#include +#include +#include + +#define USBCTRL_REV 0x00 +#define USBCTRL_CTRL 0x14 +#define USBCTRL_STAT 0x18 +#define USBCTRL_IRQ_STAT0 0x30 +#define IRQ_STAT0_RXSHIFT 16 +#define IRQ_STAT0_TXSHIFT 0 +#define USBCTRL_IRQ_STAT1 0x34 +#define IRQ_STAT1_DRVVBUS (1 << 8) +#define USBCTRL_INTEN_SET0 0x38 +#define USBCTRL_INTEN_SET1 0x3C +#define USBCTRL_INTEN_USB_ALL 0x1ff +#define USBCTRL_INTEN_USB_SOF (1 << 3) +#define USBCTRL_INTEN_CLR0 0x40 +#define USBCTRL_INTEN_CLR1 0x44 +#define USBCTRL_UTMI 0xE0 +#define USBCTRL_UTMI_FSDATAEXT (1 << 1) +#define USBCTRL_MODE 0xE8 +#define USBCTRL_MODE_IDDIG (1 << 8) +#define USBCTRL_MODE_IDDIGMUX (1 << 7) + +/* USBSS resource + 2 MUSB ports */ + +#define RES_USBCORE 0 +#define RES_USBCTRL 1 + +#define USB_WRITE4(sc, idx, reg, val) do { \ + bus_write_4((sc)->sc_mem_res[idx], (reg), (val)); \ +} while (0) + +#define USB_READ4(sc, idx, reg) bus_read_4((sc)->sc_mem_res[idx], (reg)) + +#define USBCTRL_WRITE4(sc, reg, val) \ + USB_WRITE4((sc), RES_USBCTRL, (reg), (val)) +#define USBCTRL_READ4(sc, reg) \ + USB_READ4((sc), RES_USBCTRL, (reg)) + +static struct resource_spec am335x_musbotg_mem_spec[] = { + { SYS_RES_MEMORY, 0, RF_ACTIVE }, + { SYS_RES_MEMORY, 1, RF_ACTIVE }, + { -1, 0, 0 } +}; + +#ifdef USB_DEBUG +static int usbssdebug = 0; + +static SYSCTL_NODE(_hw_usb, OID_AUTO, am335x_usbss, CTLFLAG_RW, 0, "AM335x USBSS"); +SYSCTL_INT(_hw_usb_am335x_usbss, OID_AUTO, debug, CTLFLAG_RW, + &usbssdebug, 0, "Debug level"); +#endif + +static device_probe_t musbotg_probe; +static device_attach_t musbotg_attach; +static device_detach_t musbotg_detach; + +struct musbotg_super_softc { + struct musbotg_softc sc_otg; + struct resource *sc_mem_res[2]; + int sc_irq_rid; +}; + +static void +musbotg_vbus_poll(struct musbotg_super_softc *sc) +{ + uint32_t stat; + + if (sc->sc_otg.sc_mode == MUSB2_DEVICE_MODE) + musbotg_vbus_interrupt(&sc->sc_otg, 1); + else { + stat = USBCTRL_READ4(sc, USBCTRL_STAT); + musbotg_vbus_interrupt(&sc->sc_otg, stat & 1); + } +} + +/* + * Arg to musbotg_clocks_on and musbot_clocks_off is + * a uint32_t * pointing to the SCM register offset. + */ +static uint32_t USB_CTRL[] = {SCM_USB_CTRL0, SCM_USB_CTRL1}; + +static void +musbotg_clocks_on(void *arg) +{ + struct musbotg_softc *sc; + uint32_t c, reg; + + sc = arg; + reg = USB_CTRL[sc->sc_id]; + + ti_scm_reg_read_4(reg, &c); + c &= ~3; /* Enable power */ + c |= 1 << 19; /* VBUS detect enable */ + c |= 1 << 20; /* Session end enable */ + ti_scm_reg_write_4(reg, c); +} + +static void +musbotg_clocks_off(void *arg) +{ + struct musbotg_softc *sc; + uint32_t c, reg; + + sc = arg; + reg = USB_CTRL[sc->sc_id]; + + /* Disable power to PHY */ + ti_scm_reg_read_4(reg, &c); + ti_scm_reg_write_4(reg, c | 3); +} + +static void +musbotg_ep_int_set(struct musbotg_softc *sc, int ep, int on) +{ + struct musbotg_super_softc *ssc = sc->sc_platform_data; + uint32_t epmask; + + epmask = ((1 << ep) << IRQ_STAT0_RXSHIFT); + epmask |= ((1 << ep) << IRQ_STAT0_TXSHIFT); + if (on) + USBCTRL_WRITE4(ssc, USBCTRL_INTEN_SET0, epmask); + else + USBCTRL_WRITE4(ssc, USBCTRL_INTEN_CLR0, epmask); +} + +static void +musbotg_wrapper_interrupt(void *arg) +{ + struct musbotg_softc *sc = arg; + struct musbotg_super_softc *ssc = sc->sc_platform_data; + uint32_t stat, stat0, stat1; + + stat = USBCTRL_READ4(ssc, USBCTRL_STAT); + stat0 = USBCTRL_READ4(ssc, USBCTRL_IRQ_STAT0); + stat1 = USBCTRL_READ4(ssc, USBCTRL_IRQ_STAT1); + if (stat0) + USBCTRL_WRITE4(ssc, USBCTRL_IRQ_STAT0, stat0); + if (stat1) + USBCTRL_WRITE4(ssc, USBCTRL_IRQ_STAT1, stat1); + + DPRINTFN(4, "port%d: stat0=%08x stat1=%08x, stat=%08x\n", + sc->sc_id, stat0, stat1, stat); + + if (stat1 & IRQ_STAT1_DRVVBUS) + musbotg_vbus_interrupt(sc, stat & 1); + + musbotg_interrupt(arg, ((stat0 >> 16) & 0xffff), + stat0 & 0xffff, stat1 & 0xff); +} + +static int +musbotg_probe(device_t dev) +{ + if (!ofw_bus_status_okay(dev)) + return (ENXIO); + + if (!ofw_bus_is_compatible(dev, "ti,musb-am33xx")) + return (ENXIO); + + device_set_desc(dev, "TI AM33xx integrated USB OTG controller"); + + return (BUS_PROBE_DEFAULT); +} + +static int +musbotg_attach(device_t dev) +{ + struct musbotg_super_softc *sc = device_get_softc(dev); + int err; + uint32_t reg; + + sc->sc_otg.sc_id = device_get_unit(dev); + + /* Request the memory resources */ + err = bus_alloc_resources(dev, am335x_musbotg_mem_spec, + sc->sc_mem_res); + if (err) { + device_printf(dev, + "Error: could not allocate mem resources\n"); + return (ENXIO); + } + + /* Request the IRQ resources */ + sc->sc_otg.sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, + &sc->sc_irq_rid, RF_ACTIVE); + if (sc->sc_otg.sc_irq_res == NULL) { + device_printf(dev, + "Error: could not allocate irq resources\n"); + return (ENXIO); + } + + /* setup MUSB OTG USB controller interface softc */ + sc->sc_otg.sc_clocks_on = &musbotg_clocks_on; + sc->sc_otg.sc_clocks_off = &musbotg_clocks_off; + sc->sc_otg.sc_clocks_arg = &sc->sc_otg; + + sc->sc_otg.sc_ep_int_set = musbotg_ep_int_set; + + /* initialise some bus fields */ + sc->sc_otg.sc_bus.parent = dev; + sc->sc_otg.sc_bus.devices = sc->sc_otg.sc_devices; + sc->sc_otg.sc_bus.devices_max = MUSB2_MAX_DEVICES; + sc->sc_otg.sc_bus.dma_bits = 32; + + /* get all DMA memory */ + if (usb_bus_mem_alloc_all(&sc->sc_otg.sc_bus, + USB_GET_DMA_TAG(dev), NULL)) { + device_printf(dev, + "Failed allocate bus mem for musb\n"); + return (ENOMEM); + } + sc->sc_otg.sc_io_res = sc->sc_mem_res[RES_USBCORE]; + sc->sc_otg.sc_io_tag = + rman_get_bustag(sc->sc_otg.sc_io_res); + sc->sc_otg.sc_io_hdl = + rman_get_bushandle(sc->sc_otg.sc_io_res); + sc->sc_otg.sc_io_size = + rman_get_size(sc->sc_otg.sc_io_res); + + sc->sc_otg.sc_bus.bdev = device_add_child(dev, "usbus", -1); + if (!(sc->sc_otg.sc_bus.bdev)) { + device_printf(dev, "No busdev for musb\n"); + goto error; + } + device_set_ivars(sc->sc_otg.sc_bus.bdev, + &sc->sc_otg.sc_bus); + + err = bus_setup_intr(dev, sc->sc_otg.sc_irq_res, + INTR_TYPE_BIO | INTR_MPSAFE, + NULL, (driver_intr_t *)musbotg_wrapper_interrupt, + &sc->sc_otg, &sc->sc_otg.sc_intr_hdl); + if (err) { + sc->sc_otg.sc_intr_hdl = NULL; + device_printf(dev, + "Failed to setup interrupt for musb\n"); + goto error; + } + + sc->sc_otg.sc_platform_data = sc; + if (sc->sc_otg.sc_id == 0) + sc->sc_otg.sc_mode = MUSB2_DEVICE_MODE; + else + sc->sc_otg.sc_mode = MUSB2_HOST_MODE; + + /* + * software-controlled function + */ + + if (sc->sc_otg.sc_mode == MUSB2_HOST_MODE) { + reg = USBCTRL_READ4(sc, USBCTRL_MODE); + reg |= USBCTRL_MODE_IDDIGMUX; + reg &= ~USBCTRL_MODE_IDDIG; + USBCTRL_WRITE4(sc, USBCTRL_MODE, reg); + USBCTRL_WRITE4(sc, USBCTRL_UTMI, + USBCTRL_UTMI_FSDATAEXT); + } else { + reg = USBCTRL_READ4(sc, USBCTRL_MODE); + reg |= USBCTRL_MODE_IDDIGMUX; + reg |= USBCTRL_MODE_IDDIG; + USBCTRL_WRITE4(sc, USBCTRL_MODE, reg); + } + + reg = USBCTRL_INTEN_USB_ALL & ~USBCTRL_INTEN_USB_SOF; + USBCTRL_WRITE4(sc, USBCTRL_INTEN_SET1, reg); + USBCTRL_WRITE4(sc, USBCTRL_INTEN_CLR0, 0xffffffff); + + err = musbotg_init(&sc->sc_otg); + if (!err) + err = device_probe_and_attach(sc->sc_otg.sc_bus.bdev); + + if (err) + goto error; + + /* poll VBUS one time */ + musbotg_vbus_poll(sc); + + return (0); + +error: + musbotg_detach(dev); + return (ENXIO); +} + +static int +musbotg_detach(device_t dev) +{ + struct musbotg_super_softc *sc = device_get_softc(dev); + device_t bdev; + int err; + + if (sc->sc_otg.sc_bus.bdev) { + bdev = sc->sc_otg.sc_bus.bdev; + device_detach(bdev); + device_delete_child(dev, bdev); + } + + if (sc->sc_otg.sc_irq_res && sc->sc_otg.sc_intr_hdl) { + /* + * only call musbotg_uninit() after musbotg_init() + */ + musbotg_uninit(&sc->sc_otg); + + err = bus_teardown_intr(dev, sc->sc_otg.sc_irq_res, + sc->sc_otg.sc_intr_hdl); + sc->sc_otg.sc_intr_hdl = NULL; + } + + usb_bus_mem_free_all(&sc->sc_otg.sc_bus, NULL); + + /* Free resources if any */ + if (sc->sc_mem_res[0]) + bus_release_resources(dev, am335x_musbotg_mem_spec, + sc->sc_mem_res); + + if (sc->sc_otg.sc_irq_res) + bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irq_rid, + sc->sc_otg.sc_irq_res); + + /* during module unload there are lots of children leftover */ + device_delete_children(dev); + + return (0); +} + +static device_method_t musbotg_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, musbotg_probe), + DEVMETHOD(device_attach, musbotg_attach), + DEVMETHOD(device_detach, musbotg_detach), + DEVMETHOD(device_suspend, bus_generic_suspend), + DEVMETHOD(device_resume, bus_generic_resume), + DEVMETHOD(device_shutdown, bus_generic_shutdown), + + DEVMETHOD_END +}; + +static driver_t musbotg_driver = { + .name = "musbotg", + .methods = musbotg_methods, + .size = sizeof(struct musbotg_super_softc), +}; + +static devclass_t musbotg_devclass; + +DRIVER_MODULE(musbotg, usbss, musbotg_driver, musbotg_devclass, 0, 0); +MODULE_DEPEND(musbotg, usbss, 1, 1, 1); diff --git a/sys/arm/ti/am335x/am335x_pmic.c b/sys/arm/ti/am335x/am335x_pmic.c index 4509f88741af..18bc438a9141 100644 --- a/sys/arm/ti/am335x/am335x_pmic.c +++ b/sys/arm/ti/am335x/am335x_pmic.c @@ -37,6 +37,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include #include #include @@ -58,12 +59,20 @@ __FBSDID("$FreeBSD$"); #define TPS65217D 0x6 /* TPS65217 Reisters */ -#define TPS65217_CHIPID_REG 0x00 -#define TPS65217_STATUS_REG 0x0A -#define TPS65217_STATUS_OFF (1U << 7) -#define TPS65217_STATUS_ACPWR (1U << 3) -#define TPS65217_STATUS_USBPWR (1U << 2) -#define TPS65217_STATUS_BT (1U << 0) +#define TPS65217_CHIPID_REG 0x00 +#define TPS65217_INT_REG 0x02 +#define TPS65217_INT_PBM (1U << 6) +#define TPS65217_INT_ACM (1U << 5) +#define TPS65217_INT_USBM (1U << 4) +#define TPS65217_INT_PBI (1U << 2) +#define TPS65217_INT_ACI (1U << 1) +#define TPS65217_INT_USBI (1U << 0) + +#define TPS65217_STATUS_REG 0x0A +#define TPS65217_STATUS_OFF (1U << 7) +#define TPS65217_STATUS_ACPWR (1U << 3) +#define TPS65217_STATUS_USBPWR (1U << 2) +#define TPS65217_STATUS_BT (1U << 0) #define MAX_IIC_DATA_SIZE 2 @@ -72,6 +81,8 @@ struct am335x_pmic_softc { device_t sc_dev; uint32_t sc_addr; struct intr_config_hook enum_hook; + struct resource *sc_irq_res; + void *sc_intrhand; }; static void am335x_pmic_shutdown(void *, int); @@ -105,17 +116,50 @@ am335x_pmic_write(device_t dev, uint8_t address, uint8_t *data, uint8_t size) return (iicbus_transfer(dev, msg, 1)); } +static void +am335x_pmic_intr(void *arg) +{ + struct am335x_pmic_softc *sc = (struct am335x_pmic_softc *)arg; + uint8_t int_reg, status_reg; + int rv; + char notify_buf[16]; + + THREAD_SLEEPING_OK(); + rv = am335x_pmic_read(sc->sc_dev, TPS65217_INT_REG, &int_reg, 1); + if (rv != 0) { + device_printf(sc->sc_dev, "Cannot read interrupt register\n"); + THREAD_NO_SLEEPING(); + return; + } + rv = am335x_pmic_read(sc->sc_dev, TPS65217_STATUS_REG, &status_reg, 1); + if (rv != 0) { + device_printf(sc->sc_dev, "Cannot read status register\n"); + THREAD_NO_SLEEPING(); + return; + } + THREAD_NO_SLEEPING(); + + if ((int_reg & TPS65217_INT_PBI) && (status_reg & TPS65217_STATUS_BT)) + shutdown_nice(RB_POWEROFF); + if (int_reg & TPS65217_INT_ACI) { + snprintf(notify_buf, sizeof(notify_buf), "notify=0x%02x", + (status_reg & TPS65217_STATUS_ACPWR) ? 1 : 0); + devctl_notify_f("ACPI", "ACAD", "power", notify_buf, M_NOWAIT); + } +} + static int am335x_pmic_probe(device_t dev) { struct am335x_pmic_softc *sc; - if (!ofw_bus_is_compatible(dev, "ti,am335x-pmic")) + if (!ofw_bus_is_compatible(dev, "ti,tps65217")) return (ENXIO); sc = device_get_softc(dev); sc->sc_dev = dev; - sc->sc_addr = iicbus_get_addr(dev); + /* Convert to 8-bit addressing */ + sc->sc_addr = iicbus_get_addr(dev) << 1; device_set_desc(dev, "TI TPS65217 Power Management IC"); @@ -130,6 +174,7 @@ am335x_pmic_start(void *xdev) uint8_t reg; char name[20]; char pwr[4][11] = {"Unknown", "USB", "AC", "USB and AC"}; + int rv; sc = device_get_softc(dev); @@ -158,15 +203,38 @@ am335x_pmic_start(void *xdev) SHUTDOWN_PRI_LAST); config_intrhook_disestablish(&sc->enum_hook); + + /* Unmask all interrupts and clear pending status */ + reg = 0; + am335x_pmic_write(dev, TPS65217_INT_REG, ®, 1); + am335x_pmic_read(dev, TPS65217_INT_REG, ®, 1); + + if (sc->sc_irq_res != NULL) { + rv = bus_setup_intr(dev, sc->sc_irq_res, + INTR_TYPE_MISC | INTR_MPSAFE, NULL, am335x_pmic_intr, + sc, &sc->sc_intrhand); + if (rv != 0) + device_printf(dev, + "Unable to setup the irq handler.\n"); + } } static int am335x_pmic_attach(device_t dev) { struct am335x_pmic_softc *sc; + int rid; sc = device_get_softc(dev); + rid = 0; + sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, + RF_ACTIVE); + if (!sc->sc_irq_res) { + device_printf(dev, "cannot allocate interrupt\n"); + /* return (ENXIO); */ + } + sc->enum_hook.ich_func = am335x_pmic_start; sc->enum_hook.ich_arg = dev; diff --git a/sys/arm/ti/am335x/am335x_prcm.c b/sys/arm/ti/am335x/am335x_prcm.c index d9f4db10a9a6..fa47f63b880d 100644 --- a/sys/arm/ti/am335x/am335x_prcm.c +++ b/sys/arm/ti/am335x/am335x_prcm.c @@ -237,32 +237,32 @@ struct ti_clock_dev ti_am335x_clk_devmap[] = { .clk_get_source_freq = am335x_clk_get_arm_disp_freq, }, - /* UART. Uart0 clock cannot be controlled. */ - AM335X_NOOP_CLOCK_DEV(UART0_CLK), - AM335X_GENERIC_CLOCK_DEV(UART1_CLK), + /* UART */ + AM335X_NOOP_CLOCK_DEV(UART1_CLK), AM335X_GENERIC_CLOCK_DEV(UART2_CLK), AM335X_GENERIC_CLOCK_DEV(UART3_CLK), AM335X_GENERIC_CLOCK_DEV(UART4_CLK), AM335X_GENERIC_CLOCK_DEV(UART5_CLK), + AM335X_GENERIC_CLOCK_DEV(UART6_CLK), /* DMTimer */ - AM335X_GENERIC_CLOCK_DEV(DMTIMER2_CLK), - AM335X_GENERIC_CLOCK_DEV(DMTIMER3_CLK), - AM335X_GENERIC_CLOCK_DEV(DMTIMER4_CLK), - AM335X_GENERIC_CLOCK_DEV(DMTIMER5_CLK), - AM335X_GENERIC_CLOCK_DEV(DMTIMER6_CLK), - AM335X_GENERIC_CLOCK_DEV(DMTIMER7_CLK), + AM335X_GENERIC_CLOCK_DEV(TIMER2_CLK), + AM335X_GENERIC_CLOCK_DEV(TIMER3_CLK), + AM335X_GENERIC_CLOCK_DEV(TIMER4_CLK), + AM335X_GENERIC_CLOCK_DEV(TIMER5_CLK), + AM335X_GENERIC_CLOCK_DEV(TIMER6_CLK), + AM335X_GENERIC_CLOCK_DEV(TIMER7_CLK), - /* GPIO */ - AM335X_GPIO_CLOCK_DEV(GPIO0_CLK), + /* GPIO, we use hwmods as reference, not units in spec */ AM335X_GPIO_CLOCK_DEV(GPIO1_CLK), AM335X_GPIO_CLOCK_DEV(GPIO2_CLK), AM335X_GPIO_CLOCK_DEV(GPIO3_CLK), + AM335X_GPIO_CLOCK_DEV(GPIO4_CLK), - /* I2C */ - AM335X_GENERIC_CLOCK_DEV(I2C0_CLK), + /* I2C we use hwmods as reference, not units in spec */ AM335X_GENERIC_CLOCK_DEV(I2C1_CLK), AM335X_GENERIC_CLOCK_DEV(I2C2_CLK), + AM335X_GENERIC_CLOCK_DEV(I2C3_CLK), /* TSC_ADC */ AM335X_GENERIC_CLOCK_DEV(TSC_ADC_CLK), @@ -274,9 +274,9 @@ struct ti_clock_dev ti_am335x_clk_devmap[] = { AM335X_GENERIC_CLOCK_DEV(EDMA_TPTC2_CLK), /* MMCHS */ - AM335X_MMCHS_CLOCK_DEV(MMC0_CLK), AM335X_MMCHS_CLOCK_DEV(MMC1_CLK), AM335X_MMCHS_CLOCK_DEV(MMC2_CLK), + AM335X_MMCHS_CLOCK_DEV(MMC3_CLK), /* PWMSS */ AM335X_GENERIC_CLOCK_DEV(PWMSS0_CLK), @@ -319,31 +319,31 @@ struct am335x_clk_details { static struct am335x_clk_details g_am335x_clk_details[] = { /* UART. UART0 clock not controllable. */ - _CLK_DETAIL(UART0_CLK, 0, 0), - _CLK_DETAIL(UART1_CLK, CM_PER_UART1_CLKCTRL, 0), - _CLK_DETAIL(UART2_CLK, CM_PER_UART2_CLKCTRL, 0), - _CLK_DETAIL(UART3_CLK, CM_PER_UART3_CLKCTRL, 0), - _CLK_DETAIL(UART4_CLK, CM_PER_UART4_CLKCTRL, 0), - _CLK_DETAIL(UART5_CLK, CM_PER_UART5_CLKCTRL, 0), + _CLK_DETAIL(UART1_CLK, 0, 0), + _CLK_DETAIL(UART2_CLK, CM_PER_UART1_CLKCTRL, 0), + _CLK_DETAIL(UART3_CLK, CM_PER_UART2_CLKCTRL, 0), + _CLK_DETAIL(UART4_CLK, CM_PER_UART3_CLKCTRL, 0), + _CLK_DETAIL(UART5_CLK, CM_PER_UART4_CLKCTRL, 0), + _CLK_DETAIL(UART6_CLK, CM_PER_UART5_CLKCTRL, 0), /* DMTimer modules */ - _CLK_DETAIL(DMTIMER2_CLK, CM_PER_TIMER2_CLKCTRL, CLKSEL_TIMER2_CLK), - _CLK_DETAIL(DMTIMER3_CLK, CM_PER_TIMER3_CLKCTRL, CLKSEL_TIMER3_CLK), - _CLK_DETAIL(DMTIMER4_CLK, CM_PER_TIMER4_CLKCTRL, CLKSEL_TIMER4_CLK), - _CLK_DETAIL(DMTIMER5_CLK, CM_PER_TIMER5_CLKCTRL, CLKSEL_TIMER5_CLK), - _CLK_DETAIL(DMTIMER6_CLK, CM_PER_TIMER6_CLKCTRL, CLKSEL_TIMER6_CLK), - _CLK_DETAIL(DMTIMER7_CLK, CM_PER_TIMER7_CLKCTRL, CLKSEL_TIMER7_CLK), + _CLK_DETAIL(TIMER2_CLK, CM_PER_TIMER2_CLKCTRL, CLKSEL_TIMER2_CLK), + _CLK_DETAIL(TIMER3_CLK, CM_PER_TIMER3_CLKCTRL, CLKSEL_TIMER3_CLK), + _CLK_DETAIL(TIMER4_CLK, CM_PER_TIMER4_CLKCTRL, CLKSEL_TIMER4_CLK), + _CLK_DETAIL(TIMER5_CLK, CM_PER_TIMER5_CLKCTRL, CLKSEL_TIMER5_CLK), + _CLK_DETAIL(TIMER6_CLK, CM_PER_TIMER6_CLKCTRL, CLKSEL_TIMER6_CLK), + _CLK_DETAIL(TIMER7_CLK, CM_PER_TIMER7_CLKCTRL, CLKSEL_TIMER7_CLK), - /* GPIO modules */ - _CLK_DETAIL(GPIO0_CLK, CM_WKUP_GPIO0_CLKCTRL, 0), - _CLK_DETAIL(GPIO1_CLK, CM_PER_GPIO1_CLKCTRL, 0), - _CLK_DETAIL(GPIO2_CLK, CM_PER_GPIO2_CLKCTRL, 0), - _CLK_DETAIL(GPIO3_CLK, CM_PER_GPIO3_CLKCTRL, 0), + /* GPIO modules, hwmods start with gpio1 */ + _CLK_DETAIL(GPIO1_CLK, CM_WKUP_GPIO0_CLKCTRL, 0), + _CLK_DETAIL(GPIO2_CLK, CM_PER_GPIO1_CLKCTRL, 0), + _CLK_DETAIL(GPIO3_CLK, CM_PER_GPIO2_CLKCTRL, 0), + _CLK_DETAIL(GPIO4_CLK, CM_PER_GPIO3_CLKCTRL, 0), - /* I2C modules */ - _CLK_DETAIL(I2C0_CLK, CM_WKUP_I2C0_CLKCTRL, 0), - _CLK_DETAIL(I2C1_CLK, CM_PER_I2C1_CLKCTRL, 0), - _CLK_DETAIL(I2C2_CLK, CM_PER_I2C2_CLKCTRL, 0), + /* I2C modules, hwmods start with i2c1 */ + _CLK_DETAIL(I2C1_CLK, CM_WKUP_I2C0_CLKCTRL, 0), + _CLK_DETAIL(I2C2_CLK, CM_PER_I2C1_CLKCTRL, 0), + _CLK_DETAIL(I2C3_CLK, CM_PER_I2C2_CLKCTRL, 0), /* TSC_ADC module */ _CLK_DETAIL(TSC_ADC_CLK, CM_WKUP_ADC_TSC_CLKCTRL, 0), @@ -354,10 +354,10 @@ static struct am335x_clk_details g_am335x_clk_details[] = { _CLK_DETAIL(EDMA_TPTC1_CLK, CM_PER_TPTC1_CLKCTRL, 0), _CLK_DETAIL(EDMA_TPTC2_CLK, CM_PER_TPTC2_CLKCTRL, 0), - /* MMCHS modules*/ - _CLK_DETAIL(MMC0_CLK, CM_PER_MMC0_CLKCTRL, 0), - _CLK_DETAIL(MMC1_CLK, CM_PER_MMC1_CLKCTRL, 0), + /* MMCHS modules, hwmods start with mmc1*/ + _CLK_DETAIL(MMC1_CLK, CM_PER_MMC0_CLKCTRL, 0), _CLK_DETAIL(MMC2_CLK, CM_PER_MMC1_CLKCTRL, 0), + _CLK_DETAIL(MMC3_CLK, CM_PER_MMC1_CLKCTRL, 0), /* PWMSS modules */ _CLK_DETAIL(PWMSS0_CLK, CM_PER_EPWMSS0_CLKCTRL, 0), @@ -388,7 +388,7 @@ am335x_prcm_probe(device_t dev) if (!ofw_bus_status_okay(dev)) return (ENXIO); - if (ofw_bus_is_compatible(dev, "am335x,prcm")) { + if (ofw_bus_is_compatible(dev, "ti,am3-prcm")) { device_set_desc(dev, "AM335x Power and Clock Management"); return(BUS_PROBE_DEFAULT); } @@ -416,10 +416,15 @@ am335x_prcm_attach(device_t dev) am335x_prcm_sc = sc; ti_cpu_reset = am335x_prcm_reset; - am335x_clk_get_sysclk_freq(NULL, &sysclk); - am335x_clk_get_arm_fclk_freq(NULL, &fclk); - device_printf(dev, "Clocks: System %u.%01u MHz, CPU %u MHz\n", - sysclk/1000000, (sysclk % 1000000)/100000, fclk/1000000); + if (am335x_clk_get_sysclk_freq(NULL, &sysclk) != 0) + sysclk = 0; + if (am335x_clk_get_arm_fclk_freq(NULL, &fclk) != 0) + fclk = 0; + if (sysclk && fclk) + device_printf(dev, "Clocks: System %u.%01u MHz, CPU %u MHz\n", + sysclk/1000000, (sysclk % 1000000)/100000, fclk/1000000); + else + device_printf(dev, "can't read frequencies yet (SCM device not ready?)\n"); return (0); } diff --git a/sys/arm/ti/am335x/am335x_pwm.h b/sys/arm/ti/am335x/am335x_pwm.h index f0a88a50aaed..8666b9a2a89a 100644 --- a/sys/arm/ti/am335x/am335x_pwm.h +++ b/sys/arm/ti/am335x/am335x_pwm.h @@ -28,6 +28,6 @@ #ifndef __AM335X_PWM_H__ #define __AM335X_PWM_H__ -int am335x_pwm_config_ecas(int unit, int period, int duty); +int am335x_pwm_config_ecap(int unit, int period, int duty); #endif /* __AM335X_PWM_H__ */ diff --git a/sys/arm/ti/am335x/am335x_pwmss.c b/sys/arm/ti/am335x/am335x_pwmss.c new file mode 100644 index 000000000000..4405e89f1f04 --- /dev/null +++ b/sys/arm/ti/am335x/am335x_pwmss.c @@ -0,0 +1,163 @@ +/*- + * Copyright (c) 2013 Oleksandr Tymoshenko + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "am335x_pwm.h" +#include "am335x_scm.h" + +#define PWMSS_IDVER 0x00 +#define PWMSS_SYSCONFIG 0x04 +#define PWMSS_CLKCONFIG 0x08 +#define CLKCONFIG_EPWMCLK_EN (1 << 8) +#define PWMSS_CLKSTATUS 0x0C + +static device_probe_t am335x_pwmss_probe; +static device_attach_t am335x_pwmss_attach; +static device_detach_t am335x_pwmss_detach; + +struct am335x_pwmss_softc { + device_t sc_dev; + clk_ident_t sc_clk; +}; + +static device_method_t am335x_pwmss_methods[] = { + DEVMETHOD(device_probe, am335x_pwmss_probe), + DEVMETHOD(device_attach, am335x_pwmss_attach), + DEVMETHOD(device_detach, am335x_pwmss_detach), + + DEVMETHOD_END +}; + +static int +am335x_pwmss_probe(device_t dev) +{ + + if (!ofw_bus_status_okay(dev)) + return (ENXIO); + + if (!ofw_bus_is_compatible(dev, "ti,am33xx-pwmss")) + return (ENXIO); + + device_set_desc(dev, "AM335x PWM"); + + return (BUS_PROBE_DEFAULT); +} + +static int +am335x_pwmss_attach(device_t dev) +{ + struct am335x_pwmss_softc *sc; + uint32_t reg, id; + phandle_t node; + + sc = device_get_softc(dev); + sc->sc_dev = dev; + + sc->sc_clk = ti_hwmods_get_clock(dev); + if (sc->sc_clk == INVALID_CLK_IDENT) { + device_printf(dev, "failed to get device id based on ti,hwmods\n"); + return (EINVAL); + } + + ti_prcm_clk_enable(sc->sc_clk); + ti_scm_reg_read_4(SCM_PWMSS_CTRL, ®); + switch (sc->sc_clk) { + case PWMSS0_CLK: + id = 0; + break; + case PWMSS1_CLK: + id = 1; + break; + + case PWMSS2_CLK: + id = 2; + break; + default: + device_printf(dev, "unknown pwmss clock id: %d\n", sc->sc_clk); + return (EINVAL); + } + reg |= (1 << id); + ti_scm_reg_write_4(SCM_PWMSS_CTRL, reg); + + node = ofw_bus_get_node(dev); + + if (node == -1) + return (ENXIO); + + simplebus_init(dev, node); + + /* + * Allow devices to identify. + */ + bus_generic_probe(dev); + + /* + * Now walk the OFW tree and attach top-level devices. + */ + for (node = OF_child(node); node > 0; node = OF_peer(node)) + simplebus_add_device(dev, node, 0, NULL, -1, NULL); + + return (bus_generic_attach(dev)); +} + +static int +am335x_pwmss_detach(device_t dev) +{ + + return (0); +} + +DEFINE_CLASS_1(am335x_pwmss, am335x_pwmss_driver, am335x_pwmss_methods, + sizeof(struct am335x_pwmss_softc), simplebus_driver); +static devclass_t am335x_pwmss_devclass; +DRIVER_MODULE(am335x_pwmss, simplebus, am335x_pwmss_driver, am335x_pwmss_devclass, 0, 0); +MODULE_VERSION(am335x_pwmss, 1); diff --git a/sys/arm/ti/am335x/am335x_scm_padconf.c b/sys/arm/ti/am335x/am335x_scm_padconf.c index dcadc8a69ab8..a95c8cb1462d 100644 --- a/sys/arm/ti/am335x/am335x_scm_padconf.c +++ b/sys/arm/ti/am335x/am335x_scm_padconf.c @@ -45,7 +45,7 @@ __FBSDID("$FreeBSD$"); #include #include -#include +#include #include @@ -64,7 +64,7 @@ __FBSDID("$FreeBSD$"); .muxmodes[7] = m7, \ } -const static struct ti_scm_padstate ti_padstate_devmap[] = { +const static struct ti_pinmux_padstate ti_padstate_devmap[] = { {"output", PADCONF_OUTPUT }, {"output_pullup", PADCONF_OUTPUT_PULLUP }, {"input", PADCONF_INPUT }, @@ -74,228 +74,228 @@ const static struct ti_scm_padstate ti_padstate_devmap[] = { { .state = NULL } }; -const static struct ti_scm_padconf ti_padconf_devmap[] = { - _PIN(0x800, "GPMC_AD0", 32, 7,"gpmc_ad0", "mmc1_dat0", NULL, NULL, NULL, NULL, NULL, "gpio1_0"), - _PIN(0x804, "GPMC_AD1", 33, 7,"gpmc_ad1", "mmc1_dat1", NULL, NULL, NULL, NULL, NULL, "gpio1_1"), - _PIN(0x808, "GPMC_AD2", 34, 7,"gpmc_ad2", "mmc1_dat2", NULL, NULL, NULL, NULL, NULL, "gpio1_2"), - _PIN(0x80C, "GPMC_AD3", 35, 7,"gpmc_ad3", "mmc1_dat3", NULL, NULL, NULL, NULL, NULL, "gpio1_3"), - _PIN(0x810, "GPMC_AD4", 36, 7,"gpmc_ad4", "mmc1_dat4", NULL, NULL, NULL, NULL, NULL, "gpio1_4"), - _PIN(0x814, "GPMC_AD5", 37, 7,"gpmc_ad5", "mmc1_dat5", NULL, NULL, NULL, NULL, NULL, "gpio1_5"), - _PIN(0x818, "GPMC_AD6", 38, 7,"gpmc_ad6", "mmc1_dat6", NULL, NULL, NULL, NULL, NULL, "gpio1_6"), - _PIN(0x81C, "GPMC_AD7", 39, 7,"gpmc_ad7", "mmc1_dat7", NULL, NULL, NULL, NULL, NULL, "gpio1_7"), - _PIN(0x820, "GPMC_AD8", 22, 7, "gpmc_ad8", "lcd_data23", "mmc1_dat0", "mmc2_dat4", "ehrpwm2A", NULL, NULL, "gpio0_22"), - _PIN(0x824, "GPMC_AD9", 23, 7, "gpmc_ad9", "lcd_data22", "mmc1_dat1", "mmc2_dat5", "ehrpwm2B", NULL, NULL, "gpio0_23"), - _PIN(0x828, "GPMC_AD10", 26, 7, "gpmc_ad10", "lcd_data21", "mmc1_dat2", "mmc2_dat6", "ehrpwm2_tripzone_in", NULL, NULL, "gpio0_26"), - _PIN(0x82C, "GPMC_AD11", 27, 7, "gpmc_ad11", "lcd_data20", "mmc1_dat3", "mmc2_dat7", "ehrpwm0_synco", NULL, NULL, "gpio0_27"), - _PIN(0x830, "GPMC_AD12", 44, 7, "gpmc_ad12", "lcd_data19", "mmc1_dat4", "mmc2_dat0", "eQEP2A_in", "pr1_mii0_txd2", "pr1_pru0_pru_r30_14", "gpio1_12"), - _PIN(0x834, "GPMC_AD13", 45, 7, "gpmc_ad13", "lcd_data18", "mmc1_dat5", "mmc2_dat1", "eQEP2B_in", "pr1_mii0_txd1", "pr1_pru0_pru_r30_15", "gpio1_13"), - _PIN(0x838, "GPMC_AD14", 46, 7, "gpmc_ad14", "lcd_data17", "mmc1_dat6", "mmc2_dat2", "eQEP2_index", "pr1_mii0_txd0", "pr1_pru0_pru_r31_14", "gpio1_14"), - _PIN(0x83C, "GPMC_AD15", 47, 7, "gpmc_ad15", "lcd_data16", "mmc1_dat7", "mmc2_dat3", "eQEP2_strobe", "pr1_ecap0_ecap_capin_apwm_o", "pr1_pru0_pru_r31_15", "gpio1_15"), - _PIN(0x840, "GPMC_A0", 48, 7, "gpmc_a0", "gmii2_txen", "rgmii2_tctl", "rmii2_txen", "gpmc_a16", "pr1_mii_mt1_clk", "ehrpwm1_tripzone_input", "gpio1_16"), - _PIN(0x844, "GPMC_A1", 49, 7, "gpmc_a1", "gmii2_rxdv", "rgmii2_rctl", "mmc2_dat0", "gpmc_a17", "pr1_mii1_txd3", "ehrpwm0_synco", "gpio1_17"), - _PIN(0x848, "GPMC_A2", 50, 7, "gpmc_a2", "gmii2_txd3", "rgmii2_td3", "mmc2_dat1", "gpmc_a18", "pr1_mii1_txd2", "ehrpwm1A", "gpio1_18"), - _PIN(0x84C, "GPMC_A3", 51, 7, "gpmc_a3", "gmii2_txd2", "rgmii2_td2", "mmc2_dat2", "gpmc_a19", "pr1_mii1_txd1", "ehrpwm1B", "gpio1_19"), - _PIN(0x850, "GPMC_A4", 52, 7, "gpmc_a4", "gmii2_txd1", "rgmii2_td1", "rmii2_tdx1", "gpmc_a20", "pr1_mii1_txd0", "eQEP1A_in", "gpio1_20"), - _PIN(0x854, "GPMC_A5", 53, 7, "gpmc_a5", "gmii2_txd0", "rgmii2_td0", "rmii2_txd0", "gpmc_a21", "pr1_mii1_rxd3", "eQEP1B_in", "gpio1_21"), - _PIN(0x858, "GPMC_A6", 54, 7, "gpmc_a6", "gmii2_txclk", "rgmii2_tclk", "mmc2_dat4", "gpmc_a22", "pr1_mii1_rxd2", "eQEP1_index", "gpio1_22"), - _PIN(0x85C, "GPMC_A7", 55, 7, "gpmc_a7", "gmii2_rxclk", "rgmii2_rclk", "mmc2_dat5", "gpmc_a23", "pr1_mii1_rxd1", "eQEP1_strobe", "gpio1_23"), - _PIN(0x860, "GPMC_A8", 56, 7, "gpmc_a8", "gmii2_rxd3", "rgmii2_rd3", "mmc2_dat6", "gpmc_a24", "pr1_mii1_rxd0", "mcasp0_aclkx", "gpio1_24"), - _PIN(0x864, "GPMC_A9", 57, 7, "gmpc_a9", "gmii2_rxd2", "rgmii2_rd2", "mmc2_dat7 / rmii2_crs_dv", "gpmc_a25", "pr1_mii_mr1_clk", "mcasp0_fsx", "gpio1_25"), - _PIN(0x868, "GPMC_A10", 58, 7, "gmpc_a10", "gmii2_rxd1", "rgmii2_rd1", "rmii2_rxd1", "gpmc_a26", "pr1_mii1_rxdv", "mcasp0_arx0", "gpio1_26"), - _PIN(0x86C, "GPMC_A11", 59, 7, "gmpc_a11", "gmii2_rxd0", "rgmii2_rd0", "rmii2_rxd0", "gpmc_a27", "pr1_mii1_rxer", "mcasp0_axr1", "gpio1_27"), - _PIN(0x870, "GPMC_WAIT0", 30, 7, "gpmc_wait0", "gmii2_crs", "gpmc_csn4", "rmii2_crs_dv", "mmc1_sdcd", "pr1_mii1_col", "uart4_rxd", "gpio0_30"), - _PIN(0x874, "GPMC_WPn", 31, 7, "gpmc_wpn", "gmii2_rxerr", "gpmc_csn5", "rmii2_rxerr", "mmc2_sdcd", "pr1_mii1_txen", "uart4_txd", "gpio0_31"), - _PIN(0x878, "GPMC_BEn1", 60, 7, "gpmc_be1n", "gmii2_col", "gmpc_csn6","mmc2_dat3", "gpmc_dir", "pr1_mii1_rxlink", "mcasp0_aclkr", "gpio1_28"), - _PIN(0x87c, "GPMC_CSn0", 61, 7, "gpmc_csn0", NULL, NULL, NULL, NULL, NULL, NULL, "gpio1_29"), - _PIN(0x880, "GPMC_CSn1", 62, 7, "gpmc_csn1", "gpmc_clk", "mmc1_clk", "pr1_edio_data_in6", "pr1_edio_data_out6", "pr1_pru1_pru_r30_12", "pr1_pru1_pru_r31_12", "gpio1_30"), - _PIN(0x884, "GPMC_CSn2", 63, 7, "gpmc_csn2", "gpmc_be1n", "mmc1_cmd", "pr1_edio_data_in7", "pr1_edio_data_out7", "pr1_pru1_pru_r30_13", "pr1_pru1_pru_r31_13", "gpio1_31"), - _PIN(0x888, "GPMC_CSn3", 64, 7, "gpmc_csn3", "gpmc_a3", "rmii2_crs_dv", "mmc2_cmd", "pr1_mii0_crs", "pr1_mdio_data", "EMU4", "gpio2_0"), - _PIN(0x88c, "GPMC_CLK", 65, 7, "gpmc_clk", "lcd_memory_clk", "gpmc_wait1", "mmc2_clk", "pr1_mii1_crs", "pr1_mdio_mdclk", "mcasp0_fsr", "gpio2_1"), - _PIN(0x890, "GPMC_ADVn_ALE", 66, 7, "gpmc_advn_ale", NULL, "timer4", NULL, NULL, NULL, NULL, "gpio2_2"), - _PIN(0x894, "GPMC_OEn_REn", 67, 7, "gpmc_oen_ren", NULL, "timer7", NULL, NULL, NULL, NULL, "gpio2_3"), - _PIN(0x898, "GPMC_WEn", 68, 7, "gpmc_wen", NULL, "timer6", NULL, NULL, NULL, NULL, "gpio2_4"), - _PIN(0x89c, "GPMC_BEn0_CLE", 67, 7, "gpmc_ben0_cle", NULL, "timer5", NULL, NULL, NULL, NULL, "gpio2_5"), - _PIN(0x8a0, "LCD_DATA0", 68, 7, "lcd_data0", "gpmc_a0", "pr1_mii_mt0_clk", "ehrpwm2A", NULL, "pr1_pru1_pru_r30_0", "pr1_pru1_pru_r31_0", "gpio2_6"), - _PIN(0x8a4, "LCD_DATA1", 69, 7, "lcd_data1", "gpmc_a1", "pr1_mii0_txen", "ehrpwm2B", NULL, "pr1_pru1_pru_r30_1", "pr1_pru1_pru_r31_1", "gpio2_7"), - _PIN(0x8a8, "LCD_DATA2", 70, 7, "lcd_data2", "gpmc_a2", "pr1_mii0_txd3", "ehrpwm2_tripzone_input", NULL, "pr1_pru1_pru_r30_2", "pr1_pru1_pru_r31_2", "gpio2_8"), - _PIN(0x8ac, "LCD_DATA3", 71, 7, "lcd_data3", "gpmc_a3", "pr1_mii0_txd2", "ehrpwm0_synco", NULL, "pr1_pru1_pru_r30_3", "pr1_pru1_pru_r31_3", "gpio2_9"), - _PIN(0x8b0, "LCD_DATA4", 72, 7, "lcd_data4", "gpmc_a4", "pr1_mii0_txd1", "eQEP2A_in", NULL, "pr1_pru1_pru_r30_4", "pr1_pru1_pru_r31_4", "gpio2_10"), - _PIN(0x8b4, "LCD_DATA5", 73, 7, "lcd_data5", "gpmc_a5", "pr1_mii0_txd0", "eQEP2B_in", NULL, "pr1_pru1_pru_r30_5", "pr1_pru1_pru_r31_5", "gpio2_11"), - _PIN(0x8b8, "LCD_DATA6", 74, 7, "lcd_data6", "gpmc_a6", "pr1_edio_data_in6", "eQEP2_index", "pr1_edio_data_out6", "pr1_pru1_pru_r30_6", "pr1_pru1_pru_r31_6", "gpio2_12"), - _PIN(0x8bc, "LCD_DATA7", 75, 7, "lcd_data7", "gpmc_a7", "pr1_edio_data_in7", "eQEP2_strobe", "pr1_edio_data_out7", "pr1_pru1_pru_r30_7", "pr1_pru1_pru_r31_7", "gpio2_13"), - _PIN(0x8c0, "LCD_DATA8", 76, 7, "lcd_data8", "gpmc_a12", "ehrpwm1_tripzone_input", "mcasp0_aclkx", "uart5_txd", "pr1_mii0_rxd3", "uart2_ctsn", "gpio2_14"), - _PIN(0x8c4, "LCD_DATA9", 76, 7, "lcd_data9", "gpmc_a13", "ehrpwm0_synco", "mcasp0_fsx", "uart5_rxd", "pr1_mii0_rxd2", "uart2_rtsn", "gpio2_15"), - _PIN(0x8c8, "LCD_DATA10", 77, 7, "lcd_data10", "gpmc_a14", "ehrpwm1A", "mcasp0_axr0", NULL, "pr1_mii0_rxd1", "uart3_ctsn", "gpio2_16"), - _PIN(0x8cc, "LCD_DATA11", 78, 7, "lcd_data11", "gpmc_a15", "ehrpwm1B", "mcasp0_ahclkr", "mcasp0_axr2", "pr1_mii0_rxd0", "uart3_rtsn", "gpio2_17"), - _PIN(0x8d0, "LCD_DATA12", 8, 7, "lcd_data12", "gpmc_a16", "eQEP1A_in", "mcasp0_aclkr", "mcasp0_axr2", "pr1_mii0_rxlink", "uart4_ctsn", "gpio0_8"), - _PIN(0x8d4, "LCD_DATA13", 9, 7, "lcd_data13", "gpmc_a17", "eQEP1B_in", "mcasp0_fsr", "mcasp0_axr3", "pr1_mii0_rxer", "uart4_rtsn", "gpio0_9"), - _PIN(0x8d8, "LCD_DATA14", 10, 7, "lcd_data14", "gpmc_a18", "eQEP1_index", "mcasp0_axr1", "uart5_rxd", "pr1_mii_mr0_clk", "uart5_ctsn", "gpio0_10"), - _PIN(0x8dc, "LCD_DATA15", 11, 7, "lcd_data15", "gpmc_a19", "eQEP1_strobe", "mcasp0_ahclkx", "mcasp0_axr3", "pr1_mii0_rxdv", "uart5_rtsn", "gpio0_11"), - _PIN(0x8e0, "LCD_VSYNC", 86, 7, "lcd_vsync", "gpmc_a8", "gpmc_a1", "pr1_edio_data_in2", "pr1_edio_data_out2", "pr1_pru1_pru_r30_8", "pr1_pru1_pru_r31_8", "gpio2_22"), - _PIN(0x8e4, "LCD_HSYNC", 87, 7, "lcd_hsync", "gmpc_a9", "gpmc_a2", "pr1_edio_data_in3", "pr1_edio_data_out3", "pr1_pru1_pru_r30_9", "pr1_pru1_pru_r31_9", "gpio2_23"), - _PIN(0x8e8, "LCD_PCLK", 88, 7, "lcd_pclk", "gpmc_a10", "pr1_mii0_crs", "pr1_edio_data_in4", "pr1_edio_data_out4", "pr1_pru1_pru_r30_10", "pr1_pru1_pru_r31_10", "gpio2_24"), - _PIN(0x8ec, "LCD_AC_BIAS_EN", 89, 7, "lcd_ac_bias_en", "gpmc_a11", "pr1_mii1_crs", "pr1_edio_data_in5", "pr1_edio_data_out5", "pr1_pru1_pru_r30_11", "pr1_pru1_pru_r31_11", "gpio2_25"), - _PIN(0x8f0, "MMC0_DAT3", 90, 7, "mmc0_dat3", "gpmc_a20", "uart4_ctsn", "timer5", "uart1_dcdn", "pr1_pru0_pru_r30_8", "pr1_pru0_pru_r31_8", "gpio2_26"), - _PIN(0x8f4, "MMC0_DAT2", 91, 7, "mmc0_dat2", "gpmc_a21", "uart4_rtsn", "timer6", "uart1_dsrn", "pr1_pru0_pru_r30_9", "pr1_pru0_pru_r31_9", "gpio2_27"), - _PIN(0x8f8, "MMC0_DAT1", 92, 7, "mmc0_dat1", "gpmc_a22", "uart5_ctsn", "uart3_rxd", "uart1_dtrn", "pr1_pru0_pru_r30_10", "pr1_pru0_pru_r31_10", "gpio2_28"), - _PIN(0x8fc, "MMC0_DAT0", 93, 7, "mmc0_dat0", "gpmc_a23", "uart5_rtsn", "uart3_txd", "uart1_rin", "pr1_pru0_pru_r30_11", "pr1_pru0_pru_r31_11", "gpio2_29"), - _PIN(0x900, "MMC0_CLK", 94, 7, "mmc0_clk", "gpmc_a24", "uart3_ctsn", "uart2_rxd", "dcan1_tx", "pr1_pru0_pru_r30_12", "pr1_pru0_pru_r31_12", "gpio2_30"), - _PIN(0x904, "MMC0_CMD", 95, 7, "mmc0_cmd", "gpmc_a25", "uart3_rtsn", "uart2_txd", "dcan1_rx", "pr1_pru0_pru_r30_13", "pr1_pru0_pru_r31_13", "gpio2_31"), - _PIN(0x908, "MII1_COL", 96, 7, "gmii1_col", "rmii2_refclk", "spi1_sclk", "uart5_rxd", "mcasp1_axr2", "mmc2_dat3", "mcasp0_axr2", "gpio3_0"), - _PIN(0x90c, "MII1_CRS", 97, 7, "gmii1_crs", "rmii1_crs_dv", "spi1_d0", "I2C1_SDA", "mcasp1_aclkx", "uart5_ctsn", "uart2_rxd", "gpio3_1"), - _PIN(0x910, "MII1_RX_ER", 98, 7, "gmii1_rxerr", "rmii1_rxerr", "spi1_d1", "I2C1_SCL", "mcasp1_fsx", "uart5_rtsn", "uart2_txd", "gpio3_2"), - _PIN(0x914, "MII1_TX_EN", 99, 7, "gmii1_txen", "rmii1_txen", "rgmii1_tctl", "timer4", "mcasp1_axr0", "eQEP0_index", "mmc2_cmd", "gpio3_3"), - _PIN(0x918, "MII1_RX_DV", 100, 7, "gmii1_rxdv", "cd_memory_clk", "rgmii1_rctl", "uart5_txd", "mcasp1_aclkx", "mmc2_dat0", "mcasp0_aclkr", "gpio3_4"), - _PIN(0x91c, "MII1_TXD3", 16, 7, "gmii1_txd3", "dcan0_tx", "rgmii1_td3", "uart4_rxd", "mcasp1_fsx", "mmc2_dat1", "mcasp0_fsr", "gpio0_16"), - _PIN(0x920, "MII1_TXD2", 17, 7, "gmii1_txd2", "dcan0_rx", "rgmii1_td2", "uart4_txd", "mcasp1_axr0", "mmc2_dat2", "mcasp0_ahclkx", "gpio0_17"), - _PIN(0x924, "MII1_TXD1", 21, 7, "gmii1_txd1", "rmii1_txd1", "rgmii1_td1", "mcasp1_fsr", "mcasp1_axr1", "eQEP0A_in", "mmc1_cmd", "gpio0_21"), - _PIN(0x928, "MII1_TXD0", 28, 7, "gmii1_txd0", "rmii1_txd0", "rgmii1_td0", "mcasp1_axr2", "mcasp1_aclkr", "eQEP0B_in", "mmc1_clk", "gpio0_28"), - _PIN(0x92c, "MII1_TX_CLK", 105, 7, "gmii1_txclk", "uart2_rxd", "rgmii1_tclk", "mmc0_dat7", "mmc1_dat0", "uart1_dcdn", "mcasp0_aclkx", "gpio3_9"), - _PIN(0x930, "MII1_RX_CLK", 106, 7, "gmii1_rxclk", "uart2_txd", "rgmii1_rclk", "mmc0_dat6", "mmc1_dat1", "uart1_dsrn", "mcasp0_fsx", "gpio3_10"), - _PIN(0x934, "MII1_RXD3", 82, 7, "gmii1_rxd3", "uart3_rxd", "rgmii1_rd3", "mmc0_dat5", "mmc1_dat2", "uart1_dtrn", "mcasp0_axr0", "gpio2_18"), - _PIN(0x938, "MII1_RXD2", 83, 7, "gmii1_rxd2", "uart3_txd", "rgmii1_rd2", "mmc0_dat4", "mmc1_dat3", "uart1_rin", "mcasp0_axr1", "gpio2_19"), - _PIN(0x93c, "MII1_RXD1", 84, 7, "gmii1_rxd1", "rmii1_rxd1", "rgmii1_rd1", "mcasp1_axr3", "mcasp1_fsr", "eQEP0_strobe", "mmc2_clk", "gpio2_20"), - _PIN(0x940, "MII1_RXD0", 85, 7, "gmii1_rxd0", "rmii1_rxd0", "rgmii1_rd0", "mcasp1_ahclkx", "mcasp1_ahclkr", "mcasp1_aclkr", "mcasp0_axr3", "gpio2_21"), - _PIN(0x944, "RMII1_REF_CLK", 29, 7, "rmii1_refclk", "xdma_event_intr2", "spi1_cs0", "uart5_txd", "mcasp1_axr3", "mmc0_pow", "mcasp1_ahclkx", "gpio0_29"), - _PIN(0x948, "MDIO", 0, 7, "mdio_data", "timer6", "uart5_rxd", "uart3_ctsn", "mmc0_sdcd","mmc1_cmd", "mmc2_cmd","gpio0_0"), - _PIN(0x94c, "MDC", 1, 7, "mdio_clk", "timer5", "uart5_txd", "uart3_rtsn", "mmc0_sdwp", "mmc1_clk", "mmc2_clk", "gpio0_1"), - _PIN(0x950, "SPI0_SCLK", 2, 7, "spi0_sclk", "uart2_rxd", "I2C2_SDA", "ehrpwm0A", "pr1_uart0_cts_n", "pr1_edio_sof", "EMU2", "gpio0_2"), - _PIN(0x954, "SPI0_D0", 3, 7, "spi0_d0", "uart2_txd", "I2C2_SCL", "ehrpwm0B", "pr1_uart0_rts_n", "pr1_edio_latch_in", "EMU3", "gpio0_3"), - _PIN(0x958, "SPI0_D1", 4, 7, "spi0_d1", "mmc1_sdwp", "I2C1_SDA", "ehrpwm0_tripzone_input", "pr1_uart0_rxd", "pr1_edio_data_in0", "pr1_edio_data_out0", "gpio0_4"), - _PIN(0x95c, "SPI0_CS0", 5, 7, "spi0_cs0", "mmc2_sdwp", "I2C1_SCL", "ehrpwm0_synci", "pr1_uart0_txd", "pr1_edio_data_in1", "pr1_edio_data_out1", "gpio0_5"), - _PIN(0x960, "SPI0_CS1", 6, 7, "spi0_cs1", "uart3_rxd", "eCAP1_in_PWM1_out", "mcc0_pow", "xdm_event_intr2", "mmc0_sdcd", "EMU4", "gpio0_6"), - _PIN(0x964, "ECAP0_IN_PWM0_OUT",7, 7, "eCAP0_in_PWM0_out", "uart3_txd", "spi1_cs1", "pr1_ecap0_ecap_capin_apwm_o", "spi1_sclk", "mmc0_sdwp", "xdma_event_intr2", "gpio0_7"), - _PIN(0x968, "UART0_CTSn", 40, 7, "uart0_ctsn", "uart4_rxd", "dcan1_tx", "I2C1_SDA", "spi1_d0", "timer7", "pr1_edc_sync0_out", "gpio1_8"), - _PIN(0x96c, "UART0_RTSn", 41, 7, "uart0_rtsn", "uart4_txd", "dcan1_rx", "I2C1_SCL", "spi1_d1", "spi1_cs0", "pr1_edc_sync1_out", "gpio1_9"), - _PIN(0x970, "UART0_rxd", 42, 7, "uart0_rxd", "spi1_cs0", "dcan0_tx", "I2C2_SDA", "eCAP2_in_PWM2_out", "pr1_pru1_pru_r30_14", "pr1_pru1_pru_r31_14", "gpio1_10"), - _PIN(0x974, "UART0_txd", 43, 7, "uart0_txd", "spi1_cs1", "dcan0_rx", "I2C2_SCL", "eCAP1_in_PWM1_out", "pr1_pru1_pru_r30_15", "pr1_pru1_pru_r31_15", "gpio1_11"), - _PIN(0x978, "UART1_CTSn", 12, 7, "uart1_ctsn", "timer6_mux1", "dcan0_tx", "I2C2_SDA", "spi1_cs0", "pr1_uart0_cts_n", "pr1_edc_latch0_in", "gpio0_12"), - _PIN(0x97c, "UART1_RTSn", 13, 7, "uart1_rtsn", "timer5_mux1", "dcan0_rx", "I2C2_SCL", "spi1_cs1", "pr1_uart0_rts_n", "pr1_edc_latch1_in", "gpio0_13"), - _PIN(0x980, "UART1_RXD", 14, 7, "uart1_rxd", "mmc1_sdwp", "dcan1_tx", "I2C1_SDA", NULL, "pr1_uart0_rxd", "pr1_pru1_pru_r31_16", "gpio0_14"), - _PIN(0x984, "UART1_TXD", 15, 7, "uart1_txd", "mmc2_sdwp", "dcan1_rx", "I2C1_SCL", NULL, "pr1_uart0_txd", "pr1_pru0_pru_r31_16", "gpio0_15"), - _PIN(0x988, "I2C0_SDA", 101, 7, "I2C0_SDA", "timer4", "uart2_ctsn", "eCAP2_in_PWM2_out", NULL, NULL, NULL, "gpio3_5"), - _PIN(0x98c, "I2C0_SCL", 102, 7, "I2C0_SCL", "timer7", "uart2_rtsn", "eCAP1_in_PWM1_out", NULL, NULL, NULL, "gpio3_6"), - _PIN(0x990, "MCASP0_ACLKX", 110, 7, "mcasp0_aclkx", "ehrpwm0A", NULL, "spi1_sclk", "mmc0_sdcd", "pr1_pru0_pru_r30_0", "pr1_pru0_pru_r31_0", "gpio3_14"), - _PIN(0x994, "MCASP0_FSX", 111, 7, "mcasp0_fsx", "ehrpwm0B", NULL, "spi1_d0", "mmc1_sdcd", "pr1_pru0_pru_r30_1", "pr1_pru0_pru_r31_1", "gpio3_15"), - _PIN(0x998, "MCASP0_AXR0", 112, 7, "mcasp0_axr0", "ehrpwm0_tripzone_input", NULL, "spi1_d1", "mmc2_sdcd", "pr1_pru0_pru_r30_2", "pr1_pru0_pru_r31_2", "gpio3_16"), - _PIN(0x99c, "MCASP0_AHCLKR", 113, 7, "mcasp0_ahclkr", "ehrpwm0_synci", "mcasp0_axr2", "spi1_cs0", "eCAP2_in_PWM2_out", "pr1_pru0_pru_r30_3", "pr1_pru0_pru_r31_3", "gpio3_17"), - _PIN(0x9a0, "MCASP0_ACLKR", 114, 7, "mcasp0_aclkr", "eQEP0A_in", "mcasp0_axr2", "mcasp1_aclkx", "mmc0_sdwp", "pr1_pru0_pru_r30_4", "pr1_pru0_pru_r31_4", "gpio3_18"), - _PIN(0x9a4, "MCASP0_FSR", 115, 7, "mcasp0_fsr", "eQEP0B_in", "mcasp0_axr3", "mcasp1_fsx", "EMU2", "pr1_pru0_pru_r30_5", "pr1_pru0_pru_r31_5", "gpio3_19"), - _PIN(0x9a8, "MCASP0_AXR1", 116, 7, "mcasp0_axr1", "eQEP0_index", NULL, "mcasp1_axr0", "EMU3", "pr1_pru0_pru_r30_6", "pr1_pru0_pru_r31_6", "gpio3_20"), - _PIN(0x9ac, "MCASP0_AHCLKX", 117, 7, "mcasp0_ahclkx", "eQEP0_strobe", "mcasp0_axr3", "mcasp1_axr1", "EMU4", "pr1_pru0_pru_r30_7", "pr1_pru0_pru_r31_7", "gpio3_21"), - _PIN(0x9b0, "XDMA_EVENT_INTR0", 19, 7, "xdma_event_intr0", NULL, "timer4", "clkout1", "spi1_cs1", "pr1_pru1_pru_r31_16", "EMU2", "gpio0_19"), - _PIN(0x9b4, "XDMA_EVENT_INTR1", 20, 7, "xdma_event_intr1", NULL, "tclkin", "clkout2", "timer7", "pr1_pru0_pru_r31_16", "EMU3", "gpio0_20"), +const static struct ti_pinmux_padconf ti_padconf_devmap[] = { + _PIN(0x000, "GPMC_AD0", 32, 7,"gpmc_ad0", "mmc1_dat0", NULL, NULL, NULL, NULL, NULL, "gpio1_0"), + _PIN(0x004, "GPMC_AD1", 33, 7,"gpmc_ad1", "mmc1_dat1", NULL, NULL, NULL, NULL, NULL, "gpio1_1"), + _PIN(0x008, "GPMC_AD2", 34, 7,"gpmc_ad2", "mmc1_dat2", NULL, NULL, NULL, NULL, NULL, "gpio1_2"), + _PIN(0x00C, "GPMC_AD3", 35, 7,"gpmc_ad3", "mmc1_dat3", NULL, NULL, NULL, NULL, NULL, "gpio1_3"), + _PIN(0x010, "GPMC_AD4", 36, 7,"gpmc_ad4", "mmc1_dat4", NULL, NULL, NULL, NULL, NULL, "gpio1_4"), + _PIN(0x014, "GPMC_AD5", 37, 7,"gpmc_ad5", "mmc1_dat5", NULL, NULL, NULL, NULL, NULL, "gpio1_5"), + _PIN(0x018, "GPMC_AD6", 38, 7,"gpmc_ad6", "mmc1_dat6", NULL, NULL, NULL, NULL, NULL, "gpio1_6"), + _PIN(0x01C, "GPMC_AD7", 39, 7,"gpmc_ad7", "mmc1_dat7", NULL, NULL, NULL, NULL, NULL, "gpio1_7"), + _PIN(0x020, "GPMC_AD8", 22, 7, "gpmc_ad8", "lcd_data23", "mmc1_dat0", "mmc2_dat4", "ehrpwm2A", NULL, NULL, "gpio0_22"), + _PIN(0x024, "GPMC_AD9", 23, 7, "gpmc_ad9", "lcd_data22", "mmc1_dat1", "mmc2_dat5", "ehrpwm2B", NULL, NULL, "gpio0_23"), + _PIN(0x028, "GPMC_AD10", 26, 7, "gpmc_ad10", "lcd_data21", "mmc1_dat2", "mmc2_dat6", "ehrpwm2_tripzone_in", NULL, NULL, "gpio0_26"), + _PIN(0x02C, "GPMC_AD11", 27, 7, "gpmc_ad11", "lcd_data20", "mmc1_dat3", "mmc2_dat7", "ehrpwm0_synco", NULL, NULL, "gpio0_27"), + _PIN(0x030, "GPMC_AD12", 44, 7, "gpmc_ad12", "lcd_data19", "mmc1_dat4", "mmc2_dat0", "eQEP2A_in", "pr1_mii0_txd2", "pr1_pru0_pru_r30_14", "gpio1_12"), + _PIN(0x034, "GPMC_AD13", 45, 7, "gpmc_ad13", "lcd_data18", "mmc1_dat5", "mmc2_dat1", "eQEP2B_in", "pr1_mii0_txd1", "pr1_pru0_pru_r30_15", "gpio1_13"), + _PIN(0x038, "GPMC_AD14", 46, 7, "gpmc_ad14", "lcd_data17", "mmc1_dat6", "mmc2_dat2", "eQEP2_index", "pr1_mii0_txd0", "pr1_pru0_pru_r31_14", "gpio1_14"), + _PIN(0x03C, "GPMC_AD15", 47, 7, "gpmc_ad15", "lcd_data16", "mmc1_dat7", "mmc2_dat3", "eQEP2_strobe", "pr1_ecap0_ecap_capin_apwm_o", "pr1_pru0_pru_r31_15", "gpio1_15"), + _PIN(0x040, "GPMC_A0", 48, 7, "gpmc_a0", "gmii2_txen", "rgmii2_tctl", "rmii2_txen", "gpmc_a16", "pr1_mii_mt1_clk", "ehrpwm1_tripzone_input", "gpio1_16"), + _PIN(0x044, "GPMC_A1", 49, 7, "gpmc_a1", "gmii2_rxdv", "rgmii2_rctl", "mmc2_dat0", "gpmc_a17", "pr1_mii1_txd3", "ehrpwm0_synco", "gpio1_17"), + _PIN(0x048, "GPMC_A2", 50, 7, "gpmc_a2", "gmii2_txd3", "rgmii2_td3", "mmc2_dat1", "gpmc_a18", "pr1_mii1_txd2", "ehrpwm1A", "gpio1_18"), + _PIN(0x04C, "GPMC_A3", 51, 7, "gpmc_a3", "gmii2_txd2", "rgmii2_td2", "mmc2_dat2", "gpmc_a19", "pr1_mii1_txd1", "ehrpwm1B", "gpio1_19"), + _PIN(0x050, "GPMC_A4", 52, 7, "gpmc_a4", "gmii2_txd1", "rgmii2_td1", "rmii2_tdx1", "gpmc_a20", "pr1_mii1_txd0", "eQEP1A_in", "gpio1_20"), + _PIN(0x054, "GPMC_A5", 53, 7, "gpmc_a5", "gmii2_txd0", "rgmii2_td0", "rmii2_txd0", "gpmc_a21", "pr1_mii1_rxd3", "eQEP1B_in", "gpio1_21"), + _PIN(0x058, "GPMC_A6", 54, 7, "gpmc_a6", "gmii2_txclk", "rgmii2_tclk", "mmc2_dat4", "gpmc_a22", "pr1_mii1_rxd2", "eQEP1_index", "gpio1_22"), + _PIN(0x05C, "GPMC_A7", 55, 7, "gpmc_a7", "gmii2_rxclk", "rgmii2_rclk", "mmc2_dat5", "gpmc_a23", "pr1_mii1_rxd1", "eQEP1_strobe", "gpio1_23"), + _PIN(0x060, "GPMC_A8", 56, 7, "gpmc_a8", "gmii2_rxd3", "rgmii2_rd3", "mmc2_dat6", "gpmc_a24", "pr1_mii1_rxd0", "mcasp0_aclkx", "gpio1_24"), + _PIN(0x064, "GPMC_A9", 57, 7, "gmpc_a9", "gmii2_rxd2", "rgmii2_rd2", "mmc2_dat7 / rmii2_crs_dv", "gpmc_a25", "pr1_mii_mr1_clk", "mcasp0_fsx", "gpio1_25"), + _PIN(0x068, "GPMC_A10", 58, 7, "gmpc_a10", "gmii2_rxd1", "rgmii2_rd1", "rmii2_rxd1", "gpmc_a26", "pr1_mii1_rxdv", "mcasp0_arx0", "gpio1_26"), + _PIN(0x06C, "GPMC_A11", 59, 7, "gmpc_a11", "gmii2_rxd0", "rgmii2_rd0", "rmii2_rxd0", "gpmc_a27", "pr1_mii1_rxer", "mcasp0_axr1", "gpio1_27"), + _PIN(0x070, "GPMC_WAIT0", 30, 7, "gpmc_wait0", "gmii2_crs", "gpmc_csn4", "rmii2_crs_dv", "mmc1_sdcd", "pr1_mii1_col", "uart4_rxd", "gpio0_30"), + _PIN(0x074, "GPMC_WPn", 31, 7, "gpmc_wpn", "gmii2_rxerr", "gpmc_csn5", "rmii2_rxerr", "mmc2_sdcd", "pr1_mii1_txen", "uart4_txd", "gpio0_31"), + _PIN(0x078, "GPMC_BEn1", 60, 7, "gpmc_be1n", "gmii2_col", "gmpc_csn6","mmc2_dat3", "gpmc_dir", "pr1_mii1_rxlink", "mcasp0_aclkr", "gpio1_28"), + _PIN(0x07c, "GPMC_CSn0", 61, 7, "gpmc_csn0", NULL, NULL, NULL, NULL, NULL, NULL, "gpio1_29"), + _PIN(0x080, "GPMC_CSn1", 62, 7, "gpmc_csn1", "gpmc_clk", "mmc1_clk", "pr1_edio_data_in6", "pr1_edio_data_out6", "pr1_pru1_pru_r30_12", "pr1_pru1_pru_r31_12", "gpio1_30"), + _PIN(0x084, "GPMC_CSn2", 63, 7, "gpmc_csn2", "gpmc_be1n", "mmc1_cmd", "pr1_edio_data_in7", "pr1_edio_data_out7", "pr1_pru1_pru_r30_13", "pr1_pru1_pru_r31_13", "gpio1_31"), + _PIN(0x088, "GPMC_CSn3", 64, 7, "gpmc_csn3", "gpmc_a3", "rmii2_crs_dv", "mmc2_cmd", "pr1_mii0_crs", "pr1_mdio_data", "EMU4", "gpio2_0"), + _PIN(0x08c, "GPMC_CLK", 65, 7, "gpmc_clk", "lcd_memory_clk", "gpmc_wait1", "mmc2_clk", "pr1_mii1_crs", "pr1_mdio_mdclk", "mcasp0_fsr", "gpio2_1"), + _PIN(0x090, "GPMC_ADVn_ALE", 66, 7, "gpmc_advn_ale", NULL, "timer4", NULL, NULL, NULL, NULL, "gpio2_2"), + _PIN(0x094, "GPMC_OEn_REn", 67, 7, "gpmc_oen_ren", NULL, "timer7", NULL, NULL, NULL, NULL, "gpio2_3"), + _PIN(0x098, "GPMC_WEn", 68, 7, "gpmc_wen", NULL, "timer6", NULL, NULL, NULL, NULL, "gpio2_4"), + _PIN(0x09c, "GPMC_BEn0_CLE", 67, 7, "gpmc_ben0_cle", NULL, "timer5", NULL, NULL, NULL, NULL, "gpio2_5"), + _PIN(0x0a0, "LCD_DATA0", 68, 7, "lcd_data0", "gpmc_a0", "pr1_mii_mt0_clk", "ehrpwm2A", NULL, "pr1_pru1_pru_r30_0", "pr1_pru1_pru_r31_0", "gpio2_6"), + _PIN(0x0a4, "LCD_DATA1", 69, 7, "lcd_data1", "gpmc_a1", "pr1_mii0_txen", "ehrpwm2B", NULL, "pr1_pru1_pru_r30_1", "pr1_pru1_pru_r31_1", "gpio2_7"), + _PIN(0x0a8, "LCD_DATA2", 70, 7, "lcd_data2", "gpmc_a2", "pr1_mii0_txd3", "ehrpwm2_tripzone_input", NULL, "pr1_pru1_pru_r30_2", "pr1_pru1_pru_r31_2", "gpio2_8"), + _PIN(0x0ac, "LCD_DATA3", 71, 7, "lcd_data3", "gpmc_a3", "pr1_mii0_txd2", "ehrpwm0_synco", NULL, "pr1_pru1_pru_r30_3", "pr1_pru1_pru_r31_3", "gpio2_9"), + _PIN(0x0b0, "LCD_DATA4", 72, 7, "lcd_data4", "gpmc_a4", "pr1_mii0_txd1", "eQEP2A_in", NULL, "pr1_pru1_pru_r30_4", "pr1_pru1_pru_r31_4", "gpio2_10"), + _PIN(0x0b4, "LCD_DATA5", 73, 7, "lcd_data5", "gpmc_a5", "pr1_mii0_txd0", "eQEP2B_in", NULL, "pr1_pru1_pru_r30_5", "pr1_pru1_pru_r31_5", "gpio2_11"), + _PIN(0x0b8, "LCD_DATA6", 74, 7, "lcd_data6", "gpmc_a6", "pr1_edio_data_in6", "eQEP2_index", "pr1_edio_data_out6", "pr1_pru1_pru_r30_6", "pr1_pru1_pru_r31_6", "gpio2_12"), + _PIN(0x0bc, "LCD_DATA7", 75, 7, "lcd_data7", "gpmc_a7", "pr1_edio_data_in7", "eQEP2_strobe", "pr1_edio_data_out7", "pr1_pru1_pru_r30_7", "pr1_pru1_pru_r31_7", "gpio2_13"), + _PIN(0x0c0, "LCD_DATA8", 76, 7, "lcd_data8", "gpmc_a12", "ehrpwm1_tripzone_input", "mcasp0_aclkx", "uart5_txd", "pr1_mii0_rxd3", "uart2_ctsn", "gpio2_14"), + _PIN(0x0c4, "LCD_DATA9", 76, 7, "lcd_data9", "gpmc_a13", "ehrpwm0_synco", "mcasp0_fsx", "uart5_rxd", "pr1_mii0_rxd2", "uart2_rtsn", "gpio2_15"), + _PIN(0x0c8, "LCD_DATA10", 77, 7, "lcd_data10", "gpmc_a14", "ehrpwm1A", "mcasp0_axr0", NULL, "pr1_mii0_rxd1", "uart3_ctsn", "gpio2_16"), + _PIN(0x0cc, "LCD_DATA11", 78, 7, "lcd_data11", "gpmc_a15", "ehrpwm1B", "mcasp0_ahclkr", "mcasp0_axr2", "pr1_mii0_rxd0", "uart3_rtsn", "gpio2_17"), + _PIN(0x0d0, "LCD_DATA12", 8, 7, "lcd_data12", "gpmc_a16", "eQEP1A_in", "mcasp0_aclkr", "mcasp0_axr2", "pr1_mii0_rxlink", "uart4_ctsn", "gpio0_8"), + _PIN(0x0d4, "LCD_DATA13", 9, 7, "lcd_data13", "gpmc_a17", "eQEP1B_in", "mcasp0_fsr", "mcasp0_axr3", "pr1_mii0_rxer", "uart4_rtsn", "gpio0_9"), + _PIN(0x0d8, "LCD_DATA14", 10, 7, "lcd_data14", "gpmc_a18", "eQEP1_index", "mcasp0_axr1", "uart5_rxd", "pr1_mii_mr0_clk", "uart5_ctsn", "gpio0_10"), + _PIN(0x0dc, "LCD_DATA15", 11, 7, "lcd_data15", "gpmc_a19", "eQEP1_strobe", "mcasp0_ahclkx", "mcasp0_axr3", "pr1_mii0_rxdv", "uart5_rtsn", "gpio0_11"), + _PIN(0x0e0, "LCD_VSYNC", 86, 7, "lcd_vsync", "gpmc_a8", "gpmc_a1", "pr1_edio_data_in2", "pr1_edio_data_out2", "pr1_pru1_pru_r30_8", "pr1_pru1_pru_r31_8", "gpio2_22"), + _PIN(0x0e4, "LCD_HSYNC", 87, 7, "lcd_hsync", "gmpc_a9", "gpmc_a2", "pr1_edio_data_in3", "pr1_edio_data_out3", "pr1_pru1_pru_r30_9", "pr1_pru1_pru_r31_9", "gpio2_23"), + _PIN(0x0e8, "LCD_PCLK", 88, 7, "lcd_pclk", "gpmc_a10", "pr1_mii0_crs", "pr1_edio_data_in4", "pr1_edio_data_out4", "pr1_pru1_pru_r30_10", "pr1_pru1_pru_r31_10", "gpio2_24"), + _PIN(0x0ec, "LCD_AC_BIAS_EN", 89, 7, "lcd_ac_bias_en", "gpmc_a11", "pr1_mii1_crs", "pr1_edio_data_in5", "pr1_edio_data_out5", "pr1_pru1_pru_r30_11", "pr1_pru1_pru_r31_11", "gpio2_25"), + _PIN(0x0f0, "MMC0_DAT3", 90, 7, "mmc0_dat3", "gpmc_a20", "uart4_ctsn", "timer5", "uart1_dcdn", "pr1_pru0_pru_r30_8", "pr1_pru0_pru_r31_8", "gpio2_26"), + _PIN(0x0f4, "MMC0_DAT2", 91, 7, "mmc0_dat2", "gpmc_a21", "uart4_rtsn", "timer6", "uart1_dsrn", "pr1_pru0_pru_r30_9", "pr1_pru0_pru_r31_9", "gpio2_27"), + _PIN(0x0f8, "MMC0_DAT1", 92, 7, "mmc0_dat1", "gpmc_a22", "uart5_ctsn", "uart3_rxd", "uart1_dtrn", "pr1_pru0_pru_r30_10", "pr1_pru0_pru_r31_10", "gpio2_28"), + _PIN(0x0fc, "MMC0_DAT0", 93, 7, "mmc0_dat0", "gpmc_a23", "uart5_rtsn", "uart3_txd", "uart1_rin", "pr1_pru0_pru_r30_11", "pr1_pru0_pru_r31_11", "gpio2_29"), + _PIN(0x100, "MMC0_CLK", 94, 7, "mmc0_clk", "gpmc_a24", "uart3_ctsn", "uart2_rxd", "dcan1_tx", "pr1_pru0_pru_r30_12", "pr1_pru0_pru_r31_12", "gpio2_30"), + _PIN(0x104, "MMC0_CMD", 95, 7, "mmc0_cmd", "gpmc_a25", "uart3_rtsn", "uart2_txd", "dcan1_rx", "pr1_pru0_pru_r30_13", "pr1_pru0_pru_r31_13", "gpio2_31"), + _PIN(0x108, "MII1_COL", 96, 7, "gmii1_col", "rmii2_refclk", "spi1_sclk", "uart5_rxd", "mcasp1_axr2", "mmc2_dat3", "mcasp0_axr2", "gpio3_0"), + _PIN(0x10c, "MII1_CRS", 97, 7, "gmii1_crs", "rmii1_crs_dv", "spi1_d0", "I2C1_SDA", "mcasp1_aclkx", "uart5_ctsn", "uart2_rxd", "gpio3_1"), + _PIN(0x110, "MII1_RX_ER", 98, 7, "gmii1_rxerr", "rmii1_rxerr", "spi1_d1", "I2C1_SCL", "mcasp1_fsx", "uart5_rtsn", "uart2_txd", "gpio3_2"), + _PIN(0x114, "MII1_TX_EN", 99, 7, "gmii1_txen", "rmii1_txen", "rgmii1_tctl", "timer4", "mcasp1_axr0", "eQEP0_index", "mmc2_cmd", "gpio3_3"), + _PIN(0x118, "MII1_RX_DV", 100, 7, "gmii1_rxdv", "cd_memory_clk", "rgmii1_rctl", "uart5_txd", "mcasp1_aclkx", "mmc2_dat0", "mcasp0_aclkr", "gpio3_4"), + _PIN(0x11c, "MII1_TXD3", 16, 7, "gmii1_txd3", "dcan0_tx", "rgmii1_td3", "uart4_rxd", "mcasp1_fsx", "mmc2_dat1", "mcasp0_fsr", "gpio0_16"), + _PIN(0x120, "MII1_TXD2", 17, 7, "gmii1_txd2", "dcan0_rx", "rgmii1_td2", "uart4_txd", "mcasp1_axr0", "mmc2_dat2", "mcasp0_ahclkx", "gpio0_17"), + _PIN(0x124, "MII1_TXD1", 21, 7, "gmii1_txd1", "rmii1_txd1", "rgmii1_td1", "mcasp1_fsr", "mcasp1_axr1", "eQEP0A_in", "mmc1_cmd", "gpio0_21"), + _PIN(0x128, "MII1_TXD0", 28, 7, "gmii1_txd0", "rmii1_txd0", "rgmii1_td0", "mcasp1_axr2", "mcasp1_aclkr", "eQEP0B_in", "mmc1_clk", "gpio0_28"), + _PIN(0x12c, "MII1_TX_CLK", 105, 7, "gmii1_txclk", "uart2_rxd", "rgmii1_tclk", "mmc0_dat7", "mmc1_dat0", "uart1_dcdn", "mcasp0_aclkx", "gpio3_9"), + _PIN(0x130, "MII1_RX_CLK", 106, 7, "gmii1_rxclk", "uart2_txd", "rgmii1_rclk", "mmc0_dat6", "mmc1_dat1", "uart1_dsrn", "mcasp0_fsx", "gpio3_10"), + _PIN(0x134, "MII1_RXD3", 82, 7, "gmii1_rxd3", "uart3_rxd", "rgmii1_rd3", "mmc0_dat5", "mmc1_dat2", "uart1_dtrn", "mcasp0_axr0", "gpio2_18"), + _PIN(0x138, "MII1_RXD2", 83, 7, "gmii1_rxd2", "uart3_txd", "rgmii1_rd2", "mmc0_dat4", "mmc1_dat3", "uart1_rin", "mcasp0_axr1", "gpio2_19"), + _PIN(0x13c, "MII1_RXD1", 84, 7, "gmii1_rxd1", "rmii1_rxd1", "rgmii1_rd1", "mcasp1_axr3", "mcasp1_fsr", "eQEP0_strobe", "mmc2_clk", "gpio2_20"), + _PIN(0x140, "MII1_RXD0", 85, 7, "gmii1_rxd0", "rmii1_rxd0", "rgmii1_rd0", "mcasp1_ahclkx", "mcasp1_ahclkr", "mcasp1_aclkr", "mcasp0_axr3", "gpio2_21"), + _PIN(0x144, "RMII1_REF_CLK", 29, 7, "rmii1_refclk", "xdma_event_intr2", "spi1_cs0", "uart5_txd", "mcasp1_axr3", "mmc0_pow", "mcasp1_ahclkx", "gpio0_29"), + _PIN(0x148, "MDIO", 0, 7, "mdio_data", "timer6", "uart5_rxd", "uart3_ctsn", "mmc0_sdcd","mmc1_cmd", "mmc2_cmd","gpio0_0"), + _PIN(0x14c, "MDC", 1, 7, "mdio_clk", "timer5", "uart5_txd", "uart3_rtsn", "mmc0_sdwp", "mmc1_clk", "mmc2_clk", "gpio0_1"), + _PIN(0x150, "SPI0_SCLK", 2, 7, "spi0_sclk", "uart2_rxd", "I2C2_SDA", "ehrpwm0A", "pr1_uart0_cts_n", "pr1_edio_sof", "EMU2", "gpio0_2"), + _PIN(0x154, "SPI0_D0", 3, 7, "spi0_d0", "uart2_txd", "I2C2_SCL", "ehrpwm0B", "pr1_uart0_rts_n", "pr1_edio_latch_in", "EMU3", "gpio0_3"), + _PIN(0x158, "SPI0_D1", 4, 7, "spi0_d1", "mmc1_sdwp", "I2C1_SDA", "ehrpwm0_tripzone_input", "pr1_uart0_rxd", "pr1_edio_data_in0", "pr1_edio_data_out0", "gpio0_4"), + _PIN(0x15c, "SPI0_CS0", 5, 7, "spi0_cs0", "mmc2_sdwp", "I2C1_SCL", "ehrpwm0_synci", "pr1_uart0_txd", "pr1_edio_data_in1", "pr1_edio_data_out1", "gpio0_5"), + _PIN(0x160, "SPI0_CS1", 6, 7, "spi0_cs1", "uart3_rxd", "eCAP1_in_PWM1_out", "mcc0_pow", "xdm_event_intr2", "mmc0_sdcd", "EMU4", "gpio0_6"), + _PIN(0x164, "ECAP0_IN_PWM0_OUT",7, 7, "eCAP0_in_PWM0_out", "uart3_txd", "spi1_cs1", "pr1_ecap0_ecap_capin_apwm_o", "spi1_sclk", "mmc0_sdwp", "xdma_event_intr2", "gpio0_7"), + _PIN(0x168, "UART0_CTSn", 40, 7, "uart0_ctsn", "uart4_rxd", "dcan1_tx", "I2C1_SDA", "spi1_d0", "timer7", "pr1_edc_sync0_out", "gpio1_8"), + _PIN(0x16c, "UART0_RTSn", 41, 7, "uart0_rtsn", "uart4_txd", "dcan1_rx", "I2C1_SCL", "spi1_d1", "spi1_cs0", "pr1_edc_sync1_out", "gpio1_9"), + _PIN(0x170, "UART0_rxd", 42, 7, "uart0_rxd", "spi1_cs0", "dcan0_tx", "I2C2_SDA", "eCAP2_in_PWM2_out", "pr1_pru1_pru_r30_14", "pr1_pru1_pru_r31_14", "gpio1_10"), + _PIN(0x174, "UART0_txd", 43, 7, "uart0_txd", "spi1_cs1", "dcan0_rx", "I2C2_SCL", "eCAP1_in_PWM1_out", "pr1_pru1_pru_r30_15", "pr1_pru1_pru_r31_15", "gpio1_11"), + _PIN(0x178, "UART1_CTSn", 12, 7, "uart1_ctsn", "timer6_mux1", "dcan0_tx", "I2C2_SDA", "spi1_cs0", "pr1_uart0_cts_n", "pr1_edc_latch0_in", "gpio0_12"), + _PIN(0x17c, "UART1_RTSn", 13, 7, "uart1_rtsn", "timer5_mux1", "dcan0_rx", "I2C2_SCL", "spi1_cs1", "pr1_uart0_rts_n", "pr1_edc_latch1_in", "gpio0_13"), + _PIN(0x180, "UART1_RXD", 14, 7, "uart1_rxd", "mmc1_sdwp", "dcan1_tx", "I2C1_SDA", NULL, "pr1_uart0_rxd", "pr1_pru1_pru_r31_16", "gpio0_14"), + _PIN(0x184, "UART1_TXD", 15, 7, "uart1_txd", "mmc2_sdwp", "dcan1_rx", "I2C1_SCL", NULL, "pr1_uart0_txd", "pr1_pru0_pru_r31_16", "gpio0_15"), + _PIN(0x188, "I2C0_SDA", 101, 7, "I2C0_SDA", "timer4", "uart2_ctsn", "eCAP2_in_PWM2_out", NULL, NULL, NULL, "gpio3_5"), + _PIN(0x18c, "I2C0_SCL", 102, 7, "I2C0_SCL", "timer7", "uart2_rtsn", "eCAP1_in_PWM1_out", NULL, NULL, NULL, "gpio3_6"), + _PIN(0x190, "MCASP0_ACLKX", 110, 7, "mcasp0_aclkx", "ehrpwm0A", NULL, "spi1_sclk", "mmc0_sdcd", "pr1_pru0_pru_r30_0", "pr1_pru0_pru_r31_0", "gpio3_14"), + _PIN(0x194, "MCASP0_FSX", 111, 7, "mcasp0_fsx", "ehrpwm0B", NULL, "spi1_d0", "mmc1_sdcd", "pr1_pru0_pru_r30_1", "pr1_pru0_pru_r31_1", "gpio3_15"), + _PIN(0x198, "MCASP0_AXR0", 112, 7, "mcasp0_axr0", "ehrpwm0_tripzone_input", NULL, "spi1_d1", "mmc2_sdcd", "pr1_pru0_pru_r30_2", "pr1_pru0_pru_r31_2", "gpio3_16"), + _PIN(0x19c, "MCASP0_AHCLKR", 113, 7, "mcasp0_ahclkr", "ehrpwm0_synci", "mcasp0_axr2", "spi1_cs0", "eCAP2_in_PWM2_out", "pr1_pru0_pru_r30_3", "pr1_pru0_pru_r31_3", "gpio3_17"), + _PIN(0x1a0, "MCASP0_ACLKR", 114, 7, "mcasp0_aclkr", "eQEP0A_in", "mcasp0_axr2", "mcasp1_aclkx", "mmc0_sdwp", "pr1_pru0_pru_r30_4", "pr1_pru0_pru_r31_4", "gpio3_18"), + _PIN(0x1a4, "MCASP0_FSR", 115, 7, "mcasp0_fsr", "eQEP0B_in", "mcasp0_axr3", "mcasp1_fsx", "EMU2", "pr1_pru0_pru_r30_5", "pr1_pru0_pru_r31_5", "gpio3_19"), + _PIN(0x1a8, "MCASP0_AXR1", 116, 7, "mcasp0_axr1", "eQEP0_index", NULL, "mcasp1_axr0", "EMU3", "pr1_pru0_pru_r30_6", "pr1_pru0_pru_r31_6", "gpio3_20"), + _PIN(0x1ac, "MCASP0_AHCLKX", 117, 7, "mcasp0_ahclkx", "eQEP0_strobe", "mcasp0_axr3", "mcasp1_axr1", "EMU4", "pr1_pru0_pru_r30_7", "pr1_pru0_pru_r31_7", "gpio3_21"), + _PIN(0x1b0, "XDMA_EVENT_INTR0", 19, 7, "xdma_event_intr0", NULL, "timer4", "clkout1", "spi1_cs1", "pr1_pru1_pru_r31_16", "EMU2", "gpio0_19"), + _PIN(0x1b4, "XDMA_EVENT_INTR1", 20, 7, "xdma_event_intr1", NULL, "tclkin", "clkout2", "timer7", "pr1_pru0_pru_r31_16", "EMU3", "gpio0_20"), #if 0 - _PIN(0x9b8, "nresetin_out", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0x9bc, "porz", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0x9c0, "nnmi", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0x9c4, "osc0_in", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0x9c8, "osc0_out", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0x9cc, "osc0_vss", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0x9d0, "tms", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0x9d4, "tdi", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0x9d8, "tdo", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0x9dc, "tck", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0x9e0, "ntrst", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x1b8, "nresetin_out", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x1bc, "porz", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x1c0, "nnmi", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x1c4, "osc0_in", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x1c8, "osc0_out", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x1cc, "osc0_vss", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x1d0, "tms", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x1d4, "tdi", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x1d8, "tdo", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x1dc, "tck", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x1e0, "ntrst", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), #endif - _PIN(0x9e4, "EMU0", 103, 7, "EMU0", NULL, NULL, NULL, NULL, NULL, NULL, "gpio3_7"), - _PIN(0x9e8, "EMU1", 104, 0, "EMU1", NULL, NULL, NULL, NULL, NULL, NULL, "gpio3_8"), + _PIN(0x1e4, "EMU0", 103, 7, "EMU0", NULL, NULL, NULL, NULL, NULL, NULL, "gpio3_7"), + _PIN(0x1e8, "EMU1", 104, 0, "EMU1", NULL, NULL, NULL, NULL, NULL, NULL, "gpio3_8"), #if 0 - _PIN(0x9ec, "osc1_in", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0x9f0, "osc1_out", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0x9f4, "osc1_vss", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0x9f8, "rtc_porz", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0x9fc, "pmic_power_en", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa00, "ext_wakeup", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa04, "enz_kaldo_1p8v", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x1ec, "osc1_in", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x1f0, "osc1_out", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x1f4, "osc1_vss", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x1f8, "rtc_porz", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x1fc, "pmic_power_en", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x200, "ext_wakeup", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x204, "enz_kaldo_1p8v", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), #endif - _PIN(0xa08, "USB0_DM", 0, 0, "USB0_DM", NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa0c, "USB0_DP", 0, 0, "USB0_DP", NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa10, "USB0_CE", 0, 0, "USB0_CE", NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa14, "USB0_ID", 0, 0, "USB0_ID", NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa18, "USB0_VBUS", 0, 0, "USB0_VBUS", NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa1c, "USB0_DRVVBUS", 18, 7, "USB0_DRVVBUS", NULL, NULL, NULL, NULL, NULL, NULL, "gpio0_18"), - _PIN(0xa20, "USB1_DM", 0, 0, "USB1_DM", NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa24, "USB1_DP", 0, 0, "USB1_DP", NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa28, "USB1_CE", 0, 0, "USB1_CE", NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa2c, "USB1_ID", 0, 0, "USB1_ID", NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa30, "USB1_VBUS", 0, 0, "USB1_VBUS", NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa34, "USB1_DRVVBUS", 109, 7, "USB1_DRVVBUS", NULL, NULL, NULL, NULL, NULL, NULL, "gpio3_13"), + _PIN(0x208, "USB0_DM", 0, 0, "USB0_DM", NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x20c, "USB0_DP", 0, 0, "USB0_DP", NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x210, "USB0_CE", 0, 0, "USB0_CE", NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x214, "USB0_ID", 0, 0, "USB0_ID", NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x218, "USB0_VBUS", 0, 0, "USB0_VBUS", NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x21c, "USB0_DRVVBUS", 18, 7, "USB0_DRVVBUS", NULL, NULL, NULL, NULL, NULL, NULL, "gpio0_18"), + _PIN(0x220, "USB1_DM", 0, 0, "USB1_DM", NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x224, "USB1_DP", 0, 0, "USB1_DP", NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x228, "USB1_CE", 0, 0, "USB1_CE", NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x22c, "USB1_ID", 0, 0, "USB1_ID", NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x230, "USB1_VBUS", 0, 0, "USB1_VBUS", NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x234, "USB1_DRVVBUS", 109, 7, "USB1_DRVVBUS", NULL, NULL, NULL, NULL, NULL, NULL, "gpio3_13"), #if 0 - _PIN(0xa38, "ddr_resetn", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa3c, "ddr_csn0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa40, "ddr_cke", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa44, "ddr_ck", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa48, "ddr_nck", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa4c, "ddr_casn", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa50, "ddr_rasn", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa54, "ddr_wen", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa58, "ddr_ba0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa5c, "ddr_ba1", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa60, "ddr_ba2", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa64, "ddr_a0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa68, "ddr_a1", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa6c, "ddr_a2", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa70, "ddr_a3", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa74, "ddr_a4", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa78, "ddr_a5", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa7c, "ddr_a6", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa80, "ddr_a7", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa84, "ddr_a8", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa88, "ddr_a9", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa8c, "ddr_a10", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa90, "ddr_a11", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa94, "ddr_a12", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa98, "ddr_a13", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xa9c, "ddr_a14", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xaa0, "ddr_a15", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xaa4, "ddr_odt", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xaa8, "ddr_d0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xaac, "ddr_d1", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xab0, "ddr_d2", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xab4, "ddr_d3", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xab8, "ddr_d4", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xabc, "ddr_d5", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xac0, "ddr_d6", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xac4, "ddr_d7", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xac8, "ddr_d8", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xacc, "ddr_d9", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xad0, "ddr_d10", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xad4, "ddr_d11", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xad8, "ddr_d12", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xadc, "ddr_d13", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xae0, "ddr_d14", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xae4, "ddr_d15", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xae8, "ddr_dqm0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xaec, "ddr_dqm1", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xaf0, "ddr_dqs0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xaf4, "ddr_dqsn0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xaf8, "ddr_dqs1", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xafc, "ddr_dqsn1", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xb00, "ddr_vref", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xb04, "ddr_vtp", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xb08, "ddr_strben0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xb0c, "ddr_strben1", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xb2c, "ain0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xb28, "ain1", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xb24, "ain2", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xb20, "ain3", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xb1c, "ain4", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xb18, "ain5", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xb14, "ain6", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xb10, "ain7", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xb30, "vrefp", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xb34, "vrefn", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xb38, "avdd", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xb3c, "avss", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xb40, "iforce", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xb44, "vsense", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PIN(0xb48, "testout", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x238, "ddr_resetn", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x23c, "ddr_csn0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x240, "ddr_cke", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x244, "ddr_ck", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x248, "ddr_nck", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x24c, "ddr_casn", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x250, "ddr_rasn", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x254, "ddr_wen", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x258, "ddr_ba0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x25c, "ddr_ba1", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x260, "ddr_ba2", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x264, "ddr_a0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x268, "ddr_a1", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x26c, "ddr_a2", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x270, "ddr_a3", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x274, "ddr_a4", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x278, "ddr_a5", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x27c, "ddr_a6", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x280, "ddr_a7", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x284, "ddr_a8", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x288, "ddr_a9", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x28c, "ddr_a10", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x290, "ddr_a11", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x294, "ddr_a12", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x298, "ddr_a13", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x29c, "ddr_a14", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x2a0, "ddr_a15", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x2a4, "ddr_odt", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x2a8, "ddr_d0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x2ac, "ddr_d1", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x2b0, "ddr_d2", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x2b4, "ddr_d3", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x2b8, "ddr_d4", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x2bc, "ddr_d5", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x2c0, "ddr_d6", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x2c4, "ddr_d7", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x2c8, "ddr_d8", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x2cc, "ddr_d9", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x2d0, "ddr_d10", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x2d4, "ddr_d11", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x2d8, "ddr_d12", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x2dc, "ddr_d13", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x2e0, "ddr_d14", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x2e4, "ddr_d15", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x2e8, "ddr_dqm0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x2ec, "ddr_dqm1", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x2f0, "ddr_dqs0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x2f4, "ddr_dqsn0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x2f8, "ddr_dqs1", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x2fc, "ddr_dqsn1", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x300, "ddr_vref", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x304, "ddr_vtp", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x308, "ddr_strben0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x30c, "ddr_strben1", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x32c, "ain0", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x328, "ain1", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x324, "ain2", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x320, "ain3", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x31c, "ain4", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x318, "ain5", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x314, "ain6", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x310, "ain7", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x330, "vrefp", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x334, "vrefn", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x338, "avdd", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x33c, "avss", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x340, "iforce", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x344, "vsense", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PIN(0x348, "testout", 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL), #endif { .ballname = NULL }, }; -const struct ti_scm_device ti_scm_dev = { +const struct ti_pinmux_device ti_pinmux_dev = { .padconf_muxmode_mask = 0x7, .padconf_sate_mask = 0x78, .padstate = ti_padstate_devmap, diff --git a/sys/arm/ti/am335x/am335x_usbss.c b/sys/arm/ti/am335x/am335x_usbss.c index ea1b982eba80..6ddc562c5a91 100644 --- a/sys/arm/ti/am335x/am335x_usbss.c +++ b/sys/arm/ti/am335x/am335x_usbss.c @@ -46,6 +46,7 @@ __FBSDID("$FreeBSD$"); #include #include +#include #include #include #include @@ -58,8 +59,6 @@ __FBSDID("$FreeBSD$"); #include #include -#define USB_DEBUG_VAR usbssdebug - #include #include #include @@ -97,164 +96,29 @@ __FBSDID("$FreeBSD$"); #define USBCTRL_MODE_IDDIG (1 << 8) #define USBCTRL_MODE_IDDIGMUX (1 << 7) -/* USBSS resource + 2 MUSB ports */ - -#define RES_USBSS 0 -#define RES_USBCTRL(i) (3*i+1) -#define RES_USBPHY(i) (3*i+2) -#define RES_USBCORE(i) (3*i+3) - -#define USB_WRITE4(sc, idx, reg, val) do { \ - bus_write_4((sc)->sc_mem_res[idx], (reg), (val)); \ -} while (0) - -#define USB_READ4(sc, idx, reg) bus_read_4((sc)->sc_mem_res[idx], (reg)) - #define USBSS_WRITE4(sc, reg, val) \ - USB_WRITE4((sc), RES_USBSS, (reg), (val)) + bus_write_4((sc)->sc_mem_res, (reg), (val)) #define USBSS_READ4(sc, reg) \ - USB_READ4((sc), RES_USBSS, (reg)) -#define USBCTRL_WRITE4(sc, unit, reg, val) \ - USB_WRITE4((sc), RES_USBCTRL(unit), (reg), (val)) -#define USBCTRL_READ4(sc, unit, reg) \ - USB_READ4((sc), RES_USBCTRL(unit), (reg)) -#define USBPHY_WRITE4(sc, unit, reg, val) \ - USB_WRITE4((sc), RES_USBPHY(unit), (reg), (val)) -#define USBPHY_READ4(sc, unit, reg) \ - USB_READ4((sc), RES_USBPHY(unit), (reg)) + bus_read_4((sc)->sc_mem_res, (reg)) -static struct resource_spec am335x_musbotg_mem_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, - { SYS_RES_MEMORY, 1, RF_ACTIVE }, - { SYS_RES_MEMORY, 2, RF_ACTIVE }, - { SYS_RES_MEMORY, 3, RF_ACTIVE }, - { SYS_RES_MEMORY, 4, RF_ACTIVE }, - { SYS_RES_MEMORY, 5, RF_ACTIVE }, - { SYS_RES_MEMORY, 6, RF_ACTIVE }, - { -1, 0, 0 } +static device_probe_t usbss_probe; +static device_attach_t usbss_attach; +static device_detach_t usbss_detach; + +struct usbss_softc { + struct simplebus_softc simplebus_sc; + struct resource *sc_mem_res; + int sc_mem_rid; }; -static struct resource_spec am335x_musbotg_irq_spec[] = { - { SYS_RES_IRQ, 0, RF_ACTIVE }, - { SYS_RES_IRQ, 1, RF_ACTIVE }, - { SYS_RES_IRQ, 2, RF_ACTIVE }, - { -1, 0, 0 } -}; - -#ifdef USB_DEBUG -static int usbssdebug = 0; - -static SYSCTL_NODE(_hw_usb, OID_AUTO, am335x_usbss, CTLFLAG_RW, 0, "AM335x USBSS"); -SYSCTL_INT(_hw_usb_am335x_usbss, OID_AUTO, debug, CTLFLAG_RW, - &usbssdebug, 0, "Debug level"); -#endif - -static device_probe_t musbotg_probe; -static device_attach_t musbotg_attach; -static device_detach_t musbotg_detach; - -struct musbotg_super_softc { - struct musbotg_softc sc_otg[AM335X_USB_PORTS]; - struct resource *sc_mem_res[AM335X_USB_PORTS*3+1]; - struct resource *sc_irq_res[AM335X_USB_PORTS+1]; - void *sc_intr_hdl; -}; - -static void -musbotg_vbus_poll(struct musbotg_super_softc *sc, int port) -{ - uint32_t stat; - - if (sc->sc_otg[port].sc_mode == MUSB2_DEVICE_MODE) - musbotg_vbus_interrupt(&sc->sc_otg[port], 1); - else { - stat = USBCTRL_READ4(sc, port, USBCTRL_STAT); - musbotg_vbus_interrupt(&sc->sc_otg[port], stat & 1); - } -} - -/* - * Arg to musbotg_clocks_on and musbot_clocks_off is - * a uint32_t * pointing to the SCM register offset. - */ -static uint32_t USB_CTRL[] = {SCM_USB_CTRL0, SCM_USB_CTRL1}; - -static void -musbotg_clocks_on(void *arg) -{ - uint32_t c, reg = *(uint32_t *)arg; - - ti_scm_reg_read_4(reg, &c); - c &= ~3; /* Enable power */ - c |= 1 << 19; /* VBUS detect enable */ - c |= 1 << 20; /* Session end enable */ - ti_scm_reg_write_4(reg, c); -} - -static void -musbotg_clocks_off(void *arg) -{ - uint32_t c, reg = *(uint32_t *)arg; - - /* Disable power to PHY */ - ti_scm_reg_read_4(reg, &c); - ti_scm_reg_write_4(reg, c | 3); -} - -static void -musbotg_ep_int_set(struct musbotg_softc *sc, int ep, int on) -{ - struct musbotg_super_softc *ssc = sc->sc_platform_data; - uint32_t epmask; - - epmask = ((1 << ep) << IRQ_STAT0_RXSHIFT); - epmask |= ((1 << ep) << IRQ_STAT0_TXSHIFT); - if (on) - USBCTRL_WRITE4(ssc, sc->sc_id, - USBCTRL_INTEN_SET0, epmask); - else - USBCTRL_WRITE4(ssc, sc->sc_id, - USBCTRL_INTEN_CLR0, epmask); -} - -static void -musbotg_usbss_interrupt(void *arg) -{ - panic("USBSS real interrupt"); -} - -static void -musbotg_wrapper_interrupt(void *arg) -{ - struct musbotg_softc *sc = arg; - struct musbotg_super_softc *ssc = sc->sc_platform_data; - uint32_t stat, stat0, stat1; - stat = USBCTRL_READ4(ssc, sc->sc_id, USBCTRL_STAT); - stat0 = USBCTRL_READ4(ssc, sc->sc_id, USBCTRL_IRQ_STAT0); - stat1 = USBCTRL_READ4(ssc, sc->sc_id, USBCTRL_IRQ_STAT1); - if (stat0) - USBCTRL_WRITE4(ssc, sc->sc_id, USBCTRL_IRQ_STAT0, stat0); - if (stat1) - USBCTRL_WRITE4(ssc, sc->sc_id, USBCTRL_IRQ_STAT1, stat1); - - DPRINTFN(4, "port%d: stat0=%08x stat1=%08x, stat=%08x\n", - sc->sc_id, stat0, stat1, stat); - - if (stat1 & IRQ_STAT1_DRVVBUS) - musbotg_vbus_interrupt(sc, stat & 1); - - musbotg_interrupt(arg, ((stat0 >> 16) & 0xffff), - stat0 & 0xffff, stat1 & 0xff); -} - static int -musbotg_probe(device_t dev) +usbss_probe(device_t dev) { if (!ofw_bus_status_okay(dev)) return (ENXIO); - if (!ofw_bus_is_compatible(dev, "ti,musb-am33xx")) + if (!ofw_bus_is_compatible(dev, "ti,am33xx-usb")) return (ENXIO); device_set_desc(dev, "TI AM33xx integrated USB OTG controller"); @@ -263,31 +127,22 @@ musbotg_probe(device_t dev) } static int -musbotg_attach(device_t dev) +usbss_attach(device_t dev) { - struct musbotg_super_softc *sc = device_get_softc(dev); - int err; + struct usbss_softc *sc = device_get_softc(dev); int i; - uint32_t rev, reg; + uint32_t rev; + phandle_t node; /* Request the memory resources */ - err = bus_alloc_resources(dev, am335x_musbotg_mem_spec, - sc->sc_mem_res); - if (err) { + sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, + &sc->sc_mem_rid, RF_ACTIVE); + if (sc->sc_mem_res == NULL) { device_printf(dev, "Error: could not allocate mem resources\n"); return (ENXIO); } - /* Request the IRQ resources */ - err = bus_alloc_resources(dev, am335x_musbotg_irq_spec, - sc->sc_irq_res); - if (err) { - device_printf(dev, - "Error: could not allocate irq resources\n"); - return (ENXIO); - } - /* Enable device clocks. */ ti_prcm_clk_enable(MUSB0_CLK); @@ -312,170 +167,50 @@ musbotg_attach(device_t dev) device_printf(dev, "TI AM335X USBSS v%d.%d.%d\n", (rev >> 8) & 7, (rev >> 6) & 3, rev & 63); - err = bus_setup_intr(dev, sc->sc_irq_res[0], - INTR_TYPE_BIO | INTR_MPSAFE, - NULL, (driver_intr_t *)musbotg_usbss_interrupt, sc, - &sc->sc_intr_hdl); - - if (err) { - sc->sc_intr_hdl = NULL; - device_printf(dev, "Failed to setup USBSS interrupt\n"); - goto error; + node = ofw_bus_get_node(dev); + + if (node == -1) { + usbss_detach(dev); + return (ENXIO); } - for (i = 0; i < AM335X_USB_PORTS; i++) { - /* setup MUSB OTG USB controller interface softc */ - sc->sc_otg[i].sc_clocks_on = &musbotg_clocks_on; - sc->sc_otg[i].sc_clocks_off = &musbotg_clocks_off; - sc->sc_otg[i].sc_clocks_arg = &USB_CTRL[i]; + simplebus_init(dev, node); - sc->sc_otg[i].sc_ep_int_set = musbotg_ep_int_set; + /* + * Allow devices to identify. + */ + bus_generic_probe(dev); - /* initialise some bus fields */ - sc->sc_otg[i].sc_bus.parent = dev; - sc->sc_otg[i].sc_bus.devices = sc->sc_otg[i].sc_devices; - sc->sc_otg[i].sc_bus.devices_max = MUSB2_MAX_DEVICES; - sc->sc_otg[i].sc_bus.dma_bits = 32; + /* + * Now walk the OFW tree and attach top-level devices. + */ + for (node = OF_child(node); node > 0; node = OF_peer(node)) + simplebus_add_device(dev, node, 0, NULL, -1, NULL); - /* get all DMA memory */ - if (usb_bus_mem_alloc_all(&sc->sc_otg[i].sc_bus, - USB_GET_DMA_TAG(dev), NULL)) { - device_printf(dev, - "Failed allocate bus mem for musb%d\n", i); - return (ENOMEM); - } - sc->sc_otg[i].sc_io_res = sc->sc_mem_res[RES_USBCORE(i)]; - sc->sc_otg[i].sc_io_tag = - rman_get_bustag(sc->sc_otg[i].sc_io_res); - sc->sc_otg[i].sc_io_hdl = - rman_get_bushandle(sc->sc_otg[i].sc_io_res); - sc->sc_otg[i].sc_io_size = - rman_get_size(sc->sc_otg[i].sc_io_res); - - sc->sc_otg[i].sc_irq_res = sc->sc_irq_res[i+1]; - - sc->sc_otg[i].sc_bus.bdev = device_add_child(dev, "usbus", -1); - if (!(sc->sc_otg[i].sc_bus.bdev)) { - device_printf(dev, "No busdev for musb%d\n", i); - goto error; - } - device_set_ivars(sc->sc_otg[i].sc_bus.bdev, - &sc->sc_otg[i].sc_bus); - - err = bus_setup_intr(dev, sc->sc_otg[i].sc_irq_res, - INTR_TYPE_BIO | INTR_MPSAFE, - NULL, (driver_intr_t *)musbotg_wrapper_interrupt, - &sc->sc_otg[i], &sc->sc_otg[i].sc_intr_hdl); - if (err) { - sc->sc_otg[i].sc_intr_hdl = NULL; - device_printf(dev, - "Failed to setup interrupt for musb%d\n", i); - goto error; - } - - sc->sc_otg[i].sc_id = i; - sc->sc_otg[i].sc_platform_data = sc; - if (i == 0) - sc->sc_otg[i].sc_mode = MUSB2_DEVICE_MODE; - else - sc->sc_otg[i].sc_mode = MUSB2_HOST_MODE; - - /* - * software-controlled function - */ - - if (sc->sc_otg[i].sc_mode == MUSB2_HOST_MODE) { - reg = USBCTRL_READ4(sc, i, USBCTRL_MODE); - reg |= USBCTRL_MODE_IDDIGMUX; - reg &= ~USBCTRL_MODE_IDDIG; - USBCTRL_WRITE4(sc, i, USBCTRL_MODE, reg); - USBCTRL_WRITE4(sc, i, USBCTRL_UTMI, - USBCTRL_UTMI_FSDATAEXT); - } else { - reg = USBCTRL_READ4(sc, i, USBCTRL_MODE); - reg |= USBCTRL_MODE_IDDIGMUX; - reg |= USBCTRL_MODE_IDDIG; - USBCTRL_WRITE4(sc, i, USBCTRL_MODE, reg); - } - - reg = USBCTRL_INTEN_USB_ALL & ~USBCTRL_INTEN_USB_SOF; - USBCTRL_WRITE4(sc, i, USBCTRL_INTEN_SET1, reg); - USBCTRL_WRITE4(sc, i, USBCTRL_INTEN_CLR0, 0xffffffff); - - err = musbotg_init(&sc->sc_otg[i]); - if (!err) - err = device_probe_and_attach(sc->sc_otg[i].sc_bus.bdev); - - if (err) - goto error; - - /* poll VBUS one time */ - musbotg_vbus_poll(sc, i); - } - - return (0); - -error: - musbotg_detach(dev); - return (ENXIO); + return (bus_generic_attach(dev)); } static int -musbotg_detach(device_t dev) +usbss_detach(device_t dev) { - struct musbotg_super_softc *sc = device_get_softc(dev); - device_t bdev; - int err; - int i; - - for (i = 0; i < AM335X_USB_PORTS; i++) { - if (sc->sc_otg[i].sc_bus.bdev) { - bdev = sc->sc_otg[i].sc_bus.bdev; - device_detach(bdev); - device_delete_child(dev, bdev); - } - - if (sc->sc_otg[i].sc_irq_res && sc->sc_otg[i].sc_intr_hdl) { - /* - * only call musbotg_uninit() after musbotg_init() - */ - musbotg_uninit(&sc->sc_otg[i]); - - err = bus_teardown_intr(dev, sc->sc_otg[i].sc_irq_res, - sc->sc_otg[i].sc_intr_hdl); - sc->sc_otg[i].sc_intr_hdl = NULL; - } - - usb_bus_mem_free_all(&sc->sc_otg[i].sc_bus, NULL); - } - - if (sc->sc_intr_hdl) { - bus_teardown_intr(dev, sc->sc_irq_res[0], - sc->sc_intr_hdl); - sc->sc_intr_hdl = NULL; - } - + struct usbss_softc *sc = device_get_softc(dev); /* Free resources if any */ - if (sc->sc_mem_res[0]) - bus_release_resources(dev, am335x_musbotg_mem_spec, + if (sc->sc_mem_res) + bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_mem_rid, sc->sc_mem_res); - if (sc->sc_irq_res[0]) - bus_release_resources(dev, am335x_musbotg_irq_spec, - sc->sc_irq_res); - /* during module unload there are lots of children leftover */ device_delete_children(dev); return (0); } -static device_method_t musbotg_methods[] = { +static device_method_t usbss_methods[] = { /* Device interface */ - DEVMETHOD(device_probe, musbotg_probe), - DEVMETHOD(device_attach, musbotg_attach), - DEVMETHOD(device_detach, musbotg_detach), + DEVMETHOD(device_probe, usbss_probe), + DEVMETHOD(device_attach, usbss_attach), + DEVMETHOD(device_detach, usbss_detach), DEVMETHOD(device_suspend, bus_generic_suspend), DEVMETHOD(device_resume, bus_generic_resume), DEVMETHOD(device_shutdown, bus_generic_shutdown), @@ -483,13 +218,8 @@ static device_method_t musbotg_methods[] = { DEVMETHOD_END }; -static driver_t musbotg_driver = { - .name = "musbotg", - .methods = musbotg_methods, - .size = sizeof(struct musbotg_super_softc), -}; - -static devclass_t musbotg_devclass; - -DRIVER_MODULE(musbotg, simplebus, musbotg_driver, musbotg_devclass, 0, 0); -MODULE_DEPEND(musbotg, usb, 1, 1, 1); +DEFINE_CLASS_1(usbss, usbss_driver, usbss_methods, + sizeof(struct usbss_softc), simplebus_driver); +static devclass_t usbss_devclass; +DRIVER_MODULE(usbss, simplebus, usbss_driver, usbss_devclass, 0, 0); +MODULE_DEPEND(usbss, usb, 1, 1, 1); diff --git a/sys/arm/ti/am335x/files.am335x b/sys/arm/ti/am335x/files.am335x index aee414fc7b8d..277ee52f10be 100644 --- a/sys/arm/ti/am335x/files.am335x +++ b/sys/arm/ti/am335x/files.am335x @@ -8,10 +8,13 @@ arm/ti/am335x/am335x_lcd.c optional sc | vt arm/ti/am335x/am335x_lcd_syscons.c optional sc arm/ti/am335x/am335x_pmic.c optional am335x_pmic arm/ti/am335x/am335x_prcm.c standard -arm/ti/am335x/am335x_pwm.c standard +arm/ti/am335x/am335x_pwmss.c standard +arm/ti/am335x/am335x_ehrpwm.c standard +arm/ti/am335x/am335x_ecap.c standard arm/ti/am335x/am335x_rtc.c optional am335x_rtc arm/ti/am335x/am335x_scm_padconf.c standard arm/ti/am335x/am335x_usbss.c optional musb fdt +arm/ti/am335x/am335x_musb.c optional musb fdt arm/ti/ti_edma3.c standard arm/ti/cpsw/if_cpsw.c optional cpsw diff --git a/sys/arm/ti/cpsw/if_cpsw.c b/sys/arm/ti/cpsw/if_cpsw.c index 49e30656eadc..a27393dd10d3 100644 --- a/sys/arm/ti/cpsw/if_cpsw.c +++ b/sys/arm/ti/cpsw/if_cpsw.c @@ -113,6 +113,7 @@ static int cpsw_ioctl(struct ifnet *, u_long command, caddr_t data); static int cpsw_miibus_readreg(device_t, int phy, int reg); static int cpsw_miibus_writereg(device_t, int phy, int reg, int value); +static void cpsw_miibus_statchg(device_t); /* Send/Receive packets. */ static void cpsw_intr_rx(void *arg); @@ -179,6 +180,7 @@ static device_method_t cpsw_methods[] = { /* MII interface */ DEVMETHOD(miibus_readreg, cpsw_miibus_readreg), DEVMETHOD(miibus_writereg, cpsw_miibus_writereg), + DEVMETHOD(miibus_statchg, cpsw_miibus_statchg), { 0, 0 } }; @@ -195,8 +197,7 @@ DRIVER_MODULE(miibus, cpsw, miibus_driver, miibus_devclass, 0, 0); MODULE_DEPEND(cpsw, ether, 1, 1, 1); MODULE_DEPEND(cpsw, miibus, 1, 1, 1); -static struct resource_spec res_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, +static struct resource_spec irq_res_spec[] = { { SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE }, { SYS_RES_IRQ, 1, RF_ACTIVE | RF_SHAREABLE }, { SYS_RES_IRQ, 2, RF_ACTIVE | RF_SHAREABLE }, @@ -322,21 +323,21 @@ cpsw_debugf(const char *fmt, ...) /* * Read/Write macros */ -#define cpsw_read_4(sc, reg) bus_read_4(sc->res[0], reg) -#define cpsw_write_4(sc, reg, val) bus_write_4(sc->res[0], reg, val) +#define cpsw_read_4(sc, reg) bus_read_4(sc->mem_res, reg) +#define cpsw_write_4(sc, reg, val) bus_write_4(sc->mem_res, reg, val) #define cpsw_cpdma_bd_offset(i) (CPSW_CPPI_RAM_OFFSET + ((i)*16)) #define cpsw_cpdma_bd_paddr(sc, slot) \ - BUS_SPACE_PHYSADDR(sc->res[0], slot->bd_offset) + BUS_SPACE_PHYSADDR(sc->mem_res, slot->bd_offset) #define cpsw_cpdma_read_bd(sc, slot, val) \ - bus_read_region_4(sc->res[0], slot->bd_offset, (uint32_t *) val, 4) + bus_read_region_4(sc->mem_res, slot->bd_offset, (uint32_t *) val, 4) #define cpsw_cpdma_write_bd(sc, slot, val) \ - bus_write_region_4(sc->res[0], slot->bd_offset, (uint32_t *) val, 4) + bus_write_region_4(sc->mem_res, slot->bd_offset, (uint32_t *) val, 4) #define cpsw_cpdma_write_bd_next(sc, slot, next_slot) \ cpsw_write_4(sc, slot->bd_offset, cpsw_cpdma_bd_paddr(sc, next_slot)) #define cpsw_cpdma_read_bd_flags(sc, slot) \ - bus_read_2(sc->res[0], slot->bd_offset + 14) + bus_read_2(sc->mem_res, slot->bd_offset + 14) #define cpsw_write_hdp_slot(sc, queue, slot) \ cpsw_write_4(sc, (queue)->hdp_offset, cpsw_cpdma_bd_paddr(sc, slot)) #define CP_OFFSET (CPSW_CPDMA_TX_CP(0) - CPSW_CPDMA_TX_HDP(0)) @@ -549,9 +550,12 @@ cpsw_attach(device_t dev) struct cpsw_softc *sc = device_get_softc(dev); struct mii_softc *miisc; struct ifnet *ifp; - void *phy_sc; - int error, phy, nsegs; + int phy, nsegs, error; uint32_t reg; + pcell_t phy_id[3]; + u_long mem_base, mem_size; + phandle_t child; + int len; CPSW_DEBUGF(("")); @@ -559,21 +563,58 @@ cpsw_attach(device_t dev) sc->dev = dev; sc->node = ofw_bus_get_node(dev); - /* Get phy address from fdt */ - if (fdt_get_phyaddr(sc->node, sc->dev, &phy, &phy_sc) != 0) { + /* TODO: handle multiple slaves */ + phy = -1; + + /* Find any slave with phy_id */ + for (child = OF_child(sc->node); child != 0; child = OF_peer(child)) { + len = OF_getproplen(child, "phy_id"); + if (len <= 0) + continue; + + /* Get phy address from fdt */ + if (OF_getencprop(child, "phy_id", phy_id, len) <= 0) + continue; + + phy = phy_id[1]; + /* TODO: get memory window for MDIO */ + + break; + } + + if (phy == -1) { device_printf(dev, "failed to get PHY address from FDT\n"); return (ENXIO); } + + mem_base = 0; + mem_size = 0; + + if (fdt_regsize(sc->node, &mem_base, &mem_size) != 0) { + device_printf(sc->dev, "no regs property in cpsw node\n"); + return (ENXIO); + } + /* Initialize mutexes */ mtx_init(&sc->tx.lock, device_get_nameunit(dev), "cpsw TX lock", MTX_DEF); mtx_init(&sc->rx.lock, device_get_nameunit(dev), "cpsw RX lock", MTX_DEF); - /* Allocate IO and IRQ resources */ - error = bus_alloc_resources(dev, res_spec, sc->res); + /* Allocate IRQ resources */ + error = bus_alloc_resources(dev, irq_res_spec, sc->irq_res); if (error) { - device_printf(dev, "could not allocate resources\n"); + device_printf(dev, "could not allocate IRQ resources\n"); + cpsw_detach(dev); + return (ENXIO); + } + + sc->mem_rid = 0; + sc->mem_res = bus_alloc_resource(dev, SYS_RES_MEMORY, + &sc->mem_rid, mem_base, mem_base + CPSW_MEMWINDOW_SIZE -1, + CPSW_MEMWINDOW_SIZE, RF_ACTIVE); + if (sc->mem_res == NULL) { + device_printf(sc->dev, "failed to allocate memory resource\n"); cpsw_detach(dev); return (ENXIO); } @@ -690,11 +731,11 @@ cpsw_attach(device_t dev) cpsw_write_4(sc, MDIOUSERPHYSEL0, 1 << 6 | (miisc->mii_phy & 0x1F)); /* Note: We don't use sc->res[3] (TX interrupt) */ - if (cpsw_attach_interrupt(sc, sc->res[1], + if (cpsw_attach_interrupt(sc, sc->irq_res[0], cpsw_intr_rx_thresh, "CPSW RX threshold interrupt") || - cpsw_attach_interrupt(sc, sc->res[2], + cpsw_attach_interrupt(sc, sc->irq_res[1], cpsw_intr_rx, "CPSW RX interrupt") || - cpsw_attach_interrupt(sc, sc->res[4], + cpsw_attach_interrupt(sc, sc->irq_res[3], cpsw_intr_misc, "CPSW misc interrupt")) { cpsw_detach(dev); return (ENXIO); @@ -761,7 +802,8 @@ cpsw_detach(device_t dev) KASSERT(error == 0, ("Unable to destroy DMA tag")); /* Free IO memory handler */ - bus_release_resources(dev, res_spec, sc->res); + bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem_res); + bus_release_resources(dev, irq_res_spec, sc->irq_res); if (sc->ifp != NULL) if_free(sc->ifp); @@ -1225,6 +1267,36 @@ cpsw_miibus_writereg(device_t dev, int phy, int reg, int value) return 0; } +static void +cpsw_miibus_statchg(device_t dev) +{ + struct cpsw_softc *sc = device_get_softc(dev); + uint32_t mac_control; + int i; + + CPSW_DEBUGF(("")); + + for (i = 0; i < 2; i++) { + mac_control = cpsw_read_4(sc, CPSW_SL_MACCONTROL(i)); + mac_control &= ~(1 << 15 | 1 << 7); + + switch(IFM_SUBTYPE(sc->mii->mii_media_active)) { + case IFM_1000_SX: + case IFM_1000_LX: + case IFM_1000_CX: + case IFM_1000_T: + mac_control |= 1 << 7; + break; + + default: + mac_control |= 1 << 15; + break; + } + + cpsw_write_4(sc, CPSW_SL_MACCONTROL(i), mac_control); + } +} + /* * * Transmit/Receive Packets. diff --git a/sys/arm/ti/cpsw/if_cpswreg.h b/sys/arm/ti/cpsw/if_cpswreg.h index 46f84177f99e..98d603396fa2 100644 --- a/sys/arm/ti/cpsw/if_cpswreg.h +++ b/sys/arm/ti/cpsw/if_cpswreg.h @@ -118,6 +118,8 @@ #define CPSW_CPPI_RAM_OFFSET 0x2000 #define CPSW_CPPI_RAM_SIZE 0x2000 +#define CPSW_MEMWINDOW_SIZE 0x4000 + #define CPDMA_BD_SOP (1<<15) #define CPDMA_BD_EOP (1<<14) #define CPDMA_BD_OWNER (1<<13) diff --git a/sys/arm/ti/cpsw/if_cpswvar.h b/sys/arm/ti/cpsw/if_cpswvar.h index 2aebb0fb01fa..fbd7de5a22ea 100644 --- a/sys/arm/ti/cpsw/if_cpswvar.h +++ b/sys/arm/ti/cpsw/if_cpswvar.h @@ -78,7 +78,9 @@ struct cpsw_softc { device_t miibus; struct mii_data *mii; /* We expect 1 memory resource and 4 interrupts from the device tree. */ - struct resource *res[1 + CPSW_INTR_COUNT]; + struct resource *mem_res; + int mem_rid; + struct resource *irq_res[CPSW_INTR_COUNT]; /* Interrupts get recorded here as we initialize them. */ /* Interrupt teardown just walks this list. */ diff --git a/sys/arm/ti/files.ti b/sys/arm/ti/files.ti index 2be467ebad36..c97f71b33c7c 100644 --- a/sys/arm/ti/files.ti +++ b/sys/arm/ti/files.ti @@ -9,9 +9,11 @@ arm/arm/pmu.c optional hwpmc arm/ti/ti_common.c standard arm/ti/ti_cpuid.c standard +arm/ti/ti_hwmods.c standard arm/ti/ti_machdep.c standard arm/ti/ti_prcm.c standard arm/ti/ti_scm.c standard +arm/ti/ti_pinmux.c standard dev/mbox/mbox_if.m optional ti_mbox arm/ti/ti_mbox.c optional ti_mbox arm/ti/ti_pruss.c optional ti_pruss diff --git a/sys/arm/ti/omap4/files.omap4 b/sys/arm/ti/omap4/files.omap4 index 22d7aeb8c943..9f0fc76b9835 100644 --- a/sys/arm/ti/omap4/files.omap4 +++ b/sys/arm/ti/omap4/files.omap4 @@ -1,10 +1,11 @@ #$FreeBSD$ -arm/arm/gic.c standard arm/arm/mpcore_timer.c standard arm/ti/ti_smc.S standard arm/ti/usb/omap_ehci.c optional usb ehci +arm/ti/usb/omap_host.c optional usb +arm/ti/usb/omap_tll.c optional usb arm/ti/ti_sdma.c optional ti_sdma arm/ti/omap4/omap4_gpio.c optional gpio diff --git a/sys/arm/ti/omap4/omap4_gpio.c b/sys/arm/ti/omap4/omap4_gpio.c index 9831f4e96199..dc32298cd2c1 100644 --- a/sys/arm/ti/omap4/omap4_gpio.c +++ b/sys/arm/ti/omap4/omap4_gpio.c @@ -44,7 +44,7 @@ __FBSDID("$FreeBSD$"); #include #include -#include +#include #include @@ -77,6 +77,9 @@ static int omap4_gpio_set_flags(device_t dev, uint32_t gpio, uint32_t flags) { unsigned int state = 0; + struct ti_gpio_softc *sc; + + sc = device_get_softc(dev); /* First the SCM driver needs to be told to put the pad into GPIO mode */ if (flags & GPIO_PIN_OUTPUT) state = PADCONF_PIN_OUTPUT; @@ -88,16 +91,19 @@ omap4_gpio_set_flags(device_t dev, uint32_t gpio, uint32_t flags) else state = PADCONF_PIN_INPUT; } - return ti_scm_padconf_set_gpiomode(gpio, state); + return ti_pinmux_padconf_set_gpiomode((sc->sc_bank-1)*32 + gpio, state); } static int omap4_gpio_get_flags(device_t dev, uint32_t gpio, uint32_t *flags) { unsigned int state; + struct ti_gpio_softc *sc; + + sc = device_get_softc(dev); /* Get the current pin state */ - if (ti_scm_padconf_get_gpiomode(gpio, &state) != 0) { + if (ti_pinmux_padconf_get_gpiomode((sc->sc_bank-1)*32 + gpio, &state) != 0) { *flags = 0; return (EINVAL); } else { diff --git a/sys/arm/ti/omap4/omap4_prcm_clks.c b/sys/arm/ti/omap4/omap4_prcm_clks.c index 5a8a327ed129..8b1cb6ef3c76 100644 --- a/sys/arm/ti/omap4/omap4_prcm_clks.c +++ b/sys/arm/ti/omap4/omap4_prcm_clks.c @@ -93,17 +93,9 @@ __FBSDID("$FreeBSD$"); #define FREQ_48MHZ 48000000 #define FREQ_32KHZ 32000 -/** - * We need three memory regions to cover all the clock configuration registers. - * - * PRM Instance - 0x4A30 6000 : 0x4A30 8000 - * CM1 Instance - 0x4A00 4000 : 0x4A00 5000 - * CM2 Instance - 0x4A00 8000 : 0x4A00 A000 - * - */ -#define PRM_INSTANCE_MEM_REGION 0 -#define CM1_INSTANCE_MEM_REGION 1 -#define CM2_INSTANCE_MEM_REGION 2 +#define PRM_INSTANCE 1 +#define CM1_INSTANCE 2 +#define CM2_INSTANCE 3 /** * Address offsets from the PRM memory region to the top level clock control @@ -174,19 +166,19 @@ __FBSDID("$FreeBSD$"); #define CLKCTRL_IDLEST_IDLE 0x00020000UL #define CLKCTRL_IDLEST_DISABLED 0x00030000UL -static struct resource_spec omap4_scm_res_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, /* Control memory window */ - { SYS_RES_MEMORY, 1, RF_ACTIVE }, /* Control memory window */ - { SYS_RES_MEMORY, 2, RF_ACTIVE }, /* Control memory window */ - { -1, 0 } +static struct ofw_compat_data compat_data[] = { + {"ti,omap4-cm1", (uintptr_t)CM1_INSTANCE}, + {"ti,omap4-cm2", (uintptr_t)CM2_INSTANCE}, + {"ti,omap4-prm", (uintptr_t)PRM_INSTANCE}, + {NULL, (uintptr_t)0}, }; struct omap4_prcm_softc { - struct resource *sc_res[3]; + struct resource *sc_res; + int sc_rid; + int sc_instance; }; -static struct omap4_prcm_softc *omap4_prcm_sc; - static int omap4_clk_generic_activate(struct ti_clock_dev *clkdev); static int omap4_clk_generic_deactivate(struct ti_clock_dev *clkdev); static int omap4_clk_generic_accessible(struct ti_clock_dev *clkdev); @@ -283,17 +275,17 @@ struct ti_clock_dev ti_omap4_clk_devmap[] = { OMAP4_GENERIC_CLOCK_DEV(UART4_CLK), /* Timer device source clocks */ - OMAP4_GPTIMER_CLOCK_DEV(GPTIMER1_CLK), - OMAP4_GPTIMER_CLOCK_DEV(GPTIMER2_CLK), - OMAP4_GPTIMER_CLOCK_DEV(GPTIMER3_CLK), - OMAP4_GPTIMER_CLOCK_DEV(GPTIMER4_CLK), - OMAP4_GPTIMER_CLOCK_DEV(GPTIMER5_CLK), - OMAP4_GPTIMER_CLOCK_DEV(GPTIMER6_CLK), - OMAP4_GPTIMER_CLOCK_DEV(GPTIMER7_CLK), - OMAP4_GPTIMER_CLOCK_DEV(GPTIMER8_CLK), - OMAP4_GPTIMER_CLOCK_DEV(GPTIMER9_CLK), - OMAP4_GPTIMER_CLOCK_DEV(GPTIMER10_CLK), - OMAP4_GPTIMER_CLOCK_DEV(GPTIMER11_CLK), + OMAP4_GPTIMER_CLOCK_DEV(TIMER1_CLK), + OMAP4_GPTIMER_CLOCK_DEV(TIMER2_CLK), + OMAP4_GPTIMER_CLOCK_DEV(TIMER3_CLK), + OMAP4_GPTIMER_CLOCK_DEV(TIMER4_CLK), + OMAP4_GPTIMER_CLOCK_DEV(TIMER5_CLK), + OMAP4_GPTIMER_CLOCK_DEV(TIMER6_CLK), + OMAP4_GPTIMER_CLOCK_DEV(TIMER7_CLK), + OMAP4_GPTIMER_CLOCK_DEV(TIMER8_CLK), + OMAP4_GPTIMER_CLOCK_DEV(TIMER9_CLK), + OMAP4_GPTIMER_CLOCK_DEV(TIMER10_CLK), + OMAP4_GPTIMER_CLOCK_DEV(TIMER11_CLK), /* MMC device clocks (MMC1 and MMC2 can have different input clocks) */ OMAP4_HSMMC_CLOCK_DEV(MMC1_CLK), @@ -344,7 +336,7 @@ struct ti_clock_dev ti_omap4_clk_devmap[] = { struct omap4_clk_details { clk_ident_t id; - uint32_t mem_region; + uint32_t instance; uint32_t clksel_reg; int32_t src_freq; @@ -352,9 +344,9 @@ struct omap4_clk_details { uint32_t enable_mode; }; -#define OMAP4_GENERIC_CLOCK_DETAILS(i, f, m, r, e) \ +#define OMAP4_GENERIC_CLOCK_DETAILS(i, f, di, r, e) \ { .id = (i), \ - .mem_region = (m), \ + .instance = (di), \ .clksel_reg = (r), \ .src_freq = (f), \ .enable_mode = (e), \ @@ -363,77 +355,77 @@ struct omap4_clk_details { static struct omap4_clk_details g_omap4_clk_details[] = { /* UART */ - OMAP4_GENERIC_CLOCK_DETAILS(UART1_CLK, FREQ_48MHZ, CM2_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(UART1_CLK, FREQ_48MHZ, CM2_INSTANCE, (L4PER_CM2_OFFSET + 0x0140), CLKCTRL_MODULEMODE_ENABLE), - OMAP4_GENERIC_CLOCK_DETAILS(UART2_CLK, FREQ_48MHZ, CM2_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(UART2_CLK, FREQ_48MHZ, CM2_INSTANCE, (L4PER_CM2_OFFSET + 0x0148), CLKCTRL_MODULEMODE_ENABLE), - OMAP4_GENERIC_CLOCK_DETAILS(UART3_CLK, FREQ_48MHZ, CM2_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(UART3_CLK, FREQ_48MHZ, CM2_INSTANCE, (L4PER_CM2_OFFSET + 0x0140), CLKCTRL_MODULEMODE_ENABLE), - OMAP4_GENERIC_CLOCK_DETAILS(UART4_CLK, FREQ_48MHZ, CM2_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(UART4_CLK, FREQ_48MHZ, CM2_INSTANCE, (L4PER_CM2_OFFSET + 0x0148), CLKCTRL_MODULEMODE_ENABLE), /* General purpose timers */ - OMAP4_GENERIC_CLOCK_DETAILS(GPTIMER1_CLK, -1, PRM_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(TIMER1_CLK, -1, PRM_INSTANCE, (WKUP_CM_OFFSET + 0x040), CLKCTRL_MODULEMODE_ENABLE), - OMAP4_GENERIC_CLOCK_DETAILS(GPTIMER2_CLK, -1, CM2_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(TIMER2_CLK, -1, CM2_INSTANCE, (L4PER_CM2_OFFSET + 0x038), CLKCTRL_MODULEMODE_ENABLE), - OMAP4_GENERIC_CLOCK_DETAILS(GPTIMER3_CLK, -1, CM2_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(TIMER3_CLK, -1, CM2_INSTANCE, (L4PER_CM2_OFFSET + 0x040), CLKCTRL_MODULEMODE_ENABLE), - OMAP4_GENERIC_CLOCK_DETAILS(GPTIMER4_CLK, -1, CM2_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(TIMER4_CLK, -1, CM2_INSTANCE, (L4PER_CM2_OFFSET + 0x048), CLKCTRL_MODULEMODE_ENABLE), - OMAP4_GENERIC_CLOCK_DETAILS(GPTIMER5_CLK, -1, CM1_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(TIMER5_CLK, -1, CM1_INSTANCE, (ABE_CM1_OFFSET + 0x068), CLKCTRL_MODULEMODE_ENABLE), - OMAP4_GENERIC_CLOCK_DETAILS(GPTIMER6_CLK, -1, CM1_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(TIMER6_CLK, -1, CM1_INSTANCE, (ABE_CM1_OFFSET + 0x070), CLKCTRL_MODULEMODE_ENABLE), - OMAP4_GENERIC_CLOCK_DETAILS(GPTIMER7_CLK, -1, CM1_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(TIMER7_CLK, -1, CM1_INSTANCE, (ABE_CM1_OFFSET + 0x078), CLKCTRL_MODULEMODE_ENABLE), - OMAP4_GENERIC_CLOCK_DETAILS(GPTIMER8_CLK, -1, CM1_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(TIMER8_CLK, -1, CM1_INSTANCE, (ABE_CM1_OFFSET + 0x080), CLKCTRL_MODULEMODE_ENABLE), - OMAP4_GENERIC_CLOCK_DETAILS(GPTIMER9_CLK, -1, CM2_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(TIMER9_CLK, -1, CM2_INSTANCE, (L4PER_CM2_OFFSET + 0x050), CLKCTRL_MODULEMODE_ENABLE), - OMAP4_GENERIC_CLOCK_DETAILS(GPTIMER10_CLK, -1, CM2_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(TIMER10_CLK, -1, CM2_INSTANCE, (L4PER_CM2_OFFSET + 0x028), CLKCTRL_MODULEMODE_ENABLE), - OMAP4_GENERIC_CLOCK_DETAILS(GPTIMER11_CLK, -1, CM2_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(TIMER11_CLK, -1, CM2_INSTANCE, (L4PER_CM2_OFFSET + 0x030), CLKCTRL_MODULEMODE_ENABLE), /* HSMMC (MMC1 and MMC2 can have different input clocks) */ - OMAP4_GENERIC_CLOCK_DETAILS(MMC1_CLK, -1, CM2_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(MMC1_CLK, -1, CM2_INSTANCE, (L3INIT_CM2_OFFSET + 0x028), /*CLKCTRL_MODULEMODE_ENABLE*/2), - OMAP4_GENERIC_CLOCK_DETAILS(MMC2_CLK, -1, CM2_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(MMC2_CLK, -1, CM2_INSTANCE, (L3INIT_CM2_OFFSET + 0x030), /*CLKCTRL_MODULEMODE_ENABLE*/2), - OMAP4_GENERIC_CLOCK_DETAILS(MMC3_CLK, FREQ_48MHZ, CM2_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(MMC3_CLK, FREQ_48MHZ, CM2_INSTANCE, (L4PER_CM2_OFFSET + 0x120), /*CLKCTRL_MODULEMODE_ENABLE*/2), - OMAP4_GENERIC_CLOCK_DETAILS(MMC4_CLK, FREQ_48MHZ, CM2_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(MMC4_CLK, FREQ_48MHZ, CM2_INSTANCE, (L4PER_CM2_OFFSET + 0x128), /*CLKCTRL_MODULEMODE_ENABLE*/2), - OMAP4_GENERIC_CLOCK_DETAILS(MMC5_CLK, FREQ_48MHZ, CM2_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(MMC5_CLK, FREQ_48MHZ, CM2_INSTANCE, (L4PER_CM2_OFFSET + 0x160), /*CLKCTRL_MODULEMODE_ENABLE*/1), /* GPIO modules */ - OMAP4_GENERIC_CLOCK_DETAILS(GPIO1_CLK, -1, PRM_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(GPIO1_CLK, -1, PRM_INSTANCE, (WKUP_CM_OFFSET + 0x038), CLKCTRL_MODULEMODE_AUTO), - OMAP4_GENERIC_CLOCK_DETAILS(GPIO2_CLK, -1, CM2_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(GPIO2_CLK, -1, CM2_INSTANCE, (L4PER_CM2_OFFSET + 0x060), CLKCTRL_MODULEMODE_AUTO), - OMAP4_GENERIC_CLOCK_DETAILS(GPIO3_CLK, -1, CM2_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(GPIO3_CLK, -1, CM2_INSTANCE, (L4PER_CM2_OFFSET + 0x068), CLKCTRL_MODULEMODE_AUTO), - OMAP4_GENERIC_CLOCK_DETAILS(GPIO4_CLK, -1, CM2_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(GPIO4_CLK, -1, CM2_INSTANCE, (L4PER_CM2_OFFSET + 0x070), CLKCTRL_MODULEMODE_AUTO), - OMAP4_GENERIC_CLOCK_DETAILS(GPIO5_CLK, -1, CM2_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(GPIO5_CLK, -1, CM2_INSTANCE, (L4PER_CM2_OFFSET + 0x078), CLKCTRL_MODULEMODE_AUTO), - OMAP4_GENERIC_CLOCK_DETAILS(GPIO6_CLK, -1, CM2_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(GPIO6_CLK, -1, CM2_INSTANCE, (L4PER_CM2_OFFSET + 0x080), CLKCTRL_MODULEMODE_AUTO), /* sDMA block */ - OMAP4_GENERIC_CLOCK_DETAILS(SDMA_CLK, -1, CM2_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(SDMA_CLK, -1, CM2_INSTANCE, (CORE_CM2_OFFSET + 0x300), CLKCTRL_MODULEMODE_AUTO), /* I2C modules */ - OMAP4_GENERIC_CLOCK_DETAILS(I2C1_CLK, -1, CM2_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(I2C1_CLK, -1, CM2_INSTANCE, (L4PER_CM2_OFFSET + 0x0A0), CLKCTRL_MODULEMODE_ENABLE), - OMAP4_GENERIC_CLOCK_DETAILS(I2C2_CLK, -1, CM2_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(I2C2_CLK, -1, CM2_INSTANCE, (L4PER_CM2_OFFSET + 0x0A8), CLKCTRL_MODULEMODE_ENABLE), - OMAP4_GENERIC_CLOCK_DETAILS(I2C3_CLK, -1, CM2_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(I2C3_CLK, -1, CM2_INSTANCE, (L4PER_CM2_OFFSET + 0x0B0), CLKCTRL_MODULEMODE_ENABLE), - OMAP4_GENERIC_CLOCK_DETAILS(I2C4_CLK, -1, CM2_INSTANCE_MEM_REGION, + OMAP4_GENERIC_CLOCK_DETAILS(I2C4_CLK, -1, CM2_INSTANCE, (L4PER_CM2_OFFSET + 0x0B8), CLKCTRL_MODULEMODE_ENABLE), { INVALID_CLK_IDENT, 0, 0, 0, 0 }, @@ -474,6 +466,27 @@ omap4_clk_details(clk_ident_t id) return NULL; } + +static struct omap4_prcm_softc * +omap4_prcm_get_instance_softc(int module_instance) +{ + int i, maxunit; + devclass_t prcm_devclass; + device_t dev; + struct omap4_prcm_softc *sc; + + prcm_devclass = devclass_find("omap4_prcm"); + maxunit = devclass_get_maxunit(prcm_devclass); + + for (i = 0; i < maxunit; i++) { + dev = devclass_get_device(prcm_devclass, i); + sc = device_get_softc(dev); + if (sc->sc_instance == module_instance) + return (sc); + } + + return (NULL); +} /** * omap4_clk_generic_activate - checks if a module is accessible @@ -492,21 +505,21 @@ omap4_clk_details(clk_ident_t id) static int omap4_clk_generic_activate(struct ti_clock_dev *clkdev) { - struct omap4_prcm_softc *sc = omap4_prcm_sc; + struct omap4_prcm_softc *sc; struct omap4_clk_details* clk_details; struct resource* clk_mem_res; uint32_t clksel; unsigned int i; - - if (sc == NULL) - return ENXIO; - clk_details = omap4_clk_details(clkdev->id); if (clk_details == NULL) return (ENXIO); - clk_mem_res = sc->sc_res[clk_details->mem_region]; + sc = omap4_prcm_get_instance_softc(clk_details->instance); + if (sc == NULL) + return ENXIO; + + clk_mem_res = sc->sc_res; if (clk_mem_res == NULL) return (EINVAL); @@ -558,20 +571,21 @@ omap4_clk_generic_activate(struct ti_clock_dev *clkdev) static int omap4_clk_generic_deactivate(struct ti_clock_dev *clkdev) { - struct omap4_prcm_softc *sc = omap4_prcm_sc; + struct omap4_prcm_softc *sc; struct omap4_clk_details* clk_details; struct resource* clk_mem_res; uint32_t clksel; - if (sc == NULL) - return ENXIO; - clk_details = omap4_clk_details(clkdev->id); if (clk_details == NULL) return (ENXIO); - clk_mem_res = sc->sc_res[clk_details->mem_region]; + sc = omap4_prcm_get_instance_softc(clk_details->instance); + if (sc == NULL) + return ENXIO; + + clk_mem_res = sc->sc_res; if (clk_mem_res == NULL) return (EINVAL); @@ -626,20 +640,21 @@ omap4_clk_generic_set_source(struct ti_clock_dev *clkdev, static int omap4_clk_generic_accessible(struct ti_clock_dev *clkdev) { - struct omap4_prcm_softc *sc = omap4_prcm_sc; + struct omap4_prcm_softc *sc; struct omap4_clk_details* clk_details; struct resource* clk_mem_res; uint32_t clksel; - if (sc == NULL) - return ENXIO; - clk_details = omap4_clk_details(clkdev->id); if (clk_details == NULL) return (ENXIO); - clk_mem_res = sc->sc_res[clk_details->mem_region]; + sc = omap4_prcm_get_instance_softc(clk_details->instance); + if (sc == NULL) + return ENXIO; + + clk_mem_res = sc->sc_res; if (clk_mem_res == NULL) return (EINVAL); @@ -703,19 +718,20 @@ static int omap4_clk_gptimer_set_source(struct ti_clock_dev *clkdev, clk_src_t clksrc) { - struct omap4_prcm_softc *sc = omap4_prcm_sc; + struct omap4_prcm_softc *sc; struct omap4_clk_details* clk_details; struct resource* clk_mem_res; - if (sc == NULL) - return ENXIO; - clk_details = omap4_clk_details(clkdev->id); if (clk_details == NULL) return (ENXIO); - clk_mem_res = sc->sc_res[clk_details->mem_region]; + sc = omap4_prcm_get_instance_softc(clk_details->instance); + if (sc == NULL) + return ENXIO; + + clk_mem_res = sc->sc_res; if (clk_mem_res == NULL) return (EINVAL); @@ -744,21 +760,22 @@ omap4_clk_gptimer_get_source_freq(struct ti_clock_dev *clkdev, unsigned int *freq ) { - struct omap4_prcm_softc *sc = omap4_prcm_sc; + struct omap4_prcm_softc *sc; struct omap4_clk_details* clk_details; struct resource* clk_mem_res; uint32_t clksel; unsigned int src_freq; - if (sc == NULL) - return ENXIO; - clk_details = omap4_clk_details(clkdev->id); if (clk_details == NULL) return (ENXIO); - clk_mem_res = sc->sc_res[clk_details->mem_region]; + sc = omap4_prcm_get_instance_softc(clk_details->instance); + if (sc == NULL) + return ENXIO; + + clk_mem_res = sc->sc_res; if (clk_mem_res == NULL) return (EINVAL); @@ -793,20 +810,22 @@ static int omap4_clk_hsmmc_set_source(struct ti_clock_dev *clkdev, clk_src_t clksrc) { - struct omap4_prcm_softc *sc = omap4_prcm_sc; + struct omap4_prcm_softc *sc; struct omap4_clk_details* clk_details; struct resource* clk_mem_res; uint32_t clksel; - if (sc == NULL) - return ENXIO; - clk_details = omap4_clk_details(clkdev->id); if (clk_details == NULL) return (ENXIO); - clk_mem_res = sc->sc_res[clk_details->mem_region]; + + sc = omap4_prcm_get_instance_softc(clk_details->instance); + if (sc == NULL) + return ENXIO; + + clk_mem_res = sc->sc_res; if (clk_mem_res == NULL) return (EINVAL); @@ -852,21 +871,22 @@ omap4_clk_hsmmc_get_source_freq(struct ti_clock_dev *clkdev, unsigned int *freq ) { - struct omap4_prcm_softc *sc = omap4_prcm_sc; + struct omap4_prcm_softc *sc; struct omap4_clk_details* clk_details; struct resource* clk_mem_res; uint32_t clksel; unsigned int src_freq; - if (sc == NULL) - return ENXIO; - clk_details = omap4_clk_details(clkdev->id); if (clk_details == NULL) return (ENXIO); - clk_mem_res = sc->sc_res[clk_details->mem_region]; + sc = omap4_prcm_get_instance_softc(clk_details->instance); + if (sc == NULL) + return ENXIO; + + clk_mem_res = sc->sc_res; if (clk_mem_res == NULL) return (EINVAL); @@ -913,13 +933,14 @@ omap4_clk_get_sysclk_freq(struct ti_clock_dev *clkdev, { uint32_t clksel; uint32_t sysclk; - struct omap4_prcm_softc *sc = omap4_prcm_sc; + struct omap4_prcm_softc *sc; + sc = omap4_prcm_get_instance_softc(PRM_INSTANCE); if (sc == NULL) return ENXIO; /* Read the input clock freq from the configuration register (CM_SYS_CLKSEL) */ - clksel = bus_read_4(sc->sc_res[PRM_INSTANCE_MEM_REGION], CM_SYS_CLKSEL_OFFSET); + clksel = bus_read_4(sc->sc_res, CM_SYS_CLKSEL_OFFSET); switch (clksel & 0x7) { case 0x1: /* 12Mhz */ @@ -971,15 +992,16 @@ omap4_clk_get_arm_fclk_freq(struct ti_clock_dev *clkdev, uint32_t clksel; uint32_t pll_mult, pll_div; uint32_t mpuclk, sysclk; - struct omap4_prcm_softc *sc = omap4_prcm_sc; + struct omap4_prcm_softc *sc; + sc = omap4_prcm_get_instance_softc(CM1_INSTANCE); if (sc == NULL) return ENXIO; /* Read the clksel register which contains the DPLL multiple and divide * values. These are applied to the sysclk. */ - clksel = bus_read_4(sc->sc_res[CM1_INSTANCE_MEM_REGION], CM_CLKSEL_DPLL_MPU); + clksel = bus_read_4(sc->sc_res, CM_CLKSEL_DPLL_MPU); pll_mult = ((clksel >> 8) & 0x7ff); pll_div = (clksel & 0x7f) + 1; @@ -1050,12 +1072,13 @@ struct dpll_param usb_dpll_param[7] = { static int omap4_clk_hsusbhost_activate(struct ti_clock_dev *clkdev) { - struct omap4_prcm_softc *sc = omap4_prcm_sc; + struct omap4_prcm_softc *sc; struct resource* clk_mem_res; uint32_t clksel_reg_off; uint32_t clksel; unsigned int i; + sc = omap4_prcm_get_instance_softc(CM2_INSTANCE); if (sc == NULL) return ENXIO; @@ -1068,7 +1091,7 @@ omap4_clk_hsusbhost_activate(struct ti_clock_dev *clkdev) */ /* We need the CM_L3INIT_HSUSBTLL_CLKCTRL register in CM2 register set */ - clk_mem_res = sc->sc_res[CM2_INSTANCE_MEM_REGION]; + clk_mem_res = sc->sc_res; clksel_reg_off = L3INIT_CM2_OFFSET + 0x68; /* Enable the module and also enable the optional func clocks for @@ -1103,7 +1126,7 @@ omap4_clk_hsusbhost_activate(struct ti_clock_dev *clkdev) */ /* We need the CM_L3INIT_HSUSBHOST_CLKCTRL register in CM2 register set */ - clk_mem_res = sc->sc_res[CM2_INSTANCE_MEM_REGION]; + clk_mem_res = sc->sc_res; clksel_reg_off = L3INIT_CM2_OFFSET + 0x58; clksel = bus_read_4(clk_mem_res, clksel_reg_off); /* Enable the module and also enable the optional func clocks */ @@ -1165,18 +1188,19 @@ omap4_clk_hsusbhost_activate(struct ti_clock_dev *clkdev) static int omap4_clk_hsusbhost_deactivate(struct ti_clock_dev *clkdev) { - struct omap4_prcm_softc *sc = omap4_prcm_sc; + struct omap4_prcm_softc *sc; struct resource* clk_mem_res; uint32_t clksel_reg_off; uint32_t clksel; + sc = omap4_prcm_get_instance_softc(CM2_INSTANCE); if (sc == NULL) return ENXIO; switch (clkdev->id) { case USBTLL_CLK: /* We need the CM_L3INIT_HSUSBTLL_CLKCTRL register in CM2 register set */ - clk_mem_res = sc->sc_res[CM2_INSTANCE_MEM_REGION]; + clk_mem_res = sc->sc_res; clksel_reg_off = L3INIT_CM2_OFFSET + 0x68; clksel = bus_read_4(clk_mem_res, clksel_reg_off); @@ -1205,7 +1229,7 @@ omap4_clk_hsusbhost_deactivate(struct ti_clock_dev *clkdev) */ /* We need the CM_L3INIT_HSUSBHOST_CLKCTRL register in CM2 register set */ - clk_mem_res = sc->sc_res[CM2_INSTANCE_MEM_REGION]; + clk_mem_res = sc->sc_res; clksel_reg_off = L3INIT_CM2_OFFSET + 0x58; clksel = bus_read_4(clk_mem_res, clksel_reg_off); @@ -1255,22 +1279,23 @@ omap4_clk_hsusbhost_deactivate(struct ti_clock_dev *clkdev) static int omap4_clk_hsusbhost_accessible(struct ti_clock_dev *clkdev) { - struct omap4_prcm_softc *sc = omap4_prcm_sc; + struct omap4_prcm_softc *sc; struct resource* clk_mem_res; uint32_t clksel_reg_off; uint32_t clksel; + sc = omap4_prcm_get_instance_softc(CM2_INSTANCE); if (sc == NULL) return ENXIO; if (clkdev->id == USBTLL_CLK) { /* We need the CM_L3INIT_HSUSBTLL_CLKCTRL register in CM2 register set */ - clk_mem_res = sc->sc_res[CM2_INSTANCE_MEM_REGION]; + clk_mem_res = sc->sc_res; clksel_reg_off = L3INIT_CM2_OFFSET + 0x68; } else if (clkdev->id == USBHSHOST_CLK) { /* We need the CM_L3INIT_HSUSBHOST_CLKCTRL register in CM2 register set */ - clk_mem_res = sc->sc_res[CM2_INSTANCE_MEM_REGION]; + clk_mem_res = sc->sc_res; clksel_reg_off = L3INIT_CM2_OFFSET + 0x58; } else { @@ -1304,12 +1329,13 @@ static int omap4_clk_hsusbhost_set_source(struct ti_clock_dev *clkdev, clk_src_t clksrc) { - struct omap4_prcm_softc *sc = omap4_prcm_sc; + struct omap4_prcm_softc *sc; struct resource* clk_mem_res; uint32_t clksel_reg_off; uint32_t clksel; unsigned int bit; + sc = omap4_prcm_get_instance_softc(CM2_INSTANCE); if (sc == NULL) return ENXIO; @@ -1321,7 +1347,7 @@ omap4_clk_hsusbhost_set_source(struct ti_clock_dev *clkdev, return (EINVAL); /* We need the CM_L3INIT_HSUSBHOST_CLKCTRL register in CM2 register set */ - clk_mem_res = sc->sc_res[CM2_INSTANCE_MEM_REGION]; + clk_mem_res = sc->sc_res; clksel_reg_off = L3INIT_CM2_OFFSET + 0x58; clksel = bus_read_4(clk_mem_res, clksel_reg_off); @@ -1342,10 +1368,15 @@ omap4_clk_hsusbhost_set_source(struct ti_clock_dev *clkdev, static void omap4_prcm_reset(void) { - struct omap4_prcm_softc *sc = omap4_prcm_sc; - bus_write_4(sc->sc_res[0], PRM_RSTCTRL, - bus_read_4(sc->sc_res[0], PRM_RSTCTRL) | PRM_RSTCTRL_RESET); - bus_read_4(sc->sc_res[0], PRM_RSTCTRL); + struct omap4_prcm_softc *sc; + + sc = omap4_prcm_get_instance_softc(PRM_INSTANCE); + if (sc == NULL) + return; + + bus_write_4(sc->sc_res, PRM_RSTCTRL, + bus_read_4(sc->sc_res, PRM_RSTCTRL) | PRM_RSTCTRL_RESET); + bus_read_4(sc->sc_res, PRM_RSTCTRL); } /** @@ -1363,15 +1394,31 @@ omap4_prcm_reset(void) static int omap4_prcm_probe(device_t dev) { + const struct ofw_compat_data *ocd; if (!ofw_bus_status_okay(dev)) return (ENXIO); - if (!ofw_bus_is_compatible(dev, "ti,omap4_prcm")) + ocd = ofw_bus_search_compatible(dev, compat_data); + if ((int)ocd->ocd_data == 0) return (ENXIO); - device_set_desc(dev, "TI OMAP Power, Reset and Clock Management"); - return (0); + switch ((int)ocd->ocd_data) { + case PRM_INSTANCE: + device_set_desc(dev, "TI OMAP Power, Reset and Clock Management (PRM)"); + break; + case CM1_INSTANCE: + device_set_desc(dev, "TI OMAP Power, Reset and Clock Management (C1)"); + break; + case CM2_INSTANCE: + device_set_desc(dev, "TI OMAP Power, Reset and Clock Management (C2)"); + break; + default: + device_printf(dev, "unknown instance type: %d\n", (int)ocd->ocd_data); + return (ENXIO); + } + + return (BUS_PROBE_DEFAULT); } /** @@ -1393,18 +1440,33 @@ extern uint32_t platform_arm_tmr_freq; static int omap4_prcm_attach(device_t dev) { - struct omap4_prcm_softc *sc = device_get_softc(dev); + struct omap4_prcm_softc *sc; unsigned int freq; + const struct ofw_compat_data *ocd; - if (bus_alloc_resources(dev, omap4_scm_res_spec, sc->sc_res)) { + + sc = device_get_softc(dev); + ocd = ofw_bus_search_compatible(dev, compat_data); + sc->sc_instance = (int)ocd->ocd_data; + + sc->sc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_rid, + RF_ACTIVE); + if (sc->sc_res == NULL) { device_printf(dev, "could not allocate resources\n"); return (ENXIO); } - omap4_prcm_sc = sc; ti_cpu_reset = omap4_prcm_reset; - omap4_clk_get_arm_fclk_freq(NULL, &freq); - arm_tmr_change_frequency(freq / 2); + + /* + * In order to determine ARM frequency we need both RPM and CM1 + * instances up and running. So wait until all CRM devices are + * initialized. Should be replaced with proper clock framework + */ + if (device_get_unit(dev) == 2) { + omap4_clk_get_arm_fclk_freq(NULL, &freq); + arm_tmr_change_frequency(freq / 2); + } return (0); } diff --git a/sys/arm/ti/omap4/omap4_scm_padconf.c b/sys/arm/ti/omap4/omap4_scm_padconf.c index ca81186d56ea..e43581e8db57 100644 --- a/sys/arm/ti/omap4/omap4_scm_padconf.c +++ b/sys/arm/ti/omap4/omap4_scm_padconf.c @@ -41,7 +41,7 @@ __FBSDID("$FreeBSD$"); #include -#include +#include #include @@ -77,7 +77,7 @@ __FBSDID("$FreeBSD$"); .muxmodes[7] = m7, \ } -const static struct ti_scm_padstate ti_padstate_devmap[] = { +const static struct ti_pinmux_padstate ti_padstate_devmap[] = { {"output", PADCONF_PIN_OUTPUT}, {"input", PADCONF_PIN_INPUT}, {"input_pullup", PADCONF_PIN_INPUT_PULLUP}, @@ -88,214 +88,214 @@ const static struct ti_scm_padstate ti_padstate_devmap[] = { /* * Table 18-10, p. 3470 */ -const static struct ti_scm_padconf ti_padconf_devmap[] = { - _PINDEF(0x0040, "c12", 0, 0, "gpmc_ad0", "sdmmc2_dat0", NULL, NULL, NULL, NULL, NULL, NULL), - _PINDEF(0x0042, "d12", 0, 0, "gpmc_ad1", "sdmmc2_dat1", NULL, NULL, NULL, NULL, NULL, NULL), - _PINDEF(0x0044, "c13", 0, 0, "gpmc_ad2", "sdmmc2_dat2", NULL, NULL, NULL, NULL, NULL, NULL), - _PINDEF(0x0046, "d13", 0, 0, "gpmc_ad3", "sdmmc2_dat3", NULL, NULL, NULL, NULL, NULL, NULL), - _PINDEF(0x0048, "c15", 0, 0, "gpmc_ad4", "sdmmc2_dat4", "sdmmc2_dir_dat0", NULL, NULL, NULL, NULL, NULL), - _PINDEF(0x004a, "d15", 0, 0, "gpmc_ad5", "sdmmc2_dat5", "sdmmc2_dir_dat1", NULL, NULL, NULL, NULL, NULL), - _PINDEF(0x004c, "a16", 0, 0, "gpmc_ad6", "sdmmc2_dat6", "sdmmc2_dir_cmd", NULL, NULL, NULL, NULL, NULL), - _PINDEF(0x004e, "b16", 0, 0, "gpmc_ad7", "sdmmc2_dat7", "sdmmc2_clk_fdbk", NULL, NULL, NULL, NULL, NULL), - _PINDEF(0x0050, "c16", 32, 3, "gpmc_ad8", "kpd_row0", "c2c_data15", "gpio_32", NULL, "sdmmc1_dat0", NULL, NULL), - _PINDEF(0x0052, "d16", 33, 3, "gpmc_ad9", "kpd_row1", "c2c_data14", "gpio_33", NULL, "sdmmc1_dat1", NULL, NULL), - _PINDEF(0x0054, "c17", 34, 3, "gpmc_ad10", "kpd_row2", "c2c_data13", "gpio_34", NULL, "sdmmc1_dat2", NULL, NULL), - _PINDEF(0x0056, "d17", 35, 3, "gpmc_ad11", "kpd_row3", "c2c_data12", "gpio_35", NULL, "sdmmc1_dat3", NULL, NULL), - _PINDEF(0x0058, "c18", 36, 3, "gpmc_ad12", "kpd_col0", "c2c_data11", "gpio_36", NULL, "sdmmc1_dat4", NULL, NULL), - _PINDEF(0x005a, "d18", 37, 3, "gpmc_ad13", "kpd_col1", "c2c_data10", "gpio_37", NULL, "sdmmc1_dat5", NULL, NULL), - _PINDEF(0x005c, "c19", 38, 3, "gpmc_ad14", "kpd_col2", "c2c_data9", "gpio_38", NULL, "sdmmc1_dat6", NULL, NULL), - _PINDEF(0x005e, "d19", 39, 3, "gpmc_ad15", "kpd_col3", "c2c_data8", "gpio_39", NULL, "sdmmc1_dat7", NULL, NULL), - _PINDEF(0x0060, "b17", 40, 3, "gpmc_a16", "kpd_row4", "c2c_datain0", "gpio_40", "venc_656_data0", NULL, NULL, "safe_mode"), - _PINDEF(0x0062, "a18", 41, 3, "gpmc_a17", "kpd_row5", "c2c_datain1", "gpio_41", "venc_656_data1", NULL, NULL, "safe_mode"), - _PINDEF(0x0064, "b18", 42, 3, "gpmc_a18", "kpd_row6", "c2c_datain2", "gpio_42", "venc_656_data2", NULL, NULL, "safe_mode"), - _PINDEF(0x0066, "a19", 43, 3, "gpmc_a19", "kpd_row7", "c2c_datain3", "gpio_43", "venc_656_data3", NULL, NULL, "safe_mode"), - _PINDEF(0x0068, "b19", 44, 3, "gpmc_a20", "kpd_col4", "c2c_datain4", "gpio_44", "venc_656_data4", NULL, NULL, "safe_mode"), - _PINDEF(0x006a, "b20", 45, 3, "gpmc_a21", "kpd_col5", "c2c_datain5", "gpio_45", "venc_656_data5", NULL, NULL, "safe_mode"), - _PINDEF(0x006c, "a21", 46, 3, "gpmc_a22", "kpd_col6", "c2c_datain6", "gpio_46", "venc_656_data6", NULL, NULL, "safe_mode"), - _PINDEF(0x006e, "b21", 47, 3, "gpmc_a23", "kpd_col7", "c2c_datain7", "gpio_47", "venc_656_data7", NULL, NULL, "safe_mode"), - _PINDEF(0x0070, "c20", 48, 3, "gpmc_a24", "kpd_col8", "c2c_clkout0", "gpio_48", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0072, "d20", 49, 3, "gpmc_a25", NULL, "c2c_clkout1", "gpio_49", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0074, "b25", 50, 3, "gpmc_ncs0", NULL, NULL, "gpio_50", "sys_ndmareq0", NULL, NULL, NULL), - _PINDEF(0x0076, "c21", 51, 3, "gpmc_ncs1", NULL, "c2c_dataout6", "gpio_51", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0078, "d21", 52, 3, "gpmc_ncs2", "kpd_row8", "c2c_dataout7", "gpio_52", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x007a, "c22", 53, 3, "gpmc_ncs3", "gpmc_dir", "c2c_dataout4", "gpio_53", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x007c, "c25", 54, 3, "gpmc_nwp", "dsi1_te0", NULL, "gpio_54", "sys_ndmareq1", NULL, NULL, NULL), - _PINDEF(0x007e, "b22", 55, 3, "gpmc_clk", NULL, NULL, "gpio_55", "sys_ndmareq2", "sdmmc1_cmd", NULL, NULL), - _PINDEF(0x0080, "d25", 56, 3, "gpmc_nadv_ale", "dsi1_te1", NULL, "gpio_56", "sys_ndmareq3", "sdmmc1_clk", NULL, NULL), - _PINDEF(0x0082, "b11", 0, 0, "gpmc_noe", "sdmmc2_clk", NULL, NULL, NULL, NULL, NULL, NULL), - _PINDEF(0x0084, "b12", 0, 0, "gpmc_nwe", "sdmmc2_cmd", NULL, NULL, NULL, NULL, NULL, NULL), - _PINDEF(0x0086, "c23", 59, 3, "gpmc_nbe0_cle", "dsi2_te0", NULL, "gpio_59", NULL, NULL, NULL, NULL), - _PINDEF(0x0088, "d22", 60, 3, "gpmc_nbe1", NULL, "c2c_dataout5", "gpio_60", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x008a, "b26", 61, 3, "gpmc_wait0", "dsi2_te1", NULL, "gpio_61", NULL, NULL, NULL, NULL), - _PINDEF(0x008c, "b23", 62, 3, "gpmc_wait1", NULL, "c2c_dataout2", "gpio_62", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x008e, "d23", 100, 3, "gpmc_wait2", "usbc1_icusb_txen", "c2c_dataout3", "gpio_100", "sys_ndmareq0", NULL, NULL, "safe_mode"), - _PINDEF(0x0090, "a24", 101, 3, "gpmc_ncs4", "dsi1_te0", "c2c_clkin0", "gpio_101", "sys_ndmareq1", NULL, NULL, "safe_mode"), - _PINDEF(0x0092, "b24", 102, 3, "gpmc_ncs5", "dsi1_te1", "c2c_clkin1", "gpio_102", "sys_ndmareq2", NULL, NULL, "safe_mode"), - _PINDEF(0x0094, "c24", 103, 3, "gpmc_ncs6", "dsi2_te0", "c2c_dataout0", "gpio_103", "sys_ndmareq3", NULL, NULL, "safe_mode"), - _PINDEF(0x0096, "d24", 104, 3, "gpmc_ncs7", "dsi2_te1", "c2c_dataout1", "gpio_104", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0098, "b9", 63, 3, "hdmi_hpd", NULL, NULL, "gpio_63", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x009a, "b10", 64, 3, "hdmi_cec", NULL, NULL, "gpio_64", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x009c, "a8", 65, 3, "hdmi_ddc_scl", NULL, NULL, "gpio_65", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x009e, "b8", 66, 3, "hdmi_ddc_sda", NULL, NULL, "gpio_66", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00a0, "r26", 0, 0, "csi21_dx0", NULL, NULL, "gpi_67", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00a2, "r25", 0, 0, "csi21_dy0", NULL, NULL, "gpi_68", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00a4, "t26", 0, 0, "csi21_dx1", NULL, NULL, "gpi_69", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00a6, "t25", 0, 0, "csi21_dy1", NULL, NULL, "gpi_70", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00a8, "u26", 0, 0, "csi21_dx2", NULL, NULL, "gpi_71", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00aa, "u25", 0, 0, "csi21_dy2", NULL, NULL, "gpi_72", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00ac, "v26", 0, 0, "csi21_dx3", NULL, NULL, "gpi_73", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00ae, "v25", 0, 0, "csi21_dy3", NULL, NULL, "gpi_74", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00b0, "w26", 0, 0, "csi21_dx4", NULL, NULL, "gpi_75", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00b2, "w25", 0, 0, "csi21_dy4", NULL, NULL, "gpi_76", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00b4, "m26", 0, 0, "csi22_dx0", NULL, NULL, "gpi_77", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00b6, "m25", 0, 0, "csi22_dy0", NULL, NULL, "gpi_78", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00b8, "n26", 0, 0, "csi22_dx1", NULL, NULL, "gpi_79", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00ba, "n25", 0, 0, "csi22_dy1", NULL, NULL, "gpi_80", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00bc, "t27", 81, 3, "cam_shutter", NULL, NULL, "gpio_81", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00be, "u27", 82, 3, "cam_strobe", NULL, NULL, "gpio_82", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00c0, "v27", 83, 3, "cam_globalreset", NULL, NULL, "gpio_83", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00c2, "ae18", 84, 3, "usbb1_ulpitll_clk", "hsi1_cawake", NULL, "gpio_84", "usbb1_ulpiphy_clk", NULL, "hw_dbg20", "safe_mode"), - _PINDEF(0x00c4, "ag19", 85, 3, "usbb1_ulpitll_stp", "hsi1_cadata", "mcbsp4_clkr", "gpio_85", "usbb1_ulpiphy_stp", "usbb1_mm_rxdp", "hw_dbg21", "safe_mode"), - _PINDEF(0x00c6, "af19", 86, 3, "usbb1_ulpitll_dir", "hsi1_caflag", "mcbsp4_fsr", "gpio_86", "usbb1_ulpiphy_dir", NULL, "hw_dbg22", "safe_mode"), - _PINDEF(0x00c8, "ae19", 87, 3, "usbb1_ulpitll_nxt", "hsi1_acready", "mcbsp4_fsx", "gpio_87", "usbb1_ulpiphy_nxt", "usbb1_mm_rxdm", "hw_dbg23", "safe_mode"), - _PINDEF(0x00ca, "af18", 88, 3, "usbb1_ulpitll_dat0", "hsi1_acwake", "mcbsp4_clkx", "gpio_88", "usbb1_ulpiphy_dat0", "usbb1_mm_txen", "hw_dbg24", "safe_mode"), - _PINDEF(0x00cc, "ag18", 89, 3, "usbb1_ulpitll_dat1", "hsi1_acdata", "mcbsp4_dx", "gpio_89", "usbb1_ulpiphy_dat1", "usbb1_mm_txdat", "hw_dbg25", "safe_mode"), - _PINDEF(0x00ce, "ae17", 90, 3, "usbb1_ulpitll_dat2", "hsi1_acflag", "mcbsp4_dr", "gpio_90", "usbb1_ulpiphy_dat2", "usbb1_mm_txse0", "hw_dbg26", "safe_mode"), - _PINDEF(0x00d0, "af17", 91, 3, "usbb1_ulpitll_dat3", "hsi1_caready", NULL, "gpio_91", "usbb1_ulpiphy_dat3", "usbb1_mm_rxrcv", "hw_dbg27", "safe_mode"), - _PINDEF(0x00d2, "ah17", 92, 3, "usbb1_ulpitll_dat4", "dmtimer8_pwm_evt", "abe_mcbsp3_dr", "gpio_92", "usbb1_ulpiphy_dat4", NULL, "hw_dbg28", "safe_mode"), - _PINDEF(0x00d4, "ae16", 93, 3, "usbb1_ulpitll_dat5", "dmtimer9_pwm_evt", "abe_mcbsp3_dx", "gpio_93", "usbb1_ulpiphy_dat5", NULL, "hw_dbg29", "safe_mode"), - _PINDEF(0x00d6, "af16", 94, 3, "usbb1_ulpitll_dat6", "dmtimer10_pwm_evt", "abe_mcbsp3_clkx", "gpio_94", "usbb1_ulpiphy_dat6", "abe_dmic_din3", "hw_dbg30", "safe_mode"), - _PINDEF(0x00d8, "ag16", 95, 3, "usbb1_ulpitll_dat7", "dmtimer11_pwm_evt", "abe_mcbsp3_fsx", "gpio_95", "usbb1_ulpiphy_dat7", "abe_dmic_clk3", "hw_dbg31", "safe_mode"), - _PINDEF(0x00da, "af14", 96, 3, "usbb1_hsic_data", NULL, NULL, "gpio_96", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00dc, "ae14", 97, 3, "usbb1_hsic_strobe", NULL, NULL, "gpio_97", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00de, "h2", 98, 3, "usbc1_icusb_dp", NULL, NULL, "gpio_98", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00e0, "h3", 99, 3, "usbc1_icusb_dm", NULL, NULL, "gpio_99", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00e2, "d2", 100, 3, "sdmmc1_clk", NULL, "dpm_emu19", "gpio_100", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00e4, "e3", 101, 3, "sdmmc1_cmd", NULL, "uart1_rx", "gpio_101", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00e6, "e4", 102, 3, "sdmmc1_dat0", NULL, "dpm_emu18", "gpio_102", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00e8, "e2", 103, 3, "sdmmc1_dat1", NULL, "dpm_emu17", "gpio_103", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00ea, "e1", 104, 3, "sdmmc1_dat2", NULL, "dpm_emu16", "gpio_104", "jtag_tms_tmsc", NULL, NULL, "safe_mode"), - _PINDEF(0x00ec, "f4", 105, 3, "sdmmc1_dat3", NULL, "dpm_emu15", "gpio_105", "jtag_tck", NULL, NULL, "safe_mode"), - _PINDEF(0x00ee, "f3", 106, 3, "sdmmc1_dat4", NULL, NULL, "gpio_106", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00f0, "f1", 107, 3, "sdmmc1_dat5", NULL, NULL, "gpio_107", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00f2, "g4", 108, 3, "sdmmc1_dat6", NULL, NULL, "gpio_108", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00f4, "g3", 109, 3, "sdmmc1_dat7", NULL, NULL, "gpio_109", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x00f6, "ad27", 110, 3, "abe_mcbsp2_clkx", "mcspi2_clk", "abe_mcasp_ahclkx", "gpio_110", "usbb2_mm_rxdm", NULL, NULL, "safe_mode"), - _PINDEF(0x00f8, "ad26", 111, 3, "abe_mcbsp2_dr", "mcspi2_somi", "abe_mcasp_axr", "gpio_111", "usbb2_mm_rxdp", NULL, NULL, "safe_mode"), - _PINDEF(0x00fa, "ad25", 112, 3, "abe_mcbsp2_dx", "mcspi2_simo", "abe_mcasp_amute", "gpio_112", "usbb2_mm_rxrcv", NULL, NULL, "safe_mode"), - _PINDEF(0x00fc, "ac28", 113, 3, "abe_mcbsp2_fsx", "mcspi2_cs0", "abe_mcasp_afsx", "gpio_113", "usbb2_mm_txen", NULL, NULL, "safe_mode"), - _PINDEF(0x00fe, "ac26", 114, 3, "abe_mcbsp1_clkx", "abe_slimbus1_clock", NULL, "gpio_114", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0100, "ac25", 115, 3, "abe_mcbsp1_dr", "abe_slimbus1_data", NULL, "gpio_115", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0102, "ab25", 116, 3, "abe_mcbsp1_dx", "sdmmc3_dat2", "abe_mcasp_aclkx", "gpio_116", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0104, "ac27", 117, 3, "abe_mcbsp1_fsx", "sdmmc3_dat3", "abe_mcasp_amutein", "gpio_117", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0106, "ag25", 0, 0, "abe_pdm_ul_data", "abe_mcbsp3_dr", NULL, NULL, NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0108, "af25", 0, 0, "abe_pdm_dl_data", "abe_mcbsp3_dx", NULL, NULL, NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x010a, "ae25", 0, 0, "abe_pdm_frame", "abe_mcbsp3_clkx", NULL, NULL, NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x010c, "af26", 0, 0, "abe_pdm_lb_clk", "abe_mcbsp3_fsx", NULL, NULL, NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x010e, "ah26", 118, 3, "abe_clks", NULL, NULL, "gpio_118", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0110, "ae24", 119, 3, "abe_dmic_clk1", NULL, NULL, "gpio_119", "usbb2_mm_txse0", "uart4_cts", NULL, "safe_mode"), - _PINDEF(0x0112, "af24", 120, 3, "abe_dmic_din1", NULL, NULL, "gpio_120", "usbb2_mm_txdat", "uart4_rts", NULL, "safe_mode"), - _PINDEF(0x0114, "ag24", 121, 3, "abe_dmic_din2", "slimbus2_clock", "abe_mcasp_axr", "gpio_121", NULL, "dmtimer11_pwm_evt", NULL, "safe_mode"), - _PINDEF(0x0116, "ah24", 122, 3, "abe_dmic_din3", "slimbus2_data", "abe_dmic_clk2", "gpio_122", NULL, "dmtimer9_pwm_evt", NULL, "safe_mode"), - _PINDEF(0x0118, "ab26", 123, 3, "uart2_cts", "sdmmc3_clk", NULL, "gpio_123", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x011a, "ab27", 124, 3, "uart2_rts", "sdmmc3_cmd", NULL, "gpio_124", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x011c, "aa25", 125, 3, "uart2_rx", "sdmmc3_dat0", NULL, "gpio_125", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x011e, "aa26", 126, 3, "uart2_tx", "sdmmc3_dat1", NULL, "gpio_126", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0120, "aa27", 127, 3, "hdq_sio", "i2c3_sccb", "i2c2_sccb", "gpio_127", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0122, "ae28", 0, 0, "i2c1_scl", NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PINDEF(0x0124, "ae26", 0, 0, "i2c1_sda", NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PINDEF(0x0126, "c26", 128, 3, "i2c2_scl", "uart1_rx", NULL, "gpio_128", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0128, "d26", 129, 3, "i2c2_sda", "uart1_tx", NULL, "gpio_129", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x012a, "w27", 130, 3, "i2c3_scl", NULL, NULL, "gpio_130", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x012c, "y27", 131, 3, "i2c3_sda", NULL, NULL, "gpio_131", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x012e, "ag21", 132, 3, "i2c4_scl", NULL, NULL, "gpio_132", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0130, "ah22", 133, 3, "i2c4_sda", NULL, NULL, "gpio_133", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0132, "af22", 134, 3, "mcspi1_clk", NULL, NULL, "gpio_134", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0134, "ae22", 135, 3, "mcspi1_somi", NULL, NULL, "gpio_135", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0136, "ag22", 136, 3, "mcspi1_simo", NULL, NULL, "gpio_136", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0138, "ae23", 137, 3, "mcspi1_cs0", NULL, NULL, "gpio_137", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x013a, "af23", 138, 3, "mcspi1_cs1", "uart1_rx", NULL, "gpio_138", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x013c, "ag23", 139, 3, "mcspi1_cs2", "uart1_cts", "slimbus2_clock", "gpio_139", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x013e, "ah23", 140, 3, "mcspi1_cs3", "uart1_rts", "slimbus2_data", "gpio_140", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0140, "f27", 141, 3, "uart3_cts_rctx", "uart1_tx", NULL, "gpio_141", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0142, "f28", 142, 3, "uart3_rts_sd", NULL, NULL, "gpio_142", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0144, "g27", 143, 3, "uart3_rx_irrx", "dmtimer8_pwm_evt", NULL, "gpio_143", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0146, "g28", 144, 3, "uart3_tx_irtx", "dmtimer9_pwm_evt", NULL, "gpio_144", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0148, "ae5", 145, 3, "sdmmc5_clk", "mcspi2_clk", "usbc1_icusb_dp", "gpio_145", NULL, "sdmmc2_clk", NULL, "safe_mode"), - _PINDEF(0x014a, "af5", 146, 3, "sdmmc5_cmd", "mcspi2_simo", "usbc1_icusb_dm", "gpio_146", NULL, "sdmmc2_cmd", NULL, "safe_mode"), - _PINDEF(0x014c, "ae4", 147, 3, "sdmmc5_dat0", "mcspi2_somi", "usbc1_icusb_rcv", "gpio_147", NULL, "sdmmc2_dat0", NULL, "safe_mode"), - _PINDEF(0x014e, "af4", 148, 3, "sdmmc5_dat1", NULL, "usbc1_icusb_txen", "gpio_148", NULL, "sdmmc2_dat1", NULL, "safe_mode"), - _PINDEF(0x0150, "ag3", 149, 3, "sdmmc5_dat2", "mcspi2_cs1", NULL, "gpio_149", NULL, "sdmmc2_dat2", NULL, "safe_mode"), - _PINDEF(0x0152, "af3", 150, 3, "sdmmc5_dat3", "mcspi2_cs0", NULL, "gpio_150", NULL, "sdmmc2_dat3", NULL, "safe_mode"), - _PINDEF(0x0154, "ae21", 151, 3, "mcspi4_clk", "sdmmc4_clk", "kpd_col6", "gpio_151", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0156, "af20", 152, 3, "mcspi4_simo", "sdmmc4_cmd", "kpd_col7", "gpio_152", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0158, "af21", 153, 3, "mcspi4_somi", "sdmmc4_dat0", "kpd_row6", "gpio_153", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x015a, "ae20", 154, 3, "mcspi4_cs0", "sdmmc4_dat3", "kpd_row7", "gpio_154", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x015c, "ag20", 155, 3, "uart4_rx", "sdmmc4_dat2", "kpd_row8", "gpio_155", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x015e, "ah19", 156, 3, "uart4_tx", "sdmmc4_dat1", "kpd_col8", "gpio_156", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0160, "ag12", 157, 3, "usbb2_ulpitll_clk", "usbb2_ulpiphy_clk", "sdmmc4_cmd", "gpio_157", "hsi2_cawake", NULL, NULL, "safe_mode"), - _PINDEF(0x0162, "af12", 158, 3, "usbb2_ulpitll_stp", "usbb2_ulpiphy_stp", "sdmmc4_clk", "gpio_158", "hsi2_cadata", "dispc2_data23", NULL, "safe_mode"), - _PINDEF(0x0164, "ae12", 159, 3, "usbb2_ulpitll_dir", "usbb2_ulpiphy_dir", "sdmmc4_dat0", "gpio_159", "hsi2_caflag", "dispc2_data22", NULL, "safe_mode"), - _PINDEF(0x0166, "ag13", 160, 3, "usbb2_ulpitll_nxt", "usbb2_ulpiphy_nxt", "sdmmc4_dat1", "gpio_160", "hsi2_acready", "dispc2_data21", NULL, "safe_mode"), - _PINDEF(0x0168, "ae11", 161, 3, "usbb2_ulpitll_dat0", "usbb2_ulpiphy_dat0", "sdmmc4_dat2", "gpio_161", "hsi2_acwake", "dispc2_data20", "usbb2_mm_txen", "safe_mode"), - _PINDEF(0x016a, "af11", 162, 3, "usbb2_ulpitll_dat1", "usbb2_ulpiphy_dat1", "sdmmc4_dat3", "gpio_162", "hsi2_acdata", "dispc2_data19", "usbb2_mm_txdat", "safe_mode"), - _PINDEF(0x016c, "ag11", 163, 3, "usbb2_ulpitll_dat2", "usbb2_ulpiphy_dat2", "sdmmc3_dat2", "gpio_163", "hsi2_acflag", "dispc2_data18", "usbb2_mm_txse0", "safe_mode"), - _PINDEF(0x016e, "ah11", 164, 3, "usbb2_ulpitll_dat3", "usbb2_ulpiphy_dat3", "sdmmc3_dat1", "gpio_164", "hsi2_caready", "dispc2_data15", "rfbi_data15", "safe_mode"), - _PINDEF(0x0170, "ae10", 165, 3, "usbb2_ulpitll_dat4", "usbb2_ulpiphy_dat4", "sdmmc3_dat0", "gpio_165", "mcspi3_somi", "dispc2_data14", "rfbi_data14", "safe_mode"), - _PINDEF(0x0172, "af10", 166, 3, "usbb2_ulpitll_dat5", "usbb2_ulpiphy_dat5", "sdmmc3_dat3", "gpio_166", "mcspi3_cs0", "dispc2_data13", "rfbi_data13", "safe_mode"), - _PINDEF(0x0174, "ag10", 167, 3, "usbb2_ulpitll_dat6", "usbb2_ulpiphy_dat6", "sdmmc3_cmd", "gpio_167", "mcspi3_simo", "dispc2_data12", "rfbi_data12", "safe_mode"), - _PINDEF(0x0176, "ae9", 168, 3, "usbb2_ulpitll_dat7", "usbb2_ulpiphy_dat7", "sdmmc3_clk", "gpio_168", "mcspi3_clk", "dispc2_data11", "rfbi_data11", "safe_mode"), - _PINDEF(0x0178, "af13", 169, 3, "usbb2_hsic_data", NULL, NULL, "gpio_169", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x017a, "ae13", 170, 3, "usbb2_hsic_strobe", NULL, NULL, "gpio_170", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x017c, "g26", 171, 3, "kpd_col3", "kpd_col0", NULL, "gpio_171", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x017e, "g25", 172, 3, "kpd_col4", "kpd_col1", NULL, "gpio_172", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0180, "h26", 173, 3, "kpd_col5", "kpd_col2", NULL, "gpio_173", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0182, "h25", 174, 3, "kpd_col0", "kpd_col3", NULL, "gpio_174", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0184, "j27", 0, 0, "kpd_col1", "kpd_col4", NULL, "gpio_0", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0186, "h27", 1, 3, "kpd_col2", "kpd_col5", NULL, "gpio_1", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0188, "j26", 175, 3, "kpd_row3", "kpd_row0", NULL, "gpio_175", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x018a, "j25", 176, 3, "kpd_row4", "kpd_row1", NULL, "gpio_176", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x018c, "k26", 177, 3, "kpd_row5", "kpd_row2", NULL, "gpio_177", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x018e, "k25", 178, 3, "kpd_row0", "kpd_row3", NULL, "gpio_178", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0190, "l27", 2, 3, "kpd_row1", "kpd_row4", NULL, "gpio_2", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0192, "k27", 3, 3, "kpd_row2", "kpd_row5", NULL, "gpio_3", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0194, "c3", 0, 0, "usba0_otg_ce", NULL, NULL, NULL, NULL, NULL, NULL, NULL), - _PINDEF(0x0196, "b5", 0, 0, "usba0_otg_dp", "uart3_rx_irrx", "uart2_rx", NULL, NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x0198, "b4", 0, 0, "usba0_otg_dm", "uart3_tx_irtx", "uart2_tx", NULL, NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x019a, "aa28", 181, 3, "fref_clk1_out", NULL, NULL, "gpio_181", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x019c, "y28", 182, 3, "fref_clk2_out", NULL, NULL, "gpio_182", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x019e, "ae6", 0, 0, "sys_nirq1", NULL, NULL, NULL, NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x01a0, "af6", 183, 3, "sys_nirq2", NULL, NULL, "gpio_183", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x01a2, "f26", 184, 3, "sys_boot0", NULL, NULL, "gpio_184", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x01a4, "e27", 185, 3, "sys_boot1", NULL, NULL, "gpio_185", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x01a6, "e26", 186, 3, "sys_boot2", NULL, NULL, "gpio_186", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x01a8, "e25", 187, 3, "sys_boot3", NULL, NULL, "gpio_187", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x01aa, "d28", 188, 3, "sys_boot4", NULL, NULL, "gpio_188", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x01ac, "d27", 189, 3, "sys_boot5", NULL, NULL, "gpio_189", NULL, NULL, NULL, "safe_mode"), - _PINDEF(0x01ae, "m2", 11, 3, "dpm_emu0", NULL, NULL, "gpio_11", NULL, NULL, "hw_dbg0", "safe_mode"), - _PINDEF(0x01b0, "n2", 12, 3, "dpm_emu1", NULL, NULL, "gpio_12", NULL, NULL, "hw_dbg1", "safe_mode"), - _PINDEF(0x01b2, "p2", 13, 3, "dpm_emu2", "usba0_ulpiphy_clk", NULL, "gpio_13", NULL, "dispc2_fid", "hw_dbg2", "safe_mode"), - _PINDEF(0x01b4, "v1", 14, 3, "dpm_emu3", "usba0_ulpiphy_stp", NULL, "gpio_14", "rfbi_data10", "dispc2_data10", "hw_dbg3", "safe_mode"), - _PINDEF(0x01b6, "v2", 15, 3, "dpm_emu4", "usba0_ulpiphy_dir", NULL, "gpio_15", "rfbi_data9", "dispc2_data9", "hw_dbg4", "safe_mode"), - _PINDEF(0x01b8, "w1", 16, 3, "dpm_emu5", "usba0_ulpiphy_nxt", NULL, "gpio_16", "rfbi_te_vsync0", "dispc2_data16", "hw_dbg5", "safe_mode"), - _PINDEF(0x01ba, "w2", 17, 3, "dpm_emu6", "usba0_ulpiphy_dat0", "uart3_tx_irtx", "gpio_17", "rfbi_hsync0", "dispc2_data17", "hw_dbg6", "safe_mode"), - _PINDEF(0x01bc, "w3", 18, 3, "dpm_emu7", "usba0_ulpiphy_dat1", "uart3_rx_irrx", "gpio_18", "rfbi_cs0", "dispc2_hsync", "hw_dbg7", "safe_mode"), - _PINDEF(0x01be, "w4", 19, 3, "dpm_emu8", "usba0_ulpiphy_dat2", "uart3_rts_sd", "gpio_19", "rfbi_re", "dispc2_pclk", "hw_dbg8", "safe_mode"), - _PINDEF(0x01c0, "y2", 20, 3, "dpm_emu9", "usba0_ulpiphy_dat3", "uart3_cts_rctx", "gpio_20", "rfbi_we", "dispc2_vsync", "hw_dbg9", "safe_mode"), - _PINDEF(0x01c2, "y3", 21, 3, "dpm_emu10", "usba0_ulpiphy_dat4", NULL, "gpio_21", "rfbi_a0", "dispc2_de", "hw_dbg10", "safe_mode"), - _PINDEF(0x01c4, "y4", 22, 3, "dpm_emu11", "usba0_ulpiphy_dat5", NULL, "gpio_22", "rfbi_data8", "dispc2_data8", "hw_dbg11", "safe_mode"), - _PINDEF(0x01c6, "aa1", 23, 3, "dpm_emu12", "usba0_ulpiphy_dat6", NULL, "gpio_23", "rfbi_data7", "dispc2_data7", "hw_dbg12", "safe_mode"), - _PINDEF(0x01c8, "aa2", 24, 3, "dpm_emu13", "usba0_ulpiphy_dat7", NULL, "gpio_24", "rfbi_data6", "dispc2_data6", "hw_dbg13", "safe_mode"), - _PINDEF(0x01ca, "aa3", 25, 3, "dpm_emu14", "sys_drm_msecure", "uart1_rx", "gpio_25", "rfbi_data5", "dispc2_data5", "hw_dbg14", "safe_mode"), - _PINDEF(0x01cc, "aa4", 26, 3, "dpm_emu15", "sys_secure_indicator", NULL, "gpio_26", "rfbi_data4", "dispc2_data4", "hw_dbg15", "safe_mode"), - _PINDEF(0x01ce, "ab2", 27, 3, "dpm_emu16", "dmtimer8_pwm_evt", "dsi1_te0", "gpio_27", "rfbi_data3", "dispc2_data3", "hw_dbg16", "safe_mode"), - _PINDEF(0x01d0, "ab3", 28, 3, "dpm_emu17", "dmtimer9_pwm_evt", "dsi1_te1", "gpio_28", "rfbi_data2", "dispc2_data2", "hw_dbg17", "safe_mode"), - _PINDEF(0x01d2, "ab4", 190, 3, "dpm_emu18", "dmtimer10_pwm_evt", "dsi2_te0", "gpio_190", "rfbi_data1", "dispc2_data1", "hw_dbg18", "safe_mode"), - _PINDEF(0x01d4, "ac4", 191, 3, "dpm_emu19", "dmtimer11_pwm_evt", "dsi2_te1", "gpio_191", "rfbi_data0", "dispc2_data0", "hw_dbg19", "safe_mode"), +const static struct ti_pinmux_padconf ti_padconf_devmap[] = { + _PINDEF(0x0000, "c12", 0, 0, "gpmc_ad0", "sdmmc2_dat0", NULL, NULL, NULL, NULL, NULL, NULL), + _PINDEF(0x0002, "d12", 0, 0, "gpmc_ad1", "sdmmc2_dat1", NULL, NULL, NULL, NULL, NULL, NULL), + _PINDEF(0x0004, "c13", 0, 0, "gpmc_ad2", "sdmmc2_dat2", NULL, NULL, NULL, NULL, NULL, NULL), + _PINDEF(0x0006, "d13", 0, 0, "gpmc_ad3", "sdmmc2_dat3", NULL, NULL, NULL, NULL, NULL, NULL), + _PINDEF(0x0008, "c15", 0, 0, "gpmc_ad4", "sdmmc2_dat4", "sdmmc2_dir_dat0", NULL, NULL, NULL, NULL, NULL), + _PINDEF(0x000a, "d15", 0, 0, "gpmc_ad5", "sdmmc2_dat5", "sdmmc2_dir_dat1", NULL, NULL, NULL, NULL, NULL), + _PINDEF(0x000c, "a16", 0, 0, "gpmc_ad6", "sdmmc2_dat6", "sdmmc2_dir_cmd", NULL, NULL, NULL, NULL, NULL), + _PINDEF(0x000e, "b16", 0, 0, "gpmc_ad7", "sdmmc2_dat7", "sdmmc2_clk_fdbk", NULL, NULL, NULL, NULL, NULL), + _PINDEF(0x0010, "c16", 32, 3, "gpmc_ad8", "kpd_row0", "c2c_data15", "gpio_32", NULL, "sdmmc1_dat0", NULL, NULL), + _PINDEF(0x0012, "d16", 33, 3, "gpmc_ad9", "kpd_row1", "c2c_data14", "gpio_33", NULL, "sdmmc1_dat1", NULL, NULL), + _PINDEF(0x0014, "c17", 34, 3, "gpmc_ad10", "kpd_row2", "c2c_data13", "gpio_34", NULL, "sdmmc1_dat2", NULL, NULL), + _PINDEF(0x0016, "d17", 35, 3, "gpmc_ad11", "kpd_row3", "c2c_data12", "gpio_35", NULL, "sdmmc1_dat3", NULL, NULL), + _PINDEF(0x0018, "c18", 36, 3, "gpmc_ad12", "kpd_col0", "c2c_data11", "gpio_36", NULL, "sdmmc1_dat4", NULL, NULL), + _PINDEF(0x001a, "d18", 37, 3, "gpmc_ad13", "kpd_col1", "c2c_data10", "gpio_37", NULL, "sdmmc1_dat5", NULL, NULL), + _PINDEF(0x001c, "c19", 38, 3, "gpmc_ad14", "kpd_col2", "c2c_data9", "gpio_38", NULL, "sdmmc1_dat6", NULL, NULL), + _PINDEF(0x001e, "d19", 39, 3, "gpmc_ad15", "kpd_col3", "c2c_data8", "gpio_39", NULL, "sdmmc1_dat7", NULL, NULL), + _PINDEF(0x0020, "b17", 40, 3, "gpmc_a16", "kpd_row4", "c2c_datain0", "gpio_40", "venc_656_data0", NULL, NULL, "safe_mode"), + _PINDEF(0x0022, "a18", 41, 3, "gpmc_a17", "kpd_row5", "c2c_datain1", "gpio_41", "venc_656_data1", NULL, NULL, "safe_mode"), + _PINDEF(0x0024, "b18", 42, 3, "gpmc_a18", "kpd_row6", "c2c_datain2", "gpio_42", "venc_656_data2", NULL, NULL, "safe_mode"), + _PINDEF(0x0026, "a19", 43, 3, "gpmc_a19", "kpd_row7", "c2c_datain3", "gpio_43", "venc_656_data3", NULL, NULL, "safe_mode"), + _PINDEF(0x0028, "b19", 44, 3, "gpmc_a20", "kpd_col4", "c2c_datain4", "gpio_44", "venc_656_data4", NULL, NULL, "safe_mode"), + _PINDEF(0x002a, "b20", 45, 3, "gpmc_a21", "kpd_col5", "c2c_datain5", "gpio_45", "venc_656_data5", NULL, NULL, "safe_mode"), + _PINDEF(0x002c, "a21", 46, 3, "gpmc_a22", "kpd_col6", "c2c_datain6", "gpio_46", "venc_656_data6", NULL, NULL, "safe_mode"), + _PINDEF(0x002e, "b21", 47, 3, "gpmc_a23", "kpd_col7", "c2c_datain7", "gpio_47", "venc_656_data7", NULL, NULL, "safe_mode"), + _PINDEF(0x0030, "c20", 48, 3, "gpmc_a24", "kpd_col8", "c2c_clkout0", "gpio_48", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0032, "d20", 49, 3, "gpmc_a25", NULL, "c2c_clkout1", "gpio_49", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0034, "b25", 50, 3, "gpmc_ncs0", NULL, NULL, "gpio_50", "sys_ndmareq0", NULL, NULL, NULL), + _PINDEF(0x0036, "c21", 51, 3, "gpmc_ncs1", NULL, "c2c_dataout6", "gpio_51", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0038, "d21", 52, 3, "gpmc_ncs2", "kpd_row8", "c2c_dataout7", "gpio_52", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x003a, "c22", 53, 3, "gpmc_ncs3", "gpmc_dir", "c2c_dataout4", "gpio_53", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x003c, "c25", 54, 3, "gpmc_nwp", "dsi1_te0", NULL, "gpio_54", "sys_ndmareq1", NULL, NULL, NULL), + _PINDEF(0x003e, "b22", 55, 3, "gpmc_clk", NULL, NULL, "gpio_55", "sys_ndmareq2", "sdmmc1_cmd", NULL, NULL), + _PINDEF(0x0040, "d25", 56, 3, "gpmc_nadv_ale", "dsi1_te1", NULL, "gpio_56", "sys_ndmareq3", "sdmmc1_clk", NULL, NULL), + _PINDEF(0x0042, "b11", 0, 0, "gpmc_noe", "sdmmc2_clk", NULL, NULL, NULL, NULL, NULL, NULL), + _PINDEF(0x0044, "b12", 0, 0, "gpmc_nwe", "sdmmc2_cmd", NULL, NULL, NULL, NULL, NULL, NULL), + _PINDEF(0x0046, "c23", 59, 3, "gpmc_nbe0_cle", "dsi2_te0", NULL, "gpio_59", NULL, NULL, NULL, NULL), + _PINDEF(0x0048, "d22", 60, 3, "gpmc_nbe1", NULL, "c2c_dataout5", "gpio_60", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x004a, "b26", 61, 3, "gpmc_wait0", "dsi2_te1", NULL, "gpio_61", NULL, NULL, NULL, NULL), + _PINDEF(0x004c, "b23", 62, 3, "gpmc_wait1", NULL, "c2c_dataout2", "gpio_62", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x004e, "d23", 100, 3, "gpmc_wait2", "usbc1_icusb_txen", "c2c_dataout3", "gpio_100", "sys_ndmareq0", NULL, NULL, "safe_mode"), + _PINDEF(0x0050, "a24", 101, 3, "gpmc_ncs4", "dsi1_te0", "c2c_clkin0", "gpio_101", "sys_ndmareq1", NULL, NULL, "safe_mode"), + _PINDEF(0x0052, "b24", 102, 3, "gpmc_ncs5", "dsi1_te1", "c2c_clkin1", "gpio_102", "sys_ndmareq2", NULL, NULL, "safe_mode"), + _PINDEF(0x0054, "c24", 103, 3, "gpmc_ncs6", "dsi2_te0", "c2c_dataout0", "gpio_103", "sys_ndmareq3", NULL, NULL, "safe_mode"), + _PINDEF(0x0056, "d24", 104, 3, "gpmc_ncs7", "dsi2_te1", "c2c_dataout1", "gpio_104", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0058, "b9", 63, 3, "hdmi_hpd", NULL, NULL, "gpio_63", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x005a, "b10", 64, 3, "hdmi_cec", NULL, NULL, "gpio_64", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x005c, "a8", 65, 3, "hdmi_ddc_scl", NULL, NULL, "gpio_65", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x005e, "b8", 66, 3, "hdmi_ddc_sda", NULL, NULL, "gpio_66", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0060, "r26", 0, 0, "csi21_dx0", NULL, NULL, "gpi_67", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0062, "r25", 0, 0, "csi21_dy0", NULL, NULL, "gpi_68", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0064, "t26", 0, 0, "csi21_dx1", NULL, NULL, "gpi_69", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0066, "t25", 0, 0, "csi21_dy1", NULL, NULL, "gpi_70", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0068, "u26", 0, 0, "csi21_dx2", NULL, NULL, "gpi_71", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x006a, "u25", 0, 0, "csi21_dy2", NULL, NULL, "gpi_72", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x006c, "v26", 0, 0, "csi21_dx3", NULL, NULL, "gpi_73", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x006e, "v25", 0, 0, "csi21_dy3", NULL, NULL, "gpi_74", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0070, "w26", 0, 0, "csi21_dx4", NULL, NULL, "gpi_75", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0072, "w25", 0, 0, "csi21_dy4", NULL, NULL, "gpi_76", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0074, "m26", 0, 0, "csi22_dx0", NULL, NULL, "gpi_77", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0076, "m25", 0, 0, "csi22_dy0", NULL, NULL, "gpi_78", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0078, "n26", 0, 0, "csi22_dx1", NULL, NULL, "gpi_79", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x007a, "n25", 0, 0, "csi22_dy1", NULL, NULL, "gpi_80", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x007c, "t27", 81, 3, "cam_shutter", NULL, NULL, "gpio_81", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x007e, "u27", 82, 3, "cam_strobe", NULL, NULL, "gpio_82", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0080, "v27", 83, 3, "cam_globalreset", NULL, NULL, "gpio_83", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0082, "ae18", 84, 3, "usbb1_ulpitll_clk", "hsi1_cawake", NULL, "gpio_84", "usbb1_ulpiphy_clk", NULL, "hw_dbg20", "safe_mode"), + _PINDEF(0x0084, "ag19", 85, 3, "usbb1_ulpitll_stp", "hsi1_cadata", "mcbsp4_clkr", "gpio_85", "usbb1_ulpiphy_stp", "usbb1_mm_rxdp", "hw_dbg21", "safe_mode"), + _PINDEF(0x0086, "af19", 86, 3, "usbb1_ulpitll_dir", "hsi1_caflag", "mcbsp4_fsr", "gpio_86", "usbb1_ulpiphy_dir", NULL, "hw_dbg22", "safe_mode"), + _PINDEF(0x0088, "ae19", 87, 3, "usbb1_ulpitll_nxt", "hsi1_acready", "mcbsp4_fsx", "gpio_87", "usbb1_ulpiphy_nxt", "usbb1_mm_rxdm", "hw_dbg23", "safe_mode"), + _PINDEF(0x008a, "af18", 88, 3, "usbb1_ulpitll_dat0", "hsi1_acwake", "mcbsp4_clkx", "gpio_88", "usbb1_ulpiphy_dat0", "usbb1_mm_txen", "hw_dbg24", "safe_mode"), + _PINDEF(0x008c, "ag18", 89, 3, "usbb1_ulpitll_dat1", "hsi1_acdata", "mcbsp4_dx", "gpio_89", "usbb1_ulpiphy_dat1", "usbb1_mm_txdat", "hw_dbg25", "safe_mode"), + _PINDEF(0x008e, "ae17", 90, 3, "usbb1_ulpitll_dat2", "hsi1_acflag", "mcbsp4_dr", "gpio_90", "usbb1_ulpiphy_dat2", "usbb1_mm_txse0", "hw_dbg26", "safe_mode"), + _PINDEF(0x0090, "af17", 91, 3, "usbb1_ulpitll_dat3", "hsi1_caready", NULL, "gpio_91", "usbb1_ulpiphy_dat3", "usbb1_mm_rxrcv", "hw_dbg27", "safe_mode"), + _PINDEF(0x0092, "ah17", 92, 3, "usbb1_ulpitll_dat4", "dmtimer8_pwm_evt", "abe_mcbsp3_dr", "gpio_92", "usbb1_ulpiphy_dat4", NULL, "hw_dbg28", "safe_mode"), + _PINDEF(0x0094, "ae16", 93, 3, "usbb1_ulpitll_dat5", "dmtimer9_pwm_evt", "abe_mcbsp3_dx", "gpio_93", "usbb1_ulpiphy_dat5", NULL, "hw_dbg29", "safe_mode"), + _PINDEF(0x0096, "af16", 94, 3, "usbb1_ulpitll_dat6", "dmtimer10_pwm_evt", "abe_mcbsp3_clkx", "gpio_94", "usbb1_ulpiphy_dat6", "abe_dmic_din3", "hw_dbg30", "safe_mode"), + _PINDEF(0x0098, "ag16", 95, 3, "usbb1_ulpitll_dat7", "dmtimer11_pwm_evt", "abe_mcbsp3_fsx", "gpio_95", "usbb1_ulpiphy_dat7", "abe_dmic_clk3", "hw_dbg31", "safe_mode"), + _PINDEF(0x009a, "af14", 96, 3, "usbb1_hsic_data", NULL, NULL, "gpio_96", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x009c, "ae14", 97, 3, "usbb1_hsic_strobe", NULL, NULL, "gpio_97", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x009e, "h2", 98, 3, "usbc1_icusb_dp", NULL, NULL, "gpio_98", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00a0, "h3", 99, 3, "usbc1_icusb_dm", NULL, NULL, "gpio_99", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00a2, "d2", 100, 3, "sdmmc1_clk", NULL, "dpm_emu19", "gpio_100", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00a4, "e3", 101, 3, "sdmmc1_cmd", NULL, "uart1_rx", "gpio_101", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00a6, "e4", 102, 3, "sdmmc1_dat0", NULL, "dpm_emu18", "gpio_102", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00a8, "e2", 103, 3, "sdmmc1_dat1", NULL, "dpm_emu17", "gpio_103", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00aa, "e1", 104, 3, "sdmmc1_dat2", NULL, "dpm_emu16", "gpio_104", "jtag_tms_tmsc", NULL, NULL, "safe_mode"), + _PINDEF(0x00ac, "f4", 105, 3, "sdmmc1_dat3", NULL, "dpm_emu15", "gpio_105", "jtag_tck", NULL, NULL, "safe_mode"), + _PINDEF(0x00ae, "f3", 106, 3, "sdmmc1_dat4", NULL, NULL, "gpio_106", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00b0, "f1", 107, 3, "sdmmc1_dat5", NULL, NULL, "gpio_107", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00b2, "g4", 108, 3, "sdmmc1_dat6", NULL, NULL, "gpio_108", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00b4, "g3", 109, 3, "sdmmc1_dat7", NULL, NULL, "gpio_109", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00b6, "ad27", 110, 3, "abe_mcbsp2_clkx", "mcspi2_clk", "abe_mcasp_ahclkx", "gpio_110", "usbb2_mm_rxdm", NULL, NULL, "safe_mode"), + _PINDEF(0x00b8, "ad26", 111, 3, "abe_mcbsp2_dr", "mcspi2_somi", "abe_mcasp_axr", "gpio_111", "usbb2_mm_rxdp", NULL, NULL, "safe_mode"), + _PINDEF(0x00ba, "ad25", 112, 3, "abe_mcbsp2_dx", "mcspi2_simo", "abe_mcasp_amute", "gpio_112", "usbb2_mm_rxrcv", NULL, NULL, "safe_mode"), + _PINDEF(0x00bc, "ac28", 113, 3, "abe_mcbsp2_fsx", "mcspi2_cs0", "abe_mcasp_afsx", "gpio_113", "usbb2_mm_txen", NULL, NULL, "safe_mode"), + _PINDEF(0x00be, "ac26", 114, 3, "abe_mcbsp1_clkx", "abe_slimbus1_clock", NULL, "gpio_114", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00c0, "ac25", 115, 3, "abe_mcbsp1_dr", "abe_slimbus1_data", NULL, "gpio_115", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00c2, "ab25", 116, 3, "abe_mcbsp1_dx", "sdmmc3_dat2", "abe_mcasp_aclkx", "gpio_116", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00c4, "ac27", 117, 3, "abe_mcbsp1_fsx", "sdmmc3_dat3", "abe_mcasp_amutein", "gpio_117", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00c6, "ag25", 0, 0, "abe_pdm_ul_data", "abe_mcbsp3_dr", NULL, NULL, NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00c8, "af25", 0, 0, "abe_pdm_dl_data", "abe_mcbsp3_dx", NULL, NULL, NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00ca, "ae25", 0, 0, "abe_pdm_frame", "abe_mcbsp3_clkx", NULL, NULL, NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00cc, "af26", 0, 0, "abe_pdm_lb_clk", "abe_mcbsp3_fsx", NULL, NULL, NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00ce, "ah26", 118, 3, "abe_clks", NULL, NULL, "gpio_118", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00d0, "ae24", 119, 3, "abe_dmic_clk1", NULL, NULL, "gpio_119", "usbb2_mm_txse0", "uart4_cts", NULL, "safe_mode"), + _PINDEF(0x00d2, "af24", 120, 3, "abe_dmic_din1", NULL, NULL, "gpio_120", "usbb2_mm_txdat", "uart4_rts", NULL, "safe_mode"), + _PINDEF(0x00d4, "ag24", 121, 3, "abe_dmic_din2", "slimbus2_clock", "abe_mcasp_axr", "gpio_121", NULL, "dmtimer11_pwm_evt", NULL, "safe_mode"), + _PINDEF(0x00d6, "ah24", 122, 3, "abe_dmic_din3", "slimbus2_data", "abe_dmic_clk2", "gpio_122", NULL, "dmtimer9_pwm_evt", NULL, "safe_mode"), + _PINDEF(0x00d8, "ab26", 123, 3, "uart2_cts", "sdmmc3_clk", NULL, "gpio_123", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00da, "ab27", 124, 3, "uart2_rts", "sdmmc3_cmd", NULL, "gpio_124", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00dc, "aa25", 125, 3, "uart2_rx", "sdmmc3_dat0", NULL, "gpio_125", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00de, "aa26", 126, 3, "uart2_tx", "sdmmc3_dat1", NULL, "gpio_126", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00e0, "aa27", 127, 3, "hdq_sio", "i2c3_sccb", "i2c2_sccb", "gpio_127", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00e2, "ae28", 0, 0, "i2c1_scl", NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PINDEF(0x00e4, "ae26", 0, 0, "i2c1_sda", NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PINDEF(0x00e6, "c26", 128, 3, "i2c2_scl", "uart1_rx", NULL, "gpio_128", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00e8, "d26", 129, 3, "i2c2_sda", "uart1_tx", NULL, "gpio_129", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00ea, "w27", 130, 3, "i2c3_scl", NULL, NULL, "gpio_130", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00ec, "y27", 131, 3, "i2c3_sda", NULL, NULL, "gpio_131", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00ee, "ag21", 132, 3, "i2c4_scl", NULL, NULL, "gpio_132", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00f0, "ah22", 133, 3, "i2c4_sda", NULL, NULL, "gpio_133", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00f2, "af22", 134, 3, "mcspi1_clk", NULL, NULL, "gpio_134", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00f4, "ae22", 135, 3, "mcspi1_somi", NULL, NULL, "gpio_135", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00f6, "ag22", 136, 3, "mcspi1_simo", NULL, NULL, "gpio_136", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00f8, "ae23", 137, 3, "mcspi1_cs0", NULL, NULL, "gpio_137", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00fa, "af23", 138, 3, "mcspi1_cs1", "uart1_rx", NULL, "gpio_138", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00fc, "ag23", 139, 3, "mcspi1_cs2", "uart1_cts", "slimbus2_clock", "gpio_139", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x00fe, "ah23", 140, 3, "mcspi1_cs3", "uart1_rts", "slimbus2_data", "gpio_140", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0100, "f27", 141, 3, "uart3_cts_rctx", "uart1_tx", NULL, "gpio_141", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0102, "f28", 142, 3, "uart3_rts_sd", NULL, NULL, "gpio_142", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0104, "g27", 143, 3, "uart3_rx_irrx", "dmtimer8_pwm_evt", NULL, "gpio_143", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0106, "g28", 144, 3, "uart3_tx_irtx", "dmtimer9_pwm_evt", NULL, "gpio_144", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0108, "ae5", 145, 3, "sdmmc5_clk", "mcspi2_clk", "usbc1_icusb_dp", "gpio_145", NULL, "sdmmc2_clk", NULL, "safe_mode"), + _PINDEF(0x010a, "af5", 146, 3, "sdmmc5_cmd", "mcspi2_simo", "usbc1_icusb_dm", "gpio_146", NULL, "sdmmc2_cmd", NULL, "safe_mode"), + _PINDEF(0x010c, "ae4", 147, 3, "sdmmc5_dat0", "mcspi2_somi", "usbc1_icusb_rcv", "gpio_147", NULL, "sdmmc2_dat0", NULL, "safe_mode"), + _PINDEF(0x010e, "af4", 148, 3, "sdmmc5_dat1", NULL, "usbc1_icusb_txen", "gpio_148", NULL, "sdmmc2_dat1", NULL, "safe_mode"), + _PINDEF(0x0110, "ag3", 149, 3, "sdmmc5_dat2", "mcspi2_cs1", NULL, "gpio_149", NULL, "sdmmc2_dat2", NULL, "safe_mode"), + _PINDEF(0x0112, "af3", 150, 3, "sdmmc5_dat3", "mcspi2_cs0", NULL, "gpio_150", NULL, "sdmmc2_dat3", NULL, "safe_mode"), + _PINDEF(0x0114, "ae21", 151, 3, "mcspi4_clk", "sdmmc4_clk", "kpd_col6", "gpio_151", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0116, "af20", 152, 3, "mcspi4_simo", "sdmmc4_cmd", "kpd_col7", "gpio_152", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0118, "af21", 153, 3, "mcspi4_somi", "sdmmc4_dat0", "kpd_row6", "gpio_153", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x011a, "ae20", 154, 3, "mcspi4_cs0", "sdmmc4_dat3", "kpd_row7", "gpio_154", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x011c, "ag20", 155, 3, "uart4_rx", "sdmmc4_dat2", "kpd_row8", "gpio_155", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x011e, "ah19", 156, 3, "uart4_tx", "sdmmc4_dat1", "kpd_col8", "gpio_156", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0120, "ag12", 157, 3, "usbb2_ulpitll_clk", "usbb2_ulpiphy_clk", "sdmmc4_cmd", "gpio_157", "hsi2_cawake", NULL, NULL, "safe_mode"), + _PINDEF(0x0122, "af12", 158, 3, "usbb2_ulpitll_stp", "usbb2_ulpiphy_stp", "sdmmc4_clk", "gpio_158", "hsi2_cadata", "dispc2_data23", NULL, "safe_mode"), + _PINDEF(0x0124, "ae12", 159, 3, "usbb2_ulpitll_dir", "usbb2_ulpiphy_dir", "sdmmc4_dat0", "gpio_159", "hsi2_caflag", "dispc2_data22", NULL, "safe_mode"), + _PINDEF(0x0126, "ag13", 160, 3, "usbb2_ulpitll_nxt", "usbb2_ulpiphy_nxt", "sdmmc4_dat1", "gpio_160", "hsi2_acready", "dispc2_data21", NULL, "safe_mode"), + _PINDEF(0x0128, "ae11", 161, 3, "usbb2_ulpitll_dat0", "usbb2_ulpiphy_dat0", "sdmmc4_dat2", "gpio_161", "hsi2_acwake", "dispc2_data20", "usbb2_mm_txen", "safe_mode"), + _PINDEF(0x012a, "af11", 162, 3, "usbb2_ulpitll_dat1", "usbb2_ulpiphy_dat1", "sdmmc4_dat3", "gpio_162", "hsi2_acdata", "dispc2_data19", "usbb2_mm_txdat", "safe_mode"), + _PINDEF(0x012c, "ag11", 163, 3, "usbb2_ulpitll_dat2", "usbb2_ulpiphy_dat2", "sdmmc3_dat2", "gpio_163", "hsi2_acflag", "dispc2_data18", "usbb2_mm_txse0", "safe_mode"), + _PINDEF(0x012e, "ah11", 164, 3, "usbb2_ulpitll_dat3", "usbb2_ulpiphy_dat3", "sdmmc3_dat1", "gpio_164", "hsi2_caready", "dispc2_data15", "rfbi_data15", "safe_mode"), + _PINDEF(0x0130, "ae10", 165, 3, "usbb2_ulpitll_dat4", "usbb2_ulpiphy_dat4", "sdmmc3_dat0", "gpio_165", "mcspi3_somi", "dispc2_data14", "rfbi_data14", "safe_mode"), + _PINDEF(0x0132, "af10", 166, 3, "usbb2_ulpitll_dat5", "usbb2_ulpiphy_dat5", "sdmmc3_dat3", "gpio_166", "mcspi3_cs0", "dispc2_data13", "rfbi_data13", "safe_mode"), + _PINDEF(0x0134, "ag10", 167, 3, "usbb2_ulpitll_dat6", "usbb2_ulpiphy_dat6", "sdmmc3_cmd", "gpio_167", "mcspi3_simo", "dispc2_data12", "rfbi_data12", "safe_mode"), + _PINDEF(0x0136, "ae9", 168, 3, "usbb2_ulpitll_dat7", "usbb2_ulpiphy_dat7", "sdmmc3_clk", "gpio_168", "mcspi3_clk", "dispc2_data11", "rfbi_data11", "safe_mode"), + _PINDEF(0x0138, "af13", 169, 3, "usbb2_hsic_data", NULL, NULL, "gpio_169", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x013a, "ae13", 170, 3, "usbb2_hsic_strobe", NULL, NULL, "gpio_170", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x013c, "g26", 171, 3, "kpd_col3", "kpd_col0", NULL, "gpio_171", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x013e, "g25", 172, 3, "kpd_col4", "kpd_col1", NULL, "gpio_172", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0140, "h26", 173, 3, "kpd_col5", "kpd_col2", NULL, "gpio_173", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0142, "h25", 174, 3, "kpd_col0", "kpd_col3", NULL, "gpio_174", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0144, "j27", 0, 0, "kpd_col1", "kpd_col4", NULL, "gpio_0", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0146, "h27", 1, 3, "kpd_col2", "kpd_col5", NULL, "gpio_1", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0148, "j26", 175, 3, "kpd_row3", "kpd_row0", NULL, "gpio_175", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x014a, "j25", 176, 3, "kpd_row4", "kpd_row1", NULL, "gpio_176", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x014c, "k26", 177, 3, "kpd_row5", "kpd_row2", NULL, "gpio_177", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x014e, "k25", 178, 3, "kpd_row0", "kpd_row3", NULL, "gpio_178", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0150, "l27", 2, 3, "kpd_row1", "kpd_row4", NULL, "gpio_2", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0152, "k27", 3, 3, "kpd_row2", "kpd_row5", NULL, "gpio_3", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0154, "c3", 0, 0, "usba0_otg_ce", NULL, NULL, NULL, NULL, NULL, NULL, NULL), + _PINDEF(0x0156, "b5", 0, 0, "usba0_otg_dp", "uart3_rx_irrx", "uart2_rx", NULL, NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0158, "b4", 0, 0, "usba0_otg_dm", "uart3_tx_irtx", "uart2_tx", NULL, NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x015a, "aa28", 181, 3, "fref_clk1_out", NULL, NULL, "gpio_181", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x015c, "y28", 182, 3, "fref_clk2_out", NULL, NULL, "gpio_182", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x015e, "ae6", 0, 0, "sys_nirq1", NULL, NULL, NULL, NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0160, "af6", 183, 3, "sys_nirq2", NULL, NULL, "gpio_183", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0162, "f26", 184, 3, "sys_boot0", NULL, NULL, "gpio_184", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0164, "e27", 185, 3, "sys_boot1", NULL, NULL, "gpio_185", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0166, "e26", 186, 3, "sys_boot2", NULL, NULL, "gpio_186", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x0168, "e25", 187, 3, "sys_boot3", NULL, NULL, "gpio_187", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x016a, "d28", 188, 3, "sys_boot4", NULL, NULL, "gpio_188", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x016c, "d27", 189, 3, "sys_boot5", NULL, NULL, "gpio_189", NULL, NULL, NULL, "safe_mode"), + _PINDEF(0x016e, "m2", 11, 3, "dpm_emu0", NULL, NULL, "gpio_11", NULL, NULL, "hw_dbg0", "safe_mode"), + _PINDEF(0x0170, "n2", 12, 3, "dpm_emu1", NULL, NULL, "gpio_12", NULL, NULL, "hw_dbg1", "safe_mode"), + _PINDEF(0x0172, "p2", 13, 3, "dpm_emu2", "usba0_ulpiphy_clk", NULL, "gpio_13", NULL, "dispc2_fid", "hw_dbg2", "safe_mode"), + _PINDEF(0x0174, "v1", 14, 3, "dpm_emu3", "usba0_ulpiphy_stp", NULL, "gpio_14", "rfbi_data10", "dispc2_data10", "hw_dbg3", "safe_mode"), + _PINDEF(0x0176, "v2", 15, 3, "dpm_emu4", "usba0_ulpiphy_dir", NULL, "gpio_15", "rfbi_data9", "dispc2_data9", "hw_dbg4", "safe_mode"), + _PINDEF(0x0178, "w1", 16, 3, "dpm_emu5", "usba0_ulpiphy_nxt", NULL, "gpio_16", "rfbi_te_vsync0", "dispc2_data16", "hw_dbg5", "safe_mode"), + _PINDEF(0x017a, "w2", 17, 3, "dpm_emu6", "usba0_ulpiphy_dat0", "uart3_tx_irtx", "gpio_17", "rfbi_hsync0", "dispc2_data17", "hw_dbg6", "safe_mode"), + _PINDEF(0x017c, "w3", 18, 3, "dpm_emu7", "usba0_ulpiphy_dat1", "uart3_rx_irrx", "gpio_18", "rfbi_cs0", "dispc2_hsync", "hw_dbg7", "safe_mode"), + _PINDEF(0x017e, "w4", 19, 3, "dpm_emu8", "usba0_ulpiphy_dat2", "uart3_rts_sd", "gpio_19", "rfbi_re", "dispc2_pclk", "hw_dbg8", "safe_mode"), + _PINDEF(0x0180, "y2", 20, 3, "dpm_emu9", "usba0_ulpiphy_dat3", "uart3_cts_rctx", "gpio_20", "rfbi_we", "dispc2_vsync", "hw_dbg9", "safe_mode"), + _PINDEF(0x0182, "y3", 21, 3, "dpm_emu10", "usba0_ulpiphy_dat4", NULL, "gpio_21", "rfbi_a0", "dispc2_de", "hw_dbg10", "safe_mode"), + _PINDEF(0x0184, "y4", 22, 3, "dpm_emu11", "usba0_ulpiphy_dat5", NULL, "gpio_22", "rfbi_data8", "dispc2_data8", "hw_dbg11", "safe_mode"), + _PINDEF(0x0186, "aa1", 23, 3, "dpm_emu12", "usba0_ulpiphy_dat6", NULL, "gpio_23", "rfbi_data7", "dispc2_data7", "hw_dbg12", "safe_mode"), + _PINDEF(0x0188, "aa2", 24, 3, "dpm_emu13", "usba0_ulpiphy_dat7", NULL, "gpio_24", "rfbi_data6", "dispc2_data6", "hw_dbg13", "safe_mode"), + _PINDEF(0x018a, "aa3", 25, 3, "dpm_emu14", "sys_drm_msecure", "uart1_rx", "gpio_25", "rfbi_data5", "dispc2_data5", "hw_dbg14", "safe_mode"), + _PINDEF(0x018c, "aa4", 26, 3, "dpm_emu15", "sys_secure_indicator", NULL, "gpio_26", "rfbi_data4", "dispc2_data4", "hw_dbg15", "safe_mode"), + _PINDEF(0x018e, "ab2", 27, 3, "dpm_emu16", "dmtimer8_pwm_evt", "dsi1_te0", "gpio_27", "rfbi_data3", "dispc2_data3", "hw_dbg16", "safe_mode"), + _PINDEF(0x0190, "ab3", 28, 3, "dpm_emu17", "dmtimer9_pwm_evt", "dsi1_te1", "gpio_28", "rfbi_data2", "dispc2_data2", "hw_dbg17", "safe_mode"), + _PINDEF(0x0192, "ab4", 190, 3, "dpm_emu18", "dmtimer10_pwm_evt", "dsi2_te0", "gpio_190", "rfbi_data1", "dispc2_data1", "hw_dbg18", "safe_mode"), + _PINDEF(0x0194, "ac4", 191, 3, "dpm_emu19", "dmtimer11_pwm_evt", "dsi2_te1", "gpio_191", "rfbi_data0", "dispc2_data0", "hw_dbg19", "safe_mode"), { .ballname = NULL }, }; -const struct ti_scm_device ti_scm_dev = { +const struct ti_pinmux_device ti_pinmux_dev = { .padconf_muxmode_mask = CONTROL_PADCONF_MUXMODE_MASK, .padconf_sate_mask = CONTROL_PADCONF_SATE_MASK, .padstate = ti_padstate_devmap, diff --git a/sys/arm/ti/omap4/omap4var.h b/sys/arm/ti/omap4/omap4var.h deleted file mode 100644 index 8246e765bc85..000000000000 --- a/sys/arm/ti/omap4/omap4var.h +++ /dev/null @@ -1,91 +0,0 @@ -/*- - * Copyright (c) 2010 - * Ben Gray . - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the company nor the name of the author may be used to - * endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY BEN GRAY ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL BEN GRAY BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $FreeBSD$ - */ - -#ifndef _OMAP4VAR_H_ -#define _OMAP4VAR_H_ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - - -void omap4_mask_all_intr(void); -void omap4_post_filter_intr(void *arg); - -struct omap4_softc { - device_t sc_dev; - bus_space_tag_t sc_iotag; - - /* Handles for the two generic interrupt controller (GIC) register mappings */ - bus_space_handle_t sc_gic_cpu_ioh; - bus_space_handle_t sc_gic_dist_ioh; - - /* Handle for the PL310 L2 cache controller */ - bus_space_handle_t sc_pl310_ioh; - - /* Handle for the global and provate timer register set in the Cortex core */ - bus_space_handle_t sc_prv_timer_ioh; - bus_space_handle_t sc_gbl_timer_ioh; - - /* SCM access */ - struct resource *sc_scm_mem; - int sc_scm_rid; -}; - -struct omap4_intr_conf { - int num; - unsigned int priority; - unsigned int target_cpu; -}; - -int omap4_setup_intr_controller(device_t dev, - const struct omap4_intr_conf *irqs); -int omap4_setup_gic_cpu(unsigned int prio_mask); - -void omap4_init_timer(device_t dev); - -int omap4_setup_l2cache_controller(struct omap4_softc *sc); -void omap4_smc_call(uint32_t fn, uint32_t arg); - -#endif /* _OMAP4VAR_H_ */ diff --git a/sys/arm/ti/omap4/pandaboard/pandaboard.c b/sys/arm/ti/omap4/pandaboard/pandaboard.c index e48013212fde..20e5e8a6da87 100644 --- a/sys/arm/ti/omap4/pandaboard/pandaboard.c +++ b/sys/arm/ti/omap4/pandaboard/pandaboard.c @@ -42,7 +42,6 @@ __FBSDID("$FreeBSD$"); #include #include -#include #include /* Registers in the SCRM that control the AUX clocks */ diff --git a/sys/arm/ti/ti_adc.c b/sys/arm/ti/ti_adc.c index c5710d74b22f..d65afc6b9b82 100644 --- a/sys/arm/ti/ti_adc.c +++ b/sys/arm/ti/ti_adc.c @@ -467,7 +467,7 @@ static int ti_adc_probe(device_t dev) { - if (!ofw_bus_is_compatible(dev, "ti,adc")) + if (!ofw_bus_is_compatible(dev, "ti,am3359-tscadc")) return (ENXIO); device_set_desc(dev, "TI ADC controller"); diff --git a/sys/arm/ti/ti_common.c b/sys/arm/ti/ti_common.c index 4d12c71c0ffd..50072f2acfa3 100644 --- a/sys/arm/ti/ti_common.c +++ b/sys/arm/ti/ti_common.c @@ -44,36 +44,21 @@ __FBSDID("$FreeBSD$"); #include #include +#include #include struct fdt_fixup_entry fdt_fixup_table[] = { { NULL, NULL } }; -#ifdef SOC_OMAP4 -static int -fdt_gic_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig, - int *pol) -{ - - if (!fdt_is_compatible(node, "arm,gic")) - return (ENXIO); - - *interrupt = fdt32_to_cpu(intr[0]); - *trig = INTR_TRIGGER_CONFORM; - *pol = INTR_POLARITY_CONFORM; - - return (0); -} -#endif - #ifdef SOC_TI_AM335X static int fdt_aintc_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig, int *pol) { - if (!fdt_is_compatible(node, "ti,aintc")) + if (!fdt_is_compatible(node, "ti,aintc") && + !fdt_is_compatible(node, "ti,am33xx-intc")) return (ENXIO); *interrupt = fdt32_to_cpu(intr[0]); @@ -86,7 +71,7 @@ fdt_aintc_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig, fdt_pic_decode_t fdt_pic_table[] = { #ifdef SOC_OMAP4 - &fdt_gic_decode_ic, + &gic_decode_fdt, #endif #ifdef SOC_TI_AM335X &fdt_aintc_decode_ic, diff --git a/sys/arm/ti/ti_edma3.c b/sys/arm/ti/ti_edma3.c index 1489ff7c9452..080e7bddbe77 100644 --- a/sys/arm/ti/ti_edma3.c +++ b/sys/arm/ti/ti_edma3.c @@ -99,7 +99,11 @@ __FBSDID("$FreeBSD$"); struct ti_edma3_softc { device_t sc_dev; - struct resource * mem_res[TI_EDMA3_NUM_TCS+1]; + /* + * We use one-element array in case if we need to add + * mem resources for transfer control windows + */ + struct resource * mem_res[1]; struct resource * irq_res[TI_EDMA3_NUM_IRQS]; void *ih_cookie[TI_EDMA3_NUM_IRQS]; }; @@ -108,9 +112,6 @@ static struct ti_edma3_softc *ti_edma3_sc = NULL; static struct resource_spec ti_edma3_mem_spec[] = { { SYS_RES_MEMORY, 0, RF_ACTIVE }, - { SYS_RES_MEMORY, 1, RF_ACTIVE }, - { SYS_RES_MEMORY, 2, RF_ACTIVE }, - { SYS_RES_MEMORY, 3, RF_ACTIVE }, { -1, 0, 0 } }; static struct resource_spec ti_edma3_irq_spec[] = { @@ -123,8 +124,6 @@ static struct resource_spec ti_edma3_irq_spec[] = { /* Read/Write macros */ #define ti_edma3_cc_rd_4(reg) bus_read_4(ti_edma3_sc->mem_res[0], reg) #define ti_edma3_cc_wr_4(reg, val) bus_write_4(ti_edma3_sc->mem_res[0], reg, val) -#define ti_edma3_tc_rd_4(c, reg) bus_read_4(ti_edma3_sc->mem_res[c+1], reg) -#define ti_edma3_tc_wr_4(c, reg, val) bus_write_4(ti_edma3_sc->mem_res[c+1], reg, val) static void ti_edma3_intr_comp(void *arg); static void ti_edma3_intr_mperr(void *arg); diff --git a/sys/arm/ti/ti_gpio.c b/sys/arm/ti/ti_gpio.c index d0ce91846f0b..8e28adc07944 100644 --- a/sys/arm/ti/ti_gpio.c +++ b/sys/arm/ti/ti_gpio.c @@ -52,6 +52,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include #include @@ -101,53 +102,17 @@ __FBSDID("$FreeBSD$"); #define TI_GPIO_SETDATAOUT 0x0194 /* Other SoC Specific definitions */ -#define OMAP4_MAX_GPIO_BANKS 6 #define OMAP4_FIRST_GPIO_BANK 1 #define OMAP4_INTR_PER_BANK 1 #define OMAP4_GPIO_REV 0x50600801 -#define AM335X_MAX_GPIO_BANKS 4 #define AM335X_FIRST_GPIO_BANK 0 #define AM335X_INTR_PER_BANK 2 #define AM335X_GPIO_REV 0x50600801 #define PINS_PER_BANK 32 -#define TI_GPIO_BANK(p) ((p) / PINS_PER_BANK) #define TI_GPIO_MASK(p) (1U << ((p) % PINS_PER_BANK)) -static struct ti_gpio_softc *ti_gpio_sc = NULL; static int ti_gpio_detach(device_t); -static u_int -ti_max_gpio_banks(void) -{ - switch(ti_chip()) { -#ifdef SOC_OMAP4 - case CHIP_OMAP_4: - return (OMAP4_MAX_GPIO_BANKS); -#endif -#ifdef SOC_TI_AM335X - case CHIP_AM335X: - return (AM335X_MAX_GPIO_BANKS); -#endif - } - return (0); -} - -static u_int -ti_max_gpio_intrs(void) -{ - switch(ti_chip()) { -#ifdef SOC_OMAP4 - case CHIP_OMAP_4: - return (OMAP4_MAX_GPIO_BANKS * OMAP4_INTR_PER_BANK); -#endif -#ifdef SOC_TI_AM335X - case CHIP_AM335X: - return (AM335X_MAX_GPIO_BANKS * AM335X_INTR_PER_BANK); -#endif - } - return (0); -} - static u_int ti_first_gpio_bank(void) { @@ -180,47 +145,6 @@ ti_gpio_rev(void) return (0); } -/** - * ti_gpio_mem_spec - Resource specification used when allocating resources - * ti_gpio_irq_spec - Resource specification used when allocating resources - * - * This driver module can have up to six independent memory regions, each - * region typically controls 32 GPIO pins. - * - * On OMAP3 and OMAP4 there is only one physical interrupt line per bank, - * but there are two set of registers which control the interrupt delivery - * to internal subsystems. The first set of registers control the - * interrupts delivery to the MPU and the second set control the - * interrupts delivery to the DSP. - * - * On AM335x there are two physical interrupt lines for each GPIO module. - * Each interrupt line is controlled by a set of registers. - */ -static struct resource_spec ti_gpio_mem_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, - { SYS_RES_MEMORY, 1, RF_ACTIVE | RF_OPTIONAL }, - { SYS_RES_MEMORY, 2, RF_ACTIVE | RF_OPTIONAL }, - { SYS_RES_MEMORY, 3, RF_ACTIVE | RF_OPTIONAL }, -#if !defined(SOC_TI_AM335X) - { SYS_RES_MEMORY, 4, RF_ACTIVE | RF_OPTIONAL }, - { SYS_RES_MEMORY, 5, RF_ACTIVE | RF_OPTIONAL }, -#endif - { -1, 0, 0 } -}; -static struct resource_spec ti_gpio_irq_spec[] = { - { SYS_RES_IRQ, 0, RF_ACTIVE }, - { SYS_RES_IRQ, 1, RF_ACTIVE | RF_OPTIONAL }, - { SYS_RES_IRQ, 2, RF_ACTIVE | RF_OPTIONAL }, - { SYS_RES_IRQ, 3, RF_ACTIVE | RF_OPTIONAL }, - { SYS_RES_IRQ, 4, RF_ACTIVE | RF_OPTIONAL }, - { SYS_RES_IRQ, 5, RF_ACTIVE | RF_OPTIONAL }, -#if defined(SOC_TI_AM335X) - { SYS_RES_IRQ, 6, RF_ACTIVE | RF_OPTIONAL }, - { SYS_RES_IRQ, 7, RF_ACTIVE | RF_OPTIONAL }, -#endif - { -1, 0, 0 } -}; - /** * Macros for driver mutex locking */ @@ -244,9 +168,9 @@ static struct resource_spec ti_gpio_irq_spec[] = { * 32-bit value read from the register. */ static inline uint32_t -ti_gpio_read_4(struct ti_gpio_softc *sc, unsigned int bank, bus_size_t off) +ti_gpio_read_4(struct ti_gpio_softc *sc, bus_size_t off) { - return (bus_read_4(sc->sc_mem_res[bank], off)); + return (bus_read_4(sc->sc_mem_res, off)); } /** @@ -260,52 +184,52 @@ ti_gpio_read_4(struct ti_gpio_softc *sc, unsigned int bank, bus_size_t off) * nothing */ static inline void -ti_gpio_write_4(struct ti_gpio_softc *sc, unsigned int bank, bus_size_t off, +ti_gpio_write_4(struct ti_gpio_softc *sc, bus_size_t off, uint32_t val) { - bus_write_4(sc->sc_mem_res[bank], off, val); + bus_write_4(sc->sc_mem_res, off, val); } static inline void -ti_gpio_intr_clr(struct ti_gpio_softc *sc, unsigned int bank, uint32_t mask) +ti_gpio_intr_clr(struct ti_gpio_softc *sc, uint32_t mask) { /* We clear both set of registers. */ - ti_gpio_write_4(sc, bank, TI_GPIO_IRQSTATUS_CLR_0, mask); - ti_gpio_write_4(sc, bank, TI_GPIO_IRQSTATUS_CLR_1, mask); + ti_gpio_write_4(sc, TI_GPIO_IRQSTATUS_CLR_0, mask); + ti_gpio_write_4(sc, TI_GPIO_IRQSTATUS_CLR_1, mask); } static inline void -ti_gpio_intr_set(struct ti_gpio_softc *sc, unsigned int bank, uint32_t mask) +ti_gpio_intr_set(struct ti_gpio_softc *sc, uint32_t mask) { /* * On OMAP4 we unmask only the MPU interrupt and on AM335x we * also activate only the first interrupt. */ - ti_gpio_write_4(sc, bank, TI_GPIO_IRQSTATUS_SET_0, mask); + ti_gpio_write_4(sc, TI_GPIO_IRQSTATUS_SET_0, mask); } static inline void -ti_gpio_intr_ack(struct ti_gpio_softc *sc, unsigned int bank, uint32_t mask) +ti_gpio_intr_ack(struct ti_gpio_softc *sc, uint32_t mask) { /* * Acknowledge the interrupt on both registers even if we use only * the first one. */ - ti_gpio_write_4(sc, bank, TI_GPIO_IRQSTATUS_0, mask); - ti_gpio_write_4(sc, bank, TI_GPIO_IRQSTATUS_1, mask); + ti_gpio_write_4(sc, TI_GPIO_IRQSTATUS_0, mask); + ti_gpio_write_4(sc, TI_GPIO_IRQSTATUS_1, mask); } static inline uint32_t -ti_gpio_intr_status(struct ti_gpio_softc *sc, unsigned int bank) +ti_gpio_intr_status(struct ti_gpio_softc *sc) { uint32_t reg; /* Get the status from both registers. */ - reg = ti_gpio_read_4(sc, bank, TI_GPIO_IRQSTATUS_0); - reg |= ti_gpio_read_4(sc, bank, TI_GPIO_IRQSTATUS_1); + reg = ti_gpio_read_4(sc, TI_GPIO_IRQSTATUS_0); + reg |= ti_gpio_read_4(sc, TI_GPIO_IRQSTATUS_1); return (reg); } @@ -337,7 +261,7 @@ static int ti_gpio_pin_max(device_t dev, int *maxpin) { - *maxpin = ti_max_gpio_banks() * PINS_PER_BANK - 1; + *maxpin = PINS_PER_BANK - 1; return (0); } @@ -346,11 +270,8 @@ static int ti_gpio_valid_pin(struct ti_gpio_softc *sc, int pin) { - if (pin >= sc->sc_maxpin || - TI_GPIO_BANK(pin) >= ti_max_gpio_banks() || - sc->sc_mem_res[TI_GPIO_BANK(pin)] == NULL) { + if (pin >= sc->sc_maxpin || sc->sc_mem_res == NULL) return (EINVAL); - } return (0); } @@ -489,12 +410,12 @@ ti_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) } /* If configuring as an output set the "output enable" bit */ - oe = ti_gpio_read_4(sc, TI_GPIO_BANK(pin), TI_GPIO_OE); + oe = ti_gpio_read_4(sc, TI_GPIO_OE); if (flags & GPIO_PIN_INPUT) oe |= TI_GPIO_MASK(pin); else oe &= ~TI_GPIO_MASK(pin); - ti_gpio_write_4(sc, TI_GPIO_BANK(pin), TI_GPIO_OE, oe); + ti_gpio_write_4(sc, TI_GPIO_OE, oe); TI_GPIO_UNLOCK(sc); return (0); @@ -529,7 +450,7 @@ ti_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value) reg = TI_GPIO_CLEARDATAOUT; else reg = TI_GPIO_SETDATAOUT; - ti_gpio_write_4(sc, TI_GPIO_BANK(pin), reg, TI_GPIO_MASK(pin)); + ti_gpio_write_4(sc, reg, TI_GPIO_MASK(pin)); TI_GPIO_UNLOCK(sc); return (0); @@ -565,12 +486,12 @@ ti_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *value) * input register otherwise. */ TI_GPIO_LOCK(sc); - oe = ti_gpio_read_4(sc, TI_GPIO_BANK(pin), TI_GPIO_OE); + oe = ti_gpio_read_4(sc, TI_GPIO_OE); if (oe & TI_GPIO_MASK(pin)) reg = TI_GPIO_DATAIN; else reg = TI_GPIO_DATAOUT; - val = ti_gpio_read_4(sc, TI_GPIO_BANK(pin), reg); + val = ti_gpio_read_4(sc, reg); *value = (val & TI_GPIO_MASK(pin)) ? 1 : 0; TI_GPIO_UNLOCK(sc); @@ -601,12 +522,12 @@ ti_gpio_pin_toggle(device_t dev, uint32_t pin) /* Toggle the pin */ TI_GPIO_LOCK(sc); - val = ti_gpio_read_4(sc, TI_GPIO_BANK(pin), TI_GPIO_DATAOUT); + val = ti_gpio_read_4(sc, TI_GPIO_DATAOUT); if (val & TI_GPIO_MASK(pin)) reg = TI_GPIO_CLEARDATAOUT; else reg = TI_GPIO_SETDATAOUT; - ti_gpio_write_4(sc, TI_GPIO_BANK(pin), reg, TI_GPIO_MASK(pin)); + ti_gpio_write_4(sc, reg, TI_GPIO_MASK(pin)); TI_GPIO_UNLOCK(sc); return (0); @@ -631,13 +552,8 @@ ti_gpio_intr(void *arg) sc = (struct ti_gpio_softc *)arg; bank_last = -1; reg = 0; /* squelch bogus gcc warning */ + reg = ti_gpio_intr_status(sc); for (irq = 0; irq < sc->sc_maxpin; irq++) { - - /* Read interrupt status only once for each bank. */ - if (TI_GPIO_BANK(irq) != bank_last) { - reg = ti_gpio_intr_status(sc, TI_GPIO_BANK(irq)); - bank_last = TI_GPIO_BANK(irq); - } if ((reg & TI_GPIO_MASK(irq)) == 0) continue; event = sc->sc_events[irq]; @@ -646,96 +562,57 @@ ti_gpio_intr(void *arg) else device_printf(sc->sc_dev, "Stray IRQ %d\n", irq); /* Ack the IRQ Status bit. */ - ti_gpio_intr_ack(sc, TI_GPIO_BANK(irq), TI_GPIO_MASK(irq)); + ti_gpio_intr_ack(sc, TI_GPIO_MASK(irq)); } return (FILTER_HANDLED); } static int -ti_gpio_attach_intr(device_t dev) -{ - int i; - struct ti_gpio_softc *sc; - - sc = device_get_softc(dev); - for (i = 0; i < ti_max_gpio_intrs(); i++) { - if (sc->sc_irq_res[i] == NULL) - break; - - /* - * Register our interrupt filter for each of the IRQ resources. - */ - if (bus_setup_intr(dev, sc->sc_irq_res[i], - INTR_TYPE_MISC | INTR_MPSAFE, ti_gpio_intr, NULL, sc, - &sc->sc_irq_hdl[i]) != 0) { - device_printf(dev, - "WARNING: unable to register interrupt filter\n"); - return (-1); - } - } - - return (0); -} - -static int -ti_gpio_detach_intr(device_t dev) -{ - int i; - struct ti_gpio_softc *sc; - - /* Teardown our interrupt filters. */ - sc = device_get_softc(dev); - for (i = 0; i < ti_max_gpio_intrs(); i++) { - if (sc->sc_irq_res[i] == NULL) - break; - - if (sc->sc_irq_hdl[i]) { - bus_teardown_intr(dev, sc->sc_irq_res[i], - sc->sc_irq_hdl[i]); - } - } - - return (0); -} - -static int -ti_gpio_bank_init(device_t dev, int bank) +ti_gpio_bank_init(device_t dev) { int pin; struct ti_gpio_softc *sc; uint32_t flags, reg_oe, rev; + clk_ident_t clk; sc = device_get_softc(dev); /* Enable the interface and functional clocks for the module. */ - ti_prcm_clk_enable(GPIO0_CLK + ti_first_gpio_bank() + bank); + clk = ti_hwmods_get_clock(dev); + if (clk == INVALID_CLK_IDENT) { + device_printf(dev, "failed to get device id based on ti,hwmods\n"); + return (EINVAL); + } + + sc->sc_bank = clk - GPIO1_CLK + ti_first_gpio_bank(); + ti_prcm_clk_enable(clk); /* * Read the revision number of the module. TI don't publish the * actual revision numbers, so instead the values have been * determined by experimentation. */ - rev = ti_gpio_read_4(sc, bank, TI_GPIO_REVISION); + rev = ti_gpio_read_4(sc, TI_GPIO_REVISION); /* Check the revision. */ if (rev != ti_gpio_rev()) { device_printf(dev, "Warning: could not determine the revision " - "of GPIO module %d (revision:0x%08x)\n", bank, rev); + "of GPIO module (revision:0x%08x)\n", rev); return (EINVAL); } /* Disable interrupts for all pins. */ - ti_gpio_intr_clr(sc, bank, 0xffffffff); + ti_gpio_intr_clr(sc, 0xffffffff); /* Init OE register based on pads configuration. */ reg_oe = 0xffffffff; for (pin = 0; pin < PINS_PER_BANK; pin++) { - TI_GPIO_GET_FLAGS(dev, PINS_PER_BANK * bank + pin, &flags); + TI_GPIO_GET_FLAGS(dev, pin, &flags); if (flags & GPIO_PIN_OUTPUT) reg_oe &= ~(1UL << pin); } - ti_gpio_write_4(sc, bank, TI_GPIO_OE, reg_oe); + ti_gpio_write_4(sc, TI_GPIO_OE, reg_oe); return (0); } @@ -760,35 +637,38 @@ ti_gpio_attach(device_t dev) unsigned int i; int err; - if (ti_gpio_sc != NULL) - return (ENXIO); - - ti_gpio_sc = sc = device_get_softc(dev); + sc = device_get_softc(dev); sc->sc_dev = dev; TI_GPIO_LOCK_INIT(sc); ti_gpio_pin_max(dev, &sc->sc_maxpin); sc->sc_maxpin++; - /* There are up to 6 different GPIO register sets located in different - * memory areas on the chip. The memory range should have been set for - * the driver when it was added as a child. - */ - if (bus_alloc_resources(dev, ti_gpio_mem_spec, sc->sc_mem_res) != 0) { + sc->sc_mem_rid = 0; + sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, + &sc->sc_mem_rid, RF_ACTIVE); + if (!sc->sc_mem_res) { device_printf(dev, "Error: could not allocate mem resources\n"); ti_gpio_detach(dev); return (ENXIO); } - /* Request the IRQ resources */ - if (bus_alloc_resources(dev, ti_gpio_irq_spec, sc->sc_irq_res) != 0) { + sc->sc_irq_rid = 0; + sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, + &sc->sc_irq_rid, RF_ACTIVE); + if (!sc->sc_irq_res) { device_printf(dev, "Error: could not allocate irq resources\n"); ti_gpio_detach(dev); return (ENXIO); } - /* Setup the IRQ resources */ - if (ti_gpio_attach_intr(dev) != 0) { - device_printf(dev, "Error: could not setup irq handlers\n"); + /* + * Register our interrupt filter for each of the IRQ resources. + */ + if (bus_setup_intr(dev, sc->sc_irq_res, + INTR_TYPE_MISC | INTR_MPSAFE, ti_gpio_intr, NULL, sc, + &sc->sc_irq_hdl) != 0) { + device_printf(dev, + "WARNING: unable to register interrupt filter\n"); ti_gpio_detach(dev); return (ENXIO); } @@ -811,21 +691,23 @@ ti_gpio_attach(device_t dev) sc->sc_events = malloc(sizeof(struct intr_event *) * sc->sc_maxpin, M_DEVBUF, M_WAITOK | M_ZERO); + sc->sc_mask_args = malloc(sizeof(struct ti_gpio_mask_arg) * sc->sc_maxpin, + M_DEVBUF, M_WAITOK | M_ZERO); + /* We need to go through each block and ensure the clocks are running and * the module is enabled. It might be better to do this only when the * pins are configured which would result in less power used if the GPIO * pins weren't used ... */ - for (i = 0; i < ti_max_gpio_banks(); i++) { - if (sc->sc_mem_res[i] != NULL) { - /* Initialize the GPIO module. */ - err = ti_gpio_bank_init(dev, i); - if (err != 0) { - ti_gpio_detach(dev); - return (err); - } + if (sc->sc_mem_res != NULL) { + /* Initialize the GPIO module. */ + err = ti_gpio_bank_init(dev); + if (err != 0) { + ti_gpio_detach(dev); + return (err); } } + sc->sc_busdev = gpiobus_attach_bus(dev); if (sc->sc_busdev == NULL) { ti_gpio_detach(dev); @@ -852,26 +734,30 @@ static int ti_gpio_detach(device_t dev) { struct ti_gpio_softc *sc = device_get_softc(dev); - unsigned int i; KASSERT(mtx_initialized(&sc->sc_mtx), ("gpio mutex not initialized")); /* Disable all interrupts */ - for (i = 0; i < ti_max_gpio_banks(); i++) { - if (sc->sc_mem_res[i] != NULL) - ti_gpio_intr_clr(sc, i, 0xffffffff); - } + if (sc->sc_mem_res != NULL) + ti_gpio_intr_clr(sc, 0xffffffff); gpiobus_detach_bus(dev); if (sc->sc_events) free(sc->sc_events, M_DEVBUF); + if (sc->sc_mask_args) + free(sc->sc_mask_args, M_DEVBUF); if (sc->sc_irq_polarity) free(sc->sc_irq_polarity, M_DEVBUF); if (sc->sc_irq_trigger) free(sc->sc_irq_trigger, M_DEVBUF); /* Release the memory and IRQ resources. */ - ti_gpio_detach_intr(dev); - bus_release_resources(dev, ti_gpio_irq_spec, sc->sc_irq_res); - bus_release_resources(dev, ti_gpio_mem_spec, sc->sc_mem_res); + if (sc->sc_irq_hdl) { + bus_teardown_intr(dev, sc->sc_irq_res, + sc->sc_irq_hdl); + } + bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irq_rid, + sc->sc_irq_res); + bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_mem_rid, + sc->sc_mem_res); TI_GPIO_LOCK_DESTROY(sc); return (0); @@ -900,46 +786,57 @@ ti_gpio_intr_reg(struct ti_gpio_softc *sc, int irq) } static void -ti_gpio_mask_irq(void *source) +ti_gpio_mask_irq_internal(struct ti_gpio_softc *sc, int irq) { - int irq; uint32_t reg, val; - irq = (int)source; - if (ti_gpio_valid_pin(ti_gpio_sc, irq) != 0) + if (ti_gpio_valid_pin(sc, irq) != 0) return; - TI_GPIO_LOCK(ti_gpio_sc); - ti_gpio_intr_clr(ti_gpio_sc, TI_GPIO_BANK(irq), TI_GPIO_MASK(irq)); - reg = ti_gpio_intr_reg(ti_gpio_sc, irq); + TI_GPIO_LOCK(sc); + ti_gpio_intr_clr(sc, TI_GPIO_MASK(irq)); + reg = ti_gpio_intr_reg(sc, irq); if (reg != 0) { - val = ti_gpio_read_4(ti_gpio_sc, TI_GPIO_BANK(irq), reg); + val = ti_gpio_read_4(sc, reg); val &= ~TI_GPIO_MASK(irq); - ti_gpio_write_4(ti_gpio_sc, TI_GPIO_BANK(irq), reg, val); + ti_gpio_write_4(sc, reg, val); } - TI_GPIO_UNLOCK(ti_gpio_sc); + TI_GPIO_UNLOCK(sc); +} + +static void +ti_gpio_unmask_irq_internal(struct ti_gpio_softc *sc, int irq) +{ + uint32_t reg, val; + + if (ti_gpio_valid_pin(sc, irq) != 0) + return; + + TI_GPIO_LOCK(sc); + reg = ti_gpio_intr_reg(sc, irq); + if (reg != 0) { + val = ti_gpio_read_4(sc, reg); + val |= TI_GPIO_MASK(irq); + ti_gpio_write_4(sc, reg, val); + ti_gpio_intr_set(sc, TI_GPIO_MASK(irq)); + } + TI_GPIO_UNLOCK(sc); +} + +static void +ti_gpio_mask_irq(void *source) +{ + struct ti_gpio_mask_arg *arg = source; + + ti_gpio_mask_irq_internal(arg->softc, arg->pin); } static void ti_gpio_unmask_irq(void *source) { - int irq; - uint32_t reg, val; + struct ti_gpio_mask_arg *arg = source; - irq = (int)source; - if (ti_gpio_valid_pin(ti_gpio_sc, irq) != 0) - return; - - TI_GPIO_LOCK(ti_gpio_sc); - reg = ti_gpio_intr_reg(ti_gpio_sc, irq); - if (reg != 0) { - val = ti_gpio_read_4(ti_gpio_sc, TI_GPIO_BANK(irq), reg); - val |= TI_GPIO_MASK(irq); - ti_gpio_write_4(ti_gpio_sc, TI_GPIO_BANK(irq), reg, val); - ti_gpio_intr_set(ti_gpio_sc, TI_GPIO_BANK(irq), - TI_GPIO_MASK(irq)); - } - TI_GPIO_UNLOCK(ti_gpio_sc); + ti_gpio_unmask_irq_internal(arg->softc, arg->pin); } static int @@ -1000,15 +897,15 @@ ti_gpio_config_intr(device_t dev, int irq, enum intr_trigger trig, reg = ti_gpio_intr_reg(sc, irq); if (reg != 0) { /* Apply the new settings. */ - val = ti_gpio_read_4(sc, TI_GPIO_BANK(irq), reg); + val = ti_gpio_read_4(sc, reg); val |= TI_GPIO_MASK(irq); - ti_gpio_write_4(sc, TI_GPIO_BANK(irq), reg, val); + ti_gpio_write_4(sc, reg, val); } if (reg != oldreg && oldreg != 0) { /* Remove the old settings. */ - val = ti_gpio_read_4(sc, TI_GPIO_BANK(irq), oldreg); + val = ti_gpio_read_4(sc, oldreg); val &= ~TI_GPIO_MASK(irq); - ti_gpio_write_4(sc, TI_GPIO_BANK(irq), oldreg, val); + ti_gpio_write_4(sc, oldreg, val); } TI_GPIO_UNLOCK(sc); @@ -1031,7 +928,9 @@ ti_gpio_setup_intr(device_t dev, device_t child, struct resource *ires, event = sc->sc_events[pin]; if (event == NULL) { - error = intr_event_create(&event, (void *)(uintptr_t)pin, 0, + sc->sc_mask_args[pin].softc = sc; + sc->sc_mask_args[pin].pin = pin; + error = intr_event_create(&event, (void *)&sc->sc_mask_args[pin], 0, pin, ti_gpio_mask_irq, ti_gpio_unmask_irq, NULL, NULL, "gpio%d pin%d:", device_get_unit(dev), pin); if (error != 0) diff --git a/sys/arm/ti/ti_gpio.h b/sys/arm/ti/ti_gpio.h index a2c0bfbafc4e..6bd53c830d3a 100644 --- a/sys/arm/ti/ti_gpio.h +++ b/sys/arm/ti/ti_gpio.h @@ -39,6 +39,11 @@ */ #define MAX_GPIO_INTRS 8 +struct ti_gpio_mask_arg { + void *softc; + int pin; +}; + /** * Structure that stores the driver context. * @@ -52,22 +57,21 @@ struct ti_gpio_softc { enum intr_trigger *sc_irq_trigger; enum intr_polarity *sc_irq_polarity; + int sc_bank; int sc_maxpin; struct mtx sc_mtx; - /* - * The memory resource(s) for the PRCM register set, when the device is - * created the caller can assign up to 6 memory regions depending on - * the SoC type. - */ - struct resource *sc_mem_res[MAX_GPIO_BANKS]; - struct resource *sc_irq_res[MAX_GPIO_INTRS]; + int sc_mem_rid; + struct resource *sc_mem_res; + int sc_irq_rid; + struct resource *sc_irq_res; /* Interrupt events. */ struct intr_event **sc_events; + struct ti_gpio_mask_arg *sc_mask_args; /* The handle for the register IRQ handlers. */ - void *sc_irq_hdl[MAX_GPIO_INTRS]; + void *sc_irq_hdl; }; #endif /* TI_GPIO_H */ diff --git a/sys/arm/ti/ti_hwmods.c b/sys/arm/ti/ti_hwmods.c new file mode 100644 index 000000000000..4da5f742496e --- /dev/null +++ b/sys/arm/ti/ti_hwmods.c @@ -0,0 +1,170 @@ +/*- + * Copyright (c) 2015 Oleksandr Tymoshenko + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include + +#include +#include + +struct hwmod { + const char *name; + int clock_id; +}; + +struct hwmod ti_hwmods[] = { + {"i2c1", I2C1_CLK}, + {"i2c2", I2C2_CLK}, + {"i2c3", I2C3_CLK}, + {"i2c4", I2C4_CLK}, + {"i2c5", I2C5_CLK}, + + {"gpio1", GPIO1_CLK}, + {"gpio2", GPIO2_CLK}, + {"gpio3", GPIO3_CLK}, + {"gpio4", GPIO4_CLK}, + {"gpio5", GPIO5_CLK}, + {"gpio6", GPIO6_CLK}, + {"gpio7", GPIO7_CLK}, + + {"mmc1", MMC1_CLK}, + {"mmc2", MMC2_CLK}, + {"mmc3", MMC3_CLK}, + {"mmc4", MMC4_CLK}, + {"mmc5", MMC5_CLK}, + {"mmc6", MMC6_CLK}, + + {"epwmss0", PWMSS0_CLK}, + {"epwmss1", PWMSS1_CLK}, + {"epwmss2", PWMSS2_CLK}, + + {"timer1", TIMER1_CLK}, + {"timer2", TIMER2_CLK}, + {"timer3", TIMER3_CLK}, + {"timer4", TIMER4_CLK}, + {"timer5", TIMER5_CLK}, + {"timer6", TIMER6_CLK}, + {"timer7", TIMER7_CLK}, + + {"uart1", UART1_CLK}, + {"uart2", UART2_CLK}, + {"uart3", UART3_CLK}, + {"uart4", UART4_CLK}, + {"uart5", UART5_CLK}, + {"uart6", UART6_CLK}, + {"uart7", UART7_CLK}, + + {NULL, 0} +}; + +clk_ident_t +ti_hwmods_get_clock(device_t dev) +{ + phandle_t node; + int len, l; + char *name; + char *buf; + int clk; + struct hwmod *hw; + + if ((node = ofw_bus_get_node(dev)) == 0) + return (INVALID_CLK_IDENT); + + if ((len = OF_getprop_alloc(node, "ti,hwmods", 1, (void**)&name)) <= 0) + return (INVALID_CLK_IDENT); + + buf = name; + + clk = INVALID_CLK_IDENT; + while ((len > 0) && (clk == INVALID_CLK_IDENT)) { + for (hw = ti_hwmods; hw->name != NULL; ++hw) { + if (strcmp(hw->name, name) == 0) { + clk = hw->clock_id; + break; + } + } + + /* Slide to the next sub-string. */ + l = strlen(name) + 1; + name += l; + len -= l; + } + + if (len > 0) + device_printf(dev, "WARNING: more then one ti,hwmod \n"); + + free(buf, M_OFWPROP); + return (clk); +} + +int ti_hwmods_contains(device_t dev, const char *hwmod) +{ + phandle_t node; + int len, l; + char *name; + char *buf; + int result; + + if ((node = ofw_bus_get_node(dev)) == 0) + return (0); + + if ((len = OF_getprop_alloc(node, "ti,hwmods", 1, (void**)&name)) <= 0) + return (0); + + buf = name; + + result = 0; + while (len > 0) { + if (strcmp(name, hwmod) == 0) { + result = 1; + break; + } + + /* Slide to the next sub-string. */ + l = strlen(name) + 1; + name += l; + len -= l; + } + + free(buf, M_OFWPROP); + + return (result); +} diff --git a/sys/arm/ti/ti_hwmods.h b/sys/arm/ti/ti_hwmods.h new file mode 100644 index 000000000000..dffe4380c01e --- /dev/null +++ b/sys/arm/ti/ti_hwmods.h @@ -0,0 +1,34 @@ +/*- + * Copyright (c) 2015 Oleksandr Tymoshenko + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * $FreeBSD$ + */ +#ifndef _TI_HWMODS_H_ +#define _TI_HWMODS_H_ + +clk_ident_t ti_hwmods_get_clock(device_t dev); +int ti_hwmods_contains(device_t dev, const char *hwmod); + +#endif /* _TI_HWMODS_H_ */ diff --git a/sys/arm/ti/ti_i2c.c b/sys/arm/ti/ti_i2c.c index ad688f30ca57..9f125069019d 100644 --- a/sys/arm/ti/ti_i2c.c +++ b/sys/arm/ti/ti_i2c.c @@ -67,6 +67,7 @@ __FBSDID("$FreeBSD$"); #include #include +#include #include #include @@ -81,7 +82,7 @@ __FBSDID("$FreeBSD$"); struct ti_i2c_softc { device_t sc_dev; - uint32_t device_id; + clk_ident_t clk_id; struct resource* sc_irq_res; struct resource* sc_mem_res; device_t sc_iicbus; @@ -693,7 +694,6 @@ ti_i2c_iicbus_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr) static int ti_i2c_activate(device_t dev) { - clk_ident_t clk; int err; struct ti_i2c_softc *sc; @@ -703,8 +703,7 @@ ti_i2c_activate(device_t dev) * 1. Enable the functional and interface clocks (see Section * 23.1.5.1.1.1.1). */ - clk = I2C0_CLK + sc->device_id; - err = ti_prcm_clk_enable(clk); + err = ti_prcm_clk_enable(sc->clk_id); if (err) return (err); @@ -727,7 +726,6 @@ static void ti_i2c_deactivate(device_t dev) { struct ti_i2c_softc *sc = device_get_softc(dev); - clk_ident_t clk; /* Disable the controller - cancel all transactions. */ ti_i2c_write_2(sc, I2C_REG_IRQENABLE_CLR, 0xffff); @@ -755,8 +753,7 @@ ti_i2c_deactivate(device_t dev) } /* Finally disable the functional and interface clocks. */ - clk = I2C0_CLK + sc->device_id; - ti_prcm_clk_disable(clk); + ti_prcm_clk_disable(sc->clk_id); } static int @@ -815,7 +812,7 @@ ti_i2c_probe(device_t dev) if (!ofw_bus_status_okay(dev)) return (ENXIO); - if (!ofw_bus_is_compatible(dev, "ti,i2c")) + if (!ofw_bus_is_compatible(dev, "ti,omap4-i2c")) return (ENXIO); device_set_desc(dev, "TI I2C Controller"); @@ -837,9 +834,10 @@ ti_i2c_attach(device_t dev) /* Get the i2c device id from FDT. */ node = ofw_bus_get_node(dev); - if ((OF_getencprop(node, "i2c-device-id", &sc->device_id, - sizeof(sc->device_id))) <= 0) { - device_printf(dev, "missing i2c-device-id attribute in FDT\n"); + /* i2c ti,hwmods bindings is special: it start with index 1 */ + sc->clk_id = ti_hwmods_get_clock(dev); + if (sc->clk_id == INVALID_CLK_IDENT) { + device_printf(dev, "failed to get device id using ti,hwmod\n"); return (ENXIO); } @@ -953,6 +951,17 @@ static device_method_t ti_i2c_methods[] = { DEVMETHOD(device_attach, ti_i2c_attach), DEVMETHOD(device_detach, ti_i2c_detach), + /* Bus interface */ + DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), + DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), + DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource), + DEVMETHOD(bus_release_resource, bus_generic_release_resource), + DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), + DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), + DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource), + DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), + DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), + /* OFW methods */ DEVMETHOD(ofw_bus_get_node, ti_i2c_get_node), diff --git a/sys/arm/ti/ti_mbox.c b/sys/arm/ti/ti_mbox.c index 1f8cde1a13ba..9729ed40fc4a 100644 --- a/sys/arm/ti/ti_mbox.c +++ b/sys/arm/ti/ti_mbox.c @@ -121,7 +121,7 @@ ti_mbox_probe(device_t dev) if (!ofw_bus_status_okay(dev)) return (ENXIO); - if (ofw_bus_is_compatible(dev, "ti,system-mbox")) { + if (ofw_bus_is_compatible(dev, "ti,omap4-mailbox")) { device_set_desc(dev, "TI System Mailbox"); return (BUS_PROBE_DEFAULT); } diff --git a/sys/arm/ti/ti_pinmux.c b/sys/arm/ti/ti_pinmux.c new file mode 100644 index 000000000000..ff4743df8db2 --- /dev/null +++ b/sys/arm/ti/ti_pinmux.c @@ -0,0 +1,445 @@ +/* + * Copyright (c) 2010 + * Ben Gray . + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Ben Gray. + * 4. The name of the company nor the name of the author may be used to + * endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY BEN GRAY ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL BEN GRAY BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * Exposes pinmux module to pinctrl-compatible interface + */ +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "ti_pinmux.h" + +struct pincfg { + uint32_t reg; + uint32_t conf; +}; + +static struct resource_spec ti_pinmux_res_spec[] = { + { SYS_RES_MEMORY, 0, RF_ACTIVE }, /* Control memory window */ + { -1, 0 } +}; + +static struct ti_pinmux_softc *ti_pinmux_sc; + +#define ti_pinmux_read_2(sc, reg) \ + bus_space_read_2((sc)->sc_bst, (sc)->sc_bsh, (reg)) +#define ti_pinmux_write_2(sc, reg, val) \ + bus_space_write_2((sc)->sc_bst, (sc)->sc_bsh, (reg), (val)) +#define ti_pinmux_read_4(sc, reg) \ + bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg)) +#define ti_pinmux_write_4(sc, reg, val) \ + bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val)) + + +/** + * ti_padconf_devmap - Array of pins, should be defined one per SoC + * + * This array is typically defined in one of the targeted *_scm_pinumx.c + * files and is specific to the given SoC platform. Each entry in the array + * corresponds to an individual pin. + */ +extern const struct ti_pinmux_device ti_pinmux_dev; + + +/** + * ti_pinmux_padconf_from_name - searches the list of pads and returns entry + * with matching ball name. + * @ballname: the name of the ball + * + * RETURNS: + * A pointer to the matching padconf or NULL if the ball wasn't found. + */ +static const struct ti_pinmux_padconf* +ti_pinmux_padconf_from_name(const char *ballname) +{ + const struct ti_pinmux_padconf *padconf; + + padconf = ti_pinmux_dev.padconf; + while (padconf->ballname != NULL) { + if (strcmp(ballname, padconf->ballname) == 0) + return(padconf); + padconf++; + } + + return (NULL); +} + +/** + * ti_pinmux_padconf_set_internal - sets the muxmode and state for a pad/pin + * @padconf: pointer to the pad structure + * @muxmode: the name of the mode to use for the pin, i.e. "uart1_rx" + * @state: the state to put the pad/pin in, i.e. PADCONF_PIN_??? + * + * + * LOCKING: + * Internally locks it's own context. + * + * RETURNS: + * 0 on success. + * EINVAL if pin requested is outside valid range or already in use. + */ +static int +ti_pinmux_padconf_set_internal(struct ti_pinmux_softc *sc, + const struct ti_pinmux_padconf *padconf, + const char *muxmode, unsigned int state) +{ + unsigned int mode; + uint16_t reg_val; + + /* populate the new value for the PADCONF register */ + reg_val = (uint16_t)(state & ti_pinmux_dev.padconf_sate_mask); + + /* find the new mode requested */ + for (mode = 0; mode < 8; mode++) { + if ((padconf->muxmodes[mode] != NULL) && + (strcmp(padconf->muxmodes[mode], muxmode) == 0)) { + break; + } + } + + /* couldn't find the mux mode */ + if (mode >= 8) { + printf("Invalid mode \"%s\"\n", muxmode); + return (EINVAL); + } + + /* set the mux mode */ + reg_val |= (uint16_t)(mode & ti_pinmux_dev.padconf_muxmode_mask); + + if (bootverbose) + device_printf(sc->sc_dev, "setting internal %x for %s\n", + reg_val, muxmode); + /* write the register value (16-bit writes) */ + ti_pinmux_write_2(sc, padconf->reg_off, reg_val); + + return (0); +} + +/** + * ti_pinmux_padconf_set - sets the muxmode and state for a pad/pin + * @padname: the name of the pad, i.e. "c12" + * @muxmode: the name of the mode to use for the pin, i.e. "uart1_rx" + * @state: the state to put the pad/pin in, i.e. PADCONF_PIN_??? + * + * + * LOCKING: + * Internally locks it's own context. + * + * RETURNS: + * 0 on success. + * EINVAL if pin requested is outside valid range or already in use. + */ +int +ti_pinmux_padconf_set(const char *padname, const char *muxmode, unsigned int state) +{ + const struct ti_pinmux_padconf *padconf; + + if (!ti_pinmux_sc) + return (ENXIO); + + /* find the pin in the devmap */ + padconf = ti_pinmux_padconf_from_name(padname); + if (padconf == NULL) + return (EINVAL); + + return (ti_pinmux_padconf_set_internal(ti_pinmux_sc, padconf, muxmode, state)); +} + +/** + * ti_pinmux_padconf_get - gets the muxmode and state for a pad/pin + * @padname: the name of the pad, i.e. "c12" + * @muxmode: upon return will contain the name of the muxmode of the pin + * @state: upon return will contain the state of the pad/pin + * + * + * LOCKING: + * Internally locks it's own context. + * + * RETURNS: + * 0 on success. + * EINVAL if pin requested is outside valid range or already in use. + */ +int +ti_pinmux_padconf_get(const char *padname, const char **muxmode, + unsigned int *state) +{ + const struct ti_pinmux_padconf *padconf; + uint16_t reg_val; + + if (!ti_pinmux_sc) + return (ENXIO); + + /* find the pin in the devmap */ + padconf = ti_pinmux_padconf_from_name(padname); + if (padconf == NULL) + return (EINVAL); + + /* read the register value (16-bit reads) */ + reg_val = ti_pinmux_read_2(ti_pinmux_sc, padconf->reg_off); + + /* save the state */ + if (state) + *state = (reg_val & ti_pinmux_dev.padconf_sate_mask); + + /* save the mode */ + if (muxmode) + *muxmode = padconf->muxmodes[(reg_val & ti_pinmux_dev.padconf_muxmode_mask)]; + + return (0); +} + +/** + * ti_pinmux_padconf_set_gpiomode - converts a pad to GPIO mode. + * @gpio: the GPIO pin number (0-195) + * @state: the state to put the pad/pin in, i.e. PADCONF_PIN_??? + * + * + * + * LOCKING: + * Internally locks it's own context. + * + * RETURNS: + * 0 on success. + * EINVAL if pin requested is outside valid range or already in use. + */ +int +ti_pinmux_padconf_set_gpiomode(uint32_t gpio, unsigned int state) +{ + const struct ti_pinmux_padconf *padconf; + uint16_t reg_val; + + if (!ti_pinmux_sc) + return (ENXIO); + + /* find the gpio pin in the padconf array */ + padconf = ti_pinmux_dev.padconf; + while (padconf->ballname != NULL) { + if (padconf->gpio_pin == gpio) + break; + padconf++; + } + if (padconf->ballname == NULL) + return (EINVAL); + + /* populate the new value for the PADCONF register */ + reg_val = (uint16_t)(state & ti_pinmux_dev.padconf_sate_mask); + + /* set the mux mode */ + reg_val |= (uint16_t)(padconf->gpio_mode & ti_pinmux_dev.padconf_muxmode_mask); + + /* write the register value (16-bit writes) */ + ti_pinmux_write_2(ti_pinmux_sc, padconf->reg_off, reg_val); + + return (0); +} + +/** + * ti_pinmux_padconf_get_gpiomode - gets the current GPIO mode of the pin + * @gpio: the GPIO pin number (0-195) + * @state: upon return will contain the state + * + * + * + * LOCKING: + * Internally locks it's own context. + * + * RETURNS: + * 0 on success. + * EINVAL if pin requested is outside valid range or not configured as GPIO. + */ +int +ti_pinmux_padconf_get_gpiomode(uint32_t gpio, unsigned int *state) +{ + const struct ti_pinmux_padconf *padconf; + uint16_t reg_val; + + if (!ti_pinmux_sc) + return (ENXIO); + + /* find the gpio pin in the padconf array */ + padconf = ti_pinmux_dev.padconf; + while (padconf->ballname != NULL) { + if (padconf->gpio_pin == gpio) + break; + padconf++; + } + if (padconf->ballname == NULL) + return (EINVAL); + + /* read the current register settings */ + reg_val = ti_pinmux_read_2(ti_pinmux_sc, padconf->reg_off); + + /* check to make sure the pins is configured as GPIO in the first state */ + if ((reg_val & ti_pinmux_dev.padconf_muxmode_mask) != padconf->gpio_mode) + return (EINVAL); + + /* read and store the reset of the state, i.e. pull-up, pull-down, etc */ + if (state) + *state = (reg_val & ti_pinmux_dev.padconf_sate_mask); + + return (0); +} + +static int +ti_pinmux_configure_pins(device_t dev, phandle_t cfgxref) +{ + struct pincfg *cfgtuples, *cfg; + phandle_t cfgnode; + int i, ntuples; + static struct ti_pinmux_softc *sc; + + sc = device_get_softc(dev); + cfgnode = OF_node_from_xref(cfgxref); + ntuples = OF_getencprop_alloc(cfgnode, "pinctrl-single,pins", sizeof(*cfgtuples), + (void **)&cfgtuples); + + if (ntuples < 0) + return (ENOENT); + + if (ntuples == 0) + return (0); /* Empty property is not an error. */ + + for (i = 0, cfg = cfgtuples; i < ntuples; i++, cfg++) { + if (bootverbose) { + char name[32]; + OF_getprop(cfgnode, "name", &name, sizeof(name)); + printf("%16s: muxreg 0x%04x muxval 0x%02x\n", + name, cfg->reg, cfg->conf); + } + + /* write the register value (16-bit writes) */ + ti_pinmux_write_2(sc, cfg->reg, cfg->conf); + } + + free(cfgtuples, M_OFWPROP); + + return (0); +} + +/* + * Device part of OMAP SCM driver + */ + +static int +ti_pinmux_probe(device_t dev) +{ + if (!ofw_bus_status_okay(dev)) + return (ENXIO); + + if (!ofw_bus_is_compatible(dev, "pinctrl-single")) + return (ENXIO); + + if (ti_pinmux_sc) { + printf("%s: multiple pinctrl modules in device tree data, ignoring\n", + __func__); + return (EEXIST); + } + + device_set_desc(dev, "TI Pinmux Module"); + return (BUS_PROBE_DEFAULT); +} + +/** + * ti_pinmux_attach - attaches the pinmux to the simplebus + * @dev: new device + * + * RETURNS + * Zero on sucess or ENXIO if an error occuried. + */ +static int +ti_pinmux_attach(device_t dev) +{ + struct ti_pinmux_softc *sc = device_get_softc(dev); + +#if 0 + if (ti_pinmux_sc) + return (ENXIO); +#endif + + sc->sc_dev = dev; + + if (bus_alloc_resources(dev, ti_pinmux_res_spec, sc->sc_res)) { + device_printf(dev, "could not allocate resources\n"); + return (ENXIO); + } + + sc->sc_bst = rman_get_bustag(sc->sc_res[0]); + sc->sc_bsh = rman_get_bushandle(sc->sc_res[0]); + + if (ti_pinmux_sc == NULL) + ti_pinmux_sc = sc; + + fdt_pinctrl_register(dev, "pinctrl-single,pins"); + fdt_pinctrl_configure_tree(dev); + + return (0); +} + +static device_method_t ti_pinmux_methods[] = { + DEVMETHOD(device_probe, ti_pinmux_probe), + DEVMETHOD(device_attach, ti_pinmux_attach), + + /* fdt_pinctrl interface */ + DEVMETHOD(fdt_pinctrl_configure, ti_pinmux_configure_pins), + { 0, 0 } +}; + +static driver_t ti_pinmux_driver = { + "ti_pinmux", + ti_pinmux_methods, + sizeof(struct ti_pinmux_softc), +}; + +static devclass_t ti_pinmux_devclass; + +DRIVER_MODULE(ti_pinmux, simplebus, ti_pinmux_driver, ti_pinmux_devclass, 0, 0); diff --git a/sys/arm/ti/ti_pinmux.h b/sys/arm/ti/ti_pinmux.h new file mode 100644 index 000000000000..c299c494593b --- /dev/null +++ b/sys/arm/ti/ti_pinmux.h @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2010 + * Ben Gray . + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Ben Gray. + * 4. The name of the company nor the name of the author may be used to + * endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY BEN GRAY ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL BEN GRAY BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * $FreeBSD$ + */ + + +/** + * Functions to configure the PIN multiplexing on the chip. + * + * This is different from the GPIO module in that it is used to configure the + * pins between modules not just GPIO input output. + * + */ +#ifndef _TI_PINMUX_H_ +#define _TI_PINMUX_H_ + +struct ti_pinmux_padconf { + uint16_t reg_off; + uint16_t gpio_pin; + uint16_t gpio_mode; + const char *ballname; + const char *muxmodes[8]; +}; + +struct ti_pinmux_padstate { + const char *state; + uint16_t reg; +}; + +struct ti_pinmux_device { + uint16_t padconf_muxmode_mask; + uint16_t padconf_sate_mask; + const struct ti_pinmux_padstate *padstate; + const struct ti_pinmux_padconf *padconf; +}; + +struct ti_pinmux_softc { + device_t sc_dev; + struct resource * sc_res[4]; + bus_space_tag_t sc_bst; + bus_space_handle_t sc_bsh; +}; + +int ti_pinmux_padconf_set(const char *padname, const char *muxmode, + unsigned int state); +int ti_pinmux_padconf_get(const char *padname, const char **muxmode, + unsigned int *state); +int ti_pinmux_padconf_set_gpiomode(uint32_t gpio, unsigned int state); +int ti_pinmux_padconf_get_gpiomode(uint32_t gpio, unsigned int *state); + +#endif /* _TI_SCM_H_ */ diff --git a/sys/arm/ti/ti_prcm.h b/sys/arm/ti/ti_prcm.h index 5cbdc5f0d6b6..eaea990ae01b 100644 --- a/sys/arm/ti/ti_prcm.h +++ b/sys/arm/ti/ti_prcm.h @@ -46,6 +46,8 @@ typedef enum { + INVALID_CLK_IDENT = 0, + /* System clocks, typically you can only call ti_prcm_clk_get_source_freq() * on these clocks as they are enabled by default. */ @@ -55,19 +57,19 @@ typedef enum { MPU_CLK = 20, /* MMC modules */ - MMC0_CLK = 100, - MMC1_CLK, + MMC1_CLK = 100, MMC2_CLK, MMC3_CLK, MMC4_CLK, MMC5_CLK, + MMC6_CLK, /* I2C modules */ - I2C0_CLK = 200, - I2C1_CLK, + I2C1_CLK = 200, I2C2_CLK, I2C3_CLK, I2C4_CLK, + I2C5_CLK, /* USB module(s) */ USBTLL_CLK = 300, @@ -81,8 +83,7 @@ typedef enum { USBP2_HSIC_CLK, /* UART modules */ - UART0_CLK = 400, - UART1_CLK, + UART1_CLK = 400, UART2_CLK, UART3_CLK, UART4_CLK, @@ -90,20 +91,21 @@ typedef enum { UART6_CLK, UART7_CLK, UART8_CLK, + UART9_CLK, /* General purpose timer modules */ - GPTIMER1_CLK = 500, - GPTIMER2_CLK, - GPTIMER3_CLK, - GPTIMER4_CLK, - GPTIMER5_CLK, - GPTIMER6_CLK, - GPTIMER7_CLK, - GPTIMER8_CLK, - GPTIMER9_CLK, - GPTIMER10_CLK, - GPTIMER11_CLK, - GPTIMER12_CLK, + TIMER1_CLK = 500, + TIMER2_CLK, + TIMER3_CLK, + TIMER4_CLK, + TIMER5_CLK, + TIMER6_CLK, + TIMER7_CLK, + TIMER8_CLK, + TIMER9_CLK, + TIMER10_CLK, + TIMER11_CLK, + TIMER12_CLK, /* McBSP module(s) */ MCBSP1_CLK = 600, @@ -113,27 +115,17 @@ typedef enum { MCBSP5_CLK, /* General purpose I/O modules */ - GPIO0_CLK = 700, - GPIO1_CLK, + GPIO1_CLK = 700, GPIO2_CLK, GPIO3_CLK, GPIO4_CLK, GPIO5_CLK, GPIO6_CLK, + GPIO7_CLK, /* sDMA module */ SDMA_CLK = 800, - /* DMTimer modules */ - DMTIMER0_CLK = 900, - DMTIMER1_CLK, - DMTIMER2_CLK, - DMTIMER3_CLK, - DMTIMER4_CLK, - DMTIMER5_CLK, - DMTIMER6_CLK, - DMTIMER7_CLK, - /* CPSW modules */ CPSW_CLK = 1000, @@ -166,9 +158,6 @@ typedef enum { /* RTC module */ RTC_CLK = 1900, - - INVALID_CLK_IDENT - } clk_ident_t; /* diff --git a/sys/arm/ti/ti_pruss.c b/sys/arm/ti/ti_pruss.c index 805476b1afaa..94cea60a7fa8 100644 --- a/sys/arm/ti/ti_pruss.c +++ b/sys/arm/ti/ti_pruss.c @@ -70,7 +70,8 @@ static void ti_pruss_kq_read_detach(struct knote *); static int ti_pruss_kq_read_event(struct knote *, long); static d_kqfilter_t ti_pruss_kqfilter; -#define TI_PRUSS_IRQS 8 +#define TI_PRUSS_IRQS 8 + struct ti_pruss_softc { struct mtx sc_mtx; struct resource *sc_mem_res; @@ -119,6 +120,7 @@ static struct resource_spec ti_pruss_irq_spec[] = { { SYS_RES_IRQ, 7, RF_ACTIVE }, { -1, 0, 0 } }; +CTASSERT(TI_PRUSS_IRQS == nitems(ti_pruss_irq_spec) - 1); static struct ti_pruss_irq_arg { int irq; @@ -166,6 +168,7 @@ ti_pruss_attach(device_t dev) sc = device_get_softc(dev); rid = 0; mtx_init(&sc->sc_mtx, "TI PRUSS", NULL, MTX_DEF); + knlist_init_mtx(&sc->sc_selinfo.si_note, &sc->sc_mtx); sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); if (sc->sc_mem_res == NULL) { @@ -219,6 +222,9 @@ ti_pruss_detach(device_t dev) rman_get_rid(sc->sc_irq_res[i]), sc->sc_irq_res[i]); } + knlist_clear(&sc->sc_selinfo.si_note, 0); + knlist_destroy(&sc->sc_selinfo.si_note); + mtx_destroy(&sc->sc_mtx); if (sc->sc_mem_res) bus_release_resource(dev, SYS_RES_MEMORY, rman_get_rid(sc->sc_mem_res), sc->sc_mem_res); @@ -231,13 +237,23 @@ ti_pruss_detach(device_t dev) static void ti_pruss_intr(void *arg) { - struct ti_pruss_irq_arg *iap; - struct ti_pruss_softc *sc; + int val; + struct ti_pruss_irq_arg *iap = arg; + struct ti_pruss_softc *sc = iap->sc; + /* + * Interrupts pr1_host_intr[0:7] are mapped to + * Host-2 to Host-9 of PRU-ICSS IRQ-controller. + */ + const int pru_int = iap->irq + 2; + const int pru_int_mask = (1 << pru_int); - iap = arg; - sc = iap->sc; - DPRINTF("interrupt %p", sc); - KNOTE_UNLOCKED(&sc->sc_selinfo.si_note, iap->irq); + val = ti_pruss_reg_read(sc, PRUSS_AM33XX_INTC + PRUSS_INTC_HIER); + DPRINTF("interrupt %p, %d", sc, pru_int); + if (!(val & pru_int_mask)) + return; + ti_pruss_reg_write(sc, PRUSS_AM33XX_INTC + PRUSS_INTC_HIDISR, + pru_int); + KNOTE_UNLOCKED(&sc->sc_selinfo.si_note, pru_int); } static int diff --git a/sys/arm/ti/ti_pruss.h b/sys/arm/ti/ti_pruss.h index 9b05addf60ca..4eea12e4f7d2 100644 --- a/sys/arm/ti/ti_pruss.h +++ b/sys/arm/ti/ti_pruss.h @@ -33,4 +33,8 @@ #define PRUSS_AM33XX_REV 0x4e82A900 #define PRUSS_AM33XX_INTC 0x20000 +#define PRUSS_INTC_HIER 0x1500 +#define PRUSS_INTC_HIDISR 0x0038 +#define PRUSS_INTC_HIPIR_BASE 0x0900 + #endif /* _TI_PRUSS_H_ */ diff --git a/sys/arm/ti/ti_scm.c b/sys/arm/ti/ti_scm.c index 4c20d96ce786..d22e1ec2070c 100644 --- a/sys/arm/ti/ti_scm.c +++ b/sys/arm/ti/ti_scm.c @@ -64,6 +64,7 @@ __FBSDID("$FreeBSD$"); #include #include +#include #include #include #include @@ -77,354 +78,29 @@ static struct resource_spec ti_scm_res_spec[] = { static struct ti_scm_softc *ti_scm_sc; -#define ti_scm_read_2(sc, reg) \ - bus_space_read_2((sc)->sc_bst, (sc)->sc_bsh, (reg)) -#define ti_scm_write_2(sc, reg, val) \ - bus_space_write_2((sc)->sc_bst, (sc)->sc_bsh, (reg), (val)) #define ti_scm_read_4(sc, reg) \ bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg)) #define ti_scm_write_4(sc, reg, val) \ bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val)) - -/** - * ti_padconf_devmap - Array of pins, should be defined one per SoC - * - * This array is typically defined in one of the targeted *_scm_pinumx.c - * files and is specific to the given SoC platform. Each entry in the array - * corresponds to an individual pin. - */ -extern const struct ti_scm_device ti_scm_dev; - - -/** - * ti_scm_padconf_from_name - searches the list of pads and returns entry - * with matching ball name. - * @ballname: the name of the ball - * - * RETURNS: - * A pointer to the matching padconf or NULL if the ball wasn't found. - */ -static const struct ti_scm_padconf* -ti_scm_padconf_from_name(const char *ballname) -{ - const struct ti_scm_padconf *padconf; - - padconf = ti_scm_dev.padconf; - while (padconf->ballname != NULL) { - if (strcmp(ballname, padconf->ballname) == 0) - return(padconf); - padconf++; - } - - return (NULL); -} - -/** - * ti_scm_padconf_set_internal - sets the muxmode and state for a pad/pin - * @padconf: pointer to the pad structure - * @muxmode: the name of the mode to use for the pin, i.e. "uart1_rx" - * @state: the state to put the pad/pin in, i.e. PADCONF_PIN_??? - * - * - * LOCKING: - * Internally locks it's own context. - * - * RETURNS: - * 0 on success. - * EINVAL if pin requested is outside valid range or already in use. - */ -static int -ti_scm_padconf_set_internal(struct ti_scm_softc *sc, - const struct ti_scm_padconf *padconf, - const char *muxmode, unsigned int state) -{ - unsigned int mode; - uint16_t reg_val; - - /* populate the new value for the PADCONF register */ - reg_val = (uint16_t)(state & ti_scm_dev.padconf_sate_mask); - - /* find the new mode requested */ - for (mode = 0; mode < 8; mode++) { - if ((padconf->muxmodes[mode] != NULL) && - (strcmp(padconf->muxmodes[mode], muxmode) == 0)) { - break; - } - } - - /* couldn't find the mux mode */ - if (mode >= 8) { - printf("Invalid mode \"%s\"\n", muxmode); - return (EINVAL); - } - - /* set the mux mode */ - reg_val |= (uint16_t)(mode & ti_scm_dev.padconf_muxmode_mask); - - if (bootverbose) - device_printf(sc->sc_dev, "setting internal %x for %s\n", - reg_val, muxmode); - /* write the register value (16-bit writes) */ - ti_scm_write_2(sc, padconf->reg_off, reg_val); - - return (0); -} - -/** - * ti_scm_padconf_set - sets the muxmode and state for a pad/pin - * @padname: the name of the pad, i.e. "c12" - * @muxmode: the name of the mode to use for the pin, i.e. "uart1_rx" - * @state: the state to put the pad/pin in, i.e. PADCONF_PIN_??? - * - * - * LOCKING: - * Internally locks it's own context. - * - * RETURNS: - * 0 on success. - * EINVAL if pin requested is outside valid range or already in use. - */ -int -ti_scm_padconf_set(const char *padname, const char *muxmode, unsigned int state) -{ - const struct ti_scm_padconf *padconf; - - if (!ti_scm_sc) - return (ENXIO); - - /* find the pin in the devmap */ - padconf = ti_scm_padconf_from_name(padname); - if (padconf == NULL) - return (EINVAL); - - return (ti_scm_padconf_set_internal(ti_scm_sc, padconf, muxmode, state)); -} - -/** - * ti_scm_padconf_get - gets the muxmode and state for a pad/pin - * @padname: the name of the pad, i.e. "c12" - * @muxmode: upon return will contain the name of the muxmode of the pin - * @state: upon return will contain the state of the pad/pin - * - * - * LOCKING: - * Internally locks it's own context. - * - * RETURNS: - * 0 on success. - * EINVAL if pin requested is outside valid range or already in use. - */ -int -ti_scm_padconf_get(const char *padname, const char **muxmode, - unsigned int *state) -{ - const struct ti_scm_padconf *padconf; - uint16_t reg_val; - - if (!ti_scm_sc) - return (ENXIO); - - /* find the pin in the devmap */ - padconf = ti_scm_padconf_from_name(padname); - if (padconf == NULL) - return (EINVAL); - - /* read the register value (16-bit reads) */ - reg_val = ti_scm_read_2(ti_scm_sc, padconf->reg_off); - - /* save the state */ - if (state) - *state = (reg_val & ti_scm_dev.padconf_sate_mask); - - /* save the mode */ - if (muxmode) - *muxmode = padconf->muxmodes[(reg_val & ti_scm_dev.padconf_muxmode_mask)]; - - return (0); -} - -/** - * ti_scm_padconf_set_gpiomode - converts a pad to GPIO mode. - * @gpio: the GPIO pin number (0-195) - * @state: the state to put the pad/pin in, i.e. PADCONF_PIN_??? - * - * - * - * LOCKING: - * Internally locks it's own context. - * - * RETURNS: - * 0 on success. - * EINVAL if pin requested is outside valid range or already in use. - */ -int -ti_scm_padconf_set_gpiomode(uint32_t gpio, unsigned int state) -{ - const struct ti_scm_padconf *padconf; - uint16_t reg_val; - - if (!ti_scm_sc) - return (ENXIO); - - /* find the gpio pin in the padconf array */ - padconf = ti_scm_dev.padconf; - while (padconf->ballname != NULL) { - if (padconf->gpio_pin == gpio) - break; - padconf++; - } - if (padconf->ballname == NULL) - return (EINVAL); - - /* populate the new value for the PADCONF register */ - reg_val = (uint16_t)(state & ti_scm_dev.padconf_sate_mask); - - /* set the mux mode */ - reg_val |= (uint16_t)(padconf->gpio_mode & ti_scm_dev.padconf_muxmode_mask); - - /* write the register value (16-bit writes) */ - ti_scm_write_2(ti_scm_sc, padconf->reg_off, reg_val); - - return (0); -} - -/** - * ti_scm_padconf_get_gpiomode - gets the current GPIO mode of the pin - * @gpio: the GPIO pin number (0-195) - * @state: upon return will contain the state - * - * - * - * LOCKING: - * Internally locks it's own context. - * - * RETURNS: - * 0 on success. - * EINVAL if pin requested is outside valid range or not configured as GPIO. - */ -int -ti_scm_padconf_get_gpiomode(uint32_t gpio, unsigned int *state) -{ - const struct ti_scm_padconf *padconf; - uint16_t reg_val; - - if (!ti_scm_sc) - return (ENXIO); - - /* find the gpio pin in the padconf array */ - padconf = ti_scm_dev.padconf; - while (padconf->ballname != NULL) { - if (padconf->gpio_pin == gpio) - break; - padconf++; - } - if (padconf->ballname == NULL) - return (EINVAL); - - /* read the current register settings */ - reg_val = ti_scm_read_2(ti_scm_sc, padconf->reg_off); - - /* check to make sure the pins is configured as GPIO in the first state */ - if ((reg_val & ti_scm_dev.padconf_muxmode_mask) != padconf->gpio_mode) - return (EINVAL); - - /* read and store the reset of the state, i.e. pull-up, pull-down, etc */ - if (state) - *state = (reg_val & ti_scm_dev.padconf_sate_mask); - - return (0); -} - -/** - * ti_scm_padconf_init_from_hints - processes the hints for padconf - * @sc: the driver soft context - * - * - * - * LOCKING: - * Internally locks it's own context. - * - * RETURNS: - * 0 on success. - * EINVAL if pin requested is outside valid range or already in use. - */ -static int -ti_scm_padconf_init_from_fdt(struct ti_scm_softc *sc) -{ - const struct ti_scm_padconf *padconf; - const struct ti_scm_padstate *padstates; - int err; - phandle_t node; - int len; - char *fdt_pad_config; - int i; - char *padname, *muxname, *padstate; - - node = ofw_bus_get_node(sc->sc_dev); - len = OF_getproplen(node, "scm-pad-config"); - OF_getprop_alloc(node, "scm-pad-config", 1, (void **)&fdt_pad_config); - - i = len; - while (i > 0) { - padname = fdt_pad_config; - fdt_pad_config += strlen(padname) + 1; - i -= strlen(padname) + 1; - if (i <= 0) - break; - - muxname = fdt_pad_config; - fdt_pad_config += strlen(muxname) + 1; - i -= strlen(muxname) + 1; - if (i <= 0) - break; - - padstate = fdt_pad_config; - fdt_pad_config += strlen(padstate) + 1; - i -= strlen(padstate) + 1; - if (i < 0) - break; - - padconf = ti_scm_dev.padconf; - - while (padconf->ballname != NULL) { - if (strcmp(padconf->ballname, padname) == 0) { - padstates = ti_scm_dev.padstate; - err = 1; - while (padstates->state != NULL) { - if (strcmp(padstates->state, padstate) == 0) { - err = ti_scm_padconf_set_internal(sc, - padconf, muxname, padstates->reg); - } - padstates++; - } - if (err) - device_printf(sc->sc_dev, - "err: failed to configure " - "pin \"%s\" as \"%s\"\n", - padconf->ballname, - muxname); - } - padconf++; - } - } - return (0); -} - /* * Device part of OMAP SCM driver */ - static int ti_scm_probe(device_t dev) { - if (!ofw_bus_status_okay(dev)) return (ENXIO); - if (!ofw_bus_is_compatible(dev, "ti,scm")) + if (!ofw_bus_is_compatible(dev, "syscon")) return (ENXIO); + if (ti_scm_sc) { + printf("%s: multiple SCM modules in device tree data, ignoring\n", + __func__); + return (EEXIST); + } + device_set_desc(dev, "TI Control Module"); return (BUS_PROBE_DEFAULT); } @@ -444,9 +120,6 @@ ti_scm_attach(device_t dev) { struct ti_scm_softc *sc = device_get_softc(dev); - if (ti_scm_sc) - return (ENXIO); - sc->sc_dev = dev; if (bus_alloc_resources(dev, ti_scm_res_spec, sc->sc_res)) { @@ -460,8 +133,6 @@ ti_scm_attach(device_t dev) ti_scm_sc = sc; - ti_scm_padconf_init_from_fdt(sc); - return (0); } @@ -489,6 +160,7 @@ ti_scm_reg_write_4(uint32_t reg, uint32_t val) static device_method_t ti_scm_methods[] = { DEVMETHOD(device_probe, ti_scm_probe), DEVMETHOD(device_attach, ti_scm_attach), + { 0, 0 } }; diff --git a/sys/arm/ti/ti_scm.h b/sys/arm/ti/ti_scm.h index 7a2a5a895d54..1342ddc6d03b 100644 --- a/sys/arm/ti/ti_scm.h +++ b/sys/arm/ti/ti_scm.h @@ -43,26 +43,6 @@ #ifndef _TI_SCM_H_ #define _TI_SCM_H_ -struct ti_scm_padconf { - uint16_t reg_off; - uint16_t gpio_pin; - uint16_t gpio_mode; - const char *ballname; - const char *muxmodes[8]; -}; - -struct ti_scm_padstate { - const char *state; - uint16_t reg; -}; - -struct ti_scm_device { - uint16_t padconf_muxmode_mask; - uint16_t padconf_sate_mask; - const struct ti_scm_padstate *padstate; - const struct ti_scm_padconf *padconf; -}; - struct ti_scm_softc { device_t sc_dev; struct resource * sc_res[4]; @@ -70,12 +50,6 @@ struct ti_scm_softc { bus_space_handle_t sc_bsh; }; -int ti_scm_padconf_set(const char *padname, const char *muxmode, - unsigned int state); -int ti_scm_padconf_get(const char *padname, const char **muxmode, - unsigned int *state); -int ti_scm_padconf_set_gpiomode(uint32_t gpio, unsigned int state); -int ti_scm_padconf_get_gpiomode(uint32_t gpio, unsigned int *state); int ti_scm_reg_read_4(uint32_t reg, uint32_t *val); int ti_scm_reg_write_4(uint32_t reg, uint32_t val); diff --git a/sys/arm/ti/ti_sdhci.c b/sys/arm/ti/ti_sdhci.c index 380a40eed49e..bc0880dff1e6 100644 --- a/sys/arm/ti/ti_sdhci.c +++ b/sys/arm/ti/ti_sdhci.c @@ -57,6 +57,7 @@ __FBSDID("$FreeBSD$"); #include #include +#include #include "gpio_if.h" struct ti_sdhci_softc { @@ -66,7 +67,7 @@ struct ti_sdhci_softc { struct resource * irq_res; void * intr_cookie; struct sdhci_slot slot; - uint32_t mmchs_device_id; + clk_ident_t mmchs_clk_id; uint32_t mmchs_reg_off; uint32_t sdhci_reg_off; uint32_t baseclk_hz; @@ -383,19 +384,18 @@ static void ti_sdhci_hw_init(device_t dev) { struct ti_sdhci_softc *sc = device_get_softc(dev); - clk_ident_t clk; uint32_t regval; unsigned long timeout; /* Enable the controller and interface/functional clocks */ - clk = MMC0_CLK + sc->mmchs_device_id; - if (ti_prcm_clk_enable(clk) != 0) { + if (ti_prcm_clk_enable(sc->mmchs_clk_id) != 0) { device_printf(dev, "Error: failed to enable MMC clock\n"); return; } /* Get the frequency of the source clock */ - if (ti_prcm_clk_get_source_freq(clk, &sc->baseclk_hz) != 0) { + if (ti_prcm_clk_get_source_freq(sc->mmchs_clk_id, + &sc->baseclk_hz) != 0) { device_printf(dev, "Error: failed to get source clock freq\n"); return; } @@ -484,12 +484,10 @@ ti_sdhci_attach(device_t dev) * up and added in freebsd, it doesn't exist in the published bindings. */ node = ofw_bus_get_node(dev); - if ((OF_getprop(node, "mmchs-device-id", &prop, sizeof(prop))) <= 0) { - sc->mmchs_device_id = device_get_unit(dev); - device_printf(dev, "missing mmchs-device-id attribute in FDT, " - "using unit number (%d)", sc->mmchs_device_id); - } else - sc->mmchs_device_id = fdt32_to_cpu(prop); + sc->mmchs_clk_id = ti_hwmods_get_clock(dev); + if (sc->mmchs_clk_id == INVALID_CLK_IDENT) { + device_printf(dev, "failed to get clock based on hwmods property\n"); + } /* * The hardware can inherently do dual-voltage (1p8v, 3p0v) on the first @@ -500,7 +498,7 @@ ti_sdhci_attach(device_t dev) * be done once and never reset. */ sc->slot.host.caps |= MMC_OCR_LOW_VOLTAGE; - if (sc->mmchs_device_id == 0 || OF_hasprop(node, "ti,dual-volt")) { + if (sc->mmchs_clk_id == MMC1_CLK || OF_hasprop(node, "ti,dual-volt")) { sc->slot.host.caps |= MMC_OCR_290_300 | MMC_OCR_300_310; } diff --git a/sys/arm/ti/ti_sdma.c b/sys/arm/ti/ti_sdma.c index 4e9dbfe7cfcf..a8faba8949e1 100644 --- a/sys/arm/ti/ti_sdma.c +++ b/sys/arm/ti/ti_sdma.c @@ -1131,7 +1131,7 @@ ti_sdma_probe(device_t dev) if (!ofw_bus_status_okay(dev)) return (ENXIO); - if (!ofw_bus_is_compatible(dev, "ti,sdma")) + if (!ofw_bus_is_compatible(dev, "ti,omap4430-sdma")) return (ENXIO); device_set_desc(dev, "TI sDMA Controller"); diff --git a/sys/arm/ti/usb/omap_ehci.c b/sys/arm/ti/usb/omap_ehci.c index 0230ff99941e..7ce957f55711 100644 --- a/sys/arm/ti/usb/omap_ehci.c +++ b/sys/arm/ti/usb/omap_ehci.c @@ -24,65 +24,20 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ - -/** - * Driver for the High Speed USB EHCI module on the TI OMAP3530 SoC. - * - * WARNING: I've only tried this driver on a limited number of USB peripherals, - * it is still very raw and bound to have numerous bugs in it. - * - * This driver is based on the FreeBSD IXP4xx EHCI driver with a lot of the - * setup sequence coming from the Linux community and their EHCI driver for - * OMAP. Without these as a base I don't think I would have been able to get - * this driver working. - * - * The driver only contains the EHCI parts, the module also supports OHCI and - * USB on-the-go (OTG), currently neither are supported. - * - * CAUTION: This driver was written to run on the beaglebaord dev board, so I - * have made some assumptions about the type of PHY used and some of the other - * settings. Bare that in mind if you intend to use this driver on another - * platform. - * - * NOTE: This module uses a few different clocks, one being a 60Mhz clock for - * the TTL part of the module. This clock is derived from DPPL5 which must be - * configured prior to loading this driver - it is not configured by the - * bootloader. It took me a long time to figure this out, and caused much - * frustration. This PLL is now setup in the timer/clocks part of the BSP, - * check out the omap_prcm_setup_dpll5() function in omap_prcm.c for more info. - * - */ - #include __FBSDID("$FreeBSD$"); -#include "opt_bus.h" - -#include -#include #include -#include -#include #include +#include #include -#include #include -#include #include -#include -#include +#include #include -#include -#include -#include -#include -#include -#include -#include #include -#include -#include +#include #include #include @@ -98,80 +53,83 @@ __FBSDID("$FreeBSD$"); #include #include -#include -#include -#include +#include +#include #include -#include "gpio_if.h" +/* EHCI */ +#define OMAP_USBHOST_HCCAPBASE 0x0000 +#define OMAP_USBHOST_HCSPARAMS 0x0004 +#define OMAP_USBHOST_HCCPARAMS 0x0008 +#define OMAP_USBHOST_USBCMD 0x0010 +#define OMAP_USBHOST_USBSTS 0x0014 +#define OMAP_USBHOST_USBINTR 0x0018 +#define OMAP_USBHOST_FRINDEX 0x001C +#define OMAP_USBHOST_CTRLDSSEGMENT 0x0020 +#define OMAP_USBHOST_PERIODICLISTBASE 0x0024 +#define OMAP_USBHOST_ASYNCLISTADDR 0x0028 +#define OMAP_USBHOST_CONFIGFLAG 0x0050 +#define OMAP_USBHOST_PORTSC(i) (0x0054 + (0x04 * (i))) +#define OMAP_USBHOST_INSNREG00 0x0090 +#define OMAP_USBHOST_INSNREG01 0x0094 +#define OMAP_USBHOST_INSNREG02 0x0098 +#define OMAP_USBHOST_INSNREG03 0x009C +#define OMAP_USBHOST_INSNREG04 0x00A0 +#define OMAP_USBHOST_INSNREG05_UTMI 0x00A4 +#define OMAP_USBHOST_INSNREG05_ULPI 0x00A4 +#define OMAP_USBHOST_INSNREG06 0x00A8 +#define OMAP_USBHOST_INSNREG07 0x00AC +#define OMAP_USBHOST_INSNREG08 0x00B0 + +#define OMAP_USBHOST_INSNREG04_DISABLE_UNSUSPEND (1 << 5) + +#define OMAP_USBHOST_INSNREG05_ULPI_CONTROL_SHIFT 31 +#define OMAP_USBHOST_INSNREG05_ULPI_PORTSEL_SHIFT 24 +#define OMAP_USBHOST_INSNREG05_ULPI_OPSEL_SHIFT 22 +#define OMAP_USBHOST_INSNREG05_ULPI_REGADD_SHIFT 16 +#define OMAP_USBHOST_INSNREG05_ULPI_EXTREGADD_SHIFT 8 +#define OMAP_USBHOST_INSNREG05_ULPI_WRDATA_SHIFT 0 + +#define ULPI_FUNC_CTRL_RESET (1 << 5) + +/*-------------------------------------------------------------------------*/ + +/* + * Macros for Set and Clear + * See ULPI 1.1 specification to find the registers with Set and Clear offsets + */ +#define ULPI_SET(a) (a + 1) +#define ULPI_CLR(a) (a + 2) + +/*-------------------------------------------------------------------------*/ + +/* + * Register Map + */ +#define ULPI_VENDOR_ID_LOW 0x00 +#define ULPI_VENDOR_ID_HIGH 0x01 +#define ULPI_PRODUCT_ID_LOW 0x02 +#define ULPI_PRODUCT_ID_HIGH 0x03 +#define ULPI_FUNC_CTRL 0x04 +#define ULPI_IFC_CTRL 0x07 +#define ULPI_OTG_CTRL 0x0a +#define ULPI_USB_INT_EN_RISE 0x0d +#define ULPI_USB_INT_EN_FALL 0x10 +#define ULPI_USB_INT_STS 0x13 +#define ULPI_USB_INT_LATCH 0x14 +#define ULPI_DEBUG 0x15 +#define ULPI_SCRATCH 0x16 + +#define OMAP_EHCI_HC_DEVSTR "TI OMAP USB 2.0 controller" struct omap_ehci_softc { ehci_softc_t base; /* storage for EHCI code */ - device_t sc_dev; - device_t sc_gpio_dev; - - /* TLL register set */ - struct resource* tll_mem_res; - - /* UHH register set */ - struct resource* uhh_mem_res; - - /* The revision of the HS USB HOST read from UHH_REVISION */ - uint32_t ehci_rev; - - /* The following details are provided by conf hints */ - int port_mode[3]; - int phy_reset[3]; - int reset_gpio_pin[3]; }; static device_attach_t omap_ehci_attach; static device_detach_t omap_ehci_detach; -static device_shutdown_t omap_ehci_shutdown; -static device_suspend_t omap_ehci_suspend; -static device_resume_t omap_ehci_resume; - -/** - * omap_tll_read_4 - read a 32-bit value from the USBTLL registers - * omap_tll_write_4 - write a 32-bit value from the USBTLL registers - * omap_tll_readb - read an 8-bit value from the USBTLL registers - * omap_tll_writeb - write an 8-bit value from the USBTLL registers - * @sc: omap ehci device context - * @off: byte offset within the register set to read from - * @val: the value to write into the register - * - * - * LOCKING: - * None - * - * RETURNS: - * nothing in case of write function, if read function returns the value read. - */ -static inline uint32_t -omap_tll_read_4(struct omap_ehci_softc *sc, bus_size_t off) -{ - return bus_read_4(sc->tll_mem_res, off); -} - -static inline void -omap_tll_write_4(struct omap_ehci_softc *sc, bus_size_t off, uint32_t val) -{ - bus_write_4(sc->tll_mem_res, off, val); -} - -static inline uint8_t -omap_tll_readb(struct omap_ehci_softc *sc, bus_size_t off) -{ - return bus_read_1(sc->tll_mem_res, off); -} - -static inline void -omap_tll_writeb(struct omap_ehci_softc *sc, bus_size_t off, uint8_t val) -{ - bus_write_1(sc->tll_mem_res, off, val); -} /** * omap_ehci_read_4 - read a 32-bit value from the EHCI registers @@ -192,92 +150,13 @@ omap_ehci_read_4(struct omap_ehci_softc *sc, bus_size_t off) { return (bus_read_4(sc->base.sc_io_res, off)); } + static inline void omap_ehci_write_4(struct omap_ehci_softc *sc, bus_size_t off, uint32_t val) { bus_write_4(sc->base.sc_io_res, off, val); } -/** - * omap_uhh_read_4 - read a 32-bit value from the UHH registers - * omap_uhh_write_4 - write a 32-bit value from the UHH registers - * @sc: omap ehci device context - * @off: byte offset within the register set to read from - * @val: the value to write into the register - * - * - * LOCKING: - * None - * - * RETURNS: - * nothing in case of write function, if read function returns the value read. - */ -static inline uint32_t -omap_uhh_read_4(struct omap_ehci_softc *sc, bus_size_t off) -{ - return bus_read_4(sc->uhh_mem_res, off); -} -static inline void -omap_uhh_write_4(struct omap_ehci_softc *sc, bus_size_t off, uint32_t val) -{ - bus_write_4(sc->uhh_mem_res, off, val); -} - -/** - * omap_ehci_utmi_init - initialises the UTMI part of the controller - * @isc: omap ehci device context - * - * - * - * LOCKING: - * none - * - * RETURNS: - * nothing - */ -static void -omap_ehci_utmi_init(struct omap_ehci_softc *isc, unsigned int en_mask) -{ - unsigned int i; - uint32_t reg; - - /* There are 3 TLL channels, one per USB controller so set them all up the - * same, SDR mode, bit stuffing and no autoidle. - */ - for (i=0; i<3; i++) { - reg = omap_tll_read_4(isc, OMAP_USBTLL_TLL_CHANNEL_CONF(i)); - - reg &= ~(TLL_CHANNEL_CONF_UTMIAUTOIDLE - | TLL_CHANNEL_CONF_ULPINOBITSTUFF - | TLL_CHANNEL_CONF_ULPIDDRMODE); - - omap_tll_write_4(isc, OMAP_USBTLL_TLL_CHANNEL_CONF(i), reg); - } - - /* Program the common TLL register */ - reg = omap_tll_read_4(isc, OMAP_USBTLL_TLL_SHARED_CONF); - - reg &= ~( TLL_SHARED_CONF_USB_90D_DDR_EN - | TLL_SHARED_CONF_USB_DIVRATIO_MASK); - reg |= ( TLL_SHARED_CONF_FCLK_IS_ON - | TLL_SHARED_CONF_USB_DIVRATIO_2 - | TLL_SHARED_CONF_USB_180D_SDR_EN); - - omap_tll_write_4(isc, OMAP_USBTLL_TLL_SHARED_CONF, reg); - - /* Enable channels now */ - for (i = 0; i < 3; i++) { - reg = omap_tll_read_4(isc, OMAP_USBTLL_TLL_CHANNEL_CONF(i)); - - /* Enable only the reg that is needed */ - if ((en_mask & (1 << i)) == 0) - continue; - - reg |= TLL_CHANNEL_CONF_CHANEN; - omap_tll_write_4(isc, OMAP_USBTLL_TLL_CHANNEL_CONF(i), reg); - } -} - /** * omap_ehci_soft_phy_reset - resets the phy using the reset command * @isc: omap ehci device context @@ -321,7 +200,6 @@ omap_ehci_soft_phy_reset(struct omap_ehci_softc *isc, unsigned int port) } } } - /** * omap_ehci_init - initialises the USB host EHCI controller @@ -340,216 +218,12 @@ omap_ehci_soft_phy_reset(struct omap_ehci_softc *isc, unsigned int port) static int omap_ehci_init(struct omap_ehci_softc *isc) { - unsigned long timeout; - int ret = 0; - uint8_t tll_ch_mask = 0; uint32_t reg = 0; - int reset_performed = 0; int i; + device_t uhh_dev; + uhh_dev = device_get_parent(isc->sc_dev); device_printf(isc->sc_dev, "Starting TI EHCI USB Controller\n"); - - - /* Enable Clocks for high speed USBHOST */ - ti_prcm_clk_enable(USBHSHOST_CLK); - - /* Hold the PHY in reset while configuring */ - for (int i = 0; i < 3; i++) { - if (isc->phy_reset[i]) { - /* Configure the GPIO to drive low (hold in reset) */ - if ((isc->reset_gpio_pin[i] != -1) && (isc->sc_gpio_dev != NULL)) { - GPIO_PIN_SETFLAGS(isc->sc_gpio_dev, isc->reset_gpio_pin[i], - GPIO_PIN_OUTPUT); - GPIO_PIN_SET(isc->sc_gpio_dev, isc->reset_gpio_pin[i], - GPIO_PIN_LOW); - reset_performed = 1; - } - } - } - - /* Hold the PHY in RESET for enough time till DIR is high */ - if (reset_performed) - DELAY(10); - - /* Read the UHH revision */ - isc->ehci_rev = omap_uhh_read_4(isc, OMAP_USBHOST_UHH_REVISION); - device_printf(isc->sc_dev, "UHH revision 0x%08x\n", isc->ehci_rev); - - /* Initilise the low level interface module(s) */ - if (isc->ehci_rev == OMAP_EHCI_REV1) { - - /* Enable the USB TLL */ - ti_prcm_clk_enable(USBTLL_CLK); - - /* Perform TLL soft reset, and wait until reset is complete */ - omap_tll_write_4(isc, OMAP_USBTLL_SYSCONFIG, TLL_SYSCONFIG_SOFTRESET); - - /* Set the timeout to 100ms*/ - timeout = (hz < 10) ? 1 : ((100 * hz) / 1000); - - /* Wait for TLL reset to complete */ - while ((omap_tll_read_4(isc, OMAP_USBTLL_SYSSTATUS) & - TLL_SYSSTATUS_RESETDONE) == 0x00) { - - /* Sleep for a tick */ - pause("USBRESET", 1); - - if (timeout-- == 0) { - device_printf(isc->sc_dev, "TLL reset operation timed out\n"); - ret = EINVAL; - goto err_sys_status; - } - } - - device_printf(isc->sc_dev, "TLL RESET DONE\n"); - - /* CLOCKACTIVITY = 1 : OCP-derived internal clocks ON during idle - * SIDLEMODE = 2 : Smart-idle mode. Sidleack asserted after Idlereq - * assertion when no more activity on the USB. - * ENAWAKEUP = 1 : Wakeup generation enabled - */ - omap_tll_write_4(isc, OMAP_USBTLL_SYSCONFIG, TLL_SYSCONFIG_ENAWAKEUP | - TLL_SYSCONFIG_AUTOIDLE | - TLL_SYSCONFIG_SIDLE_SMART_IDLE | - TLL_SYSCONFIG_CACTIVITY); - - } else if (isc->ehci_rev == OMAP_EHCI_REV2) { - - /* For OMAP44xx devices you have to enable the per-port clocks: - * PHY_MODE - External ULPI clock - * TTL_MODE - Internal UTMI clock - * HSIC_MODE - Internal 480Mhz and 60Mhz clocks - */ - if (isc->ehci_rev == OMAP_EHCI_REV2) { - if (isc->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY) { - ti_prcm_clk_set_source(USBP1_PHY_CLK, EXT_CLK); - ti_prcm_clk_enable(USBP1_PHY_CLK); - } else if (isc->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL) - ti_prcm_clk_enable(USBP1_UTMI_CLK); - else if (isc->port_mode[0] == EHCI_HCD_OMAP_MODE_HSIC) - ti_prcm_clk_enable(USBP1_HSIC_CLK); - - if (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY) { - ti_prcm_clk_set_source(USBP2_PHY_CLK, EXT_CLK); - ti_prcm_clk_enable(USBP2_PHY_CLK); - } else if (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL) - ti_prcm_clk_enable(USBP2_UTMI_CLK); - else if (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_HSIC) - ti_prcm_clk_enable(USBP2_HSIC_CLK); - } - } - - /* Put UHH in SmartIdle/SmartStandby mode */ - reg = omap_uhh_read_4(isc, OMAP_USBHOST_UHH_SYSCONFIG); - if (isc->ehci_rev == OMAP_EHCI_REV1) { - reg &= ~(UHH_SYSCONFIG_SIDLEMODE_MASK | - UHH_SYSCONFIG_MIDLEMODE_MASK); - reg |= (UHH_SYSCONFIG_ENAWAKEUP | - UHH_SYSCONFIG_AUTOIDLE | - UHH_SYSCONFIG_CLOCKACTIVITY | - UHH_SYSCONFIG_SIDLEMODE_SMARTIDLE | - UHH_SYSCONFIG_MIDLEMODE_SMARTSTANDBY); - } else if (isc->ehci_rev == OMAP_EHCI_REV2) { - reg &= ~UHH_SYSCONFIG_IDLEMODE_MASK; - reg |= UHH_SYSCONFIG_IDLEMODE_NOIDLE; - reg &= ~UHH_SYSCONFIG_STANDBYMODE_MASK; - reg |= UHH_SYSCONFIG_STANDBYMODE_NOSTDBY; - } - omap_uhh_write_4(isc, OMAP_USBHOST_UHH_SYSCONFIG, reg); - device_printf(isc->sc_dev, "OMAP_UHH_SYSCONFIG: 0x%08x\n", reg); - - reg = omap_uhh_read_4(isc, OMAP_USBHOST_UHH_HOSTCONFIG); - - /* Setup ULPI bypass and burst configurations */ - reg |= (UHH_HOSTCONFIG_ENA_INCR4 | - UHH_HOSTCONFIG_ENA_INCR8 | - UHH_HOSTCONFIG_ENA_INCR16); - reg &= ~UHH_HOSTCONFIG_ENA_INCR_ALIGN; - - if (isc->ehci_rev == OMAP_EHCI_REV1) { - if (isc->port_mode[0] == EHCI_HCD_OMAP_MODE_UNKNOWN) - reg &= ~UHH_HOSTCONFIG_P1_CONNECT_STATUS; - if (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_UNKNOWN) - reg &= ~UHH_HOSTCONFIG_P2_CONNECT_STATUS; - if (isc->port_mode[2] == EHCI_HCD_OMAP_MODE_UNKNOWN) - reg &= ~UHH_HOSTCONFIG_P3_CONNECT_STATUS; - - /* Bypass the TLL module for PHY mode operation */ - if ((isc->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY) || - (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY) || - (isc->port_mode[2] == EHCI_HCD_OMAP_MODE_PHY)) - reg &= ~UHH_HOSTCONFIG_P1_ULPI_BYPASS; - else - reg |= UHH_HOSTCONFIG_P1_ULPI_BYPASS; - - } else if (isc->ehci_rev == OMAP_EHCI_REV2) { - reg |= UHH_HOSTCONFIG_APP_START_CLK; - - /* Clear port mode fields for PHY mode*/ - reg &= ~UHH_HOSTCONFIG_P1_MODE_MASK; - reg &= ~UHH_HOSTCONFIG_P2_MODE_MASK; - - if (isc->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL) - reg |= UHH_HOSTCONFIG_P1_MODE_UTMI_PHY; - else if (isc->port_mode[0] == EHCI_HCD_OMAP_MODE_HSIC) - reg |= UHH_HOSTCONFIG_P1_MODE_HSIC; - - if (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL) - reg |= UHH_HOSTCONFIG_P2_MODE_UTMI_PHY; - else if (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_HSIC) - reg |= UHH_HOSTCONFIG_P2_MODE_HSIC; - } - - omap_uhh_write_4(isc, OMAP_USBHOST_UHH_HOSTCONFIG, reg); - device_printf(isc->sc_dev, "UHH setup done, uhh_hostconfig=0x%08x\n", reg); - - - /* I found the code and comments in the Linux EHCI driver - thanks guys :) - * - * "An undocumented "feature" in the OMAP3 EHCI controller, causes suspended - * ports to be taken out of suspend when the USBCMD.Run/Stop bit is cleared - * (for example when we do ehci_bus_suspend). This breaks suspend-resume if - * the root-hub is allowed to suspend. Writing 1 to this undocumented - * register bit disables this feature and restores normal behavior." - */ -#if 0 - omap_ehci_write_4(isc, OMAP_USBHOST_INSNREG04, - OMAP_USBHOST_INSNREG04_DISABLE_UNSUSPEND); -#endif - - /* If any of the ports are configured in TLL mode, enable them */ - if ((isc->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL) || - (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL) || - (isc->port_mode[2] == EHCI_HCD_OMAP_MODE_TLL)) { - - if (isc->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL) - tll_ch_mask |= 0x1; - if (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL) - tll_ch_mask |= 0x2; - if (isc->port_mode[2] == EHCI_HCD_OMAP_MODE_TLL) - tll_ch_mask |= 0x4; - - /* Enable UTMI mode for required TLL channels */ - omap_ehci_utmi_init(isc, tll_ch_mask); - } - - - /* Release the PHY reset signal now we have configured everything */ - if (reset_performed) { - - /* Delay for 10ms */ - DELAY(10000); - - for (i = 0; i < 3; i++) { - /* Release reset */ - - if (isc->phy_reset[i] && (isc->reset_gpio_pin[i] != -1) - && (isc->sc_gpio_dev != NULL)) { - GPIO_PIN_SET(isc->sc_gpio_dev, - isc->reset_gpio_pin[i], GPIO_PIN_HIGH); - } - } - } /* Set the interrupt threshold control, it controls the maximum rate at * which the host controller issues interrupts. We set it to 1 microframe @@ -561,166 +235,15 @@ omap_ehci_init(struct omap_ehci_softc *isc) omap_ehci_write_4(isc, OMAP_USBHOST_USBCMD, reg); /* Soft reset the PHY using PHY reset command over ULPI */ - if (isc->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY) - omap_ehci_soft_phy_reset(isc, 0); - if (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY) - omap_ehci_soft_phy_reset(isc, 1); + for (i = 0; i < OMAP_HS_USB_PORTS; i++) { + if (omap_usb_port_mode(uhh_dev, i) == EHCI_HCD_OMAP_MODE_PHY) + omap_ehci_soft_phy_reset(isc, i); + + } return(0); - -err_sys_status: - - /* Disable the TLL clocks */ - ti_prcm_clk_disable(USBTLL_CLK); - - /* Disable Clocks for USBHOST */ - ti_prcm_clk_disable(USBHSHOST_CLK); - - return(ret); } - -/** - * omap_ehci_fini - shutdown the EHCI controller - * @isc: omap ehci device context - * - * - * - * LOCKING: - * none - * - * RETURNS: - * 0 on success, a negative error code on failure. - */ -static void -omap_ehci_fini(struct omap_ehci_softc *isc) -{ - unsigned long timeout; - - device_printf(isc->sc_dev, "Stopping TI EHCI USB Controller\n"); - - /* Set the timeout */ - if (hz < 10) - timeout = 1; - else - timeout = (100 * hz) / 1000; - - /* Reset the UHH, OHCI and EHCI modules */ - omap_uhh_write_4(isc, OMAP_USBHOST_UHH_SYSCONFIG, 0x0002); - while ((omap_uhh_read_4(isc, OMAP_USBHOST_UHH_SYSSTATUS) & 0x07) == 0x00) { - /* Sleep for a tick */ - pause("USBRESET", 1); - - if (timeout-- == 0) { - device_printf(isc->sc_dev, "operation timed out\n"); - break; - } - } - - - /* Set the timeout */ - if (hz < 10) - timeout = 1; - else - timeout = (100 * hz) / 1000; - - /* Reset the TLL module */ - omap_tll_write_4(isc, OMAP_USBTLL_SYSCONFIG, 0x0002); - while ((omap_tll_read_4(isc, OMAP_USBTLL_SYSSTATUS) & (0x01)) == 0x00) { - /* Sleep for a tick */ - pause("USBRESET", 1); - - if (timeout-- == 0) { - device_printf(isc->sc_dev, "operation timed out\n"); - break; - } - } - - - /* Disable functional and interface clocks for the TLL and HOST modules */ - ti_prcm_clk_disable(USBTLL_CLK); - ti_prcm_clk_disable(USBHSHOST_CLK); - - device_printf(isc->sc_dev, "Clock to USB host has been disabled\n"); - -} - - - -/** - * omap_ehci_suspend - suspends the bus - * @dev: omap ehci device - * - * Effectively boilerplate EHCI suspend code. - * - * TODO: There is a lot more we could do here - i.e. force the controller into - * idle mode and disable all the clocks for start. - * - * LOCKING: - * none - * - * RETURNS: - * 0 on success or a positive error code - */ -static int -omap_ehci_suspend(device_t dev) -{ - int err; - - err = bus_generic_suspend(dev); - if (err) - return (err); - return (0); -} - - -/** - * omap_ehci_resume - resumes a suspended bus - * @dev: omap ehci device - * - * Effectively boilerplate EHCI resume code. - * - * LOCKING: - * none - * - * RETURNS: - * 0 on success or a positive error code on failure - */ -static int -omap_ehci_resume(device_t dev) -{ - - bus_generic_resume(dev); - - return (0); -} - - -/** - * omap_ehci_shutdown - starts the given command - * @dev: - * - * Effectively boilerplate EHCI shutdown code. - * - * LOCKING: - * none. - * - * RETURNS: - * 0 on success or a positive error code on failure - */ -static int -omap_ehci_shutdown(device_t dev) -{ - int err; - - err = bus_generic_shutdown(dev); - if (err) - return (err); - - return (0); -} - - /** * omap_ehci_probe - starts the given command * @dev: @@ -740,7 +263,7 @@ omap_ehci_probe(device_t dev) if (!ofw_bus_status_okay(dev)) return (ENXIO); - if (!ofw_bus_is_compatible(dev, "ti,usb-ehci")) + if (!ofw_bus_is_compatible(dev, "ti,ehci-omap")) return (ENXIO); device_set_desc(dev, OMAP_EHCI_HC_DEVSTR); @@ -766,15 +289,9 @@ static int omap_ehci_attach(device_t dev) { struct omap_ehci_softc *isc = device_get_softc(dev); - phandle_t node; - /* 3 ports with 3 cells per port */ - pcell_t phyconf[3 * 3]; - pcell_t *phyconf_ptr; ehci_softc_t *sc = &isc->base; int err; int rid; - int len, tuple_size; - int i; /* initialise some bus fields */ sc->sc_bus.parent = dev; @@ -782,6 +299,8 @@ omap_ehci_attach(device_t dev) sc->sc_bus.devices_max = EHCI_MAX_DEVICES; sc->sc_bus.dma_bits = 32; + sprintf(sc->sc_vendor, "Texas Instruments"); + /* save the device */ isc->sc_dev = dev; @@ -791,16 +310,6 @@ omap_ehci_attach(device_t dev) return (ENOMEM); } - /* When the EHCI driver is added to the tree it is expected that 3 - * memory resources and 1 interrupt resource is assigned. The memory - * resources should be: - * 0 => EHCI register range - * 1 => UHH register range - * 2 => TLL register range - * - * The interrupt resource is just the single interupt for the controller. - */ - /* Allocate resource for the EHCI register set */ rid = 0; sc->sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); @@ -816,21 +325,6 @@ omap_ehci_attach(device_t dev) goto error; } - /* Allocate resource for the UHH register set */ - rid = 1; - isc->uhh_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); - if (!isc->uhh_mem_res) { - device_printf(dev, "Error: Could not map UHH memory\n"); - goto error; - } - /* Allocate resource for the TLL register set */ - rid = 2; - isc->tll_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); - if (!isc->tll_mem_res) { - device_printf(dev, "Error: Could not map TLL memory\n"); - goto error; - } - /* Add this device as a child of the USBus device */ sc->sc_bus.bdev = device_add_child(dev, "usbus", -1); if (!sc->sc_bus.bdev) { @@ -841,44 +335,6 @@ omap_ehci_attach(device_t dev) device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); device_set_desc(sc->sc_bus.bdev, OMAP_EHCI_HC_DEVSTR); - /* Set the vendor name */ - sprintf(sc->sc_vendor, "Texas Instruments"); - - /* Get the GPIO device, we may need this if the driver needs to toggle - * some pins for external PHY resets. - */ - isc->sc_gpio_dev = devclass_get_device(devclass_find("gpio"), 0); - if (isc->sc_gpio_dev == NULL) { - device_printf(dev, "Error: failed to get the GPIO device\n"); - goto error; - } - - /* Set the defaults for the hints */ - for (i = 0; i < 3; i++) { - isc->phy_reset[i] = 0; - isc->port_mode[i] = EHCI_HCD_OMAP_MODE_UNKNOWN; - isc->reset_gpio_pin[i] = -1; - } - - tuple_size = sizeof(pcell_t) * 3; - node = ofw_bus_get_node(dev); - len = OF_getprop(node, "phy-config", phyconf, sizeof(phyconf)); - if (len > 0) { - if (len % tuple_size) - goto error; - if ((len / tuple_size) != 3) - goto error; - - phyconf_ptr = phyconf; - for (i = 0; i < 3; i++) { - isc->port_mode[i] = fdt32_to_cpu(*phyconf_ptr); - isc->phy_reset[i] = fdt32_to_cpu(*(phyconf_ptr + 1)); - isc->reset_gpio_pin[i] = fdt32_to_cpu(*(phyconf_ptr + 2)); - - phyconf_ptr += 3; - } - } - /* Initialise the ECHI registers */ err = omap_ehci_init(isc); if (err) { @@ -886,13 +342,11 @@ omap_ehci_attach(device_t dev) goto error; } - /* Set the tag and size of the register set in the EHCI context */ sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); sc->sc_io_size = rman_get_size(sc->sc_io_res); - /* Setup the interrupt */ err = bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl); @@ -902,7 +356,6 @@ omap_ehci_attach(device_t dev) goto error; } - /* Finally we are ready to kick off the ECHI host controller */ err = ehci_init(sc); if (err == 0) { @@ -980,20 +433,6 @@ omap_ehci_detach(device_t dev) sc->sc_io_res = NULL; } - /* Release the other register set memory maps */ - if (isc->tll_mem_res) { - bus_release_resource(dev, SYS_RES_MEMORY, 0, isc->tll_mem_res); - isc->tll_mem_res = NULL; - } - if (isc->uhh_mem_res) { - bus_release_resource(dev, SYS_RES_MEMORY, 0, isc->uhh_mem_res); - isc->uhh_mem_res = NULL; - } - - usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc); - - omap_ehci_fini(isc); - return (0); } @@ -1002,9 +441,10 @@ static device_method_t ehci_methods[] = { DEVMETHOD(device_probe, omap_ehci_probe), DEVMETHOD(device_attach, omap_ehci_attach), DEVMETHOD(device_detach, omap_ehci_detach), - DEVMETHOD(device_suspend, omap_ehci_suspend), - DEVMETHOD(device_resume, omap_ehci_resume), - DEVMETHOD(device_shutdown, omap_ehci_shutdown), + + DEVMETHOD(device_suspend, bus_generic_suspend), + DEVMETHOD(device_resume, bus_generic_resume), + DEVMETHOD(device_shutdown, bus_generic_shutdown), /* Bus interface */ DEVMETHOD(bus_print_child, bus_generic_print_child), @@ -1020,4 +460,4 @@ static driver_t ehci_driver = { static devclass_t ehci_devclass; -DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0); +DRIVER_MODULE(ehci, omap_uhh, ehci_driver, ehci_devclass, 0, 0); diff --git a/sys/arm/ti/usb/omap_host.c b/sys/arm/ti/usb/omap_host.c new file mode 100644 index 000000000000..326a5b39c388 --- /dev/null +++ b/sys/arm/ti/usb/omap_host.c @@ -0,0 +1,466 @@ +/*- + * Copyright (c) 2015 Oleksandr Tymoshenko + * Copyright (c) 2011 Ben Gray . + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include + +#include +#include + +/* + * USB Host Module + */ + +/* UHH */ +#define OMAP_USBHOST_UHH_REVISION 0x0000 +#define OMAP_USBHOST_UHH_SYSCONFIG 0x0010 +#define OMAP_USBHOST_UHH_SYSSTATUS 0x0014 +#define OMAP_USBHOST_UHH_HOSTCONFIG 0x0040 +#define OMAP_USBHOST_UHH_DEBUG_CSR 0x0044 + +/* UHH Register Set */ +#define UHH_SYSCONFIG_MIDLEMODE_MASK (3UL << 12) +#define UHH_SYSCONFIG_MIDLEMODE_SMARTSTANDBY (2UL << 12) +#define UHH_SYSCONFIG_MIDLEMODE_NOSTANDBY (1UL << 12) +#define UHH_SYSCONFIG_MIDLEMODE_FORCESTANDBY (0UL << 12) +#define UHH_SYSCONFIG_CLOCKACTIVITY (1UL << 8) +#define UHH_SYSCONFIG_SIDLEMODE_MASK (3UL << 3) +#define UHH_SYSCONFIG_SIDLEMODE_SMARTIDLE (2UL << 3) +#define UHH_SYSCONFIG_SIDLEMODE_NOIDLE (1UL << 3) +#define UHH_SYSCONFIG_SIDLEMODE_FORCEIDLE (0UL << 3) +#define UHH_SYSCONFIG_ENAWAKEUP (1UL << 2) +#define UHH_SYSCONFIG_SOFTRESET (1UL << 1) +#define UHH_SYSCONFIG_AUTOIDLE (1UL << 0) + +#define UHH_HOSTCONFIG_APP_START_CLK (1UL << 31) +#define UHH_HOSTCONFIG_P3_CONNECT_STATUS (1UL << 10) +#define UHH_HOSTCONFIG_P2_CONNECT_STATUS (1UL << 9) +#define UHH_HOSTCONFIG_P1_CONNECT_STATUS (1UL << 8) +#define UHH_HOSTCONFIG_ENA_INCR_ALIGN (1UL << 5) +#define UHH_HOSTCONFIG_ENA_INCR16 (1UL << 4) +#define UHH_HOSTCONFIG_ENA_INCR8 (1UL << 3) +#define UHH_HOSTCONFIG_ENA_INCR4 (1UL << 2) +#define UHH_HOSTCONFIG_AUTOPPD_ON_OVERCUR_EN (1UL << 1) +#define UHH_HOSTCONFIG_P1_ULPI_BYPASS (1UL << 0) + +/* The following are on rev2 (OMAP44xx) of the EHCI only */ +#define UHH_SYSCONFIG_IDLEMODE_MASK (3UL << 2) +#define UHH_SYSCONFIG_IDLEMODE_NOIDLE (1UL << 2) +#define UHH_SYSCONFIG_STANDBYMODE_MASK (3UL << 4) +#define UHH_SYSCONFIG_STANDBYMODE_NOSTDBY (1UL << 4) + +#define UHH_HOSTCONFIG_P1_MODE_MASK (3UL << 16) +#define UHH_HOSTCONFIG_P1_MODE_ULPI_PHY (0UL << 16) +#define UHH_HOSTCONFIG_P1_MODE_UTMI_PHY (1UL << 16) +#define UHH_HOSTCONFIG_P1_MODE_HSIC (3UL << 16) +#define UHH_HOSTCONFIG_P2_MODE_MASK (3UL << 18) +#define UHH_HOSTCONFIG_P2_MODE_ULPI_PHY (0UL << 18) +#define UHH_HOSTCONFIG_P2_MODE_UTMI_PHY (1UL << 18) +#define UHH_HOSTCONFIG_P2_MODE_HSIC (3UL << 18) + +/* + * Values of UHH_REVISION - Note: these are not given in the TRM but taken + * from the linux OMAP EHCI driver (thanks guys). It has been verified on + * a Panda and Beagle board. + */ +#define OMAP_UHH_REV1 0x00000010 /* OMAP3 */ +#define OMAP_UHH_REV2 0x50700100 /* OMAP4 */ + +struct omap_uhh_softc { + struct simplebus_softc simplebus_sc; + device_t sc_dev; + + /* UHH register set */ + struct resource* uhh_mem_res; + + /* The revision of the HS USB HOST read from UHH_REVISION */ + uint32_t uhh_rev; + + /* The following details are provided by conf hints */ + int port_mode[3]; +}; + +static device_attach_t omap_uhh_attach; +static device_detach_t omap_uhh_detach; + +static inline uint32_t +omap_uhh_read_4(struct omap_uhh_softc *sc, bus_size_t off) +{ + return bus_read_4(sc->uhh_mem_res, off); +} + +static inline void +omap_uhh_write_4(struct omap_uhh_softc *sc, bus_size_t off, uint32_t val) +{ + bus_write_4(sc->uhh_mem_res, off, val); +} + +static int +omap_uhh_init(struct omap_uhh_softc *isc) +{ + uint8_t tll_ch_mask; + uint32_t reg; + int i; + + /* Enable Clocks for high speed USBHOST */ + ti_prcm_clk_enable(USBHSHOST_CLK); + + /* Read the UHH revision */ + isc->uhh_rev = omap_uhh_read_4(isc, OMAP_USBHOST_UHH_REVISION); + device_printf(isc->sc_dev, "UHH revision 0x%08x\n", isc->uhh_rev); + + if (isc->uhh_rev == OMAP_UHH_REV2) { + /* For OMAP44xx devices you have to enable the per-port clocks: + * PHY_MODE - External ULPI clock + * TTL_MODE - Internal UTMI clock + * HSIC_MODE - Internal 480Mhz and 60Mhz clocks + */ + switch(isc->port_mode[0]) { + case EHCI_HCD_OMAP_MODE_UNKNOWN: + break; + case EHCI_HCD_OMAP_MODE_PHY: + if (ti_prcm_clk_set_source(USBP1_PHY_CLK, EXT_CLK)) + device_printf(isc->sc_dev, + "failed to set clock source for port 0\n"); + if (ti_prcm_clk_enable(USBP1_PHY_CLK)) + device_printf(isc->sc_dev, + "failed to set clock USBP1_PHY_CLK source for port 0\n"); + break; + case EHCI_HCD_OMAP_MODE_TLL: + if (ti_prcm_clk_enable(USBP1_UTMI_CLK)) + device_printf(isc->sc_dev, + "failed to set clock USBP1_PHY_CLK source for port 0\n"); + break; + case EHCI_HCD_OMAP_MODE_HSIC: + if (ti_prcm_clk_enable(USBP1_HSIC_CLK)) + device_printf(isc->sc_dev, + "failed to set clock USBP1_PHY_CLK source for port 0\n"); + break; + default: + device_printf(isc->sc_dev, "unknown port mode %d for port 0\n", isc->port_mode[0]); + } + switch(isc->port_mode[1]) { + case EHCI_HCD_OMAP_MODE_UNKNOWN: + break; + case EHCI_HCD_OMAP_MODE_PHY: + if (ti_prcm_clk_set_source(USBP2_PHY_CLK, EXT_CLK)) + device_printf(isc->sc_dev, + "failed to set clock source for port 0\n"); + if (ti_prcm_clk_enable(USBP2_PHY_CLK)) + device_printf(isc->sc_dev, + "failed to set clock USBP2_PHY_CLK source for port 1\n"); + break; + case EHCI_HCD_OMAP_MODE_TLL: + if (ti_prcm_clk_enable(USBP2_UTMI_CLK)) + device_printf(isc->sc_dev, + "failed to set clock USBP2_UTMI_CLK source for port 1\n"); + break; + case EHCI_HCD_OMAP_MODE_HSIC: + if (ti_prcm_clk_enable(USBP2_HSIC_CLK)) + device_printf(isc->sc_dev, + "failed to set clock USBP2_HSIC_CLK source for port 1\n"); + break; + default: + device_printf(isc->sc_dev, "unknown port mode %d for port 1\n", isc->port_mode[1]); + } + } + + /* Put UHH in SmartIdle/SmartStandby mode */ + reg = omap_uhh_read_4(isc, OMAP_USBHOST_UHH_SYSCONFIG); + if (isc->uhh_rev == OMAP_UHH_REV1) { + reg &= ~(UHH_SYSCONFIG_SIDLEMODE_MASK | + UHH_SYSCONFIG_MIDLEMODE_MASK); + reg |= (UHH_SYSCONFIG_ENAWAKEUP | + UHH_SYSCONFIG_AUTOIDLE | + UHH_SYSCONFIG_CLOCKACTIVITY | + UHH_SYSCONFIG_SIDLEMODE_SMARTIDLE | + UHH_SYSCONFIG_MIDLEMODE_SMARTSTANDBY); + } else if (isc->uhh_rev == OMAP_UHH_REV2) { + reg &= ~UHH_SYSCONFIG_IDLEMODE_MASK; + reg |= UHH_SYSCONFIG_IDLEMODE_NOIDLE; + reg &= ~UHH_SYSCONFIG_STANDBYMODE_MASK; + reg |= UHH_SYSCONFIG_STANDBYMODE_NOSTDBY; + } + omap_uhh_write_4(isc, OMAP_USBHOST_UHH_SYSCONFIG, reg); + device_printf(isc->sc_dev, "OMAP_UHH_SYSCONFIG: 0x%08x\n", reg); + + reg = omap_uhh_read_4(isc, OMAP_USBHOST_UHH_HOSTCONFIG); + + /* Setup ULPI bypass and burst configurations */ + reg |= (UHH_HOSTCONFIG_ENA_INCR4 | + UHH_HOSTCONFIG_ENA_INCR8 | + UHH_HOSTCONFIG_ENA_INCR16); + reg &= ~UHH_HOSTCONFIG_ENA_INCR_ALIGN; + + if (isc->uhh_rev == OMAP_UHH_REV1) { + if (isc->port_mode[0] == EHCI_HCD_OMAP_MODE_UNKNOWN) + reg &= ~UHH_HOSTCONFIG_P1_CONNECT_STATUS; + if (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_UNKNOWN) + reg &= ~UHH_HOSTCONFIG_P2_CONNECT_STATUS; + if (isc->port_mode[2] == EHCI_HCD_OMAP_MODE_UNKNOWN) + reg &= ~UHH_HOSTCONFIG_P3_CONNECT_STATUS; + + /* Bypass the TLL module for PHY mode operation */ + if ((isc->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY) || + (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY) || + (isc->port_mode[2] == EHCI_HCD_OMAP_MODE_PHY)) + reg &= ~UHH_HOSTCONFIG_P1_ULPI_BYPASS; + else + reg |= UHH_HOSTCONFIG_P1_ULPI_BYPASS; + + } else if (isc->uhh_rev == OMAP_UHH_REV2) { + reg |= UHH_HOSTCONFIG_APP_START_CLK; + + /* Clear port mode fields for PHY mode*/ + reg &= ~UHH_HOSTCONFIG_P1_MODE_MASK; + reg &= ~UHH_HOSTCONFIG_P2_MODE_MASK; + + if (isc->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL) + reg |= UHH_HOSTCONFIG_P1_MODE_UTMI_PHY; + else if (isc->port_mode[0] == EHCI_HCD_OMAP_MODE_HSIC) + reg |= UHH_HOSTCONFIG_P1_MODE_HSIC; + + if (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL) + reg |= UHH_HOSTCONFIG_P2_MODE_UTMI_PHY; + else if (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_HSIC) + reg |= UHH_HOSTCONFIG_P2_MODE_HSIC; + } + + omap_uhh_write_4(isc, OMAP_USBHOST_UHH_HOSTCONFIG, reg); + device_printf(isc->sc_dev, "UHH setup done, uhh_hostconfig=0x%08x\n", reg); + + + /* I found the code and comments in the Linux EHCI driver - thanks guys :) + * + * "An undocumented "feature" in the OMAP3 EHCI controller, causes suspended + * ports to be taken out of suspend when the USBCMD.Run/Stop bit is cleared + * (for example when we do omap_uhh_bus_suspend). This breaks suspend-resume if + * the root-hub is allowed to suspend. Writing 1 to this undocumented + * register bit disables this feature and restores normal behavior." + */ +#if 0 + omap_uhh_write_4(isc, OMAP_USBHOST_INSNREG04, + OMAP_USBHOST_INSNREG04_DISABLE_UNSUSPEND); +#endif + tll_ch_mask = 0; + for (i = 0; i < OMAP_HS_USB_PORTS; i++) { + if (isc->port_mode[i] == EHCI_HCD_OMAP_MODE_TLL) + tll_ch_mask |= (1 << i); + } + if (tll_ch_mask) + omap_tll_utmi_enable(tll_ch_mask); + + return(0); +} + +/** + * omap_uhh_fini - shutdown the EHCI controller + * @isc: omap ehci device context + * + * + * + * LOCKING: + * none + * + * RETURNS: + * 0 on success, a negative error code on failure. + */ +static void +omap_uhh_fini(struct omap_uhh_softc *isc) +{ + unsigned long timeout; + + device_printf(isc->sc_dev, "Stopping TI EHCI USB Controller\n"); + + /* Set the timeout */ + if (hz < 10) + timeout = 1; + else + timeout = (100 * hz) / 1000; + + /* Reset the UHH, OHCI and EHCI modules */ + omap_uhh_write_4(isc, OMAP_USBHOST_UHH_SYSCONFIG, 0x0002); + while ((omap_uhh_read_4(isc, OMAP_USBHOST_UHH_SYSSTATUS) & 0x07) == 0x00) { + /* Sleep for a tick */ + pause("USBRESET", 1); + + if (timeout-- == 0) { + device_printf(isc->sc_dev, "operation timed out\n"); + break; + } + } + + /* Disable functional and interface clocks for the TLL and HOST modules */ + ti_prcm_clk_disable(USBHSHOST_CLK); + + device_printf(isc->sc_dev, "Clock to USB host has been disabled\n"); +} + +int +omap_usb_port_mode(device_t dev, int port) +{ + struct omap_uhh_softc *isc; + + isc = device_get_softc(dev); + if ((port < 0) || (port >= OMAP_HS_USB_PORTS)) + return (-1); + + return isc->port_mode[port]; +} + +static int +omap_uhh_probe(device_t dev) +{ + + if (!ofw_bus_status_okay(dev)) + return (ENXIO); + + if (!ofw_bus_is_compatible(dev, "ti,usbhs-host")) + return (ENXIO); + + device_set_desc(dev, "TI OMAP USB 2.0 Host module"); + + return (BUS_PROBE_DEFAULT); +} + +static int +omap_uhh_attach(device_t dev) +{ + struct omap_uhh_softc *isc = device_get_softc(dev); + int err; + int rid; + int i; + phandle_t node; + char propname[16]; + char *mode; + + /* save the device */ + isc->sc_dev = dev; + + /* Allocate resource for the UHH register set */ + rid = 0; + isc->uhh_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); + if (!isc->uhh_mem_res) { + device_printf(dev, "Error: Could not map UHH memory\n"); + goto error; + } + + node = ofw_bus_get_node(dev); + + if (node == -1) + goto error; + + /* Get port modes from FDT */ + for (i = 0; i < OMAP_HS_USB_PORTS; i++) { + isc->port_mode[i] = EHCI_HCD_OMAP_MODE_UNKNOWN; + snprintf(propname, sizeof(propname), + "port%d-mode", i+1); + + if (OF_getprop_alloc(node, propname, 1, (void**)&mode) <= 0) + continue; + if (strcmp(mode, "ehci-phy") == 0) + isc->port_mode[i] = EHCI_HCD_OMAP_MODE_PHY; + else if (strcmp(mode, "ehci-tll") == 0) + isc->port_mode[i] = EHCI_HCD_OMAP_MODE_TLL; + else if (strcmp(mode, "ehci-hsic") == 0) + isc->port_mode[i] = EHCI_HCD_OMAP_MODE_HSIC; + } + + /* Initialise the ECHI registers */ + err = omap_uhh_init(isc); + if (err) { + device_printf(dev, "Error: could not setup OMAP EHCI, %d\n", err); + goto error; + } + + simplebus_init(dev, node); + + /* + * Allow devices to identify. + */ + bus_generic_probe(dev); + + /* + * Now walk the OFW tree and attach top-level devices. + */ + for (node = OF_child(node); node > 0; node = OF_peer(node)) + simplebus_add_device(dev, node, 0, NULL, -1, NULL); + return (bus_generic_attach(dev)); + +error: + omap_uhh_detach(dev); + return (ENXIO); +} + +static int +omap_uhh_detach(device_t dev) +{ + struct omap_uhh_softc *isc = device_get_softc(dev); + + /* during module unload there are lots of children leftover */ + device_delete_children(dev); + + if (isc->uhh_mem_res) { + bus_release_resource(dev, SYS_RES_MEMORY, 0, isc->uhh_mem_res); + isc->uhh_mem_res = NULL; + } + + omap_uhh_fini(isc); + + return (0); +} + +static device_method_t omap_uhh_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, omap_uhh_probe), + DEVMETHOD(device_attach, omap_uhh_attach), + DEVMETHOD(device_detach, omap_uhh_detach), + + DEVMETHOD(device_suspend, bus_generic_suspend), + DEVMETHOD(device_resume, bus_generic_resume), + DEVMETHOD(device_shutdown, bus_generic_shutdown), + + DEVMETHOD_END +}; + +DEFINE_CLASS_1(omap_uhh, omap_uhh_driver, omap_uhh_methods, + sizeof(struct omap_uhh_softc), simplebus_driver); +static devclass_t omap_uhh_devclass; +DRIVER_MODULE(omap_uhh, simplebus, omap_uhh_driver, omap_uhh_devclass, 0, 0); diff --git a/sys/arm/ti/usb/omap_tll.c b/sys/arm/ti/usb/omap_tll.c new file mode 100644 index 000000000000..9bcb7d660a3d --- /dev/null +++ b/sys/arm/ti/usb/omap_tll.c @@ -0,0 +1,364 @@ +/*- + * Copyright (c) 2011 + * Ben Gray . + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + +#include +#include + +/* + * USB TLL Module + */ +#define OMAP_USBTLL_REVISION 0x0000 +#define OMAP_USBTLL_SYSCONFIG 0x0010 +#define OMAP_USBTLL_SYSSTATUS 0x0014 +#define OMAP_USBTLL_IRQSTATUS 0x0018 +#define OMAP_USBTLL_IRQENABLE 0x001C +#define OMAP_USBTLL_TLL_SHARED_CONF 0x0030 +#define OMAP_USBTLL_TLL_CHANNEL_CONF(i) (0x0040 + (0x04 * (i))) +#define OMAP_USBTLL_SAR_CNTX(i) (0x0400 + (0x04 * (i))) +#define OMAP_USBTLL_ULPI_VENDOR_ID_LO(i) (0x0800 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_VENDOR_ID_HI(i) (0x0801 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_PRODUCT_ID_LO(i) (0x0802 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_PRODUCT_ID_HI(i) (0x0803 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_FUNCTION_CTRL(i) (0x0804 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_FUNCTION_CTRL_SET(i) (0x0805 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_FUNCTION_CTRL_CLR(i) (0x0806 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_INTERFACE_CTRL(i) (0x0807 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_INTERFACE_CTRL_SET(i) (0x0808 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_INTERFACE_CTRL_CLR(i) (0x0809 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_OTG_CTRL(i) (0x080A + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_OTG_CTRL_SET(i) (0x080B + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_OTG_CTRL_CLR(i) (0x080C + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_USB_INT_EN_RISE(i) (0x080D + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_USB_INT_EN_RISE_SET(i) (0x080E + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_USB_INT_EN_RISE_CLR(i) (0x080F + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_USB_INT_EN_FALL(i) (0x0810 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_USB_INT_EN_FALL_SET(i) (0x0811 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_USB_INT_EN_FALL_CLR(i) (0x0812 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_USB_INT_STATUS(i) (0x0813 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_USB_INT_LATCH(i) (0x0814 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_DEBUG(i) (0x0815 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_SCRATCH_REGISTER(i) (0x0816 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_SCRATCH_REGISTER_SET(i) (0x0817 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_SCRATCH_REGISTER_CLR(i) (0x0818 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_EXTENDED_SET_ACCESS(i) (0x082F + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_UTMI_VCONTROL_EN(i) (0x0830 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_UTMI_VCONTROL_EN_SET(i) (0x0831 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_UTMI_VCONTROL_EN_CLR(i) (0x0832 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_UTMI_VCONTROL_STATUS(i) (0x0833 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_UTMI_VCONTROL_LATCH(i) (0x0834 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_UTMI_VSTATUS(i) (0x0835 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_UTMI_VSTATUS_SET(i) (0x0836 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_UTMI_VSTATUS_CLR(i) (0x0837 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_USB_INT_LATCH_NOCLR(i) (0x0838 + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_VENDOR_INT_EN(i) (0x083B + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_VENDOR_INT_EN_SET(i) (0x083C + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_VENDOR_INT_EN_CLR(i) (0x083D + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_VENDOR_INT_STATUS(i) (0x083E + (0x100 * (i))) +#define OMAP_USBTLL_ULPI_VENDOR_INT_LATCH(i) (0x083F + (0x100 * (i))) + +/* TLL Register Set */ +#define TLL_SYSCONFIG_CACTIVITY (1UL << 8) +#define TLL_SYSCONFIG_SIDLE_SMART_IDLE (2UL << 3) +#define TLL_SYSCONFIG_SIDLE_NO_IDLE (1UL << 3) +#define TLL_SYSCONFIG_SIDLE_FORCED_IDLE (0UL << 3) +#define TLL_SYSCONFIG_ENAWAKEUP (1UL << 2) +#define TLL_SYSCONFIG_SOFTRESET (1UL << 1) +#define TLL_SYSCONFIG_AUTOIDLE (1UL << 0) + +#define TLL_SYSSTATUS_RESETDONE (1UL << 0) + +#define TLL_SHARED_CONF_USB_90D_DDR_EN (1UL << 6) +#define TLL_SHARED_CONF_USB_180D_SDR_EN (1UL << 5) +#define TLL_SHARED_CONF_USB_DIVRATIO_MASK (7UL << 2) +#define TLL_SHARED_CONF_USB_DIVRATIO_128 (7UL << 2) +#define TLL_SHARED_CONF_USB_DIVRATIO_64 (6UL << 2) +#define TLL_SHARED_CONF_USB_DIVRATIO_32 (5UL << 2) +#define TLL_SHARED_CONF_USB_DIVRATIO_16 (4UL << 2) +#define TLL_SHARED_CONF_USB_DIVRATIO_8 (3UL << 2) +#define TLL_SHARED_CONF_USB_DIVRATIO_4 (2UL << 2) +#define TLL_SHARED_CONF_USB_DIVRATIO_2 (1UL << 2) +#define TLL_SHARED_CONF_USB_DIVRATIO_1 (0UL << 2) +#define TLL_SHARED_CONF_FCLK_REQ (1UL << 1) +#define TLL_SHARED_CONF_FCLK_IS_ON (1UL << 0) + +#define TLL_CHANNEL_CONF_DRVVBUS (1UL << 16) +#define TLL_CHANNEL_CONF_CHRGVBUS (1UL << 15) +#define TLL_CHANNEL_CONF_ULPINOBITSTUFF (1UL << 11) +#define TLL_CHANNEL_CONF_ULPIAUTOIDLE (1UL << 10) +#define TLL_CHANNEL_CONF_UTMIAUTOIDLE (1UL << 9) +#define TLL_CHANNEL_CONF_ULPIDDRMODE (1UL << 8) +#define TLL_CHANNEL_CONF_ULPIOUTCLKMODE (1UL << 7) +#define TLL_CHANNEL_CONF_TLLFULLSPEED (1UL << 6) +#define TLL_CHANNEL_CONF_TLLCONNECT (1UL << 5) +#define TLL_CHANNEL_CONF_TLLATTACH (1UL << 4) +#define TLL_CHANNEL_CONF_UTMIISADEV (1UL << 3) +#define TLL_CHANNEL_CONF_CHANEN (1UL << 0) + +struct omap_tll_softc { + device_t sc_dev; + + /* TLL register set */ + struct resource* tll_mem_res; + int tll_mem_rid; +}; + +static struct omap_tll_softc *omap_tll_sc; + +static int omap_tll_attach(device_t dev); +static int omap_tll_detach(device_t dev); + +static inline uint32_t +omap_tll_read_4(struct omap_tll_softc *sc, bus_size_t off) +{ + return bus_read_4(sc->tll_mem_res, off); +} + +static inline void +omap_tll_write_4(struct omap_tll_softc *sc, bus_size_t off, uint32_t val) +{ + bus_write_4(sc->tll_mem_res, off, val); +} + +void +omap_tll_utmi_enable(unsigned int en_mask) +{ + struct omap_tll_softc *sc; + unsigned int i; + uint32_t reg; + + sc = omap_tll_sc; + if (sc == NULL) + return; + + /* There are 3 TLL channels, one per USB controller so set them all up the + * same, SDR mode, bit stuffing and no autoidle. + */ + for (i=0; i<3; i++) { + reg = omap_tll_read_4(sc, OMAP_USBTLL_TLL_CHANNEL_CONF(i)); + + reg &= ~(TLL_CHANNEL_CONF_UTMIAUTOIDLE + | TLL_CHANNEL_CONF_ULPINOBITSTUFF + | TLL_CHANNEL_CONF_ULPIDDRMODE); + + omap_tll_write_4(sc, OMAP_USBTLL_TLL_CHANNEL_CONF(i), reg); + } + + /* Program the common TLL register */ + reg = omap_tll_read_4(sc, OMAP_USBTLL_TLL_SHARED_CONF); + + reg &= ~( TLL_SHARED_CONF_USB_90D_DDR_EN + | TLL_SHARED_CONF_USB_DIVRATIO_MASK); + reg |= ( TLL_SHARED_CONF_FCLK_IS_ON + | TLL_SHARED_CONF_USB_DIVRATIO_2 + | TLL_SHARED_CONF_USB_180D_SDR_EN); + + omap_tll_write_4(sc, OMAP_USBTLL_TLL_SHARED_CONF, reg); + + /* Enable channels now */ + for (i = 0; i < 3; i++) { + reg = omap_tll_read_4(sc, OMAP_USBTLL_TLL_CHANNEL_CONF(i)); + + /* Enable only the reg that is needed */ + if ((en_mask & (1 << i)) == 0) + continue; + + reg |= TLL_CHANNEL_CONF_CHANEN; + omap_tll_write_4(sc, OMAP_USBTLL_TLL_CHANNEL_CONF(i), reg); + } +} + +static int +omap_tll_init(struct omap_tll_softc *sc) +{ + unsigned long timeout; + int ret = 0; + + /* Enable the USB TLL */ + ti_prcm_clk_enable(USBTLL_CLK); + + /* Perform TLL soft reset, and wait until reset is complete */ + omap_tll_write_4(sc, OMAP_USBTLL_SYSCONFIG, TLL_SYSCONFIG_SOFTRESET); + + /* Set the timeout to 100ms*/ + timeout = (hz < 10) ? 1 : ((100 * hz) / 1000); + + /* Wait for TLL reset to complete */ + while ((omap_tll_read_4(sc, OMAP_USBTLL_SYSSTATUS) & + TLL_SYSSTATUS_RESETDONE) == 0x00) { + + /* Sleep for a tick */ + pause("USBRESET", 1); + + if (timeout-- == 0) { + device_printf(sc->sc_dev, "TLL reset operation timed out\n"); + ret = EINVAL; + goto err_sys_status; + } + } + + /* CLOCKACTIVITY = 1 : OCP-derived internal clocks ON during idle + * SIDLEMODE = 2 : Smart-idle mode. Sidleack asserted after Idlereq + * assertion when no more activity on the USB. + * ENAWAKEUP = 1 : Wakeup generation enabled + */ + omap_tll_write_4(sc, OMAP_USBTLL_SYSCONFIG, TLL_SYSCONFIG_ENAWAKEUP | + TLL_SYSCONFIG_AUTOIDLE | + TLL_SYSCONFIG_SIDLE_SMART_IDLE | + TLL_SYSCONFIG_CACTIVITY); + + return(0); + +err_sys_status: + /* Disable the TLL clocks */ + ti_prcm_clk_disable(USBTLL_CLK); + + return(ret); +} + +static void +omap_tll_disable(struct omap_tll_softc *sc) +{ + unsigned long timeout; + + timeout = (hz < 10) ? 1 : ((100 * hz) / 1000); + + /* Reset the TLL module */ + omap_tll_write_4(sc, OMAP_USBTLL_SYSCONFIG, 0x0002); + while ((omap_tll_read_4(sc, OMAP_USBTLL_SYSSTATUS) & (0x01)) == 0x00) { + /* Sleep for a tick */ + pause("USBRESET", 1); + + if (timeout-- == 0) { + device_printf(sc->sc_dev, "operation timed out\n"); + break; + } + } + + /* Disable functional and interface clocks for the TLL and HOST modules */ + ti_prcm_clk_disable(USBTLL_CLK); +} + +static int +omap_tll_probe(device_t dev) +{ + + if (!ofw_bus_status_okay(dev)) + return (ENXIO); + + if (!ofw_bus_is_compatible(dev, "ti,usbhs-tll")) + return (ENXIO); + + device_set_desc(dev, "TI OMAP USB 2.0 TLL module"); + + return (BUS_PROBE_DEFAULT); +} + +static int +omap_tll_attach(device_t dev) +{ + struct omap_tll_softc *sc; + + sc = device_get_softc(dev); + /* save the device */ + sc->sc_dev = dev; + + /* Allocate resource for the TLL register set */ + sc->tll_mem_rid = 0; + sc->tll_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, + &sc->tll_mem_rid, RF_ACTIVE); + if (!sc->tll_mem_res) { + device_printf(dev, "Error: Could not map TLL memory\n"); + goto error; + } + + omap_tll_init(sc); + + omap_tll_sc = sc; + + return (0); + +error: + omap_tll_detach(dev); + return (ENXIO); +} + +static int +omap_tll_detach(device_t dev) +{ + struct omap_tll_softc *sc; + + sc = device_get_softc(dev); + omap_tll_disable(sc); + + /* Release the other register set memory maps */ + if (sc->tll_mem_res) { + bus_release_resource(dev, SYS_RES_MEMORY, + sc->tll_mem_rid, sc->tll_mem_res); + sc->tll_mem_res = NULL; + } + + omap_tll_sc = NULL; + + return (0); +} + +static device_method_t omap_tll_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, omap_tll_probe), + DEVMETHOD(device_attach, omap_tll_attach), + DEVMETHOD(device_detach, omap_tll_detach), + DEVMETHOD(device_suspend, bus_generic_suspend), + DEVMETHOD(device_resume, bus_generic_resume), + DEVMETHOD(device_shutdown, bus_generic_shutdown), + + {0, 0} +}; + +static driver_t omap_tll_driver = { + "omap_tll", + omap_tll_methods, + sizeof(struct omap_tll_softc), +}; + +static devclass_t omap_tll_devclass; + +DRIVER_MODULE(omap_tll, simplebus, omap_tll_driver, omap_tll_devclass, 0, 0); diff --git a/sys/arm/ti/usb/omap_usb.h b/sys/arm/ti/usb/omap_usb.h index bea795748dcd..d6950d6483cb 100644 --- a/sys/arm/ti/usb/omap_usb.h +++ b/sys/arm/ti/usb/omap_usb.h @@ -35,230 +35,14 @@ #ifndef _OMAP_USB_H_ #define _OMAP_USB_H_ -/* - * USB TTL Module - */ -#define OMAP_USBTLL_REVISION 0x0000 -#define OMAP_USBTLL_SYSCONFIG 0x0010 -#define OMAP_USBTLL_SYSSTATUS 0x0014 -#define OMAP_USBTLL_IRQSTATUS 0x0018 -#define OMAP_USBTLL_IRQENABLE 0x001C -#define OMAP_USBTLL_TLL_SHARED_CONF 0x0030 -#define OMAP_USBTLL_TLL_CHANNEL_CONF(i) (0x0040 + (0x04 * (i))) -#define OMAP_USBTLL_SAR_CNTX(i) (0x0400 + (0x04 * (i))) -#define OMAP_USBTLL_ULPI_VENDOR_ID_LO(i) (0x0800 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_VENDOR_ID_HI(i) (0x0801 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_PRODUCT_ID_LO(i) (0x0802 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_PRODUCT_ID_HI(i) (0x0803 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_FUNCTION_CTRL(i) (0x0804 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_FUNCTION_CTRL_SET(i) (0x0805 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_FUNCTION_CTRL_CLR(i) (0x0806 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_INTERFACE_CTRL(i) (0x0807 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_INTERFACE_CTRL_SET(i) (0x0808 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_INTERFACE_CTRL_CLR(i) (0x0809 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_OTG_CTRL(i) (0x080A + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_OTG_CTRL_SET(i) (0x080B + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_OTG_CTRL_CLR(i) (0x080C + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_USB_INT_EN_RISE(i) (0x080D + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_USB_INT_EN_RISE_SET(i) (0x080E + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_USB_INT_EN_RISE_CLR(i) (0x080F + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_USB_INT_EN_FALL(i) (0x0810 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_USB_INT_EN_FALL_SET(i) (0x0811 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_USB_INT_EN_FALL_CLR(i) (0x0812 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_USB_INT_STATUS(i) (0x0813 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_USB_INT_LATCH(i) (0x0814 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_DEBUG(i) (0x0815 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_SCRATCH_REGISTER(i) (0x0816 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_SCRATCH_REGISTER_SET(i) (0x0817 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_SCRATCH_REGISTER_CLR(i) (0x0818 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_EXTENDED_SET_ACCESS(i) (0x082F + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_UTMI_VCONTROL_EN(i) (0x0830 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_UTMI_VCONTROL_EN_SET(i) (0x0831 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_UTMI_VCONTROL_EN_CLR(i) (0x0832 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_UTMI_VCONTROL_STATUS(i) (0x0833 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_UTMI_VCONTROL_LATCH(i) (0x0834 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_UTMI_VSTATUS(i) (0x0835 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_UTMI_VSTATUS_SET(i) (0x0836 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_UTMI_VSTATUS_CLR(i) (0x0837 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_USB_INT_LATCH_NOCLR(i) (0x0838 + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_VENDOR_INT_EN(i) (0x083B + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_VENDOR_INT_EN_SET(i) (0x083C + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_VENDOR_INT_EN_CLR(i) (0x083D + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_VENDOR_INT_STATUS(i) (0x083E + (0x100 * (i))) -#define OMAP_USBTLL_ULPI_VENDOR_INT_LATCH(i) (0x083F + (0x100 * (i))) - - -/* - * USB Host Module - */ - -/* UHH */ -#define OMAP_USBHOST_UHH_REVISION 0x0000 -#define OMAP_USBHOST_UHH_SYSCONFIG 0x0010 -#define OMAP_USBHOST_UHH_SYSSTATUS 0x0014 -#define OMAP_USBHOST_UHH_HOSTCONFIG 0x0040 -#define OMAP_USBHOST_UHH_DEBUG_CSR 0x0044 - -/* EHCI */ -#define OMAP_USBHOST_HCCAPBASE 0x0000 -#define OMAP_USBHOST_HCSPARAMS 0x0004 -#define OMAP_USBHOST_HCCPARAMS 0x0008 -#define OMAP_USBHOST_USBCMD 0x0010 -#define OMAP_USBHOST_USBSTS 0x0014 -#define OMAP_USBHOST_USBINTR 0x0018 -#define OMAP_USBHOST_FRINDEX 0x001C -#define OMAP_USBHOST_CTRLDSSEGMENT 0x0020 -#define OMAP_USBHOST_PERIODICLISTBASE 0x0024 -#define OMAP_USBHOST_ASYNCLISTADDR 0x0028 -#define OMAP_USBHOST_CONFIGFLAG 0x0050 -#define OMAP_USBHOST_PORTSC(i) (0x0054 + (0x04 * (i))) -#define OMAP_USBHOST_INSNREG00 0x0090 -#define OMAP_USBHOST_INSNREG01 0x0094 -#define OMAP_USBHOST_INSNREG02 0x0098 -#define OMAP_USBHOST_INSNREG03 0x009C -#define OMAP_USBHOST_INSNREG04 0x00A0 -#define OMAP_USBHOST_INSNREG05_UTMI 0x00A4 -#define OMAP_USBHOST_INSNREG05_ULPI 0x00A4 -#define OMAP_USBHOST_INSNREG06 0x00A8 -#define OMAP_USBHOST_INSNREG07 0x00AC -#define OMAP_USBHOST_INSNREG08 0x00B0 - -#define OMAP_USBHOST_INSNREG04_DISABLE_UNSUSPEND (1 << 5) - -#define OMAP_USBHOST_INSNREG05_ULPI_CONTROL_SHIFT 31 -#define OMAP_USBHOST_INSNREG05_ULPI_PORTSEL_SHIFT 24 -#define OMAP_USBHOST_INSNREG05_ULPI_OPSEL_SHIFT 22 -#define OMAP_USBHOST_INSNREG05_ULPI_REGADD_SHIFT 16 -#define OMAP_USBHOST_INSNREG05_ULPI_EXTREGADD_SHIFT 8 -#define OMAP_USBHOST_INSNREG05_ULPI_WRDATA_SHIFT 0 - - - - - -/* TLL Register Set */ -#define TLL_SYSCONFIG_CACTIVITY (1UL << 8) -#define TLL_SYSCONFIG_SIDLE_SMART_IDLE (2UL << 3) -#define TLL_SYSCONFIG_SIDLE_NO_IDLE (1UL << 3) -#define TLL_SYSCONFIG_SIDLE_FORCED_IDLE (0UL << 3) -#define TLL_SYSCONFIG_ENAWAKEUP (1UL << 2) -#define TLL_SYSCONFIG_SOFTRESET (1UL << 1) -#define TLL_SYSCONFIG_AUTOIDLE (1UL << 0) - -#define TLL_SYSSTATUS_RESETDONE (1UL << 0) - -#define TLL_SHARED_CONF_USB_90D_DDR_EN (1UL << 6) -#define TLL_SHARED_CONF_USB_180D_SDR_EN (1UL << 5) -#define TLL_SHARED_CONF_USB_DIVRATIO_MASK (7UL << 2) -#define TLL_SHARED_CONF_USB_DIVRATIO_128 (7UL << 2) -#define TLL_SHARED_CONF_USB_DIVRATIO_64 (6UL << 2) -#define TLL_SHARED_CONF_USB_DIVRATIO_32 (5UL << 2) -#define TLL_SHARED_CONF_USB_DIVRATIO_16 (4UL << 2) -#define TLL_SHARED_CONF_USB_DIVRATIO_8 (3UL << 2) -#define TLL_SHARED_CONF_USB_DIVRATIO_4 (2UL << 2) -#define TLL_SHARED_CONF_USB_DIVRATIO_2 (1UL << 2) -#define TLL_SHARED_CONF_USB_DIVRATIO_1 (0UL << 2) -#define TLL_SHARED_CONF_FCLK_REQ (1UL << 1) -#define TLL_SHARED_CONF_FCLK_IS_ON (1UL << 0) - -#define TLL_CHANNEL_CONF_DRVVBUS (1UL << 16) -#define TLL_CHANNEL_CONF_CHRGVBUS (1UL << 15) -#define TLL_CHANNEL_CONF_ULPINOBITSTUFF (1UL << 11) -#define TLL_CHANNEL_CONF_ULPIAUTOIDLE (1UL << 10) -#define TLL_CHANNEL_CONF_UTMIAUTOIDLE (1UL << 9) -#define TLL_CHANNEL_CONF_ULPIDDRMODE (1UL << 8) -#define TLL_CHANNEL_CONF_ULPIOUTCLKMODE (1UL << 7) -#define TLL_CHANNEL_CONF_TLLFULLSPEED (1UL << 6) -#define TLL_CHANNEL_CONF_TLLCONNECT (1UL << 5) -#define TLL_CHANNEL_CONF_TLLATTACH (1UL << 4) -#define TLL_CHANNEL_CONF_UTMIISADEV (1UL << 3) -#define TLL_CHANNEL_CONF_CHANEN (1UL << 0) - - -/* UHH Register Set */ -#define UHH_SYSCONFIG_MIDLEMODE_MASK (3UL << 12) -#define UHH_SYSCONFIG_MIDLEMODE_SMARTSTANDBY (2UL << 12) -#define UHH_SYSCONFIG_MIDLEMODE_NOSTANDBY (1UL << 12) -#define UHH_SYSCONFIG_MIDLEMODE_FORCESTANDBY (0UL << 12) -#define UHH_SYSCONFIG_CLOCKACTIVITY (1UL << 8) -#define UHH_SYSCONFIG_SIDLEMODE_MASK (3UL << 3) -#define UHH_SYSCONFIG_SIDLEMODE_SMARTIDLE (2UL << 3) -#define UHH_SYSCONFIG_SIDLEMODE_NOIDLE (1UL << 3) -#define UHH_SYSCONFIG_SIDLEMODE_FORCEIDLE (0UL << 3) -#define UHH_SYSCONFIG_ENAWAKEUP (1UL << 2) -#define UHH_SYSCONFIG_SOFTRESET (1UL << 1) -#define UHH_SYSCONFIG_AUTOIDLE (1UL << 0) - -#define UHH_HOSTCONFIG_APP_START_CLK (1UL << 31) -#define UHH_HOSTCONFIG_P3_CONNECT_STATUS (1UL << 10) -#define UHH_HOSTCONFIG_P2_CONNECT_STATUS (1UL << 9) -#define UHH_HOSTCONFIG_P1_CONNECT_STATUS (1UL << 8) -#define UHH_HOSTCONFIG_ENA_INCR_ALIGN (1UL << 5) -#define UHH_HOSTCONFIG_ENA_INCR16 (1UL << 4) -#define UHH_HOSTCONFIG_ENA_INCR8 (1UL << 3) -#define UHH_HOSTCONFIG_ENA_INCR4 (1UL << 2) -#define UHH_HOSTCONFIG_AUTOPPD_ON_OVERCUR_EN (1UL << 1) -#define UHH_HOSTCONFIG_P1_ULPI_BYPASS (1UL << 0) - -/* The following are on rev2 (OMAP44xx) of the EHCI only */ -#define UHH_SYSCONFIG_IDLEMODE_MASK (3UL << 2) -#define UHH_SYSCONFIG_IDLEMODE_NOIDLE (1UL << 2) -#define UHH_SYSCONFIG_STANDBYMODE_MASK (3UL << 4) -#define UHH_SYSCONFIG_STANDBYMODE_NOSTDBY (1UL << 4) - -#define UHH_HOSTCONFIG_P1_MODE_MASK (3UL << 16) -#define UHH_HOSTCONFIG_P1_MODE_ULPI_PHY (0UL << 16) -#define UHH_HOSTCONFIG_P1_MODE_UTMI_PHY (1UL << 16) -#define UHH_HOSTCONFIG_P1_MODE_HSIC (3UL << 16) -#define UHH_HOSTCONFIG_P2_MODE_MASK (3UL << 18) -#define UHH_HOSTCONFIG_P2_MODE_ULPI_PHY (0UL << 18) -#define UHH_HOSTCONFIG_P2_MODE_UTMI_PHY (1UL << 18) -#define UHH_HOSTCONFIG_P2_MODE_HSIC (3UL << 18) - -#define ULPI_FUNC_CTRL_RESET (1 << 5) - -/*-------------------------------------------------------------------------*/ - -/* - * Macros for Set and Clear - * See ULPI 1.1 specification to find the registers with Set and Clear offsets - */ -#define ULPI_SET(a) (a + 1) -#define ULPI_CLR(a) (a + 2) - -/*-------------------------------------------------------------------------*/ - -/* - * Register Map - */ -#define ULPI_VENDOR_ID_LOW 0x00 -#define ULPI_VENDOR_ID_HIGH 0x01 -#define ULPI_PRODUCT_ID_LOW 0x02 -#define ULPI_PRODUCT_ID_HIGH 0x03 -#define ULPI_FUNC_CTRL 0x04 -#define ULPI_IFC_CTRL 0x07 -#define ULPI_OTG_CTRL 0x0a -#define ULPI_USB_INT_EN_RISE 0x0d -#define ULPI_USB_INT_EN_FALL 0x10 -#define ULPI_USB_INT_STS 0x13 -#define ULPI_USB_INT_LATCH 0x14 -#define ULPI_DEBUG 0x15 -#define ULPI_SCRATCH 0x16 - -/* - * Values of UHH_REVISION - Note: these are not given in the TRM but taken - * from the linux OMAP EHCI driver (thanks guys). It has been verified on - * a Panda and Beagle board. - */ -#define OMAP_EHCI_REV1 0x00000010 /* OMAP3 */ -#define OMAP_EHCI_REV2 0x50700100 /* OMAP4 */ - -#define EHCI_VENDORID_OMAP3 0x42fa05 -#define OMAP_EHCI_HC_DEVSTR "TI OMAP USB 2.0 controller" +#define OMAP_HS_USB_PORTS 3 #define EHCI_HCD_OMAP_MODE_UNKNOWN 0 #define EHCI_HCD_OMAP_MODE_PHY 1 #define EHCI_HCD_OMAP_MODE_TLL 2 #define EHCI_HCD_OMAP_MODE_HSIC 3 +void omap_tll_utmi_enable(unsigned int en_mask); +int omap_usb_port_mode(device_t dev, int port); + #endif /* _OMAP_USB_H_ */ diff --git a/sys/arm/xilinx/files.zynq7 b/sys/arm/xilinx/files.zynq7 index be3e59973ae6..90fa7ef8df40 100644 --- a/sys/arm/xilinx/files.zynq7 +++ b/sys/arm/xilinx/files.zynq7 @@ -9,7 +9,6 @@ arm/arm/bus_space_base.c standard arm/arm/bus_space_generic.c standard arm/arm/bus_space_asm_generic.S standard -arm/arm/gic.c standard arm/arm/mpcore_timer.c standard arm/arm/pl310.c standard diff --git a/sys/arm64/arm64/busdma_bounce.c b/sys/arm64/arm64/busdma_bounce.c new file mode 100644 index 000000000000..477c819c8166 --- /dev/null +++ b/sys/arm64/arm64/busdma_bounce.c @@ -0,0 +1,1080 @@ +/*- + * Copyright (c) 1997, 1998 Justin T. Gibbs. + * Copyright (c) 2015 The FreeBSD Foundation + * All rights reserved. + * + * Portions of this software were developed by Semihalf + * under sponsorship of the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions, and the following disclaimer, + * without modification, immediately at the beginning of the file. + * 2. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#define MAX_BPAGES 4096 + +enum { + BUS_DMA_COULD_BOUNCE = 0x01, + BUS_DMA_MIN_ALLOC_COMP = 0x02, + BUS_DMA_KMEM_ALLOC = 0x04, +}; + +struct bounce_zone; + +struct bus_dma_tag { + struct bus_dma_tag_common common; + int map_count; + int bounce_flags; + bus_dma_segment_t *segments; + struct bounce_zone *bounce_zone; +}; + +struct bounce_page { + vm_offset_t vaddr; /* kva of bounce buffer */ + bus_addr_t busaddr; /* Physical address */ + vm_offset_t datavaddr; /* kva of client data */ + bus_addr_t dataaddr; /* client physical address */ + bus_size_t datacount; /* client data count */ + STAILQ_ENTRY(bounce_page) links; +}; + +int busdma_swi_pending; + +struct bounce_zone { + STAILQ_ENTRY(bounce_zone) links; + STAILQ_HEAD(bp_list, bounce_page) bounce_page_list; + int total_bpages; + int free_bpages; + int reserved_bpages; + int active_bpages; + int total_bounced; + int total_deferred; + int map_count; + bus_size_t alignment; + bus_addr_t lowaddr; + char zoneid[8]; + char lowaddrid[20]; + struct sysctl_ctx_list sysctl_tree; + struct sysctl_oid *sysctl_tree_top; +}; + +static struct mtx bounce_lock; +static int total_bpages; +static int busdma_zonecount; +static STAILQ_HEAD(, bounce_zone) bounce_zone_list; + +static SYSCTL_NODE(_hw, OID_AUTO, busdma, CTLFLAG_RD, 0, "Busdma parameters"); +SYSCTL_INT(_hw_busdma, OID_AUTO, total_bpages, CTLFLAG_RD, &total_bpages, 0, + "Total bounce pages"); + +struct bus_dmamap { + struct bp_list bpages; + int pagesneeded; + int pagesreserved; + bus_dma_tag_t dmat; + struct memdesc mem; + bus_dmamap_callback_t *callback; + void *callback_arg; + STAILQ_ENTRY(bus_dmamap) links; +}; + +static STAILQ_HEAD(, bus_dmamap) bounce_map_waitinglist; +static STAILQ_HEAD(, bus_dmamap) bounce_map_callbacklist; +static struct bus_dmamap nobounce_dmamap; + +static void init_bounce_pages(void *dummy); +static int alloc_bounce_zone(bus_dma_tag_t dmat); +static int alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages); +static int reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, + int commit); +static bus_addr_t add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, + vm_offset_t vaddr, bus_addr_t addr, bus_size_t size); +static void free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage); +int run_filter(bus_dma_tag_t dmat, bus_addr_t paddr); +static void _bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, + pmap_t pmap, void *buf, bus_size_t buflen, int flags); +static void _bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map, + vm_paddr_t buf, bus_size_t buflen, int flags); +static int _bus_dmamap_reserve_pages(bus_dma_tag_t dmat, bus_dmamap_t map, + int flags); + +/* + * Allocate a device specific dma_tag. + */ +static int +bounce_bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment, + bus_addr_t boundary, bus_addr_t lowaddr, bus_addr_t highaddr, + bus_dma_filter_t *filter, void *filterarg, bus_size_t maxsize, + int nsegments, bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc, + void *lockfuncarg, bus_dma_tag_t *dmat) +{ + bus_dma_tag_t newtag; + int error; + + *dmat = NULL; + error = common_bus_dma_tag_create(parent != NULL ? &parent->common : + NULL, alignment, boundary, lowaddr, highaddr, filter, filterarg, + maxsize, nsegments, maxsegsz, flags, lockfunc, lockfuncarg, + sizeof (struct bus_dma_tag), (void **)&newtag); + if (error != 0) + return (error); + + newtag->common.impl = &bus_dma_bounce_impl; + newtag->map_count = 0; + newtag->segments = NULL; + + if (parent != NULL && ((newtag->common.filter != NULL) || + ((parent->bounce_flags & BUS_DMA_COULD_BOUNCE) != 0))) + newtag->bounce_flags |= BUS_DMA_COULD_BOUNCE; + + if (newtag->common.lowaddr < ptoa((vm_paddr_t)Maxmem) || + newtag->common.alignment > 1) + newtag->bounce_flags |= BUS_DMA_COULD_BOUNCE; + + if (((newtag->bounce_flags & BUS_DMA_COULD_BOUNCE) != 0) && + (flags & BUS_DMA_ALLOCNOW) != 0) { + struct bounce_zone *bz; + + /* Must bounce */ + if ((error = alloc_bounce_zone(newtag)) != 0) { + free(newtag, M_DEVBUF); + return (error); + } + bz = newtag->bounce_zone; + + if (ptoa(bz->total_bpages) < maxsize) { + int pages; + + pages = atop(maxsize) - bz->total_bpages; + + /* Add pages to our bounce pool */ + if (alloc_bounce_pages(newtag, pages) < pages) + error = ENOMEM; + } + /* Performed initial allocation */ + newtag->bounce_flags |= BUS_DMA_MIN_ALLOC_COMP; + } else + error = 0; + + if (error != 0) + free(newtag, M_DEVBUF); + else + *dmat = newtag; + CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d", + __func__, newtag, (newtag != NULL ? newtag->common.flags : 0), + error); + return (error); +} + +static int +bounce_bus_dma_tag_destroy(bus_dma_tag_t dmat) +{ + bus_dma_tag_t dmat_copy, parent; + int error; + + error = 0; + dmat_copy = dmat; + + if (dmat != NULL) { + if (dmat->map_count != 0) { + error = EBUSY; + goto out; + } + while (dmat != NULL) { + parent = (bus_dma_tag_t)dmat->common.parent; + atomic_subtract_int(&dmat->common.ref_count, 1); + if (dmat->common.ref_count == 0) { + if (dmat->segments != NULL) + free(dmat->segments, M_DEVBUF); + free(dmat, M_DEVBUF); + /* + * Last reference count, so + * release our reference + * count on our parent. + */ + dmat = parent; + } else + dmat = NULL; + } + } +out: + CTR3(KTR_BUSDMA, "%s tag %p error %d", __func__, dmat_copy, error); + return (error); +} + +/* + * Allocate a handle for mapping from kva/uva/physical + * address space into bus device space. + */ +static int +bounce_bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp) +{ + struct bounce_zone *bz; + int error, maxpages, pages; + + error = 0; + + if (dmat->segments == NULL) { + dmat->segments = (bus_dma_segment_t *)malloc( + sizeof(bus_dma_segment_t) * dmat->common.nsegments, + M_DEVBUF, M_NOWAIT); + if (dmat->segments == NULL) { + CTR3(KTR_BUSDMA, "%s: tag %p error %d", + __func__, dmat, ENOMEM); + return (ENOMEM); + } + } + + /* + * Bouncing might be required if the driver asks for an active + * exclusion region, a data alignment that is stricter than 1, and/or + * an active address boundary. + */ + if (dmat->bounce_flags & BUS_DMA_COULD_BOUNCE) { + /* Must bounce */ + if (dmat->bounce_zone == NULL) { + if ((error = alloc_bounce_zone(dmat)) != 0) + return (error); + } + bz = dmat->bounce_zone; + + *mapp = (bus_dmamap_t)malloc(sizeof(**mapp), M_DEVBUF, + M_NOWAIT | M_ZERO); + if (*mapp == NULL) { + CTR3(KTR_BUSDMA, "%s: tag %p error %d", + __func__, dmat, ENOMEM); + return (ENOMEM); + } + + /* Initialize the new map */ + STAILQ_INIT(&((*mapp)->bpages)); + + /* + * Attempt to add pages to our pool on a per-instance + * basis up to a sane limit. + */ + if (dmat->common.alignment > 1) + maxpages = MAX_BPAGES; + else + maxpages = MIN(MAX_BPAGES, Maxmem - + atop(dmat->common.lowaddr)); + if ((dmat->bounce_flags & BUS_DMA_MIN_ALLOC_COMP) == 0 || + (bz->map_count > 0 && bz->total_bpages < maxpages)) { + pages = MAX(atop(dmat->common.maxsize), 1); + pages = MIN(maxpages - bz->total_bpages, pages); + pages = MAX(pages, 1); + if (alloc_bounce_pages(dmat, pages) < pages) + error = ENOMEM; + if ((dmat->bounce_flags & BUS_DMA_MIN_ALLOC_COMP) + == 0) { + if (error == 0) { + dmat->bounce_flags |= + BUS_DMA_MIN_ALLOC_COMP; + } + } else + error = 0; + } + bz->map_count++; + } else { + *mapp = NULL; + } + if (error == 0) + dmat->map_count++; + CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", + __func__, dmat, dmat->common.flags, error); + return (error); +} + +/* + * Destroy a handle for mapping from kva/uva/physical + * address space into bus device space. + */ +static int +bounce_bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map) +{ + + if (map != NULL && map != &nobounce_dmamap) { + if (STAILQ_FIRST(&map->bpages) != NULL) { + CTR3(KTR_BUSDMA, "%s: tag %p error %d", + __func__, dmat, EBUSY); + return (EBUSY); + } + if (dmat->bounce_zone) + dmat->bounce_zone->map_count--; + free(map, M_DEVBUF); + } + dmat->map_count--; + CTR2(KTR_BUSDMA, "%s: tag %p error 0", __func__, dmat); + return (0); +} + + +/* + * Allocate a piece of memory that can be efficiently mapped into + * bus device space based on the constraints lited in the dma tag. + * A dmamap to for use with dmamap_load is also allocated. + */ +static int +bounce_bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags, + bus_dmamap_t *mapp) +{ + /* + * XXX ARM64TODO: + * This bus_dma implementation requires IO-Coherent architecutre. + * If IO-Coherency is not guaranteed, the BUS_DMA_COHERENT flag has + * to be implented using non-cacheable memory. + */ + + vm_memattr_t attr; + int mflags; + + if (flags & BUS_DMA_NOWAIT) + mflags = M_NOWAIT; + else + mflags = M_WAITOK; + + /* If we succeed, no mapping/bouncing will be required */ + *mapp = NULL; + + if (dmat->segments == NULL) { + dmat->segments = (bus_dma_segment_t *)malloc( + sizeof(bus_dma_segment_t) * dmat->common.nsegments, + M_DEVBUF, mflags); + if (dmat->segments == NULL) { + CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", + __func__, dmat, dmat->common.flags, ENOMEM); + return (ENOMEM); + } + } + if (flags & BUS_DMA_ZERO) + mflags |= M_ZERO; + if (flags & BUS_DMA_NOCACHE) + attr = VM_MEMATTR_UNCACHEABLE; + else + attr = VM_MEMATTR_DEFAULT; + + /* + * XXX: + * (dmat->alignment < dmat->maxsize) is just a quick hack; the exact + * alignment guarantees of malloc need to be nailed down, and the + * code below should be rewritten to take that into account. + * + * In the meantime, we'll warn the user if malloc gets it wrong. + */ + if ((dmat->common.maxsize <= PAGE_SIZE) && + (dmat->common.alignment < dmat->common.maxsize) && + dmat->common.lowaddr >= ptoa((vm_paddr_t)Maxmem) && + attr == VM_MEMATTR_DEFAULT) { + *vaddr = malloc(dmat->common.maxsize, M_DEVBUF, mflags); + } else if (dmat->common.nsegments >= btoc(dmat->common.maxsize) && + dmat->common.alignment <= PAGE_SIZE && + (dmat->common.boundary == 0 || + dmat->common.boundary >= dmat->common.lowaddr)) { + /* Page-based multi-segment allocations allowed */ + *vaddr = (void *)kmem_alloc_attr(kernel_arena, + dmat->common.maxsize, mflags, 0ul, dmat->common.lowaddr, + attr); + dmat->bounce_flags |= BUS_DMA_KMEM_ALLOC; + } else { + *vaddr = (void *)kmem_alloc_contig(kernel_arena, + dmat->common.maxsize, mflags, 0ul, dmat->common.lowaddr, + dmat->common.alignment != 0 ? dmat->common.alignment : 1ul, + dmat->common.boundary, attr); + dmat->bounce_flags |= BUS_DMA_KMEM_ALLOC; + } + if (*vaddr == NULL) { + CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", + __func__, dmat, dmat->common.flags, ENOMEM); + return (ENOMEM); + } else if (vtophys(*vaddr) & (dmat->common.alignment - 1)) { + printf("bus_dmamem_alloc failed to align memory properly.\n"); + } + CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", + __func__, dmat, dmat->common.flags, 0); + return (0); +} + +/* + * Free a piece of memory and it's allociated dmamap, that was allocated + * via bus_dmamem_alloc. Make the same choice for free/contigfree. + */ +static void +bounce_bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map) +{ + /* + * dmamem does not need to be bounced, so the map should be + * NULL and the BUS_DMA_KMEM_ALLOC flag cleared if malloc() + * was used and set if kmem_alloc_contig() was used. + */ + if (map != NULL) + panic("bus_dmamem_free: Invalid map freed\n"); + if ((dmat->bounce_flags & BUS_DMA_KMEM_ALLOC) == 0) + free(vaddr, M_DEVBUF); + else + kmem_free(kernel_arena, (vm_offset_t)vaddr, + dmat->common.maxsize); + CTR3(KTR_BUSDMA, "%s: tag %p flags 0x%x", __func__, dmat, + dmat->bounce_flags); +} + +static void +_bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t buf, + bus_size_t buflen, int flags) +{ + bus_addr_t curaddr; + bus_size_t sgsize; + + if ((map != &nobounce_dmamap && map->pagesneeded == 0)) { + /* + * Count the number of bounce pages + * needed in order to complete this transfer + */ + curaddr = buf; + while (buflen != 0) { + sgsize = MIN(buflen, dmat->common.maxsegsz); + if (bus_dma_run_filter(&dmat->common, curaddr)) { + sgsize = MIN(sgsize, PAGE_SIZE); + map->pagesneeded++; + } + curaddr += sgsize; + buflen -= sgsize; + } + CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded); + } +} + +static void +_bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, pmap_t pmap, + void *buf, bus_size_t buflen, int flags) +{ + vm_offset_t vaddr; + vm_offset_t vendaddr; + bus_addr_t paddr; + bus_size_t sg_len; + + if ((map != &nobounce_dmamap && map->pagesneeded == 0)) { + CTR4(KTR_BUSDMA, "lowaddr= %d Maxmem= %d, boundary= %d, " + "alignment= %d", dmat->common.lowaddr, + ptoa((vm_paddr_t)Maxmem), + dmat->common.boundary, dmat->common.alignment); + CTR3(KTR_BUSDMA, "map= %p, nobouncemap= %p, pagesneeded= %d", + map, &nobounce_dmamap, map->pagesneeded); + /* + * Count the number of bounce pages + * needed in order to complete this transfer + */ + vaddr = (vm_offset_t)buf; + vendaddr = (vm_offset_t)buf + buflen; + + while (vaddr < vendaddr) { + sg_len = PAGE_SIZE - ((vm_offset_t)vaddr & PAGE_MASK); + if (pmap == kernel_pmap) + paddr = pmap_kextract(vaddr); + else + paddr = pmap_extract(pmap, vaddr); + if (bus_dma_run_filter(&dmat->common, paddr) != 0) { + sg_len = roundup2(sg_len, + dmat->common.alignment); + map->pagesneeded++; + } + vaddr += sg_len; + } + CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded); + } +} + +static int +_bus_dmamap_reserve_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int flags) +{ + + /* Reserve Necessary Bounce Pages */ + mtx_lock(&bounce_lock); + if (flags & BUS_DMA_NOWAIT) { + if (reserve_bounce_pages(dmat, map, 0) != 0) { + mtx_unlock(&bounce_lock); + return (ENOMEM); + } + } else { + if (reserve_bounce_pages(dmat, map, 1) != 0) { + /* Queue us for resources */ + STAILQ_INSERT_TAIL(&bounce_map_waitinglist, map, links); + mtx_unlock(&bounce_lock); + return (EINPROGRESS); + } + } + mtx_unlock(&bounce_lock); + + return (0); +} + +/* + * Add a single contiguous physical range to the segment list. + */ +static int +_bus_dmamap_addseg(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t curaddr, + bus_size_t sgsize, bus_dma_segment_t *segs, int *segp) +{ + bus_addr_t baddr, bmask; + int seg; + + /* + * Make sure we don't cross any boundaries. + */ + bmask = ~(dmat->common.boundary - 1); + if (dmat->common.boundary > 0) { + baddr = (curaddr + dmat->common.boundary) & bmask; + if (sgsize > (baddr - curaddr)) + sgsize = (baddr - curaddr); + } + + /* + * Insert chunk into a segment, coalescing with + * previous segment if possible. + */ + seg = *segp; + if (seg == -1) { + seg = 0; + segs[seg].ds_addr = curaddr; + segs[seg].ds_len = sgsize; + } else { + if (curaddr == segs[seg].ds_addr + segs[seg].ds_len && + (segs[seg].ds_len + sgsize) <= dmat->common.maxsegsz && + (dmat->common.boundary == 0 || + (segs[seg].ds_addr & bmask) == (curaddr & bmask))) + segs[seg].ds_len += sgsize; + else { + if (++seg >= dmat->common.nsegments) + return (0); + segs[seg].ds_addr = curaddr; + segs[seg].ds_len = sgsize; + } + } + *segp = seg; + return (sgsize); +} + +/* + * Utility function to load a physical buffer. segp contains + * the starting segment on entrace, and the ending segment on exit. + */ +static int +bounce_bus_dmamap_load_phys(bus_dma_tag_t dmat, bus_dmamap_t map, + vm_paddr_t buf, bus_size_t buflen, int flags, bus_dma_segment_t *segs, + int *segp) +{ + bus_size_t sgsize; + bus_addr_t curaddr; + int error; + + if (map == NULL) + map = &nobounce_dmamap; + + if (segs == NULL) + segs = dmat->segments; + + if ((dmat->bounce_flags & BUS_DMA_COULD_BOUNCE) != 0) { + _bus_dmamap_count_phys(dmat, map, buf, buflen, flags); + if (map->pagesneeded != 0) { + error = _bus_dmamap_reserve_pages(dmat, map, flags); + if (error) + return (error); + } + } + + while (buflen > 0) { + curaddr = buf; + sgsize = MIN(buflen, dmat->common.maxsegsz); + if (((dmat->bounce_flags & BUS_DMA_COULD_BOUNCE) != 0) && + map->pagesneeded != 0 && + bus_dma_run_filter(&dmat->common, curaddr)) { + sgsize = MIN(sgsize, PAGE_SIZE); + curaddr = add_bounce_page(dmat, map, 0, curaddr, + sgsize); + } + sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs, + segp); + if (sgsize == 0) + break; + buf += sgsize; + buflen -= sgsize; + } + + /* + * Did we fit? + */ + return (buflen != 0 ? EFBIG : 0); /* XXX better return value here? */ +} + +/* + * Utility function to load a linear buffer. segp contains + * the starting segment on entrace, and the ending segment on exit. + */ +static int +bounce_bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf, + bus_size_t buflen, pmap_t pmap, int flags, bus_dma_segment_t *segs, + int *segp) +{ + bus_size_t sgsize, max_sgsize; + bus_addr_t curaddr; + vm_offset_t vaddr; + int error; + + if (map == NULL) + map = &nobounce_dmamap; + + if (segs == NULL) + segs = dmat->segments; + + if ((dmat->bounce_flags & BUS_DMA_COULD_BOUNCE) != 0) { + _bus_dmamap_count_pages(dmat, map, pmap, buf, buflen, flags); + if (map->pagesneeded != 0) { + error = _bus_dmamap_reserve_pages(dmat, map, flags); + if (error) + return (error); + } + } + + vaddr = (vm_offset_t)buf; + while (buflen > 0) { + /* + * Get the physical address for this segment. + */ + if (pmap == kernel_pmap) + curaddr = pmap_kextract(vaddr); + else + curaddr = pmap_extract(pmap, vaddr); + + /* + * Compute the segment size, and adjust counts. + */ + max_sgsize = MIN(buflen, dmat->common.maxsegsz); + sgsize = PAGE_SIZE - ((vm_offset_t)curaddr & PAGE_MASK); + if (((dmat->bounce_flags & BUS_DMA_COULD_BOUNCE) != 0) && + map->pagesneeded != 0 && + bus_dma_run_filter(&dmat->common, curaddr)) { + sgsize = roundup2(sgsize, dmat->common.alignment); + sgsize = MIN(sgsize, max_sgsize); + curaddr = add_bounce_page(dmat, map, vaddr, curaddr, + sgsize); + } else { + sgsize = MIN(sgsize, max_sgsize); + } + sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs, + segp); + if (sgsize == 0) + break; + vaddr += sgsize; + buflen -= sgsize; + } + + /* + * Did we fit? + */ + return (buflen != 0 ? EFBIG : 0); /* XXX better return value here? */ +} + +static void +bounce_bus_dmamap_waitok(bus_dma_tag_t dmat, bus_dmamap_t map, + struct memdesc *mem, bus_dmamap_callback_t *callback, void *callback_arg) +{ + + if (map == NULL) + return; + map->mem = *mem; + map->dmat = dmat; + map->callback = callback; + map->callback_arg = callback_arg; +} + +static bus_dma_segment_t * +bounce_bus_dmamap_complete(bus_dma_tag_t dmat, bus_dmamap_t map, + bus_dma_segment_t *segs, int nsegs, int error) +{ + + if (segs == NULL) + segs = dmat->segments; + return (segs); +} + +/* + * Release the mapping held by map. + */ +static void +bounce_bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map) +{ + struct bounce_page *bpage; + + while ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) { + STAILQ_REMOVE_HEAD(&map->bpages, links); + free_bounce_page(dmat, bpage); + } +} + +static void +bounce_bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, + bus_dmasync_op_t op) +{ + struct bounce_page *bpage; + + /* + * XXX ARM64TODO: + * This bus_dma implementation requires IO-Coherent architecutre. + * If IO-Coherency is not guaranteed, cache operations have to be + * added to this function. + */ + + if ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) { + /* + * Handle data bouncing. We might also + * want to add support for invalidating + * the caches on broken hardware + */ + CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x op 0x%x " + "performing bounce", __func__, dmat, + dmat->common.flags, op); + + if ((op & BUS_DMASYNC_PREWRITE) != 0) { + while (bpage != NULL) { + if (bpage->datavaddr != 0) { + bcopy((void *)bpage->datavaddr, + (void *)bpage->vaddr, + bpage->datacount); + } else { + physcopyout(bpage->dataaddr, + (void *)bpage->vaddr, + bpage->datacount); + } + bpage = STAILQ_NEXT(bpage, links); + } + dmat->bounce_zone->total_bounced++; + } + + if ((op & BUS_DMASYNC_POSTREAD) != 0) { + while (bpage != NULL) { + if (bpage->datavaddr != 0) { + bcopy((void *)bpage->vaddr, + (void *)bpage->datavaddr, + bpage->datacount); + } else { + physcopyin((void *)bpage->vaddr, + bpage->dataaddr, + bpage->datacount); + } + bpage = STAILQ_NEXT(bpage, links); + } + dmat->bounce_zone->total_bounced++; + } + } +} + +static void +init_bounce_pages(void *dummy __unused) +{ + + total_bpages = 0; + STAILQ_INIT(&bounce_zone_list); + STAILQ_INIT(&bounce_map_waitinglist); + STAILQ_INIT(&bounce_map_callbacklist); + mtx_init(&bounce_lock, "bounce pages lock", NULL, MTX_DEF); +} +SYSINIT(bpages, SI_SUB_LOCK, SI_ORDER_ANY, init_bounce_pages, NULL); + +static struct sysctl_ctx_list * +busdma_sysctl_tree(struct bounce_zone *bz) +{ + return (&bz->sysctl_tree); +} + +static struct sysctl_oid * +busdma_sysctl_tree_top(struct bounce_zone *bz) +{ + return (bz->sysctl_tree_top); +} + +static int +alloc_bounce_zone(bus_dma_tag_t dmat) +{ + struct bounce_zone *bz; + + /* Check to see if we already have a suitable zone */ + STAILQ_FOREACH(bz, &bounce_zone_list, links) { + if ((dmat->common.alignment <= bz->alignment) && + (dmat->common.lowaddr >= bz->lowaddr)) { + dmat->bounce_zone = bz; + return (0); + } + } + + if ((bz = (struct bounce_zone *)malloc(sizeof(*bz), M_DEVBUF, + M_NOWAIT | M_ZERO)) == NULL) + return (ENOMEM); + + STAILQ_INIT(&bz->bounce_page_list); + bz->free_bpages = 0; + bz->reserved_bpages = 0; + bz->active_bpages = 0; + bz->lowaddr = dmat->common.lowaddr; + bz->alignment = MAX(dmat->common.alignment, PAGE_SIZE); + bz->map_count = 0; + snprintf(bz->zoneid, 8, "zone%d", busdma_zonecount); + busdma_zonecount++; + snprintf(bz->lowaddrid, 18, "%#jx", (uintmax_t)bz->lowaddr); + STAILQ_INSERT_TAIL(&bounce_zone_list, bz, links); + dmat->bounce_zone = bz; + + sysctl_ctx_init(&bz->sysctl_tree); + bz->sysctl_tree_top = SYSCTL_ADD_NODE(&bz->sysctl_tree, + SYSCTL_STATIC_CHILDREN(_hw_busdma), OID_AUTO, bz->zoneid, + CTLFLAG_RD, 0, ""); + if (bz->sysctl_tree_top == NULL) { + sysctl_ctx_free(&bz->sysctl_tree); + return (0); /* XXX error code? */ + } + + SYSCTL_ADD_INT(busdma_sysctl_tree(bz), + SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, + "total_bpages", CTLFLAG_RD, &bz->total_bpages, 0, + "Total bounce pages"); + SYSCTL_ADD_INT(busdma_sysctl_tree(bz), + SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, + "free_bpages", CTLFLAG_RD, &bz->free_bpages, 0, + "Free bounce pages"); + SYSCTL_ADD_INT(busdma_sysctl_tree(bz), + SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, + "reserved_bpages", CTLFLAG_RD, &bz->reserved_bpages, 0, + "Reserved bounce pages"); + SYSCTL_ADD_INT(busdma_sysctl_tree(bz), + SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, + "active_bpages", CTLFLAG_RD, &bz->active_bpages, 0, + "Active bounce pages"); + SYSCTL_ADD_INT(busdma_sysctl_tree(bz), + SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, + "total_bounced", CTLFLAG_RD, &bz->total_bounced, 0, + "Total bounce requests"); + SYSCTL_ADD_INT(busdma_sysctl_tree(bz), + SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, + "total_deferred", CTLFLAG_RD, &bz->total_deferred, 0, + "Total bounce requests that were deferred"); + SYSCTL_ADD_STRING(busdma_sysctl_tree(bz), + SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, + "lowaddr", CTLFLAG_RD, bz->lowaddrid, 0, ""); + SYSCTL_ADD_UAUTO(busdma_sysctl_tree(bz), + SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, + "alignment", CTLFLAG_RD, &bz->alignment, ""); + + return (0); +} + +static int +alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages) +{ + struct bounce_zone *bz; + int count; + + bz = dmat->bounce_zone; + count = 0; + while (numpages > 0) { + struct bounce_page *bpage; + + bpage = (struct bounce_page *)malloc(sizeof(*bpage), M_DEVBUF, + M_NOWAIT | M_ZERO); + + if (bpage == NULL) + break; + bpage->vaddr = (vm_offset_t)contigmalloc(PAGE_SIZE, M_DEVBUF, + M_NOWAIT, 0ul, bz->lowaddr, PAGE_SIZE, 0); + if (bpage->vaddr == 0) { + free(bpage, M_DEVBUF); + break; + } + bpage->busaddr = pmap_kextract(bpage->vaddr); + mtx_lock(&bounce_lock); + STAILQ_INSERT_TAIL(&bz->bounce_page_list, bpage, links); + total_bpages++; + bz->total_bpages++; + bz->free_bpages++; + mtx_unlock(&bounce_lock); + count++; + numpages--; + } + return (count); +} + +static int +reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int commit) +{ + struct bounce_zone *bz; + int pages; + + mtx_assert(&bounce_lock, MA_OWNED); + bz = dmat->bounce_zone; + pages = MIN(bz->free_bpages, map->pagesneeded - map->pagesreserved); + if (commit == 0 && map->pagesneeded > (map->pagesreserved + pages)) + return (map->pagesneeded - (map->pagesreserved + pages)); + bz->free_bpages -= pages; + bz->reserved_bpages += pages; + map->pagesreserved += pages; + pages = map->pagesneeded - map->pagesreserved; + + return (pages); +} + +static bus_addr_t +add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, vm_offset_t vaddr, + bus_addr_t addr, bus_size_t size) +{ + struct bounce_zone *bz; + struct bounce_page *bpage; + + KASSERT(dmat->bounce_zone != NULL, ("no bounce zone in dma tag")); + KASSERT(map != NULL && map != &nobounce_dmamap, + ("add_bounce_page: bad map %p", map)); + + bz = dmat->bounce_zone; + if (map->pagesneeded == 0) + panic("add_bounce_page: map doesn't need any pages"); + map->pagesneeded--; + + if (map->pagesreserved == 0) + panic("add_bounce_page: map doesn't need any pages"); + map->pagesreserved--; + + mtx_lock(&bounce_lock); + bpage = STAILQ_FIRST(&bz->bounce_page_list); + if (bpage == NULL) + panic("add_bounce_page: free page list is empty"); + + STAILQ_REMOVE_HEAD(&bz->bounce_page_list, links); + bz->reserved_bpages--; + bz->active_bpages++; + mtx_unlock(&bounce_lock); + + if (dmat->common.flags & BUS_DMA_KEEP_PG_OFFSET) { + /* Page offset needs to be preserved. */ + bpage->vaddr |= addr & PAGE_MASK; + bpage->busaddr |= addr & PAGE_MASK; + } + bpage->datavaddr = vaddr; + bpage->dataaddr = addr; + bpage->datacount = size; + STAILQ_INSERT_TAIL(&(map->bpages), bpage, links); + return (bpage->busaddr); +} + +static void +free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage) +{ + struct bus_dmamap *map; + struct bounce_zone *bz; + + bz = dmat->bounce_zone; + bpage->datavaddr = 0; + bpage->datacount = 0; + if (dmat->common.flags & BUS_DMA_KEEP_PG_OFFSET) { + /* + * Reset the bounce page to start at offset 0. Other uses + * of this bounce page may need to store a full page of + * data and/or assume it starts on a page boundary. + */ + bpage->vaddr &= ~PAGE_MASK; + bpage->busaddr &= ~PAGE_MASK; + } + + mtx_lock(&bounce_lock); + STAILQ_INSERT_HEAD(&bz->bounce_page_list, bpage, links); + bz->free_bpages++; + bz->active_bpages--; + if ((map = STAILQ_FIRST(&bounce_map_waitinglist)) != NULL) { + if (reserve_bounce_pages(map->dmat, map, 1) == 0) { + STAILQ_REMOVE_HEAD(&bounce_map_waitinglist, links); + STAILQ_INSERT_TAIL(&bounce_map_callbacklist, + map, links); + busdma_swi_pending = 1; + bz->total_deferred++; + swi_sched(vm_ih, 0); + } + } + mtx_unlock(&bounce_lock); +} + +void +busdma_swi(void) +{ + bus_dma_tag_t dmat; + struct bus_dmamap *map; + + mtx_lock(&bounce_lock); + while ((map = STAILQ_FIRST(&bounce_map_callbacklist)) != NULL) { + STAILQ_REMOVE_HEAD(&bounce_map_callbacklist, links); + mtx_unlock(&bounce_lock); + dmat = map->dmat; + (dmat->common.lockfunc)(dmat->common.lockfuncarg, BUS_DMA_LOCK); + bus_dmamap_load_mem(map->dmat, map, &map->mem, + map->callback, map->callback_arg, BUS_DMA_WAITOK); + (dmat->common.lockfunc)(dmat->common.lockfuncarg, + BUS_DMA_UNLOCK); + mtx_lock(&bounce_lock); + } + mtx_unlock(&bounce_lock); +} + +struct bus_dma_impl bus_dma_bounce_impl = { + .tag_create = bounce_bus_dma_tag_create, + .tag_destroy = bounce_bus_dma_tag_destroy, + .map_create = bounce_bus_dmamap_create, + .map_destroy = bounce_bus_dmamap_destroy, + .mem_alloc = bounce_bus_dmamem_alloc, + .mem_free = bounce_bus_dmamem_free, + .load_phys = bounce_bus_dmamap_load_phys, + .load_buffer = bounce_bus_dmamap_load_buffer, + .load_ma = bus_dmamap_load_ma_triv, + .map_waitok = bounce_bus_dmamap_waitok, + .map_complete = bounce_bus_dmamap_complete, + .map_unload = bounce_bus_dmamap_unload, + .map_sync = bounce_bus_dmamap_sync +}; diff --git a/sys/arm64/arm64/busdma_machdep.c b/sys/arm64/arm64/busdma_machdep.c index 4a89b1ff0f6c..df7a8be04a7c 100644 --- a/sys/arm64/arm64/busdma_machdep.c +++ b/sys/arm64/arm64/busdma_machdep.c @@ -1,22 +1,292 @@ -/* $FreeBSD$ */ +/*- + * Copyright (c) 1997, 1998 Justin T. Gibbs. + * Copyright (c) 2013, 2015 The FreeBSD Foundation + * All rights reserved. + * + * This software was developed by Konstantin Belousov + * under sponsorship from the FreeBSD Foundation. + * + * Portions of this software were developed by Semihalf + * under sponsorship of the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions, and the following disclaimer, + * without modification, immediately at the beginning of the file. + * 2. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ #include __FBSDID("$FreeBSD$"); #include #include - +#include +#include +#include +#include +#include +#include +#include +#include #include +#include #include #include +#include + +/* + * Convenience function for manipulating driver locks from busdma (during + * busdma_swi, for example). Drivers that don't provide their own locks + * should specify &Giant to dmat->lockfuncarg. Drivers that use their own + * non-mutex locking scheme don't have to use this at all. + */ +void +busdma_lock_mutex(void *arg, bus_dma_lock_op_t op) +{ + struct mtx *dmtx; + + dmtx = (struct mtx *)arg; + switch (op) { + case BUS_DMA_LOCK: + mtx_lock(dmtx); + break; + case BUS_DMA_UNLOCK: + mtx_unlock(dmtx); + break; + default: + panic("Unknown operation 0x%x for busdma_lock_mutex!", op); + } +} + +/* + * dflt_lock should never get called. It gets put into the dma tag when + * lockfunc == NULL, which is only valid if the maps that are associated + * with the tag are meant to never be defered. + * XXX Should have a way to identify which driver is responsible here. + */ +void +bus_dma_dflt_lock(void *arg, bus_dma_lock_op_t op) +{ + + panic("driver error: busdma dflt_lock called"); +} + +/* + * Return true if a match is made. + * + * To find a match walk the chain of bus_dma_tag_t's looking for 'paddr'. + * + * If paddr is within the bounds of the dma tag then call the filter callback + * to check for a match, if there is no filter callback then assume a match. + */ +int +bus_dma_run_filter(struct bus_dma_tag_common *tc, bus_addr_t paddr) +{ + int retval; + + retval = 0; + do { + if (((paddr > tc->lowaddr && paddr <= tc->highaddr) || + ((paddr & (tc->alignment - 1)) != 0)) && + (tc->filter == NULL || + (*tc->filter)(tc->filterarg, paddr) != 0)) + retval = 1; + + tc = tc->parent; + } while (retval == 0 && tc != NULL); + return (retval); +} + +int +common_bus_dma_tag_create(struct bus_dma_tag_common *parent, + bus_size_t alignment, bus_addr_t boundary, bus_addr_t lowaddr, + bus_addr_t highaddr, bus_dma_filter_t *filter, void *filterarg, + bus_size_t maxsize, int nsegments, bus_size_t maxsegsz, int flags, + bus_dma_lock_t *lockfunc, void *lockfuncarg, size_t sz, void **dmat) +{ + void *newtag; + struct bus_dma_tag_common *common; + + KASSERT(sz >= sizeof(struct bus_dma_tag_common), ("sz")); + /* Return a NULL tag on failure */ + *dmat = NULL; + /* Basic sanity checking */ + if (boundary != 0 && boundary < maxsegsz) + maxsegsz = boundary; + if (maxsegsz == 0) + return (EINVAL); + + newtag = malloc(sz, M_DEVBUF, M_ZERO | M_NOWAIT); + if (newtag == NULL) { + CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d", + __func__, newtag, 0, ENOMEM); + return (ENOMEM); + } + + common = newtag; + common->impl = &bus_dma_bounce_impl; + common->parent = parent; + common->alignment = alignment; + common->boundary = boundary; + common->lowaddr = trunc_page((vm_paddr_t)lowaddr) + (PAGE_SIZE - 1); + common->highaddr = trunc_page((vm_paddr_t)highaddr) + (PAGE_SIZE - 1); + common->filter = filter; + common->filterarg = filterarg; + common->maxsize = maxsize; + common->nsegments = nsegments; + common->maxsegsz = maxsegsz; + common->flags = flags; + common->ref_count = 1; /* Count ourself */ + if (lockfunc != NULL) { + common->lockfunc = lockfunc; + common->lockfuncarg = lockfuncarg; + } else { + common->lockfunc = bus_dma_dflt_lock; + common->lockfuncarg = NULL; + } + + /* Take into account any restrictions imposed by our parent tag */ + if (parent != NULL) { + common->impl = parent->impl; + common->lowaddr = MIN(parent->lowaddr, common->lowaddr); + common->highaddr = MAX(parent->highaddr, common->highaddr); + if (common->boundary == 0) + common->boundary = parent->boundary; + else if (parent->boundary != 0) { + common->boundary = MIN(parent->boundary, + common->boundary); + } + if (common->filter == NULL) { + /* + * Short circuit looking at our parent directly + * since we have encapsulated all of its information + */ + common->filter = parent->filter; + common->filterarg = parent->filterarg; + common->parent = parent->parent; + } + atomic_add_int(&parent->ref_count, 1); + } + *dmat = common; + return (0); +} + +/* + * Allocate a device specific dma_tag. + */ +int +bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment, + bus_addr_t boundary, bus_addr_t lowaddr, bus_addr_t highaddr, + bus_dma_filter_t *filter, void *filterarg, bus_size_t maxsize, + int nsegments, bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc, + void *lockfuncarg, bus_dma_tag_t *dmat) +{ + struct bus_dma_tag_common *tc; + int error; + + if (parent == NULL) { + error = bus_dma_bounce_impl.tag_create(parent, alignment, + boundary, lowaddr, highaddr, filter, filterarg, maxsize, + nsegments, maxsegsz, flags, lockfunc, lockfuncarg, dmat); + } else { + tc = (struct bus_dma_tag_common *)parent; + error = tc->impl->tag_create(parent, alignment, + boundary, lowaddr, highaddr, filter, filterarg, maxsize, + nsegments, maxsegsz, flags, lockfunc, lockfuncarg, dmat); + } + return (error); +} + +int +bus_dma_tag_destroy(bus_dma_tag_t dmat) +{ + struct bus_dma_tag_common *tc; + + tc = (struct bus_dma_tag_common *)dmat; + return (tc->impl->tag_destroy(dmat)); +} + +/* + * Allocate a handle for mapping from kva/uva/physical + * address space into bus device space. + */ +int +bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp) +{ + struct bus_dma_tag_common *tc; + + tc = (struct bus_dma_tag_common *)dmat; + return (tc->impl->map_create(dmat, flags, mapp)); +} + +/* + * Destroy a handle for mapping from kva/uva/physical + * address space into bus device space. + */ +int +bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map) +{ + struct bus_dma_tag_common *tc; + + tc = (struct bus_dma_tag_common *)dmat; + return (tc->impl->map_destroy(dmat, map)); +} + + +/* + * Allocate a piece of memory that can be efficiently mapped into + * bus device space based on the constraints listed in the dma tag. + * A dmamap to for use with dmamap_load is also allocated. + */ +int +bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags, + bus_dmamap_t *mapp) +{ + struct bus_dma_tag_common *tc; + + tc = (struct bus_dma_tag_common *)dmat; + return (tc->impl->mem_alloc(dmat, vaddr, flags, mapp)); +} + +/* + * Free a piece of memory and it's allociated dmamap, that was allocated + * via bus_dmamem_alloc. Make the same choice for free/contigfree. + */ +void +bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map) +{ + struct bus_dma_tag_common *tc; + + tc = (struct bus_dma_tag_common *)dmat; + tc->impl->mem_free(dmat, vaddr, map); +} int _bus_dmamap_load_phys(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t buf, bus_size_t buflen, int flags, bus_dma_segment_t *segs, int *segp) { + struct bus_dma_tag_common *tc; - panic("_bus_dmamap_load_phys"); + tc = (struct bus_dma_tag_common *)dmat; + return (tc->impl->load_phys(dmat, map, buf, buflen, flags, segs, + segp)); } int @@ -24,8 +294,11 @@ _bus_dmamap_load_ma(bus_dma_tag_t dmat, bus_dmamap_t map, struct vm_page **ma, bus_size_t tlen, int ma_offs, int flags, bus_dma_segment_t *segs, int *segp) { + struct bus_dma_tag_common *tc; - panic("_bus_dmamap_load_ma"); + tc = (struct bus_dma_tag_common *)dmat; + return (tc->impl->load_ma(dmat, map, ma, tlen, ma_offs, flags, + segs, segp)); } int @@ -33,36 +306,50 @@ _bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf, bus_size_t buflen, pmap_t pmap, int flags, bus_dma_segment_t *segs, int *segp) { + struct bus_dma_tag_common *tc; - panic("_bus_dmamap_load_buffer"); + tc = (struct bus_dma_tag_common *)dmat; + return (tc->impl->load_buffer(dmat, map, buf, buflen, pmap, flags, segs, + segp)); } void __bus_dmamap_waitok(bus_dma_tag_t dmat, bus_dmamap_t map, struct memdesc *mem, bus_dmamap_callback_t *callback, void *callback_arg) { + struct bus_dma_tag_common *tc; - panic("__bus_dmamap_waitok"); + tc = (struct bus_dma_tag_common *)dmat; + tc->impl->map_waitok(dmat, map, mem, callback, callback_arg); } bus_dma_segment_t * _bus_dmamap_complete(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dma_segment_t *segs, int nsegs, int error) { + struct bus_dma_tag_common *tc; - panic("_bus_dmamap_complete"); + tc = (struct bus_dma_tag_common *)dmat; + return (tc->impl->map_complete(dmat, map, segs, nsegs, error)); } +/* + * Release the mapping held by map. + */ void _bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map) { + struct bus_dma_tag_common *tc; - panic("_bus_dmamap_unload"); + tc = (struct bus_dma_tag_common *)dmat; + tc->impl->map_unload(dmat, map); } void _bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op) { + struct bus_dma_tag_common *tc; - panic("_bus_dmamap_sync"); + tc = (struct bus_dma_tag_common *)dmat; + tc->impl->map_sync(dmat, map, op); } diff --git a/sys/arm64/arm64/db_disasm.c b/sys/arm64/arm64/db_disasm.c index ec943a4d4669..03784837b074 100644 --- a/sys/arm64/arm64/db_disasm.c +++ b/sys/arm64/arm64/db_disasm.c @@ -33,7 +33,7 @@ __FBSDID("$FreeBSD$"); #include vm_offset_t -db_disasm(vm_offset_t loc, boolean_t altfmt) +db_disasm(vm_offset_t loc, bool altfmt) { return 0; } diff --git a/sys/arm64/arm64/gic_v3.c b/sys/arm64/arm64/gic_v3.c new file mode 100644 index 000000000000..1f5ff813dc6f --- /dev/null +++ b/sys/arm64/arm64/gic_v3.c @@ -0,0 +1,580 @@ +/*- + * Copyright (c) 2015 The FreeBSD Foundation + * All rights reserved. + * + * This software was developed by Semihalf under + * the sponsorship of the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include + +#include "pic_if.h" + +#include "gic_v3_reg.h" +#include "gic_v3_var.h" + +/* Device and PIC methods */ +static void gic_v3_dispatch(device_t, struct trapframe *); +static void gic_v3_eoi(device_t, u_int); +static void gic_v3_mask_irq(device_t, u_int); +static void gic_v3_unmask_irq(device_t, u_int); + +static device_method_t gic_v3_methods[] = { + /* Device interface */ + DEVMETHOD(device_detach, gic_v3_detach), + + /* PIC interface */ + DEVMETHOD(pic_dispatch, gic_v3_dispatch), + DEVMETHOD(pic_eoi, gic_v3_eoi), + DEVMETHOD(pic_mask, gic_v3_mask_irq), + DEVMETHOD(pic_unmask, gic_v3_unmask_irq), + + /* End */ + DEVMETHOD_END +}; + +DEFINE_CLASS_0(gic_v3, gic_v3_driver, gic_v3_methods, + sizeof(struct gic_v3_softc)); + +/* + * Driver-specific definitions. + */ +MALLOC_DEFINE(M_GIC_V3, "GICv3", GIC_V3_DEVSTR); + +/* + * Helper functions and definitions. + */ +/* Destination registers, either Distributor or Re-Distributor */ +enum gic_v3_xdist { + DIST = 0, + REDIST, +}; + +/* Helper routines starting with gic_v3_ */ +static int gic_v3_dist_init(struct gic_v3_softc *); +static int gic_v3_redist_find(struct gic_v3_softc *); +static int gic_v3_redist_init(struct gic_v3_softc *); +static int gic_v3_cpu_init(struct gic_v3_softc *); +static void gic_v3_wait_for_rwp(struct gic_v3_softc *, enum gic_v3_xdist); + +/* A sequence of init functions for primary (boot) CPU */ +typedef int (*gic_v3_initseq_t) (struct gic_v3_softc *); +/* Primary CPU initialization sequence */ +static gic_v3_initseq_t gic_v3_primary_init[] = { + gic_v3_dist_init, + gic_v3_redist_init, + gic_v3_cpu_init, + NULL +}; + +/* + * Device interface. + */ +int +gic_v3_attach(device_t dev) +{ + struct gic_v3_softc *sc; + gic_v3_initseq_t *init_func; + uint32_t typer; + int rid; + int err; + size_t i; + + sc = device_get_softc(dev); + sc->gic_registered = FALSE; + sc->dev = dev; + err = 0; + + /* Initialize mutex */ + mtx_init(&sc->gic_mtx, "GICv3 lock", NULL, MTX_SPIN); + + /* + * Allocate array of struct resource. + * One entry for Distributor and all remaining for Re-Distributor. + */ + sc->gic_res = malloc( + sizeof(sc->gic_res) * (sc->gic_redists.nregions + 1), + M_GIC_V3, M_WAITOK); + + /* Now allocate corresponding resources */ + for (i = 0, rid = 0; i < (sc->gic_redists.nregions + 1); i++, rid++) { + sc->gic_res[rid] = bus_alloc_resource_any(dev, SYS_RES_MEMORY, + &rid, RF_ACTIVE); + if (sc->gic_res[rid] == NULL) + return (ENXIO); + } + + /* + * Distributor interface + */ + sc->gic_dist = sc->gic_res[0]; + + /* + * Re-Dristributor interface + */ + /* Allocate space under region descriptions */ + sc->gic_redists.regions = malloc( + sizeof(*sc->gic_redists.regions) * sc->gic_redists.nregions, + M_GIC_V3, M_WAITOK); + + /* Fill-up bus_space information for each region. */ + for (i = 0, rid = 1; i < sc->gic_redists.nregions; i++, rid++) + sc->gic_redists.regions[i] = sc->gic_res[rid]; + + /* Get the number of supported SPI interrupts */ + typer = gic_d_read(sc, 4, GICD_TYPER); + sc->gic_nirqs = GICD_TYPER_I_NUM(typer); + if (sc->gic_nirqs > GIC_I_NUM_MAX) + sc->gic_nirqs = GIC_I_NUM_MAX; + + /* Get the number of supported interrupt identifier bits */ + sc->gic_idbits = GICD_TYPER_IDBITS(typer); + + if (bootverbose) { + device_printf(dev, "SPIs: %u, IDs: %u\n", + sc->gic_nirqs, (1 << sc->gic_idbits) - 1); + } + + /* Train init sequence for boot CPU */ + for (init_func = gic_v3_primary_init; *init_func != NULL; init_func++) { + err = (*init_func)(sc); + if (err != 0) + return (err); + } + /* + * Full success. + * Now register PIC to the interrupts handling layer. + */ + arm_register_root_pic(dev, sc->gic_nirqs); + sc->gic_registered = TRUE; + + return (0); +} + +int +gic_v3_detach(device_t dev) +{ + struct gic_v3_softc *sc; + size_t i; + int rid; + + sc = device_get_softc(dev); + + if (device_is_attached(dev)) { + /* + * XXX: We should probably deregister PIC + */ + if (sc->gic_registered) + panic("Trying to detach registered PIC"); + } + for (rid = 0; rid < (sc->gic_redists.nregions + 1); rid++) + bus_release_resource(dev, SYS_RES_MEMORY, rid, sc->gic_res[rid]); + + for (i = 0; i < MAXCPU; i++) + free(sc->gic_redists.pcpu[i], M_GIC_V3); + + free(sc->gic_res, M_GIC_V3); + free(sc->gic_redists.regions, M_GIC_V3); + + return (0); +} + +/* + * PIC interface. + */ +static void +gic_v3_dispatch(device_t dev, struct trapframe *frame) +{ + uint64_t active_irq; + + while (1) { + active_irq = gic_icc_read(IAR1); + + if (__predict_false(active_irq == ICC_IAR1_EL1_SPUR)) + break; + + if (__predict_true((active_irq >= GIC_FIRST_PPI && + active_irq <= GIC_LAST_SPI))) { + arm_dispatch_intr(active_irq, frame); + continue; + } + + if (active_irq <= GIC_LAST_SGI || active_irq >= GIC_FIRST_LPI) { + /* + * TODO: Implement proper SGI/LPI handling. + * Mask it if such is received for some reason. + */ + device_printf(dev, + "Received unsupported interrupt type: %s\n", + active_irq >= GIC_FIRST_LPI ? "LPI" : "SGI"); + PIC_MASK(dev, active_irq); + } + } +} + +static void +gic_v3_eoi(device_t dev, u_int irq) +{ + + gic_icc_write(EOIR1, (uint64_t)irq); +} + +static void +gic_v3_mask_irq(device_t dev, u_int irq) +{ + struct gic_v3_softc *sc; + + sc = device_get_softc(dev); + + if (irq >= GIC_FIRST_PPI && irq <= GIC_LAST_PPI) { /* PPIs in corresponding Re-Distributor */ + gic_r_write(sc, 4, + GICR_SGI_BASE_SIZE + GICD_ICENABLER(irq), GICD_I_MASK(irq)); + gic_v3_wait_for_rwp(sc, REDIST); + } else if (irq >= GIC_FIRST_SPI && irq <= GIC_LAST_SPI) { /* SPIs in distributor */ + gic_r_write(sc, 4, GICD_ICENABLER(irq), GICD_I_MASK(irq)); + gic_v3_wait_for_rwp(sc, DIST); + } else + panic("%s: Unsupported IRQ number %u", __func__, irq); +} + +static void +gic_v3_unmask_irq(device_t dev, u_int irq) +{ + struct gic_v3_softc *sc; + + sc = device_get_softc(dev); + + if (irq >= GIC_FIRST_PPI && irq <= GIC_LAST_PPI) { /* PPIs in corresponding Re-Distributor */ + gic_r_write(sc, 4, + GICR_SGI_BASE_SIZE + GICD_ISENABLER(irq), GICD_I_MASK(irq)); + gic_v3_wait_for_rwp(sc, REDIST); + } else if (irq >= GIC_FIRST_SPI && irq <= GIC_LAST_SPI) { /* SPIs in distributor */ + gic_d_write(sc, 4, GICD_ISENABLER(irq), GICD_I_MASK(irq)); + gic_v3_wait_for_rwp(sc, DIST); + } else + panic("%s: Unsupported IRQ number %u", __func__, irq); +} + +/* + * Helper routines + */ +static void +gic_v3_wait_for_rwp(struct gic_v3_softc *sc, enum gic_v3_xdist xdist) +{ + struct resource *res; + u_int cpuid; + size_t us_left = 1000000; + + cpuid = PCPU_GET(cpuid); + + switch (xdist) { + case DIST: + res = sc->gic_dist; + break; + case REDIST: + res = sc->gic_redists.pcpu[cpuid]; + break; + default: + KASSERT(0, ("%s: Attempt to wait for unknown RWP", __func__)); + return; + } + + while ((bus_read_4(res, GICD_CTLR) & GICD_CTLR_RWP) != 0) { + DELAY(1); + if (us_left-- == 0) + panic("GICD Register write pending for too long"); + } +} + +/* CPU interface. */ +static __inline void +gic_v3_cpu_priority(uint64_t mask) +{ + + /* Set prority mask */ + gic_icc_write(PMR, mask & ICC_PMR_EL1_PRIO_MASK); +} + +static int +gic_v3_cpu_enable_sre(struct gic_v3_softc *sc) +{ + uint64_t sre; + u_int cpuid; + + cpuid = PCPU_GET(cpuid); + /* + * Set the SRE bit to enable access to GIC CPU interface + * via system registers. + */ + sre = READ_SPECIALREG(icc_sre_el1); + sre |= ICC_SRE_EL1_SRE; + WRITE_SPECIALREG(icc_sre_el1, sre); + isb(); + /* + * Now ensure that the bit is set. + */ + sre = READ_SPECIALREG(icc_sre_el1); + if ((sre & ICC_SRE_EL1_SRE) == 0) { + /* We are done. This was disabled in EL2 */ + device_printf(sc->dev, "ERROR: CPU%u cannot enable CPU interface " + "via system registers\n", cpuid); + return (ENXIO); + } else if (bootverbose) { + device_printf(sc->dev, + "CPU%u enabled CPU interface via system registers\n", + cpuid); + } + + return (0); +} + +static int +gic_v3_cpu_init(struct gic_v3_softc *sc) +{ + int err; + + /* Enable access to CPU interface via system registers */ + err = gic_v3_cpu_enable_sre(sc); + if (err != 0) + return (err); + /* Priority mask to minimum - accept all interrupts */ + gic_v3_cpu_priority(GIC_PRIORITY_MIN); + /* Disable EOI mode */ + gic_icc_clear(CTLR, ICC_CTLR_EL1_EOIMODE); + /* Enable group 1 (insecure) interrups */ + gic_icc_set(IGRPEN1, ICC_IGRPEN0_EL1_EN); + + return (0); +} + +/* Distributor */ +static int +gic_v3_dist_init(struct gic_v3_softc *sc) +{ + uint64_t aff; + u_int i; + + /* + * 1. Disable the Distributor + */ + gic_d_write(sc, 4, GICD_CTLR, 0); + gic_v3_wait_for_rwp(sc, DIST); + + /* + * 2. Configure the Distributor + */ + /* Set all global interrupts to be level triggered, active low. */ + for (i = GIC_FIRST_SPI; i < sc->gic_nirqs; i += GICD_I_PER_ICFGRn) + gic_d_write(sc, 4, GICD_ICFGR(i), 0x00000000); + + /* Set priority to all shared interrupts */ + for (i = GIC_FIRST_SPI; + i < sc->gic_nirqs; i += GICD_I_PER_IPRIORITYn) { + /* Set highest priority */ + gic_d_write(sc, 4, GICD_IPRIORITYR(i), GIC_PRIORITY_MAX); + } + + /* + * Disable all interrupts. Leave PPI and SGIs as they are enabled in + * Re-Distributor registers. + */ + for (i = GIC_FIRST_SPI; i < sc->gic_nirqs; i += GICD_I_PER_ISENABLERn) + gic_d_write(sc, 4, GICD_ICENABLER(i), 0xFFFFFFFF); + + gic_v3_wait_for_rwp(sc, DIST); + + /* + * 3. Enable Distributor + */ + /* Enable Distributor with ARE, Group 1 */ + gic_d_write(sc, 4, GICD_CTLR, GICD_CTLR_ARE_NS | GICD_CTLR_G1A | + GICD_CTLR_G1); + + /* + * 4. Route all interrupts to boot CPU. + */ + aff = CPU_AFFINITY(PCPU_GET(cpuid)); + for (i = GIC_FIRST_SPI; i < sc->gic_nirqs; i++) + gic_d_write(sc, 4, GICD_IROUTER(i), aff); + + return (0); +} + +/* Re-Distributor */ +static int +gic_v3_redist_find(struct gic_v3_softc *sc) +{ + struct resource r_res; + bus_space_handle_t r_bsh; + uint64_t aff; + uint64_t typer; + uint32_t pidr2; + u_int cpuid; + size_t i; + + cpuid = PCPU_GET(cpuid); + + /* Allocate struct resource for this CPU's Re-Distributor registers */ + sc->gic_redists.pcpu[cpuid] = + malloc(sizeof(*sc->gic_redists.pcpu[0]), M_GIC_V3, M_WAITOK); + + aff = CPU_AFFINITY(cpuid); + /* Affinity in format for comparison with typer */ + aff = (CPU_AFF3(aff) << 24) | (CPU_AFF2(aff) << 16) | + (CPU_AFF1(aff) << 8) | CPU_AFF0(aff); + + if (bootverbose) { + device_printf(sc->dev, + "Start searching for Re-Distributor\n"); + } + /* Iterate through Re-Distributor regions */ + for (i = 0; i < sc->gic_redists.nregions; i++) { + /* Take a copy of the region's resource */ + r_res = *sc->gic_redists.regions[i]; + r_bsh = rman_get_bushandle(&r_res); + + pidr2 = bus_read_4(&r_res, GICR_PIDR2); + switch (pidr2 & GICR_PIDR2_ARCH_MASK) { + case GICR_PIDR2_ARCH_GICv3: /* fall through */ + case GICR_PIDR2_ARCH_GICv4: + break; + default: + device_printf(sc->dev, + "No Re-Distributor found for CPU%u\n", cpuid); + free(sc->gic_redists.pcpu[cpuid], M_GIC_V3); + return (ENODEV); + } + + do { + typer = bus_read_8(&r_res, GICR_TYPER); + if ((typer >> GICR_TYPER_AFF_SHIFT) == aff) { + KASSERT(sc->gic_redists.pcpu[cpuid] != NULL, + ("Invalid pointer to per-CPU redistributor")); + /* Copy res contents to its final destination */ + *sc->gic_redists.pcpu[cpuid] = r_res; + if (bootverbose) { + device_printf(sc->dev, + "CPU%u Re-Distributor has been found\n", + cpuid); + } + return (0); + } + + r_bsh += (GICR_RD_BASE_SIZE + GICR_SGI_BASE_SIZE); + if ((typer & GICR_TYPER_VLPIS) != 0) { + r_bsh += + (GICR_VLPI_BASE_SIZE + GICR_RESERVED_SIZE); + } + + rman_set_bushandle(&r_res, r_bsh); + } while ((typer & GICR_TYPER_LAST) == 0); + } + + free(sc->gic_redists.pcpu[cpuid], M_GIC_V3); + device_printf(sc->dev, "No Re-Distributor found for CPU%u\n", cpuid); + return (ENXIO); +} + +static int +gic_v3_redist_wake(struct gic_v3_softc *sc) +{ + uint32_t waker; + size_t us_left = 1000000; + + waker = gic_r_read(sc, 4, GICR_WAKER); + /* Wake up Re-Distributor for this CPU */ + waker &= ~GICR_WAKER_PS; + gic_r_write(sc, 4, GICR_WAKER, waker); + /* + * When clearing ProcessorSleep bit it is required to wait for + * ChildrenAsleep to become zero following the processor power-on. + */ + while ((gic_r_read(sc, 4, GICR_WAKER) & GICR_WAKER_CA) != 0) { + DELAY(1); + if (us_left-- == 0) { + panic("Could not wake Re-Distributor for CPU%u", + PCPU_GET(cpuid)); + } + } + + if (bootverbose) { + device_printf(sc->dev, "CPU%u Re-Distributor woke up\n", + PCPU_GET(cpuid)); + } + + return (0); +} + +static int +gic_v3_redist_init(struct gic_v3_softc *sc) +{ + int err; + size_t i; + + err = gic_v3_redist_find(sc); + if (err != 0) + return (err); + + err = gic_v3_redist_wake(sc); + if (err != 0) + return (err); + + /* Disable SPIs */ + gic_r_write(sc, 4, GICR_SGI_BASE_SIZE + GICR_ICENABLER0, + GICR_I_ENABLER_PPI_MASK); + /* Enable SGIs */ + gic_r_write(sc, 4, GICR_SGI_BASE_SIZE + GICR_ISENABLER0, + GICR_I_ENABLER_SGI_MASK); + + /* Set priority for SGIs and PPIs */ + for (i = 0; i <= GIC_LAST_PPI; i += GICR_I_PER_IPRIORITYn) { + gic_r_write(sc, 4, GICR_SGI_BASE_SIZE + GICD_IPRIORITYR(i), + GIC_PRIORITY_MAX); + } + + gic_v3_wait_for_rwp(sc, REDIST); + + return (0); +} diff --git a/sys/arm64/arm64/gic_v3_fdt.c b/sys/arm64/arm64/gic_v3_fdt.c new file mode 100644 index 000000000000..e42ac9e510db --- /dev/null +++ b/sys/arm64/arm64/gic_v3_fdt.c @@ -0,0 +1,124 @@ +/*- + * Copyright (c) 2015 The FreeBSD Foundation + * All rights reserved. + * + * This software was developed by Semihalf under + * the sponsorship of the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "pic_if.h" + +#include "gic_v3_reg.h" +#include "gic_v3_var.h" + +/* + * FDT glue. + */ +static int gic_v3_fdt_probe(device_t); +static int gic_v3_fdt_attach(device_t); + +static device_method_t gic_v3_fdt_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, gic_v3_fdt_probe), + DEVMETHOD(device_attach, gic_v3_fdt_attach), + + /* End */ + DEVMETHOD_END +}; + +DEFINE_CLASS_1(gic_v3, gic_v3_fdt_driver, gic_v3_fdt_methods, + sizeof(struct gic_v3_softc), gic_v3_driver); + +static devclass_t gic_v3_fdt_devclass; + +EARLY_DRIVER_MODULE(gic_v3, simplebus, gic_v3_fdt_driver, gic_v3_fdt_devclass, + 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); +EARLY_DRIVER_MODULE(gic_v3, ofwbus, gic_v3_fdt_driver, gic_v3_fdt_devclass, + 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); + +/* + * Device interface. + */ +static int +gic_v3_fdt_probe(device_t dev) +{ + + if (!ofw_bus_status_okay(dev)) + return (ENXIO); + + if (!ofw_bus_is_compatible(dev, "arm,gic-v3")) + return (ENXIO); + + device_set_desc(dev, GIC_V3_DEVSTR); + return (BUS_PROBE_DEFAULT); +} + +static int +gic_v3_fdt_attach(device_t dev) +{ + struct gic_v3_softc *sc; + pcell_t redist_regions; + int err; + + sc = device_get_softc(dev); + sc->dev = dev; + + /* + * Recover number of the Re-Distributor regions. + */ + if (OF_getencprop(ofw_bus_get_node(dev), "#redistributor-regions", + &redist_regions, sizeof(redist_regions)) <= 0) + sc->gic_redists.nregions = 1; + else + sc->gic_redists.nregions = redist_regions; + + err = gic_v3_attach(dev); + if (err) + goto error; + + return (err); + +error: + if (bootverbose) { + device_printf(dev, + "Failed to attach. Error %d\n", err); + } + /* Failure so free resources */ + gic_v3_detach(dev); + + return (err); +} diff --git a/sys/arm64/arm64/gic_v3_reg.h b/sys/arm64/arm64/gic_v3_reg.h new file mode 100644 index 000000000000..7f0b5508856c --- /dev/null +++ b/sys/arm64/arm64/gic_v3_reg.h @@ -0,0 +1,185 @@ +/*- + * Copyright (c) 2015 The FreeBSD Foundation + * All rights reserved. + * + * This software was developed by Semihalf under + * the sponsorship of the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _GIC_V3_REG_H_ +#define _GIC_V3_REG_H_ + +/* + * Maximum number of interrupts + * supported by GIC (including SGIs, PPIs and SPIs) + */ +#define GIC_I_NUM_MAX (1020) +/* + * Priority MAX/MIN values + */ +#define GIC_PRIORITY_MAX (0x00UL) +/* Upper value is determined by LPI max priority */ +#define GIC_PRIORITY_MIN (0xFCUL) + +/* Numbers for software generated interrupts */ +#define GIC_FIRST_SGI (0) +#define GIC_LAST_SGI (15) +/* Numbers for private peripheral interrupts */ +#define GIC_FIRST_PPI (16) +#define GIC_LAST_PPI (31) +/* Numbers for spared peripheral interrupts */ +#define GIC_FIRST_SPI (32) +#define GIC_LAST_SPI (1019) +/* Numbers for local peripheral interrupts */ +#define GIC_FIRST_LPI (8192) + +/* + * Registers (v2/v3) + */ +#define GICD_CTLR (0x0000) +#define GICD_CTLR_G1 (1 << 0) +#define GICD_CTLR_G1A (1 << 1) +#define GICD_CTLR_ARE_NS (1 << 4) +#define GICD_CTLR_RWP (1 << 31) + +#define GICD_TYPER (0x0004) +#define GICD_TYPER_IDBITS(n) ((((n) >> 19) & 0x1F) + 1) +#define GICD_TYPER_I_NUM(n) ((((n) & 0xF1) + 1) * 32) + +#define GICD_ISENABLER(n) (0x0100 + (((n) >> 5) * 4)) +#define GICD_I_PER_ISENABLERn (32) + +#define GICD_ICENABLER(n) (0x0180 + (((n) >> 5) * 4)) +#define GICD_IPRIORITYR(n) (0x0400 + (((n) >> 2) * 4)) +#define GICD_I_PER_IPRIORITYn (4) + +#define GICD_I_MASK(n) (1 << ((n) % 32)) + +#define GICD_ICFGR(n) (0x0C00 + (((n) >> 4) * 4)) +/* First bit is a polarity bit (0 - low, 1 - high) */ +#define GICD_ICFGR_POL_LOW (0 << 0) +#define GICD_ICFGR_POL_HIGH (1 << 0) +#define GICD_ICFGR_POL_MASK (0x1) +/* Second bit is a trigger bit (0 - level, 1 - edge) */ +#define GICD_ICFGR_TRIG_LVL (0 << 1) +#define GICD_ICFGR_TRIG_EDGE (1 << 1) +#define GICD_ICFGR_TRIG_MASK (0x2) + +#define GICD_I_PER_ICFGRn (16) + +/* + * Registers (v3) + */ +#define GICD_IROUTER(n) (0x6000 + ((n) * 8)) +#define GICD_PIDR2 (0xFFE8) + +#define GICR_PIDR2_ARCH_MASK (0xF0) +#define GICR_PIDR2_ARCH_GICv3 (0x30) +#define GICR_PIDR2_ARCH_GICv4 (0x40) + +/* Redistributor registers */ +#define GICR_PIDR2 GICD_PIDR2 + +#define GICR_TYPER (0x0008) +#define GICR_TYPER_VLPIS (1 << 1) +#define GICR_TYPER_LAST (1 << 4) +#define GICR_TYPER_AFF_SHIFT (32) + +#define GICR_WAKER (0x0014) +#define GICR_WAKER_PS (1 << 1) /* Processor sleep */ +#define GICR_WAKER_CA (1 << 2) /* Children asleep */ + +/* Re-distributor registers for SGIs and PPIs */ +#define GICR_RD_BASE_SIZE PAGE_SIZE_64K +#define GICR_SGI_BASE_SIZE PAGE_SIZE_64K +#define GICR_VLPI_BASE_SIZE PAGE_SIZE_64K +#define GICR_RESERVED_SIZE PAGE_SIZE_64K + +#define GICR_ISENABLER0 (0x0100) +#define GICR_ICENABLER0 (0x0180) +#define GICR_I_ENABLER_SGI_MASK (0x0000FFFF) +#define GICR_I_ENABLER_PPI_MASK (0xFFFF0000) + +#define GICR_I_PER_IPRIORITYn (GICD_I_PER_IPRIORITYn) + +/* + * CPU interface + */ + +/* + * Registers list (ICC_xyz_EL1): + * + * PMR - Priority Mask Register + * * interrupts of priority higher than specified + * in this mask will be signalled to the CPU. + * (0xff - lowest possible prio., 0x00 - highest prio.) + * + * CTLR - Control Register + * * controls behavior of the CPU interface and displays + * implemented features. + * + * IGRPEN1 - Interrupt Group 1 Enable Register + * + * IAR1 - Interrupt Acknowledge Register Group 1 + * * contains number of the highest priority pending + * interrupt from the Group 1. + * + * EOIR1 - End of Interrupt Register Group 1 + * * Writes inform CPU interface about completed Group 1 + * interrupts processing. + */ + +#define gic_icc_write(reg, val) \ +do { \ + WRITE_SPECIALREG(ICC_ ##reg ##_EL1, val); \ + isb(); \ +} while (0) + +#define gic_icc_read(reg) \ +({ \ + uint64_t val; \ + \ + val = READ_SPECIALREG(ICC_ ##reg ##_EL1); \ + (val); \ +}) + +#define gic_icc_set(reg, mask) \ +do { \ + uint64_t val; \ + val = gic_icc_read(reg); \ + val |= (mask); \ + gic_icc_write(reg, val); \ +} while (0) + +#define gic_icc_clear(reg, mask) \ +do { \ + uint64_t val; \ + val = gic_icc_read(reg); \ + val &= ~(mask); \ + gic_icc_write(reg, val); \ +} while (0) + +#endif /* _GIC_V3_REG_H_ */ diff --git a/sys/arm64/arm64/gic_v3_var.h b/sys/arm64/arm64/gic_v3_var.h new file mode 100644 index 000000000000..2e511b4af6b7 --- /dev/null +++ b/sys/arm64/arm64/gic_v3_var.h @@ -0,0 +1,106 @@ +/*- + * Copyright (c) 2015 The FreeBSD Foundation + * All rights reserved. + * + * This software was developed by Semihalf under + * the sponsorship of the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _GIC_V3_VAR_H_ +#define _GIC_V3_VAR_H_ + +#define GIC_V3_DEVSTR "ARM Generic Interrupt Controller v3.0" + +DECLARE_CLASS(gic_v3_driver); + +struct gic_redists { + /* + * Re-Distributor region description. + * We will have few of those depending + * on the #redistributor-regions property in FDT. + */ + struct resource ** regions; + /* Number of Re-Distributor regions */ + u_int nregions; + /* Per-CPU Re-Distributor handler */ + struct resource * pcpu[MAXCPU]; +}; + +struct gic_v3_softc { + device_t dev; + struct resource ** gic_res; + struct mtx gic_mtx; + /* Distributor */ + struct resource * gic_dist; + /* Re-Distributors */ + struct gic_redists gic_redists; + + u_int gic_nirqs; + u_int gic_idbits; + + boolean_t gic_registered; +}; + +MALLOC_DECLARE(M_GIC_V3); + +/* Device methods */ +int gic_v3_attach(device_t dev); +int gic_v3_detach(device_t dev); + +/* + * GIC Distributor accessors. + * Notice that only GIC sofc can be passed. + */ +#define gic_d_read(sc, len, reg) \ +({ \ + bus_read_##len(sc->gic_dist, reg); \ +}) + +#define gic_d_write(sc, len, reg, val) \ +({ \ + bus_write_##len(sc->gic_dist, reg, val);\ +}) + +/* GIC Re-Distributor accessors (per-CPU) */ +#define gic_r_read(sc, len, reg) \ +({ \ + u_int cpu = PCPU_GET(cpuid); \ + \ + bus_read_##len( \ + sc->gic_redists.pcpu[cpu], \ + reg); \ +}) + +#define gic_r_write(sc, len, reg, val) \ +({ \ + u_int cpu = PCPU_GET(cpuid); \ + \ + bus_write_##len( \ + sc->gic_redists.pcpu[cpu], \ + reg, val); \ +}) + +#endif /* _GIC_V3_VAR_H_ */ diff --git a/sys/arm64/arm64/intr_machdep.c b/sys/arm64/arm64/intr_machdep.c index 6f1c7bb6246f..7ff6f112e88f 100644 --- a/sys/arm64/arm64/intr_machdep.c +++ b/sys/arm64/arm64/intr_machdep.c @@ -430,6 +430,10 @@ arm_dispatch_intr(u_int hw_irq, struct trapframe *tf) if (intr != NULL) PIC_MASK(root_pic, intr->i_hw_irq); +#ifdef HWPMC_HOOKS + if (pmc_hook && (PCPU_GET(curthread)->td_pflags & TDP_CALLCHAIN)) + pmc_hook(PCPU_GET(curthread), PMC_FN_USER_CALLCHAIN, tf); +#endif } void diff --git a/sys/arm64/arm64/locore.S b/sys/arm64/arm64/locore.S index bf702fa04672..c9a9c833f020 100644 --- a/sys/arm64/arm64/locore.S +++ b/sys/arm64/arm64/locore.S @@ -187,6 +187,20 @@ drop_to_el1: mov x2, #(PSR_F | PSR_I | PSR_A | PSR_D | PSR_M_EL1h) msr spsr_el2, x2 + /* Configure GICv3 CPU interface */ + mrs x2, id_aa64pfr0_el1 + /* Extract GIC bits from the register */ + ubfx x2, x2, #ID_AA64PFR0_GIC_SHIFT, #ID_AA64PFR0_GIC_BITS + /* GIC[3:0] == 0001 - GIC CPU interface via special regs. supported */ + cmp x2, #(ID_AA64PFR0_GIC_CPUIF_EN >> ID_AA64PFR0_GIC_SHIFT) + b.ne 2f + + mrs x2, icc_sre_el2 + orr x2, x2, #ICC_SRE_EL2_EN /* Enable access from insecure EL1 */ + msr icc_sre_el2, x2 + isb +2: + /* Set the address to return to our return address */ msr elr_el2, x30 diff --git a/sys/arm64/conf/GENERIC b/sys/arm64/conf/GENERIC index 8aca4116ea75..8e20d6004d11 100644 --- a/sys/arm64/conf/GENERIC +++ b/sys/arm64/conf/GENERIC @@ -65,6 +65,9 @@ options MAC # TrustedBSD MAC Framework options KDTRACE_FRAME # Ensure frames are compiled in options KDTRACE_HOOKS # Kernel DTrace hooks options VFP # Floating-point support +options RACCT # Resource accounting framework +options RACCT_DEFAULT_TO_DISABLED # Set kern.racct.enable=0 by default +options RCTL # Resource limits device virtio device virtio_mmio diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h index 51063bbacf55..ab1de97feee0 100644 --- a/sys/arm64/include/armreg.h +++ b/sys/arm64/include/armreg.h @@ -96,6 +96,24 @@ #define EXCP_WATCHPT_EL1 0x35 /* Watchpoint, from same EL */ #define EXCP_BRK 0x3c /* Breakpoint */ +/* ICC_CTLR_EL1 */ +#define ICC_CTLR_EL1_EOIMODE (1U << 1) + +/* ICC_IAR1_EL1 */ +#define ICC_IAR1_EL1_SPUR (0x03ff) + +/* ICC_IGRPEN0_EL1 */ +#define ICC_IGRPEN0_EL1_EN (1U << 0) + +/* ICC_PMR_EL1 */ +#define ICC_PMR_EL1_PRIO_MASK (0xFFUL) + +/* ICC_SRE_EL1 */ +#define ICC_SRE_EL1_SRE (1U << 0) + +/* ICC_SRE_EL2 */ +#define ICC_SRE_EL2_EN (1U << 3) + /* ID_AA64PFR0_EL1 */ #define ID_AA64PFR0_EL0_MASK (0xf << 0) #define ID_AA64PFR0_EL1_MASK (0xf << 4) @@ -105,7 +123,10 @@ #define ID_AA64PFR0_FP_IMPL (0x0 << 16) /* Floating-point implemented */ #define ID_AA64PFR0_FP_NONE (0xf << 16) /* Floating-point not implemented */ #define ID_AA64PFR0_ADV_SIMD_MASK (0xf << 20) -#define ID_AA64PFR0_GIC_MASK (0xf << 24) +#define ID_AA64PFR0_GIC_SHIFT (24) +#define ID_AA64PFR0_GIC_BITS (0x4) /* Number of bits in GIC field */ +#define ID_AA64PFR0_GIC_MASK (0xf << ID_AA64PFR0_GIC_SHIFT) +#define ID_AA64PFR0_GIC_CPUIF_EN (0x1 << ID_AA64PFR0_GIC_SHIFT) /* MAIR_EL1 - Memory Attribute Indirection Register */ #define MAIR_ATTR_MASK(idx) (0xff << ((n)* 8)) @@ -191,4 +212,22 @@ #define DBG_MDSCR_KDE (0x1 << 13) #define DBG_MDSCR_MDE (0x1 << 15) +/* Perfomance Monitoring Counters */ +#define PMCR_E (1 << 0) /* Enable all counters */ +#define PMCR_P (1 << 1) /* Reset all counters */ +#define PMCR_C (1 << 2) /* Clock counter reset */ +#define PMCR_D (1 << 3) /* CNTR counts every 64 clk cycles */ +#define PMCR_X (1 << 4) /* Export to ext. monitoring (ETM) */ +#define PMCR_DP (1 << 5) /* Disable CCNT if non-invasive debug*/ +#define PMCR_LC (1 << 6) /* Long cycle count enable */ +#define PMCR_IMP_SHIFT 24 /* Implementer code */ +#define PMCR_IMP_MASK (0xff << PMCR_IMP_SHIFT) +#define PMCR_IDCODE_SHIFT 16 /* Identification code */ +#define PMCR_IDCODE_MASK (0xff << PMCR_IDCODE_SHIFT) +#define PMCR_IDCODE_CORTEX_A57 0x01 +#define PMCR_IDCODE_CORTEX_A72 0x02 +#define PMCR_IDCODE_CORTEX_A53 0x03 +#define PMCR_N_SHIFT 11 /* Number of counters implemented */ +#define PMCR_N_MASK (0x1f << PMCR_N_SHIFT) + #endif /* !_MACHINE_ARMREG_H_ */ diff --git a/sys/arm64/include/bus_dma_impl.h b/sys/arm64/include/bus_dma_impl.h new file mode 100644 index 000000000000..354290e73e26 --- /dev/null +++ b/sys/arm64/include/bus_dma_impl.h @@ -0,0 +1,96 @@ +/*- + * Copyright (c) 2013 The FreeBSD Foundation + * All rights reserved. + * + * This software was developed by Konstantin Belousov + * under sponsorship from the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _MACHINE_BUS_DMA_IMPL_H_ +#define _MACHINE_BUS_DMA_IMPL_H_ + +struct bus_dma_tag_common { + struct bus_dma_impl *impl; + struct bus_dma_tag_common *parent; + bus_size_t alignment; + bus_addr_t boundary; + bus_addr_t lowaddr; + bus_addr_t highaddr; + bus_dma_filter_t *filter; + void *filterarg; + bus_size_t maxsize; + u_int nsegments; + bus_size_t maxsegsz; + int flags; + bus_dma_lock_t *lockfunc; + void *lockfuncarg; + int ref_count; +}; + +struct bus_dma_impl { + int (*tag_create)(bus_dma_tag_t parent, + bus_size_t alignment, bus_addr_t boundary, bus_addr_t lowaddr, + bus_addr_t highaddr, bus_dma_filter_t *filter, + void *filterarg, bus_size_t maxsize, int nsegments, + bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc, + void *lockfuncarg, bus_dma_tag_t *dmat); + int (*tag_destroy)(bus_dma_tag_t dmat); + int (*map_create)(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp); + int (*map_destroy)(bus_dma_tag_t dmat, bus_dmamap_t map); + int (*mem_alloc)(bus_dma_tag_t dmat, void** vaddr, int flags, + bus_dmamap_t *mapp); + void (*mem_free)(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map); + int (*load_ma)(bus_dma_tag_t dmat, bus_dmamap_t map, + struct vm_page **ma, bus_size_t tlen, int ma_offs, int flags, + bus_dma_segment_t *segs, int *segp); + int (*load_phys)(bus_dma_tag_t dmat, bus_dmamap_t map, + vm_paddr_t buf, bus_size_t buflen, int flags, + bus_dma_segment_t *segs, int *segp); + int (*load_buffer)(bus_dma_tag_t dmat, bus_dmamap_t map, + void *buf, bus_size_t buflen, pmap_t pmap, int flags, + bus_dma_segment_t *segs, int *segp); + void (*map_waitok)(bus_dma_tag_t dmat, bus_dmamap_t map, + struct memdesc *mem, bus_dmamap_callback_t *callback, + void *callback_arg); + bus_dma_segment_t *(*map_complete)(bus_dma_tag_t dmat, bus_dmamap_t map, + bus_dma_segment_t *segs, int nsegs, int error); + void (*map_unload)(bus_dma_tag_t dmat, bus_dmamap_t map); + void (*map_sync)(bus_dma_tag_t dmat, bus_dmamap_t map, + bus_dmasync_op_t op); +}; + +void bus_dma_dflt_lock(void *arg, bus_dma_lock_op_t op); +int bus_dma_run_filter(struct bus_dma_tag_common *dmat, bus_addr_t paddr); +int common_bus_dma_tag_create(struct bus_dma_tag_common *parent, + bus_size_t alignment, + bus_addr_t boundary, bus_addr_t lowaddr, bus_addr_t highaddr, + bus_dma_filter_t *filter, void *filterarg, bus_size_t maxsize, + int nsegments, bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc, + void *lockfuncarg, size_t sz, void **dmat); + +extern struct bus_dma_impl bus_dma_bounce_impl; + +#endif diff --git a/sys/arm64/include/pmc_mdep.h b/sys/arm64/include/pmc_mdep.h index 455f7a10dc79..5d6f40d0e6c0 100644 --- a/sys/arm64/include/pmc_mdep.h +++ b/sys/arm64/include/pmc_mdep.h @@ -29,6 +29,14 @@ #ifndef _MACHINE_PMC_MDEP_H_ #define _MACHINE_PMC_MDEP_H_ +#define PMC_MDEP_CLASS_INDEX_ARMV8 1 +/* + * On the ARMv8 platform we support the following PMCs. + * + * ARMV8 ARM Cortex-A53/57/72 processors + */ +#include + union pmc_md_op_pmcallocate { uint64_t __pad[4]; }; @@ -39,12 +47,21 @@ union pmc_md_op_pmcallocate { #ifdef _KERNEL union pmc_md_pmc { + struct pmc_md_arm64_pmc pm_arm64; }; -#define PMC_TRAPFRAME_TO_PC(TF) (0) /* Stubs */ -#define PMC_TRAPFRAME_TO_FP(TF) (0) -#define PMC_TRAPFRAME_TO_SP(TF) (0) +#define PMC_IN_KERNEL_STACK(S,START,END) \ + ((S) >= (START) && (S) < (END)) +#define PMC_IN_KERNEL(va) INKERNEL((va)) +#define PMC_IN_USERSPACE(va) ((va) <= VM_MAXUSER_ADDRESS) +#define PMC_TRAPFRAME_TO_PC(TF) ((TF)->tf_lr) +#define PMC_TRAPFRAME_TO_FP(TF) ((TF)->tf_x[29]) +/* + * Prototypes + */ +struct pmc_mdep *pmc_arm64_initialize(void); +void pmc_arm64_finalize(struct pmc_mdep *_md); #endif /* _KERNEL */ #endif /* !_MACHINE_PMC_MDEP_H_ */ diff --git a/sys/boot/arm/uboot/Makefile b/sys/boot/arm/uboot/Makefile index e0ea8288c811..dce603a2c851 100644 --- a/sys/boot/arm/uboot/Makefile +++ b/sys/boot/arm/uboot/Makefile @@ -2,7 +2,8 @@ .include -PROG= ubldr +FILES= ubldr ubldr.bin + NEWVERSWHAT= "U-Boot loader" ${MACHINE_ARCH} BINDIR?= /boot INSTALLFLAGS= -b @@ -12,7 +13,7 @@ WARNS?= 1 UBLDR_LOADADDR?= 0x1000000 # Architecture-specific loader code -SRCS= start.S conf.c vers.c +SRCS= start.S conf.c self_reloc.c vers.c .if !defined(LOADER_NO_DISK_SUPPORT) LOADER_DISK_SUPPORT?= yes @@ -76,6 +77,8 @@ LIBUBOOT_FDT= ${.OBJDIR}/../../uboot/fdt/libuboot_fdt.a LIBFDT= ${.OBJDIR}/../../fdt/libfdt.a .endif +CFLAGS+= -DNETIF_OPEN_CLOSE_ONCE + .if ${MK_FORTH} != "no" # Enable BootForth BOOT_FORTH= yes @@ -93,9 +96,7 @@ CLEANFILES+= vers.c loader.help CFLAGS+= -ffreestanding -msoft-float -LDFLAGS= -nostdlib -static -LDFLAGS+= -T ldscript.generated -LDFLAGS+= -T ${.CURDIR}/ldscript.${MACHINE_CPUARCH} +LDFLAGS= -nostdlib -static -T ${.CURDIR}/ldscript.${MACHINE_CPUARCH} # Pull in common loader code .PATH: ${.CURDIR}/../../uboot/common @@ -116,6 +117,8 @@ NO_WERROR.clang= DPADD= ${LIBFICL} ${LIBUBOOT} ${LIBFDT} ${LIBUBOOT_FDT} ${LIBSTAND} LDADD= ${LIBFICL} ${LIBUBOOT} ${LIBFDT} ${LIBUBOOT_FDT} -lstand +OBJS+= ${SRCS:N*.h:R:S/$/.o/g} + vers.c: ${.CURDIR}/../../common/newvers.sh ${.CURDIR}/version sh ${.CURDIR}/../../common/newvers.sh ${.CURDIR}/version ${NEWVERSWHAT} @@ -123,17 +126,24 @@ loader.help: help.common help.uboot ${.CURDIR}/../../fdt/help.fdt cat ${.ALLSRC} | \ awk -f ${.CURDIR}/../../common/merge_help.awk > ${.TARGET} -${PROG}: ldscript.generated ${.CURDIR}/ldscript.${MACHINE_CPUARCH} +ldscript.abs: + echo "UBLDR_LOADADDR = ${UBLDR_LOADADDR};" >${.TARGET} -ldscript.generated:: - rm -f ldscript.generated.tmp - echo "UBLDR_LOADADDR = ${UBLDR_LOADADDR};" >ldscript.generated.tmp - if diff ldscript.generated ldscript.generated.tmp > /dev/null; then \ - true; \ - else \ - rm -f ldscript.generated; \ - mv ldscript.generated.tmp ldscript.generated; \ - fi +ldscript.pie: + echo "UBLDR_LOADADDR = 0;" >${.TARGET} + +ubldr: ${OBJS} ldscript.abs ${.CURDIR}/ldscript.${MACHINE_CPUARCH} ${DPADD} + ${CC} ${CFLAGS} -T ldscript.abs ${LDFLAGS} \ + -o ${.TARGET} ${OBJS} ${LDADD} + +ubldr.pie: ${OBJS} ldscript.pie ${.CURDIR}/ldscript.${MACHINE_CPUARCH} ${DPADD} + ${CC} ${CFLAGS} -T ldscript.pie ${LDFLAGS} -pie -Wl,-Bsymbolic \ + -o ${.TARGET} ${OBJS} ${LDADD} + +ubldr.bin: ubldr.pie + ${OBJCOPY} -S -O binary ubldr.pie ${.TARGET} + +CLEANFILES+= ldscript.abs ldscript.pie ubldr ubldr.pie ubldr.bin .if !defined(LOADER_ONLY) .PATH: ${.CURDIR}/../../forth diff --git a/sys/boot/arm/uboot/ldscript.arm b/sys/boot/arm/uboot/ldscript.arm index b3be11916236..1eb10a8ee139 100644 --- a/sys/boot/arm/uboot/ldscript.arm +++ b/sys/boot/arm/uboot/ldscript.arm @@ -6,6 +6,15 @@ SECTIONS { /* Read-only sections, merged into text segment: */ . = UBLDR_LOADADDR + SIZEOF_HEADERS; + .text : + { + *(.text) + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + *(.gnu.linkonce.t*) + } =0 + _etext = .; + PROVIDE (etext = .); .interp : { *(.interp) } .hash : { *(.hash) } .dynsym : { *(.dynsym) } @@ -32,15 +41,6 @@ SECTIONS .rela.sbss : { *(.rela.sbss) } .rela.sdata2 : { *(.rela.sdata2) } .rela.sbss2 : { *(.rela.sbss2) } - .text : - { - *(.text) - /* .gnu.warning sections are handled specially by elf32.em. */ - *(.gnu.warning) - *(.gnu.linkonce.t*) - } =0 - _etext = .; - PROVIDE (etext = .); .init : { *(.init) } =0 .fini : { *(.fini) } =0 .rodata : { *(.rodata) *(.gnu.linkonce.r*) } diff --git a/sys/boot/arm/uboot/start.S b/sys/boot/arm/uboot/start.S index 6e8f11728313..1ef21f3671f0 100644 --- a/sys/boot/arm/uboot/start.S +++ b/sys/boot/arm/uboot/start.S @@ -29,12 +29,38 @@ #include #include + .text + .extern _C_LABEL(self_reloc), _C_LABEL(main) + .weak _DYNAMIC + /* * Entry point to the loader that U-Boot passes control to. */ - .text .globl _start _start: + +#ifdef _ARM_ARCH_6 + mrc p15, 0, ip, c1, c0, 0 + orr ip, ip, #(CPU_CONTROL_UNAL_ENABLE) + orr ip, ip, #(CPU_CONTROL_AFLT_ENABLE) + mcr p15, 0, ip, c1, c0, 0 +#endif + /* + * Do self-relocation when the weak external symbol _DYNAMIC is non-NULL. + * When linked as a dynamic relocatable file, the linker automatically + * defines _DYNAMIC with a value that is the offset of the dynamic + * relocation info section. + * Note that we're still on u-boot's stack here, but the self_reloc + * code uses only a couple dozen bytes of stack space. + */ + adr ip, .here_off /* .here_off is a symbol whose value */ + ldr r0, [ip] /* is its own offset in the text seg. */ + sub r0, ip, r0 /* Get its pc-relative address and */ + ldr r1, .dynamic_off /* subtract its value and we get */ + teq r1, #0 /* r0 = physaddr we were loaded at. */ + addne r1, r1, r0 /* r1 = dynamic section physaddr. */ + blne _C_LABEL(self_reloc) /* Do reloc if _DYNAMIC is non-NULL. */ + /* Hint where to look for the API signature */ ldr ip, =uboot_address str sp, [ip] @@ -44,16 +70,20 @@ _start: str r8, [ip, #0] str r9, [ip, #4] -#ifdef _ARM_ARCH_6 - mrc p15, 0, r2, c1, c0, 0 - orr r2, r2, #(CPU_CONTROL_UNAL_ENABLE) - orr r2, r2, #(CPU_CONTROL_AFLT_ENABLE) - mcr p15, 0, r2, c1, c0, 0 -#endif - - /* Start loader */ + /* + * Start loader. This is basically a tail-recursion call; if main() + * returns, it returns to u-boot (which reports the value returned r0). + */ b main + /* + * Data for self-relocation, in the text segment for pc-rel access. + */ +.here_off: + .word . +.dynamic_off: + .word _DYNAMIC + /* * syscall() */ diff --git a/sys/boot/common/dev_net.c b/sys/boot/common/dev_net.c index 147a809325a5..091ed0216684 100644 --- a/sys/boot/common/dev_net.c +++ b/sys/boot/common/dev_net.c @@ -111,6 +111,8 @@ net_init(void) static int net_open(struct open_file *f, ...) { + char temp[FNAME_SIZE]; + struct iodesc *d; va_list args; char *devname; /* Device part of file name (or NULL). */ int error = 0; @@ -140,6 +142,10 @@ net_open(struct open_file *f, ...) printf("net_open: netif_open() succeeded\n"); #endif } + /* + * If network params were not set by netif_open(), try to get + * them via bootp, rarp, etc. + */ if (rootip.s_addr == 0) { /* Get root IP address, and path, etc. */ error = net_getparams(netdev_sock); @@ -151,6 +157,20 @@ net_open(struct open_file *f, ...) return (error); } } + /* + * Set the variables required by the kernel's nfs_diskless + * mechanism. This is the minimum set of variables required to + * mount a root filesystem without needing to obtain additional + * info from bootp or other sources. + */ + d = socktodesc(netdev_sock); + sprintf(temp, "%6D", d->myea, ":"); + setenv("boot.netif.hwaddr", temp, 1); + setenv("boot.netif.ip", inet_ntoa(myip), 1); + setenv("boot.netif.netmask", intoa(netmask), 1); + setenv("boot.netif.gateway", inet_ntoa(gateip), 1); + setenv("boot.nfsroot.server", inet_ntoa(rootip), 1); + setenv("boot.nfsroot.path", rootpath, 1); } netdev_opens++; f->f_devdata = &netdev_sock; @@ -232,10 +252,7 @@ static int net_getparams(int sock) { char buf[MAXHOSTNAMELEN]; - char temp[FNAME_SIZE]; - struct iodesc *d; - int i; - n_long smask; + n_long rootaddr, smask; #ifdef SUPPORT_BOOTP /* @@ -302,21 +319,9 @@ net_getparams(int sock) return (EIO); } exit: - /* - * If present, strip the server's address off of the rootpath - * before passing it along. This allows us to be compatible with - * the kernel's diskless (BOOTP_NFSROOT) booting conventions - */ - for (i = 0; rootpath[i] != '\0' && i < FNAME_SIZE; i++) - if (rootpath[i] == ':') - break; - if (i && i != FNAME_SIZE && rootpath[i] == ':') { - rootpath[i++] = '\0'; - if (inet_addr(&rootpath[0]) != INADDR_NONE) - rootip.s_addr = inet_addr(&rootpath[0]); - bcopy(&rootpath[i], &temp[0], strlen(&rootpath[i])+1); - bcopy(&temp[0], &rootpath[0], strlen(&rootpath[i])+1); - } + if ((rootaddr = net_parse_rootpath()) != INADDR_NONE) + rootip.s_addr = rootaddr; + #ifdef NETIF_DEBUG if (debug) { printf("net_open: server addr: %s\n", inet_ntoa(rootip)); @@ -324,15 +329,6 @@ net_getparams(int sock) } #endif - d = socktodesc(sock); - sprintf(temp, "%6D", d->myea, ":"); - setenv("boot.netif.ip", inet_ntoa(myip), 1); - setenv("boot.netif.netmask", intoa(netmask), 1); - setenv("boot.netif.gateway", inet_ntoa(gateip), 1); - setenv("boot.netif.hwaddr", temp, 1); - setenv("boot.nfsroot.server", inet_ntoa(rootip), 1); - setenv("boot.nfsroot.path", rootpath, 1); - return (0); } @@ -354,3 +350,24 @@ net_print(int verbose) } printf("\n"); } + +/* + * Strip the server's address off of the rootpath if present and return it in + * network byte order, leaving just the pathname part in the global rootpath. + */ +uint32_t +net_parse_rootpath() +{ + int i; + n_long addr = INADDR_NONE; + + for (i = 0; rootpath[i] != '\0' && i < FNAME_SIZE; i++) + if (rootpath[i] == ':') + break; + if (i && i != FNAME_SIZE && rootpath[i] == ':') { + rootpath[i++] = '\0'; + addr = inet_addr(&rootpath[0]); + bcopy(&rootpath[i], rootpath, strlen(&rootpath[i])+1); + } + return (addr); +} diff --git a/sys/boot/common/dev_net.h b/sys/boot/common/dev_net.h index 3b3d10728a3d..995b67241de8 100644 --- a/sys/boot/common/dev_net.h +++ b/sys/boot/common/dev_net.h @@ -26,5 +26,11 @@ * $FreeBSD$ */ +#ifndef _BOOT_DEV_NET_H_ +#define _BOOT_DEV_NET_H_ + extern struct devsw netdev; +uint32_t net_parse_rootpath(void); + +#endif diff --git a/sys/boot/common/load_elf.c b/sys/boot/common/load_elf.c index 7b2c8e716aba..7db1867e774c 100644 --- a/sys/boot/common/load_elf.c +++ b/sys/boot/common/load_elf.c @@ -191,10 +191,17 @@ __elfN(loadfile_raw)(char *filename, u_int64_t dest, goto oerr; } /* - * Calculate destination address based on kernel entrypoint + * Calculate destination address based on kernel entrypoint. + * + * For ARM, the destination address is independent of any values in the + * elf header (an ARM kernel can be loaded at any 2MB boundary), so we + * leave dest set to the value calculated by archsw.arch_loadaddr() and + * passed in to this function. */ +#ifndef __arm__ if (ehdr->e_type == ET_EXEC) dest = (ehdr->e_entry & ~PAGE_MASK); +#endif if ((ehdr->e_entry & ~PAGE_MASK) == 0) { printf("elf" __XSTRING(__ELF_WORD_SIZE) "_loadfile: not a kernel (maybe static binary?)\n"); err = EPERM; @@ -348,22 +355,18 @@ __elfN(loadimage)(struct preloaded_file *fp, elf_file_t ef, u_int64_t off) off = 0; #elif defined(__arm__) /* - * The elf headers in some kernels specify virtual addresses in all - * header fields. More recently, the e_entry and p_paddr fields are the - * proper physical addresses. Even when the p_paddr fields are correct, - * the MI code below uses the p_vaddr fields with an offset added for - * loading (doing so is arguably wrong). To make loading work, we need - * an offset that represents the difference between physical and virtual - * addressing. ARM kernels are always linked at 0xCnnnnnnn. Depending - * on the headers, the offset value passed in may be physical or virtual - * (because it typically comes from e_entry), but we always replace - * whatever is passed in with the va<->pa offset. On the other hand, we - * always remove the high-order part of the entry address whether it's - * physical or virtual, because it will be adjusted later for the actual - * physical entry point based on where the image gets loaded. + * The elf headers in arm kernels specify virtual addresses in all + * header fields, even the ones that should be physical addresses. + * We assume the entry point is in the first page, and masking the page + * offset will leave us with the virtual address the kernel was linked + * at. We subtract that from the load offset, making 'off' into the + * value which, when added to a virtual address in an elf header, + * translates it to a physical address. We do the va->pa conversion on + * the entry point address in the header now, so that later we can + * launch the kernel by just jumping to that address. */ - off = -0xc0000000; - ehdr->e_entry &= ~0xf0000000; + off -= ehdr->e_entry & ~PAGE_MASK; + ehdr->e_entry += off; #ifdef ELF_VERBOSE printf("ehdr->e_entry 0x%08x, va<->pa off %llx\n", ehdr->e_entry, off); #endif diff --git a/sys/boot/efi/loader/reloc.c b/sys/boot/common/self_reloc.c similarity index 87% rename from sys/boot/efi/loader/reloc.c rename to sys/boot/common/self_reloc.c index fbe20431edf4..9864a4899f6a 100644 --- a/sys/boot/efi/loader/reloc.c +++ b/sys/boot/common/self_reloc.c @@ -29,7 +29,6 @@ __FBSDID("$FreeBSD$"); #include #include -#include #include #if defined(__aarch64__) @@ -38,11 +37,11 @@ __FBSDID("$FreeBSD$"); #define ELFW_R_TYPE ELF64_R_TYPE #define ELF_RELA #elif defined(__arm__) || defined(__i386__) -#define ElfW_Rel Elf32_Rel +#define ElfW_Rel Elf32_Rel #define ElfW_Dyn Elf32_Dyn #define ELFW_R_TYPE ELF32_R_TYPE #elif defined(__amd64__) -#define ElfW_Rel Elf64_Rel +#define ElfW_Rel Elf64_Rel #define ElfW_Dyn Elf64_Dyn #define ELFW_R_TYPE ELF64_R_TYPE #else @@ -63,14 +62,13 @@ __FBSDID("$FreeBSD$"); #endif /* - * A simple relocator for EFI binaries. + * A simple elf relocator. */ -EFI_STATUS -_reloc(unsigned long ImageBase, ElfW_Dyn *dynamic, EFI_HANDLE image_handle, - EFI_SYSTEM_TABLE *system_table) +void +self_reloc(Elf_Addr baseaddr, ElfW_Dyn *dynamic) { - unsigned long relsz, relent; - unsigned long *newaddr; + Elf_Word relsz, relent; + Elf_Addr *newaddr; ElfW_Rel *rel; ElfW_Dyn *dynp; @@ -83,8 +81,7 @@ _reloc(unsigned long ImageBase, ElfW_Dyn *dynamic, EFI_HANDLE image_handle, switch (dynp->d_tag) { case DT_REL: case DT_RELA: - rel = (ElfW_Rel *) ((unsigned long) dynp->d_un.d_ptr + - ImageBase); + rel = (ElfW_Rel *)(dynp->d_un.d_ptr + baseaddr); break; case DT_RELSZ: case DT_RELASZ: @@ -110,8 +107,8 @@ _reloc(unsigned long ImageBase, ElfW_Dyn *dynamic, EFI_HANDLE image_handle, case RELOC_TYPE_RELATIVE: /* Address relative to the base address. */ - newaddr = (unsigned long *)(ImageBase + rel->r_offset); - *newaddr += ImageBase; + newaddr = (Elf_Addr *)(rel->r_offset + baseaddr); + *newaddr += baseaddr; /* Add the addend when the ABI uses them */ #ifdef ELF_RELA *newaddr += rel->r_addend; @@ -123,6 +120,4 @@ _reloc(unsigned long ImageBase, ElfW_Dyn *dynamic, EFI_HANDLE image_handle, } rel = (ElfW_Rel *) ((caddr_t) rel + relent); } - - return (EFI_SUCCESS); } diff --git a/sys/boot/efi/boot1/Makefile b/sys/boot/efi/boot1/Makefile index a955bdf38905..c6a6d59e50d1 100644 --- a/sys/boot/efi/boot1/Makefile +++ b/sys/boot/efi/boot1/Makefile @@ -13,7 +13,7 @@ PROG= loader.sym INTERNALPROG= # architecture-specific loader code -SRCS= boot1.c reloc.c start.S +SRCS= boot1.c self_reloc.c start.S CFLAGS+= -I. CFLAGS+= -I${.CURDIR}/../include diff --git a/sys/boot/efi/loader/Makefile b/sys/boot/efi/loader/Makefile index 06e76a90a051..d11021ecefb0 100644 --- a/sys/boot/efi/loader/Makefile +++ b/sys/boot/efi/loader/Makefile @@ -20,7 +20,7 @@ SRCS= autoload.c \ copy.c \ devicename.c \ main.c \ - reloc.c \ + self_reloc.c \ smbios.c \ vers.c diff --git a/sys/boot/efi/loader/arch/amd64/start.S b/sys/boot/efi/loader/arch/amd64/start.S index beaeeff29723..774ef4fa7901 100644 --- a/sys/boot/efi/loader/arch/amd64/start.S +++ b/sys/boot/efi/loader/arch/amd64/start.S @@ -53,7 +53,7 @@ _start: popq %rdx pushq %rcx pushq %rdx - call _reloc + call self_reloc popq %rdi popq %rsi diff --git a/sys/boot/efi/loader/arch/arm/ldscript.arm b/sys/boot/efi/loader/arch/arm/ldscript.arm index 6404c0c6c6fc..4dcf302b2213 100644 --- a/sys/boot/efi/loader/arch/arm/ldscript.arm +++ b/sys/boot/efi/loader/arch/arm/ldscript.arm @@ -1,6 +1,4 @@ /* $FreeBSD$ */ -OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", - "elf32-littlearm") OUTPUT_ARCH(arm) ENTRY(_start) SECTIONS diff --git a/sys/boot/efi/loader/arch/arm/start.S b/sys/boot/efi/loader/arch/arm/start.S index 41606552ebe3..443de4af1f87 100644 --- a/sys/boot/efi/loader/arch/arm/start.S +++ b/sys/boot/efi/loader/arch/arm/start.S @@ -153,7 +153,7 @@ _start: ldr r1, .Ldynamic add r1, r1, r5 - bl _C_LABEL(_reloc) + bl _C_LABEL(self_reloc) /* Zero the BSS, _reloc fixed the values for us */ ldr r0, .Lbss diff --git a/sys/boot/efi/loader/arch/arm64/start.S b/sys/boot/efi/loader/arch/arm64/start.S index a8002fa20246..cd9badb05b79 100644 --- a/sys/boot/efi/loader/arch/arm64/start.S +++ b/sys/boot/efi/loader/arch/arm64/start.S @@ -156,7 +156,7 @@ _start: adr x0, ImageBase adr x1, _DYNAMIC - bl _reloc + bl self_reloc ldp x0, x1, [sp], #16 diff --git a/sys/boot/efi/loader/arch/i386/start.S b/sys/boot/efi/loader/arch/i386/start.S index 2be2478f9dd7..b597f419d4a1 100644 --- a/sys/boot/efi/loader/arch/i386/start.S +++ b/sys/boot/efi/loader/arch/i386/start.S @@ -53,9 +53,7 @@ ENTRY(_start) addl $_DYNAMIC-0b, %ebx pushl %ebx /* dynamic */ pushl %eax /* ImageBase */ - call _reloc - cmpl $EFI_SUCCESS, %eax - jne 1f + call self_reloc popl %ebx /* remove ImageBase from the stack */ popl %ebx /* remove dynamic from the stack */ call efi_main diff --git a/sys/boot/fdt/dts/arm/am335x-evm.dts b/sys/boot/fdt/dts/arm/am335x-evm.dts index 30239f6747c0..3e1c4c0caada 100644 --- a/sys/boot/fdt/dts/arm/am335x-evm.dts +++ b/sys/boot/fdt/dts/arm/am335x-evm.dts @@ -1,5 +1,5 @@ /*- - * Copyright (c) 2012 Damjan Marion + * Copyright (c) 2015 Oleksandr Tymoshenko * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -26,158 +26,4 @@ * $FreeBSD$ */ -/dts-v1/; - -/include/ "am335x.dtsi" - -/ { - model = "TMDXEVM3358"; - compatible = "ti,am335x"; - - aliases { - soc = &SOC; - uart0 = &uart0; - }; - - memory { - device_type = "memory"; - reg = < 0x80000000 0x10000000 >; /* 256MB RAM */ - }; - - am335x { - scm@44e10000 { - /* Set of triplets < padname, muxname, padstate> */ - scm-pad-config = - /* I2C0 */ - "I2C0_SDA", "I2C0_SDA","i2c", - "I2C0_SCL", "I2C0_SCL","i2c", - /* Ethernet */ - "MII1_RX_ER", "gmii1_rxerr", "input_pulldown", - "MII1_TX_EN", "gmii1_txen", "output", - "MII1_RX_DV", "gmii1_rxdv", "input_pulldown", - "MII1_TXD3", "gmii1_txd3", "output", - "MII1_TXD2", "gmii1_txd2", "output", - "MII1_TXD1", "gmii1_txd1", "output", - "MII1_TXD0", "gmii1_txd0", "output", - "MII1_TX_CLK", "gmii1_txclk", "input_pulldown", - "MII1_RX_CLK", "gmii1_rxclk", "input_pulldown", - "MII1_RXD3", "gmii1_rxd3", "input_pulldown", - "MII1_RXD2", "gmii1_rxd2", "input_pulldown", - "MII1_RXD1", "gmii1_rxd1", "input_pulldown", - "MII1_RXD0", "gmii1_rxd0", "input_pulldown", - "MDIO", "mdio_data", "input_pullup", - "MDC", "mdio_clk", "output_pullup", - /* MMCSD0 */ - "MMC0_CMD", "mmc0_cmd", "input_pullup", - "MMC0_CLK", "mmc0_clk", "input_pullup", - "MMC0_DAT0", "mmc0_dat0", "input_pullup", - "MMC0_DAT1", "mmc0_dat1", "input_pullup", - "MMC0_DAT2", "mmc0_dat2", "input_pullup", - "MMC0_DAT3", "mmc0_dat3", "input_pullup", - /* GPIO */ - "GPMC_AD10", "gpio0_26", "input_pulldown", - "GPMC_AD11", "gpio0_27", "input_pulldown", - "GPMC_AD0", "gpio1_0", "input_pulldown", - "GPMC_AD1", "gpio1_1", "input_pulldown", - "GPMC_AD2", "gpio1_2", "input_pulldown", - "GPMC_AD3", "gpio1_3", "input_pulldown", - "GPMC_AD4", "gpio1_4", "input_pulldown", - "GPMC_AD5", "gpio1_5", "input_pulldown", - "GPMC_AD6", "gpio1_6", "input_pulldown", - "GPMC_AD7", "gpio1_7", "input_pulldown", - "GPMC_AD12", "gpio1_12", "input_pulldown", - "GPMC_AD13", "gpio1_13", "input_pulldown", - "GPMC_AD14", "gpio1_14", "input_pulldown", - "GPMC_AD15", "gpio1_15", "input_pulldown", - "GPMC_A0", "gpio1_16", "input_pulldown", - "GPMC_A1", "gpio1_17", "input_pulldown", - "GPMC_A5", "gpio1_21", "output", /* User LED 1 */ - "GPMC_A6", "gpio1_22", "output", /* User LED 2 */ - "GPMC_A7", "gpio1_23", "output", /* User LED 3 */ - "GPMC_A8", "gpio1_24", "output", /* User LED 4 */ - "GPMC_BEn1", "gpio1_28", "input_pulldown", - "GPMC_CSn0", "gpio1_29", "input_pulldown", - "GPMC_CSn1", "gpio1_30", "input_pulldown", - "GPMC_CSn2", "gpio1_31", "input_pulldown", - "MCASP0_FSR", "gpio3_19", "input_pulldown", - "MCASP0_AHCLKX", "gpio3_21", "input_pulldown", - /* TIMERs */ - "GPMC_ADVn_ALE", "timer4", "output", - "GPMC_BEn0_CLE", "timer5", "output", - "GPMC_WEn", "timer6", "output", - "GPMC_OEn_REn", "timer7", "output", - /* USB0 and USB1 */ - "USB0_DRVVBUS", "USB0_DRVVBUS", "output", - "USB1_DRVVBUS", "USB1_DRVVBUS", "output", - /* LCD */ - "GPMC_AD8", "lcd_data23", "output", - "GPMC_AD9", "lcd_data22", "output", - "GPMC_AD10", "lcd_data21", "output", - "GPMC_AD11", "lcd_data20", "output", - "GPMC_AD12", "lcd_data19", "output", - "GPMC_AD13", "lcd_data18", "output", - "GPMC_AD14", "lcd_data17", "output", - "GPMC_AD15", "lcd_data16", "output", - "GPMC_CLK", "lcd_memory_clk", "output", - "LCD_DATA0", "lcd_data0", "output", - "LCD_DATA1", "lcd_data1", "output", - "LCD_DATA2", "lcd_data2", "output", - "LCD_DATA3", "lcd_data3", "output", - "LCD_DATA4", "lcd_data4", "output", - "LCD_DATA5", "lcd_data5", "output", - "LCD_DATA6", "lcd_data6", "output", - "LCD_DATA7", "lcd_data7", "output", - "LCD_DATA8", "lcd_data8", "output", - "LCD_DATA9", "lcd_data9", "output", - "LCD_DATA10", "lcd_data10", "output", - "LCD_DATA11", "lcd_data11", "output", - "LCD_DATA12", "lcd_data12", "output", - "LCD_DATA13", "lcd_data13", "output", - "LCD_DATA14", "lcd_data14", "output", - "LCD_DATA15", "lcd_data15", "output", - "LCD_VSYNC", "lcd_vsync", "output", - "LCD_HSYNC", "lcd_hsync", "output", - "LCD_PCLK", "lcd_pclk", "output", - "LCD_AC_BIAS_EN", "lcd_ac_bias_en", "output", - "ECAP0_IN_PWM0_OUT", "eCAP0_in_PWM0_out", "output"; - - }; - - lcd@4830e000 { - panel_name = "TFC_S9700RTWV35TR_01B"; - panel_width = <800>; - panel_height = <480>; - panel_hfp = <39>; - panel_hbp = <39>; - panel_hsw = <47>; - panel_vfp = <13>; - panel_vbp = <29>; - panel_vsw = <2>; - panel_pxl_clk = <30000000>; - panel_invert_pxl_clk = <0>; - panel_type = <1>; /* Active or passive, compatibility */ - panel_max_bpp = <32>; /* compatibility */ - panel_min_bpp = <32>; /* compatibility */ - panel_shade = <1>; /* compatibility */ - ac_bias = <255>; - ac_bias_intrpt = <0>; - dma_burst_sz = <16>; - bpp = <32>; - fdd = <128>; - tft_alt_mode = <0>; /* compatiblity */ - stn_565_mode = <0>; /* compatibility */ - mono_8bit_mode = <0>; /* compatibilty */ - invert_line_clock = <1>; - invert_frm_clock = <1>; - sync_edge = <0>; - sync_ctrl = <1>; - raster_order = <0>; /* compatibity */ - }; - - }; - - chosen { - stdin = "uart0"; - stdout = "uart0"; - }; -}; +#include "am335x-evm.dts" diff --git a/sys/boot/fdt/dts/arm/am335x.dtsi b/sys/boot/fdt/dts/arm/am335x.dtsi deleted file mode 100644 index fea57e98b0f3..000000000000 --- a/sys/boot/fdt/dts/arm/am335x.dtsi +++ /dev/null @@ -1,349 +0,0 @@ -/*- - * Copyright (c) 2012 Damjan Marion - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/ { - #address-cells = <1>; - #size-cells = <1>; - - interrupt-parent = <&AINTC>; - - SOC: am335x { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges; - bus-frequency = <0>; - - AINTC: interrupt-controller@48200000 { - compatible = "ti,aintc"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = < 0x48200000 0x1000 >; - }; - - pmu { - compatible = "arm,cortex-a8-pmu"; - interrupts = <3>; - }; - - scm@44e10000 { - compatible = "ti,scm"; - reg = < 0x44e10000 0x2000 >; - }; - - prcm@44E00000 { - compatible = "am335x,prcm"; - #address-cells = <1>; - #size-cells = <1>; - reg = < 0x44E00000 0x1300 >; - }; - - dmtimers@44E05000 { - compatible = "ti,am335x-dmtimer"; - #address-cells = <1>; - #size-cells = <1>; - reg = < 0x44E05000 0x1000 - 0x44E31000 0x1000 - 0x48040000 0x1000 - 0x48042000 0x1000 - 0x48044000 0x1000 - 0x48046000 0x1000 - 0x48048000 0x1000 - 0x4804A000 0x1000 >; - interrupts = < 66 67 68 69 92 93 94 95 >; - interrupt-parent = <&AINTC>; - }; - - rtc: rtc@44E3E000 { - compatible = "ti,da830-rtc"; - reg = <0x44E3E000 0x1000>; - interrupts = < 75 76 >; - interrupt-parent = <&AINTC>; - }; - - adc0: adc@44E0D000 { - compatible = "ti,adc"; - reg = <0x44E0D000 0x2000>; - interrupts = < 16 >; - interrupt-parent = <&AINTC>; - }; - - wdt1@44E35000 { - compatible = "ti,omap3-wdt"; - reg = <0x44E35000 0x1000>; - interrupts = <91>; - interrupt-parent = <&AINTC>; - }; - - GPIO: gpio { - #gpio-cells = <3>; - compatible = "ti,gpio"; - gpio-controller; - reg =< 0x44E07000 0x1000 - 0x4804C000 0x1000 - 0x481AC000 0x1000 - 0x481AE000 0x1000 >; - interrupts = < 96 97 98 99 32 33 62 63 >; - interrupt-parent = <&AINTC>; - interrupt-controller; - #interrupt-cells = <1>; - }; - - uart0: serial@44E09000 { - compatible = "ti,ns16550"; - reg = <0x44E09000 0x1000>; - reg-shift = <2>; - interrupts = < 72 >; - interrupt-parent = <&AINTC>; - clock-frequency = < 48000000 >; - uart-device-id = < 0 >; - }; - - uart1: serial@48022000 { - compatible = "ti,ns16550"; - reg = <0x48022000 0x1000>; - reg-shift = <2>; - interrupts = < 73 >; - interrupt-parent = <&AINTC>; - clock-frequency = < 48000000 >; - uart-device-id = < 1 >; - status = "disabled"; - }; - - uart2: serial@48024000 { - compatible = "ti,ns16550"; - reg = <0x48024000 0x1000>; - reg-shift = <2>; - interrupts = < 74 >; - interrupt-parent = <&AINTC>; - clock-frequency = < 48000000 >; - uart-device-id = < 2 >; - status = "disabled"; - }; - - uart3: serial@481a6000 { - compatible = "ti,ns16550"; - reg = <0x481A6000 0x1000>; - reg-shift = <2>; - interrupts = < 44 >; - interrupt-parent = <&AINTC>; - clock-frequency = < 48000000 >; - uart-device-id = < 3 >; - status = "disabled"; - }; - - uart4: serial@481a8000 { - compatible = "ti,ns16550"; - reg = <0x481A8000 0x1000>; - reg-shift = <2>; - interrupts = < 45 >; - interrupt-parent = <&AINTC>; - clock-frequency = < 48000000 >; - uart-device-id = < 4 >; - status = "disabled"; - }; - - uart5: serial@481aa000 { - compatible = "ti,ns16550"; - reg = <0x481AA000 0x1000>; - reg-shift = <2>; - interrupts = < 46 >; - interrupt-parent = <&AINTC>; - clock-frequency = < 48000000 >; - uart-device-id = < 5 >; - status = "disabled"; - }; - - edma3@49000000 { - compatible = "ti,edma3"; - reg =< 0x49000000 0x100000 /* Channel Controller Regs */ - 0x49800000 0x100000 /* Transfer Controller 0 Regs */ - 0x49900000 0x100000 /* Transfer Controller 1 Regs */ - 0x49a00000 0x100000 >; /* Transfer Controller 2 Regs */ - interrupts = <12 13 14>; - interrupt-parent = <&AINTC>; - }; - - mmchs0@48060000 { - compatible = "ti,omap3-hsmmc", "ti,mmchs"; - reg =<0x48060000 0x1000 >; - interrupts = <64>; - interrupt-parent = <&AINTC>; - mmchs-device-id = <0>; - mmchs-wp-gpio-pin = <0xffffffff>; - ti,dual-volt; - }; - - mmchs1@481D8000 { - compatible = "ti,omap3-hsmmc", "ti,mmchs"; - reg =<0x481D8000 0x1000 >; - interrupts = <28>; - interrupt-parent = <&AINTC>; - mmchs-device-id = <1>; - mmchs-wp-gpio-pin = <0xffffffff>; - status = "disabled"; - }; - - enet0: ethernet@4A100000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "ti,cpsw"; - reg = <0x4A100000 0x4000>; - interrupts = <40 41 42 43>; - interrupt-parent = <&AINTC>; - phy-handle = <&phy0>; - mdio@0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "ti,cpsw-mdio"; - phy0: ethernet-phy@0 { - reg = <0x0>; - }; - }; - }; - - i2c0: i2c@44e0b000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "ti,i2c"; - reg =< 0x44e0b000 0x1000 >; - interrupts = <70>; - interrupt-parent = <&AINTC>; - i2c-device-id = <0>; - }; - - i2c1: i2c@4802a000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "ti,i2c"; - reg =< 0x4802a000 0x1000 >; - interrupts = <71>; - interrupt-parent = <&AINTC>; - i2c-device-id = <1>; - }; - - i2c2: i2c@4819c000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "ti,i2c"; - reg =< 0x4819c000 0x1000 >; - interrupts = <30>; - interrupt-parent = <&AINTC>; - i2c-device-id = <2>; - }; - - pwm@48300000 { - compatible = "ti,am335x-pwm"; - #address-cells = <1>; - #size-cells = <1>; - reg = < 0x48300000 0x100 /* PWMSS0 */ - 0x48300100 0x80 /* eCAP0 */ - 0x48300180 0x80 /* eQEP0 */ - 0x48300200 0x60 /* ePWM0 */ - >; - interrupts = <86 58>; /* ePWM0INT, ePWM0_TZINT */ - interrupt-parent = <&AINTC>; - pwm-device-id = <0>; - }; - - pwm@48302000 { - compatible = "ti,am335x-pwm"; - #address-cells = <1>; - #size-cells = <1>; - reg = < 0x48302000 0x100 /* PWMSS1 */ - 0x48302100 0x80 /* eCAP1 */ - 0x48302180 0x80 /* eQEP1 */ - 0x48302200 0x60 /* ePWM1 */ - >; - interrupts = <87 59>; /* ePWM1INT, ePWM1_TZINT */ - interrupt-parent = <&AINTC>; - pwm-device-id = <1>; - }; - - pwm@48304000 { - compatible = "ti,am335x-pwm"; - #address-cells = <1>; - #size-cells = <1>; - reg = < 0x48304000 0x100 /* PWMSS2 */ - 0x48304100 0x80 /* eCAP2 */ - 0x48304180 0x80 /* eQEP2 */ - 0x48304200 0x60 /* ePWM2 */ - >; - interrupts = <88 60>; /* ePWM2INT, ePWM2_TZINT */ - interrupt-parent = <&AINTC>; - pwm-device-id = <2>; - }; - - lcd: lcd@4830e000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "ti,am335x-lcd"; - reg =< 0x4830e000 0x1000 >; - interrupts = <36>; - interrupt-parent = <&AINTC>; - }; - - usb@47400000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "ti,musb-am33xx"; - reg =< 0x47400000 0x1000 /* USBSS */ - 0x47401000 0x300 /* USB0 */ - 0x47401300 0x100 /* USB0_PHY */ - 0x47401400 0x400 /* USB0_CORE */ - 0x47401800 0x300 /* USB1 */ - 0x47401B00 0x100 /* USB1_PHY */ - 0x47401C00 0x400 /* USB1_CORE */ - >; - interrupts = <17 18 19>; - interrupt-parent = <&AINTC>; - /* 1 - Host Mode, 0 - Device Mode */ - modemask = <2>; - }; - - mbox0@480C8000 { - compatible = "am335x,system-mbox"; - reg = < 0x480C8000 0x1000 >; - interrupts = <77>; - interrupt-parent = <&AINTC>; - }; - - spinlock0@480CA000 { - compatible = "am335x,spinlock"; - reg = < 0x480CA000 0x1000 >; - }; - - pruss@4A300000 { - compatible = "ti,pruss-v2"; - reg = <0x4A300000 0x80000>; - interrupt-parent = <&AINTC>; - interrupts = <20 21 22 23 24 25 26 27>; - }; - }; -}; diff --git a/sys/boot/fdt/dts/arm/annapurna-alpine.dts b/sys/boot/fdt/dts/arm/annapurna-alpine.dts new file mode 100644 index 000000000000..100d2d046feb --- /dev/null +++ b/sys/boot/fdt/dts/arm/annapurna-alpine.dts @@ -0,0 +1,244 @@ +/*- + * Copyright (c) 2013 Ruslan Bukin + * Copyright (c) 2015 Semihalf + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/ { + model = "annapurna,alpine"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + serial0 = &serial0; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x0>; + d-cache-line-size = <64>; // 64 bytes + i-cache-line-size = <64>; // 64 bytes + d-cache-size = <0x8000>; // L1, 32K + i-cache-size = <0x8000>; // L1, 32K + timebase-frequency = <0>; + bus-frequency = <375000000>; + clock-frequency = <0>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x0>; + d-cache-line-size = <64>; // 64 bytes + i-cache-line-size = <64>; // 64 bytes + d-cache-size = <0x8000>; // L1, 32K + i-cache-size = <0x8000>; // L1, 32K + timebase-frequency = <0>; + bus-frequency = <375000000>; + clock-frequency = <0>; + }; + + cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x0>; + d-cache-line-size = <64>; // 64 bytes + i-cache-line-size = <64>; // 64 bytes + d-cache-size = <0x8000>; // L1, 32K + i-cache-size = <0x8000>; // L1, 32K + timebase-frequency = <0>; + bus-frequency = <375000000>; + clock-frequency = <0>; + }; + + cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x0>; + d-cache-line-size = <64>; // 64 bytes + i-cache-line-size = <64>; // 64 bytes + d-cache-size = <0x8000>; // L1, 32K + i-cache-size = <0x8000>; // L1, 32K + timebase-frequency = <0>; + bus-frequency = <375000000>; + clock-frequency = <0>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x00100000 0x7ff00000>; // 2047MB at 1MB + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0xfb000000 0x03000000>; + bus-frequency = <0>; + + MPIC: interrupt-controller { + compatible = "arm,gic"; + reg = < 0x1000 0x1000 >, /* Distributor Registers */ + < 0x2000 0x2000 >; /* CPU Interface Registers */ + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <3>; + + // In intr[2], bits[3:0] are trigger type and level flags. + // 1 = low-to-high edge triggered + // 2 = high-to-low edge triggered + // 4 = active high level-sensitive + // 8 = active low level-sensitive + // The hardware only supports active-high-level or rising-edge. + + }; + + generic_timer { + compatible = "arm,sp804"; + reg = <0x02890000 0x1000>; + interrupts = <0 9 4>; + interrupt-parent = <&MPIC>; + clock-frequency = <375000000>; + }; + + cpu_resume { + compatible = "annapurna-labs,al-cpu-resume"; + reg = <0x00ff5ec0 0x30>; + }; + + nb_service { + compatible = "annapurna-labs,al-nb-service"; + reg = <0x00070000 0x10000>; + interrupts = <0 32 4>, + <0 33 4>, + <0 34 4>, + <0 35 4>; + interrupt-parent = <&MPIC>; + }; + + wdt0 { + compatible = "arm,sp805", "arm,primecell"; + reg = <0x288c000 0x1000>; + interrupt-parent = <&MPIC>; + }; + + serial0: serial@2883000 { + compatible = "ns16550"; + reg = <0x2883000 0x20>; + reg-shift = <2>; + current-speed = <115200>; + clock-frequency = <375000000>; + interrupts = <0 17 4>; + interrupt-parent = <&MPIC>; + }; + }; + + pcie-internal { + compatible = "annapurna-labs,al-internal-pcie"; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + interrupt-parent = <&MPIC>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = <0x3000 0 0 1 &MPIC 0 32 4>, // USB adapter + <0x3800 0 0 1 &MPIC 0 36 4>, + <0x4000 0 0 1 &MPIC 0 43 4>, // SATA 0 (PCIe expander) + <0x4800 0 0 1 &MPIC 0 44 1>; // SATA 1 (onboard) + + // ranges: + // - ECAM - non prefetchable config space + // - 32 bit non prefetchable memory space + ranges = <0x00000000 0x0 0xfbc00000 0xfbc00000 0x0 0x100000 + 0x02000000 0x0 0xfe000000 0xfe000000 0x0 0x1000000>; + + bus-range = <0x00 0x00>; + }; + +// WORKAROUND: enabling PCIe controller when no card is plugged in +// leads to kernel panic because u-boot disables PCIe controller if no link +// is detected. Just be kind and compatible with Linux +/* // External PCIe Controller 0 + pcie-external0 { + compatible = "annapurna-labs,al-external-pcie"; + reg = <0xfd800000 0x00020000>; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + interrupt-parent = <&MPIC>; + interrupt-map-mask = <0x00 0 0 7>; + interrupt-map = <0x0000 0 0 1 &MPIC 0 40 4>; + + // ranges: + // Controller 0: + // - ECAM - non prefetchable config space: 2MB + // - IO - IO port space 64KB, reserve 64KB from target memory windows + // real IO address on the pci bus starts at 0x10000 + // - 32 bit non prefetchable memory space: 128MB - 64KB + + ranges = <0x00000000 0x0 0xfb600000 0xfb600000 0x0 0x00200000 + 0x01000000 0x0 0x00010000 0xe0000000 0x0 0x00010000 + 0x02000000 0x0 0xe1000000 0xe1000000 0x0 0x06f00000>; + + bus-range = <0x00 0xff>; + }; + + // External PCIe Controllers 1 + pcie-external1 { + compatible = "annapurna-labs,al-external-pcie"; + reg = <0xfd820000 0x00020000>; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + interrupt-parent = <&MPIC>; + interrupt-map-mask = <0x0 0 0 7>; + interrupt-map = <0x0000 0 0 1 &MPIC 0 41 4>; + + // ranges: + // - ECAM - non prefetchable config space: 2MB + // - IO - IO port space 64KB, reserve 64KB from target memory windows + // real IO address on the pci bus starts at 0x20000 + // - 32 bit non prefetchable memory space: 64MB - 64KB + ranges = <0x00000000 0x0 0xfb800000 0xfb800000 0x0 0x00200000 + 0x01000000 0x0 0x00020000 0xe8000000 0x0 0x00010000 + 0x02000000 0x0 0xe8100000 0xe8100000 0x0 0x02ff0000>; + + bus-range = <0x00 0xff>; + }; */ + + chosen { + stdin = "serial0"; + stdout = "serial0"; + stddbg = "serial0"; + }; +}; diff --git a/sys/boot/fdt/dts/arm/beaglebone-black.dts b/sys/boot/fdt/dts/arm/beaglebone-black.dts index ff25f9d9d18d..f5144ddbab17 100644 --- a/sys/boot/fdt/dts/arm/beaglebone-black.dts +++ b/sys/boot/fdt/dts/arm/beaglebone-black.dts @@ -1,5 +1,5 @@ /*- - * Copyright (c) 2012 Damjan Marion + * Copyright (c) 2015 Oleksandr Tymoshenko * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -26,159 +26,6 @@ * $FreeBSD$ */ -/dts-v1/; -/include/ "am335x.dtsi" - -/ { - model = "beaglebone-black"; - compatible = "beaglebone-black", "beaglebone", "ti,am335x"; - - - aliases { - soc = &SOC; - uart0 = &uart0; - }; - - memory { - device_type = "memory"; - reg = < 0x80000000 0x20000000 >; /* 512MB RAM */ - }; - - am335x { - scm@44e10000 { - /* Set of triplets < padname, muxname, padstate> */ - scm-pad-config = - /* I2C0 */ - "I2C0_SDA", "I2C0_SDA","i2c", - "I2C0_SCL", "I2C0_SCL","i2c", - /* I2C1 */ - "SPI0_D1", "I2C1_SDA", "i2c", - "SPI0_CS0", "I2C1_SCL", "i2c", - /* I2C2 */ - "UART1_CTSn", "I2C2_SDA", "i2c", - "UART1_RTSn", "I2C2_SCL", "i2c", - /* Ethernet */ - "MII1_RX_ER", "gmii1_rxerr", "input_pulldown", - "MII1_TX_EN", "gmii1_txen", "output", - "MII1_RX_DV", "gmii1_rxdv", "input_pulldown", - "MII1_TXD3", "gmii1_txd3", "output", - "MII1_TXD2", "gmii1_txd2", "output", - "MII1_TXD1", "gmii1_txd1", "output", - "MII1_TXD0", "gmii1_txd0", "output", - "MII1_TX_CLK", "gmii1_txclk", "input_pulldown", - "MII1_RX_CLK", "gmii1_rxclk", "input_pulldown", - "MII1_RXD3", "gmii1_rxd3", "input_pulldown", - "MII1_RXD2", "gmii1_rxd2", "input_pulldown", - "MII1_RXD1", "gmii1_rxd1", "input_pulldown", - "MII1_RXD0", "gmii1_rxd0", "input_pulldown", - "MDIO", "mdio_data", "input_pullup", - "MDC", "mdio_clk", "output_pullup", - /* MMCSD0 */ - "MMC0_CMD", "mmc0_cmd", "input_pullup", - "MMC0_CLK", "mmc0_clk", "input_pullup", - "MMC0_DAT0", "mmc0_dat0", "input_pullup", - "MMC0_DAT1", "mmc0_dat1", "input_pullup", - "MMC0_DAT2", "mmc0_dat2", "input_pullup", - "MMC0_DAT3", "mmc0_dat3", "input_pullup", - /* MMC1 */ - "GPMC_CSn1", "mmc1_clk", "input_pullup", - "GPMC_CSn2", "mmc1_cmd", "input_pullup", - "GPMC_CSn3", "gpio2_0", "output_pullup", /* Reset */ - "GPMC_AD0", "mmc1_dat0", "input_pullup", - "GPMC_AD1", "mmc1_dat1", "input_pullup", - "GPMC_AD2", "mmc1_dat2", "input_pullup", - "GPMC_AD3", "mmc1_dat3", "input_pullup", - "GPMC_AD4", "mmc1_dat4", "input_pullup", - "GPMC_AD5", "mmc1_dat5", "input_pullup", - "GPMC_AD6", "mmc1_dat6", "input_pullup", - "GPMC_AD7", "mmc1_dat7", "input_pullup", - /* GPIO */ - "ECAP0_IN_PWM0_OUT", "gpio0_7", "input_pulldown", - "GPMC_AD10", "gpio0_26", "input_pulldown", - "GPMC_AD11", "gpio0_27", "input_pulldown", - "GPMC_AD12", "gpio1_12", "input_pulldown", - "GPMC_AD13", "gpio1_13", "input_pulldown", - "GPMC_AD14", "gpio1_14", "input_pulldown", - "GPMC_AD15", "gpio1_15", "input_pulldown", - "GPMC_A0", "gpio1_16", "input_pulldown", - "GPMC_A1", "gpio1_17", "input_pulldown", - "GPMC_A5", "gpio1_21", "output", /* User LED 1 */ - "GPMC_A6", "gpio1_22", "output", /* User LED 2 */ - "GPMC_A7", "gpio1_23", "output", /* User LED 3 */ - "GPMC_A8", "gpio1_24", "output", /* User LED 4 */ - "GPMC_BEn1", "gpio1_28", "input_pulldown", - "GPMC_CSn0", "gpio1_29", "input_pulldown", - "GPMC_CLK", "gpio2_1", "input_pulldown", - "LCD_DATA0", "gpio2_6", "input_pulldown", - "LCD_DATA1", "gpio2_7", "input_pulldown", - "LCD_DATA2", "gpio2_8", "input_pulldown", - "LCD_DATA3", "gpio2_9", "input_pulldown", - "LCD_DATA4", "gpio2_10", "input_pulldown", - "LCD_DATA5", "gpio2_11", "input_pulldown", - "LCD_DATA6", "gpio2_12", "input_pulldown", - "LCD_DATA7", "gpio2_13", "input_pulldown", - "LCD_VSYNC", "gpio2_22", "input_pulldown", - "LCD_HSYNC", "gpio2_23", "input_pulldown", - "LCD_PCLK", "gpio2_24", "input_pulldown", - "LCD_AC_BIAS_EN", "gpio2_25", "input_pulldown", - "MCASP0_FSR", "gpio3_19", "input_pulldown", - "MCASP0_AHCLKX", "gpio3_21", "input_pulldown", - /* TIMERs */ - "GPMC_ADVn_ALE", "timer4", "output", - "GPMC_BEn0_CLE", "timer5", "output", - "GPMC_WEn", "timer6", "output", - "GPMC_OEn_REn", "timer7", "output", - /* USB0 and USB1 */ - "USB0_DRVVBUS", "USB0_DRVVBUS", "output", - "USB1_DRVVBUS", "USB1_DRVVBUS", "output", - /* PWM */ - "GPMC_A2", "ehrpwm1A", "output", - "GPMC_A3", "ehrpwm1B", "output", - "GPMC_AD8", "ehrpwm2A", "output", - "GPMC_AD9", "ehrpwm2B", "output"; - }; - - mmchs1@481D8000 { - bus-width = <8>; - status = "okay"; - non-removable; - }; - - i2c@44e0b000 { - pmic@48 { - compatible = "ti,am335x-pmic"; - reg = <0x48>; - }; - }; - }; - - leds { - compatible = "gpio-leds"; - - led1 { - gpios = <&GPIO 53 2 0>; - name = "led1"; - }; - - led2 { - gpios = <&GPIO 54 2 0>; - name = "led2"; - }; - - led3 { - gpios = <&GPIO 55 2 0>; - name = "led3"; - }; - - led4 { - gpios = <&GPIO 56 2 0>; - name = "led4"; - }; - }; - - chosen { - stdin = "uart0"; - stdout = "uart0"; - }; -}; +#include "am335x-boneblack.dts" +#include "beaglebone-common.dtsi" diff --git a/sys/boot/fdt/dts/arm/beaglebone-common.dtsi b/sys/boot/fdt/dts/arm/beaglebone-common.dtsi new file mode 100644 index 000000000000..ec69d97c2c78 --- /dev/null +++ b/sys/boot/fdt/dts/arm/beaglebone-common.dtsi @@ -0,0 +1,45 @@ +/*- + * Copyright (c) 2015 Oleksandr Tymoshenko + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/ { + ocp { + pruss@4A300000 { + compatible = "ti,pruss-v2"; + reg = <0x4A300000 0x80000>; + interrupt-parent = <&intc>; + interrupts = <20 21 22 23 24 25 26 27>; + }; + + }; + +}; + +&tps { + interrupt-parent = <&intc>; + interrupts = <7>; +}; diff --git a/sys/boot/fdt/dts/arm/beaglebone.dts b/sys/boot/fdt/dts/arm/beaglebone.dts index 83b948f8694b..18e849dab2b5 100644 --- a/sys/boot/fdt/dts/arm/beaglebone.dts +++ b/sys/boot/fdt/dts/arm/beaglebone.dts @@ -1,5 +1,5 @@ /*- - * Copyright (c) 2012 Damjan Marion + * Copyright (c) 2015 Oleksandr Tymoshenko * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -26,120 +26,5 @@ * $FreeBSD$ */ -/dts-v1/; - -/include/ "am335x.dtsi" - -/ { - model = "beaglebone"; - compatible = "beaglebone", "ti,am335x"; - - aliases { - soc = &SOC; - uart0 = &uart0; - }; - - memory { - device_type = "memory"; - reg = < 0x80000000 0x10000000 >; /* 256MB RAM */ - }; - - am335x { - scm@44e10000 { - /* Set of triplets < padname, muxname, padstate> */ - scm-pad-config = - /* I2C0 */ - "I2C0_SDA", "I2C0_SDA","i2c", - "I2C0_SCL", "I2C0_SCL","i2c", - /* Ethernet */ - "MII1_RX_ER", "gmii1_rxerr", "input_pulldown", - "MII1_TX_EN", "gmii1_txen", "output", - "MII1_RX_DV", "gmii1_rxdv", "input_pulldown", - "MII1_TXD3", "gmii1_txd3", "output", - "MII1_TXD2", "gmii1_txd2", "output", - "MII1_TXD1", "gmii1_txd1", "output", - "MII1_TXD0", "gmii1_txd0", "output", - "MII1_TX_CLK", "gmii1_txclk", "input_pulldown", - "MII1_RX_CLK", "gmii1_rxclk", "input_pulldown", - "MII1_RXD3", "gmii1_rxd3", "input_pulldown", - "MII1_RXD2", "gmii1_rxd2", "input_pulldown", - "MII1_RXD1", "gmii1_rxd1", "input_pulldown", - "MII1_RXD0", "gmii1_rxd0", "input_pulldown", - "MDIO", "mdio_data", "input_pullup", - "MDC", "mdio_clk", "output_pullup", - /* MMCSD0 */ - "MMC0_CMD", "mmc0_cmd", "input_pullup", - "MMC0_CLK", "mmc0_clk", "input_pullup", - "MMC0_DAT0", "mmc0_dat0", "input_pullup", - "MMC0_DAT1", "mmc0_dat1", "input_pullup", - "MMC0_DAT2", "mmc0_dat2", "input_pullup", - "MMC0_DAT3", "mmc0_dat3", "input_pullup", - /* USB0 and USB1 */ - "USB0_DRVVBUS", "USB0_DRVVBUS", "output", - "USB1_DRVVBUS", "USB1_DRVVBUS", "output", - /* GPIO */ - "ECAP0_IN_PWM0_OUT", "gpio0_7", "input_pulldown", - "GPMC_AD10", "gpio0_26", "input_pulldown", - "GPMC_AD11", "gpio0_27", "input_pulldown", - "GPMC_AD0", "gpio1_0", "input_pulldown", - "GPMC_AD1", "gpio1_1", "input_pulldown", - "GPMC_AD2", "gpio1_2", "input_pulldown", - "GPMC_AD3", "gpio1_3", "input_pulldown", - "GPMC_AD4", "gpio1_4", "input_pulldown", - "GPMC_AD5", "gpio1_5", "input_pulldown", - "GPMC_AD6", "gpio1_6", "input_pulldown", - "GPMC_AD7", "gpio1_7", "input_pulldown", - "GPMC_AD12", "gpio1_12", "input_pulldown", - "GPMC_AD13", "gpio1_13", "input_pulldown", - "GPMC_AD14", "gpio1_14", "input_pulldown", - "GPMC_AD15", "gpio1_15", "input_pulldown", - "GPMC_A0", "gpio1_16", "input_pulldown", - "GPMC_A1", "gpio1_17", "input_pulldown", - "GPMC_A5", "gpio1_21", "output", /* User LED 1 */ - "GPMC_A6", "gpio1_22", "output", /* User LED 2 */ - "GPMC_A7", "gpio1_23", "output", /* User LED 3 */ - "GPMC_A8", "gpio1_24", "output", /* User LED 4 */ - "GPMC_BEn1", "gpio1_28", "input_pulldown", - "GPMC_CSn0", "gpio1_29", "input_pulldown", - "GPMC_CSn1", "gpio1_30", "input_pulldown", - "GPMC_CSn2", "gpio1_31", "input_pulldown", - "GPMC_CLK", "gpio2_1", "input_pulldown", - "LCD_DATA0", "gpio2_6", "input_pulldown", - "LCD_DATA1", "gpio2_7", "input_pulldown", - "LCD_DATA2", "gpio2_8", "input_pulldown", - "LCD_DATA3", "gpio2_9", "input_pulldown", - "LCD_DATA4", "gpio2_10", "input_pulldown", - "LCD_DATA5", "gpio2_11", "input_pulldown", - "LCD_DATA6", "gpio2_12", "input_pulldown", - "LCD_DATA7", "gpio2_13", "input_pulldown", - "LCD_VSYNC", "gpio2_22", "input_pulldown", - "LCD_HSYNC", "gpio2_23", "input_pulldown", - "LCD_PCLK", "gpio2_24", "input_pulldown", - "LCD_AC_BIAS_EN", "gpio2_25", "input_pulldown", - "MCASP0_FSR", "gpio3_19", "input_pulldown", - "MCASP0_AHCLKX", "gpio3_21", "input_pulldown", - /* TIMERs */ - "GPMC_ADVn_ALE", "timer4", "output", - "GPMC_BEn0_CLE", "timer5", "output", - "GPMC_WEn", "timer6", "output", - "GPMC_OEn_REn", "timer7", "output", - /* PWM */ - "GPMC_A2", "ehrpwm1A", "output", - "GPMC_A3", "ehrpwm1B", "output", - "GPMC_AD8", "ehrpwm2A", "output", - "GPMC_AD9", "ehrpwm2B", "output"; - }; - - i2c@44e0b000 { - pmic@24 { - compatible = "ti,am335x-pmic"; - reg = <0x48>; - }; - }; - }; - - chosen { - stdin = "uart0"; - stdout = "uart0"; - }; -}; +#include "am335x-bone.dts" +#include "beaglebone-common.dtsi" diff --git a/sys/boot/fdt/dts/arm/cubieboard.dts b/sys/boot/fdt/dts/arm/cubieboard.dts index 636b5cec6413..d9a7c1505461 100644 --- a/sys/boot/fdt/dts/arm/cubieboard.dts +++ b/sys/boot/fdt/dts/arm/cubieboard.dts @@ -57,6 +57,10 @@ status = "okay"; }; + mmc0: mmc@01c0f000 { + status = "okay"; + }; + emac@01c0b000 { status = "okay"; }; diff --git a/sys/boot/fdt/dts/arm/cubieboard2.dts b/sys/boot/fdt/dts/arm/cubieboard2.dts index ce0081e8ef49..9593b9132624 100644 --- a/sys/boot/fdt/dts/arm/cubieboard2.dts +++ b/sys/boot/fdt/dts/arm/cubieboard2.dts @@ -57,6 +57,10 @@ status = "okay"; }; + mmc0: mmc@01c0f000 { + status = "okay"; + }; + emac@01c0b000 { status = "okay"; }; diff --git a/sys/boot/fdt/dts/arm/meson3.dtsi b/sys/boot/fdt/dts/arm/meson3.dtsi new file mode 100644 index 000000000000..444e3cf62e9e --- /dev/null +++ b/sys/boot/fdt/dts/arm/meson3.dtsi @@ -0,0 +1,77 @@ +/*- + * Copyright (c) 2015 John Wehle + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/* + * The basic single core aml8726 (aka meson) uses an Amlogic interrupt + * controller, however meson.dtsi specifies GIC (which is present on + * the multicore aml8726) so we need to override things here. + */ + +/include/ "meson.dtsi" + +/ { + model = "Amlogic Meson3 SoC"; + compatible = "amlogic,meson3"; + + interrupt-parent = <&pic>; + + pic: pic@c1109a40 { + device_type = "interrupt-controller"; + compatible = "amlogic,aml8726-pic"; + reg = <0xc1109a40 128>; /* cbus 0x2690 */ + + interrupt-controller; + #interrupt-cells = <3>; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@200 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + next-level-cache = <&L2>; + reg = <0x200>; + }; + }; + + clk81: clk@0 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <0>; + }; +}; + +&gic { + status = "disabled"; +}; + +&L2 { + interrupts = <0 61 1>; +}; diff --git a/sys/boot/fdt/dts/arm/odroidc1.dts b/sys/boot/fdt/dts/arm/odroidc1.dts index c65344b8446f..aadaef37112b 100644 --- a/sys/boot/fdt/dts/arm/odroidc1.dts +++ b/sys/boot/fdt/dts/arm/odroidc1.dts @@ -194,11 +194,6 @@ compatible = "amlogic,aml8726-rtc"; reg = <0xc8100740 20>; /* aobus 0x1d0 */ interrupts = <0 72 1>; - interrupt-parent = <&gic>; - - init-always = "false"; - xo-init = <0x180a>; - gpo-init = <0x500000>; }; clkmsr: clkmsr@c1108758 { @@ -246,7 +241,6 @@ compatible = "amlogic,aml8726-mmc"; reg = <0xc1108c20 32>; /* cbus 0x2308 */ interrupts = <0 28 1>; - interrupt-parent = <&gic>; clocks = <&clk81>; @@ -274,7 +268,6 @@ clock-frequency = <1275000000>; reg = <0xc1108e00 60>; /* cbus 0x2380 */ interrupts = <0 78 1>; - interrupt-parent = <&gic>; pinctrl-names = "default"; pinctrl-0 = <&pins_sdxc_c>; @@ -311,7 +304,6 @@ compatible = "synopsys,designware-hs-otg2"; reg = <0xc9040000 0x40000>; /* ahbbus 0x40000*/ interrupts = <0 30 4>; - interrupt-parent = <&gic>; #address-cells = <1>; #size-cells = <0>; @@ -323,7 +315,6 @@ compatible = "synopsys,designware-hs-otg2"; reg = <0xc90c0000 0x40000>; /* ahbbus 0xc0000 */ interrupts = <0 31 4>; - interrupt-parent = <&gic>; #address-cells = <1>; #size-cells = <0>; @@ -335,7 +326,6 @@ compatible = "snps,dwmac"; reg = <0xc9410000 0x2000>; /* ahbbus 0x410000 */ interrupts = <0 8 1>; - interrupt-parent = <&gic>; #address-cells = <1>; #size-cells = <0>; @@ -352,7 +342,6 @@ <0 3 1>, <0 12 1>, <0 13 1>; - interrupt-parent = <&gic>; address = <0x7900000>; /* match memreserve */ width = <720>; diff --git a/sys/boot/fdt/dts/arm/pandaboard-common.dtsi b/sys/boot/fdt/dts/arm/pandaboard-common.dtsi new file mode 100644 index 000000000000..911c45267346 --- /dev/null +++ b/sys/boot/fdt/dts/arm/pandaboard-common.dtsi @@ -0,0 +1,49 @@ +/*- + * Copyright (c) 2015 Oleksandr Tymoshenko + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +&mmc1 { + non-removable; /* XXX need real solution */ +}; + +&mmc5 { + status = "disabled"; +}; + +/ { + ocp { + global-timer@48240600 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0x48240200 0x20>; + interrupts = ; + }; + }; + chosen { + stdin = "serial2"; + stdout = "serial2"; + }; +}; diff --git a/sys/boot/fdt/dts/arm/pandaboard-es.dts b/sys/boot/fdt/dts/arm/pandaboard-es.dts new file mode 100644 index 000000000000..6c3f4b58e4ac --- /dev/null +++ b/sys/boot/fdt/dts/arm/pandaboard-es.dts @@ -0,0 +1,31 @@ +/*- + * Copyright (c) 2015 Oleksandr Tymoshenko + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + + +#include "omap4-panda-es.dts" +#include "pandaboard-common.dtsi" diff --git a/sys/boot/fdt/dts/arm/pandaboard.dts b/sys/boot/fdt/dts/arm/pandaboard.dts index c89bf88b7e7a..b25ca634e202 100644 --- a/sys/boot/fdt/dts/arm/pandaboard.dts +++ b/sys/boot/fdt/dts/arm/pandaboard.dts @@ -1,9 +1,7 @@ /*- - * Copyright (c) 2011 The FreeBSD Foundation + * Copyright (c) 2015 Oleksandr Tymoshenko * All rights reserved. * - * Developed by Damjan Marion - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: @@ -28,159 +26,6 @@ * $FreeBSD$ */ -/dts-v1/; -/ { - model = "pandaboard"; - compatible = "pandaboard", "ti,omap4430"; - #address-cells = <1>; - #size-cells = <1>; - - interrupt-parent = <&GIC>; - - aliases { - soc = &SOC; - uart3 = &uart3; - }; - - memory { - device_type = "memory"; - reg = < 0x80000000 0x40000000 >; /* 1GB RAM at 0x0 */ - }; - - SOC: omap4430 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges; - bus-frequency = <0>; - - GIC: interrupt-controller@48241000 { - compatible = "arm,gic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = < 0x48241000 0x1000 >, /* Distributor Registers */ - < 0x48240100 0x0100 >; /* CPU Interface Registers */ - }; - - omap4_prcm@4a306000 { - compatible = "ti,omap4_prcm"; - reg =< 0x4a306000 0x2000 - 0x4a004000 0x1000 - 0x4a008000 0x8000>; - }; - - pl310@48242000 { - compatible = "arm,pl310"; - reg = < 0x48242000 0x1000 >; - interrupts = < 32 >; - interrupt-parent = < &GIC >; - }; - mp_tmr@48240200 { - compatible = "arm,mpcore-timers"; - #address-cells = <1>; - #size-cells = <0>; - reg = < 0x48240200 0x100 >, /* Global Timer Registers */ - < 0x48240600 0x100 >; /* Private Timer Registers */ - interrupts = < 27 29 >; - interrupt-parent = < &GIC >; - }; - - uart3: serial@48020000 { - compatible = "ns16550"; - reg = <0x48020000 0x1000>; - reg-shift = <2>; - interrupts = < 106 >; - interrupt-parent = <&GIC>; - clock-frequency = < 48000000 >; /* 48Mhz clock for all uarts */ - /* (techref 17.3.1.1) */ - }; - - scm@4a100000 { - compatible = "ti,scm"; - reg = < 0x4a100000 0x1000 >; - /* Set of triplets < padname, muxname, padstate> */ - scm-pad-config = - "ag19", "usbb1_ulpiphy_stp", "output", - "ae18", "usbb1_ulpiphy_clk", "input_pulldown", - "af19", "usbb1_ulpiphy_dir", "input_pulldown", - "ae19", "usbb1_ulpiphy_nxt", "input_pulldown", - "af18", "usbb1_ulpiphy_dat0", "input_pulldown", - "ag18", "usbb1_ulpiphy_dat1", "input_pulldown", - "ae17", "usbb1_ulpiphy_dat2", "input_pulldown", - "af17", "usbb1_ulpiphy_dat3", "input_pulldown", - "ah17", "usbb1_ulpiphy_dat4", "input_pulldown", - "ae16", "usbb1_ulpiphy_dat5", "input_pulldown", - "af16", "usbb1_ulpiphy_dat6", "input_pulldown", - "ag16", "usbb1_ulpiphy_dat7", "input_pulldown"; - }; - - GPIO: gpio { - #gpio-cells = <3>; - compatible = "ti,gpio"; - gpio-controller; - reg =< 0x4a310000 0x1000 - 0x48055000 0x1000 - 0x48057000 0x1000 - 0x48059000 0x1000 - 0x4805b000 0x1000 - 0x4805d000 0x1000>; - interrupts = <61 62 63 64 65 66>; - interrupt-parent = <&GIC>; - }; - - ehci { - compatible = "ti,usb-ehci", "usb-ehci"; - /* - * USB port PHY configuration is a tuple: - * mode is one of the following values: - * 0 - unknown - * 1 - PHY - * 2 - TLL - * 3 - HSIC - * - * reset indicates (if non-zero) if port reset is required - * gpio_pin - GPIO pin that is used to perform reset - */ - phy-config = < 1 0 0 - 0 0 0 - 0 0 0>; - reg = < 0x4a064c00 0x100 /* EHCI regs */ - 0x4a064000 0x700 /* UHH regs */ - 0x4a062000 0x1000>; /* TLL regs */ - interrupts = <109>; - interrupt-parent = <&GIC>; - }; - - I2C1: i2c@x48070000 { - compatible = "ti,i2c"; - reg =< 0x48070000 0x100 >; - interrupts = <88>; - interrupt-parent = <&GIC>; - i2c-device-id = <1>; - }; - - sdma@x48070000 { - compatible = "ti,sdma"; - reg =< 0x4A056000 0x1000 >; - interrupts = <44 45 46 47>; - interrupt-parent = <&GIC>; - }; - - mmc@x4809C000 { - compatible = "ti,mmchs"; - reg =<0x4809C000 0x1000 >; - interrupts = <115>; - interrupt-parent = <&GIC>; - mmchs-device-id = <1>; - non-removable; /* XXX need real solution */ - }; - - }; - - chosen { - stdin = "uart3"; - stdout = "uart3"; - }; -}; +#include "omap4-panda.dts" +#include "pandaboard-common.dtsi" diff --git a/sys/boot/fdt/dts/arm/sun4i-a10.dtsi b/sys/boot/fdt/dts/arm/sun4i-a10.dtsi index 09eebaa6e350..087e3140f30f 100644 --- a/sys/boot/fdt/dts/arm/sun4i-a10.dtsi +++ b/sys/boot/fdt/dts/arm/sun4i-a10.dtsi @@ -103,6 +103,14 @@ interrupt-parent = <&AINTC>; }; + mmc0: mmc@01c0f000 { + compatible = "allwinner,sun4i-a10-mmc"; + reg = <0x01c0f000 0x1000>; + interrupts = <32>; + interrupt-parent = <&AINTC>; + status = "disabled"; + }; + sata@01c18000 { compatible = "allwinner,sun4i-ahci"; reg = <0x01c18000 0x1000>; diff --git a/sys/boot/fdt/dts/arm/sun7i-a20.dtsi b/sys/boot/fdt/dts/arm/sun7i-a20.dtsi index ab4ef1ed7a62..7dd894725772 100644 --- a/sys/boot/fdt/dts/arm/sun7i-a20.dtsi +++ b/sys/boot/fdt/dts/arm/sun7i-a20.dtsi @@ -109,6 +109,14 @@ interrupt-parent = <&GIC>; }; + mmc0: mmc@01c0f000 { + compatible = "allwinner,sun4i-a10-mmc"; + reg = <0x01c0f000 0x1000>; + interrupts = <32>; + interrupt-parent = <&GIC>; + status = "disabled"; + }; + sata@01c18000 { compatible = "allwinner,sun4i-a10-ahci"; reg = <0x01c18000 0x1000>; diff --git a/sys/boot/fdt/dts/arm/vsatv102-m6.dts b/sys/boot/fdt/dts/arm/vsatv102-m6.dts index ad3b5a1893e3..468d5f0096d5 100644 --- a/sys/boot/fdt/dts/arm/vsatv102-m6.dts +++ b/sys/boot/fdt/dts/arm/vsatv102-m6.dts @@ -153,11 +153,6 @@ compatible = "amlogic,aml8726-rtc"; reg = <0xda004340 20>; /* secbus2 0xd0 */ interrupts = <0 72 1>; /* AM_IRQ2(8) */ - interrupt-parent = <&gic>; - - init-always = "false"; - xo-init = <0x180a>; - gpo-init = <0x500000>; }; clkmsr: clkmsr@c1108758 { @@ -205,7 +200,6 @@ compatible = "amlogic,aml8726-mmc"; reg = <0xc1108c20 32>; /* cbus 0x2308 */ interrupts = <0 28 1>; /* AM_IRQ0(28) */ - interrupt-parent = <&gic>; clocks = <&clk81>; @@ -243,7 +237,6 @@ compatible = "synopsys,designware-hs-otg2"; reg = <0xc9040000 0x40000>; /* ahbbus 0x40000*/ interrupts = <0 30 4>; /* AM_IRQ0(30) */ - interrupt-parent = <&gic>; #address-cells = <1>; #size-cells = <0>; }; @@ -253,7 +246,6 @@ compatible = "synopsys,designware-hs-otg2"; reg = <0xc90c0000 0x40000>; /* ahbbus 0xc0000 */ interrupts = <0 31 4>; /* AM_IRQ0(31) */ - interrupt-parent = <&gic>; #address-cells = <1>; #size-cells = <0>; @@ -265,7 +257,6 @@ compatible = "snps,dwmac"; reg = <0xc9410000 0x2000>; /* ahbbus 0x410000 */ interrupts = <0 8 1>; /* AM_IRQ0(8) */ - interrupt-parent = <&gic>; #address-cells = <1>; #size-cells = <0>; @@ -282,7 +273,6 @@ <0 3 1>, /* AM_IRQ0(3) */ <0 12 1>, /* AM_IRQ0(12) */ <0 13 1>; /* AM_IRQ0(13) */ - interrupt-parent = <&gic>; address = <0x84900000>; /* match memreserve */ width = <720>; @@ -292,6 +282,17 @@ }; }; + leds { + compatible = "gpio-leds"; + + sys_led { + gpios = <&gpioao 2>; /* gpioao_2 sys_led */ + label = "sys_led"; + + default-state = "on"; + }; + }; + chosen { stdin = "uart0"; stdout = "uart0"; diff --git a/sys/boot/fdt/dts/arm/yyhd18-m3.dts b/sys/boot/fdt/dts/arm/yyhd18-m3.dts new file mode 100644 index 000000000000..bdb425d034c0 --- /dev/null +++ b/sys/boot/fdt/dts/arm/yyhd18-m3.dts @@ -0,0 +1,237 @@ +/*- + * Copyright (c) 2015 John Wehle + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/* + * The ordering of certain devices is significant (e.g. usb depends on + * usb-phy which depends on gpio, also the timer should appear early on + * to provide a reasonably accurate DELAY implementation). + */ + +/dts-v1/; + +/memreserve/ 0x84900000 0x00600000; /* 6MB frame buffer */ + +#include "meson3.dtsi" + +/ { + /* + * My development unit is a Yiyate Android TV Box containing + * a HD18 motherboard and an aml8726-m3 SoC ... later versions + * shipped with an aml8726-m6. Printenv in uboot shows m3-oplay + * as the boardname supplied as part of mmcargs. + */ + + model = "yiyate,hd18-m3"; + compatible = "yiyate,hd18-m3", "amlogic,meson3"; + + #address-cells = <1>; + #size-cells = <1>; + + aliases { + soc = &soc; + screen = &screen; + uart0 = &uart_AO; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x40000000>; /* 1GB RAM */ + }; + + soc: soc { + device_type = "soc"; + bus-frequency = <0>; + + ccm@c1104140 { + compatible = "amlogic,aml8726-ccm"; + reg = <0xc1104140 20>; /* cbus 0x1050 */ + + functions = "ethernet", "i2c", "rng", "sdio", + "uart-a", "uart-b", "uart-c", + "usb-a", "usb-b"; + }; + + pinctrl: pinctrl@c11080b0 { + compatible = "amlogic,aml8726-pinctrl"; + reg = <0xc11080b0 40>, /* mux */ + <0xc11080e8 24>, /* pu/pd */ + <0xc11080e8 24>, /* pull enable */ + <0xc8100014 4>, /* ao mux */ + <0xc810002c 4>, /* ao pu/pd */ + <0xc810002c 4>; /* ao pull enable */ + + /* + * Currently only pin muxing that deviates + * from the power on default of gpio is + * specified here. + */ + + pinctrl-names = "default"; + pinctrl-0 = <&pins_uartao &pins_ethernet &pins_hdmi>; + + pins_ethernet: ethernet { + amlogic,pins = "clk_out", "tx_en", + "tx_d0", "tx_d1", + "crs_dv", "rx_err", + "rx_d0", "rx_d1", + "mdc", "mdio"; + amlogic,function = "ethernet"; + }; + + pins_hdmi: hdmi { + amlogic,pins = "cec", "hpd", + "scl", "sda"; + amlogic,function = "hdmi"; + }; + + pins_sdio_b: sdio_b { + amlogic,pins = "clk", "cmd", + "d0", "d1", + "d2", "d3"; + amlogic,function = "sdio-b"; + }; + + pins_uartao: uartao { + amlogic,pins = "tx", "rx"; + amlogic,function = "uart-ao"; + }; + }; + + rtc@c8100740 { + compatible = "amlogic,aml8726-rtc"; + reg = <0xc8100740 20>; /* aobus 0x1d0 */ + interrupts = <0 72 1>; /* AM_IRQ2(8) */ + }; + + clkmsr: clkmsr@c1108758 { + compatible = "amlogic,aml8726-clkmsr"; + reg = <0xc1108758 16>; /* cbus 0x21d6 */ + + clocks = <&clk81>; + }; + + gpio5: gpio@c110806c { + compatible = "amlogic,aml8726-gpio"; + reg = <0xc110806c 4>, /* oen cbus 0x201b */ + <0xc1108070 4>, /* out */ + <0xc1108074 4>; /* in */ + + gpio-controller; + #gpio-cells = <1>; + pin-count = <32>; + }; + + mmc@c1108c20 { + compatible = "amlogic,aml8726-mmc"; + reg = <0xc1108c20 32>; /* cbus 0x2308 */ + interrupts = <0 28 1>; /* AM_IRQ0(28) */ + + clocks = <&clk81>; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_sdio_b>; + + mmc-voltages = "3.3"; + + mmc-pwr-en = <&gpio5 31 0>; /* card_8 */ + ins-detect = <&gpio5 29 0>; /* card_6 */ + }; + + rng@c1108100 { + compatible = "amlogic,aml8726-rng"; + reg = <0xc1108100 8>; /* cbus 0x2040 */ + }; + + usb-phy@c1108400 { + /* usb-a and usb-b phy */ + compatible = "amlogic,aml8726-m3-usb-phy"; + reg = <0xc1108400 32>; /* cbus 0x2100 */ + }; + + usb@c9040000 { + /* usb-a */ + compatible = "synopsys,designware-hs-otg2"; + reg = <0xc9040000 0x40000>; /* ahbbus 0x40000*/ + interrupts = <0 30 4>; /* AM_IRQ0(30) */ + #address-cells = <1>; + #size-cells = <0>; + }; + + usb@c90c0000 { + /* usb-b */ + compatible = "synopsys,designware-hs-otg2"; + reg = <0xc90c0000 0x40000>; /* ahbbus 0xc0000 */ + interrupts = <0 31 4>; /* AM_IRQ0(31) */ + #address-cells = <1>; + #size-cells = <0>; + + dr_mode = "host"; + }; + + eth@c9410000 { + /* ethernet */ + compatible = "snps,dwmac"; + reg = <0xc9410000 0x2000>; /* ahbbus 0x410000 */ + interrupts = <0 8 1>; /* AM_IRQ0(8) */ + #address-cells = <1>; + #size-cells = <0>; + }; + + screen: fb@c8001324 { + device_type = "display"; + compatible = "amlogic,aml8726-fb"; + reg = <0xc8001324 12>, /* CANVAS */ + <0xc1106800 1024>, /* VIU */ + <0xc1107400 1024>; /* VPP */ + interrupts = <0 2 1>, /* AM_IRQ0(2) */ + <0 3 1>, /* AM_IRQ0(3) */ + <0 12 1>, /* AM_IRQ0(12) */ + <0 13 1>; /* AM_IRQ0(13) */ + + address = <0x84900000>; /* match memreserve */ + width = <720>; + height = <480>; + depth = <24>; + linebytes = <2160>; + }; + }; + + chosen { + stdin = "uart0"; + stdout = "uart0"; + }; +}; + +&clk81 { + clock-frequency = <0>; +}; + +&uart_AO { + status = "okay"; + current-speed = <115200>; +}; diff --git a/sys/boot/i386/boot0/boot0.S b/sys/boot/i386/boot0/boot0.S index 798ee97e1ef6..708f0934c427 100644 --- a/sys/boot/i386/boot0/boot0.S +++ b/sys/boot/i386/boot0/boot0.S @@ -541,11 +541,11 @@ putchr: int $0x10 # character popw %bx # Restore #else /* SIO */ - movb $0x01,%ah # BIOS: Send + movb $0x01,%ah # BIOS: Send character bioscom: pushw %dx # Save xorw %dx,%dx # Use COM1 - int $0x14 # Character + int $0x14 # BIOS: Serial I/O popw %dx # Restore #endif /* SIO */ retw # To caller diff --git a/sys/boot/uboot/common/main.c b/sys/boot/uboot/common/main.c index f58d0c427e02..0c9853cfe60c 100644 --- a/sys/boot/uboot/common/main.c +++ b/sys/boot/uboot/common/main.c @@ -28,6 +28,7 @@ #include __FBSDID("$FreeBSD$"); +#include #include @@ -44,6 +45,9 @@ struct uboot_devdesc currdev; struct arch_switch archsw; /* MI/MD interface boundary */ int devs_no; +uintptr_t uboot_heap_start; +uintptr_t uboot_heap_end; + struct device_type { const char *name; int type; @@ -414,7 +418,9 @@ main(void) * Initialise the heap as early as possible. Once this is done, * alloc() is usable. The stack is buried inside us, so this is safe. */ - setheap((void *)end, (void *)(end + 512 * 1024)); + uboot_heap_start = round_page((uintptr_t)end); + uboot_heap_end = uboot_heap_start + 512 * 1024; + setheap((void *)uboot_heap_start, (void *)uboot_heap_end); /* * Set up console. @@ -487,6 +493,7 @@ main(void) setenv("LINES", "24", 1); /* optional */ setenv("prompt", "loader>", 1); + archsw.arch_loadaddr = uboot_loadaddr; archsw.arch_getdev = uboot_getdev; archsw.arch_copyin = uboot_copyin; archsw.arch_copyout = uboot_copyout; diff --git a/sys/boot/uboot/lib/copy.c b/sys/boot/uboot/lib/copy.c index 3adf7ebf5bc0..bb658e33619f 100644 --- a/sys/boot/uboot/lib/copy.c +++ b/sys/boot/uboot/lib/copy.c @@ -27,66 +27,131 @@ #include __FBSDID("$FreeBSD$"); +#include #include #include #include "api_public.h" #include "glue.h" +#include "libuboot.h" /* * MD primitives supporting placement of module data */ -void * -uboot_vm_translate(vm_offset_t o) { - struct sys_info *si; - static uintptr_t start = 0; - static size_t size = 0; - int i; +#ifdef __arm__ +#define KERN_ALIGN (2 * 1024 * 1024) +#else +#define KERN_ALIGN PAGE_SIZE +#endif - if (size == 0) { +/* + * Avoid low memory, u-boot puts things like args and dtb blobs there. + */ +#define KERN_MINADDR max(KERN_ALIGN, (1024 * 1024)) + +extern void _start(void); /* ubldr entry point address. */ + +/* + * This is called for every object loaded (kernel, module, dtb file, etc). The + * expected return value is the next address at or after the given addr which is + * appropriate for loading the given object described by type and data. On each + * call the addr is the next address following the previously loaded object. + * + * The first call is for loading the kernel, and the addr argument will be zero, + * and we search for a big block of ram to load the kernel and modules. + * + * On subsequent calls the addr will be non-zero, and we just round it up so + * that each object begins on a page boundary. + */ +uint64_t +uboot_loadaddr(u_int type, void *data, uint64_t addr) +{ + struct sys_info *si; + uintptr_t sblock, eblock, subldr, eubldr; + uintptr_t biggest_block, this_block; + size_t biggest_size, this_size; + int i; + char * envstr; + + if (addr == 0) { + /* + * If the loader_kernaddr environment variable is set, blindly + * honor it. It had better be right. We force interpretation + * of the value in base-16 regardless of any leading 0x prefix, + * because that's the U-Boot convention. + */ + envstr = ub_env_get("loader_kernaddr"); + if (envstr != NULL) + return (strtoul(envstr, NULL, 16)); + + /* + * Find addr/size of largest DRAM block. Carve our own address + * range out of the block, because loading the kernel over the + * top ourself is a poor memory-conservation strategy. Avoid + * memory at beginning of the first block of physical ram, + * since u-boot likes to pass args and data there. Assume that + * u-boot has moved itself to the very top of ram and + * optimistically assume that we won't run into it up there. + */ if ((si = ub_get_sys_info()) == NULL) panic("could not retrieve system info"); - /* Find start/size of largest DRAM block. */ + biggest_block = 0; + biggest_size = 0; + subldr = rounddown2((uintptr_t)_start, KERN_ALIGN); + eubldr = roundup2(uboot_heap_end, KERN_ALIGN); for (i = 0; i < si->mr_no; i++) { - if (si->mr[i].flags == MR_ATTR_DRAM - && si->mr[i].size > size) { - start = si->mr[i].start; - size = si->mr[i].size; + if (si->mr[i].flags != MR_ATTR_DRAM) + continue; + sblock = roundup2(si->mr[i].start, KERN_ALIGN); + eblock = rounddown2(si->mr[i].start + si->mr[i].size, + KERN_ALIGN); + if (biggest_size == 0) + sblock += KERN_MINADDR; + if (subldr >= sblock && subldr < eblock) { + if (subldr - sblock > eblock - eubldr) { + this_block = sblock; + this_size = subldr - sblock; + } else { + this_block = eubldr; + this_size = eblock - eubldr; + } + } + if (biggest_size < this_size) { + biggest_block = this_block; + biggest_size = this_size; } } - - if (size <= 0) - panic("No suitable DRAM?\n"); - /* - printf("Loading into memory region 0x%08X-0x%08X (%d MiB)\n", - start, start + size, size / 1024 / 1024); - */ + if (biggest_size == 0) + panic("Not enough DRAM to load kernel\n"); +#if 0 + printf("Loading kernel into region 0x%08x-0x%08x (%u MiB)\n", + biggest_block, biggest_block + biggest_size - 1, + biggest_size / 1024 / 1024); +#endif + return (biggest_block); } - if (o > size) - panic("Address offset 0x%08jX bigger than size 0x%08X\n", - (intmax_t)o, size); - return (void *)(start + o); + return roundup2(addr, PAGE_SIZE); } ssize_t uboot_copyin(const void *src, vm_offset_t dest, const size_t len) { - bcopy(src, uboot_vm_translate(dest), len); + bcopy(src, (void *)dest, len); return (len); } ssize_t uboot_copyout(const vm_offset_t src, void *dest, const size_t len) { - bcopy(uboot_vm_translate(src), dest, len); + bcopy((void *)src, dest, len); return (len); } ssize_t uboot_readin(const int fd, vm_offset_t dest, const size_t len) { - return (read(fd, uboot_vm_translate(dest), len)); + return (read(fd, (void *)dest, len)); } diff --git a/sys/boot/uboot/lib/elf_freebsd.c b/sys/boot/uboot/lib/elf_freebsd.c index 6b828d32c2cb..b72d07cf9eee 100644 --- a/sys/boot/uboot/lib/elf_freebsd.c +++ b/sys/boot/uboot/lib/elf_freebsd.c @@ -80,7 +80,7 @@ __elfN(uboot_exec)(struct preloaded_file *fp) if ((error = md_load(fp->f_args, &mdp)) != 0) return (error); - entry = uboot_vm_translate(e->e_entry); + entry = (void *)e->e_entry; printf("Kernel entry at 0x%x...\n", (unsigned)entry); dev_cleanup(); diff --git a/sys/boot/uboot/lib/libuboot.h b/sys/boot/uboot/lib/libuboot.h index 79005f2c0246..e4201d8a1347 100644 --- a/sys/boot/uboot/lib/libuboot.h +++ b/sys/boot/uboot/lib/libuboot.h @@ -57,7 +57,10 @@ extern int devs_no; extern struct netif_driver uboot_net; extern struct devsw uboot_storage; -void *uboot_vm_translate(vm_offset_t); +extern uintptr_t uboot_heap_start; +extern uintptr_t uboot_heap_end; + +uint64_t uboot_loadaddr(u_int type, void *data, uint64_t addr); ssize_t uboot_copyin(const void *src, vm_offset_t dest, const size_t len); ssize_t uboot_copyout(const vm_offset_t src, void *dest, const size_t len); ssize_t uboot_readin(const int fd, vm_offset_t dest, const size_t len); diff --git a/sys/boot/uboot/lib/module.c b/sys/boot/uboot/lib/module.c index ed887b7bb74f..0951ed6618e4 100644 --- a/sys/boot/uboot/lib/module.c +++ b/sys/boot/uboot/lib/module.c @@ -47,8 +47,10 @@ uboot_autoload(void) #if defined(LOADER_FDT_SUPPORT) int err; - if ((err = fdt_setup_fdtp()) != 0) + if ((err = fdt_setup_fdtp()) != 0) { + printf("No valid device tree blob found!\n"); return (err); + } #endif return(0); diff --git a/sys/boot/uboot/lib/net.c b/sys/boot/uboot/lib/net.c index 902e37262289..20a26b741468 100644 --- a/sys/boot/uboot/lib/net.c +++ b/sys/boot/uboot/lib/net.c @@ -45,6 +45,7 @@ __FBSDID("$FreeBSD$"); #include "api_public.h" #include "glue.h" #include "libuboot.h" +#include "dev_net.h" static int net_probe(struct netif *, void *); static int net_match(struct netif *, void *); @@ -84,6 +85,109 @@ struct uboot_softc { static struct uboot_softc uboot_softc; +/* + * get_env_net_params() + * + * Attempt to obtain all the parms we need for netbooting from the U-Boot + * environment. If we fail to obtain the values it may still be possible to + * netboot; the net_dev code will attempt to get the values from bootp, rarp, + * and other such sources. + * + * If rootip.s_addr is non-zero net_dev assumes the required global variables + * are set and skips the bootp inquiry. For that reason, we don't set rootip + * until we've verified that we have at least the minimum required info. + * + * This is called from netif_init() which can result in it getting called + * multiple times, by design. The network code at higher layers zeroes out + * rootip when it closes a network interface, so if it gets opened again we have + * to obtain all this info again. + */ +static void +get_env_net_params() +{ + char *envstr; + in_addr_t rootaddr, serveraddr; + + /* Silently get out right away if we don't have rootpath. */ + if (ub_env_get("rootpath") == NULL) + return; + + /* + * Our own IP address must be valid. Silently get out if it's not set, + * but whine if it's there and we can't parse it. + */ + if ((envstr = ub_env_get("ipaddr")) == NULL) + return; + if ((myip.s_addr = inet_addr(envstr)) == INADDR_NONE) { + printf("Could not parse ipaddr '%s'\n", envstr); + return; + } + + /* + * Netmask is optional, default to the "natural" netmask for our IP, but + * whine if it was provided and we couldn't parse it. + */ + if ((envstr = ub_env_get("netmask")) != NULL && + (netmask = inet_addr(envstr)) == INADDR_NONE) { + printf("Could not parse netmask '%s'\n", envstr); + } + if (netmask == INADDR_NONE) { + if (IN_CLASSA(myip.s_addr)) + netmask = IN_CLASSA_NET; + else if (IN_CLASSB(myip.s_addr)) + netmask = IN_CLASSB_NET; + else + netmask = IN_CLASSC_NET; + } + + /* + * Get optional serverip before rootpath; the latter can override it. + * Whine only if it's present but can't be parsed. + */ + serveraddr = INADDR_NONE; + if ((envstr = ub_env_get("serverip")) != NULL) { + if ((serveraddr = inet_addr(envstr)) == INADDR_NONE) + printf("Could not parse serverip '%s'\n", envstr); + } + + /* + * There must be a rootpath. It may be ip:/path or it may be just the + * path in which case the ip needs to be in serverip. + */ + if ((envstr = ub_env_get("rootpath")) == NULL) + return; + strncpy(rootpath, envstr, sizeof(rootpath) - 1); + rootaddr = net_parse_rootpath(); + if (rootaddr == INADDR_NONE) + rootaddr = serveraddr; + if (rootaddr == INADDR_NONE) { + printf("No server address for rootpath '%s'\n", envstr); + return; + } + rootip.s_addr = rootaddr; + + /* + * Gateway IP is optional unless rootip is on a different net in which + * case whine if it's missing or we can't parse it, and set rootip addr + * to zero, which signals to other network code that network params + * aren't set (so it will try dhcp, bootp, etc). + */ + envstr = ub_env_get("gatewayip"); + if (!SAMENET(myip, rootip, netmask)) { + if (envstr == NULL) { + printf("Need gatewayip for a root server on a " + "different network.\n"); + rootip.s_addr = 0; + return; + } + if ((gateip.s_addr = inet_addr(envstr) == INADDR_NONE)) { + printf("Could not parse gatewayip '%s'\n", envstr); + rootip.s_addr = 0; + return; + } + } +} + static int net_match(struct netif *nif, void *machdep_hint) { @@ -222,6 +326,11 @@ net_init(struct iodesc *desc, void *machdep_hint) nif->nif_driver->netif_bname, nif->nif_unit); } + /* Attempt to get netboot params from the u-boot env. */ + get_env_net_params(); + if (myip.s_addr != 0) + desc->myip = myip; + #if defined(NETIF_DEBUG) printf("network: %s%d attached to %s\n", nif->nif_driver->netif_bname, nif->nif_unit, ether_sprintf(desc->myea)); diff --git a/sys/cddl/contrib/opensolaris/uts/common/dtrace/dtrace.c b/sys/cddl/contrib/opensolaris/uts/common/dtrace/dtrace.c index b31e8bb68c6c..4e5516069f97 100644 --- a/sys/cddl/contrib/opensolaris/uts/common/dtrace/dtrace.c +++ b/sys/cddl/contrib/opensolaris/uts/common/dtrace/dtrace.c @@ -14225,8 +14225,8 @@ dtrace_state_create(struct cdev *dev) state->dts_cleaner = CYCLIC_NONE; state->dts_deadman = CYCLIC_NONE; #else - callout_init(&state->dts_cleaner, CALLOUT_MPSAFE); - callout_init(&state->dts_deadman, CALLOUT_MPSAFE); + callout_init(&state->dts_cleaner, 1); + callout_init(&state->dts_deadman, 1); #endif state->dts_vstate.dtvs_state = state; diff --git a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_send.c b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_send.c index cbccad359c3f..adee4f858a1b 100644 --- a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_send.c +++ b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_send.c @@ -983,10 +983,12 @@ recv_begin_check_existing_impl(dmu_recv_begin_arg_t *drba, dsl_dataset_t *ds, dsl_dataset_rele(snap, FTAG); } else { - /* if full, most recent snapshot must be $ORIGIN */ - if (dsl_dataset_phys(ds)->ds_prev_snap_txg >= TXG_INITIAL) - return (SET_ERROR(ENODEV)); - drba->drba_snapobj = dsl_dataset_phys(ds)->ds_prev_snap_obj; + /* if full, then must be forced */ + if (!drba->drba_cookie->drc_force) + return (SET_ERROR(EEXIST)); + /* start from $ORIGIN@$ORIGIN, if supported */ + drba->drba_snapobj = dp->dp_origin_snap != NULL ? + dp->dp_origin_snap->ds_object : 0; } return (0); @@ -1142,7 +1144,8 @@ dmu_recv_begin_sync(void *arg, dmu_tx_t *tx) } dsobj = dsl_dataset_create_sync(ds->ds_dir, recv_clone_name, snap, crflags, drba->drba_cred, tx); - dsl_dataset_rele(snap, FTAG); + if (drba->drba_snapobj != 0) + dsl_dataset_rele(snap, FTAG); dsl_dataset_rele(ds, FTAG); } else { dsl_dir_t *dd; diff --git a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_traverse.c b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_traverse.c index faa6d0ce0d4c..9891099c836a 100644 --- a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_traverse.c +++ b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_traverse.c @@ -21,6 +21,7 @@ /* * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2012, 2014 by Delphix. All rights reserved. + * Copyright (c) 2015 Chunwei Chen. All rights reserved. */ #include diff --git a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dsl_dataset.c b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dsl_dataset.c index 58db4ddb71c2..7319c76e9f23 100644 --- a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dsl_dataset.c +++ b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dsl_dataset.c @@ -2161,12 +2161,14 @@ dsl_dataset_promote_check(void *arg, dmu_tx_t *tx) int err; uint64_t unused; uint64_t ss_mv_cnt; + size_t max_snap_len; err = promote_hold(ddpa, dp, FTAG); if (err != 0) return (err); hds = ddpa->ddpa_clone; + max_snap_len = MAXNAMELEN - strlen(ddpa->ddpa_clonename) - 1; if (dsl_dataset_phys(hds)->ds_flags & DS_FLAG_NOPROMOTE) { promote_rele(ddpa, FTAG); @@ -2230,6 +2232,10 @@ dsl_dataset_promote_check(void *arg, dmu_tx_t *tx) /* Check that the snapshot name does not conflict */ VERIFY0(dsl_dataset_get_snapname(ds)); + if (strlen(ds->ds_snapname) >= max_snap_len) { + err = SET_ERROR(ENAMETOOLONG); + goto out; + } err = dsl_dataset_snap_lookup(hds, ds->ds_snapname, &val); if (err == 0) { (void) strcpy(ddpa->err_ds, snap->ds->ds_snapname); diff --git a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/spa_misc.c b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/spa_misc.c index b51dd9791f3a..d072dc3aef79 100644 --- a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/spa_misc.c +++ b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/spa_misc.c @@ -671,7 +671,7 @@ spa_add(const char *name, nvlist_t *config, const char *altroot) mutex_exit(&cpu_lock); #else /* !illumos */ #ifdef _KERNEL - callout_init(&spa->spa_deadman_cycid, CALLOUT_MPSAFE); + callout_init(&spa->spa_deadman_cycid, 1); #endif #endif refcount_create(&spa->spa_refcount); diff --git a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_ctldir.c b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_ctldir.c index 9e0b8a0998c3..c2dd020b4c0d 100644 --- a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_ctldir.c +++ b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_ctldir.c @@ -697,6 +697,7 @@ zfsctl_unmount_snap(zfs_snapentry_t *sep, int fflags, cred_t *cr) return (0); #else + vfs_ref(vn_mountedvfs(svp)); return (dounmount(vn_mountedvfs(svp), fflags, curthread)); #endif } diff --git a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_ioctl.c b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_ioctl.c index 55e3c45cc7b8..5800db0c310b 100644 --- a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_ioctl.c +++ b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_ioctl.c @@ -3481,9 +3481,8 @@ zfs_unmount_snap(const char *snapname) #ifdef illumos (void) dounmount(vfsp, MS_FORCE, kcred); #else - mtx_lock(&Giant); /* dounmount() */ + vfs_ref(vfsp); (void) dounmount(vfsp, MS_FORCE, curthread); - mtx_unlock(&Giant); /* dounmount() */ #endif return (0); } @@ -4196,7 +4195,11 @@ zfs_ioc_recv(zfs_cmd_t *zc) return (error); fd = zc->zc_cookie; - fp = getf(fd, cap_rights_init(&rights, CAP_PREAD)); +#ifdef illumos + fp = getf(fd); +#else + fget_read(curthread, fd, cap_rights_init(&rights, CAP_PREAD), &fp); +#endif if (fp == NULL) { nvlist_free(props); return (SET_ERROR(EBADF)); @@ -4442,8 +4445,12 @@ zfs_ioc_send(zfs_cmd_t *zc) file_t *fp; cap_rights_t rights; - fp = getf(zc->zc_cookie, - cap_rights_init(&rights, CAP_WRITE)); +#ifdef illumos + fp = getf(zc->zc_cookie); +#else + fget_write(curthread, zc->zc_cookie, + cap_rights_init(&rights, CAP_WRITE), &fp); +#endif if (fp == NULL) return (SET_ERROR(EBADF)); @@ -5039,7 +5046,12 @@ zfs_ioc_diff(zfs_cmd_t *zc) offset_t off; int error; - fp = getf(zc->zc_cookie, cap_rights_init(&rights, CAP_WRITE)); +#ifdef illumos + fp = getf(zc->zc_cookie); +#else + fget_write(curthread, zc->zc_cookie, + cap_rights_init(&rights, CAP_WRITE), &fp); +#endif if (fp == NULL) return (SET_ERROR(EBADF)); @@ -5404,6 +5416,7 @@ static int zfs_ioc_send_new(const char *snapname, nvlist_t *innvl, nvlist_t *outnvl) { cap_rights_t rights; + file_t *fp; int error; offset_t off; char *fromname = NULL; @@ -5420,7 +5433,11 @@ zfs_ioc_send_new(const char *snapname, nvlist_t *innvl, nvlist_t *outnvl) largeblockok = nvlist_exists(innvl, "largeblockok"); embedok = nvlist_exists(innvl, "embedok"); - file_t *fp = getf(fd, cap_rights_init(&rights, CAP_READ)); +#ifdef illumos + file_t *fp = getf(fd); +#else + fget_write(curthread, fd, cap_rights_init(&rights, CAP_WRITE), &fp); +#endif if (fp == NULL) return (SET_ERROR(EBADF)); diff --git a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_vfsops.c b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_vfsops.c index 5824828c7a07..1193e47a0108 100644 --- a/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_vfsops.c +++ b/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_vfsops.c @@ -2314,8 +2314,10 @@ zfs_resume_fs(zfsvfs_t *zfsvfs, const char *osname) * Since we couldn't setup the sa framework, try to force * unmount this file system. */ - if (vn_vfswlock(zfsvfs->z_vfs->vfs_vnodecovered) == 0) + if (vn_vfswlock(zfsvfs->z_vfs->vfs_vnodecovered) == 0) { + vfs_ref(zfsvfs->z_vfs); (void) dounmount(zfsvfs->z_vfs, MS_FORCE, curthread); + } } return (err); } diff --git a/sys/cddl/contrib/opensolaris/uts/powerpc/dtrace/fasttrap_isa.c b/sys/cddl/contrib/opensolaris/uts/powerpc/dtrace/fasttrap_isa.c index f076f5d8040e..ea01d5f44616 100644 --- a/sys/cddl/contrib/opensolaris/uts/powerpc/dtrace/fasttrap_isa.c +++ b/sys/cddl/contrib/opensolaris/uts/powerpc/dtrace/fasttrap_isa.c @@ -244,8 +244,8 @@ fasttrap_anarg(struct reg *rp, int argno) DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR); } else { DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT); - value = dtrace_fuword64((void *)(rp->fixreg[1] + 16 + - ((argno - 8) * sizeof(uint32_t)))); + value = dtrace_fuword64((void *)(rp->fixreg[1] + 48 + + ((argno - 8) * sizeof(uint64_t)))); DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR); } return value; @@ -289,7 +289,7 @@ fasttrap_usdt_args(fasttrap_probe_t *probe, struct reg *rp, int argc, argv[i] = fuword32((void *)(rp->fixreg[1] + 8 + (x * sizeof(uint32_t)))); else - argv[i] = fuword32((void *)(rp->fixreg[1] + 16 + + argv[i] = fuword64((void *)(rp->fixreg[1] + 48 + (x * sizeof(uint64_t)))); } diff --git a/sys/cddl/dev/dtrace/amd64/dtrace_asm.S b/sys/cddl/dev/dtrace/amd64/dtrace_asm.S index a6c079ee6773..eb5856d1b51a 100644 --- a/sys/cddl/dev/dtrace/amd64/dtrace_asm.S +++ b/sys/cddl/dev/dtrace/amd64/dtrace_asm.S @@ -60,8 +60,6 @@ 1: addq $TF_RIP,%rsp; - .globl calltrap - .type calltrap,@function ENTRY(dtrace_invop_start) /* diff --git a/sys/cddl/dev/dtrace/amd64/dtrace_subr.c b/sys/cddl/dev/dtrace/amd64/dtrace_subr.c index 805add208cdc..7f2ec7ee526b 100644 --- a/sys/cddl/dev/dtrace/amd64/dtrace_subr.c +++ b/sys/cddl/dev/dtrace/amd64/dtrace_subr.c @@ -142,114 +142,6 @@ dtrace_sync(void) } #ifdef notyet -int (*dtrace_pid_probe_ptr)(struct regs *); -int (*dtrace_return_probe_ptr)(struct regs *); - -void -dtrace_user_probe(struct regs *rp, caddr_t addr, processorid_t cpuid) -{ - krwlock_t *rwp; - proc_t *p = curproc; - extern void trap(struct regs *, caddr_t, processorid_t); - - if (USERMODE(rp->r_cs) || (rp->r_ps & PS_VM)) { - if (curthread->t_cred != p->p_cred) { - cred_t *oldcred = curthread->t_cred; - /* - * DTrace accesses t_cred in probe context. t_cred - * must always be either NULL, or point to a valid, - * allocated cred structure. - */ - curthread->t_cred = crgetcred(); - crfree(oldcred); - } - } - - if (rp->r_trapno == T_DTRACE_RET) { - uint8_t step = curthread->t_dtrace_step; - uint8_t ret = curthread->t_dtrace_ret; - uintptr_t npc = curthread->t_dtrace_npc; - - if (curthread->t_dtrace_ast) { - aston(curthread); - curthread->t_sig_check = 1; - } - - /* - * Clear all user tracing flags. - */ - curthread->t_dtrace_ft = 0; - - /* - * If we weren't expecting to take a return probe trap, kill - * the process as though it had just executed an unassigned - * trap instruction. - */ - if (step == 0) { - tsignal(curthread, SIGILL); - return; - } - - /* - * If we hit this trap unrelated to a return probe, we're - * just here to reset the AST flag since we deferred a signal - * until after we logically single-stepped the instruction we - * copied out. - */ - if (ret == 0) { - rp->r_pc = npc; - return; - } - - /* - * We need to wait until after we've called the - * dtrace_return_probe_ptr function pointer to set %pc. - */ - rwp = &CPU->cpu_ft_lock; - rw_enter(rwp, RW_READER); - if (dtrace_return_probe_ptr != NULL) - (void) (*dtrace_return_probe_ptr)(rp); - rw_exit(rwp); - rp->r_pc = npc; - - } else if (rp->r_trapno == T_BPTFLT) { - uint8_t instr; - rwp = &CPU->cpu_ft_lock; - - /* - * The DTrace fasttrap provider uses the breakpoint trap - * (int 3). We let DTrace take the first crack at handling - * this trap; if it's not a probe that DTrace knowns about, - * we call into the trap() routine to handle it like a - * breakpoint placed by a conventional debugger. - */ - rw_enter(rwp, RW_READER); - if (dtrace_pid_probe_ptr != NULL && - (*dtrace_pid_probe_ptr)(rp) == 0) { - rw_exit(rwp); - return; - } - rw_exit(rwp); - - /* - * If the instruction that caused the breakpoint trap doesn't - * look like an int 3 anymore, it may be that this tracepoint - * was removed just after the user thread executed it. In - * that case, return to user land to retry the instuction. - */ - if (fuword8((void *)(rp->r_pc - 1), &instr) == 0 && - instr != FASTTRAP_INSTR) { - rp->r_pc--; - return; - } - - trap(rp, addr, cpuid); - - } else { - trap(rp, addr, cpuid); - } -} - void dtrace_safe_synchronous_signal(void) { diff --git a/sys/cddl/dev/dtrace/i386/dtrace_asm.S b/sys/cddl/dev/dtrace/i386/dtrace_asm.S index d44f6c3fdf81..425e99c38980 100644 --- a/sys/cddl/dev/dtrace/i386/dtrace_asm.S +++ b/sys/cddl/dev/dtrace/i386/dtrace_asm.S @@ -34,8 +34,6 @@ #include "assym.s" - .globl calltrap - .type calltrap,@function ENTRY(dtrace_invop_start) pushl %eax /* push %eax -- may be return value */ diff --git a/sys/cddl/dev/dtrace/i386/dtrace_subr.c b/sys/cddl/dev/dtrace/i386/dtrace_subr.c index 4073317e1651..814019e1b4c5 100644 --- a/sys/cddl/dev/dtrace/i386/dtrace_subr.c +++ b/sys/cddl/dev/dtrace/i386/dtrace_subr.c @@ -143,122 +143,6 @@ dtrace_sync(void) } #ifdef notyet -int (*dtrace_fasttrap_probe_ptr)(struct regs *); -int (*dtrace_pid_probe_ptr)(struct regs *); -int (*dtrace_return_probe_ptr)(struct regs *); - -void -dtrace_user_probe(struct regs *rp, caddr_t addr, processorid_t cpuid) -{ - krwlock_t *rwp; - proc_t *p = curproc; - extern void trap(struct regs *, caddr_t, processorid_t); - - if (USERMODE(rp->r_cs) || (rp->r_ps & PS_VM)) { - if (curthread->t_cred != p->p_cred) { - cred_t *oldcred = curthread->t_cred; - /* - * DTrace accesses t_cred in probe context. t_cred - * must always be either NULL, or point to a valid, - * allocated cred structure. - */ - curthread->t_cred = crgetcred(); - crfree(oldcred); - } - } - - if (rp->r_trapno == T_DTRACE_RET) { - uint8_t step = curthread->t_dtrace_step; - uint8_t ret = curthread->t_dtrace_ret; - uintptr_t npc = curthread->t_dtrace_npc; - - if (curthread->t_dtrace_ast) { - aston(curthread); - curthread->t_sig_check = 1; - } - - /* - * Clear all user tracing flags. - */ - curthread->t_dtrace_ft = 0; - - /* - * If we weren't expecting to take a return probe trap, kill - * the process as though it had just executed an unassigned - * trap instruction. - */ - if (step == 0) { - tsignal(curthread, SIGILL); - return; - } - - /* - * If we hit this trap unrelated to a return probe, we're - * just here to reset the AST flag since we deferred a signal - * until after we logically single-stepped the instruction we - * copied out. - */ - if (ret == 0) { - rp->r_pc = npc; - return; - } - - /* - * We need to wait until after we've called the - * dtrace_return_probe_ptr function pointer to set %pc. - */ - rwp = &CPU->cpu_ft_lock; - rw_enter(rwp, RW_READER); - if (dtrace_return_probe_ptr != NULL) - (void) (*dtrace_return_probe_ptr)(rp); - rw_exit(rwp); - rp->r_pc = npc; - - } else if (rp->r_trapno == T_DTRACE_PROBE) { - rwp = &CPU->cpu_ft_lock; - rw_enter(rwp, RW_READER); - if (dtrace_fasttrap_probe_ptr != NULL) - (void) (*dtrace_fasttrap_probe_ptr)(rp); - rw_exit(rwp); - - } else if (rp->r_trapno == T_BPTFLT) { - uint8_t instr; - rwp = &CPU->cpu_ft_lock; - - /* - * The DTrace fasttrap provider uses the breakpoint trap - * (int 3). We let DTrace take the first crack at handling - * this trap; if it's not a probe that DTrace knowns about, - * we call into the trap() routine to handle it like a - * breakpoint placed by a conventional debugger. - */ - rw_enter(rwp, RW_READER); - if (dtrace_pid_probe_ptr != NULL && - (*dtrace_pid_probe_ptr)(rp) == 0) { - rw_exit(rwp); - return; - } - rw_exit(rwp); - - /* - * If the instruction that caused the breakpoint trap doesn't - * look like an int 3 anymore, it may be that this tracepoint - * was removed just after the user thread executed it. In - * that case, return to user land to retry the instuction. - */ - if (fuword8((void *)(rp->r_pc - 1), &instr) == 0 && - instr != FASTTRAP_INSTR) { - rp->r_pc--; - return; - } - - trap(rp, addr, cpuid); - - } else { - trap(rp, addr, cpuid); - } -} - void dtrace_safe_synchronous_signal(void) { diff --git a/sys/cddl/dev/profile/profile.c b/sys/cddl/dev/profile/profile.c index d31d5c81077e..dd13397aad4e 100644 --- a/sys/cddl/dev/profile/profile.c +++ b/sys/cddl/dev/profile/profile.c @@ -342,7 +342,7 @@ profile_create(hrtime_t interval, char *name, int kind) prof->prof_cyclic = CYCLIC_NONE; #else prof->prof_interval = nsec_to_sbt(interval); - callout_init(&prof->prof_cyclic, CALLOUT_MPSAFE); + callout_init(&prof->prof_cyclic, 1); #endif prof->prof_kind = kind; prof->prof_id = dtrace_probe_create(profile_id, @@ -590,7 +590,7 @@ profile_enable_omni(profile_probe_t *prof) pcpu->profc_probe = prof; pcpu->profc_expected = sbinuptime() + prof->prof_interval; pcpu->profc_interval = prof->prof_interval; - callout_init(&pcpu->profc_cyclic, CALLOUT_MPSAFE); + callout_init(&pcpu->profc_cyclic, 1); callout_reset_sbt_on(&pcpu->profc_cyclic, pcpu->profc_expected, 0, profile_fire, pcpu, cpu, C_DIRECT_EXEC | C_ABSOLUTE); diff --git a/sys/compat/freebsd32/freebsd32_misc.c b/sys/compat/freebsd32/freebsd32_misc.c index 67210ff59de4..7a33d619ba86 100644 --- a/sys/compat/freebsd32/freebsd32_misc.c +++ b/sys/compat/freebsd32/freebsd32_misc.c @@ -402,12 +402,17 @@ int freebsd32_execve(struct thread *td, struct freebsd32_execve_args *uap) { struct image_args eargs; + struct vmspace *oldvmspace; int error; + error = pre_execve(td, &oldvmspace); + if (error != 0) + return (error); error = freebsd32_exec_copyin_args(&eargs, uap->fname, UIO_USERSPACE, uap->argv, uap->envv); if (error == 0) error = kern_execve(td, &eargs, NULL); + post_execve(td, error, oldvmspace); return (error); } @@ -415,14 +420,19 @@ int freebsd32_fexecve(struct thread *td, struct freebsd32_fexecve_args *uap) { struct image_args eargs; + struct vmspace *oldvmspace; int error; + error = pre_execve(td, &oldvmspace); + if (error != 0) + return (error); error = freebsd32_exec_copyin_args(&eargs, NULL, UIO_SYSSPACE, uap->argv, uap->envv); if (error == 0) { eargs.fd = uap->fd; error = kern_execve(td, &eargs, NULL); } + post_execve(td, error, oldvmspace); return (error); } diff --git a/sys/compat/ia32/ia32_sysvec.c b/sys/compat/ia32/ia32_sysvec.c index 6dd02aff96a5..51a9e9ff244a 100644 --- a/sys/compat/ia32/ia32_sysvec.c +++ b/sys/compat/ia32/ia32_sysvec.c @@ -136,6 +136,7 @@ struct sysentvec ia32_freebsd_sysvec = { .sv_shared_page_base = FREEBSD32_SHAREDPAGE, .sv_shared_page_len = PAGE_SIZE, .sv_schedtail = NULL, + .sv_thread_detach = NULL, }; INIT_SYSENTVEC(elf_ia32_sysvec, &ia32_freebsd_sysvec); diff --git a/sys/compat/linprocfs/linprocfs.c b/sys/compat/linprocfs/linprocfs.c index b2444c1a992d..00d02865e713 100644 --- a/sys/compat/linprocfs/linprocfs.c +++ b/sys/compat/linprocfs/linprocfs.c @@ -39,8 +39,6 @@ * @(#)procfs_status.c 8.4 (Berkeley) 6/15/94 */ -#include "opt_compat.h" - #include __FBSDID("$FreeBSD$"); @@ -69,6 +67,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include #include #include @@ -80,7 +79,7 @@ __FBSDID("$FreeBSD$"); #include #include -#include +#include #include #include @@ -100,11 +99,7 @@ __FBSDID("$FreeBSD$"); #include #endif /* __i386__ || __amd64__ */ -#ifdef COMPAT_FREEBSD32 -#include -#endif - -#include +#include #include #include #include @@ -748,6 +743,7 @@ linprocfs_doprocstatus(PFS_FILL_ARGS) segsz_t lsize; struct thread *td2; struct sigacts *ps; + l_sigset_t siglist, sigignore, sigcatch; int i; sx_slock(&proctree_lock); @@ -839,29 +835,25 @@ linprocfs_doprocstatus(PFS_FILL_ARGS) /* * Signal masks - * - * We support up to 128 signals, while Linux supports 32, - * but we only define 32 (the same 32 as Linux, to boot), so - * just show the lower 32 bits of each mask. XXX hack. - * - * NB: on certain platforms (Sparc at least) Linux actually - * supports 64 signals, but this code is a long way from - * running on anything but i386, so ignore that for now. */ PROC_LOCK(p); - sbuf_printf(sb, "SigPnd:\t%08x\n", p->p_siglist.__bits[0]); - /* - * I can't seem to find out where the signal mask is in - * relation to struct proc, so SigBlk is left unimplemented. - */ - sbuf_printf(sb, "SigBlk:\t%08x\n", 0); /* XXX */ + bsd_to_linux_sigset(&p->p_siglist, &siglist); ps = p->p_sigacts; mtx_lock(&ps->ps_mtx); - sbuf_printf(sb, "SigIgn:\t%08x\n", ps->ps_sigignore.__bits[0]); - sbuf_printf(sb, "SigCgt:\t%08x\n", ps->ps_sigcatch.__bits[0]); + bsd_to_linux_sigset(&ps->ps_sigignore, &sigignore); + bsd_to_linux_sigset(&ps->ps_sigcatch, &sigcatch); mtx_unlock(&ps->ps_mtx); PROC_UNLOCK(p); + sbuf_printf(sb, "SigPnd:\t%016jx\n", siglist.__mask); + /* + * XXX. SigBlk - target thread's signal mask, td_sigmask. + * To implement SigBlk pseudofs should support proc/tid dir entries. + */ + sbuf_printf(sb, "SigBlk:\t%016x\n", 0); + sbuf_printf(sb, "SigIgn:\t%016jx\n", sigignore.__mask); + sbuf_printf(sb, "SigCgt:\t%016jx\n", sigcatch.__mask); + /* * Linux also prints the capability masks, but we don't have * capabilities yet, and when we do get them they're likely to @@ -954,34 +946,22 @@ linprocfs_doproccmdline(PFS_FILL_ARGS) static int linprocfs_doprocenviron(PFS_FILL_ARGS) { - int ret; - - PROC_LOCK(p); - if ((ret = p_candebug(td, p)) != 0) { - PROC_UNLOCK(p); - return (ret); - } /* * Mimic linux behavior and pass only processes with usermode * address space as valid. Return zero silently otherwize. */ - if (p->p_vmspace == &vmspace0) { - PROC_UNLOCK(p); + if (p->p_vmspace == &vmspace0) return (0); - } - if ((p->p_flag & P_SYSTEM) != 0) { - PROC_UNLOCK(p); - return (0); - } - - PROC_UNLOCK(p); - - ret = proc_getenvv(td, p, sb); - return (ret); + return (proc_getenvv(td, p, sb)); } +static char l32_map_str[] = "%08lx-%08lx %s%s%s%s %08lx %02x:%02x %lu%s%s\n"; +static char l64_map_str[] = "%016lx-%016lx %s%s%s%s %08lx %02x:%02x %lu%s%s\n"; +static char vdso_str[] = " [vdso]"; +static char stack_str[] = " [stack]"; + /* * Filler function for proc/pid/maps */ @@ -997,6 +977,7 @@ linprocfs_doprocmaps(PFS_FILL_ARGS) vm_prot_t e_prot; unsigned int last_timestamp; char *name = "", *freename = NULL; + const char *l_map_str; ino_t ino; int ref_count, shadow_count, flags; int error; @@ -1016,6 +997,11 @@ linprocfs_doprocmaps(PFS_FILL_ARGS) vm = vmspace_acquire_ref(p); if (vm == NULL) return (ESRCH); + + if (SV_CURPROC_FLAG(SV_LP64)) + l_map_str = l64_map_str; + else + l_map_str = l32_map_str; map = &vm->vm_map; vm_map_lock_read(map); for (entry = map->header.next; entry != &map->header; @@ -1058,6 +1044,11 @@ linprocfs_doprocmaps(PFS_FILL_ARGS) VOP_GETATTR(vp, &vat, td->td_ucred); ino = vat.va_fileid; vput(vp); + } else if (SV_PROC_ABI(p) == SV_ABI_LINUX) { + if (e_start == p->p_sysent->sv_shared_page_base) + name = vdso_str; + if (e_end == p->p_sysent->sv_usrstack) + name = stack_str; } } else { flags = 0; @@ -1069,8 +1060,7 @@ linprocfs_doprocmaps(PFS_FILL_ARGS) * format: * start, end, access, offset, major, minor, inode, name. */ - error = sbuf_printf(sb, - "%08lx-%08lx %s%s%s%s %08lx %02x:%02x %lu%s%s\n", + error = sbuf_printf(sb, l_map_str, (u_long)e_start, (u_long)e_end, (e_prot & VM_PROT_READ)?"r":"-", (e_prot & VM_PROT_WRITE)?"w":"-", @@ -1106,6 +1096,35 @@ linprocfs_doprocmaps(PFS_FILL_ARGS) return (error); } +/* + * Criteria for interface name translation + */ +#define IFP_IS_ETH(ifp) (ifp->if_type == IFT_ETHER) + +static int +linux_ifname(struct ifnet *ifp, char *buffer, size_t buflen) +{ + struct ifnet *ifscan; + int ethno; + + IFNET_RLOCK_ASSERT(); + + /* Short-circuit non ethernet interfaces */ + if (!IFP_IS_ETH(ifp)) + return (strlcpy(buffer, ifp->if_xname, buflen)); + + /* Determine the (relative) unit number for ethernet interfaces */ + ethno = 0; + TAILQ_FOREACH(ifscan, &V_ifnet, if_link) { + if (ifscan == ifp) + return (snprintf(buffer, buflen, "eth%d", ethno)); + if (IFP_IS_ETH(ifscan)) + ethno++; + } + + return (0); +} + /* * Filler function for proc/net/dev */ @@ -1254,8 +1273,6 @@ linprocfs_doscsiscsi(PFS_FILL_ARGS) return (0); } -extern struct cdevsw *cdevsw[]; - /* * Filler function for proc/devices */ @@ -1350,6 +1367,52 @@ linprocfs_douuid(PFS_FILL_ARGS) return(0); } +/* + * Filler function for proc/pid/auxv + */ +static int +linprocfs_doauxv(PFS_FILL_ARGS) +{ + struct sbuf *asb; + off_t buflen, resid; + int error; + + /* + * Mimic linux behavior and pass only processes with usermode + * address space as valid. Return zero silently otherwise. + */ + if (p->p_vmspace == &vmspace0) + return (0); + + if (uio->uio_resid == 0) + return (0); + if (uio->uio_offset < 0 || uio->uio_resid < 0) + return (EINVAL); + + asb = sbuf_new_auto(); + if (asb == NULL) + return (ENOMEM); + error = proc_getauxv(td, p, asb); + if (error == 0) + error = sbuf_finish(asb); + + resid = sbuf_len(asb) - uio->uio_offset; + if (resid > uio->uio_resid) + buflen = uio->uio_resid; + else + buflen = resid; + if (buflen > IOSIZE_MAX) + return (EINVAL); + if (buflen > MAXPHYS) + buflen = MAXPHYS; + if (resid <= 0) + return (0); + + if (error == 0) + error = uiomove(sbuf_data(asb) + uio->uio_offset, buflen, uio); + sbuf_delete(asb); + return (error); +} /* * Constructor @@ -1408,7 +1471,7 @@ linprocfs_init(PFS_INIT_ARGS) pfs_create_link(dir, "cwd", &linprocfs_doproccwd, NULL, NULL, NULL, 0); pfs_create_file(dir, "environ", &linprocfs_doprocenviron, - NULL, NULL, NULL, PFS_RD); + NULL, &procfs_candebug, NULL, PFS_RD); pfs_create_link(dir, "exe", &procfs_doprocfile, NULL, &procfs_notsystem, NULL, 0); pfs_create_file(dir, "maps", &linprocfs_doprocmaps, @@ -1425,6 +1488,8 @@ linprocfs_init(PFS_INIT_ARGS) NULL, NULL, NULL, PFS_RD); pfs_create_link(dir, "fd", &linprocfs_dofdescfs, NULL, NULL, NULL, 0); + pfs_create_file(dir, "auxv", &linprocfs_doauxv, + NULL, &procfs_candebug, NULL, PFS_RD|PFS_RAWRD); /* /proc/scsi/... */ dir = pfs_create_dir(root, "scsi", NULL, NULL, NULL, 0); @@ -1470,7 +1535,11 @@ linprocfs_uninit(PFS_INIT_ARGS) } PSEUDOFS(linprocfs, 1, 0); +#if defined(__amd64__) +MODULE_DEPEND(linprocfs, linux_common, 1, 1, 1); +#else MODULE_DEPEND(linprocfs, linux, 1, 1, 1); +#endif MODULE_DEPEND(linprocfs, procfs, 1, 1, 1); MODULE_DEPEND(linprocfs, sysvmsg, 1, 1, 1); MODULE_DEPEND(linprocfs, sysvsem, 1, 1, 1); diff --git a/sys/compat/linsysfs/linsysfs.c b/sys/compat/linsysfs/linsysfs.c index 069e7ffc578b..bc85ac354eb6 100644 --- a/sys/compat/linsysfs/linsysfs.c +++ b/sys/compat/linsysfs/linsysfs.c @@ -62,12 +62,6 @@ __FBSDID("$FreeBSD$"); #include -#include "opt_compat.h" -#ifdef COMPAT_LINUX32 /* XXX */ -#include -#else -#include -#endif #include #include #include @@ -282,4 +276,8 @@ linsysfs_uninit(PFS_INIT_ARGS) } PSEUDOFS(linsysfs, 1, 0); +#if defined(__amd64__) +MODULE_DEPEND(linsysfs, linux_common, 1, 1, 1); +#else MODULE_DEPEND(linsysfs, linux, 1, 1, 1); +#endif diff --git a/sys/compat/linux/check_error.d b/sys/compat/linux/check_error.d index 9e3c00a37dbe..389e768aa3f6 100644 --- a/sys/compat/linux/check_error.d +++ b/sys/compat/linux/check_error.d @@ -36,8 +36,8 @@ */ linuxulator*:dummy::not_implemented, -linuxulator*:emul:proc_exit:child_clear_tid_error, -linuxulator*:emul:proc_exit:futex_failed, +linuxulator*:emul:linux_thread_detach:child_clear_tid_error, +linuxulator*:emul:linux_thread_detach:futex_failed, linuxulator*:emul:linux_schedtail:copyout_error, linuxulator*:futex:futex_get:error, linuxulator*:futex:futex_sleep:requeue_error, diff --git a/sys/compat/linux/check_internal_locks.d b/sys/compat/linux/check_internal_locks.d index 2bdef684fadb..b9d7c61f82ca 100644 --- a/sys/compat/linux/check_internal_locks.d +++ b/sys/compat/linux/check_internal_locks.d @@ -41,14 +41,9 @@ BEGIN { - check["emul_lock"] = 0; - check["emul_shared_rlock"] = 0; - check["emul_shared_wlock"] = 0; check["futex_mtx"] = 0; } -linuxulator*:locks:emul_lock:locked, -linuxulator*:locks:emul_shared_wlock:locked, linuxulator*:locks:futex_mtx:locked /check[probefunc] > 0/ { @@ -57,9 +52,6 @@ linuxulator*:locks:futex_mtx:locked stack(); } -linuxulator*:locks:emul_lock:locked, -linuxulator*:locks:emul_shared_rlock:locked, -linuxulator*:locks:emul_shared_wlock:locked, linuxulator*:locks:futex_mtx:locked { ++check[probefunc]; @@ -69,9 +61,6 @@ linuxulator*:locks:futex_mtx:locked spec[probefunc] = speculation(); } -linuxulator*:locks:emul_lock:unlock, -linuxulator*:locks:emul_shared_rlock:unlock, -linuxulator*:locks:emul_shared_wlock:unlock, linuxulator*:locks:futex_mtx:unlock /check[probefunc] == 0/ { @@ -82,9 +71,6 @@ linuxulator*:locks:futex_mtx:unlock stack(); } -linuxulator*:locks:emul_lock:unlock, -linuxulator*:locks:emul_shared_rlock:unlock, -linuxulator*:locks:emul_shared_wlock:unlock, linuxulator*:locks:futex_mtx:unlock { discard(spec[probefunc]); @@ -94,27 +80,6 @@ linuxulator*:locks:futex_mtx:unlock /* Timeout handling */ -tick-10s -/spec["emul_lock"] != 0 && timestamp - ts["emul_lock"] >= 9999999000/ -{ - commit(spec["emul_lock"]); - spec["emul_lock"] = 0; -} - -tick-10s -/spec["emul_shared_wlock"] != 0 && timestamp - ts["emul_shared_wlock"] >= 9999999000/ -{ - commit(spec["emul_shared_wlock"]); - spec["emul_shared_wlock"] = 0; -} - -tick-10s -/spec["emul_shared_rlock"] != 0 && timestamp - ts["emul_shared_rlock"] >= 9999999000/ -{ - commit(spec["emul_shared_rlock"]); - spec["emul_shared_rlock"] = 0; -} - tick-10s /spec["futex_mtx"] != 0 && timestamp - ts["futex_mtx"] >= 9999999000/ { diff --git a/sys/compat/linux/linux.c b/sys/compat/linux/linux.c new file mode 100644 index 000000000000..d1d787742c63 --- /dev/null +++ b/sys/compat/linux/linux.c @@ -0,0 +1,205 @@ +/*- + * Copyright (c) 2015 Dmitry Chagin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include + +#include + + +static int bsd_to_linux_sigtbl[LINUX_SIGTBLSZ] = { + LINUX_SIGHUP, /* SIGHUP */ + LINUX_SIGINT, /* SIGINT */ + LINUX_SIGQUIT, /* SIGQUIT */ + LINUX_SIGILL, /* SIGILL */ + LINUX_SIGTRAP, /* SIGTRAP */ + LINUX_SIGABRT, /* SIGABRT */ + 0, /* SIGEMT */ + LINUX_SIGFPE, /* SIGFPE */ + LINUX_SIGKILL, /* SIGKILL */ + LINUX_SIGBUS, /* SIGBUS */ + LINUX_SIGSEGV, /* SIGSEGV */ + LINUX_SIGSYS, /* SIGSYS */ + LINUX_SIGPIPE, /* SIGPIPE */ + LINUX_SIGALRM, /* SIGALRM */ + LINUX_SIGTERM, /* SIGTERM */ + LINUX_SIGURG, /* SIGURG */ + LINUX_SIGSTOP, /* SIGSTOP */ + LINUX_SIGTSTP, /* SIGTSTP */ + LINUX_SIGCONT, /* SIGCONT */ + LINUX_SIGCHLD, /* SIGCHLD */ + LINUX_SIGTTIN, /* SIGTTIN */ + LINUX_SIGTTOU, /* SIGTTOU */ + LINUX_SIGIO, /* SIGIO */ + LINUX_SIGXCPU, /* SIGXCPU */ + LINUX_SIGXFSZ, /* SIGXFSZ */ + LINUX_SIGVTALRM,/* SIGVTALRM */ + LINUX_SIGPROF, /* SIGPROF */ + LINUX_SIGWINCH, /* SIGWINCH */ + 0, /* SIGINFO */ + LINUX_SIGUSR1, /* SIGUSR1 */ + LINUX_SIGUSR2 /* SIGUSR2 */ +}; + +static int linux_to_bsd_sigtbl[LINUX_SIGTBLSZ] = { + SIGHUP, /* LINUX_SIGHUP */ + SIGINT, /* LINUX_SIGINT */ + SIGQUIT, /* LINUX_SIGQUIT */ + SIGILL, /* LINUX_SIGILL */ + SIGTRAP, /* LINUX_SIGTRAP */ + SIGABRT, /* LINUX_SIGABRT */ + SIGBUS, /* LINUX_SIGBUS */ + SIGFPE, /* LINUX_SIGFPE */ + SIGKILL, /* LINUX_SIGKILL */ + SIGUSR1, /* LINUX_SIGUSR1 */ + SIGSEGV, /* LINUX_SIGSEGV */ + SIGUSR2, /* LINUX_SIGUSR2 */ + SIGPIPE, /* LINUX_SIGPIPE */ + SIGALRM, /* LINUX_SIGALRM */ + SIGTERM, /* LINUX_SIGTERM */ + SIGBUS, /* LINUX_SIGSTKFLT */ + SIGCHLD, /* LINUX_SIGCHLD */ + SIGCONT, /* LINUX_SIGCONT */ + SIGSTOP, /* LINUX_SIGSTOP */ + SIGTSTP, /* LINUX_SIGTSTP */ + SIGTTIN, /* LINUX_SIGTTIN */ + SIGTTOU, /* LINUX_SIGTTOU */ + SIGURG, /* LINUX_SIGURG */ + SIGXCPU, /* LINUX_SIGXCPU */ + SIGXFSZ, /* LINUX_SIGXFSZ */ + SIGVTALRM, /* LINUX_SIGVTALARM */ + SIGPROF, /* LINUX_SIGPROF */ + SIGWINCH, /* LINUX_SIGWINCH */ + SIGIO, /* LINUX_SIGIO */ + /* + * FreeBSD does not have SIGPWR signal, map Linux SIGPWR signal + * to the first unused FreeBSD signal number. Since Linux supports + * signals from 1 to 64 we are ok here as our SIGRTMIN = 65. + */ + SIGRTMIN, /* LINUX_SIGPWR */ + SIGSYS /* LINUX_SIGSYS */ +}; + +/* + * Map Linux RT signals to the FreeBSD RT signals. + */ +static inline int +linux_to_bsd_rt_signal(int sig) +{ + + return (SIGRTMIN + 1 + sig - LINUX_SIGRTMIN); +} + +static inline int +bsd_to_linux_rt_signal(int sig) +{ + + return (sig - SIGRTMIN - 1 + LINUX_SIGRTMIN); +} + +int +linux_to_bsd_signal(int sig) +{ + + KASSERT(sig > 0 && sig <= LINUX_SIGRTMAX, ("Invalid Linux signal\n")); + + if (sig < LINUX_SIGRTMIN) + return (linux_to_bsd_sigtbl[_SIG_IDX(sig)]); + + return (linux_to_bsd_rt_signal(sig)); +} + +int +bsd_to_linux_signal(int sig) +{ + + if (sig <= LINUX_SIGTBLSZ) + return (bsd_to_linux_sigtbl[_SIG_IDX(sig)]); + if (sig == SIGRTMIN) + return (LINUX_SIGPWR); + + return (bsd_to_linux_rt_signal(sig)); +} + +int +linux_to_bsd_sigaltstack(int lsa) +{ + int bsa = 0; + + if (lsa & LINUX_SS_DISABLE) + bsa |= SS_DISABLE; + /* + * Linux ignores SS_ONSTACK flag for ss + * parameter while FreeBSD prohibits it. + */ + return (bsa); +} + +int +bsd_to_linux_sigaltstack(int bsa) +{ + int lsa = 0; + + if (bsa & SS_DISABLE) + lsa |= LINUX_SS_DISABLE; + if (bsa & SS_ONSTACK) + lsa |= LINUX_SS_ONSTACK; + return (lsa); +} + +void +linux_to_bsd_sigset(l_sigset_t *lss, sigset_t *bss) +{ + int b, l; + + SIGEMPTYSET(*bss); + for (l = 1; l <= LINUX_SIGRTMAX; l++) { + if (LINUX_SIGISMEMBER(*lss, l)) { + b = linux_to_bsd_signal(l); + if (b) + SIGADDSET(*bss, b); + } + } +} + +void +bsd_to_linux_sigset(sigset_t *bss, l_sigset_t *lss) +{ + int b, l; + + LINUX_SIGEMPTYSET(*lss); + for (b = 1; b <= SIGRTMAX; b++) { + if (SIGISMEMBER(*bss, b)) { + l = bsd_to_linux_signal(b); + if (l) + LINUX_SIGADDSET(*lss, l); + } + } +} diff --git a/sys/compat/linux/linux.h b/sys/compat/linux/linux.h new file mode 100644 index 000000000000..974440f94c26 --- /dev/null +++ b/sys/compat/linux/linux.h @@ -0,0 +1,95 @@ +/*- + * Copyright (c) 2015 Dmitry Chagin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _LINUX_MI_H_ +#define _LINUX_MI_H_ + +/* sigaltstack */ +#define LINUX_SS_ONSTACK 1 +#define LINUX_SS_DISABLE 2 + +int linux_to_bsd_sigaltstack(int lsa); +int bsd_to_linux_sigaltstack(int bsa); + +/* sigset */ +typedef struct { + uint64_t __mask; +} l_sigset_t; + +/* primitives to manipulate sigset_t */ +#define LINUX_SIGEMPTYSET(set) (set).__mask = 0 +#define LINUX_SIGISMEMBER(set, sig) (1UL & ((set).__mask >> _SIG_IDX(sig))) +#define LINUX_SIGADDSET(set, sig) (set).__mask |= 1UL << _SIG_IDX(sig) + +void linux_to_bsd_sigset(l_sigset_t *, sigset_t *); +void bsd_to_linux_sigset(sigset_t *, l_sigset_t *); + +/* signaling */ +#define LINUX_SIGHUP 1 +#define LINUX_SIGINT 2 +#define LINUX_SIGQUIT 3 +#define LINUX_SIGILL 4 +#define LINUX_SIGTRAP 5 +#define LINUX_SIGABRT 6 +#define LINUX_SIGIOT LINUX_SIGABRT +#define LINUX_SIGBUS 7 +#define LINUX_SIGFPE 8 +#define LINUX_SIGKILL 9 +#define LINUX_SIGUSR1 10 +#define LINUX_SIGSEGV 11 +#define LINUX_SIGUSR2 12 +#define LINUX_SIGPIPE 13 +#define LINUX_SIGALRM 14 +#define LINUX_SIGTERM 15 +#define LINUX_SIGSTKFLT 16 +#define LINUX_SIGCHLD 17 +#define LINUX_SIGCONT 18 +#define LINUX_SIGSTOP 19 +#define LINUX_SIGTSTP 20 +#define LINUX_SIGTTIN 21 +#define LINUX_SIGTTOU 22 +#define LINUX_SIGURG 23 +#define LINUX_SIGXCPU 24 +#define LINUX_SIGXFSZ 25 +#define LINUX_SIGVTALRM 26 +#define LINUX_SIGPROF 27 +#define LINUX_SIGWINCH 28 +#define LINUX_SIGIO 29 +#define LINUX_SIGPOLL LINUX_SIGIO +#define LINUX_SIGPWR 30 +#define LINUX_SIGSYS 31 +#define LINUX_SIGTBLSZ 31 +#define LINUX_SIGRTMIN 32 +#define LINUX_SIGRTMAX 64 + +#define LINUX_SIG_VALID(sig) ((sig) <= LINUX_SIGRTMAX && (sig) > 0) + +int linux_to_bsd_signal(int sig); +int bsd_to_linux_signal(int sig); + +#endif /* _LINUX_MI_H_ */ diff --git a/sys/compat/linux/linux_common.c b/sys/compat/linux/linux_common.c new file mode 100644 index 000000000000..b9e35311bdfe --- /dev/null +++ b/sys/compat/linux/linux_common.c @@ -0,0 +1,93 @@ +/*- + * Copyright (c) 2014 Vassilis Laganakos + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +FEATURE(linuxulator_v4l, "V4L ioctl wrapper support in the linuxulator"); +FEATURE(linuxulator_v4l2, "V4L2 ioctl wrapper support in the linuxulator"); + +MODULE_VERSION(linux_common, 1); + +SET_DECLARE(linux_device_handler_set, struct linux_device_handler); + +static eventhandler_tag linux_exec_tag; +static eventhandler_tag linux_thread_dtor_tag; +static eventhandler_tag linux_exit_tag; + + +static int +linux_common_modevent(module_t mod, int type, void *data) +{ + struct linux_device_handler **ldhp; + + switch(type) { + case MOD_LOAD: + linux_osd_jail_register(); + linux_exit_tag = EVENTHANDLER_REGISTER(process_exit, + linux_proc_exit, NULL, 1000); + linux_exec_tag = EVENTHANDLER_REGISTER(process_exec, + linux_proc_exec, NULL, 1000); + linux_thread_dtor_tag = EVENTHANDLER_REGISTER(thread_dtor, + linux_thread_dtor, NULL, EVENTHANDLER_PRI_ANY); + SET_FOREACH(ldhp, linux_device_handler_set) + linux_device_register_handler(*ldhp); + break; + case MOD_UNLOAD: + linux_osd_jail_deregister(); + SET_FOREACH(ldhp, linux_device_handler_set) + linux_device_unregister_handler(*ldhp); + EVENTHANDLER_DEREGISTER(process_exit, linux_exit_tag); + EVENTHANDLER_DEREGISTER(process_exec, linux_exec_tag); + EVENTHANDLER_DEREGISTER(thread_dtor, linux_thread_dtor_tag); + break; + default: + return (EOPNOTSUPP); + } + return (0); +} + +static moduledata_t linux_common_mod = { + "linuxcommon", + linux_common_modevent, + 0 +}; + +DECLARE_MODULE(linuxcommon, linux_common_mod, SI_SUB_EXEC, SI_ORDER_ANY); diff --git a/sys/compat/linux/linux_emul.c b/sys/compat/linux/linux_emul.c index ec19cd9e74b0..a28da8d5b5d3 100644 --- a/sys/compat/linux/linux_emul.c +++ b/sys/compat/linux/linux_emul.c @@ -1,5 +1,6 @@ /*- * Copyright (c) 2006 Roman Divacky + * Copyright (c) 2013 Dmitry Chagin * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -29,365 +30,225 @@ #include __FBSDID("$FreeBSD$"); -#include "opt_compat.h" - #include #include #include #include +#include #include #include #include -#include #include #include #include #include -#include -#include -#ifdef COMPAT_LINUX32 -#include -#include -#else -#include -#include -#endif - -#include #include -#include #include +#include -/** - * Special DTrace provider for the linuxulator. + +/* + * This returns reference to the thread emuldata entry (if found) * - * In this file we define the provider for the entire linuxulator. All - * modules (= files of the linuxulator) use it. - * - * We define a different name depending on the emulated bitsize, see - * ../..//linux{,32}/linux.h, e.g.: - * native bitsize = linuxulator - * amd64, 32bit emulation = linuxulator32 + * Hold PROC_LOCK when referencing emuldata from other threads. */ -LIN_SDT_PROVIDER_DEFINE(LINUX_DTRACE); - -/** - * Special DTrace module "locks", it covers some linuxulator internal - * locks. - */ -LIN_SDT_PROBE_DEFINE1(locks, emul_lock, locked, "struct mtx *"); -LIN_SDT_PROBE_DEFINE1(locks, emul_lock, unlock, "struct mtx *"); -LIN_SDT_PROBE_DEFINE1(locks, emul_shared_rlock, locked, "struct sx *"); -LIN_SDT_PROBE_DEFINE1(locks, emul_shared_rlock, unlock, "struct sx *"); -LIN_SDT_PROBE_DEFINE1(locks, emul_shared_wlock, locked, "struct sx *"); -LIN_SDT_PROBE_DEFINE1(locks, emul_shared_wlock, unlock, "struct sx *"); - -/** - * DTrace probes in this module. - */ -LIN_SDT_PROBE_DEFINE2(emul, em_find, entry, "struct proc *", "int"); -LIN_SDT_PROBE_DEFINE0(emul, em_find, return); -LIN_SDT_PROBE_DEFINE3(emul, proc_init, entry, "struct thread *", "pid_t", - "int"); -LIN_SDT_PROBE_DEFINE0(emul, proc_init, create_thread); -LIN_SDT_PROBE_DEFINE0(emul, proc_init, fork); -LIN_SDT_PROBE_DEFINE0(emul, proc_init, exec); -LIN_SDT_PROBE_DEFINE0(emul, proc_init, return); -LIN_SDT_PROBE_DEFINE1(emul, proc_exit, entry, "struct proc *"); -LIN_SDT_PROBE_DEFINE0(emul, proc_exit, futex_failed); -LIN_SDT_PROBE_DEFINE3(emul, proc_exit, reparent, "pid_t", "pid_t", - "struct proc *"); -LIN_SDT_PROBE_DEFINE1(emul, proc_exit, child_clear_tid_error, "int"); -LIN_SDT_PROBE_DEFINE0(emul, proc_exit, return); -LIN_SDT_PROBE_DEFINE2(emul, proc_exec, entry, "struct proc *", - "struct image_params *"); -LIN_SDT_PROBE_DEFINE0(emul, proc_exec, return); -LIN_SDT_PROBE_DEFINE0(emul, linux_schedtail, entry); -LIN_SDT_PROBE_DEFINE1(emul, linux_schedtail, copyout_error, "int"); -LIN_SDT_PROBE_DEFINE0(emul, linux_schedtail, return); -LIN_SDT_PROBE_DEFINE1(emul, linux_set_tid_address, entry, "int *"); -LIN_SDT_PROBE_DEFINE0(emul, linux_set_tid_address, return); -LIN_SDT_PROBE_DEFINE2(emul, linux_kill_threads, entry, "struct thread *", - "int"); -LIN_SDT_PROBE_DEFINE1(emul, linux_kill_threads, kill, "pid_t"); -LIN_SDT_PROBE_DEFINE0(emul, linux_kill_threads, return); - -struct sx emul_shared_lock; -struct mtx emul_lock; - -/* this returns locked reference to the emuldata entry (if found) */ struct linux_emuldata * -em_find(struct proc *p, int locked) +em_find(struct thread *td) { struct linux_emuldata *em; - LIN_SDT_PROBE2(emul, em_find, entry, p, locked); + em = td->td_emuldata; - if (locked == EMUL_DOLOCK) - EMUL_LOCK(&emul_lock); - - em = p->p_emuldata; - - if (em == NULL && locked == EMUL_DOLOCK) - EMUL_UNLOCK(&emul_lock); - - LIN_SDT_PROBE1(emul, em_find, return, em); return (em); } -int -linux_proc_init(struct thread *td, pid_t child, int flags) +/* + * This returns reference to the proc pemuldata entry (if found) + * + * Hold PROC_LOCK when referencing proc pemuldata from other threads. + * Hold LINUX_PEM_LOCK wher referencing pemuldata members. + */ +struct linux_pemuldata * +pem_find(struct proc *p) { - struct linux_emuldata *em, *p_em; - struct proc *p; + struct linux_pemuldata *pem; - LIN_SDT_PROBE3(emul, proc_init, entry, td, child, flags); + pem = p->p_emuldata; - if (child != 0) { - /* fork or create a thread */ - em = malloc(sizeof *em, M_LINUX, M_WAITOK | M_ZERO); - em->pid = child; - em->pdeath_signal = 0; - em->flags = 0; - em->robust_futexes = NULL; - if (flags & LINUX_CLONE_THREAD) { - /* handled later in the code */ - LIN_SDT_PROBE0(emul, proc_init, create_thread); - } else { - struct linux_emuldata_shared *s; - - LIN_SDT_PROBE0(emul, proc_init, fork); - - s = malloc(sizeof *s, M_LINUX, M_WAITOK | M_ZERO); - s->refs = 1; - s->group_pid = child; - - LIST_INIT(&s->threads); - em->shared = s; - } - } else { - /* exec */ - LIN_SDT_PROBE0(emul, proc_init, exec); - - /* lookup the old one */ - em = em_find(td->td_proc, EMUL_DOLOCK); - KASSERT(em != NULL, ("proc_init: emuldata not found in exec case.\n")); - } - - em->child_clear_tid = NULL; - em->child_set_tid = NULL; - - /* - * allocate the shared struct only in clone()/fork cases in the case - * of clone() td = calling proc and child = pid of the newly created - * proc - */ - if (child != 0) { - if (flags & LINUX_CLONE_THREAD) { - /* lookup the parent */ - /* - * we dont have to lock the p_em because - * its waiting for us in linux_clone so - * there is no chance of it changing the - * p_em->shared address - */ - p_em = em_find(td->td_proc, EMUL_DONTLOCK); - KASSERT(p_em != NULL, ("proc_init: parent emuldata not found for CLONE_THREAD\n")); - em->shared = p_em->shared; - EMUL_SHARED_WLOCK(&emul_shared_lock); - em->shared->refs++; - EMUL_SHARED_WUNLOCK(&emul_shared_lock); - } else { - /* - * handled earlier to avoid malloc(M_WAITOK) with - * rwlock held - */ - } - - EMUL_SHARED_WLOCK(&emul_shared_lock); - LIST_INSERT_HEAD(&em->shared->threads, em, threads); - EMUL_SHARED_WUNLOCK(&emul_shared_lock); - - p = pfind(child); - KASSERT(p != NULL, ("process not found in proc_init\n")); - p->p_emuldata = em; - PROC_UNLOCK(p); - } else - EMUL_UNLOCK(&emul_lock); - - LIN_SDT_PROBE0(emul, proc_init, return); - return (0); + return (pem); } void -linux_proc_exit(void *arg __unused, struct proc *p) +linux_proc_init(struct thread *td, struct thread *newtd, int flags) { struct linux_emuldata *em; - int error, shared_flags, shared_xstat; - struct thread *td = FIRST_THREAD_IN_PROC(p); - int *child_clear_tid; - struct proc *q, *nq; + struct linux_pemuldata *pem; + struct epoll_emuldata *emd; + struct proc *p; - if (__predict_true(p->p_sysent != &elf_linux_sysvec)) - return; + if (newtd != NULL) { + p = newtd->td_proc; - LIN_SDT_PROBE1(emul, proc_exit, entry, p); + /* non-exec call */ + em = malloc(sizeof(*em), M_TEMP, M_WAITOK | M_ZERO); + if (flags & LINUX_CLONE_THREAD) { + LINUX_CTR1(proc_init, "thread newtd(%d)", + newtd->td_tid); - release_futexes(p); + em->em_tid = newtd->td_tid; + } else { + LINUX_CTR1(proc_init, "fork newtd(%d)", p->p_pid); - /* find the emuldata */ - em = em_find(p, EMUL_DOLOCK); + em->em_tid = p->p_pid; - KASSERT(em != NULL, ("proc_exit: emuldata not found.\n")); - - /* reparent all procs that are not a thread leader to initproc */ - if (em->shared->group_pid != p->p_pid) { - LIN_SDT_PROBE3(emul, proc_exit, reparent, - em->shared->group_pid, p->p_pid, p); - - child_clear_tid = em->child_clear_tid; - EMUL_UNLOCK(&emul_lock); - sx_xlock(&proctree_lock); - wakeup(initproc); - PROC_LOCK(p); - proc_reparent(p, initproc); - p->p_sigparent = SIGCHLD; - PROC_UNLOCK(p); - sx_xunlock(&proctree_lock); + pem = malloc(sizeof(*pem), M_LINUX, M_WAITOK | M_ZERO); + sx_init(&pem->pem_sx, "lpemlk"); + p->p_emuldata = pem; + } + newtd->td_emuldata = em; } else { - child_clear_tid = em->child_clear_tid; - EMUL_UNLOCK(&emul_lock); - } + p = td->td_proc; - EMUL_SHARED_WLOCK(&emul_shared_lock); - shared_flags = em->shared->flags; - shared_xstat = em->shared->xstat; - LIST_REMOVE(em, threads); + /* exec */ + LINUX_CTR1(proc_init, "exec newtd(%d)", p->p_pid); - em->shared->refs--; - if (em->shared->refs == 0) { - EMUL_SHARED_WUNLOCK(&emul_shared_lock); - free(em->shared, M_LINUX); - } else - EMUL_SHARED_WUNLOCK(&emul_shared_lock); + /* lookup the old one */ + em = em_find(td); + KASSERT(em != NULL, ("proc_init: emuldata not found in exec case.\n")); - if ((shared_flags & EMUL_SHARED_HASXSTAT) != 0) - p->p_xstat = shared_xstat; + em->em_tid = p->p_pid; + em->flags = 0; + em->pdeath_signal = 0; + em->robust_futexes = NULL; + em->child_clear_tid = NULL; + em->child_set_tid = NULL; - if (child_clear_tid != NULL) { - struct linux_sys_futex_args cup; - int null = 0; + /* epoll should be destroyed in a case of exec. */ + pem = pem_find(p); + KASSERT(pem != NULL, ("proc_exit: proc emuldata not found.\n")); - error = copyout(&null, child_clear_tid, sizeof(null)); - if (error) { - LIN_SDT_PROBE1(emul, proc_exit, - child_clear_tid_error, error); - - free(em, M_LINUX); - - LIN_SDT_PROBE0(emul, proc_exit, return); - return; - } - - /* futexes stuff */ - cup.uaddr = child_clear_tid; - cup.op = LINUX_FUTEX_WAKE; - cup.val = 0x7fffffff; /* Awake everyone */ - cup.timeout = NULL; - cup.uaddr2 = NULL; - cup.val3 = 0; - error = linux_sys_futex(FIRST_THREAD_IN_PROC(p), &cup); - /* - * this cannot happen at the moment and if this happens it - * probably means there is a user space bug - */ - if (error) { - LIN_SDT_PROBE0(emul, proc_exit, futex_failed); - printf(LMSG("futex stuff in proc_exit failed.\n")); + if (pem->epoll != NULL) { + emd = pem->epoll; + pem->epoll = NULL; + free(emd, M_EPOLL); } } - /* clean the stuff up */ - free(em, M_LINUX); - - /* this is a little weird but rewritten from exit1() */ - sx_xlock(&proctree_lock); - q = LIST_FIRST(&p->p_children); - for (; q != NULL; q = nq) { - nq = LIST_NEXT(q, p_sibling); - if (q->p_flag & P_WEXIT) - continue; - if (__predict_false(q->p_sysent != &elf_linux_sysvec)) - continue; - em = em_find(q, EMUL_DOLOCK); - KASSERT(em != NULL, ("linux_reparent: emuldata not found: %i\n", q->p_pid)); - PROC_LOCK(q); - if ((q->p_flag & P_WEXIT) == 0 && em->pdeath_signal != 0) { - kern_psignal(q, em->pdeath_signal); - } - PROC_UNLOCK(q); - EMUL_UNLOCK(&emul_lock); - } - sx_xunlock(&proctree_lock); - - LIN_SDT_PROBE0(emul, proc_exit, return); } -/* - * This is used in a case of transition from FreeBSD binary execing to linux binary - * in this case we create linux emuldata proc entry with the pid of the currently running - * process. - */ void -linux_proc_exec(void *arg __unused, struct proc *p, struct image_params *imgp) +linux_proc_exit(void *arg __unused, struct proc *p) { - if (__predict_false(imgp->sysent == &elf_linux_sysvec)) { - LIN_SDT_PROBE2(emul, proc_exec, entry, p, imgp); + struct linux_pemuldata *pem; + struct epoll_emuldata *emd; + struct thread *td = curthread; + + if (__predict_false(SV_CURPROC_ABI() != SV_ABI_LINUX)) + return; + + LINUX_CTR3(proc_exit, "thread(%d) proc(%d) p %p", + td->td_tid, p->p_pid, p); + + pem = pem_find(p); + if (pem == NULL) + return; + (p->p_sysent->sv_thread_detach)(td); + + p->p_emuldata = NULL; + + if (pem->epoll != NULL) { + emd = pem->epoll; + pem->epoll = NULL; + free(emd, M_EPOLL); } - if (__predict_false(imgp->sysent == &elf_linux_sysvec - && p->p_sysent != &elf_linux_sysvec)) - linux_proc_init(FIRST_THREAD_IN_PROC(p), p->p_pid, 0); - if (__predict_false((p->p_sysent->sv_flags & SV_ABI_MASK) == - SV_ABI_LINUX)) - /* Kill threads regardless of imgp->sysent value */ - linux_kill_threads(FIRST_THREAD_IN_PROC(p), SIGKILL); - if (__predict_false(imgp->sysent != &elf_linux_sysvec - && p->p_sysent == &elf_linux_sysvec)) { - struct linux_emuldata *em; - /* - * XXX:There's a race because here we assign p->p_emuldata NULL - * but the process is still counted as linux one for a short - * time so some other process might reference it and try to - * access its p->p_emuldata and panicing on a NULL reference. - */ - em = em_find(p, EMUL_DONTLOCK); + sx_destroy(&pem->pem_sx); + free(pem, M_LINUX); +} - KASSERT(em != NULL, ("proc_exec: emuldata not found.\n")); +int +linux_common_execve(struct thread *td, struct image_args *eargs) +{ + struct linux_pemuldata *pem; + struct epoll_emuldata *emd; + struct vmspace *oldvmspace; + struct linux_emuldata *em; + struct proc *p; + int error; - EMUL_SHARED_WLOCK(&emul_shared_lock); - LIST_REMOVE(em, threads); + p = td->td_proc; + error = pre_execve(td, &oldvmspace); + if (error != 0) + return (error); + + error = kern_execve(td, eargs, NULL); + post_execve(td, error, oldvmspace); + if (error != 0) + return (error); + + /* + * In a case of transition from Linux binary execing to + * FreeBSD binary we destroy linux emuldata thread & proc entries. + */ + if (SV_CURPROC_ABI() != SV_ABI_LINUX) { PROC_LOCK(p); + em = em_find(td); + KASSERT(em != NULL, ("proc_exec: thread emuldata not found.\n")); + td->td_emuldata = NULL; + + pem = pem_find(p); + KASSERT(pem != NULL, ("proc_exec: proc pemuldata not found.\n")); p->p_emuldata = NULL; PROC_UNLOCK(p); - em->shared->refs--; - if (em->shared->refs == 0) { - EMUL_SHARED_WUNLOCK(&emul_shared_lock); - free(em->shared, M_LINUX); - } else - EMUL_SHARED_WUNLOCK(&emul_shared_lock); + if (pem->epoll != NULL) { + emd = pem->epoll; + pem->epoll = NULL; + free(emd, M_EPOLL); + } - free(em, M_LINUX); + free(em, M_TEMP); + free(pem, M_LINUX); } + return (0); +} - if (__predict_false(imgp->sysent == &elf_linux_sysvec)) { - LIN_SDT_PROBE0(emul, proc_exec, return); +void +linux_proc_exec(void *arg __unused, struct proc *p, struct image_params *imgp) +{ + struct thread *td = curthread; + + /* + * In a case of execing to linux binary we create linux + * emuldata thread entry. + */ + if (__predict_false((imgp->sysent->sv_flags & SV_ABI_MASK) == + SV_ABI_LINUX)) { + + if (SV_PROC_ABI(p) == SV_ABI_LINUX) + linux_proc_init(td, NULL, 0); + else + linux_proc_init(td, td, 0); } } +void +linux_thread_dtor(void *arg __unused, struct thread *td) +{ + struct linux_emuldata *em; + + em = em_find(td); + if (em == NULL) + return; + td->td_emuldata = NULL; + + LINUX_CTR1(thread_dtor, "thread(%d)", em->em_tid); + + free(em, M_TEMP); +} + void linux_schedtail(struct thread *td) { @@ -398,76 +259,15 @@ linux_schedtail(struct thread *td) p = td->td_proc; - LIN_SDT_PROBE1(emul, linux_schedtail, entry, p); - - /* find the emuldata */ - em = em_find(p, EMUL_DOLOCK); - - KASSERT(em != NULL, ("linux_schedtail: emuldata not found.\n")); + em = em_find(td); + KASSERT(em != NULL, ("linux_schedtail: thread emuldata not found.\n")); child_set_tid = em->child_set_tid; - EMUL_UNLOCK(&emul_lock); if (child_set_tid != NULL) { - error = copyout(&p->p_pid, (int *)child_set_tid, - sizeof(p->p_pid)); - - if (error != 0) { - LIN_SDT_PROBE1(emul, linux_schedtail, copyout_error, - error); - } - } - - LIN_SDT_PROBE0(emul, linux_schedtail, return); - - return; -} - -int -linux_set_tid_address(struct thread *td, struct linux_set_tid_address_args *args) -{ - struct linux_emuldata *em; - - LIN_SDT_PROBE1(emul, linux_set_tid_address, entry, args->tidptr); - - /* find the emuldata */ - em = em_find(td->td_proc, EMUL_DOLOCK); - - KASSERT(em != NULL, ("set_tid_address: emuldata not found.\n")); - - em->child_clear_tid = args->tidptr; - td->td_retval[0] = td->td_proc->p_pid; - - EMUL_UNLOCK(&emul_lock); - - LIN_SDT_PROBE0(emul, linux_set_tid_address, return); - return 0; -} - -void -linux_kill_threads(struct thread *td, int sig) -{ - struct linux_emuldata *em, *td_em, *tmp_em; - struct proc *sp; - - LIN_SDT_PROBE2(emul, linux_kill_threads, entry, td, sig); - - td_em = em_find(td->td_proc, EMUL_DONTLOCK); - - KASSERT(td_em != NULL, ("linux_kill_threads: emuldata not found.\n")); - - EMUL_SHARED_RLOCK(&emul_shared_lock); - LIST_FOREACH_SAFE(em, &td_em->shared->threads, threads, tmp_em) { - if (em->pid == td_em->pid) - continue; - - sp = pfind(em->pid); - if ((sp->p_flag & P_WEXIT) == 0) - kern_psignal(sp, sig); - PROC_UNLOCK(sp); - - LIN_SDT_PROBE1(emul, linux_kill_threads, kill, em->pid); - } - EMUL_SHARED_RUNLOCK(&emul_shared_lock); - - LIN_SDT_PROBE0(emul, linux_kill_threads, return); + error = copyout(&em->em_tid, child_set_tid, + sizeof(em->em_tid)); + LINUX_CTR4(schedtail, "thread(%d) %p stored %d error %d", + td->td_tid, child_set_tid, em->em_tid, error); + } else + LINUX_CTR1(schedtail, "thread(%d)", em->em_tid); } diff --git a/sys/compat/linux/linux_emul.h b/sys/compat/linux/linux_emul.h index f409a34da472..726209330614 100644 --- a/sys/compat/linux/linux_emul.h +++ b/sys/compat/linux/linux_emul.h @@ -1,5 +1,6 @@ /*- * Copyright (c) 2006 Roman Divacky + * Copyright (c) 2013 Dmitry Chagin * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -31,91 +32,48 @@ #ifndef _LINUX_EMUL_H_ #define _LINUX_EMUL_H_ -#define EMUL_SHARED_HASXSTAT 0x01 - -struct linux_emuldata_shared { - int refs; - int flags; - int xstat; - pid_t group_pid; - - LIST_HEAD(, linux_emuldata) threads; /* head of list of linux threads */ -}; - /* * modeled after similar structure in NetBSD * this will be extended as we need more functionality */ struct linux_emuldata { - pid_t pid; - int *child_set_tid; /* in clone(): Child's TID to set on clone */ int *child_clear_tid;/* in clone(): Child's TID to clear on exit */ - struct linux_emuldata_shared *shared; - int pdeath_signal; /* parent death signal */ - int flags; /* different emuldata flags */ + int flags; /* thread emuldata flags */ + int em_tid; /* thread id */ struct linux_robust_list_head *robust_futexes; - - LIST_ENTRY(linux_emuldata) threads; /* list of linux threads */ }; -struct linux_emuldata *em_find(struct proc *, int locked); +struct linux_emuldata *em_find(struct thread *); -/* - * DTrace probes for locks should be fired after locking and before releasing - * to prevent races (to provide data/function stability in dtrace, see the - * output of "dtrace -v ..." and the corresponding dtrace docs). - */ -#define EMUL_LOCK(l) do { \ - mtx_lock(l); \ - LIN_SDT_PROBE1(locks, emul_lock, \ - locked, l); \ - } while (0) -#define EMUL_UNLOCK(l) do { \ - LIN_SDT_PROBE1(locks, emul_lock, \ - unlock, l); \ - mtx_unlock(l); \ - } while (0) - -#define EMUL_SHARED_RLOCK(l) do { \ - sx_slock(l); \ - LIN_SDT_PROBE1(locks, emul_shared_rlock, \ - locked, l); \ - } while (0) -#define EMUL_SHARED_RUNLOCK(l) do { \ - LIN_SDT_PROBE1(locks, emul_shared_rlock, \ - unlock, l); \ - sx_sunlock(l); \ - } while (0) -#define EMUL_SHARED_WLOCK(l) do { \ - sx_xlock(l); \ - LIN_SDT_PROBE1(locks, emul_shared_wlock, \ - locked, l); \ - } while (0) -#define EMUL_SHARED_WUNLOCK(l) do { \ - LIN_SDT_PROBE1(locks, emul_shared_wlock, \ - unlock, l); \ - sx_xunlock(l); \ - } while (0) - -/* for em_find use */ -#define EMUL_DOLOCK 1 -#define EMUL_DONTLOCK 0 - -/* emuldata flags */ -#define LINUX_XDEPR_REQUEUEOP 0x00000001 /* uses deprecated - futex REQUEUE op*/ - -int linux_proc_init(struct thread *, pid_t, int); +void linux_proc_init(struct thread *, struct thread *, int); void linux_proc_exit(void *, struct proc *); void linux_schedtail(struct thread *); void linux_proc_exec(void *, struct proc *, struct image_params *); -void linux_kill_threads(struct thread *, int); +void linux_thread_dtor(void *arg __unused, struct thread *); +void linux_thread_detach(struct thread *); +int linux_common_execve(struct thread *, struct image_args *); -extern struct sx emul_shared_lock; -extern struct mtx emul_lock; +/* process emuldata flags */ +#define LINUX_XDEPR_REQUEUEOP 0x00000001 /* uses deprecated + futex REQUEUE op*/ +#define LINUX_XUNSUP_EPOLL 0x00000002 /* unsupported epoll events */ +#define LINUX_XUNSUP_FUTEXPIOP 0x00000004 /* uses unsupported pi futex */ + +struct linux_pemuldata { + uint32_t flags; /* process emuldata flags */ + struct sx pem_sx; /* lock for this struct */ + void *epoll; /* epoll data */ +}; + +#define LINUX_PEM_XLOCK(p) sx_xlock(&(p)->pem_sx) +#define LINUX_PEM_XUNLOCK(p) sx_xunlock(&(p)->pem_sx) +#define LINUX_PEM_SLOCK(p) sx_slock(&(p)->pem_sx) +#define LINUX_PEM_SUNLOCK(p) sx_sunlock(&(p)->pem_sx) + +struct linux_pemuldata *pem_find(struct proc *); #endif /* !_LINUX_EMUL_H_ */ diff --git a/sys/compat/linux/linux_event.c b/sys/compat/linux/linux_event.c new file mode 100644 index 000000000000..403158823f5a --- /dev/null +++ b/sys/compat/linux/linux_event.c @@ -0,0 +1,890 @@ +/*- + * Copyright (c) 2007 Roman Divacky + * Copyright (c) 2014 Dmitry Chagin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "opt_compat.h" + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef COMPAT_LINUX32 +#include +#include +#else +#include +#include +#endif + +#include +#include +#include +#include + +/* + * epoll defines 'struct epoll_event' with the field 'data' as 64 bits + * on all architectures. But on 32 bit architectures BSD 'struct kevent' only + * has 32 bit opaque pointer as 'udata' field. So we can't pass epoll supplied + * data verbatuim. Therefore we allocate 64-bit memory block to pass + * user supplied data for every file descriptor. + */ + +typedef uint64_t epoll_udata_t; + +struct epoll_emuldata { + uint32_t fdc; /* epoll udata max index */ + epoll_udata_t udata[1]; /* epoll user data vector */ +}; + +#define EPOLL_DEF_SZ 16 +#define EPOLL_SIZE(fdn) \ + (sizeof(struct epoll_emuldata)+(fdn) * sizeof(epoll_udata_t)) + +struct epoll_event { + uint32_t events; + epoll_udata_t data; +} +#if defined(__amd64__) +__attribute__((packed)) +#endif +; + +#define LINUX_MAX_EVENTS (INT_MAX / sizeof(struct epoll_event)) + +static void epoll_fd_install(struct thread *td, int fd, epoll_udata_t udata); +static int epoll_to_kevent(struct thread *td, struct file *epfp, + int fd, struct epoll_event *l_event, int *kev_flags, + struct kevent *kevent, int *nkevents); +static void kevent_to_epoll(struct kevent *kevent, struct epoll_event *l_event); +static int epoll_kev_copyout(void *arg, struct kevent *kevp, int count); +static int epoll_kev_copyin(void *arg, struct kevent *kevp, int count); +static int epoll_delete_event(struct thread *td, struct file *epfp, + int fd, int filter); +static int epoll_delete_all_events(struct thread *td, struct file *epfp, + int fd); + +struct epoll_copyin_args { + struct kevent *changelist; +}; + +struct epoll_copyout_args { + struct epoll_event *leventlist; + struct proc *p; + uint32_t count; + int error; +}; + +/* eventfd */ +typedef uint64_t eventfd_t; + +static fo_rdwr_t eventfd_read; +static fo_rdwr_t eventfd_write; +static fo_truncate_t eventfd_truncate; +static fo_ioctl_t eventfd_ioctl; +static fo_poll_t eventfd_poll; +static fo_kqfilter_t eventfd_kqfilter; +static fo_stat_t eventfd_stat; +static fo_close_t eventfd_close; +static fo_fill_kinfo_t eventfd_fill_kinfo; + +static struct fileops eventfdops = { + .fo_read = eventfd_read, + .fo_write = eventfd_write, + .fo_truncate = eventfd_truncate, + .fo_ioctl = eventfd_ioctl, + .fo_poll = eventfd_poll, + .fo_kqfilter = eventfd_kqfilter, + .fo_stat = eventfd_stat, + .fo_close = eventfd_close, + .fo_chmod = invfo_chmod, + .fo_chown = invfo_chown, + .fo_sendfile = invfo_sendfile, + .fo_fill_kinfo = eventfd_fill_kinfo, + .fo_flags = DFLAG_PASSABLE +}; + +static void filt_eventfddetach(struct knote *kn); +static int filt_eventfdread(struct knote *kn, long hint); +static int filt_eventfdwrite(struct knote *kn, long hint); + +static struct filterops eventfd_rfiltops = { + .f_isfd = 1, + .f_detach = filt_eventfddetach, + .f_event = filt_eventfdread +}; +static struct filterops eventfd_wfiltops = { + .f_isfd = 1, + .f_detach = filt_eventfddetach, + .f_event = filt_eventfdwrite +}; + +struct eventfd { + eventfd_t efd_count; + uint32_t efd_flags; + struct selinfo efd_sel; + struct mtx efd_lock; +}; + +static int eventfd_create(struct thread *td, uint32_t initval, int flags); + + +static void +epoll_fd_install(struct thread *td, int fd, epoll_udata_t udata) +{ + struct linux_pemuldata *pem; + struct epoll_emuldata *emd; + struct proc *p; + + p = td->td_proc; + + pem = pem_find(p); + KASSERT(pem != NULL, ("epoll proc emuldata not found.\n")); + + LINUX_PEM_XLOCK(pem); + if (pem->epoll == NULL) { + emd = malloc(EPOLL_SIZE(fd), M_EPOLL, M_WAITOK); + emd->fdc = fd; + pem->epoll = emd; + } else { + emd = pem->epoll; + if (fd > emd->fdc) { + emd = realloc(emd, EPOLL_SIZE(fd), M_EPOLL, M_WAITOK); + emd->fdc = fd; + pem->epoll = emd; + } + } + emd->udata[fd] = udata; + LINUX_PEM_XUNLOCK(pem); +} + +static int +epoll_create_common(struct thread *td, int flags) +{ + int error; + + error = kern_kqueue(td, flags); + if (error) + return (error); + + epoll_fd_install(td, EPOLL_DEF_SZ, 0); + + return (0); +} + +int +linux_epoll_create(struct thread *td, struct linux_epoll_create_args *args) +{ + + /* + * args->size is unused. Linux just tests it + * and then forgets it as well. + */ + if (args->size <= 0) + return (EINVAL); + + return (epoll_create_common(td, 0)); +} + +int +linux_epoll_create1(struct thread *td, struct linux_epoll_create1_args *args) +{ + int flags; + + if ((args->flags & ~(LINUX_O_CLOEXEC)) != 0) + return (EINVAL); + + flags = 0; + if ((args->flags & LINUX_O_CLOEXEC) != 0) + flags |= O_CLOEXEC; + + return (epoll_create_common(td, flags)); +} + +/* Structure converting function from epoll to kevent. */ +static int +epoll_to_kevent(struct thread *td, struct file *epfp, + int fd, struct epoll_event *l_event, int *kev_flags, + struct kevent *kevent, int *nkevents) +{ + uint32_t levents = l_event->events; + struct linux_pemuldata *pem; + struct proc *p; + + /* flags related to how event is registered */ + if ((levents & LINUX_EPOLLONESHOT) != 0) + *kev_flags |= EV_ONESHOT; + if ((levents & LINUX_EPOLLET) != 0) + *kev_flags |= EV_CLEAR; + if ((levents & LINUX_EPOLLERR) != 0) + *kev_flags |= EV_ERROR; + + /* flags related to what event is registered */ + if ((levents & LINUX_EPOLL_EVRD) != 0) { + EV_SET(kevent++, fd, EVFILT_READ, *kev_flags, 0, 0, 0); + ++(*nkevents); + } + if ((levents & LINUX_EPOLL_EVWR) != 0) { + EV_SET(kevent++, fd, EVFILT_WRITE, *kev_flags, 0, 0, 0); + ++(*nkevents); + } + + if ((levents & ~(LINUX_EPOLL_EVSUP)) != 0) { + p = td->td_proc; + + pem = pem_find(p); + KASSERT(pem != NULL, ("epoll proc emuldata not found.\n")); + KASSERT(pem->epoll != NULL, ("epoll proc epolldata not found.\n")); + + LINUX_PEM_XLOCK(pem); + if ((pem->flags & LINUX_XUNSUP_EPOLL) == 0) { + pem->flags |= LINUX_XUNSUP_EPOLL; + LINUX_PEM_XUNLOCK(pem); + linux_msg(td, "epoll_ctl unsupported flags: 0x%x\n", + levents); + } else + LINUX_PEM_XUNLOCK(pem); + return (EINVAL); + } + + return (0); +} + +/* + * Structure converting function from kevent to epoll. In a case + * this is called on error in registration we store the error in + * event->data and pick it up later in linux_epoll_ctl(). + */ +static void +kevent_to_epoll(struct kevent *kevent, struct epoll_event *l_event) +{ + + if ((kevent->flags & EV_ERROR) != 0) { + l_event->events = LINUX_EPOLLERR; + return; + } + + switch (kevent->filter) { + case EVFILT_READ: + l_event->events = LINUX_EPOLLIN|LINUX_EPOLLRDNORM|LINUX_EPOLLPRI; + break; + case EVFILT_WRITE: + l_event->events = LINUX_EPOLLOUT|LINUX_EPOLLWRNORM; + break; + } +} + +/* + * Copyout callback used by kevent. This converts kevent + * events to epoll events and copies them back to the + * userspace. This is also called on error on registering + * of the filter. + */ +static int +epoll_kev_copyout(void *arg, struct kevent *kevp, int count) +{ + struct epoll_copyout_args *args; + struct linux_pemuldata *pem; + struct epoll_emuldata *emd; + struct epoll_event *eep; + int error, fd, i; + + args = (struct epoll_copyout_args*) arg; + eep = malloc(sizeof(*eep) * count, M_EPOLL, M_WAITOK | M_ZERO); + + pem = pem_find(args->p); + KASSERT(pem != NULL, ("epoll proc emuldata not found.\n")); + LINUX_PEM_SLOCK(pem); + emd = pem->epoll; + KASSERT(emd != NULL, ("epoll proc epolldata not found.\n")); + + for (i = 0; i < count; i++) { + kevent_to_epoll(&kevp[i], &eep[i]); + + fd = kevp[i].ident; + KASSERT(fd <= emd->fdc, ("epoll user data vector" + " is too small.\n")); + eep[i].data = emd->udata[fd]; + } + LINUX_PEM_SUNLOCK(pem); + + error = copyout(eep, args->leventlist, count * sizeof(*eep)); + if (error == 0) { + args->leventlist += count; + args->count += count; + } else if (args->error == 0) + args->error = error; + + free(eep, M_EPOLL); + return (error); +} + +/* + * Copyin callback used by kevent. This copies already + * converted filters from kernel memory to the kevent + * internal kernel memory. Hence the memcpy instead of + * copyin. + */ +static int +epoll_kev_copyin(void *arg, struct kevent *kevp, int count) +{ + struct epoll_copyin_args *args; + + args = (struct epoll_copyin_args*) arg; + + memcpy(kevp, args->changelist, count * sizeof(*kevp)); + args->changelist += count; + + return (0); +} + +/* + * Load epoll filter, convert it to kevent filter + * and load it into kevent subsystem. + */ +int +linux_epoll_ctl(struct thread *td, struct linux_epoll_ctl_args *args) +{ + struct file *epfp, *fp; + struct epoll_copyin_args ciargs; + struct kevent kev[2]; + struct kevent_copyops k_ops = { &ciargs, + NULL, + epoll_kev_copyin}; + struct epoll_event le; + cap_rights_t rights; + int kev_flags; + int nchanges = 0; + int error; + + if (args->op != LINUX_EPOLL_CTL_DEL) { + error = copyin(args->event, &le, sizeof(le)); + if (error != 0) + return (error); + } + + error = fget(td, args->epfd, + cap_rights_init(&rights, CAP_KQUEUE_CHANGE), &epfp); + if (error != 0) + return (error); + if (epfp->f_type != DTYPE_KQUEUE) + goto leave1; + + /* Protect user data vector from incorrectly supplied fd. */ + error = fget(td, args->fd, cap_rights_init(&rights, CAP_POLL_EVENT), &fp); + if (error != 0) + goto leave1; + + /* Linux disallows spying on himself */ + if (epfp == fp) { + error = EINVAL; + goto leave0; + } + + ciargs.changelist = kev; + + switch (args->op) { + case LINUX_EPOLL_CTL_MOD: + /* + * We don't memorize which events were set for this FD + * on this level, so just delete all we could have set: + * EVFILT_READ and EVFILT_WRITE, ignoring any errors + */ + error = epoll_delete_all_events(td, epfp, args->fd); + if (error) + goto leave0; + /* FALLTHROUGH */ + + case LINUX_EPOLL_CTL_ADD: + kev_flags = EV_ADD | EV_ENABLE; + break; + + case LINUX_EPOLL_CTL_DEL: + /* CTL_DEL means unregister this fd with this epoll */ + error = epoll_delete_all_events(td, epfp, args->fd); + goto leave0; + + default: + error = EINVAL; + goto leave0; + } + + error = epoll_to_kevent(td, epfp, args->fd, &le, &kev_flags, + kev, &nchanges); + if (error) + goto leave0; + + epoll_fd_install(td, args->fd, le.data); + + error = kern_kevent_fp(td, epfp, nchanges, 0, &k_ops, NULL); + +leave0: + fdrop(fp, td); + +leave1: + fdrop(epfp, td); + return (error); +} + +/* + * Wait for a filter to be triggered on the epoll file descriptor. + */ +static int +linux_epoll_wait_common(struct thread *td, int epfd, struct epoll_event *events, + int maxevents, int timeout, sigset_t *uset) +{ + struct file *epfp; + struct timespec ts, *tsp; + cap_rights_t rights; + struct epoll_copyout_args coargs; + struct kevent_copyops k_ops = { &coargs, + epoll_kev_copyout, + NULL}; + int error; + + if (maxevents <= 0 || maxevents > LINUX_MAX_EVENTS) + return (EINVAL); + + if (uset != NULL) { + error = kern_sigprocmask(td, SIG_SETMASK, uset, + &td->td_oldsigmask, 0); + if (error != 0) + return (error); + td->td_pflags |= TDP_OLDMASK; + /* + * Make sure that ast() is called on return to + * usermode and TDP_OLDMASK is cleared, restoring old + * sigmask. + */ + thread_lock(td); + td->td_flags |= TDF_ASTPENDING; + thread_unlock(td); + } + + error = fget(td, epfd, + cap_rights_init(&rights, CAP_KQUEUE_EVENT), &epfp); + if (error != 0) + return (error); + + coargs.leventlist = events; + coargs.p = td->td_proc; + coargs.count = 0; + coargs.error = 0; + + if (timeout != -1) { + if (timeout < 0) { + error = EINVAL; + goto leave; + } + /* Convert from milliseconds to timespec. */ + ts.tv_sec = timeout / 1000; + ts.tv_nsec = (timeout % 1000) * 1000000; + tsp = &ts; + } else { + tsp = NULL; + } + + error = kern_kevent_fp(td, epfp, 0, maxevents, &k_ops, tsp); + if (error == 0 && coargs.error != 0) + error = coargs.error; + + /* + * kern_kevent might return ENOMEM which is not expected from epoll_wait. + * Maybe we should translate that but I don't think it matters at all. + */ + if (error == 0) + td->td_retval[0] = coargs.count; +leave: + fdrop(epfp, td); + return (error); +} + +int +linux_epoll_wait(struct thread *td, struct linux_epoll_wait_args *args) +{ + + return (linux_epoll_wait_common(td, args->epfd, args->events, + args->maxevents, args->timeout, NULL)); +} + +int +linux_epoll_pwait(struct thread *td, struct linux_epoll_pwait_args *args) +{ + sigset_t mask, *pmask; + l_sigset_t lmask; + int error; + + if (args->mask != NULL) { + error = copyin(args->mask, &lmask, sizeof(l_sigset_t)); + if (error != 0) + return (error); + linux_to_bsd_sigset(&lmask, &mask); + pmask = &mask; + } else + pmask = NULL; + return (linux_epoll_wait_common(td, args->epfd, args->events, + args->maxevents, args->timeout, pmask)); +} + +static int +epoll_delete_event(struct thread *td, struct file *epfp, int fd, int filter) +{ + struct epoll_copyin_args ciargs; + struct kevent kev; + struct kevent_copyops k_ops = { &ciargs, + NULL, + epoll_kev_copyin}; + int error; + + ciargs.changelist = &kev; + EV_SET(&kev, fd, filter, EV_DELETE | EV_DISABLE, 0, 0, 0); + + error = kern_kevent_fp(td, epfp, 1, 0, &k_ops, NULL); + + /* + * here we ignore ENONT, because we don't keep track of events here + */ + if (error == ENOENT) + error = 0; + return (error); +} + +static int +epoll_delete_all_events(struct thread *td, struct file *epfp, int fd) +{ + int error1, error2; + + error1 = epoll_delete_event(td, epfp, fd, EVFILT_READ); + error2 = epoll_delete_event(td, epfp, fd, EVFILT_WRITE); + + /* report any errors we got */ + return (error1 == 0 ? error2 : error1); +} + +static int +eventfd_create(struct thread *td, uint32_t initval, int flags) +{ + struct filedesc *fdp; + struct eventfd *efd; + struct file *fp; + int fflags, fd, error; + + fflags = 0; + if ((flags & LINUX_O_CLOEXEC) != 0) + fflags |= O_CLOEXEC; + + fdp = td->td_proc->p_fd; + error = falloc(td, &fp, &fd, fflags); + if (error) + return (error); + + efd = malloc(sizeof(*efd), M_EPOLL, M_WAITOK | M_ZERO); + efd->efd_flags = flags; + efd->efd_count = initval; + mtx_init(&efd->efd_lock, "eventfd", NULL, MTX_DEF); + + knlist_init_mtx(&efd->efd_sel.si_note, &efd->efd_lock); + + fflags = FREAD | FWRITE; + if ((flags & LINUX_O_NONBLOCK) != 0) + fflags |= FNONBLOCK; + + finit(fp, fflags, DTYPE_LINUXEFD, efd, &eventfdops); + fdrop(fp, td); + + td->td_retval[0] = fd; + return (error); +} + +int +linux_eventfd(struct thread *td, struct linux_eventfd_args *args) +{ + + return (eventfd_create(td, args->initval, 0)); +} + +int +linux_eventfd2(struct thread *td, struct linux_eventfd2_args *args) +{ + + if ((args->flags & ~(LINUX_O_CLOEXEC|LINUX_O_NONBLOCK|LINUX_EFD_SEMAPHORE)) != 0) + return (EINVAL); + + return (eventfd_create(td, args->initval, args->flags)); +} + +static int +eventfd_close(struct file *fp, struct thread *td) +{ + struct eventfd *efd; + + efd = fp->f_data; + if (fp->f_type != DTYPE_LINUXEFD || efd == NULL) + return (EBADF); + + seldrain(&efd->efd_sel); + knlist_destroy(&efd->efd_sel.si_note); + + fp->f_ops = &badfileops; + mtx_destroy(&efd->efd_lock); + free(efd, M_EPOLL); + + return (0); +} + +static int +eventfd_read(struct file *fp, struct uio *uio, struct ucred *active_cred, + int flags, struct thread *td) +{ + struct eventfd *efd; + eventfd_t count; + int error; + + efd = fp->f_data; + if (fp->f_type != DTYPE_LINUXEFD || efd == NULL) + return (EBADF); + + if (uio->uio_resid < sizeof(eventfd_t)) + return (EINVAL); + + error = 0; + mtx_lock(&efd->efd_lock); +retry: + if (efd->efd_count == 0) { + if ((efd->efd_flags & LINUX_O_NONBLOCK) != 0) { + mtx_unlock(&efd->efd_lock); + return (EAGAIN); + } + error = mtx_sleep(&efd->efd_count, &efd->efd_lock, PCATCH, "lefdrd", 0); + if (error == 0) + goto retry; + } + if (error == 0) { + if ((efd->efd_flags & LINUX_EFD_SEMAPHORE) != 0) { + count = 1; + --efd->efd_count; + } else { + count = efd->efd_count; + efd->efd_count = 0; + } + KNOTE_LOCKED(&efd->efd_sel.si_note, 0); + selwakeup(&efd->efd_sel); + wakeup(&efd->efd_count); + mtx_unlock(&efd->efd_lock); + error = uiomove(&count, sizeof(eventfd_t), uio); + } else + mtx_unlock(&efd->efd_lock); + + return (error); +} + +static int +eventfd_write(struct file *fp, struct uio *uio, struct ucred *active_cred, + int flags, struct thread *td) +{ + struct eventfd *efd; + eventfd_t count; + int error; + + efd = fp->f_data; + if (fp->f_type != DTYPE_LINUXEFD || efd == NULL) + return (EBADF); + + if (uio->uio_resid < sizeof(eventfd_t)) + return (EINVAL); + + error = uiomove(&count, sizeof(eventfd_t), uio); + if (error) + return (error); + if (count == UINT64_MAX) + return (EINVAL); + + mtx_lock(&efd->efd_lock); +retry: + if (UINT64_MAX - efd->efd_count <= count) { + if ((efd->efd_flags & LINUX_O_NONBLOCK) != 0) { + mtx_unlock(&efd->efd_lock); + return (EAGAIN); + } + error = mtx_sleep(&efd->efd_count, &efd->efd_lock, + PCATCH, "lefdwr", 0); + if (error == 0) + goto retry; + } + if (error == 0) { + efd->efd_count += count; + KNOTE_LOCKED(&efd->efd_sel.si_note, 0); + selwakeup(&efd->efd_sel); + wakeup(&efd->efd_count); + } + mtx_unlock(&efd->efd_lock); + + return (error); +} + +static int +eventfd_poll(struct file *fp, int events, struct ucred *active_cred, + struct thread *td) +{ + struct eventfd *efd; + int revents = 0; + + efd = fp->f_data; + if (fp->f_type != DTYPE_LINUXEFD || efd == NULL) + return (POLLERR); + + mtx_lock(&efd->efd_lock); + if ((events & (POLLIN|POLLRDNORM)) && efd->efd_count > 0) + revents |= events & (POLLIN|POLLRDNORM); + if ((events & (POLLOUT|POLLWRNORM)) && UINT64_MAX - 1 > efd->efd_count) + revents |= events & (POLLOUT|POLLWRNORM); + if (revents == 0) + selrecord(td, &efd->efd_sel); + mtx_unlock(&efd->efd_lock); + + return (revents); +} + +/*ARGSUSED*/ +static int +eventfd_kqfilter(struct file *fp, struct knote *kn) +{ + struct eventfd *efd; + + efd = fp->f_data; + if (fp->f_type != DTYPE_LINUXEFD || efd == NULL) + return (EINVAL); + + mtx_lock(&efd->efd_lock); + switch (kn->kn_filter) { + case EVFILT_READ: + kn->kn_fop = &eventfd_rfiltops; + break; + case EVFILT_WRITE: + kn->kn_fop = &eventfd_wfiltops; + break; + default: + mtx_unlock(&efd->efd_lock); + return (EINVAL); + } + + kn->kn_hook = efd; + knlist_add(&efd->efd_sel.si_note, kn, 1); + mtx_unlock(&efd->efd_lock); + + return (0); +} + +static void +filt_eventfddetach(struct knote *kn) +{ + struct eventfd *efd = kn->kn_hook; + + mtx_lock(&efd->efd_lock); + knlist_remove(&efd->efd_sel.si_note, kn, 1); + mtx_unlock(&efd->efd_lock); +} + +/*ARGSUSED*/ +static int +filt_eventfdread(struct knote *kn, long hint) +{ + struct eventfd *efd = kn->kn_hook; + int ret; + + mtx_assert(&efd->efd_lock, MA_OWNED); + ret = (efd->efd_count > 0); + + return (ret); +} + +/*ARGSUSED*/ +static int +filt_eventfdwrite(struct knote *kn, long hint) +{ + struct eventfd *efd = kn->kn_hook; + int ret; + + mtx_assert(&efd->efd_lock, MA_OWNED); + ret = (UINT64_MAX - 1 > efd->efd_count); + + return (ret); +} + +/*ARGSUSED*/ +static int +eventfd_truncate(struct file *fp, off_t length, struct ucred *active_cred, + struct thread *td) +{ + + return (ENXIO); +} + +/*ARGSUSED*/ +static int +eventfd_ioctl(struct file *fp, u_long cmd, void *data, + struct ucred *active_cred, struct thread *td) +{ + + return (ENXIO); +} + +/*ARGSUSED*/ +static int +eventfd_stat(struct file *fp, struct stat *st, struct ucred *active_cred, + struct thread *td) +{ + + return (ENXIO); +} + +/*ARGSUSED*/ +static int +eventfd_fill_kinfo(struct file *fp, struct kinfo_file *kif, struct filedesc *fdp) +{ + + kif->kf_type = KF_TYPE_UNKNOWN; + return (0); +} diff --git a/sys/compat/linux/linux_event.h b/sys/compat/linux/linux_event.h new file mode 100644 index 000000000000..0c030adcf8fd --- /dev/null +++ b/sys/compat/linux/linux_event.h @@ -0,0 +1,60 @@ +/*- + * Copyright (c) 2007 Roman Divacky + * Copyright (c) 2014 Dmitry Chagin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _LINUX_EVENT_H_ +#define _LINUX_EVENT_H_ + +#define LINUX_EPOLLIN 0x001 +#define LINUX_EPOLLPRI 0x002 +#define LINUX_EPOLLOUT 0x004 +#define LINUX_EPOLLRDNORM 0x040 +#define LINUX_EPOLLRDBAND 0x080 +#define LINUX_EPOLLWRNORM 0x100 +#define LINUX_EPOLLWRBAND 0x200 +#define LINUX_EPOLLMSG 0x400 +#define LINUX_EPOLLERR 0x008 +#define LINUX_EPOLLHUP 0x010 +#define LINUX_EPOLLRDHUP 0x2000 +#define LINUX_EPOLLWAKEUP 1u<<29 +#define LINUX_EPOLLONESHOT 1u<<30 +#define LINUX_EPOLLET 1u<<31 + +#define LINUX_EPOLL_EVRD (LINUX_EPOLLIN|LINUX_EPOLLRDNORM \ + |LINUX_EPOLLHUP|LINUX_EPOLLERR|LINUX_EPOLLPRI) +#define LINUX_EPOLL_EVWR (LINUX_EPOLLOUT|LINUX_EPOLLWRNORM) +#define LINUX_EPOLL_EVSUP (LINUX_EPOLLET|LINUX_EPOLLONESHOT \ + |LINUX_EPOLL_EVRD|LINUX_EPOLL_EVWR) + +#define LINUX_EPOLL_CTL_ADD 1 +#define LINUX_EPOLL_CTL_DEL 2 +#define LINUX_EPOLL_CTL_MOD 3 + +#define LINUX_EFD_SEMAPHORE (1 << 0) + +#endif /* !_LINUX_EVENT_H_ */ diff --git a/sys/compat/linux/linux_file.c b/sys/compat/linux/linux_file.c index 78a65d0833bc..9251a20abad1 100644 --- a/sys/compat/linux/linux_file.c +++ b/sys/compat/linux/linux_file.c @@ -235,6 +235,7 @@ linux_lseek(struct thread *td, struct linux_lseek_args *args) return error; } +#if defined(__i386__) || (defined(__amd64__) && defined(COMPAT_LINUX32)) int linux_llseek(struct thread *td, struct linux_llseek_args *args) { @@ -273,6 +274,7 @@ linux_readdir(struct thread *td, struct linux_readdir_args *args) lda.count = 1; return linux_getdents(td, &lda); } +#endif /* __i386__ || (__amd64__ && COMPAT_LINUX32) */ /* * Note that linux_getdents(2) and linux_getdents64(2) have the same @@ -367,8 +369,8 @@ getdents_common(struct thread *td, struct linux_getdents64_args *args, buflen = max(LINUX_DIRBLKSIZ, nbytes); buflen = min(buflen, MAXBSIZE); - buf = malloc(buflen, M_TEMP, M_WAITOK); - lbuf = malloc(LINUX_MAXRECLEN, M_TEMP, M_WAITOK | M_ZERO); + buf = malloc(buflen, M_LINUX, M_WAITOK); + lbuf = malloc(LINUX_MAXRECLEN, M_LINUX, M_WAITOK | M_ZERO); vn_lock(vp, LK_SHARED | LK_RETRY); aiov.iov_base = buf; @@ -519,8 +521,8 @@ getdents_common(struct thread *td, struct linux_getdents64_args *args, VOP_UNLOCK(vp, 0); foffset_unlock(fp, off, 0); fdrop(fp, td); - free(buf, M_TEMP); - free(lbuf, M_TEMP); + free(buf, M_LINUX); + free(lbuf, M_LINUX); return (error); } @@ -579,10 +581,8 @@ int linux_faccessat(struct thread *td, struct linux_faccessat_args *args) { char *path; - int error, dfd, flag; + int error, dfd; - if (args->flag & ~LINUX_AT_EACCESS) - return (EINVAL); /* linux convention */ if (args->amode & ~(F_OK | X_OK | W_OK | R_OK)) return (EINVAL); @@ -595,8 +595,7 @@ linux_faccessat(struct thread *td, struct linux_faccessat_args *args) printf(ARGS(access, "%s, %d"), path, args->amode); #endif - flag = (args->flag & LINUX_AT_EACCESS) == 0 ? 0 : AT_EACCESS; - error = kern_accessat(td, dfd, path, UIO_SYSSPACE, flag, args->amode); + error = kern_accessat(td, dfd, path, UIO_SYSSPACE, 0, args->amode); LFREEPATH(path); return (error); @@ -924,6 +923,7 @@ linux_truncate(struct thread *td, struct linux_truncate_args *args) return (error); } +#if defined(__i386__) || (defined(__amd64__) && defined(COMPAT_LINUX32)) int linux_truncate64(struct thread *td, struct linux_truncate64_args *args) { @@ -941,6 +941,8 @@ linux_truncate64(struct thread *td, struct linux_truncate64_args *args) LFREEPATH(path); return (error); } +#endif /* __i386__ || (__amd64__ && COMPAT_LINUX32) */ + int linux_ftruncate(struct thread *td, struct linux_ftruncate_args *args) { @@ -1129,6 +1131,7 @@ linux_mount(struct thread *td, struct linux_mount_args *args) return (error); } +#if defined(__i386__) || (defined(__amd64__) && defined(COMPAT_LINUX32)) int linux_oldumount(struct thread *td, struct linux_oldumount_args *args) { @@ -1138,6 +1141,7 @@ linux_oldumount(struct thread *td, struct linux_oldumount_args *args) args2.flags = 0; return (linux_umount(td, &args2)); } +#endif /* __i386__ || (__amd64__ && COMPAT_LINUX32) */ int linux_umount(struct thread *td, struct linux_umount_args *args) @@ -1268,7 +1272,7 @@ bsd_to_linux_flock64(struct flock *bsd_flock, struct l_flock64 *linux_flock) #endif /* __i386__ || (__amd64__ && COMPAT_LINUX32) */ static int -fcntl_common(struct thread *td, struct linux_fcntl64_args *args) +fcntl_common(struct thread *td, struct linux_fcntl_args *args) { struct l_flock linux_flock; struct flock bsd_flock; @@ -1386,6 +1390,9 @@ fcntl_common(struct thread *td, struct linux_fcntl64_args *args) fdrop(fp, td); return (kern_fcntl(td, args->fd, F_SETOWN, args->arg)); + + case LINUX_F_DUPFD_CLOEXEC: + return (kern_fcntl(td, args->fd, F_DUPFD_CLOEXEC, args->arg)); } return (EINVAL); @@ -1394,17 +1401,13 @@ fcntl_common(struct thread *td, struct linux_fcntl64_args *args) int linux_fcntl(struct thread *td, struct linux_fcntl_args *args) { - struct linux_fcntl64_args args64; #ifdef DEBUG if (ldebug(fcntl)) printf(ARGS(fcntl, "%d, %08x, *"), args->fd, args->cmd); #endif - args64.fd = args->fd; - args64.cmd = args->cmd; - args64.arg = args->arg; - return (fcntl_common(td, &args64)); + return (fcntl_common(td, args)); } #if defined(__i386__) || (defined(__amd64__) && defined(COMPAT_LINUX32)) @@ -1413,6 +1416,7 @@ linux_fcntl64(struct thread *td, struct linux_fcntl64_args *args) { struct l_flock64 linux_flock; struct flock bsd_flock; + struct linux_fcntl_args fcntl_args; int error; #ifdef DEBUG @@ -1453,7 +1457,10 @@ linux_fcntl64(struct thread *td, struct linux_fcntl64_args *args) (intptr_t)&bsd_flock)); } - return (fcntl_common(td, args)); + fcntl_args.fd = args->fd; + fcntl_args.cmd = args->cmd; + fcntl_args.arg = args->arg; + return (fcntl_common(td, &fcntl_args)); } #endif /* __i386__ || (__amd64__ && COMPAT_LINUX32) */ @@ -1551,6 +1558,7 @@ linux_fadvise64(struct thread *td, struct linux_fadvise64_args *args) advice)); } +#if defined(__i386__) || (defined(__amd64__) && defined(COMPAT_LINUX32)) int linux_fadvise64_64(struct thread *td, struct linux_fadvise64_64_args *args) { @@ -1562,6 +1570,7 @@ linux_fadvise64_64(struct thread *td, struct linux_fadvise64_64_args *args) return (kern_posix_fadvise(td, args->fd, args->offset, args->len, advice)); } +#endif /* __i386__ || (__amd64__ && COMPAT_LINUX32) */ int linux_pipe(struct thread *td, struct linux_pipe_args *args) @@ -1608,3 +1617,37 @@ linux_pipe2(struct thread *td, struct linux_pipe2_args *args) /* XXX: Close descriptors on error. */ return (copyout(fildes, args->pipefds, sizeof(fildes))); } + +int +linux_dup3(struct thread *td, struct linux_dup3_args *args) +{ + int cmd; + intptr_t newfd; + + if (args->oldfd == args->newfd) + return (EINVAL); + if ((args->flags & ~LINUX_O_CLOEXEC) != 0) + return (EINVAL); + if (args->flags & LINUX_O_CLOEXEC) + cmd = F_DUP2FD_CLOEXEC; + else + cmd = F_DUP2FD; + + newfd = args->newfd; + return (kern_fcntl(td, args->oldfd, cmd, newfd)); +} + +int +linux_fallocate(struct thread *td, struct linux_fallocate_args *args) +{ + + /* + * We emulate only posix_fallocate system call for which + * mode should be 0. + */ + if (args->mode != 0) + return (ENOSYS); + + return (kern_posix_fallocate(td, args->fd, args->offset, + args->len)); +} diff --git a/sys/compat/linux/linux_file.h b/sys/compat/linux/linux_file.h index 2d3106f3403f..f27d5b41cc8d 100644 --- a/sys/compat/linux/linux_file.h +++ b/sys/compat/linux/linux_file.h @@ -54,4 +54,75 @@ #define LINUX_MS_NOEXEC 0x0008 #define LINUX_MS_REMOUNT 0x0020 +/* + * common open/fcntl flags + */ +#define LINUX_O_RDONLY 00000000 +#define LINUX_O_WRONLY 00000001 +#define LINUX_O_RDWR 00000002 +#define LINUX_O_ACCMODE 00000003 +#define LINUX_O_CREAT 00000100 +#define LINUX_O_EXCL 00000200 +#define LINUX_O_NOCTTY 00000400 +#define LINUX_O_TRUNC 00001000 +#define LINUX_O_APPEND 00002000 +#define LINUX_O_NONBLOCK 00004000 +#define LINUX_O_NDELAY LINUX_O_NONBLOCK +#define LINUX_O_SYNC 00010000 +#define LINUX_FASYNC 00020000 +#define LINUX_O_DIRECT 00040000 /* Direct disk access hint */ +#define LINUX_O_LARGEFILE 00100000 +#define LINUX_O_DIRECTORY 00200000 /* Must be a directory */ +#define LINUX_O_NOFOLLOW 00400000 /* Do not follow links */ +#define LINUX_O_NOATIME 01000000 +#define LINUX_O_CLOEXEC 02000000 + +#define LINUX_F_DUPFD 0 +#define LINUX_F_GETFD 1 +#define LINUX_F_SETFD 2 +#define LINUX_F_GETFL 3 +#define LINUX_F_SETFL 4 +#ifndef LINUX_F_GETLK +#define LINUX_F_GETLK 5 +#define LINUX_F_SETLK 6 +#define LINUX_F_SETLKW 7 +#endif +#ifndef LINUX_F_SETOWN +#define LINUX_F_SETOWN 8 +#define LINUX_F_GETOWN 9 +#endif +#ifndef LINUX_F_SETSIG +#define LINUX_F_SETSIG 10 +#define LINUX_F_GETSIG 11 +#endif +#ifndef LINUX_F_SETOWN_EX +#define LINUX_F_SETOWN_EX 15 +#define LINUX_F_GETOWN_EX 16 +#define LINUX_F_GETOWNER_UIDS 17 +#endif + +#define LINUX_F_SPECIFIC_BASE 1024 + +#define LINUX_F_SETLEASE (LINUX_F_SPECIFIC_BASE + 0) +#define LINUX_F_GETLEASE (LINUX_F_SPECIFIC_BASE + 1) +#define LINUX_F_CANCELLK (LINUX_F_SPECIFIC_BASE + 5) +#define LINUX_F_DUPFD_CLOEXEC (LINUX_F_SPECIFIC_BASE + 6) +#define LINUX_F_NOTIFY (LINUX_F_SPECIFIC_BASE + 2) +#define LINUX_F_SETPIPE_SZ (LINUX_F_SPECIFIC_BASE + 7) +#define LINUX_F_GETPIPE_SZ (LINUX_F_SPECIFIC_BASE + 8) + +#define LINUX_F_GETLKP 36 +#define LINUX_F_SETLKP 37 +#define LINUX_F_SETLKPW 38 + +#define LINUX_F_OWNER_TID 0 +#define LINUX_F_OWNER_PID 1 +#define LINUX_F_OWNER_PGRP 2 + +#ifndef LINUX_F_RDLCK +#define LINUX_F_RDLCK 0 +#define LINUX_F_WRLCK 1 +#define LINUX_F_UNLCK 2 +#endif + #endif /* !_LINUX_FILE_H_ */ diff --git a/sys/compat/linux/linux_fork.c b/sys/compat/linux/linux_fork.c index 316cf2a61ebb..0fd47fdd26fb 100644 --- a/sys/compat/linux/linux_fork.c +++ b/sys/compat/linux/linux_fork.c @@ -34,13 +34,20 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include #include #include +#include #include -#include +#include #include #include +#include + +#include +#include +#include #ifdef COMPAT_LINUX32 #include @@ -49,18 +56,10 @@ __FBSDID("$FreeBSD$"); #include #include #endif -#include -#include #include +#include #include - -/* DTrace init */ -LIN_SDT_PROVIDER_DECLARE(LINUX_DTRACE); - -/* Linuxulator-global DTrace probes */ -LIN_SDT_PROBE_DECLARE(locks, emul_lock, locked); -LIN_SDT_PROBE_DECLARE(locks, emul_lock, unlock); - +#include int linux_fork(struct thread *td, struct linux_fork_args *args) @@ -78,15 +77,12 @@ linux_fork(struct thread *td, struct linux_fork_args *args) != 0) return (error); - td->td_retval[0] = p2->p_pid; - td->td_retval[1] = 0; - - error = linux_proc_init(td, td->td_retval[0], 0); - if (error) - return (error); - td2 = FIRST_THREAD_IN_PROC(p2); + linux_proc_init(td, td2, 0); + + td->td_retval[0] = p2->p_pid; + /* * Make this runnable after we are finished with it. */ @@ -115,17 +111,16 @@ linux_vfork(struct thread *td, struct linux_vfork_args *args) NULL, 0)) != 0) return (error); - td->td_retval[0] = p2->p_pid; - error = linux_proc_init(td, td->td_retval[0], 0); - if (error) - return (error); + td2 = FIRST_THREAD_IN_PROC(p2); + + linux_proc_init(td, td2, 0); PROC_LOCK(p2); p2->p_flag |= P_PPWAIT; PROC_UNLOCK(p2); - td2 = FIRST_THREAD_IN_PROC(p2); + td->td_retval[0] = p2->p_pid; /* * Make this runnable after we are finished with it. @@ -144,8 +139,8 @@ linux_vfork(struct thread *td, struct linux_vfork_args *args) return (0); } -int -linux_clone(struct thread *td, struct linux_clone_args *args) +static int +linux_clone_proc(struct thread *td, struct linux_clone_args *args) { int error, ff = RFPROC | RFSTOPPED; struct proc *p2; @@ -163,9 +158,7 @@ linux_clone(struct thread *td, struct linux_clone_args *args) exit_signal = args->flags & 0x000000ff; if (LINUX_SIG_VALID(exit_signal)) { - if (exit_signal <= LINUX_SIGTBLSZ) - exit_signal = - linux_to_bsd_signal[_SIG_IDX(exit_signal)]; + exit_signal = linux_to_bsd_signal(exit_signal); } else if (exit_signal != 0) return (EINVAL); @@ -182,22 +175,6 @@ linux_clone(struct thread *td, struct linux_clone_args *args) if (!(args->flags & (LINUX_CLONE_FILES | LINUX_CLONE_FS))) ff |= RFFDG; - /* - * Attempt to detect when linux_clone(2) is used for creating - * kernel threads. Unfortunately despite the existence of the - * CLONE_THREAD flag, version of linuxthreads package used in - * most popular distros as of beginning of 2005 doesn't make - * any use of it. Therefore, this detection relies on - * empirical observation that linuxthreads sets certain - * combination of flags, so that we can make more or less - * precise detection and notify the FreeBSD kernel that several - * processes are in fact part of the same threading group, so - * that special treatment is necessary for signal delivery - * between those processes and fd locking. - */ - if ((args->flags & 0xffffff00) == LINUX_THREADING_FLAGS) - ff |= RFTHREAD; - if (args->flags & LINUX_CLONE_PARENT_SETTID) if (args->parent_tidptr == NULL) return (EINVAL); @@ -206,29 +183,13 @@ linux_clone(struct thread *td, struct linux_clone_args *args) if (error) return (error); - if (args->flags & (LINUX_CLONE_PARENT | LINUX_CLONE_THREAD)) { - sx_xlock(&proctree_lock); - PROC_LOCK(p2); - proc_reparent(p2, td->td_proc->p_pptr); - PROC_UNLOCK(p2); - sx_xunlock(&proctree_lock); - } + td2 = FIRST_THREAD_IN_PROC(p2); /* create the emuldata */ - error = linux_proc_init(td, p2->p_pid, args->flags); - /* reference it - no need to check this */ - em = em_find(p2, EMUL_DOLOCK); - KASSERT(em != NULL, ("clone: emuldata not found.")); - /* and adjust it */ + linux_proc_init(td, td2, args->flags); - if (args->flags & LINUX_CLONE_THREAD) { -#ifdef notyet - PROC_LOCK(p2); - p2->p_pgrp = td->td_proc->p_pgrp; - PROC_UNLOCK(p2); -#endif - exit_signal = 0; - } + em = em_find(td2); + KASSERT(em != NULL, ("clone_proc: emuldata not found.\n")); if (args->flags & LINUX_CLONE_CHILD_SETTID) em->child_set_tid = args->child_tidptr; @@ -240,8 +201,6 @@ linux_clone(struct thread *td, struct linux_clone_args *args) else em->child_clear_tid = NULL; - EMUL_UNLOCK(&emul_lock); - if (args->flags & LINUX_CLONE_PARENT_SETTID) { error = copyout(&p2->p_pid, args->parent_tidptr, sizeof(p2->p_pid)); @@ -252,14 +211,12 @@ linux_clone(struct thread *td, struct linux_clone_args *args) PROC_LOCK(p2); p2->p_sigparent = exit_signal; PROC_UNLOCK(p2); - td2 = FIRST_THREAD_IN_PROC(p2); /* * In a case of stack = NULL, we are supposed to COW calling process * stack. This is what normal fork() does, so we just keep tf_rsp arg * intact. */ - if (args->stack) - linux_set_upcall_kse(td2, PTROUT(args->stack)); + linux_set_upcall_kse(td2, PTROUT(args->stack)); if (args->flags & LINUX_CLONE_SETTLS) linux_set_cloned_tls(td2, args->tls); @@ -270,6 +227,7 @@ linux_clone(struct thread *td, struct linux_clone_args *args) "stack %p sig = %d"), (int)p2->p_pid, args->stack, exit_signal); #endif + if (args->flags & LINUX_CLONE_VFORK) { PROC_LOCK(p2); p2->p_flag |= P_PPWAIT; @@ -285,7 +243,6 @@ linux_clone(struct thread *td, struct linux_clone_args *args) thread_unlock(td2); td->td_retval[0] = p2->p_pid; - td->td_retval[1] = 0; if (args->flags & LINUX_CLONE_VFORK) { /* wait for the children to exit, ie. emulate vfork */ @@ -297,3 +254,210 @@ linux_clone(struct thread *td, struct linux_clone_args *args) return (0); } + +static int +linux_clone_thread(struct thread *td, struct linux_clone_args *args) +{ + struct linux_emuldata *em; + struct thread *newtd; + struct proc *p; + int error; + +#ifdef DEBUG + if (ldebug(clone)) { + printf(ARGS(clone, "thread: flags %x, stack %p, parent tid: %p, " + "child tid: %p"), (unsigned)args->flags, + args->stack, args->parent_tidptr, args->child_tidptr); + } +#endif + + LINUX_CTR4(clone_thread, "thread(%d) flags %x ptid %p ctid %p", + td->td_tid, (unsigned)args->flags, + args->parent_tidptr, args->child_tidptr); + + if (args->flags & LINUX_CLONE_PARENT_SETTID) + if (args->parent_tidptr == NULL) + return (EINVAL); + + /* Threads should be created with own stack */ + if (args->stack == NULL) + return (EINVAL); + + p = td->td_proc; + + /* Initialize our td */ + error = kern_thr_alloc(p, 0, &newtd); + if (error) + return (error); + + cpu_set_upcall(newtd, td); + + bzero(&newtd->td_startzero, + __rangeof(struct thread, td_startzero, td_endzero)); + bcopy(&td->td_startcopy, &newtd->td_startcopy, + __rangeof(struct thread, td_startcopy, td_endcopy)); + + newtd->td_proc = p; + newtd->td_ucred = crhold(td->td_ucred); + + /* create the emuldata */ + linux_proc_init(td, newtd, args->flags); + + em = em_find(newtd); + KASSERT(em != NULL, ("clone_thread: emuldata not found.\n")); + + if (args->flags & LINUX_CLONE_SETTLS) + linux_set_cloned_tls(newtd, args->tls); + + if (args->flags & LINUX_CLONE_CHILD_SETTID) + em->child_set_tid = args->child_tidptr; + else + em->child_set_tid = NULL; + + if (args->flags & LINUX_CLONE_CHILD_CLEARTID) + em->child_clear_tid = args->child_tidptr; + else + em->child_clear_tid = NULL; + + cpu_thread_clean(newtd); + + linux_set_upcall_kse(newtd, PTROUT(args->stack)); + + PROC_LOCK(p); + p->p_flag |= P_HADTHREADS; + bcopy(p->p_comm, newtd->td_name, sizeof(newtd->td_name)); + + if (args->flags & LINUX_CLONE_PARENT) + thread_link(newtd, p->p_pptr); + else + thread_link(newtd, p); + + thread_lock(td); + /* let the scheduler know about these things. */ + sched_fork_thread(td, newtd); + thread_unlock(td); + if (P_SHOULDSTOP(p)) + newtd->td_flags |= TDF_ASTPENDING | TDF_NEEDSUSPCHK; + PROC_UNLOCK(p); + + tidhash_add(newtd); + +#ifdef DEBUG + if (ldebug(clone)) + printf(ARGS(clone, "successful clone to %d, stack %p"), + (int)newtd->td_tid, args->stack); +#endif + + LINUX_CTR2(clone_thread, "thread(%d) successful clone to %d", + td->td_tid, newtd->td_tid); + + if (args->flags & LINUX_CLONE_PARENT_SETTID) { + error = copyout(&newtd->td_tid, args->parent_tidptr, + sizeof(newtd->td_tid)); + if (error) + printf(LMSG("clone_thread: copyout failed!")); + } + + /* + * Make this runnable after we are finished with it. + */ + thread_lock(newtd); + TD_SET_CAN_RUN(newtd); + sched_add(newtd, SRQ_BORING); + thread_unlock(newtd); + + td->td_retval[0] = newtd->td_tid; + + return (0); +} + +int +linux_clone(struct thread *td, struct linux_clone_args *args) +{ + + if (args->flags & LINUX_CLONE_THREAD) + return (linux_clone_thread(td, args)); + else + return (linux_clone_proc(td, args)); +} + +int +linux_exit(struct thread *td, struct linux_exit_args *args) +{ + struct linux_emuldata *em; + + em = em_find(td); + KASSERT(em != NULL, ("exit: emuldata not found.\n")); + + LINUX_CTR2(exit, "thread(%d) (%d)", em->em_tid, args->rval); + + linux_thread_detach(td); + + /* + * XXX. When the last two threads of a process + * exit via pthread_exit() try thr_exit() first. + */ + kern_thr_exit(td); + exit1(td, W_EXITCODE(args->rval, 0)); + /* NOTREACHED */ +} + +int +linux_set_tid_address(struct thread *td, struct linux_set_tid_address_args *args) +{ + struct linux_emuldata *em; + + em = em_find(td); + KASSERT(em != NULL, ("set_tid_address: emuldata not found.\n")); + + em->child_clear_tid = args->tidptr; + + td->td_retval[0] = em->em_tid; + + LINUX_CTR3(set_tid_address, "tidptr(%d) %p, returns %d", + em->em_tid, args->tidptr, td->td_retval[0]); + + return (0); +} + +void +linux_thread_detach(struct thread *td) +{ + struct linux_sys_futex_args cup; + struct linux_emuldata *em; + int *child_clear_tid; + int error; + + em = em_find(td); + KASSERT(em != NULL, ("thread_detach: emuldata not found.\n")); + + LINUX_CTR1(thread_detach, "thread(%d)", em->em_tid); + + release_futexes(td, em); + + child_clear_tid = em->child_clear_tid; + + if (child_clear_tid != NULL) { + + LINUX_CTR2(thread_detach, "thread(%d) %p", + em->em_tid, child_clear_tid); + + error = suword32(child_clear_tid, 0); + if (error != 0) + return; + + cup.uaddr = child_clear_tid; + cup.op = LINUX_FUTEX_WAKE; + cup.val = 1; /* wake one */ + cup.timeout = NULL; + cup.uaddr2 = NULL; + cup.val3 = 0; + error = linux_sys_futex(td, &cup); + /* + * this cannot happen at the moment and if this happens it + * probably means there is a user space bug + */ + if (error != 0) + linux_msg(td, "futex stuff in thread_detach failed."); + } +} diff --git a/sys/compat/linux/linux_futex.c b/sys/compat/linux/linux_futex.c index 3a0952b13d37..84fc996e95bf 100644 --- a/sys/compat/linux/linux_futex.c +++ b/sys/compat/linux/linux_futex.c @@ -65,15 +65,12 @@ __KERNEL_RCSID(1, "$NetBSD: linux_futex.c,v 1.7 2006/07/24 19:01:49 manu Exp $") #include #include #include +#include #include /* DTrace init */ LIN_SDT_PROVIDER_DECLARE(LINUX_DTRACE); -/* Linuxulator-global DTrace probes */ -LIN_SDT_PROBE_DECLARE(locks, emul_lock, locked); -LIN_SDT_PROBE_DECLARE(locks, emul_lock, unlock); - /** * Futex part for the special DTrace module "locks". */ @@ -174,8 +171,8 @@ LIN_SDT_PROBE_DEFINE2(futex, linux_get_robust_list, entry, "struct thread *", "struct linux_get_robust_list_args *"); LIN_SDT_PROBE_DEFINE1(futex, linux_get_robust_list, copyout_error, "int"); LIN_SDT_PROBE_DEFINE1(futex, linux_get_robust_list, return, "int"); -LIN_SDT_PROBE_DEFINE3(futex, handle_futex_death, entry, "struct proc *", - "uint32_t *", "unsigned int"); +LIN_SDT_PROBE_DEFINE3(futex, handle_futex_death, entry, + "struct linux_emuldata *", "uint32_t *", "unsigned int"); LIN_SDT_PROBE_DEFINE1(futex, handle_futex_death, copyin_error, "int"); LIN_SDT_PROBE_DEFINE1(futex, handle_futex_death, return, "int"); LIN_SDT_PROBE_DEFINE3(futex, fetch_robust_entry, entry, @@ -183,13 +180,11 @@ LIN_SDT_PROBE_DEFINE3(futex, fetch_robust_entry, entry, "unsigned int *"); LIN_SDT_PROBE_DEFINE1(futex, fetch_robust_entry, copyin_error, "int"); LIN_SDT_PROBE_DEFINE1(futex, fetch_robust_entry, return, "int"); -LIN_SDT_PROBE_DEFINE1(futex, release_futexes, entry, "struct proc *"); +LIN_SDT_PROBE_DEFINE2(futex, release_futexes, entry, "struct thread *", + "struct linux_emuldata *"); LIN_SDT_PROBE_DEFINE1(futex, release_futexes, copyin_error, "int"); LIN_SDT_PROBE_DEFINE0(futex, release_futexes, return); -static MALLOC_DEFINE(M_FUTEX, "futex", "Linux futexes"); -static MALLOC_DEFINE(M_FUTEX_WP, "futex wp", "Linux futexes wp"); - struct futex; struct waiting_proc { @@ -252,6 +247,21 @@ struct mtx futex_mtx; /* protects the futex list */ * wp_list to prevent double wakeup. */ +static void futex_put(struct futex *, struct waiting_proc *); +static int futex_get0(uint32_t *, struct futex **f, uint32_t); +static int futex_get(uint32_t *, struct waiting_proc **, struct futex **, + uint32_t); +static int futex_sleep(struct futex *, struct waiting_proc *, int); +static int futex_wake(struct futex *, int, uint32_t); +static int futex_requeue(struct futex *, int, struct futex *, int); +static int futex_wait(struct futex *, struct waiting_proc *, int, + uint32_t); +static int futex_atomic_op(struct thread *, int, uint32_t *); +static int handle_futex_death(struct linux_emuldata *, uint32_t *, + unsigned int); +static int fetch_robust_entry(struct linux_robust_list **, + struct linux_robust_list **, unsigned int *); + /* support.s */ int futex_xchgl(int oparg, uint32_t *uaddr, int *oldval); int futex_addl(int oparg, uint32_t *uaddr, int *oldval); @@ -259,6 +269,7 @@ int futex_orl(int oparg, uint32_t *uaddr, int *oldval); int futex_andl(int oparg, uint32_t *uaddr, int *oldval); int futex_xorl(int oparg, uint32_t *uaddr, int *oldval); + static void futex_put(struct futex *f, struct waiting_proc *wp) { @@ -656,10 +667,11 @@ int linux_sys_futex(struct thread *td, struct linux_sys_futex_args *args) { int clockrt, nrwake, op_ret, ret; - struct linux_emuldata *em; + struct linux_pemuldata *pem; struct waiting_proc *wp; struct futex *f, *f2; - struct l_timespec timeout; + struct l_timespec ltimeout; + struct timespec timeout; struct timeval utv, ctv; int timeout_hz; int error; @@ -703,6 +715,38 @@ linux_sys_futex(struct thread *td, struct linux_sys_futex_args *args) LINUX_CTR3(sys_futex, "WAIT uaddr %p val 0x%x bitset 0x%x", args->uaddr, args->val, args->val3); + if (args->timeout != NULL) { + error = copyin(args->timeout, <imeout, sizeof(ltimeout)); + if (error) { + LIN_SDT_PROBE1(futex, linux_sys_futex, copyin_error, + error); + LIN_SDT_PROBE1(futex, linux_sys_futex, return, error); + return (error); + } + error = linux_to_native_timespec(&timeout, <imeout); + if (error) + return (error); + TIMESPEC_TO_TIMEVAL(&utv, &timeout); + error = itimerfix(&utv); + if (error) { + LIN_SDT_PROBE1(futex, linux_sys_futex, itimerfix_error, + error); + LIN_SDT_PROBE1(futex, linux_sys_futex, return, error); + return (error); + } + if (clockrt) { + microtime(&ctv); + timevalsub(&utv, &ctv); + } else if (args->op == LINUX_FUTEX_WAIT_BITSET) { + microuptime(&ctv); + timevalsub(&utv, &ctv); + } + if (utv.tv_sec < 0) + timevalclear(&utv); + timeout_hz = tvtohz(&utv); + } else + timeout_hz = 0; + error = futex_get(args->uaddr, &wp, &f, flags | FUTEX_CREATE_WP); if (error) { @@ -735,37 +779,6 @@ linux_sys_futex(struct thread *td, struct linux_sys_futex_args *args) return (EWOULDBLOCK); } - if (args->timeout != NULL) { - error = copyin(args->timeout, &timeout, sizeof(timeout)); - if (error) { - LIN_SDT_PROBE1(futex, linux_sys_futex, copyin_error, - error); - LIN_SDT_PROBE1(futex, linux_sys_futex, return, error); - futex_put(f, wp); - return (error); - } - TIMESPEC_TO_TIMEVAL(&utv, &timeout); - error = itimerfix(&utv); - if (error) { - LIN_SDT_PROBE1(futex, linux_sys_futex, itimerfix_error, - error); - LIN_SDT_PROBE1(futex, linux_sys_futex, return, error); - futex_put(f, wp); - return (error); - } - if (clockrt) { - microtime(&ctv); - timevalsub(&utv, &ctv); - } else if (args->op == LINUX_FUTEX_WAIT_BITSET) { - microuptime(&ctv); - timevalsub(&utv, &ctv); - } - if (utv.tv_sec < 0) - timevalclear(&utv); - timeout_hz = tvtohz(&utv); - } else - timeout_hz = 0; - error = futex_wait(f, wp, timeout_hz, args->val3); break; @@ -942,29 +955,43 @@ linux_sys_futex(struct thread *td, struct linux_sys_futex_args *args) case LINUX_FUTEX_LOCK_PI: /* not yet implemented */ - linux_msg(td, - "linux_sys_futex: " - "op LINUX_FUTEX_LOCK_PI not implemented\n"); - LIN_SDT_PROBE0(futex, linux_sys_futex, unimplemented_lock_pi); + pem = pem_find(td->td_proc); + if ((pem->flags & LINUX_XUNSUP_FUTEXPIOP) == 0) { + linux_msg(td, + "linux_sys_futex: " + "unsupported futex_pi op\n"); + pem->flags |= LINUX_XUNSUP_FUTEXPIOP; + LIN_SDT_PROBE0(futex, linux_sys_futex, + unimplemented_lock_pi); + } LIN_SDT_PROBE1(futex, linux_sys_futex, return, ENOSYS); return (ENOSYS); case LINUX_FUTEX_UNLOCK_PI: /* not yet implemented */ - linux_msg(td, - "linux_sys_futex: " - "op LINUX_FUTEX_UNLOCK_PI not implemented\n"); - LIN_SDT_PROBE0(futex, linux_sys_futex, unimplemented_unlock_pi); + pem = pem_find(td->td_proc); + if ((pem->flags & LINUX_XUNSUP_FUTEXPIOP) == 0) { + linux_msg(td, + "linux_sys_futex: " + "unsupported futex_pi op\n"); + pem->flags |= LINUX_XUNSUP_FUTEXPIOP; + LIN_SDT_PROBE0(futex, linux_sys_futex, + unimplemented_unlock_pi); + } LIN_SDT_PROBE1(futex, linux_sys_futex, return, ENOSYS); return (ENOSYS); case LINUX_FUTEX_TRYLOCK_PI: /* not yet implemented */ - linux_msg(td, - "linux_sys_futex: " - "op LINUX_FUTEX_TRYLOCK_PI not implemented\n"); - LIN_SDT_PROBE0(futex, linux_sys_futex, - unimplemented_trylock_pi); + pem = pem_find(td->td_proc); + if ((pem->flags & LINUX_XUNSUP_FUTEXPIOP) == 0) { + linux_msg(td, + "linux_sys_futex: " + "unsupported futex_pi op\n"); + pem->flags |= LINUX_XUNSUP_FUTEXPIOP; + LIN_SDT_PROBE0(futex, linux_sys_futex, + unimplemented_trylock_pi); + } LIN_SDT_PROBE1(futex, linux_sys_futex, return, ENOSYS); return (ENOSYS); @@ -976,12 +1003,12 @@ linux_sys_futex(struct thread *td, struct linux_sys_futex_args *args) * Glibc versions prior to 2.3.3 fall back to FUTEX_WAKE when * FUTEX_REQUEUE returned EINVAL. */ - em = em_find(td->td_proc, EMUL_DONTLOCK); - if ((em->flags & LINUX_XDEPR_REQUEUEOP) == 0) { + pem = pem_find(td->td_proc); + if ((pem->flags & LINUX_XDEPR_REQUEUEOP) == 0) { linux_msg(td, "linux_sys_futex: " "unsupported futex_requeue op\n"); - em->flags |= LINUX_XDEPR_REQUEUEOP; + pem->flags |= LINUX_XDEPR_REQUEUEOP; LIN_SDT_PROBE0(futex, linux_sys_futex, deprecated_requeue); } @@ -991,21 +1018,29 @@ linux_sys_futex(struct thread *td, struct linux_sys_futex_args *args) case LINUX_FUTEX_WAIT_REQUEUE_PI: /* not yet implemented */ - linux_msg(td, - "linux_sys_futex: " - "op FUTEX_WAIT_REQUEUE_PI not implemented\n"); - LIN_SDT_PROBE0(futex, linux_sys_futex, - unimplemented_wait_requeue_pi); + pem = pem_find(td->td_proc); + if ((pem->flags & LINUX_XUNSUP_FUTEXPIOP) == 0) { + linux_msg(td, + "linux_sys_futex: " + "unsupported futex_pi op\n"); + pem->flags |= LINUX_XUNSUP_FUTEXPIOP; + LIN_SDT_PROBE0(futex, linux_sys_futex, + unimplemented_wait_requeue_pi); + } LIN_SDT_PROBE1(futex, linux_sys_futex, return, ENOSYS); return (ENOSYS); case LINUX_FUTEX_CMP_REQUEUE_PI: /* not yet implemented */ - linux_msg(td, - "linux_sys_futex: " - "op LINUX_FUTEX_CMP_REQUEUE_PI not implemented\n"); - LIN_SDT_PROBE0(futex, linux_sys_futex, - unimplemented_cmp_requeue_pi); + pem = pem_find(td->td_proc); + if ((pem->flags & LINUX_XUNSUP_FUTEXPIOP) == 0) { + linux_msg(td, + "linux_sys_futex: " + "unsupported futex_pi op\n"); + pem->flags |= LINUX_XUNSUP_FUTEXPIOP; + LIN_SDT_PROBE0(futex, linux_sys_futex, + unimplemented_cmp_requeue_pi); + } LIN_SDT_PROBE1(futex, linux_sys_futex, return, ENOSYS); return (ENOSYS); @@ -1035,9 +1070,8 @@ linux_set_robust_list(struct thread *td, struct linux_set_robust_list_args *args return (EINVAL); } - em = em_find(td->td_proc, EMUL_DOLOCK); + em = em_find(td); em->robust_futexes = args->head; - EMUL_UNLOCK(&emul_lock); LIN_SDT_PROBE1(futex, linux_set_robust_list, return, 0); return (0); @@ -1049,29 +1083,30 @@ linux_get_robust_list(struct thread *td, struct linux_get_robust_list_args *args struct linux_emuldata *em; struct linux_robust_list_head *head; l_size_t len = sizeof(struct linux_robust_list_head); + struct thread *td2; int error = 0; LIN_SDT_PROBE2(futex, linux_get_robust_list, entry, td, args); if (!args->pid) { - em = em_find(td->td_proc, EMUL_DONTLOCK); + em = em_find(td); + KASSERT(em != NULL, ("get_robust_list: emuldata notfound.\n")); head = em->robust_futexes; } else { - struct proc *p; - - p = pfind(args->pid); - if (p == NULL) { + td2 = tdfind(args->pid, -1); + if (td2 == NULL) { LIN_SDT_PROBE1(futex, linux_get_robust_list, return, ESRCH); return (ESRCH); } - em = em_find(p, EMUL_DONTLOCK); + em = em_find(td2); + KASSERT(em != NULL, ("get_robust_list: emuldata notfound.\n")); /* XXX: ptrace? */ if (priv_check(td, PRIV_CRED_SETUID) || priv_check(td, PRIV_CRED_SETEUID) || - p_candebug(td, p)) { - PROC_UNLOCK(p); + p_candebug(td, td2->td_proc)) { + PROC_UNLOCK(td2->td_proc); LIN_SDT_PROBE1(futex, linux_get_robust_list, return, EPERM); @@ -1079,7 +1114,7 @@ linux_get_robust_list(struct thread *td, struct linux_get_robust_list_args *args } head = em->robust_futexes; - PROC_UNLOCK(p); + PROC_UNLOCK(td2->td_proc); } error = copyout(&len, args->len, sizeof(l_size_t)); @@ -1101,13 +1136,14 @@ linux_get_robust_list(struct thread *td, struct linux_get_robust_list_args *args } static int -handle_futex_death(struct proc *p, uint32_t *uaddr, unsigned int pi) +handle_futex_death(struct linux_emuldata *em, uint32_t *uaddr, + unsigned int pi) { uint32_t uval, nval, mval; struct futex *f; int error; - LIN_SDT_PROBE3(futex, handle_futex_death, entry, p, uaddr, pi); + LIN_SDT_PROBE3(futex, handle_futex_death, entry, em, uaddr, pi); retry: error = copyin(uaddr, &uval, 4); @@ -1116,7 +1152,7 @@ handle_futex_death(struct proc *p, uint32_t *uaddr, unsigned int pi) LIN_SDT_PROBE1(futex, handle_futex_death, return, EFAULT); return (EFAULT); } - if ((uval & FUTEX_TID_MASK) == p->p_pid) { + if ((uval & FUTEX_TID_MASK) == em->em_tid) { mval = (uval & FUTEX_WAITERS) | FUTEX_OWNER_DIED; nval = casuword32(uaddr, uval, mval); @@ -1173,18 +1209,16 @@ fetch_robust_entry(struct linux_robust_list **entry, /* This walks the list of robust futexes releasing them. */ void -release_futexes(struct proc *p) +release_futexes(struct thread *td, struct linux_emuldata *em) { struct linux_robust_list_head *head = NULL; struct linux_robust_list *entry, *next_entry, *pending; unsigned int limit = 2048, pi, next_pi, pip; - struct linux_emuldata *em; l_long futex_offset; int rc, error; - LIN_SDT_PROBE1(futex, release_futexes, entry, p); + LIN_SDT_PROBE2(futex, release_futexes, entry, td, em); - em = em_find(p, EMUL_DONTLOCK); head = em->robust_futexes; if (head == NULL) { @@ -1214,7 +1248,7 @@ release_futexes(struct proc *p) rc = fetch_robust_entry(&next_entry, PTRIN(&entry->next), &next_pi); if (entry != pending) - if (handle_futex_death(p, + if (handle_futex_death(em, (uint32_t *)((caddr_t)entry + futex_offset), pi)) { LIN_SDT_PROBE0(futex, release_futexes, return); return; @@ -1234,7 +1268,7 @@ release_futexes(struct proc *p) } if (pending) - handle_futex_death(p, (uint32_t *)((caddr_t)pending + futex_offset), pip); + handle_futex_death(em, (uint32_t *)((caddr_t)pending + futex_offset), pip); LIN_SDT_PROBE0(futex, release_futexes, return); } diff --git a/sys/compat/linux/linux_futex.h b/sys/compat/linux/linux_futex.h index 0990daa124e3..792274313de5 100644 --- a/sys/compat/linux/linux_futex.h +++ b/sys/compat/linux/linux_futex.h @@ -76,6 +76,7 @@ extern struct mtx futex_mtx; #define FUTEX_TID_MASK 0x3fffffff #define FUTEX_BITSET_MATCH_ANY 0xffffffff -void release_futexes(struct proc *); +void release_futexes(struct thread *, + struct linux_emuldata *); #endif /* !_LINUX_FUTEX_H */ diff --git a/sys/compat/linux/linux_getcwd.c b/sys/compat/linux/linux_getcwd.c index ebcf97008bf7..e6be015a4094 100644 --- a/sys/compat/linux/linux_getcwd.c +++ b/sys/compat/linux/linux_getcwd.c @@ -74,7 +74,7 @@ linux_getcwd(struct thread *td, struct linux_getcwd_args *args) if (args->bufsize < 2) return (ERANGE); - path = malloc(LINUX_PATH_MAX, M_TEMP, M_WAITOK); + path = malloc(LINUX_PATH_MAX, M_LINUX, M_WAITOK); error = kern___getcwd(td, path, UIO_SYSSPACE, args->bufsize, LINUX_PATH_MAX); @@ -85,6 +85,6 @@ linux_getcwd(struct thread *td, struct linux_getcwd_args *args) td->td_retval[0] = lenused; } - free(path, M_TEMP); + free(path, M_LINUX); return (error); } diff --git a/sys/compat/linux/linux_ioctl.c b/sys/compat/linux/linux_ioctl.c index 0148fec97be5..572060e8f052 100644 --- a/sys/compat/linux/linux_ioctl.c +++ b/sys/compat/linux/linux_ioctl.c @@ -69,7 +69,6 @@ __FBSDID("$FreeBSD$"); #include #include #include -#include #include @@ -96,9 +95,6 @@ __FBSDID("$FreeBSD$"); CTASSERT(LINUX_IFNAMSIZ == IFNAMSIZ); -FEATURE(linuxulator_v4l, "V4L ioctl wrapper support in the linuxulator"); -FEATURE(linuxulator_v4l2, "V4L2 ioctl wrapper support in the linuxulator"); - static linux_ioctl_function_t linux_ioctl_cdrom; static linux_ioctl_function_t linux_ioctl_vfat; static linux_ioctl_function_t linux_ioctl_console; @@ -1981,8 +1977,6 @@ linux_ioctl_sound(struct thread *td, struct linux_ioctl_args *args) * Console related ioctls */ -#define ISSIGVALID(sig) ((sig) > 0 && (sig) < NSIG) - static int linux_ioctl_console(struct thread *td, struct linux_ioctl_args *args) { @@ -2065,8 +2059,16 @@ linux_ioctl_console(struct thread *td, struct linux_ioctl_args *args) struct vt_mode mode; if ((error = copyin((void *)args->arg, &mode, sizeof(mode)))) break; - if (!ISSIGVALID(mode.frsig) && ISSIGVALID(mode.acqsig)) - mode.frsig = mode.acqsig; + if (LINUX_SIG_VALID(mode.relsig)) + mode.relsig = linux_to_bsd_signal(mode.relsig); + else + mode.relsig = 0; + if (LINUX_SIG_VALID(mode.acqsig)) + mode.acqsig = linux_to_bsd_signal(mode.acqsig); + else + mode.acqsig = 0; + /* XXX. Linux ignores frsig and set it to 0. */ + mode.frsig = 0; if ((error = copyout(&mode, (void *)args->arg, sizeof(mode)))) break; args->cmd = VT_SETMODE; @@ -2108,34 +2110,6 @@ linux_ioctl_console(struct thread *td, struct linux_ioctl_args *args) */ #define IFP_IS_ETH(ifp) (ifp->if_type == IFT_ETHER) -/* - * Interface function used by linprocfs (at the time of writing). It's not - * used by the Linuxulator itself. - */ -int -linux_ifname(struct ifnet *ifp, char *buffer, size_t buflen) -{ - struct ifnet *ifscan; - int ethno; - - IFNET_RLOCK_ASSERT(); - - /* Short-circuit non ethernet interfaces */ - if (!IFP_IS_ETH(ifp)) - return (strlcpy(buffer, ifp->if_xname, buflen)); - - /* Determine the (relative) unit number for ethernet interfaces */ - ethno = 0; - TAILQ_FOREACH(ifscan, &V_ifnet, if_link) { - if (ifscan == ifp) - return (snprintf(buffer, buflen, "eth%d", ethno)); - if (IFP_IS_ETH(ifscan)) - ethno++; - } - - return (0); -} - /* * Translate a Linux interface name to a FreeBSD interface name, * and return the associated ifnet structure @@ -3622,9 +3596,16 @@ linux_ioctl(struct thread *td, struct linux_ioctl_args *args) sx_sunlock(&linux_ioctl_sx); fdrop(fp, td); - linux_msg(td, "ioctl fd=%d, cmd=0x%x ('%c',%d) is not implemented", - args->fd, (int)(args->cmd & 0xffff), - (int)(args->cmd & 0xff00) >> 8, (int)(args->cmd & 0xff)); + switch (args->cmd & 0xffff) { + case LINUX_BTRFS_IOC_CLONE: + return (ENOTSUP); + + default: + linux_msg(td, "ioctl fd=%d, cmd=0x%x ('%c',%d) is not implemented", + args->fd, (int)(args->cmd & 0xffff), + (int)(args->cmd & 0xff00) >> 8, (int)(args->cmd & 0xff)); + break; + } return (EINVAL); } diff --git a/sys/compat/linux/linux_ioctl.h b/sys/compat/linux/linux_ioctl.h index 3f63b210d05e..873937deecd1 100644 --- a/sys/compat/linux/linux_ioctl.h +++ b/sys/compat/linux/linux_ioctl.h @@ -580,13 +580,6 @@ #define LINUX_IOCTL_DRM_MIN 0x6400 #define LINUX_IOCTL_DRM_MAX 0x64ff -/* - * This doesn't really belong here, but I can't think of a better - * place to put it. - */ -struct ifnet; -int linux_ifname(struct ifnet *, char *, size_t); - /* * video */ @@ -751,6 +744,12 @@ int linux_ifname(struct ifnet *, char *, size_t); #define FBSD_LUSB_MAX 0xffff #define FBSD_LUSB_MIN 0xffdd +/* + * Linux btrfs clone operation + */ +#define LINUX_BTRFS_IOC_CLONE 0x9409 /* 0x40049409 */ + + /* * Pluggable ioctl handlers */ diff --git a/sys/compat/linux/linux_ipc.c b/sys/compat/linux/linux_ipc.c index 1237edc65316..7a92c6ae0e11 100644 --- a/sys/compat/linux/linux_ipc.c +++ b/sys/compat/linux/linux_ipc.c @@ -117,16 +117,6 @@ bsd_to_linux_shm_info( struct shm_info *bpp, struct l_shm_info *lpp) lpp->swap_successes = bpp->swap_successes ; } -struct l_ipc_perm { - l_key_t key; - l_uid16_t uid; - l_gid16_t gid; - l_uid16_t cuid; - l_gid16_t cgid; - l_ushort mode; - l_ushort seq; -}; - static void linux_to_bsd_ipc_perm(struct l_ipc_perm *lpp, struct ipc_perm *bpp) { diff --git a/sys/compat/linux/linux_ipc.h b/sys/compat/linux/linux_ipc.h index f1531ba18373..8e9c050db9c7 100644 --- a/sys/compat/linux/linux_ipc.h +++ b/sys/compat/linux/linux_ipc.h @@ -82,7 +82,7 @@ #define LINUX_IPC_64 0x0100 /* New version (support 32-bit UIDs, bigger message sizes, etc. */ -#if defined(__i386__) || defined(__amd64__) +#if defined(__i386__) || (defined(__amd64__) && defined(COMPAT_LINUX32)) struct linux_msgctl_args { @@ -177,6 +177,6 @@ int linux_shmctl(struct thread *, struct linux_shmctl_args *); int linux_shmdt(struct thread *, struct linux_shmdt_args *); int linux_shmget(struct thread *, struct linux_shmget_args *); -#endif /* __i386__ || __amd64__ */ +#endif /* __i386__ || (__amd64__ && COMPAT_LINUX32) */ #endif /* _LINUX_IPC_H_ */ diff --git a/sys/compat/linux/linux_mib.c b/sys/compat/linux/linux_mib.c index 8f8cb81b48b6..396344b78864 100644 --- a/sys/compat/linux/linux_mib.c +++ b/sys/compat/linux/linux_mib.c @@ -29,8 +29,6 @@ #include __FBSDID("$FreeBSD$"); -#include "opt_compat.h" - #include #include #include @@ -41,85 +39,11 @@ __FBSDID("$FreeBSD$"); #include #include #include -#include #include -#ifdef COMPAT_LINUX32 -#include -#else -#include -#endif -#include #include #include -/* DTrace init */ -LIN_SDT_PROVIDER_DECLARE(LINUX_DTRACE); - -/** - * DTrace probes in this module. - */ -LIN_SDT_PROBE_DEFINE0(mib, linux_sysctl_osname, entry); -LIN_SDT_PROBE_DEFINE1(mib, linux_sysctl_osname, sysctl_string_error, "int"); -LIN_SDT_PROBE_DEFINE1(mib, linux_sysctl_osname, return, "int"); - -LIN_SDT_PROBE_DEFINE0(mib, linux_sysctl_osrelease, entry); -LIN_SDT_PROBE_DEFINE1(mib, linux_sysctl_osrelease, sysctl_string_error, "int"); -LIN_SDT_PROBE_DEFINE1(mib, linux_sysctl_osrelease, return, "int"); -LIN_SDT_PROBE_DEFINE0(mib, linux_sysctl_oss_version, entry); -LIN_SDT_PROBE_DEFINE1(mib, linux_sysctl_oss_version, sysctl_string_error, - "int"); -LIN_SDT_PROBE_DEFINE1(mib, linux_sysctl_oss_version, return, "int"); -LIN_SDT_PROBE_DEFINE2(mib, linux_map_osrel, entry, "char *", "int *"); -LIN_SDT_PROBE_DEFINE1(mib, linux_map_osrel, return, "int"); -LIN_SDT_PROBE_DEFINE2(mib, linux_get_prison, entry, "struct prison *", - "struct prison **"); -LIN_SDT_PROBE_DEFINE1(mib, linux_get_prison, return, "struct linux_prison *"); -LIN_SDT_PROBE_DEFINE2(mib, linux_alloc_prison, entry, "struct prison *", - "struct linux_prison **"); -LIN_SDT_PROBE_DEFINE1(mib, linux_alloc_prison, return, "int"); -LIN_SDT_PROBE_DEFINE2(mib, linux_prison_create, entry, "void *", "void *"); -LIN_SDT_PROBE_DEFINE1(mib, linux_prison_create, vfs_copyopt_error, "int"); -LIN_SDT_PROBE_DEFINE1(mib, linux_prison_create, return, "int"); -LIN_SDT_PROBE_DEFINE2(mib, linux_prison_check, entry, "void *", "void *"); -LIN_SDT_PROBE_DEFINE1(mib, linux_prison_check, vfs_copyopt_error, "int"); -LIN_SDT_PROBE_DEFINE1(mib, linux_prison_check, vfs_getopt_error, "int"); -LIN_SDT_PROBE_DEFINE1(mib, linux_prison_check, return, "int"); -LIN_SDT_PROBE_DEFINE2(mib, linux_prison_set, entry, "void *", "void *"); -LIN_SDT_PROBE_DEFINE1(mib, linux_prison_set, vfs_copyopt_error, "int"); -LIN_SDT_PROBE_DEFINE1(mib, linux_prison_set, vfs_getopt_error, "int"); -LIN_SDT_PROBE_DEFINE1(mib, linux_prison_set, return, "int"); -LIN_SDT_PROBE_DEFINE2(mib, linux_prison_get, entry, "void *", "void *"); -LIN_SDT_PROBE_DEFINE1(mib, linux_prison_get, vfs_setopt_error, "int"); -LIN_SDT_PROBE_DEFINE1(mib, linux_prison_get, vfs_setopts_error, "int"); -LIN_SDT_PROBE_DEFINE1(mib, linux_prison_get, return, "int"); -LIN_SDT_PROBE_DEFINE1(mib, linux_prison_destructor, entry, "void *"); -LIN_SDT_PROBE_DEFINE0(mib, linux_prison_destructor, return); -LIN_SDT_PROBE_DEFINE0(mib, linux_osd_jail_register, entry); -LIN_SDT_PROBE_DEFINE0(mib, linux_osd_jail_register, return); -LIN_SDT_PROBE_DEFINE0(mib, linux_osd_jail_deregister, entry); -LIN_SDT_PROBE_DEFINE0(mib, linux_osd_jail_deregister, return); -LIN_SDT_PROBE_DEFINE2(mib, linux_get_osname, entry, "struct thread *", - "char *"); -LIN_SDT_PROBE_DEFINE0(mib, linux_get_osname, return); -LIN_SDT_PROBE_DEFINE2(mib, linux_set_osname, entry, "struct thread *", - "char *"); -LIN_SDT_PROBE_DEFINE1(mib, linux_set_osname, return, "int"); -LIN_SDT_PROBE_DEFINE2(mib, linux_get_osrelease, entry, "struct thread *", - "char *"); -LIN_SDT_PROBE_DEFINE0(mib, linux_get_osrelease, return); -LIN_SDT_PROBE_DEFINE1(mib, linux_kernver, entry, "struct thread *"); -LIN_SDT_PROBE_DEFINE1(mib, linux_kernver, return, "int"); -LIN_SDT_PROBE_DEFINE2(mib, linux_set_osrelease, entry, "struct thread *", - "char *"); -LIN_SDT_PROBE_DEFINE1(mib, linux_set_osrelease, return, "int"); -LIN_SDT_PROBE_DEFINE1(mib, linux_get_oss_version, entry, "struct thread *"); -LIN_SDT_PROBE_DEFINE1(mib, linux_get_oss_version, return, "int"); - -LIN_SDT_PROBE_DEFINE2(mib, linux_set_oss_version, entry, "struct thread *", - "int"); -LIN_SDT_PROBE_DEFINE1(mib, linux_set_oss_version, return, "int"); - struct linux_prison { char pr_osname[LINUX_MAX_UTSNAME]; char pr_osrelease[LINUX_MAX_UTSNAME]; @@ -129,15 +53,14 @@ struct linux_prison { static struct linux_prison lprison0 = { .pr_osname = "Linux", - .pr_osrelease = "2.6.18", + .pr_osrelease = LINUX_VERSION_STR, .pr_oss_version = 0x030600, - .pr_osrel = 2006018 + .pr_osrel = LINUX_VERSION_CODE }; static unsigned linux_osd_jail_slot; -static SYSCTL_NODE(_compat, OID_AUTO, linux, CTLFLAG_RW, 0, - "Linux mode"); +SYSCTL_NODE(_compat, OID_AUTO, linux, CTLFLAG_RW, 0, "Linux mode"); static int linux_set_osname(struct thread *td, char *osname); static int linux_set_osrelease(struct thread *td, char *osrelease); @@ -149,19 +72,12 @@ linux_sysctl_osname(SYSCTL_HANDLER_ARGS) char osname[LINUX_MAX_UTSNAME]; int error; - LIN_SDT_PROBE0(mib, linux_sysctl_osname, entry); - linux_get_osname(req->td, osname); error = sysctl_handle_string(oidp, osname, LINUX_MAX_UTSNAME, req); - if (error != 0 || req->newptr == NULL) { - LIN_SDT_PROBE1(mib, linux_sysctl_osname, sysctl_string_error, - error); - LIN_SDT_PROBE1(mib, linux_sysctl_osname, return, error); + if (error != 0 || req->newptr == NULL) return (error); - } error = linux_set_osname(req->td, osname); - LIN_SDT_PROBE1(mib, linux_sysctl_osname, return, error); return (error); } @@ -176,19 +92,12 @@ linux_sysctl_osrelease(SYSCTL_HANDLER_ARGS) char osrelease[LINUX_MAX_UTSNAME]; int error; - LIN_SDT_PROBE0(mib, linux_sysctl_osrelease, entry); - linux_get_osrelease(req->td, osrelease); error = sysctl_handle_string(oidp, osrelease, LINUX_MAX_UTSNAME, req); - if (error != 0 || req->newptr == NULL) { - LIN_SDT_PROBE1(mib, linux_sysctl_osrelease, sysctl_string_error, - error); - LIN_SDT_PROBE1(mib, linux_sysctl_osrelease, return, error); + if (error != 0 || req->newptr == NULL) return (error); - } error = linux_set_osrelease(req->td, osrelease); - LIN_SDT_PROBE1(mib, linux_sysctl_osrelease, return, error); return (error); } @@ -203,19 +112,12 @@ linux_sysctl_oss_version(SYSCTL_HANDLER_ARGS) int oss_version; int error; - LIN_SDT_PROBE0(mib, linux_sysctl_oss_version, entry); - oss_version = linux_get_oss_version(req->td); error = sysctl_handle_int(oidp, &oss_version, 0, req); - if (error != 0 || req->newptr == NULL) { - LIN_SDT_PROBE1(mib, linux_sysctl_oss_version, - sysctl_string_error, error); - LIN_SDT_PROBE1(mib, linux_sysctl_oss_version, return, error); + if (error != 0 || req->newptr == NULL) return (error); - } error = linux_set_oss_version(req->td, oss_version); - LIN_SDT_PROBE1(mib, linux_sysctl_oss_version, return, error); return (error); } @@ -233,37 +135,26 @@ linux_map_osrel(char *osrelease, int *osrel) char *sep, *eosrelease; int len, v0, v1, v2, v; - LIN_SDT_PROBE2(mib, linux_map_osrel, entry, osrelease, osrel); - len = strlen(osrelease); eosrelease = osrelease + len; v0 = strtol(osrelease, &sep, 10); - if (osrelease == sep || sep + 1 >= eosrelease || *sep != '.') { - LIN_SDT_PROBE1(mib, linux_map_osrel, return, EINVAL); + if (osrelease == sep || sep + 1 >= eosrelease || *sep != '.') return (EINVAL); - } osrelease = sep + 1; v1 = strtol(osrelease, &sep, 10); - if (osrelease == sep || sep + 1 >= eosrelease || *sep != '.') { - LIN_SDT_PROBE1(mib, linux_map_osrel, return, EINVAL); + if (osrelease == sep || sep + 1 >= eosrelease || *sep != '.') return (EINVAL); - } osrelease = sep + 1; v2 = strtol(osrelease, &sep, 10); - if (osrelease == sep || sep != eosrelease) { - LIN_SDT_PROBE1(mib, linux_map_osrel, return, EINVAL); + if (osrelease == sep || sep != eosrelease) return (EINVAL); - } v = v0 * 1000000 + v1 * 1000 + v2; - if (v < 1000000) { - LIN_SDT_PROBE1(mib, linux_map_osrel, return, EINVAL); + if (v < 1000000) return (EINVAL); - } *osrel = v; - LIN_SDT_PROBE1(mib, linux_map_osrel, return, 0); return (0); } @@ -277,8 +168,6 @@ linux_find_prison(struct prison *spr, struct prison **prp) struct prison *pr; struct linux_prison *lpr; - LIN_SDT_PROBE2(mib, linux_get_prison, entry, spr, prp); - if (!linux_osd_jail_slot) /* In case osd_register failed. */ spr = &prison0; @@ -293,7 +182,6 @@ linux_find_prison(struct prison *spr, struct prison **prp) } *prp = pr; - LIN_SDT_PROBE1(mib, linux_get_prison, return, lpr); return (lpr); } @@ -308,8 +196,6 @@ linux_alloc_prison(struct prison *pr, struct linux_prison **lprp) struct linux_prison *lpr, *nlpr; int error; - LIN_SDT_PROBE2(mib, linux_alloc_prison, entry, pr, lprp); - /* If this prison already has Linux info, return that. */ error = 0; lpr = linux_find_prison(pr, &ppr); @@ -343,7 +229,6 @@ linux_alloc_prison(struct prison *pr, struct linux_prison **lprp) else mtx_unlock(&pr->pr_mtx); - LIN_SDT_PROBE1(mib, linux_alloc_prison, return, error); return (error); } @@ -355,26 +240,16 @@ linux_prison_create(void *obj, void *data) { struct prison *pr = obj; struct vfsoptlist *opts = data; - int jsys, error; + int jsys; - LIN_SDT_PROBE2(mib, linux_prison_create, entry, obj, data); - - error = vfs_copyopt(opts, "linux", &jsys, sizeof(jsys)); - if (error != 0) { - LIN_SDT_PROBE1(mib, linux_prison_create, vfs_copyopt_error, - error); - } else if (jsys == JAIL_SYS_INHERIT) { - LIN_SDT_PROBE1(mib, linux_prison_create, return, 0); + if (vfs_copyopt(opts, "linux", &jsys, sizeof(jsys)) == 0 && + jsys == JAIL_SYS_INHERIT) return (0); - } /* * Inherit a prison's initial values from its parent * (different from JAIL_SYS_INHERIT which also inherits changes). */ - error = linux_alloc_prison(pr, NULL); - - LIN_SDT_PROBE1(mib, linux_prison_create, return, error); - return (error); + return (linux_alloc_prison(pr, NULL)); } static int @@ -384,80 +259,46 @@ linux_prison_check(void *obj __unused, void *data) char *osname, *osrelease; int error, jsys, len, osrel, oss_version; - LIN_SDT_PROBE2(mib, linux_prison_check, entry, obj, data); - /* Check that the parameters are correct. */ error = vfs_copyopt(opts, "linux", &jsys, sizeof(jsys)); - if (error != 0) { - LIN_SDT_PROBE1(mib, linux_prison_check, vfs_copyopt_error, - error); - } if (error != ENOENT) { - if (error != 0) { - LIN_SDT_PROBE1(mib, linux_prison_check, return, error); + if (error != 0) return (error); - } - if (jsys != JAIL_SYS_NEW && jsys != JAIL_SYS_INHERIT) { - LIN_SDT_PROBE1(mib, linux_prison_check, return, EINVAL); + if (jsys != JAIL_SYS_NEW && jsys != JAIL_SYS_INHERIT) return (EINVAL); - } } error = vfs_getopt(opts, "linux.osname", (void **)&osname, &len); - if (error != 0) { - LIN_SDT_PROBE1(mib, linux_prison_check, vfs_getopt_error, - error); - } if (error != ENOENT) { - if (error != 0) { - LIN_SDT_PROBE1(mib, linux_prison_check, return, error); + if (error != 0) return (error); - } - if (len == 0 || osname[len - 1] != '\0') { - LIN_SDT_PROBE1(mib, linux_prison_check, return, EINVAL); + if (len == 0 || osname[len - 1] != '\0') return (EINVAL); - } if (len > LINUX_MAX_UTSNAME) { vfs_opterror(opts, "linux.osname too long"); - LIN_SDT_PROBE1(mib, linux_prison_check, return, - ENAMETOOLONG); return (ENAMETOOLONG); } } error = vfs_getopt(opts, "linux.osrelease", (void **)&osrelease, &len); - if (error != 0) { - LIN_SDT_PROBE1(mib, linux_prison_check, vfs_getopt_error, - error); - } if (error != ENOENT) { - if (error != 0) { - LIN_SDT_PROBE1(mib, linux_prison_check, return, error); + if (error != 0) return (error); - } - if (len == 0 || osrelease[len - 1] != '\0') { - LIN_SDT_PROBE1(mib, linux_prison_check, return, EINVAL); + if (len == 0 || osrelease[len - 1] != '\0') return (EINVAL); - } if (len > LINUX_MAX_UTSNAME) { vfs_opterror(opts, "linux.osrelease too long"); - LIN_SDT_PROBE1(mib, linux_prison_check, return, - ENAMETOOLONG); return (ENAMETOOLONG); } error = linux_map_osrel(osrelease, &osrel); if (error != 0) { vfs_opterror(opts, "linux.osrelease format error"); - LIN_SDT_PROBE1(mib, linux_prison_check, return, error); return (error); } } error = vfs_copyopt(opts, "linux.oss_version", &oss_version, sizeof(oss_version)); - if (error != 0) - LIN_SDT_PROBE1(mib, linux_prison_check, vfs_copyopt_error, error); if (error == ENOENT) error = 0; - LIN_SDT_PROBE1(mib, linux_prison_check, return, error); return (error); } @@ -470,32 +311,22 @@ linux_prison_set(void *obj, void *data) char *osname, *osrelease; int error, gotversion, jsys, len, oss_version; - LIN_SDT_PROBE2(mib, linux_prison_set, entry, obj, data); - /* Set the parameters, which should be correct. */ error = vfs_copyopt(opts, "linux", &jsys, sizeof(jsys)); - if (error != 0) - LIN_SDT_PROBE1(mib, linux_prison_set, vfs_copyopt_error, error); if (error == ENOENT) jsys = -1; error = vfs_getopt(opts, "linux.osname", (void **)&osname, &len); - if (error != 0) - LIN_SDT_PROBE1(mib, linux_prison_set, vfs_getopt_error, error); if (error == ENOENT) osname = NULL; else jsys = JAIL_SYS_NEW; error = vfs_getopt(opts, "linux.osrelease", (void **)&osrelease, &len); - if (error != 0) - LIN_SDT_PROBE1(mib, linux_prison_set, vfs_getopt_error, error); if (error == ENOENT) osrelease = NULL; else jsys = JAIL_SYS_NEW; error = vfs_copyopt(opts, "linux.oss_version", &oss_version, sizeof(oss_version)); - if (error != 0) - LIN_SDT_PROBE1(mib, linux_prison_set, vfs_copyopt_error, error); if (error == ENOENT) gotversion = 0; else { @@ -517,15 +348,12 @@ linux_prison_set(void *obj, void *data) error = linux_alloc_prison(pr, &lpr); if (error) { mtx_unlock(&pr->pr_mtx); - LIN_SDT_PROBE1(mib, linux_prison_set, return, error); return (error); } if (osrelease) { error = linux_map_osrel(osrelease, &lpr->pr_osrel); if (error) { mtx_unlock(&pr->pr_mtx); - LIN_SDT_PROBE1(mib, linux_prison_set, return, - error); return (error); } strlcpy(lpr->pr_osrelease, osrelease, @@ -538,7 +366,6 @@ linux_prison_set(void *obj, void *data) mtx_unlock(&pr->pr_mtx); } - LIN_SDT_PROBE1(mib, linux_prison_set, return, 0); return (0); } @@ -561,74 +388,44 @@ linux_prison_get(void *obj, void *data) static int version0; - LIN_SDT_PROBE2(mib, linux_prison_get, entry, obj, data); - /* See if this prison is the one with the Linux info. */ lpr = linux_find_prison(pr, &ppr); i = (ppr == pr) ? JAIL_SYS_NEW : JAIL_SYS_INHERIT; error = vfs_setopt(opts, "linux", &i, sizeof(i)); - if (error != 0) { - LIN_SDT_PROBE1(mib, linux_prison_get, vfs_setopt_error, error); - if (error != ENOENT) - goto done; - } + if (error != 0 && error != ENOENT) + goto done; if (i) { error = vfs_setopts(opts, "linux.osname", lpr->pr_osname); - if (error != 0) { - LIN_SDT_PROBE1(mib, linux_prison_get, vfs_setopts_error, - error); - if (error != ENOENT) - goto done; - } + if (error != 0 && error != ENOENT) + goto done; error = vfs_setopts(opts, "linux.osrelease", lpr->pr_osrelease); - if (error != 0) { - LIN_SDT_PROBE1(mib, linux_prison_get, vfs_setopts_error, - error); - if (error != ENOENT) - goto done; - } + if (error != 0 && error != ENOENT) + goto done; error = vfs_setopt(opts, "linux.oss_version", &lpr->pr_oss_version, sizeof(lpr->pr_oss_version)); - if (error != 0) { - LIN_SDT_PROBE1(mib, linux_prison_get, vfs_setopt_error, - error); - if(error != ENOENT) - goto done; - } + if (error != 0 && error != ENOENT) + goto done; } else { /* * If this prison is inheriting its Linux info, report * empty/zero parameters. */ error = vfs_setopts(opts, "linux.osname", ""); - if (error != 0) { - LIN_SDT_PROBE1(mib, linux_prison_get, vfs_setopts_error, - error); - if(error != ENOENT) - goto done; - } + if (error != 0 && error != ENOENT) + goto done; error = vfs_setopts(opts, "linux.osrelease", ""); - if (error != 0) { - LIN_SDT_PROBE1(mib, linux_prison_get, vfs_setopts_error, - error); - if(error != ENOENT) - goto done; - } + if (error != 0 && error != ENOENT) + goto done; error = vfs_setopt(opts, "linux.oss_version", &version0, sizeof(lpr->pr_oss_version)); - if (error != 0) { - LIN_SDT_PROBE1(mib, linux_prison_get, vfs_setopt_error, - error); - if(error != ENOENT) - goto done; - } + if (error != 0 && error != ENOENT) + goto done; } error = 0; done: mtx_unlock(&ppr->pr_mtx); - LIN_SDT_PROBE1(mib, linux_prison_get, return, error); return (error); } @@ -636,9 +433,7 @@ static void linux_prison_destructor(void *data) { - LIN_SDT_PROBE1(mib, linux_prison_destructor, entry, data); free(data, M_PRISON); - LIN_SDT_PROBE0(mib, linux_prison_destructor, return); } void @@ -652,8 +447,6 @@ linux_osd_jail_register(void) [PR_METHOD_CHECK] = linux_prison_check }; - LIN_SDT_PROBE0(mib, linux_osd_jail_register, entry); - linux_osd_jail_slot = osd_jail_register(linux_prison_destructor, methods); if (linux_osd_jail_slot > 0) { @@ -663,20 +456,14 @@ linux_osd_jail_register(void) (void)linux_alloc_prison(pr, NULL); sx_xunlock(&allprison_lock); } - - LIN_SDT_PROBE0(mib, linux_osd_jail_register, return); } void linux_osd_jail_deregister(void) { - LIN_SDT_PROBE0(mib, linux_osd_jail_register, entry); - if (linux_osd_jail_slot) osd_jail_deregister(linux_osd_jail_slot); - - LIN_SDT_PROBE0(mib, linux_osd_jail_register, return); } void @@ -685,13 +472,9 @@ linux_get_osname(struct thread *td, char *dst) struct prison *pr; struct linux_prison *lpr; - LIN_SDT_PROBE2(mib, linux_get_osname, entry, td, dst); - lpr = linux_find_prison(td->td_ucred->cr_prison, &pr); bcopy(lpr->pr_osname, dst, LINUX_MAX_UTSNAME); mtx_unlock(&pr->pr_mtx); - - LIN_SDT_PROBE0(mib, linux_get_osname, return); } static int @@ -700,13 +483,10 @@ linux_set_osname(struct thread *td, char *osname) struct prison *pr; struct linux_prison *lpr; - LIN_SDT_PROBE2(mib, linux_set_osname, entry, td, osname); - lpr = linux_find_prison(td->td_ucred->cr_prison, &pr); strlcpy(lpr->pr_osname, osname, LINUX_MAX_UTSNAME); mtx_unlock(&pr->pr_mtx); - LIN_SDT_PROBE1(mib, linux_set_osname, return, 0); return (0); } @@ -716,13 +496,9 @@ linux_get_osrelease(struct thread *td, char *dst) struct prison *pr; struct linux_prison *lpr; - LIN_SDT_PROBE2(mib, linux_get_osrelease, entry, td, dst); - lpr = linux_find_prison(td->td_ucred->cr_prison, &pr); bcopy(lpr->pr_osrelease, dst, LINUX_MAX_UTSNAME); mtx_unlock(&pr->pr_mtx); - - LIN_SDT_PROBE0(mib, linux_get_osrelease, return); } int @@ -732,13 +508,10 @@ linux_kernver(struct thread *td) struct linux_prison *lpr; int osrel; - LIN_SDT_PROBE1(mib, linux_kernver, entry, td); - lpr = linux_find_prison(td->td_ucred->cr_prison, &pr); osrel = lpr->pr_osrel; mtx_unlock(&pr->pr_mtx); - LIN_SDT_PROBE1(mib, linux_kernver, return, osrel); return (osrel); } @@ -749,15 +522,12 @@ linux_set_osrelease(struct thread *td, char *osrelease) struct linux_prison *lpr; int error; - LIN_SDT_PROBE2(mib, linux_set_osrelease, entry, td, osrelease); - lpr = linux_find_prison(td->td_ucred->cr_prison, &pr); error = linux_map_osrel(osrelease, &lpr->pr_osrel); if (error == 0) strlcpy(lpr->pr_osrelease, osrelease, LINUX_MAX_UTSNAME); mtx_unlock(&pr->pr_mtx); - LIN_SDT_PROBE1(mib, linux_set_osrelease, return, error); return (error); } @@ -768,13 +538,10 @@ linux_get_oss_version(struct thread *td) struct linux_prison *lpr; int version; - LIN_SDT_PROBE1(mib, linux_get_oss_version, entry, td); - lpr = linux_find_prison(td->td_ucred->cr_prison, &pr); version = lpr->pr_oss_version; mtx_unlock(&pr->pr_mtx); - LIN_SDT_PROBE1(mib, linux_get_oss_version, return, version); return (version); } @@ -784,74 +551,9 @@ linux_set_oss_version(struct thread *td, int oss_version) struct prison *pr; struct linux_prison *lpr; - LIN_SDT_PROBE2(mib, linux_set_oss_version, entry, td, oss_version); - lpr = linux_find_prison(td->td_ucred->cr_prison, &pr); lpr->pr_oss_version = oss_version; mtx_unlock(&pr->pr_mtx); - LIN_SDT_PROBE1(mib, linux_set_oss_version, return, 0); return (0); } - -#if defined(DEBUG) || defined(KTR) -/* XXX: can be removed when every ldebug(...) and KTR stuff are removed. */ - -u_char linux_debug_map[howmany(LINUX_SYS_MAXSYSCALL, sizeof(u_char))]; - -static int -linux_debug(int syscall, int toggle, int global) -{ - - if (global) { - char c = toggle ? 0 : 0xff; - - memset(linux_debug_map, c, sizeof(linux_debug_map)); - return (0); - } - if (syscall < 0 || syscall >= LINUX_SYS_MAXSYSCALL) - return (EINVAL); - if (toggle) - clrbit(linux_debug_map, syscall); - else - setbit(linux_debug_map, syscall); - return (0); -} - -/* - * Usage: sysctl linux.debug=.<0/1> - * - * E.g.: sysctl linux.debug=21.0 - * - * As a special case, syscall "all" will apply to all syscalls globally. - */ -#define LINUX_MAX_DEBUGSTR 16 -static int -linux_sysctl_debug(SYSCTL_HANDLER_ARGS) -{ - char value[LINUX_MAX_DEBUGSTR], *p; - int error, sysc, toggle; - int global = 0; - - value[0] = '\0'; - error = sysctl_handle_string(oidp, value, LINUX_MAX_DEBUGSTR, req); - if (error || req->newptr == NULL) - return (error); - for (p = value; *p != '\0' && *p != '.'; p++); - if (*p == '\0') - return (EINVAL); - *p++ = '\0'; - sysc = strtol(value, NULL, 0); - toggle = strtol(p, NULL, 0); - if (strcmp(value, "all") == 0) - global = 1; - error = linux_debug(sysc, toggle, global); - return (error); -} - -SYSCTL_PROC(_compat_linux, OID_AUTO, debug, - CTLTYPE_STRING | CTLFLAG_RW, - 0, 0, linux_sysctl_debug, "A", - "Linux debugging control"); - -#endif /* DEBUG || KTR */ diff --git a/sys/compat/linux/linux_mib.h b/sys/compat/linux/linux_mib.h index e8eedf906443..80b6c973e3e9 100644 --- a/sys/compat/linux/linux_mib.h +++ b/sys/compat/linux/linux_mib.h @@ -31,6 +31,10 @@ #ifndef _LINUX_MIB_H_ #define _LINUX_MIB_H_ +#ifdef SYSCTL_DECL +SYSCTL_DECL(_compat_linux); +#endif + void linux_osd_jail_register(void); void linux_osd_jail_deregister(void); @@ -42,8 +46,19 @@ int linux_get_oss_version(struct thread *td); int linux_kernver(struct thread *td); -#define LINUX_KERNVER_2004000 2004000 -#define LINUX_KERNVER_2006000 2006000 +#define LINUX_KVERSION 2 +#define LINUX_KPATCHLEVEL 6 +#define LINUX_KSUBLEVEL 32 + +#define LINUX_KERNVER(a,b,c) (((a) << 16) + ((b) << 8) + (c)) +#define LINUX_VERSION_CODE LINUX_KERNVER(LINUX_KVERSION, \ + LINUX_KPATCHLEVEL, LINUX_KSUBLEVEL) +#define LINUX_KERNVERSTR(x) #x +#define LINUX_XKERNVERSTR(x) LINUX_KERNVERSTR(x) +#define LINUX_VERSION_STR LINUX_XKERNVERSTR(LINUX_KVERSION.LINUX_KPATCHLEVEL.LINUX_KSUBLEVEL) + +#define LINUX_KERNVER_2004000 LINUX_KERNVER(2,4,0) +#define LINUX_KERNVER_2006000 LINUX_KERNVER(2,6,0) #define linux_use26(t) (linux_kernver(t) >= LINUX_KERNVER_2006000) diff --git a/sys/compat/linux/linux_misc.c b/sys/compat/linux/linux_misc.c index ec531d39df1c..65d27ba2f422 100644 --- a/sys/compat/linux/linux_misc.c +++ b/sys/compat/linux/linux_misc.c @@ -88,21 +88,24 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include #include #include #include -/* DTrace init */ -LIN_SDT_PROVIDER_DECLARE(LINUX_DTRACE); - -/* Linuxulator-global DTrace probes */ -LIN_SDT_PROBE_DECLARE(locks, emul_lock, locked); -LIN_SDT_PROBE_DECLARE(locks, emul_lock, unlock); -LIN_SDT_PROBE_DECLARE(locks, emul_shared_rlock, locked); -LIN_SDT_PROBE_DECLARE(locks, emul_shared_rlock, unlock); -LIN_SDT_PROBE_DECLARE(locks, emul_shared_wlock, locked); -LIN_SDT_PROBE_DECLARE(locks, emul_shared_wlock, unlock); +/** + * Special DTrace provider for the linuxulator. + * + * In this file we define the provider for the entire linuxulator. All + * modules (= files of the linuxulator) use it. + * + * We define a different name depending on the emulated bitsize, see + * ../..//linux{,32}/linux.h, e.g.: + * native bitsize = linuxulator + * amd64, 32bit emulation = linuxulator32 + */ +LIN_SDT_PROVIDER_DEFINE(LINUX_DTRACE); int stclohz; /* Statistics clock frequency */ @@ -129,6 +132,15 @@ struct l_sysinfo { l_uint mem_unit; char _f[20-2*sizeof(l_long)-sizeof(l_int)]; /* padding */ }; + +struct l_pselect6arg { + l_uintptr_t ss; + l_size_t ss_len; +}; + +static int linux_utimensat_nsec_valid(l_long); + + int linux_sysinfo(struct thread *td, struct linux_sysinfo_args *args) { @@ -523,7 +535,7 @@ linux_select(struct thread *td, struct linux_select_args *args) tvp = NULL; error = kern_select(td, args->nfds, args->readfds, args->writefds, - args->exceptfds, tvp, sizeof(l_int) * 8); + args->exceptfds, tvp, LINUX_NFDBITS); #ifdef DEBUG if (ldebug(select)) @@ -738,12 +750,11 @@ linux_newuname(struct thread *td, struct linux_newuname_args *args) *p = '\0'; break; } - strlcpy(utsname.machine, linux_platform, LINUX_MAX_UTSNAME); + strlcpy(utsname.machine, linux_kplatform, LINUX_MAX_UTSNAME); return (copyout(&utsname, args->buf, sizeof(utsname))); } -#if defined(__i386__) || (defined(__amd64__) && defined(COMPAT_LINUX32)) struct l_utimbuf { l_time_t l_actime; l_time_t l_modtime; @@ -816,6 +827,98 @@ linux_utimes(struct thread *td, struct linux_utimes_args *args) return (error); } +static int +linux_utimensat_nsec_valid(l_long nsec) +{ + + if (nsec == LINUX_UTIME_OMIT || nsec == LINUX_UTIME_NOW) + return (0); + if (nsec >= 0 && nsec <= 999999999) + return (0); + return (1); +} + +int +linux_utimensat(struct thread *td, struct linux_utimensat_args *args) +{ + struct l_timespec l_times[2]; + struct timespec times[2], *timesp = NULL; + char *path = NULL; + int error, dfd, flags = 0; + + dfd = (args->dfd == LINUX_AT_FDCWD) ? AT_FDCWD : args->dfd; + +#ifdef DEBUG + if (ldebug(utimensat)) + printf(ARGS(utimensat, "%d, *"), dfd); +#endif + + if (args->flags & ~LINUX_AT_SYMLINK_NOFOLLOW) + return (EINVAL); + + if (args->times != NULL) { + error = copyin(args->times, l_times, sizeof(l_times)); + if (error != 0) + return (error); + + if (linux_utimensat_nsec_valid(l_times[0].tv_nsec) != 0 || + linux_utimensat_nsec_valid(l_times[1].tv_nsec) != 0) + return (EINVAL); + + times[0].tv_sec = l_times[0].tv_sec; + switch (l_times[0].tv_nsec) + { + case LINUX_UTIME_OMIT: + times[0].tv_nsec = UTIME_OMIT; + break; + case LINUX_UTIME_NOW: + times[0].tv_nsec = UTIME_NOW; + break; + default: + times[0].tv_nsec = l_times[0].tv_nsec; + } + + times[1].tv_sec = l_times[1].tv_sec; + switch (l_times[1].tv_nsec) + { + case LINUX_UTIME_OMIT: + times[1].tv_nsec = UTIME_OMIT; + break; + case LINUX_UTIME_NOW: + times[1].tv_nsec = UTIME_NOW; + break; + default: + times[1].tv_nsec = l_times[1].tv_nsec; + break; + } + timesp = times; + } + + if (times[0].tv_nsec == UTIME_OMIT && times[1].tv_nsec == UTIME_OMIT) + /* This breaks POSIX, but is what the Linux kernel does + * _on purpose_ (documented in the man page for utimensat(2)), + * so we must follow that behaviour. */ + return (0); + + if (args->pathname != NULL) + LCONVPATHEXIST_AT(td, args->pathname, &path, dfd); + else if (args->flags != 0) + return (EINVAL); + + if (args->flags & LINUX_AT_SYMLINK_NOFOLLOW) + flags |= AT_SYMLINK_NOFOLLOW; + + if (path == NULL) + error = kern_futimens(td, dfd, timesp, UIO_SYSSPACE); + else { + error = kern_utimensat(td, dfd, path, UIO_SYSSPACE, timesp, + UIO_SYSSPACE, flags); + LFREEPATH(path); + } + + return (error); +} + int linux_futimesat(struct thread *td, struct linux_futimesat_args *args) { @@ -848,7 +951,6 @@ linux_futimesat(struct thread *td, struct linux_futimesat_args *args) LFREEPATH(fname); return (error); } -#endif /* __i386__ || (__amd64__ && COMPAT_LINUX32) */ int linux_common_wait(struct thread *td, int pid, int *status, @@ -864,41 +966,131 @@ linux_common_wait(struct thread *td, int pid, int *status, tmpstat &= 0xffff; if (WIFSIGNALED(tmpstat)) tmpstat = (tmpstat & 0xffffff80) | - BSD_TO_LINUX_SIGNAL(WTERMSIG(tmpstat)); + bsd_to_linux_signal(WTERMSIG(tmpstat)); else if (WIFSTOPPED(tmpstat)) tmpstat = (tmpstat & 0xffff00ff) | - (BSD_TO_LINUX_SIGNAL(WSTOPSIG(tmpstat)) << 8); + (bsd_to_linux_signal(WSTOPSIG(tmpstat)) << 8); + else if (WIFCONTINUED(tmpstat)) + tmpstat = 0xffff; error = copyout(&tmpstat, status, sizeof(int)); } return (error); } +#if defined(__i386__) || (defined(__amd64__) && defined(COMPAT_LINUX32)) int linux_waitpid(struct thread *td, struct linux_waitpid_args *args) { - int options; - + struct linux_wait4_args wait4_args; + #ifdef DEBUG if (ldebug(waitpid)) printf(ARGS(waitpid, "%d, %p, %d"), args->pid, (void *)args->status, args->options); #endif - /* - * this is necessary because the test in kern_wait doesn't work - * because we mess with the options here - */ - if (args->options & ~(WUNTRACED | WNOHANG | WCONTINUED | __WCLONE)) - return (EINVAL); - - options = (args->options & (WNOHANG | WUNTRACED)); - /* WLINUXCLONE should be equal to __WCLONE, but we make sure */ - if (args->options & __WCLONE) - options |= WLINUXCLONE; - return (linux_common_wait(td, args->pid, args->status, options, NULL)); + wait4_args.pid = args->pid; + wait4_args.status = args->status; + wait4_args.options = args->options; + wait4_args.rusage = NULL; + + return (linux_wait4(td, &wait4_args)); +} +#endif /* __i386__ || (__amd64__ && COMPAT_LINUX32) */ + +int +linux_wait4(struct thread *td, struct linux_wait4_args *args) +{ + int error, options; + struct rusage ru, *rup; + +#ifdef DEBUG + if (ldebug(wait4)) + printf(ARGS(wait4, "%d, %p, %d, %p"), + args->pid, (void *)args->status, args->options, + (void *)args->rusage); +#endif + if (args->options & ~(LINUX_WUNTRACED | LINUX_WNOHANG | + LINUX_WCONTINUED | __WCLONE | __WNOTHREAD | __WALL)) + return (EINVAL); + + options = WEXITED; + linux_to_bsd_waitopts(args->options, &options); + + if (args->rusage != NULL) + rup = &ru; + else + rup = NULL; + error = linux_common_wait(td, args->pid, args->status, options, rup); + if (error != 0) + return (error); + if (args->rusage != NULL) + error = linux_copyout_rusage(&ru, args->rusage); + return (error); } +int +linux_waitid(struct thread *td, struct linux_waitid_args *args) +{ + int status, options, sig; + struct __wrusage wru; + siginfo_t siginfo; + l_siginfo_t lsi; + idtype_t idtype; + struct proc *p; + int error; + + options = 0; + linux_to_bsd_waitopts(args->options, &options); + + if (options & ~(WNOHANG | WNOWAIT | WEXITED | WUNTRACED | WCONTINUED)) + return (EINVAL); + if (!(options & (WEXITED | WUNTRACED | WCONTINUED))) + return (EINVAL); + + switch (args->idtype) { + case LINUX_P_ALL: + idtype = P_ALL; + break; + case LINUX_P_PID: + if (args->id <= 0) + return (EINVAL); + idtype = P_PID; + break; + case LINUX_P_PGID: + if (args->id <= 0) + return (EINVAL); + idtype = P_PGID; + break; + default: + return (EINVAL); + } + + error = kern_wait6(td, idtype, args->id, &status, options, + &wru, &siginfo); + if (error != 0) + return (error); + if (args->rusage != NULL) { + error = linux_copyout_rusage(&wru.wru_children, + args->rusage); + if (error != 0) + return (error); + } + if (args->info != NULL) { + p = td->td_proc; + if (td->td_retval[0] == 0) + bzero(&lsi, sizeof(lsi)); + else { + sig = bsd_to_linux_signal(siginfo.si_signo); + siginfo_to_lsiginfo(&siginfo, &lsi, sig); + } + error = copyout(&lsi, args->info, sizeof(lsi)); + } + td->td_retval[0] = 0; + + return (error); +} int linux_mknod(struct thread *td, struct linux_mknod_args *args) @@ -910,7 +1102,8 @@ linux_mknod(struct thread *td, struct linux_mknod_args *args) #ifdef DEBUG if (ldebug(mknod)) - printf(ARGS(mknod, "%s, %d, %d"), path, args->mode, args->dev); + printf(ARGS(mknod, "%s, %d, %ju"), path, args->mode, + (uintmax_t)args->dev); #endif switch (args->mode & S_IFMT) { @@ -1081,6 +1274,7 @@ linux_getitimer(struct thread *td, struct linux_getitimer_args *uap) return (copyout(&ls, uap->itv, sizeof(ls))); } +#if defined(__i386__) || (defined(__amd64__) && defined(COMPAT_LINUX32)) int linux_nice(struct thread *td, struct linux_nice_args *args) { @@ -1091,6 +1285,7 @@ linux_nice(struct thread *td, struct linux_nice_args *args) bsd_args.prio = args->inc; return (sys_setpriority(td, &bsd_args)); } +#endif /* __i386__ || (__amd64__ && COMPAT_LINUX32) */ int linux_setgroups(struct thread *td, struct linux_setgroups_args *args) @@ -1104,7 +1299,7 @@ linux_setgroups(struct thread *td, struct linux_setgroups_args *args) ngrp = args->gidsetsize; if (ngrp < 0 || ngrp >= ngroups_max + 1) return (EINVAL); - linux_gidset = malloc(ngrp * sizeof(*linux_gidset), M_TEMP, M_WAITOK); + linux_gidset = malloc(ngrp * sizeof(*linux_gidset), M_LINUX, M_WAITOK); error = copyin(args->grouplist, linux_gidset, ngrp * sizeof(l_gid_t)); if (error) goto out; @@ -1143,7 +1338,7 @@ linux_setgroups(struct thread *td, struct linux_setgroups_args *args) crfree(oldcred); error = 0; out: - free(linux_gidset, M_TEMP); + free(linux_gidset, M_LINUX); return (error); } @@ -1175,14 +1370,14 @@ linux_getgroups(struct thread *td, struct linux_getgroups_args *args) ngrp = 0; linux_gidset = malloc(bsd_gidsetsz * sizeof(*linux_gidset), - M_TEMP, M_WAITOK); + M_LINUX, M_WAITOK); while (ngrp < bsd_gidsetsz) { linux_gidset[ngrp] = bsd_gidset[ngrp + 1]; ngrp++; } error = copyout(linux_gidset, args->grouplist, ngrp * sizeof(l_gid_t)); - free(linux_gidset, M_TEMP); + free(linux_gidset, M_LINUX); if (error) return (error); @@ -1220,6 +1415,7 @@ linux_setrlimit(struct thread *td, struct linux_setrlimit_args *args) return (kern_setrlimit(td, which, &bsd_rlim)); } +#if defined(__i386__) || (defined(__amd64__) && defined(COMPAT_LINUX32)) int linux_old_getrlimit(struct thread *td, struct linux_old_getrlimit_args *args) { @@ -1262,6 +1458,7 @@ linux_old_getrlimit(struct thread *td, struct linux_old_getrlimit_args *args) #endif return (copyout(&rlim, args->rlim, sizeof(rlim))); } +#endif /* __i386__ || (__amd64__ && COMPAT_LINUX32) */ int linux_getrlimit(struct thread *td, struct linux_getrlimit_args *args) @@ -1297,7 +1494,9 @@ int linux_sched_setscheduler(struct thread *td, struct linux_sched_setscheduler_args *args) { - struct sched_setscheduler_args bsd; + struct sched_param sched_param; + struct thread *tdt; + int error, policy; #ifdef DEBUG if (ldebug(sched_setscheduler)) @@ -1307,39 +1506,51 @@ linux_sched_setscheduler(struct thread *td, switch (args->policy) { case LINUX_SCHED_OTHER: - bsd.policy = SCHED_OTHER; + policy = SCHED_OTHER; break; case LINUX_SCHED_FIFO: - bsd.policy = SCHED_FIFO; + policy = SCHED_FIFO; break; case LINUX_SCHED_RR: - bsd.policy = SCHED_RR; + policy = SCHED_RR; break; default: return (EINVAL); } - bsd.pid = args->pid; - bsd.param = (struct sched_param *)args->param; - return (sys_sched_setscheduler(td, &bsd)); + error = copyin(args->param, &sched_param, sizeof(sched_param)); + if (error) + return (error); + + tdt = linux_tdfind(td, args->pid, -1); + if (tdt == NULL) + return (ESRCH); + + error = kern_sched_setscheduler(td, tdt, policy, &sched_param); + PROC_UNLOCK(tdt->td_proc); + return (error); } int linux_sched_getscheduler(struct thread *td, struct linux_sched_getscheduler_args *args) { - struct sched_getscheduler_args bsd; - int error; + struct thread *tdt; + int error, policy; #ifdef DEBUG if (ldebug(sched_getscheduler)) printf(ARGS(sched_getscheduler, "%d"), args->pid); #endif - bsd.pid = args->pid; - error = sys_sched_getscheduler(td, &bsd); + tdt = linux_tdfind(td, args->pid, -1); + if (tdt == NULL) + return (ESRCH); - switch (td->td_retval[0]) { + error = kern_sched_getscheduler(td, tdt, &policy); + PROC_UNLOCK(tdt->td_proc); + + switch (policy) { case SCHED_OTHER: td->td_retval[0] = LINUX_SCHED_OTHER; break; @@ -1350,7 +1561,6 @@ linux_sched_getscheduler(struct thread *td, td->td_retval[0] = LINUX_SCHED_RR; break; } - return (error); } @@ -1476,20 +1686,12 @@ linux_reboot(struct thread *td, struct linux_reboot_args *args) int linux_getpid(struct thread *td, struct linux_getpid_args *args) { - struct linux_emuldata *em; #ifdef DEBUG if (ldebug(getpid)) printf(ARGS(getpid, "")); #endif - - if (linux_use26(td)) { - em = em_find(td->td_proc, EMUL_DONTLOCK); - KASSERT(em != NULL, ("getpid: emuldata not found.\n")); - td->td_retval[0] = em->shared->group_pid; - } else { - td->td_retval[0] = td->td_proc->p_pid; - } + td->td_retval[0] = td->td_proc->p_pid; return (0); } @@ -1497,13 +1699,18 @@ linux_getpid(struct thread *td, struct linux_getpid_args *args) int linux_gettid(struct thread *td, struct linux_gettid_args *args) { + struct linux_emuldata *em; #ifdef DEBUG if (ldebug(gettid)) printf(ARGS(gettid, "")); #endif - td->td_retval[0] = td->td_proc->p_pid; + em = em_find(td); + KASSERT(em != NULL, ("gettid: emuldata not found.\n")); + + td->td_retval[0] = em->em_tid; + return (0); } @@ -1511,50 +1718,15 @@ linux_gettid(struct thread *td, struct linux_gettid_args *args) int linux_getppid(struct thread *td, struct linux_getppid_args *args) { - struct linux_emuldata *em; - struct proc *p, *pp; #ifdef DEBUG if (ldebug(getppid)) printf(ARGS(getppid, "")); #endif - if (!linux_use26(td)) { - PROC_LOCK(td->td_proc); - td->td_retval[0] = td->td_proc->p_pptr->p_pid; - PROC_UNLOCK(td->td_proc); - return (0); - } - - em = em_find(td->td_proc, EMUL_DONTLOCK); - - KASSERT(em != NULL, ("getppid: process emuldata not found.\n")); - - /* find the group leader */ - p = pfind(em->shared->group_pid); - - if (p == NULL) { -#ifdef DEBUG - printf(LMSG("parent process not found.\n")); -#endif - return (0); - } - - pp = p->p_pptr; /* switch to parent */ - PROC_LOCK(pp); - PROC_UNLOCK(p); - - /* if its also linux process */ - if (pp->p_sysent == &elf_linux_sysvec) { - em = em_find(pp, EMUL_DONTLOCK); - KASSERT(em != NULL, ("getppid: parent emuldata not found.\n")); - - td->td_retval[0] = em->shared->group_pid; - } else - td->td_retval[0] = pp->p_pid; - - PROC_UNLOCK(pp); - + PROC_LOCK(td->td_proc); + td->td_retval[0] = td->td_proc->p_pptr->p_pid; + PROC_UNLOCK(td->td_proc); return (0); } @@ -1659,22 +1831,14 @@ linux_setdomainname(struct thread *td, struct linux_setdomainname_args *args) int linux_exit_group(struct thread *td, struct linux_exit_group_args *args) { - struct linux_emuldata *em; #ifdef DEBUG if (ldebug(exit_group)) printf(ARGS(exit_group, "%i"), args->error_code); #endif - em = em_find(td->td_proc, EMUL_DONTLOCK); - if (em->shared->refs > 1) { - EMUL_SHARED_WLOCK(&emul_shared_lock); - em->shared->flags |= EMUL_SHARED_HASXSTAT; - em->shared->xstat = W_EXITCODE(args->error_code, 0); - EMUL_SHARED_WUNLOCK(&emul_shared_lock); - if (linux_use26(td)) - linux_kill_threads(td, SIGKILL); - } + LINUX_CTR2(exit_group, "thread(%d) (%d)", td->td_tid, + args->error_code); /* * XXX: we should send a signal to the parent if @@ -1682,8 +1846,7 @@ linux_exit_group(struct thread *td, struct linux_exit_group_args *args) * as it doesnt occur often. */ exit1(td, W_EXITCODE(args->error_code, 0)); - - return (0); + /* NOTREACHED */ } #define _LINUX_CAPABILITY_VERSION 0x19980330 @@ -1791,24 +1954,23 @@ linux_prctl(struct thread *td, struct linux_prctl_args *args) #ifdef DEBUG if (ldebug(prctl)) - printf(ARGS(prctl, "%d, %d, %d, %d, %d"), args->option, - args->arg2, args->arg3, args->arg4, args->arg5); + printf(ARGS(prctl, "%d, %ju, %ju, %ju, %ju"), args->option, + (uintmax_t)args->arg2, (uintmax_t)args->arg3, + (uintmax_t)args->arg4, (uintmax_t)args->arg5); #endif switch (args->option) { case LINUX_PR_SET_PDEATHSIG: if (!LINUX_SIG_VALID(args->arg2)) return (EINVAL); - em = em_find(p, EMUL_DOLOCK); + em = em_find(td); KASSERT(em != NULL, ("prctl: emuldata not found.\n")); em->pdeath_signal = args->arg2; - EMUL_UNLOCK(&emul_lock); break; case LINUX_PR_GET_PDEATHSIG: - em = em_find(p, EMUL_DOLOCK); + em = em_find(td); KASSERT(em != NULL, ("prctl: emuldata not found.\n")); pdeath_signal = em->pdeath_signal; - EMUL_UNLOCK(&emul_lock); error = copyout(&pdeath_signal, (void *)(register_t)args->arg2, sizeof(pdeath_signal)); @@ -1873,6 +2035,57 @@ linux_prctl(struct thread *td, struct linux_prctl_args *args) return (error); } +int +linux_sched_setparam(struct thread *td, + struct linux_sched_setparam_args *uap) +{ + struct sched_param sched_param; + struct thread *tdt; + int error; + +#ifdef DEBUG + if (ldebug(sched_setparam)) + printf(ARGS(sched_setparam, "%d, *"), uap->pid); +#endif + + error = copyin(uap->param, &sched_param, sizeof(sched_param)); + if (error) + return (error); + + tdt = linux_tdfind(td, uap->pid, -1); + if (tdt == NULL) + return (ESRCH); + + error = kern_sched_setparam(td, tdt, &sched_param); + PROC_UNLOCK(tdt->td_proc); + return (error); +} + +int +linux_sched_getparam(struct thread *td, + struct linux_sched_getparam_args *uap) +{ + struct sched_param sched_param; + struct thread *tdt; + int error; + +#ifdef DEBUG + if (ldebug(sched_getparam)) + printf(ARGS(sched_getparam, "%d, *"), uap->pid); +#endif + + tdt = linux_tdfind(td, uap->pid, -1); + if (tdt == NULL) + return (ESRCH); + + error = kern_sched_getparam(td, tdt, &sched_param); + PROC_UNLOCK(tdt->td_proc); + if (error == 0) + error = copyout(&sched_param, uap->param, + sizeof(sched_param)); + return (error); +} + /* * Get affinity of a process. */ @@ -1881,6 +2094,7 @@ linux_sched_getaffinity(struct thread *td, struct linux_sched_getaffinity_args *args) { int error; + struct thread *tdt; struct cpuset_getaffinity_args cga; #ifdef DEBUG @@ -1891,9 +2105,14 @@ linux_sched_getaffinity(struct thread *td, if (args->len < sizeof(cpuset_t)) return (EINVAL); + tdt = linux_tdfind(td, args->pid, -1); + if (tdt == NULL) + return (ESRCH); + + PROC_UNLOCK(tdt->td_proc); cga.level = CPU_LEVEL_WHICH; - cga.which = CPU_WHICH_PID; - cga.id = args->pid; + cga.which = CPU_WHICH_TID; + cga.id = tdt->td_tid; cga.cpusetsize = sizeof(cpuset_t); cga.mask = (cpuset_t *) args->user_mask_ptr; @@ -1911,6 +2130,7 @@ linux_sched_setaffinity(struct thread *td, struct linux_sched_setaffinity_args *args) { struct cpuset_setaffinity_args csa; + struct thread *tdt; #ifdef DEBUG if (ldebug(sched_setaffinity)) @@ -1920,11 +2140,369 @@ linux_sched_setaffinity(struct thread *td, if (args->len < sizeof(cpuset_t)) return (EINVAL); + tdt = linux_tdfind(td, args->pid, -1); + if (tdt == NULL) + return (ESRCH); + + PROC_UNLOCK(tdt->td_proc); csa.level = CPU_LEVEL_WHICH; - csa.which = CPU_WHICH_PID; - csa.id = args->pid; + csa.which = CPU_WHICH_TID; + csa.id = tdt->td_tid; csa.cpusetsize = sizeof(cpuset_t); csa.mask = (cpuset_t *) args->user_mask_ptr; return (sys_cpuset_setaffinity(td, &csa)); } + +struct linux_rlimit64 { + uint64_t rlim_cur; + uint64_t rlim_max; +}; + +int +linux_prlimit64(struct thread *td, struct linux_prlimit64_args *args) +{ + struct rlimit rlim, nrlim; + struct linux_rlimit64 lrlim; + struct proc *p; + u_int which; + int flags; + int error; + +#ifdef DEBUG + if (ldebug(prlimit64)) + printf(ARGS(prlimit64, "%d, %d, %p, %p"), args->pid, + args->resource, (void *)args->new, (void *)args->old); +#endif + + if (args->resource >= LINUX_RLIM_NLIMITS) + return (EINVAL); + + which = linux_to_bsd_resource[args->resource]; + if (which == -1) + return (EINVAL); + + if (args->new != NULL) { + /* + * Note. Unlike FreeBSD where rlim is signed 64-bit Linux + * rlim is unsigned 64-bit. FreeBSD treats negative limits + * as INFINITY so we do not need a conversion even. + */ + error = copyin(args->new, &nrlim, sizeof(nrlim)); + if (error != 0) + return (error); + } + + flags = PGET_HOLD | PGET_NOTWEXIT; + if (args->new != NULL) + flags |= PGET_CANDEBUG; + else + flags |= PGET_CANSEE; + error = pget(args->pid, flags, &p); + if (error != 0) + return (error); + + if (args->old != NULL) { + PROC_LOCK(p); + lim_rlimit(p, which, &rlim); + PROC_UNLOCK(p); + if (rlim.rlim_cur == RLIM_INFINITY) + lrlim.rlim_cur = LINUX_RLIM_INFINITY; + else + lrlim.rlim_cur = rlim.rlim_cur; + if (rlim.rlim_max == RLIM_INFINITY) + lrlim.rlim_max = LINUX_RLIM_INFINITY; + else + lrlim.rlim_max = rlim.rlim_max; + error = copyout(&lrlim, args->old, sizeof(lrlim)); + if (error != 0) + goto out; + } + + if (args->new != NULL) + error = kern_proc_setrlimit(td, p, which, &nrlim); + + out: + PRELE(p); + return (error); +} + +int +linux_pselect6(struct thread *td, struct linux_pselect6_args *args) +{ + struct timeval utv, tv0, tv1, *tvp; + struct l_pselect6arg lpse6; + struct l_timespec lts; + struct timespec uts; + l_sigset_t l_ss; + sigset_t *ssp; + sigset_t ss; + int error; + + ssp = NULL; + if (args->sig != NULL) { + error = copyin(args->sig, &lpse6, sizeof(lpse6)); + if (error != 0) + return (error); + if (lpse6.ss_len != sizeof(l_ss)) + return (EINVAL); + if (lpse6.ss != 0) { + error = copyin(PTRIN(lpse6.ss), &l_ss, + sizeof(l_ss)); + if (error != 0) + return (error); + linux_to_bsd_sigset(&l_ss, &ss); + ssp = &ss; + } + } + + /* + * Currently glibc changes nanosecond number to microsecond. + * This mean losing precision but for now it is hardly seen. + */ + if (args->tsp != NULL) { + error = copyin(args->tsp, <s, sizeof(lts)); + if (error != 0) + return (error); + error = linux_to_native_timespec(&uts, <s); + if (error != 0) + return (error); + + TIMESPEC_TO_TIMEVAL(&utv, &uts); + if (itimerfix(&utv)) + return (EINVAL); + + microtime(&tv0); + tvp = &utv; + } else + tvp = NULL; + + error = kern_pselect(td, args->nfds, args->readfds, args->writefds, + args->exceptfds, tvp, ssp, LINUX_NFDBITS); + + if (error == 0 && args->tsp != NULL) { + if (td->td_retval[0] != 0) { + /* + * Compute how much time was left of the timeout, + * by subtracting the current time and the time + * before we started the call, and subtracting + * that result from the user-supplied value. + */ + + microtime(&tv1); + timevalsub(&tv1, &tv0); + timevalsub(&utv, &tv1); + if (utv.tv_sec < 0) + timevalclear(&utv); + } else + timevalclear(&utv); + + TIMEVAL_TO_TIMESPEC(&utv, &uts); + + native_to_linux_timespec(<s, &uts); + error = copyout(<s, args->tsp, sizeof(lts)); + } + + return (error); +} + +int +linux_ppoll(struct thread *td, struct linux_ppoll_args *args) +{ + struct timespec ts0, ts1; + struct l_timespec lts; + struct timespec uts, *tsp; + l_sigset_t l_ss; + sigset_t *ssp; + sigset_t ss; + int error; + + if (args->sset != NULL) { + if (args->ssize != sizeof(l_ss)) + return (EINVAL); + error = copyin(args->sset, &l_ss, sizeof(l_ss)); + if (error) + return (error); + linux_to_bsd_sigset(&l_ss, &ss); + ssp = &ss; + } else + ssp = NULL; + if (args->tsp != NULL) { + error = copyin(args->tsp, <s, sizeof(lts)); + if (error) + return (error); + error = linux_to_native_timespec(&uts, <s); + if (error != 0) + return (error); + + nanotime(&ts0); + tsp = &uts; + } else + tsp = NULL; + + error = kern_poll(td, args->fds, args->nfds, tsp, ssp); + + if (error == 0 && args->tsp != NULL) { + if (td->td_retval[0]) { + nanotime(&ts1); + timespecsub(&ts1, &ts0); + timespecsub(&uts, &ts1); + if (uts.tv_sec < 0) + timespecclear(&uts); + } else + timespecclear(&uts); + + native_to_linux_timespec(<s, &uts); + error = copyout(<s, args->tsp, sizeof(lts)); + } + + return (error); +} + +#if defined(DEBUG) || defined(KTR) +/* XXX: can be removed when every ldebug(...) and KTR stuff are removed. */ + +u_char linux_debug_map[howmany(LINUX_SYS_MAXSYSCALL, sizeof(u_char))]; + +static int +linux_debug(int syscall, int toggle, int global) +{ + + if (global) { + char c = toggle ? 0 : 0xff; + + memset(linux_debug_map, c, sizeof(linux_debug_map)); + return (0); + } + if (syscall < 0 || syscall >= LINUX_SYS_MAXSYSCALL) + return (EINVAL); + if (toggle) + clrbit(linux_debug_map, syscall); + else + setbit(linux_debug_map, syscall); + return (0); +} + +/* + * Usage: sysctl linux.debug=.<0/1> + * + * E.g.: sysctl linux.debug=21.0 + * + * As a special case, syscall "all" will apply to all syscalls globally. + */ +#define LINUX_MAX_DEBUGSTR 16 +int +linux_sysctl_debug(SYSCTL_HANDLER_ARGS) +{ + char value[LINUX_MAX_DEBUGSTR], *p; + int error, sysc, toggle; + int global = 0; + + value[0] = '\0'; + error = sysctl_handle_string(oidp, value, LINUX_MAX_DEBUGSTR, req); + if (error || req->newptr == NULL) + return (error); + for (p = value; *p != '\0' && *p != '.'; p++); + if (*p == '\0') + return (EINVAL); + *p++ = '\0'; + sysc = strtol(value, NULL, 0); + toggle = strtol(p, NULL, 0); + if (strcmp(value, "all") == 0) + global = 1; + error = linux_debug(sysc, toggle, global); + return (error); +} + +#endif /* DEBUG || KTR */ + +int +linux_sched_rr_get_interval(struct thread *td, + struct linux_sched_rr_get_interval_args *uap) +{ + struct timespec ts; + struct l_timespec lts; + struct thread *tdt; + int error; + + /* + * According to man in case the invalid pid specified + * EINVAL should be returned. + */ + if (uap->pid < 0) + return (EINVAL); + + tdt = linux_tdfind(td, uap->pid, -1); + if (tdt == NULL) + return (ESRCH); + + error = kern_sched_rr_get_interval_td(td, tdt, &ts); + PROC_UNLOCK(tdt->td_proc); + if (error != 0) + return (error); + native_to_linux_timespec(<s, &ts); + return (copyout(<s, uap->interval, sizeof(lts))); +} + +/* + * In case when the Linux thread is the initial thread in + * the thread group thread id is equal to the process id. + * Glibc depends on this magic (assert in pthread_getattr_np.c). + */ +struct thread * +linux_tdfind(struct thread *td, lwpid_t tid, pid_t pid) +{ + struct linux_emuldata *em; + struct thread *tdt; + struct proc *p; + + tdt = NULL; + if (tid == 0 || tid == td->td_tid) { + tdt = td; + PROC_LOCK(tdt->td_proc); + } else if (tid > PID_MAX) + tdt = tdfind(tid, pid); + else { + /* + * Initial thread where the tid equal to the pid. + */ + p = pfind(tid); + if (p != NULL) { + if (SV_PROC_ABI(p) != SV_ABI_LINUX) { + /* + * p is not a Linuxulator process. + */ + PROC_UNLOCK(p); + return (NULL); + } + FOREACH_THREAD_IN_PROC(p, tdt) { + em = em_find(tdt); + if (tid == em->em_tid) + return (tdt); + } + PROC_UNLOCK(p); + } + return (NULL); + } + + return (tdt); +} + +void +linux_to_bsd_waitopts(int options, int *bsdopts) +{ + + if (options & LINUX_WNOHANG) + *bsdopts |= WNOHANG; + if (options & LINUX_WUNTRACED) + *bsdopts |= WUNTRACED; + if (options & LINUX_WEXITED) + *bsdopts |= WEXITED; + if (options & LINUX_WCONTINUED) + *bsdopts |= WCONTINUED; + if (options & LINUX_WNOWAIT) + *bsdopts |= WNOWAIT; + + if (options & __WCLONE) + *bsdopts |= WLINUXCLONE; +} diff --git a/sys/compat/linux/linux_misc.h b/sys/compat/linux/linux_misc.h index 51135d8dd629..08bc85fd936c 100644 --- a/sys/compat/linux/linux_misc.h +++ b/sys/compat/linux/linux_misc.h @@ -31,6 +31,11 @@ #ifndef _LINUX_MISC_H_ #define _LINUX_MISC_H_ +#include + + /* bits per mask */ +#define LINUX_NFDBITS sizeof(l_fd_mask) * 8 + /* * Miscellaneous */ @@ -57,7 +62,7 @@ #define LINUX_PATH_MAX 4096 -extern const char *linux_platform; +extern const char *linux_kplatform; /* * Non-standard aux entry types used in Linux ELF binaries. @@ -70,7 +75,12 @@ extern const char *linux_platform; #define LINUX_AT_BASE_PLATFORM 24 /* string identifying real platform, may * differ from AT_PLATFORM. */ +#define LINUX_AT_RANDOM 25 /* address of random bytes */ #define LINUX_AT_EXECFN 31 /* filename of program */ +#define LINUX_AT_SYSINFO 32 /* vsyscall */ +#define LINUX_AT_SYSINFO_EHDR 33 /* vdso header */ + +#define LINUX_AT_RANDOM_LEN 16 /* size of random bytes */ /* Linux sets the i387 to extended precision. */ #if defined(__i386__) || defined(__amd64__) @@ -90,10 +100,6 @@ extern const char *linux_platform; #define LINUX_CLONE_CHILD_CLEARTID 0x00200000 #define LINUX_CLONE_CHILD_SETTID 0x01000000 -#define LINUX_THREADING_FLAGS \ - (LINUX_CLONE_VM | LINUX_CLONE_FS | LINUX_CLONE_FILES | \ - LINUX_CLONE_SIGHAND | LINUX_CLONE_THREAD) - /* Scheduling policies */ #define LINUX_SCHED_OTHER 0 #define LINUX_SCHED_FIFO 1 @@ -115,13 +121,37 @@ struct l_new_utsname { #define LINUX_CLOCK_REALTIME_HR 4 #define LINUX_CLOCK_MONOTONIC_HR 5 +#define LINUX_UTIME_NOW 0x3FFFFFFF +#define LINUX_UTIME_OMIT 0x3FFFFFFE + extern int stclohz; -#define __WCLONE 0x80000000 +#define LINUX_WNOHANG 0x00000001 +#define LINUX_WUNTRACED 0x00000002 +#define LINUX_WSTOPPED LINUX_WUNTRACED +#define LINUX_WEXITED 0x00000004 +#define LINUX_WCONTINUED 0x00000008 +#define LINUX_WNOWAIT 0x01000000 + + +#define __WNOTHREAD 0x20000000 +#define __WALL 0x40000000 +#define __WCLONE 0x80000000 + +/* Linux waitid idtype */ +#define LINUX_P_ALL 0 +#define LINUX_P_PID 1 +#define LINUX_P_PGID 2 + +#define LINUX_RLIM_INFINITY (~0UL) int linux_common_wait(struct thread *td, int pid, int *status, int options, struct rusage *ru); +void linux_to_bsd_waitopts(int options, int *bsdopts); int linux_set_upcall_kse(struct thread *td, register_t stack); int linux_set_cloned_tls(struct thread *td, void *desc); +struct thread *linux_tdfind(struct thread *, lwpid_t, pid_t); + +int linux_sysctl_debug(SYSCTL_HANDLER_ARGS); #endif /* _LINUX_MISC_H_ */ diff --git a/sys/compat/linux/linux_signal.c b/sys/compat/linux/linux_signal.c index 1c778f9fba7b..0ecf537467c3 100644 --- a/sys/compat/linux/linux_signal.c +++ b/sys/compat/linux/linux_signal.c @@ -53,40 +53,12 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include -void -linux_to_bsd_sigset(l_sigset_t *lss, sigset_t *bss) -{ - int b, l; +static int linux_do_tkill(struct thread *td, struct thread *tdt, + ksiginfo_t *ksi); +static void sicode_to_lsicode(int si_code, int *lsi_code); - SIGEMPTYSET(*bss); - bss->__bits[0] = lss->__bits[0] & ~((1U << LINUX_SIGTBLSZ) - 1); - bss->__bits[1] = lss->__bits[1]; - for (l = 1; l <= LINUX_SIGTBLSZ; l++) { - if (LINUX_SIGISMEMBER(*lss, l)) { - b = linux_to_bsd_signal[_SIG_IDX(l)]; - if (b) - SIGADDSET(*bss, b); - } - } -} - -void -bsd_to_linux_sigset(sigset_t *bss, l_sigset_t *lss) -{ - int b, l; - - LINUX_SIGEMPTYSET(*lss); - lss->__bits[0] = bss->__bits[0] & ~((1U << LINUX_SIGTBLSZ) - 1); - lss->__bits[1] = bss->__bits[1]; - for (b = 1; b <= LINUX_SIGTBLSZ; b++) { - if (SIGISMEMBER(*bss, b)) { - l = bsd_to_linux_signal[_SIG_IDX(b)]; - if (l) - LINUX_SIGADDSET(*lss, l); - } - } -} static void linux_to_bsd_sigaction(l_sigaction_t *lsa, struct sigaction *bsa) @@ -155,11 +127,7 @@ linux_do_sigaction(struct thread *td, int linux_sig, l_sigaction_t *linux_nsa, linux_to_bsd_sigaction(linux_nsa, nsa); } else nsa = NULL; - - if (linux_sig <= LINUX_SIGTBLSZ) - sig = linux_to_bsd_signal[_SIG_IDX(linux_sig)]; - else - sig = linux_sig; + sig = linux_to_bsd_signal(linux_sig); error = kern_sigaction(td, sig, nsa, osa, 0); if (error) @@ -171,7 +139,7 @@ linux_do_sigaction(struct thread *td, int linux_sig, l_sigaction_t *linux_nsa, return (0); } - +#if defined(__i386__) || (defined(__amd64__) && defined(COMPAT_LINUX32)) int linux_signal(struct thread *td, struct linux_signal_args *args) { @@ -193,6 +161,7 @@ linux_signal(struct thread *td, struct linux_signal_args *args) return (error); } +#endif /* __i386__ || (__amd64__ && COMPAT_LINUX32) */ int linux_rt_sigaction(struct thread *td, struct linux_rt_sigaction_args *args) @@ -262,6 +231,7 @@ linux_do_sigprocmask(struct thread *td, int how, l_sigset_t *new, return (error); } +#if defined(__i386__) || (defined(__amd64__) && defined(COMPAT_LINUX32)) int linux_sigprocmask(struct thread *td, struct linux_sigprocmask_args *args) { @@ -279,7 +249,7 @@ linux_sigprocmask(struct thread *td, struct linux_sigprocmask_args *args) if (error) return (error); LINUX_SIGEMPTYSET(set); - set.__bits[0] = mask; + set.__mask = mask; } error = linux_do_sigprocmask(td, args->how, @@ -287,12 +257,13 @@ linux_sigprocmask(struct thread *td, struct linux_sigprocmask_args *args) args->omask ? &oset : NULL); if (args->omask != NULL && !error) { - mask = oset.__bits[0]; + mask = oset.__mask; error = copyout(&mask, args->omask, sizeof(l_osigset_t)); } return (error); } +#endif /* __i386__ || (__amd64__ && COMPAT_LINUX32) */ int linux_rt_sigprocmask(struct thread *td, struct linux_rt_sigprocmask_args *args) @@ -327,6 +298,7 @@ linux_rt_sigprocmask(struct thread *td, struct linux_rt_sigprocmask_args *args) return (error); } +#if defined(__i386__) || (defined(__amd64__) && defined(COMPAT_LINUX32)) int linux_sgetmask(struct thread *td, struct linux_sgetmask_args *args) { @@ -341,7 +313,7 @@ linux_sgetmask(struct thread *td, struct linux_sgetmask_args *args) PROC_LOCK(p); bsd_to_linux_sigset(&td->td_sigmask, &mask); PROC_UNLOCK(p); - td->td_retval[0] = mask.__bits[0]; + td->td_retval[0] = mask.__mask; return (0); } @@ -359,9 +331,9 @@ linux_ssetmask(struct thread *td, struct linux_ssetmask_args *args) PROC_LOCK(p); bsd_to_linux_sigset(&td->td_sigmask, &lset); - td->td_retval[0] = lset.__bits[0]; + td->td_retval[0] = lset.__mask; LINUX_SIGEMPTYSET(lset); - lset.__bits[0] = args->mask; + lset.__mask = args->mask; linux_to_bsd_sigset(&lset, &bset); td->td_sigmask = bset; SIG_CANTMASK(td->td_sigmask); @@ -370,9 +342,6 @@ linux_ssetmask(struct thread *td, struct linux_ssetmask_args *args) return (0); } -/* - * MPSAFE - */ int linux_sigpending(struct thread *td, struct linux_sigpending_args *args) { @@ -392,9 +361,10 @@ linux_sigpending(struct thread *td, struct linux_sigpending_args *args) SIGSETAND(bset, td->td_sigmask); PROC_UNLOCK(p); bsd_to_linux_sigset(&bset, &lset); - mask = lset.__bits[0]; + mask = lset.__mask; return (copyout(&mask, args->mask, sizeof(mask))); } +#endif /* __i386__ || (__amd64__ && COMPAT_LINUX32) */ /* * MPSAFE @@ -458,8 +428,8 @@ linux_rt_sigtimedwait(struct thread *td, #ifdef DEBUG if (ldebug(rt_sigtimedwait)) printf(LMSG("linux_rt_sigtimedwait: " - "incoming timeout (%d/%d)\n"), - ltv.tv_sec, ltv.tv_usec); + "incoming timeout (%jd/%jd)\n"), + (intmax_t)ltv.tv_sec, (intmax_t)ltv.tv_usec); #endif tv.tv_sec = (long)ltv.tv_sec; tv.tv_usec = (suseconds_t)ltv.tv_usec; @@ -495,7 +465,7 @@ linux_rt_sigtimedwait(struct thread *td, if (error) return (error); - sig = BSD_TO_LINUX_SIGNAL(info.ksi_signo); + sig = bsd_to_linux_signal(info.ksi_signo); if (args->ptr) { memset(&linfo, 0, sizeof(linfo)); @@ -527,66 +497,31 @@ linux_kill(struct thread *td, struct linux_kill_args *args) if (!LINUX_SIG_VALID(args->signum) && args->signum != 0) return (EINVAL); - if (args->signum > 0 && args->signum <= LINUX_SIGTBLSZ) - tmp.signum = linux_to_bsd_signal[_SIG_IDX(args->signum)]; + if (args->signum > 0) + tmp.signum = linux_to_bsd_signal(args->signum); else - tmp.signum = args->signum; + tmp.signum = 0; tmp.pid = args->pid; return (sys_kill(td, &tmp)); } static int -linux_do_tkill(struct thread *td, l_int tgid, l_int pid, l_int signum) +linux_do_tkill(struct thread *td, struct thread *tdt, ksiginfo_t *ksi) { - struct proc *proc = td->td_proc; - struct linux_emuldata *em; struct proc *p; - ksiginfo_t ksi; int error; - AUDIT_ARG_SIGNUM(signum); - AUDIT_ARG_PID(pid); - - /* - * Allow signal 0 as a means to check for privileges - */ - if (!LINUX_SIG_VALID(signum) && signum != 0) - return (EINVAL); - - if (signum > 0 && signum <= LINUX_SIGTBLSZ) - signum = linux_to_bsd_signal[_SIG_IDX(signum)]; - - if ((p = pfind(pid)) == NULL) { - if ((p = zpfind(pid)) == NULL) - return (ESRCH); - } - + p = tdt->td_proc; + AUDIT_ARG_SIGNUM(ksi->ksi_signo); + AUDIT_ARG_PID(p->p_pid); AUDIT_ARG_PROCESS(p); - error = p_cansignal(td, p, signum); - if (error != 0 || signum == 0) + + error = p_cansignal(td, p, ksi->ksi_signo); + if (error != 0 || ksi->ksi_signo == 0) goto out; - error = ESRCH; - em = em_find(p, EMUL_DONTLOCK); - - if (em == NULL) { -#ifdef DEBUG - printf("emuldata not found in do_tkill.\n"); -#endif - goto out; - } - if (tgid > 0 && em->shared->group_pid != tgid) - goto out; - - ksiginfo_init(&ksi); - ksi.ksi_signo = signum; - ksi.ksi_code = LINUX_SI_TKILL; - ksi.ksi_errno = 0; - ksi.ksi_pid = proc->p_pid; - ksi.ksi_uid = proc->p_ucred->cr_ruid; - - error = pksignal(p, ksi.ksi_signo, &ksi); + tdksignal(tdt, ksi->ksi_signo, ksi); out: PROC_UNLOCK(p); @@ -596,20 +531,53 @@ linux_do_tkill(struct thread *td, l_int tgid, l_int pid, l_int signum) int linux_tgkill(struct thread *td, struct linux_tgkill_args *args) { + struct thread *tdt; + ksiginfo_t ksi; + int sig; #ifdef DEBUG if (ldebug(tgkill)) - printf(ARGS(tgkill, "%d, %d, %d"), args->tgid, args->pid, args->sig); + printf(ARGS(tgkill, "%d, %d, %d"), + args->tgid, args->pid, args->sig); #endif + if (args->pid <= 0 || args->tgid <=0) return (EINVAL); - return (linux_do_tkill(td, args->tgid, args->pid, args->sig)); + /* + * Allow signal 0 as a means to check for privileges + */ + if (!LINUX_SIG_VALID(args->sig) && args->sig != 0) + return (EINVAL); + + if (args->sig > 0) + sig = linux_to_bsd_signal(args->sig); + else + sig = 0; + + tdt = linux_tdfind(td, args->pid, args->tgid); + if (tdt == NULL) + return (ESRCH); + + ksiginfo_init(&ksi); + ksi.ksi_signo = sig; + ksi.ksi_code = SI_LWP; + ksi.ksi_errno = 0; + ksi.ksi_pid = td->td_proc->p_pid; + ksi.ksi_uid = td->td_proc->p_ucred->cr_ruid; + return (linux_do_tkill(td, tdt, &ksi)); } +/* + * Deprecated since 2.5.75. Replaced by tgkill(). + */ int linux_tkill(struct thread *td, struct linux_tkill_args *args) { + struct thread *tdt; + ksiginfo_t ksi; + int sig; + #ifdef DEBUG if (ldebug(tkill)) printf(ARGS(tkill, "%i, %i"), args->tid, args->sig); @@ -617,40 +585,182 @@ linux_tkill(struct thread *td, struct linux_tkill_args *args) if (args->tid <= 0) return (EINVAL); - return (linux_do_tkill(td, 0, args->tid, args->sig)); + if (!LINUX_SIG_VALID(args->sig)) + return (EINVAL); + + sig = linux_to_bsd_signal(args->sig); + + tdt = linux_tdfind(td, args->tid, -1); + if (tdt == NULL) + return (ESRCH); + + ksiginfo_init(&ksi); + ksi.ksi_signo = sig; + ksi.ksi_code = SI_LWP; + ksi.ksi_errno = 0; + ksi.ksi_pid = td->td_proc->p_pid; + ksi.ksi_uid = td->td_proc->p_ucred->cr_ruid; + return (linux_do_tkill(td, tdt, &ksi)); } void -ksiginfo_to_lsiginfo(ksiginfo_t *ksi, l_siginfo_t *lsi, l_int sig) +ksiginfo_to_lsiginfo(const ksiginfo_t *ksi, l_siginfo_t *lsi, l_int sig) { - lsi->lsi_signo = sig; - lsi->lsi_code = ksi->ksi_code; + siginfo_to_lsiginfo(&ksi->ksi_info, lsi, sig); +} - switch (sig) { - case LINUX_SIGPOLL: - /* XXX si_fd? */ - lsi->lsi_band = ksi->ksi_band; +static void +sicode_to_lsicode(int si_code, int *lsi_code) +{ + + switch (si_code) { + case SI_USER: + *lsi_code = LINUX_SI_USER; break; - case LINUX_SIGCHLD: - lsi->lsi_pid = ksi->ksi_pid; - lsi->lsi_uid = ksi->ksi_uid; - lsi->lsi_status = ksi->ksi_status; + case SI_KERNEL: + *lsi_code = LINUX_SI_KERNEL; break; - case LINUX_SIGBUS: - case LINUX_SIGILL: - case LINUX_SIGFPE: - case LINUX_SIGSEGV: - lsi->lsi_addr = PTROUT(ksi->ksi_addr); + case SI_QUEUE: + *lsi_code = LINUX_SI_QUEUE; + break; + case SI_TIMER: + *lsi_code = LINUX_SI_TIMER; + break; + case SI_MESGQ: + *lsi_code = LINUX_SI_MESGQ; + break; + case SI_ASYNCIO: + *lsi_code = LINUX_SI_ASYNCIO; + break; + case SI_LWP: + *lsi_code = LINUX_SI_TKILL; break; default: - /* XXX SI_TIMER etc... */ - lsi->lsi_pid = ksi->ksi_pid; - lsi->lsi_uid = ksi->ksi_uid; + *lsi_code = si_code; break; } - if (sig >= LINUX_SIGRTMIN) { - lsi->lsi_int = ksi->ksi_info.si_value.sival_int; - lsi->lsi_ptr = PTROUT(ksi->ksi_info.si_value.sival_ptr); +} + +void +siginfo_to_lsiginfo(const siginfo_t *si, l_siginfo_t *lsi, l_int sig) +{ + + /* sig alredy converted */ + lsi->lsi_signo = sig; + sicode_to_lsicode(si->si_code, &lsi->lsi_code); + + switch (si->si_code) { + case SI_LWP: + lsi->lsi_pid = si->si_pid; + lsi->lsi_uid = si->si_uid; + break; + + case SI_TIMER: + lsi->lsi_int = si->si_value.sival_int; + lsi->lsi_ptr = PTROUT(si->si_value.sival_ptr); + lsi->lsi_tid = si->si_timerid; + break; + + case SI_QUEUE: + lsi->lsi_pid = si->si_pid; + lsi->lsi_uid = si->si_uid; + lsi->lsi_ptr = PTROUT(si->si_value.sival_ptr); + break; + + case SI_ASYNCIO: + lsi->lsi_int = si->si_value.sival_int; + lsi->lsi_ptr = PTROUT(si->si_value.sival_ptr); + break; + + default: + switch (sig) { + case LINUX_SIGPOLL: + /* XXX si_fd? */ + lsi->lsi_band = si->si_band; + break; + + case LINUX_SIGCHLD: + lsi->lsi_errno = 0; + lsi->lsi_pid = si->si_pid; + lsi->lsi_uid = si->si_uid; + + if (si->si_code == CLD_STOPPED) + lsi->lsi_status = bsd_to_linux_signal(si->si_status); + else if (si->si_code == CLD_CONTINUED) + lsi->lsi_status = bsd_to_linux_signal(SIGCONT); + else + lsi->lsi_status = si->si_status; + break; + + case LINUX_SIGBUS: + case LINUX_SIGILL: + case LINUX_SIGFPE: + case LINUX_SIGSEGV: + lsi->lsi_addr = PTROUT(si->si_addr); + break; + + default: + lsi->lsi_pid = si->si_pid; + lsi->lsi_uid = si->si_uid; + if (sig >= LINUX_SIGRTMIN) { + lsi->lsi_int = si->si_value.sival_int; + lsi->lsi_ptr = PTROUT(si->si_value.sival_ptr); + } + break; + } + break; } } + +void +lsiginfo_to_ksiginfo(const l_siginfo_t *lsi, ksiginfo_t *ksi, int sig) +{ + + ksi->ksi_signo = sig; + ksi->ksi_code = lsi->lsi_code; /* XXX. Convert. */ + ksi->ksi_pid = lsi->lsi_pid; + ksi->ksi_uid = lsi->lsi_uid; + ksi->ksi_status = lsi->lsi_status; + ksi->ksi_addr = PTRIN(lsi->lsi_addr); + ksi->ksi_info.si_value.sival_int = lsi->lsi_int; +} + +int +linux_rt_sigqueueinfo(struct thread *td, struct linux_rt_sigqueueinfo_args *args) +{ + l_siginfo_t linfo; + struct proc *p; + ksiginfo_t ksi; + int error; + int sig; + + if (!LINUX_SIG_VALID(args->sig)) + return (EINVAL); + + error = copyin(args->info, &linfo, sizeof(linfo)); + if (error != 0) + return (error); + + if (linfo.lsi_code >= 0) + return (EPERM); + + sig = linux_to_bsd_signal(args->sig); + + error = ESRCH; + if ((p = pfind(args->pid)) != NULL || + (p = zpfind(args->pid)) != NULL) { + error = p_cansignal(td, p, sig); + if (error != 0) { + PROC_UNLOCK(p); + return (error); + } + + ksiginfo_init(&ksi); + lsiginfo_to_ksiginfo(&linfo, &ksi, sig); + error = tdsendsignal(p, NULL, sig, &ksi); + PROC_UNLOCK(p); + } + + return (error); +} diff --git a/sys/compat/linux/linux_signal.h b/sys/compat/linux/linux_signal.h index 426cf43566cb..510bfb38397c 100644 --- a/sys/compat/linux/linux_signal.h +++ b/sys/compat/linux/linux_signal.h @@ -31,19 +31,21 @@ #ifndef _LINUX_SIGNAL_H_ #define _LINUX_SIGNAL_H_ -#define LINUX_SI_TKILL -6; +/* + * si_code values + */ +#define LINUX_SI_USER 0 /* sent by kill, sigsend, raise */ +#define LINUX_SI_KERNEL 0x80 /* sent by the kernel from somewhere */ +#define LINUX_SI_QUEUE -1 /* sent by sigqueue */ +#define LINUX_SI_TIMER -2 /* sent by timer expiration */ +#define LINUX_SI_MESGQ -3 /* sent by real time mesq state change */ +#define LINUX_SI_ASYNCIO -4 /* sent by AIO completion */ +#define LINUX_SI_SIGIO -5 /* sent by queued SIGIO */ +#define LINUX_SI_TKILL -6 /* sent by tkill system call */ -extern int bsd_to_linux_signal[]; -extern int linux_to_bsd_signal[]; - -void linux_to_bsd_sigset(l_sigset_t *, sigset_t *); -void bsd_to_linux_sigset(sigset_t *, l_sigset_t *); int linux_do_sigaction(struct thread *, int, l_sigaction_t *, l_sigaction_t *); -void ksiginfo_to_lsiginfo(ksiginfo_t *ksi, l_siginfo_t *lsi, l_int sig); - -#define LINUX_SIG_VALID(sig) ((sig) <= LINUX_NSIG && (sig) > 0) - -#define BSD_TO_LINUX_SIGNAL(sig) \ - (((sig) <= LINUX_SIGTBLSZ) ? bsd_to_linux_signal[_SIG_IDX(sig)] : sig) +void ksiginfo_to_lsiginfo(const ksiginfo_t *ksi, l_siginfo_t *lsi, l_int sig); +void siginfo_to_lsiginfo(const siginfo_t *si, l_siginfo_t *lsi, l_int sig); +void lsiginfo_to_ksiginfo(const l_siginfo_t *lsi, ksiginfo_t *ksi, int sig); #endif /* _LINUX_SIGNAL_H_ */ diff --git a/sys/compat/linux/linux_socket.c b/sys/compat/linux/linux_socket.c index f43378795244..7d52943a131f 100644 --- a/sys/compat/linux/linux_socket.c +++ b/sys/compat/linux/linux_socket.c @@ -70,10 +70,17 @@ __FBSDID("$FreeBSD$"); #include #include #endif +#include #include +#include #include static int linux_to_bsd_domain(int); +static int linux_sendmsg_common(struct thread *, l_int, struct l_msghdr *, + l_uint); +static int linux_recvmsg_common(struct thread *, l_int, struct l_msghdr *, + l_uint, struct msghdr *); +static int linux_set_socket_flags(int, int *); /* * Reads a linux sockaddr and does any necessary translation. @@ -428,7 +435,6 @@ linux_to_bsd_sockaddr(struct sockaddr *arg, int len) return (error); } - static int linux_sa_put(struct osockaddr *osa) { @@ -477,6 +483,8 @@ bsd_to_linux_cmsg_type(int cmsg_type) return (LINUX_SCM_RIGHTS); case SCM_CREDS: return (LINUX_SCM_CREDENTIALS); + case SCM_TIMESTAMP: + return (LINUX_SCM_TIMESTAMP); } return (-1); } @@ -529,20 +537,15 @@ bsd_to_linux_msghdr(const struct msghdr *bhdr, struct l_msghdr *lhdr) } static int -linux_set_socket_flags(struct thread *td, int s, int flags) +linux_set_socket_flags(int lflags, int *flags) { - int error; - if (flags & LINUX_SOCK_NONBLOCK) { - error = kern_fcntl(td, s, F_SETFL, O_NONBLOCK); - if (error) - return (error); - } - if (flags & LINUX_SOCK_CLOEXEC) { - error = kern_fcntl(td, s, F_SETFD, FD_CLOEXEC); - if (error) - return (error); - } + if (lflags & ~(LINUX_SOCK_CLOEXEC | LINUX_SOCK_NONBLOCK)) + return (EINVAL); + if (lflags & LINUX_SOCK_NONBLOCK) + *flags |= SOCK_NONBLOCK; + if (lflags & LINUX_SOCK_CLOEXEC) + *flags |= SOCK_CLOEXEC; return (0); } @@ -585,15 +588,6 @@ linux_check_hdrincl(struct thread *td, int s) return (optval == 0); } -struct linux_sendto_args { - int s; - l_uintptr_t msg; - int len; - int flags; - l_uintptr_t to; - int tolen; -}; - /* * Updated sendto() when IP_HDRINCL is set: * tweak endian-dependent fields in the IP packet. @@ -618,7 +612,7 @@ linux_sendto_hdrincl(struct thread *td, struct linux_sendto_args *linux_args) linux_args->len > IP_MAXPACKET) return (EINVAL); - packet = (struct ip *)malloc(linux_args->len, M_TEMP, M_WAITOK); + packet = (struct ip *)malloc(linux_args->len, M_LINUX, M_WAITOK); /* Make kernel copy of the packet to be sent */ if ((error = copyin(PTRIN(linux_args->msg), packet, @@ -641,17 +635,11 @@ linux_sendto_hdrincl(struct thread *td, struct linux_sendto_args *linux_args) error = linux_sendit(td, linux_args->s, &msg, linux_args->flags, NULL, UIO_SYSSPACE); goout: - free(packet, M_TEMP); + free(packet, M_LINUX); return (error); } -struct linux_socket_args { - int domain; - int type; - int protocol; -}; - -static int +int linux_socket(struct thread *td, struct linux_socket_args *args) { struct socket_args /* { @@ -659,15 +647,16 @@ linux_socket(struct thread *td, struct linux_socket_args *args) int type; int protocol; } */ bsd_args; - int retval_socket, socket_flags; + int retval_socket; bsd_args.protocol = args->protocol; - socket_flags = args->type & ~LINUX_SOCK_TYPE_MASK; - if (socket_flags & ~(LINUX_SOCK_CLOEXEC | LINUX_SOCK_NONBLOCK)) - return (EINVAL); bsd_args.type = args->type & LINUX_SOCK_TYPE_MASK; if (bsd_args.type < 0 || bsd_args.type > LINUX_SOCK_MAX) return (EINVAL); + retval_socket = linux_set_socket_flags(args->type & ~LINUX_SOCK_TYPE_MASK, + &bsd_args.type); + if (retval_socket != 0) + return (retval_socket); bsd_args.domain = linux_to_bsd_domain(args->domain); if (bsd_args.domain == -1) return (EAFNOSUPPORT); @@ -676,13 +665,6 @@ linux_socket(struct thread *td, struct linux_socket_args *args) if (retval_socket) return (retval_socket); - retval_socket = linux_set_socket_flags(td, td->td_retval[0], - socket_flags); - if (retval_socket) { - (void)kern_close(td, td->td_retval[0]); - goto out; - } - if (bsd_args.type == SOCK_RAW && (bsd_args.protocol == IPPROTO_RAW || bsd_args.protocol == 0) && bsd_args.domain == PF_INET) { @@ -711,17 +693,10 @@ linux_socket(struct thread *td, struct linux_socket_args *args) } #endif -out: return (retval_socket); } -struct linux_bind_args { - int s; - l_uintptr_t name; - int namelen; -}; - -static int +int linux_bind(struct thread *td, struct linux_bind_args *args) { struct sockaddr *sa; @@ -739,13 +714,6 @@ linux_bind(struct thread *td, struct linux_bind_args *args) return (error); } -struct linux_connect_args { - int s; - l_uintptr_t name; - int namelen; -}; -int linux_connect(struct thread *, struct linux_connect_args *); - int linux_connect(struct thread *td, struct linux_connect_args *args) { @@ -790,12 +758,7 @@ linux_connect(struct thread *td, struct linux_connect_args *args) return (error); } -struct linux_listen_args { - int s; - int backlog; -}; - -static int +int linux_listen(struct thread *td, struct linux_listen_args *args) { struct listen_args /* { @@ -812,43 +775,30 @@ static int linux_accept_common(struct thread *td, int s, l_uintptr_t addr, l_uintptr_t namelen, int flags) { - struct accept_args /* { + struct accept4_args /* { int s; struct sockaddr * __restrict name; socklen_t * __restrict anamelen; + int flags; } */ bsd_args; int error; - if (flags & ~(LINUX_SOCK_CLOEXEC | LINUX_SOCK_NONBLOCK)) - return (EINVAL); - bsd_args.s = s; /* XXX: */ bsd_args.name = (struct sockaddr * __restrict)PTRIN(addr); bsd_args.anamelen = PTRIN(namelen);/* XXX */ - error = sys_accept(td, &bsd_args); + error = linux_set_socket_flags(flags, &bsd_args.flags); + if (error != 0) + return (error); + error = sys_accept4(td, &bsd_args); bsd_to_linux_sockaddr((struct sockaddr *)bsd_args.name); if (error) { if (error == EFAULT && namelen != sizeof(struct sockaddr_in)) return (EINVAL); return (error); } - - /* - * linux appears not to copy flags from the parent socket to the - * accepted one, so we must clear the flags in the new descriptor - * and apply the requested flags. - */ - error = kern_fcntl(td, td->td_retval[0], F_SETFL, 0); - if (error) - goto out; - error = linux_set_socket_flags(td, td->td_retval[0], flags); - if (error) - goto out; if (addr) error = linux_sa_put(PTRIN(addr)); - -out: if (error) { (void)kern_close(td, td->td_retval[0]); td->td_retval[0] = 0; @@ -856,13 +806,7 @@ linux_accept_common(struct thread *td, int s, l_uintptr_t addr, return (error); } -struct linux_accept_args { - int s; - l_uintptr_t addr; - l_uintptr_t namelen; -}; - -static int +int linux_accept(struct thread *td, struct linux_accept_args *args) { @@ -870,14 +814,7 @@ linux_accept(struct thread *td, struct linux_accept_args *args) args->namelen, 0)); } -struct linux_accept4_args { - int s; - l_uintptr_t addr; - l_uintptr_t namelen; - int flags; -}; - -static int +int linux_accept4(struct thread *td, struct linux_accept4_args *args) { @@ -885,13 +822,7 @@ linux_accept4(struct thread *td, struct linux_accept4_args *args) args->namelen, args->flags)); } -struct linux_getsockname_args { - int s; - l_uintptr_t addr; - l_uintptr_t namelen; -}; - -static int +int linux_getsockname(struct thread *td, struct linux_getsockname_args *args) { struct getsockname_args /* { @@ -915,13 +846,7 @@ linux_getsockname(struct thread *td, struct linux_getsockname_args *args) return (0); } -struct linux_getpeername_args { - int s; - l_uintptr_t addr; - l_uintptr_t namelen; -}; - -static int +int linux_getpeername(struct thread *td, struct linux_getpeername_args *args) { struct getpeername_args /* { @@ -944,14 +869,7 @@ linux_getpeername(struct thread *td, struct linux_getpeername_args *args) return (0); } -struct linux_socketpair_args { - int domain; - int type; - int protocol; - l_uintptr_t rsv; -}; - -static int +int linux_socketpair(struct thread *td, struct linux_socketpair_args *args) { struct socketpair_args /* { @@ -960,20 +878,18 @@ linux_socketpair(struct thread *td, struct linux_socketpair_args *args) int protocol; int *rsv; } */ bsd_args; - int error, socket_flags; - int sv[2]; + int error; bsd_args.domain = linux_to_bsd_domain(args->domain); if (bsd_args.domain != PF_LOCAL) return (EAFNOSUPPORT); - - socket_flags = args->type & ~LINUX_SOCK_TYPE_MASK; - if (socket_flags & ~(LINUX_SOCK_CLOEXEC | LINUX_SOCK_NONBLOCK)) - return (EINVAL); bsd_args.type = args->type & LINUX_SOCK_TYPE_MASK; if (bsd_args.type < 0 || bsd_args.type > LINUX_SOCK_MAX) return (EINVAL); - + error = linux_set_socket_flags(args->type & ~LINUX_SOCK_TYPE_MASK, + &bsd_args.type); + if (error != 0) + return (error); if (args->protocol != 0 && args->protocol != PF_UNIX) /* @@ -986,27 +902,10 @@ linux_socketpair(struct thread *td, struct linux_socketpair_args *args) else bsd_args.protocol = 0; bsd_args.rsv = (int *)PTRIN(args->rsv); - error = kern_socketpair(td, bsd_args.domain, bsd_args.type, - bsd_args.protocol, sv); - if (error) - return (error); - error = linux_set_socket_flags(td, sv[0], socket_flags); - if (error) - goto out; - error = linux_set_socket_flags(td, sv[1], socket_flags); - if (error) - goto out; - - error = copyout(sv, bsd_args.rsv, 2 * sizeof(int)); - -out: - if (error) { - (void)kern_close(td, sv[0]); - (void)kern_close(td, sv[1]); - } - return (error); + return (sys_socketpair(td, &bsd_args)); } +#if defined(__i386__) || (defined(__amd64__) && defined(COMPAT_LINUX32)) struct linux_send_args { int s; l_uintptr_t msg; @@ -1062,8 +961,9 @@ linux_recv(struct thread *td, struct linux_recv_args *args) bsd_args.fromlenaddr = 0; return (sys_recvfrom(td, &bsd_args)); } +#endif /* __i386__ || (__amd64__ && COMPAT_LINUX32) */ -static int +int linux_sendto(struct thread *td, struct linux_sendto_args *args) { struct msghdr msg; @@ -1087,63 +987,58 @@ linux_sendto(struct thread *td, struct linux_sendto_args *args) return (error); } -struct linux_recvfrom_args { - int s; - l_uintptr_t buf; - int len; - int flags; - l_uintptr_t from; - l_uintptr_t fromlen; -}; - -static int +int linux_recvfrom(struct thread *td, struct linux_recvfrom_args *args) { - struct recvfrom_args /* { - int s; - caddr_t buf; - size_t len; - int flags; - struct sockaddr * __restrict from; - socklen_t * __restrict fromlenaddr; - } */ bsd_args; - size_t len; + struct msghdr msg; + struct iovec aiov; int error; - if ((error = copyin(PTRIN(args->fromlen), &len, sizeof(size_t)))) + if (PTRIN(args->fromlen) != NULL) { + error = copyin(PTRIN(args->fromlen), &msg.msg_namelen, + sizeof(msg.msg_namelen)); + if (error != 0) + return (error); + + error = linux_to_bsd_sockaddr((struct sockaddr *)PTRIN(args->from), + msg.msg_namelen); + if (error != 0) + return (error); + } else + msg.msg_namelen = 0; + + msg.msg_name = (struct sockaddr * __restrict)PTRIN(args->from); + msg.msg_iov = &aiov; + msg.msg_iovlen = 1; + aiov.iov_base = PTRIN(args->buf); + aiov.iov_len = args->len; + msg.msg_control = 0; + msg.msg_flags = linux_to_bsd_msg_flags(args->flags); + + error = kern_recvit(td, args->s, &msg, UIO_USERSPACE, NULL); + if (error != 0) return (error); - bsd_args.s = args->s; - bsd_args.buf = PTRIN(args->buf); - bsd_args.len = args->len; - bsd_args.flags = linux_to_bsd_msg_flags(args->flags); - /* XXX: */ - bsd_args.from = (struct sockaddr * __restrict)PTRIN(args->from); - bsd_args.fromlenaddr = PTRIN(args->fromlen);/* XXX */ - - linux_to_bsd_sockaddr((struct sockaddr *)bsd_args.from, len); - error = sys_recvfrom(td, &bsd_args); - bsd_to_linux_sockaddr((struct sockaddr *)bsd_args.from); - - if (error) - return (error); - if (args->from) { + if (PTRIN(args->from) != NULL) { + error = bsd_to_linux_sockaddr((struct sockaddr *) + PTRIN(args->from)); + if (error != 0) + return (error); + error = linux_sa_put((struct osockaddr *) PTRIN(args->from)); - if (error) - return (error); } - return (0); + + if (PTRIN(args->fromlen) != NULL) + error = copyout(&msg.msg_namelen, PTRIN(args->fromlen), + sizeof(msg.msg_namelen)); + + return (error); } -struct linux_sendmsg_args { - int s; - l_uintptr_t msg; - int flags; -}; - static int -linux_sendmsg(struct thread *td, struct linux_sendmsg_args *args) +linux_sendmsg_common(struct thread *td, l_int s, struct l_msghdr *msghdr, + l_uint flags) { struct cmsghdr *cmsg; struct cmsgcred cmcred; @@ -1159,8 +1054,8 @@ linux_sendmsg(struct thread *td, struct linux_sendmsg_args *args) void *data; int error; - error = copyin(PTRIN(args->msg), &linux_msg, sizeof(linux_msg)); - if (error) + error = copyin(msghdr, &linux_msg, sizeof(linux_msg)); + if (error != 0) return (error); /* @@ -1174,7 +1069,7 @@ linux_sendmsg(struct thread *td, struct linux_sendmsg_args *args) linux_msg.msg_control = PTROUT(NULL); error = linux_to_bsd_msghdr(&msg, &linux_msg); - if (error) + if (error != 0) return (error); #ifdef COMPAT_LINUX32 @@ -1183,29 +1078,27 @@ linux_sendmsg(struct thread *td, struct linux_sendmsg_args *args) #else error = copyiniov(msg.msg_iov, msg.msg_iovlen, &iov, EMSGSIZE); #endif - if (error) + if (error != 0) return (error); control = NULL; cmsg = NULL; if ((ptr_cmsg = LINUX_CMSG_FIRSTHDR(&linux_msg)) != NULL) { - error = kern_getsockname(td, args->s, &sa, &datalen); - if (error) + error = kern_getsockname(td, s, &sa, &datalen); + if (error != 0) goto bad; sa_family = sa->sa_family; free(sa, M_SONAME); error = ENOBUFS; - cmsg = malloc(CMSG_HDRSZ, M_TEMP, M_WAITOK | M_ZERO); + cmsg = malloc(CMSG_HDRSZ, M_LINUX, M_WAITOK|M_ZERO); control = m_get(M_WAITOK, MT_CONTROL); - if (control == NULL) - goto bad; do { error = copyin(ptr_cmsg, &linux_cmsg, sizeof(struct l_cmsghdr)); - if (error) + if (error != 0) goto bad; error = EINVAL; @@ -1269,28 +1162,60 @@ linux_sendmsg(struct thread *td, struct linux_sendmsg_args *args) msg.msg_iov = iov; msg.msg_flags = 0; - error = linux_sendit(td, args->s, &msg, args->flags, control, - UIO_USERSPACE); + error = linux_sendit(td, s, &msg, flags, control, UIO_USERSPACE); bad: + m_freem(control); free(iov, M_IOV); if (cmsg) - free(cmsg, M_TEMP); + free(cmsg, M_LINUX); return (error); } -struct linux_recvmsg_args { - int s; - l_uintptr_t msg; - int flags; -}; +int +linux_sendmsg(struct thread *td, struct linux_sendmsg_args *args) +{ + + return (linux_sendmsg_common(td, args->s, PTRIN(args->msg), + args->flags)); +} + +int +linux_sendmmsg(struct thread *td, struct linux_sendmmsg_args *args) +{ + struct l_mmsghdr *msg; + l_uint retval; + int error, datagrams; + + if (args->vlen > UIO_MAXIOV) + args->vlen = UIO_MAXIOV; + + msg = PTRIN(args->msg); + datagrams = 0; + while (datagrams < args->vlen) { + error = linux_sendmsg_common(td, args->s, &msg->msg_hdr, + args->flags); + if (error != 0) + break; + + retval = td->td_retval[0]; + error = copyout(&retval, &msg->msg_len, sizeof(msg->msg_len)); + if (error != 0) + break; + ++msg; + ++datagrams; + } + if (error == 0) + td->td_retval[0] = datagrams; + return (error); +} static int -linux_recvmsg(struct thread *td, struct linux_recvmsg_args *args) +linux_recvmsg_common(struct thread *td, l_int s, struct l_msghdr *msghdr, + l_uint flags, struct msghdr *msg) { struct cmsghdr *cm; struct cmsgcred *cmcred; - struct msghdr msg; struct l_cmsghdr *linux_cmsg = NULL; struct l_ucred linux_ucred; socklen_t datalen, outlen; @@ -1298,55 +1223,57 @@ linux_recvmsg(struct thread *td, struct linux_recvmsg_args *args) struct iovec *iov, *uiov; struct mbuf *control = NULL; struct mbuf **controlp; + struct timeval *ftmvl; + l_timeval ltmvl; caddr_t outbuf; void *data; int error, i, fd, fds, *fdp; - error = copyin(PTRIN(args->msg), &linux_msg, sizeof(linux_msg)); - if (error) + error = copyin(msghdr, &linux_msg, sizeof(linux_msg)); + if (error != 0) return (error); - error = linux_to_bsd_msghdr(&msg, &linux_msg); - if (error) + error = linux_to_bsd_msghdr(msg, &linux_msg); + if (error != 0) return (error); #ifdef COMPAT_LINUX32 - error = linux32_copyiniov(PTRIN(msg.msg_iov), msg.msg_iovlen, + error = linux32_copyiniov(PTRIN(msg->msg_iov), msg->msg_iovlen, &iov, EMSGSIZE); #else - error = copyiniov(msg.msg_iov, msg.msg_iovlen, &iov, EMSGSIZE); + error = copyiniov(msg->msg_iov, msg->msg_iovlen, &iov, EMSGSIZE); #endif - if (error) + if (error != 0) return (error); - if (msg.msg_name) { - error = linux_to_bsd_sockaddr((struct sockaddr *)msg.msg_name, - msg.msg_namelen); - if (error) + if (msg->msg_name) { + error = linux_to_bsd_sockaddr((struct sockaddr *)msg->msg_name, + msg->msg_namelen); + if (error != 0) goto bad; } - uiov = msg.msg_iov; - msg.msg_iov = iov; - controlp = (msg.msg_control != NULL) ? &control : NULL; - error = kern_recvit(td, args->s, &msg, UIO_USERSPACE, controlp); - msg.msg_iov = uiov; - if (error) + uiov = msg->msg_iov; + msg->msg_iov = iov; + controlp = (msg->msg_control != NULL) ? &control : NULL; + error = kern_recvit(td, s, msg, UIO_USERSPACE, controlp); + msg->msg_iov = uiov; + if (error != 0) goto bad; - error = bsd_to_linux_msghdr(&msg, &linux_msg); - if (error) + error = bsd_to_linux_msghdr(msg, &linux_msg); + if (error != 0) goto bad; if (linux_msg.msg_name) { error = bsd_to_linux_sockaddr((struct sockaddr *) PTRIN(linux_msg.msg_name)); - if (error) + if (error != 0) goto bad; } if (linux_msg.msg_name && linux_msg.msg_namelen > 2) { error = linux_sa_put(PTRIN(linux_msg.msg_name)); - if (error) + if (error != 0) goto bad; } @@ -1354,12 +1281,12 @@ linux_recvmsg(struct thread *td, struct linux_recvmsg_args *args) outlen = 0; if (control) { - linux_cmsg = malloc(L_CMSG_HDRSZ, M_TEMP, M_WAITOK | M_ZERO); + linux_cmsg = malloc(L_CMSG_HDRSZ, M_LINUX, M_WAITOK | M_ZERO); - msg.msg_control = mtod(control, struct cmsghdr *); - msg.msg_controllen = control->m_len; + msg->msg_control = mtod(control, struct cmsghdr *); + msg->msg_controllen = control->m_len; - cm = CMSG_FIRSTHDR(&msg); + cm = CMSG_FIRSTHDR(msg); while (cm != NULL) { linux_cmsg->cmsg_type = @@ -1379,7 +1306,7 @@ linux_recvmsg(struct thread *td, struct linux_recvmsg_args *args) switch (cm->cmsg_type) { case SCM_RIGHTS: - if (args->flags & LINUX_MSG_CMSG_CLOEXEC) { + if (flags & LINUX_MSG_CMSG_CLOEXEC) { fds = datalen / sizeof(int); fdp = data; for (i = 0; i < fds; i++) { @@ -1408,6 +1335,18 @@ linux_recvmsg(struct thread *td, struct linux_recvmsg_args *args) data = &linux_ucred; datalen = sizeof(linux_ucred); break; + + case SCM_TIMESTAMP: + if (datalen != sizeof(struct timeval)) { + error = EMSGSIZE; + goto bad; + } + ftmvl = (struct timeval *)data; + ltmvl.tv_sec = ftmvl->tv_sec; + ltmvl.tv_usec = ftmvl->tv_usec; + data = <mvl; + datalen = sizeof(ltmvl); + break; } if (outlen + LINUX_CMSG_LEN(datalen) > @@ -1436,28 +1375,92 @@ linux_recvmsg(struct thread *td, struct linux_recvmsg_args *args) outbuf += LINUX_CMSG_ALIGN(datalen); outlen += LINUX_CMSG_LEN(datalen); - cm = CMSG_NXTHDR(&msg, cm); + cm = CMSG_NXTHDR(msg, cm); } } out: linux_msg.msg_controllen = outlen; - error = copyout(&linux_msg, PTRIN(args->msg), sizeof(linux_msg)); + error = copyout(&linux_msg, msghdr, sizeof(linux_msg)); bad: free(iov, M_IOV); m_freem(control); - free(linux_cmsg, M_TEMP); + free(linux_cmsg, M_LINUX); return (error); } -struct linux_shutdown_args { - int s; - int how; -}; +int +linux_recvmsg(struct thread *td, struct linux_recvmsg_args *args) +{ + struct msghdr bsd_msg; -static int + return (linux_recvmsg_common(td, args->s, PTRIN(args->msg), + args->flags, &bsd_msg)); +} + +int +linux_recvmmsg(struct thread *td, struct linux_recvmmsg_args *args) +{ + struct l_mmsghdr *msg; + struct msghdr bsd_msg; + struct l_timespec lts; + struct timespec ts, tts; + l_uint retval; + int error, datagrams; + + if (args->timeout) { + error = copyin(args->timeout, <s, sizeof(struct l_timespec)); + if (error != 0) + return (error); + error = linux_to_native_timespec(&ts, <s); + if (error != 0) + return (error); + getnanotime(&tts); + timespecadd(&tts, &ts); + } + + msg = PTRIN(args->msg); + datagrams = 0; + while (datagrams < args->vlen) { + error = linux_recvmsg_common(td, args->s, &msg->msg_hdr, + args->flags & ~LINUX_MSG_WAITFORONE, &bsd_msg); + if (error != 0) + break; + + retval = td->td_retval[0]; + error = copyout(&retval, &msg->msg_len, sizeof(msg->msg_len)); + if (error != 0) + break; + ++msg; + ++datagrams; + + /* + * MSG_WAITFORONE turns on MSG_DONTWAIT after one packet. + */ + if (args->flags & LINUX_MSG_WAITFORONE) + args->flags |= LINUX_MSG_DONTWAIT; + + /* + * See BUGS section of recvmmsg(2). + */ + if (args->timeout) { + getnanotime(&ts); + timespecsub(&ts, &tts); + if (!timespecisset(&ts) || ts.tv_sec > 0) + break; + } + /* Out of band data, return right away. */ + if (bsd_msg.msg_flags & MSG_OOB) + break; + } + if (error == 0) + td->td_retval[0] = datagrams; + return (error); +} + +int linux_shutdown(struct thread *td, struct linux_shutdown_args *args) { struct shutdown_args /* { @@ -1470,15 +1473,7 @@ linux_shutdown(struct thread *td, struct linux_shutdown_args *args) return (sys_shutdown(td, &bsd_args)); } -struct linux_setsockopt_args { - int s; - int level; - int optname; - l_uintptr_t optval; - int optlen; -}; - -static int +int linux_setsockopt(struct thread *td, struct linux_setsockopt_args *args) { struct setsockopt_args /* { @@ -1543,15 +1538,7 @@ linux_setsockopt(struct thread *td, struct linux_setsockopt_args *args) return (error); } -struct linux_getsockopt_args { - int s; - int level; - int optname; - l_uintptr_t optval; - l_uintptr_t optlen; -}; - -static int +int linux_getsockopt(struct thread *td, struct linux_getsockopt_args *args) { struct getsockopt_args /* { @@ -1635,6 +1622,8 @@ linux_getsockopt(struct thread *td, struct linux_getsockopt_args *args) return (error); } +#if defined(__i386__) || (defined(__amd64__) && defined(COMPAT_LINUX32)) + /* Argument list sizes for linux_socketcall */ #define LINUX_AL(x) ((x) * sizeof(l_ulong)) @@ -1649,7 +1638,8 @@ static const unsigned char lxs_args[] = { LINUX_AL(6) /* recvfrom */, LINUX_AL(2) /* shutdown */, LINUX_AL(5) /* setsockopt */, LINUX_AL(5) /* getsockopt */, LINUX_AL(3) /* sendmsg */, LINUX_AL(3) /* recvmsg */, - LINUX_AL(4) /* accept4 */ + LINUX_AL(4) /* accept4 */, LINUX_AL(5) /* recvmmsg */, + LINUX_AL(4) /* sendmmsg */ }; #define LINUX_AL_SIZE sizeof(lxs_args) / sizeof(lxs_args[0]) - 1 @@ -1705,8 +1695,13 @@ linux_socketcall(struct thread *td, struct linux_socketcall_args *args) return (linux_recvmsg(td, arg)); case LINUX_ACCEPT4: return (linux_accept4(td, arg)); + case LINUX_RECVMMSG: + return (linux_recvmmsg(td, arg)); + case LINUX_SENDMMSG: + return (linux_sendmmsg(td, arg)); } uprintf("LINUX: 'socket' typ=%d not implemented\n", args->what); return (ENOSYS); } +#endif /* __i386__ || (__amd64__ && COMPAT_LINUX32) */ diff --git a/sys/compat/linux/linux_socket.h b/sys/compat/linux/linux_socket.h index e6efadb684ab..b32a9694dff2 100644 --- a/sys/compat/linux/linux_socket.h +++ b/sys/compat/linux/linux_socket.h @@ -48,12 +48,36 @@ #define LINUX_MSG_RST 0x1000 #define LINUX_MSG_ERRQUEUE 0x2000 #define LINUX_MSG_NOSIGNAL 0x4000 +#define LINUX_MSG_WAITFORONE 0x10000 #define LINUX_MSG_CMSG_CLOEXEC 0x40000000 /* Socket-level control message types */ #define LINUX_SCM_RIGHTS 0x01 -#define LINUX_SCM_CREDENTIALS 0x02 +#define LINUX_SCM_CREDENTIALS 0x02 +#define LINUX_SCM_TIMESTAMP 0x1D + +struct l_msghdr { + l_uintptr_t msg_name; + l_int msg_namelen; + l_uintptr_t msg_iov; + l_size_t msg_iovlen; + l_uintptr_t msg_control; + l_size_t msg_controllen; + l_uint msg_flags; +}; + +struct l_mmsghdr { + struct l_msghdr msg_hdr; + l_uint msg_len; + +}; + +struct l_cmsghdr { + l_size_t cmsg_len; + l_int cmsg_level; + l_int cmsg_type; +}; /* Ancilliary data object information macros */ @@ -116,6 +140,133 @@ struct l_ucred { uint32_t gid; }; +#if defined(__i386__) || (defined(__amd64__) && defined(COMPAT_LINUX32)) + +struct linux_sendto_args { + int s; + l_uintptr_t msg; + int len; + int flags; + l_uintptr_t to; + int tolen; +}; + +struct linux_socket_args { + int domain; + int type; + int protocol; +}; + +struct linux_bind_args { + int s; + l_uintptr_t name; + int namelen; +}; + +struct linux_connect_args { + int s; + l_uintptr_t name; + int namelen; +}; + +struct linux_listen_args { + int s; + int backlog; +}; + +struct linux_accept_args { + int s; + l_uintptr_t addr; + l_uintptr_t namelen; +}; + +struct linux_accept4_args { + int s; + l_uintptr_t addr; + l_uintptr_t namelen; + int flags; +}; + +struct linux_getsockname_args { + int s; + l_uintptr_t addr; + l_uintptr_t namelen; +}; + +struct linux_getpeername_args { + int s; + l_uintptr_t addr; + l_uintptr_t namelen; +}; + +struct linux_socketpair_args { + int domain; + int type; + int protocol; + l_uintptr_t rsv; +}; + +struct linux_recvfrom_args { + int s; + l_uintptr_t buf; + int len; + int flags; + l_uintptr_t from; + l_uintptr_t fromlen; +}; + +struct linux_sendmsg_args { + int s; + l_uintptr_t msg; + int flags; +}; + +struct linux_recvmsg_args { + int s; + l_uintptr_t msg; + int flags; +}; + +struct linux_shutdown_args { + int s; + int how; +}; + +struct linux_setsockopt_args { + int s; + int level; + int optname; + l_uintptr_t optval; + int optlen; +}; + +struct linux_getsockopt_args { + int s; + int level; + int optname; + l_uintptr_t optval; + l_uintptr_t optlen; +}; + +int linux_socket(struct thread *td, struct linux_socket_args *args); +int linux_bind(struct thread *td, struct linux_bind_args *args); +int linux_connect(struct thread *, struct linux_connect_args *); +int linux_listen(struct thread *td, struct linux_listen_args *args); +int linux_accept(struct thread *td, struct linux_accept_args *args); +int linux_accept4(struct thread *td, struct linux_accept4_args *args); +int linux_getsockname(struct thread *td, struct linux_getsockname_args *args); +int linux_getpeername(struct thread *td, struct linux_getpeername_args *args); +int linux_socketpair(struct thread *td, struct linux_socketpair_args *args); +int linux_sendto(struct thread *td, struct linux_sendto_args *args); +int linux_recvfrom(struct thread *td, struct linux_recvfrom_args *args); +int linux_sendmsg(struct thread *td, struct linux_sendmsg_args *args); +int linux_recvmsg(struct thread *td, struct linux_recvmsg_args *args); +int linux_shutdown(struct thread *td, struct linux_shutdown_args *args); +int linux_setsockopt(struct thread *td, struct linux_setsockopt_args *args); +int linux_getsockopt(struct thread *td, struct linux_getsockopt_args *args); + +#endif /* __i386__ || (__amd64__ && COMPAT_LINUX32) */ + /* Operations for socketcall */ #define LINUX_SOCKET 1 @@ -136,6 +287,8 @@ struct l_ucred { #define LINUX_SENDMSG 16 #define LINUX_RECVMSG 17 #define LINUX_ACCEPT4 18 +#define LINUX_RECVMMSG 19 +#define LINUX_SENDMMSG 20 /* Socket options */ #define LINUX_IP_TOS 1 diff --git a/sys/compat/linux/linux_stats.c b/sys/compat/linux/linux_stats.c index b6dd86dd6ad4..05d335adf468 100644 --- a/sys/compat/linux/linux_stats.c +++ b/sys/compat/linux/linux_stats.c @@ -32,6 +32,7 @@ __FBSDID("$FreeBSD$"); #include "opt_compat.h" #include +#include #include #include #include @@ -58,7 +59,6 @@ __FBSDID("$FreeBSD$"); #include #include -#define LINUX_SHMFS_MAGIC 0x01021994 static void translate_vnhook_major_minor(struct vnode *vp, struct stat *sb) @@ -251,6 +251,7 @@ linux_newfstat(struct thread *td, struct linux_newfstat_args *args) return (error); } +#if defined(__i386__) || (defined(__amd64__) && defined(COMPAT_LINUX32)) static int stat_copyout(struct stat *buf, void *ubuf) { @@ -325,19 +326,19 @@ linux_lstat(struct thread *td, struct linux_lstat_args *args) LFREEPATH(path); return(stat_copyout(&buf, args->up)); } +#endif /* __i386__ || (__amd64__ && COMPAT_LINUX32) */ -/* XXX - All fields of type l_int are defined as l_long on i386 */ struct l_statfs { - l_int f_type; - l_int f_bsize; - l_int f_blocks; - l_int f_bfree; - l_int f_bavail; - l_int f_files; - l_int f_ffree; + l_long f_type; + l_long f_bsize; + l_long f_blocks; + l_long f_bfree; + l_long f_bavail; + l_long f_files; + l_long f_ffree; l_fsid_t f_fsid; - l_int f_namelen; - l_int f_spare[6]; + l_long f_namelen; + l_long f_spare[6]; }; #define LINUX_CODA_SUPER_MAGIC 0x73757245L @@ -351,6 +352,7 @@ struct l_statfs { #define LINUX_PROC_SUPER_MAGIC 0x9fa0L #define LINUX_UFS_SUPER_MAGIC 0x00011954L /* XXX - UFS_MAGIC in Linux */ #define LINUX_DEVFS_SUPER_MAGIC 0x1373L +#define LINUX_SHMFS_MAGIC 0x01021994 static long bsd_to_linux_ftype(const char *fstypename) @@ -368,6 +370,7 @@ bsd_to_linux_ftype(const char *fstypename) {"hpfs", LINUX_HPFS_SUPER_MAGIC}, {"coda", LINUX_CODA_SUPER_MAGIC}, {"devfs", LINUX_DEVFS_SUPER_MAGIC}, + {"tmpfs", LINUX_SHMFS_MAGIC}, {NULL, 0L}}; for (i = 0; b2l_tbl[i].bsd_name != NULL; i++) @@ -399,7 +402,7 @@ linux_statfs(struct thread *td, struct linux_statfs_args *args) struct l_statfs linux_statfs; struct statfs bsd_statfs; char *path; - int error, dev_shm; + int error; LCONVPATHEXIST(td, args->path, &path); @@ -407,20 +410,15 @@ linux_statfs(struct thread *td, struct linux_statfs_args *args) if (ldebug(statfs)) printf(ARGS(statfs, "%s, *"), path); #endif - dev_shm = 0; error = kern_statfs(td, path, UIO_SYSSPACE, &bsd_statfs); - if (strncmp(path, "/dev/shm", sizeof("/dev/shm") - 1) == 0) - dev_shm = (path[8] == '\0' - || (path[8] == '/' && path[9] == '\0')); LFREEPATH(path); if (error) return (error); bsd_to_linux_statfs(&bsd_statfs, &linux_statfs); - if (dev_shm) - linux_statfs.f_type = LINUX_SHMFS_MAGIC; return copyout(&linux_statfs, args->buf, sizeof(linux_statfs)); } +#if defined(__i386__) || (defined(__amd64__) && defined(COMPAT_LINUX32)) static void bsd_to_linux_statfs64(struct statfs *bsd_statfs, struct l_statfs64 *linux_statfs) { @@ -461,6 +459,7 @@ linux_statfs64(struct thread *td, struct linux_statfs64_args *args) bsd_to_linux_statfs64(&bsd_statfs, &linux_statfs); return copyout(&linux_statfs, args->buf, sizeof(linux_statfs)); } +#endif /* __i386__ || (__amd64__ && COMPAT_LINUX32) */ int linux_fstatfs(struct thread *td, struct linux_fstatfs_args *args) @@ -493,7 +492,7 @@ linux_ustat(struct thread *td, struct linux_ustat_args *args) { #ifdef DEBUG if (ldebug(ustat)) - printf(ARGS(ustat, "%d, *"), args->dev); + printf(ARGS(ustat, "%ju, *"), (uintmax_t)args->dev); #endif return (EOPNOTSUPP); @@ -624,4 +623,74 @@ linux_fstatat64(struct thread *td, struct linux_fstatat64_args *args) return (error); } +#else /* __amd64__ && !COMPAT_LINUX32 */ + +int +linux_newfstatat(struct thread *td, struct linux_newfstatat_args *args) +{ + char *path; + int error, dfd, flag; + struct stat buf; + + if (args->flag & ~LINUX_AT_SYMLINK_NOFOLLOW) + return (EINVAL); + flag = (args->flag & LINUX_AT_SYMLINK_NOFOLLOW) ? + AT_SYMLINK_NOFOLLOW : 0; + + dfd = (args->dfd == LINUX_AT_FDCWD) ? AT_FDCWD : args->dfd; + LCONVPATHEXIST_AT(td, args->pathname, &path, dfd); + +#ifdef DEBUG + if (ldebug(newfstatat)) + printf(ARGS(newfstatat, "%i, %s, %i"), args->dfd, path, args->flag); +#endif + + error = linux_kern_statat(td, flag, dfd, path, UIO_SYSSPACE, &buf); + if (error == 0) + error = newstat_copyout(&buf, args->statbuf); + LFREEPATH(path); + + return (error); +} + #endif /* __i386__ || (__amd64__ && COMPAT_LINUX32) */ + +int +linux_syncfs(struct thread *td, struct linux_syncfs_args *args) +{ + cap_rights_t rights; + struct mount *mp; + struct vnode *vp; + int error, save; + + error = fgetvp(td, args->fd, cap_rights_init(&rights, CAP_FSYNC), &vp); + if (error != 0) + /* + * Linux syncfs() returns only EBADF, however fgetvp() + * can return EINVAL in case of file descriptor does + * not represent a vnode. XXX. + */ + return (error); + + mp = vp->v_mount; + mtx_lock(&mountlist_mtx); + error = vfs_busy(mp, MBF_MNTLSTLOCK); + if (error != 0) { + /* See comment above. */ + mtx_unlock(&mountlist_mtx); + goto out; + } + if ((mp->mnt_flag & MNT_RDONLY) == 0 && + vn_start_write(NULL, &mp, V_NOWAIT) == 0) { + save = curthread_pflags_set(TDP_SYNCIO); + vfs_msync(mp, MNT_NOWAIT); + VFS_SYNC(mp, MNT_NOWAIT); + curthread_pflags_restore(save); + vn_finished_write(mp); + } + vfs_unbusy(mp); + + out: + vrele(vp); + return (error); +} diff --git a/sys/compat/linux/linux_sysctl.c b/sys/compat/linux/linux_sysctl.c index 7d263df8616b..44fe41dd3f9e 100644 --- a/sys/compat/linux/linux_sysctl.c +++ b/sys/compat/linux/linux_sysctl.c @@ -140,12 +140,12 @@ linux_sysctl(struct thread *td, struct linux_sysctl_args *args) return (ENOTDIR); } - mib = malloc(la.nlen * sizeof(l_int), M_TEMP, M_WAITOK); + mib = malloc(la.nlen * sizeof(l_int), M_LINUX, M_WAITOK); error = copyin(PTRIN(la.name), mib, la.nlen * sizeof(l_int)); if (error) { LIN_SDT_PROBE1(sysctl, linux_sysctl, copyin_error, error); LIN_SDT_PROBE1(sysctl, linux_sysctl, return, error); - free(mib, M_TEMP); + free(mib, M_LINUX); return (error); } @@ -157,7 +157,7 @@ linux_sysctl(struct thread *td, struct linux_sysctl_args *args) switch (mib[1]) { case LINUX_KERN_VERSION: error = handle_string(&la, version); - free(mib, M_TEMP); + free(mib, M_LINUX); LIN_SDT_PROBE1(sysctl, linux_sysctl, return, error); return (error); default: @@ -186,7 +186,7 @@ linux_sysctl(struct thread *td, struct linux_sysctl_args *args) sbuf_delete(sb); } - free(mib, M_TEMP); + free(mib, M_LINUX); LIN_SDT_PROBE1(sysctl, linux_sysctl, return, ENOTDIR); return (ENOTDIR); diff --git a/sys/compat/linux/linux_time.c b/sys/compat/linux/linux_time.c index be6e169b26c9..2d293306ee61 100644 --- a/sys/compat/linux/linux_time.c +++ b/sys/compat/linux/linux_time.c @@ -39,8 +39,11 @@ __KERNEL_RCSID(0, "$NetBSD: linux_time.c,v 1.14 2006/05/14 03:40:54 christos Exp #include #include +#include #include #include +#include +#include #include #include #include @@ -59,7 +62,7 @@ __KERNEL_RCSID(0, "$NetBSD: linux_time.c,v 1.14 2006/05/14 03:40:54 christos Exp #endif #include -#include +#include /* DTrace init */ LIN_SDT_PROVIDER_DECLARE(LINUX_DTRACE); @@ -102,27 +105,20 @@ LIN_SDT_PROBE_DEFINE1(time, linux_clock_getres, return, "int"); LIN_SDT_PROBE_DEFINE2(time, linux_nanosleep, entry, "const struct l_timespec *", "struct l_timespec *"); LIN_SDT_PROBE_DEFINE1(time, linux_nanosleep, conversion_error, "int"); -LIN_SDT_PROBE_DEFINE1(time, linux_nanosleep, nanosleep_error, "int"); LIN_SDT_PROBE_DEFINE1(time, linux_nanosleep, copyout_error, "int"); LIN_SDT_PROBE_DEFINE1(time, linux_nanosleep, copyin_error, "int"); LIN_SDT_PROBE_DEFINE1(time, linux_nanosleep, return, "int"); LIN_SDT_PROBE_DEFINE4(time, linux_clock_nanosleep, entry, "clockid_t", "int", "struct l_timespec *", "struct l_timespec *"); LIN_SDT_PROBE_DEFINE1(time, linux_clock_nanosleep, conversion_error, "int"); -LIN_SDT_PROBE_DEFINE1(time, linux_clock_nanosleep, nanosleep_error, "int"); LIN_SDT_PROBE_DEFINE1(time, linux_clock_nanosleep, copyout_error, "int"); LIN_SDT_PROBE_DEFINE1(time, linux_clock_nanosleep, copyin_error, "int"); LIN_SDT_PROBE_DEFINE1(time, linux_clock_nanosleep, unsupported_flags, "int"); LIN_SDT_PROBE_DEFINE1(time, linux_clock_nanosleep, unsupported_clockid, "int"); LIN_SDT_PROBE_DEFINE1(time, linux_clock_nanosleep, return, "int"); -static void native_to_linux_timespec(struct l_timespec *, - struct timespec *); -static int linux_to_native_timespec(struct timespec *, - struct l_timespec *); -static int linux_to_native_clockid(clockid_t *, clockid_t); -static void +void native_to_linux_timespec(struct l_timespec *ltp, struct timespec *ntp) { @@ -134,7 +130,7 @@ native_to_linux_timespec(struct l_timespec *ltp, struct timespec *ntp) LIN_SDT_PROBE0(time, native_to_linux_timespec, return); } -static int +int linux_to_native_timespec(struct timespec *ntp, struct l_timespec *ltp) { @@ -151,12 +147,26 @@ linux_to_native_timespec(struct timespec *ntp, struct l_timespec *ltp) return (0); } -static int +int linux_to_native_clockid(clockid_t *n, clockid_t l) { LIN_SDT_PROBE2(time, linux_to_native_clockid, entry, n, l); + if (l < 0) { + /* cpu-clock */ + if ((l & LINUX_CLOCKFD_MASK) == LINUX_CLOCKFD) + return (EINVAL); + if (LINUX_CPUCLOCK_WHICH(l) >= LINUX_CPUCLOCK_MAX) + return (EINVAL); + + if (LINUX_CPUCLOCK_PERTHREAD(l)) + *n = CLOCK_THREAD_CPUTIME_ID; + else + *n = CLOCK_PROCESS_CPUTIME_ID; + return (0); + } + switch (l) { case LINUX_CLOCK_REALTIME: *n = CLOCK_REALTIME; @@ -164,21 +174,27 @@ linux_to_native_clockid(clockid_t *n, clockid_t l) case LINUX_CLOCK_MONOTONIC: *n = CLOCK_MONOTONIC; break; - case LINUX_CLOCK_PROCESS_CPUTIME_ID: - case LINUX_CLOCK_THREAD_CPUTIME_ID: - case LINUX_CLOCK_REALTIME_HR: - case LINUX_CLOCK_MONOTONIC_HR: + case LINUX_CLOCK_REALTIME_COARSE: + *n = CLOCK_REALTIME_FAST; + break; + case LINUX_CLOCK_MONOTONIC_COARSE: + *n = CLOCK_MONOTONIC_FAST; + break; + case LINUX_CLOCK_MONOTONIC_RAW: + case LINUX_CLOCK_BOOTTIME: + case LINUX_CLOCK_REALTIME_ALARM: + case LINUX_CLOCK_BOOTTIME_ALARM: + case LINUX_CLOCK_SGI_CYCLE: + case LINUX_CLOCK_TAI: LIN_SDT_PROBE1(time, linux_to_native_clockid, unsupported_clockid, l); LIN_SDT_PROBE1(time, linux_to_native_clockid, return, EINVAL); return (EINVAL); - break; default: LIN_SDT_PROBE1(time, linux_to_native_clockid, unknown_clockid, l); LIN_SDT_PROBE1(time, linux_to_native_clockid, return, EINVAL); return (EINVAL); - break; } LIN_SDT_PROBE1(time, linux_to_native_clockid, return, 0); @@ -189,9 +205,14 @@ int linux_clock_gettime(struct thread *td, struct linux_clock_gettime_args *args) { struct l_timespec lts; - int error; - clockid_t nwhich = 0; /* XXX: GCC */ struct timespec tp; + struct rusage ru; + struct thread *targettd; + struct proc *p; + int error, clockwhich; + clockid_t nwhich = 0; /* XXX: GCC */ + pid_t pid; + lwpid_t tid; LIN_SDT_PROBE2(time, linux_clock_gettime, entry, args->which, args->tp); @@ -202,7 +223,100 @@ linux_clock_gettime(struct thread *td, struct linux_clock_gettime_args *args) LIN_SDT_PROBE1(time, linux_clock_gettime, return, error); return (error); } - error = kern_clock_gettime(td, nwhich, &tp); + + switch (nwhich) { + case CLOCK_PROCESS_CPUTIME_ID: + clockwhich = LINUX_CPUCLOCK_WHICH(args->which); + pid = LINUX_CPUCLOCK_ID(args->which); + if (pid == 0) { + p = td->td_proc; + PROC_LOCK(p); + } else { + error = pget(pid, PGET_CANSEE, &p); + if (error != 0) + return (EINVAL); + } + switch (clockwhich) { + case LINUX_CPUCLOCK_PROF: + PROC_STATLOCK(p); + calcru(p, &ru.ru_utime, &ru.ru_stime); + PROC_STATUNLOCK(p); + PROC_UNLOCK(p); + timevaladd(&ru.ru_utime, &ru.ru_stime); + TIMEVAL_TO_TIMESPEC(&ru.ru_utime, &tp); + break; + case LINUX_CPUCLOCK_VIRT: + PROC_STATLOCK(p); + calcru(p, &ru.ru_utime, &ru.ru_stime); + PROC_STATUNLOCK(p); + PROC_UNLOCK(p); + TIMEVAL_TO_TIMESPEC(&ru.ru_utime, &tp); + break; + case LINUX_CPUCLOCK_SCHED: + PROC_UNLOCK(p); + error = kern_clock_getcpuclockid2(td, pid, + CPUCLOCK_WHICH_PID, &nwhich); + if (error != 0) + return (EINVAL); + error = kern_clock_gettime(td, nwhich, &tp); + break; + default: + PROC_UNLOCK(p); + return (EINVAL); + } + + break; + + case CLOCK_THREAD_CPUTIME_ID: + clockwhich = LINUX_CPUCLOCK_WHICH(args->which); + p = td->td_proc; + tid = LINUX_CPUCLOCK_ID(args->which); + if (tid == 0) { + targettd = td; + PROC_LOCK(p); + } else { + targettd = tdfind(tid, p->p_pid); + if (targettd == NULL) + return (EINVAL); + } + switch (clockwhich) { + case LINUX_CPUCLOCK_PROF: + PROC_STATLOCK(p); + thread_lock(targettd); + rufetchtd(targettd, &ru); + thread_unlock(targettd); + PROC_STATUNLOCK(p); + PROC_UNLOCK(p); + timevaladd(&ru.ru_utime, &ru.ru_stime); + TIMEVAL_TO_TIMESPEC(&ru.ru_utime, &tp); + break; + case LINUX_CPUCLOCK_VIRT: + PROC_STATLOCK(p); + thread_lock(targettd); + rufetchtd(targettd, &ru); + thread_unlock(targettd); + PROC_STATUNLOCK(p); + PROC_UNLOCK(p); + TIMEVAL_TO_TIMESPEC(&ru.ru_utime, &tp); + break; + case LINUX_CPUCLOCK_SCHED: + error = kern_clock_getcpuclockid2(td, tid, + CPUCLOCK_WHICH_TID, &nwhich); + PROC_UNLOCK(p); + if (error != 0) + return (EINVAL); + error = kern_clock_gettime(td, nwhich, &tp); + break; + default: + PROC_UNLOCK(p); + return (EINVAL); + } + break; + + default: + error = kern_clock_gettime(td, nwhich, &tp); + break; + } if (error != 0) { LIN_SDT_PROBE1(time, linux_clock_gettime, gettime_error, error); LIN_SDT_PROBE1(time, linux_clock_gettime, return, error); @@ -260,19 +374,16 @@ linux_clock_settime(struct thread *td, struct linux_clock_settime_args *args) int linux_clock_getres(struct thread *td, struct linux_clock_getres_args *args) { + struct proc *p; struct timespec ts; struct l_timespec lts; - int error; + int error, clockwhich; clockid_t nwhich = 0; /* XXX: GCC */ + pid_t pid; + lwpid_t tid; LIN_SDT_PROBE2(time, linux_clock_getres, entry, args->which, args->tp); - if (args->tp == NULL) { - LIN_SDT_PROBE0(time, linux_clock_getres, nullcall); - LIN_SDT_PROBE1(time, linux_clock_getres, return, 0); - return (0); - } - error = linux_to_native_clockid(&nwhich, args->which); if (error != 0) { LIN_SDT_PROBE1(time, linux_clock_getres, conversion_error, @@ -280,6 +391,59 @@ linux_clock_getres(struct thread *td, struct linux_clock_getres_args *args) LIN_SDT_PROBE1(time, linux_clock_getres, return, error); return (error); } + + /* + * Check user supplied clock id in case of per-process + * or thread-specific cpu-time clock. + */ + switch (nwhich) { + case CLOCK_THREAD_CPUTIME_ID: + tid = LINUX_CPUCLOCK_ID(args->which); + if (tid != 0) { + p = td->td_proc; + if (tdfind(tid, p->p_pid) == NULL) + return (ESRCH); + PROC_UNLOCK(p); + } + break; + case CLOCK_PROCESS_CPUTIME_ID: + pid = LINUX_CPUCLOCK_ID(args->which); + if (pid != 0) { + error = pget(pid, PGET_CANSEE, &p); + if (error != 0) + return (EINVAL); + PROC_UNLOCK(p); + } + break; + } + + if (args->tp == NULL) { + LIN_SDT_PROBE0(time, linux_clock_getres, nullcall); + LIN_SDT_PROBE1(time, linux_clock_getres, return, 0); + return (0); + } + + switch (nwhich) { + case CLOCK_THREAD_CPUTIME_ID: + case CLOCK_PROCESS_CPUTIME_ID: + clockwhich = LINUX_CPUCLOCK_WHICH(args->which); + switch (clockwhich) { + case LINUX_CPUCLOCK_PROF: + nwhich = CLOCK_PROF; + break; + case LINUX_CPUCLOCK_VIRT: + nwhich = CLOCK_VIRTUAL; + break; + case LINUX_CPUCLOCK_SCHED: + break; + default: + return (EINVAL); + } + break; + + default: + break; + } error = kern_clock_getres(td, nwhich, &ts); if (error != 0) { LIN_SDT_PROBE1(time, linux_clock_getres, getres_error, error); @@ -302,7 +466,7 @@ linux_nanosleep(struct thread *td, struct linux_nanosleep_args *args) struct timespec *rmtp; struct l_timespec lrqts, lrmts; struct timespec rqts, rmts; - int error; + int error, error2; LIN_SDT_PROBE2(time, linux_nanosleep, entry, args->rqtp, args->rmtp); @@ -314,9 +478,9 @@ linux_nanosleep(struct thread *td, struct linux_nanosleep_args *args) } if (args->rmtp != NULL) - rmtp = &rmts; + rmtp = &rmts; else - rmtp = NULL; + rmtp = NULL; error = linux_to_native_timespec(&rqts, &lrqts); if (error != 0) { @@ -325,25 +489,19 @@ linux_nanosleep(struct thread *td, struct linux_nanosleep_args *args) return (error); } error = kern_nanosleep(td, &rqts, rmtp); - if (error != 0) { - LIN_SDT_PROBE1(time, linux_nanosleep, nanosleep_error, error); - LIN_SDT_PROBE1(time, linux_nanosleep, return, error); - return (error); - } - if (args->rmtp != NULL) { - native_to_linux_timespec(&lrmts, rmtp); - error = copyout(&lrmts, args->rmtp, sizeof(lrmts)); - if (error != 0) { + native_to_linux_timespec(&lrmts, rmtp); + error2 = copyout(&lrmts, args->rmtp, sizeof(lrmts)); + if (error2 != 0) { LIN_SDT_PROBE1(time, linux_nanosleep, copyout_error, - error); - LIN_SDT_PROBE1(time, linux_nanosleep, return, error); - return (error); + error2); + LIN_SDT_PROBE1(time, linux_nanosleep, return, error2); + return (error2); } } - LIN_SDT_PROBE1(time, linux_nanosleep, return, 0); - return (0); + LIN_SDT_PROBE1(time, linux_nanosleep, return, error); + return (error); } int @@ -352,7 +510,7 @@ linux_clock_nanosleep(struct thread *td, struct linux_clock_nanosleep_args *args struct timespec *rmtp; struct l_timespec lrqts, lrmts; struct timespec rqts, rmts; - int error; + int error, error2; LIN_SDT_PROBE4(time, linux_clock_nanosleep, entry, args->which, args->flags, args->rqtp, args->rmtp); @@ -372,7 +530,7 @@ linux_clock_nanosleep(struct thread *td, struct linux_clock_nanosleep_args *args return (EINVAL); } - error = copyin(args->rqtp, &lrqts, sizeof lrqts); + error = copyin(args->rqtp, &lrqts, sizeof(lrqts)); if (error != 0) { LIN_SDT_PROBE1(time, linux_clock_nanosleep, copyin_error, error); @@ -381,9 +539,9 @@ linux_clock_nanosleep(struct thread *td, struct linux_clock_nanosleep_args *args } if (args->rmtp != NULL) - rmtp = &rmts; + rmtp = &rmts; else - rmtp = NULL; + rmtp = NULL; error = linux_to_native_timespec(&rqts, &lrqts); if (error != 0) { @@ -393,24 +551,19 @@ linux_clock_nanosleep(struct thread *td, struct linux_clock_nanosleep_args *args return (error); } error = kern_nanosleep(td, &rqts, rmtp); - if (error != 0) { - LIN_SDT_PROBE1(time, linux_clock_nanosleep, nanosleep_error, - error); - LIN_SDT_PROBE1(time, linux_clock_nanosleep, return, error); - return (error); - } - if (args->rmtp != NULL) { + /* XXX. Not for TIMER_ABSTIME */ native_to_linux_timespec(&lrmts, rmtp); - error = copyout(&lrmts, args->rmtp, sizeof lrmts ); - if (error != 0) { + error2 = copyout(&lrmts, args->rmtp, sizeof(lrmts)); + if (error2 != 0) { LIN_SDT_PROBE1(time, linux_clock_nanosleep, - copyout_error, error); - LIN_SDT_PROBE1(time, linux_nanosleep, return, error); - return (error); + copyout_error, error2); + LIN_SDT_PROBE1(time, linux_clock_nanosleep, + return, error2); + return (error2); } } - LIN_SDT_PROBE1(time, linux_clock_nanosleep, return, 0); - return (0); + LIN_SDT_PROBE1(time, linux_clock_nanosleep, return, error); + return (error); } diff --git a/sys/compat/linux/linux_timer.c b/sys/compat/linux/linux_timer.c index 92dae4c67280..7dbddbe30adb 100644 --- a/sys/compat/linux/linux_timer.c +++ b/sys/compat/linux/linux_timer.c @@ -49,23 +49,6 @@ __FBSDID("$FreeBSD$"); #endif #include -static int -linux_convert_l_clockid(clockid_t *clock_id) -{ - - switch (*clock_id) { - case LINUX_CLOCK_REALTIME: - *clock_id = CLOCK_REALTIME; - break; - case LINUX_CLOCK_MONOTONIC: - *clock_id = CLOCK_MONOTONIC; - break; - default: - return (EINVAL); - } - - return (0); -} static int linux_convert_l_sigevent(struct l_sigevent *l_sig, struct sigevent *sig) @@ -75,7 +58,7 @@ linux_convert_l_sigevent(struct l_sigevent *l_sig, struct sigevent *sig) switch (l_sig->sigev_notify) { case L_SIGEV_SIGNAL: sig->sigev_notify = SIGEV_SIGNAL; - CP(*l_sig, *sig, sigev_signo); + sig->sigev_signo = linux_to_bsd_signal(l_sig->sigev_signo); PTRIN_CP(*l_sig, *sig, sigev_value.sival_ptr); break; case L_SIGEV_NONE: @@ -92,7 +75,7 @@ linux_convert_l_sigevent(struct l_sigevent *l_sig, struct sigevent *sig) case L_SIGEV_THREAD_ID: sig->sigev_notify = SIGEV_THREAD_ID; CP2(*l_sig, *sig, _l_sigev_un._tid, sigev_notify_thread_id); - CP(*l_sig, *sig, sigev_signo); + sig->sigev_signo = linux_to_bsd_signal(l_sig->sigev_signo); PTRIN_CP(*l_sig, *sig, sigev_value.sival_ptr); break; default: @@ -106,6 +89,7 @@ linux_timer_create(struct thread *td, struct linux_timer_create_args *uap) { struct l_sigevent l_ev; struct sigevent ev, *evp; + clockid_t nwhich; int error, id; if (uap->evp == NULL) { @@ -119,10 +103,10 @@ linux_timer_create(struct thread *td, struct linux_timer_create_args *uap) return (error); evp = &ev; } - error = linux_convert_l_clockid(&uap->clock_id); + error = linux_to_native_clockid(&nwhich, uap->clock_id); if (error != 0) return (error); - error = kern_ktimer_create(td, uap->clock_id, evp, &id, -1); + error = kern_ktimer_create(td, nwhich, evp, &id, -1); if (error == 0) { error = copyout(&id, uap->timerid, sizeof(int)); if (error != 0) @@ -179,4 +163,3 @@ linux_timer_delete(struct thread *td, struct linux_timer_delete_args *uap) return (kern_ktimer_delete(td, uap->timerid)); } - diff --git a/sys/compat/linux/linux_timer.h b/sys/compat/linux/linux_timer.h index 4f64ee5fe9cb..c79c08dc39fc 100644 --- a/sys/compat/linux/linux_timer.h +++ b/sys/compat/linux/linux_timer.h @@ -56,6 +56,23 @@ #define LINUX_CLOCK_SGI_CYCLE 10 #define LINUX_CLOCK_TAI 11 +#define LINUX_CPUCLOCK_PERTHREAD_MASK 4 +#define LINUX_CPUCLOCK_MASK 3 +#define LINUX_CPUCLOCK_WHICH(clock) \ + ((clock) & (clockid_t) LINUX_CPUCLOCK_MASK) +#define LINUX_CPUCLOCK_PROF 0 +#define LINUX_CPUCLOCK_VIRT 1 +#define LINUX_CPUCLOCK_SCHED 2 +#define LINUX_CPUCLOCK_MAX 3 +#define LINUX_CLOCKFD LINUX_CPUCLOCK_MAX +#define LINUX_CLOCKFD_MASK \ + (LINUX_CPUCLOCK_PERTHREAD_MASK|LINUX_CPUCLOCK_MASK) + +#define LINUX_CPUCLOCK_ID(clock) ((pid_t) ~((clock) >> 3)) +#define LINUX_CPUCLOCK_PERTHREAD(clock) \ + (((clock) & (clockid_t) LINUX_CPUCLOCK_PERTHREAD_MASK) != 0) + + #define L_SIGEV_SIGNAL 0 #define L_SIGEV_NONE 1 #define L_SIGEV_THREAD 2 @@ -94,4 +111,10 @@ struct l_itimerspec { struct l_timespec it_value; }; +void native_to_linux_timespec(struct l_timespec *, + struct timespec *); +int linux_to_native_timespec(struct timespec *, + struct l_timespec *); +int linux_to_native_clockid(clockid_t *, clockid_t); + #endif /* _LINUX_TIMER_H */ diff --git a/sys/compat/linux/linux_uid16.c b/sys/compat/linux/linux_uid16.c index 8c7c7606920a..8aa728cf73e6 100644 --- a/sys/compat/linux/linux_uid16.c +++ b/sys/compat/linux/linux_uid16.c @@ -171,12 +171,12 @@ linux_setgroups16(struct thread *td, struct linux_setgroups16_args *args) LIN_SDT_PROBE1(uid16, linux_setgroups16, return, EINVAL); return (EINVAL); } - linux_gidset = malloc(ngrp * sizeof(*linux_gidset), M_TEMP, M_WAITOK); + linux_gidset = malloc(ngrp * sizeof(*linux_gidset), M_LINUX, M_WAITOK); error = copyin(args->gidset, linux_gidset, ngrp * sizeof(l_gid16_t)); if (error) { LIN_SDT_PROBE1(uid16, linux_setgroups16, copyin_error, error); LIN_SDT_PROBE1(uid16, linux_setgroups16, return, error); - free(linux_gidset, M_TEMP); + free(linux_gidset, M_LINUX); return (error); } newcred = crget(); @@ -218,7 +218,7 @@ linux_setgroups16(struct thread *td, struct linux_setgroups16_args *args) crfree(oldcred); error = 0; out: - free(linux_gidset, M_TEMP); + free(linux_gidset, M_LINUX); LIN_SDT_PROBE1(uid16, linux_setgroups16, return, error); return (error); @@ -259,14 +259,14 @@ linux_getgroups16(struct thread *td, struct linux_getgroups16_args *args) ngrp = 0; linux_gidset = malloc(bsd_gidsetsz * sizeof(*linux_gidset), - M_TEMP, M_WAITOK); + M_LINUX, M_WAITOK); while (ngrp < bsd_gidsetsz) { linux_gidset[ngrp] = bsd_gidset[ngrp + 1]; ngrp++; } error = copyout(linux_gidset, args->gidset, ngrp * sizeof(l_gid16_t)); - free(linux_gidset, M_TEMP); + free(linux_gidset, M_LINUX); if (error) { LIN_SDT_PROBE1(uid16, linux_getgroups16, copyout_error, error); LIN_SDT_PROBE1(uid16, linux_getgroups16, return, error); diff --git a/sys/compat/linux/linux_util.c b/sys/compat/linux/linux_util.c index be52459c4b84..466c588157c5 100644 --- a/sys/compat/linux/linux_util.c +++ b/sys/compat/linux/linux_util.c @@ -52,48 +52,14 @@ __FBSDID("$FreeBSD$"); #include #include -#ifdef COMPAT_LINUX32 -#include -#else -#include -#endif -#include +MALLOC_DEFINE(M_LINUX, "linux", "Linux mode structures"); +MALLOC_DEFINE(M_EPOLL, "lepoll", "Linux events structures"); +MALLOC_DEFINE(M_FUTEX, "futex", "Linux futexes"); +MALLOC_DEFINE(M_FUTEX_WP, "futex wp", "Linux futex waiting proc"); const char linux_emul_path[] = "/compat/linux"; -/* DTrace init */ -LIN_SDT_PROVIDER_DECLARE(LINUX_DTRACE); - -/** - * DTrace probes in this module. - */ -LIN_SDT_PROBE_DEFINE5(util, linux_emul_convpath, entry, "const char *", - "enum uio_seg", "char **", "int", "int"); -LIN_SDT_PROBE_DEFINE1(util, linux_emul_convpath, return, "int"); -LIN_SDT_PROBE_DEFINE1(util, linux_msg, entry, "const char *"); -LIN_SDT_PROBE_DEFINE0(util, linux_msg, return); -LIN_SDT_PROBE_DEFINE2(util, linux_driver_get_name_dev, entry, "device_t", - "const char *"); -LIN_SDT_PROBE_DEFINE0(util, linux_driver_get_name_dev, nullcall); -LIN_SDT_PROBE_DEFINE1(util, linux_driver_get_name_dev, return, "char *"); -LIN_SDT_PROBE_DEFINE3(util, linux_driver_get_major_minor, entry, "char *", - "int *", "int *"); -LIN_SDT_PROBE_DEFINE0(util, linux_driver_get_major_minor, nullcall); -LIN_SDT_PROBE_DEFINE1(util, linux_driver_get_major_minor, notfound, "char *"); -LIN_SDT_PROBE_DEFINE3(util, linux_driver_get_major_minor, return, "int", - "int", "int"); -LIN_SDT_PROBE_DEFINE0(util, linux_get_char_devices, entry); -LIN_SDT_PROBE_DEFINE1(util, linux_get_char_devices, return, "char *"); -LIN_SDT_PROBE_DEFINE1(util, linux_free_get_char_devices, entry, "char *"); -LIN_SDT_PROBE_DEFINE0(util, linux_free_get_char_devices, return); -LIN_SDT_PROBE_DEFINE1(util, linux_device_register_handler, entry, - "struct linux_device_handler *"); -LIN_SDT_PROBE_DEFINE1(util, linux_device_register_handler, return, "int"); -LIN_SDT_PROBE_DEFINE1(util, linux_device_unregister_handler, entry, - "struct linux_device_handler *"); -LIN_SDT_PROBE_DEFINE1(util, linux_device_unregister_handler, return, "int"); - /* * Search an alternate path before passing pathname arguments on to * system calls. Useful for keeping a separate 'emulation tree'. @@ -107,13 +73,9 @@ linux_emul_convpath(struct thread *td, const char *path, enum uio_seg pathseg, { int retval; - LIN_SDT_PROBE5(util, linux_emul_convpath, entry, path, pathseg, pbuf, - cflag, dfd); - retval = kern_alternate_path(td, linux_emul_path, path, pathseg, pbuf, cflag, dfd); - LIN_SDT_PROBE1(util, linux_emul_convpath, return, retval); return (retval); } @@ -123,16 +85,12 @@ linux_msg(const struct thread *td, const char *fmt, ...) va_list ap; struct proc *p; - LIN_SDT_PROBE1(util, linux_msg, entry, fmt); - p = td->td_proc; printf("linux: pid %d (%s): ", (int)p->p_pid, p->p_comm); va_start(ap, fmt); vprintf(fmt, ap); va_end(ap); printf("\n"); - - LIN_SDT_PROBE0(util, linux_msg, return); } struct device_element @@ -155,24 +113,14 @@ linux_driver_get_name_dev(device_t dev) struct device_element *de; const char *device_name = device_get_name(dev); - LIN_SDT_PROBE2(util, linux_driver_get_name_dev, entry, dev, - device_name); - - if (device_name == NULL) { - LIN_SDT_PROBE0(util, linux_driver_get_name_dev, nullcall); - LIN_SDT_PROBE1(util, linux_driver_get_name_dev, return, NULL); + if (device_name == NULL) return NULL; - } TAILQ_FOREACH(de, &devices, list) { - if (strcmp(device_name, de->entry.bsd_driver_name) == 0) { - LIN_SDT_PROBE1(util, linux_driver_get_name_dev, return, - de->entry.linux_driver_name); + if (strcmp(device_name, de->entry.bsd_driver_name) == 0) return (de->entry.linux_driver_name); - } } - LIN_SDT_PROBE1(util, linux_driver_get_name_dev, return, NULL); - return NULL; + return (NULL); } int @@ -180,15 +128,8 @@ linux_driver_get_major_minor(const char *node, int *major, int *minor) { struct device_element *de; - LIN_SDT_PROBE3(util, linux_driver_get_major_minor, entry, node, major, - minor); - - if (node == NULL || major == NULL || minor == NULL) { - LIN_SDT_PROBE0(util, linux_driver_get_major_minor, nullcall); - LIN_SDT_PROBE3(util, linux_driver_get_major_minor, return, 1, - 0, 0); + if (node == NULL || major == NULL || minor == NULL) return 1; - } if (strlen(node) > strlen("pts/") && strncmp(node, "pts/", strlen("pts/")) == 0) { @@ -203,25 +144,18 @@ linux_driver_get_major_minor(const char *node, int *major, int *minor) *major = 136 + (devno / 256); *minor = devno % 256; - LIN_SDT_PROBE3(util, linux_driver_get_major_minor, return, 0, - *major, *minor); - return 0; + return (0); } TAILQ_FOREACH(de, &devices, list) { if (strcmp(node, de->entry.bsd_device_name) == 0) { *major = de->entry.linux_major; *minor = de->entry.linux_minor; - - LIN_SDT_PROBE3(util, linux_driver_get_major_minor, - return, 0, *major, *minor); - return 0; + return (0); } } - LIN_SDT_PROBE1(util, linux_driver_get_major_minor, notfound, node); - LIN_SDT_PROBE3(util, linux_driver_get_major_minor, return, 1, 0, 0); - return 1; + return (1); } char * @@ -232,8 +166,6 @@ linux_get_char_devices() char formated[256]; int current_size = 0, string_size = 1024; - LIN_SDT_PROBE0(util, linux_get_char_devices, entry); - string = malloc(string_size, M_LINUX, M_WAITOK); string[0] = '\000'; last = ""; @@ -260,19 +192,14 @@ linux_get_char_devices() } } - LIN_SDT_PROBE1(util, linux_get_char_devices, return, string); - return string; + return (string); } void linux_free_get_char_devices(char *string) { - LIN_SDT_PROBE1(util, linux_get_char_devices, entry, string); - free(string, M_LINUX); - - LIN_SDT_PROBE0(util, linux_get_char_devices, return); } static int linux_major_starting = 200; @@ -282,13 +209,8 @@ linux_device_register_handler(struct linux_device_handler *d) { struct device_element *de; - LIN_SDT_PROBE1(util, linux_device_register_handler, entry, d); - - if (d == NULL) { - LIN_SDT_PROBE1(util, linux_device_register_handler, return, - EINVAL); + if (d == NULL) return (EINVAL); - } de = malloc(sizeof(*de), M_LINUX, M_WAITOK); if (d->linux_major < 0) { @@ -299,7 +221,6 @@ linux_device_register_handler(struct linux_device_handler *d) /* Add the element to the list, sorted on span. */ TAILQ_INSERT_TAIL(&devices, de, list); - LIN_SDT_PROBE1(util, linux_device_register_handler, return, 0); return (0); } @@ -308,25 +229,17 @@ linux_device_unregister_handler(struct linux_device_handler *d) { struct device_element *de; - LIN_SDT_PROBE1(util, linux_device_unregister_handler, entry, d); - - if (d == NULL) { - LIN_SDT_PROBE1(util, linux_device_unregister_handler, return, - EINVAL); + if (d == NULL) return (EINVAL); - } TAILQ_FOREACH(de, &devices, list) { if (bcmp(d, &de->entry, sizeof(*d)) == 0) { TAILQ_REMOVE(&devices, de, list); free(de, M_LINUX); - LIN_SDT_PROBE1(util, linux_device_unregister_handler, - return, 0); return (0); } } - LIN_SDT_PROBE1(util, linux_device_unregister_handler, return, EINVAL); return (EINVAL); } diff --git a/sys/compat/linux/linux_util.h b/sys/compat/linux/linux_util.h index 6be0392f75ac..a52a7b91d551 100644 --- a/sys/compat/linux/linux_util.h +++ b/sys/compat/linux/linux_util.h @@ -44,6 +44,11 @@ #include #include +MALLOC_DECLARE(M_LINUX); +MALLOC_DECLARE(M_EPOLL); +MALLOC_DECLARE(M_FUTEX); +MALLOC_DECLARE(M_FUTEX_WP); + extern const char linux_emul_path[]; int linux_emul_convpath(struct thread *, const char *, enum uio_seg, char **, int, int); @@ -115,7 +120,6 @@ void linux_free_get_char_devices(char *string); #define LINUX_CTRFMT(nm, fmt) #nm"("fmt")" #define LINUX_CTR6(f, m, p1, p2, p3, p4, p5, p6) do { \ - if (ldebug(f)) \ CTR6(KTR_LINUX, LINUX_CTRFMT(f, m), \ p1, p2, p3, p4, p5, p6); \ } while (0) diff --git a/sys/compat/linux/linux_vdso.c b/sys/compat/linux/linux_vdso.c new file mode 100644 index 000000000000..5ab0ee641617 --- /dev/null +++ b/sys/compat/linux/linux_vdso.c @@ -0,0 +1,244 @@ +/*- + * Copyright (c) 2013 Dmitry Chagin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer + * in this position and unchanged. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "opt_compat.h" + +#if defined(__i386__) || (defined(__amd64__) && defined(COMPAT_LINUX32)) +#define __ELF_WORD_SIZE 32 +#else +#define __ELF_WORD_SIZE 64 +#endif + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +SLIST_HEAD(, linux_vdso_sym) __elfN(linux_vdso_syms) = + SLIST_HEAD_INITIALIZER(__elfN(linux_vdso_syms)); + +static int __elfN(symtabindex); +static int __elfN(symstrindex); + +static void +__elfN(linux_vdso_lookup)(Elf_Ehdr *, struct linux_vdso_sym *); + + +void +__elfN(linux_vdso_sym_init)(struct linux_vdso_sym *s) +{ + + SLIST_INSERT_HEAD(&__elfN(linux_vdso_syms), s, sym); +} + +vm_object_t +__elfN(linux_shared_page_init)(char **mapping) +{ + vm_page_t m; + vm_object_t obj; + vm_offset_t addr; + + obj = vm_pager_allocate(OBJT_PHYS, 0, PAGE_SIZE, + VM_PROT_DEFAULT, 0, NULL); + VM_OBJECT_WLOCK(obj); + m = vm_page_grab(obj, 0, VM_ALLOC_NOBUSY | VM_ALLOC_ZERO); + m->valid = VM_PAGE_BITS_ALL; + VM_OBJECT_WUNLOCK(obj); + addr = kva_alloc(PAGE_SIZE); + pmap_qenter(addr, &m, 1); + *mapping = (char *)addr; + return (obj); +} + +void +__elfN(linux_shared_page_fini)(vm_object_t obj) +{ + + vm_object_deallocate(obj); +} + +void +__elfN(linux_vdso_fixup)(struct sysentvec *sv) +{ + Elf_Ehdr *ehdr; + Elf_Shdr *shdr; + int i; + + ehdr = (Elf_Ehdr *) sv->sv_sigcode; + + if (!IS_ELF(*ehdr) || + ehdr->e_ident[EI_CLASS] != ELF_TARG_CLASS || + ehdr->e_ident[EI_DATA] != ELF_TARG_DATA || + ehdr->e_ident[EI_VERSION] != EV_CURRENT || + ehdr->e_shoff == 0 || + ehdr->e_shentsize != sizeof(Elf_Shdr)) + panic("Linux invalid vdso header.\n"); + + if (ehdr->e_type != ET_DYN) + panic("Linux invalid vdso header.\n"); + + shdr = (Elf_Shdr *) ((caddr_t)ehdr + ehdr->e_shoff); + + __elfN(symtabindex) = -1; + __elfN(symstrindex) = -1; + for (i = 0; i < ehdr->e_shnum; i++) { + if (shdr[i].sh_size == 0) + continue; + if (shdr[i].sh_type == SHT_DYNSYM) { + __elfN(symtabindex) = i; + __elfN(symstrindex) = shdr[i].sh_link; + } + } + + if (__elfN(symtabindex) == -1 || __elfN(symstrindex) == -1) + panic("Linux invalid vdso header.\n"); + + ehdr->e_ident[EI_OSABI] = ELFOSABI_LINUX; +} + +void +__elfN(linux_vdso_reloc)(struct sysentvec *sv, long vdso_adjust) +{ + struct linux_vdso_sym *lsym; + Elf_Ehdr *ehdr; + Elf_Phdr *phdr; + Elf_Shdr *shdr; + Elf_Dyn *dyn; + Elf_Sym *sym; + int i, symcnt; + + ehdr = (Elf_Ehdr *) sv->sv_sigcode; + + /* Adjust our so relative to the sigcode_base */ + if (vdso_adjust != 0) { + ehdr->e_entry += vdso_adjust; + phdr = (Elf_Phdr *)((caddr_t)ehdr + ehdr->e_phoff); + + /* phdrs */ + for (i = 0; i < ehdr->e_phnum; i++) { + phdr[i].p_vaddr += vdso_adjust; + if (phdr[i].p_type != PT_DYNAMIC) + continue; + dyn = (Elf_Dyn *)((caddr_t)ehdr + phdr[i].p_offset); + for(; dyn->d_tag != DT_NULL; dyn++) { + switch (dyn->d_tag) { + case DT_PLTGOT: + case DT_HASH: + case DT_STRTAB: + case DT_SYMTAB: + case DT_RELA: + case DT_INIT: + case DT_FINI: + case DT_REL: + case DT_DEBUG: + case DT_JMPREL: + case DT_VERSYM: + case DT_VERDEF: + case DT_VERNEED: + case DT_ADDRRNGLO ... DT_ADDRRNGHI: + dyn->d_un.d_ptr += vdso_adjust; + break; + case DT_ENCODING ... DT_LOOS-1: + case DT_LOOS ... DT_HIOS: + if (dyn->d_tag >= DT_ENCODING && + (dyn->d_tag & 1) == 0) + dyn->d_un.d_ptr += vdso_adjust; + break; + default: + break; + } + } + } + + /* sections */ + shdr = (Elf_Shdr *)((caddr_t)ehdr + ehdr->e_shoff); + for(i = 0; i < ehdr->e_shnum; i++) { + if (!(shdr[i].sh_flags & SHF_ALLOC)) + continue; + shdr[i].sh_addr += vdso_adjust; + if (shdr[i].sh_type != SHT_SYMTAB && + shdr[i].sh_type != SHT_DYNSYM) + continue; + + sym = (Elf_Sym *)((caddr_t)ehdr + shdr[i].sh_offset); + symcnt = shdr[i].sh_size / sizeof(*sym); + + for(i = 0; i < symcnt; i++, sym++) { + if (sym->st_shndx == SHN_UNDEF || + sym->st_shndx == SHN_ABS) + continue; + sym->st_value += vdso_adjust; + } + } + } + + SLIST_FOREACH(lsym, &__elfN(linux_vdso_syms), sym) + __elfN(linux_vdso_lookup)(ehdr, lsym); +} + +static void +__elfN(linux_vdso_lookup)(Elf_Ehdr *ehdr, struct linux_vdso_sym *vsym) +{ + vm_offset_t strtab, symname; + uint32_t symcnt; + Elf_Shdr *shdr; + int i; + + shdr = (Elf_Shdr *) ((caddr_t)ehdr + ehdr->e_shoff); + + strtab = (vm_offset_t)((caddr_t)ehdr + + shdr[__elfN(symstrindex)].sh_offset); + Elf_Sym *sym = (Elf_Sym *)((caddr_t)ehdr + + shdr[__elfN(symtabindex)].sh_offset); + symcnt = shdr[__elfN(symtabindex)].sh_size / sizeof(*sym); + + for (i = 0; i < symcnt; ++i, ++sym) { + symname = strtab + sym->st_name; + if (strncmp(vsym->symname, (char *)symname, vsym->size) == 0) { + *vsym->ptr = (uintptr_t)sym->st_value; + break; + } + } +} diff --git a/sys/compat/linux/linux_vdso.h b/sys/compat/linux/linux_vdso.h new file mode 100644 index 000000000000..e11ee8ad07b0 --- /dev/null +++ b/sys/compat/linux/linux_vdso.h @@ -0,0 +1,65 @@ +/*- + * Copyright (c) 2013 Dmitry Chagin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer + * in this position and unchanged. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _LINUX_VDSO_H_ +#define _LINUX_VDSO_H_ + +#include + +struct linux_vdso_sym { + SLIST_ENTRY(linux_vdso_sym) sym; + uint32_t size; + uintptr_t * ptr; + char symname[]; +}; + +vm_object_t __elfN(linux_shared_page_init)(char **); +void __elfN(linux_shared_page_fini)(vm_object_t); +void __elfN(linux_vdso_fixup)(struct sysentvec *); +void __elfN(linux_vdso_reloc)(struct sysentvec *, long); +void __elfN(linux_vdso_sym_init)(struct linux_vdso_sym *); + +#define LINUX_VDSO_SYM_INTPTR(name) \ +uintptr_t name; \ +LINUX_VDSO_SYM_DEFINE(name) + +#define LINUX_VDSO_SYM_CHAR(name) \ +const char * name; \ +LINUX_VDSO_SYM_DEFINE(name) + +#define LINUX_VDSO_SYM_DEFINE(name) \ +static struct linux_vdso_sym name ## sym = { \ + .symname = #name, \ + .size = sizeof(#name), \ + .ptr = (uintptr_t *)&name \ +}; \ +SYSINIT(__elfN(name ## _sym_init), SI_SUB_EXEC, \ + SI_ORDER_FIRST, __elfN(linux_vdso_sym_init), &name ## sym); \ +struct __hack + +#endif /* _LINUX_VDSO_H_ */ diff --git a/sys/compat/linux/stats_timing.d b/sys/compat/linux/stats_timing.d index d0b6f73c654c..1b60dc98689a 100644 --- a/sys/compat/linux/stats_timing.d +++ b/sys/compat/linux/stats_timing.d @@ -39,7 +39,6 @@ * possible for a given application * - graph of longest running (CPU-time!) function in total * - may help finding problem cases in the kernel code - * - timing statistics for the emul_lock * - graph of longest held (CPU-time!) locks */ diff --git a/sys/compat/ndis/subr_ntoskrnl.c b/sys/compat/ndis/subr_ntoskrnl.c index 482392d4a96c..95670ba5dfde 100644 --- a/sys/compat/ndis/subr_ntoskrnl.c +++ b/sys/compat/ndis/subr_ntoskrnl.c @@ -3749,7 +3749,7 @@ ntoskrnl_insert_timer(timer, ticks) timer->k_callout = c; - callout_init(c, CALLOUT_MPSAFE); + callout_init(c, 1); callout_reset(c, ticks, ntoskrnl_timercall, timer); } diff --git a/sys/compat/svr4/svr4_misc.c b/sys/compat/svr4/svr4_misc.c index cef1b488e673..c0da170a5e3b 100644 --- a/sys/compat/svr4/svr4_misc.c +++ b/sys/compat/svr4/svr4_misc.c @@ -167,15 +167,22 @@ svr4_sys_execv(td, uap) struct svr4_sys_execv_args *uap; { struct image_args eargs; + struct vmspace *oldvmspace; char *path; int error; CHECKALTEXIST(td, uap->path, &path); + error = pre_execve(td, &oldvmspace); + if (error != 0) { + free(path, M_TEMP); + return (error); + } error = exec_copyin_args(&eargs, path, UIO_SYSSPACE, uap->argp, NULL); free(path, M_TEMP); if (error == 0) error = kern_execve(td, &eargs, NULL); + post_execve(td, error, oldvmspace); return (error); } @@ -185,16 +192,23 @@ svr4_sys_execve(td, uap) struct svr4_sys_execve_args *uap; { struct image_args eargs; + struct vmspace *oldvmspace; char *path; int error; CHECKALTEXIST(td, uap->path, &path); + error = pre_execve(td, &oldvmspace); + if (error != 0) { + free(path, M_TEMP); + return (error); + } error = exec_copyin_args(&eargs, path, UIO_SYSSPACE, uap->argp, uap->envp); free(path, M_TEMP); if (error == 0) error = kern_execve(td, &eargs, NULL); + post_execve(td, error, oldvmspace); return (error); } diff --git a/sys/compat/svr4/svr4_sysvec.c b/sys/compat/svr4/svr4_sysvec.c index 561a838c507f..125a7d80c248 100644 --- a/sys/compat/svr4/svr4_sysvec.c +++ b/sys/compat/svr4/svr4_sysvec.c @@ -196,6 +196,7 @@ struct sysentvec svr4_sysvec = { .sv_fetch_syscall_args = cpu_fetch_syscall_args, .sv_syscallnames = NULL, .sv_schedtail = NULL, + .sv_thread_detach = NULL, }; const char svr4_emul_path[] = "/compat/svr4"; diff --git a/sys/conf/NOTES b/sys/conf/NOTES index 06c8549764c0..8f00f59d9d7c 100644 --- a/sys/conf/NOTES +++ b/sys/conf/NOTES @@ -576,6 +576,7 @@ options STACK # please see hwpmc(4). device hwpmc # Driver (also a loadable module) +options HWPMC_DEBUG options HWPMC_HOOKS # Other necessary kernel hooks diff --git a/sys/conf/files b/sys/conf/files index caaed94e76b9..0a63a1c2dd2d 100644 --- a/sys/conf/files +++ b/sys/conf/files @@ -2156,37 +2156,6 @@ dev/sdhci/sdhci.c optional sdhci dev/sdhci/sdhci_if.m optional sdhci dev/sdhci/sdhci_pci.c optional sdhci pci dev/sf/if_sf.c optional sf pci -dev/sfxge/common/efx_bootcfg.c optional sfxge pci -dev/sfxge/common/efx_ev.c optional sfxge pci -dev/sfxge/common/efx_filter.c optional sfxge pci -dev/sfxge/common/efx_intr.c optional sfxge pci -dev/sfxge/common/efx_mac.c optional sfxge pci -dev/sfxge/common/efx_mcdi.c optional sfxge pci -dev/sfxge/common/efx_mon.c optional sfxge pci -dev/sfxge/common/efx_nic.c optional sfxge pci -dev/sfxge/common/efx_nvram.c optional sfxge pci -dev/sfxge/common/efx_phy.c optional sfxge pci -dev/sfxge/common/efx_port.c optional sfxge pci -dev/sfxge/common/efx_rx.c optional sfxge pci -dev/sfxge/common/efx_sram.c optional sfxge pci -dev/sfxge/common/efx_tx.c optional sfxge pci -dev/sfxge/common/efx_vpd.c optional sfxge pci -dev/sfxge/common/efx_wol.c optional sfxge pci -dev/sfxge/common/siena_mac.c optional sfxge pci -dev/sfxge/common/siena_mon.c optional sfxge pci -dev/sfxge/common/siena_nic.c optional sfxge pci -dev/sfxge/common/siena_nvram.c optional sfxge pci -dev/sfxge/common/siena_phy.c optional sfxge pci -dev/sfxge/common/siena_sram.c optional sfxge pci -dev/sfxge/common/siena_vpd.c optional sfxge pci -dev/sfxge/sfxge.c optional sfxge pci -dev/sfxge/sfxge_dma.c optional sfxge pci -dev/sfxge/sfxge_ev.c optional sfxge pci -dev/sfxge/sfxge_intr.c optional sfxge pci -dev/sfxge/sfxge_mcdi.c optional sfxge pci -dev/sfxge/sfxge_port.c optional sfxge pci -dev/sfxge/sfxge_rx.c optional sfxge pci -dev/sfxge/sfxge_tx.c optional sfxge pci dev/sge/if_sge.c optional sge pci dev/si/si.c optional si dev/si/si2_z280.c optional si @@ -4052,6 +4021,7 @@ xen/xenbus/xenbusb_if.m optional xenhvm xen/xenbus/xenbusb.c optional xenhvm xen/xenbus/xenbusb_front.c optional xenhvm xen/xenbus/xenbusb_back.c optional xenhvm +xen/xenmem/xenmem_if.m optional xenhvm xdr/xdr.c optional krpc | nfslockd | nfscl | nfsd xdr/xdr_array.c optional krpc | nfslockd | nfscl | nfsd xdr/xdr_mbuf.c optional krpc | nfslockd | nfscl | nfsd diff --git a/sys/conf/files.amd64 b/sys/conf/files.amd64 index 8aadcf5fba2f..f1a4e97a25aa 100644 --- a/sys/conf/files.amd64 +++ b/sys/conf/files.amd64 @@ -20,6 +20,18 @@ linux32_assym.h optional compat_linux32 \ no-obj no-implicit-rule before-depend \ clean "linux32_assym.h" # +linux32_locore.o optional compat_linux32 \ + dependency "linux32_assym.h $S/amd64/linux32/linux32_locore.s" \ + compile-with "${CC} -x assembler-with-cpp -DLOCORE -m32 -shared -s -pipe -I. -I$S -Werror -Wall -fno-common -nostdinc -nostdlib -Wl,-T$S/amd64/linux32/linux32_vdso.lds.s -Wl,-soname=linux32_vdso.so,--eh-frame-hdr,-fPIC,-warn-common ${.IMPSRC} -o ${.TARGET}" \ + no-obj no-implicit-rule \ + clean "linux32_locore.o" +# +linux32_vdso.so optional compat_linux32 \ + dependency "linux32_locore.o" \ + compile-with "${OBJCOPY} --input-target binary --output-target elf64-x86-64-freebsd --binary-architecture i386 linux32_locore.o ${.TARGET}" \ + no-implicit-rule \ + clean "linux32_vdso.so" +# ia32_genassym.o standard \ dependency "$S/compat/ia32/ia32_genassym.c" \ compile-with "${CC} ${CFLAGS:N-fno-common} -c ${.IMPSRC}" \ @@ -292,37 +304,52 @@ dev/qlxgbe/ql_isr.c optional qlxgbe pci dev/qlxgbe/ql_misc.c optional qlxgbe pci dev/qlxgbe/ql_os.c optional qlxgbe pci dev/qlxgbe/ql_reset.c optional qlxgbe pci -dev/sfxge/common/efx_bootcfg.c optional sfxge inet pci -dev/sfxge/common/efx_ev.c optional sfxge inet pci -dev/sfxge/common/efx_filter.c optional sfxge inet pci -dev/sfxge/common/efx_intr.c optional sfxge inet pci -dev/sfxge/common/efx_mac.c optional sfxge inet pci -dev/sfxge/common/efx_mcdi.c optional sfxge inet pci -dev/sfxge/common/efx_mon.c optional sfxge inet pci -dev/sfxge/common/efx_nic.c optional sfxge inet pci -dev/sfxge/common/efx_nvram.c optional sfxge inet pci -dev/sfxge/common/efx_phy.c optional sfxge inet pci -dev/sfxge/common/efx_port.c optional sfxge inet pci -dev/sfxge/common/efx_rx.c optional sfxge inet pci -dev/sfxge/common/efx_sram.c optional sfxge inet pci -dev/sfxge/common/efx_tx.c optional sfxge inet pci -dev/sfxge/common/efx_vpd.c optional sfxge inet pci -dev/sfxge/common/efx_wol.c optional sfxge inet pci -dev/sfxge/common/siena_mac.c optional sfxge inet pci -dev/sfxge/common/siena_mon.c optional sfxge inet pci -dev/sfxge/common/siena_nic.c optional sfxge inet pci -dev/sfxge/common/siena_nvram.c optional sfxge inet pci -dev/sfxge/common/siena_phy.c optional sfxge inet pci -dev/sfxge/common/siena_sram.c optional sfxge inet pci -dev/sfxge/common/siena_vpd.c optional sfxge inet pci -dev/sfxge/sfxge.c optional sfxge inet pci -dev/sfxge/sfxge_dma.c optional sfxge inet pci -dev/sfxge/sfxge_ev.c optional sfxge inet pci -dev/sfxge/sfxge_intr.c optional sfxge inet pci -dev/sfxge/sfxge_mcdi.c optional sfxge inet pci -dev/sfxge/sfxge_port.c optional sfxge inet pci -dev/sfxge/sfxge_rx.c optional sfxge inet pci -dev/sfxge/sfxge_tx.c optional sfxge inet pci +dev/sfxge/common/efx_bootcfg.c optional sfxge pci +dev/sfxge/common/efx_crc32.c optional sfxge pci +dev/sfxge/common/efx_ev.c optional sfxge pci +dev/sfxge/common/efx_filter.c optional sfxge pci +dev/sfxge/common/efx_hash.c optional sfxge pci +dev/sfxge/common/efx_intr.c optional sfxge pci +dev/sfxge/common/efx_mac.c optional sfxge pci +dev/sfxge/common/efx_mcdi.c optional sfxge pci +dev/sfxge/common/efx_mon.c optional sfxge pci +dev/sfxge/common/efx_nic.c optional sfxge pci +dev/sfxge/common/efx_nvram.c optional sfxge pci +dev/sfxge/common/efx_phy.c optional sfxge pci +dev/sfxge/common/efx_port.c optional sfxge pci +dev/sfxge/common/efx_rx.c optional sfxge pci +dev/sfxge/common/efx_sram.c optional sfxge pci +dev/sfxge/common/efx_tx.c optional sfxge pci +dev/sfxge/common/efx_vpd.c optional sfxge pci +dev/sfxge/common/efx_wol.c optional sfxge pci +dev/sfxge/common/hunt_ev.c optional sfxge pci +dev/sfxge/common/hunt_filter.c optional sfxge pci +dev/sfxge/common/hunt_intr.c optional sfxge pci +dev/sfxge/common/hunt_mac.c optional sfxge pci +dev/sfxge/common/hunt_mcdi.c optional sfxge pci +dev/sfxge/common/hunt_nic.c optional sfxge pci +dev/sfxge/common/hunt_nvram.c optional sfxge pci +dev/sfxge/common/hunt_phy.c optional sfxge pci +dev/sfxge/common/hunt_rx.c optional sfxge pci +dev/sfxge/common/hunt_sram.c optional sfxge pci +dev/sfxge/common/hunt_tx.c optional sfxge pci +dev/sfxge/common/hunt_vpd.c optional sfxge pci +dev/sfxge/common/siena_mac.c optional sfxge pci +dev/sfxge/common/siena_mcdi.c optional sfxge pci +dev/sfxge/common/siena_nic.c optional sfxge pci +dev/sfxge/common/siena_nvram.c optional sfxge pci +dev/sfxge/common/siena_phy.c optional sfxge pci +dev/sfxge/common/siena_sram.c optional sfxge pci +dev/sfxge/common/siena_vpd.c optional sfxge pci +dev/sfxge/sfxge.c optional sfxge pci +dev/sfxge/sfxge_dma.c optional sfxge pci +dev/sfxge/sfxge_ev.c optional sfxge pci +dev/sfxge/sfxge_intr.c optional sfxge pci +dev/sfxge/sfxge_mcdi.c optional sfxge pci +dev/sfxge/sfxge_nvram.c optional sfxge pci +dev/sfxge/sfxge_port.c optional sfxge pci +dev/sfxge/sfxge_rx.c optional sfxge pci +dev/sfxge/sfxge_tx.c optional sfxge pci dev/sio/sio.c optional sio dev/sio/sio_isa.c optional sio isa dev/sio/sio_pccard.c optional sio pccard @@ -473,8 +500,6 @@ compat/linsysfs/linsysfs.c optional linsysfs # Linux/i386 binary support # amd64/linux32/linux32_dummy.c optional compat_linux32 -amd64/linux32/linux32_locore.s optional compat_linux32 \ - dependency "linux32_assym.h" amd64/linux32/linux32_machdep.c optional compat_linux32 amd64/linux32/linux32_support.s optional compat_linux32 \ dependency "linux32_assym.h" @@ -497,6 +522,10 @@ compat/linux/linux_time.c optional compat_linux32 compat/linux/linux_timer.c optional compat_linux32 compat/linux/linux_uid16.c optional compat_linux32 compat/linux/linux_util.c optional compat_linux32 +compat/linux/linux_vdso.c optional compat_linux32 +compat/linux/linux_common.c optional compat_linux32 +compat/linux/linux_event.c optional compat_linux32 +compat/linux/linux.c optional compat_linux32 dev/amr/amr_linux.c optional compat_linux32 amr dev/mfi/mfi_linux.c optional compat_linux32 mfi # diff --git a/sys/conf/files.arm b/sys/conf/files.arm index b40f7c9cd41c..a406d331fb60 100644 --- a/sys/conf/files.arm +++ b/sys/conf/files.arm @@ -37,6 +37,7 @@ arm/arm/fiq.c standard arm/arm/fiq_subr.S standard arm/arm/fusu.S standard arm/arm/gdb_machdep.c optional gdb +arm/arm/gic.c optional gic arm/arm/identcpu.c standard arm/arm/in_cksum.c optional inet | inet6 arm/arm/in_cksum_arm.S optional inet | inet6 diff --git a/sys/conf/files.arm64 b/sys/conf/files.arm64 index f80fecd7c811..8bdc93a93457 100644 --- a/sys/conf/files.arm64 +++ b/sys/conf/files.arm64 @@ -1,10 +1,12 @@ # $FreeBSD$ arm/arm/devmap.c standard arm/arm/generic_timer.c standard +arm/arm/pmu.c standard arm64/arm64/autoconf.c standard arm64/arm64/bcopy.c standard arm64/arm64/bus_machdep.c standard arm64/arm64/bus_space_asm.S standard +arm64/arm64/busdma_bounce.c standard arm64/arm64/busdma_machdep.c standard arm64/arm64/clock.c standard arm64/arm64/copyinout.S standard @@ -18,6 +20,8 @@ arm64/arm64/dump_machdep.c standard arm64/arm64/elf_machdep.c standard arm64/arm64/exception.S standard arm64/arm64/gic.c standard +arm64/arm64/gic_v3.c standard +arm64/arm64/gic_v3_fdt.c optional fdt arm64/arm64/identcpu.c standard arm64/arm64/intr_machdep.c standard arm64/arm64/in_cksum.c optional inet | inet6 @@ -37,6 +41,8 @@ arm64/arm64/uio_machdep.c standard arm64/arm64/vfp.c standard arm64/arm64/vm_machdep.c standard dev/fdt/fdt_arm64.c optional fdt +dev/hwpmc/hwpmc_arm64.c optional hwpmc +dev/hwpmc/hwpmc_arm64_md.c optional hwpmc dev/ofw/ofw_cpu.c optional fdt dev/psci/psci.c optional psci dev/psci/psci_arm64.S optional psci diff --git a/sys/conf/files.i386 b/sys/conf/files.i386 index 68dd6a9aea4e..928b10d098f0 100644 --- a/sys/conf/files.i386 +++ b/sys/conf/files.i386 @@ -19,6 +19,18 @@ linux_assym.h optional compat_linux \ no-obj no-implicit-rule before-depend \ clean "linux_assym.h" # +linux_locore.o optional compat_linux \ + dependency "linux_assym.h $S/i386/linux/linux_locore.s" \ + compile-with "${CC} -x assembler-with-cpp -DLOCORE -shared -s -pipe -I. -I$S -Werror -Wall -fno-common -nostdinc -nostdlib -Wl,-T$S/i386/linux/linux_vdso.lds.s -Wl,-soname=linux_vdso.so,--eh-frame-hdr,-fPIC,-warn-common ${.IMPSRC} -o ${.TARGET}" \ + no-obj no-implicit-rule \ + clean "linux_locore.o" +# +linux_vdso.so optional compat_linux \ + dependency "linux_locore.o" \ + compile-with "${OBJCOPY} --input-target binary --output-target elf32-i386-freebsd --binary-architecture i386 linux_locore.o ${.TARGET}" \ + no-implicit-rule \ + clean "linux_vdso.so" +# svr4_genassym.o optional compat_svr4 \ dependency "$S/i386/svr4/svr4_genassym.c" \ compile-with "${CC} ${CFLAGS:N-fno-common} -c ${.IMPSRC}" \ @@ -69,6 +81,7 @@ hptrr_lib.o optional hptrr \ cddl/contrib/opensolaris/common/atomic/i386/opensolaris_atomic.S optional zfs compile-with "${ZFS_S}" compat/linprocfs/linprocfs.c optional linprocfs compat/linsysfs/linsysfs.c optional linsysfs +compat/linux/linux_event.c optional compat_linux compat/linux/linux_emul.c optional compat_linux compat/linux/linux_file.c optional compat_linux compat/linux/linux_fork.c optional compat_linux @@ -86,6 +99,8 @@ compat/linux/linux_time.c optional compat_linux compat/linux/linux_timer.c optional compat_linux compat/linux/linux_uid16.c optional compat_linux compat/linux/linux_util.c optional compat_linux +compat/linux/linux_vdso.c optional compat_linux +compat/linux/linux.c optional compat_linux compat/ndis/kern_ndis.c optional ndisapi pci compat/ndis/kern_windrv.c optional ndisapi pci compat/ndis/subr_hal.c optional ndisapi pci @@ -490,8 +505,6 @@ i386/isa/prof_machdep.c optional profiling-routine i386/isa/spic.c optional spic i386/linux/imgact_linux.c optional compat_linux i386/linux/linux_dummy.c optional compat_linux -i386/linux/linux_locore.s optional compat_linux \ - dependency "linux_assym.h" i386/linux/linux_machdep.c optional compat_linux i386/linux/linux_ptrace.c optional compat_linux i386/linux/linux_support.s optional compat_linux \ diff --git a/sys/conf/files.pc98 b/sys/conf/files.pc98 index ae165fcd3b85..28a94a8099cd 100644 --- a/sys/conf/files.pc98 +++ b/sys/conf/files.pc98 @@ -21,6 +21,18 @@ linux_assym.h optional compat_linux \ no-obj no-implicit-rule before-depend \ clean "linux_assym.h" # +linux_locore.o optional compat_linux \ + dependency "linux_assym.h $S/i386/linux/linux_locore.s" \ + compile-with "${CC} -x assembler-with-cpp -DLOCORE -shared -s -pipe -I. -I$S -Werror -Wall -fno-common -nostdinc -nostdlib -Wl,-T$S/i386/linux/linux_vdso.lds.s -Wl,-soname=linux_vdso.so,--eh-frame-hdr,-fPIC,-warn-common ${.IMPSRC} -o ${.TARGET}" \ + no-obj no-implicit-rule \ + clean "linux_locore.o" +# +linux_vdso.so optional compat_linux \ + dependency "linux_locore.o" \ + compile-with "${OBJCOPY} --input-target binary --output-target elf32-i386-freebsd --binary-architecture i386 linux_locore.o ${.TARGET}" \ + no-implicit-rule \ + clean "linux_vdso.so" +# svr4_genassym.o optional compat_svr4 \ dependency "$S/i386/svr4/svr4_genassym.c" \ compile-with "${CC} ${CFLAGS:N-fno-common} -c ${.IMPSRC}" \ @@ -41,6 +53,7 @@ ukbdmap.h optional ukbd_dflt_keymap \ cddl/contrib/opensolaris/common/atomic/i386/opensolaris_atomic.S optional zfs compile-with "${ZFS_S}" compat/linprocfs/linprocfs.c optional linprocfs compat/linsysfs/linsysfs.c optional linsysfs +compat/linux/linux_event.c optional compat_linux compat/linux/linux_emul.c optional compat_linux compat/linux/linux_file.c optional compat_linux compat/linux/linux_fork.c optional compat_linux @@ -58,6 +71,8 @@ compat/linux/linux_time.c optional compat_linux compat/linux/linux_timer.c optional compat_linux compat/linux/linux_uid16.c optional compat_linux compat/linux/linux_util.c optional compat_linux +compat/linux/linux_vdso.c optional compat_linux +compat/linux/linux.c optional compat_linux compat/svr4/imgact_svr4.c optional compat_svr4 compat/svr4/svr4_fcntl.c optional compat_svr4 compat/svr4/svr4_filio.c optional compat_svr4 @@ -192,8 +207,6 @@ i386/isa/pmtimer.c optional pmtimer i386/isa/prof_machdep.c optional profiling-routine i386/linux/imgact_linux.c optional compat_linux i386/linux/linux_dummy.c optional compat_linux -i386/linux/linux_locore.s optional compat_linux \ - dependency "linux_assym.h" i386/linux/linux_machdep.c optional compat_linux i386/linux/linux_ptrace.c optional compat_linux i386/linux/linux_support.s optional compat_linux \ diff --git a/sys/conf/files.powerpc b/sys/conf/files.powerpc index 1a67f5c7dd8d..4158f2cb7ab1 100644 --- a/sys/conf/files.powerpc +++ b/sys/conf/files.powerpc @@ -138,6 +138,7 @@ powerpc/mpc85xx/mpc85xx.c optional mpc85xx powerpc/mpc85xx/mpc85xx_gpio.c optional mpc85xx gpio powerpc/mpc85xx/platform_mpc85xx.c optional mpc85xx powerpc/mpc85xx/pci_mpc85xx.c optional pci mpc85xx +powerpc/mpc85xx/pci_mpc85xx_pcib.c optional pci mpc85xx powerpc/ofw/ofw_machdep.c standard powerpc/ofw/ofw_pci.c optional pci powerpc/ofw/ofw_pcibus.c optional pci diff --git a/sys/conf/options b/sys/conf/options index 6d2a0fa160dd..eabd73c0e69f 100644 --- a/sys/conf/options +++ b/sys/conf/options @@ -861,6 +861,7 @@ DCONS_FORCE_CONSOLE opt_dcons.h DCONS_FORCE_GDB opt_dcons.h # HWPMC options +HWPMC_DEBUG opt_global.h HWPMC_HOOKS HWPMC_MIPS_BACKTRACE opt_hwpmc_hooks.h @@ -930,7 +931,7 @@ IPOIB_CM opt_ofed.h # Resource Accounting RACCT opt_global.h -RACCT_DISABLED opt_global.h +RACCT_DEFAULT_TO_DISABLED opt_global.h # Resource Limits RCTL opt_global.h diff --git a/sys/conf/options.arm b/sys/conf/options.arm index b712b02fec5a..57cef6a18dc6 100644 --- a/sys/conf/options.arm +++ b/sys/conf/options.arm @@ -21,6 +21,8 @@ CPU_XSCALE_81342 opt_global.h CPU_XSCALE_IXP425 opt_global.h CPU_XSCALE_IXP435 opt_global.h CPU_XSCALE_PXA2X0 opt_global.h +DEV_GIC opt_global.h +EFI opt_platform.h FLASHADDR opt_global.h GIC_DEFAULT_ICFGR_INIT opt_global.h IPI_IRQ_START opt_smp.h diff --git a/sys/contrib/dev/acpica/changes.txt b/sys/contrib/dev/acpica/changes.txt index ad9d23c612d3..511652fced60 100644 --- a/sys/contrib/dev/acpica/changes.txt +++ b/sys/contrib/dev/acpica/changes.txt @@ -1,3 +1,51 @@ +---------------------------------------- +08 April 2015. Summary of changes for version 20150515: + +This release implements most of ACPI 6.0 as described below. + +1) ACPICA kernel-resident subsystem: + +Implemented runtime argument checking and return value checking for all +new ACPI 6.0 predefined names. This includes: _BTH, _CR3, _DSD, _LPI, +_MTL, _PRR, _RDI, _RST, _TFP, _TSN. + +Example Code and Data Size: These are the sizes for the OS-independent +acpica.lib produced by the Microsoft Visual C++ 9.0 32-bit compiler. The +debug version of the code includes the debug output trace mechanism and +has a much larger code and data size. + + Current Release: + Non-Debug Version: 99.9K Code, 27.5K Data, 127.4K Total + Debug Version: 195.2K Code, 80.8K Data, 276.0K Total + Previous Release: + Non-Debug Version: 99.1K Code, 27.3K Data, 126.4K Total + Debug Version: 192.8K Code, 79.9K Data, 272.7K Total + + +2) iASL Compiler/Disassembler and Tools: + +iASL compiler: Added compile-time support for all new ACPI 6.0 predefined +names (argument count validation and return value typechecking.) + +iASL disassembler and table compiler: implemented support for all new +ACPI 6.0 tables. This includes: DRTM, IORT, LPIT, NFIT, STAO, WPBT, XENV. + +iASL disassembler and table compiler: Added ACPI 6.0 changes to existing +tables: FADT, MADT. + +iASL preprocessor: Added a new directive to enable inclusion of binary +blobs into ASL code. The new directive is #includebinary. It takes a +binary file as input and emits a named ascii buffer object into the ASL +code. + +AcpiHelp: Added support for all new ACPI 6.0 predefined names. + +AcpiHelp: Added a new option, -d, to display all iASL preprocessor +directives. + +AcpiHelp: Added a new option, -t, to display all known/supported ACPI +tables. + ---------------------------------------- 10 April 2015. Summary of changes for version 20150410: diff --git a/sys/contrib/dev/acpica/common/adisasm.c b/sys/contrib/dev/acpica/common/adisasm.c index 658b5be55f60..5d0cee25f602 100644 --- a/sys/contrib/dev/acpica/common/adisasm.c +++ b/sys/contrib/dev/acpica/common/adisasm.c @@ -214,6 +214,7 @@ AdAmlDisassemble ( char **OutFilename) { ACPI_STATUS Status; + ACPI_STATUS GlobalStatus = AE_OK; char *DisasmFilename = NULL; char *ExternalFilename; ACPI_EXTERNAL_FILE *ExternalFileList = AcpiGbl_ExternalFileList; @@ -229,7 +230,7 @@ AdAmlDisassemble ( */ if (Filename) { - Status = AcpiDbGetTableFromFile (Filename, &Table); + Status = AcpiDbGetTableFromFile (Filename, &Table, FALSE); if (ACPI_FAILURE (Status)) { return (Status); @@ -250,9 +251,16 @@ AdAmlDisassemble ( continue; } - Status = AcpiDbGetTableFromFile (ExternalFilename, &ExternalTable); + Status = AcpiDbGetTableFromFile (ExternalFilename, &ExternalTable, TRUE); if (ACPI_FAILURE (Status)) { + if (Status == AE_TYPE) + { + ExternalFileList = ExternalFileList->Next; + GlobalStatus = AE_TYPE; + Status = AE_OK; + continue; + } return (Status); } @@ -282,6 +290,11 @@ AdAmlDisassemble ( ExternalFileList = ExternalFileList->Next; } + if (ACPI_FAILURE (GlobalStatus)) + { + return (GlobalStatus); + } + /* Clear external list generated by Scope in external tables */ if (AcpiGbl_ExternalFileList) diff --git a/sys/contrib/dev/acpica/common/ahpredef.c b/sys/contrib/dev/acpica/common/ahpredef.c index a84353b3d166..1454880ec48f 100644 --- a/sys/contrib/dev/acpica/common/ahpredef.c +++ b/sys/contrib/dev/acpica/common/ahpredef.c @@ -94,6 +94,7 @@ const AH_PREDEFINED_NAME AslPredefinedInfo[] = AH_PREDEF ("_BMS", "Battery Measurement Sampling Time", "Sets the battery measurement sampling time"), AH_PREDEF ("_BQC", "Brightness Query Current", "Returns the current display brightness level"), AH_PREDEF ("_BST", "Battery Status", "Returns a Control Method Battery status block"), + AH_PREDEF ("_BTH", "Battery Throttle Limit", "Thermal limit for charging and discharging"), AH_PREDEF ("_BTM", "Battery Time", "Returns the battery runtime"), AH_PREDEF ("_BTP", "Battery Trip Point", "Sets a Control Method Battery trip point"), AH_PREDEF ("_CBA", "Configuration Base Address", "Sets the base address for a PCI Express host bridge"), @@ -102,6 +103,7 @@ const AH_PREDEFINED_NAME AslPredefinedInfo[] = AH_PREDEF ("_CID", "Compatible ID", "Returns a device's Plug and Play Compatible ID list"), AH_PREDEF ("_CLS", "Class Code", "Returns PCI class code and subclass"), AH_PREDEF ("_CPC", "Continuous Performance Control", "Returns a list of performance control interfaces"), + AH_PREDEF ("_CR3", "Warm/Standby Temperature", "Temperature for a fast low power state"), AH_PREDEF ("_CRS", "Current Resource Settings", "Returns the current resource settings for a device"), AH_PREDEF ("_CRT", "Critical Temperature", "Returns the shutdown critical temperature"), AH_PREDEF ("_CSD", "C-State Dependencies", "Returns a list of C-state dependencies"), @@ -175,6 +177,7 @@ const AH_PREDEFINED_NAME AslPredefinedInfo[] = AH_PREDEF ("_LIN", "Lines In Use", "Handshake lines, Resource Descriptor field"), AH_PREDEF ("_LL_", "Low Level", "Interrupt polarity, Resource Descriptor field"), AH_PREDEF ("_LPD", "Low Power Dependencies", "Returns a list of dependencies for low power idle entry"), + AH_PREDEF ("_LPI", "Low Power Idle States", "Returns a list of supported low power idle states"), AH_PREDEF ("_MAF", "Maximum Address Fixed", "Resource Descriptor field"), AH_PREDEF ("_MAT", "Multiple APIC Table Entry", "Returns a list of MADT APIC structure entries"), AH_PREDEF ("_MAX", "Maximum Base Address", "Resource Descriptor field"), @@ -186,6 +189,7 @@ const AH_PREDEFINED_NAME AslPredefinedInfo[] = AH_PREDEF ("_MOD", "Mode", "Interrupt mode, Resource Descriptor field"), AH_PREDEF ("_MSG", "Message", "Sets the system message waiting status indicator"), AH_PREDEF ("_MSM", "Memory Set Monitoring", "Sets bandwidth monitoring parameters for a memory device"), + AH_PREDEF ("_MTL", "Minimum Throttle Limit", "Returns the minimum throttle limit for a thermal zone"), AH_PREDEF ("_MTP", "Memory Type", "Resource Descriptor field"), AH_PREDEF ("_NTT", "Notification Temperature Threshold", "Returns a threshold for device temperature change that requires platform notification"), AH_PREDEF ("_OFF", "Power Off", "Sets a power resource to the off state"), @@ -209,7 +213,7 @@ const AH_PREDEFINED_NAME AslPredefinedInfo[] = AH_PREDEF ("_PMD", "Power Metered Devices", "Returns a list of devices that are measured by the power meter device"), AH_PREDEF ("_PMM", "Power Meter Measurement", "Returns the current value of the Power Meter"), AH_PREDEF ("_POL", "Polarity", "Interrupt polarity, Resource Descriptor field"), - AH_PREDEF ("_PPC", "Performance Present Capabilites", "Returns a list of the performance states currently supported by the platform"), + AH_PREDEF ("_PPC", "Performance Present Capabilities", "Returns a list of the performance states currently supported by the platform"), AH_PREDEF ("_PPE", "Polling for Platform Error", "Returns the polling interval to retrieve Corrected Platform Error information"), AH_PREDEF ("_PPI", "Pin Configuration", "Resource Descriptor field"), AH_PREDEF ("_PR", "Processor", "Predefined scope for processor objects"), @@ -219,6 +223,7 @@ const AH_PREDEFINED_NAME AslPredefinedInfo[] = AH_PREDEF ("_PR3", "Power Resources for D3hot", "Returns a list of dependent power resources to enter state D3hot"), AH_PREDEF ("_PRE", "Power Resources for Enumeration", "Returns a list of dependent power resources to enumerate devices on a bus"), AH_PREDEF ("_PRL", "Power Source Redundancy List", "Returns a list of power source devices in the same redundancy grouping"), + AH_PREDEF ("_PRR", "Power Resource for Reset", "Execute a reset on a device"), AH_PREDEF ("_PRS", "Possible Resource Settings", "Returns a list of a device's possible resource settings"), AH_PREDEF ("_PRT", "PCI Routing Table", "Returns a list of PCI interrupt mappings"), AH_PREDEF ("_PRW", "Power Resources for Wake", "Returns a list of dependent power resources for waking"), @@ -242,10 +247,12 @@ const AH_PREDEFINED_NAME AslPredefinedInfo[] = AH_PREDEF ("_Qxx", "EC Query", "Embedded Controller query and SMBus Alarm control method"), AH_PREDEF ("_RBO", "Register Bit Offset", "Resource Descriptor field"), AH_PREDEF ("_RBW", "Register Bit Width", "Resource Descriptor field"), + AH_PREDEF ("_RDI", "Resource Dependencies for Idle", "Returns a list of dependencies for idle states"), AH_PREDEF ("_REG", "Region Availability", "Inform AML code of an operation region availability change"), AH_PREDEF ("_REV", "Supported ACPI Revision", "Returns the revision of the ACPI specification that is implemented"), AH_PREDEF ("_RMV", "Removal Status", "Returns a device's removal ability status (docking)"), AH_PREDEF ("_RNG", "Range", "Memory range type, Resource Descriptor field"), + AH_PREDEF ("_RST", "Device Reset", "Executes a reset on a device"), AH_PREDEF ("_ROM", "Read-Only Memory", "Returns a copy of the ROM data for a display device"), AH_PREDEF ("_RT_", "Resource Type", "Resource Descriptor field"), AH_PREDEF ("_RTV", "Relative Temperature Values", "Returns temperature value information"), @@ -296,6 +303,7 @@ const AH_PREDEFINED_NAME AslPredefinedInfo[] = AH_PREDEF ("_TC1", "Thermal Constant 1", "Returns TC1 for the passive cooling formula"), AH_PREDEF ("_TC2", "Thermal Constant 2", "Returns TC2 for the passive cooling formula"), AH_PREDEF ("_TDL", "T-State Depth Limit", "Returns the _TSS entry number of the lowest power throttling state"), + AH_PREDEF ("_TFP", "Thermal Fast Sampling Period", "Returns the sampling period for passive cooling"), AH_PREDEF ("_TIP", "Expired Timer Wake Policy", "Returns timer policies of the wake alarm device"), AH_PREDEF ("_TIV", "Timer Values", "Returns remaining time of the wake alarm device"), AH_PREDEF ("_TMP", "Temperature", "Returns a thermal zone's current temperature"), @@ -306,6 +314,7 @@ const AH_PREDEFINED_NAME AslPredefinedInfo[] = AH_PREDEF ("_TRT", "Thermal Relationship Table", "Returns thermal relationships between platform devices"), AH_PREDEF ("_TSD", "Throttling State Dependencies", "Returns a list of T-state dependencies"), AH_PREDEF ("_TSF", "Type-Specific Flags", "Resource Descriptor field"), + AH_PREDEF ("_TSN", "Thermal Sensor Device", "Returns a reference to a thermal sensor"), AH_PREDEF ("_TSP", "Thermal Sampling Period", "Returns the thermal sampling period for passive cooling"), AH_PREDEF ("_TSS", "Throttling Supported States", "Returns supported throttling state information"), AH_PREDEF ("_TST", "Temperature Sensor Threshold", "Returns the minimum separation for a device's temperature trip points"), diff --git a/sys/contrib/dev/acpica/common/ahtable.c b/sys/contrib/dev/acpica/common/ahtable.c new file mode 100644 index 000000000000..d4ce436d4cc3 --- /dev/null +++ b/sys/contrib/dev/acpica/common/ahtable.c @@ -0,0 +1,150 @@ +/****************************************************************************** + * + * Module Name: ahtable - Table of known ACPI tables with descriptions + * + *****************************************************************************/ + +/* + * Copyright (C) 2000 - 2015, Intel Corp. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions, and the following disclaimer, + * without modification. + * 2. Redistributions in binary form must reproduce at minimum a disclaimer + * substantially similar to the "NO WARRANTY" disclaimer below + * ("Disclaimer") and any redistribution must be conditioned upon + * including a substantially similar Disclaimer requirement for further + * binary redistribution. + * 3. Neither the names of the above-listed copyright holders nor the names + * of any contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * Alternatively, this software may be distributed under the terms of the + * GNU General Public License ("GPL") version 2 as published by the Free + * Software Foundation. + * + * NO WARRANTY + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGES. + */ + +#include +#include + + +/* Local prototypes */ + +const AH_TABLE * +AcpiAhGetTableInfo ( + char *Signature); + +extern const AH_TABLE AcpiSupportedTables[]; + + +/******************************************************************************* + * + * FUNCTION: AcpiAhGetTableInfo + * + * PARAMETERS: Signature - ACPI signature (4 chars) to match + * + * RETURN: Pointer to a valid AH_TABLE. Null if no match found. + * + * DESCRIPTION: Find a match in the "help" table of supported ACPI tables + * + ******************************************************************************/ + +const AH_TABLE * +AcpiAhGetTableInfo ( + char *Signature) +{ + const AH_TABLE *Info; + + + for (Info = AcpiSupportedTables; Info->Signature; Info++) + { + if (ACPI_COMPARE_NAME (Signature, Info->Signature)) + { + return (Info); + } + } + + return (NULL); +} + + +/* + * Note: Any tables added here should be duplicated within AcpiDmTableData + * in the file common/dmtable.c + */ +const AH_TABLE AcpiSupportedTables[] = +{ + {ACPI_SIG_ASF, "Alert Standard Format table"}, + {ACPI_SIG_BERT, "Boot Error Record Table"}, + {ACPI_SIG_BGRT, "Boot Graphics Resource Table"}, + {ACPI_SIG_BOOT, "Simple Boot Flag Table"}, + {ACPI_SIG_CPEP, "Corrected Platform Error Polling table"}, + {ACPI_SIG_CSRT, "Core System Resource Table"}, + {ACPI_SIG_DBG2, "Debug Port table type 2"}, + {ACPI_SIG_DBGP, "Debug Port table"}, + {ACPI_SIG_DMAR, "DMA Remapping table"}, + {ACPI_SIG_DRTM, "Dynamic Root of Trust for Measurement table"}, + {ACPI_SIG_DSDT, "Differentiated System Description Table (AML table)"}, + {ACPI_SIG_ECDT, "Embedded Controller Boot Resources Table"}, + {ACPI_SIG_EINJ, "Error Injection table"}, + {ACPI_SIG_ERST, "Error Record Serialization Table"}, + {ACPI_SIG_FACS, "Firmware ACPI Control Structure"}, + {ACPI_SIG_FADT, "Fixed ACPI Description Table (FADT)"}, + {ACPI_SIG_FPDT, "Firmware Performance Data Table"}, + {ACPI_SIG_GTDT, "Generic Timer Description Table"}, + {ACPI_SIG_HEST, "Hardware Error Source Table"}, + {ACPI_SIG_HPET, "High Precision Event Timer table"}, + {ACPI_SIG_IORT, "IO Remapping Table"}, + {ACPI_SIG_IVRS, "I/O Virtualization Reporting Structure"}, + {ACPI_SIG_LPIT, "Low Power Idle Table"}, + {ACPI_SIG_MADT, "Multiple APIC Description Table (MADT)"}, + {ACPI_SIG_MCFG, "Memory Mapped Configuration table"}, + {ACPI_SIG_MCHI, "Management Controller Host Interface table"}, + {ACPI_SIG_MPST, "Memory Power State Table"}, + {ACPI_SIG_MSCT, "Maximum System Characteristics Table"}, + {ACPI_SIG_MSDM, "Microsoft Data Management table"}, + {ACPI_SIG_MTMR, "MID Timer Table"}, + {ACPI_SIG_NFIT, "NVDIMM Firmware Interface Table"}, + {ACPI_SIG_PCCT, "Platform Communications Channel Table"}, + {ACPI_SIG_PMTT, "Platform Memory Topology Table"}, + {ACPI_RSDP_NAME,"Root System Description Pointer"}, + {ACPI_SIG_RSDT, "Root System Description Table"}, + {ACPI_SIG_S3PT, "S3 Performance Table"}, + {ACPI_SIG_SBST, "Smart Battery Specification Table"}, + {ACPI_SIG_SLIC, "Software Licensing Description Table"}, + {ACPI_SIG_SLIT, "System Locality Information Table"}, + {ACPI_SIG_SPCR, "Serial Port Console Redirection table"}, + {ACPI_SIG_SPMI, "Server Platform Management Interface table"}, + {ACPI_SIG_SRAT, "System Resource Affinity Table"}, + {ACPI_SIG_SSDT, "Secondary System Description Table (AML table)"}, + {ACPI_SIG_STAO, "Status Override table"}, + {ACPI_SIG_TCPA, "Trusted Computing Platform Alliance table"}, + {ACPI_SIG_TPM2, "Trusted Platform Module hardware interface table"}, + {ACPI_SIG_UEFI, "UEFI Boot Optimization Table"}, + {ACPI_SIG_VRTC, "Virtual Real-Time Clock Table"}, + {ACPI_SIG_WAET, "Windows ACPI Emulated Devices Table"}, + {ACPI_SIG_WDAT, "Watchdog Action Table"}, + {ACPI_SIG_WDDT, "Watchdog Description Table"}, + {ACPI_SIG_WDRT, "Watchdog Resource Table"}, + {ACPI_SIG_WPBT, "Windows Platform Binary Table"}, + {ACPI_SIG_XENV, "Xen Environment table"}, + {ACPI_SIG_XSDT, "Extended System Description Table"}, + {NULL, NULL} +}; diff --git a/sys/contrib/dev/acpica/common/dmextern.c b/sys/contrib/dev/acpica/common/dmextern.c index 0c262c40c3c9..2ea54adccad4 100644 --- a/sys/contrib/dev/acpica/common/dmextern.c +++ b/sys/contrib/dev/acpica/common/dmextern.c @@ -1286,7 +1286,9 @@ AcpiDmUnresolvedWarning ( " * compile because the disassembler did not know how many arguments\n" " * to assign to these methods. To specify the tables needed to resolve\n" " * external control method references, the -e option can be used to\n" - " * specify the filenames. Example iASL invocations:\n" + " * specify the filenames. Note: SSDTs can be dynamically loaded at\n" + " * runtime and may or may not be available via the host OS.\n" + " * Example iASL invocations:\n" " * iasl -e ssdt1.aml ssdt2.aml ssdt3.aml -d dsdt.aml\n" " * iasl -e dsdt.aml ssdt2.aml -d ssdt1.aml\n" " * iasl -e ssdt*.aml -d dsdt.aml\n" @@ -1314,7 +1316,8 @@ AcpiDmUnresolvedWarning ( " * ACPI tables may be required to properly disassemble the code. This\n" " * resulting disassembler output file may not compile because the\n" " * disassembler did not know how many arguments to assign to the\n" - " * unresolved methods.\n" + " * unresolved methods. Note: SSDTs can be dynamically loaded at\n" + " * runtime and may or may not be available via the host OS.\n" " *\n" " * If necessary, the -fe option can be used to specify a file containing\n" " * control method external declarations with the associated method\n" @@ -1345,7 +1348,9 @@ AcpiDmUnresolvedWarning ( "compile because the disassembler did not know how many arguments\n" "to assign to these methods. To specify the tables needed to resolve\n" "external control method references, the -e option can be used to\n" - "specify the filenames. Example iASL invocations:\n" + "specify the filenames. Note: SSDTs can be dynamically loaded at\n" + "runtime and may or may not be available via the host OS.\n" + "Example iASL invocations:\n" " iasl -e ssdt1.aml ssdt2.aml ssdt3.aml -d dsdt.aml\n" " iasl -e dsdt.aml ssdt2.aml -d ssdt1.aml\n" " iasl -e ssdt*.aml -d dsdt.aml\n" @@ -1368,7 +1373,8 @@ AcpiDmUnresolvedWarning ( "ACPI tables may be required to properly disassemble the code. The\n" "resulting disassembler output file may not compile because the\n" "disassembler did not know how many arguments to assign to the\n" - "unresolved methods.\n" + "unresolved methods. Note: SSDTs can be dynamically loaded at\n" + "runtime and may or may not be available via the host OS.\n" "\n" "If necessary, the -fe option can be used to specify a file containing\n" "control method external declarations with the associated method\n" diff --git a/sys/contrib/dev/acpica/common/dmtable.c b/sys/contrib/dev/acpica/common/dmtable.c index b1875f830376..3820c94f922e 100644 --- a/sys/contrib/dev/acpica/common/dmtable.c +++ b/sys/contrib/dev/acpica/common/dmtable.c @@ -53,6 +53,11 @@ #define _COMPONENT ACPI_CA_DISASSEMBLER ACPI_MODULE_NAME ("dmtable") +const AH_TABLE * +AcpiAhGetTableInfo ( + char *Signature); + + /* Local Prototypes */ static void @@ -78,7 +83,7 @@ static const char *AcpiDmAsfSubnames[] = "ASF Remote Control", "ASF RMCP Boot Options", "ASF Address", - "Unknown SubTable Type" /* Reserved */ + "Unknown Subtable Type" /* Reserved */ }; static const char *AcpiDmDmarSubnames[] = @@ -88,7 +93,7 @@ static const char *AcpiDmDmarSubnames[] = "Root Port ATS Capability", "Remapping Hardware Static Affinity", "ACPI Namespace Device Declaration", - "Unknown SubTable Type" /* Reserved */ + "Unknown Subtable Type" /* Reserved */ }; static const char *AcpiDmDmarScope[] = @@ -176,7 +181,7 @@ static const char *AcpiDmGtdtSubnames[] = { "Generic Timer Block", "Generic Watchdog Timer", - "Unknown SubTable Type" /* Reserved */ + "Unknown Subtable Type" /* Reserved */ }; static const char *AcpiDmHestSubnames[] = @@ -191,7 +196,7 @@ static const char *AcpiDmHestSubnames[] = "PCI Express AER (AER Endpoint)", "PCI Express/PCI-X Bridge AER", "Generic Hardware Error Source", - "Unknown SubTable Type" /* Reserved */ + "Unknown Subtable Type" /* Reserved */ }; static const char *AcpiDmHestNotifySubnames[] = @@ -223,14 +228,27 @@ static const char *AcpiDmMadtSubnames[] = "Generic Interrupt Distributor", /* ACPI_MADT_GENERIC_DISTRIBUTOR */ "Generic MSI Frame", /* ACPI_MADT_GENERIC_MSI_FRAME */ "Generic Interrupt Redistributor", /* ACPI_MADT_GENERIC_REDISTRIBUTOR */ - "Unknown SubTable Type" /* Reserved */ + "Generic Interrupt Translator", /* ACPI_MADT_GENERIC_TRANSLATOR */ + "Unknown Subtable Type" /* Reserved */ +}; + +static const char *AcpiDmNfitSubnames[] = +{ + "System Physical Address Range", /* ACPI_NFIT_TYPE_SYSTEM_ADDRESS */ + "Memory Range Map", /* ACPI_NFIT_TYPE_MEMORY_MAP */ + "Interleave Info", /* ACPI_NFIT_TYPE_INTERLEAVE */ + "SMBIOS Information", /* ACPI_NFIT_TYPE_SMBIOS */ + "NVDIMM Control Region", /* ACPI_NFIT_TYPE_CONTROL_REGION */ + "NVDIMM Block Data Window Region", /* ACPI_NFIT_TYPE_DATA_REGION */ + "Flush Hint Address", /* ACPI_NFIT_TYPE_FLUSH_ADDRESS */ + "Unknown Subtable Type" /* Reserved */ }; static const char *AcpiDmPcctSubnames[] = { "Generic Communications Subspace", /* ACPI_PCCT_TYPE_GENERIC_SUBSPACE */ - "HW-Reduced Communications Subspace", - "Unknown SubTable Type" /* Reserved */ + "HW-Reduced Comm Subspace", /* ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE */ + "Unknown Subtable Type" /* Reserved */ }; static const char *AcpiDmPmttSubnames[] = @@ -238,7 +256,7 @@ static const char *AcpiDmPmttSubnames[] = "Socket", /* ACPI_PMTT_TYPE_SOCKET */ "Memory Controller", /* ACPI_PMTT_TYPE_CONTROLLER */ "Physical Component (DIMM)", /* ACPI_PMTT_TYPE_DIMM */ - "Unknown SubTable Type" /* Reserved */ + "Unknown Subtable Type" /* Reserved */ }; static const char *AcpiDmSratSubnames[] = @@ -247,21 +265,20 @@ static const char *AcpiDmSratSubnames[] = "Memory Affinity", "Processor Local x2APIC Affinity", "GICC Affinity", - "Unknown SubTable Type" /* Reserved */ + "Unknown Subtable Type" /* Reserved */ }; static const char *AcpiDmIvrsSubnames[] = { "Hardware Definition Block", "Memory Definition Block", - "Unknown SubTable Type" /* Reserved */ + "Unknown Subtable Type" /* Reserved */ }; static const char *AcpiDmLpitSubnames[] = { "Native C-state Idle Structure", - "Simple I/O Idle Structure", - "Unknown SubTable Type" /* Reserved */ + "Unknown Subtable Type" /* Reserved */ }; #define ACPI_FADT_PM_RESERVED 9 @@ -304,56 +321,65 @@ static const char *AcpiDmGasAccessWidth[] = * handler. This table must be NULL terminated. RSDP and FACS are * special-cased elsewhere. * + * Note: Any tables added here should be duplicated within AcpiSupportedTables + * in the file common/ahtable.c + * ******************************************************************************/ -ACPI_DMTABLE_DATA AcpiDmTableData[] = +const ACPI_DMTABLE_DATA AcpiDmTableData[] = { - {ACPI_SIG_ASF, NULL, AcpiDmDumpAsf, DtCompileAsf, TemplateAsf, "Alert Standard Format table"}, - {ACPI_SIG_BERT, AcpiDmTableInfoBert, NULL, NULL, TemplateBert, "Boot Error Record Table"}, - {ACPI_SIG_BGRT, AcpiDmTableInfoBgrt, NULL, NULL, TemplateBgrt, "Boot Graphics Resource Table"}, - {ACPI_SIG_BOOT, AcpiDmTableInfoBoot, NULL, NULL, TemplateBoot, "Simple Boot Flag Table"}, - {ACPI_SIG_CPEP, NULL, AcpiDmDumpCpep, DtCompileCpep, TemplateCpep, "Corrected Platform Error Polling table"}, - {ACPI_SIG_CSRT, NULL, AcpiDmDumpCsrt, DtCompileCsrt, TemplateCsrt, "Core System Resource Table"}, - {ACPI_SIG_DBG2, AcpiDmTableInfoDbg2, AcpiDmDumpDbg2, DtCompileDbg2, TemplateDbg2, "Debug Port table type 2"}, - {ACPI_SIG_DBGP, AcpiDmTableInfoDbgp, NULL, NULL, TemplateDbgp, "Debug Port table"}, - {ACPI_SIG_DMAR, NULL, AcpiDmDumpDmar, DtCompileDmar, TemplateDmar, "DMA Remapping table"}, - {ACPI_SIG_ECDT, AcpiDmTableInfoEcdt, NULL, NULL, TemplateEcdt, "Embedded Controller Boot Resources Table"}, - {ACPI_SIG_EINJ, NULL, AcpiDmDumpEinj, DtCompileEinj, TemplateEinj, "Error Injection table"}, - {ACPI_SIG_ERST, NULL, AcpiDmDumpErst, DtCompileErst, TemplateErst, "Error Record Serialization Table"}, - {ACPI_SIG_FADT, NULL, AcpiDmDumpFadt, DtCompileFadt, TemplateFadt, "Fixed ACPI Description Table (FADT)"}, - {ACPI_SIG_FPDT, NULL, AcpiDmDumpFpdt, DtCompileFpdt, TemplateFpdt, "Firmware Performance Data Table"}, - {ACPI_SIG_GTDT, NULL, AcpiDmDumpGtdt, DtCompileGtdt, TemplateGtdt, "Generic Timer Description Table"}, - {ACPI_SIG_HEST, NULL, AcpiDmDumpHest, DtCompileHest, TemplateHest, "Hardware Error Source Table"}, - {ACPI_SIG_HPET, AcpiDmTableInfoHpet, NULL, NULL, TemplateHpet, "High Precision Event Timer table"}, - {ACPI_SIG_IVRS, NULL, AcpiDmDumpIvrs, DtCompileIvrs, TemplateIvrs, "I/O Virtualization Reporting Structure"}, - {ACPI_SIG_LPIT, NULL, AcpiDmDumpLpit, DtCompileLpit, TemplateLpit, "Low Power Idle Table"}, - {ACPI_SIG_MADT, NULL, AcpiDmDumpMadt, DtCompileMadt, TemplateMadt, "Multiple APIC Description Table (MADT)"}, - {ACPI_SIG_MCFG, NULL, AcpiDmDumpMcfg, DtCompileMcfg, TemplateMcfg, "Memory Mapped Configuration table"}, - {ACPI_SIG_MCHI, AcpiDmTableInfoMchi, NULL, NULL, TemplateMchi, "Management Controller Host Interface table"}, - {ACPI_SIG_MPST, AcpiDmTableInfoMpst, AcpiDmDumpMpst, DtCompileMpst, TemplateMpst, "Memory Power State Table"}, - {ACPI_SIG_MSCT, NULL, AcpiDmDumpMsct, DtCompileMsct, TemplateMsct, "Maximum System Characteristics Table"}, - {ACPI_SIG_MSDM, NULL, AcpiDmDumpSlic, DtCompileSlic, TemplateMsdm, "Microsoft Data Management table"}, - {ACPI_SIG_MTMR, NULL, AcpiDmDumpMtmr, DtCompileMtmr, TemplateMtmr, "MID Timer Table"}, - {ACPI_SIG_PCCT, AcpiDmTableInfoPcct, AcpiDmDumpPcct, DtCompilePcct, TemplatePcct, "Platform Communications Channel Table"}, - {ACPI_SIG_PMTT, NULL, AcpiDmDumpPmtt, DtCompilePmtt, TemplatePmtt, "Platform Memory Topology Table"}, - {ACPI_SIG_RSDT, NULL, AcpiDmDumpRsdt, DtCompileRsdt, TemplateRsdt, "Root System Description Table"}, - {ACPI_SIG_S3PT, NULL, NULL, NULL, TemplateS3pt, "S3 Performance Table"}, - {ACPI_SIG_SBST, AcpiDmTableInfoSbst, NULL, NULL, TemplateSbst, "Smart Battery Specification Table"}, - {ACPI_SIG_SLIC, NULL, AcpiDmDumpSlic, DtCompileSlic, TemplateSlic, "Software Licensing Description Table"}, - {ACPI_SIG_SLIT, NULL, AcpiDmDumpSlit, DtCompileSlit, TemplateSlit, "System Locality Information Table"}, - {ACPI_SIG_SPCR, AcpiDmTableInfoSpcr, NULL, NULL, TemplateSpcr, "Serial Port Console Redirection table"}, - {ACPI_SIG_SPMI, AcpiDmTableInfoSpmi, NULL, NULL, TemplateSpmi, "Server Platform Management Interface table"}, - {ACPI_SIG_SRAT, NULL, AcpiDmDumpSrat, DtCompileSrat, TemplateSrat, "System Resource Affinity Table"}, - {ACPI_SIG_TCPA, AcpiDmTableInfoTcpa, NULL, NULL, TemplateTcpa, "Trusted Computing Platform Alliance table"}, - {ACPI_SIG_TPM2, AcpiDmTableInfoTpm2, NULL, NULL, TemplateTpm2, "Trusted Platform Module hardware interface table"}, - {ACPI_SIG_UEFI, AcpiDmTableInfoUefi, NULL, DtCompileUefi, TemplateUefi, "UEFI Boot Optimization Table"}, - {ACPI_SIG_VRTC, AcpiDmTableInfoVrtc, AcpiDmDumpVrtc, DtCompileVrtc, TemplateVrtc, "Virtual Real-Time Clock Table"}, - {ACPI_SIG_WAET, AcpiDmTableInfoWaet, NULL, NULL, TemplateWaet, "Windows ACPI Emulated Devices Table"}, - {ACPI_SIG_WDAT, NULL, AcpiDmDumpWdat, DtCompileWdat, TemplateWdat, "Watchdog Action Table"}, - {ACPI_SIG_WDDT, AcpiDmTableInfoWddt, NULL, NULL, TemplateWddt, "Watchdog Description Table"}, - {ACPI_SIG_WDRT, AcpiDmTableInfoWdrt, NULL, NULL, TemplateWdrt, "Watchdog Resource Table"}, - {ACPI_SIG_XSDT, NULL, AcpiDmDumpXsdt, DtCompileXsdt, TemplateXsdt, "Extended System Description Table"}, - {NULL, NULL, NULL, NULL, NULL, NULL} + {ACPI_SIG_ASF, NULL, AcpiDmDumpAsf, DtCompileAsf, TemplateAsf}, + {ACPI_SIG_BERT, AcpiDmTableInfoBert, NULL, NULL, TemplateBert}, + {ACPI_SIG_BGRT, AcpiDmTableInfoBgrt, NULL, NULL, TemplateBgrt}, + {ACPI_SIG_BOOT, AcpiDmTableInfoBoot, NULL, NULL, TemplateBoot}, + {ACPI_SIG_CPEP, NULL, AcpiDmDumpCpep, DtCompileCpep, TemplateCpep}, + {ACPI_SIG_CSRT, NULL, AcpiDmDumpCsrt, DtCompileCsrt, TemplateCsrt}, + {ACPI_SIG_DBG2, AcpiDmTableInfoDbg2, AcpiDmDumpDbg2, DtCompileDbg2, TemplateDbg2}, + {ACPI_SIG_DBGP, AcpiDmTableInfoDbgp, NULL, NULL, TemplateDbgp}, + {ACPI_SIG_DMAR, NULL, AcpiDmDumpDmar, DtCompileDmar, TemplateDmar}, + {ACPI_SIG_DRTM, NULL, AcpiDmDumpDrtm, DtCompileDrtm, TemplateDrtm}, + {ACPI_SIG_ECDT, AcpiDmTableInfoEcdt, NULL, NULL, TemplateEcdt}, + {ACPI_SIG_EINJ, NULL, AcpiDmDumpEinj, DtCompileEinj, TemplateEinj}, + {ACPI_SIG_ERST, NULL, AcpiDmDumpErst, DtCompileErst, TemplateErst}, + {ACPI_SIG_FADT, NULL, AcpiDmDumpFadt, DtCompileFadt, TemplateFadt}, + {ACPI_SIG_FPDT, NULL, AcpiDmDumpFpdt, DtCompileFpdt, TemplateFpdt}, + {ACPI_SIG_GTDT, NULL, AcpiDmDumpGtdt, DtCompileGtdt, TemplateGtdt}, + {ACPI_SIG_HEST, NULL, AcpiDmDumpHest, DtCompileHest, TemplateHest}, + {ACPI_SIG_HPET, AcpiDmTableInfoHpet, NULL, NULL, TemplateHpet}, + {ACPI_SIG_IORT, NULL, AcpiDmDumpIort, DtCompileIort, TemplateIort}, + {ACPI_SIG_IVRS, NULL, AcpiDmDumpIvrs, DtCompileIvrs, TemplateIvrs}, + {ACPI_SIG_LPIT, NULL, AcpiDmDumpLpit, DtCompileLpit, TemplateLpit}, + {ACPI_SIG_MADT, NULL, AcpiDmDumpMadt, DtCompileMadt, TemplateMadt}, + {ACPI_SIG_MCFG, NULL, AcpiDmDumpMcfg, DtCompileMcfg, TemplateMcfg}, + {ACPI_SIG_MCHI, AcpiDmTableInfoMchi, NULL, NULL, TemplateMchi}, + {ACPI_SIG_MPST, AcpiDmTableInfoMpst, AcpiDmDumpMpst, DtCompileMpst, TemplateMpst}, + {ACPI_SIG_MSCT, NULL, AcpiDmDumpMsct, DtCompileMsct, TemplateMsct}, + {ACPI_SIG_MSDM, NULL, AcpiDmDumpSlic, DtCompileSlic, TemplateMsdm}, + {ACPI_SIG_MTMR, NULL, AcpiDmDumpMtmr, DtCompileMtmr, TemplateMtmr}, + {ACPI_SIG_NFIT, AcpiDmTableInfoNfit, AcpiDmDumpNfit, DtCompileNfit, TemplateNfit}, + {ACPI_SIG_PCCT, AcpiDmTableInfoPcct, AcpiDmDumpPcct, DtCompilePcct, TemplatePcct}, + {ACPI_SIG_PMTT, NULL, AcpiDmDumpPmtt, DtCompilePmtt, TemplatePmtt}, + {ACPI_SIG_RSDT, NULL, AcpiDmDumpRsdt, DtCompileRsdt, TemplateRsdt}, + {ACPI_SIG_S3PT, NULL, NULL, NULL, TemplateS3pt}, + {ACPI_SIG_SBST, AcpiDmTableInfoSbst, NULL, NULL, TemplateSbst}, + {ACPI_SIG_SLIC, NULL, AcpiDmDumpSlic, DtCompileSlic, TemplateSlic}, + {ACPI_SIG_SLIT, NULL, AcpiDmDumpSlit, DtCompileSlit, TemplateSlit}, + {ACPI_SIG_SPCR, AcpiDmTableInfoSpcr, NULL, NULL, TemplateSpcr}, + {ACPI_SIG_SPMI, AcpiDmTableInfoSpmi, NULL, NULL, TemplateSpmi}, + {ACPI_SIG_SRAT, NULL, AcpiDmDumpSrat, DtCompileSrat, TemplateSrat}, + {ACPI_SIG_STAO, NULL, AcpiDmDumpStao, DtCompileStao, TemplateStao}, + {ACPI_SIG_TCPA, AcpiDmTableInfoTcpa, NULL, NULL, TemplateTcpa}, + {ACPI_SIG_TPM2, AcpiDmTableInfoTpm2, NULL, NULL, TemplateTpm2}, + {ACPI_SIG_UEFI, AcpiDmTableInfoUefi, NULL, DtCompileUefi, TemplateUefi}, + {ACPI_SIG_VRTC, AcpiDmTableInfoVrtc, AcpiDmDumpVrtc, DtCompileVrtc, TemplateVrtc}, + {ACPI_SIG_WAET, AcpiDmTableInfoWaet, NULL, NULL, TemplateWaet}, + {ACPI_SIG_WDAT, NULL, AcpiDmDumpWdat, DtCompileWdat, TemplateWdat}, + {ACPI_SIG_WDDT, AcpiDmTableInfoWddt, NULL, NULL, TemplateWddt}, + {ACPI_SIG_WDRT, AcpiDmTableInfoWdrt, NULL, NULL, TemplateWdrt}, + {ACPI_SIG_WPBT, NULL, AcpiDmDumpWpbt, DtCompileWpbt, TemplateWpbt}, + {ACPI_SIG_XENV, AcpiDmTableInfoXenv, NULL, NULL, TemplateXenv}, + {ACPI_SIG_XSDT, NULL, AcpiDmDumpXsdt, DtCompileXsdt, TemplateXsdt}, + {NULL, NULL, NULL, NULL, NULL} }; @@ -407,18 +433,18 @@ AcpiDmGenerateChecksum ( * ******************************************************************************/ -ACPI_DMTABLE_DATA * +const ACPI_DMTABLE_DATA * AcpiDmGetTableData ( char *Signature) { - ACPI_DMTABLE_DATA *TableData; + const ACPI_DMTABLE_DATA *Info; - for (TableData = AcpiDmTableData; TableData->Signature; TableData++) + for (Info = AcpiDmTableData; Info->Signature; Info++) { - if (ACPI_COMPARE_NAME (Signature, TableData->Signature)) + if (ACPI_COMPARE_NAME (Signature, Info->Signature)) { - return (TableData); + return (Info); } } @@ -444,7 +470,7 @@ AcpiDmDumpDataTable ( ACPI_TABLE_HEADER *Table) { ACPI_STATUS Status; - ACPI_DMTABLE_DATA *TableData; + const ACPI_DMTABLE_DATA *TableData; UINT32 Length; @@ -558,7 +584,6 @@ AcpiDmDumpDataTable ( * PARAMETERS: Offset - Current byte offset, from table start * ByteLength - Length of the field in bytes, 0 for flags * Name - Name of this field - * Value - Optional value, displayed on left of ':' * * RETURN: None * @@ -692,7 +717,7 @@ AcpiDmDumpTable ( UINT16 Temp16; UINT32 Temp32; UINT64 Value; - ACPI_DMTABLE_DATA *TableData; + const AH_TABLE *TableData; const char *Name; BOOLEAN LastOutputBlankLine = FALSE; char RepairedName[8]; @@ -715,13 +740,24 @@ AcpiDmDumpTable ( Target = ACPI_ADD_PTR (UINT8, Table, Info->Offset); CurrentOffset = TableOffset + Info->Offset; - /* Check for beyond EOT or beyond subtable end */ + /* Check for beyond subtable end or (worse) beyond EOT */ - if ((CurrentOffset >= TableLength) || - (SubtableLength && (Info->Offset >= SubtableLength))) + if (SubtableLength && (Info->Offset >= SubtableLength)) { AcpiOsPrintf ( - "**** ACPI table terminates in the middle of a data structure! (dump table)\n"); + "/**** ACPI subtable terminates early - " + "may be older version (dump table) */\n"); + + /* Move on to next subtable */ + + return (AE_OK); + } + + if (CurrentOffset >= TableLength) + { + AcpiOsPrintf ( + "/**** ACPI table terminates " + "in the middle of a data structure! (dump table) */\n"); return (AE_BAD_DATA); } @@ -754,6 +790,7 @@ AcpiDmDumpTable ( case ACPI_DMT_UINT16: case ACPI_DMT_DMAR: case ACPI_DMT_HEST: + case ACPI_DMT_NFIT: ByteLength = 2; break; @@ -810,6 +847,7 @@ AcpiDmDumpTable ( ByteLength = 128; break; + case ACPI_DMT_UNICODE: case ACPI_DMT_BUFFER: case ACPI_DMT_RAW_BUFFER: @@ -841,16 +879,39 @@ AcpiDmDumpTable ( ByteLength = sizeof (ACPI_HEST_NOTIFY); break; + case ACPI_DMT_IORTMEM: + + if (!LastOutputBlankLine) + { + LastOutputBlankLine = FALSE; + } + ByteLength = sizeof (ACPI_IORT_MEMORY_ACCESS); + break; + default: ByteLength = 0; break; } + /* Check if we are beyond a subtable, or (worse) beyond EOT */ + if (CurrentOffset + ByteLength > TableLength) { + if (SubtableLength) + { + AcpiOsPrintf ( + "/**** ACPI subtable terminates early - " + "may be older version (dump table) */\n"); + + /* Move on to next subtable */ + + return (AE_OK); + } + AcpiOsPrintf ( - "**** ACPI table terminates in the middle of a data structure!\n"); + "/**** ACPI table terminates " + "in the middle of a data structure! */\n"); return (AE_BAD_DATA); } @@ -980,10 +1041,10 @@ AcpiDmDumpTable ( AcpiDmCheckAscii (Target, RepairedName, 4); AcpiOsPrintf ("\"%.4s\" ", RepairedName); - TableData = AcpiDmGetTableData (ACPI_CAST_PTR (char, Target)); + TableData = AcpiAhGetTableInfo (ACPI_CAST_PTR (char, Target)); if (TableData) { - AcpiOsPrintf (STRING_FORMAT, TableData->Name); + AcpiOsPrintf (STRING_FORMAT, TableData->Description); } else { @@ -1209,6 +1270,16 @@ AcpiDmDumpTable ( AcpiDmHestNotifySubnames[Temp8]); break; + case ACPI_DMT_IORTMEM: + + AcpiOsPrintf (STRING_FORMAT, + "IORT Memory Access Properties"); + + AcpiDmDumpTable (TableLength, CurrentOffset, Target, + sizeof (ACPI_IORT_MEMORY_ACCESS), AcpiDmTableInfoIortAcc); + LastOutputBlankLine = TRUE; + break; + case ACPI_DMT_MADT: /* MADT subtable types */ @@ -1223,6 +1294,20 @@ AcpiDmDumpTable ( AcpiDmMadtSubnames[Temp8]); break; + case ACPI_DMT_NFIT: + + /* NFIT subtable types */ + + Temp16 = ACPI_GET16 (Target); + if (Temp16 > ACPI_NFIT_TYPE_RESERVED) + { + Temp16 = ACPI_NFIT_TYPE_RESERVED; + } + + AcpiOsPrintf (UINT16_FORMAT, ACPI_GET16 (Target), + AcpiDmNfitSubnames[Temp16]); + break; + case ACPI_DMT_PCCT: /* PCCT subtable types */ @@ -1251,16 +1336,27 @@ AcpiDmDumpTable ( AcpiDmPmttSubnames[Temp8]); break; - case ACPI_DMT_RAW_BUFFER: - /* - * Currently only used for SLIC table - */ - AcpiOsPrintf ("/* Proprietary data structure */ "); + case ACPI_DMT_UNICODE: - AcpiDmDumpBuffer (Table, sizeof (ACPI_TABLE_HEADER), - ByteLength, sizeof (ACPI_TABLE_HEADER), - "Licensing Data", TRUE); - AcpiOsPrintf ("\n"); + if (ByteLength == 0) + { + AcpiOsPrintf ("/* Zero-length Data */\n"); + break; + } + + AcpiDmDumpUnicode (Table, CurrentOffset, ByteLength); + break; + + case ACPI_DMT_RAW_BUFFER: + + if (ByteLength == 0) + { + AcpiOsPrintf ("/* Zero-length Data */\n"); + break; + } + + AcpiDmDumpBuffer (Table, CurrentOffset, ByteLength, + CurrentOffset, NULL); break; case ACPI_DMT_SRAT: diff --git a/sys/contrib/dev/acpica/common/dmtbdump.c b/sys/contrib/dev/acpica/common/dmtbdump.c index 8a44328d1360..94358e832a08 100644 --- a/sys/contrib/dev/acpica/common/dmtbdump.c +++ b/sys/contrib/dev/acpica/common/dmtbdump.c @@ -70,7 +70,6 @@ AcpiDmValidateFadtLength ( * AbsoluteOffset - Offset of buffer in the main ACPI table * Header - Name of the buffer field (printed on the * first line only.) - * MultiLine - TRUE if a large, multi-line buffer * * RETURN: None * @@ -85,8 +84,7 @@ AcpiDmDumpBuffer ( UINT32 BufferOffset, UINT32 Length, UINT32 AbsoluteOffset, - char *Header, - BOOLEAN MultiLine) + char *Header) { UINT8 *Buffer; UINT32 i; @@ -104,18 +102,11 @@ AcpiDmDumpBuffer ( { if (!(i % 16)) { - if (MultiLine) - { - /* Insert a backslash - line continuation character */ + /* Insert a backslash - line continuation character */ - AcpiOsPrintf ("\\\n "); - } - else + if (Length > 16) { - AcpiOsPrintf ("\n"); - AcpiDmLineHeader (AbsoluteOffset, - ((Length - i) > 16) ? 16 : (Length - i), Header); - Header = NULL; + AcpiOsPrintf ("\\\n "); } } @@ -129,6 +120,74 @@ AcpiDmDumpBuffer ( } +/******************************************************************************* + * + * FUNCTION: AcpiDmDumpUnicode + * + * PARAMETERS: Table - ACPI Table or subtable + * BufferOffset - Offset of buffer from Table above + * ByteLength - Length of the buffer + * + * RETURN: None + * + * DESCRIPTION: Validate and dump the contents of a buffer that contains + * unicode data. The output is a standard ASCII string. If it + * appears that the data is not unicode, the buffer is dumped + * as hex characters. + * + ******************************************************************************/ + +void +AcpiDmDumpUnicode ( + void *Table, + UINT32 BufferOffset, + UINT32 ByteLength) +{ + UINT8 *Buffer; + UINT32 Length; + UINT32 i; + + + Buffer = ((UINT8 *) Table) + BufferOffset; + Length = ByteLength - 2; /* Last two bytes are the null terminator */ + + /* Ensure all low bytes are entirely printable ASCII */ + + for (i = 0; i < Length; i += 2) + { + if (!ACPI_IS_PRINT (Buffer[i])) + { + goto DumpRawBuffer; + } + } + + /* Ensure all high bytes are zero */ + + for (i = 1; i < Length; i += 2) + { + if (Buffer[i]) + { + goto DumpRawBuffer; + } + } + + /* Dump the buffer as a normal string */ + + AcpiOsPrintf ("\""); + for (i = 0; i < Length; i += 2) + { + AcpiOsPrintf ("%c", Buffer[i]); + } + AcpiOsPrintf ("\"\n"); + return; + +DumpRawBuffer: + AcpiDmDumpBuffer (Table, BufferOffset, ByteLength, + BufferOffset, NULL); + AcpiOsPrintf ("\n"); +} + + /******************************************************************************* * * FUNCTION: AcpiDmDumpRsdp @@ -313,6 +372,13 @@ AcpiDmDumpFadt ( { AcpiDmDumpTable (Table->Length, 0, Table, 0, AcpiDmTableInfoFadt5); } + + /* Check for FADT revision 6 fields and up (ACPI 6.0+) */ + + if (Table->Length > ACPI_FADT_V3_SIZE) + { + AcpiDmDumpTable (Table->Length, 0, Table, 0, AcpiDmTableInfoFadt6); + } } /* Validate various fields in the FADT, including length */ @@ -693,10 +759,17 @@ AcpiDmDumpCsrt ( /* Resource-specific info buffer */ InfoLength = SubSubTable->Length - SubSubOffset; - - AcpiDmDumpBuffer (SubSubTable, SubSubOffset, InfoLength, - Offset + SubOffset + SubSubOffset, "ResourceInfo", FALSE); - SubSubOffset += InfoLength; + if (InfoLength) + { + Status = AcpiDmDumpTable (Length, + Offset + SubOffset + SubSubOffset, Table, + InfoLength, AcpiDmTableInfoCsrt2a); + if (ACPI_FAILURE (Status)) + { + return; + } + SubSubOffset += InfoLength; + } /* Point to next sub-subtable */ @@ -814,8 +887,13 @@ AcpiDmDumpDbg2 ( if (SubTable->OemDataOffset) { - AcpiDmDumpBuffer (SubTable, SubTable->OemDataOffset, SubTable->OemDataLength, - Offset + SubTable->OemDataOffset, "OEM Data", FALSE); + Status = AcpiDmDumpTable (Length, Offset + SubTable->OemDataOffset, + Table, SubTable->OemDataLength, + AcpiDmTableInfoDbg2OemData); + if (ACPI_FAILURE (Status)) + { + return; + } } /* Point to next subtable */ @@ -840,7 +918,6 @@ AcpiDmDumpDbg2 ( * ******************************************************************************/ - void AcpiDmDumpDmar ( ACPI_TABLE_HEADER *Table) @@ -983,6 +1060,120 @@ AcpiDmDumpDmar ( } +/******************************************************************************* + * + * FUNCTION: AcpiDmDumpDrtm + * + * PARAMETERS: Table - A DRTM table + * + * RETURN: None + * + * DESCRIPTION: Format the contents of a DRTM. + * + ******************************************************************************/ + +void +AcpiDmDumpDrtm ( + ACPI_TABLE_HEADER *Table) +{ + ACPI_STATUS Status; + UINT32 Offset; + ACPI_DRTM_VTABLE_LIST *DrtmVtl; + ACPI_DRTM_RESOURCE_LIST *DrtmRl; + ACPI_DRTM_DPS_ID *DrtmDps; + UINT32 Count; + + + /* Main table */ + + Status = AcpiDmDumpTable (Table->Length, 0, Table, 0, + AcpiDmTableInfoDrtm); + if (ACPI_FAILURE (Status)) + { + return; + } + + Offset = sizeof (ACPI_TABLE_DRTM); + + /* Sub-tables */ + + /* Dump ValidatedTable length */ + + DrtmVtl = ACPI_ADD_PTR (ACPI_DRTM_VTABLE_LIST, Table, Offset); + AcpiOsPrintf ("\n"); + Status = AcpiDmDumpTable (Table->Length, Offset, + DrtmVtl, ACPI_OFFSET (ACPI_DRTM_VTABLE_LIST, ValidatedTables), + AcpiDmTableInfoDrtm0); + if (ACPI_FAILURE (Status)) + { + return; + } + Offset += ACPI_OFFSET (ACPI_DRTM_VTABLE_LIST, ValidatedTables); + + /* Dump Validated table addresses */ + + Count = 0; + while ((Offset < Table->Length) && + (DrtmVtl->ValidatedTableCount > Count)) + { + Status = AcpiDmDumpTable (Table->Length, Offset, + ACPI_ADD_PTR (void, Table, Offset), sizeof (UINT64), + AcpiDmTableInfoDrtm0a); + if (ACPI_FAILURE (Status)) + { + return; + } + Offset += sizeof (UINT64); + Count++; + } + + /* Dump ResourceList length */ + + DrtmRl = ACPI_ADD_PTR (ACPI_DRTM_RESOURCE_LIST, Table, Offset); + AcpiOsPrintf ("\n"); + Status = AcpiDmDumpTable (Table->Length, Offset, + DrtmRl, ACPI_OFFSET (ACPI_DRTM_RESOURCE_LIST, Resources), + AcpiDmTableInfoDrtm1); + if (ACPI_FAILURE (Status)) + { + return; + } + + Offset += ACPI_OFFSET (ACPI_DRTM_RESOURCE_LIST, Resources); + + /* Dump the Resource List */ + + Count = 0; + while ((Offset < Table->Length) && + (DrtmRl->ResourceCount > Count)) + { + Status = AcpiDmDumpTable (Table->Length, Offset, + ACPI_ADD_PTR (void, Table, Offset), + sizeof (ACPI_DRTM_RESOURCE), + AcpiDmTableInfoDrtm1a); + if (ACPI_FAILURE (Status)) + { + return; + } + + Offset += sizeof (ACPI_DRTM_RESOURCE); + Count++; + } + + /* Dump DPS */ + + DrtmDps = ACPI_ADD_PTR (ACPI_DRTM_DPS_ID, Table, Offset); + AcpiOsPrintf ("\n"); + Status = AcpiDmDumpTable (Table->Length, Offset, + DrtmDps, sizeof (ACPI_DRTM_DPS_ID), + AcpiDmTableInfoDrtm2); + if (ACPI_FAILURE (Status)) + { + return; + } +} + + /******************************************************************************* * * FUNCTION: AcpiDmDumpEinj @@ -1427,6 +1618,230 @@ AcpiDmDumpHest ( } +/******************************************************************************* + * + * FUNCTION: AcpiDmDumpIort + * + * PARAMETERS: Table - A IORT table + * + * RETURN: None + * + * DESCRIPTION: Format the contents of a IORT + * + ******************************************************************************/ + +void +AcpiDmDumpIort ( + ACPI_TABLE_HEADER *Table) +{ + ACPI_STATUS Status; + ACPI_TABLE_IORT *Iort; + ACPI_IORT_NODE *IortNode; + ACPI_IORT_ITS_GROUP *IortItsGroup = NULL; + ACPI_IORT_SMMU *IortSmmu = NULL; + UINT32 Offset; + UINT32 NodeOffset; + UINT32 Length; + ACPI_DMTABLE_INFO *InfoTable; + char *String; + UINT32 i; + + + /* Main table */ + + Status = AcpiDmDumpTable (Table->Length, 0, Table, 0, AcpiDmTableInfoIort); + if (ACPI_FAILURE (Status)) + { + return; + } + + Iort = ACPI_CAST_PTR (ACPI_TABLE_IORT, Table); + Offset = sizeof (ACPI_TABLE_IORT); + + /* Dump the OptionalPadding (optional) */ + + if (Iort->NodeOffset > Offset) + { + Status = AcpiDmDumpTable (Table->Length, Offset, Table, + Iort->NodeOffset - Offset, AcpiDmTableInfoIortPad); + if (ACPI_FAILURE (Status)) + { + return; + } + } + + Offset = Iort->NodeOffset; + while (Offset < Table->Length) + { + /* Common subtable header */ + + IortNode = ACPI_ADD_PTR (ACPI_IORT_NODE, Table, Offset); + AcpiOsPrintf ("\n"); + Length = ACPI_OFFSET (ACPI_IORT_NODE, NodeData); + Status = AcpiDmDumpTable (Table->Length, Offset, + IortNode, Length, AcpiDmTableInfoIortHdr); + if (ACPI_FAILURE (Status)) + { + return; + } + + NodeOffset = Length; + + switch (IortNode->Type) + { + case ACPI_IORT_NODE_ITS_GROUP: + + InfoTable = AcpiDmTableInfoIort0; + Length = ACPI_OFFSET (ACPI_IORT_ITS_GROUP, Identifiers); + IortItsGroup = ACPI_ADD_PTR (ACPI_IORT_ITS_GROUP, IortNode, NodeOffset); + break; + + case ACPI_IORT_NODE_NAMED_COMPONENT: + + InfoTable = AcpiDmTableInfoIort1; + Length = ACPI_OFFSET (ACPI_IORT_NAMED_COMPONENT, DeviceName); + String = ACPI_ADD_PTR (char, IortNode, NodeOffset + Length); + Length += ACPI_STRLEN (String) + 1; + break; + + case ACPI_IORT_NODE_PCI_ROOT_COMPLEX: + + InfoTable = AcpiDmTableInfoIort2; + Length = IortNode->Length - NodeOffset; + break; + + case ACPI_IORT_NODE_SMMU: + + InfoTable = AcpiDmTableInfoIort3; + Length = ACPI_OFFSET (ACPI_IORT_SMMU, Interrupts); + IortSmmu = ACPI_ADD_PTR (ACPI_IORT_SMMU, IortNode, NodeOffset); + break; + + default: + + AcpiOsPrintf ("\n**** Unknown IORT node type 0x%X\n", + IortNode->Type); + + /* Attempt to continue */ + + if (!IortNode->Length) + { + AcpiOsPrintf ("Invalid zero length IORT node\n"); + return; + } + goto NextSubTable; + } + + /* Dump the node subtable header */ + + AcpiOsPrintf ("\n"); + Status = AcpiDmDumpTable (Table->Length, Offset + NodeOffset, + ACPI_ADD_PTR (ACPI_IORT_NODE, IortNode, NodeOffset), + Length, InfoTable); + if (ACPI_FAILURE (Status)) + { + return; + } + + NodeOffset += Length; + + /* Dump the node specific data */ + + switch (IortNode->Type) + { + case ACPI_IORT_NODE_ITS_GROUP: + + /* Validate IortItsGroup to avoid compiler warnings */ + + if (IortItsGroup) + { + for (i = 0; i < IortItsGroup->ItsCount; i++) + { + Status = AcpiDmDumpTable (Table->Length, Offset + NodeOffset, + ACPI_ADD_PTR (ACPI_IORT_NODE, IortNode, NodeOffset), + 4, AcpiDmTableInfoIort0a); + NodeOffset += 4; + } + } + break; + + case ACPI_IORT_NODE_NAMED_COMPONENT: + + /* Dump the Padding (optional) */ + + if (IortNode->Length > NodeOffset) + { + Status = AcpiDmDumpTable (Table->Length, Offset + NodeOffset, + Table, IortNode->Length - NodeOffset, + AcpiDmTableInfoIort1a); + if (ACPI_FAILURE (Status)) + { + return; + } + } + break; + + case ACPI_IORT_NODE_SMMU: + + AcpiOsPrintf ("\n"); + + /* Validate IortSmmu to avoid compiler warnings */ + + if (IortSmmu) + { + Length = 2 * sizeof (UINT64); + NodeOffset = IortSmmu->GlobalInterruptOffset; + Status = AcpiDmDumpTable (Table->Length, Offset + NodeOffset, + ACPI_ADD_PTR (ACPI_IORT_NODE, IortNode, NodeOffset), + Length, AcpiDmTableInfoIort3a); + + NodeOffset = IortSmmu->ContextInterruptOffset; + for (i = 0; i < IortSmmu->ContextInterruptCount; i++) + { + Status = AcpiDmDumpTable (Table->Length, Offset + NodeOffset, + ACPI_ADD_PTR (ACPI_IORT_NODE, IortNode, NodeOffset), + 8, AcpiDmTableInfoIort3b); + NodeOffset += 8; + } + + NodeOffset = IortSmmu->PmuInterruptOffset; + for (i = 0; i < IortSmmu->PmuInterruptCount; i++) + { + Status = AcpiDmDumpTable (Table->Length, Offset + NodeOffset, + ACPI_ADD_PTR (ACPI_IORT_NODE, IortNode, NodeOffset), + 8, AcpiDmTableInfoIort3c); + NodeOffset += 8; + } + } + break; + + default: + + break; + } + + /* Dump the ID mappings */ + + NodeOffset = IortNode->MappingOffset; + for (i = 0; i < IortNode->MappingCount; i++) + { + AcpiOsPrintf ("\n"); + Length = sizeof (ACPI_IORT_ID_MAPPING); + Status = AcpiDmDumpTable (Table->Length, Offset + NodeOffset, + ACPI_ADD_PTR (ACPI_IORT_NODE, IortNode, NodeOffset), + Length, AcpiDmTableInfoIortMap); + NodeOffset += Length; + } + +NextSubTable: + /* Point to next node subtable */ + + Offset += IortNode->Length; + IortNode = ACPI_ADD_PTR (ACPI_IORT_NODE, IortNode, IortNode->Length); + } +} + + /******************************************************************************* * * FUNCTION: AcpiDmDumpIvrs @@ -1654,12 +2069,6 @@ AcpiDmDumpLpit ( SubTableLength = sizeof (ACPI_LPIT_NATIVE); break; - case ACPI_LPIT_TYPE_SIMPLE_IO: - - InfoTable = AcpiDmTableInfoLpit1; - SubTableLength = sizeof (ACPI_LPIT_IO); - break; - default: /* Cannot continue on unknown type - no length */ @@ -1808,6 +2217,11 @@ AcpiDmDumpMadt ( InfoTable = AcpiDmTableInfoMadt14; break; + case ACPI_MADT_TYPE_GENERIC_TRANSLATOR: + + InfoTable = AcpiDmTableInfoMadt15; + break; + default: AcpiOsPrintf ("\n**** Unknown MADT subtable type 0x%X\n\n", SubTable->Type); @@ -2144,6 +2558,180 @@ AcpiDmDumpMtmr ( } +/******************************************************************************* + * + * FUNCTION: AcpiDmDumpNfit + * + * PARAMETERS: Table - A NFIT table + * + * RETURN: None + * + * DESCRIPTION: Format the contents of an NFIT. + * + ******************************************************************************/ + +void +AcpiDmDumpNfit ( + ACPI_TABLE_HEADER *Table) +{ + ACPI_STATUS Status; + UINT32 Offset = sizeof (ACPI_TABLE_NFIT); + UINT32 FieldOffset = 0; + UINT32 Length; + ACPI_NFIT_HEADER *SubTable; + ACPI_DMTABLE_INFO *InfoTable; + ACPI_NFIT_INTERLEAVE *Interleave = NULL; + ACPI_NFIT_SMBIOS *SmbiosInfo = NULL; + ACPI_NFIT_FLUSH_ADDRESS *Hint = NULL; + UINT32 i; + + + /* Main table */ + + Status = AcpiDmDumpTable (Table->Length, 0, Table, 0, AcpiDmTableInfoNfit); + if (ACPI_FAILURE (Status)) + { + return; + } + + /* Subtables */ + + SubTable = ACPI_ADD_PTR (ACPI_NFIT_HEADER, Table, Offset); + while (Offset < Table->Length) + { + /* NFIT subtable header */ + + AcpiOsPrintf ("\n"); + Status = AcpiDmDumpTable (Table->Length, Offset, SubTable, + SubTable->Length, AcpiDmTableInfoNfitHdr); + if (ACPI_FAILURE (Status)) + { + return; + } + + switch (SubTable->Type) + { + case ACPI_NFIT_TYPE_SYSTEM_ADDRESS: + + InfoTable = AcpiDmTableInfoNfit0; + break; + + case ACPI_NFIT_TYPE_MEMORY_MAP: + + InfoTable = AcpiDmTableInfoNfit1; + break; + + case ACPI_NFIT_TYPE_INTERLEAVE: + + /* Has a variable number of 32-bit values at the end */ + + InfoTable = AcpiDmTableInfoNfit2; + Interleave = ACPI_CAST_PTR (ACPI_NFIT_INTERLEAVE, SubTable); + FieldOffset = sizeof (ACPI_NFIT_INTERLEAVE); + break; + + case ACPI_NFIT_TYPE_SMBIOS: + + SmbiosInfo = ACPI_CAST_PTR (ACPI_NFIT_SMBIOS, SubTable); + InfoTable = AcpiDmTableInfoNfit3; + break; + + case ACPI_NFIT_TYPE_CONTROL_REGION: + + InfoTable = AcpiDmTableInfoNfit4; + break; + + case ACPI_NFIT_TYPE_DATA_REGION: + + InfoTable = AcpiDmTableInfoNfit5; + break; + + case ACPI_NFIT_TYPE_FLUSH_ADDRESS: + + /* Has a variable number of 64-bit addresses at the end */ + + InfoTable = AcpiDmTableInfoNfit6; + Hint = ACPI_CAST_PTR (ACPI_NFIT_FLUSH_ADDRESS, SubTable); + FieldOffset = sizeof (ACPI_NFIT_FLUSH_ADDRESS) - sizeof (UINT64); + break; + + default: + AcpiOsPrintf ("\n**** Unknown NFIT subtable type 0x%X\n", SubTable->Type); + + /* Attempt to continue */ + + if (!SubTable->Length) + { + AcpiOsPrintf ("Invalid zero length subtable\n"); + return; + } + goto NextSubTable; + } + + AcpiOsPrintf ("\n"); + Status = AcpiDmDumpTable (Table->Length, Offset, SubTable, + SubTable->Length, InfoTable); + if (ACPI_FAILURE (Status)) + { + return; + } + + /* Per-subtable variable-length fields */ + + switch (SubTable->Type) + { + case ACPI_NFIT_TYPE_INTERLEAVE: + + for (i = 0; i < Interleave->LineCount; i++) + { + Status = AcpiDmDumpTable (Table->Length, Offset + FieldOffset, + &Interleave->LineOffset[i], + sizeof (UINT32), AcpiDmTableInfoNfit2a); + FieldOffset += sizeof (UINT32); + } + break; + + case ACPI_NFIT_TYPE_SMBIOS: + + Length = SubTable->Length - sizeof (ACPI_NFIT_SMBIOS) + sizeof (UINT8); + if (Length) + { + Status = AcpiDmDumpTable (Table->Length, + sizeof (ACPI_NFIT_SMBIOS) - sizeof (UINT8), + SmbiosInfo, + Length, AcpiDmTableInfoNfit3a); + if (ACPI_FAILURE (Status)) + { + return; + } + } + + break; + + case ACPI_NFIT_TYPE_FLUSH_ADDRESS: + + for (i = 0; i < Hint->HintCount; i++) + { + Status = AcpiDmDumpTable (Table->Length, Offset + FieldOffset, + &Hint->HintAddress[i], + sizeof (UINT64), AcpiDmTableInfoNfit6a); + FieldOffset += sizeof (UINT64); + } + break; + + default: + break; + } + +NextSubTable: + /* Point to next subtable */ + + Offset += SubTable->Length; + SubTable = ACPI_ADD_PTR (ACPI_NFIT_HEADER, SubTable, SubTable->Length); + } +} + + /******************************************************************************* * * FUNCTION: AcpiDmDumpPcct @@ -2718,6 +3306,56 @@ AcpiDmDumpSrat ( } +/******************************************************************************* + * + * FUNCTION: AcpiDmDumpStao + * + * PARAMETERS: Table - A STAO table + * + * RETURN: None + * + * DESCRIPTION: Format the contents of a STAO. This is a variable-length + * table that contains an open-ended number of ASCII strings + * at the end of the table. + * + ******************************************************************************/ + +void +AcpiDmDumpStao ( + ACPI_TABLE_HEADER *Table) +{ + ACPI_STATUS Status; + char *Namepath; + UINT32 Length = Table->Length; + UINT32 StringLength; + UINT32 Offset = sizeof (ACPI_TABLE_STAO); + + + /* Main table */ + + Status = AcpiDmDumpTable (Length, 0, Table, 0, AcpiDmTableInfoStao); + if (ACPI_FAILURE (Status)) + { + return; + } + + /* The rest of the table consists of Namepath strings */ + + while (Offset < Table->Length) + { + Namepath = ACPI_ADD_PTR (char, Table, Offset); + StringLength = ACPI_STRLEN (Namepath) + 1; + + AcpiDmLineHeader (Offset, StringLength, "Namestring"); + AcpiOsPrintf ("\"%s\"\n", Namepath); + + /* Point to next namepath */ + + Offset += StringLength; + } +} + + /******************************************************************************* * * FUNCTION: AcpiDmDumpVrtc @@ -2820,3 +3458,49 @@ AcpiDmDumpWdat ( SubTable = ACPI_ADD_PTR (ACPI_WDAT_ENTRY, SubTable, sizeof (ACPI_WDAT_ENTRY)); } } + +/******************************************************************************* + * + * FUNCTION: AcpiDmDumpWpbt + * + * PARAMETERS: Table - A WPBT table + * + * RETURN: None + * + * DESCRIPTION: Format the contents of a WPBT. This table type consists + * of an open-ended arguments buffer at the end of the table. + * + ******************************************************************************/ + +void +AcpiDmDumpWpbt ( + ACPI_TABLE_HEADER *Table) +{ + ACPI_STATUS Status; + ACPI_TABLE_WPBT *SubTable; + UINT32 Length = Table->Length; + UINT16 ArgumentsLength; + + + /* Dump the main table */ + + Status = AcpiDmDumpTable (Length, 0, Table, 0, AcpiDmTableInfoWpbt); + if (ACPI_FAILURE (Status)) + { + return; + } + + /* Extract the arguments buffer length from the main table */ + + SubTable = ACPI_CAST_PTR (ACPI_TABLE_WPBT, Table); + ArgumentsLength = SubTable->ArgumentsLength; + + /* Dump the arguments buffer */ + + AcpiDmDumpTable (Table->Length, 0, Table, ArgumentsLength, + AcpiDmTableInfoWpbt0); + if (ACPI_FAILURE (Status)) + { + return; + } +} diff --git a/sys/contrib/dev/acpica/common/dmtbinfo.c b/sys/contrib/dev/acpica/common/dmtbinfo.c index 4ce802ba1eab..a803c701e397 100644 --- a/sys/contrib/dev/acpica/common/dmtbinfo.c +++ b/sys/contrib/dev/acpica/common/dmtbinfo.c @@ -96,12 +96,14 @@ #define ACPI_GTDT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_GTDT,f) #define ACPI_HEST_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_HEST,f) #define ACPI_HPET_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_HPET,f) +#define ACPI_IORT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_IORT,f) #define ACPI_IVRS_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_IVRS,f) #define ACPI_MADT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_MADT,f) #define ACPI_MCFG_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_MCFG,f) #define ACPI_MCHI_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_MCHI,f) #define ACPI_MPST_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_MPST,f) #define ACPI_MSCT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_MSCT,f) +#define ACPI_NFIT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_NFIT,f) #define ACPI_PCCT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_PCCT,f) #define ACPI_PMTT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_PMTT,f) #define ACPI_S3PT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_S3PT,f) @@ -110,6 +112,7 @@ #define ACPI_SPCR_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SPCR,f) #define ACPI_SPMI_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SPMI,f) #define ACPI_SRAT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_SRAT,f) +#define ACPI_STAO_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_STAO,f) #define ACPI_TCPA_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_TCPA,f) #define ACPI_TPM2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_TPM2,f) #define ACPI_UEFI_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_UEFI,f) @@ -117,6 +120,8 @@ #define ACPI_WDAT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_WDAT,f) #define ACPI_WDDT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_WDDT,f) #define ACPI_WDRT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_WDRT,f) +#define ACPI_WPBT_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_WPBT,f) +#define ACPI_XENV_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_TABLE_XENV,f) /* Subtables */ @@ -138,6 +143,10 @@ #define ACPI_DMAR2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_ATSR,f) #define ACPI_DMAR3_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_RHSA,f) #define ACPI_DMAR4_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DMAR_ANDD,f) +#define ACPI_DRTM0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DRTM_VTABLE_LIST,f) +#define ACPI_DRTM1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DRTM_RESOURCE_LIST,f) +#define ACPI_DRTM1a_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DRTM_RESOURCE,f) +#define ACPI_DRTM2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_DRTM_DPS_ID,f) #define ACPI_EINJ0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_WHEA_HEADER,f) #define ACPI_ERST0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_WHEA_HEADER,f) #define ACPI_FPDTH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_FPDT_HEADER,f) @@ -156,6 +165,13 @@ #define ACPI_HEST9_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_GENERIC,f) #define ACPI_HESTN_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_NOTIFY,f) #define ACPI_HESTB_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_HEST_IA_ERROR_BANK,f) +#define ACPI_IORT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IORT_ITS_GROUP,f) +#define ACPI_IORT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IORT_NAMED_COMPONENT,f) +#define ACPI_IORT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IORT_ROOT_COMPLEX,f) +#define ACPI_IORT3_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IORT_SMMU,f) +#define ACPI_IORTA_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IORT_MEMORY_ACCESS,f) +#define ACPI_IORTH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IORT_NODE,f) +#define ACPI_IORTM_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IORT_ID_MAPPING,f) #define ACPI_IVRSH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_HEADER,f) #define ACPI_IVRS0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_HARDWARE,f) #define ACPI_IVRS1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_MEMORY,f) @@ -165,7 +181,6 @@ #define ACPI_IVRS8C_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_IVRS_DEVICE8C,f) #define ACPI_LPITH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_LPIT_HEADER,f) #define ACPI_LPIT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_LPIT_NATIVE,f) -#define ACPI_LPIT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_LPIT_IO,f) #define ACPI_MADT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_LOCAL_APIC,f) #define ACPI_MADT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_IO_APIC,f) #define ACPI_MADT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_INTERRUPT_OVERRIDE,f) @@ -181,6 +196,7 @@ #define ACPI_MADT12_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_DISTRIBUTOR,f) #define ACPI_MADT13_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_MSI_FRAME,f) #define ACPI_MADT14_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_REDISTRIBUTOR,f) +#define ACPI_MADT15_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MADT_GENERIC_TRANSLATOR,f) #define ACPI_MADTH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_SUBTABLE_HEADER,f) #define ACPI_MCFG0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MCFG_ALLOCATION,f) #define ACPI_MPST0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MPST_POWER_NODE,f) @@ -190,6 +206,14 @@ #define ACPI_MPST2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MPST_POWER_DATA,f) #define ACPI_MSCT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MSCT_PROXIMITY,f) #define ACPI_MTMR0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_MTMR_ENTRY,f) +#define ACPI_NFITH_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_NFIT_HEADER,f) +#define ACPI_NFIT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_NFIT_SYSTEM_ADDRESS,f) +#define ACPI_NFIT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_NFIT_MEMORY_MAP,f) +#define ACPI_NFIT2_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_NFIT_INTERLEAVE,f) +#define ACPI_NFIT3_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_NFIT_SMBIOS,f) +#define ACPI_NFIT4_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_NFIT_CONTROL_REGION,f) +#define ACPI_NFIT5_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_NFIT_DATA_REGION,f) +#define ACPI_NFIT6_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_NFIT_FLUSH_ADDRESS,f) #define ACPI_PCCT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PCCT_SUBSPACE,f) #define ACPI_PCCT1_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PCCT_HW_REDUCED,f) #define ACPI_PMTT0_OFFSET(f) (UINT16) ACPI_OFFSET (ACPI_PMTT_SOCKET,f) @@ -216,6 +240,8 @@ /* Flags */ +#define ACPI_DRTM_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_DRTM,f,o) +#define ACPI_DRTM1a_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_DRTM_RESOURCE,f,o) #define ACPI_FADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FADT,f,o) #define ACPI_FACS_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_FACS,f,o) #define ACPI_HPET_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_HPET,f,o) @@ -226,6 +252,9 @@ #define ACPI_GTDT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_GTDT,f,o) #define ACPI_GTDT0a_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_GTDT_TIMER_ENTRY,f,o) #define ACPI_GTDT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_GTDT_WATCHDOG,f,o) +#define ACPI_IORT3_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_IORT_SMMU,f,o) +#define ACPI_IORTA_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_IORT_MEMORY_ACCESS,f,o) +#define ACPI_IORTM_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_IORT_ID_MAPPING,f,o) #define ACPI_LPITH_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_LPIT_HEADER,f,o) #define ACPI_MADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_MADT,f,o) #define ACPI_MADT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_LOCAL_APIC,f,o) @@ -240,6 +269,9 @@ #define ACPI_MADT13_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MADT_GENERIC_MSI_FRAME,f,o) #define ACPI_MPST0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MPST_POWER_NODE,f,o) #define ACPI_MPST2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_MPST_POWER_DATA,f,o) +#define ACPI_NFIT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_NFIT_SYSTEM_ADDRESS,f,o) +#define ACPI_NFIT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_NFIT_MEMORY_MAP,f,o) +#define ACPI_NFIT4_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_NFIT_CONTROL_REGION,f,o) #define ACPI_PCCT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_TABLE_PCCT,f,o) #define ACPI_PCCT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_PCCT_HW_REDUCED,f,o) #define ACPI_PMTTH_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (ACPI_PMTT_HEADER,f,o) @@ -490,6 +522,14 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoFadt5[] = ACPI_DMT_TERMINATOR }; +/* ACPI 6.0 Extensions (FADT version 6) */ + +ACPI_DMTABLE_INFO AcpiDmTableInfoFadt6[] = +{ + {ACPI_DMT_UINT64, ACPI_FADT_OFFSET (HypervisorId), "Hypervisor ID", 0}, + ACPI_DMT_TERMINATOR +}; + /* * Remaining tables are not consumed directly by the ACPICA subsystem @@ -680,7 +720,7 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoCpep0[] = ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt0[] = { - {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (Length), "Length", 0}, + {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (Length), "Length", DT_LENGTH}, {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (VendorId), "Vendor ID", 0}, {ACPI_DMT_UINT32, ACPI_CSRT0_OFFSET (SubvendorId), "Subvendor ID", 0}, {ACPI_DMT_UINT16, ACPI_CSRT0_OFFSET (DeviceId), "Device ID", 0}, @@ -715,13 +755,19 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt1[] = ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt2[] = { - {ACPI_DMT_UINT32, ACPI_CSRT2_OFFSET (Length), "Length", 0}, + {ACPI_DMT_UINT32, ACPI_CSRT2_OFFSET (Length), "Length", DT_LENGTH}, {ACPI_DMT_UINT16, ACPI_CSRT2_OFFSET (Type), "Type", 0}, {ACPI_DMT_UINT16, ACPI_CSRT2_OFFSET (Subtype), "Subtype", 0}, {ACPI_DMT_UINT32, ACPI_CSRT2_OFFSET (Uid), "UID", 0}, ACPI_DMT_TERMINATOR }; +ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt2a[] = +{ + {ACPI_DMT_RAW_BUFFER, 0, "ResourceInfo", DT_OPTIONAL}, + ACPI_DMT_TERMINATOR +}; + /******************************************************************************* * @@ -777,7 +823,7 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Name[] = ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2OemData[] = { - {ACPI_DMT_BUFFER, 0, "OEM Data", DT_OPTIONAL}, + {ACPI_DMT_RAW_BUFFER, 0, "OEM Data", DT_OPTIONAL}, ACPI_DMT_TERMINATOR }; @@ -895,7 +941,54 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoDmar4[] = ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm[] = { + {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (EntryBaseAddress), "Entry Base Address", 0}, + {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (EntryLength), "Entry Length", 0}, + {ACPI_DMT_UINT32, ACPI_DRTM_OFFSET (EntryAddress32), "Entry 32", 0}, + {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (EntryAddress64), "Entry 64", 0}, + {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (ExitAddress), "Exit Address", 0}, + {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (LogAreaAddress), "Log Area Start", 0}, + {ACPI_DMT_UINT32, ACPI_DRTM_OFFSET (LogAreaLength), "Log Area Length", 0}, + {ACPI_DMT_UINT64, ACPI_DRTM_OFFSET (ArchDependentAddress), "Arch Dependent Address", 0}, + {ACPI_DMT_UINT32, ACPI_DRTM_OFFSET (Flags), "Flags (decoded below)", 0}, + {ACPI_DMT_FLAG0, ACPI_DRTM_FLAG_OFFSET (Flags, 0), "Namespace in TCB", 0}, + {ACPI_DMT_FLAG1, ACPI_DRTM_FLAG_OFFSET (Flags, 0), "Gap Code on S3 Resume", 0}, + {ACPI_DMT_FLAG2, ACPI_DRTM_FLAG_OFFSET (Flags, 0), "Gap Code on DLME_Exit", 0}, + {ACPI_DMT_FLAG3, ACPI_DRTM_FLAG_OFFSET (Flags, 0), "PCR_Authorities Changed", 0}, + ACPI_DMT_TERMINATOR +}; +ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm0[] = +{ + {ACPI_DMT_UINT32, ACPI_DRTM0_OFFSET (ValidatedTableCount), "Validated Table Count", DT_COUNT}, + ACPI_DMT_TERMINATOR +}; + +ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm0a[] = +{ + {ACPI_DMT_UINT64, 0, "Table Address", DT_OPTIONAL}, + ACPI_DMT_TERMINATOR +}; + +ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm1[] = +{ + {ACPI_DMT_UINT32, ACPI_DRTM1_OFFSET (ResourceCount), "Resource Count", DT_COUNT}, + ACPI_DMT_TERMINATOR +}; + +ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm1a[] = +{ + {ACPI_DMT_UINT56, ACPI_DRTM1a_OFFSET (Size[0]), "Size", DT_OPTIONAL}, + {ACPI_DMT_UINT8, ACPI_DRTM1a_OFFSET (Type), "Type", 0}, + {ACPI_DMT_FLAG0, ACPI_DRTM1a_FLAG_OFFSET (Type, 0), "Resource Type", 0}, + {ACPI_DMT_FLAG7, ACPI_DRTM1a_FLAG_OFFSET (Type, 0), "Protections", 0}, + {ACPI_DMT_UINT64, ACPI_DRTM1a_OFFSET (Address), "Address", 0}, + ACPI_DMT_TERMINATOR +}; + +ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm2[] = +{ + {ACPI_DMT_UINT32, ACPI_DRTM2_OFFSET (DpsIdLength), "DLME Platform Id Length", DT_COUNT}, + {ACPI_DMT_BUF16, ACPI_DRTM2_OFFSET (DpsId), "DLME Platform Id", DT_COUNT}, ACPI_DMT_TERMINATOR }; @@ -1300,6 +1393,148 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoHpet[] = }; +/******************************************************************************* + * + * IORT - IO Remapping Table + * + ******************************************************************************/ + +ACPI_DMTABLE_INFO AcpiDmTableInfoIort[] = +{ + {ACPI_DMT_UINT32, ACPI_IORT_OFFSET (NodeCount), "Node Count", 0}, + {ACPI_DMT_UINT32, ACPI_IORT_OFFSET (NodeOffset), "Node Offset", 0}, + {ACPI_DMT_UINT32, ACPI_IORT_OFFSET (Reserved), "Reserved", 0}, + ACPI_DMT_TERMINATOR +}; + +/* Optional padding field */ + +ACPI_DMTABLE_INFO AcpiDmTableInfoIortPad[] = +{ + {ACPI_DMT_RAW_BUFFER, 0, "Optional Padding", DT_OPTIONAL}, + ACPI_DMT_TERMINATOR +}; + +/* Common Subtable header (one per Subtable) */ + +ACPI_DMTABLE_INFO AcpiDmTableInfoIortHdr[] = +{ + {ACPI_DMT_UINT8, ACPI_IORTH_OFFSET (Type), "Type", 0}, + {ACPI_DMT_UINT16, ACPI_IORTH_OFFSET (Length), "Length", DT_LENGTH}, + {ACPI_DMT_UINT8, ACPI_IORTH_OFFSET (Revision), "Revision", 0}, + {ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (Reserved), "Reserved", 0}, + {ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (MappingCount), "Mapping Count", 0}, + {ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (MappingOffset), "Mapping Offset", 0}, + ACPI_DMT_TERMINATOR +}; + +ACPI_DMTABLE_INFO AcpiDmTableInfoIortMap[] = +{ + {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (InputBase), "Input base", DT_OPTIONAL}, + {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (IdCount), "ID Count", 0}, + {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (OutputBase), "Output Base", 0}, + {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (OutputReference), "Output Reference", 0}, + {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (Flags), "Flags (decoded below)", 0}, + {ACPI_DMT_FLAG0, ACPI_IORTM_FLAG_OFFSET (Flags, 0), "Single Mapping", 0}, + ACPI_DMT_TERMINATOR +}; + +ACPI_DMTABLE_INFO AcpiDmTableInfoIortAcc[] = +{ + {ACPI_DMT_UINT32, ACPI_IORTA_OFFSET (CacheCoherency), "Cache Coherency", 0}, + {ACPI_DMT_UINT8, ACPI_IORTA_OFFSET (Hints), "Hints (decoded below)", 0}, + {ACPI_DMT_FLAG0, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Transient", 0}, + {ACPI_DMT_FLAG1, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Write Allocate", 0}, + {ACPI_DMT_FLAG2, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Read Allocate", 0}, + {ACPI_DMT_FLAG3, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Override", 0}, + {ACPI_DMT_UINT16, ACPI_IORTA_OFFSET (Reserved), "Reserved", 0}, + {ACPI_DMT_UINT8, ACPI_IORTA_OFFSET (MemoryFlags), "Memory Flags (decoded below)", 0}, + {ACPI_DMT_FLAG0, ACPI_IORTA_FLAG_OFFSET (MemoryFlags, 0), "Coherency", 0}, + {ACPI_DMT_FLAG1, ACPI_IORTA_FLAG_OFFSET (MemoryFlags, 0), "Device Attribute", 0}, + ACPI_DMT_TERMINATOR +}; + +/* IORT subtables */ + +/* 0x00: ITS Group */ + +ACPI_DMTABLE_INFO AcpiDmTableInfoIort0[] = +{ + {ACPI_DMT_UINT32, ACPI_IORT0_OFFSET (ItsCount), "ItsCount", 0}, + ACPI_DMT_TERMINATOR +}; + +ACPI_DMTABLE_INFO AcpiDmTableInfoIort0a[] = +{ + {ACPI_DMT_UINT32, 0, "Identifiers", DT_OPTIONAL}, + ACPI_DMT_TERMINATOR +}; + +/* 0x01: Named Component */ + +ACPI_DMTABLE_INFO AcpiDmTableInfoIort1[] = +{ + {ACPI_DMT_UINT32, ACPI_IORT1_OFFSET (NodeFlags), "Node Flags", 0}, + {ACPI_DMT_IORTMEM, ACPI_IORT1_OFFSET (MemoryProperties), "Memory Properties", 0}, + {ACPI_DMT_UINT8, ACPI_IORT1_OFFSET (MemoryAddressLimit), "Memory Size Limit", 0}, + {ACPI_DMT_STRING, ACPI_IORT1_OFFSET (DeviceName[0]), "Device Name", 0}, + ACPI_DMT_TERMINATOR +}; + +ACPI_DMTABLE_INFO AcpiDmTableInfoIort1a[] = +{ + {ACPI_DMT_RAW_BUFFER, 0, "Padding", DT_OPTIONAL}, + ACPI_DMT_TERMINATOR +}; + +/* 0x02: PCI Root Complex */ + +ACPI_DMTABLE_INFO AcpiDmTableInfoIort2[] = +{ + {ACPI_DMT_IORTMEM, ACPI_IORT2_OFFSET (MemoryProperties), "Memory Properties", 0}, + {ACPI_DMT_UINT32, ACPI_IORT2_OFFSET (AtsAttribute), "ATS Attribute", 0}, + {ACPI_DMT_UINT32, ACPI_IORT2_OFFSET (PciSegmentNumber), "PCI Segment Number", 0}, + ACPI_DMT_TERMINATOR +}; + +/* 0x03: SMMUv1/2 */ + +ACPI_DMTABLE_INFO AcpiDmTableInfoIort3[] = +{ + {ACPI_DMT_UINT64, ACPI_IORT3_OFFSET (BaseAddress), "Base Address", 0}, + {ACPI_DMT_UINT64, ACPI_IORT3_OFFSET (Span), "Span", 0}, + {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (Model), "Model", 0}, + {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (Flags), "Flags (decoded below)", 0}, + {ACPI_DMT_FLAG0, ACPI_IORT3_FLAG_OFFSET (Flags, 0), "DVM Supported", 0}, + {ACPI_DMT_FLAG1, ACPI_IORT3_FLAG_OFFSET (Flags, 0), "Coherent Walk", 0}, + {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (GlobalInterruptOffset), "Global Interrupt Offset", 0}, + {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (ContextInterruptCount), "Context Interrupt Count", 0}, + {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (ContextInterruptOffset), "Context Interrupt Offset", 0}, + {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (PmuInterruptCount), "PMU Interrupt Count", 0}, + {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (PmuInterruptOffset), "PMU Interrupt Offset", 0}, + ACPI_DMT_TERMINATOR +}; + +ACPI_DMTABLE_INFO AcpiDmTableInfoIort3a[] = +{ + {ACPI_DMT_UINT64, 0, "SMMU_NSgIrpt Interrupt", 0}, + {ACPI_DMT_UINT64, 0, "SMMU_NSgCfgIrpt Interrupt", 0}, + ACPI_DMT_TERMINATOR +}; + +ACPI_DMTABLE_INFO AcpiDmTableInfoIort3b[] = +{ + {ACPI_DMT_UINT64, 0, "Context Interrupt", DT_OPTIONAL}, + ACPI_DMT_TERMINATOR +}; + +ACPI_DMTABLE_INFO AcpiDmTableInfoIort3c[] = +{ + {ACPI_DMT_UINT64, 0, "PMU Interrupt", DT_OPTIONAL}, + ACPI_DMT_TERMINATOR +}; + + /******************************************************************************* * * IVRS - I/O Virtualization Reporting Structure @@ -1432,22 +1667,6 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoLpit0[] = ACPI_DMT_TERMINATOR }; -/* 1: Simple I/O */ - -ACPI_DMTABLE_INFO AcpiDmTableInfoLpit1[] = -{ - {ACPI_DMT_GAS, ACPI_LPIT1_OFFSET (EntryTrigger), "Entry Trigger", 0}, - {ACPI_DMT_UINT32, ACPI_LPIT1_OFFSET (TriggerAction), "Trigger Action", 0}, - {ACPI_DMT_UINT64, ACPI_LPIT1_OFFSET (TriggerValue), "Trigger Value", 0}, - {ACPI_DMT_UINT64, ACPI_LPIT1_OFFSET (TriggerMask), "Trigger Mask", 0}, - {ACPI_DMT_GAS, ACPI_LPIT1_OFFSET (MinimumIdleState), "Minimum Idle State", 0}, - {ACPI_DMT_UINT32, ACPI_LPIT1_OFFSET (Residency), "Residency", 0}, - {ACPI_DMT_UINT32, ACPI_LPIT1_OFFSET (Latency), "Latency", 0}, - {ACPI_DMT_GAS, ACPI_LPIT1_OFFSET (ResidencyCounter), "Residency Counter", 0}, - {ACPI_DMT_UINT64, ACPI_LPIT1_OFFSET (CounterFrequency), "Counter Frequency", 0}, - ACPI_DMT_TERMINATOR -}; - /******************************************************************************* * @@ -1629,6 +1848,8 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoMadt11[] = {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (VgicInterrupt), "Virtual GIC Interrupt", 0}, {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GicrBaseAddress), "Redistributor Base Address", 0}, {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (ArmMpidr), "ARM MPIDR", 0}, + {ACPI_DMT_UINT8, ACPI_MADT11_OFFSET (EfficiencyClass), "Efficiency Class", 0}, + {ACPI_DMT_UINT24, ACPI_MADT11_OFFSET (Reserved2[0]), "Reserved", 0}, ACPI_DMT_TERMINATOR }; @@ -1640,7 +1861,8 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoMadt12[] = {ACPI_DMT_UINT32, ACPI_MADT12_OFFSET (GicId), "Local GIC Hardware ID", 0}, {ACPI_DMT_UINT64, ACPI_MADT12_OFFSET (BaseAddress), "Base Address", 0}, {ACPI_DMT_UINT32, ACPI_MADT12_OFFSET (GlobalIrqBase), "Interrupt Base", 0}, - {ACPI_DMT_UINT32, ACPI_MADT12_OFFSET (Reserved2), "Reserved", 0}, + {ACPI_DMT_UINT8, ACPI_MADT12_OFFSET (Version), "Version", 0}, + {ACPI_DMT_UINT24, ACPI_MADT12_OFFSET (Reserved2[0]), "Reserved", 0}, ACPI_DMT_TERMINATOR }; @@ -1668,6 +1890,16 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoMadt14[] = ACPI_DMT_TERMINATOR }; +/* 15: Generic Translator (ACPI 6.0) */ + +ACPI_DMTABLE_INFO AcpiDmTableInfoMadt15[] = +{ + {ACPI_DMT_UINT16, ACPI_MADT15_OFFSET (Reserved), "Reserved", 0}, + {ACPI_DMT_UINT32, ACPI_MADT15_OFFSET (TranslationId), "Translation ID", 0}, + {ACPI_DMT_UINT64, ACPI_MADT15_OFFSET (BaseAddress), "Base Address", 0}, + {ACPI_DMT_UINT32, ACPI_MADT15_OFFSET (Reserved2), "Reserved", 0}, + ACPI_DMT_TERMINATOR +}; /******************************************************************************* * @@ -1848,6 +2080,156 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoMtmr0[] = }; +/******************************************************************************* + * + * NFIT - NVDIMM Firmware Interface Table and Subtables - (ACPI 6.0) + * + ******************************************************************************/ + +ACPI_DMTABLE_INFO AcpiDmTableInfoNfit[] = +{ + {ACPI_DMT_UINT32, ACPI_NFIT_OFFSET (Reserved), "Reserved", 0}, + ACPI_DMT_TERMINATOR +}; + +/* Common Subtable header */ + +ACPI_DMTABLE_INFO AcpiDmTableInfoNfitHdr[] = +{ + {ACPI_DMT_NFIT, ACPI_NFITH_OFFSET (Type), "Subtable Type", 0}, + {ACPI_DMT_UINT16, ACPI_NFITH_OFFSET (Length), "Length", DT_LENGTH}, + ACPI_DMT_TERMINATOR +}; + +/* 0: System Physical Address Range Structure */ + +ACPI_DMTABLE_INFO AcpiDmTableInfoNfit0[] = +{ + {ACPI_DMT_UINT16, ACPI_NFIT0_OFFSET (RangeIndex), "Range Index", 0}, + {ACPI_DMT_UINT16, ACPI_NFIT0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, + {ACPI_DMT_FLAG0, ACPI_NFIT0_FLAG_OFFSET (Flags,0), "Add/Online Operation Only", 0}, + {ACPI_DMT_FLAG1, ACPI_NFIT0_FLAG_OFFSET (Flags,0), "Proximity Domain Valid", 0}, + {ACPI_DMT_UINT32, ACPI_NFIT0_OFFSET (Reserved), "Reserved", 0}, + {ACPI_DMT_UINT32, ACPI_NFIT0_OFFSET (ProximityDomain), "Proximity Domain", 0}, + {ACPI_DMT_UUID, ACPI_NFIT0_OFFSET (RangeGuid[0]), "Address Range GUID", 0}, + {ACPI_DMT_UINT64, ACPI_NFIT0_OFFSET (Address), "Address Range Base", 0}, + {ACPI_DMT_UINT64, ACPI_NFIT0_OFFSET (Length), "Address Range Length", 0}, + {ACPI_DMT_UINT64, ACPI_NFIT0_OFFSET (MemoryMapping), "Memory Map Attribute", 0}, + ACPI_DMT_TERMINATOR +}; + +/* 1: Memory Device to System Address Range Map Structure */ + +ACPI_DMTABLE_INFO AcpiDmTableInfoNfit1[] = +{ + {ACPI_DMT_UINT32, ACPI_NFIT1_OFFSET (DeviceHandle), "Device Handle", 0}, + {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (PhysicalId), "Physical Id", 0}, + {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (RegionId), "Region Id", 0}, + {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (RangeIndex), "Range Index", 0}, + {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (RegionIndex), "Control Region Index", 0}, + {ACPI_DMT_UINT64, ACPI_NFIT1_OFFSET (RegionSize), "Region Size", 0}, + {ACPI_DMT_UINT64, ACPI_NFIT1_OFFSET (RegionOffset), "Region Offset", 0}, + {ACPI_DMT_UINT64, ACPI_NFIT1_OFFSET (Address), "Address Region Base", 0}, + {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (InterleaveIndex), "Interleave Index", 0}, + {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (InterleaveWays), "Interleave Ways", 0}, + {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (Flags), "Flags", DT_FLAG}, + {ACPI_DMT_FLAG0, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Save to device failed", 0}, + {ACPI_DMT_FLAG1, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Restore from device failed", 0}, + {ACPI_DMT_FLAG2, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Platform flush failed", 0}, + {ACPI_DMT_FLAG3, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Device not armed", 0}, + {ACPI_DMT_FLAG4, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Health events observed", 0}, + {ACPI_DMT_FLAG5, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Health events enabled", 0}, + {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (Reserved), "Reserved", 0}, + ACPI_DMT_TERMINATOR +}; + +/* 2: Interleave Structure */ + +ACPI_DMTABLE_INFO AcpiDmTableInfoNfit2[] = +{ + {ACPI_DMT_UINT16, ACPI_NFIT2_OFFSET (InterleaveIndex), "Interleave Index", 0}, + {ACPI_DMT_UINT16, ACPI_NFIT2_OFFSET (Reserved), "Reserved", 0}, + {ACPI_DMT_UINT32, ACPI_NFIT2_OFFSET (LineCount), "Line Count", 0}, + {ACPI_DMT_UINT32, ACPI_NFIT2_OFFSET (LineSize), "Line Size", 0}, + ACPI_DMT_TERMINATOR +}; + +ACPI_DMTABLE_INFO AcpiDmTableInfoNfit2a[] = +{ + {ACPI_DMT_UINT32, 0, "Line Offset", DT_OPTIONAL}, + ACPI_DMT_TERMINATOR +}; + +/* 3: SMBIOS Management Information Structure */ + +ACPI_DMTABLE_INFO AcpiDmTableInfoNfit3[] = +{ + {ACPI_DMT_UINT32, ACPI_NFIT3_OFFSET (Reserved), "Reserved", 0}, + ACPI_DMT_TERMINATOR +}; + +ACPI_DMTABLE_INFO AcpiDmTableInfoNfit3a[] = +{ + {ACPI_DMT_RAW_BUFFER, 0, "SMBIOS Table Entries", DT_OPTIONAL}, + ACPI_DMT_TERMINATOR +}; + +/* 4: NVDIMM Control Region Structure */ + +ACPI_DMTABLE_INFO AcpiDmTableInfoNfit4[] = +{ + {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (RegionIndex), "Region Index", 0}, + {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (VendorId), "Vendor Id", 0}, + {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (DeviceId), "Device Id", 0}, + {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (RevisionId), "Revision Id", 0}, + {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (SubsystemVendorId), "Subsystem Vendor Id", 0}, + {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (SubsystemDeviceId), "Subsystem Device Id", 0}, + {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (SubsystemRevisionId), "Subsystem Revision Id", 0}, + {ACPI_DMT_UINT48, ACPI_NFIT4_OFFSET (Reserved[0]), "Reserved", 0}, + {ACPI_DMT_UINT32, ACPI_NFIT4_OFFSET (SerialNumber), "Serial Number", 0}, + {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Code), "Code", 0}, + {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Windows), "Window Count", 0}, + {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (WindowSize), "Window Size", 0}, + {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (CommandOffset), "Command Offset", 0}, + {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (CommandSize), "Command Size", 0}, + {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (StatusOffset), "Status Offset", 0}, + {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (StatusSize), "Status Size", 0}, + {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Flags), "Flags", DT_FLAG}, + {ACPI_DMT_FLAG0, ACPI_NFIT4_FLAG_OFFSET (Flags,0), "Windows buffered", 0}, + {ACPI_DMT_UINT48, ACPI_NFIT4_OFFSET (Reserved1[0]), "Reserved1", 0}, + ACPI_DMT_TERMINATOR +}; + +/* 5: NVDIMM Block Data Window Region Structure */ + +ACPI_DMTABLE_INFO AcpiDmTableInfoNfit5[] = +{ + {ACPI_DMT_UINT16, ACPI_NFIT5_OFFSET (RegionIndex), "Region Index", 0}, + {ACPI_DMT_UINT16, ACPI_NFIT5_OFFSET (Windows), "Window Count", 0}, + {ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (Offset), "Offset", 0}, + {ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (Size), "Size", 0}, + {ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (Capacity), "Capacity", 0}, + {ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (StartAddress), "Start Address", 0}, + ACPI_DMT_TERMINATOR +}; + +/* 6: Flush Hint Address Structure */ + +ACPI_DMTABLE_INFO AcpiDmTableInfoNfit6[] = +{ + {ACPI_DMT_UINT32, ACPI_NFIT6_OFFSET (DeviceHandle), "Device Handle", 0}, + {ACPI_DMT_UINT16, ACPI_NFIT6_OFFSET (HintCount), "Hint Count", 0}, + {ACPI_DMT_UINT48, ACPI_NFIT6_OFFSET (Reserved[0]), "Reserved", 0}, + ACPI_DMT_TERMINATOR +}; + +ACPI_DMTABLE_INFO AcpiDmTableInfoNfit6a[] = +{ + {ACPI_DMT_UINT64, 0, "Hint Address", DT_OPTIONAL}, + ACPI_DMT_TERMINATOR +}; + + /******************************************************************************* * * PCCT - Platform Communications Channel Table (ACPI 5.0) @@ -2208,6 +2590,25 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoSrat3[] = }; +/******************************************************************************* + * + * STAO - Status Override Table (_STA override) - ACPI 6.0 + * + ******************************************************************************/ + +ACPI_DMTABLE_INFO AcpiDmTableInfoStao[] = +{ + {ACPI_DMT_UINT8, ACPI_STAO_OFFSET (IgnoreUart), "Ignore UART", 0}, + ACPI_DMT_TERMINATOR +}; + +ACPI_DMTABLE_INFO AcpiDmTableInfoStaoStr[] = +{ + {ACPI_DMT_STRING, 0, "Namepath", 0}, + ACPI_DMT_TERMINATOR +}; + + /******************************************************************************* * * TCPA - Trusted Computing Platform Alliance table @@ -2388,6 +2789,49 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoWdrt[] = ACPI_DMT_TERMINATOR }; + +/******************************************************************************* + * + * WPBT - Windows Platform Environment Table (ACPI 6.0) + * Version 1 + * + * Conforms to "Windows Platform Binary Table (WPBT)" 29 November 2011 + * + ******************************************************************************/ + +ACPI_DMTABLE_INFO AcpiDmTableInfoWpbt[] = +{ + {ACPI_DMT_UINT32, ACPI_WPBT_OFFSET (HandoffSize), "Handoff Size", 0}, + {ACPI_DMT_UINT64, ACPI_WPBT_OFFSET (HandoffAddress), "Handoff Address", 0}, + {ACPI_DMT_UINT8, ACPI_WPBT_OFFSET (Layout), "Layout", 0}, + {ACPI_DMT_UINT8, ACPI_WPBT_OFFSET (Type), "Type", 0}, + {ACPI_DMT_UINT16, ACPI_WPBT_OFFSET (ArgumentsLength), "Arguments Length", 0}, + ACPI_DMT_TERMINATOR +}; + +ACPI_DMTABLE_INFO AcpiDmTableInfoWpbt0[] = +{ + {ACPI_DMT_UNICODE, sizeof (ACPI_TABLE_WPBT), "Command-line Arguments", 0}, + ACPI_DMT_TERMINATOR +}; + + +/******************************************************************************* + * + * XENV - Xen Environment table (ACPI 6.0) + * + ******************************************************************************/ + +ACPI_DMTABLE_INFO AcpiDmTableInfoXenv[] = +{ + {ACPI_DMT_UINT64, ACPI_XENV_OFFSET (GrantTableAddress), "Grant Table Address", 0}, + {ACPI_DMT_UINT64, ACPI_XENV_OFFSET (GrantTableSize), "Grant Table Size", 0}, + {ACPI_DMT_UINT32, ACPI_XENV_OFFSET (EventInterrupt), "Event Interrupt", 0}, + {ACPI_DMT_UINT8, ACPI_XENV_OFFSET (EventFlags), "Event Flags", 0}, + ACPI_DMT_TERMINATOR +}; + + /*! [Begin] no source code translation */ /* diff --git a/sys/contrib/dev/acpica/compiler/aslascii.c b/sys/contrib/dev/acpica/compiler/aslascii.c index e6b3311a3e83..08e4630aabf1 100644 --- a/sys/contrib/dev/acpica/compiler/aslascii.c +++ b/sys/contrib/dev/acpica/compiler/aslascii.c @@ -148,8 +148,7 @@ FlCheckForAcpiTable ( * * FUNCTION: FlCheckForAscii * - * PARAMETERS: Handle - Open input file - * Filename - Input filename + * PARAMETERS: Filename - Full input filename * DisplayErrors - TRUE if error messages desired * * RETURN: Status @@ -165,7 +164,6 @@ FlCheckForAcpiTable ( ACPI_STATUS FlCheckForAscii ( - FILE *Handle, char *Filename, BOOLEAN DisplayErrors) { @@ -173,8 +171,13 @@ FlCheckForAscii ( ACPI_SIZE BadBytes = 0; BOOLEAN OpeningComment = FALSE; ASL_FILE_STATUS Status; + FILE *Handle; + /* Open file in text mode so file offset is always accurate */ + + Handle = fopen (Filename, "rb"); + Status.Line = 1; Status.Offset = 0; @@ -214,16 +217,30 @@ FlCheckForAscii ( if ((BadBytes < 10) && (DisplayErrors)) { AcpiOsPrintf ( - "Non-ASCII character [0x%2.2X] found in line %u, file offset 0x%.2X\n", + "Found non-ASCII character in source text: " + "0x%2.2X in line %u, file offset 0x%2.2X\n", Byte, Status.Line, Status.Offset); } - BadBytes++; } - /* Update line counter */ + /* Ensure character is either printable or a "space" char */ - else if (Byte == 0x0A) + else if (!ACPI_IS_PRINT (Byte) && !ACPI_IS_SPACE (Byte)) + { + if ((BadBytes < 10) && (DisplayErrors)) + { + AcpiOsPrintf ( + "Found invalid character in source text: " + "0x%2.2X in line %u, file offset 0x%2.2X\n", + Byte, Status.Line, Status.Offset); + } + BadBytes++; + } + + /* Update line counter as necessary */ + + if (Byte == 0x0A) { Status.Line++; } @@ -231,9 +248,7 @@ FlCheckForAscii ( Status.Offset++; } - /* Seek back to the beginning of the source file */ - - fseek (Handle, 0, SEEK_SET); + fclose (Handle); /* Were there any non-ASCII characters in the file? */ @@ -242,8 +257,8 @@ FlCheckForAscii ( if (DisplayErrors) { AcpiOsPrintf ( - "%u non-ASCII characters found in input source text, could be a binary file\n", - BadBytes); + "Total %u invalid characters found in input source text, " + "could be a binary file\n", BadBytes); AslError (ASL_ERROR, ASL_MSG_NON_ASCII, NULL, Filename); } @@ -286,6 +301,7 @@ FlConsumeAnsiComment ( { if (Byte == '/') { + Status->Offset++; return; } diff --git a/sys/contrib/dev/acpica/compiler/aslcompiler.h b/sys/contrib/dev/acpica/compiler/aslcompiler.h index 7b0729510384..181b36c31079 100644 --- a/sys/contrib/dev/acpica/compiler/aslcompiler.h +++ b/sys/contrib/dev/acpica/compiler/aslcompiler.h @@ -172,7 +172,6 @@ FlCheckForAcpiTable ( ACPI_STATUS FlCheckForAscii ( - FILE *Handle, char *Filename, BOOLEAN DisplayErrors); diff --git a/sys/contrib/dev/acpica/compiler/aslcompiler.l b/sys/contrib/dev/acpica/compiler/aslcompiler.l index f831233234fc..621f5aee2706 100644 --- a/sys/contrib/dev/acpica/compiler/aslcompiler.l +++ b/sys/contrib/dev/acpica/compiler/aslcompiler.l @@ -709,9 +709,18 @@ NamePathTail [.]{NameSeg} return (PARSEOP_NAMESTRING); } . { count (1); - sprintf (MsgBuffer, - "Invalid character (0x%2.2X), expecting ASL keyword or name", - *AslCompilertext); + if (ACPI_IS_PRINT (*AslCompilertext)) + { + sprintf (MsgBuffer, + "Invalid character (%c), expecting ASL keyword or name", + *AslCompilertext); + } + else + { + sprintf (MsgBuffer, + "Invalid character (0x%2.2X), expecting ASL keyword or name", + *AslCompilertext); + } AslCompilererror (MsgBuffer);} <> { if (AslPopInputFileStack ()) diff --git a/sys/contrib/dev/acpica/compiler/asldefine.h b/sys/contrib/dev/acpica/compiler/asldefine.h index 14307c1bfb23..0697276d28a2 100644 --- a/sys/contrib/dev/acpica/compiler/asldefine.h +++ b/sys/contrib/dev/acpica/compiler/asldefine.h @@ -53,7 +53,7 @@ #define ASL_INVOCATION_NAME "iasl" #define ASL_CREATOR_ID "INTL" -#define ASL_COMPLIANCE "Supports ACPI Specification Revision 5.1" +#define ASL_COMPLIANCE "Supports ACPI Specification Revision 6.0" /* Configuration constants */ diff --git a/sys/contrib/dev/acpica/compiler/aslfiles.c b/sys/contrib/dev/acpica/compiler/aslfiles.c index 63a8dbb50fbb..d8c9ed5968de 100644 --- a/sys/contrib/dev/acpica/compiler/aslfiles.c +++ b/sys/contrib/dev/acpica/compiler/aslfiles.c @@ -49,9 +49,10 @@ /* Local prototypes */ -FILE * +static FILE * FlOpenIncludeWithPrefix ( char *PrefixDir, + ACPI_PARSE_OBJECT *Op, char *Filename); @@ -294,9 +295,10 @@ FlMergePathnames ( * ******************************************************************************/ -FILE * +static FILE * FlOpenIncludeWithPrefix ( char *PrefixDir, + ACPI_PARSE_OBJECT *Op, char *Filename) { FILE *IncludeFile; @@ -320,6 +322,26 @@ FlOpenIncludeWithPrefix ( return (NULL); } +#ifdef _MUST_HANDLE_COMMENTS + /* + * Check entire include file for any # preprocessor directives. + * This is because there may be some confusion between the #include + * preprocessor directive and the ASL Include statement. + */ + while (fgets (Gbl_CurrentLineBuffer, Gbl_LineBufferSize, IncludeFile)) + { + if (Gbl_CurrentLineBuffer[0] == '#') + { + AslError (ASL_ERROR, ASL_MSG_INCLUDE_FILE, + Op, "use #include instead"); + } + } +#endif + + /* Must seek back to the start of the file */ + + fseek (IncludeFile, 0, SEEK_SET); + /* Push the include file on the open input file stack */ AslPushInputFileStack (IncludeFile, Pathname); @@ -376,7 +398,7 @@ FlOpenIncludeFile ( (Op->Asl.Value.String[0] == '\\') || (Op->Asl.Value.String[1] == ':')) { - IncludeFile = FlOpenIncludeWithPrefix ("", Op->Asl.Value.String); + IncludeFile = FlOpenIncludeWithPrefix ("", Op, Op->Asl.Value.String); if (!IncludeFile) { goto ErrorExit; @@ -392,7 +414,7 @@ FlOpenIncludeFile ( * * Construct the file pathname from the global directory name. */ - IncludeFile = FlOpenIncludeWithPrefix (Gbl_DirectoryPath, Op->Asl.Value.String); + IncludeFile = FlOpenIncludeWithPrefix (Gbl_DirectoryPath, Op, Op->Asl.Value.String); if (IncludeFile) { return; @@ -405,7 +427,7 @@ FlOpenIncludeFile ( NextDir = Gbl_IncludeDirList; while (NextDir) { - IncludeFile = FlOpenIncludeWithPrefix (NextDir->Dir, Op->Asl.Value.String); + IncludeFile = FlOpenIncludeWithPrefix (NextDir->Dir, Op, Op->Asl.Value.String); if (IncludeFile) { return; diff --git a/sys/contrib/dev/acpica/compiler/aslmessages.c b/sys/contrib/dev/acpica/compiler/aslmessages.c index 12a4208eb75c..c57fd2d3f0a2 100644 --- a/sys/contrib/dev/acpica/compiler/aslmessages.c +++ b/sys/contrib/dev/acpica/compiler/aslmessages.c @@ -270,7 +270,8 @@ const char *AslPreprocessorMsgs [] = /* ASL_MSG_TOO_MANY_ARGUMENTS */ "Too many macro arguments", /* ASL_MSG_UNKNOWN_DIRECTIVE */ "Unknown directive", /* ASL_MSG_UNKNOWN_PRAGMA */ "Unknown pragma", -/* ASL_MSG_WARNING_DIRECTIVE */ "#warning" +/* ASL_MSG_WARNING_DIRECTIVE */ "#warning", +/* ASL_MSG_INCLUDE_FILE */ "Found a # preprocessor directive in ASL Include() file" }; @@ -331,7 +332,7 @@ AeDecodeMessageId ( if (Index >= ACPI_ARRAY_LENGTH (AslPreprocessorMsgs)) { - return ("[Unknown Preprocesor exception ID]"); + return ("[Unknown Preprocessor exception ID]"); } } diff --git a/sys/contrib/dev/acpica/compiler/aslmessages.h b/sys/contrib/dev/acpica/compiler/aslmessages.h index 7a04a635245c..9837d540698f 100644 --- a/sys/contrib/dev/acpica/compiler/aslmessages.h +++ b/sys/contrib/dev/acpica/compiler/aslmessages.h @@ -267,6 +267,7 @@ typedef enum ASL_MSG_UNKNOWN_DIRECTIVE, ASL_MSG_UNKNOWN_PRAGMA, ASL_MSG_WARNING_DIRECTIVE, + ASL_MSG_INCLUDE_FILE } ASL_MESSAGE_IDS; diff --git a/sys/contrib/dev/acpica/compiler/aslprepkg.c b/sys/contrib/dev/acpica/compiler/aslprepkg.c index 37a58df3ecfc..be0a4c4728a6 100644 --- a/sys/contrib/dev/acpica/compiler/aslprepkg.c +++ b/sys/contrib/dev/acpica/compiler/aslprepkg.c @@ -151,6 +151,7 @@ ApCheckPackage ( case ACPI_PTYPE2_FIXED: case ACPI_PTYPE2_MIN: case ACPI_PTYPE2_FIX_VAR: + case ACPI_PTYPE2_VAR_VAR: default: break; @@ -324,6 +325,32 @@ ApCheckPackage ( break; + case ACPI_PTYPE2_VAR_VAR: + + /* Check for minimum size (ints at beginning + 1 subpackage) */ + + ExpectedCount = Package->RetInfo4.Count1 + 1; + if (Count < ExpectedCount) + { + goto PackageTooSmall; + } + + /* Check the non-package elements at beginning of main package */ + + for (i = 0; i < Package->RetInfo4.Count1; ++i) + { + Status = ApCheckObjectType (Predefined->Info.Name, Op, + Package->RetInfo4.ObjectType1, i); + Op = Op->Asl.Next; + } + + /* Examine the variable-length list of subpackages */ + + ApCheckPackageList (Predefined->Info.Name, Op, + Package, Package->RetInfo4.Count1, Count); + + break; + case ACPI_PTYPE2: case ACPI_PTYPE2_FIXED: case ACPI_PTYPE2_MIN: @@ -427,6 +454,7 @@ ApCheckPackageElements ( * ACPI_PTYPE2_MIN * ACPI_PTYPE2_COUNT * ACPI_PTYPE2_FIX_VAR + * ACPI_PTYPE2_VAR_VAR * ******************************************************************************/ @@ -473,9 +501,12 @@ ApCheckPackageList ( Count = (UINT32) Op->Asl.Value.Integer; Op = Op->Asl.Next; - /* The subpackage must have at least one element */ - - if (!Count) + /* + * Most subpackage must have at least one element, with + * only rare exceptions. (_RDI) + */ + if (!Count && + (Package->RetInfo.Type != ACPI_PTYPE2_VAR_VAR)) { ApZeroLengthPackage (PredefinedName, SubPackageOp); goto NextSubpackage; @@ -533,6 +564,25 @@ ApCheckPackageList ( Count - Package->RetInfo.Count1); break; + case ACPI_PTYPE2_VAR_VAR: + /* + * Must have at least the minimum number elements. + * A zero PkgCount means the number of elements is variable. + */ + ExpectedCount = Package->RetInfo4.PkgCount; + if (ExpectedCount && (Count < ExpectedCount)) + { + ApPackageTooSmall (PredefinedName, SubPackageOp, + Count, 1); + break; + } + + ApCheckPackageElements (PredefinedName, Op, + Package->RetInfo4.SubObjectTypes, + Package->RetInfo4.PkgCount, + 0, 0); + break; + case ACPI_PTYPE2_FIXED: /* Each subpackage has a fixed length */ diff --git a/sys/contrib/dev/acpica/compiler/aslstartup.c b/sys/contrib/dev/acpica/compiler/aslstartup.c index cbebd0d2e508..85e2f883fcc4 100644 --- a/sys/contrib/dev/acpica/compiler/aslstartup.c +++ b/sys/contrib/dev/acpica/compiler/aslstartup.c @@ -159,10 +159,10 @@ AslDetectSourceFileType ( /* Check for 100% ASCII source file (comments are ignored) */ - Status = FlCheckForAscii (Info->Handle, Info->Filename, TRUE); + Status = FlCheckForAscii (Info->Filename, TRUE); if (ACPI_FAILURE (Status)) { - printf ("Non-ascii input file - %s\n", Info->Filename); + printf ("Invalid characters in input file - %s\n", Info->Filename); if (!Gbl_IgnoreErrors) { diff --git a/sys/contrib/dev/acpica/compiler/aslutils.c b/sys/contrib/dev/acpica/compiler/aslutils.c index 37d394b43dd3..dadd6b157090 100644 --- a/sys/contrib/dev/acpica/compiler/aslutils.c +++ b/sys/contrib/dev/acpica/compiler/aslutils.c @@ -77,13 +77,11 @@ UtAttachNameseg ( * ******************************************************************************/ -#define ACPI_TABLE_HELP_FORMAT "%8u) %s %s\n" - void UtDisplaySupportedTables ( void) { - ACPI_DMTABLE_DATA *TableData; + const AH_TABLE *TableData; UINT32 i; @@ -91,20 +89,14 @@ UtDisplaySupportedTables ( " (Compiler, Disassembler, Template Generator)\n\n", ACPI_CA_VERSION); - /* Special tables */ + /* All ACPI tables with the common table header */ - printf (" Special tables and AML tables:\n"); - printf (ACPI_TABLE_HELP_FORMAT, 1, ACPI_RSDP_NAME, "Root System Description Pointer"); - printf (ACPI_TABLE_HELP_FORMAT, 2, ACPI_SIG_FACS, "Firmware ACPI Control Structure"); - printf (ACPI_TABLE_HELP_FORMAT, 3, ACPI_SIG_DSDT, "Differentiated System Description Table"); - printf (ACPI_TABLE_HELP_FORMAT, 4, ACPI_SIG_SSDT, "Secondary System Description Table"); - - /* All data tables with common table header */ - - printf ("\n Standard ACPI data tables:\n"); - for (TableData = AcpiDmTableData, i = 5; TableData->Signature; TableData++, i++) + printf ("\n Supported ACPI tables:\n"); + for (TableData = AcpiSupportedTables, i = 1; + TableData->Signature; TableData++, i++) { - printf (ACPI_TABLE_HELP_FORMAT, i, TableData->Signature, TableData->Name); + printf ("%8u) %s %s\n", i, + TableData->Signature, TableData->Description); } } diff --git a/sys/contrib/dev/acpica/compiler/dtcompile.c b/sys/contrib/dev/acpica/compiler/dtcompile.c index 74bfc3334ded..20da14341d08 100644 --- a/sys/contrib/dev/acpica/compiler/dtcompile.c +++ b/sys/contrib/dev/acpica/compiler/dtcompile.c @@ -283,7 +283,7 @@ static ACPI_STATUS DtCompileDataTable ( DT_FIELD **FieldList) { - ACPI_DMTABLE_DATA *TableData; + const ACPI_DMTABLE_DATA *TableData; DT_SUBTABLE *Subtable; char *Signature; ACPI_TABLE_HEADER *AcpiTableHeader; @@ -358,7 +358,7 @@ DtCompileDataTable ( TableData = AcpiDmGetTableData (Signature); if (!TableData || Gbl_CompileGeneric) { - DtCompileGeneric ((void **) FieldList); + DtCompileGeneric ((void **) FieldList, NULL, NULL); goto FinishHeader; } @@ -436,14 +436,14 @@ DtCompileTable ( DT_FIELD *LocalField; UINT32 Length; DT_SUBTABLE *Subtable; - DT_SUBTABLE *InlineSubtable; + DT_SUBTABLE *InlineSubtable = NULL; UINT32 FieldLength = 0; UINT8 FieldType; UINT8 *Buffer; UINT8 *FlagBuffer = NULL; char *String; UINT32 CurrentFlagByteOffset = 0; - ACPI_STATUS Status; + ACPI_STATUS Status = AE_OK; if (!Field || !*Field) @@ -479,6 +479,7 @@ DtCompileTable ( Buffer = Subtable->Buffer; LocalField = *Field; + Subtable->Name = LocalField->Name; /* * Main loop walks the info table for this ACPI table or subtable @@ -555,15 +556,32 @@ DtCompileTable ( */ *Field = LocalField; - if (Info->Opcode == ACPI_DMT_GAS) + switch (Info->Opcode) { + case ACPI_DMT_GAS: + Status = DtCompileTable (Field, AcpiDmTableInfoGas, &InlineSubtable, TRUE); - } - else - { + break; + + case ACPI_DMT_HESTNTFY: + Status = DtCompileTable (Field, AcpiDmTableInfoHestNotify, &InlineSubtable, TRUE); + break; + + case ACPI_DMT_IORTMEM: + + Status = DtCompileTable (Field, AcpiDmTableInfoIortAcc, + &InlineSubtable, TRUE); + break; + + default: + sprintf (MsgBuffer, "Invalid DMT opcode: 0x%.2X", + Info->Opcode); + DtFatal (ASL_MSG_COMPILER_INTERNAL, NULL, MsgBuffer); + Status = AE_BAD_DATA; + break; } if (ACPI_FAILURE (Status)) @@ -600,7 +618,6 @@ DtCompileTable ( Subtable->LengthField = Buffer; Subtable->SizeOfLengthField = FieldLength; } - break; } @@ -616,3 +633,43 @@ DtCompileTable ( ACPI_FREE (Subtable); return (Status); } + + +/****************************************************************************** + * + * FUNCTION: DtCompilePadding + * + * PARAMETERS: Length - Padding field size + * RetSubtable - Compile result of table + * + * RETURN: Status + * + * DESCRIPTION: Compile a subtable for padding purpose + * + *****************************************************************************/ + +ACPI_STATUS +DtCompilePadding ( + UINT32 Length, + DT_SUBTABLE **RetSubtable) +{ + DT_SUBTABLE *Subtable; + /* UINT8 *Buffer; */ + char *String; + + + Subtable = UtSubtableCacheCalloc (); + + if (Length > 0) + { + String = UtStringCacheCalloc (Length); + Subtable->Buffer = ACPI_CAST_PTR (UINT8, String); + } + + Subtable->Length = Length; + Subtable->TotalLength = Length; + /* Buffer = Subtable->Buffer; */ + + *RetSubtable = Subtable; + return (AE_OK); +} diff --git a/sys/contrib/dev/acpica/compiler/dtcompiler.h b/sys/contrib/dev/acpica/compiler/dtcompiler.h index 3a0b76379724..201b2dbfa2d6 100644 --- a/sys/contrib/dev/acpica/compiler/dtcompiler.h +++ b/sys/contrib/dev/acpica/compiler/dtcompiler.h @@ -115,6 +115,7 @@ typedef struct dt_subtable struct dt_subtable *StackTop; UINT8 *Buffer; UINT8 *LengthField; + char *Name; UINT32 Length; UINT32 TotalLength; UINT32 SizeOfLengthField; @@ -170,6 +171,11 @@ DtCompileTable ( DT_SUBTABLE **RetSubtable, BOOLEAN Required); +ACPI_STATUS +DtCompilePadding ( + UINT32 Length, + DT_SUBTABLE **RetSubtable); + /* dtio - binary and text input/output */ @@ -428,6 +434,10 @@ ACPI_STATUS DtCompileDmar ( void **PFieldList); +ACPI_STATUS +DtCompileDrtm ( + void **PFieldList); + ACPI_STATUS DtCompileEinj ( void **PFieldList); @@ -452,6 +462,10 @@ ACPI_STATUS DtCompileHest ( void **PFieldList); +ACPI_STATUS +DtCompileIort ( + void **PFieldList); + ACPI_STATUS DtCompileIvrs ( void **PFieldList); @@ -480,6 +494,10 @@ ACPI_STATUS DtCompileMtmr ( void **PFieldList); +ACPI_STATUS +DtCompileNfit ( + void **PFieldList); + ACPI_STATUS DtCompilePmtt ( void **PFieldList); @@ -508,6 +526,10 @@ ACPI_STATUS DtCompileSrat ( void **PFieldList); +ACPI_STATUS +DtCompileStao ( + void **PFieldList); + ACPI_STATUS DtCompileUefi ( void **PFieldList); @@ -520,13 +542,19 @@ ACPI_STATUS DtCompileWdat ( void **PFieldList); +ACPI_STATUS +DtCompileWpbt ( + void **PFieldList); + ACPI_STATUS DtCompileXsdt ( void **PFieldList); ACPI_STATUS DtCompileGeneric ( - void **PFieldList); + void **PFieldList, + char *TermFieldName, + UINT32 *PFieldLength); ACPI_DMTABLE_INFO * DtGetGenericTableInfo ( @@ -543,6 +571,7 @@ extern const unsigned char TemplateCsrt[]; extern const unsigned char TemplateDbg2[]; extern const unsigned char TemplateDbgp[]; extern const unsigned char TemplateDmar[]; +extern const unsigned char TemplateDrtm[]; extern const unsigned char TemplateEcdt[]; extern const unsigned char TemplateEinj[]; extern const unsigned char TemplateErst[]; @@ -551,6 +580,7 @@ extern const unsigned char TemplateFpdt[]; extern const unsigned char TemplateGtdt[]; extern const unsigned char TemplateHest[]; extern const unsigned char TemplateHpet[]; +extern const unsigned char TemplateIort[]; extern const unsigned char TemplateIvrs[]; extern const unsigned char TemplateLpit[]; extern const unsigned char TemplateMadt[]; @@ -560,6 +590,7 @@ extern const unsigned char TemplateMpst[]; extern const unsigned char TemplateMsct[]; extern const unsigned char TemplateMsdm[]; extern const unsigned char TemplateMtmr[]; +extern const unsigned char TemplateNfit[]; extern const unsigned char TemplatePcct[]; extern const unsigned char TemplatePmtt[]; extern const unsigned char TemplateRsdt[]; @@ -570,6 +601,7 @@ extern const unsigned char TemplateSlit[]; extern const unsigned char TemplateSpcr[]; extern const unsigned char TemplateSpmi[]; extern const unsigned char TemplateSrat[]; +extern const unsigned char TemplateStao[]; extern const unsigned char TemplateTcpa[]; extern const unsigned char TemplateTpm2[]; extern const unsigned char TemplateUefi[]; @@ -578,6 +610,8 @@ extern const unsigned char TemplateWaet[]; extern const unsigned char TemplateWdat[]; extern const unsigned char TemplateWddt[]; extern const unsigned char TemplateWdrt[]; +extern const unsigned char TemplateWpbt[]; +extern const unsigned char TemplateXenv[]; extern const unsigned char TemplateXsdt[]; #endif diff --git a/sys/contrib/dev/acpica/compiler/dtio.c b/sys/contrib/dev/acpica/compiler/dtio.c index bebd9279bd55..4b05bd0fe571 100644 --- a/sys/contrib/dev/acpica/compiler/dtio.c +++ b/sys/contrib/dev/acpica/compiler/dtio.c @@ -978,8 +978,8 @@ DtDumpSubtableInfo ( { DbgPrint (ASL_DEBUG_OUTPUT, - "[%.04X] %.08X %.08X %.08X %.08X %.08X %p %p %p\n", - Subtable->Depth, Subtable->Length, Subtable->TotalLength, + "[%.04X] %24s %.08X %.08X %.08X %.08X %.08X %p %p %p\n", + Subtable->Depth, Subtable->Name, Subtable->Length, Subtable->TotalLength, Subtable->SizeOfLengthField, Subtable->Flags, Subtable, Subtable->Parent, Subtable->Child, Subtable->Peer); } @@ -992,8 +992,8 @@ DtDumpSubtableTree ( { DbgPrint (ASL_DEBUG_OUTPUT, - "[%.04X] %*s%08X (%.02X) - (%.02X)\n", - Subtable->Depth, (4 * Subtable->Depth), " ", + "[%.04X] %24s %*s%08X (%.02X) - (%.02X)\n", + Subtable->Depth, Subtable->Name, (4 * Subtable->Depth), " ", Subtable, Subtable->Length, Subtable->TotalLength); } @@ -1024,12 +1024,12 @@ DtDumpSubtableList ( DbgPrint (ASL_DEBUG_OUTPUT, "Subtable Info:\n" - "Depth Length TotalLen LenSize Flags " + "Depth Name Length TotalLen LenSize Flags " "This Parent Child Peer\n\n"); DtWalkTableTree (Gbl_RootTable, DtDumpSubtableInfo, NULL, NULL); DbgPrint (ASL_DEBUG_OUTPUT, - "\nSubtable Tree: (Depth, Subtable, Length, TotalLength)\n\n"); + "\nSubtable Tree: (Depth, Name, Subtable, Length, TotalLength)\n\n"); DtWalkTableTree (Gbl_RootTable, DtDumpSubtableTree, NULL, NULL); DbgPrint (ASL_DEBUG_OUTPUT, "\n"); diff --git a/sys/contrib/dev/acpica/compiler/dtsubtable.c b/sys/contrib/dev/acpica/compiler/dtsubtable.c index 1e6a76a08c92..115265693245 100644 --- a/sys/contrib/dev/acpica/compiler/dtsubtable.c +++ b/sys/contrib/dev/acpica/compiler/dtsubtable.c @@ -321,6 +321,11 @@ DtGetSubtableLength ( Step = 9; break; + case ACPI_DMT_IORTMEM: + + Step = 10; + break; + default: Step = 1; diff --git a/sys/contrib/dev/acpica/compiler/dttable.c b/sys/contrib/dev/acpica/compiler/dttable.c index 3fe02e8f0b14..bae80ade2bdb 100644 --- a/sys/contrib/dev/acpica/compiler/dttable.c +++ b/sys/contrib/dev/acpica/compiler/dttable.c @@ -65,12 +65,6 @@ static ACPI_DMTABLE_INFO TableInfoDmarPciPath[] = }; -/* TBD: move to acmacros.h */ - -#define ACPI_SUB_PTR(t, a, b) \ - ACPI_CAST_PTR (t, (ACPI_CAST_PTR (UINT8, (a)) - (ACPI_SIZE)(b))) - - /* Local prototypes */ static ACPI_STATUS @@ -454,6 +448,7 @@ DtCompileCsrt ( /* Subtables (Resource Groups) */ + ParentTable = DtPeekSubtable (); while (*PFieldList) { /* Resource group subtable */ @@ -477,9 +472,9 @@ DtCompileCsrt ( DescriptorCount = (GroupLength / sizeof (ACPI_CSRT_DESCRIPTOR)); - ParentTable = DtPeekSubtable (); DtInsertSubtable (ParentTable, Subtable); DtPushSubtable (Subtable); + ParentTable = DtPeekSubtable (); /* Shared info subtable (One per resource group) */ @@ -490,26 +485,44 @@ DtCompileCsrt ( return (Status); } - ParentTable = DtPeekSubtable (); DtInsertSubtable (ParentTable, Subtable); /* Sub-Subtables (Resource Descriptors) */ while (*PFieldList && DescriptorCount) { + Status = DtCompileTable (PFieldList, AcpiDmTableInfoCsrt2, &Subtable, TRUE); if (ACPI_FAILURE (Status)) { return (Status); } - - ParentTable = DtPeekSubtable (); DtInsertSubtable (ParentTable, Subtable); + + DtPushSubtable (Subtable); + ParentTable = DtPeekSubtable (); + if (*PFieldList) + { + Status = DtCompileTable (PFieldList, AcpiDmTableInfoCsrt2a, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + if (Subtable) + { + DtInsertSubtable (ParentTable, Subtable); + } + } + DtPopSubtable (); + ParentTable = DtPeekSubtable (); + DescriptorCount--; } DtPopSubtable (); + ParentTable = DtPeekSubtable (); } return (Status); @@ -826,6 +839,135 @@ DtCompileDmar ( } +/****************************************************************************** + * + * FUNCTION: DtCompileDrtm + * + * PARAMETERS: List - Current field list pointer + * + * RETURN: Status + * + * DESCRIPTION: Compile DRTM. + * + *****************************************************************************/ + +ACPI_STATUS +DtCompileDrtm ( + void **List) +{ + ACPI_STATUS Status; + DT_SUBTABLE *Subtable; + DT_SUBTABLE *ParentTable; + DT_FIELD **PFieldList = (DT_FIELD **) List; + UINT32 Count; + /* ACPI_TABLE_DRTM *Drtm; */ + ACPI_DRTM_VTABLE_LIST *DrtmVtl; + ACPI_DRTM_RESOURCE_LIST *DrtmRl; + /* ACPI_DRTM_DPS_ID *DrtmDps; */ + + + ParentTable = DtPeekSubtable (); + + /* Compile DRTM header */ + + Status = DtCompileTable (PFieldList, AcpiDmTableInfoDrtm, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + DtInsertSubtable (ParentTable, Subtable); + + /* + * Using ACPI_SUB_PTR, We needn't define a seperate structure. Care + * should be taken to avoid accessing ACPI_TABLE_HADER fields. + */ +#if 0 + Drtm = ACPI_SUB_PTR (ACPI_TABLE_DRTM, + Subtable->Buffer, sizeof (ACPI_TABLE_HEADER)); +#endif + /* Compile VTL */ + + Status = DtCompileTable (PFieldList, AcpiDmTableInfoDrtm0, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + DtInsertSubtable (ParentTable, Subtable); + DrtmVtl = ACPI_CAST_PTR (ACPI_DRTM_VTABLE_LIST, Subtable->Buffer); + + DtPushSubtable (Subtable); + ParentTable = DtPeekSubtable (); + Count = 0; + while (*PFieldList) + { + Status = DtCompileTable (PFieldList, AcpiDmTableInfoDrtm0a, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + if (!Subtable) + { + break; + } + DtInsertSubtable (ParentTable, Subtable); + Count++; + } + DrtmVtl->ValidatedTableCount = Count; + DtPopSubtable (); + ParentTable = DtPeekSubtable (); + + /* Compile RL */ + + Status = DtCompileTable (PFieldList, AcpiDmTableInfoDrtm1, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + DtInsertSubtable (ParentTable, Subtable); + DrtmRl = ACPI_CAST_PTR (ACPI_DRTM_RESOURCE_LIST, Subtable->Buffer); + + DtPushSubtable (Subtable); + ParentTable = DtPeekSubtable (); + Count = 0; + while (*PFieldList) + { + Status = DtCompileTable (PFieldList, AcpiDmTableInfoDrtm1a, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + if (!Subtable) + { + break; + } + DtInsertSubtable (ParentTable, Subtable); + Count++; + } + DrtmRl->ResourceCount = Count; + DtPopSubtable (); + ParentTable = DtPeekSubtable (); + + /* Compile DPS */ + + Status = DtCompileTable (PFieldList, AcpiDmTableInfoDrtm2, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + DtInsertSubtable (ParentTable, Subtable); + /* DrtmDps = ACPI_CAST_PTR (ACPI_DRTM_DPS_ID, Subtable->Buffer);*/ + + + return (AE_OK); +} + + /****************************************************************************** * * FUNCTION: DtCompileEinj @@ -946,6 +1088,18 @@ DtCompileFadt ( DtInsertSubtable (ParentTable, Subtable); } + + if (Revision >= 6) + { + Status = DtCompileTable (PFieldList, AcpiDmTableInfoFadt6, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + + DtInsertSubtable (ParentTable, Subtable); + } } return (AE_OK); @@ -1283,6 +1437,309 @@ DtCompileHest ( } +/****************************************************************************** + * + * FUNCTION: DtCompileIort + * + * PARAMETERS: List - Current field list pointer + * + * RETURN: Status + * + * DESCRIPTION: Compile IORT. + * + *****************************************************************************/ + +ACPI_STATUS +DtCompileIort ( + void **List) +{ + ACPI_STATUS Status; + DT_SUBTABLE *Subtable; + DT_SUBTABLE *ParentTable; + DT_FIELD **PFieldList = (DT_FIELD **) List; + DT_FIELD *SubtableStart; + ACPI_TABLE_IORT *Iort; + ACPI_IORT_NODE *IortNode; + ACPI_IORT_ITS_GROUP *IortItsGroup; + ACPI_IORT_SMMU *IortSmmu; + UINT32 NodeNumber; + UINT32 NodeLength; + UINT32 IdMappingNumber; + UINT32 ItsNumber; + UINT32 ContextIrptNumber; + UINT32 PmuIrptNumber; + UINT32 PaddingLength; + + + ParentTable = DtPeekSubtable (); + + Status = DtCompileTable (PFieldList, AcpiDmTableInfoIort, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + DtInsertSubtable (ParentTable, Subtable); + + /* + * Using ACPI_SUB_PTR, We needn't define a seperate structure. Care + * should be taken to avoid accessing ACPI_TABLE_HADER fields. + */ + Iort = ACPI_SUB_PTR (ACPI_TABLE_IORT, + Subtable->Buffer, sizeof (ACPI_TABLE_HEADER)); + + /* + * OptionalPadding - Variable-length data + * (Optional, size = OffsetToNodes - sizeof (ACPI_TABLE_IORT)) + * Optionally allows the generic data types to be used for filling + * this field. + */ + Iort->NodeOffset = sizeof (ACPI_TABLE_IORT); + Status = DtCompileTable (PFieldList, AcpiDmTableInfoIortPad, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + if (Subtable) + { + DtInsertSubtable (ParentTable, Subtable); + Iort->NodeOffset += Subtable->Length; + } + else + { + Status = DtCompileGeneric (ACPI_CAST_PTR (void *, PFieldList), + AcpiDmTableInfoIortHdr[0].Name, &PaddingLength); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + Iort->NodeOffset += PaddingLength; + } + + NodeNumber = 0; + while (*PFieldList) + { + SubtableStart = *PFieldList; + Status = DtCompileTable (PFieldList, AcpiDmTableInfoIortHdr, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + DtInsertSubtable (ParentTable, Subtable); + IortNode = ACPI_CAST_PTR (ACPI_IORT_NODE, Subtable->Buffer); + NodeLength = ACPI_OFFSET (ACPI_IORT_NODE, NodeData); + + DtPushSubtable (Subtable); + ParentTable = DtPeekSubtable (); + + switch (IortNode->Type) + { + case ACPI_IORT_NODE_ITS_GROUP: + + Status = DtCompileTable (PFieldList, AcpiDmTableInfoIort0, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + DtInsertSubtable (ParentTable, Subtable); + IortItsGroup = ACPI_CAST_PTR (ACPI_IORT_ITS_GROUP, Subtable->Buffer); + NodeLength += Subtable->Length; + + ItsNumber = 0; + while (*PFieldList) + { + Status = DtCompileTable (PFieldList, AcpiDmTableInfoIort0a, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + if (!Subtable) + { + break; + } + DtInsertSubtable (ParentTable, Subtable); + NodeLength += Subtable->Length; + ItsNumber++; + } + + IortItsGroup->ItsCount = ItsNumber; + break; + + case ACPI_IORT_NODE_NAMED_COMPONENT: + + Status = DtCompileTable (PFieldList, AcpiDmTableInfoIort1, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + DtInsertSubtable (ParentTable, Subtable); + NodeLength += Subtable->Length; + + /* + * Padding - Variable-length data + * Optionally allows the offset of the ID mappings to be used + * for filling this field. + */ + Status = DtCompileTable (PFieldList, AcpiDmTableInfoIort1a, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + if (Subtable) + { + DtInsertSubtable (ParentTable, Subtable); + NodeLength += Subtable->Length; + } + else + { + if (NodeLength > IortNode->MappingOffset) + { + return (AE_BAD_DATA); + } + if (NodeLength < IortNode->MappingOffset) + { + Status = DtCompilePadding ( + IortNode->MappingOffset - NodeLength, + &Subtable); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + DtInsertSubtable (ParentTable, Subtable); + NodeLength = IortNode->MappingOffset; + } + } + break; + + case ACPI_IORT_NODE_PCI_ROOT_COMPLEX: + + Status = DtCompileTable (PFieldList, AcpiDmTableInfoIort2, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + DtInsertSubtable (ParentTable, Subtable); + NodeLength += Subtable->Length; + break; + + case ACPI_IORT_NODE_SMMU: + + Status = DtCompileTable (PFieldList, AcpiDmTableInfoIort3, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + DtInsertSubtable (ParentTable, Subtable); + IortSmmu = ACPI_CAST_PTR (ACPI_IORT_SMMU, Subtable->Buffer); + NodeLength += Subtable->Length; + + /* Compile global interrupt array */ + + IortSmmu->GlobalInterruptOffset = NodeLength; + Status = DtCompileTable (PFieldList, AcpiDmTableInfoIort3a, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + DtInsertSubtable (ParentTable, Subtable); + NodeLength += Subtable->Length; + + /* Compile context interrupt array */ + + ContextIrptNumber = 0; + IortSmmu->ContextInterruptOffset = NodeLength; + while (*PFieldList) + { + Status = DtCompileTable (PFieldList, AcpiDmTableInfoIort3b, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + if (!Subtable) + { + break; + } + DtInsertSubtable (ParentTable, Subtable); + NodeLength += Subtable->Length; + ContextIrptNumber++; + } + IortSmmu->ContextInterruptCount = ContextIrptNumber; + + /* Compile PMU interrupt array */ + + PmuIrptNumber = 0; + IortSmmu->PmuInterruptOffset = NodeLength; + while (*PFieldList) + { + Status = DtCompileTable (PFieldList, AcpiDmTableInfoIort3c, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + if (!Subtable) + { + break; + } + DtInsertSubtable (ParentTable, Subtable); + NodeLength += Subtable->Length; + PmuIrptNumber++; + } + IortSmmu->PmuInterruptCount = PmuIrptNumber; + break; + + default: + + DtFatal (ASL_MSG_UNKNOWN_SUBTABLE, SubtableStart, "IORT"); + return (AE_ERROR); + } + + /* Compile Array of ID mappings */ + + IortNode->MappingOffset = NodeLength; + IdMappingNumber = 0; + while (*PFieldList) + { + Status = DtCompileTable (PFieldList, AcpiDmTableInfoIortMap, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + if (!Subtable) + { + break; + } + DtInsertSubtable (ParentTable, Subtable); + NodeLength += sizeof (ACPI_IORT_ID_MAPPING); + IdMappingNumber++; + } + IortNode->MappingCount = IdMappingNumber; + + /* + * Node length can be determined by DT_LENGTH option + * IortNode->Length = NodeLength; + */ + DtPopSubtable (); + ParentTable = DtPeekSubtable (); + NodeNumber++; + } + Iort->NodeCount = NodeNumber; + + return (AE_OK); +} + + /****************************************************************************** * * FUNCTION: DtCompileIvrs @@ -1487,11 +1944,6 @@ DtCompileLpit ( InfoTable = AcpiDmTableInfoLpit0; break; - case ACPI_LPIT_TYPE_SIMPLE_IO: - - InfoTable = AcpiDmTableInfoLpit1; - break; - default: DtFatal (ASL_MSG_UNKNOWN_SUBTABLE, SubtableStart, "LPIT"); @@ -1643,6 +2095,11 @@ DtCompileMadt ( InfoTable = AcpiDmTableInfoMadt14; break; + case ACPI_MADT_TYPE_GENERIC_TRANSLATOR: + + InfoTable = AcpiDmTableInfoMadt15; + break; + default: DtFatal (ASL_MSG_UNKNOWN_SUBTABLE, SubtableStart, "MADT"); @@ -1876,6 +2333,201 @@ DtCompileMtmr ( } +/****************************************************************************** + * + * FUNCTION: DtCompileNfit + * + * PARAMETERS: List - Current field list pointer + * + * RETURN: Status + * + * DESCRIPTION: Compile NFIT. + * + *****************************************************************************/ + +ACPI_STATUS +DtCompileNfit ( + void **List) +{ + ACPI_STATUS Status; + DT_SUBTABLE *Subtable; + DT_SUBTABLE *ParentTable; + DT_FIELD **PFieldList = (DT_FIELD **) List; + DT_FIELD *SubtableStart; + ACPI_NFIT_HEADER *NfitHeader; + ACPI_DMTABLE_INFO *InfoTable; + UINT32 Count; + ACPI_NFIT_INTERLEAVE *Interleave = NULL; + ACPI_NFIT_FLUSH_ADDRESS *Hint = NULL; + + /* Main table */ + + Status = DtCompileTable (PFieldList, AcpiDmTableInfoNfit, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + + ParentTable = DtPeekSubtable (); + DtInsertSubtable (ParentTable, Subtable); + DtPushSubtable (Subtable); + + /* Subtables */ + + while (*PFieldList) + { + SubtableStart = *PFieldList; + Status = DtCompileTable (PFieldList, AcpiDmTableInfoNfitHdr, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + + ParentTable = DtPeekSubtable (); + DtInsertSubtable (ParentTable, Subtable); + DtPushSubtable (Subtable); + + NfitHeader = ACPI_CAST_PTR (ACPI_NFIT_HEADER, Subtable->Buffer); + + switch (NfitHeader->Type) + { + case ACPI_NFIT_TYPE_SYSTEM_ADDRESS: + + InfoTable = AcpiDmTableInfoNfit0; + break; + + case ACPI_NFIT_TYPE_MEMORY_MAP: + + InfoTable = AcpiDmTableInfoNfit1; + break; + + case ACPI_NFIT_TYPE_INTERLEAVE: + + Interleave = ACPI_CAST_PTR (ACPI_NFIT_INTERLEAVE, Subtable->Buffer); + InfoTable = AcpiDmTableInfoNfit2; + break; + + case ACPI_NFIT_TYPE_SMBIOS: + + InfoTable = AcpiDmTableInfoNfit3; + break; + + case ACPI_NFIT_TYPE_CONTROL_REGION: + + InfoTable = AcpiDmTableInfoNfit4; + break; + + case ACPI_NFIT_TYPE_DATA_REGION: + + InfoTable = AcpiDmTableInfoNfit5; + break; + + case ACPI_NFIT_TYPE_FLUSH_ADDRESS: + + Hint = ACPI_CAST_PTR (ACPI_NFIT_FLUSH_ADDRESS, Subtable->Buffer); + InfoTable = AcpiDmTableInfoNfit6; + break; + + default: + + DtFatal (ASL_MSG_UNKNOWN_SUBTABLE, SubtableStart, "NFIT"); + return (AE_ERROR); + } + + Status = DtCompileTable (PFieldList, InfoTable, &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + + ParentTable = DtPeekSubtable (); + DtInsertSubtable (ParentTable, Subtable); + DtPopSubtable (); + + switch (NfitHeader->Type) + { + case ACPI_NFIT_TYPE_INTERLEAVE: + + Count = 0; + DtPushSubtable (Subtable); + while (*PFieldList) + { + Status = DtCompileTable (PFieldList, AcpiDmTableInfoNfit2a, + &Subtable, FALSE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + if (!Subtable) + { + DtPopSubtable (); + break; + } + + ParentTable = DtPeekSubtable (); + DtInsertSubtable (ParentTable, Subtable); + Count++; + } + + Interleave->LineCount = Count; + DtPopSubtable (); + break; + + case ACPI_NFIT_TYPE_SMBIOS: + + if (*PFieldList) + { + Status = DtCompileTable (PFieldList, AcpiDmTableInfoNfit3a, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + if (Subtable) + { + DtInsertSubtable (ParentTable, Subtable); + } + } + break; + + case ACPI_NFIT_TYPE_FLUSH_ADDRESS: + + Count = 0; + DtPushSubtable (Subtable); + while (*PFieldList) + { + Status = DtCompileTable (PFieldList, AcpiDmTableInfoNfit6a, + &Subtable, FALSE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + if (!Subtable) + { + DtPopSubtable (); + break; + } + + ParentTable = DtPeekSubtable (); + DtInsertSubtable (ParentTable, Subtable); + Count++; + } + + Hint->HintCount = (UINT16) Count; + DtPopSubtable (); + break; + + default: + break; + } + } + + return (AE_OK); +} + + /****************************************************************************** * * FUNCTION: DtCompilePcct @@ -1901,6 +2553,8 @@ DtCompilePcct ( ACPI_DMTABLE_INFO *InfoTable; + /* Main table */ + Status = DtCompileTable (PFieldList, AcpiDmTableInfoPcct, &Subtable, TRUE); if (ACPI_FAILURE (Status)) @@ -1911,6 +2565,8 @@ DtCompilePcct ( ParentTable = DtPeekSubtable (); DtInsertSubtable (ParentTable, Subtable); + /* Subtables */ + while (*PFieldList) { SubtableStart = *PFieldList; @@ -2411,6 +3067,59 @@ DtCompileSrat ( } +/****************************************************************************** + * + * FUNCTION: DtCompileStao + * + * PARAMETERS: PFieldList - Current field list pointer + * + * RETURN: Status + * + * DESCRIPTION: Compile STAO. + * + *****************************************************************************/ + +ACPI_STATUS +DtCompileStao ( + void **List) +{ + DT_FIELD **PFieldList = (DT_FIELD **) List; + DT_SUBTABLE *Subtable; + DT_SUBTABLE *ParentTable; + ACPI_STATUS Status; + + + /* Compile the main table */ + + Status = DtCompileTable (PFieldList, AcpiDmTableInfoStao, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + + ParentTable = DtPeekSubtable (); + DtInsertSubtable (ParentTable, Subtable); + + /* Compile each ASCII namestring as a subtable */ + + while (*PFieldList) + { + Status = DtCompileTable (PFieldList, AcpiDmTableInfoStaoStr, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + + ParentTable = DtPeekSubtable (); + DtInsertSubtable (ParentTable, Subtable); + } + + return (AE_OK); +} + + /****************************************************************************** * * FUNCTION: DtGetGenericTableInfo @@ -2503,7 +3212,7 @@ DtCompileUefi ( * operators may be used. */ - DtCompileGeneric ((void **) PFieldList); + DtCompileGeneric ((void **) PFieldList, NULL, NULL); return (AE_OK); } @@ -2559,6 +3268,63 @@ DtCompileWdat ( } +/****************************************************************************** + * + * FUNCTION: DtCompileWpbt + * + * PARAMETERS: List - Current field list pointer + * + * RETURN: Status + * + * DESCRIPTION: Compile WPBT. + * + *****************************************************************************/ + +ACPI_STATUS +DtCompileWpbt ( + void **List) +{ + DT_FIELD **PFieldList = (DT_FIELD **) List; + DT_SUBTABLE *Subtable; + DT_SUBTABLE *ParentTable; + ACPI_TABLE_WPBT *Table; + ACPI_STATUS Status; + UINT16 Length; + + + /* Compile the main table */ + + Status = DtCompileTable (PFieldList, AcpiDmTableInfoWpbt, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + + ParentTable = DtPeekSubtable (); + DtInsertSubtable (ParentTable, Subtable); + + /* Compile the argument list subtable */ + + Status = DtCompileTable (PFieldList, AcpiDmTableInfoWpbt0, + &Subtable, TRUE); + if (ACPI_FAILURE (Status)) + { + return (Status); + } + + /* Extract the length of the Arguments buffer, insert into main table */ + + Length = (UINT16) Subtable->TotalLength; + Table = ACPI_CAST_PTR (ACPI_TABLE_WPBT, ParentTable->Buffer); + Table->ArgumentsLength = Length; + + ParentTable = DtPeekSubtable (); + DtInsertSubtable (ParentTable, Subtable); + return (AE_OK); +} + + /****************************************************************************** * * FUNCTION: DtCompileXsdt @@ -2580,6 +3346,7 @@ DtCompileXsdt ( DT_FIELD *FieldList = *(DT_FIELD **) List; UINT64 Address; + ParentTable = DtPeekSubtable (); while (FieldList) @@ -2600,6 +3367,8 @@ DtCompileXsdt ( * FUNCTION: DtCompileGeneric * * PARAMETERS: List - Current field list pointer + * Name - Field name to end generic compiling + * Length - Compiled table length to return * * RETURN: Status * @@ -2609,7 +3378,9 @@ DtCompileXsdt ( ACPI_STATUS DtCompileGeneric ( - void **List) + void **List, + char *Name, + UINT32 *Length) { ACPI_STATUS Status; DT_SUBTABLE *Subtable; @@ -2632,8 +3403,16 @@ DtCompileGeneric ( /* Now we can actually compile the parse tree */ + if (*Length) + { + *Length = 0; + } while (*PFieldList) { + if (Name && !ACPI_STRCMP ((*PFieldList)->Name, Name)) + { + break; + } Info = DtGetGenericTableInfo ((*PFieldList)->Name); if (!Info) { @@ -2651,6 +3430,10 @@ DtCompileGeneric ( if (ACPI_SUCCESS (Status)) { DtInsertSubtable (ParentTable, Subtable); + if (Length) + { + *Length += Subtable->Length; + } } else { diff --git a/sys/contrib/dev/acpica/compiler/dttemplate.c b/sys/contrib/dev/acpica/compiler/dttemplate.c index 3fcf0814c18c..90b6b17286be 100644 --- a/sys/contrib/dev/acpica/compiler/dttemplate.c +++ b/sys/contrib/dev/acpica/compiler/dttemplate.c @@ -59,7 +59,7 @@ AcpiUtIsSpecialTable ( static ACPI_STATUS DtCreateOneTemplate ( char *Signature, - ACPI_DMTABLE_DATA *TableData); + const ACPI_DMTABLE_DATA *TableData); static ACPI_STATUS DtCreateAllTemplates ( @@ -112,7 +112,7 @@ ACPI_STATUS DtCreateTemplates ( char *Signature) { - ACPI_DMTABLE_DATA *TableData; + const ACPI_DMTABLE_DATA *TableData; ACPI_STATUS Status; @@ -213,7 +213,7 @@ static ACPI_STATUS DtCreateAllTemplates ( void) { - ACPI_DMTABLE_DATA *TableData; + const ACPI_DMTABLE_DATA *TableData; ACPI_STATUS Status; @@ -292,7 +292,7 @@ DtCreateAllTemplates ( static ACPI_STATUS DtCreateOneTemplate ( char *Signature, - ACPI_DMTABLE_DATA *TableData) + const ACPI_DMTABLE_DATA *TableData) { char *DisasmFilename; FILE *File; diff --git a/sys/contrib/dev/acpica/compiler/dttemplate.h b/sys/contrib/dev/acpica/compiler/dttemplate.h index 39be761764ec..1b27b4e7f01e 100644 --- a/sys/contrib/dev/acpica/compiler/dttemplate.h +++ b/sys/contrib/dev/acpica/compiler/dttemplate.h @@ -234,6 +234,29 @@ const unsigned char TemplateDmar[] = 0x00,0x00,0x00,0x00 /* 00000088 "...." */ }; +const unsigned char TemplateDrtm[] = +{ + 0x44,0x52,0x54,0x4D,0x94,0x00,0x00,0x00, /* 00000000 "DRTM...." */ + 0x01,0xB9,0x49,0x4E,0x54,0x45,0x4C,0x20, /* 00000008 "..INTEL " */ + 0x54,0x45,0x4D,0x50,0x4C,0x41,0x54,0x45, /* 00000010 "TEMPLATE" */ + 0x01,0x00,0x00,0x00,0x49,0x4E,0x54,0x4C, /* 00000018 "....INTL" */ + 0x10,0x04,0x15,0x20,0x00,0x00,0x00,0x00, /* 00000020 "... ...." */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000028 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000030 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000038 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000040 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000048 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000050 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000058 "........" */ + 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000060 "........" */ + 0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00, /* 00000068 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000070 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000078 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000080 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000088 "........" */ + 0x00,0x00,0x00,0x00 /* 00000090 "...." */ +}; + const unsigned char TemplateEcdt[] = { 0x45,0x43,0x44,0x54,0x42,0x00,0x00,0x00, /* 00000000 "ECDTB..." */ @@ -379,11 +402,11 @@ const unsigned char TemplateFacs[] = const unsigned char TemplateFadt[] = { - 0x46,0x41,0x43,0x50,0x0C,0x01,0x00,0x00, /* 00000000 "FACP...." */ - 0x05,0x64,0x49,0x4E,0x54,0x45,0x4C,0x20, /* 00000008 ".dINTEL " */ - 0x54,0x45,0x4D,0x50,0x4C,0x41,0x54,0x45, /* 00000010 "TEMPLATE" */ + 0x46,0x41,0x43,0x50,0x14,0x01,0x00,0x00, /* 00000000 "FACP...." */ + 0x06,0x8A,0x49,0x4E,0x54,0x45,0x4C,0x20, /* 00000008 "..INTEL " */ + 0x54,0x65,0x6D,0x70,0x6C,0x61,0x74,0x65, /* 00000010 "Template" */ 0x00,0x00,0x00,0x00,0x49,0x4E,0x54,0x4C, /* 00000018 "....INTL" */ - 0x15,0x11,0x13,0x20,0x01,0x00,0x00,0x00, /* 00000020 "... ...." */ + 0x10,0x04,0x15,0x20,0x01,0x00,0x00,0x00, /* 00000020 "... ...." */ 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000028 "........" */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000030 "........" */ 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000038 "........" */ @@ -412,7 +435,8 @@ const unsigned char TemplateFadt[] = 0x00,0x00,0x00,0x00,0x01,0x08,0x00,0x01, /* 000000F0 "........" */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000F8 "........" */ 0x01,0x08,0x00,0x01,0x00,0x00,0x00,0x00, /* 00000100 "........" */ - 0x00,0x00,0x00,0x00 /* 00000108 "...." */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000108 "........" */ + 0x00,0x00,0x00,0x00 /* 00000110 "...." */ }; const unsigned char TemplateFpdt[] = @@ -538,6 +562,44 @@ const unsigned char TemplateHpet[] = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 /* 00000030 "........" */ }; +const unsigned char TemplateIort[] = +{ + 0x49,0x4F,0x52,0x54,0x0C,0x01,0x00,0x00, /* 00000000 "IORT...." */ + 0x00,0xBC,0x49,0x4E,0x54,0x45,0x4C,0x20, /* 00000008 "..INTEL " */ + 0x54,0x45,0x4D,0x50,0x4C,0x41,0x54,0x45, /* 00000010 "TEMPLATE" */ + 0x00,0x00,0x00,0x00,0x49,0x4E,0x54,0x4C, /* 00000018 "....INTL" */ + 0x10,0x04,0x15,0x20,0x04,0x00,0x00,0x00, /* 00000020 "... ...." */ + 0x34,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000028 "4......." */ + 0x00,0x00,0x00,0x00,0x00,0x2C,0x00,0x00, /* 00000030 ".....,.." */ + 0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00, /* 00000038 "........" */ + 0x18,0x00,0x00,0x00,0x01,0x00,0x00,0x00, /* 00000040 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000048 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000050 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000058 "........" */ + 0x01,0x30,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000060 ".0......" */ + 0x00,0x00,0x00,0x00,0x30,0x00,0x00,0x00, /* 00000068 "....0..." */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000070 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x5C,0x5F,0x53, /* 00000078 ".....\_S" */ + 0x42,0x2E,0x50,0x43,0x49,0x30,0x2E,0x44, /* 00000080 "B.PCI0.D" */ + 0x45,0x56,0x30,0x00,0x00,0x00,0x00,0x00, /* 00000088 "EV0....." */ + 0x02,0x20,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000090 ". ......" */ + 0x00,0x00,0x00,0x00,0x20,0x00,0x00,0x00, /* 00000098 ".... ..." */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000A0 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000A8 "........" */ + 0x03,0x5C,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000B0 ".\......" */ + 0x00,0x00,0x00,0x00,0x5C,0x00,0x00,0x00, /* 000000B8 "....\..." */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000C0 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000C8 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000D0 "........" */ + 0x3C,0x00,0x00,0x00,0x01,0x00,0x00,0x00, /* 000000D8 "<......." */ + 0x4C,0x00,0x00,0x00,0x01,0x00,0x00,0x00, /* 000000E0 "L......." */ + 0x54,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000E8 "T......." */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000F0 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000F8 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000100 "........" */ + 0x00,0x00,0x00,0x00 /* 00000108 "...." */ +}; + const unsigned char TemplateIvrs[] = { 0x49,0x56,0x52,0x53,0xBC,0x00,0x00,0x00, /* 00000000 "IVRS...." */ @@ -568,73 +630,75 @@ const unsigned char TemplateIvrs[] = const unsigned char TemplateLpit[] = { - 0x4C,0x50,0x49,0x54,0xB4,0x00,0x00,0x00, /* 00000000 "LPIT...." */ - 0x01,0x20,0x49,0x4E,0x54,0x45,0x4C,0x20, /* 00000008 ". INTEL " */ - 0x54,0x45,0x4D,0x50,0x4C,0x41,0x54,0x45, /* 00000010 "TEMPLATE" */ + 0x4C,0x50,0x49,0x54,0x94,0x00,0x00,0x00, /* 00000000 "LPIT...." */ + 0x00,0xD8,0x49,0x4E,0x54,0x45,0x4C,0x20, /* 00000008 "..INTEL " */ + 0x54,0x65,0x6D,0x70,0x6C,0x61,0x74,0x65, /* 00000010 "Template" */ 0x01,0x00,0x00,0x00,0x49,0x4E,0x54,0x4C, /* 00000018 "....INTL" */ - 0x25,0x03,0x14,0x20,0x00,0x00,0x00,0x00, /* 00000020 "%.. ...." */ + 0x10,0x04,0x15,0x20,0x00,0x00,0x00,0x00, /* 00000020 "... ...." */ 0x38,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000028 "8......." */ - 0x00,0x00,0x00,0x00,0x7F,0x01,0x02,0x00, /* 00000030 "........" */ + 0x00,0x00,0x00,0x00,0x01,0x08,0x00,0x01, /* 00000030 "........" */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000038 "........" */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000040 "........" */ - 0x00,0x20,0x00,0x03,0x00,0x00,0x00,0x00, /* 00000048 ". ......" */ + 0x7F,0x40,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000048 ".@......" */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000050 "........" */ - 0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00, /* 00000058 "........" */ - 0x58,0x00,0x00,0x00,0x01,0x00,0x00,0x00, /* 00000060 "X......." */ - 0x00,0x00,0x00,0x00,0x01,0x10,0x00,0x02, /* 00000068 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000058 "........" */ + 0x38,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000060 "8......." */ + 0x00,0x00,0x00,0x00,0x01,0x08,0x00,0x01, /* 00000068 "........" */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000070 "........" */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000078 "........" */ - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000080 "........" */ - 0x00,0x00,0x00,0x00,0x01,0x10,0x00,0x02, /* 00000088 "........" */ - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000090 "........" */ - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000098 "........" */ - 0x00,0x08,0x00,0x01,0x00,0x00,0x00,0x00, /* 000000A0 "........" */ - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000A8 "........" */ - 0x00,0x00,0x00,0x00 /* 000000B0 "...." */ + 0x7F,0x40,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000080 ".@......" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000088 "........" */ + 0x00,0x00,0x00,0x00 /* 00000090 "...." */ }; -/* MADT with ACPI 5.1 subtables */ +/* MADT with ACPI 6.0 subtables */ const unsigned char TemplateMadt[] = { - 0x41,0x50,0x49,0x43,0x2a,0x01,0x00,0x00, /* 00000000 "APIC*..." */ - 0x04,0x34,0x49,0x4e,0x54,0x45,0x4c,0x20, /* 00000008 ".4INTEL " */ - 0x54,0x45,0x4d,0x50,0x4c,0x41,0x54,0x45, /* 00000010 "TEMPLATE" */ - 0x01,0x00,0x00,0x00,0x49,0x4e,0x54,0x4c, /* 00000018 "....INTL" */ - 0x24,0x04,0x14,0x20,0x00,0x00,0x00,0x00, /* 00000020 "$.. ...." */ + 0x41,0x50,0x49,0x43,0x5A,0x01,0x00,0x00, /* 00000000 "APICZ..." */ + 0x03,0xEA,0x49,0x4E,0x54,0x45,0x4C,0x20, /* 00000008 "..INTEL " */ + 0x54,0x65,0x6D,0x70,0x6C,0x61,0x74,0x65, /* 00000010 "Template" */ + 0x01,0x00,0x00,0x00,0x49,0x4E,0x54,0x4C, /* 00000018 "....INTL" */ + 0x10,0x04,0x15,0x20,0x00,0x00,0x00,0x00, /* 00000020 "... ...." */ 0x01,0x00,0x00,0x00,0x00,0x08,0x00,0x00, /* 00000028 "........" */ - 0x01,0x00,0x00,0x00,0x01,0x0c,0x01,0x00, /* 00000030 "........" */ + 0x01,0x00,0x00,0x00,0x01,0x0C,0x01,0x00, /* 00000030 "........" */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000038 "........" */ - 0x02,0x0a,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000040 "........" */ - 0x00,0x00,0x03,0x08,0x0d,0x00,0x01,0x00, /* 00000048 "........" */ + 0x02,0x0A,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000040 "........" */ + 0x00,0x00,0x03,0x08,0x0D,0x00,0x01,0x00, /* 00000048 "........" */ 0x00,0x00,0x04,0x06,0x00,0x05,0x00,0x01, /* 00000050 "........" */ - 0x05,0x0c,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000058 "........" */ + 0x05,0x0C,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000058 "........" */ 0x00,0x00,0x00,0x00,0x06,0x10,0x00,0x00, /* 00000060 "........" */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000068 "........" */ 0x00,0x00,0x00,0x00,0x07,0x16,0x00,0x00, /* 00000070 "........" */ 0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00, /* 00000078 "........" */ - 0x00,0x00,0x00,0x00,0x5c,0x43,0x50,0x55, /* 00000080 "....\CPU" */ + 0x00,0x00,0x00,0x00,0x5C,0x43,0x50,0x55, /* 00000080 "....\CPU" */ 0x30,0x00,0x08,0x10,0x05,0x00,0x00,0x00, /* 00000088 "0......." */ 0x00,0x00,0x01,0x00,0x00,0x00,0x01,0x00, /* 00000090 "........" */ 0x00,0x00,0x09,0x10,0x00,0x00,0x00,0x00, /* 00000098 "........" */ - 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, /* 000000a0 "........" */ - 0x00,0x00,0x0a,0x0c,0x05,0x00,0x00,0x00, /* 000000a8 "........" */ - 0x00,0x00,0x00,0x00,0x00,0x00,0x0b,0x4c, /* 000000b0 ".......L" */ - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000b8 "........" */ - 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, /* 000000c0 "........" */ - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000c8 "........" */ - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000d0 "........" */ - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000d8 "........" */ - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000e0 "........" */ - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000e8 "........" */ - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000f0 "........" */ - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000f8 "........" */ - 0x00,0x00,0x0e,0x10,0x00,0x00,0x00,0x00, /* 00000100 "........" */ + 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, /* 000000A0 "........" */ + 0x00,0x00,0x0A,0x0C,0x05,0x00,0x00,0x00, /* 000000A8 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x0B,0x50, /* 000000B0 ".......P" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000B8 "........" */ + 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, /* 000000C0 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000C8 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000D0 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000D8 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000E0 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000E8 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000F0 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000F8 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x0C,0x18, /* 00000100 "........" */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000108 "........" */ - 0x00,0x00,0x0c,0x18,0x00,0x00,0x00,0x00, /* 00000110 "........" */ - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000118 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000110 "........" */ + 0x00,0x00,0x01,0x00,0x00,0x00,0x0D,0x18, /* 00000118 "........" */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000120 "........" */ - 0x00,0x00 /* 00000128 ".. " */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00, /* 00000128 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x0E,0x10, /* 00000130 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000138 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x14, /* 00000140 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000148 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000150 "........" */ + 0x00,0x00 /* 00000158 ".." */ }; const unsigned char TemplateMcfg[] = @@ -728,6 +792,56 @@ const unsigned char TemplateMsct[] = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 /* 00000088 "........" */ }; +const unsigned char TemplateNfit[] = +{ + 0x4E,0x46,0x49,0x54,0x70,0x01,0x00,0x00, /* 00000000 "NFITp..." */ + 0x01,0x53,0x49,0x4E,0x54,0x45,0x4C,0x20, /* 00000008 ".SINTEL " */ + 0x54,0x65,0x6D,0x70,0x6C,0x61,0x74,0x65, /* 00000010 "Template" */ + 0x01,0x00,0x00,0x00,0x49,0x4E,0x54,0x4C, /* 00000018 "....INTL" */ + 0x10,0x04,0x15,0x20,0x00,0x00,0x00,0x00, /* 00000020 "... ...." */ + 0x00,0x00,0x38,0x00,0x01,0x00,0x00,0x00, /* 00000028 "..8....." */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000030 "........" */ + 0x30,0x05,0xAF,0x91,0x86,0x5D,0x0E,0x47, /* 00000038 "0....].G" */ + 0xA6,0xB0,0x0A,0x2D,0xB9,0x40,0x82,0x49, /* 00000040 "...-.@.I" */ + 0x00,0x00,0x00,0x7C,0x03,0x00,0x00,0x00, /* 00000048 "...|...." */ + 0x00,0x00,0x00,0x0C,0x00,0x00,0x00,0x00, /* 00000050 "........" */ + 0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000058 "........" */ + 0x01,0x00,0x30,0x00,0x01,0x00,0x00,0x00, /* 00000060 "..0....." */ + 0x04,0x00,0x00,0x00,0x01,0x00,0x01,0x00, /* 00000068 "........" */ + 0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00, /* 00000070 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000078 "........" */ + 0x00,0x00,0x00,0x08,0x00,0x00,0x00,0x00, /* 00000080 "........" */ + 0x01,0x00,0x03,0x00,0x2A,0x00,0x00,0x00, /* 00000088 "....*..." */ + 0x02,0x00,0x20,0x00,0x01,0x00,0x00,0x00, /* 00000090 ".. ....." */ + 0x04,0x00,0x00,0x00,0x00,0x01,0x00,0x00, /* 00000098 "........" */ + 0x00,0x00,0x00,0x00,0x03,0x00,0x00,0x00, /* 000000A0 "........" */ + 0x06,0x00,0x00,0x00,0x09,0x00,0x00,0x00, /* 000000A8 "........" */ + 0x03,0x00,0x28,0x00,0x00,0x00,0x00,0x00, /* 000000B0 "..(....." */ + 0xB4,0x13,0x5D,0x40,0x91,0x0B,0x29,0x93, /* 000000B8 "..]@..)." */ + 0x67,0xE8,0x23,0x4C,0x00,0x00,0x00,0x88, /* 000000C0 "g.#L...." */ + 0x00,0x11,0x22,0x33,0x44,0x55,0x66,0x77, /* 000000C8 ".."3DUfw" */ + 0x88,0x99,0xAA,0xBB,0xCC,0xDD,0xEE,0xFF, /* 000000D0 "........" */ + 0x04,0x00,0x50,0x00,0x01,0x00,0x86,0x80, /* 000000D8 "..P....." */ + 0x17,0x20,0x01,0x00,0x86,0x80,0x17,0x20, /* 000000E0 ". ..... " */ + 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000E8 "........" */ + 0x89,0x00,0x54,0x76,0x01,0x03,0x00,0x01, /* 000000F0 "..Tv...." */ + 0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00, /* 000000F8 ". ......" */ + 0x00,0x00,0x80,0x00,0x00,0x00,0x00,0x00, /* 00000100 "........" */ + 0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000108 "........" */ + 0x00,0x10,0x80,0x00,0x00,0x00,0x00,0x00, /* 00000110 "........" */ + 0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000118 "........" */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000120 "........" */ + 0x05,0x00,0x28,0x00,0x01,0x00,0x00,0x01, /* 00000128 "..(....." */ + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000130 "........" */ + 0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000138 ". ......" */ + 0x00,0x00,0x00,0xE0,0x0F,0x00,0x00,0x00, /* 00000140 "........" */ + 0x00,0x00,0x00,0x10,0x00,0x00,0x00,0x00, /* 00000148 "........" */ + 0x06,0x00,0x20,0x00,0x01,0x00,0x00,0x00, /* 00000150 ".. ....." */ + 0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 00000158 "........" */ + 0x00,0x00,0x00,0x18,0x04,0x00,0x00,0x00, /* 00000160 "........" */ + 0x00,0x00,0x00,0x18,0x06,0x00,0x00,0x00 /* 00000168 "........" */ +}; + const unsigned char TemplateMtmr[] = { 0x4D,0x54,0x4D,0x52,0x4C,0x00,0x00,0x00, /* 00000000 "MTMRL..." */ @@ -999,6 +1113,26 @@ const unsigned char TemplateSrat[] = 0x00,0x00 /* 00000090 ".." */ }; +const unsigned char TemplateStao[] = +{ + 0x53,0x54,0x41,0x4F,0x7E,0x00,0x00,0x00, /* 00000000 "STAO~..." */ + 0x01,0x7F,0x49,0x4E,0x54,0x45,0x4C,0x20, /* 00000008 "..INTEL " */ + 0x54,0x45,0x4D,0x50,0x4C,0x41,0x54,0x45, /* 00000010 "TEMPLATE" */ + 0x00,0x00,0x00,0x00,0x49,0x4E,0x54,0x4C, /* 00000018 "....INTL" */ + 0x10,0x04,0x15,0x20,0x01,0x5C,0x5F,0x53, /* 00000020 "... .\_S" */ + 0x42,0x30,0x2E,0x42,0x55,0x53,0x30,0x2E, /* 00000028 "B0.BUS0." */ + 0x44,0x45,0x56,0x31,0x00,0x5C,0x5F,0x53, /* 00000030 "DEV1.\_S" */ + 0x42,0x30,0x2E,0x42,0x55,0x53,0x30,0x2E, /* 00000038 "B0.BUS0." */ + 0x44,0x45,0x56,0x32,0x00,0x5C,0x5F,0x53, /* 00000040 "DEV2.\_S" */ + 0x42,0x30,0x2E,0x42,0x55,0x53,0x31,0x2E, /* 00000048 "B0.BUS1." */ + 0x44,0x45,0x56,0x31,0x2E,0x44,0x45,0x56, /* 00000050 "DEV1.DEV" */ + 0x32,0x00,0x5C,0x5F,0x53,0x42,0x30,0x2E, /* 00000058 "2.\_SB0." */ + 0x42,0x55,0x53,0x31,0x2E,0x44,0x45,0x56, /* 00000060 "BUS1.DEV" */ + 0x32,0x2E,0x44,0x45,0x56,0x32,0x00,0x5C, /* 00000068 "2.DEV2.\" */ + 0x55,0x53,0x42,0x31,0x2E,0x48,0x55,0x42, /* 00000070 "USB1.HUB" */ + 0x31,0x2E,0x50,0x54,0x31,0x00 /* 00000078 "1.PT1." */ +}; + const unsigned char TemplateTcpa[] = { 0x54,0x43,0x50,0x41,0x32,0x00,0x00,0x00, /* 00000000 "TCPA2..." */ @@ -1095,6 +1229,41 @@ const unsigned char TemplateWdrt[] = 0x00,0x00,0x00,0x00,0xFF,0xFF,0x00 /* 00000040 "......." */ }; +const unsigned char TemplateWpbt[] = +{ + 0x57,0x50,0x42,0x54,0x98,0x00,0x00,0x00, /* 00000000 "WPBT...." */ + 0x01,0x83,0x49,0x4E,0x54,0x45,0x4C,0x20, /* 00000008 "..INTEL " */ + 0x54,0x45,0x4D,0x50,0x4C,0x41,0x54,0x45, /* 00000010 "TEMPLATE" */ + 0x01,0x00,0x00,0x00,0x49,0x4E,0x54,0x4C, /* 00000018 "....INTL" */ + 0x10,0x04,0x15,0x20,0x78,0x56,0x34,0x12, /* 00000020 "... xV4." */ + 0x00,0x00,0x00,0xBB,0x00,0x00,0x00,0xAA, /* 00000028 "........" */ + 0x33,0x88,0x64,0x00,0x34,0x00,0x20,0x00, /* 00000030 "3.d.4. ." */ + 0x73,0x00,0x63,0x00,0x6F,0x00,0x72,0x00, /* 00000038 "s.c.o.r." */ + 0x65,0x00,0x20,0x00,0x61,0x00,0x6E,0x00, /* 00000040 "e. .a.n." */ + 0x64,0x00,0x20,0x00,0x37,0x00,0x20,0x00, /* 00000048 "d. .7. ." */ + 0x79,0x00,0x65,0x00,0x61,0x00,0x72,0x00, /* 00000050 "y.e.a.r." */ + 0x73,0x00,0x20,0x00,0x61,0x00,0x67,0x00, /* 00000058 "s. .a.g." */ + 0x6F,0x00,0x20,0x00,0x6F,0x00,0x75,0x00, /* 00000060 "o. .o.u." */ + 0x72,0x00,0x20,0x00,0x66,0x00,0x61,0x00, /* 00000068 "r. .f.a." */ + 0x74,0x00,0x68,0x00,0x65,0x00,0x72,0x00, /* 00000070 "t.h.e.r." */ + 0x73,0x00,0x20,0x00,0x62,0x00,0x72,0x00, /* 00000078 "s. .b.r." */ + 0x6F,0x00,0x75,0x00,0x67,0x00,0x68,0x00, /* 00000080 "o.u.g.h." */ + 0x74,0x00,0x20,0x00,0x66,0x00,0x6F,0x00, /* 00000088 "t. .f.o." */ + 0x72,0x00,0x74,0x00,0x68,0x00,0x00,0x00 /* 00000090 "r.t.h..." */ +}; + +const unsigned char TemplateXenv[] = +{ + 0x58,0x45,0x4E,0x56,0x39,0x00,0x00,0x00, /* 00000000 "XENV9..." */ + 0x01,0x3A,0x49,0x4E,0x54,0x45,0x4C,0x20, /* 00000008 ".:INTEL " */ + 0x54,0x45,0x4D,0x50,0x4C,0x41,0x54,0x45, /* 00000010 "TEMPLATE" */ + 0x01,0x00,0x00,0x00,0x49,0x4E,0x54,0x4C, /* 00000018 "....INTL" */ + 0x10,0x04,0x15,0x20,0x00,0x00,0x00,0x10, /* 00000020 "... ...." */ + 0x00,0x00,0x00,0x0A,0x00,0x20,0x00,0x00, /* 00000028 "..... .." */ + 0x00,0x00,0x00,0x0B,0x25,0x00,0xBB,0xAA, /* 00000030 "....%..." */ + 0x03 /* 00000038 "." */ +}; + const unsigned char TemplateXsdt[] = { 0x58,0x53,0x44,0x54,0x64,0x00,0x00,0x00, /* 00000000 "XSDTd..." */ diff --git a/sys/contrib/dev/acpica/compiler/dtutils.c b/sys/contrib/dev/acpica/compiler/dtutils.c index 7d3c2c83d479..2d5b762af4a7 100644 --- a/sys/contrib/dev/acpica/compiler/dtutils.c +++ b/sys/contrib/dev/acpica/compiler/dtutils.c @@ -376,6 +376,7 @@ DtGetFieldType ( case ACPI_DMT_GAS: case ACPI_DMT_HESTNTFY: + case ACPI_DMT_IORTMEM: Type = DT_FIELD_TYPE_INLINE_SUBTABLE; break; @@ -520,6 +521,7 @@ DtGetFieldLength ( case ACPI_DMT_UINT16: case ACPI_DMT_DMAR: case ACPI_DMT_HEST: + case ACPI_DMT_NFIT: case ACPI_DMT_PCI_PATH: ByteLength = 2; @@ -587,6 +589,11 @@ DtGetFieldLength ( ByteLength = sizeof (ACPI_HEST_NOTIFY); break; + case ACPI_DMT_IORTMEM: + + ByteLength = sizeof (ACPI_IORT_MEMORY_ACCESS); + break; + case ACPI_DMT_BUFFER: case ACPI_DMT_RAW_BUFFER: diff --git a/sys/contrib/dev/acpica/compiler/preprocess.h b/sys/contrib/dev/acpica/compiler/preprocess.h index d064287733cc..9dc2bdbb0e77 100644 --- a/sys/contrib/dev/acpica/compiler/preprocess.h +++ b/sys/contrib/dev/acpica/compiler/preprocess.h @@ -267,14 +267,18 @@ PrReplaceData ( char *BufferToAdd, UINT32 LengthToAdd); -void +FILE * PrOpenIncludeFile ( - char *Filename); + char *Filename, + char *OpenMode, + char **FullPathname); FILE * PrOpenIncludeWithPrefix ( char *PrefixDir, - char *Filename); + char *Filename, + char *OpenMode, + char **FullPathname); void PrPushInputFileStack ( diff --git a/sys/contrib/dev/acpica/compiler/prscan.c b/sys/contrib/dev/acpica/compiler/prscan.c index 12e9b8e61d37..12d303c8b98e 100644 --- a/sys/contrib/dev/acpica/compiler/prscan.c +++ b/sys/contrib/dev/acpica/compiler/prscan.c @@ -85,28 +85,42 @@ PrDbgPrint ( char *Action, char *DirectiveName); +static void +PrDoIncludeBuffer ( + char *Pathname, + char *BufferName); + +static void +PrDoIncludeFile ( + char *Pathname); + /* * Supported preprocessor directives + * Each entry is of the form "Name, ArgumentCount" */ static const PR_DIRECTIVE_INFO Gbl_DirectiveInfo[] = { - {"define", 1}, - {"elif", 0}, /* Converted to #else..#if internally */ - {"else", 0}, - {"endif", 0}, - {"error", 1}, - {"if", 1}, - {"ifdef", 1}, - {"ifndef", 1}, - {"include", 0}, /* Argument is not standard format, so 0 */ - {"line", 1}, - {"pragma", 1}, - {"undef", 1}, - {"warning", 1}, - {NULL, 0} + {"define", 1}, + {"elif", 0}, /* Converted to #else..#if internally */ + {"else", 0}, + {"endif", 0}, + {"error", 1}, + {"if", 1}, + {"ifdef", 1}, + {"ifndef", 1}, + {"include", 0}, /* Argument is not standard format, so just use 0 here */ + {"includebuffer", 0}, /* Argument is not standard format, so just use 0 here */ + {"line", 1}, + {"loadbuffer", 0}, + {"pragma", 1}, + {"undef", 1}, + {"warning", 1}, + {NULL, 0} }; +/* This table must match ordering of above table exactly */ + enum Gbl_DirectiveIndexes { PR_DIRECTIVE_DEFINE = 0, @@ -118,6 +132,7 @@ enum Gbl_DirectiveIndexes PR_DIRECTIVE_IFDEF, PR_DIRECTIVE_IFNDEF, PR_DIRECTIVE_INCLUDE, + PR_DIRECTIVE_INCLUDEBUFFER, PR_DIRECTIVE_LINE, PR_DIRECTIVE_PRAGMA, PR_DIRECTIVE_UNDEF, @@ -382,13 +397,6 @@ PrPreprocessInputFile ( Token = PrGetNextToken (NULL, PR_TOKEN_SEPARATORS, &Next); } -#if 0 -/* Line prefix */ - FlPrintFile (ASL_FILE_PREPROCESSOR, "/* %14s %.5u i:%.5u */ ", - Gbl_Files[ASL_FILE_INPUT].Filename, - Gbl_CurrentLineNumber, Gbl_PreprocessorLineNumber); -#endif - /* * Emit a #line directive if necessary, to keep the line numbers in * the (.i) file synchronized with the original source code file, so @@ -433,7 +441,7 @@ PrDoDirective ( char **Next) { char *Token = Gbl_MainTokenBuffer; - char *Token2; + char *Token2 = NULL; char *End; UINT64 Value; ACPI_SIZE TokenOffset; @@ -452,7 +460,7 @@ PrDoDirective ( PrError (ASL_ERROR, ASL_MSG_UNKNOWN_DIRECTIVE, THIS_TOKEN_OFFSET (DirectiveToken)); - DbgPrint (ASL_DEBUG_OUTPUT, PR_PREFIX_ID + DbgPrint (ASL_PARSE_OUTPUT, PR_PREFIX_ID "#%s: Unknown directive\n", Gbl_CurrentLineNumber, DirectiveToken); return; @@ -539,7 +547,7 @@ PrDoDirective ( /* Most directives have at least one argument */ - if (Gbl_DirectiveInfo[Directive].ArgCount == 1) + if (Gbl_DirectiveInfo[Directive].ArgCount >= 1) { Token = PrGetNextToken (NULL, PR_TOKEN_SEPARATORS, Next); if (!Token) @@ -548,6 +556,15 @@ PrDoDirective ( } } + if (Gbl_DirectiveInfo[Directive].ArgCount >= 2) + { + Token2 = PrGetNextToken (NULL, PR_TOKEN_SEPARATORS, Next); + if (!Token2) + { + goto SyntaxError; + } + } + /* * At this point, if we are ignoring the current code block, * do not process any more directives (i.e., ignore them also.) @@ -599,7 +616,7 @@ PrDoDirective ( Gbl_IgnoringThisCodeBlock = TRUE; } - DbgPrint (ASL_DEBUG_OUTPUT, PR_PREFIX_ID + DbgPrint (ASL_PARSE_OUTPUT, PR_PREFIX_ID "Resolved #if: %8.8X%8.8X %s\n", Gbl_CurrentLineNumber, ACPI_FORMAT_UINT64 (Value), Gbl_IgnoringThisCodeBlock ? "" : ""); @@ -672,7 +689,7 @@ PrDoDirective ( Token2 = ""; } #endif - DbgPrint (ASL_DEBUG_OUTPUT, PR_PREFIX_ID + DbgPrint (ASL_PARSE_OUTPUT, PR_PREFIX_ID "New #define: %s->%s\n", Gbl_CurrentLineNumber, Token, Token2); @@ -700,11 +717,32 @@ PrDoDirective ( goto SyntaxError; } - DbgPrint (ASL_DEBUG_OUTPUT, PR_PREFIX_ID + DbgPrint (ASL_PARSE_OUTPUT, PR_PREFIX_ID "Start #include file \"%s\"\n", Gbl_CurrentLineNumber, Token, Gbl_CurrentLineNumber); - PrOpenIncludeFile (Token); + PrDoIncludeFile (Token); + break; + + case PR_DIRECTIVE_INCLUDEBUFFER: + + Token = PrGetNextToken (NULL, " \"<>", Next); + if (!Token) + { + goto SyntaxError; + } + + Token2 = PrGetNextToken (NULL, PR_TOKEN_SEPARATORS, Next); + if (!Token2) + { + goto SyntaxError; + } + + DbgPrint (ASL_PARSE_OUTPUT, PR_PREFIX_ID + "Start #includebuffer input from file \"%s\", buffer name %s\n", + Gbl_CurrentLineNumber, Token, Token2); + + PrDoIncludeBuffer (Token, Token2); break; case PR_DIRECTIVE_LINE: @@ -718,7 +756,7 @@ PrDoDirective ( return; } - DbgPrint (ASL_DEBUG_OUTPUT, PR_PREFIX_ID + DbgPrint (ASL_PARSE_OUTPUT, PR_PREFIX_ID "User #line invocation %s\n", Gbl_CurrentLineNumber, Token); @@ -768,7 +806,7 @@ PrDoDirective ( case PR_DIRECTIVE_UNDEF: - DbgPrint (ASL_DEBUG_OUTPUT, PR_PREFIX_ID + DbgPrint (ASL_PARSE_OUTPUT, PR_PREFIX_ID "#undef: %s\n", Gbl_CurrentLineNumber, Token); PrRemoveDefine (Token); @@ -783,7 +821,7 @@ PrDoDirective ( default: /* Should never get here */ - DbgPrint (ASL_DEBUG_OUTPUT, PR_PREFIX_ID + DbgPrint (ASL_PARSE_OUTPUT, PR_PREFIX_ID "Unrecognized directive: %u\n", Gbl_CurrentLineNumber, Directive); break; @@ -954,9 +992,92 @@ PrDbgPrint ( { DbgPrint (ASL_DEBUG_OUTPUT, "Pr(%.4u) - [%u %s] " - "%*s %s #%s, Depth %u\n", + "%*s %s #%s, IfDepth %u\n", Gbl_CurrentLineNumber, Gbl_IfDepth, Gbl_IgnoringThisCodeBlock ? "I" : "E", Gbl_IfDepth * 4, " ", Action, DirectiveName, Gbl_IfDepth); } + + +/******************************************************************************* + * + * FUNCTION: PrDoIncludeFile + * + * PARAMETERS: Pathname - Name of the input file + * + * RETURN: None. + * + * DESCRIPTION: Open an include file, from #include. + * + ******************************************************************************/ + +static void +PrDoIncludeFile ( + char *Pathname) +{ + char *FullPathname; + + + (void) PrOpenIncludeFile (Pathname, "r", &FullPathname); +} + + +/******************************************************************************* + * + * FUNCTION: PrDoIncludeBuffer + * + * PARAMETERS: Pathname - Name of the input binary file + * BufferName - ACPI namepath of the buffer + * + * RETURN: None. + * + * DESCRIPTION: Create an ACPI buffer object from a binary file. The contents + * of the file are emitted into the buffer object as ascii + * hex data. From #includebuffer. + * + ******************************************************************************/ + +static void +PrDoIncludeBuffer ( + char *Pathname, + char *BufferName) +{ + char *FullPathname; + FILE *BinaryBufferFile; + UINT32 i = 0; + UINT8 c; + + + BinaryBufferFile = PrOpenIncludeFile (Pathname, "rb", &FullPathname); + if (!BinaryBufferFile) + { + return; + } + + /* Emit "Name (XXXX, Buffer() {" header */ + + FlPrintFile (ASL_FILE_PREPROCESSOR, "Name (%s, Buffer()\n{", BufferName); + + /* Dump the entire file in ascii hex format */ + + while (fread (&c, 1, 1, BinaryBufferFile)) + { + if (!(i % 8)) + { + FlPrintFile (ASL_FILE_PREPROCESSOR, "\n ", c); + } + + FlPrintFile (ASL_FILE_PREPROCESSOR, " 0x%2.2X,", c); + i++; + } + + DbgPrint (ASL_PARSE_OUTPUT, PR_PREFIX_ID + "#includebuffer: read %u bytes from %s\n", + Gbl_CurrentLineNumber, i, FullPathname); + + /* Close the Name() operator */ + + FlPrintFile (ASL_FILE_PREPROCESSOR, "\n})\n", BufferName); + fclose (BinaryBufferFile); +} diff --git a/sys/contrib/dev/acpica/compiler/prutils.c b/sys/contrib/dev/acpica/compiler/prutils.c index e36ea1d86824..7e880b1630c6 100644 --- a/sys/contrib/dev/acpica/compiler/prutils.c +++ b/sys/contrib/dev/acpica/compiler/prutils.c @@ -238,9 +238,11 @@ PrReplaceData ( * ******************************************************************************/ -void +FILE * PrOpenIncludeFile ( - char *Filename) + char *Filename, + char *OpenMode, + char **FullPathname) { FILE *IncludeFile; ASL_INCLUDE_DIR *NextDir; @@ -257,12 +259,13 @@ PrOpenIncludeFile ( (Filename[0] == '\\') || (Filename[1] == ':')) { - IncludeFile = PrOpenIncludeWithPrefix ("", Filename); + IncludeFile = PrOpenIncludeWithPrefix ( + "", Filename, OpenMode, FullPathname); if (!IncludeFile) { goto ErrorExit; } - return; + return (IncludeFile); } /* @@ -273,10 +276,11 @@ PrOpenIncludeFile ( * * Construct the file pathname from the global directory name. */ - IncludeFile = PrOpenIncludeWithPrefix (Gbl_DirectoryPath, Filename); + IncludeFile = PrOpenIncludeWithPrefix ( + Gbl_DirectoryPath, Filename, OpenMode, FullPathname); if (IncludeFile) { - return; + return (IncludeFile); } /* @@ -286,10 +290,11 @@ PrOpenIncludeFile ( NextDir = Gbl_IncludeDirList; while (NextDir) { - IncludeFile = PrOpenIncludeWithPrefix (NextDir->Dir, Filename); + IncludeFile = PrOpenIncludeWithPrefix ( + NextDir->Dir, Filename, OpenMode, FullPathname); if (IncludeFile) { - return; + return (IncludeFile); } NextDir = NextDir->Next; @@ -300,6 +305,7 @@ PrOpenIncludeFile ( ErrorExit: sprintf (Gbl_MainTokenBuffer, "%s, %s", Filename, strerror (errno)); PrError (ASL_ERROR, ASL_MSG_INCLUDE_FILE_OPEN, 0); + return (NULL); } @@ -320,7 +326,9 @@ PrOpenIncludeFile ( FILE * PrOpenIncludeWithPrefix ( char *PrefixDir, - char *Filename) + char *Filename, + char *OpenMode, + char **FullPathname) { FILE *IncludeFile; char *Pathname; @@ -336,7 +344,7 @@ PrOpenIncludeWithPrefix ( /* Attempt to open the file, push if successful */ - IncludeFile = fopen (Pathname, "r"); + IncludeFile = fopen (Pathname, OpenMode); if (!IncludeFile) { fprintf (stderr, "Could not open include file %s\n", Pathname); @@ -346,6 +354,7 @@ PrOpenIncludeWithPrefix ( /* Push the include file on the open input file stack */ PrPushInputFileStack (IncludeFile, Pathname); + *FullPathname = Pathname; return (IncludeFile); } diff --git a/sys/contrib/dev/acpica/components/debugger/dbfileio.c b/sys/contrib/dev/acpica/components/debugger/dbfileio.c index 9bf0b2997aaf..59a9a522de29 100644 --- a/sys/contrib/dev/acpica/components/debugger/dbfileio.c +++ b/sys/contrib/dev/acpica/components/debugger/dbfileio.c @@ -216,7 +216,8 @@ AeLocalLoadTable ( ACPI_STATUS AcpiDbGetTableFromFile ( char *Filename, - ACPI_TABLE_HEADER **ReturnTable) + ACPI_TABLE_HEADER **ReturnTable, + BOOLEAN MustBeAmlFile) { #ifdef ACPI_APPLICATION ACPI_STATUS Status; @@ -230,9 +231,18 @@ AcpiDbGetTableFromFile ( return (Status); } -#ifdef ACPI_DATA_TABLE_DISASSEMBLY - IsAmlTable = AcpiUtIsAmlTable (Table); -#endif + if (MustBeAmlFile) + { + IsAmlTable = AcpiUtIsAmlTable (Table); + if (!IsAmlTable) + { + ACPI_EXCEPTION ((AE_INFO, AE_OK, + "Input for -e is not an AML table: " + "\"%4.4s\" (must be DSDT/SSDT)", + Table->Signature)); + return (AE_TYPE); + } + } if (IsAmlTable) { diff --git a/sys/contrib/dev/acpica/components/debugger/dbinput.c b/sys/contrib/dev/acpica/components/debugger/dbinput.c index 297b9e9614ab..623bc4846d90 100644 --- a/sys/contrib/dev/acpica/components/debugger/dbinput.c +++ b/sys/contrib/dev/acpica/components/debugger/dbinput.c @@ -969,7 +969,7 @@ AcpiDbCommandDispatch ( case CMD_LOAD: - Status = AcpiDbGetTableFromFile (AcpiGbl_DbArgs[1], NULL); + Status = AcpiDbGetTableFromFile (AcpiGbl_DbArgs[1], NULL, FALSE); break; case CMD_LOCKS: diff --git a/sys/contrib/dev/acpica/components/dispatcher/dsmethod.c b/sys/contrib/dev/acpica/components/dispatcher/dsmethod.c index a687c7258060..9845025da0e1 100644 --- a/sys/contrib/dev/acpica/components/dispatcher/dsmethod.c +++ b/sys/contrib/dev/acpica/components/dispatcher/dsmethod.c @@ -123,6 +123,7 @@ AcpiDsAutoSerializeMethod ( WalkState = AcpiDsCreateWalkState (Node->OwnerId, NULL, NULL, NULL); if (!WalkState) { + AcpiPsFreeOp (Op); return_ACPI_STATUS (AE_NO_MEMORY); } @@ -131,6 +132,7 @@ AcpiDsAutoSerializeMethod ( if (ACPI_FAILURE (Status)) { AcpiDsDeleteWalkState (WalkState); + AcpiPsFreeOp (Op); return_ACPI_STATUS (Status); } @@ -139,10 +141,6 @@ AcpiDsAutoSerializeMethod ( /* Parse the method, scan for creation of named objects */ Status = AcpiPsParseAml (WalkState); - if (ACPI_FAILURE (Status)) - { - return_ACPI_STATUS (Status); - } AcpiPsDeleteParseTree (Op); return_ACPI_STATUS (Status); diff --git a/sys/contrib/dev/acpica/components/hardware/hwpci.c b/sys/contrib/dev/acpica/components/hardware/hwpci.c index 165d26c2ace4..c19100b67c00 100644 --- a/sys/contrib/dev/acpica/components/hardware/hwpci.c +++ b/sys/contrib/dev/acpica/components/hardware/hwpci.c @@ -140,7 +140,7 @@ AcpiHwDerivePciId ( ACPI_HANDLE PciRegion) { ACPI_STATUS Status; - ACPI_PCI_DEVICE *ListHead = NULL; + ACPI_PCI_DEVICE *ListHead; ACPI_FUNCTION_TRACE (HwDerivePciId); @@ -198,7 +198,6 @@ AcpiHwBuildPciList ( ACPI_HANDLE ParentDevice; ACPI_STATUS Status; ACPI_PCI_DEVICE *ListElement; - ACPI_PCI_DEVICE *ListHead = NULL; /* @@ -206,6 +205,7 @@ AcpiHwBuildPciList ( * a list of device nodes. Loop will exit when either the PCI device is * found, or the root of the namespace is reached. */ + *ReturnListHead = NULL; CurrentDevice = PciRegion; while (1) { @@ -222,7 +222,6 @@ AcpiHwBuildPciList ( if (ParentDevice == RootPciDevice) { - *ReturnListHead = ListHead; return (AE_OK); } @@ -237,9 +236,9 @@ AcpiHwBuildPciList ( /* Put new element at the head of the list */ - ListElement->Next = ListHead; + ListElement->Next = *ReturnListHead; ListElement->Device = ParentDevice; - ListHead = ListElement; + *ReturnListHead = ListElement; CurrentDevice = ParentDevice; } diff --git a/sys/contrib/dev/acpica/components/namespace/nsprepkg.c b/sys/contrib/dev/acpica/components/namespace/nsprepkg.c index 5940a9645813..905fe648b1f5 100644 --- a/sys/contrib/dev/acpica/components/namespace/nsprepkg.c +++ b/sys/contrib/dev/acpica/components/namespace/nsprepkg.c @@ -321,6 +321,13 @@ AcpiNsCheckPackage ( Status = AcpiNsCheckPackageList (Info, Package, Elements, Count); break; + case ACPI_PTYPE2_VAR_VAR: + /* + * Returns a variable list of packages, each with a variable list + * of objects. + */ + break; + case ACPI_PTYPE2_UUID_PAIR: /* The package must contain pairs of (UUID + type) */ @@ -490,6 +497,12 @@ AcpiNsCheckPackageList ( } break; + case ACPI_PTYPE2_VAR_VAR: + /* + * Each subpackage has a fixed or variable number of elements + */ + break; + case ACPI_PTYPE2_FIXED: /* Each subpackage has a fixed length */ diff --git a/sys/contrib/dev/acpica/components/namespace/nsrepair.c b/sys/contrib/dev/acpica/components/namespace/nsrepair.c index a1ffe25f5c0b..b4c2c99b37c4 100644 --- a/sys/contrib/dev/acpica/components/namespace/nsrepair.c +++ b/sys/contrib/dev/acpica/components/namespace/nsrepair.c @@ -523,10 +523,10 @@ AcpiNsRemoveNullElements ( case ACPI_PTYPE2_MIN: case ACPI_PTYPE2_REV_FIXED: case ACPI_PTYPE2_FIX_VAR: - break; default: + case ACPI_PTYPE2_VAR_VAR: case ACPI_PTYPE1_FIXED: case ACPI_PTYPE1_OPTION: return; diff --git a/sys/contrib/dev/acpica/components/parser/psopinfo.c b/sys/contrib/dev/acpica/components/parser/psopinfo.c index 872f58aeb729..f7f62488eaa3 100644 --- a/sys/contrib/dev/acpica/components/parser/psopinfo.c +++ b/sys/contrib/dev/acpica/components/parser/psopinfo.c @@ -52,9 +52,6 @@ ACPI_MODULE_NAME ("psopinfo") -extern const UINT8 AcpiGbl_ShortOpIndex[]; -extern const UINT8 AcpiGbl_LongOpIndex[]; - static const UINT8 AcpiGbl_ArgumentCount[] = {0,1,1,1,1,2,2,2,2,3,3,6}; diff --git a/sys/contrib/dev/acpica/components/utilities/utfileio.c b/sys/contrib/dev/acpica/components/utilities/utfileio.c index bef66f6f1603..15cb3d0fc6ea 100644 --- a/sys/contrib/dev/acpica/components/utilities/utfileio.c +++ b/sys/contrib/dev/acpica/components/utilities/utfileio.c @@ -228,11 +228,8 @@ AcpiUtReadTable ( TableHeader.Length, FileSize); #ifdef ACPI_ASL_COMPILER - Status = FlCheckForAscii (fp, NULL, FALSE); - if (ACPI_SUCCESS (Status)) - { - AcpiOsPrintf ("File appears to be ASCII only, must be binary\n"); - } + AcpiOsPrintf ("File is corrupt or is ASCII text -- " + "it must be a binary file\n"); #endif return (AE_BAD_HEADER); } @@ -344,7 +341,7 @@ AcpiUtReadTableFromFile ( /* Get the entire file */ - fprintf (stderr, "Loading Acpi table from file %10s - Length %.8u (%06X)\n", + fprintf (stderr, "Reading ACPI table from file %10s - Length %.8u (0x%06X)\n", Filename, FileSize, FileSize); Status = AcpiUtReadTable (File, Table, &TableLength); diff --git a/sys/contrib/dev/acpica/components/utilities/uthex.c b/sys/contrib/dev/acpica/components/utilities/uthex.c index 3486008a66c5..7eede9d43fdd 100644 --- a/sys/contrib/dev/acpica/components/utilities/uthex.c +++ b/sys/contrib/dev/acpica/components/utilities/uthex.c @@ -82,9 +82,9 @@ AcpiUtHexToAsciiChar ( /******************************************************************************* * - * FUNCTION: AcpiUtHexCharToValue + * FUNCTION: AcpiUtAsciiCharToHex * - * PARAMETERS: AsciiChar - Hex character in Ascii + * PARAMETERS: HexChar - Hex character in Ascii * * RETURN: The binary value of the ascii/hex character * diff --git a/sys/contrib/dev/acpica/components/utilities/utxferror.c b/sys/contrib/dev/acpica/components/utilities/utxferror.c index 89fc5164a05f..d39682b42b8d 100644 --- a/sys/contrib/dev/acpica/components/utilities/utxferror.c +++ b/sys/contrib/dev/acpica/components/utilities/utxferror.c @@ -123,8 +123,18 @@ AcpiException ( ACPI_MSG_REDIRECT_BEGIN; - AcpiOsPrintf (ACPI_MSG_EXCEPTION "%s, ", AcpiFormatException (Status)); + /* For AE_OK, just print the message */ + + if (ACPI_SUCCESS (Status)) + { + AcpiOsPrintf (ACPI_MSG_EXCEPTION); + + } + else + { + AcpiOsPrintf (ACPI_MSG_EXCEPTION "%s, ", AcpiFormatException (Status)); + } va_start (ArgList, Format); AcpiOsVprintf (Format, ArgList); ACPI_MSG_SUFFIX; diff --git a/sys/contrib/dev/acpica/include/acdebug.h b/sys/contrib/dev/acpica/include/acdebug.h index 23464d66ac41..11cf02ee6433 100644 --- a/sys/contrib/dev/acpica/include/acdebug.h +++ b/sys/contrib/dev/acpica/include/acdebug.h @@ -375,7 +375,8 @@ AcpiDbLoadAcpiTable ( ACPI_STATUS AcpiDbGetTableFromFile ( char *Filename, - ACPI_TABLE_HEADER **Table); + ACPI_TABLE_HEADER **Table, + BOOLEAN MustBeAmlTable); /* diff --git a/sys/contrib/dev/acpica/include/acdisasm.h b/sys/contrib/dev/acpica/include/acdisasm.h index f4487e55f43c..bbd21b7e4cd5 100644 --- a/sys/contrib/dev/acpica/include/acdisasm.h +++ b/sys/contrib/dev/acpica/include/acdisasm.h @@ -60,7 +60,7 @@ #define ACPI_RAW_TABLE_DATA_HEADER "Raw Table Data" -typedef const struct acpi_dmtable_info +typedef struct acpi_dmtable_info { UINT8 Opcode; UINT16 Offset; @@ -148,9 +148,11 @@ typedef enum ACPI_DMT_HEST, ACPI_DMT_HESTNTFY, ACPI_DMT_HESTNTYP, + ACPI_DMT_IORTMEM, ACPI_DMT_IVRS, ACPI_DMT_LPIT, ACPI_DMT_MADT, + ACPI_DMT_NFIT, ACPI_DMT_PCCT, ACPI_DMT_PMTT, ACPI_DMT_SLIC, @@ -178,7 +180,6 @@ typedef struct acpi_dmtable_data ACPI_DMTABLE_HANDLER TableHandler; ACPI_CMTABLE_HANDLER CmTableHandler; const unsigned char *Template; - char *Name; } ACPI_DMTABLE_DATA; @@ -246,6 +247,7 @@ extern ACPI_DMTABLE_INFO AcpiDmTableInfoCpep0[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt0[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt1[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt2[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoCsrt2a[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Device[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoDbg2Addr[]; @@ -262,6 +264,11 @@ extern ACPI_DMTABLE_INFO AcpiDmTableInfoDmar2[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoDmar3[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoDmar4[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm0[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm0a[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm1[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm1a[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoDrtm2[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoEcdt[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoEinj[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoEinj0[]; @@ -272,6 +279,7 @@ extern ACPI_DMTABLE_INFO AcpiDmTableInfoFadt1[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoFadt2[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoFadt3[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoFadt5[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoFadt6[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoFpdt[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoFpdtHdr[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoFpdt0[]; @@ -297,6 +305,20 @@ extern ACPI_DMTABLE_INFO AcpiDmTableInfoHpet[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoLpitHdr[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoLpit0[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoLpit1[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoIort[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoIort0[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoIort0a[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoIort1[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoIort1a[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoIort2[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoIort3[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoIort3a[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoIort3b[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoIort3c[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoIortAcc[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoIortHdr[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoIortMap[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoIortPad[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs0[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs1[]; @@ -321,6 +343,7 @@ extern ACPI_DMTABLE_INFO AcpiDmTableInfoMadt11[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoMadt12[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoMadt13[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoMadt14[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoMadt15[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoMadtHdr[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg0[]; @@ -335,6 +358,18 @@ extern ACPI_DMTABLE_INFO AcpiDmTableInfoMsct[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoMsct0[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoMtmr[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoMtmr0[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoNfit[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoNfitHdr[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoNfit0[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoNfit1[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoNfit2[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoNfit2a[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoNfit3[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoNfit3a[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoNfit4[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoNfit5[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoNfit6[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoNfit6a[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt0[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt1[]; @@ -362,6 +397,8 @@ extern ACPI_DMTABLE_INFO AcpiDmTableInfoSrat0[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoSrat1[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoSrat2[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoSrat3[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoStao[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoStaoStr[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoTcpa[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoTpm2[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoUefi[]; @@ -372,14 +409,17 @@ extern ACPI_DMTABLE_INFO AcpiDmTableInfoWdat[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoWdat0[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoWddt[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoWdrt[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoWpbt[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoWpbt0[]; +extern ACPI_DMTABLE_INFO AcpiDmTableInfoXenv[]; extern ACPI_DMTABLE_INFO AcpiDmTableInfoGeneric[][2]; - /* - * dmtable + * dmtable and ahtable */ -extern ACPI_DMTABLE_DATA AcpiDmTableData[]; +extern const ACPI_DMTABLE_DATA AcpiDmTableData[]; +extern const AH_TABLE AcpiSupportedTables[]; UINT8 AcpiDmGenerateChecksum ( @@ -387,7 +427,7 @@ AcpiDmGenerateChecksum ( UINT32 Length, UINT8 OriginalChecksum); -ACPI_DMTABLE_DATA * +const ACPI_DMTABLE_DATA * AcpiDmGetTableData ( char *Signature); @@ -426,8 +466,13 @@ AcpiDmDumpBuffer ( UINT32 BufferOffset, UINT32 Length, UINT32 AbsoluteOffset, - char *Header, - BOOLEAN MultiLine); + char *Header); + +void +AcpiDmDumpUnicode ( + void *Table, + UINT32 BufferOffset, + UINT32 ByteLength); void AcpiDmDumpAsf ( @@ -449,6 +494,10 @@ void AcpiDmDumpDmar ( ACPI_TABLE_HEADER *Table); +void +AcpiDmDumpDrtm ( + ACPI_TABLE_HEADER *Table); + void AcpiDmDumpEinj ( ACPI_TABLE_HEADER *Table); @@ -473,6 +522,10 @@ void AcpiDmDumpHest ( ACPI_TABLE_HEADER *Table); +void +AcpiDmDumpIort ( + ACPI_TABLE_HEADER *Table); + void AcpiDmDumpIvrs ( ACPI_TABLE_HEADER *Table); @@ -501,6 +554,10 @@ void AcpiDmDumpMtmr ( ACPI_TABLE_HEADER *Table); +void +AcpiDmDumpNfit ( + ACPI_TABLE_HEADER *Table); + void AcpiDmDumpPcct ( ACPI_TABLE_HEADER *Table); @@ -533,6 +590,10 @@ void AcpiDmDumpSrat ( ACPI_TABLE_HEADER *Table); +void +AcpiDmDumpStao ( + ACPI_TABLE_HEADER *Table); + void AcpiDmDumpVrtc ( ACPI_TABLE_HEADER *Table); @@ -541,6 +602,10 @@ void AcpiDmDumpWdat ( ACPI_TABLE_HEADER *Table); +void +AcpiDmDumpWpbt ( + ACPI_TABLE_HEADER *Table); + void AcpiDmDumpXsdt ( ACPI_TABLE_HEADER *Table); diff --git a/sys/contrib/dev/acpica/include/aclocal.h b/sys/contrib/dev/acpica/include/aclocal.h index 9729930614db..4c96303101ed 100644 --- a/sys/contrib/dev/acpica/include/aclocal.h +++ b/sys/contrib/dev/acpica/include/aclocal.h @@ -401,12 +401,24 @@ typedef struct acpi_package_info3 } ACPI_PACKAGE_INFO3; +typedef struct acpi_package_info4 +{ + UINT8 Type; + UINT8 ObjectType1; + UINT8 Count1; + UINT8 SubObjectTypes; + UINT8 PkgCount; + UINT16 Reserved; + +} ACPI_PACKAGE_INFO4; + typedef union acpi_predefined_info { ACPI_NAME_INFO Info; ACPI_PACKAGE_INFO RetInfo; ACPI_PACKAGE_INFO2 RetInfo2; ACPI_PACKAGE_INFO3 RetInfo3; + ACPI_PACKAGE_INFO4 RetInfo4; } ACPI_PREDEFINED_INFO; @@ -1371,4 +1383,11 @@ typedef struct ah_uuid } AH_UUID; +typedef struct ah_table +{ + char *Signature; + char *Description; + +} AH_TABLE; + #endif /* __ACLOCAL_H__ */ diff --git a/sys/contrib/dev/acpica/include/acparser.h b/sys/contrib/dev/acpica/include/acparser.h index 4ad2ec27402b..a3c766610415 100644 --- a/sys/contrib/dev/acpica/include/acparser.h +++ b/sys/contrib/dev/acpica/include/acparser.h @@ -72,6 +72,9 @@ * *****************************************************************************/ +extern const UINT8 AcpiGbl_ShortOpIndex[]; +extern const UINT8 AcpiGbl_LongOpIndex[]; + /* * psxface - Parser external interfaces diff --git a/sys/contrib/dev/acpica/include/acpixf.h b/sys/contrib/dev/acpica/include/acpixf.h index 8f6e089d85b2..8d972ebcfc36 100644 --- a/sys/contrib/dev/acpica/include/acpixf.h +++ b/sys/contrib/dev/acpica/include/acpixf.h @@ -46,7 +46,7 @@ /* Current ACPICA subsystem version in YYYYMMDD format */ -#define ACPI_CA_VERSION 0x20150410 +#define ACPI_CA_VERSION 0x20150515 #include #include diff --git a/sys/contrib/dev/acpica/include/acpredef.h b/sys/contrib/dev/acpica/include/acpredef.h index c832f51ba355..5dae6aae79a3 100644 --- a/sys/contrib/dev/acpica/include/acpredef.h +++ b/sys/contrib/dev/acpica/include/acpredef.h @@ -106,6 +106,11 @@ * count = 0 (optional) * (Used for _DLM) * + * ACPI_PTYPE2_VAR_VAR: Variable number of subpackages, each of either a + * constant or variable length. The subpackages are preceded by a + * constant number of objects. + * (Used for _LPI, _RDI) + * * ACPI_PTYPE2_UUID_PAIR: Each subpackage is preceded by a UUID Buffer. The UUID * defines the format of the package. Zero-length parent package is * allowed. @@ -125,7 +130,8 @@ enum AcpiReturnPackageTypes ACPI_PTYPE2_MIN = 8, ACPI_PTYPE2_REV_FIXED = 9, ACPI_PTYPE2_FIX_VAR = 10, - ACPI_PTYPE2_UUID_PAIR = 11 + ACPI_PTYPE2_VAR_VAR = 11, + ACPI_PTYPE2_UUID_PAIR = 12 }; @@ -177,7 +183,7 @@ enum AcpiReturnPackageTypes * These are the names that can actually be evaluated via AcpiEvaluateObject. * Not present in this table are the following: * - * 1) Predefined/Reserved names that are never evaluated via + * 1) Predefined/Reserved names that are not usually evaluated via * AcpiEvaluateObject: * _Lxx and _Exx GPE methods * _Qxx EC methods @@ -363,6 +369,9 @@ const ACPI_PREDEFINED_INFO AcpiGbl_PredefinedMethods[] = METHOD_RETURNS (ACPI_RTYPE_PACKAGE)}}, /* Fixed-length (4 Int) */ PACKAGE_INFO (ACPI_PTYPE1_FIXED, ACPI_RTYPE_INTEGER, 4,0,0,0), + {{"_BTH", METHOD_1ARGS (ACPI_TYPE_INTEGER), /* ACPI 6.0 */ + METHOD_NO_RETURN_VALUE}}, + {{"_BTM", METHOD_1ARGS (ACPI_TYPE_INTEGER), METHOD_RETURNS (ACPI_RTYPE_INTEGER)}}, @@ -390,6 +399,9 @@ const ACPI_PREDEFINED_INFO AcpiGbl_PredefinedMethods[] = METHOD_RETURNS (ACPI_RTYPE_PACKAGE)}}, /* Variable-length (Ints/Bufs) */ PACKAGE_INFO (ACPI_PTYPE1_VAR, ACPI_RTYPE_INTEGER | ACPI_RTYPE_BUFFER, 0,0,0,0), + {{"_CR3", METHOD_0ARGS, /* ACPI 6.0 */ + METHOD_RETURNS (ACPI_RTYPE_INTEGER)}}, + {{"_CRS", METHOD_0ARGS, METHOD_RETURNS (ACPI_RTYPE_BUFFER)}}, @@ -443,7 +455,7 @@ const ACPI_PREDEFINED_INFO AcpiGbl_PredefinedMethods[] = {{"_DOS", METHOD_1ARGS (ACPI_TYPE_INTEGER), METHOD_NO_RETURN_VALUE}}, - {{"_DSD", METHOD_0ARGS, + {{"_DSD", METHOD_0ARGS, /* ACPI 6.0 */ METHOD_RETURNS (ACPI_RTYPE_PACKAGE)}}, /* Variable-length (Pkgs) each: 1 Buf, 1 Pkg */ PACKAGE_INFO (ACPI_PTYPE2_UUID_PAIR, ACPI_RTYPE_BUFFER, 1, ACPI_RTYPE_PACKAGE, 1,0), @@ -597,6 +609,11 @@ const ACPI_PREDEFINED_INFO AcpiGbl_PredefinedMethods[] = METHOD_RETURNS (ACPI_RTYPE_PACKAGE)}}, /* Variable-length (1 Int(rev), n Pkg (2 Int) */ PACKAGE_INFO (ACPI_PTYPE2_REV_FIXED, ACPI_RTYPE_INTEGER, 2,0,0,0), + {{"_LPI", METHOD_0ARGS, /* ACPI 6.0 */ + METHOD_RETURNS (ACPI_RTYPE_PACKAGE)}}, /* Variable-length (3 Int, n Pkg (10 Int/Buf) */ + PACKAGE_INFO (ACPI_PTYPE2_VAR_VAR, ACPI_RTYPE_INTEGER, 3, + ACPI_RTYPE_INTEGER | ACPI_RTYPE_BUFFER | ACPI_RTYPE_STRING, 10,0), + {{"_MAT", METHOD_0ARGS, METHOD_RETURNS (ACPI_RTYPE_BUFFER)}}, @@ -614,6 +631,9 @@ const ACPI_PREDEFINED_INFO AcpiGbl_PredefinedMethods[] = {{"_MSM", METHOD_4ARGS (ACPI_TYPE_INTEGER, ACPI_TYPE_INTEGER, ACPI_TYPE_INTEGER, ACPI_TYPE_INTEGER), METHOD_RETURNS (ACPI_RTYPE_INTEGER)}}, + {{"_MTL", METHOD_0ARGS, /* ACPI 6.0 */ + METHOD_RETURNS (ACPI_RTYPE_INTEGER)}}, + {{"_NTT", METHOD_0ARGS, METHOD_RETURNS (ACPI_RTYPE_INTEGER)}}, @@ -701,6 +721,10 @@ const ACPI_PREDEFINED_INFO AcpiGbl_PredefinedMethods[] = METHOD_RETURNS (ACPI_RTYPE_PACKAGE)}}, /* Variable-length (Refs) */ PACKAGE_INFO (ACPI_PTYPE1_VAR, ACPI_RTYPE_REFERENCE, 0,0,0,0), + {{"_PRR", METHOD_0ARGS, /* ACPI 6.0 */ + METHOD_RETURNS (ACPI_RTYPE_PACKAGE)}}, /* Fixed-length (1 Ref) */ + PACKAGE_INFO (ACPI_PTYPE1_FIXED, ACPI_RTYPE_REFERENCE, 1,0,0,0), + {{"_PRS", METHOD_0ARGS, METHOD_RETURNS (ACPI_RTYPE_BUFFER)}}, @@ -778,6 +802,11 @@ const ACPI_PREDEFINED_INFO AcpiGbl_PredefinedMethods[] = {{"_PXM", METHOD_0ARGS, METHOD_RETURNS (ACPI_RTYPE_INTEGER)}}, + {{"_RDI", METHOD_0ARGS, /* ACPI 6.0 */ + METHOD_RETURNS (ACPI_RTYPE_PACKAGE)}}, /* Variable-length (1 Int, n Pkg (m Ref)) */ + PACKAGE_INFO (ACPI_PTYPE2_VAR_VAR, ACPI_RTYPE_INTEGER, 1, + ACPI_RTYPE_REFERENCE,0,0), + {{"_REG", METHOD_2ARGS (ACPI_TYPE_INTEGER, ACPI_TYPE_INTEGER), METHOD_NO_RETURN_VALUE}}, @@ -790,6 +819,9 @@ const ACPI_PREDEFINED_INFO AcpiGbl_PredefinedMethods[] = {{"_ROM", METHOD_2ARGS (ACPI_TYPE_INTEGER, ACPI_TYPE_INTEGER), METHOD_RETURNS (ACPI_RTYPE_BUFFER)}}, + {{"_RST", METHOD_0ARGS, /* ACPI 6.0 */ + METHOD_NO_RETURN_VALUE}}, + {{"_RTV", METHOD_0ARGS, METHOD_RETURNS (ACPI_RTYPE_INTEGER)}}, @@ -916,6 +948,9 @@ const ACPI_PREDEFINED_INFO AcpiGbl_PredefinedMethods[] = {{"_TDL", METHOD_0ARGS, METHOD_RETURNS (ACPI_RTYPE_INTEGER)}}, + {{"_TFP", METHOD_0ARGS, /* ACPI 6.0 */ + METHOD_RETURNS (ACPI_RTYPE_INTEGER)}}, + {{"_TIP", METHOD_1ARGS (ACPI_TYPE_INTEGER), METHOD_RETURNS (ACPI_RTYPE_INTEGER)}}, @@ -939,6 +974,9 @@ const ACPI_PREDEFINED_INFO AcpiGbl_PredefinedMethods[] = METHOD_RETURNS (ACPI_RTYPE_PACKAGE)}}, /* Variable-length (Pkgs) each 5 Int with count */ PACKAGE_INFO (ACPI_PTYPE2_COUNT,ACPI_RTYPE_INTEGER, 5,0,0,0), + {{"_TSN", METHOD_0ARGS, /* ACPI 6.0 */ + METHOD_RETURNS (ACPI_RTYPE_REFERENCE)}}, + {{"_TSP", METHOD_0ARGS, METHOD_RETURNS (ACPI_RTYPE_INTEGER)}}, diff --git a/sys/contrib/dev/acpica/include/actbl.h b/sys/contrib/dev/acpica/include/actbl.h index 6d7980827647..ceef763f3004 100644 --- a/sys/contrib/dev/acpica/include/actbl.h +++ b/sys/contrib/dev/acpica/include/actbl.h @@ -310,6 +310,7 @@ typedef struct acpi_table_fadt ACPI_GENERIC_ADDRESS XGpe1Block; /* 64-bit Extended General Purpose Event 1 Reg Blk address */ ACPI_GENERIC_ADDRESS SleepControl; /* 64-bit Sleep Control register (ACPI 5.0) */ ACPI_GENERIC_ADDRESS SleepStatus; /* 64-bit Sleep Status register (ACPI 5.0) */ + UINT64 HypervisorId; /* Hypervisor Vendor ID (ACPI 6.0) */ } ACPI_TABLE_FADT; @@ -369,7 +370,7 @@ enum AcpiPreferredPmProfiles PM_TABLET = 8 }; -/* Values for SleepStatus and SleepControl registers (V5 FADT) */ +/* Values for SleepStatus and SleepControl registers (V5+ FADT) */ #define ACPI_X_WAKE_STATUS 0x80 #define ACPI_X_SLEEP_TYPE_MASK 0x1C @@ -434,15 +435,17 @@ typedef struct acpi_table_desc * FADT is the bottom line as to what the version really is. * * For reference, the values below are as follows: - * FADT V1 size: 0x074 - * FADT V2 size: 0x084 - * FADT V3 size: 0x0F4 - * FADT V4 size: 0x0F4 - * FADT V5 size: 0x10C + * FADT V1 size: 0x074 + * FADT V2 size: 0x084 + * FADT V3 size: 0x0F4 + * FADT V4 size: 0x0F4 + * FADT V5 size: 0x10C + * FADT V6 size: 0x114 */ #define ACPI_FADT_V1_SIZE (UINT32) (ACPI_FADT_OFFSET (Flags) + 4) #define ACPI_FADT_V2_SIZE (UINT32) (ACPI_FADT_OFFSET (MinorRevision) + 1) #define ACPI_FADT_V3_SIZE (UINT32) (ACPI_FADT_OFFSET (SleepControl)) -#define ACPI_FADT_V5_SIZE (UINT32) (sizeof (ACPI_TABLE_FADT)) +#define ACPI_FADT_V5_SIZE (UINT32) (ACPI_FADT_OFFSET (HypervisorId)) +#define ACPI_FADT_V6_SIZE (UINT32) (sizeof (ACPI_TABLE_FADT)) #endif /* __ACTBL_H__ */ diff --git a/sys/contrib/dev/acpica/include/actbl1.h b/sys/contrib/dev/acpica/include/actbl1.h index 66b3d0709380..962324add5e1 100644 --- a/sys/contrib/dev/acpica/include/actbl1.h +++ b/sys/contrib/dev/acpica/include/actbl1.h @@ -73,6 +73,7 @@ #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ #define ACPI_SIG_SLIT "SLIT" /* System Locality Distance Information Table */ #define ACPI_SIG_SRAT "SRAT" /* System Resource Affinity Table */ +#define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ /* @@ -777,7 +778,8 @@ enum AcpiMadtType ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, - ACPI_MADT_TYPE_RESERVED = 15 /* 15 and greater are reserved */ + ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, + ACPI_MADT_TYPE_RESERVED = 16 /* 16 and greater are reserved */ }; @@ -932,7 +934,7 @@ typedef struct acpi_madt_local_x2apic_nmi } ACPI_MADT_LOCAL_X2APIC_NMI; -/* 11: Generic Interrupt (ACPI 5.0) */ +/* 11: Generic Interrupt (ACPI 5.0 + ACPI 6.0 changes) */ typedef struct acpi_madt_generic_interrupt { @@ -950,6 +952,8 @@ typedef struct acpi_madt_generic_interrupt UINT32 VgicInterrupt; UINT64 GicrBaseAddress; UINT64 ArmMpidr; + UINT8 EfficiencyClass; + UINT8 Reserved2[3]; } ACPI_MADT_GENERIC_INTERRUPT; @@ -960,7 +964,7 @@ typedef struct acpi_madt_generic_interrupt #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ -/* 12: Generic Distributor (ACPI 5.0) */ +/* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ typedef struct acpi_madt_generic_distributor { @@ -969,7 +973,8 @@ typedef struct acpi_madt_generic_distributor UINT32 GicId; UINT64 BaseAddress; UINT32 GlobalIrqBase; - UINT32 Reserved2; /* Reserved - must be zero */ + UINT8 Version; + UINT8 Reserved2[3]; /* Reserved - must be zero */ } ACPI_MADT_GENERIC_DISTRIBUTOR; @@ -1005,6 +1010,19 @@ typedef struct acpi_madt_generic_redistributor } ACPI_MADT_GENERIC_REDISTRIBUTOR; +/* 15: Generic Translator (ACPI 6.0) */ + +typedef struct acpi_madt_generic_translator +{ + ACPI_SUBTABLE_HEADER Header; + UINT16 Reserved; /* reserved - must be zero */ + UINT32 TranslationId; + UINT64 BaseAddress; + UINT32 Reserved2; + +} ACPI_MADT_GENERIC_TRANSLATOR; + + /* * Common flags fields for MADT subtables */ @@ -1063,6 +1081,186 @@ typedef struct acpi_msct_proximity } ACPI_MSCT_PROXIMITY; +/******************************************************************************* + * + * NFIT - NVDIMM Interface Table (ACPI 6.0) + * Version 1 + * + ******************************************************************************/ + +typedef struct acpi_table_nfit +{ + ACPI_TABLE_HEADER Header; /* Common ACPI table header */ + UINT32 Reserved; /* Reserved, must be zero */ + +} ACPI_TABLE_NFIT; + +/* Subtable header for NFIT */ + +typedef struct acpi_nfit_header +{ + UINT16 Type; + UINT16 Length; + +} ACPI_NFIT_HEADER; + + +/* Values for subtable type in ACPI_NFIT_HEADER */ + +enum AcpiNfitType +{ + ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, + ACPI_NFIT_TYPE_MEMORY_MAP = 1, + ACPI_NFIT_TYPE_INTERLEAVE = 2, + ACPI_NFIT_TYPE_SMBIOS = 3, + ACPI_NFIT_TYPE_CONTROL_REGION = 4, + ACPI_NFIT_TYPE_DATA_REGION = 5, + ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, + ACPI_NFIT_TYPE_RESERVED = 7 /* 7 and greater are reserved */ +}; + +/* + * NFIT Subtables + */ + +/* 0: System Physical Address Range Structure */ + +typedef struct acpi_nfit_system_address +{ + ACPI_NFIT_HEADER Header; + UINT16 RangeIndex; + UINT16 Flags; + UINT32 Reserved; /* Reseved, must be zero */ + UINT32 ProximityDomain; + UINT8 RangeGuid[16]; + UINT64 Address; + UINT64 Length; + UINT64 MemoryMapping; + +} ACPI_NFIT_SYSTEM_ADDRESS; + +/* Flags */ + +#define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ +#define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ + +/* Range Type GUIDs appear in the include/acuuid.h file */ + + +/* 1: Memory Device to System Address Range Map Structure */ + +typedef struct acpi_nfit_memory_map +{ + ACPI_NFIT_HEADER Header; + UINT32 DeviceHandle; + UINT16 PhysicalId; + UINT16 RegionId; + UINT16 RangeIndex; + UINT16 RegionIndex; + UINT64 RegionSize; + UINT64 RegionOffset; + UINT64 Address; + UINT16 InterleaveIndex; + UINT16 InterleaveWays; + UINT16 Flags; + UINT16 Reserved; /* Reserved, must be zero */ + +} ACPI_NFIT_MEMORY_MAP; + +/* Flags */ + +#define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ +#define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ +#define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ +#define ACPI_NFIT_MEM_ARMED (1<<3) /* 03: Memory Device observed to be not armed */ +#define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ +#define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ + + +/* 2: Interleave Structure */ + +typedef struct acpi_nfit_interleave +{ + ACPI_NFIT_HEADER Header; + UINT16 InterleaveIndex; + UINT16 Reserved; /* Reserved, must be zero */ + UINT32 LineCount; + UINT32 LineSize; + UINT32 LineOffset[1]; /* Variable length */ + +} ACPI_NFIT_INTERLEAVE; + + +/* 3: SMBIOS Management Information Structure */ + +typedef struct acpi_nfit_smbios +{ + ACPI_NFIT_HEADER Header; + UINT32 Reserved; /* Reserved, must be zero */ + UINT8 Data[1]; /* Variable length */ + +} ACPI_NFIT_SMBIOS; + + +/* 4: NVDIMM Control Region Structure */ + +typedef struct acpi_nfit_control_region +{ + ACPI_NFIT_HEADER Header; + UINT16 RegionIndex; + UINT16 VendorId; + UINT16 DeviceId; + UINT16 RevisionId; + UINT16 SubsystemVendorId; + UINT16 SubsystemDeviceId; + UINT16 SubsystemRevisionId; + UINT8 Reserved[6]; /* Reserved, must be zero */ + UINT32 SerialNumber; + UINT16 Code; + UINT16 Windows; + UINT64 WindowSize; + UINT64 CommandOffset; + UINT64 CommandSize; + UINT64 StatusOffset; + UINT64 StatusSize; + UINT16 Flags; + UINT8 Reserved1[6]; /* Reserved, must be zero */ + +} ACPI_NFIT_CONTROL_REGION; + +/* Flags */ + +#define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ + + +/* 5: NVDIMM Block Data Window Region Structure */ + +typedef struct acpi_nfit_data_region +{ + ACPI_NFIT_HEADER Header; + UINT16 RegionIndex; + UINT16 Windows; + UINT64 Offset; + UINT64 Size; + UINT64 Capacity; + UINT64 StartAddress; + +} ACPI_NFIT_DATA_REGION; + + +/* 6: Flush Hint Address Structure */ + +typedef struct acpi_nfit_flush_address +{ + ACPI_NFIT_HEADER Header; + UINT32 DeviceHandle; + UINT16 HintCount; + UINT8 Reserved[6]; /* Reserved, must be zero */ + UINT64 HintAddress[1]; /* Variable length */ + +} ACPI_NFIT_FLUSH_ADDRESS; + + /******************************************************************************* * * SBST - Smart Battery Specification Table @@ -1202,6 +1400,7 @@ typedef struct acpi_srat_gicc_affinity #define ACPI_SRAT_GICC_ENABLED (1) /* 00: Use affinity structure */ + /* Reset to default packing */ #pragma pack() diff --git a/sys/contrib/dev/acpica/include/actbl2.h b/sys/contrib/dev/acpica/include/actbl2.h index 5cdf904f508a..654495f30cd6 100644 --- a/sys/contrib/dev/acpica/include/actbl2.h +++ b/sys/contrib/dev/acpica/include/actbl2.h @@ -71,6 +71,7 @@ #define ACPI_SIG_DMAR "DMAR" /* DMA Remapping table */ #define ACPI_SIG_HPET "HPET" /* High Precision Event Timer table */ #define ACPI_SIG_IBFT "IBFT" /* iSCSI Boot Firmware Table */ +#define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ @@ -751,6 +752,156 @@ typedef struct acpi_ibft_target } ACPI_IBFT_TARGET; +/******************************************************************************* + * + * IORT - IO Remapping Table + * + * Conforms to "IO Remapping Table System Software on ARM Platforms", + * Document number: ARM DEN 0049A, 2015 + * + ******************************************************************************/ + +typedef struct acpi_table_iort +{ + ACPI_TABLE_HEADER Header; + UINT32 NodeCount; + UINT32 NodeOffset; + UINT32 Reserved; + +} ACPI_TABLE_IORT; + + +/* + * IORT subtables + */ +typedef struct acpi_iort_node +{ + UINT8 Type; + UINT16 Length; + UINT8 Revision; + UINT32 Reserved; + UINT32 MappingCount; + UINT32 MappingOffset; + char NodeData[1]; + +} ACPI_IORT_NODE; + +/* Values for subtable Type above */ + +enum AcpiIortNodeType +{ + ACPI_IORT_NODE_ITS_GROUP = 0x00, + ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, + ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, + ACPI_IORT_NODE_SMMU = 0x03 +}; + + +typedef struct acpi_iort_id_mapping +{ + UINT32 InputBase; /* Lowest value in input range */ + UINT32 IdCount; /* Number of IDs */ + UINT32 OutputBase; /* Lowest value in output range */ + UINT32 OutputReference; /* A reference to the output node */ + UINT32 Flags; + +} ACPI_IORT_ID_MAPPING; + +/* Masks for Flags field above for IORT subtable */ + +#define ACPI_IORT_ID_SINGLE_MAPPING (1) + + +typedef struct acpi_iort_memory_access +{ + UINT32 CacheCoherency; + UINT8 Hints; + UINT16 Reserved; + UINT8 MemoryFlags; + +} ACPI_IORT_MEMORY_ACCESS; + +/* Values for CacheCoherency field above */ + +#define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ +#define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ + +/* Masks for Hints field above */ + +#define ACPI_IORT_HT_TRANSIENT (1) +#define ACPI_IORT_HT_WRITE (1<<1) +#define ACPI_IORT_HT_READ (1<<2) +#define ACPI_IORT_HT_OVERRIDE (1<<3) + +/* Masks for MemoryFlags field above */ + +#define ACPI_IORT_MF_COHERENCY (1) +#define ACPI_IORT_MF_ATTRIBUTES (1<<1) + + +/* + * IORT node specific subtables + */ +typedef struct acpi_iort_its_group +{ + UINT32 ItsCount; + UINT32 Identifiers[1]; /* GIC ITS identifier arrary */ + +} ACPI_IORT_ITS_GROUP; + + +typedef struct acpi_iort_named_component +{ + UINT32 NodeFlags; + UINT64 MemoryProperties; /* Memory access properties */ + UINT8 MemoryAddressLimit; /* Memory address size limit */ + char DeviceName[1]; /* Path of namespace object */ + +} ACPI_IORT_NAMED_COMPONENT; + + +typedef struct acpi_iort_root_complex +{ + UINT64 MemoryProperties; /* Memory access properties */ + UINT32 AtsAttribute; + UINT32 PciSegmentNumber; + +} ACPI_IORT_ROOT_COMPLEX; + +/* Values for AtsAttribute field above */ + +#define ACPI_IORT_ATS_SUPPORTED 0x00000001 /* The root complex supports ATS */ +#define ACPI_IORT_ATS_UNSUPPORTED 0x00000000 /* The root complex doesn't support ATS */ + + +typedef struct acpi_iort_smmu +{ + UINT64 BaseAddress; /* SMMU base address */ + UINT64 Span; /* Length of memory range */ + UINT32 Model; + UINT32 Flags; + UINT32 GlobalInterruptOffset; + UINT32 ContextInterruptCount; + UINT32 ContextInterruptOffset; + UINT32 PmuInterruptCount; + UINT32 PmuInterruptOffset; + UINT64 Interrupts[1]; /* Interrupt array */ + +} ACPI_IORT_SMMU; + +/* Values for Model field above */ + +#define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ +#define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ +#define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ +#define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ + +/* Masks for Flags field above */ + +#define ACPI_IORT_SMMU_DVM_SUPPORTED (1) +#define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) + + /******************************************************************************* * * IVRS - I/O Virtualization Reporting Structure @@ -953,7 +1104,7 @@ typedef struct acpi_ivrs_memory * * LPIT - Low Power Idle Table * - * Conforms to "ACPI Low Power Idle Table (LPIT) and _LPD Proposal (DRAFT)" + * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. * ******************************************************************************/ @@ -981,8 +1132,7 @@ typedef struct acpi_lpit_header enum AcpiLpitType { ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, - ACPI_LPIT_TYPE_SIMPLE_IO = 0x01, - ACPI_LPIT_TYPE_RESERVED = 0x02 /* 2 and above are reserved */ + ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ }; /* Masks for Flags field above */ @@ -1008,24 +1158,6 @@ typedef struct acpi_lpit_native } ACPI_LPIT_NATIVE; -/* 0x01: Simple I/O based LPI structure */ - -typedef struct acpi_lpit_io -{ - ACPI_LPIT_HEADER Header; - ACPI_GENERIC_ADDRESS EntryTrigger; - UINT32 TriggerAction; - UINT64 TriggerValue; - UINT64 TriggerMask; - ACPI_GENERIC_ADDRESS MinimumIdleState; - UINT32 Residency; - UINT32 Latency; - ACPI_GENERIC_ADDRESS ResidencyCounter; - UINT64 CounterFrequency; - -} ACPI_LPIT_IO; - - /******************************************************************************* * * MCFG - PCI Memory Mapped Configuration table and subtable diff --git a/sys/contrib/dev/acpica/include/actbl3.h b/sys/contrib/dev/acpica/include/actbl3.h index f7ae6704ecf5..f575d086b55c 100644 --- a/sys/contrib/dev/acpica/include/actbl3.h +++ b/sys/contrib/dev/acpica/include/actbl3.h @@ -70,7 +70,10 @@ #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ +#define ACPI_SIG_STAO "STAO" /* Status Override table */ #define ACPI_SIG_TPM2 "TPM2" /* Trusted Platform Module 2.0 H/W interface table */ +#define ACPI_SIG_WPBT "WPBT" /* Windows Platform Binary Table */ +#define ACPI_SIG_XENV "XENV" /* Xen Environment table */ #define ACPI_SIG_S3PT "S3PT" /* S3 Performance (sub)Table */ #define ACPI_SIG_PCCS "PCC" /* PCC Shared Memory Region */ @@ -79,7 +82,6 @@ #define ACPI_SIG_MATR "MATR" /* Memory Address Translation Table */ #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ -#define ACPI_SIG_WPBT "WPBT" /* Windows Platform Binary Table */ /* * All tables must be byte-packed to match the ACPI specification, since @@ -123,6 +125,8 @@ typedef struct acpi_table_bgrt /******************************************************************************* * * DRTM - Dynamic Root of Trust for Measurement table + * Conforms to "TCG D-RTM Architecture" June 17 2013, Version 1.0.0 + * Table version 1 * ******************************************************************************/ @@ -141,29 +145,50 @@ typedef struct acpi_table_drtm } ACPI_TABLE_DRTM; -/* 1) Validated Tables List */ +/* Flag Definitions for above */ -typedef struct acpi_drtm_vtl_list +#define ACPI_DRTM_ACCESS_ALLOWED (1) +#define ACPI_DRTM_ENABLE_GAP_CODE (1<<1) +#define ACPI_DRTM_INCOMPLETE_MEASUREMENTS (1<<2) +#define ACPI_DRTM_AUTHORITY_ORDER (1<<3) + + +/* 1) Validated Tables List (64-bit addresses) */ + +typedef struct acpi_drtm_vtable_list { - UINT32 ValidatedTableListCount; + UINT32 ValidatedTableCount; + UINT64 ValidatedTables[1]; -} ACPI_DRTM_VTL_LIST; +} ACPI_DRTM_VTABLE_LIST; -/* 2) Resources List */ +/* 2) Resources List (of Resource Descriptors) */ + +/* Resource Descriptor */ + +typedef struct acpi_drtm_resource +{ + UINT8 Size[7]; + UINT8 Type; + UINT64 Address; + +} ACPI_DRTM_RESOURCE; typedef struct acpi_drtm_resource_list { - UINT32 ResourceListCount; + UINT32 ResourceCount; + ACPI_DRTM_RESOURCE Resources[1]; } ACPI_DRTM_RESOURCE_LIST; /* 3) Platform-specific Identifiers List */ -typedef struct acpi_drtm_id_list +typedef struct acpi_drtm_dps_id { - UINT32 IdListCount; + UINT32 DpsIdLength; + UINT8 DpsId[16]; -} ACPI_DRTM_ID_LIST; +} ACPI_DRTM_DPS_ID; /******************************************************************************* @@ -803,6 +828,24 @@ enum AcpiRasfStatus #define ACPI_RASF_STATUS (0x1F<<3) +/******************************************************************************* + * + * STAO - Status Override Table (_STA override) - ACPI 6.0 + * Version 1 + * + * Conforms to "ACPI Specification for Status Override Table" + * 6 January 2015 + * + ******************************************************************************/ + +typedef struct acpi_table_stao +{ + ACPI_TABLE_HEADER Header; /* Common ACPI table header */ + UINT8 IgnoreUart; + +} ACPI_TABLE_STAO; + + /******************************************************************************* * * TPM2 - Trusted Platform Module (TPM) 2.0 Hardware Interface Table @@ -838,6 +881,47 @@ typedef struct acpi_tpm2_control } ACPI_TPM2_CONTROL; +/******************************************************************************* + * + * WPBT - Windows Platform Environment Table (ACPI 6.0) + * Version 1 + * + * Conforms to "Windows Platform Binary Table (WPBT)" 29 November 2011 + * + ******************************************************************************/ + +typedef struct acpi_table_wpbt +{ + ACPI_TABLE_HEADER Header; /* Common ACPI table header */ + UINT32 HandoffSize; + UINT64 HandoffAddress; + UINT8 Layout; + UINT8 Type; + UINT16 ArgumentsLength; + +} ACPI_TABLE_WPBT; + + +/******************************************************************************* + * + * XENV - Xen Environment Table (ACPI 6.0) + * Version 1 + * + * Conforms to "ACPI Specification for Xen Environment Table" 4 January 2015 + * + ******************************************************************************/ + +typedef struct acpi_table_xenv +{ + ACPI_TABLE_HEADER Header; /* Common ACPI table header */ + UINT64 GrantTableAddress; + UINT64 GrantTableSize; + UINT32 EventInterrupt; + UINT8 EventFlags; + +} ACPI_TABLE_XENV; + + /* Reset to default packing */ #pragma pack() diff --git a/sys/contrib/dev/acpica/include/actypes.h b/sys/contrib/dev/acpica/include/actypes.h index 79ae3103e735..0bee2a771b9d 100644 --- a/sys/contrib/dev/acpica/include/actypes.h +++ b/sys/contrib/dev/acpica/include/actypes.h @@ -538,6 +538,7 @@ typedef UINT64 ACPI_INTEGER; #define ACPI_CAST_PTR(t, p) ((t *) (ACPI_UINTPTR_T) (p)) #define ACPI_CAST_INDIRECT_PTR(t, p) ((t **) (ACPI_UINTPTR_T) (p)) #define ACPI_ADD_PTR(t, a, b) ACPI_CAST_PTR (t, (ACPI_CAST_PTR (UINT8, (a)) + (ACPI_SIZE)(b))) +#define ACPI_SUB_PTR(t, a, b) ACPI_CAST_PTR (t, (ACPI_CAST_PTR (UINT8, (a)) - (ACPI_SIZE)(b))) #define ACPI_PTR_DIFF(a, b) (ACPI_SIZE) (ACPI_CAST_PTR (UINT8, (a)) - ACPI_CAST_PTR (UINT8, (b))) /* Pointer/Integer type conversions */ diff --git a/sys/contrib/dev/acpica/include/acutils.h b/sys/contrib/dev/acpica/include/acutils.h index 85426bf421e8..fe6c0571be47 100644 --- a/sys/contrib/dev/acpica/include/acutils.h +++ b/sys/contrib/dev/acpica/include/acutils.h @@ -339,7 +339,7 @@ extern const UINT8 _acpi_ctype[]; #define _ACPI_DI 0x04 /* '0'-'9' */ #define _ACPI_LO 0x02 /* 'a'-'z' */ #define _ACPI_PU 0x10 /* punctuation */ -#define _ACPI_SP 0x08 /* space */ +#define _ACPI_SP 0x08 /* space, tab, CR, LF, VT, FF */ #define _ACPI_UP 0x01 /* 'A'-'Z' */ #define _ACPI_XD 0x80 /* '0'-'9', 'A'-'F', 'a'-'f' */ diff --git a/sys/contrib/dev/acpica/include/acuuid.h b/sys/contrib/dev/acpica/include/acuuid.h new file mode 100644 index 000000000000..cfc4363336ec --- /dev/null +++ b/sys/contrib/dev/acpica/include/acuuid.h @@ -0,0 +1,64 @@ +/****************************************************************************** + * + * Name: acuuid.h - ACPI-related UUID/GUID definitions + * + *****************************************************************************/ + +/* + * Copyright (C) 2000 - 2015, Intel Corp. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions, and the following disclaimer, + * without modification. + * 2. Redistributions in binary form must reproduce at minimum a disclaimer + * substantially similar to the "NO WARRANTY" disclaimer below + * ("Disclaimer") and any redistribution must be conditioned upon + * including a substantially similar Disclaimer requirement for further + * binary redistribution. + * 3. Neither the names of the above-listed copyright holders nor the names + * of any contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * Alternatively, this software may be distributed under the terms of the + * GNU General Public License ("GPL") version 2 as published by the Free + * Software Foundation. + * + * NO WARRANTY + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGES. + */ + +#ifndef __ACUUID_H__ +#define __ACUUID_H__ + +/* + * Note1: UUIDs and GUIDs are defined to be identical in ACPI. + * + * Note2: This file is standalone and should remain that way. + */ + +/* NFIT/NVDIMM */ + +#define UUID_VOLATILE_MEMORY "4F940573-DAFD-E344-B16C-3F22D252E5D0" +#define UUID_PERSISTENT_MEMORY "79D3F066-F3B4-7440-AC43-0D3318B78CDB" +#define UUID_CONTROL_REGION "F601F792-B413-5D40-910B-299367E8234C" +#define UUID_DATA_REGION "3005AF91-865D-0E47-A6B0-0A2DB9408249" +#define UUID_VOLATILE_VIRTUAL_DISK "5A53AB77-FC45-4B62-5560-F7B281D1F96E" +#define UUID_VOLATILE_VIRTUAL_CD "30BD5A3D-7541-CE87-6D64-D2ADE523C4BB" +#define UUID_PERSISTENT_VIRTUAL_DISK "C902EA5C-074D-69D3-269F-4496FBE096F9" +#define UUID_PERSISTENT_VIRTUAL_CD "88810108-CD42-48BB-100F-5387D53DED3D" + +#endif /* __AUUID_H__ */ diff --git a/sys/contrib/dev/acpica/include/platform/acenv.h b/sys/contrib/dev/acpica/include/platform/acenv.h index f5f3b1ad6387..88b1ffcfd978 100644 --- a/sys/contrib/dev/acpica/include/platform/acenv.h +++ b/sys/contrib/dev/acpica/include/platform/acenv.h @@ -175,6 +175,9 @@ #elif defined(_APPLE) || defined(__APPLE__) #include "acmacosx.h" +#elif defined(__DragonFly__) +#include "acdragonfly.h" + #elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) #include diff --git a/sys/contrib/dev/acpica/include/platform/acenvex.h b/sys/contrib/dev/acpica/include/platform/acenvex.h index d08d03b04690..6e1130e02076 100644 --- a/sys/contrib/dev/acpica/include/platform/acenvex.h +++ b/sys/contrib/dev/acpica/include/platform/acenvex.h @@ -56,6 +56,9 @@ #if defined(_LINUX) || defined(__linux__) #include "aclinuxex.h" +#elif defined(__DragonFly__) +#include "acdragonflyex.h" + #endif /*! [End] no source code translation !*/ diff --git a/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_eeprom.c b/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_eeprom.c index 9028ab7fa2ab..c8d2b5182f57 100644 --- a/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_eeprom.c +++ b/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_eeprom.c @@ -4476,8 +4476,16 @@ HAL_BOOL ar9300_tuning_caps_apply(struct ath_hal *ah) if ((eep->base_eep_header.feature_enable & 0x40) >> 6) { tuning_caps_params &= 0x7f; - if (AR_SREV_HORNET(ah) || AR_SREV_POSEIDON(ah) || AR_SREV_WASP(ah)) { + /* XXX TODO: ath9k skips it for Wasp and Honeybee/AR9531, not Poseidon */ + if (AR_SREV_POSEIDON(ah) || AR_SREV_WASP(ah)) { return AH_TRUE; + } else if (AR_SREV_HORNET(ah)) { + OS_REG_RMW_FIELD(ah, + AR_HORNET_CH0_XTAL, AR_OSPREY_CHO_XTAL_CAPINDAC, + tuning_caps_params); + OS_REG_RMW_FIELD(ah, + AR_HORNET_CH0_XTAL, AR_OSPREY_CHO_XTAL_CAPOUTDAC, + tuning_caps_params); } else if (AR_SREV_SCORPION(ah)) { OS_REG_RMW_FIELD(ah, AR_SCORPION_CH0_XTAL, AR_OSPREY_CHO_XTAL_CAPINDAC, diff --git a/sys/contrib/ipfilter/netinet/ip_fil_freebsd.c b/sys/contrib/ipfilter/netinet/ip_fil_freebsd.c index 3bb46cf64ea9..93ea5725d0bc 100644 --- a/sys/contrib/ipfilter/netinet/ip_fil_freebsd.c +++ b/sys/contrib/ipfilter/netinet/ip_fil_freebsd.c @@ -189,7 +189,7 @@ ipf_timer_func(arg) #if 0 softc->ipf_slow_ch = timeout(ipf_timer_func, softc, hz/2); #endif - callout_init(&softc->ipf_slow_ch, CALLOUT_MPSAFE); + callout_init(&softc->ipf_slow_ch, 1); callout_reset(&softc->ipf_slow_ch, (hz / IPF_HZ_DIVIDE) * IPF_HZ_MULT, ipf_timer_func, softc); @@ -235,7 +235,7 @@ ipfattach(softc) softc->ipf_slow_ch = timeout(ipf_timer_func, softc, (hz / IPF_HZ_DIVIDE) * IPF_HZ_MULT); #endif - callout_init(&softc->ipf_slow_ch, CALLOUT_MPSAFE); + callout_init(&softc->ipf_slow_ch, 1); callout_reset(&softc->ipf_slow_ch, (hz / IPF_HZ_DIVIDE) * IPF_HZ_MULT, ipf_timer_func, softc); return 0; diff --git a/sys/contrib/vchiq/interface/compat/vchi_bsd.c b/sys/contrib/vchiq/interface/compat/vchi_bsd.c index 31170bc5e605..3d939b130a22 100644 --- a/sys/contrib/vchiq/interface/compat/vchi_bsd.c +++ b/sys/contrib/vchiq/interface/compat/vchi_bsd.c @@ -80,7 +80,7 @@ void init_timer(struct timer_list *t) { mtx_init(&t->mtx, "dahdi timer lock", NULL, MTX_SPIN); - callout_init(&t->callout, CALLOUT_MPSAFE); + callout_init(&t->callout, 1); t->expires = 0; /* * function and data are not initialized intentionally: diff --git a/sys/ddb/db_access.c b/sys/ddb/db_access.c index 415faa1c0807..7001e7264a12 100644 --- a/sys/ddb/db_access.c +++ b/sys/ddb/db_access.c @@ -54,7 +54,7 @@ static unsigned db_extend[] = { /* table for sign-extending */ #endif db_expr_t -db_get_value(db_addr_t addr, int size, boolean_t is_signed) +db_get_value(db_addr_t addr, int size, bool is_signed) { char data[sizeof(u_int64_t)]; register db_expr_t value; diff --git a/sys/ddb/db_access.h b/sys/ddb/db_access.h index 44915e316d15..2b8ac71bac1e 100644 --- a/sys/ddb/db_access.h +++ b/sys/ddb/db_access.h @@ -36,7 +36,7 @@ /* * Data access functions for debugger. */ -db_expr_t db_get_value(db_addr_t addr, int size, boolean_t is_signed); +db_expr_t db_get_value(db_addr_t addr, int size, bool is_signed); void db_put_value(db_addr_t addr, int size, db_expr_t value); #endif /* !_DDB_DB_ACCESS_H_ */ diff --git a/sys/ddb/db_break.c b/sys/ddb/db_break.c index f4c27aa986c9..c882584957c0 100644 --- a/sys/ddb/db_break.c +++ b/sys/ddb/db_break.c @@ -155,12 +155,12 @@ db_find_breakpoint_here(db_addr_t addr) return db_find_breakpoint(db_map_addr(addr), addr); } -static boolean_t db_breakpoints_inserted = TRUE; +static bool db_breakpoints_inserted = true; #ifndef BKPT_WRITE #define BKPT_WRITE(addr, storage) \ do { \ - *storage = db_get_value(addr, BKPT_SIZE, FALSE); \ + *storage = db_get_value(addr, BKPT_SIZE, false); \ db_put_value(addr, BKPT_SIZE, BKPT_SET(*storage)); \ } while (0) #endif @@ -183,7 +183,7 @@ db_set_breakpoints(void) if (db_map_current(bkpt->map)) { BKPT_WRITE(bkpt->address, &bkpt->bkpt_inst); } - db_breakpoints_inserted = TRUE; + db_breakpoints_inserted = true; } } @@ -200,7 +200,7 @@ db_clear_breakpoints(void) if (db_map_current(bkpt->map)) { BKPT_CLEAR(bkpt->address, &bkpt->bkpt_inst); } - db_breakpoints_inserted = FALSE; + db_breakpoints_inserted = false; } } @@ -267,7 +267,7 @@ db_list_breakpoints(void) /* Delete breakpoint */ /*ARGSUSED*/ void -db_delete_cmd(db_expr_t addr, boolean_t have_addr, db_expr_t count, char *modif) +db_delete_cmd(db_expr_t addr, bool have_addr, db_expr_t count, char *modif) { db_delete_breakpoint(db_map_addr(addr), (db_addr_t)addr); } @@ -275,8 +275,7 @@ db_delete_cmd(db_expr_t addr, boolean_t have_addr, db_expr_t count, char *modif) /* Set breakpoint with skip count */ /*ARGSUSED*/ void -db_breakpoint_cmd(db_expr_t addr, boolean_t have_addr, db_expr_t count, - char *modif) +db_breakpoint_cmd(db_expr_t addr, bool have_addr, db_expr_t count, char *modif) { if (count == -1) count = 1; @@ -286,8 +285,7 @@ db_breakpoint_cmd(db_expr_t addr, boolean_t have_addr, db_expr_t count, /* list breakpoints */ void -db_listbreak_cmd(db_expr_t dummy1, boolean_t dummy2, db_expr_t dummy3, - char *dummy4) +db_listbreak_cmd(db_expr_t dummy1, bool dummy2, db_expr_t dummy3, char *dummy4) { db_list_breakpoints(); } @@ -298,7 +296,7 @@ db_listbreak_cmd(db_expr_t dummy1, boolean_t dummy2, db_expr_t dummy3, * (or both) may be null. */ -boolean_t +bool db_map_equal(vm_map_t map1, vm_map_t map2) { return ((map1 == map2) || @@ -306,7 +304,7 @@ db_map_equal(vm_map_t map1, vm_map_t map2) ((map1 == kernel_map) && (map2 == NULL))); } -boolean_t +bool db_map_current(vm_map_t map) { #if 0 @@ -317,7 +315,7 @@ db_map_current(vm_map_t map) (((thread = current_thread()) != NULL) && (map == thread->task->map))); #else - return (1); + return (true); #endif } diff --git a/sys/ddb/db_capture.c b/sys/ddb/db_capture.c index 50ae2cf6c41a..de958d60a46d 100644 --- a/sys/ddb/db_capture.c +++ b/sys/ddb/db_capture.c @@ -331,8 +331,7 @@ db_capture_usage(void) } void -db_capture_cmd(db_expr_t addr, boolean_t have_addr, db_expr_t count, - char *modif) +db_capture_cmd(db_expr_t addr, bool have_addr, db_expr_t count, char *modif) { int t; diff --git a/sys/ddb/db_command.c b/sys/ddb/db_command.c index 7bed8ae27eea..0d4f28f8b656 100644 --- a/sys/ddb/db_command.c +++ b/sys/ddb/db_command.c @@ -59,7 +59,7 @@ __FBSDID("$FreeBSD$"); /* * Exported global variables */ -boolean_t db_cmd_loop_done; +bool db_cmd_loop_done; db_addr_t db_dot; db_addr_t db_last_addr; db_addr_t db_prev; @@ -80,67 +80,67 @@ static db_cmdfcn_t db_watchdog; */ static struct command db_show_all_cmds[] = { - { "trace", db_stack_trace_all, 0, 0 }, + { "trace", db_stack_trace_all, 0, NULL }, }; struct command_table db_show_all_table = LIST_HEAD_INITIALIZER(db_show_all_table); static struct command db_show_cmds[] = { { "all", 0, 0, &db_show_all_table }, - { "registers", db_show_regs, 0, 0 }, - { "breaks", db_listbreak_cmd, 0, 0 }, - { "threads", db_show_threads, 0, 0 }, + { "registers", db_show_regs, 0, NULL }, + { "breaks", db_listbreak_cmd, 0, NULL }, + { "threads", db_show_threads, 0, NULL }, }; struct command_table db_show_table = LIST_HEAD_INITIALIZER(db_show_table); static struct command db_cmds[] = { - { "print", db_print_cmd, 0, 0 }, - { "p", db_print_cmd, 0, 0 }, - { "examine", db_examine_cmd, CS_SET_DOT, 0 }, - { "x", db_examine_cmd, CS_SET_DOT, 0 }, - { "search", db_search_cmd, CS_OWN|CS_SET_DOT, 0 }, - { "set", db_set_cmd, CS_OWN, 0 }, - { "write", db_write_cmd, CS_MORE|CS_SET_DOT, 0 }, - { "w", db_write_cmd, CS_MORE|CS_SET_DOT, 0 }, - { "delete", db_delete_cmd, 0, 0 }, - { "d", db_delete_cmd, 0, 0 }, - { "dump", db_dump, 0, 0 }, - { "break", db_breakpoint_cmd, 0, 0 }, - { "b", db_breakpoint_cmd, 0, 0 }, - { "dwatch", db_deletewatch_cmd, 0, 0 }, - { "watch", db_watchpoint_cmd, CS_MORE,0 }, - { "dhwatch", db_deletehwatch_cmd, 0, 0 }, - { "hwatch", db_hwatchpoint_cmd, 0, 0 }, - { "step", db_single_step_cmd, 0, 0 }, - { "s", db_single_step_cmd, 0, 0 }, - { "continue", db_continue_cmd, 0, 0 }, - { "c", db_continue_cmd, 0, 0 }, - { "until", db_trace_until_call_cmd,0, 0 }, - { "next", db_trace_until_matching_cmd,0, 0 }, - { "match", db_trace_until_matching_cmd,0, 0 }, - { "trace", db_stack_trace, CS_OWN, 0 }, - { "t", db_stack_trace, CS_OWN, 0 }, + { "print", db_print_cmd, 0, NULL }, + { "p", db_print_cmd, 0, NULL }, + { "examine", db_examine_cmd, CS_SET_DOT, NULL }, + { "x", db_examine_cmd, CS_SET_DOT, NULL }, + { "search", db_search_cmd, CS_OWN|CS_SET_DOT, NULL }, + { "set", db_set_cmd, CS_OWN, NULL }, + { "write", db_write_cmd, CS_MORE|CS_SET_DOT, NULL }, + { "w", db_write_cmd, CS_MORE|CS_SET_DOT, NULL }, + { "delete", db_delete_cmd, 0, NULL }, + { "d", db_delete_cmd, 0, NULL }, + { "dump", db_dump, 0, NULL }, + { "break", db_breakpoint_cmd, 0, NULL }, + { "b", db_breakpoint_cmd, 0, NULL }, + { "dwatch", db_deletewatch_cmd, 0, NULL }, + { "watch", db_watchpoint_cmd, CS_MORE,NULL }, + { "dhwatch", db_deletehwatch_cmd, 0, NULL }, + { "hwatch", db_hwatchpoint_cmd, 0, NULL }, + { "step", db_single_step_cmd, 0, NULL }, + { "s", db_single_step_cmd, 0, NULL }, + { "continue", db_continue_cmd, 0, NULL }, + { "c", db_continue_cmd, 0, NULL }, + { "until", db_trace_until_call_cmd,0, NULL }, + { "next", db_trace_until_matching_cmd,0, NULL }, + { "match", db_trace_until_matching_cmd,0, NULL }, + { "trace", db_stack_trace, CS_OWN, NULL }, + { "t", db_stack_trace, CS_OWN, NULL }, /* XXX alias for all trace */ - { "alltrace", db_stack_trace_all, 0, 0 }, - { "where", db_stack_trace, CS_OWN, 0 }, - { "bt", db_stack_trace, CS_OWN, 0 }, - { "call", db_fncall, CS_OWN, 0 }, + { "alltrace", db_stack_trace_all, 0, NULL }, + { "where", db_stack_trace, CS_OWN, NULL }, + { "bt", db_stack_trace, CS_OWN, NULL }, + { "call", db_fncall, CS_OWN, NULL }, { "show", 0, 0, &db_show_table }, - { "ps", db_ps, 0, 0 }, - { "gdb", db_gdb, 0, 0 }, - { "halt", db_halt, 0, 0 }, - { "reboot", db_reset, 0, 0 }, - { "reset", db_reset, 0, 0 }, - { "kill", db_kill, CS_OWN, 0 }, - { "watchdog", db_watchdog, CS_OWN, 0 }, - { "thread", db_set_thread, CS_OWN, 0 }, - { "run", db_run_cmd, CS_OWN, 0 }, - { "script", db_script_cmd, CS_OWN, 0 }, - { "scripts", db_scripts_cmd, 0, 0 }, - { "unscript", db_unscript_cmd, CS_OWN, 0 }, - { "capture", db_capture_cmd, CS_OWN, 0 }, - { "textdump", db_textdump_cmd, CS_OWN, 0 }, - { "findstack", db_findstack_cmd, 0, 0 }, + { "ps", db_ps, 0, NULL }, + { "gdb", db_gdb, 0, NULL }, + { "halt", db_halt, 0, NULL }, + { "reboot", db_reset, 0, NULL }, + { "reset", db_reset, 0, NULL }, + { "kill", db_kill, CS_OWN, NULL }, + { "watchdog", db_watchdog, CS_OWN, NULL }, + { "thread", db_set_thread, CS_OWN, NULL }, + { "run", db_run_cmd, CS_OWN, NULL }, + { "script", db_script_cmd, CS_OWN, NULL }, + { "scripts", db_scripts_cmd, 0, NULL }, + { "unscript", db_unscript_cmd, CS_OWN, NULL }, + { "capture", db_capture_cmd, CS_OWN, NULL }, + { "textdump", db_textdump_cmd, CS_OWN, NULL }, + { "findstack", db_findstack_cmd, 0, NULL }, }; struct command_table db_cmd_table = LIST_HEAD_INITIALIZER(db_cmd_table); @@ -151,7 +151,7 @@ static struct command *db_last_command = 0; * and '+' points to next line. * Otherwise: 'dot' points to next item, '..' points to last. */ -static boolean_t db_ed_style = TRUE; +static bool db_ed_style = true; /* * Utility routine - discard tokens through end-of-line. @@ -311,7 +311,7 @@ db_cmd_search(char *name, struct command_table *table, struct command **cmdp) static void db_cmd_list(struct command_table *table) { - register struct command *cmd; + struct command *cmd; LIST_FOREACH(cmd, table, next) { db_printf("%-16s", cmd->name); @@ -327,7 +327,7 @@ db_command(struct command **last_cmdp, struct command_table *cmd_table, int t; char modif[TOK_STRING_SIZE]; db_expr_t addr, count; - boolean_t have_addr = FALSE; + bool have_addr = false; int result; t = db_read_token(); @@ -335,12 +335,12 @@ db_command(struct command **last_cmdp, struct command_table *cmd_table, /* empty line repeats last command, at 'next' */ cmd = *last_cmdp; addr = (db_expr_t)db_next; - have_addr = FALSE; + have_addr = false; count = 1; modif[0] = '\0'; } else if (t == tEXCL) { - db_fncall((db_expr_t)0, (boolean_t)0, (db_expr_t)0, (char *)0); + db_fncall((db_expr_t)0, (bool)false, (db_expr_t)0, (char *)0); return; } else if (t != tIDENT) { @@ -405,11 +405,11 @@ db_command(struct command **last_cmdp, struct command_table *cmd_table, if (db_expression(&addr)) { db_dot = (db_addr_t) addr; db_last_addr = db_dot; - have_addr = TRUE; + have_addr = true; } else { addr = (db_expr_t) db_dot; - have_addr = FALSE; + have_addr = false; } t = db_read_token(); if (t == tCOMMA) { @@ -521,7 +521,7 @@ db_error(const char *s) } static void -db_dump(db_expr_t dummy, boolean_t dummy2, db_expr_t dummy3, char *dummy4) +db_dump(db_expr_t dummy, bool dummy2, db_expr_t dummy3, char *dummy4) { int error; @@ -530,7 +530,7 @@ db_dump(db_expr_t dummy, boolean_t dummy2, db_expr_t dummy3, char *dummy4) "run \"textdump unset\" first or \"textdump dump\" for a textdump.\n"); return; } - error = doadump(FALSE); + error = doadump(false); if (error) { db_printf("Cannot dump: "); switch (error) { @@ -571,7 +571,7 @@ db_fncall_generic(db_expr_t addr, db_expr_t *rv, int nargs, db_expr_t args[]) } static void -db_fncall(db_expr_t dummy1, boolean_t dummy2, db_expr_t dummy3, char *dummy4) +db_fncall(db_expr_t dummy1, bool dummy2, db_expr_t dummy3, char *dummy4) { db_expr_t fn_addr; db_expr_t args[DB_MAXARGS]; @@ -618,14 +618,14 @@ db_fncall(db_expr_t dummy1, boolean_t dummy2, db_expr_t dummy3, char *dummy4) } static void -db_halt(db_expr_t dummy, boolean_t dummy2, db_expr_t dummy3, char *dummy4) +db_halt(db_expr_t dummy, bool dummy2, db_expr_t dummy3, char *dummy4) { cpu_halt(); } static void -db_kill(db_expr_t dummy1, boolean_t dummy2, db_expr_t dummy3, char *dummy4) +db_kill(db_expr_t dummy1, bool dummy2, db_expr_t dummy3, char *dummy4) { db_expr_t old_radix, pid, sig; struct proc *p; @@ -684,7 +684,7 @@ db_kill(db_expr_t dummy1, boolean_t dummy2, db_expr_t dummy3, char *dummy4) #endif static void -db_reset(db_expr_t addr, boolean_t have_addr, db_expr_t count __unused, +db_reset(db_expr_t addr, bool have_addr, db_expr_t count __unused, char *modif __unused) { int delay, loop; @@ -714,7 +714,7 @@ db_reset(db_expr_t addr, boolean_t have_addr, db_expr_t count __unused, } static void -db_watchdog(db_expr_t dummy1, boolean_t dummy2, db_expr_t dummy3, char *dummy4) +db_watchdog(db_expr_t dummy1, bool dummy2, db_expr_t dummy3, char *dummy4) { db_expr_t old_radix, tout; int err, i; @@ -737,7 +737,7 @@ db_watchdog(db_expr_t dummy1, boolean_t dummy2, db_expr_t dummy3, char *dummy4) } static void -db_gdb(db_expr_t dummy1, boolean_t dummy2, db_expr_t dummy3, char *dummy4) +db_gdb(db_expr_t dummy1, bool dummy2, db_expr_t dummy3, char *dummy4) { if (kdb_dbbe_select("gdb") != 0) { @@ -753,7 +753,7 @@ db_gdb(db_expr_t dummy1, boolean_t dummy2, db_expr_t dummy3, char *dummy4) } static void -db_stack_trace(db_expr_t tid, boolean_t hastid, db_expr_t count, char *modif) +db_stack_trace(db_expr_t tid, bool hastid, db_expr_t count, char *modif) { struct thread *td; db_expr_t radix; @@ -799,7 +799,7 @@ db_stack_trace(db_expr_t tid, boolean_t hastid, db_expr_t count, char *modif) } static void -db_stack_trace_all(db_expr_t dummy, boolean_t dummy2, db_expr_t dummy3, +db_stack_trace_all(db_expr_t dummy, bool dummy2, db_expr_t dummy3, char *dummy4) { struct proc *p; diff --git a/sys/ddb/db_examine.c b/sys/ddb/db_examine.c index f10df12928a5..d4c5ed47208c 100644 --- a/sys/ddb/db_examine.c +++ b/sys/ddb/db_examine.c @@ -52,8 +52,7 @@ static void db_search(db_addr_t, int, db_expr_t, db_expr_t, u_int); */ /*ARGSUSED*/ void -db_examine_cmd(db_expr_t addr, boolean_t have_addr, db_expr_t count, - char *modif) +db_examine_cmd(db_expr_t addr, bool have_addr, db_expr_t count, char *modif) { if (modif[0] != '\0') db_strcpy(db_examine_format, modif); @@ -110,37 +109,37 @@ db_examine(db_addr_t addr, char *fmt, int count) width = size * 4; switch (c) { case 'r': /* signed, current radix */ - value = db_get_value(addr, size, TRUE); + value = db_get_value(addr, size, true); addr += size; db_printf("%+-*lr", width, (long)value); break; case 'x': /* unsigned hex */ - value = db_get_value(addr, size, FALSE); + value = db_get_value(addr, size, false); addr += size; db_printf("%-*lx", width, (long)value); break; case 'z': /* signed hex */ - value = db_get_value(addr, size, TRUE); + value = db_get_value(addr, size, true); addr += size; db_printf("%-*ly", width, (long)value); break; case 'd': /* signed decimal */ - value = db_get_value(addr, size, TRUE); + value = db_get_value(addr, size, true); addr += size; db_printf("%-*ld", width, (long)value); break; case 'u': /* unsigned decimal */ - value = db_get_value(addr, size, FALSE); + value = db_get_value(addr, size, false); addr += size; db_printf("%-*lu", width, (long)value); break; case 'o': /* unsigned octal */ - value = db_get_value(addr, size, FALSE); + value = db_get_value(addr, size, false); addr += size; db_printf("%-*lo", width, (long)value); break; case 'c': /* character */ - value = db_get_value(addr, 1, FALSE); + value = db_get_value(addr, 1, false); addr += 1; if (value >= ' ' && value <= '~') db_printf("%c", (int)value); @@ -149,7 +148,7 @@ db_examine(db_addr_t addr, char *fmt, int count) break; case 's': /* null-terminated string */ for (;;) { - value = db_get_value(addr, 1, FALSE); + value = db_get_value(addr, 1, false); addr += 1; if (value == 0) break; @@ -161,15 +160,15 @@ db_examine(db_addr_t addr, char *fmt, int count) break; case 'S': /* symbol */ value = db_get_value(addr, sizeof(void *), - FALSE); + false); addr += sizeof(void *); db_printsym(value, DB_STGY_ANY); break; case 'i': /* instruction */ - addr = db_disasm(addr, FALSE); + addr = db_disasm(addr, false); break; case 'I': /* instruction, alternate form */ - addr = db_disasm(addr, TRUE); + addr = db_disasm(addr, true); break; default: break; @@ -190,8 +189,7 @@ static char db_print_format = 'x'; /*ARGSUSED*/ void -db_print_cmd(db_expr_t addr, boolean_t have_addr, db_expr_t count, - char *modif) +db_print_cmd(db_expr_t addr, bool have_addr, db_expr_t count, char *modif) { db_expr_t value; @@ -236,7 +234,7 @@ db_print_loc_and_inst(db_addr_t loc) { db_printsym(loc, DB_STGY_PROC); db_printf(":\t"); - (void) db_disasm(loc, TRUE); + (void) db_disasm(loc, true); } /* @@ -244,8 +242,7 @@ db_print_loc_and_inst(db_addr_t loc) * Syntax: search [/bhl] addr value [mask] [,count] */ void -db_search_cmd(db_expr_t dummy1, boolean_t dummy2, db_expr_t dummy3, - char *dummy4) +db_search_cmd(db_expr_t dummy1, bool dummy2, db_expr_t dummy3, char *dummy4) { int t; db_addr_t addr; @@ -314,7 +311,7 @@ db_search(db_addr_t addr, int size, db_expr_t value, db_expr_t mask, { while (count-- != 0) { db_prev = addr; - if ((db_get_value(addr, size, FALSE) & mask) == value) + if ((db_get_value(addr, size, false) & mask) == value) break; addr += size; } diff --git a/sys/ddb/db_expr.c b/sys/ddb/db_expr.c index 424384ce341a..9a568a489de0 100644 --- a/sys/ddb/db_expr.c +++ b/sys/ddb/db_expr.c @@ -38,13 +38,13 @@ __FBSDID("$FreeBSD$"); #include #include -static boolean_t db_add_expr(db_expr_t *valuep); -static boolean_t db_mult_expr(db_expr_t *valuep); -static boolean_t db_shift_expr(db_expr_t *valuep); -static boolean_t db_term(db_expr_t *valuep); -static boolean_t db_unary(db_expr_t *valuep); +static bool db_add_expr(db_expr_t *valuep); +static bool db_mult_expr(db_expr_t *valuep); +static bool db_shift_expr(db_expr_t *valuep); +static bool db_term(db_expr_t *valuep); +static bool db_unary(db_expr_t *valuep); -static boolean_t +static bool db_term(db_expr_t *valuep) { int t; @@ -57,32 +57,32 @@ db_term(db_expr_t *valuep) db_error("Symbol not found\n"); /*NOTREACHED*/ } - return (TRUE); + return (true); } if (t == tNUMBER) { *valuep = (db_expr_t)db_tok_number; - return (TRUE); + return (true); } if (t == tDOT) { *valuep = (db_expr_t)db_dot; - return (TRUE); + return (true); } if (t == tDOTDOT) { *valuep = (db_expr_t)db_prev; - return (TRUE); + return (true); } if (t == tPLUS) { *valuep = (db_expr_t) db_next; - return (TRUE); + return (true); } if (t == tDITTO) { *valuep = (db_expr_t)db_last_addr; - return (TRUE); + return (true); } if (t == tDOLLAR) { if (!db_get_variable(valuep)) - return (FALSE); - return (TRUE); + return (false); + return (true); } if (t == tLPAREN) { if (!db_expression(valuep)) { @@ -94,13 +94,13 @@ db_term(db_expr_t *valuep) db_error("Syntax error\n"); /*NOTREACHED*/ } - return (TRUE); + return (true); } db_unread_token(t); - return (FALSE); + return (false); } -static boolean_t +static bool db_unary(db_expr_t *valuep) { int t; @@ -112,7 +112,7 @@ db_unary(db_expr_t *valuep) /*NOTREACHED*/ } *valuep = -*valuep; - return (TRUE); + return (true); } if (t == tSTAR) { /* indirection */ @@ -120,21 +120,21 @@ db_unary(db_expr_t *valuep) db_error("Syntax error\n"); /*NOTREACHED*/ } - *valuep = db_get_value((db_addr_t)*valuep, sizeof(void *), FALSE); - return (TRUE); + *valuep = db_get_value((db_addr_t)*valuep, sizeof(void *), false); + return (true); } db_unread_token(t); return (db_term(valuep)); } -static boolean_t +static bool db_mult_expr(db_expr_t *valuep) { db_expr_t lhs, rhs; int t; if (!db_unary(&lhs)) - return (FALSE); + return (false); t = db_read_token(); while (t == tSTAR || t == tSLASH || t == tPCT || t == tHASH) { @@ -160,17 +160,17 @@ db_mult_expr(db_expr_t *valuep) } db_unread_token(t); *valuep = lhs; - return (TRUE); + return (true); } -static boolean_t +static bool db_add_expr(db_expr_t *valuep) { db_expr_t lhs, rhs; int t; if (!db_mult_expr(&lhs)) - return (FALSE); + return (false); t = db_read_token(); while (t == tPLUS || t == tMINUS) { @@ -186,17 +186,17 @@ db_add_expr(db_expr_t *valuep) } db_unread_token(t); *valuep = lhs; - return (TRUE); + return (true); } -static boolean_t +static bool db_shift_expr(db_expr_t *valuep) { db_expr_t lhs, rhs; int t; if (!db_add_expr(&lhs)) - return (FALSE); + return (false); t = db_read_token(); while (t == tSHIFT_L || t == tSHIFT_R) { @@ -218,7 +218,7 @@ db_shift_expr(db_expr_t *valuep) } db_unread_token(t); *valuep = lhs; - return (TRUE); + return (true); } int diff --git a/sys/ddb/db_input.c b/sys/ddb/db_input.c index 327f4903cd89..a2a7b3829e8c 100644 --- a/sys/ddb/db_input.c +++ b/sys/ddb/db_input.c @@ -97,7 +97,7 @@ db_delete(n, bwd) int n; int bwd; { - register char *p; + char *p; if (bwd) { db_lc -= n; @@ -112,7 +112,7 @@ db_delete(n, bwd) db_le -= n; } -/* returns TRUE at end-of-line */ +/* returns true at end-of-line */ static int db_inputchar(c) int c; @@ -276,7 +276,7 @@ db_inputchar(c) cnputc('\007'); } else if (c >= ' ' && c <= '~') { - register char *p; + char *p; for (p = db_le; p > db_lc; p--) *p = *(p-1); @@ -348,7 +348,7 @@ db_readline(lstart, lsize) void db_check_interrupt(void) { - register int c; + int c; c = cnmaygetc(); switch (c) { diff --git a/sys/ddb/db_main.c b/sys/ddb/db_main.c index bee321cc34ed..5ef6962ca678 100644 --- a/sys/ddb/db_main.c +++ b/sys/ddb/db_main.c @@ -63,11 +63,11 @@ KDB_BACKEND(ddb, db_init, db_trace_self_wrapper, db_trace_thread_wrapper, */ vm_offset_t ksymtab, kstrtab, ksymtab_size; -boolean_t +bool X_db_line_at_pc(db_symtab_t *symtab, c_db_sym_t sym, char **file, int *line, db_expr_t off) { - return (FALSE); + return (false); } c_db_sym_t @@ -145,11 +145,11 @@ X_db_search_symbol(db_symtab_t *symtab, db_addr_t off, db_strategy_t strat, return ((c_db_sym_t)match); } -boolean_t +bool X_db_sym_numargs(db_symtab_t *symtab, c_db_sym_t sym, int *nargp, char **argp) { - return (FALSE); + return (false); } void @@ -216,7 +216,7 @@ db_trap(int type, int code) { jmp_buf jb; void *prev_jb; - boolean_t bkpt, watchpt; + bool bkpt, watchpt; const char *why; /* diff --git a/sys/ddb/db_print.c b/sys/ddb/db_print.c index 9e454565144d..95550d15774e 100644 --- a/sys/ddb/db_print.c +++ b/sys/ddb/db_print.c @@ -47,7 +47,7 @@ __FBSDID("$FreeBSD$"); #include void -db_show_regs(db_expr_t _1, boolean_t _2, db_expr_t _3, char *_4) +db_show_regs(db_expr_t _1, bool _2, db_expr_t _3, char *_4) { struct db_variable *regp; db_expr_t value, offset; diff --git a/sys/ddb/db_ps.c b/sys/ddb/db_ps.c index d28a06099318..3fc7afe5e225 100644 --- a/sys/ddb/db_ps.c +++ b/sys/ddb/db_ps.c @@ -75,7 +75,7 @@ DB_SHOW_ALL_COMMAND(procs, db_procs_cmd) * characters. */ void -db_ps(db_expr_t addr, boolean_t hasaddr, db_expr_t count, char *modif) +db_ps(db_expr_t addr, bool hasaddr, db_expr_t count, char *modif) { volatile struct proc *p, *pp; volatile struct thread *td; @@ -299,11 +299,11 @@ DB_SHOW_COMMAND(thread, db_show_thread) { struct thread *td; struct lock_object *lock; - boolean_t comma; + bool comma; /* Determine which thread to examine. */ if (have_addr) - td = db_lookup_thread(addr, FALSE); + td = db_lookup_thread(addr, false); else td = kdb_thread; lock = (struct lock_object *)td->td_lock; @@ -332,28 +332,28 @@ DB_SHOW_COMMAND(thread, db_show_thread) break; case TDS_INHIBITED: db_printf("INHIBITED: {"); - comma = FALSE; + comma = false; if (TD_IS_SLEEPING(td)) { db_printf("SLEEPING"); - comma = TRUE; + comma = true; } if (TD_IS_SUSPENDED(td)) { if (comma) db_printf(", "); db_printf("SUSPENDED"); - comma = TRUE; + comma = true; } if (TD_IS_SWAPPED(td)) { if (comma) db_printf(", "); db_printf("SWAPPED"); - comma = TRUE; + comma = true; } if (TD_ON_LOCK(td)) { if (comma) db_printf(", "); db_printf("LOCK"); - comma = TRUE; + comma = true; } if (TD_AWAITING_INTR(td)) { if (comma) @@ -432,8 +432,8 @@ DB_SHOW_COMMAND(proc, db_show_proc) } void -db_findstack_cmd(db_expr_t addr, boolean_t have_addr, - db_expr_t dummy3 __unused, char *dummy4 __unused) +db_findstack_cmd(db_expr_t addr, bool have_addr, db_expr_t dummy3 __unused, + char *dummy4 __unused) { struct proc *p; struct thread *td; diff --git a/sys/ddb/db_run.c b/sys/ddb/db_run.c index 406b9ddd309c..026a9b683fa3 100644 --- a/sys/ddb/db_run.c +++ b/sys/ddb/db_run.c @@ -57,7 +57,7 @@ static int db_run_mode; #define STEP_INVISIBLE 5 #define STEP_COUNT 6 -static boolean_t db_sstep_print; +static bool db_sstep_print; static int db_loop_count; static int db_call_depth; @@ -77,17 +77,17 @@ db_breakpoint_t db_not_taken_bkpt = 0; db_breakpoint_t db_taken_bkpt = 0; #endif -boolean_t -db_stop_at_pc(boolean_t *is_breakpoint) +bool +db_stop_at_pc(bool *is_breakpoint) { - register db_addr_t pc; - register db_breakpoint_t bkpt; + db_addr_t pc; + db_breakpoint_t bkpt; pc = PC_REGS(); #ifdef SOFTWARE_SSTEP if ((db_not_taken_bkpt != 0 && pc == db_not_taken_bkpt->address) || (db_taken_bkpt != 0 && pc == db_taken_bkpt->address)) - *is_breakpoint = FALSE; + *is_breakpoint = false; #endif db_clear_single_step(); @@ -112,8 +112,8 @@ db_stop_at_pc(boolean_t *is_breakpoint) if (bkpt) { if (--bkpt->count == 0) { bkpt->count = bkpt->init_count; - *is_breakpoint = TRUE; - return (TRUE); /* stop here */ + *is_breakpoint = true; + return (true); /* stop here */ } } else if (*is_breakpoint) { #ifdef BKPT_SKIP @@ -121,14 +121,14 @@ db_stop_at_pc(boolean_t *is_breakpoint) #endif } - *is_breakpoint = FALSE; + *is_breakpoint = false; if (db_run_mode == STEP_INVISIBLE) { db_run_mode = STEP_CONTINUE; - return (FALSE); /* continue */ + return (false); /* continue */ } if (db_run_mode == STEP_COUNT) { - return (FALSE); /* continue */ + return (false); /* continue */ } if (db_run_mode == STEP_ONCE) { if (--db_loop_count > 0) { @@ -137,19 +137,19 @@ db_stop_at_pc(boolean_t *is_breakpoint) db_print_loc_and_inst(pc); db_printf("\n"); } - return (FALSE); /* continue */ + return (false); /* continue */ } } if (db_run_mode == STEP_RETURN) { /* continue until matching return */ db_expr_t ins; - ins = db_get_value(pc, sizeof(int), FALSE); + ins = db_get_value(pc, sizeof(int), false); if (!inst_trap_return(ins) && (!inst_return(ins) || --db_call_depth != 0)) { if (db_sstep_print) { if (inst_call(ins) || inst_return(ins)) { - register int i; + int i; db_printf("[after %6d] ", db_inst_count); for (i = db_call_depth; --i > 0; ) @@ -160,28 +160,28 @@ db_stop_at_pc(boolean_t *is_breakpoint) } if (inst_call(ins)) db_call_depth++; - return (FALSE); /* continue */ + return (false); /* continue */ } } if (db_run_mode == STEP_CALLT) { /* continue until call or return */ db_expr_t ins; - ins = db_get_value(pc, sizeof(int), FALSE); + ins = db_get_value(pc, sizeof(int), false); if (!inst_call(ins) && !inst_return(ins) && !inst_trap_return(ins)) { - return (FALSE); /* continue */ + return (false); /* continue */ } } db_run_mode = STEP_NONE; - return (TRUE); + return (true); } void -db_restart_at_pc(boolean_t watchpt) +db_restart_at_pc(bool watchpt) { - register db_addr_t pc = PC_REGS(); + db_addr_t pc = PC_REGS(); if ((db_run_mode == STEP_COUNT) || (db_run_mode == STEP_RETURN) || @@ -193,7 +193,7 @@ db_restart_at_pc(boolean_t watchpt) #ifdef SOFTWARE_SSTEP db_expr_t ins = #endif - db_get_value(pc, sizeof(int), FALSE); + db_get_value(pc, sizeof(int), false); db_inst_count++; db_load_count += inst_load(ins); db_store_count += inst_store(ins); @@ -201,7 +201,7 @@ db_restart_at_pc(boolean_t watchpt) /* XXX works on mips, but... */ if (inst_branch(ins) || inst_call(ins)) { ins = db_get_value(next_instr_address(pc,1), - sizeof(int), FALSE); + sizeof(int), false); db_inst_count++; db_load_count += inst_load(ins); db_store_count += inst_store(ins); @@ -234,7 +234,7 @@ db_restart_at_pc(boolean_t watchpt) * Just define the above conditional and provide * the functions/macros defined below. * - * extern boolean_t + * extern bool * inst_branch(), returns true if the instruction might branch * extern unsigned * branch_taken(), return the address the instruction might @@ -266,7 +266,7 @@ db_set_single_step(void) * User was stopped at pc, e.g. the instruction * at pc was not executed. */ - inst = db_get_value(pc, sizeof(int), FALSE); + inst = db_get_value(pc, sizeof(int), false); if (inst_branch(inst) || inst_call(inst) || inst_return(inst)) { brpc = branch_taken(inst, pc); if (brpc != pc) { /* self-branches are hopeless */ @@ -299,19 +299,15 @@ extern int db_cmd_loop_done; /* single-step */ /*ARGSUSED*/ void -db_single_step_cmd(addr, have_addr, count, modif) - db_expr_t addr; - boolean_t have_addr; - db_expr_t count; - char * modif; +db_single_step_cmd(db_expr_t addr, bool have_addr, db_expr_t count, char *modif) { - boolean_t print = FALSE; + bool print = false; if (count == -1) count = 1; if (modif[0] == 'p') - print = TRUE; + print = true; db_run_mode = STEP_ONCE; db_loop_count = count; @@ -326,13 +322,13 @@ db_single_step_cmd(addr, have_addr, count, modif) /* trace and print until call/return */ /*ARGSUSED*/ void -db_trace_until_call_cmd(db_expr_t addr, boolean_t have_addr, db_expr_t count, +db_trace_until_call_cmd(db_expr_t addr, bool have_addr, db_expr_t count, char *modif) { - boolean_t print = FALSE; + bool print = false; if (modif[0] == 'p') - print = TRUE; + print = true; db_run_mode = STEP_CALLT; db_sstep_print = print; @@ -345,13 +341,13 @@ db_trace_until_call_cmd(db_expr_t addr, boolean_t have_addr, db_expr_t count, /*ARGSUSED*/ void -db_trace_until_matching_cmd(db_expr_t addr, boolean_t have_addr, - db_expr_t count, char *modif) +db_trace_until_matching_cmd(db_expr_t addr, bool have_addr, db_expr_t count, + char *modif) { - boolean_t print = FALSE; + bool print = false; if (modif[0] == 'p') - print = TRUE; + print = true; db_run_mode = STEP_RETURN; db_call_depth = 1; @@ -366,8 +362,7 @@ db_trace_until_matching_cmd(db_expr_t addr, boolean_t have_addr, /* continue */ /*ARGSUSED*/ void -db_continue_cmd(db_expr_t addr, boolean_t have_addr, db_expr_t count, - char *modif) +db_continue_cmd(db_expr_t addr, bool have_addr, db_expr_t count, char *modif) { if (modif[0] == 'c') db_run_mode = STEP_COUNT; diff --git a/sys/ddb/db_script.c b/sys/ddb/db_script.c index 34215f83b927..f84dfb936ea2 100644 --- a/sys/ddb/db_script.c +++ b/sys/ddb/db_script.c @@ -339,7 +339,7 @@ db_script_kdbenter(const char *eventname) * List scripts and their contents. */ void -db_scripts_cmd(db_expr_t addr, boolean_t have_addr, db_expr_t count, +db_scripts_cmd(db_expr_t addr, bool have_addr, db_expr_t count, char *modif) { int i; @@ -357,7 +357,7 @@ db_scripts_cmd(db_expr_t addr, boolean_t have_addr, db_expr_t count, * Execute a script. */ void -db_run_cmd(db_expr_t addr, boolean_t have_addr, db_expr_t count, char *modif) +db_run_cmd(db_expr_t addr, bool have_addr, db_expr_t count, char *modif) { int t; @@ -381,7 +381,7 @@ db_run_cmd(db_expr_t addr, boolean_t have_addr, db_expr_t count, char *modif) * we do not wish to use db_lex's token processing. */ void -db_script_cmd(db_expr_t addr, boolean_t have_addr, db_expr_t count, +db_script_cmd(db_expr_t addr, bool have_addr, db_expr_t count, char *modif) { char *buf, scriptname[DB_MAXSCRIPTNAME]; @@ -427,7 +427,7 @@ db_script_cmd(db_expr_t addr, boolean_t have_addr, db_expr_t count, * Remove a named script. */ void -db_unscript_cmd(db_expr_t addr, boolean_t have_addr, db_expr_t count, +db_unscript_cmd(db_expr_t addr, bool have_addr, db_expr_t count, char *modif) { int error, t; diff --git a/sys/ddb/db_sym.c b/sys/ddb/db_sym.c index ff6889edec9a..8386c64a8187 100644 --- a/sys/ddb/db_sym.c +++ b/sys/ddb/db_sym.c @@ -58,8 +58,8 @@ static db_symtab_t *db_last_symtab; /* where last symbol was found */ static c_db_sym_t db_lookup( const char *symstr); static char *db_qualify(c_db_sym_t sym, char *symtabname); -static boolean_t db_symbol_is_ambiguous(c_db_sym_t sym); -static boolean_t db_line_at_pc(c_db_sym_t, char **, int *, db_expr_t); +static bool db_symbol_is_ambiguous(c_db_sym_t sym); +static bool db_line_at_pc(c_db_sym_t, char **, int *, db_expr_t); static int db_cpu = -1; @@ -202,29 +202,29 @@ db_qualify(c_db_sym_t sym, char *symtabname) } -boolean_t +bool db_eqname(const char *src, const char *dst, int c) { if (!strcmp(src, dst)) - return (TRUE); + return (true); if (src[0] == c) return (!strcmp(src+1,dst)); - return (FALSE); + return (false); } -boolean_t +bool db_value_of_name(const char *name, db_expr_t *valuep) { c_db_sym_t sym; sym = db_lookup(name); if (sym == C_DB_SYM_NULL) - return (FALSE); + return (false); db_symbol_values(sym, &name, valuep); - return (TRUE); + return (true); } -boolean_t +bool db_value_of_name_pcpu(const char *name, db_expr_t *valuep) { static char tmp[256]; @@ -239,15 +239,15 @@ db_value_of_name_pcpu(const char *name, db_expr_t *valuep) snprintf(tmp, sizeof(tmp), "pcpu_entry_%s", name); sym = db_lookup(tmp); if (sym == C_DB_SYM_NULL) - return (FALSE); + return (false); db_symbol_values(sym, &name, &value); if (value < DPCPU_START || value >= DPCPU_STOP) - return (FALSE); + return (false); *valuep = (db_expr_t)((uintptr_t)value + dpcpu_off[cpu]); - return (TRUE); + return (true); } -boolean_t +bool db_value_of_name_vnet(const char *name, db_expr_t *valuep) { #ifdef VIMAGE @@ -263,14 +263,14 @@ db_value_of_name_vnet(const char *name, db_expr_t *valuep) snprintf(tmp, sizeof(tmp), "vnet_entry_%s", name); sym = db_lookup(tmp); if (sym == C_DB_SYM_NULL) - return (FALSE); + return (false); db_symbol_values(sym, &name, &value); if (value < VNET_START || value >= VNET_STOP) - return (FALSE); + return (false); *valuep = (db_expr_t)((uintptr_t)value + vnet->vnet_data_base); - return (TRUE); + return (true); #else - return (FALSE); + return (false); #endif } @@ -328,35 +328,34 @@ db_lookup(const char *symstr) } /* - * If TRUE, check across symbol tables for multiple occurrences + * If true, check across symbol tables for multiple occurrences * of a name. Might slow things down quite a bit. */ -static volatile boolean_t db_qualify_ambiguous_names = FALSE; +static volatile bool db_qualify_ambiguous_names = false; /* * Does this symbol name appear in more than one symbol table? * Used by db_symbol_values to decide whether to qualify a symbol. */ -static boolean_t +static bool db_symbol_is_ambiguous(c_db_sym_t sym) { const char *sym_name; register int i; - register - boolean_t found_once = FALSE; + register bool found_once = false; if (!db_qualify_ambiguous_names) - return FALSE; + return (false); db_symbol_values(sym, &sym_name, 0); for (i = 0; i < db_nsymtab; i++) { if (X_db_lookup(&db_symtabs[i], sym_name)) { if (found_once) - return TRUE; - found_once = TRUE; + return (true); + found_once = true; } } - return FALSE; + return (false); } /* @@ -460,14 +459,14 @@ db_printsym(db_expr_t off, db_strategy_t strategy) } } -static boolean_t +static bool db_line_at_pc(c_db_sym_t sym, char **filename, int *linenum, db_expr_t pc) { - return X_db_line_at_pc( db_last_symtab, sym, filename, linenum, pc); + return (X_db_line_at_pc(db_last_symtab, sym, filename, linenum, pc)); } -int +bool db_sym_numargs(c_db_sym_t sym, int *nargp, char **argnames) { - return X_db_sym_numargs(db_last_symtab, sym, nargp, argnames); + return (X_db_sym_numargs(db_last_symtab, sym, nargp, argnames)); } diff --git a/sys/ddb/db_sym.h b/sys/ddb/db_sym.h index 1d9d462d693f..51744c50f4e8 100644 --- a/sys/ddb/db_sym.h +++ b/sys/ddb/db_sym.h @@ -86,20 +86,20 @@ void db_symbol_values(c_db_sym_t, const char **, db_expr_t *); db_symbol_values(db_search_symbol(val,DB_STGY_XTRN,offp),namep,0) /* ditto, but no locals */ -int db_eqname(const char *, const char *, int); +bool db_eqname(const char *, const char *, int); /* strcmp, modulo leading char */ void db_printsym(db_expr_t, db_strategy_t); /* print closest symbol to a value */ -int db_sym_numargs(c_db_sym_t, int *, char **); +bool db_sym_numargs(c_db_sym_t, int *, char **); -boolean_t X_db_line_at_pc(db_symtab_t *symtab, c_db_sym_t cursym, +bool X_db_line_at_pc(db_symtab_t *symtab, c_db_sym_t cursym, char **filename, int *linenum, db_expr_t off); c_db_sym_t X_db_lookup(db_symtab_t *stab, const char *symstr); c_db_sym_t X_db_search_symbol(db_symtab_t *symtab, db_addr_t off, db_strategy_t strategy, db_expr_t *diffp); -int X_db_sym_numargs(db_symtab_t *, c_db_sym_t, int *, char **); +bool X_db_sym_numargs(db_symtab_t *, c_db_sym_t, int *, char **); void X_db_symbol_values(db_symtab_t *symtab, c_db_sym_t sym, const char **namep, db_expr_t *valuep); diff --git a/sys/ddb/db_textdump.c b/sys/ddb/db_textdump.c index b4b040b87509..a1a99f41f11f 100644 --- a/sys/ddb/db_textdump.c +++ b/sys/ddb/db_textdump.c @@ -516,8 +516,7 @@ db_textdump_usage(void) } void -db_textdump_cmd(db_expr_t addr, boolean_t have_addr, db_expr_t count, - char *modif) +db_textdump_cmd(db_expr_t addr, bool have_addr, db_expr_t count, char *modif) { int t; @@ -543,7 +542,7 @@ db_textdump_cmd(db_expr_t addr, boolean_t have_addr, db_expr_t count, db_printf("textdump unset\n"); } else if (strcmp(db_tok_string, "dump") == 0) { textdump_pending = 1; - doadump(TRUE); + doadump(true); } else { db_textdump_usage(); } diff --git a/sys/ddb/db_thread.c b/sys/ddb/db_thread.c index f6712a03405e..e85d0cd7ab42 100644 --- a/sys/ddb/db_thread.c +++ b/sys/ddb/db_thread.c @@ -50,7 +50,7 @@ db_print_thread(void) } void -db_set_thread(db_expr_t tid, boolean_t hastid, db_expr_t cnt, char *mod) +db_set_thread(db_expr_t tid, bool hastid, db_expr_t cnt, char *mod) { struct thread *thr; db_expr_t radix; @@ -86,7 +86,7 @@ db_set_thread(db_expr_t tid, boolean_t hastid, db_expr_t cnt, char *mod) } void -db_show_threads(db_expr_t addr, boolean_t hasaddr, db_expr_t cnt, char *mod) +db_show_threads(db_expr_t addr, bool hasaddr, db_expr_t cnt, char *mod) { jmp_buf jb; void *prev_jb; @@ -115,7 +115,7 @@ db_show_threads(db_expr_t addr, boolean_t hasaddr, db_expr_t cnt, char *mod) * process. Otherwise, we treat the addr as a pointer to a thread. */ struct thread * -db_lookup_thread(db_expr_t addr, boolean_t check_pid) +db_lookup_thread(db_expr_t addr, bool check_pid) { struct thread *td; db_expr_t decaddr; diff --git a/sys/ddb/db_variables.c b/sys/ddb/db_variables.c index 69c11aefa05a..bd62db52f3cf 100644 --- a/sys/ddb/db_variables.c +++ b/sys/ddb/db_variables.c @@ -128,7 +128,7 @@ db_write_variable(struct db_variable *vp, db_expr_t value) } void -db_set_cmd(db_expr_t dummy1, boolean_t dummy2, db_expr_t dummy3, char *dummy4) +db_set_cmd(db_expr_t dummy1, bool dummy2, db_expr_t dummy3, char *dummy4) { struct db_variable *vp; db_expr_t value; diff --git a/sys/ddb/db_watch.c b/sys/ddb/db_watch.c index 8debdb797be6..23612fe5eb58 100644 --- a/sys/ddb/db_watch.c +++ b/sys/ddb/db_watch.c @@ -47,7 +47,7 @@ __FBSDID("$FreeBSD$"); * Watchpoints. */ -static boolean_t db_watchpoints_inserted = TRUE; +static bool db_watchpoints_inserted = true; #define NWATCHPOINTS 100 static struct db_watchpoint db_watch_table[NWATCHPOINTS]; @@ -59,7 +59,7 @@ static db_watchpoint_t db_watchpoint_alloc(void); static void db_watchpoint_free(db_watchpoint_t watch); static void db_delete_watchpoint(vm_map_t map, db_addr_t addr); #ifdef notused -static boolean_t db_find_watchpoint(vm_map_t map, db_addr_t addr, +static bool db_find_watchpoint(vm_map_t map, db_addr_t addr, db_regs_t *regs); #endif static void db_list_watchpoints(void); @@ -69,7 +69,7 @@ static void db_set_watchpoint(vm_map_t map, db_addr_t addr, static db_watchpoint_t db_watchpoint_alloc(void) { - register db_watchpoint_t watch; + db_watchpoint_t watch; if ((watch = db_free_watchpoints) != 0) { db_free_watchpoints = watch->link; @@ -95,7 +95,7 @@ db_watchpoint_free(db_watchpoint_t watch) static void db_set_watchpoint(vm_map_t map, db_addr_t addr, vm_size_t size) { - register db_watchpoint_t watch; + db_watchpoint_t watch; if (map == NULL) { db_printf("No map.\n"); @@ -129,14 +129,14 @@ db_set_watchpoint(vm_map_t map, db_addr_t addr, vm_size_t size) watch->link = db_watchpoint_list; db_watchpoint_list = watch; - db_watchpoints_inserted = FALSE; + db_watchpoints_inserted = false; } static void db_delete_watchpoint(vm_map_t map, db_addr_t addr) { - register db_watchpoint_t watch; - register db_watchpoint_t *prev; + db_watchpoint_t watch; + db_watchpoint_t *prev; for (prev = &db_watchpoint_list; (watch = *prev) != 0; @@ -155,7 +155,7 @@ db_delete_watchpoint(vm_map_t map, db_addr_t addr) static void db_list_watchpoints(void) { - register db_watchpoint_t watch; + db_watchpoint_t watch; if (db_watchpoint_list == 0) { db_printf("No watchpoints set\n"); @@ -183,7 +183,7 @@ db_list_watchpoints(void) /* Delete watchpoint */ /*ARGSUSED*/ void -db_deletewatch_cmd(db_expr_t addr, boolean_t have_addr, db_expr_t count, +db_deletewatch_cmd(db_expr_t addr, bool have_addr, db_expr_t count, char *modif) { db_delete_watchpoint(db_map_addr(addr), addr); @@ -192,7 +192,7 @@ db_deletewatch_cmd(db_expr_t addr, boolean_t have_addr, db_expr_t count, /* Set watchpoint */ /*ARGSUSED*/ void -db_watchpoint_cmd(db_expr_t addr, boolean_t have_addr, db_expr_t count, +db_watchpoint_cmd(db_expr_t addr, bool have_addr, db_expr_t count, char *modif) { vm_size_t size; @@ -220,7 +220,7 @@ DB_SHOW_COMMAND(watches, db_listwatch_cmd) void db_set_watchpoints(void) { - register db_watchpoint_t watch; + db_watchpoint_t watch; if (!db_watchpoints_inserted) { for (watch = db_watchpoint_list; @@ -231,21 +231,21 @@ db_set_watchpoints(void) round_page(watch->hiaddr), VM_PROT_READ); - db_watchpoints_inserted = TRUE; + db_watchpoints_inserted = true; } } void db_clear_watchpoints(void) { - db_watchpoints_inserted = FALSE; + db_watchpoints_inserted = false; } #ifdef notused -static boolean_t +static bool db_find_watchpoint(vm_map_t map, db_addr_t addr, db_regs_t regs) { - register db_watchpoint_t watch; + db_watchpoint_t watch; db_watchpoint_t found = 0; for (watch = db_watchpoint_list; @@ -254,7 +254,7 @@ db_find_watchpoint(vm_map_t map, db_addr_t addr, db_regs_t regs) if (db_map_equal(watch->map, map)) { if ((watch->loaddr <= addr) && (addr < watch->hiaddr)) - return (TRUE); + return (true); else if ((trunc_page(watch->loaddr) <= addr) && (addr < round_page(watch->hiaddr))) found = watch; @@ -267,11 +267,11 @@ db_find_watchpoint(vm_map_t map, db_addr_t addr, db_regs_t regs) */ if (found) { - db_watchpoints_inserted = FALSE; + db_watchpoints_inserted = false; db_single_step(regs); } - return (FALSE); + return (false); } #endif @@ -280,7 +280,7 @@ db_find_watchpoint(vm_map_t map, db_addr_t addr, db_regs_t regs) /* Delete hardware watchpoint */ /*ARGSUSED*/ void -db_deletehwatch_cmd(db_expr_t addr, boolean_t have_addr, db_expr_t count, +db_deletehwatch_cmd(db_expr_t addr, bool have_addr, db_expr_t count, char *modif) { int rc; @@ -296,7 +296,7 @@ db_deletehwatch_cmd(db_expr_t addr, boolean_t have_addr, db_expr_t count, /* Set hardware watchpoint */ /*ARGSUSED*/ void -db_hwatchpoint_cmd(db_expr_t addr, boolean_t have_addr, db_expr_t count, +db_hwatchpoint_cmd(db_expr_t addr, bool have_addr, db_expr_t count, char *modif) { int rc; diff --git a/sys/ddb/db_write_cmd.c b/sys/ddb/db_write_cmd.c index 5cd5c9522948..2e0cf03c650a 100644 --- a/sys/ddb/db_write_cmd.c +++ b/sys/ddb/db_write_cmd.c @@ -43,16 +43,14 @@ __FBSDID("$FreeBSD$"); */ /*ARGSUSED*/ void -db_write_cmd(db_expr_t address, boolean_t have_addr, db_expr_t count, +db_write_cmd(db_expr_t address, bool have_addr, db_expr_t count, char * modif) { - register db_addr_t addr; - register db_expr_t old_value; db_expr_t new_value; - register int size; - boolean_t wrote_one = FALSE; + int size; + bool wrote_one = false; addr = (db_addr_t) address; @@ -73,13 +71,13 @@ db_write_cmd(db_expr_t address, boolean_t have_addr, db_expr_t count, } while (db_expression(&new_value)) { - old_value = db_get_value(addr, size, FALSE); + old_value = db_get_value(addr, size, false); db_printsym(addr, DB_STGY_ANY); db_printf("\t\t%#8lr\t=\t%#8lr\n", (long)old_value,(long)new_value); db_put_value(addr, size, new_value); addr += size; - wrote_one = TRUE; + wrote_one = true; } if (!wrote_one) diff --git a/sys/ddb/ddb.h b/sys/ddb/ddb.h index 5aa646b3302a..a2adcdfa33f6 100644 --- a/sys/ddb/ddb.h +++ b/sys/ddb/ddb.h @@ -101,7 +101,7 @@ extern struct command_table db_show_all_table; /* * Type signature for a function implementing a ddb command. */ -typedef void db_cmdfcn_t(db_expr_t addr, boolean_t have_addr, db_expr_t count, +typedef void db_cmdfcn_t(db_expr_t addr, bool have_addr, db_expr_t count, char *modif); /* @@ -156,7 +156,7 @@ SYSUNINIT(__CONCAT(_name,_suffix), SI_SUB_KLD, SI_ORDER_ANY, \ static db_cmdfcn_t _func; \ _DB_SET(_suffix, _name, _func, list, _flag, _more); \ static void \ -_func(db_expr_t addr, boolean_t have_addr, db_expr_t count, char *modif) +_func(db_expr_t addr, bool have_addr, db_expr_t count, char *modif) /* common idom provided for backwards compatibility */ #define DB_FUNC(_name, _func, list, _flag, _more) \ @@ -191,17 +191,17 @@ struct vm_map; void db_check_interrupt(void); void db_clear_watchpoints(void); -db_addr_t db_disasm(db_addr_t loc, boolean_t altfmt); +db_addr_t db_disasm(db_addr_t loc, bool altfmt); /* instruction disassembler */ void db_error(const char *s); int db_expression(db_expr_t *valuep); int db_get_variable(db_expr_t *valuep); void db_iprintf(const char *,...) __printflike(1, 2); struct proc *db_lookup_proc(db_expr_t addr); -struct thread *db_lookup_thread(db_expr_t addr, boolean_t check_pid); +struct thread *db_lookup_thread(db_expr_t addr, bool check_pid); struct vm_map *db_map_addr(vm_offset_t); -boolean_t db_map_current(struct vm_map *); -boolean_t db_map_equal(struct vm_map *, struct vm_map *); +bool db_map_current(struct vm_map *); +bool db_map_equal(struct vm_map *, struct vm_map *); int db_md_set_watchpoint(db_expr_t addr, db_expr_t size); int db_md_clr_watchpoint(db_expr_t addr, db_expr_t size); void db_md_list_watchpoints(void); @@ -211,17 +211,17 @@ int db_printf(const char *fmt, ...) __printflike(1, 2); int db_read_bytes(vm_offset_t addr, size_t size, char *data); /* machine-dependent */ int db_readline(char *lstart, int lsize); -void db_restart_at_pc(boolean_t watchpt); +void db_restart_at_pc(bool watchpt); int db_set_variable(db_expr_t value); void db_set_watchpoints(void); void db_skip_to_eol(void); -boolean_t db_stop_at_pc(boolean_t *is_breakpoint); +bool db_stop_at_pc(bool *is_breakpoint); #define db_strcpy strcpy void db_trace_self(void); int db_trace_thread(struct thread *, int); -int db_value_of_name(const char *name, db_expr_t *valuep); -int db_value_of_name_pcpu(const char *name, db_expr_t *valuep); -int db_value_of_name_vnet(const char *name, db_expr_t *valuep); +bool db_value_of_name(const char *name, db_expr_t *valuep); +bool db_value_of_name_pcpu(const char *name, db_expr_t *valuep); +bool db_value_of_name_vnet(const char *name, db_expr_t *valuep); int db_write_bytes(vm_offset_t addr, size_t size, char *data); void db_command_register(struct command_table *, struct command *); void db_command_unregister(struct command_table *, struct command *); diff --git a/sys/dev/acpi_support/acpi_ibm.c b/sys/dev/acpi_support/acpi_ibm.c index 52cee096b7ed..c2f90d1d4bce 100644 --- a/sys/dev/acpi_support/acpi_ibm.c +++ b/sys/dev/acpi_support/acpi_ibm.c @@ -445,7 +445,8 @@ acpi_ibm_attach(device_t dev) /* Hook up light to led(4) */ if (sc->light_set_supported) - sc->led_dev = led_create_state(ibm_led, sc, "thinklight", sc->light_val); + sc->led_dev = led_create_state(ibm_led, sc, "thinklight", + (sc->light_val ? 1 : 0)); return (0); } @@ -530,7 +531,7 @@ acpi_ibm_sysctl(SYSCTL_HANDLER_ARGS) int error = 0; int function; int method; - + ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); sc = (struct acpi_ibm_softc *)oidp->oid_arg1; @@ -823,7 +824,7 @@ acpi_ibm_sysctl_init(struct acpi_ibm_softc *sc, int method) return (FALSE); case ACPI_IBM_METHOD_FANSPEED: - /* + /* * Some models report the fan speed in levels from 0-7 * Newer models report it contiguously */ @@ -834,7 +835,7 @@ acpi_ibm_sysctl_init(struct acpi_ibm_softc *sc, int method) case ACPI_IBM_METHOD_FANLEVEL: case ACPI_IBM_METHOD_FANSTATUS: - /* + /* * Fan status is only supported on those models, * which report fan RPM contiguously, not in levels */ @@ -871,10 +872,10 @@ acpi_ibm_thermal_sysctl(SYSCTL_HANDLER_ARGS) for (int i = 0; i < 8; ++i) { temp_cmd[3] = '0' + i; - - /* + + /* * The TMPx methods seem to return +/- 128 or 0 - * when the respecting sensor is not available + * when the respecting sensor is not available */ if (ACPI_FAILURE(acpi_GetInteger(sc->ec_handle, temp_cmd, &temp[i])) || ABS(temp[i]) == 128 || temp[i] == 0) diff --git a/sys/dev/acpica/acpi.c b/sys/dev/acpica/acpi.c index 21761919365a..d5d15daa66ff 100644 --- a/sys/dev/acpica/acpi.c +++ b/sys/dev/acpica/acpi.c @@ -447,7 +447,7 @@ acpi_attach(device_t dev) sc = device_get_softc(dev); sc->acpi_dev = dev; - callout_init(&sc->susp_force_to, TRUE); + callout_init(&sc->susp_force_to, 1); error = ENXIO; diff --git a/sys/dev/acpica/acpi_cpu.c b/sys/dev/acpica/acpi_cpu.c index 8df27829d93e..21fccca29fd7 100644 --- a/sys/dev/acpica/acpi_cpu.c +++ b/sys/dev/acpica/acpi_cpu.c @@ -47,6 +47,8 @@ __FBSDID("$FreeBSD$"); #include #if defined(__amd64__) || defined(__i386__) #include +#include +#include #endif #include @@ -70,6 +72,10 @@ struct acpi_cx { uint32_t power; /* Power consumed (mW). */ int res_type; /* Resource type for p_lvlx. */ int res_rid; /* Resource ID for p_lvlx. */ + bool do_mwait; + uint32_t mwait_hint; + bool mwait_hw_coord; + bool mwait_bm_avoidance; }; #define MAX_CX_STATES 8 @@ -128,6 +134,12 @@ struct acpi_cpu_device { #define PIIX4_STOP_BREAK_MASK (PIIX4_BRLD_EN_IRQ0 | PIIX4_BRLD_EN_IRQ | PIIX4_BRLD_EN_IRQ8) #define PIIX4_PCNTRL_BST_EN (1<<10) +#define CST_FFH_VENDOR_INTEL 1 +#define CST_FFH_INTEL_CL_C1IO 1 +#define CST_FFH_INTEL_CL_MWAIT 2 +#define CST_FFH_MWAIT_HW_COORD 0x0001 +#define CST_FFH_MWAIT_BM_AVOID 0x0002 + /* Allow users to ignore processor orders in MADT. */ static int cpu_unordered; SYSCTL_INT(_debug_acpi, OID_AUTO, cpu_unordered, CTLFLAG_RDTUN, @@ -173,12 +185,16 @@ static void acpi_cpu_startup_cx(struct acpi_cpu_softc *sc); static void acpi_cpu_cx_list(struct acpi_cpu_softc *sc); static void acpi_cpu_idle(sbintime_t sbt); static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context); -static int acpi_cpu_quirks(void); +static void acpi_cpu_quirks(void); +static void acpi_cpu_quirks_piix4(void); static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS); static int acpi_cpu_usage_counters_sysctl(SYSCTL_HANDLER_ARGS); static int acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc); static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS); static int acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS); +#if defined(__i386__) || defined(__amd64__) +static int acpi_cpu_method_sysctl(SYSCTL_HANDLER_ARGS); +#endif static device_method_t acpi_cpu_methods[] = { /* Device interface */ @@ -348,7 +364,18 @@ acpi_cpu_attach(device_t dev) * so advertise this ourselves. Note this is not the same as independent * SMP control where each CPU can have different settings. */ - sc->cpu_features = ACPI_CAP_SMP_SAME | ACPI_CAP_SMP_SAME_C3; + sc->cpu_features = ACPI_CAP_SMP_SAME | ACPI_CAP_SMP_SAME_C3 | + ACPI_CAP_C1_IO_HALT; + +#if defined(__i386__) || defined(__amd64__) + /* + * Ask for MWAIT modes if not disabled and interrupts work + * reasonable with MWAIT. + */ + if (!acpi_disabled("mwait") && cpu_mwait_usable()) + sc->cpu_features |= ACPI_CAP_SMP_C1_NATIVE | ACPI_CAP_SMP_C3_NATIVE; +#endif + if (devclass_get_drivers(acpi_cpu_devclass, &drivers, &drv_count) == 0) { for (i = 0; i < drv_count; i++) { if (ACPI_GET_FEATURES(drivers[i], &features) == 0) @@ -720,6 +747,29 @@ acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc) } } +#if defined(__i386__) || defined(__amd64__) +static void +acpi_cpu_cx_cst_mwait(struct acpi_cx *cx_ptr, uint64_t address, int accsize) +{ + + cx_ptr->do_mwait = true; + cx_ptr->mwait_hint = address & 0xffffffff; + cx_ptr->mwait_hw_coord = (accsize & CST_FFH_MWAIT_HW_COORD) != 0; + cx_ptr->mwait_bm_avoidance = (accsize & CST_FFH_MWAIT_BM_AVOID) != 0; +} +#endif + +static void +acpi_cpu_cx_cst_free_plvlx(device_t cpu_dev, struct acpi_cx *cx_ptr) +{ + + if (cx_ptr->p_lvlx == NULL) + return; + bus_release_resource(cpu_dev, cx_ptr->res_type, cx_ptr->res_rid, + cx_ptr->p_lvlx); + cx_ptr->p_lvlx = NULL; +} + /* * Parse a _CST package and set up its Cx states. Since the _CST object * can change dynamically, our notify handler may call this function @@ -735,6 +785,10 @@ acpi_cpu_cx_cst(struct acpi_cpu_softc *sc) ACPI_OBJECT *pkg; uint32_t count; int i; +#if defined(__i386__) || defined(__amd64__) + uint64_t address; + int vendor, class, accsize; +#endif ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); @@ -790,6 +844,30 @@ acpi_cpu_cx_cst(struct acpi_cpu_softc *sc) /* Validate the state to see if we should use it. */ switch (cx_ptr->type) { case ACPI_STATE_C1: + acpi_cpu_cx_cst_free_plvlx(sc->cpu_dev, cx_ptr); +#if defined(__i386__) || defined(__amd64__) + if (acpi_PkgFFH_IntelCpu(pkg, 0, &vendor, &class, &address, + &accsize) == 0 && vendor == CST_FFH_VENDOR_INTEL) { + if (class == CST_FFH_INTEL_CL_C1IO) { + /* C1 I/O then Halt */ + cx_ptr->res_rid = sc->cpu_cx_count; + bus_set_resource(sc->cpu_dev, SYS_RES_IOPORT, + cx_ptr->res_rid, address, 1); + cx_ptr->p_lvlx = bus_alloc_resource_any(sc->cpu_dev, + SYS_RES_IOPORT, &cx_ptr->res_rid, RF_ACTIVE | + RF_SHAREABLE); + if (cx_ptr->p_lvlx == NULL) { + bus_delete_resource(sc->cpu_dev, SYS_RES_IOPORT, + cx_ptr->res_rid); + device_printf(sc->cpu_dev, + "C1 I/O failed to allocate port %d, " + "degrading to C1 Halt", (int)address); + } + } else if (class == CST_FFH_INTEL_CL_MWAIT) { + acpi_cpu_cx_cst_mwait(cx_ptr, address, accsize); + } + } +#endif if (sc->cpu_cx_states[0].type == ACPI_STATE_C0) { /* This is the first C1 state. Use the reserved slot. */ sc->cpu_cx_states[0] = *cx_ptr; @@ -818,23 +896,34 @@ acpi_cpu_cx_cst(struct acpi_cpu_softc *sc) } /* Free up any previous register. */ - if (cx_ptr->p_lvlx != NULL) { - bus_release_resource(sc->cpu_dev, cx_ptr->res_type, cx_ptr->res_rid, - cx_ptr->p_lvlx); - cx_ptr->p_lvlx = NULL; - } + acpi_cpu_cx_cst_free_plvlx(sc->cpu_dev, cx_ptr); /* Allocate the control register for C2 or C3. */ - cx_ptr->res_rid = sc->cpu_cx_count; - acpi_PkgGas(sc->cpu_dev, pkg, 0, &cx_ptr->res_type, &cx_ptr->res_rid, - &cx_ptr->p_lvlx, RF_SHAREABLE); - if (cx_ptr->p_lvlx) { +#if defined(__i386__) || defined(__amd64__) + if (acpi_PkgFFH_IntelCpu(pkg, 0, &vendor, &class, &address, + &accsize) == 0 && vendor == CST_FFH_VENDOR_INTEL && + class == CST_FFH_INTEL_CL_MWAIT) { + /* Native C State Instruction use (mwait) */ + acpi_cpu_cx_cst_mwait(cx_ptr, address, accsize); ACPI_DEBUG_PRINT((ACPI_DB_INFO, - "acpi_cpu%d: Got C%d - %d latency\n", - device_get_unit(sc->cpu_dev), cx_ptr->type, - cx_ptr->trans_lat)); + "acpi_cpu%d: Got C%d/mwait - %d latency\n", + device_get_unit(sc->cpu_dev), cx_ptr->type, cx_ptr->trans_lat)); cx_ptr++; sc->cpu_cx_count++; + } else +#endif + { + cx_ptr->res_rid = sc->cpu_cx_count; + acpi_PkgGas(sc->cpu_dev, pkg, 0, &cx_ptr->res_type, + &cx_ptr->res_rid, &cx_ptr->p_lvlx, RF_SHAREABLE); + if (cx_ptr->p_lvlx) { + ACPI_DEBUG_PRINT((ACPI_DB_INFO, + "acpi_cpu%d: Got C%d - %d latency\n", + device_get_unit(sc->cpu_dev), cx_ptr->type, + cx_ptr->trans_lat)); + cx_ptr++; + sc->cpu_cx_count++; + } } } AcpiOsFree(buf.Pointer); @@ -956,6 +1045,13 @@ acpi_cpu_startup_cx(struct acpi_cpu_softc *sc) OID_AUTO, "cx_usage_counters", CTLTYPE_STRING | CTLFLAG_RD, (void *)sc, 0, acpi_cpu_usage_counters_sysctl, "A", "Cx sleep state counters"); +#if defined(__i386__) || defined(__amd64__) + SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx, + SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)), + OID_AUTO, "cx_method", CTLTYPE_STRING | CTLFLAG_RD, + (void *)sc, 0, acpi_cpu_method_sysctl, "A", + "Cx entrance methods"); +#endif /* Signal platform that we can handle _CST notification. */ if (!cpu_cx_generic && cpu_cst_cnt != 0) { @@ -1043,7 +1139,14 @@ acpi_cpu_idle(sbintime_t sbt) */ if (cx_next->type == ACPI_STATE_C1) { cputicks = cpu_ticks(); - acpi_cpu_c1(); + if (cx_next->p_lvlx != NULL) { + /* C1 I/O then Halt */ + CPU_GET_REG(cx_next->p_lvlx, 1); + } + if (cx_next->do_mwait) + acpi_cpu_idle_mwait(cx_next->mwait_hint); + else + acpi_cpu_c1(); end_time = ((cpu_ticks() - cputicks) << 20) / cpu_tickrate(); if (curthread->td_critnest == 0) end_time = min(end_time, 500000 / hz); @@ -1055,7 +1158,7 @@ acpi_cpu_idle(sbintime_t sbt) * For C3, disable bus master arbitration and enable bus master wake * if BM control is available, otherwise flush the CPU cache. */ - if (cx_next->type == ACPI_STATE_C3) { + if (cx_next->type == ACPI_STATE_C3 || cx_next->mwait_bm_avoidance) { if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 1); AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 1); @@ -1076,7 +1179,10 @@ acpi_cpu_idle(sbintime_t sbt) start_time = 0; cputicks = cpu_ticks(); } - CPU_GET_REG(cx_next->p_lvlx, 1); + if (cx_next->do_mwait) + acpi_cpu_idle_mwait(cx_next->mwait_hint); + else + CPU_GET_REG(cx_next->p_lvlx, 1); /* * Read the end time twice. Since it may take an arbitrary time @@ -1092,8 +1198,8 @@ acpi_cpu_idle(sbintime_t sbt) end_time = ((cpu_ticks() - cputicks) << 20) / cpu_tickrate(); /* Enable bus master arbitration and disable bus master wakeup. */ - if (cx_next->type == ACPI_STATE_C3 && - (cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { + if ((cx_next->type == ACPI_STATE_C3 || cx_next->mwait_bm_avoidance) && + (cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 0); AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 0); } @@ -1134,12 +1240,9 @@ acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context) acpi_UserNotify("PROCESSOR", sc->cpu_handle, notify); } -static int +static void acpi_cpu_quirks(void) { - device_t acpi_dev; - uint32_t val; - ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); /* @@ -1173,6 +1276,16 @@ acpi_cpu_quirks(void) } /* Look for various quirks of the PIIX4 part. */ + acpi_cpu_quirks_piix4(); +} + +static void +acpi_cpu_quirks_piix4(void) +{ +#ifdef __i386__ + device_t acpi_dev; + uint32_t val; + acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3); if (acpi_dev != NULL) { switch (pci_get_revid(acpi_dev)) { @@ -1221,8 +1334,7 @@ acpi_cpu_quirks(void) break; } } - - return (0); +#endif } static int @@ -1286,6 +1398,44 @@ acpi_cpu_usage_counters_sysctl(SYSCTL_HANDLER_ARGS) return (0); } +#if defined(__i386__) || defined(__amd64__) +static int +acpi_cpu_method_sysctl(SYSCTL_HANDLER_ARGS) +{ + struct acpi_cpu_softc *sc; + struct acpi_cx *cx; + struct sbuf sb; + char buf[128]; + int i; + + sc = (struct acpi_cpu_softc *)arg1; + sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN); + for (i = 0; i < sc->cpu_cx_count; i++) { + cx = &sc->cpu_cx_states[i]; + sbuf_printf(&sb, "C%d/", i + 1); + if (cx->do_mwait) { + sbuf_cat(&sb, "mwait"); + if (cx->mwait_hw_coord) + sbuf_cat(&sb, "/hwc"); + if (cx->mwait_bm_avoidance) + sbuf_cat(&sb, "/bma"); + } else if (cx->type == ACPI_STATE_C1) { + sbuf_cat(&sb, "hlt"); + } else { + sbuf_cat(&sb, "io"); + } + if (cx->type == ACPI_STATE_C1 && cx->p_lvlx != NULL) + sbuf_cat(&sb, "/iohlt"); + sbuf_putc(&sb, ' '); + } + sbuf_trim(&sb); + sbuf_finish(&sb); + sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req); + sbuf_delete(&sb); + return (0); +} +#endif + static int acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc) { diff --git a/sys/dev/acpica/acpi_package.c b/sys/dev/acpica/acpi_package.c index e38fea55521c..c1070cb38deb 100644 --- a/sys/dev/acpica/acpi_package.c +++ b/sys/dev/acpica/acpi_package.c @@ -120,6 +120,28 @@ acpi_PkgGas(device_t dev, ACPI_OBJECT *res, int idx, int *type, int *rid, return (acpi_bus_alloc_gas(dev, type, rid, &gas, dst, flags)); } +int +acpi_PkgFFH_IntelCpu(ACPI_OBJECT *res, int idx, int *vendor, int *class, + uint64_t *address, int *accsize) +{ + ACPI_GENERIC_ADDRESS gas; + ACPI_OBJECT *obj; + + obj = &res->Package.Elements[idx]; + if (obj == NULL || obj->Type != ACPI_TYPE_BUFFER || + obj->Buffer.Length < sizeof(ACPI_GENERIC_ADDRESS) + 3) + return (EINVAL); + + memcpy(&gas, obj->Buffer.Pointer + 3, sizeof(gas)); + if (gas.SpaceId != ACPI_ADR_SPACE_FIXED_HARDWARE) + return (ERESTART); + *vendor = gas.BitWidth; + *class = gas.BitOffset; + *address = gas.Address; + *accsize = gas.AccessWidth; + return (0); +} + ACPI_HANDLE acpi_GetReference(ACPI_HANDLE scope, ACPI_OBJECT *obj) { diff --git a/sys/dev/acpica/acpi_throttle.c b/sys/dev/acpica/acpi_throttle.c index ca142156ff71..883b5d34de09 100644 --- a/sys/dev/acpica/acpi_throttle.c +++ b/sys/dev/acpica/acpi_throttle.c @@ -96,7 +96,7 @@ static void acpi_throttle_identify(driver_t *driver, device_t parent); static int acpi_throttle_probe(device_t dev); static int acpi_throttle_attach(device_t dev); static int acpi_throttle_evaluate(struct acpi_throttle_softc *sc); -static int acpi_throttle_quirks(struct acpi_throttle_softc *sc); +static void acpi_throttle_quirks(struct acpi_throttle_softc *sc); static int acpi_thr_settings(device_t dev, struct cf_setting *sets, int *count); static int acpi_thr_set(device_t dev, const struct cf_setting *set); @@ -314,9 +314,10 @@ acpi_throttle_evaluate(struct acpi_throttle_softc *sc) return (0); } -static int +static void acpi_throttle_quirks(struct acpi_throttle_softc *sc) { +#ifdef __i386__ device_t acpi_dev; /* Look for various quirks of the PIIX4 part. */ @@ -339,8 +340,7 @@ acpi_throttle_quirks(struct acpi_throttle_softc *sc) break; } } - - return (0); +#endif } static int diff --git a/sys/dev/acpica/acpivar.h b/sys/dev/acpica/acpivar.h index 2e2b96d7dcf4..cbd4bd97b9d8 100644 --- a/sys/dev/acpica/acpivar.h +++ b/sys/dev/acpica/acpivar.h @@ -467,6 +467,8 @@ int acpi_PkgInt32(ACPI_OBJECT *res, int idx, uint32_t *dst); int acpi_PkgStr(ACPI_OBJECT *res, int idx, void *dst, size_t size); int acpi_PkgGas(device_t dev, ACPI_OBJECT *res, int idx, int *type, int *rid, struct resource **dst, u_int flags); +int acpi_PkgFFH_IntelCpu(ACPI_OBJECT *res, int idx, int *vendor, + int *class, uint64_t *address, int *accsize); ACPI_HANDLE acpi_GetReference(ACPI_HANDLE scope, ACPI_OBJECT *obj); /* diff --git a/sys/dev/altera/jtag_uart/altera_jtag_uart_tty.c b/sys/dev/altera/jtag_uart/altera_jtag_uart_tty.c index dd46ea04038c..1e9a1b89657d 100644 --- a/sys/dev/altera/jtag_uart/altera_jtag_uart_tty.c +++ b/sys/dev/altera/jtag_uart/altera_jtag_uart_tty.c @@ -454,11 +454,11 @@ altera_jtag_uart_attach(struct altera_jtag_uart_softc *sc) aju_intr_readable_enable(sc); AJU_UNLOCK(sc); } else { - callout_init(&sc->ajus_io_callout, CALLOUT_MPSAFE); + callout_init(&sc->ajus_io_callout, 1); callout_reset(&sc->ajus_io_callout, AJU_IO_POLLINTERVAL, aju_io_callout, sc); } - callout_init(&sc->ajus_ac_callout, CALLOUT_MPSAFE); + callout_init(&sc->ajus_ac_callout, 1); callout_reset(&sc->ajus_ac_callout, AJU_AC_POLLINTERVAL, aju_ac_callout, sc); return (0); diff --git a/sys/dev/ath/if_ath.c b/sys/dev/ath/if_ath.c index 4b7f8bcd7957..03c793e0a2f5 100644 --- a/sys/dev/ath/if_ath.c +++ b/sys/dev/ath/if_ath.c @@ -166,9 +166,9 @@ static void ath_bmiss_proc(void *, int); static void ath_key_update_begin(struct ieee80211vap *); static void ath_key_update_end(struct ieee80211vap *); static void ath_update_mcast_hw(struct ath_softc *); -static void ath_update_mcast(struct ifnet *); -static void ath_update_promisc(struct ifnet *); -static void ath_updateslot(struct ifnet *); +static void ath_update_mcast(struct ieee80211com *); +static void ath_update_promisc(struct ieee80211com *); +static void ath_updateslot(struct ieee80211com *); static void ath_bstuck_proc(void *, int); static void ath_reset_proc(void *, int); static int ath_desc_alloc(struct ath_softc *); @@ -592,6 +592,8 @@ ath_attach(u_int16_t devid, struct ath_softc *sc) goto bad; } ic = ifp->if_l2com; + ic->ic_softc = sc; + ic->ic_name = device_get_nameunit(sc->sc_dev); /* set these up early for if_printf use */ if_initname(ifp, device_get_name(sc->sc_dev), @@ -847,7 +849,7 @@ ath_attach(u_int16_t devid, struct ath_softc *sc) sc->sc_ledstate = 1; sc->sc_ledon = 0; /* low true */ sc->sc_ledidle = (2700*hz)/1000; /* 2.7sec */ - callout_init(&sc->sc_ledtimer, CALLOUT_MPSAFE); + callout_init(&sc->sc_ledtimer, 1); /* * Don't setup hardware-based blinking. @@ -3545,9 +3547,9 @@ ath_key_update_end(struct ieee80211vap *vap) } static void -ath_update_promisc(struct ifnet *ifp) +ath_update_promisc(struct ieee80211com *ic) { - struct ath_softc *sc = ifp->if_softc; + struct ath_softc *sc = ic->ic_softc; u_int32_t rfilt; /* configure rx filter */ @@ -3609,9 +3611,9 @@ ath_update_mcast_hw(struct ath_softc *sc) * awake before operating. */ static void -ath_update_mcast(struct ifnet *ifp) +ath_update_mcast(struct ieee80211com *ic) { - struct ath_softc *sc = ifp->if_softc; + struct ath_softc *sc = ic->ic_softc; ATH_LOCK(sc); ath_power_set_power_state(sc, HAL_PM_AWAKE); @@ -3695,10 +3697,9 @@ ath_setslottime(struct ath_softc *sc) * slot time based on the current setting. */ static void -ath_updateslot(struct ifnet *ifp) +ath_updateslot(struct ieee80211com *ic) { - struct ath_softc *sc = ifp->if_softc; - struct ieee80211com *ic = ifp->if_l2com; + struct ath_softc *sc = ic->ic_softc; /* * When not coordinating the BSS, change the hardware diff --git a/sys/dev/ath/if_ath_rx.c b/sys/dev/ath/if_ath_rx.c index bed94887c988..07a4abee3458 100644 --- a/sys/dev/ath/if_ath_rx.c +++ b/sys/dev/ath/if_ath_rx.c @@ -327,7 +327,7 @@ ath_legacy_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf) */ void ath_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m, - int subtype, int rssi, int nf) + int subtype, const struct ieee80211_rx_stats *rxs, int rssi, int nf) { struct ieee80211vap *vap = ni->ni_vap; struct ath_softc *sc = vap->iv_ic->ic_ifp->if_softc; @@ -353,7 +353,7 @@ ath_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m, * Call up first so subsequent work can use information * potentially stored in the node (e.g. for ibss merge). */ - ATH_VAP(vap)->av_recv_mgmt(ni, m, subtype, rssi, nf); + ATH_VAP(vap)->av_recv_mgmt(ni, m, subtype, rxs, rssi, nf); switch (subtype) { case IEEE80211_FC0_SUBTYPE_BEACON: /* update rssi statistics for use by the hal */ diff --git a/sys/dev/ath/if_ath_rx.h b/sys/dev/ath/if_ath_rx.h index f831148bfd25..62be699f752b 100644 --- a/sys/dev/ath/if_ath_rx.h +++ b/sys/dev/ath/if_ath_rx.h @@ -33,7 +33,8 @@ extern u_int32_t ath_calcrxfilter(struct ath_softc *sc); extern void ath_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m, - int subtype, int rssi, int nf); + int subtype, const struct ieee80211_rx_stats *rxs, + int rssi, int nf); #define ath_stoprecv(_sc, _dodelay) \ (_sc)->sc_rx.recv_stop((_sc), (_dodelay)) diff --git a/sys/dev/ath/if_athvar.h b/sys/dev/ath/if_athvar.h index e888ca2ee9ed..5c5e6cd3d287 100644 --- a/sys/dev/ath/if_athvar.h +++ b/sys/dev/ath/if_athvar.h @@ -481,7 +481,8 @@ struct ath_vap { struct ath_txq av_mcastq; /* buffered mcast s/w queue */ void (*av_recv_mgmt)(struct ieee80211_node *, - struct mbuf *, int, int, int); + struct mbuf *, int, + const struct ieee80211_rx_stats *, int, int); int (*av_newstate)(struct ieee80211vap *, enum ieee80211_state, int); void (*av_bmiss)(struct ieee80211vap *); diff --git a/sys/dev/atkbdc/psm.c b/sys/dev/atkbdc/psm.c index 6c7f47aeffab..7f3f97d8e295 100644 --- a/sys/dev/atkbdc/psm.c +++ b/sys/dev/atkbdc/psm.c @@ -483,6 +483,8 @@ static probefunc_t enable_versapad; static void set_trackpoint_parameters(struct psm_softc *sc); static void synaptics_passthrough_on(struct psm_softc *sc); static void synaptics_passthrough_off(struct psm_softc *sc); +static int synaptics_preferred_mode(struct psm_softc *sc); +static void synaptics_set_mode(struct psm_softc *sc, int mode_byte); static struct { int model; @@ -933,14 +935,8 @@ doopen(struct psm_softc *sc, int command_byte) get_mouse_status(sc->kbdc, stat, 0, 3); if ((SYNAPTICS_VERSION_GE(sc->synhw, 7, 5) || stat[1] == 0x47) && - stat[2] == 0x40) { - /* Set the mode byte -- request wmode where - * available */ - if (sc->synhw.capExtended) - mouse_ext_command(sc->kbdc, 0xc1); - else - mouse_ext_command(sc->kbdc, 0xc0); - set_mouse_sampling_rate(sc->kbdc, 20); + stat[2] == 0x40) { + synaptics_set_mode(sc, synaptics_preferred_mode(sc)); VLOG(5, (LOG_DEBUG, "psm%d: Synaptis Absolute Mode " "hopefully restored\n", sc->unit)); @@ -2176,6 +2172,20 @@ psmioctl(struct cdev *dev, u_long cmd, caddr_t addr, int flag, (*(int *)addr > PSM_LEVEL_MAX)) return (EINVAL); sc->mode.level = *(int *)addr; + + if (sc->hw.model == MOUSE_MODEL_SYNAPTICS) { + /* + * If we are entering PSM_LEVEL_NATIVE, we want to + * enable sending of "extended W mode" packets to + * userland. Reset the mode of the touchpad so that the + * change in the level is picked up. + */ + error = block_mouse_data(sc, &command_byte); + if (error) + return (error); + synaptics_set_mode(sc, synaptics_preferred_mode(sc)); + unblock_mouse_data(sc, command_byte); + } break; case MOUSE_GETSTATUS: @@ -2865,7 +2875,8 @@ proc_synaptics(struct psm_softc *sc, packetbuf_t *pb, mousestatus_t *ms, /* Palm detection. */ if (!( - (sc->synhw.capMultiFinger && (w == 0 || w == 1)) || + ((sc->synhw.capMultiFinger || + sc->synhw.capAdvancedGestures) && (w == 0 || w == 1)) || (sc->synhw.capPalmDetect && w >= 4 && w <= max_width) || (!sc->synhw.capPalmDetect && *z <= max_pressure) || (sc->synhw.capPen && w == 2))) { @@ -4192,7 +4203,8 @@ synaptics_sysctl_create_tree(struct psm_softc *sc) * physical area reserved for scrolling or when * there's no multi finger support. */ - if (sc->synhw.verticalScroll || sc->synhw.capMultiFinger == 0) + if (sc->synhw.verticalScroll || (sc->synhw.capMultiFinger == 0 && + sc->synhw.capAdvancedGestures == 0)) sc->syninfo.two_finger_scroll = 0; else sc->syninfo.two_finger_scroll = 1; @@ -4493,6 +4505,43 @@ synaptics_sysctl_create_tree(struct psm_softc *sc) "Turn off touchpad"); } +static int +synaptics_preferred_mode(struct psm_softc *sc) { + int mode_byte; + + mode_byte = 0xc0; + + /* request wmode where available */ + if (sc->synhw.capExtended) + mode_byte |= 1; + + /* + * Disable gesture processing when native packets are requested. This + * enables sending of encapsulated "extended W mode" packets. + */ + if (sc->mode.level == PSM_LEVEL_NATIVE) + mode_byte |= (1 << 2); + + return mode_byte; +} + +static void +synaptics_set_mode(struct psm_softc *sc, int mode_byte) { + mouse_ext_command(sc->kbdc, mode_byte); + + /* "Commit" the Set Mode Byte command sent above. */ + set_mouse_sampling_rate(sc->kbdc, 20); + + /* + * Enable advanced gestures mode if supported and we are not entering + * passthrough mode. + */ + if (sc->synhw.capAdvancedGestures && !(mode_byte & (1 << 5))) { + mouse_ext_command(sc->kbdc, 3); + set_mouse_sampling_rate(sc->kbdc, 0xc8); + } +} + static int enable_synaptics(KBDC kbdc, struct psm_softc *sc) { @@ -4576,7 +4625,7 @@ enable_synaptics(KBDC kbdc, struct psm_softc *sc) buttons = 0; synhw.capExtended = (status[0] & 0x80) != 0; if (synhw.capExtended) { - synhw.nExtendedQueries = (status[0] & 0x70) != 0; + synhw.nExtendedQueries = (status[0] & 0x70) >> 4; synhw.capMiddle = (status[0] & 0x04) != 0; synhw.capPassthrough = (status[2] & 0x80) != 0; synhw.capLowPower = (status[2] & 0x40) != 0; @@ -4588,6 +4637,16 @@ enable_synaptics(KBDC kbdc, struct psm_softc *sc) synhw.capMultiFinger = (status[2] & 0x02) != 0; synhw.capPalmDetect = (status[2] & 0x01) != 0; + if (!set_mouse_scaling(kbdc, 1)) + return (FALSE); + if (mouse_ext_command(kbdc, 0x08) == 0) + return (FALSE); + if (get_mouse_status(kbdc, status, 0, 3) != 3) + return (FALSE); + + synhw.infoXupmm = status[0]; + synhw.infoYupmm = status[2]; + if (verbose >= 2) { printf(" Extended capabilities:\n"); printf(" capExtended: %d\n", synhw.capExtended); @@ -4603,6 +4662,8 @@ enable_synaptics(KBDC kbdc, struct psm_softc *sc) printf(" capBallistics: %d\n", synhw.capBallistics); printf(" capMultiFinger: %d\n", synhw.capMultiFinger); printf(" capPalmDetect: %d\n", synhw.capPalmDetect); + printf(" infoXupmm: %d\n", synhw.infoXupmm); + printf(" infoYupmm: %d\n", synhw.infoYupmm); } /* @@ -4610,7 +4671,9 @@ enable_synaptics(KBDC kbdc, struct psm_softc *sc) * supports this number of extended queries. We can load * more information about buttons using query 0x09. */ - if (synhw.capExtended && synhw.nExtendedQueries) { + if (synhw.nExtendedQueries >= 1) { + if (!set_mouse_scaling(kbdc, 1)) + return (FALSE); if (mouse_ext_command(kbdc, 0x09) == 0) return (FALSE); if (get_mouse_status(kbdc, status, 0, 3) != 3) @@ -4619,6 +4682,7 @@ enable_synaptics(KBDC kbdc, struct psm_softc *sc) synhw.horizontalScroll = (status[0] & 0x02) != 0; synhw.verticalWheel = (status[0] & 0x08) != 0; synhw.nExtendedButtons = (status[1] & 0xf0) >> 4; + synhw.capEWmode = (status[0] & 0x04) != 0; if (verbose >= 2) { printf(" Extended model ID:\n"); printf(" verticalScroll: %d\n", @@ -4629,6 +4693,8 @@ enable_synaptics(KBDC kbdc, struct psm_softc *sc) synhw.verticalWheel); printf(" nExtendedButtons: %d\n", synhw.nExtendedButtons); + printf(" capEWmode: %d\n", + synhw.capEWmode); } /* * Add the number of extended buttons to the total @@ -4642,7 +4708,97 @@ enable_synaptics(KBDC kbdc, struct psm_softc *sc) * add a fourth button to the total button count. */ buttons = synhw.capFourButtons ? 1 : 0; + + /* Read the continued capabilities bits. */ + if (synhw.nExtendedQueries >= 4) { + if (!set_mouse_scaling(kbdc, 1)) + return (FALSE); + if (mouse_ext_command(kbdc, 0x0c) == 0) + return (FALSE); + if (get_mouse_status(kbdc, status, 0, 3) != 3) + return (FALSE); + + synhw.capClickPad = (status[1] & 0x01) << 1; + synhw.capClickPad |= (status[0] & 0x10) != 0; + synhw.capDeluxeLEDs = (status[1] & 0x02) != 0; + synhw.noAbsoluteFilter = (status[1] & 0x04) != 0; + synhw.capReportsV = (status[1] & 0x08) != 0; + synhw.capUniformClickPad = (status[1] & 0x10) != 0; + synhw.capReportsMin = (status[1] & 0x20) != 0; + synhw.capInterTouch = (status[1] & 0x40) != 0; + synhw.capReportsMax = (status[0] & 0x02) != 0; + synhw.capClearPad = (status[0] & 0x04) != 0; + synhw.capAdvancedGestures = (status[0] & 0x08) != 0; + synhw.capCoveredPad = (status[0] & 0x80) != 0; + + if (synhw.capReportsMax) { + if (!set_mouse_scaling(kbdc, 1)) + return (FALSE); + if (mouse_ext_command(kbdc, 0x0d) == 0) + return (FALSE); + if (get_mouse_status(kbdc, status, 0, 3) != 3) + return (FALSE); + + synhw.maximumXCoord = (status[0] << 5) | + ((status[1] & 0x0f) << 1); + synhw.maximumYCoord = (status[2] << 5) | + ((status[1] & 0xf0) >> 3); + } + if (synhw.capReportsMin) { + if (!set_mouse_scaling(kbdc, 1)) + return (FALSE); + if (mouse_ext_command(kbdc, 0x0f) == 0) + return (FALSE); + if (get_mouse_status(kbdc, status, 0, 3) != 3) + return (FALSE); + + synhw.minimumXCoord = (status[0] << 5) | + ((status[1] & 0x0f) << 1); + synhw.minimumYCoord = (status[2] << 5) | + ((status[1] & 0xf0) >> 3); + } + + if (verbose >= 2) { + printf(" Continued capabilities:\n"); + printf(" capClickPad: %d\n", + synhw.capClickPad); + printf(" capDeluxeLEDs: %d\n", + synhw.capDeluxeLEDs); + printf(" noAbsoluteFilter: %d\n", + synhw.noAbsoluteFilter); + printf(" capReportsV: %d\n", + synhw.capReportsV); + printf(" capUniformClickPad: %d\n", + synhw.capUniformClickPad); + printf(" capReportsMin: %d\n", + synhw.capReportsMin); + printf(" capInterTouch: %d\n", + synhw.capInterTouch); + printf(" capReportsMax: %d\n", + synhw.capReportsMax); + printf(" capClearPad: %d\n", + synhw.capClearPad); + printf(" capAdvancedGestures: %d\n", + synhw.capAdvancedGestures); + printf(" capCoveredPad: %d\n", + synhw.capCoveredPad); + if (synhw.capReportsMax) { + printf(" maximumXCoord: %d\n", + synhw.maximumXCoord); + printf(" maximumYCoord: %d\n", + synhw.maximumYCoord); + } + if (synhw.capReportsMin) { + printf(" minimumXCoord: %d\n", + synhw.minimumXCoord); + printf(" minimumYCoord: %d\n", + synhw.minimumYCoord); + } + } + buttons += synhw.capClickPad; + } } + if (verbose >= 2) { if (synhw.capExtended) printf(" Additional Buttons: %d\n", buttons); @@ -4650,42 +4806,6 @@ enable_synaptics(KBDC kbdc, struct psm_softc *sc) printf(" No extended capabilities\n"); } - /* Read the continued capabilities bits. */ - if (mouse_ext_command(kbdc, 0xc) != 0 && - get_mouse_status(kbdc, status, 0, 3) == 3) { - synhw.capClickPad = (status[1] & 0x01) << 1; - synhw.capClickPad |= (status[0] & 0x10) != 0; - synhw.capDeluxeLEDs = (status[1] & 0x02) != 0; - synhw.noAbsoluteFilter = (status[1] & 0x04) != 0; - synhw.capReportsV = (status[1] & 0x08) != 0; - synhw.capUniformClickPad = (status[1] & 0x10) != 0; - synhw.capReportsMin = (status[1] & 0x20) != 0; - synhw.capInterTouch = (status[1] & 0x40) != 0; - synhw.capReportsMax = (status[2] & 0x02) != 0; - synhw.capClearPad = (status[2] & 0x04) != 0; - synhw.capAdvancedGestures = (status[2] & 0x08) != 0; - synhw.capCoveredPad = (status[2] & 0x80) != 0; - - if (verbose >= 2) { - printf(" Continued capabilities:\n"); - printf(" capClickPad: %d\n", synhw.capClickPad); - printf(" capDeluxeLEDs: %d\n", synhw.capDeluxeLEDs); - printf(" noAbsoluteFilter: %d\n", - synhw.noAbsoluteFilter); - printf(" capReportsV: %d\n", synhw.capReportsV); - printf(" capUniformClickPad: %d\n", - synhw.capUniformClickPad); - printf(" capReportsMin: %d\n", synhw.capReportsMin); - printf(" capInterTouch: %d\n", synhw.capInterTouch); - printf(" capReportsMax: %d\n", synhw.capReportsMax); - printf(" capClearPad: %d\n", synhw.capClearPad); - printf(" capAdvancedGestures: %d\n", - synhw.capAdvancedGestures); - printf(" capCoveredPad: %d\n", synhw.capCoveredPad); - } - buttons += synhw.capClickPad; - } - /* * Add the default number of 3 buttons to the total * count of supported buttons reported above. @@ -4713,15 +4833,10 @@ enable_synaptics(KBDC kbdc, struct psm_softc *sc) if (!synaptics_support) return (FALSE); - /* Set the mode byte; request wmode where available. */ - mouse_ext_command(kbdc, synhw.capExtended ? 0xc1 : 0xc0); - - /* "Commit" the Set Mode Byte command sent above. */ - set_mouse_sampling_rate(kbdc, 20); - VLOG(3, (LOG_DEBUG, "synaptics: END init (%d buttons)\n", buttons)); if (sc != NULL) { + synaptics_set_mode(sc, synaptics_preferred_mode(sc)); if (trackpoint_support && synhw.capPassthrough) { synaptics_passthrough_on(sc); enable_trackpoint(kbdc, sc); @@ -4738,30 +4853,17 @@ enable_synaptics(KBDC kbdc, struct psm_softc *sc) static void synaptics_passthrough_on(struct psm_softc *sc) { - int mode_byte; - - mode_byte = 0xc1 | (1 << 5); - VLOG(2, (LOG_NOTICE, "psm: setting pass-through mode. %d\n", - mode_byte)); - mouse_ext_command(sc->kbdc, mode_byte); - - /* "Commit" the Set Mode Byte command sent above. */ - set_mouse_sampling_rate(sc->kbdc, 20); + VLOG(2, (LOG_NOTICE, "psm: setting pass-through mode.\n")); + synaptics_set_mode(sc, synaptics_preferred_mode(sc) | (1 << 5)); } static void synaptics_passthrough_off(struct psm_softc *sc) { - int mode_byte; - - mode_byte = 0xc1; VLOG(2, (LOG_NOTICE, "psm: turning pass-through mode off.\n")); set_mouse_scaling(sc->kbdc, 2); set_mouse_scaling(sc->kbdc, 1); - mouse_ext_command(sc->kbdc, mode_byte); - - /* "Commit" the Set Mode Byte command sent above. */ - set_mouse_sampling_rate(sc->kbdc, 20); + synaptics_set_mode(sc, synaptics_preferred_mode(sc)); } /* IBM/Lenovo TrackPoint */ diff --git a/sys/dev/bwi/bwimac.c b/sys/dev/bwi/bwimac.c index 849bf022f1d4..f39ef44d4174 100644 --- a/sys/dev/bwi/bwimac.c +++ b/sys/dev/bwi/bwimac.c @@ -101,7 +101,6 @@ static void bwi_mac_opmode_init(struct bwi_mac *); static void bwi_mac_hostflags_init(struct bwi_mac *); static void bwi_mac_bss_param_init(struct bwi_mac *); -static int bwi_mac_fw_alloc(struct bwi_mac *); static void bwi_mac_fw_free(struct bwi_mac *); static int bwi_mac_fw_load(struct bwi_mac *); static int bwi_mac_fw_init(struct bwi_mac *); @@ -325,10 +324,6 @@ bwi_mac_init(struct bwi_mac *mac) /* * Load and initialize firmwares */ - error = bwi_mac_fw_alloc(mac); - if (error) - return error; - error = bwi_mac_fw_load(mac); if (error) return error; @@ -879,11 +874,10 @@ bwi_fwimage_is_valid(struct bwi_softc *sc, const struct firmware *fw, /* * XXX Error cleanup */ -static int +int bwi_mac_fw_alloc(struct bwi_mac *mac) { struct bwi_softc *sc = mac->mac_sc; - struct ifnet *ifp = sc->sc_ifp; char fwname[64]; int idx; @@ -895,10 +889,8 @@ bwi_mac_fw_alloc(struct bwi_mac *mac) snprintf(fwname, sizeof(fwname), BWI_FW_STUB_PATH, sc->sc_fw_version); mac->mac_stub = firmware_get(fwname); - if (mac->mac_stub == NULL) { - if_printf(ifp, "request firmware %s failed\n", fwname); - return ENOMEM; - } + if (mac->mac_stub == NULL) + goto no_firmware; } if (mac->mac_ucode == NULL) { @@ -907,11 +899,8 @@ bwi_mac_fw_alloc(struct bwi_mac *mac) mac->mac_rev >= 5 ? 5 : mac->mac_rev); mac->mac_ucode = firmware_get(fwname); - if (mac->mac_ucode == NULL) { - if_printf(ifp, "request firmware %s failed\n", fwname); - return ENOMEM; - } - + if (mac->mac_ucode == NULL) + goto no_firmware; if (!bwi_fwimage_is_valid(sc, mac->mac_ucode, BWI_FW_T_UCODE)) return EINVAL; } @@ -922,11 +911,8 @@ bwi_mac_fw_alloc(struct bwi_mac *mac) mac->mac_rev < 5 ? 4 : 5); mac->mac_pcm = firmware_get(fwname); - if (mac->mac_pcm == NULL) { - if_printf(ifp, "request firmware %s failed\n", fwname); - return ENOMEM; - } - + if (mac->mac_pcm == NULL) + goto no_firmware; if (!bwi_fwimage_is_valid(sc, mac->mac_pcm, BWI_FW_T_PCM)) return EINVAL; } @@ -938,8 +924,8 @@ bwi_mac_fw_alloc(struct bwi_mac *mac) } else if (mac->mac_rev >= 5 && mac->mac_rev <= 10) { idx = 5; } else { - if_printf(ifp, "no suitible IV for MAC rev %d\n", - mac->mac_rev); + device_printf(sc->sc_dev, + "no suitible IV for MAC rev %d\n", mac->mac_rev); return ENODEV; } @@ -947,10 +933,8 @@ bwi_mac_fw_alloc(struct bwi_mac *mac) sc->sc_fw_version, idx); mac->mac_iv = firmware_get(fwname); - if (mac->mac_iv == NULL) { - if_printf(ifp, "request firmware %s failed\n", fwname); - return ENOMEM; - } + if (mac->mac_iv == NULL) + goto no_firmware; if (!bwi_fwimage_is_valid(sc, mac->mac_iv, BWI_FW_T_IV)) return EINVAL; } @@ -960,12 +944,12 @@ bwi_mac_fw_alloc(struct bwi_mac *mac) if (mac->mac_rev == 2 || mac->mac_rev == 4 || mac->mac_rev >= 11) { /* No extended IV */ - goto back; + return (0); } else if (mac->mac_rev >= 5 && mac->mac_rev <= 10) { idx = 5; } else { - if_printf(ifp, "no suitible ExtIV for MAC rev %d\n", - mac->mac_rev); + device_printf(sc->sc_dev, + "no suitible ExtIV for MAC rev %d\n", mac->mac_rev); return ENODEV; } @@ -973,15 +957,16 @@ bwi_mac_fw_alloc(struct bwi_mac *mac) sc->sc_fw_version, idx); mac->mac_iv_ext = firmware_get(fwname); - if (mac->mac_iv_ext == NULL) { - if_printf(ifp, "request firmware %s failed\n", fwname); - return ENOMEM; - } + if (mac->mac_iv_ext == NULL) + goto no_firmware; if (!bwi_fwimage_is_valid(sc, mac->mac_iv_ext, BWI_FW_T_IV)) return EINVAL; } -back: - return 0; + return (0); + +no_firmware: + device_printf(sc->sc_dev, "request firmware %s failed\n", fwname); + return (ENOENT); } static void diff --git a/sys/dev/bwi/bwimac.h b/sys/dev/bwi/bwimac.h index 2c5275edfab7..a6d90083c60b 100644 --- a/sys/dev/bwi/bwimac.h +++ b/sys/dev/bwi/bwimac.h @@ -57,6 +57,7 @@ void bwi_mac_init_tpctl_11bg(struct bwi_mac *); void bwi_mac_dummy_xmit(struct bwi_mac *); void bwi_mac_reset_hwkeys(struct bwi_mac *); int bwi_mac_config_ps(struct bwi_mac *); +int bwi_mac_fw_alloc(struct bwi_mac *); uint16_t bwi_memobj_read_2(struct bwi_mac *, uint16_t, uint16_t); uint32_t bwi_memobj_read_4(struct bwi_mac *, uint16_t, uint16_t); diff --git a/sys/dev/bwi/if_bwi.c b/sys/dev/bwi/if_bwi.c index aa5369a1ca73..ad41bc675447 100644 --- a/sys/dev/bwi/if_bwi.c +++ b/sys/dev/bwi/if_bwi.c @@ -113,7 +113,7 @@ static void bwi_scan_start(struct ieee80211com *); static void bwi_set_channel(struct ieee80211com *); static void bwi_scan_end(struct ieee80211com *); static int bwi_newstate(struct ieee80211vap *, enum ieee80211_state, int); -static void bwi_updateslot(struct ifnet *); +static void bwi_updateslot(struct ieee80211com *); static int bwi_media_change(struct ifnet *); static void bwi_calibrate(void *); @@ -446,6 +446,10 @@ bwi_attach(struct bwi_softc *sc) if (error) goto fail; + error = bwi_mac_fw_alloc(mac); + if (error) + goto fail; + ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); if (ifp == NULL) { device_printf(dev, "can not if_alloc()\n"); @@ -507,6 +511,8 @@ bwi_attach(struct bwi_softc *sc) ieee80211_init_channels(ic, NULL, &bands); ic->ic_ifp = ifp; + ic->ic_softc = sc; + ic->ic_name = device_get_nameunit(dev); ic->ic_caps = IEEE80211_C_STA | IEEE80211_C_SHSLOT | IEEE80211_C_SHPREAMBLE | @@ -1919,7 +1925,7 @@ bwi_dma_alloc(struct bwi_softc *sc) BUS_SPACE_MAXSIZE, /* maxsize */ BUS_SPACE_UNRESTRICTED, /* nsegments */ BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ - BUS_DMA_ALLOCNOW, /* flags */ + 0, /* flags */ NULL, NULL, /* lockfunc, lockarg */ &sc->sc_parent_dtag); if (error) { @@ -1939,8 +1945,8 @@ bwi_dma_alloc(struct bwi_softc *sc) NULL, NULL, tx_ring_sz, 1, - BUS_SPACE_MAXSIZE_32BIT, - BUS_DMA_ALLOCNOW, + tx_ring_sz, + 0, NULL, NULL, &sc->sc_txring_dtag); if (error) { @@ -1969,8 +1975,8 @@ bwi_dma_alloc(struct bwi_softc *sc) NULL, NULL, rx_ring_sz, 1, - BUS_SPACE_MAXSIZE_32BIT, - BUS_DMA_ALLOCNOW, + rx_ring_sz, + 0, NULL, NULL, &sc->sc_rxring_dtag); if (error) { @@ -2094,8 +2100,8 @@ bwi_dma_txstats_alloc(struct bwi_softc *sc, uint32_t ctrl_base, NULL, NULL, dma_size, 1, - BUS_SPACE_MAXSIZE_32BIT, - BUS_DMA_ALLOCNOW, + dma_size, + 0, NULL, NULL, &st->stats_ring_dtag); if (error) { @@ -2142,8 +2148,8 @@ bwi_dma_txstats_alloc(struct bwi_softc *sc, uint32_t ctrl_base, NULL, NULL, dma_size, 1, - BUS_SPACE_MAXSIZE_32BIT, - BUS_DMA_ALLOCNOW, + dma_size, + 0, NULL, NULL, &st->stats_dtag); if (error) { @@ -2225,7 +2231,7 @@ bwi_dma_mbuf_create(struct bwi_softc *sc) NULL, NULL, MCLBYTES, 1, - BUS_SPACE_MAXSIZE_32BIT, + MCLBYTES, BUS_DMA_ALLOCNOW, NULL, NULL, &sc->sc_buf_dtag); @@ -3733,14 +3739,13 @@ bwi_set_bssid(struct bwi_softc *sc, const uint8_t *bssid) } static void -bwi_updateslot(struct ifnet *ifp) +bwi_updateslot(struct ieee80211com *ic) { - struct bwi_softc *sc = ifp->if_softc; - struct ieee80211com *ic = ifp->if_l2com; + struct bwi_softc *sc = ic->ic_softc; struct bwi_mac *mac; BWI_LOCK(sc); - if (ifp->if_drv_flags & IFF_DRV_RUNNING) { + if (ic->ic_ifp->if_drv_flags & IFF_DRV_RUNNING) { DPRINTF(sc, BWI_DBG_80211, "%s\n", __func__); KASSERT(sc->sc_cur_regwin->rw_type == BWI_REGWIN_T_MAC, diff --git a/sys/dev/bwi/if_bwi_pci.c b/sys/dev/bwi/if_bwi_pci.c index 1977b93a4acc..c2badc504a9b 100644 --- a/sys/dev/bwi/if_bwi_pci.c +++ b/sys/dev/bwi/if_bwi_pci.c @@ -161,12 +161,6 @@ bwi_pci_attach(device_t dev) device_printf(dev, "could not map interrupt\n"); goto bad1; } - if (bus_setup_intr(dev, sc->sc_irq_res, - INTR_TYPE_NET | INTR_MPSAFE, - NULL, bwi_intr, sc, &sc->sc_irq_handle)) { - device_printf(dev, "could not establish interrupt\n"); - goto bad2; - } /* Get more PCI information */ sc->sc_pci_did = pci_get_device(dev); @@ -174,11 +168,17 @@ bwi_pci_attach(device_t dev) sc->sc_pci_subvid = pci_get_subvendor(dev); sc->sc_pci_subdid = pci_get_subdevice(dev); - error = bwi_attach(sc); - if (error == 0) /* success */ - return 0; + if ((error = bwi_attach(sc)) != 0) + goto bad2; + + if (bus_setup_intr(dev, sc->sc_irq_res, + INTR_TYPE_NET | INTR_MPSAFE, + NULL, bwi_intr, sc, &sc->sc_irq_handle)) { + device_printf(dev, "could not establish interrupt\n"); + goto bad2; + } + return (0); - bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_irq_handle); bad2: bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res); bad1: diff --git a/sys/dev/bwn/if_bwn.c b/sys/dev/bwn/if_bwn.c index 959d1f131423..823908ad3278 100644 --- a/sys/dev/bwn/if_bwn.c +++ b/sys/dev/bwn/if_bwn.c @@ -181,8 +181,8 @@ static void bwn_addchannels(struct ieee80211_channel [], int, int *, const struct bwn_channelinfo *, int); static int bwn_raw_xmit(struct ieee80211_node *, struct mbuf *, const struct ieee80211_bpf_params *); -static void bwn_updateslot(struct ifnet *); -static void bwn_update_promisc(struct ifnet *); +static void bwn_updateslot(struct ieee80211com *); +static void bwn_update_promisc(struct ieee80211com *); static void bwn_wme_init(struct bwn_mac *); static int bwn_wme_update(struct ieee80211com *); static void bwn_wme_clear(struct bwn_softc *); @@ -1058,6 +1058,8 @@ bwn_attach_post(struct bwn_softc *sc) ic = ifp->if_l2com; ic->ic_ifp = ifp; + ic->ic_softc = sc; + ic->ic_name = device_get_nameunit(sc->sc_dev); /* XXX not right but it's not used anywhere important */ ic->ic_phytype = IEEE80211_T_OFDM; ic->ic_opmode = IEEE80211_M_STA; @@ -1250,7 +1252,7 @@ bwn_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) case SIOCSIFFLAGS: startall = 0; if (IS_RUNNING(ifp)) { - bwn_update_promisc(ifp); + bwn_update_promisc(ic); } else if (ifp->if_flags & IFF_UP) { if ((sc->sc_flags & BWN_FLAG_INVALID) == 0) { bwn_init(sc); @@ -2770,14 +2772,13 @@ bwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, * like slot time and preamble. */ static void -bwn_updateslot(struct ifnet *ifp) +bwn_updateslot(struct ieee80211com *ic) { - struct bwn_softc *sc = ifp->if_softc; - struct ieee80211com *ic = ifp->if_l2com; + struct bwn_softc *sc = ic->ic_softc; struct bwn_mac *mac; BWN_LOCK(sc); - if (ifp->if_drv_flags & IFF_DRV_RUNNING) { + if (ic->ic_ifp->if_drv_flags & IFF_DRV_RUNNING) { mac = (struct bwn_mac *)sc->sc_curmac; bwn_set_slot_time(mac, (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20); @@ -2793,15 +2794,15 @@ bwn_updateslot(struct ifnet *ifp) * mode when operating in hostap mode to do ACS). */ static void -bwn_update_promisc(struct ifnet *ifp) +bwn_update_promisc(struct ieee80211com *ic) { - struct bwn_softc *sc = ifp->if_softc; + struct bwn_softc *sc = ic->ic_softc; struct bwn_mac *mac = sc->sc_curmac; BWN_LOCK(sc); mac = sc->sc_curmac; if (mac != NULL && mac->mac_status >= BWN_MAC_STATUS_INITED) { - if (ifp->if_flags & IFF_PROMISC) + if (ic->ic_ifp->if_flags & IFF_PROMISC) sc->sc_filters |= BWN_MACCTL_PROMISC; else sc->sc_filters &= ~BWN_MACCTL_PROMISC; diff --git a/sys/dev/bxe/bxe.c b/sys/dev/bxe/bxe.c index a35d4c316a69..00e367aaab54 100644 --- a/sys/dev/bxe/bxe.c +++ b/sys/dev/bxe/bxe.c @@ -27,7 +27,7 @@ #include __FBSDID("$FreeBSD$"); -#define BXE_DRIVER_VERSION "1.78.78" +#define BXE_DRIVER_VERSION "1.78.79" #include "bxe.h" #include "ecore_sp.h" @@ -472,6 +472,8 @@ static const struct { 4, STATS_FLAGS_FUNC, "rx_pkts"}, { STATS_OFFSET32(rx_tpa_pkts), 4, STATS_FLAGS_FUNC, "rx_tpa_pkts"}, + { STATS_OFFSET32(rx_jumbo_sge_pkts), + 4, STATS_FLAGS_FUNC, "rx_jumbo_sge_pkts"}, { STATS_OFFSET32(rx_soft_errors), 4, STATS_FLAGS_FUNC, "rx_soft_errors"}, { STATS_OFFSET32(rx_hw_csum_errors), @@ -583,6 +585,8 @@ static const struct { 4, "rx_pkts"}, { Q_STATS_OFFSET32(rx_tpa_pkts), 4, "rx_tpa_pkts"}, + { Q_STATS_OFFSET32(rx_jumbo_sge_pkts), + 4, "rx_jumbo_sge_pkts"}, { Q_STATS_OFFSET32(rx_soft_errors), 4, "rx_soft_errors"}, { Q_STATS_OFFSET32(rx_hw_csum_errors), @@ -3100,7 +3104,7 @@ static inline void bxe_update_sge_prod(struct bxe_softc *sc, struct bxe_fastpath *fp, uint16_t sge_len, - struct eth_end_agg_rx_cqe *cqe) + union eth_sgl_or_raw_data *cqe) { uint16_t last_max, last_elem, first_elem; uint16_t delta = 0; @@ -3113,17 +3117,17 @@ bxe_update_sge_prod(struct bxe_softc *sc, /* first mark all used pages */ for (i = 0; i < sge_len; i++) { BIT_VEC64_CLEAR_BIT(fp->sge_mask, - RX_SGE(le16toh(cqe->sgl_or_raw_data.sgl[i]))); + RX_SGE(le16toh(cqe->sgl[i]))); } BLOGD(sc, DBG_LRO, "fp[%02d] fp_cqe->sgl[%d] = %d\n", fp->index, sge_len - 1, - le16toh(cqe->sgl_or_raw_data.sgl[sge_len - 1])); + le16toh(cqe->sgl[sge_len - 1])); /* assume that the last SGE index is the biggest */ bxe_update_last_max_sge(fp, - le16toh(cqe->sgl_or_raw_data.sgl[sge_len - 1])); + le16toh(cqe->sgl[sge_len - 1])); last_max = RX_SGE(fp->last_max_sge); last_elem = last_max >> BIT_VEC64_ELEM_SHIFT; @@ -3238,6 +3242,53 @@ bxe_tpa_stop(struct bxe_softc *sc, fp->rx_tpa_queue_used &= ~(1 << queue); } +static uint8_t +bxe_service_rxsgl( + struct bxe_fastpath *fp, + uint16_t len, + uint16_t lenonbd, + struct mbuf *m, + struct eth_fast_path_rx_cqe *cqe_fp) +{ + struct mbuf *m_frag; + uint16_t frags, frag_len; + uint16_t sge_idx = 0; + uint16_t j; + uint8_t i, rc = 0; + uint32_t frag_size; + + /* adjust the mbuf */ + m->m_len = lenonbd; + + frag_size = len - lenonbd; + frags = SGE_PAGE_ALIGN(frag_size) >> SGE_PAGE_SHIFT; + + for (i = 0, j = 0; i < frags; i += PAGES_PER_SGE, j++) { + sge_idx = RX_SGE(le16toh(cqe_fp->sgl_or_raw_data.sgl[j])); + + m_frag = fp->rx_sge_mbuf_chain[sge_idx].m; + frag_len = min(frag_size, (uint32_t)(SGE_PAGE_SIZE)); + m_frag->m_len = frag_len; + + /* allocate a new mbuf for the SGE */ + rc = bxe_alloc_rx_sge_mbuf(fp, sge_idx); + if (rc) { + /* Leave all remaining SGEs in the ring! */ + return (rc); + } + fp->eth_q_stats.mbuf_alloc_sge--; + + /* concatenate the fragment to the head mbuf */ + m_cat(m, m_frag); + + frag_size -= frag_len; + } + + bxe_update_sge_prod(fp->sc, fp, frags, &cqe_fp->sgl_or_raw_data); + + return rc; +} + static uint8_t bxe_rxeof(struct bxe_softc *sc, struct bxe_fastpath *fp) @@ -3278,7 +3329,7 @@ bxe_rxeof(struct bxe_softc *sc, struct eth_fast_path_rx_cqe *cqe_fp; uint8_t cqe_fp_flags; enum eth_rx_cqe_type cqe_fp_type; - uint16_t len, pad; + uint16_t len, lenonbd, pad; struct mbuf *m = NULL; comp_ring_cons = RCQ(sw_cq_cons); @@ -3293,7 +3344,7 @@ bxe_rxeof(struct bxe_softc *sc, BLOGD(sc, DBG_RX, "fp[%02d] Rx hw_cq_cons=%d hw_sw_cons=%d " "BD prod=%d cons=%d CQE type=0x%x err=0x%x " - "status=0x%x rss_hash=0x%x vlan=0x%x len=%u\n", + "status=0x%x rss_hash=0x%x vlan=0x%x len=%u lenonbd=%u\n", fp->index, hw_cq_cons, sw_cq_cons, @@ -3304,7 +3355,8 @@ bxe_rxeof(struct bxe_softc *sc, cqe_fp->status_flags, le32toh(cqe_fp->rss_hash_result), le16toh(cqe_fp->vlan_tag), - le16toh(cqe_fp->pkt_len_or_gro_seg_len)); + le16toh(cqe_fp->pkt_len_or_gro_seg_len), + le16toh(cqe_fp->len_on_bd)); /* is this a slowpath msg? */ if (__predict_false(CQE_TYPE_SLOW(cqe_fp_type))) { @@ -3351,7 +3403,7 @@ bxe_rxeof(struct bxe_softc *sc, bxe_tpa_stop(sc, fp, tpa_info, queue, pages, &cqe->end_agg_cqe, comp_ring_cons); - bxe_update_sge_prod(sc, fp, pages, &cqe->end_agg_cqe); + bxe_update_sge_prod(sc, fp, pages, &cqe->end_agg_cqe.sgl_or_raw_data); goto next_cqe; } @@ -3367,6 +3419,7 @@ bxe_rxeof(struct bxe_softc *sc, } len = le16toh(cqe_fp->pkt_len_or_gro_seg_len); + lenonbd = le16toh(cqe_fp->len_on_bd); pad = cqe_fp->placement_offset; m = rx_buf->m; @@ -3413,6 +3466,13 @@ bxe_rxeof(struct bxe_softc *sc, m_adj(m, pad); m->m_pkthdr.len = m->m_len = len; + if (len != lenonbd){ + rc = bxe_service_rxsgl(fp, len, lenonbd, m, cqe_fp); + if (rc) + break; + fp->eth_q_stats.rx_jumbo_sge_pkts++; + } + /* assign packet to this interface interface */ if_setrcvif(m, ifp); @@ -6210,30 +6270,27 @@ static void bxe_set_fp_rx_buf_size(struct bxe_softc *sc) { int i; + uint32_t rx_buf_size; - BLOGD(sc, DBG_LOAD, "mtu = %d\n", sc->mtu); + rx_buf_size = (IP_HEADER_ALIGNMENT_PADDING + ETH_OVERHEAD + sc->mtu); for (i = 0; i < sc->num_queues; i++) { - /* get the Rx buffer size for RX frames */ - sc->fp[i].rx_buf_size = - (IP_HEADER_ALIGNMENT_PADDING + - ETH_OVERHEAD + - sc->mtu); - - BLOGD(sc, DBG_LOAD, "rx_buf_size for fp[%02d] = %d\n", - i, sc->fp[i].rx_buf_size); - - /* get the mbuf allocation size for RX frames */ - if (sc->fp[i].rx_buf_size <= MCLBYTES) { + if(rx_buf_size <= MCLBYTES){ + sc->fp[i].rx_buf_size = rx_buf_size; + sc->fp[i].mbuf_alloc_size = MCLBYTES; + }else if (rx_buf_size <= MJUMPAGESIZE){ + sc->fp[i].rx_buf_size = rx_buf_size; + sc->fp[i].mbuf_alloc_size = MJUMPAGESIZE; + }else if (rx_buf_size <= (MJUMPAGESIZE + MCLBYTES)){ + sc->fp[i].rx_buf_size = MCLBYTES; + sc->fp[i].mbuf_alloc_size = MCLBYTES; + }else if (rx_buf_size <= (2 * MJUMPAGESIZE)){ + sc->fp[i].rx_buf_size = MJUMPAGESIZE; + sc->fp[i].mbuf_alloc_size = MJUMPAGESIZE; + }else { + sc->fp[i].rx_buf_size = MCLBYTES; sc->fp[i].mbuf_alloc_size = MCLBYTES; - } else if (sc->fp[i].rx_buf_size <= BCM_PAGE_SIZE) { - sc->fp[i].mbuf_alloc_size = PAGE_SIZE; - } else { - sc->fp[i].mbuf_alloc_size = MJUM9BYTES; } - - BLOGD(sc, DBG_LOAD, "mbuf_alloc_size for fp[%02d] = %d\n", - i, sc->fp[i].mbuf_alloc_size); } } @@ -6792,42 +6849,40 @@ bxe_alloc_fp_buffers(struct bxe_softc *sc) fp->rx_cq_prod = cqe_ring_prod; fp->eth_q_stats.rx_calls = fp->eth_q_stats.rx_pkts = 0; - if (if_getcapenable(sc->ifp) & IFCAP_LRO) { - max_agg_queues = MAX_AGG_QS(sc); + max_agg_queues = MAX_AGG_QS(sc); - fp->tpa_enable = TRUE; + fp->tpa_enable = TRUE; - /* fill the TPA pool */ - for (j = 0; j < max_agg_queues; j++) { - rc = bxe_alloc_rx_tpa_mbuf(fp, j); - if (rc != 0) { - BLOGE(sc, "mbuf alloc fail for fp[%02d] TPA queue %d\n", + /* fill the TPA pool */ + for (j = 0; j < max_agg_queues; j++) { + rc = bxe_alloc_rx_tpa_mbuf(fp, j); + if (rc != 0) { + BLOGE(sc, "mbuf alloc fail for fp[%02d] TPA queue %d\n", i, j); + fp->tpa_enable = FALSE; + goto bxe_alloc_fp_buffers_error; + } + + fp->rx_tpa_info[j].state = BXE_TPA_STATE_STOP; + } + + if (fp->tpa_enable) { + /* fill the RX SGE chain */ + ring_prod = 0; + for (j = 0; j < RX_SGE_USABLE; j++) { + rc = bxe_alloc_rx_sge_mbuf(fp, ring_prod); + if (rc != 0) { + BLOGE(sc, "mbuf alloc fail for fp[%02d] SGE %d\n", + i, ring_prod); fp->tpa_enable = FALSE; + ring_prod = 0; goto bxe_alloc_fp_buffers_error; } - fp->rx_tpa_info[j].state = BXE_TPA_STATE_STOP; + ring_prod = RX_SGE_NEXT(ring_prod); } - if (fp->tpa_enable) { - /* fill the RX SGE chain */ - ring_prod = 0; - for (j = 0; j < RX_SGE_USABLE; j++) { - rc = bxe_alloc_rx_sge_mbuf(fp, ring_prod); - if (rc != 0) { - BLOGE(sc, "mbuf alloc fail for fp[%02d] SGE %d\n", - i, ring_prod); - fp->tpa_enable = FALSE; - ring_prod = 0; - goto bxe_alloc_fp_buffers_error; - } - - ring_prod = RX_SGE_NEXT(ring_prod); - } - - fp->rx_sge_prod = ring_prod; - } + fp->rx_sge_prod = ring_prod; } } @@ -11711,29 +11766,27 @@ bxe_pf_rx_q_prep(struct bxe_softc *sc, uint16_t sge_sz = 0; uint16_t tpa_agg_size = 0; - if (if_getcapenable(sc->ifp) & IFCAP_LRO) { - pause->sge_th_lo = SGE_TH_LO(sc); - pause->sge_th_hi = SGE_TH_HI(sc); + pause->sge_th_lo = SGE_TH_LO(sc); + pause->sge_th_hi = SGE_TH_HI(sc); - /* validate SGE ring has enough to cross high threshold */ - if (sc->dropless_fc && + /* validate SGE ring has enough to cross high threshold */ + if (sc->dropless_fc && (pause->sge_th_hi + FW_PREFETCH_CNT) > (RX_SGE_USABLE_PER_PAGE * RX_SGE_NUM_PAGES)) { - BLOGW(sc, "sge ring threshold limit\n"); - } - - /* minimum max_aggregation_size is 2*MTU (two full buffers) */ - tpa_agg_size = (2 * sc->mtu); - if (tpa_agg_size < sc->max_aggregation_size) { - tpa_agg_size = sc->max_aggregation_size; - } - - max_sge = SGE_PAGE_ALIGN(sc->mtu) >> SGE_PAGE_SHIFT; - max_sge = ((max_sge + PAGES_PER_SGE - 1) & - (~(PAGES_PER_SGE - 1))) >> PAGES_PER_SGE_SHIFT; - sge_sz = (uint16_t)min(SGE_PAGES, 0xffff); + BLOGW(sc, "sge ring threshold limit\n"); } + /* minimum max_aggregation_size is 2*MTU (two full buffers) */ + tpa_agg_size = (2 * sc->mtu); + if (tpa_agg_size < sc->max_aggregation_size) { + tpa_agg_size = sc->max_aggregation_size; + } + + max_sge = SGE_PAGE_ALIGN(sc->mtu) >> SGE_PAGE_SHIFT; + max_sge = ((max_sge + PAGES_PER_SGE - 1) & + (~(PAGES_PER_SGE - 1))) >> PAGES_PER_SGE_SHIFT; + sge_sz = (uint16_t)min(SGE_PAGES, 0xffff); + /* pause - not for e1 */ if (!CHIP_IS_E1(sc)) { pause->bd_th_lo = BD_TH_LO(sc); diff --git a/sys/dev/bxe/bxe_stats.c b/sys/dev/bxe/bxe_stats.c index 3d33fb7d8d76..b2cc676c78a6 100644 --- a/sys/dev/bxe/bxe_stats.c +++ b/sys/dev/bxe/bxe_stats.c @@ -1227,6 +1227,7 @@ bxe_drv_stats_update(struct bxe_softc *sc) UPDATE_ESTAT_QSTAT(rx_calls); UPDATE_ESTAT_QSTAT(rx_pkts); UPDATE_ESTAT_QSTAT(rx_tpa_pkts); + UPDATE_ESTAT_QSTAT(rx_jumbo_sge_pkts); UPDATE_ESTAT_QSTAT(rx_soft_errors); UPDATE_ESTAT_QSTAT(rx_hw_csum_errors); UPDATE_ESTAT_QSTAT(rx_ofld_frames_csum_ip); diff --git a/sys/dev/bxe/bxe_stats.h b/sys/dev/bxe/bxe_stats.h index ed37f55c452d..badb4b705911 100644 --- a/sys/dev/bxe/bxe_stats.h +++ b/sys/dev/bxe/bxe_stats.h @@ -218,6 +218,7 @@ struct bxe_eth_stats { uint32_t rx_calls; uint32_t rx_pkts; uint32_t rx_tpa_pkts; + uint32_t rx_jumbo_sge_pkts; uint32_t rx_soft_errors; uint32_t rx_hw_csum_errors; uint32_t rx_ofld_frames_csum_ip; @@ -318,6 +319,7 @@ struct bxe_eth_q_stats { uint32_t rx_calls; uint32_t rx_pkts; uint32_t rx_tpa_pkts; + uint32_t rx_jumbo_sge_pkts; uint32_t rx_soft_errors; uint32_t rx_hw_csum_errors; uint32_t rx_ofld_frames_csum_ip; @@ -411,6 +413,7 @@ struct bxe_eth_q_stats_old { uint32_t rx_calls_old; uint32_t rx_pkts_old; uint32_t rx_tpa_pkts_old; + uint32_t rx_jumbo_sge_pkts_old; uint32_t rx_soft_errors_old; uint32_t rx_hw_csum_errors_old; uint32_t rx_ofld_frames_csum_ip_old; diff --git a/sys/dev/ce/if_ce.c b/sys/dev/ce/if_ce.c index 7d81720a69a1..8ef3e1ef3884 100644 --- a/sys/dev/ce/if_ce.c +++ b/sys/dev/ce/if_ce.c @@ -104,10 +104,6 @@ __FBSDID("$FreeBSD$"); #define CE_DEBUG2(d,s) ({if (d->chan->debug>1) {\ printf ("%s: ", d->name); printf s;}}) -#ifndef CALLOUT_MPSAFE -#define CALLOUT_MPSAFE 0 -#endif - #ifndef IF_DRAIN #define IF_DRAIN(ifq) do { \ struct mbuf *m; \ @@ -609,7 +605,7 @@ static int ce_attach (device_t dev) return (ENXIO); } #if __FreeBSD_version >= 500000 - callout_init (&led_timo[unit], CALLOUT_MPSAFE); + callout_init (&led_timo[unit], 1); #else callout_init (&led_timo[unit]); #endif @@ -661,7 +657,7 @@ static int ce_attach (device_t dev) continue; d = c->sys; - callout_init (&d->timeout_handle, CALLOUT_MPSAFE); + callout_init (&d->timeout_handle, 1); #ifdef NETGRAPH if (ng_make_node_common (&typestruct, &d->node) != 0) { printf ("%s: cannot make common node\n", d->name); @@ -2558,7 +2554,7 @@ static int ce_modevent (module_t mod, int type, void *unused) cdevsw_add (&ce_cdevsw); #endif #if __FreeBSD_version >= 500000 - callout_init (&timeout_handle, CALLOUT_MPSAFE); + callout_init (&timeout_handle, 1); #else callout_init (&timeout_handle); #endif diff --git a/sys/dev/cp/if_cp.c b/sys/dev/cp/if_cp.c index 3d07ef2ba4cf..44791d022101 100644 --- a/sys/dev/cp/if_cp.c +++ b/sys/dev/cp/if_cp.c @@ -445,7 +445,7 @@ static int cp_attach (device_t dev) splx (s); return (ENXIO); } - callout_init (&led_timo[unit], CALLOUT_MPSAFE); + callout_init (&led_timo[unit], 1); error = bus_setup_intr (dev, bd->cp_irq, INTR_TYPE_NET|INTR_MPSAFE, NULL, cp_intr, bd, &bd->cp_intrhand); @@ -474,7 +474,7 @@ static int cp_attach (device_t dev) d->board = b; d->chan = c; c->sys = d; - callout_init (&d->timeout_handle, CALLOUT_MPSAFE); + callout_init (&d->timeout_handle, 1); #ifdef NETGRAPH if (ng_make_node_common (&typestruct, &d->node) != 0) { printf ("%s: cannot make common node\n", d->name); @@ -2223,7 +2223,7 @@ static int cp_modevent (module_t mod, int type, void *unused) printf ("Failed to register ng_cp\n"); #endif ++load_count; - callout_init (&timeout_handle, CALLOUT_MPSAFE); + callout_init (&timeout_handle, 1); callout_reset (&timeout_handle, hz*5, cp_timeout, 0); break; case MOD_UNLOAD: diff --git a/sys/dev/ctau/if_ct.c b/sys/dev/ctau/if_ct.c index 2e9d2e2ed4b8..e7b892794bc5 100644 --- a/sys/dev/ctau/if_ct.c +++ b/sys/dev/ctau/if_ct.c @@ -646,7 +646,7 @@ static int ct_attach (device_t dev) return ENXIO; } - callout_init (&led_timo[unit], CALLOUT_MPSAFE); + callout_init (&led_timo[unit], 1); s = splimp (); if (bus_setup_intr (dev, bd->irq_res, INTR_TYPE_NET|INTR_MPSAFE, @@ -685,7 +685,7 @@ static int ct_attach (device_t dev) c->sys = d; channel [b->num*NCHAN + c->num] = d; sprintf (d->name, "ct%d.%d", b->num, c->num); - callout_init (&d->timeout_handle, CALLOUT_MPSAFE); + callout_init (&d->timeout_handle, 1); #ifdef NETGRAPH if (ng_make_node_common (&typestruct, &d->node) != 0) { @@ -2162,7 +2162,7 @@ static int ct_modevent (module_t mod, int type, void *unused) printf ("Failed to register ng_ct\n"); #endif ++load_count; - callout_init (&timeout_handle, CALLOUT_MPSAFE); + callout_init (&timeout_handle, 1); callout_reset (&timeout_handle, hz*5, ct_timeout, 0); break; case MOD_UNLOAD: diff --git a/sys/dev/cx/if_cx.c b/sys/dev/cx/if_cx.c index 23274031cb53..cac69ab209f6 100644 --- a/sys/dev/cx/if_cx.c +++ b/sys/dev/cx/if_cx.c @@ -746,7 +746,7 @@ static int cx_attach (device_t dev) return ENXIO; } b->sys = bd; - callout_init (&led_timo[b->num], CALLOUT_MPSAFE); + callout_init (&led_timo[b->num], 1); s = splhigh (); if (bus_setup_intr (dev, bd->irq_res, INTR_TYPE_NET|INTR_MPSAFE, @@ -796,7 +796,7 @@ static int cx_attach (device_t dev) case T_UNIV_RS232: case T_UNIV_RS449: case T_UNIV_V35: - callout_init (&d->timeout_handle, CALLOUT_MPSAFE); + callout_init (&d->timeout_handle, 1); #ifdef NETGRAPH if (ng_make_node_common (&typestruct, &d->node) != 0) { printf ("%s: cannot make common node\n", d->name); @@ -867,7 +867,7 @@ static int cx_attach (device_t dev) ttycreate(d->tty, TS_CALLOUT, "x%r%r", b->num, c->num); d->devt = make_dev (&cx_cdevsw, b->num*NCHAN + c->num + 64, UID_ROOT, GID_WHEEL, 0600, "cx%d", b->num*NCHAN + c->num); d->devt->si_drv1 = d; - callout_init (&d->dcd_timeout_handle, CALLOUT_MPSAFE); + callout_init (&d->dcd_timeout_handle, 1); } splx (s); @@ -2497,7 +2497,7 @@ static int cx_modevent (module_t mod, int type, void *unused) #endif ++load_count; - callout_init (&timeout_handle, CALLOUT_MPSAFE); + callout_init (&timeout_handle, 1); callout_reset (&timeout_handle, hz*5, cx_timeout, 0); /* Software interrupt. */ swi_add(&tty_intr_event, "cx", cx_softintr, NULL, SWI_TTY, diff --git a/sys/dev/cxgb/cxgb_main.c b/sys/dev/cxgb/cxgb_main.c index 1d8ebc978e6b..c03d70c099ce 100644 --- a/sys/dev/cxgb/cxgb_main.c +++ b/sys/dev/cxgb/cxgb_main.c @@ -592,7 +592,7 @@ cxgb_controller_attach(device_t dev) /* Create a periodic callout for checking adapter status */ - callout_init(&sc->cxgb_tick_ch, TRUE); + callout_init(&sc->cxgb_tick_ch, 1); if (t3_check_fw_version(sc) < 0 || force_fw_update) { /* @@ -1006,7 +1006,7 @@ cxgb_port_attach(device_t dev) device_get_unit(device_get_parent(dev)), p->port_id); PORT_LOCK_INIT(p, p->lockbuf); - callout_init(&p->link_check_ch, CALLOUT_MPSAFE); + callout_init(&p->link_check_ch, 1); TASK_INIT(&p->link_check_task, 0, check_link_status, p); /* Allocate an ifnet object and set it up */ diff --git a/sys/dev/cxgb/cxgb_sge.c b/sys/dev/cxgb/cxgb_sge.c index 71087cce3d43..a7499001af30 100644 --- a/sys/dev/cxgb/cxgb_sge.c +++ b/sys/dev/cxgb/cxgb_sge.c @@ -1008,7 +1008,7 @@ sge_timer_cb(void *arg) int t3_sge_init_adapter(adapter_t *sc) { - callout_init(&sc->sge_timer_ch, CALLOUT_MPSAFE); + callout_init(&sc->sge_timer_ch, 1); callout_reset(&sc->sge_timer_ch, TX_RECLAIM_PERIOD, sge_timer_cb, sc); TASK_INIT(&sc->slow_intr_task, 0, sge_slow_intr_handler, sc); return (0); diff --git a/sys/dev/cxgb/ulp/iw_cxgb/iw_cxgb_cm.c b/sys/dev/cxgb/ulp/iw_cxgb/iw_cxgb_cm.c index eba1ab72b0f0..7b435607df0c 100644 --- a/sys/dev/cxgb/ulp/iw_cxgb/iw_cxgb_cm.c +++ b/sys/dev/cxgb/ulp/iw_cxgb/iw_cxgb_cm.c @@ -163,7 +163,7 @@ start_ep_timer(struct iwch_ep *ep) * XXX this looks racy */ get_ep(&ep->com); - callout_init(&ep->timer, TRUE); + callout_init(&ep->timer, 1); } callout_reset(&ep->timer, ep_timeout_secs * hz, ep_timeout, ep); } @@ -1307,7 +1307,7 @@ iwch_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param) err = (-ENOMEM); goto out; } - callout_init(&ep->timer, TRUE); + callout_init(&ep->timer, 1); ep->plen = conn_param->private_data_len; if (ep->plen) memcpy(ep->mpa_pkt + sizeof(struct mpa_message), @@ -1598,7 +1598,7 @@ process_newconn(struct iwch_ep *parent_ep) free(remote, M_SONAME); get_ep(&parent_ep->com); child_ep->parent_ep = parent_ep; - callout_init(&child_ep->timer, TRUE); + callout_init(&child_ep->timer, 1); state_set(&child_ep->com, MPA_REQ_WAIT); start_ep_timer(child_ep); diff --git a/sys/dev/cxgb/ulp/iw_cxgb/iw_cxgb_provider.c b/sys/dev/cxgb/ulp/iw_cxgb/iw_cxgb_provider.c index 9a3d75fab708..8f4980fac9d6 100644 --- a/sys/dev/cxgb/ulp/iw_cxgb/iw_cxgb_provider.c +++ b/sys/dev/cxgb/ulp/iw_cxgb/iw_cxgb_provider.c @@ -906,7 +906,7 @@ static struct ib_qp *iwch_create_qp(struct ib_pd *pd, insert_mmap(ucontext, mm2); } qhp->ibqp.qp_num = qhp->wq.qpid; - callout_init(&(qhp->timer), TRUE); + callout_init(&(qhp->timer), 1); CTR6(KTR_IW_CXGB, "sq_num_entries %d, rq_num_entries %d " "qpid 0x%0x qhp %p dma_addr 0x%llx size %d", qhp->attr.sq_num_entries, qhp->attr.rq_num_entries, diff --git a/sys/dev/cxgbe/t4_main.c b/sys/dev/cxgbe/t4_main.c index 4bbb55ed5d0b..f5b26441701a 100644 --- a/sys/dev/cxgbe/t4_main.c +++ b/sys/dev/cxgbe/t4_main.c @@ -613,7 +613,7 @@ t4_attach(device_t dev) mtx_init(&sc->sfl_lock, "starving freelists", 0, MTX_DEF); TAILQ_INIT(&sc->sfl); - callout_init(&sc->sfl_callout, CALLOUT_MPSAFE); + callout_init(&sc->sfl_callout, 1); mtx_init(&sc->regwin_lock, "register and memory window", 0, MTX_DEF); @@ -1082,7 +1082,7 @@ cxgbe_attach(device_t dev) pi->ifp = ifp; ifp->if_softc = pi; - callout_init(&pi->tick, CALLOUT_MPSAFE); + callout_init(&pi->tick, 1); if_initname(ifp, device_get_name(dev), device_get_unit(dev)); ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; diff --git a/sys/dev/dcons/dcons_os.c b/sys/dev/dcons/dcons_os.c index bf0be0b29cbc..01e61663e5b0 100644 --- a/sys/dev/dcons/dcons_os.c +++ b/sys/dev/dcons/dcons_os.c @@ -374,7 +374,7 @@ dcons_attach(void) dcons_attach_port(DCONS_CON, "dcons", 0); dcons_attach_port(DCONS_GDB, "dgdb", DC_GDB); - callout_init(&dcons_callout, CALLOUT_MPSAFE); + callout_init(&dcons_callout, 1); polltime = hz / poll_hz; callout_reset(&dcons_callout, polltime, dcons_timeout, NULL); return(0); diff --git a/sys/dev/drm2/drm_irq.c b/sys/dev/drm2/drm_irq.c index f93cd38eddd2..bb13f9067f65 100644 --- a/sys/dev/drm2/drm_irq.c +++ b/sys/dev/drm2/drm_irq.c @@ -210,7 +210,7 @@ int drm_vblank_init(struct drm_device *dev, int num_crtcs) { int i, ret = -ENOMEM; - callout_init(&dev->vblank_disable_callout, CALLOUT_MPSAFE); + callout_init(&dev->vblank_disable_callout, 1); mtx_init(&dev->vbl_lock, "drmvbl", NULL, MTX_DEF); mtx_init(&dev->vblank_time_lock, "drmvtl", NULL, MTX_DEF); diff --git a/sys/dev/drm2/i915/intel_display.c b/sys/dev/drm2/i915/intel_display.c index aafd4facf781..b4609021a692 100644 --- a/sys/dev/drm2/i915/intel_display.c +++ b/sys/dev/drm2/i915/intel_display.c @@ -6449,7 +6449,7 @@ static void intel_crtc_init(struct drm_device *dev, int pipe) intel_crtc->busy = false; - callout_init(&intel_crtc->idle_callout, CALLOUT_MPSAFE); + callout_init(&intel_crtc->idle_callout, 1); } int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data, @@ -7038,7 +7038,7 @@ void intel_modeset_init(struct drm_device *dev) intel_setup_outputs(dev); TASK_INIT(&dev_priv->idle_task, 0, intel_idle_update, dev_priv); - callout_init(&dev_priv->idle_callout, CALLOUT_MPSAFE); + callout_init(&dev_priv->idle_callout, 1); } void intel_modeset_gem_init(struct drm_device *dev) diff --git a/sys/dev/e1000/if_em.c b/sys/dev/e1000/if_em.c index 252571b611c2..ab39c4355782 100644 --- a/sys/dev/e1000/if_em.c +++ b/sys/dev/e1000/if_em.c @@ -1609,6 +1609,9 @@ em_msix_link(void *arg) ++adapter->link_irq; reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR); + if (reg_icr & E1000_ICR_RXO) + adapter->rx_overruns++; + if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) { adapter->hw.mac.get_link_status = 1; em_handle_link(adapter, 0); diff --git a/sys/dev/fdt/simplebus.c b/sys/dev/fdt/simplebus.c index 585f5bf8e991..4cf063ed1a56 100644 --- a/sys/dev/fdt/simplebus.c +++ b/sys/dev/fdt/simplebus.c @@ -251,7 +251,7 @@ simplebus_setup_dinfo(device_t dev, phandle_t node, resource_list_init(&ndi->rl); ofw_bus_reg_to_rl(dev, node, sc->acells, sc->scells, &ndi->rl); - ofw_bus_intr_to_rl(dev, node, &ndi->rl); + ofw_bus_intr_to_rl(dev, node, &ndi->rl, NULL); return (ndi); } diff --git a/sys/dev/glxsb/glxsb.c b/sys/dev/glxsb/glxsb.c index 9a467eda7a06..943ce7d6d9e3 100644 --- a/sys/dev/glxsb/glxsb.c +++ b/sys/dev/glxsb/glxsb.c @@ -331,7 +331,7 @@ glxsb_attach(device_t dev) sc->sc_rnghz = hz / 100; else sc->sc_rnghz = 1; - callout_init(&sc->sc_rngco, CALLOUT_MPSAFE); + callout_init(&sc->sc_rngco, 1); glxsb_rnd(sc); return (0); diff --git a/sys/dev/gpio/gpioled.c b/sys/dev/gpio/gpioled.c index 5af73735ffb4..01710c2e8f56 100644 --- a/sys/dev/gpio/gpioled.c +++ b/sys/dev/gpio/gpioled.c @@ -166,8 +166,10 @@ static int gpioled_attach(device_t dev) { struct gpioled_softc *sc; + int state; #ifdef FDT phandle_t node; + char *default_state; char *name; #else const char *name; @@ -177,10 +179,29 @@ gpioled_attach(device_t dev) sc->sc_dev = dev; sc->sc_busdev = device_get_parent(dev); GPIOLED_LOCK_INIT(sc); + + state = 0; + #ifdef FDT - name = NULL; if ((node = ofw_bus_get_node(dev)) == -1) return (ENXIO); + + if (OF_getprop_alloc(node, "default-state", + sizeof(char), (void **)&default_state) != -1) { + if (strcasecmp(default_state, "on") == 0) + state = 1; + else if (strcasecmp(default_state, "off") == 0) + state = 0; + else if (strcasecmp(default_state, "keep") == 0) + state = -1; + else { + device_printf(dev, + "unknown value for default-state in FDT\n"); + } + free(default_state, M_OFWPROP); + } + + name = NULL; if (OF_getprop_alloc(node, "label", 1, (void **)&name) == -1) OF_getprop_alloc(node, "name", 1, (void **)&name); #else @@ -189,8 +210,8 @@ gpioled_attach(device_t dev) name = NULL; #endif - sc->sc_leddev = led_create(gpioled_control, sc, name ? name : - device_get_nameunit(dev)); + sc->sc_leddev = led_create_state(gpioled_control, sc, name ? name : + device_get_nameunit(dev), state); #ifdef FDT if (name != NULL) free(name, M_OFWPROP); diff --git a/sys/dev/gpio/ofw_gpiobus.c b/sys/dev/gpio/ofw_gpiobus.c index 368528de18f0..6646b7dc59cb 100644 --- a/sys/dev/gpio/ofw_gpiobus.c +++ b/sys/dev/gpio/ofw_gpiobus.c @@ -147,7 +147,7 @@ ofw_gpiobus_setup_devinfo(device_t bus, device_t child, phandle_t node) } free(pins, M_DEVBUF); /* Parse the interrupt resources. */ - if (ofw_bus_intr_to_rl(bus, node, &dinfo->opd_dinfo.rl) != 0) { + if (ofw_bus_intr_to_rl(bus, node, &dinfo->opd_dinfo.rl, NULL) != 0) { ofw_gpiobus_destroy_devinfo(bus, dinfo); return (NULL); } diff --git a/sys/dev/gxemul/cons/gxemul_cons.c b/sys/dev/gxemul/cons/gxemul_cons.c index cb3b0001ee6c..15deaf0002bc 100644 --- a/sys/dev/gxemul/cons/gxemul_cons.c +++ b/sys/dev/gxemul/cons/gxemul_cons.c @@ -279,7 +279,7 @@ gxemul_cons_ttyinit(void *unused) tp = tty_alloc(&gxemul_cons_ttydevsw, NULL); tty_init_console(tp, 0); tty_makedev(tp, NULL, "%s", "ttyu0"); - callout_init(&gxemul_cons_callout, CALLOUT_MPSAFE); + callout_init(&gxemul_cons_callout, 1); callout_reset(&gxemul_cons_callout, gxemul_cons_polltime, gxemul_cons_timeout, tp); diff --git a/sys/dev/hifn/hifn7751.c b/sys/dev/hifn/hifn7751.c index 8330d3059fdc..5b72482d06a6 100644 --- a/sys/dev/hifn/hifn7751.c +++ b/sys/dev/hifn/hifn7751.c @@ -589,7 +589,7 @@ hifn_attach(device_t dev) if (sc->sc_flags & (HIFN_HAS_PUBLIC | HIFN_HAS_RNG)) hifn_init_pubrng(sc); - callout_init(&sc->sc_tickto, CALLOUT_MPSAFE); + callout_init(&sc->sc_tickto, 1); callout_reset(&sc->sc_tickto, hz, hifn_tick, sc); return (0); @@ -765,7 +765,7 @@ hifn_init_pubrng(struct hifn_softc *sc) sc->sc_rnghz = hz / 100; else sc->sc_rnghz = 1; - callout_init(&sc->sc_rngto, CALLOUT_MPSAFE); + callout_init(&sc->sc_rngto, 1); callout_reset(&sc->sc_rngto, sc->sc_rnghz, hifn_rng, sc); } diff --git a/sys/dev/hwpmc/hwpmc_amd.c b/sys/dev/hwpmc/hwpmc_amd.c index 1a8398c889f3..0bee1382c1a1 100644 --- a/sys/dev/hwpmc/hwpmc_amd.c +++ b/sys/dev/hwpmc/hwpmc_amd.c @@ -47,7 +47,7 @@ __FBSDID("$FreeBSD$"); #include #include -#ifdef DEBUG +#ifdef HWPMC_DEBUG enum pmc_class amd_pmc_class; #endif @@ -282,16 +282,16 @@ amd_read_pmc(int cpu, int ri, pmc_value_t *v) mode = PMC_TO_MODE(pm); - PMCDBG(MDP,REA,1,"amd-read id=%d class=%d", ri, pd->pm_descr.pd_class); + PMCDBG2(MDP,REA,1,"amd-read id=%d class=%d", ri, pd->pm_descr.pd_class); -#ifdef DEBUG +#ifdef HWPMC_DEBUG KASSERT(pd->pm_descr.pd_class == amd_pmc_class, ("[amd,%d] unknown PMC class (%d)", __LINE__, pd->pm_descr.pd_class)); #endif tmp = rdmsr(pd->pm_perfctr); /* RDMSR serializes */ - PMCDBG(MDP,REA,2,"amd-read (pre-munge) id=%d -> %jd", ri, tmp); + PMCDBG2(MDP,REA,2,"amd-read (pre-munge) id=%d -> %jd", ri, tmp); if (PMC_IS_SAMPLING_MODE(mode)) { /* Sign extend 48 bit value to 64 bits. */ tmp = (pmc_value_t) (((int64_t) tmp << 16) >> 16); @@ -299,7 +299,7 @@ amd_read_pmc(int cpu, int ri, pmc_value_t *v) } *v = tmp; - PMCDBG(MDP,REA,2,"amd-read (post-munge) id=%d -> %jd", ri, *v); + PMCDBG2(MDP,REA,2,"amd-read (post-munge) id=%d -> %jd", ri, *v); return 0; } @@ -329,7 +329,7 @@ amd_write_pmc(int cpu, int ri, pmc_value_t v) mode = PMC_TO_MODE(pm); -#ifdef DEBUG +#ifdef HWPMC_DEBUG KASSERT(pd->pm_descr.pd_class == amd_pmc_class, ("[amd,%d] unknown PMC class (%d)", __LINE__, pd->pm_descr.pd_class)); @@ -339,7 +339,7 @@ amd_write_pmc(int cpu, int ri, pmc_value_t v) if (PMC_IS_SAMPLING_MODE(mode)) v = AMD_RELOAD_COUNT_TO_PERFCTR_VALUE(v); - PMCDBG(MDP,WRI,1,"amd-write cpu=%d ri=%d v=%jx", cpu, ri, v); + PMCDBG3(MDP,WRI,1,"amd-write cpu=%d ri=%d v=%jx", cpu, ri, v); /* write the PMC value */ wrmsr(pd->pm_perfctr, v); @@ -356,7 +356,7 @@ amd_config_pmc(int cpu, int ri, struct pmc *pm) { struct pmc_hw *phw; - PMCDBG(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); + PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[amd,%d] illegal CPU value %d", __LINE__, cpu)); @@ -395,7 +395,7 @@ amd_switch_in(struct pmc_cpu *pc, struct pmc_process *pp) { (void) pc; - PMCDBG(MDP,SWI,1, "pc=%p pp=%p enable-msr=%d", pc, pp, + PMCDBG3(MDP,SWI,1, "pc=%p pp=%p enable-msr=%d", pc, pp, (pp->pp_flags & PMC_PP_ENABLE_MSR_ACCESS) != 0); /* enable the RDPMC instruction if needed */ @@ -416,7 +416,7 @@ amd_switch_out(struct pmc_cpu *pc, struct pmc_process *pp) (void) pc; (void) pp; /* can be NULL */ - PMCDBG(MDP,SWO,1, "pc=%p pp=%p enable-msr=%d", pc, pp, pp ? + PMCDBG3(MDP,SWO,1, "pc=%p pp=%p enable-msr=%d", pc, pp, pp ? (pp->pp_flags & PMC_PP_ENABLE_MSR_ACCESS) == 1 : 0); /* always turn off the RDPMC instruction */ @@ -453,7 +453,7 @@ amd_allocate_pmc(int cpu, int ri, struct pmc *pm, caps = pm->pm_caps; - PMCDBG(MDP,ALL,1,"amd-allocate ri=%d caps=0x%x", ri, caps); + PMCDBG2(MDP,ALL,1,"amd-allocate ri=%d caps=0x%x", ri, caps); if ((pd->pd_caps & caps) != caps) return EPERM; @@ -500,7 +500,7 @@ amd_allocate_pmc(int cpu, int ri, struct pmc *pm, pm->pm_md.pm_amd.pm_amd_evsel = config; /* save config value */ - PMCDBG(MDP,ALL,2,"amd-allocate ri=%d -> config=0x%x", ri, config); + PMCDBG2(MDP,ALL,2,"amd-allocate ri=%d -> config=0x%x", ri, config); return 0; } @@ -515,7 +515,7 @@ amd_allocate_pmc(int cpu, int ri, struct pmc *pm, static int amd_release_pmc(int cpu, int ri, struct pmc *pmc) { -#ifdef DEBUG +#ifdef HWPMC_DEBUG const struct amd_descr *pd; #endif struct pmc_hw *phw; @@ -532,7 +532,7 @@ amd_release_pmc(int cpu, int ri, struct pmc *pmc) KASSERT(phw->phw_pmc == NULL, ("[amd,%d] PHW pmc %p non-NULL", __LINE__, phw->phw_pmc)); -#ifdef DEBUG +#ifdef HWPMC_DEBUG pd = &amd_pmcdesc[ri]; if (pd->pm_descr.pd_class == amd_pmc_class) KASSERT(AMD_PMC_IS_STOPPED(pd->pm_evsel), @@ -567,7 +567,7 @@ amd_start_pmc(int cpu, int ri) ("[amd,%d] starting cpu%d,pmc%d with null pmc record", __LINE__, cpu, ri)); - PMCDBG(MDP,STA,1,"amd-start cpu=%d ri=%d", cpu, ri); + PMCDBG2(MDP,STA,1,"amd-start cpu=%d ri=%d", cpu, ri); KASSERT(AMD_PMC_IS_STOPPED(pd->pm_evsel), ("[amd,%d] pmc%d,cpu%d: Starting active PMC \"%s\"", __LINE__, @@ -576,7 +576,7 @@ amd_start_pmc(int cpu, int ri) /* turn on the PMC ENABLE bit */ config = pm->pm_md.pm_amd.pm_amd_evsel | AMD_PMC_ENABLE; - PMCDBG(MDP,STA,2,"amd-start config=0x%x", config); + PMCDBG1(MDP,STA,2,"amd-start config=0x%x", config); wrmsr(pd->pm_evsel, config); return 0; @@ -610,7 +610,7 @@ amd_stop_pmc(int cpu, int ri) ("[amd,%d] PMC%d, CPU%d \"%s\" already stopped", __LINE__, ri, cpu, pd->pm_descr.pd_name)); - PMCDBG(MDP,STO,1,"amd-stop ri=%d", ri); + PMCDBG1(MDP,STO,1,"amd-stop ri=%d", ri); /* turn off the PMC ENABLE bit */ config = pm->pm_md.pm_amd.pm_amd_evsel & ~AMD_PMC_ENABLE; @@ -637,7 +637,7 @@ amd_intr(int cpu, struct trapframe *tf) KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[amd,%d] out of range CPU %d", __LINE__, cpu)); - PMCDBG(MDP,INT,1, "cpu=%d tf=%p um=%d", cpu, (void *) tf, + PMCDBG3(MDP,INT,1, "cpu=%d tf=%p um=%d", cpu, (void *) tf, TRAPF_USERMODE(tf)); retval = 0; @@ -769,7 +769,7 @@ amd_pcpu_init(struct pmc_mdep *md, int cpu) KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[amd,%d] insane cpu number %d", __LINE__, cpu)); - PMCDBG(MDP,INI,1,"amd-init cpu=%d", cpu); + PMCDBG1(MDP,INI,1,"amd-init cpu=%d", cpu); amd_pcpu[cpu] = pac = malloc(sizeof(struct amd_cpu), M_PMC, M_WAITOK|M_ZERO); @@ -816,7 +816,7 @@ amd_pcpu_fini(struct pmc_mdep *md, int cpu) KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[amd,%d] insane cpu number (%d)", __LINE__, cpu)); - PMCDBG(MDP,INI,1,"amd-cleanup cpu=%d", cpu); + PMCDBG1(MDP,INI,1,"amd-cleanup cpu=%d", cpu); /* * First, turn off all PMCs on this CPU. @@ -835,7 +835,7 @@ amd_pcpu_fini(struct pmc_mdep *md, int cpu) amd_pcpu[cpu] = NULL; -#ifdef DEBUG +#ifdef HWPMC_DEBUG for (i = 0; i < AMD_NPMCS; i++) { KASSERT(pac->pc_amdpmcs[i].phw_pmc == NULL, ("[amd,%d] CPU%d/PMC%d in use", __LINE__, cpu, i)); @@ -912,7 +912,7 @@ pmc_amd_initialize(void) return NULL; } -#ifdef DEBUG +#ifdef HWPMC_DEBUG amd_pmc_class = class; #endif @@ -976,7 +976,7 @@ pmc_amd_initialize(void) pmc_mdep->pmd_npmc += AMD_NPMCS; - PMCDBG(MDP,INI,0,"%s","amd-initialize"); + PMCDBG0(MDP,INI,0,"amd-initialize"); return (pmc_mdep); diff --git a/sys/dev/hwpmc/hwpmc_arm64.c b/sys/dev/hwpmc/hwpmc_arm64.c new file mode 100644 index 000000000000..2e54e3870ba2 --- /dev/null +++ b/sys/dev/hwpmc/hwpmc_arm64.c @@ -0,0 +1,544 @@ +/*- + * Copyright (c) 2015 Ruslan Bukin + * All rights reserved. + * + * This software was developed by the University of Cambridge Computer + * Laboratory with support from ARM Ltd. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include + +#include +#include + +static int arm64_npmcs; + +struct arm64_event_code_map { + enum pmc_event pe_ev; + uint8_t pe_code; +}; + +/* + * Per-processor information. + */ +struct arm64_cpu { + struct pmc_hw *pc_arm64pmcs; +}; + +static struct arm64_cpu **arm64_pcpu; + +/* + * Interrupt Enable Set Register + */ +static __inline void +arm64_interrupt_enable(uint32_t pmc) +{ + uint32_t reg; + + reg = (1 << pmc); + WRITE_SPECIALREG(PMINTENSET_EL1, reg); + + isb(); +} + +/* + * Interrupt Clear Set Register + */ +static __inline void +arm64_interrupt_disable(uint32_t pmc) +{ + uint32_t reg; + + reg = (1 << pmc); + WRITE_SPECIALREG(PMINTENCLR_EL1, reg); + + isb(); +} + +/* + * Counter Set Enable Register + */ +static __inline void +arm64_counter_enable(unsigned int pmc) +{ + uint32_t reg; + + reg = (1 << pmc); + WRITE_SPECIALREG(PMCNTENSET_EL0, reg); + + isb(); +} + +/* + * Counter Clear Enable Register + */ +static __inline void +arm64_counter_disable(unsigned int pmc) +{ + uint32_t reg; + + reg = (1 << pmc); + WRITE_SPECIALREG(PMCNTENCLR_EL0, reg); + + isb(); +} + +/* + * Performance Monitors Control Register + */ +static uint32_t +arm64_pmcr_read(void) +{ + uint32_t reg; + + reg = READ_SPECIALREG(PMCR_EL0); + + return (reg); +} + +static void +arm64_pmcr_write(uint32_t reg) +{ + + WRITE_SPECIALREG(PMCR_EL0, reg); + + isb(); +} + +/* + * Performance Count Register N + */ +static uint32_t +arm64_pmcn_read(unsigned int pmc) +{ + + KASSERT(pmc < arm64_npmcs, ("%s: illegal PMC number %d", __func__, pmc)); + + WRITE_SPECIALREG(PMSELR_EL0, pmc); + + isb(); + + return (READ_SPECIALREG(PMXEVCNTR_EL0)); +} + +static void +arm64_pmcn_write(unsigned int pmc, uint32_t reg) +{ + + KASSERT(pmc < arm64_npmcs, ("%s: illegal PMC number %d", __func__, pmc)); + + WRITE_SPECIALREG(PMSELR_EL0, pmc); + WRITE_SPECIALREG(PMXEVCNTR_EL0, reg); + + isb(); +} + +static int +arm64_allocate_pmc(int cpu, int ri, struct pmc *pm, + const struct pmc_op_pmcallocate *a) +{ + uint32_t caps, config; + struct arm64_cpu *pac; + enum pmc_event pe; + + KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), + ("[arm64,%d] illegal CPU value %d", __LINE__, cpu)); + KASSERT(ri >= 0 && ri < arm64_npmcs, + ("[arm64,%d] illegal row index %d", __LINE__, ri)); + + pac = arm64_pcpu[cpu]; + + caps = a->pm_caps; + if (a->pm_class != PMC_CLASS_ARMV8) { + return (EINVAL); + } + pe = a->pm_ev; + + config = (pe & EVENT_ID_MASK); + pm->pm_md.pm_arm64.pm_arm64_evsel = config; + + PMCDBG2(MDP, ALL, 2, "arm64-allocate ri=%d -> config=0x%x", ri, config); + + return 0; +} + + +static int +arm64_read_pmc(int cpu, int ri, pmc_value_t *v) +{ + pmc_value_t tmp; + struct pmc *pm; + + KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), + ("[arm64,%d] illegal CPU value %d", __LINE__, cpu)); + KASSERT(ri >= 0 && ri < arm64_npmcs, + ("[arm64,%d] illegal row index %d", __LINE__, ri)); + + pm = arm64_pcpu[cpu]->pc_arm64pmcs[ri].phw_pmc; + + tmp = arm64_pmcn_read(ri); + + PMCDBG2(MDP, REA, 2, "arm64-read id=%d -> %jd", ri, tmp); + if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) + *v = ARMV8_PERFCTR_VALUE_TO_RELOAD_COUNT(tmp); + else + *v = tmp; + + return 0; +} + +static int +arm64_write_pmc(int cpu, int ri, pmc_value_t v) +{ + struct pmc *pm; + + KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), + ("[arm64,%d] illegal CPU value %d", __LINE__, cpu)); + KASSERT(ri >= 0 && ri < arm64_npmcs, + ("[arm64,%d] illegal row-index %d", __LINE__, ri)); + + pm = arm64_pcpu[cpu]->pc_arm64pmcs[ri].phw_pmc; + + if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) + v = ARMV8_RELOAD_COUNT_TO_PERFCTR_VALUE(v); + + PMCDBG3(MDP, WRI, 1, "arm64-write cpu=%d ri=%d v=%jx", cpu, ri, v); + + arm64_pmcn_write(ri, v); + + return 0; +} + +static int +arm64_config_pmc(int cpu, int ri, struct pmc *pm) +{ + struct pmc_hw *phw; + + PMCDBG3(MDP, CFG, 1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); + + KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), + ("[arm64,%d] illegal CPU value %d", __LINE__, cpu)); + KASSERT(ri >= 0 && ri < arm64_npmcs, + ("[arm64,%d] illegal row-index %d", __LINE__, ri)); + + phw = &arm64_pcpu[cpu]->pc_arm64pmcs[ri]; + + KASSERT(pm == NULL || phw->phw_pmc == NULL, + ("[arm64,%d] pm=%p phw->pm=%p hwpmc not unconfigured", + __LINE__, pm, phw->phw_pmc)); + + phw->phw_pmc = pm; + + return 0; +} + +static int +arm64_start_pmc(int cpu, int ri) +{ + struct pmc_hw *phw; + uint32_t config; + struct pmc *pm; + + phw = &arm64_pcpu[cpu]->pc_arm64pmcs[ri]; + pm = phw->phw_pmc; + config = pm->pm_md.pm_arm64.pm_arm64_evsel; + + /* + * Configure the event selection. + */ + WRITE_SPECIALREG(PMSELR_EL0, ri); + WRITE_SPECIALREG(PMXEVTYPER_EL0, config); + + isb(); + + /* + * Enable the PMC. + */ + arm64_interrupt_enable(ri); + arm64_counter_enable(ri); + + return 0; +} + +static int +arm64_stop_pmc(int cpu, int ri) +{ + struct pmc_hw *phw; + struct pmc *pm; + + phw = &arm64_pcpu[cpu]->pc_arm64pmcs[ri]; + pm = phw->phw_pmc; + + /* + * Disable the PMCs. + */ + arm64_counter_disable(ri); + arm64_interrupt_disable(ri); + + return 0; +} + +static int +arm64_release_pmc(int cpu, int ri, struct pmc *pmc) +{ + struct pmc_hw *phw; + + KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), + ("[arm64,%d] illegal CPU value %d", __LINE__, cpu)); + KASSERT(ri >= 0 && ri < arm64_npmcs, + ("[arm64,%d] illegal row-index %d", __LINE__, ri)); + + phw = &arm64_pcpu[cpu]->pc_arm64pmcs[ri]; + KASSERT(phw->phw_pmc == NULL, + ("[arm64,%d] PHW pmc %p non-NULL", __LINE__, phw->phw_pmc)); + + return 0; +} + +static int +arm64_intr(int cpu, struct trapframe *tf) +{ + struct arm64_cpu *pc; + int retval, ri; + struct pmc *pm; + int error; + int reg; + + KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), + ("[arm64,%d] CPU %d out of range", __LINE__, cpu)); + + retval = 0; + pc = arm64_pcpu[cpu]; + + for (ri = 0; ri < arm64_npmcs; ri++) { + pm = arm64_pcpu[cpu]->pc_arm64pmcs[ri].phw_pmc; + if (pm == NULL) + continue; + if (!PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) + continue; + + /* Check if counter is overflowed */ + reg = (1 << ri); + if ((READ_SPECIALREG(PMOVSCLR_EL0) & reg) == 0) + continue; + /* Clear Overflow Flag */ + WRITE_SPECIALREG(PMOVSCLR_EL0, reg); + + isb(); + + retval = 1; /* Found an interrupting PMC. */ + if (pm->pm_state != PMC_STATE_RUNNING) + continue; + + error = pmc_process_interrupt(cpu, PMC_HR, pm, tf, + TRAPF_USERMODE(tf)); + if (error) + arm64_stop_pmc(cpu, ri); + + /* Reload sampling count */ + arm64_write_pmc(cpu, ri, pm->pm_sc.pm_reloadcount); + } + + return (retval); +} + +static int +arm64_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc) +{ + char arm64_name[PMC_NAME_MAX]; + struct pmc_hw *phw; + int error; + + KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), + ("[arm64,%d], illegal CPU %d", __LINE__, cpu)); + KASSERT(ri >= 0 && ri < arm64_npmcs, + ("[arm64,%d] row-index %d out of range", __LINE__, ri)); + + phw = &arm64_pcpu[cpu]->pc_arm64pmcs[ri]; + snprintf(arm64_name, sizeof(arm64_name), "ARMV8-%d", ri); + if ((error = copystr(arm64_name, pi->pm_name, PMC_NAME_MAX, + NULL)) != 0) + return (error); + pi->pm_class = PMC_CLASS_ARMV8; + if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) { + pi->pm_enabled = TRUE; + *ppmc = phw->phw_pmc; + } else { + pi->pm_enabled = FALSE; + *ppmc = NULL; + } + + return (0); +} + +static int +arm64_get_config(int cpu, int ri, struct pmc **ppm) +{ + + *ppm = arm64_pcpu[cpu]->pc_arm64pmcs[ri].phw_pmc; + + return (0); +} + +/* + * XXX don't know what we should do here. + */ +static int +arm64_switch_in(struct pmc_cpu *pc, struct pmc_process *pp) +{ + + return (0); +} + +static int +arm64_switch_out(struct pmc_cpu *pc, struct pmc_process *pp) +{ + + return (0); +} + +static int +arm64_pcpu_init(struct pmc_mdep *md, int cpu) +{ + struct arm64_cpu *pac; + struct pmc_hw *phw; + struct pmc_cpu *pc; + uint64_t pmcr; + int first_ri; + int i; + + KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), + ("[arm64,%d] wrong cpu number %d", __LINE__, cpu)); + PMCDBG1(MDP, INI, 1, "arm64-init cpu=%d", cpu); + + arm64_pcpu[cpu] = pac = malloc(sizeof(struct arm64_cpu), M_PMC, + M_WAITOK | M_ZERO); + + pac->pc_arm64pmcs = malloc(sizeof(struct pmc_hw) * arm64_npmcs, + M_PMC, M_WAITOK | M_ZERO); + pc = pmc_pcpu[cpu]; + first_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_ARMV8].pcd_ri; + KASSERT(pc != NULL, ("[arm64,%d] NULL per-cpu pointer", __LINE__)); + + for (i = 0, phw = pac->pc_arm64pmcs; i < arm64_npmcs; i++, phw++) { + phw->phw_state = PMC_PHW_FLAG_IS_ENABLED | + PMC_PHW_CPU_TO_STATE(cpu) | PMC_PHW_INDEX_TO_STATE(i); + phw->phw_pmc = NULL; + pc->pc_hwpmcs[i + first_ri] = phw; + } + + /* Enable unit */ + pmcr = arm64_pmcr_read(); + pmcr |= PMCR_E; + arm64_pmcr_write(pmcr); + + return (0); +} + +static int +arm64_pcpu_fini(struct pmc_mdep *md, int cpu) +{ + uint32_t pmcr; + + pmcr = arm64_pmcr_read(); + pmcr &= ~PMCR_E; + arm64_pmcr_write(pmcr); + + return (0); +} + +struct pmc_mdep * +pmc_arm64_initialize() +{ + struct pmc_mdep *pmc_mdep; + struct pmc_classdep *pcd; + int idcode; + int reg; + + reg = arm64_pmcr_read(); + arm64_npmcs = (reg & PMCR_N_MASK) >> PMCR_N_SHIFT; + idcode = (reg & PMCR_IDCODE_MASK) >> PMCR_IDCODE_SHIFT; + + PMCDBG1(MDP, INI, 1, "arm64-init npmcs=%d", arm64_npmcs); + + /* + * Allocate space for pointers to PMC HW descriptors and for + * the MDEP structure used by MI code. + */ + arm64_pcpu = malloc(sizeof(struct arm64_cpu *) * pmc_cpu_max(), + M_PMC, M_WAITOK | M_ZERO); + + /* Just one class */ + pmc_mdep = pmc_mdep_alloc(1); + + switch (idcode) { + case PMCR_IDCODE_CORTEX_A57: + case PMCR_IDCODE_CORTEX_A72: + pmc_mdep->pmd_cputype = PMC_CPU_ARMV8_CORTEX_A57; + break; + default: + case PMCR_IDCODE_CORTEX_A53: + pmc_mdep->pmd_cputype = PMC_CPU_ARMV8_CORTEX_A53; + break; + } + + pcd = &pmc_mdep->pmd_classdep[PMC_MDEP_CLASS_INDEX_ARMV8]; + pcd->pcd_caps = ARMV8_PMC_CAPS; + pcd->pcd_class = PMC_CLASS_ARMV8; + pcd->pcd_num = arm64_npmcs; + pcd->pcd_ri = pmc_mdep->pmd_npmc; + pcd->pcd_width = 32; + + pcd->pcd_allocate_pmc = arm64_allocate_pmc; + pcd->pcd_config_pmc = arm64_config_pmc; + pcd->pcd_pcpu_fini = arm64_pcpu_fini; + pcd->pcd_pcpu_init = arm64_pcpu_init; + pcd->pcd_describe = arm64_describe; + pcd->pcd_get_config = arm64_get_config; + pcd->pcd_read_pmc = arm64_read_pmc; + pcd->pcd_release_pmc = arm64_release_pmc; + pcd->pcd_start_pmc = arm64_start_pmc; + pcd->pcd_stop_pmc = arm64_stop_pmc; + pcd->pcd_write_pmc = arm64_write_pmc; + + pmc_mdep->pmd_intr = arm64_intr; + pmc_mdep->pmd_switch_in = arm64_switch_in; + pmc_mdep->pmd_switch_out = arm64_switch_out; + + pmc_mdep->pmd_npmc += arm64_npmcs; + + return (pmc_mdep); +} + +void +pmc_arm64_finalize(struct pmc_mdep *md) +{ + +} diff --git a/sys/dev/hwpmc/hwpmc_arm64.h b/sys/dev/hwpmc/hwpmc_arm64.h new file mode 100644 index 000000000000..f0d43aa58ef8 --- /dev/null +++ b/sys/dev/hwpmc/hwpmc_arm64.h @@ -0,0 +1,51 @@ +/*- + * Copyright (c) 2015 Ruslan Bukin + * All rights reserved. + * + * This software was developed by the University of Cambridge Computer + * Laboratory with support from ARM Ltd. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _DEV_HWPMC_ARMV8_H_ +#define _DEV_HWPMC_ARMV8_H_ + +#define ARMV8_PMC_CAPS (PMC_CAP_INTERRUPT | PMC_CAP_USER | \ + PMC_CAP_SYSTEM | PMC_CAP_EDGE | \ + PMC_CAP_THRESHOLD | PMC_CAP_READ | \ + PMC_CAP_WRITE | PMC_CAP_INVERT | \ + PMC_CAP_QUALIFIER) + +#define ARMV8_RELOAD_COUNT_TO_PERFCTR_VALUE(R) (-(R)) +#define ARMV8_PERFCTR_VALUE_TO_RELOAD_COUNT(P) (-(P)) +#define EVENT_ID_MASK 0xFF + +#ifdef _KERNEL +/* MD extension for 'struct pmc' */ +struct pmc_md_arm64_pmc { + uint32_t pm_arm64_evsel; +}; +#endif /* _KERNEL */ +#endif /* _DEV_HWPMC_ARMV8_H_ */ diff --git a/sys/dev/hwpmc/hwpmc_arm64_md.c b/sys/dev/hwpmc/hwpmc_arm64_md.c new file mode 100644 index 000000000000..9037c4636b15 --- /dev/null +++ b/sys/dev/hwpmc/hwpmc_arm64_md.c @@ -0,0 +1,154 @@ +/*- + * Copyright (c) 2015 Ruslan Bukin + * All rights reserved. + * + * This software was developed by the University of Cambridge Computer + * Laboratory with support from ARM Ltd. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include +#include + +struct pmc_mdep * +pmc_md_initialize() +{ + + return (pmc_arm64_initialize()); +} + +void +pmc_md_finalize(struct pmc_mdep *md) +{ + + pmc_arm64_finalize(md); +} + +int +pmc_save_kernel_callchain(uintptr_t *cc, int maxsamples, + struct trapframe *tf) +{ + uintptr_t pc, r, stackstart, stackend, fp; + struct thread *td; + int count; + + KASSERT(TRAPF_USERMODE(tf) == 0,("[arm,%d] not a kernel backtrace", + __LINE__)); + + td = curthread; + pc = PMC_TRAPFRAME_TO_PC(tf); + *cc++ = pc; + + if (maxsamples <= 1) + return (1); + + stackstart = (uintptr_t) td->td_kstack; + stackend = (uintptr_t) td->td_kstack + td->td_kstack_pages * PAGE_SIZE; + fp = PMC_TRAPFRAME_TO_FP(tf); + + if (!PMC_IN_KERNEL(pc) || + !PMC_IN_KERNEL_STACK(fp, stackstart, stackend)) + return (1); + + for (count = 1; count < maxsamples; count++) { + /* Use saved lr as pc. */ + r = fp + sizeof(uintptr_t); + if (!PMC_IN_KERNEL_STACK(r, stackstart, stackend)) + break; + pc = *(uintptr_t *)r; + if (!PMC_IN_KERNEL(pc)) + break; + + *cc++ = pc; + + /* Switch to next frame up */ + r = fp; + if (!PMC_IN_KERNEL_STACK(r, stackstart, stackend)) + break; + fp = *(uintptr_t *)r; + if (!PMC_IN_KERNEL_STACK(fp, stackstart, stackend)) + break; + } + + return (count); +} + +int +pmc_save_user_callchain(uintptr_t *cc, int maxsamples, + struct trapframe *tf) +{ + uintptr_t pc, r, oldfp, fp; + struct thread *td; + int count; + + KASSERT(TRAPF_USERMODE(tf), ("[x86,%d] Not a user trap frame tf=%p", + __LINE__, (void *) tf)); + + td = curthread; + pc = PMC_TRAPFRAME_TO_PC(tf); + *cc++ = pc; + + if (maxsamples <= 1) + return (1); + + oldfp = fp = PMC_TRAPFRAME_TO_FP(tf); + + if (!PMC_IN_USERSPACE(pc) || + !PMC_IN_USERSPACE(fp)) + return (1); + + for (count = 1; count < maxsamples; count++) { + /* Use saved lr as pc. */ + r = fp + sizeof(uintptr_t); + if (copyin((void *)r, &pc, sizeof(pc)) != 0) + break; + if (!PMC_IN_USERSPACE(pc)) + break; + + *cc++ = pc; + + /* Switch to next frame up */ + oldfp = fp; + r = fp; + if (copyin((void *)r, &fp, sizeof(fp)) != 0) + break; + if (fp < oldfp || !PMC_IN_USERSPACE(fp)) + break; + } + + return (count); +} diff --git a/sys/dev/hwpmc/hwpmc_armv7.c b/sys/dev/hwpmc/hwpmc_armv7.c index 13fdc76df545..66d49715c8b6 100644 --- a/sys/dev/hwpmc/hwpmc_armv7.c +++ b/sys/dev/hwpmc/hwpmc_armv7.c @@ -201,7 +201,7 @@ armv7_allocate_pmc(int cpu, int ri, struct pmc *pm, pm->pm_md.pm_armv7.pm_armv7_evsel = config; - PMCDBG(MDP,ALL,2,"armv7-allocate ri=%d -> config=0x%x", ri, config); + PMCDBG2(MDP,ALL,2,"armv7-allocate ri=%d -> config=0x%x", ri, config); return 0; } @@ -225,7 +225,7 @@ armv7_read_pmc(int cpu, int ri, pmc_value_t *v) else tmp = armv7_pmcn_read(ri); - PMCDBG(MDP,REA,2,"armv7-read id=%d -> %jd", ri, tmp); + PMCDBG2(MDP,REA,2,"armv7-read id=%d -> %jd", ri, tmp); if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) *v = ARMV7_PERFCTR_VALUE_TO_RELOAD_COUNT(tmp); else @@ -249,7 +249,7 @@ armv7_write_pmc(int cpu, int ri, pmc_value_t v) if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) v = ARMV7_RELOAD_COUNT_TO_PERFCTR_VALUE(v); - PMCDBG(MDP,WRI,1,"armv7-write cpu=%d ri=%d v=%jx", cpu, ri, v); + PMCDBG3(MDP,WRI,1,"armv7-write cpu=%d ri=%d v=%jx", cpu, ri, v); if (pm->pm_md.pm_armv7.pm_armv7_evsel == 0xFF) cp15_pmccntr_set(v); @@ -264,7 +264,7 @@ armv7_config_pmc(int cpu, int ri, struct pmc *pm) { struct pmc_hw *phw; - PMCDBG(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); + PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[armv7,%d] illegal CPU value %d", __LINE__, cpu)); @@ -462,7 +462,7 @@ armv7_pcpu_init(struct pmc_mdep *md, int cpu) KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[armv7,%d] wrong cpu number %d", __LINE__, cpu)); - PMCDBG(MDP,INI,1,"armv7-init cpu=%d", cpu); + PMCDBG1(MDP,INI,1,"armv7-init cpu=%d", cpu); armv7_pcpu[cpu] = pac = malloc(sizeof(struct armv7_cpu), M_PMC, M_WAITOK|M_ZERO); @@ -516,7 +516,7 @@ pmc_armv7_initialize() armv7_npmcs = (reg >> ARMV7_PMNC_N_SHIFT) & \ ARMV7_PMNC_N_MASK; - PMCDBG(MDP,INI,1,"armv7-init npmcs=%d", armv7_npmcs); + PMCDBG1(MDP,INI,1,"armv7-init npmcs=%d", armv7_npmcs); /* * Allocate space for pointers to PMC HW descriptors and for diff --git a/sys/dev/hwpmc/hwpmc_core.c b/sys/dev/hwpmc/hwpmc_core.c index f50dfb6ce2e3..f22d2b328a32 100644 --- a/sys/dev/hwpmc/hwpmc_core.c +++ b/sys/dev/hwpmc/hwpmc_core.c @@ -123,7 +123,7 @@ core_pcpu_init(struct pmc_mdep *md, int cpu) KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[iaf,%d] insane cpu number %d", __LINE__, cpu)); - PMCDBG(MDP,INI,1,"core-init cpu=%d", cpu); + PMCDBG1(MDP,INI,1,"core-init cpu=%d", cpu); core_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_IAP].pcd_ri; npmc = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_IAP].pcd_num; @@ -162,7 +162,7 @@ core_pcpu_fini(struct pmc_mdep *md, int cpu) KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[core,%d] insane cpu number (%d)", __LINE__, cpu)); - PMCDBG(MDP,INI,1,"core-pcpu-fini cpu=%d", cpu); + PMCDBG1(MDP,INI,1,"core-pcpu-fini cpu=%d", cpu); if ((cc = core_pcpu[cpu]) == NULL) return (0); @@ -203,6 +203,10 @@ core_pcpu_fini(struct pmc_mdep *md, int cpu) static pmc_value_t iaf_perfctr_value_to_reload_count(pmc_value_t v) { + + /* If the PMC has overflowed, return a reload count of zero. */ + if ((v & (1ULL << (core_iaf_width - 1))) == 0) + return (0); v &= (1ULL << core_iaf_width) - 1; return (1ULL << core_iaf_width) - v; } @@ -223,7 +227,7 @@ iaf_allocate_pmc(int cpu, int ri, struct pmc *pm, KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[core,%d] illegal CPU %d", __LINE__, cpu)); - PMCDBG(MDP,ALL,1, "iaf-allocate ri=%d reqcaps=0x%x", ri, pm->pm_caps); + PMCDBG2(MDP,ALL,1, "iaf-allocate ri=%d reqcaps=0x%x", ri, pm->pm_caps); if (ri < 0 || ri > core_iaf_npmc) return (EINVAL); @@ -267,7 +271,7 @@ iaf_allocate_pmc(int cpu, int ri, struct pmc *pm, pm->pm_md.pm_iaf.pm_iaf_ctrl = (flags << (ri * 4)); - PMCDBG(MDP,ALL,2, "iaf-allocate config=0x%jx", + PMCDBG1(MDP,ALL,2, "iaf-allocate config=0x%jx", (uintmax_t) pm->pm_md.pm_iaf.pm_iaf_ctrl); return (0); @@ -282,7 +286,7 @@ iaf_config_pmc(int cpu, int ri, struct pmc *pm) KASSERT(ri >= 0 && ri < core_iaf_npmc, ("[core,%d] illegal row-index %d", __LINE__, ri)); - PMCDBG(MDP,CFG,1, "iaf-config cpu=%d ri=%d pm=%p", cpu, ri, pm); + PMCDBG3(MDP,CFG,1, "iaf-config cpu=%d ri=%d pm=%p", cpu, ri, pm); KASSERT(core_pcpu[cpu] != NULL, ("[core,%d] null per-cpu %d", __LINE__, cpu)); @@ -362,7 +366,7 @@ iaf_read_pmc(int cpu, int ri, pmc_value_t *v) else *v = tmp; - PMCDBG(MDP,REA,1, "iaf-read cpu=%d ri=%d msr=0x%x -> v=%jx", cpu, ri, + PMCDBG4(MDP,REA,1, "iaf-read cpu=%d ri=%d msr=0x%x -> v=%jx", cpu, ri, IAF_RI_TO_MSR(ri), *v); return (0); @@ -371,7 +375,7 @@ iaf_read_pmc(int cpu, int ri, pmc_value_t *v) static int iaf_release_pmc(int cpu, int ri, struct pmc *pmc) { - PMCDBG(MDP,REL,1, "iaf-release cpu=%d ri=%d pm=%p", cpu, ri, pmc); + PMCDBG3(MDP,REL,1, "iaf-release cpu=%d ri=%d pm=%p", cpu, ri, pmc); KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[core,%d] illegal CPU value %d", __LINE__, cpu)); @@ -396,7 +400,7 @@ iaf_start_pmc(int cpu, int ri) KASSERT(ri >= 0 && ri < core_iaf_npmc, ("[core,%d] illegal row-index %d", __LINE__, ri)); - PMCDBG(MDP,STA,1,"iaf-start cpu=%d ri=%d", cpu, ri); + PMCDBG2(MDP,STA,1,"iaf-start cpu=%d ri=%d", cpu, ri); iafc = core_pcpu[cpu]; pm = iafc->pc_corepmcs[ri + core_iaf_ri].phw_pmc; @@ -414,7 +418,7 @@ iaf_start_pmc(int cpu, int ri) IAF_GLOBAL_CTRL_MASK)); } while (iafc->pc_resync != 0); - PMCDBG(MDP,STA,1,"iafctrl=%x(%x) globalctrl=%jx(%jx)", + PMCDBG4(MDP,STA,1,"iafctrl=%x(%x) globalctrl=%jx(%jx)", iafc->pc_iafctrl, (uint32_t) rdmsr(IAF_CTRL), iafc->pc_globalctrl, rdmsr(IA_GLOBAL_CTRL)); @@ -428,7 +432,7 @@ iaf_stop_pmc(int cpu, int ri) struct core_cpu *iafc; uint64_t msr = 0; - PMCDBG(MDP,STO,1,"iaf-stop cpu=%d ri=%d", cpu, ri); + PMCDBG2(MDP,STO,1,"iaf-stop cpu=%d ri=%d", cpu, ri); iafc = core_pcpu[cpu]; @@ -445,7 +449,7 @@ iaf_stop_pmc(int cpu, int ri) iafc->pc_iafctrl &= ~fc; - PMCDBG(MDP,STO,1,"iaf-stop iafctrl=%x", iafc->pc_iafctrl); + PMCDBG1(MDP,STO,1,"iaf-stop iafctrl=%x", iafc->pc_iafctrl); msr = rdmsr(IAF_CTRL) & ~IAF_CTRL_MASK; wrmsr(IAF_CTRL, msr | (iafc->pc_iafctrl & IAF_CTRL_MASK)); @@ -457,7 +461,7 @@ iaf_stop_pmc(int cpu, int ri) IAF_GLOBAL_CTRL_MASK)); } while (iafc->pc_resync != 0); - PMCDBG(MDP,STO,1,"iafctrl=%x(%x) globalctrl=%jx(%jx)", + PMCDBG4(MDP,STO,1,"iafctrl=%x(%x) globalctrl=%jx(%jx)", iafc->pc_iafctrl, (uint32_t) rdmsr(IAF_CTRL), iafc->pc_globalctrl, rdmsr(IA_GLOBAL_CTRL)); @@ -495,7 +499,7 @@ iaf_write_pmc(int cpu, int ri, pmc_value_t v) msr = rdmsr(IAF_CTRL) & ~IAF_CTRL_MASK; wrmsr(IAF_CTRL, msr | (cc->pc_iafctrl & IAF_CTRL_MASK)); - PMCDBG(MDP,WRI,1, "iaf-write cpu=%d ri=%d msr=0x%x v=%jx iafctrl=%jx " + PMCDBG6(MDP,WRI,1, "iaf-write cpu=%d ri=%d msr=0x%x v=%jx iafctrl=%jx " "pmc=%jx", cpu, ri, IAF_RI_TO_MSR(ri), v, (uintmax_t) rdmsr(IAF_CTRL), (uintmax_t) rdpmc(IAF_RI_TO_MSR(ri))); @@ -511,7 +515,7 @@ iaf_initialize(struct pmc_mdep *md, int maxcpu, int npmc, int pmcwidth) KASSERT(md != NULL, ("[iaf,%d] md is NULL", __LINE__)); - PMCDBG(MDP,INI,1, "%s", "iaf-initialize"); + PMCDBG0(MDP,INI,1, "iaf-initialize"); pcd = &md->pmd_classdep[PMC_MDEP_CLASS_INDEX_IAF]; @@ -1806,6 +1810,10 @@ static const int niap_events = sizeof(iap_events) / sizeof(iap_events[0]); static pmc_value_t iap_perfctr_value_to_reload_count(pmc_value_t v) { + + /* If the PMC has overflowed, return a reload count of zero. */ + if ((v & (1ULL << (core_iap_width - 1))) == 0) + return (0); v &= (1ULL << core_iap_width) - 1; return (1ULL << core_iap_width) - v; } @@ -2289,7 +2297,7 @@ iap_config_pmc(int cpu, int ri, struct pmc *pm) KASSERT(ri >= 0 && ri < core_iap_npmc, ("[core,%d] illegal row-index %d", __LINE__, ri)); - PMCDBG(MDP,CFG,1, "iap-config cpu=%d ri=%d pm=%p", cpu, ri, pm); + PMCDBG3(MDP,CFG,1, "iap-config cpu=%d ri=%d pm=%p", cpu, ri, pm); KASSERT(core_pcpu[cpu] != NULL, ("[core,%d] null per-cpu %d", __LINE__, cpu)); @@ -2368,7 +2376,7 @@ iap_read_pmc(int cpu, int ri, pmc_value_t *v) else *v = tmp & ((1ULL << core_iap_width) - 1); - PMCDBG(MDP,REA,1, "iap-read cpu=%d ri=%d msr=0x%x -> v=%jx", cpu, ri, + PMCDBG4(MDP,REA,1, "iap-read cpu=%d ri=%d msr=0x%x -> v=%jx", cpu, ri, ri, *v); return (0); @@ -2379,7 +2387,7 @@ iap_release_pmc(int cpu, int ri, struct pmc *pm) { (void) pm; - PMCDBG(MDP,REL,1, "iap-release cpu=%d ri=%d pm=%p", cpu, ri, + PMCDBG3(MDP,REL,1, "iap-release cpu=%d ri=%d pm=%p", cpu, ri, pm); KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), @@ -2412,11 +2420,11 @@ iap_start_pmc(int cpu, int ri) ("[core,%d] starting cpu%d,ri%d with no pmc configured", __LINE__, cpu, ri)); - PMCDBG(MDP,STA,1, "iap-start cpu=%d ri=%d", cpu, ri); + PMCDBG2(MDP,STA,1, "iap-start cpu=%d ri=%d", cpu, ri); evsel = pm->pm_md.pm_iap.pm_iap_evsel; - PMCDBG(MDP,STA,2, "iap-start/2 cpu=%d ri=%d evselmsr=0x%x evsel=0x%x", + PMCDBG4(MDP,STA,2, "iap-start/2 cpu=%d ri=%d evselmsr=0x%x evsel=0x%x", cpu, ri, IAP_EVSEL0 + ri, evsel); /* Event specific configuration. */ @@ -2464,7 +2472,7 @@ iap_stop_pmc(int cpu, int ri) ("[core,%d] cpu%d ri%d no configured PMC to stop", __LINE__, cpu, ri)); - PMCDBG(MDP,STO,1, "iap-stop cpu=%d ri=%d", cpu, ri); + PMCDBG2(MDP,STO,1, "iap-stop cpu=%d ri=%d", cpu, ri); msr = rdmsr(IAP_EVSEL0 + ri) & ~IAP_EVSEL_MASK; wrmsr(IAP_EVSEL0 + ri, msr); /* stop hw */ @@ -2501,7 +2509,7 @@ iap_write_pmc(int cpu, int ri, pmc_value_t v) ("[core,%d] cpu%d ri%d no configured PMC to stop", __LINE__, cpu, ri)); - PMCDBG(MDP,WRI,1, "iap-write cpu=%d ri=%d msr=0x%x v=%jx", cpu, ri, + PMCDBG4(MDP,WRI,1, "iap-write cpu=%d ri=%d msr=0x%x v=%jx", cpu, ri, IAP_PMC0 + ri, v); if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) @@ -2526,7 +2534,7 @@ iap_initialize(struct pmc_mdep *md, int maxcpu, int npmc, int pmcwidth, KASSERT(md != NULL, ("[iap,%d] md is NULL", __LINE__)); - PMCDBG(MDP,INI,1, "%s", "iap-initialize"); + PMCDBG0(MDP,INI,1, "iap-initialize"); /* Remember the set of architectural events supported. */ core_architectural_events = ~flags; @@ -2564,7 +2572,7 @@ core_intr(int cpu, struct trapframe *tf) int error, found_interrupt, ri; uint64_t msr; - PMCDBG(MDP,INT, 1, "cpu=%d tf=0x%p um=%d", cpu, (void *) tf, + PMCDBG3(MDP,INT, 1, "cpu=%d tf=0x%p um=%d", cpu, (void *) tf, TRAPF_USERMODE(tf)); found_interrupt = 0; @@ -2588,7 +2596,7 @@ core_intr(int cpu, struct trapframe *tf) TRAPF_USERMODE(tf)); v = pm->pm_sc.pm_reloadcount; - v = iaf_reload_count_to_perfctr_value(v); + v = iap_reload_count_to_perfctr_value(v); /* * Stop the counter, reload it but only restart it if @@ -2623,7 +2631,7 @@ core2_intr(int cpu, struct trapframe *tf) struct core_cpu *cc; pmc_value_t v; - PMCDBG(MDP,INT, 1, "cpu=%d tf=0x%p um=%d", cpu, (void *) tf, + PMCDBG3(MDP,INT, 1, "cpu=%d tf=0x%p um=%d", cpu, (void *) tf, TRAPF_USERMODE(tf)); /* @@ -2635,7 +2643,7 @@ core2_intr(int cpu, struct trapframe *tf) intrstatus = rdmsr(IA_GLOBAL_STATUS); intrenable = intrstatus & core_pmcmask; - PMCDBG(MDP,INT, 1, "cpu=%d intrstatus=%jx", cpu, + PMCDBG2(MDP,INT, 1, "cpu=%d intrstatus=%jx", cpu, (uintmax_t) intrstatus); found_interrupt = 0; @@ -2681,7 +2689,7 @@ core2_intr(int cpu, struct trapframe *tf) /* Reload sampling count. */ wrmsr(IAF_CTR0 + n, v); - PMCDBG(MDP,INT, 1, "iaf-intr cpu=%d error=%d v=%jx(%jx)", cpu, + PMCDBG4(MDP,INT, 1, "iaf-intr cpu=%d error=%d v=%jx(%jx)", cpu, error, (uintmax_t) v, (uintmax_t) rdpmc(IAF_RI_TO_MSR(n))); } @@ -2706,7 +2714,7 @@ core2_intr(int cpu, struct trapframe *tf) v = iap_reload_count_to_perfctr_value(pm->pm_sc.pm_reloadcount); - PMCDBG(MDP,INT, 1, "iap-intr cpu=%d error=%d v=%jx", cpu, error, + PMCDBG3(MDP,INT, 1, "iap-intr cpu=%d error=%d v=%jx", cpu, error, (uintmax_t) v); /* Reload sampling count. */ @@ -2716,14 +2724,14 @@ core2_intr(int cpu, struct trapframe *tf) /* * Reenable all non-stalled PMCs. */ - PMCDBG(MDP,INT, 1, "cpu=%d intrenable=%jx", cpu, + PMCDBG2(MDP,INT, 1, "cpu=%d intrenable=%jx", cpu, (uintmax_t) intrenable); cc->pc_globalctrl |= intrenable; wrmsr(IA_GLOBAL_CTRL, cc->pc_globalctrl & IA_GLOBAL_CTRL_MASK); - PMCDBG(MDP,INT, 1, "cpu=%d fixedctrl=%jx globalctrl=%jx status=%jx " + PMCDBG5(MDP,INT, 1, "cpu=%d fixedctrl=%jx globalctrl=%jx status=%jx " "ovf=%jx", cpu, (uintmax_t) rdmsr(IAF_CTRL), (uintmax_t) rdmsr(IA_GLOBAL_CTRL), (uintmax_t) rdmsr(IA_GLOBAL_STATUS), @@ -2750,7 +2758,7 @@ pmc_core_initialize(struct pmc_mdep *md, int maxcpu, int version_override) cpuid[CORE_CPUID_EAX] & 0xFF; core_cputype = md->pmd_cputype; - PMCDBG(MDP,INI,1,"core-init cputype=%d ncpu=%d ipa-version=%d", + PMCDBG3(MDP,INI,1,"core-init cputype=%d ncpu=%d ipa-version=%d", core_cputype, maxcpu, ipa_version); if (ipa_version < 1 || ipa_version > 3 || @@ -2788,7 +2796,7 @@ pmc_core_initialize(struct pmc_mdep *md, int maxcpu, int version_override) core_pmcmask |= ((1ULL << core_iaf_npmc) - 1) << IAF_OFFSET; } - PMCDBG(MDP,INI,1,"core-init pmcmask=0x%jx iafri=%d", core_pmcmask, + PMCDBG2(MDP,INI,1,"core-init pmcmask=0x%jx iafri=%d", core_pmcmask, core_iaf_ri); core_pcpu = malloc(sizeof(*core_pcpu) * maxcpu, M_PMC, @@ -2811,7 +2819,7 @@ pmc_core_initialize(struct pmc_mdep *md, int maxcpu, int version_override) void pmc_core_finalize(struct pmc_mdep *md) { - PMCDBG(MDP,INI,1, "%s", "core-finalize"); + PMCDBG0(MDP,INI,1, "core-finalize"); free(core_pcpu, M_PMC); core_pcpu = NULL; diff --git a/sys/dev/hwpmc/hwpmc_e500.c b/sys/dev/hwpmc/hwpmc_e500.c index d81b33354ee6..d963e735cd6d 100644 --- a/sys/dev/hwpmc/hwpmc_e500.c +++ b/sys/dev/hwpmc/hwpmc_e500.c @@ -304,7 +304,7 @@ e500_read_pmc(int cpu, int ri, pmc_value_t *v) ri)); tmp = e500_pmcn_read(ri); - PMCDBG(MDP,REA,2,"ppc-read id=%d -> %jd", ri, tmp); + PMCDBG2(MDP,REA,2,"ppc-read id=%d -> %jd", ri, tmp); if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) *v = POWERPC_PERFCTR_VALUE_TO_RELOAD_COUNT(tmp); else @@ -328,7 +328,7 @@ e500_write_pmc(int cpu, int ri, pmc_value_t v) if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) v = POWERPC_RELOAD_COUNT_TO_PERFCTR_VALUE(v); - PMCDBG(MDP,WRI,1,"powerpc-write cpu=%d ri=%d v=%jx", cpu, ri, v); + PMCDBG3(MDP,WRI,1,"powerpc-write cpu=%d ri=%d v=%jx", cpu, ri, v); e500_pmcn_write(ri, v); @@ -340,7 +340,7 @@ e500_config_pmc(int cpu, int ri, struct pmc *pm) { struct pmc_hw *phw; - PMCDBG(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); + PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[powerpc,%d] illegal CPU value %d", __LINE__, cpu)); @@ -443,7 +443,7 @@ e500_pcpu_init(struct pmc_mdep *md, int cpu) KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[powerpc,%d] wrong cpu number %d", __LINE__, cpu)); - PMCDBG(MDP,INI,1,"powerpc-init cpu=%d", cpu); + PMCDBG1(MDP,INI,1,"powerpc-init cpu=%d", cpu); /* Freeze all counters. */ mtpmr(PMR_PMGC0, PMGC_FAC | PMGC_PMIE | PMGC_FCECE); @@ -543,7 +543,7 @@ e500_allocate_pmc(int cpu, int ri, struct pmc *pm, pm->pm_md.pm_powerpc.pm_powerpc_evsel = config; - PMCDBG(MDP,ALL,2,"powerpc-allocate ri=%d -> config=0x%x", ri, config); + PMCDBG2(MDP,ALL,2,"powerpc-allocate ri=%d -> config=0x%x", ri, config); return 0; } @@ -576,7 +576,7 @@ e500_intr(int cpu, struct trapframe *tf) KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[powerpc,%d] out of range CPU %d", __LINE__, cpu)); - PMCDBG(MDP,INT,1, "cpu=%d tf=%p um=%d", cpu, (void *) tf, + PMCDBG3(MDP,INT,1, "cpu=%d tf=%p um=%d", cpu, (void *) tf, TRAPF_USERMODE(tf)); retval = 0; diff --git a/sys/dev/hwpmc/hwpmc_intel.c b/sys/dev/hwpmc/hwpmc_intel.c index 486dfa01fccd..ce49f542b865 100644 --- a/sys/dev/hwpmc/hwpmc_intel.c +++ b/sys/dev/hwpmc/hwpmc_intel.c @@ -46,14 +46,14 @@ intel_switch_in(struct pmc_cpu *pc, struct pmc_process *pp) { (void) pc; - PMCDBG(MDP,SWI,1, "pc=%p pp=%p enable-msr=%d", pc, pp, + PMCDBG3(MDP,SWI,1, "pc=%p pp=%p enable-msr=%d", pc, pp, pp->pp_flags & PMC_PP_ENABLE_MSR_ACCESS); /* allow the RDPMC instruction if needed */ if (pp->pp_flags & PMC_PP_ENABLE_MSR_ACCESS) load_cr4(rcr4() | CR4_PCE); - PMCDBG(MDP,SWI,1, "cr4=0x%jx", (uintmax_t) rcr4()); + PMCDBG1(MDP,SWI,1, "cr4=0x%jx", (uintmax_t) rcr4()); return 0; } @@ -64,7 +64,7 @@ intel_switch_out(struct pmc_cpu *pc, struct pmc_process *pp) (void) pc; (void) pp; /* can be NULL */ - PMCDBG(MDP,SWO,1, "pc=%p pp=%p cr4=0x%jx", pc, pp, + PMCDBG3(MDP,SWO,1, "pc=%p pp=%p cr4=0x%jx", pc, pp, (uintmax_t) rcr4()); /* always turn off the RDPMC instruction */ @@ -83,7 +83,7 @@ pmc_intel_initialize(void) KASSERT(cpu_vendor_id == CPU_VENDOR_INTEL, ("[intel,%d] Initializing non-intel processor", __LINE__)); - PMCDBG(MDP,INI,0, "intel-initialize cpuid=0x%x", cpu_id); + PMCDBG1(MDP,INI,0, "intel-initialize cpuid=0x%x", cpu_id); cputype = -1; nclasses = 2; diff --git a/sys/dev/hwpmc/hwpmc_logging.c b/sys/dev/hwpmc/hwpmc_logging.c index 4d14011669db..cc85481a219e 100644 --- a/sys/dev/hwpmc/hwpmc_logging.c +++ b/sys/dev/hwpmc/hwpmc_logging.c @@ -211,9 +211,9 @@ pmclog_get_buffer(struct pmc_owner *po) TAILQ_REMOVE(&pmc_bufferlist, plb, plb_next); mtx_unlock_spin(&pmc_bufferlist_mtx); - PMCDBG(LOG,GTB,1, "po=%p plb=%p", po, plb); + PMCDBG2(LOG,GTB,1, "po=%p plb=%p", po, plb); -#ifdef DEBUG +#ifdef HWPMC_DEBUG if (plb) KASSERT(plb->plb_ptr == plb->plb_base && plb->plb_base < plb->plb_fence, @@ -261,7 +261,7 @@ pmclog_loop(void *arg) ownercred = crhold(p->p_ucred); PROC_UNLOCK(p); - PMCDBG(LOG,INI,1, "po=%p kt=%p", po, po->po_kthread); + PMCDBG2(LOG,INI,1, "po=%p kt=%p", po, po->po_kthread); KASSERT(po->po_kthread == curthread->td_proc, ("[pmclog,%d] proc mismatch po=%p po/kt=%p curproc=%p", __LINE__, po, po->po_kthread, curthread->td_proc)); @@ -312,7 +312,7 @@ pmclog_loop(void *arg) mtx_unlock(&pmc_kthread_mtx); /* process the request */ - PMCDBG(LOG,WRI,2, "po=%p base=%p ptr=%p", po, + PMCDBG3(LOG,WRI,2, "po=%p base=%p ptr=%p", po, lb->plb_base, lb->plb_ptr); /* change our thread's credentials before issuing the I/O */ @@ -343,7 +343,7 @@ pmclog_loop(void *arg) po->po_error = error; /* save for flush log */ - PMCDBG(LOG,WRI,2, "po=%p error=%d", po, error); + PMCDBG2(LOG,WRI,2, "po=%p error=%d", po, error); break; } @@ -403,7 +403,7 @@ pmclog_release(struct pmc_owner *po) mtx_unlock_spin(&po->po_mtx); - PMCDBG(LOG,REL,1, "po=%p", po); + PMCDBG1(LOG,REL,1, "po=%p", po); } @@ -423,7 +423,7 @@ pmclog_reserve(struct pmc_owner *po, int length) uint32_t *lh; struct timespec ts; - PMCDBG(LOG,ALL,1, "po=%p len=%d", po, length); + PMCDBG2(LOG,ALL,1, "po=%p len=%d", po, length); KASSERT(length % sizeof(uint32_t) == 0, ("[pmclog,%d] length not a multiple of word size", __LINE__)); @@ -519,7 +519,7 @@ pmclog_schedule_io(struct pmc_owner *po) ("[pmclog,%d] buffer invariants po=%p ptr=%p fenc=%p", __LINE__, po, po->po_curbuf->plb_ptr, po->po_curbuf->plb_fence)); - PMCDBG(LOG,SIO, 1, "po=%p", po); + PMCDBG1(LOG,SIO, 1, "po=%p", po); mtx_assert(&po->po_mtx, MA_OWNED); @@ -579,7 +579,7 @@ pmclog_configure_log(struct pmc_mdep *md, struct pmc_owner *po, int logfd) * the former is not held here. */ sx_assert(&pmc_sx, SA_UNLOCKED); - PMCDBG(LOG,CFG,1, "config po=%p logfd=%d", po, logfd); + PMCDBG2(LOG,CFG,1, "config po=%p logfd=%d", po, logfd); p = po->po_owner; @@ -649,7 +649,7 @@ pmclog_deconfigure_log(struct pmc_owner *po) int error; struct pmclog_buffer *lb; - PMCDBG(LOG,CFG,1, "de-config po=%p", po); + PMCDBG1(LOG,CFG,1, "de-config po=%p", po); if ((po->po_flags & PMC_PO_OWNS_LOGFILE) == 0) return (EINVAL); @@ -700,7 +700,7 @@ pmclog_flush(struct pmc_owner *po) int error; struct pmclog_buffer *lb; - PMCDBG(LOG,FLS,1, "po=%p", po); + PMCDBG1(LOG,FLS,1, "po=%p", po); /* * If there is a pending error recorded by the logger thread, @@ -741,7 +741,7 @@ int pmclog_close(struct pmc_owner *po) { - PMCDBG(LOG,CLO,1, "po=%p", po); + PMCDBG1(LOG,CLO,1, "po=%p", po); mtx_lock(&pmc_kthread_mtx); @@ -773,7 +773,7 @@ pmclog_process_callchain(struct pmc *pm, struct pmc_sample *ps) uint32_t flags; struct pmc_owner *po; - PMCDBG(LOG,SAM,1,"pm=%p pid=%d n=%d", pm, ps->ps_pid, + PMCDBG3(LOG,SAM,1,"pm=%p pid=%d n=%d", pm, ps->ps_pid, ps->ps_nsamples); recordlen = offsetof(struct pmclog_callchain, pl_pc) + @@ -843,7 +843,7 @@ pmclog_process_pmcallocate(struct pmc *pm) po = pm->pm_owner; - PMCDBG(LOG,ALL,1, "pm=%p", pm); + PMCDBG1(LOG,ALL,1, "pm=%p", pm); if (PMC_TO_CLASS(pm) == PMC_CLASS_SOFT) { PMCLOG_RESERVE(po, PMCALLOCATEDYN, @@ -874,7 +874,7 @@ pmclog_process_pmcattach(struct pmc *pm, pid_t pid, char *path) int pathlen, recordlen; struct pmc_owner *po; - PMCDBG(LOG,ATT,1,"pm=%p pid=%d", pm, pid); + PMCDBG2(LOG,ATT,1,"pm=%p pid=%d", pm, pid); po = pm->pm_owner; @@ -893,7 +893,7 @@ pmclog_process_pmcdetach(struct pmc *pm, pid_t pid) { struct pmc_owner *po; - PMCDBG(LOG,ATT,1,"!pm=%p pid=%d", pm, pid); + PMCDBG2(LOG,ATT,1,"!pm=%p pid=%d", pm, pid); po = pm->pm_owner; @@ -915,7 +915,7 @@ pmclog_process_proccsw(struct pmc *pm, struct pmc_process *pp, pmc_value_t v) KASSERT(pm->pm_flags & PMC_F_LOG_PROCCSW, ("[pmclog,%d] log-process-csw called gratuitously", __LINE__)); - PMCDBG(LOG,SWO,1,"pm=%p pid=%d v=%jx", pm, pp->pp_proc->p_pid, + PMCDBG3(LOG,SWO,1,"pm=%p pid=%d v=%jx", pm, pp->pp_proc->p_pid, v); po = pm->pm_owner; @@ -933,7 +933,7 @@ pmclog_process_procexec(struct pmc_owner *po, pmc_id_t pmid, pid_t pid, { int pathlen, recordlen; - PMCDBG(LOG,EXC,1,"po=%p pid=%d path=\"%s\"", po, pid, path); + PMCDBG3(LOG,EXC,1,"po=%p pid=%d path=\"%s\"", po, pid, path); pathlen = strlen(path) + 1; /* #bytes for the path */ recordlen = offsetof(struct pmclog_procexec, pl_pathname) + pathlen; @@ -957,7 +957,7 @@ pmclog_process_procexit(struct pmc *pm, struct pmc_process *pp) struct pmc_owner *po; ri = PMC_TO_ROWINDEX(pm); - PMCDBG(LOG,EXT,1,"pm=%p pid=%d v=%jx", pm, pp->pp_proc->p_pid, + PMCDBG3(LOG,EXT,1,"pm=%p pid=%d v=%jx", pm, pp->pp_proc->p_pid, pp->pp_pmcs[ri].pp_pmcval); po = pm->pm_owner; @@ -1003,7 +1003,7 @@ pmclog_process_userlog(struct pmc_owner *po, struct pmc_op_writelog *wl) { int error; - PMCDBG(LOG,WRI,1, "writelog po=%p ud=0x%x", po, wl->pm_userdata); + PMCDBG2(LOG,WRI,1, "writelog po=%p ud=0x%x", po, wl->pm_userdata); error = 0; diff --git a/sys/dev/hwpmc/hwpmc_mips.c b/sys/dev/hwpmc/hwpmc_mips.c index 68a81e03f2b5..72f8e89573f3 100644 --- a/sys/dev/hwpmc/hwpmc_mips.c +++ b/sys/dev/hwpmc/hwpmc_mips.c @@ -104,7 +104,7 @@ mips_allocate_pmc(int cpu, int ri, struct pmc *pm, pm->pm_md.pm_mips_evsel = config; - PMCDBG(MDP,ALL,2,"mips-allocate ri=%d -> config=0x%x", ri, config); + PMCDBG2(MDP,ALL,2,"mips-allocate ri=%d -> config=0x%x", ri, config); return 0; } @@ -123,7 +123,7 @@ mips_read_pmc(int cpu, int ri, pmc_value_t *v) pm = mips_pcpu[cpu]->pc_mipspmcs[ri].phw_pmc; tmp = mips_pmcn_read(ri); - PMCDBG(MDP,REA,2,"mips-read id=%d -> %jd", ri, tmp); + PMCDBG2(MDP,REA,2,"mips-read id=%d -> %jd", ri, tmp); if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) *v = tmp - (1UL << (mips_pmc_spec.ps_counter_width - 1)); @@ -148,7 +148,7 @@ mips_write_pmc(int cpu, int ri, pmc_value_t v) if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) v = (1UL << (mips_pmc_spec.ps_counter_width - 1)) - v; - PMCDBG(MDP,WRI,1,"mips-write cpu=%d ri=%d v=%jx", cpu, ri, v); + PMCDBG3(MDP,WRI,1,"mips-write cpu=%d ri=%d v=%jx", cpu, ri, v); mips_pmcn_write(ri, v); @@ -160,7 +160,7 @@ mips_config_pmc(int cpu, int ri, struct pmc *pm) { struct pmc_hw *phw; - PMCDBG(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); + PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[mips,%d] illegal CPU value %d", __LINE__, cpu)); @@ -376,7 +376,7 @@ mips_pcpu_init(struct pmc_mdep *md, int cpu) KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[mips,%d] wrong cpu number %d", __LINE__, cpu)); - PMCDBG(MDP,INI,1,"mips-init cpu=%d", cpu); + PMCDBG1(MDP,INI,1,"mips-init cpu=%d", cpu); mips_pcpu[cpu] = pac = malloc(sizeof(struct mips_cpu), M_PMC, M_WAITOK|M_ZERO); @@ -421,7 +421,7 @@ pmc_mips_initialize() */ mips_npmcs = 2; - PMCDBG(MDP,INI,1,"mips-init npmcs=%d", mips_npmcs); + PMCDBG1(MDP,INI,1,"mips-init npmcs=%d", mips_npmcs); /* * Allocate space for pointers to PMC HW descriptors and for diff --git a/sys/dev/hwpmc/hwpmc_mips24k.c b/sys/dev/hwpmc/hwpmc_mips24k.c index 18d7f6c19674..78415555dc19 100644 --- a/sys/dev/hwpmc/hwpmc_mips24k.c +++ b/sys/dev/hwpmc/hwpmc_mips24k.c @@ -223,7 +223,7 @@ mips_get_perfctl(int cpu, int ri, uint32_t event, uint32_t caps) if (caps & PMC_CAP_INTERRUPT) config |= MIPS24K_PMC_INTERRUPT_ENABLE; - PMCDBG(MDP,ALL,2,"mips24k-get_perfctl ri=%d -> config=0x%x", ri, config); + PMCDBG2(MDP,ALL,2,"mips24k-get_perfctl ri=%d -> config=0x%x", ri, config); return (config); } diff --git a/sys/dev/hwpmc/hwpmc_mips74k.c b/sys/dev/hwpmc/hwpmc_mips74k.c index 3a5ff3395bba..59f677da7a4d 100644 --- a/sys/dev/hwpmc/hwpmc_mips74k.c +++ b/sys/dev/hwpmc/hwpmc_mips74k.c @@ -255,7 +255,7 @@ mips_get_perfctl(int cpu, int ri, uint32_t event, uint32_t caps) if (caps & PMC_CAP_INTERRUPT) config |= MIPS74K_PMC_INTERRUPT_ENABLE; - PMCDBG(MDP,ALL,2,"mips74k-get_perfctl ri=%d -> config=0x%x", ri, config); + PMCDBG2(MDP,ALL,2,"mips74k-get_perfctl ri=%d -> config=0x%x", ri, config); return (config); } diff --git a/sys/dev/hwpmc/hwpmc_mod.c b/sys/dev/hwpmc/hwpmc_mod.c index cb8ed37a5f28..d1b56f10835c 100644 --- a/sys/dev/hwpmc/hwpmc_mod.c +++ b/sys/dev/hwpmc/hwpmc_mod.c @@ -173,7 +173,7 @@ static struct pmc_classdep **pmc_rowindex_to_classdep; * Prototypes */ -#ifdef DEBUG +#ifdef HWPMC_DEBUG static int pmc_debugflags_sysctl_handler(SYSCTL_HANDLER_ARGS); static int pmc_debugflags_parse(char *newstr, char *fence); #endif @@ -238,7 +238,7 @@ static int pmc_callchaindepth = PMC_CALLCHAIN_DEPTH; SYSCTL_INT(_kern_hwpmc, OID_AUTO, callchaindepth, CTLFLAG_RDTUN, &pmc_callchaindepth, 0, "depth of call chain records"); -#ifdef DEBUG +#ifdef HWPMC_DEBUG struct pmc_debugflags pmc_debugflags = PMC_DEBUG_DEFAULT_FLAGS; char pmc_debugstr[PMC_DEBUG_STRSIZE]; TUNABLE_STR(PMC_SYSCTL_NAME_PREFIX "debugflags", pmc_debugstr, @@ -337,7 +337,7 @@ static moduledata_t pmc_mod = { DECLARE_MODULE(pmc, pmc_mod, SI_SUB_SMP, SI_ORDER_ANY); MODULE_VERSION(pmc, PMC_VERSION); -#ifdef DEBUG +#ifdef HWPMC_DEBUG enum pmc_dbgparse_state { PMCDS_WS, /* in whitespace */ PMCDS_MAJOR, /* seen a major keyword */ @@ -651,12 +651,12 @@ pmc_ri_to_classdep(struct pmc_mdep *md, int ri, int *adjri) static void pmc_save_cpu_binding(struct pmc_binding *pb) { - PMCDBG(CPU,BND,2, "%s", "save-cpu"); + PMCDBG0(CPU,BND,2, "save-cpu"); thread_lock(curthread); pb->pb_bound = sched_is_bound(curthread); pb->pb_cpu = curthread->td_oncpu; thread_unlock(curthread); - PMCDBG(CPU,BND,2, "save-cpu cpu=%d", pb->pb_cpu); + PMCDBG1(CPU,BND,2, "save-cpu cpu=%d", pb->pb_cpu); } /* @@ -666,7 +666,7 @@ pmc_save_cpu_binding(struct pmc_binding *pb) static void pmc_restore_cpu_binding(struct pmc_binding *pb) { - PMCDBG(CPU,BND,2, "restore-cpu curcpu=%d restore=%d", + PMCDBG2(CPU,BND,2, "restore-cpu curcpu=%d restore=%d", curthread->td_oncpu, pb->pb_cpu); thread_lock(curthread); if (pb->pb_bound) @@ -674,7 +674,7 @@ pmc_restore_cpu_binding(struct pmc_binding *pb) else sched_unbind(curthread); thread_unlock(curthread); - PMCDBG(CPU,BND,2, "%s", "restore-cpu done"); + PMCDBG0(CPU,BND,2, "restore-cpu done"); } /* @@ -691,7 +691,7 @@ pmc_select_cpu(int cpu) KASSERT(pmc_cpu_is_active(cpu), ("[pmc,%d] selecting inactive " "CPU %d", __LINE__, cpu)); - PMCDBG(CPU,SEL,2, "select-cpu cpu=%d", cpu); + PMCDBG1(CPU,SEL,2, "select-cpu cpu=%d", cpu); thread_lock(curthread); sched_bind(curthread, cpu); thread_unlock(curthread); @@ -700,7 +700,7 @@ pmc_select_cpu(int cpu) ("[pmc,%d] CPU not bound [cpu=%d, curr=%d]", __LINE__, cpu, curthread->td_oncpu)); - PMCDBG(CPU,SEL,2, "select-cpu cpu=%d ok", cpu); + PMCDBG1(CPU,SEL,2, "select-cpu cpu=%d ok", cpu); } /* @@ -742,14 +742,14 @@ pmc_remove_owner(struct pmc_owner *po) sx_assert(&pmc_sx, SX_XLOCKED); - PMCDBG(OWN,ORM,1, "remove-owner po=%p", po); + PMCDBG1(OWN,ORM,1, "remove-owner po=%p", po); /* Remove descriptor from the owner hash table */ LIST_REMOVE(po, po_next); /* release all owned PMC descriptors */ LIST_FOREACH_SAFE(pm, &po->po_pmcs, pm_next, tmp) { - PMCDBG(OWN,ORM,2, "pmc=%p", pm); + PMCDBG1(OWN,ORM,2, "pmc=%p", pm); KASSERT(pm->pm_owner == po, ("[pmc,%d] owner %p != po %p", __LINE__, pm->pm_owner, po)); @@ -775,7 +775,7 @@ static void pmc_maybe_remove_owner(struct pmc_owner *po) { - PMCDBG(OWN,OMR,1, "maybe-remove-owner po=%p", po); + PMCDBG1(OWN,OMR,1, "maybe-remove-owner po=%p", po); /* * Remove owner record if @@ -813,10 +813,10 @@ pmc_link_target_process(struct pmc *pm, struct pmc_process *pp) ri = PMC_TO_ROWINDEX(pm); - PMCDBG(PRC,TLK,1, "link-target pmc=%p ri=%d pmc-process=%p", + PMCDBG3(PRC,TLK,1, "link-target pmc=%p ri=%d pmc-process=%p", pm, ri, pp); -#ifdef DEBUG +#ifdef HWPMC_DEBUG LIST_FOREACH(pt, &pm->pm_targets, pt_next) if (pt->pt_process == pp) KASSERT(0, ("[pmc,%d] pp %p already in pmc %p targets", @@ -866,7 +866,7 @@ pmc_unlink_target_process(struct pmc *pm, struct pmc_process *pp) ri = PMC_TO_ROWINDEX(pm); - PMCDBG(PRC,TUL,1, "unlink-target pmc=%p ri=%d pmc-process=%p", + PMCDBG3(PRC,TUL,1, "unlink-target pmc=%p ri=%d pmc-process=%p", pm, ri, pp); KASSERT(pp->pp_pmcs[ri].pp_pmc == pm, @@ -902,7 +902,7 @@ pmc_unlink_target_process(struct pmc *pm, struct pmc_process *pp) kern_psignal(p, SIGIO); PROC_UNLOCK(p); - PMCDBG(PRC,SIG,2, "signalling proc=%p signal=%d", p, + PMCDBG2(PRC,SIG,2, "signalling proc=%p signal=%d", p, SIGIO); } } @@ -975,7 +975,7 @@ pmc_attach_one_process(struct proc *p, struct pmc *pm) sx_assert(&pmc_sx, SX_XLOCKED); - PMCDBG(PRC,ATT,2, "attach-one pm=%p ri=%d proc=%p (%d, %s)", pm, + PMCDBG5(PRC,ATT,2, "attach-one pm=%p ri=%d proc=%p (%d, %s)", pm, PMC_TO_ROWINDEX(pm), p, p->p_pid, p->p_comm); /* @@ -1040,7 +1040,7 @@ pmc_attach_process(struct proc *p, struct pmc *pm) sx_assert(&pmc_sx, SX_XLOCKED); - PMCDBG(PRC,ATT,1, "attach pm=%p ri=%d proc=%p (%d, %s)", pm, + PMCDBG5(PRC,ATT,1, "attach pm=%p ri=%d proc=%p (%d, %s)", pm, PMC_TO_ROWINDEX(pm), p, p->p_pid, p->p_comm); @@ -1107,7 +1107,7 @@ pmc_detach_one_process(struct proc *p, struct pmc *pm, int flags) ri = PMC_TO_ROWINDEX(pm); - PMCDBG(PRC,ATT,2, "detach-one pm=%p ri=%d proc=%p (%d, %s) flags=0x%x", + PMCDBG6(PRC,ATT,2, "detach-one pm=%p ri=%d proc=%p (%d, %s) flags=0x%x", pm, ri, p, p->p_pid, p->p_comm, flags); if ((pp = pmc_find_process_descriptor(p, 0)) == NULL) @@ -1157,7 +1157,7 @@ pmc_detach_process(struct proc *p, struct pmc *pm) sx_assert(&pmc_sx, SX_XLOCKED); - PMCDBG(PRC,ATT,1, "detach pm=%p ri=%d proc=%p (%d, %s)", pm, + PMCDBG5(PRC,ATT,1, "detach pm=%p ri=%d proc=%p (%d, %s)", pm, PMC_TO_ROWINDEX(pm), p, p->p_pid, p->p_comm); if ((pm->pm_flags & PMC_F_DESCENDANTS) == 0) @@ -1228,7 +1228,7 @@ pmc_process_csw_in(struct thread *td) cpu = PCPU_GET(cpuid); /* td->td_oncpu is invalid */ - PMCDBG(CSW,SWI,1, "cpu=%d proc=%p (%d, %s) pp=%p", cpu, p, + PMCDBG5(CSW,SWI,1, "cpu=%d proc=%p (%d, %s) pp=%p", cpu, p, p->p_pid, p->p_comm, pp); KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), @@ -1295,7 +1295,7 @@ pmc_process_csw_in(struct thread *td) mtx_pool_unlock_spin(pmc_mtxpool, pm); } - PMCDBG(CSW,SWI,1,"cpu=%d ri=%d new=%jd", cpu, ri, newvalue); + PMCDBG3(CSW,SWI,1,"cpu=%d ri=%d new=%jd", cpu, ri, newvalue); pcd->pcd_write_pmc(cpu, adjri, newvalue); pcd->pcd_start_pmc(cpu, adjri); @@ -1356,7 +1356,7 @@ pmc_process_csw_out(struct thread *td) cpu = PCPU_GET(cpuid); /* td->td_oncpu is invalid */ - PMCDBG(CSW,SWO,1, "cpu=%d proc=%p (%d, %s) pp=%p", cpu, p, + PMCDBG5(CSW,SWO,1, "cpu=%d proc=%p (%d, %s) pp=%p", cpu, p, p->p_pid, p->p_comm, pp); KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), @@ -1418,7 +1418,7 @@ pmc_process_csw_out(struct thread *td) tmp = newvalue - PMC_PCPU_SAVED(cpu,ri); - PMCDBG(CSW,SWO,1,"cpu=%d ri=%d tmp=%jd", cpu, ri, + PMCDBG3(CSW,SWO,1,"cpu=%d ri=%d tmp=%jd", cpu, ri, tmp); if (mode == PMC_MODE_TS) { @@ -1435,7 +1435,7 @@ pmc_process_csw_out(struct thread *td) tmp += pm->pm_sc.pm_reloadcount; mtx_pool_lock_spin(pmc_mtxpool, pm); pp->pp_pmcs[ri].pp_pmcval -= tmp; - if ((int64_t) pp->pp_pmcs[ri].pp_pmcval < 0) + if ((int64_t) pp->pp_pmcs[ri].pp_pmcval <= 0) pp->pp_pmcs[ri].pp_pmcval += pm->pm_sc.pm_reloadcount; mtx_pool_unlock_spin(pmc_mtxpool, pm); @@ -1575,7 +1575,7 @@ pmc_log_kernel_mappings(struct pmc *pm) */ kmbase = linker_hwpmc_list_objects(); for (km = kmbase; km->pm_file != NULL; km++) { - PMCDBG(LOG,REG,1,"%s %p", (char *) km->pm_file, + PMCDBG2(LOG,REG,1,"%s %p", (char *) km->pm_file, (void *) km->pm_address); pmclog_process_map_in(po, (pid_t) -1, km->pm_address, km->pm_file); @@ -1616,7 +1616,7 @@ pmc_log_process_mappings(struct pmc_owner *po, struct proc *p) for (entry = map->header.next; entry != &map->header; entry = entry->next) { if (entry == NULL) { - PMCDBG(LOG,OPS,2, "hwpmc: vm_map entry unexpectedly " + PMCDBG2(LOG,OPS,2, "hwpmc: vm_map entry unexpectedly " "NULL! pid=%d vm_map=%p\n", p->p_pid, map); break; } @@ -1649,7 +1649,7 @@ pmc_log_process_mappings(struct pmc_owner *po, struct proc *p) * At this point lobj is the base vm_object and it is locked. */ if (lobj == NULL) { - PMCDBG(LOG,OPS,2, "hwpmc: lobj unexpectedly NULL! pid=%d " + PMCDBG3(LOG,OPS,2, "hwpmc: lobj unexpectedly NULL! pid=%d " "vm_map=%p vm_obj=%p\n", p->p_pid, map, obj); VM_OBJECT_RUNLOCK(obj); continue; @@ -1784,7 +1784,7 @@ pmc_log_all_process_mappings(struct pmc_owner *po) */ -#ifdef DEBUG +#ifdef HWPMC_DEBUG const char *pmc_hooknames[] = { /* these strings correspond to PMC_FN_* in */ "", @@ -1806,7 +1806,7 @@ static int pmc_hook_handler(struct thread *td, int function, void *arg) { - PMCDBG(MOD,PMH,1, "hook td=%p func=%d \"%s\" arg=%p", td, function, + PMCDBG4(MOD,PMH,1, "hook td=%p func=%d \"%s\" arg=%p", td, function, pmc_hooknames[function], arg); switch (function) @@ -1889,7 +1889,7 @@ pmc_hook_handler(struct thread *td, int function, void *arg) free(freepath, M_TEMP); - PMCDBG(PRC,EXC,1, "exec proc=%p (%d, %s) cred-changed=%d", + PMCDBG4(PRC,EXC,1, "exec proc=%p (%d, %s) cred-changed=%d", p, p->p_pid, p->p_comm, pk->pm_credentialschanged); if (pk->pm_credentialschanged == 0) /* no change */ @@ -2002,7 +2002,7 @@ pmc_hook_handler(struct thread *td, int function, void *arg) break; default: -#ifdef DEBUG +#ifdef HWPMC_DEBUG KASSERT(0, ("[pmc,%d] unknown hook %d\n", __LINE__, function)); #endif break; @@ -2034,7 +2034,7 @@ pmc_allocate_owner_descriptor(struct proc *p) TAILQ_INIT(&po->po_logbuffers); mtx_init(&po->po_mtx, "pmc-owner-mtx", "pmc-per-proc", MTX_SPIN); - PMCDBG(OWN,ALL,1, "allocate-owner proc=%p (%d, %s) pmc-owner=%p", + PMCDBG4(OWN,ALL,1, "allocate-owner proc=%p (%d, %s) pmc-owner=%p", p, p->p_pid, p->p_comm, po); return po; @@ -2044,7 +2044,7 @@ static void pmc_destroy_owner_descriptor(struct pmc_owner *po) { - PMCDBG(OWN,REL,1, "destroy-owner po=%p proc=%p (%d, %s)", + PMCDBG4(OWN,REL,1, "destroy-owner po=%p proc=%p (%d, %s)", po, po->po_owner, po->po_owner->p_pid, po->po_owner->p_comm); mtx_destroy(&po->po_mtx); @@ -2135,7 +2135,7 @@ pmc_find_owner_descriptor(struct proc *p) if (po->po_owner == p) break; - PMCDBG(OWN,FND,1, "find-owner proc=%p (%d, %s) hindex=0x%x -> " + PMCDBG5(OWN,FND,1, "find-owner proc=%p (%d, %s) hindex=0x%x -> " "pmc-owner=%p", p, p->p_pid, p->p_comm, hindex, po); return po; @@ -2155,7 +2155,7 @@ pmc_allocate_pmc_descriptor(void) pmc = malloc(sizeof(struct pmc), M_PMC, M_WAITOK|M_ZERO); - PMCDBG(PMC,ALL,1, "allocate-pmc -> pmc=%p", pmc); + PMCDBG1(PMC,ALL,1, "allocate-pmc -> pmc=%p", pmc); return pmc; } @@ -2185,7 +2185,7 @@ pmc_destroy_pmc_descriptor(struct pmc *pm) static void pmc_wait_for_pmc_idle(struct pmc *pm) { -#ifdef DEBUG +#ifdef HWPMC_DEBUG volatile int maxloop; maxloop = 100 * pmc_cpu_max(); @@ -2195,7 +2195,7 @@ pmc_wait_for_pmc_idle(struct pmc *pm) * comes down to zero. */ while (atomic_load_acq_32(&pm->pm_runcount) > 0) { -#ifdef DEBUG +#ifdef HWPMC_DEBUG maxloop--; KASSERT(maxloop > 0, ("[pmc,%d] (ri%d, rc%d) waiting too long for " @@ -2238,7 +2238,7 @@ pmc_release_pmc_descriptor(struct pmc *pm) pcd = pmc_ri_to_classdep(md, ri, &adjri); mode = PMC_TO_MODE(pm); - PMCDBG(PMC,REL,1, "release-pmc pmc=%p ri=%d mode=%d", pm, ri, + PMCDBG3(PMC,REL,1, "release-pmc pmc=%p ri=%d mode=%d", pm, ri, mode); /* @@ -2266,14 +2266,14 @@ pmc_release_pmc_descriptor(struct pmc *pm) KASSERT(phw->phw_pmc == pm, ("[pmc, %d] pmc ptr ri(%d) hw(%p) pm(%p)", __LINE__, ri, phw->phw_pmc, pm)); - PMCDBG(PMC,REL,2, "stopping cpu=%d ri=%d", cpu, ri); + PMCDBG2(PMC,REL,2, "stopping cpu=%d ri=%d", cpu, ri); critical_enter(); pcd->pcd_stop_pmc(cpu, adjri); critical_exit(); } - PMCDBG(PMC,REL,2, "decfg cpu=%d ri=%d", cpu, ri); + PMCDBG2(PMC,REL,2, "decfg cpu=%d ri=%d", cpu, ri); critical_enter(); pcd->pcd_config_pmc(cpu, adjri, NULL); @@ -2329,7 +2329,7 @@ pmc_release_pmc_descriptor(struct pmc *pm) pp = ptgt->pt_process; pmc_unlink_target_process(pm, pp); /* frees 'ptgt' */ - PMCDBG(PMC,REL,3, "pp->refcnt=%d", pp->pp_refcnt); + PMCDBG1(PMC,REL,3, "pp->refcnt=%d", pp->pp_refcnt); /* * If the target process record shows that no @@ -2395,7 +2395,7 @@ pmc_register_owner(struct proc *p, struct pmc *pmc) if (po->po_flags & PMC_PO_OWNS_LOGFILE) pmclog_process_pmcallocate(pmc); - PMCDBG(PMC,REG,1, "register-owner pmc-owner=%p pmc=%p", + PMCDBG2(PMC,REG,1, "register-owner pmc-owner=%p pmc=%p", po, pmc); return 0; @@ -2433,7 +2433,7 @@ pmc_can_allocate_rowindex(struct proc *p, unsigned int ri, int cpu) struct pmc_owner *po; struct pmc_process *pp; - PMCDBG(PMC,ALR,1, "can-allocate-rowindex proc=%p (%d, %s) ri=%d " + PMCDBG5(PMC,ALR,1, "can-allocate-rowindex proc=%p (%d, %s) ri=%d " "cpu=%d", p, p->p_pid, p->p_comm, ri, cpu); /* @@ -2463,7 +2463,7 @@ pmc_can_allocate_rowindex(struct proc *p, unsigned int ri, int cpu) if (pp->pp_pmcs[ri].pp_pmc) return EEXIST; - PMCDBG(PMC,ALR,2, "can-allocate-rowindex proc=%p (%d, %s) ri=%d ok", + PMCDBG4(PMC,ALR,2, "can-allocate-rowindex proc=%p (%d, %s) ri=%d ok", p, p->p_pid, p->p_comm, ri); return 0; @@ -2481,7 +2481,7 @@ pmc_can_allocate_row(int ri, enum pmc_mode mode) sx_assert(&pmc_sx, SX_XLOCKED); - PMCDBG(PMC,ALR,1, "can-allocate-row ri=%d mode=%d", ri, mode); + PMCDBG2(PMC,ALR,1, "can-allocate-row ri=%d mode=%d", ri, mode); if (PMC_IS_SYSTEM_MODE(mode)) disp = PMC_DISP_STANDALONE; @@ -2508,7 +2508,7 @@ pmc_can_allocate_row(int ri, enum pmc_mode mode) * All OK */ - PMCDBG(PMC,ALR,2, "can-allocate-row ri=%d mode=%d ok", ri, mode); + PMCDBG2(PMC,ALR,2, "can-allocate-row ri=%d mode=%d ok", ri, mode); return 0; @@ -2541,7 +2541,7 @@ pmc_find_pmc(pmc_id_t pmcid, struct pmc **pmc) struct pmc *pm; struct pmc_owner *po; - PMCDBG(PMC,FND,1, "find-pmc id=%d", pmcid); + PMCDBG1(PMC,FND,1, "find-pmc id=%d", pmcid); if ((po = pmc_find_owner_descriptor(curthread->td_proc)) == NULL) return ESRCH; @@ -2549,7 +2549,7 @@ pmc_find_pmc(pmc_id_t pmcid, struct pmc **pmc) if ((pm = pmc_find_pmc_descriptor_in_process(po, pmcid)) == NULL) return EINVAL; - PMCDBG(PMC,FND,2, "find-pmc id=%d -> pmc=%p", pmcid, pm); + PMCDBG2(PMC,FND,2, "find-pmc id=%d -> pmc=%p", pmcid, pm); *pmc = pm; return 0; @@ -2577,7 +2577,7 @@ pmc_start(struct pmc *pm) error = 0; - PMCDBG(PMC,OPS,1, "start pmc=%p mode=%d ri=%d", pm, mode, ri); + PMCDBG3(PMC,OPS,1, "start pmc=%p mode=%d ri=%d", pm, mode, ri); po = pm->pm_owner; @@ -2633,7 +2633,7 @@ pmc_start(struct pmc *pm) if (po->po_sscount == 0) { LIST_INSERT_HEAD(&pmc_ss_owners, po, po_ssnext); atomic_add_rel_int(&pmc_ss_count, 1); - PMCDBG(PMC,OPS,1, "po=%p in global list", po); + PMCDBG1(PMC,OPS,1, "po=%p in global list", po); } po->po_sscount++; @@ -2696,7 +2696,7 @@ pmc_stop(struct pmc *pm) KASSERT(pm != NULL, ("[pmc,%d] null pmc", __LINE__)); - PMCDBG(PMC,OPS,1, "stop pmc=%p mode=%d ri=%d", pm, + PMCDBG3(PMC,OPS,1, "stop pmc=%p mode=%d ri=%d", pm, PMC_TO_MODE(pm), PMC_TO_ROWINDEX(pm)); pm->pm_state = PMC_STATE_STOPPED; @@ -2751,7 +2751,7 @@ pmc_stop(struct pmc *pm) if (po->po_sscount == 0) { atomic_subtract_rel_int(&pmc_ss_count, 1); LIST_REMOVE(po, po_ssnext); - PMCDBG(PMC,OPS,2,"po=%p removed from global list", po); + PMCDBG1(PMC,OPS,2,"po=%p removed from global list", po); } } @@ -2759,7 +2759,7 @@ pmc_stop(struct pmc *pm) } -#ifdef DEBUG +#ifdef HWPMC_DEBUG static const char *pmc_op_to_name[] = { #undef __PMC_OP #define __PMC_OP(N, D) #N , @@ -2804,7 +2804,7 @@ pmc_syscall_handler(struct thread *td, void *syscall_args) op = c->pmop_code; arg = c->pmop_data; - PMCDBG(MOD,PMS,1, "syscall op=%d \"%s\" arg=%p", op, + PMCDBG3(MOD,PMS,1, "syscall op=%d \"%s\" arg=%p", op, pmc_op_to_name[op], arg); error = 0; @@ -3317,7 +3317,7 @@ pmc_syscall_handler(struct thread *td, void *syscall_args) break; } - PMCDBG(PMC,ALL,2, "event=%d caps=0x%x mode=%d cpu=%d", + PMCDBG4(PMC,ALL,2, "event=%d caps=0x%x mode=%d cpu=%d", pa.pm_ev, caps, mode, cpu); pmc = pmc_allocate_pmc_descriptor(); @@ -3379,7 +3379,7 @@ pmc_syscall_handler(struct thread *td, void *syscall_args) /* Fill in the correct value in the ID field */ pmc->pm_id = PMC_ID_MAKE_ID(cpu,mode,pa.pm_class,n); - PMCDBG(PMC,ALL,2, "ev=%d class=%d mode=%d n=%d -> pmcid=%x", + PMCDBG5(PMC,ALL,2, "ev=%d class=%d mode=%d n=%d -> pmcid=%x", pmc->pm_event, pa.pm_class, mode, n, pmc->pm_id); /* Process mode PMCs with logging enabled need log files */ @@ -3702,7 +3702,7 @@ pmc_syscall_handler(struct thread *td, void *syscall_args) break; ri = 0; - PMCDBG(PMC,OPS,1, "rw id=%d flags=0x%x", prw.pm_pmcid, + PMCDBG2(PMC,OPS,1, "rw id=%d flags=0x%x", prw.pm_pmcid, prw.pm_flags); /* must have at least one flag set */ @@ -3798,12 +3798,12 @@ pmc_syscall_handler(struct thread *td, void *syscall_args) pprw = (struct pmc_op_pmcrw *) arg; -#ifdef DEBUG +#ifdef HWPMC_DEBUG if (prw.pm_flags & PMC_F_NEWVALUE) - PMCDBG(PMC,OPS,2, "rw id=%d new %jx -> old %jx", + PMCDBG3(PMC,OPS,2, "rw id=%d new %jx -> old %jx", ri, prw.pm_value, oldvalue); else if (prw.pm_flags & PMC_F_OLDVALUE) - PMCDBG(PMC,OPS,2, "rw id=%d -> old %jx", ri, oldvalue); + PMCDBG2(PMC,OPS,2, "rw id=%d -> old %jx", ri, oldvalue); #endif /* return old value if requested */ @@ -4046,7 +4046,7 @@ pmc_process_interrupt(int cpu, int ring, struct pmc *pm, struct trapframe *tf, if (ps->ps_nsamples) { /* in use, reader hasn't caught up */ pm->pm_stalled = 1; atomic_add_int(&pmc_stats.pm_intr_bufferfull, 1); - PMCDBG(SAM,INT,1,"(spc) cpu=%d pm=%p tf=%p um=%d wr=%d rd=%d", + PMCDBG6(SAM,INT,1,"(spc) cpu=%d pm=%p tf=%p um=%d wr=%d rd=%d", cpu, pm, (void *) tf, inuserspace, (int) (psb->ps_write - psb->ps_samples), (int) (psb->ps_read - psb->ps_samples)); @@ -4056,7 +4056,7 @@ pmc_process_interrupt(int cpu, int ring, struct pmc *pm, struct trapframe *tf, /* Fill in entry. */ - PMCDBG(SAM,INT,1,"cpu=%d pm=%p tf=%p um=%d wr=%d rd=%d", cpu, pm, + PMCDBG6(SAM,INT,1,"cpu=%d pm=%p tf=%p um=%d wr=%d rd=%d", cpu, pm, (void *) tf, inuserspace, (int) (psb->ps_write - psb->ps_samples), (int) (psb->ps_read - psb->ps_samples)); @@ -4239,7 +4239,7 @@ pmc_process_samples(int cpu, int ring) break; } - PMCDBG(SAM,OPS,1,"cpu=%d pm=%p n=%d fl=%x wr=%d rd=%d", cpu, + PMCDBG6(SAM,OPS,1,"cpu=%d pm=%p n=%d fl=%x wr=%d rd=%d", cpu, pm, ps->ps_nsamples, ps->ps_flags, (int) (psb->ps_write - psb->ps_samples), (int) (psb->ps_read - psb->ps_samples)); @@ -4355,7 +4355,7 @@ pmc_process_exit(void *arg __unused, struct proc *p) return; PMC_GET_SX_XLOCK(); - PMCDBG(PRC,EXT,1,"process-exit proc=%p (%d, %s)", p, p->p_pid, + PMCDBG3(PRC,EXT,1,"process-exit proc=%p (%d, %s)", p, p->p_pid, p->p_comm); /* @@ -4370,7 +4370,7 @@ pmc_process_exit(void *arg __unused, struct proc *p) * entry from our target process hash table, using * PMC_FLAG_REMOVE. */ - PMCDBG(PRC,EXT,1, "process-exit proc=%p (%d, %s)", p, p->p_pid, + PMCDBG3(PRC,EXT,1, "process-exit proc=%p (%d, %s)", p, p->p_pid, p->p_comm); critical_enter(); /* no preemption */ @@ -4380,7 +4380,7 @@ pmc_process_exit(void *arg __unused, struct proc *p) if ((pp = pmc_find_process_descriptor(p, PMC_FLAG_REMOVE)) != NULL) { - PMCDBG(PRC,EXT,2, + PMCDBG2(PRC,EXT,2, "process-exit proc=%p pmc-process=%p", p, pp); /* @@ -4403,13 +4403,13 @@ pmc_process_exit(void *arg __unused, struct proc *p) (void) (*pcd->pcd_get_config)(cpu, adjri, &pm); - PMCDBG(PRC,EXT,2, "ri=%d pm=%p", ri, pm); + PMCDBG2(PRC,EXT,2, "ri=%d pm=%p", ri, pm); if (pm == NULL || !PMC_IS_VIRTUAL_MODE(PMC_TO_MODE(pm))) continue; - PMCDBG(PRC,EXT,2, "ppmcs[%d]=%p pm=%p " + PMCDBG4(PRC,EXT,2, "ppmcs[%d]=%p pm=%p " "state=%d", ri, pp->pp_pmcs[ri].pp_pmc, pm, pm->pm_state); @@ -4525,7 +4525,7 @@ pmc_process_fork(void *arg __unused, struct proc *p1, struct proc *newproc, return; PMC_GET_SX_XLOCK(); - PMCDBG(PMC,FRK,1, "process-fork proc=%p (%d, %s) -> %p", p1, + PMCDBG4(PMC,FRK,1, "process-fork proc=%p (%d, %s) -> %p", p1, p1->p_pid, p1->p_comm, newproc); /* @@ -4625,12 +4625,20 @@ pmc_kld_unload(void *arg __unused, const char *filename __unused, /* * initialization */ +static const char * +pmc_name_of_pmcclass(enum pmc_class class) +{ -static const char *pmc_name_of_pmcclass[] = { + switch (class) { #undef __PMC_CLASS -#define __PMC_CLASS(N) #N , - __PMC_CLASSES() -}; +#define __PMC_CLASS(S,V,D) \ + case PMC_CLASS_##S: \ + return #S; + __PMC_CLASSES(); + default: + return (""); + } +} /* * Base class initializer: allocate structure and set default classes. @@ -4712,7 +4720,7 @@ pmc_initialize(void) md = NULL; error = 0; -#ifdef DEBUG +#ifdef HWPMC_DEBUG /* parse debug flags first */ if (TUNABLE_STR_FETCH(PMC_SYSCTL_NAME_PREFIX "debugflags", pmc_debugstr, sizeof(pmc_debugstr))) @@ -4720,7 +4728,7 @@ pmc_initialize(void) pmc_debugstr+strlen(pmc_debugstr)); #endif - PMCDBG(MOD,INI,0, "PMC Initialize (version %x)", PMC_VERSION); + PMCDBG1(MOD,INI,0, "PMC Initialize (version %x)", PMC_VERSION); /* check kernel version */ if (pmc_kernel_version != PMC_VERSION) { @@ -4881,7 +4889,7 @@ pmc_initialize(void) pmc_mtxpool = mtx_pool_create("pmc-leaf", pmc_mtxpool_size, MTX_SPIN); - PMCDBG(MOD,INI,1, "pmc_ownerhash=%p, mask=0x%lx " + PMCDBG4(MOD,INI,1, "pmc_ownerhash=%p, mask=0x%lx " "targethash=%p mask=0x%lx", pmc_ownerhash, pmc_ownerhashmask, pmc_processhash, pmc_processhashmask); @@ -4909,7 +4917,7 @@ pmc_initialize(void) for (n = 0; n < (int) md->pmd_nclass; n++) { pcd = &md->pmd_classdep[n]; printf(" %s/%d/%d/0x%b", - pmc_name_of_pmcclass[pcd->pcd_class], + pmc_name_of_pmcclass(pcd->pcd_class), pcd->pcd_num, pcd->pcd_width, pcd->pcd_caps, @@ -4933,11 +4941,11 @@ pmc_cleanup(void) struct pmc_ownerhash *ph; struct pmc_owner *po, *tmp; struct pmc_binding pb; -#ifdef DEBUG +#ifdef HWPMC_DEBUG struct pmc_processhash *prh; #endif - PMCDBG(MOD,INI,0, "%s", "cleanup"); + PMCDBG0(MOD,INI,0, "cleanup"); /* switch off sampling */ CPU_ZERO(&pmc_cpumask); @@ -4966,7 +4974,7 @@ pmc_cleanup(void) pmc_remove_owner(po); /* send SIGBUS to owner processes */ - PMCDBG(MOD,INI,2, "cleanup signal proc=%p " + PMCDBG3(MOD,INI,2, "cleanup signal proc=%p " "(%d, %s)", po->po_owner, po->po_owner->p_pid, po->po_owner->p_comm); @@ -4985,15 +4993,15 @@ pmc_cleanup(void) mtx_destroy(&pmc_processhash_mtx); if (pmc_processhash) { -#ifdef DEBUG +#ifdef HWPMC_DEBUG struct pmc_process *pp; - PMCDBG(MOD,INI,3, "%s", "destroy process hash"); + PMCDBG0(MOD,INI,3, "destroy process hash"); for (prh = pmc_processhash; prh <= &pmc_processhash[pmc_processhashmask]; prh++) LIST_FOREACH(pp, prh, pp_next) - PMCDBG(MOD,INI,3, "pid=%d", pp->pp_proc->p_pid); + PMCDBG1(MOD,INI,3, "pid=%d", pp->pp_proc->p_pid); #endif hashdestroy(pmc_processhash, M_PMC, pmc_processhashmask); @@ -5001,7 +5009,7 @@ pmc_cleanup(void) } if (pmc_ownerhash) { - PMCDBG(MOD,INI,3, "%s", "destroy owner hash"); + PMCDBG0(MOD,INI,3, "destroy owner hash"); hashdestroy(pmc_ownerhash, M_PMC, pmc_ownerhashmask); pmc_ownerhash = NULL; } @@ -5014,11 +5022,11 @@ pmc_cleanup(void) /* do processor and pmc-class dependent cleanup */ maxcpu = pmc_cpu_max(); - PMCDBG(MOD,INI,3, "%s", "md cleanup"); + PMCDBG0(MOD,INI,3, "md cleanup"); if (md) { pmc_save_cpu_binding(&pb); for (cpu = 0; cpu < maxcpu; cpu++) { - PMCDBG(MOD,INI,1,"pmc-cleanup cpu=%d pcs=%p", + PMCDBG2(MOD,INI,1,"pmc-cleanup cpu=%d pcs=%p", cpu, pmc_pcpu[cpu]); if (!pmc_cpu_is_active(cpu) || pmc_pcpu[cpu] == NULL) continue; @@ -5094,7 +5102,7 @@ load (struct module *module __unused, int cmd, void *arg __unused) error = pmc_initialize(); if (error != 0) break; - PMCDBG(MOD,INI,1, "syscall=%d maxcpu=%d", + PMCDBG2(MOD,INI,1, "syscall=%d maxcpu=%d", pmc_syscall_num, pmc_cpu_max()); break; @@ -5102,7 +5110,7 @@ load (struct module *module __unused, int cmd, void *arg __unused) case MOD_UNLOAD : case MOD_SHUTDOWN: pmc_cleanup(); - PMCDBG(MOD,INI,1, "%s", "unloaded"); + PMCDBG0(MOD,INI,1, "unloaded"); break; default : diff --git a/sys/dev/hwpmc/hwpmc_mpc7xxx.c b/sys/dev/hwpmc/hwpmc_mpc7xxx.c index eaa440e2fbc5..296bd372a170 100644 --- a/sys/dev/hwpmc/hwpmc_mpc7xxx.c +++ b/sys/dev/hwpmc/hwpmc_mpc7xxx.c @@ -384,7 +384,7 @@ mpc7xxx_read_pmc(int cpu, int ri, pmc_value_t *v) ri)); tmp = mpc7xxx_pmcn_read(ri); - PMCDBG(MDP,REA,2,"ppc-read id=%d -> %jd", ri, tmp); + PMCDBG2(MDP,REA,2,"ppc-read id=%d -> %jd", ri, tmp); if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) *v = POWERPC_PERFCTR_VALUE_TO_RELOAD_COUNT(tmp); else @@ -408,7 +408,7 @@ mpc7xxx_write_pmc(int cpu, int ri, pmc_value_t v) if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) v = POWERPC_RELOAD_COUNT_TO_PERFCTR_VALUE(v); - PMCDBG(MDP,WRI,1,"powerpc-write cpu=%d ri=%d v=%jx", cpu, ri, v); + PMCDBG3(MDP,WRI,1,"powerpc-write cpu=%d ri=%d v=%jx", cpu, ri, v); mpc7xxx_pmcn_write(ri, v); @@ -420,7 +420,7 @@ mpc7xxx_config_pmc(int cpu, int ri, struct pmc *pm) { struct pmc_hw *phw; - PMCDBG(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); + PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[powerpc,%d] illegal CPU value %d", __LINE__, cpu)); @@ -559,7 +559,7 @@ mpc7xxx_pcpu_init(struct pmc_mdep *md, int cpu) KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[powerpc,%d] wrong cpu number %d", __LINE__, cpu)); - PMCDBG(MDP,INI,1,"powerpc-init cpu=%d", cpu); + PMCDBG1(MDP,INI,1,"powerpc-init cpu=%d", cpu); powerpc_pcpu[cpu] = pac = malloc(sizeof(struct powerpc_cpu), M_PMC, M_WAITOK|M_ZERO); @@ -638,7 +638,7 @@ mpc7xxx_allocate_pmc(int cpu, int ri, struct pmc *pm, pm->pm_md.pm_powerpc.pm_powerpc_evsel = config; - PMCDBG(MDP,ALL,2,"powerpc-allocate ri=%d -> config=0x%x", ri, config); + PMCDBG2(MDP,ALL,2,"powerpc-allocate ri=%d -> config=0x%x", ri, config); return 0; } @@ -671,7 +671,7 @@ mpc7xxx_intr(int cpu, struct trapframe *tf) KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[powerpc,%d] out of range CPU %d", __LINE__, cpu)); - PMCDBG(MDP,INT,1, "cpu=%d tf=%p um=%d", cpu, (void *) tf, + PMCDBG3(MDP,INT,1, "cpu=%d tf=%p um=%d", cpu, (void *) tf, TRAPF_USERMODE(tf)); retval = 0; diff --git a/sys/dev/hwpmc/hwpmc_octeon.c b/sys/dev/hwpmc/hwpmc_octeon.c index 824a7b0d9367..b614573a5c62 100644 --- a/sys/dev/hwpmc/hwpmc_octeon.c +++ b/sys/dev/hwpmc/hwpmc_octeon.c @@ -189,7 +189,8 @@ mips_get_perfctl(int cpu, int ri, uint32_t event, uint32_t caps) if (caps & PMC_CAP_INTERRUPT) control.s.ie = 1; - PMCDBG(MDP,ALL,2,"mips-allocate ri=%d -> config=0x%x", ri, control.u32); + PMCDBG2(MDP,ALL,2,"mips-allocate ri=%d -> config=0x%x", ri, + control.u32); return (control.u32); } diff --git a/sys/dev/hwpmc/hwpmc_piv.c b/sys/dev/hwpmc/hwpmc_piv.c index ff47cb89a2fe..872ad891485a 100644 --- a/sys/dev/hwpmc/hwpmc_piv.c +++ b/sys/dev/hwpmc/hwpmc_piv.c @@ -563,7 +563,7 @@ p4_pcpu_init(struct pmc_mdep *md, int cpu) KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[p4,%d] insane cpu number %d", __LINE__, cpu)); - PMCDBG(MDP,INI,0, "p4-init cpu=%d is-primary=%d", cpu, + PMCDBG2(MDP,INI,0, "p4-init cpu=%d is-primary=%d", cpu, pmc_cpu_is_primary(cpu) != 0); first_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_P4].pcd_ri; @@ -590,7 +590,7 @@ p4_pcpu_init(struct pmc_mdep *md, int cpu) KASSERT(plc != pc, ("[p4,%d] per-cpu config error", __LINE__)); - PMCDBG(MDP,INI,1, "p4-init cpu=%d phycpu=%d pc=%p", cpu, + PMCDBG3(MDP,INI,1, "p4-init cpu=%d phycpu=%d pc=%p", cpu, phycpu, pc); KASSERT(pc, ("[p4,%d] Null Per-Cpu state cpu=%d phycpu=%d", __LINE__, cpu, phycpu)); @@ -642,7 +642,7 @@ p4_pcpu_fini(struct pmc_mdep *md, int cpu) struct p4_cpu *p4c; struct pmc_cpu *pc; - PMCDBG(MDP,INI,0, "p4-cleanup cpu=%d", cpu); + PMCDBG1(MDP,INI,0, "p4-cleanup cpu=%d", cpu); pc = pmc_pcpu[cpu]; first_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_P4].pcd_ri; @@ -702,7 +702,7 @@ p4_read_pmc(int cpu, int ri, pmc_value_t *v) mode = PMC_TO_MODE(pm); - PMCDBG(MDP,REA,1, "p4-read cpu=%d ri=%d mode=%d", cpu, ri, mode); + PMCDBG3(MDP,REA,1, "p4-read cpu=%d ri=%d mode=%d", cpu, ri, mode); KASSERT(pd->pm_descr.pd_class == PMC_CLASS_P4, ("[p4,%d] unknown PMC class %d", __LINE__, pd->pm_descr.pd_class)); @@ -723,7 +723,7 @@ p4_read_pmc(int cpu, int ri, pmc_value_t *v) else *v = tmp; - PMCDBG(MDP,REA,2, "p4-read -> %jx", *v); + PMCDBG1(MDP,REA,2, "p4-read -> %jx", *v); return (0); } @@ -757,7 +757,7 @@ p4_write_pmc(int cpu, int ri, pmc_value_t v) mode = PMC_TO_MODE(pm); - PMCDBG(MDP,WRI,1, "p4-write cpu=%d ri=%d mode=%d v=%jx", cpu, ri, + PMCDBG4(MDP,WRI,1, "p4-write cpu=%d ri=%d mode=%d v=%jx", cpu, ri, mode, v); /* @@ -800,7 +800,7 @@ p4_config_pmc(int cpu, int ri, struct pmc *pm) KASSERT(ri >= 0 && ri < P4_NPMCS, ("[p4,%d] illegal row-index %d", __LINE__, ri)); - PMCDBG(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); + PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); pc = p4_pcpu[P4_TO_HTT_PRIMARY(cpu)]; phw = &pc->pc_p4pmcs[ri]; @@ -930,7 +930,7 @@ p4_allocate_pmc(int cpu, int ri, struct pmc *pm, pd = &p4_pmcdesc[ri]; - PMCDBG(MDP,ALL,1, "p4-allocate ri=%d class=%d pmccaps=0x%x " + PMCDBG4(MDP,ALL,1, "p4-allocate ri=%d class=%d pmccaps=0x%x " "reqcaps=0x%x", ri, pd->pm_descr.pd_class, pd->pm_descr.pd_caps, pm->pm_caps); @@ -965,7 +965,7 @@ p4_allocate_pmc(int cpu, int ri, struct pmc *pm, if ((pevent = p4_find_event(pm->pm_event)) == NULL) return (ESRCH); - PMCDBG(MDP,ALL,2, "pevent={ev=%d,escrsel=0x%x,cccrsel=0x%x,isti=%d}", + PMCDBG4(MDP,ALL,2, "pevent={ev=%d,escrsel=0x%x,cccrsel=0x%x,isti=%d}", pevent->pm_event, pevent->pm_escr_eventselect, pevent->pm_cccr_select, pevent->pm_is_ti_event); @@ -1105,7 +1105,7 @@ p4_allocate_pmc(int cpu, int ri, struct pmc *pm, pm->pm_md.pm_p4.pm_p4_cccrvalue = cccrvalue; pm->pm_md.pm_p4.pm_p4_escrvalue = escrvalue; - PMCDBG(MDP,ALL,2, "p4-allocate cccrsel=0x%x cccrval=0x%x " + PMCDBG5(MDP,ALL,2, "p4-allocate cccrsel=0x%x cccrval=0x%x " "escr=%d escrmsr=0x%x escrval=0x%x", pevent->pm_cccr_select, cccrvalue, escr, pm->pm_md.pm_p4.pm_p4_escrmsr, escrvalue); @@ -1127,7 +1127,7 @@ p4_release_pmc(int cpu, int ri, struct pmc *pm) escr = pm->pm_md.pm_p4.pm_p4_escr; - PMCDBG(MDP,REL,1, "p4-release cpu=%d ri=%d escr=%d", cpu, ri, escr); + PMCDBG3(MDP,REL,1, "p4-release cpu=%d ri=%d escr=%d", cpu, ri, escr); if (PMC_IS_SYSTEM_MODE(PMC_TO_MODE(pm))) { pc = p4_pcpu[P4_TO_HTT_PRIMARY(cpu)]; @@ -1171,7 +1171,7 @@ p4_start_pmc(int cpu, int ri) KASSERT(pm != NULL, ("[p4,%d] starting cpu%d,pmc%d with null pmc", __LINE__, cpu, ri)); - PMCDBG(MDP,STA,1, "p4-start cpu=%d ri=%d", cpu, ri); + PMCDBG2(MDP,STA,1, "p4-start cpu=%d ri=%d", cpu, ri); KASSERT(pd->pm_descr.pd_class == PMC_CLASS_P4, ("[p4,%d] wrong PMC class %d", __LINE__, @@ -1283,9 +1283,10 @@ p4_start_pmc(int cpu, int ri) mtx_unlock_spin(&pc->pc_mtx); - PMCDBG(MDP,STA,2,"p4-start cpu=%d rc=%d ri=%d escr=%d " - "escrmsr=0x%x escrvalue=0x%x cccr_config=0x%x v=%jx", cpu, rc, - ri, pm->pm_md.pm_p4.pm_p4_escr, escrmsr, escrvalue, + PMCDBG6(MDP,STA,2,"p4-start cpu=%d rc=%d ri=%d escr=%d " + "escrmsr=0x%x escrvalue=0x%x", cpu, rc, + ri, pm->pm_md.pm_p4.pm_p4_escr, escrmsr, escrvalue); + PMCDBG2(MDP,STA,2,"cccr_config=0x%x v=%jx", cccrvalue, P4_PCPU_HW_VALUE(pc,ri,cpu)); return (0); @@ -1317,7 +1318,7 @@ p4_stop_pmc(int cpu, int ri) KASSERT(pm != NULL, ("[p4,%d] null pmc for cpu%d, ri%d", __LINE__, cpu, ri)); - PMCDBG(MDP,STO,1, "p4-stop cpu=%d ri=%d", cpu, ri); + PMCDBG2(MDP,STO,1, "p4-stop cpu=%d ri=%d", cpu, ri); if (PMC_IS_SYSTEM_MODE(PMC_TO_MODE(pm))) { wrmsr(pd->pm_cccr_msr, @@ -1385,9 +1386,9 @@ p4_stop_pmc(int cpu, int ri) mtx_unlock_spin(&pc->pc_mtx); - PMCDBG(MDP,STO,2, "p4-stop cpu=%d rc=%d ri=%d escrmsr=0x%x " - "escrval=0x%x cccrval=0x%x v=%jx", cpu, rc, ri, escrmsr, - escrvalue, cccrvalue, tmp); + PMCDBG5(MDP,STO,2, "p4-stop cpu=%d rc=%d ri=%d escrmsr=0x%x " + "escrval=0x%x", cpu, rc, ri, escrmsr, escrvalue); + PMCDBG2(MDP,STO,2, "cccrval=0x%x v=%jx", cccrvalue, tmp); if (tmp < P4_PCPU_HW_VALUE(pc,ri,cpu)) /* 40 bit counter overflow */ tmp += (P4_PERFCTR_MASK + 1) - P4_PCPU_HW_VALUE(pc,ri,cpu); @@ -1422,7 +1423,7 @@ p4_intr(int cpu, struct trapframe *tf) struct pmc *pm; pmc_value_t v; - PMCDBG(MDP,INT, 1, "cpu=%d tf=0x%p um=%d", cpu, (void *) tf, + PMCDBG3(MDP,INT, 1, "cpu=%d tf=0x%p um=%d", cpu, (void *) tf, TRAPF_USERMODE(tf)); pc = p4_pcpu[P4_TO_HTT_PRIMARY(cpu)]; @@ -1492,7 +1493,7 @@ p4_intr(int cpu, struct trapframe *tf) v = rdmsr(P4_PERFCTR_MSR_FIRST + ri); - PMCDBG(MDP,INT, 2, "ri=%d v=%jx", ri, v); + PMCDBG2(MDP,INT, 2, "ri=%d v=%jx", ri, v); /* Stop the counter, and reset the overflow bit */ cccrval &= ~(P4_CCCR_OVF | P4_CCCR_ENABLE); @@ -1568,7 +1569,7 @@ p4_describe(int cpu, int ri, struct pmc_info *pi, KASSERT(ri >= 0 && ri < P4_NPMCS, ("[p4,%d] row-index %d out of range", __LINE__, ri)); - PMCDBG(MDP,OPS,1,"p4-describe cpu=%d ri=%d", cpu, ri); + PMCDBG2(MDP,OPS,1,"p4-describe cpu=%d ri=%d", cpu, ri); if (P4_CPU_IS_HTT_SECONDARY(cpu)) return (EINVAL); @@ -1604,7 +1605,7 @@ p4_get_msr(int ri, uint32_t *msr) *msr = p4_pmcdesc[ri].pm_pmc_msr - P4_PERFCTR_MSR_FIRST; - PMCDBG(MDP,OPS, 1, "ri=%d getmsr=0x%x", ri, *msr); + PMCDBG2(MDP,OPS, 1, "ri=%d getmsr=0x%x", ri, *msr); return 0; } @@ -1620,7 +1621,7 @@ pmc_p4_initialize(struct pmc_mdep *md, int ncpus) KASSERT(cpu_vendor_id == CPU_VENDOR_INTEL, ("[p4,%d] Initializing non-intel processor", __LINE__)); - PMCDBG(MDP,INI,1, "%s", "p4-initialize"); + PMCDBG0(MDP,INI,1, "p4-initialize"); /* Allocate space for pointers to per-cpu descriptors. */ p4_pcpu = malloc(sizeof(*p4_pcpu) * ncpus, M_PMC, M_ZERO | M_WAITOK); diff --git a/sys/dev/hwpmc/hwpmc_ppc970.c b/sys/dev/hwpmc/hwpmc_ppc970.c index f477be310858..1a263f38c950 100644 --- a/sys/dev/hwpmc/hwpmc_ppc970.c +++ b/sys/dev/hwpmc/hwpmc_ppc970.c @@ -342,7 +342,7 @@ ppc970_config_pmc(int cpu, int ri, struct pmc *pm) { struct pmc_hw *phw; - PMCDBG(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); + PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[powerpc,%d] illegal CPU value %d", __LINE__, cpu)); @@ -445,7 +445,7 @@ ppc970_read_pmc(int cpu, int ri, pmc_value_t *v) ri)); tmp = ppc970_pmcn_read(ri); - PMCDBG(MDP,REA,2,"ppc-read id=%d -> %jd", ri, tmp); + PMCDBG2(MDP,REA,2,"ppc-read id=%d -> %jd", ri, tmp); if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) *v = POWERPC_PERFCTR_VALUE_TO_RELOAD_COUNT(tmp); else @@ -469,7 +469,7 @@ ppc970_write_pmc(int cpu, int ri, pmc_value_t v) if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) v = POWERPC_RELOAD_COUNT_TO_PERFCTR_VALUE(v); - PMCDBG(MDP,WRI,1,"powerpc-write cpu=%d ri=%d v=%jx", cpu, ri, v); + PMCDBG3(MDP,WRI,1,"powerpc-write cpu=%d ri=%d v=%jx", cpu, ri, v); ppc970_pmcn_write(ri, v); @@ -487,7 +487,7 @@ ppc970_intr(int cpu, struct trapframe *tf) KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[powerpc,%d] out of range CPU %d", __LINE__, cpu)); - PMCDBG(MDP,INT,1, "cpu=%d tf=%p um=%d", cpu, (void *) tf, + PMCDBG3(MDP,INT,1, "cpu=%d tf=%p um=%d", cpu, (void *) tf, TRAPF_USERMODE(tf)); retval = 0; @@ -546,7 +546,7 @@ ppc970_pcpu_init(struct pmc_mdep *md, int cpu) KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[powerpc,%d] wrong cpu number %d", __LINE__, cpu)); - PMCDBG(MDP,INI,1,"powerpc-init cpu=%d", cpu); + PMCDBG1(MDP,INI,1,"powerpc-init cpu=%d", cpu); powerpc_pcpu[cpu] = pac = malloc(sizeof(struct powerpc_cpu), M_PMC, M_WAITOK|M_ZERO); @@ -632,7 +632,7 @@ ppc970_allocate_pmc(int cpu, int ri, struct pmc *pm, pm->pm_md.pm_powerpc.pm_powerpc_evsel = config; - PMCDBG(MDP,ALL,2,"powerpc-allocate ri=%d -> config=0x%x", ri, config); + PMCDBG2(MDP,ALL,2,"powerpc-allocate ri=%d -> config=0x%x", ri, config); return 0; } diff --git a/sys/dev/hwpmc/hwpmc_ppro.c b/sys/dev/hwpmc/hwpmc_ppro.c index e99bb30e5aef..9d983fad046f 100644 --- a/sys/dev/hwpmc/hwpmc_ppro.c +++ b/sys/dev/hwpmc/hwpmc_ppro.c @@ -339,7 +339,7 @@ p6_pcpu_init(struct pmc_mdep *md, int cpu) KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[p6,%d] bad cpu %d", __LINE__, cpu)); - PMCDBG(MDP,INI,0,"p6-init cpu=%d", cpu); + PMCDBG1(MDP,INI,0,"p6-init cpu=%d", cpu); p6c = malloc(sizeof (struct p6_cpu), M_PMC, M_WAITOK|M_ZERO); pc = pmc_pcpu[cpu]; @@ -371,7 +371,7 @@ p6_pcpu_fini(struct pmc_mdep *md, int cpu) KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[p6,%d] bad cpu %d", __LINE__, cpu)); - PMCDBG(MDP,INI,0,"p6-cleanup cpu=%d", cpu); + PMCDBG1(MDP,INI,0,"p6-cleanup cpu=%d", cpu); p6c = p6_pcpu[cpu]; p6_pcpu[cpu] = NULL; @@ -412,7 +412,7 @@ p6_read_pmc(int cpu, int ri, pmc_value_t *v) else *v = tmp; - PMCDBG(MDP,REA,1, "p6-read cpu=%d ri=%d msr=0x%x -> v=%jx", cpu, ri, + PMCDBG4(MDP,REA,1, "p6-read cpu=%d ri=%d msr=0x%x -> v=%jx", cpu, ri, pd->pm_pmc_msr, *v); return (0); @@ -435,7 +435,7 @@ p6_write_pmc(int cpu, int ri, pmc_value_t v) KASSERT(pm, ("[p6,%d] cpu %d ri %d pmc not configured", __LINE__, cpu, ri)); - PMCDBG(MDP,WRI,1, "p6-write cpu=%d ri=%d msr=0x%x v=%jx", cpu, ri, + PMCDBG4(MDP,WRI,1, "p6-write cpu=%d ri=%d msr=0x%x v=%jx", cpu, ri, pd->pm_pmc_msr, v); if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) @@ -455,7 +455,7 @@ p6_config_pmc(int cpu, int ri, struct pmc *pm) KASSERT(ri >= 0 && ri < P6_NPMCS, ("[p6,%d] illegal row-index %d", __LINE__, ri)); - PMCDBG(MDP,CFG,1, "p6-config cpu=%d ri=%d pm=%p", cpu, ri, pm); + PMCDBG3(MDP,CFG,1, "p6-config cpu=%d ri=%d pm=%p", cpu, ri, pm); KASSERT(p6_pcpu[cpu] != NULL, ("[p6,%d] null per-cpu %d", __LINE__, cpu)); @@ -508,7 +508,7 @@ p6_allocate_pmc(int cpu, int ri, struct pmc *pm, pd = &p6_pmcdesc[ri]; - PMCDBG(MDP,ALL,1, "p6-allocate ri=%d class=%d pmccaps=0x%x " + PMCDBG4(MDP,ALL,1, "p6-allocate ri=%d class=%d pmccaps=0x%x " "reqcaps=0x%x", ri, pd->pm_descr.pd_class, pd->pm_descr.pd_caps, pm->pm_caps); @@ -579,7 +579,7 @@ p6_allocate_pmc(int cpu, int ri, struct pmc *pm, pm->pm_md.pm_ppro.pm_ppro_evsel = config; - PMCDBG(MDP,ALL,2, "p6-allocate config=0x%x", config); + PMCDBG1(MDP,ALL,2, "p6-allocate config=0x%x", config); return (0); } @@ -589,7 +589,7 @@ p6_release_pmc(int cpu, int ri, struct pmc *pm) { (void) pm; - PMCDBG(MDP,REL,1, "p6-release cpu=%d ri=%d pm=%p", cpu, ri, pm); + PMCDBG3(MDP,REL,1, "p6-release cpu=%d ri=%d pm=%p", cpu, ri, pm); KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[p6,%d] illegal CPU value %d", __LINE__, cpu)); @@ -623,11 +623,11 @@ p6_start_pmc(int cpu, int ri) ("[p6,%d] starting cpu%d,ri%d with no pmc configured", __LINE__, cpu, ri)); - PMCDBG(MDP,STA,1, "p6-start cpu=%d ri=%d", cpu, ri); + PMCDBG2(MDP,STA,1, "p6-start cpu=%d ri=%d", cpu, ri); config = pm->pm_md.pm_ppro.pm_ppro_evsel; - PMCDBG(MDP,STA,2, "p6-start/2 cpu=%d ri=%d evselmsr=0x%x config=0x%x", + PMCDBG4(MDP,STA,2, "p6-start/2 cpu=%d ri=%d evselmsr=0x%x config=0x%x", cpu, ri, pd->pm_evsel_msr, config); P6_MARK_STARTED(pc, ri); @@ -658,14 +658,14 @@ p6_stop_pmc(int cpu, int ri) ("[p6,%d] cpu%d ri%d no configured PMC to stop", __LINE__, cpu, ri)); - PMCDBG(MDP,STO,1, "p6-stop cpu=%d ri=%d", cpu, ri); + PMCDBG2(MDP,STO,1, "p6-stop cpu=%d ri=%d", cpu, ri); wrmsr(pd->pm_evsel_msr, 0); /* stop hw */ P6_MARK_STOPPED(pc, ri); /* update software state */ P6_SYNC_CTR_STATE(pc); /* restart CTR1 if need be */ - PMCDBG(MDP,STO,2, "p6-stop/2 cpu=%d ri=%d", cpu, ri); + PMCDBG2(MDP,STO,2, "p6-stop/2 cpu=%d ri=%d", cpu, ri); return (0); } @@ -788,7 +788,7 @@ pmc_p6_initialize(struct pmc_mdep *md, int ncpus) KASSERT(cpu_vendor_id == CPU_VENDOR_INTEL, ("[p6,%d] Initializing non-intel processor", __LINE__)); - PMCDBG(MDP,INI,1, "%s", "p6-initialize"); + PMCDBG0(MDP,INI,1, "p6-initialize"); /* Allocate space for pointers to per-cpu descriptors. */ p6_pcpu = malloc(sizeof(struct p6_cpu **) * ncpus, M_PMC, diff --git a/sys/dev/hwpmc/hwpmc_soft.c b/sys/dev/hwpmc/hwpmc_soft.c index 7a585eb02c2e..fe143ad36c24 100644 --- a/sys/dev/hwpmc/hwpmc_soft.c +++ b/sys/dev/hwpmc/hwpmc_soft.c @@ -136,7 +136,7 @@ soft_config_pmc(int cpu, int ri, struct pmc *pm) { struct pmc_hw *phw; - PMCDBG(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); + PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[soft,%d] illegal CPU value %d", __LINE__, cpu)); @@ -276,7 +276,7 @@ soft_read_pmc(int cpu, int ri, pmc_value_t *v) KASSERT(pm != NULL, ("[soft,%d] no owner for PHW [cpu%d,pmc%d]", __LINE__, cpu, ri)); - PMCDBG(MDP,REA,1,"soft-read id=%d", ri); + PMCDBG1(MDP,REA,1,"soft-read id=%d", ri); *v = soft_pcpu[cpu]->soft_values[ri]; @@ -300,7 +300,7 @@ soft_write_pmc(int cpu, int ri, pmc_value_t v) KASSERT(pm, ("[soft,%d] cpu %d ri %d pmc not configured", __LINE__, cpu, ri)); - PMCDBG(MDP,WRI,1, "soft-write cpu=%d ri=%d v=%jx", cpu, ri, v); + PMCDBG3(MDP,WRI,1, "soft-write cpu=%d ri=%d v=%jx", cpu, ri, v); soft_pcpu[cpu]->soft_values[ri] = v; diff --git a/sys/dev/hwpmc/hwpmc_tsc.c b/sys/dev/hwpmc/hwpmc_tsc.c index 237b7a1a9686..5eb69076dcea 100644 --- a/sys/dev/hwpmc/hwpmc_tsc.c +++ b/sys/dev/hwpmc/hwpmc_tsc.c @@ -99,7 +99,7 @@ tsc_config_pmc(int cpu, int ri, struct pmc *pm) { struct pmc_hw *phw; - PMCDBG(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); + PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[tsc,%d] illegal CPU value %d", __LINE__, cpu)); @@ -253,7 +253,7 @@ tsc_read_pmc(int cpu, int ri, pmc_value_t *v) KASSERT(mode == PMC_MODE_SC, ("[tsc,%d] illegal pmc mode %d", __LINE__, mode)); - PMCDBG(MDP,REA,1,"tsc-read id=%d", ri); + PMCDBG1(MDP,REA,1,"tsc-read id=%d", ri); *v = rdtsc(); diff --git a/sys/dev/hwpmc/hwpmc_uncore.c b/sys/dev/hwpmc/hwpmc_uncore.c index 6a30eb05a8d3..2b24b33e0ab8 100644 --- a/sys/dev/hwpmc/hwpmc_uncore.c +++ b/sys/dev/hwpmc/hwpmc_uncore.c @@ -101,7 +101,7 @@ uncore_pcpu_init(struct pmc_mdep *md, int cpu) KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[ucf,%d] insane cpu number %d", __LINE__, cpu)); - PMCDBG(MDP,INI,1,"uncore-init cpu=%d", cpu); + PMCDBG1(MDP,INI,1,"uncore-init cpu=%d", cpu); uncore_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCP].pcd_ri; npmc = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCP].pcd_num; @@ -137,7 +137,7 @@ uncore_pcpu_fini(struct pmc_mdep *md, int cpu) KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[uncore,%d] insane cpu number (%d)", __LINE__, cpu)); - PMCDBG(MDP,INI,1,"uncore-pcpu-fini cpu=%d", cpu); + PMCDBG1(MDP,INI,1,"uncore-pcpu-fini cpu=%d", cpu); if ((cc = uncore_pcpu[cpu]) == NULL) return (0); @@ -193,7 +193,7 @@ ucf_allocate_pmc(int cpu, int ri, struct pmc *pm, KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[uncore,%d] illegal CPU %d", __LINE__, cpu)); - PMCDBG(MDP,ALL,1, "ucf-allocate ri=%d reqcaps=0x%x", ri, pm->pm_caps); + PMCDBG2(MDP,ALL,1, "ucf-allocate ri=%d reqcaps=0x%x", ri, pm->pm_caps); if (ri < 0 || ri > uncore_ucf_npmc) return (EINVAL); @@ -212,7 +212,7 @@ ucf_allocate_pmc(int cpu, int ri, struct pmc *pm, pm->pm_md.pm_ucf.pm_ucf_ctrl = (flags << (ri * 4)); - PMCDBG(MDP,ALL,2, "ucf-allocate config=0x%jx", + PMCDBG1(MDP,ALL,2, "ucf-allocate config=0x%jx", (uintmax_t) pm->pm_md.pm_ucf.pm_ucf_ctrl); return (0); @@ -227,7 +227,7 @@ ucf_config_pmc(int cpu, int ri, struct pmc *pm) KASSERT(ri >= 0 && ri < uncore_ucf_npmc, ("[uncore,%d] illegal row-index %d", __LINE__, ri)); - PMCDBG(MDP,CFG,1, "ucf-config cpu=%d ri=%d pm=%p", cpu, ri, pm); + PMCDBG3(MDP,CFG,1, "ucf-config cpu=%d ri=%d pm=%p", cpu, ri, pm); KASSERT(uncore_pcpu[cpu] != NULL, ("[uncore,%d] null per-cpu %d", __LINE__, cpu)); @@ -296,7 +296,7 @@ ucf_read_pmc(int cpu, int ri, pmc_value_t *v) else *v = tmp; - PMCDBG(MDP,REA,1, "ucf-read cpu=%d ri=%d -> v=%jx", cpu, ri, *v); + PMCDBG3(MDP,REA,1, "ucf-read cpu=%d ri=%d -> v=%jx", cpu, ri, *v); return (0); } @@ -304,7 +304,7 @@ ucf_read_pmc(int cpu, int ri, pmc_value_t *v) static int ucf_release_pmc(int cpu, int ri, struct pmc *pmc) { - PMCDBG(MDP,REL,1, "ucf-release cpu=%d ri=%d pm=%p", cpu, ri, pmc); + PMCDBG3(MDP,REL,1, "ucf-release cpu=%d ri=%d pm=%p", cpu, ri, pmc); KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[uncore,%d] illegal CPU value %d", __LINE__, cpu)); @@ -328,7 +328,7 @@ ucf_start_pmc(int cpu, int ri) KASSERT(ri >= 0 && ri < uncore_ucf_npmc, ("[uncore,%d] illegal row-index %d", __LINE__, ri)); - PMCDBG(MDP,STA,1,"ucf-start cpu=%d ri=%d", cpu, ri); + PMCDBG2(MDP,STA,1,"ucf-start cpu=%d ri=%d", cpu, ri); ucfc = uncore_pcpu[cpu]; pm = ucfc->pc_uncorepmcs[ri + uncore_ucf_ri].phw_pmc; @@ -343,7 +343,7 @@ ucf_start_pmc(int cpu, int ri) wrmsr(UC_GLOBAL_CTRL, ucfc->pc_globalctrl); } while (ucfc->pc_resync != 0); - PMCDBG(MDP,STA,1,"ucfctrl=%x(%x) globalctrl=%jx(%jx)", + PMCDBG4(MDP,STA,1,"ucfctrl=%x(%x) globalctrl=%jx(%jx)", ucfc->pc_ucfctrl, (uint32_t) rdmsr(UCF_CTRL), ucfc->pc_globalctrl, rdmsr(UC_GLOBAL_CTRL)); @@ -356,7 +356,7 @@ ucf_stop_pmc(int cpu, int ri) uint32_t fc; struct uncore_cpu *ucfc; - PMCDBG(MDP,STO,1,"ucf-stop cpu=%d ri=%d", cpu, ri); + PMCDBG2(MDP,STO,1,"ucf-stop cpu=%d ri=%d", cpu, ri); ucfc = uncore_pcpu[cpu]; @@ -369,7 +369,7 @@ ucf_stop_pmc(int cpu, int ri) ucfc->pc_ucfctrl &= ~fc; - PMCDBG(MDP,STO,1,"ucf-stop ucfctrl=%x", ucfc->pc_ucfctrl); + PMCDBG1(MDP,STO,1,"ucf-stop ucfctrl=%x", ucfc->pc_ucfctrl); wrmsr(UCF_CTRL, ucfc->pc_ucfctrl); do { @@ -378,7 +378,7 @@ ucf_stop_pmc(int cpu, int ri) wrmsr(UC_GLOBAL_CTRL, ucfc->pc_globalctrl); } while (ucfc->pc_resync != 0); - PMCDBG(MDP,STO,1,"ucfctrl=%x(%x) globalctrl=%jx(%jx)", + PMCDBG4(MDP,STO,1,"ucfctrl=%x(%x) globalctrl=%jx(%jx)", ucfc->pc_ucfctrl, (uint32_t) rdmsr(UCF_CTRL), ucfc->pc_globalctrl, rdmsr(UC_GLOBAL_CTRL)); @@ -409,7 +409,7 @@ ucf_write_pmc(int cpu, int ri, pmc_value_t v) wrmsr(UCF_CTR0 + ri, v); wrmsr(UCF_CTRL, cc->pc_ucfctrl); - PMCDBG(MDP,WRI,1, "ucf-write cpu=%d ri=%d v=%jx ucfctrl=%jx ", + PMCDBG4(MDP,WRI,1, "ucf-write cpu=%d ri=%d v=%jx ucfctrl=%jx ", cpu, ri, v, (uintmax_t) rdmsr(UCF_CTRL)); return (0); @@ -423,7 +423,7 @@ ucf_initialize(struct pmc_mdep *md, int maxcpu, int npmc, int pmcwidth) KASSERT(md != NULL, ("[ucf,%d] md is NULL", __LINE__)); - PMCDBG(MDP,INI,1, "%s", "ucf-initialize"); + PMCDBG0(MDP,INI,1, "ucf-initialize"); pcd = &md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCF]; @@ -933,7 +933,7 @@ ucp_config_pmc(int cpu, int ri, struct pmc *pm) KASSERT(ri >= 0 && ri < uncore_ucp_npmc, ("[uncore,%d] illegal row-index %d", __LINE__, ri)); - PMCDBG(MDP,CFG,1, "ucp-config cpu=%d ri=%d pm=%p", cpu, ri, pm); + PMCDBG3(MDP,CFG,1, "ucp-config cpu=%d ri=%d pm=%p", cpu, ri, pm); KASSERT(uncore_pcpu[cpu] != NULL, ("[uncore,%d] null per-cpu %d", __LINE__, cpu)); @@ -1001,7 +1001,7 @@ ucp_read_pmc(int cpu, int ri, pmc_value_t *v) else *v = tmp; - PMCDBG(MDP,REA,1, "ucp-read cpu=%d ri=%d msr=0x%x -> v=%jx", cpu, ri, + PMCDBG4(MDP,REA,1, "ucp-read cpu=%d ri=%d msr=0x%x -> v=%jx", cpu, ri, ri, *v); return (0); @@ -1012,7 +1012,7 @@ ucp_release_pmc(int cpu, int ri, struct pmc *pm) { (void) pm; - PMCDBG(MDP,REL,1, "ucp-release cpu=%d ri=%d pm=%p", cpu, ri, + PMCDBG3(MDP,REL,1, "ucp-release cpu=%d ri=%d pm=%p", cpu, ri, pm); KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), @@ -1045,11 +1045,11 @@ ucp_start_pmc(int cpu, int ri) ("[uncore,%d] starting cpu%d,ri%d with no pmc configured", __LINE__, cpu, ri)); - PMCDBG(MDP,STA,1, "ucp-start cpu=%d ri=%d", cpu, ri); + PMCDBG2(MDP,STA,1, "ucp-start cpu=%d ri=%d", cpu, ri); evsel = pm->pm_md.pm_ucp.pm_ucp_evsel; - PMCDBG(MDP,STA,2, + PMCDBG4(MDP,STA,2, "ucp-start/2 cpu=%d ri=%d evselmsr=0x%x evsel=0x%x", cpu, ri, SELECTSEL(uncore_cputype) + ri, evsel); @@ -1104,7 +1104,7 @@ ucp_stop_pmc(int cpu, int ri) ("[uncore,%d] cpu%d ri%d no configured PMC to stop", __LINE__, cpu, ri)); - PMCDBG(MDP,STO,1, "ucp-stop cpu=%d ri=%d", cpu, ri); + PMCDBG2(MDP,STO,1, "ucp-stop cpu=%d ri=%d", cpu, ri); /* stop hw. */ wrmsr(SELECTSEL(uncore_cputype) + ri, 0); @@ -1136,7 +1136,7 @@ ucp_write_pmc(int cpu, int ri, pmc_value_t v) ("[uncore,%d] cpu%d ri%d no configured PMC to stop", __LINE__, cpu, ri)); - PMCDBG(MDP,WRI,1, "ucp-write cpu=%d ri=%d msr=0x%x v=%jx", cpu, ri, + PMCDBG4(MDP,WRI,1, "ucp-write cpu=%d ri=%d msr=0x%x v=%jx", cpu, ri, UCP_PMC0 + ri, v); if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) @@ -1160,7 +1160,7 @@ ucp_initialize(struct pmc_mdep *md, int maxcpu, int npmc, int pmcwidth) KASSERT(md != NULL, ("[ucp,%d] md is NULL", __LINE__)); - PMCDBG(MDP,INI,1, "%s", "ucp-initialize"); + PMCDBG0(MDP,INI,1, "ucp-initialize"); pcd = &md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCP]; @@ -1213,7 +1213,7 @@ pmc_uncore_initialize(struct pmc_mdep *md, int maxcpu) ucf_initialize(md, maxcpu, uncore_ucf_npmc, uncore_ucf_width); uncore_pmcmask |= ((1ULL << uncore_ucf_npmc) - 1) << SELECTOFF(uncore_cputype); - PMCDBG(MDP,INI,1,"uncore-init pmcmask=0x%jx ucfri=%d", uncore_pmcmask, + PMCDBG2(MDP,INI,1,"uncore-init pmcmask=0x%jx ucfri=%d", uncore_pmcmask, uncore_ucf_ri); uncore_pcpu = malloc(sizeof(*uncore_pcpu) * maxcpu, M_PMC, @@ -1225,7 +1225,7 @@ pmc_uncore_initialize(struct pmc_mdep *md, int maxcpu) void pmc_uncore_finalize(struct pmc_mdep *md) { - PMCDBG(MDP,INI,1, "%s", "uncore-finalize"); + PMCDBG0(MDP,INI,1, "uncore-finalize"); free(uncore_pcpu, M_PMC); uncore_pcpu = NULL; diff --git a/sys/dev/hwpmc/hwpmc_xscale.c b/sys/dev/hwpmc/hwpmc_xscale.c index 9b73337732eb..e5df8d00028e 100644 --- a/sys/dev/hwpmc/hwpmc_xscale.c +++ b/sys/dev/hwpmc/hwpmc_xscale.c @@ -277,7 +277,7 @@ xscale_allocate_pmc(int cpu, int ri, struct pmc *pm, return EINVAL; pm->pm_md.pm_xscale.pm_xscale_evsel = config; - PMCDBG(MDP,ALL,2,"xscale-allocate ri=%d -> config=0x%x", ri, config); + PMCDBG2(MDP,ALL,2,"xscale-allocate ri=%d -> config=0x%x", ri, config); return 0; } @@ -296,7 +296,7 @@ xscale_read_pmc(int cpu, int ri, pmc_value_t *v) pm = xscale_pcpu[cpu]->pc_xscalepmcs[ri].phw_pmc; tmp = xscale_pmcn_read(ri); - PMCDBG(MDP,REA,2,"xscale-read id=%d -> %jd", ri, tmp); + PMCDBG2(MDP,REA,2,"xscale-read id=%d -> %jd", ri, tmp); if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) *v = XSCALE_PERFCTR_VALUE_TO_RELOAD_COUNT(tmp); else @@ -320,7 +320,7 @@ xscale_write_pmc(int cpu, int ri, pmc_value_t v) if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) v = XSCALE_RELOAD_COUNT_TO_PERFCTR_VALUE(v); - PMCDBG(MDP,WRI,1,"xscale-write cpu=%d ri=%d v=%jx", cpu, ri, v); + PMCDBG3(MDP,WRI,1,"xscale-write cpu=%d ri=%d v=%jx", cpu, ri, v); xscale_pmcn_write(ri, v); @@ -332,7 +332,7 @@ xscale_config_pmc(int cpu, int ri, struct pmc *pm) { struct pmc_hw *phw; - PMCDBG(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); + PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[xscale,%d] illegal CPU value %d", __LINE__, cpu)); @@ -568,7 +568,7 @@ xscale_pcpu_init(struct pmc_mdep *md, int cpu) KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), ("[xscale,%d] wrong cpu number %d", __LINE__, cpu)); - PMCDBG(MDP,INI,1,"xscale-init cpu=%d", cpu); + PMCDBG1(MDP,INI,1,"xscale-init cpu=%d", cpu); xscale_pcpu[cpu] = pac = malloc(sizeof(struct xscale_cpu), M_PMC, M_WAITOK|M_ZERO); @@ -628,7 +628,7 @@ pmc_xscale_initialize() printf("%s: unknown XScale core generation\n", __func__); return (NULL); } - PMCDBG(MDP,INI,1,"xscale-init npmcs=%d", xscale_npmcs); + PMCDBG1(MDP,INI,1,"xscale-init npmcs=%d", xscale_npmcs); /* * Allocate space for pointers to PMC HW descriptors and for diff --git a/sys/dev/hwpmc/pmc_events.h b/sys/dev/hwpmc/pmc_events.h index 7f878cb9cc20..467367f57848 100644 --- a/sys/dev/hwpmc/pmc_events.h +++ b/sys/dev/hwpmc/pmc_events.h @@ -4802,6 +4802,369 @@ __PMC_EV_ALIAS("IMPC_C0H_TRK_REQUEST.ALL", UCP_EVENT_84H_01H) #define PMC_EV_ARMV7_FIRST PMC_EV_ARMV7_PMNC_SW_INCR #define PMC_EV_ARMV7_LAST PMC_EV_ARMV7_CPU_CYCLES +/* + * ARMv8 Events + */ + +#define __PMC_EV_ARMV8() \ + __PMC_EV(ARMV8, EVENT_00H) \ + __PMC_EV(ARMV8, EVENT_01H) \ + __PMC_EV(ARMV8, EVENT_02H) \ + __PMC_EV(ARMV8, EVENT_03H) \ + __PMC_EV(ARMV8, EVENT_04H) \ + __PMC_EV(ARMV8, EVENT_05H) \ + __PMC_EV(ARMV8, EVENT_06H) \ + __PMC_EV(ARMV8, EVENT_07H) \ + __PMC_EV(ARMV8, EVENT_08H) \ + __PMC_EV(ARMV8, EVENT_09H) \ + __PMC_EV(ARMV8, EVENT_0AH) \ + __PMC_EV(ARMV8, EVENT_0BH) \ + __PMC_EV(ARMV8, EVENT_0CH) \ + __PMC_EV(ARMV8, EVENT_0DH) \ + __PMC_EV(ARMV8, EVENT_0EH) \ + __PMC_EV(ARMV8, EVENT_0FH) \ + __PMC_EV(ARMV8, EVENT_10H) \ + __PMC_EV(ARMV8, EVENT_11H) \ + __PMC_EV(ARMV8, EVENT_12H) \ + __PMC_EV(ARMV8, EVENT_13H) \ + __PMC_EV(ARMV8, EVENT_14H) \ + __PMC_EV(ARMV8, EVENT_15H) \ + __PMC_EV(ARMV8, EVENT_16H) \ + __PMC_EV(ARMV8, EVENT_17H) \ + __PMC_EV(ARMV8, EVENT_18H) \ + __PMC_EV(ARMV8, EVENT_19H) \ + __PMC_EV(ARMV8, EVENT_1AH) \ + __PMC_EV(ARMV8, EVENT_1BH) \ + __PMC_EV(ARMV8, EVENT_1CH) \ + __PMC_EV(ARMV8, EVENT_1DH) \ + __PMC_EV(ARMV8, EVENT_1EH) \ + __PMC_EV(ARMV8, EVENT_1FH) \ + __PMC_EV(ARMV8, EVENT_20H) \ + __PMC_EV(ARMV8, EVENT_21H) \ + __PMC_EV(ARMV8, EVENT_22H) \ + __PMC_EV(ARMV8, EVENT_23H) \ + __PMC_EV(ARMV8, EVENT_24H) \ + __PMC_EV(ARMV8, EVENT_25H) \ + __PMC_EV(ARMV8, EVENT_26H) \ + __PMC_EV(ARMV8, EVENT_27H) \ + __PMC_EV(ARMV8, EVENT_28H) \ + __PMC_EV(ARMV8, EVENT_29H) \ + __PMC_EV(ARMV8, EVENT_2AH) \ + __PMC_EV(ARMV8, EVENT_2BH) \ + __PMC_EV(ARMV8, EVENT_2CH) \ + __PMC_EV(ARMV8, EVENT_2DH) \ + __PMC_EV(ARMV8, EVENT_2EH) \ + __PMC_EV(ARMV8, EVENT_2FH) \ + __PMC_EV(ARMV8, EVENT_30H) \ + __PMC_EV(ARMV8, EVENT_31H) \ + __PMC_EV(ARMV8, EVENT_32H) \ + __PMC_EV(ARMV8, EVENT_33H) \ + __PMC_EV(ARMV8, EVENT_34H) \ + __PMC_EV(ARMV8, EVENT_35H) \ + __PMC_EV(ARMV8, EVENT_36H) \ + __PMC_EV(ARMV8, EVENT_37H) \ + __PMC_EV(ARMV8, EVENT_38H) \ + __PMC_EV(ARMV8, EVENT_39H) \ + __PMC_EV(ARMV8, EVENT_3AH) \ + __PMC_EV(ARMV8, EVENT_3BH) \ + __PMC_EV(ARMV8, EVENT_3CH) \ + __PMC_EV(ARMV8, EVENT_3DH) \ + __PMC_EV(ARMV8, EVENT_3EH) \ + __PMC_EV(ARMV8, EVENT_3FH) \ + __PMC_EV(ARMV8, EVENT_40H) \ + __PMC_EV(ARMV8, EVENT_41H) \ + __PMC_EV(ARMV8, EVENT_42H) \ + __PMC_EV(ARMV8, EVENT_43H) \ + __PMC_EV(ARMV8, EVENT_44H) \ + __PMC_EV(ARMV8, EVENT_45H) \ + __PMC_EV(ARMV8, EVENT_46H) \ + __PMC_EV(ARMV8, EVENT_47H) \ + __PMC_EV(ARMV8, EVENT_48H) \ + __PMC_EV(ARMV8, EVENT_49H) \ + __PMC_EV(ARMV8, EVENT_4AH) \ + __PMC_EV(ARMV8, EVENT_4BH) \ + __PMC_EV(ARMV8, EVENT_4CH) \ + __PMC_EV(ARMV8, EVENT_4DH) \ + __PMC_EV(ARMV8, EVENT_4EH) \ + __PMC_EV(ARMV8, EVENT_4FH) \ + __PMC_EV(ARMV8, EVENT_50H) \ + __PMC_EV(ARMV8, EVENT_51H) \ + __PMC_EV(ARMV8, EVENT_52H) \ + __PMC_EV(ARMV8, EVENT_53H) \ + __PMC_EV(ARMV8, EVENT_54H) \ + __PMC_EV(ARMV8, EVENT_55H) \ + __PMC_EV(ARMV8, EVENT_56H) \ + __PMC_EV(ARMV8, EVENT_57H) \ + __PMC_EV(ARMV8, EVENT_58H) \ + __PMC_EV(ARMV8, EVENT_59H) \ + __PMC_EV(ARMV8, EVENT_5AH) \ + __PMC_EV(ARMV8, EVENT_5BH) \ + __PMC_EV(ARMV8, EVENT_5CH) \ + __PMC_EV(ARMV8, EVENT_5DH) \ + __PMC_EV(ARMV8, EVENT_5EH) \ + __PMC_EV(ARMV8, EVENT_5FH) \ + __PMC_EV(ARMV8, EVENT_60H) \ + __PMC_EV(ARMV8, EVENT_61H) \ + __PMC_EV(ARMV8, EVENT_62H) \ + __PMC_EV(ARMV8, EVENT_63H) \ + __PMC_EV(ARMV8, EVENT_64H) \ + __PMC_EV(ARMV8, EVENT_65H) \ + __PMC_EV(ARMV8, EVENT_66H) \ + __PMC_EV(ARMV8, EVENT_67H) \ + __PMC_EV(ARMV8, EVENT_68H) \ + __PMC_EV(ARMV8, EVENT_69H) \ + __PMC_EV(ARMV8, EVENT_6AH) \ + __PMC_EV(ARMV8, EVENT_6BH) \ + __PMC_EV(ARMV8, EVENT_6CH) \ + __PMC_EV(ARMV8, EVENT_6DH) \ + __PMC_EV(ARMV8, EVENT_6EH) \ + __PMC_EV(ARMV8, EVENT_6FH) \ + __PMC_EV(ARMV8, EVENT_70H) \ + __PMC_EV(ARMV8, EVENT_71H) \ + __PMC_EV(ARMV8, EVENT_72H) \ + __PMC_EV(ARMV8, EVENT_73H) \ + __PMC_EV(ARMV8, EVENT_74H) \ + __PMC_EV(ARMV8, EVENT_75H) \ + __PMC_EV(ARMV8, EVENT_76H) \ + __PMC_EV(ARMV8, EVENT_77H) \ + __PMC_EV(ARMV8, EVENT_78H) \ + __PMC_EV(ARMV8, EVENT_79H) \ + __PMC_EV(ARMV8, EVENT_7AH) \ + __PMC_EV(ARMV8, EVENT_7BH) \ + __PMC_EV(ARMV8, EVENT_7CH) \ + __PMC_EV(ARMV8, EVENT_7DH) \ + __PMC_EV(ARMV8, EVENT_7EH) \ + __PMC_EV(ARMV8, EVENT_7FH) \ + __PMC_EV(ARMV8, EVENT_80H) \ + __PMC_EV(ARMV8, EVENT_81H) \ + __PMC_EV(ARMV8, EVENT_82H) \ + __PMC_EV(ARMV8, EVENT_83H) \ + __PMC_EV(ARMV8, EVENT_84H) \ + __PMC_EV(ARMV8, EVENT_85H) \ + __PMC_EV(ARMV8, EVENT_86H) \ + __PMC_EV(ARMV8, EVENT_87H) \ + __PMC_EV(ARMV8, EVENT_88H) \ + __PMC_EV(ARMV8, EVENT_89H) \ + __PMC_EV(ARMV8, EVENT_8AH) \ + __PMC_EV(ARMV8, EVENT_8BH) \ + __PMC_EV(ARMV8, EVENT_8CH) \ + __PMC_EV(ARMV8, EVENT_8DH) \ + __PMC_EV(ARMV8, EVENT_8EH) \ + __PMC_EV(ARMV8, EVENT_8FH) \ + __PMC_EV(ARMV8, EVENT_90H) \ + __PMC_EV(ARMV8, EVENT_91H) \ + __PMC_EV(ARMV8, EVENT_92H) \ + __PMC_EV(ARMV8, EVENT_93H) \ + __PMC_EV(ARMV8, EVENT_94H) \ + __PMC_EV(ARMV8, EVENT_95H) \ + __PMC_EV(ARMV8, EVENT_96H) \ + __PMC_EV(ARMV8, EVENT_97H) \ + __PMC_EV(ARMV8, EVENT_98H) \ + __PMC_EV(ARMV8, EVENT_99H) \ + __PMC_EV(ARMV8, EVENT_9AH) \ + __PMC_EV(ARMV8, EVENT_9BH) \ + __PMC_EV(ARMV8, EVENT_9CH) \ + __PMC_EV(ARMV8, EVENT_9DH) \ + __PMC_EV(ARMV8, EVENT_9EH) \ + __PMC_EV(ARMV8, EVENT_9FH) \ + __PMC_EV(ARMV8, EVENT_A0H) \ + __PMC_EV(ARMV8, EVENT_A1H) \ + __PMC_EV(ARMV8, EVENT_A2H) \ + __PMC_EV(ARMV8, EVENT_A3H) \ + __PMC_EV(ARMV8, EVENT_A4H) \ + __PMC_EV(ARMV8, EVENT_A5H) \ + __PMC_EV(ARMV8, EVENT_A6H) \ + __PMC_EV(ARMV8, EVENT_A7H) \ + __PMC_EV(ARMV8, EVENT_A8H) \ + __PMC_EV(ARMV8, EVENT_A9H) \ + __PMC_EV(ARMV8, EVENT_AAH) \ + __PMC_EV(ARMV8, EVENT_ABH) \ + __PMC_EV(ARMV8, EVENT_ACH) \ + __PMC_EV(ARMV8, EVENT_ADH) \ + __PMC_EV(ARMV8, EVENT_AEH) \ + __PMC_EV(ARMV8, EVENT_AFH) \ + __PMC_EV(ARMV8, EVENT_B0H) \ + __PMC_EV(ARMV8, EVENT_B1H) \ + __PMC_EV(ARMV8, EVENT_B2H) \ + __PMC_EV(ARMV8, EVENT_B3H) \ + __PMC_EV(ARMV8, EVENT_B4H) \ + __PMC_EV(ARMV8, EVENT_B5H) \ + __PMC_EV(ARMV8, EVENT_B6H) \ + __PMC_EV(ARMV8, EVENT_B7H) \ + __PMC_EV(ARMV8, EVENT_B8H) \ + __PMC_EV(ARMV8, EVENT_B9H) \ + __PMC_EV(ARMV8, EVENT_BAH) \ + __PMC_EV(ARMV8, EVENT_BBH) \ + __PMC_EV(ARMV8, EVENT_BCH) \ + __PMC_EV(ARMV8, EVENT_BDH) \ + __PMC_EV(ARMV8, EVENT_BEH) \ + __PMC_EV(ARMV8, EVENT_BFH) \ + __PMC_EV(ARMV8, EVENT_C0H) \ + __PMC_EV(ARMV8, EVENT_C1H) \ + __PMC_EV(ARMV8, EVENT_C2H) \ + __PMC_EV(ARMV8, EVENT_C3H) \ + __PMC_EV(ARMV8, EVENT_C4H) \ + __PMC_EV(ARMV8, EVENT_C5H) \ + __PMC_EV(ARMV8, EVENT_C6H) \ + __PMC_EV(ARMV8, EVENT_C7H) \ + __PMC_EV(ARMV8, EVENT_C8H) \ + __PMC_EV(ARMV8, EVENT_C9H) \ + __PMC_EV(ARMV8, EVENT_CAH) \ + __PMC_EV(ARMV8, EVENT_CBH) \ + __PMC_EV(ARMV8, EVENT_CCH) \ + __PMC_EV(ARMV8, EVENT_CDH) \ + __PMC_EV(ARMV8, EVENT_CEH) \ + __PMC_EV(ARMV8, EVENT_CFH) \ + __PMC_EV(ARMV8, EVENT_D0H) \ + __PMC_EV(ARMV8, EVENT_D1H) \ + __PMC_EV(ARMV8, EVENT_D2H) \ + __PMC_EV(ARMV8, EVENT_D3H) \ + __PMC_EV(ARMV8, EVENT_D4H) \ + __PMC_EV(ARMV8, EVENT_D5H) \ + __PMC_EV(ARMV8, EVENT_D6H) \ + __PMC_EV(ARMV8, EVENT_D7H) \ + __PMC_EV(ARMV8, EVENT_D8H) \ + __PMC_EV(ARMV8, EVENT_D9H) \ + __PMC_EV(ARMV8, EVENT_DAH) \ + __PMC_EV(ARMV8, EVENT_DBH) \ + __PMC_EV(ARMV8, EVENT_DCH) \ + __PMC_EV(ARMV8, EVENT_DDH) \ + __PMC_EV(ARMV8, EVENT_DEH) \ + __PMC_EV(ARMV8, EVENT_DFH) \ + __PMC_EV(ARMV8, EVENT_E0H) \ + __PMC_EV(ARMV8, EVENT_E1H) \ + __PMC_EV(ARMV8, EVENT_E2H) \ + __PMC_EV(ARMV8, EVENT_E3H) \ + __PMC_EV(ARMV8, EVENT_E4H) \ + __PMC_EV(ARMV8, EVENT_E5H) \ + __PMC_EV(ARMV8, EVENT_E6H) \ + __PMC_EV(ARMV8, EVENT_E7H) \ + __PMC_EV(ARMV8, EVENT_E8H) \ + __PMC_EV(ARMV8, EVENT_E9H) \ + __PMC_EV(ARMV8, EVENT_EAH) \ + __PMC_EV(ARMV8, EVENT_EBH) \ + __PMC_EV(ARMV8, EVENT_ECH) \ + __PMC_EV(ARMV8, EVENT_EDH) \ + __PMC_EV(ARMV8, EVENT_EEH) \ + __PMC_EV(ARMV8, EVENT_EFH) \ + __PMC_EV(ARMV8, EVENT_F0H) \ + __PMC_EV(ARMV8, EVENT_F1H) \ + __PMC_EV(ARMV8, EVENT_F2H) \ + __PMC_EV(ARMV8, EVENT_F3H) \ + __PMC_EV(ARMV8, EVENT_F4H) \ + __PMC_EV(ARMV8, EVENT_F5H) \ + __PMC_EV(ARMV8, EVENT_F6H) \ + __PMC_EV(ARMV8, EVENT_F7H) \ + __PMC_EV(ARMV8, EVENT_F8H) \ + __PMC_EV(ARMV8, EVENT_F9H) \ + __PMC_EV(ARMV8, EVENT_FAH) \ + __PMC_EV(ARMV8, EVENT_FBH) \ + __PMC_EV(ARMV8, EVENT_FCH) \ + __PMC_EV(ARMV8, EVENT_FDH) \ + __PMC_EV(ARMV8, EVENT_FEH) \ + __PMC_EV(ARMV8, EVENT_FFH) + +#define PMC_EV_ARMV8_FIRST PMC_EV_ARMV8_EVENT_00H +#define PMC_EV_ARMV8_LAST PMC_EV_ARMV8_EVENT_FFH + +#define __PMC_EV_ALIAS_ARMV8_COMMON() \ + __PMC_EV_ALIAS("SW_INCR", ARMV8_EVENT_00H) \ + __PMC_EV_ALIAS("L1I_CACHE_REFILL", ARMV8_EVENT_01H) \ + __PMC_EV_ALIAS("L1I_TLB_REFILL", ARMV8_EVENT_02H) \ + __PMC_EV_ALIAS("L1D_CACHE_REFILL", ARMV8_EVENT_03H) \ + __PMC_EV_ALIAS("L1D_CACHE", ARMV8_EVENT_04H) \ + __PMC_EV_ALIAS("L1D_TLB_REFILL", ARMV8_EVENT_05H) \ + __PMC_EV_ALIAS("INST_RETIRED", ARMV8_EVENT_08H) \ + __PMC_EV_ALIAS("EXC_TAKEN", ARMV8_EVENT_09H) \ + __PMC_EV_ALIAS("EXC_RETURN", ARMV8_EVENT_0AH) \ + __PMC_EV_ALIAS("CID_WRITE_RETIRED", ARMV8_EVENT_0BH) \ + __PMC_EV_ALIAS("BR_MIS_PRED", ARMV8_EVENT_10H) \ + __PMC_EV_ALIAS("CPU_CYCLES", ARMV8_EVENT_11H) \ + __PMC_EV_ALIAS("BR_PRED", ARMV8_EVENT_12H) \ + __PMC_EV_ALIAS("MEM_ACCESS", ARMV8_EVENT_13H) \ + __PMC_EV_ALIAS("L1I_CACHE", ARMV8_EVENT_14H) \ + __PMC_EV_ALIAS("L1D_CACHE_WB", ARMV8_EVENT_15H) \ + __PMC_EV_ALIAS("L2D_CACHE", ARMV8_EVENT_16H) \ + __PMC_EV_ALIAS("L2D_CACHE_REFILL", ARMV8_EVENT_17H) \ + __PMC_EV_ALIAS("L2D_CACHE_WB", ARMV8_EVENT_18H) \ + __PMC_EV_ALIAS("BUS_ACCESS", ARMV8_EVENT_19H) \ + __PMC_EV_ALIAS("MEMORY_ERROR", ARMV8_EVENT_1AH) \ + __PMC_EV_ALIAS("BUS_CYCLES", ARMV8_EVENT_1DH) \ + __PMC_EV_ALIAS("CHAIN", ARMV8_EVENT_1EH) \ + __PMC_EV_ALIAS("BUS_ACCESS_LD", ARMV8_EVENT_60H) \ + __PMC_EV_ALIAS("BUS_ACCESS_ST", ARMV8_EVENT_61H) \ + __PMC_EV_ALIAS("BR_INDIRECT_SPEC", ARMV8_EVENT_7AH) \ + __PMC_EV_ALIAS("EXC_IRQ", ARMV8_EVENT_86H) \ + __PMC_EV_ALIAS("EXC_FIQ", ARMV8_EVENT_87H) + +#define __PMC_EV_ALIAS_ARMV8_CORTEX_A53() \ + __PMC_EV_ALIAS_ARMV8_COMMON() \ + __PMC_EV_ALIAS("LD_RETIRED", ARMV8_EVENT_06H) \ + __PMC_EV_ALIAS("ST_RETIRED", ARMV8_EVENT_07H) \ + __PMC_EV_ALIAS("PC_WRITE_RETIRED", ARMV8_EVENT_0CH) \ + __PMC_EV_ALIAS("BR_IMMED_RETIRED", ARMV8_EVENT_0DH) \ + __PMC_EV_ALIAS("BR_RETURN_RETIRED", ARMV8_EVENT_0EH) \ + __PMC_EV_ALIAS("UNALIGNED_LDST_RETIRED",ARMV8_EVENT_0FH) + +#define __PMC_EV_ALIAS_ARMV8_CORTEX_A57() \ + __PMC_EV_ALIAS_ARMV8_COMMON() \ + __PMC_EV_ALIAS("INST_SPEC", ARMV8_EVENT_1BH) \ + __PMC_EV_ALIAS("TTBR_WRITE_RETIRED", ARMV8_EVENT_1CH) \ + __PMC_EV_ALIAS("L1D_CACHE_LD", ARMV8_EVENT_40H) \ + __PMC_EV_ALIAS("L1D_CACHE_ST", ARMV8_EVENT_41H) \ + __PMC_EV_ALIAS("L1D_CACHE_REFILL_LD", ARMV8_EVENT_42H) \ + __PMC_EV_ALIAS("L1D_CACHE_REFILL_ST", ARMV8_EVENT_43H) \ + __PMC_EV_ALIAS("L1D_CACHE_WB_VICTIM", ARMV8_EVENT_46H) \ + __PMC_EV_ALIAS("L1D_CACHE_WB_CLEAN", ARMV8_EVENT_47H) \ + __PMC_EV_ALIAS("L1D_CACHE_INVAL", ARMV8_EVENT_48H) \ + __PMC_EV_ALIAS("L1D_TLB_REFILL_LD", ARMV8_EVENT_4CH) \ + __PMC_EV_ALIAS("L1D_TLB_REFILL_ST", ARMV8_EVENT_4DH) \ + __PMC_EV_ALIAS("L2D_CACHE_LD", ARMV8_EVENT_50H) \ + __PMC_EV_ALIAS("L2D_CACHE_ST", ARMV8_EVENT_51H) \ + __PMC_EV_ALIAS("L2D_CACHE_REFILL_LD", ARMV8_EVENT_52H) \ + __PMC_EV_ALIAS("L2D_CACHE_REFILL_ST", ARMV8_EVENT_53H) \ + __PMC_EV_ALIAS("L2D_CACHE_WB_VICTIM", ARMV8_EVENT_56H) \ + __PMC_EV_ALIAS("L2D_CACHE_WB_CLEAN", ARMV8_EVENT_57H) \ + __PMC_EV_ALIAS("L2D_CACHE_INVAL", ARMV8_EVENT_58H) \ + __PMC_EV_ALIAS("BUS_ACCESS_SHARED", ARMV8_EVENT_62H) \ + __PMC_EV_ALIAS("BUS_ACCESS_NOT_SHARED", ARMV8_EVENT_63H) \ + __PMC_EV_ALIAS("BUS_ACCESS_NORMAL", ARMV8_EVENT_64H) \ + __PMC_EV_ALIAS("BUS_ACCESS_PERIPH", ARMV8_EVENT_65H) \ + __PMC_EV_ALIAS("MEM_ACCESS_LD", ARMV8_EVENT_66H) \ + __PMC_EV_ALIAS("MEM_ACCESS_ST", ARMV8_EVENT_67H) \ + __PMC_EV_ALIAS("UNALIGNED_LD_SPEC", ARMV8_EVENT_68H) \ + __PMC_EV_ALIAS("UNALIGNED_ST_SPEC", ARMV8_EVENT_69H) \ + __PMC_EV_ALIAS("UNALIGNED_LDST_SPEC", ARMV8_EVENT_6AH) \ + __PMC_EV_ALIAS("LDREX_SPEC", ARMV8_EVENT_6CH) \ + __PMC_EV_ALIAS("STREX_PASS_SPEC", ARMV8_EVENT_6DH) \ + __PMC_EV_ALIAS("STREX_FAIL_SPEC", ARMV8_EVENT_6EH) \ + __PMC_EV_ALIAS("LD_SPEC", ARMV8_EVENT_70H) \ + __PMC_EV_ALIAS("ST_SPEC", ARMV8_EVENT_71H) \ + __PMC_EV_ALIAS("LDST_SPEC", ARMV8_EVENT_72H) \ + __PMC_EV_ALIAS("DP_SPEC", ARMV8_EVENT_73H) \ + __PMC_EV_ALIAS("ASE_SPEC", ARMV8_EVENT_74H) \ + __PMC_EV_ALIAS("VFP_SPEC", ARMV8_EVENT_75H) \ + __PMC_EV_ALIAS("PC_WRITE_SPEC", ARMV8_EVENT_76H) \ + __PMC_EV_ALIAS("CRYPTO_SPEC", ARMV8_EVENT_77H) \ + __PMC_EV_ALIAS("BR_IMMED_SPEC", ARMV8_EVENT_78H) \ + __PMC_EV_ALIAS("BR_RETURN_SPEC", ARMV8_EVENT_79H) \ + __PMC_EV_ALIAS("ISB_SPEC", ARMV8_EVENT_7CH) \ + __PMC_EV_ALIAS("DSB_SPEC", ARMV8_EVENT_7DH) \ + __PMC_EV_ALIAS("DMB_SPEC", ARMV8_EVENT_7EH) \ + __PMC_EV_ALIAS("EXC_UNDEF", ARMV8_EVENT_81H) \ + __PMC_EV_ALIAS("EXC_SVC", ARMV8_EVENT_82H) \ + __PMC_EV_ALIAS("EXC_PABORT", ARMV8_EVENT_83H) \ + __PMC_EV_ALIAS("EXC_DABORT", ARMV8_EVENT_84H) \ + __PMC_EV_ALIAS("EXC_SMC", ARMV8_EVENT_88H) \ + __PMC_EV_ALIAS("EXC_HVC", ARMV8_EVENT_8AH) \ + __PMC_EV_ALIAS("EXC_TRAP_PABORT", ARMV8_EVENT_8BH) \ + __PMC_EV_ALIAS("EXC_TRAP_DABORT", ARMV8_EVENT_8CH) \ + __PMC_EV_ALIAS("EXC_TRAP_OTHER", ARMV8_EVENT_8DH) \ + __PMC_EV_ALIAS("EXC_TRAP_IRQ", ARMV8_EVENT_8EH) \ + __PMC_EV_ALIAS("EXC_TRAP_FIQ", ARMV8_EVENT_8FH) \ + __PMC_EV_ALIAS("RC_LD_SPEC", ARMV8_EVENT_90H) \ + __PMC_EV_ALIAS("RC_ST_SPEC", ARMV8_EVENT_91H) + /* * MIPS Events from "Programming the MIPS32 24K Core Family", * Document Number: MD00355 Revision 04.63 December 19, 2008 @@ -5566,6 +5929,7 @@ __PMC_EV_ALIAS("IMPC_C0H_TRK_REQUEST.ALL", UCP_EVENT_84H_01H) * 0x13100 0x00FF IBM PPC970 events * 0x13300 0x00FF Freescale e500 events * 0x14000 0x0100 ARMv7 events + * 0x14100 0x0100 ARMv8 events * 0x20000 0x1000 Software events */ #define __PMC_EVENTS() \ @@ -5605,6 +5969,8 @@ __PMC_EV_ALIAS("IMPC_C0H_TRK_REQUEST.ALL", UCP_EVENT_84H_01H) __PMC_EV_E500() \ __PMC_EV_BLOCK(ARMV7, 0x14000) \ __PMC_EV_ARMV7() \ + __PMC_EV_BLOCK(ARMV8, 0x14100) \ + __PMC_EV_ARMV8() #define PMC_EVENT_FIRST PMC_EV_TSC_TSC #define PMC_EVENT_LAST PMC_EV_SOFT_LAST diff --git a/sys/dev/hyperv/storvsc/hv_storvsc_drv_freebsd.c b/sys/dev/hyperv/storvsc/hv_storvsc_drv_freebsd.c index f8a871b285a9..27a94efa6be6 100644 --- a/sys/dev/hyperv/storvsc/hv_storvsc_drv_freebsd.c +++ b/sys/dev/hyperv/storvsc/hv_storvsc_drv_freebsd.c @@ -87,6 +87,8 @@ __FBSDID("$FreeBSD$"); #define STORVSC_WIN8_MAJOR 5 #define STORVSC_WIN8_MINOR 1 +#define VSTOR_PKT_SIZE (sizeof(struct vstor_packet) - vmscsi_size_delta) + #define HV_ALIGN(x, a) roundup2(x, a) struct storvsc_softc; @@ -202,6 +204,21 @@ static struct storvsc_driver_props g_drv_props_table[] = { STORVSC_RINGBUFFER_SIZE} }; +/* + * Sense buffer size changed in win8; have a run-time + * variable to track the size we should use. + */ +static int sense_buffer_size; + +/* + * The size of the vmscsi_request has changed in win8. The + * additional size is for the newly added elements in the + * structure. These elements are valid only when we are talking + * to a win8 host. + * Track the correct size we need to apply. + */ +static int vmscsi_size_delta; + static int storvsc_current_major; static int storvsc_current_minor; @@ -214,6 +231,7 @@ static void storvsc_action(struct cam_sim * sim, union ccb * ccb); static int create_storvsc_request(union ccb *ccb, struct hv_storvsc_request *reqp); static void storvsc_free_request(struct storvsc_softc *sc, struct hv_storvsc_request *reqp); static enum hv_storage_type storvsc_get_storage_type(device_t dev); +static void hv_storvsc_rescan_target(struct storvsc_softc *sc); static void hv_storvsc_on_channel_callback(void *context); static void hv_storvsc_on_iocompletion( struct storvsc_softc *sc, struct vstor_packet *vstor_packet, @@ -381,7 +399,7 @@ storvsc_send_multichannel_request(struct hv_device *dev, int max_chans) ret = hv_vmbus_channel_send_packet( dev->channel, vstor_packet, - sizeof(struct vstor_packet), + VSTOR_PKT_SIZE, (uint64_t)(uintptr_t)request, HV_VMBUS_PACKET_TYPE_DATA_IN_BAND, HV_VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED); @@ -448,7 +466,7 @@ hv_storvsc_channel_init(struct hv_device *dev) ret = hv_vmbus_channel_send_packet( dev->channel, vstor_packet, - sizeof(struct vstor_packet), + VSTOR_PKT_SIZE, (uint64_t)(uintptr_t)request, HV_VMBUS_PACKET_TYPE_DATA_IN_BAND, HV_VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED); @@ -481,7 +499,7 @@ hv_storvsc_channel_init(struct hv_device *dev) ret = hv_vmbus_channel_send_packet( dev->channel, vstor_packet, - sizeof(struct vstor_packet), + VSTOR_PKT_SIZE, (uint64_t)(uintptr_t)request, HV_VMBUS_PACKET_TYPE_DATA_IN_BAND, HV_VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED); @@ -510,7 +528,7 @@ hv_storvsc_channel_init(struct hv_device *dev) ret = hv_vmbus_channel_send_packet( dev->channel, vstor_packet, - sizeof(struct vstor_packet), + VSTOR_PKT_SIZE, (uint64_t)(uintptr_t)request, HV_VMBUS_PACKET_TYPE_DATA_IN_BAND, HV_VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED); @@ -546,7 +564,7 @@ hv_storvsc_channel_init(struct hv_device *dev) ret = hv_vmbus_channel_send_packet( dev->channel, vstor_packet, - sizeof(struct vstor_packet), + VSTOR_PKT_SIZE, (uint64_t)(uintptr_t)request, HV_VMBUS_PACKET_TYPE_DATA_IN_BAND, HV_VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED); @@ -644,7 +662,7 @@ hv_storvsc_host_reset(struct hv_device *dev) ret = hv_vmbus_channel_send_packet(dev->channel, vstor_packet, - sizeof(struct vstor_packet), + VSTOR_PKT_SIZE, (uint64_t)(uintptr_t)&sc->hs_reset_req, HV_VMBUS_PACKET_TYPE_DATA_IN_BAND, HV_VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED); @@ -695,9 +713,9 @@ hv_storvsc_io_request(struct hv_device *device, vstor_packet->flags |= REQUEST_COMPLETION_FLAG; - vstor_packet->u.vm_srb.length = sizeof(struct vmscsi_req); + vstor_packet->u.vm_srb.length = VSTOR_PKT_SIZE; - vstor_packet->u.vm_srb.sense_info_len = SENSE_BUFFER_SIZE; + vstor_packet->u.vm_srb.sense_info_len = sense_buffer_size; vstor_packet->u.vm_srb.transfer_len = request->data_buf.length; @@ -711,14 +729,14 @@ hv_storvsc_io_request(struct hv_device *device, outgoing_channel, &request->data_buf, vstor_packet, - sizeof(struct vstor_packet), + VSTOR_PKT_SIZE, (uint64_t)(uintptr_t)request); } else { ret = hv_vmbus_channel_send_packet( outgoing_channel, vstor_packet, - sizeof(struct vstor_packet), + VSTOR_PKT_SIZE, (uint64_t)(uintptr_t)request, HV_VMBUS_PACKET_TYPE_DATA_IN_BAND, HV_VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED); @@ -771,6 +789,41 @@ hv_storvsc_on_iocompletion(struct storvsc_softc *sc, } } +static void +hv_storvsc_rescan_target(struct storvsc_softc *sc) +{ + path_id_t pathid; + target_id_t targetid; + union ccb *ccb; + + pathid = cam_sim_path(sc->hs_sim); + targetid = CAM_TARGET_WILDCARD; + + /* + * Allocate a CCB and schedule a rescan. + */ + ccb = xpt_alloc_ccb_nowait(); + if (ccb == NULL) { + printf("unable to alloc CCB for rescan\n"); + return; + } + + if (xpt_create_path(&ccb->ccb_h.path, NULL, pathid, targetid, + CAM_LUN_WILDCARD) != CAM_REQ_CMP) { + printf("unable to create path for rescan, pathid: %d," + "targetid: %d\n", pathid, targetid); + xpt_free_ccb(ccb); + return; + } + + if (targetid == CAM_TARGET_WILDCARD) + ccb->ccb_h.func_code = XPT_SCAN_BUS; + else + ccb->ccb_h.func_code = XPT_SCAN_TGT; + + xpt_rescan(ccb); +} + static void hv_storvsc_on_channel_callback(void *context) { @@ -801,7 +854,7 @@ hv_storvsc_on_channel_callback(void *context) ret = hv_vmbus_channel_recv_packet( channel, packet, - roundup2(sizeof(struct vstor_packet), 8), + roundup2(VSTOR_PKT_SIZE, 8), &bytes_recvd, &request_id); @@ -826,11 +879,13 @@ hv_storvsc_on_channel_callback(void *context) vstor_packet, request); break; case VSTOR_OPERATION_REMOVEDEVICE: - case VSTOR_OPERATION_ENUMERATE_BUS: printf("VMBUS: storvsc operation %d not " "implemented.\n", vstor_packet->operation); /* TODO: implement */ break; + case VSTOR_OPERATION_ENUMERATE_BUS: + hv_storvsc_rescan_target(sc); + break; default: break; } @@ -838,7 +893,7 @@ hv_storvsc_on_channel_callback(void *context) ret = hv_vmbus_channel_recv_packet( channel, packet, - roundup2(sizeof(struct vstor_packet), 8), + roundup2(VSTOR_PKT_SIZE, 8), &bytes_recvd, &request_id); } @@ -861,13 +916,17 @@ storvsc_probe(device_t dev) int ata_disk_enable = 0; int ret = ENXIO; - if ((HV_VMBUS_VERSION_WIN8 == hv_vmbus_protocal_version) || - (HV_VMBUS_VERSION_WIN8_1 == hv_vmbus_protocal_version)){ - storvsc_current_major = STORVSC_WIN8_MAJOR; - storvsc_current_minor = STORVSC_WIN8_MINOR; - } else { + if (hv_vmbus_protocal_version == HV_VMBUS_VERSION_WS2008 || + hv_vmbus_protocal_version == HV_VMBUS_VERSION_WIN7) { + sense_buffer_size = PRE_WIN8_STORVSC_SENSE_BUFFER_SIZE; + vmscsi_size_delta = sizeof(struct vmscsi_win8_extension); storvsc_current_major = STORVSC_WIN7_MAJOR; storvsc_current_minor = STORVSC_WIN7_MINOR; + } else { + sense_buffer_size = POST_WIN7_STORVSC_SENSE_BUFFER_SIZE; + vmscsi_size_delta = 0; + storvsc_current_major = STORVSC_WIN8_MAJOR; + storvsc_current_minor = STORVSC_WIN8_MINOR; } switch (storvsc_get_storage_type(dev)) { @@ -1414,7 +1473,7 @@ storvsc_action(struct cam_sim *sim, union ccb *ccb) } if (ccb->ccb_h.timeout != CAM_TIME_INFINITY) { - callout_init(&reqp->callout, CALLOUT_MPSAFE); + callout_init(&reqp->callout, 1); callout_reset_sbt(&reqp->callout, SBT_1MS * ccb->ccb_h.timeout, 0, storvsc_timeout, reqp, 0); diff --git a/sys/dev/hyperv/storvsc/hv_vstorage.h b/sys/dev/hyperv/storvsc/hv_vstorage.h index deb918303d60..026189c9ae47 100644 --- a/sys/dev/hyperv/storvsc/hv_vstorage.h +++ b/sys/dev/hyperv/storvsc/hv_vstorage.h @@ -51,6 +51,8 @@ * V1 Beta 0.1 * V1 RC < 2008/1/31 1.0 * V1 RC > 2008/1/31 2.0 + * Win7: 4.2 + * Win8: 5.1 */ #define VMSTOR_PROTOCOL_VERSION_CURRENT VMSTOR_PROTOCOL_VERSION(5, 1) @@ -83,9 +85,25 @@ enum vstor_packet_ops { */ #define CDB16GENERIC_LENGTH 0x10 -#define SENSE_BUFFER_SIZE 0x12 +#define SENSE_BUFFER_SIZE 0x14 #define MAX_DATA_BUFFER_LENGTH_WITH_PADDING 0x14 +#define POST_WIN7_STORVSC_SENSE_BUFFER_SIZE 0x14 +#define PRE_WIN8_STORVSC_SENSE_BUFFER_SIZE 0x12 + + +struct vmscsi_win8_extension { + /* + * The following were added in Windows 8 + */ + uint16_t reserve; + uint8_t queue_tag; + uint8_t queue_action; + uint32_t srb_flags; + uint32_t time_out_value; + uint32_t queue_sort_ey; +} __packed; + struct vmscsi_req { uint16_t length; uint8_t srb_status; @@ -114,6 +132,11 @@ struct vmscsi_req { uint8_t reserved_array[MAX_DATA_BUFFER_LENGTH_WITH_PADDING]; } u; + /* + * The following was added in win8. + */ + struct vmscsi_win8_extension win8_extension; + } __packed; /** diff --git a/sys/dev/if_ndis/if_ndis.c b/sys/dev/if_ndis/if_ndis.c index 8f235274409a..9c57aedd3a55 100644 --- a/sys/dev/if_ndis/if_ndis.c +++ b/sys/dev/if_ndis/if_ndis.c @@ -159,8 +159,8 @@ static void ndis_tick (void *); static void ndis_ticktask (device_object *, void *); static int ndis_raw_xmit (struct ieee80211_node *, struct mbuf *, const struct ieee80211_bpf_params *); -static void ndis_update_mcast (struct ifnet *ifp); -static void ndis_update_promisc (struct ifnet *ifp); +static void ndis_update_mcast (struct ieee80211com *); +static void ndis_update_promisc (struct ieee80211com *); static void ndis_start (struct ifnet *); static void ndis_starttask (device_object *, void *); static void ndis_resettask (device_object *, void *); @@ -558,7 +558,7 @@ ndis_attach(dev) InitializeListHead(&sc->ndis_shlist); InitializeListHead(&sc->ndisusb_tasklist); InitializeListHead(&sc->ndisusb_xferdonelist); - callout_init(&sc->ndis_stat_callout, CALLOUT_MPSAFE); + callout_init(&sc->ndis_stat_callout, 1); if (sc->ndis_iftype == PCMCIABus) { error = ndis_alloc_amem(sc); @@ -734,10 +734,12 @@ ndis_attach(dev) uint32_t arg; int r; - callout_init(&sc->ndis_scan_callout, CALLOUT_MPSAFE); + callout_init(&sc->ndis_scan_callout, 1); ifp->if_ioctl = ndis_ioctl_80211; ic->ic_ifp = ifp; + ic->ic_softc = sc; + ic->ic_name = device_get_nameunit(dev); ic->ic_opmode = IEEE80211_M_STA; ic->ic_phytype = IEEE80211_T_DS; ic->ic_caps = IEEE80211_C_8023ENCAP | @@ -1771,15 +1773,15 @@ ndis_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, } static void -ndis_update_mcast(struct ifnet *ifp) +ndis_update_mcast(struct ieee80211com *ic) { - struct ndis_softc *sc = ifp->if_softc; + struct ndis_softc *sc = ic->ic_softc; ndis_setmulti(sc); } static void -ndis_update_promisc(struct ifnet *ifp) +ndis_update_promisc(struct ieee80211com *ic) { /* not supported */ } @@ -3316,7 +3318,7 @@ ndis_scan_results(struct ndis_softc *sc) DPRINTF(("scan: bssid %s chan %dMHz (%d/%d) rssi %d\n", ether_sprintf(wb->nwbx_macaddr), freq, sp.bchan, chanflag, rssi)); - ieee80211_add_scan(vap, &sp, &wh, 0, rssi, noise); + ieee80211_add_scan(vap, ic->ic_curchan, &sp, &wh, 0, rssi, noise); wb = (ndis_wlan_bssid_ex *)((char *)wb + wb->nwbx_len); } free(bl, M_DEVBUF); diff --git a/sys/dev/iicbus/iicbus.c b/sys/dev/iicbus/iicbus.c index dc567604be95..71098ed2fe5d 100644 --- a/sys/dev/iicbus/iicbus.c +++ b/sys/dev/iicbus/iicbus.c @@ -38,6 +38,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include #include @@ -147,6 +148,7 @@ iicbus_print_child(device_t dev, device_t child) retval += bus_print_child_header(dev, child); if (devi->addr != 0) retval += printf(" at addr %#x", devi->addr); + resource_list_print_type(&devi->rl, "irq", SYS_RES_IRQ, "%ld"); retval += bus_print_child_footer(dev, child); return (retval); @@ -157,9 +159,7 @@ iicbus_probe_nomatch(device_t bus, device_t child) { struct iicbus_ivar *devi = IICBUS_IVAR(child); - device_printf(bus, ""); - printf(" at addr %#x\n", devi->addr); - return; + device_printf(bus, " at addr %#x\n", devi->addr); } static int @@ -209,6 +209,7 @@ iicbus_add_child(device_t dev, u_int order, const char *name, int unit) device_delete_child(dev, child); return (0); } + resource_list_init(&devi->rl); device_set_ivars(child, devi); return (child); } @@ -217,11 +218,26 @@ static void iicbus_hinted_child(device_t bus, const char *dname, int dunit) { device_t child; + int irq; struct iicbus_ivar *devi; child = BUS_ADD_CHILD(bus, 0, dname, dunit); devi = IICBUS_IVAR(child); resource_int_value(dname, dunit, "addr", &devi->addr); + if (resource_int_value(dname, dunit, "irq", &irq) == 0) { + if (bus_set_resource(child, SYS_RES_IRQ, 0, irq, 1) != 0) + device_printf(bus, + "warning: bus_set_resource() failed\n"); + } +} + +static struct resource_list * +iicbus_get_resource_list(device_t bus __unused, device_t child) +{ + struct iicbus_ivar *devi; + + devi = IICBUS_IVAR(child); + return (&devi->rl); } int @@ -291,14 +307,24 @@ iicbus_get_frequency(device_t dev, u_char speed) } static device_method_t iicbus_methods[] = { - /* device interface */ - DEVMETHOD(device_probe, iicbus_probe), - DEVMETHOD(device_attach, iicbus_attach), - DEVMETHOD(device_detach, iicbus_detach), + /* device interface */ + DEVMETHOD(device_probe, iicbus_probe), + DEVMETHOD(device_attach, iicbus_attach), + DEVMETHOD(device_detach, iicbus_detach), - /* bus interface */ - DEVMETHOD(bus_add_child, iicbus_add_child), - DEVMETHOD(bus_print_child, iicbus_print_child), + /* bus interface */ + DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), + DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), + DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), + DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), + DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource), + DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource), + DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), + DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource), + DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), + DEVMETHOD(bus_get_resource_list, iicbus_get_resource_list), + DEVMETHOD(bus_add_child, iicbus_add_child), + DEVMETHOD(bus_print_child, iicbus_print_child), DEVMETHOD(bus_probe_nomatch, iicbus_probe_nomatch), DEVMETHOD(bus_read_ivar, iicbus_read_ivar), DEVMETHOD(bus_child_pnpinfo_str, iicbus_child_pnpinfo_str), @@ -322,4 +348,3 @@ devclass_t iicbus_devclass; MODULE_VERSION(iicbus, IICBUS_MODVER); DRIVER_MODULE(iicbus, iichb, iicbus_driver, iicbus_devclass, 0, 0); - diff --git a/sys/dev/iicbus/iicbus.h b/sys/dev/iicbus/iicbus.h index b5905ad8bc31..10853192e975 100644 --- a/sys/dev/iicbus/iicbus.h +++ b/sys/dev/iicbus/iicbus.h @@ -50,6 +50,7 @@ struct iicbus_softc struct iicbus_ivar { uint32_t addr; + struct resource_list rl; bool nostop; }; diff --git a/sys/dev/ipw/if_ipw.c b/sys/dev/ipw/if_ipw.c index 04c33639f59b..d3eb85e8f188 100644 --- a/sys/dev/ipw/if_ipw.c +++ b/sys/dev/ipw/if_ipw.c @@ -286,6 +286,8 @@ ipw_attach(device_t dev) IFQ_SET_READY(&ifp->if_snd); ic->ic_ifp = ifp; + ic->ic_softc = sc; + ic->ic_name = device_get_nameunit(dev); ic->ic_opmode = IEEE80211_M_STA; ic->ic_phytype = IEEE80211_T_DS; @@ -751,11 +753,8 @@ ipw_release(struct ipw_softc *sc) } if (sc->tbd_dmat != NULL) { - if (sc->stbd_list != NULL) { - bus_dmamap_unload(sc->tbd_dmat, sc->tbd_map); - bus_dmamem_free(sc->tbd_dmat, sc->tbd_list, - sc->tbd_map); - } + bus_dmamap_unload(sc->tbd_dmat, sc->tbd_map); + bus_dmamem_free(sc->tbd_dmat, sc->tbd_list, sc->tbd_map); bus_dma_tag_destroy(sc->tbd_dmat); } diff --git a/sys/dev/isci/isci_io_request.c b/sys/dev/isci/isci_io_request.c index 4151900bdd22..e6b68fd9b46a 100644 --- a/sys/dev/isci/isci_io_request.c +++ b/sys/dev/isci/isci_io_request.c @@ -680,7 +680,7 @@ isci_request_construct(struct ISCI_REQUEST *request, request->dma_tag = io_buffer_dma_tag; request->physical_address = physical_address; bus_dmamap_create(request->dma_tag, 0, &request->dma_map); - callout_init(&request->timer, CALLOUT_MPSAFE); + callout_init(&request->timer, 1); } static void diff --git a/sys/dev/iscsi/icl_soft.c b/sys/dev/iscsi/icl_soft.c index e31b213972c9..c006c05aa41d 100644 --- a/sys/dev/iscsi/icl_soft.c +++ b/sys/dev/iscsi/icl_soft.c @@ -773,10 +773,6 @@ icl_receive_thread(void *arg) ic = arg; so = ic->ic_socket; - ICL_CONN_LOCK(ic); - ic->ic_receive_running = true; - ICL_CONN_UNLOCK(ic); - for (;;) { if (ic->ic_disconnecting) { //ICL_DEBUG("terminating"); @@ -998,8 +994,6 @@ icl_send_thread(void *arg) STAILQ_INIT(&queue); ICL_CONN_LOCK(ic); - ic->ic_send_running = true; - for (;;) { for (;;) { /* @@ -1274,25 +1268,6 @@ icl_conn_start(struct icl_conn *ic) return (error); } - /* - * Start threads. - */ - error = kthread_add(icl_send_thread, ic, NULL, NULL, 0, 0, "%stx", - ic->ic_name); - if (error != 0) { - ICL_WARN("kthread_add(9) failed with error %d", error); - icl_soft_conn_close(ic); - return (error); - } - - error = kthread_add(icl_receive_thread, ic, NULL, NULL, 0, 0, "%srx", - ic->ic_name); - if (error != 0) { - ICL_WARN("kthread_add(9) failed with error %d", error); - icl_soft_conn_close(ic); - return (error); - } - /* * Register socket upcall, to get notified about incoming PDUs * and free space to send outgoing ones. @@ -1304,6 +1279,35 @@ icl_conn_start(struct icl_conn *ic) soupcall_set(ic->ic_socket, SO_RCV, icl_soupcall_receive, ic); SOCKBUF_UNLOCK(&ic->ic_socket->so_rcv); + /* + * Start threads. + */ + ICL_CONN_LOCK(ic); + ic->ic_send_running = ic->ic_receive_running = true; + ICL_CONN_UNLOCK(ic); + error = kthread_add(icl_send_thread, ic, NULL, NULL, 0, 0, "%stx", + ic->ic_name); + if (error != 0) { + ICL_WARN("kthread_add(9) failed with error %d", error); + ICL_CONN_LOCK(ic); + ic->ic_send_running = ic->ic_receive_running = false; + cv_signal(&ic->ic_send_cv); + ICL_CONN_UNLOCK(ic); + icl_soft_conn_close(ic); + return (error); + } + error = kthread_add(icl_receive_thread, ic, NULL, NULL, 0, 0, "%srx", + ic->ic_name); + if (error != 0) { + ICL_WARN("kthread_add(9) failed with error %d", error); + ICL_CONN_LOCK(ic); + ic->ic_receive_running = false; + cv_signal(&ic->ic_send_cv); + ICL_CONN_UNLOCK(ic); + icl_soft_conn_close(ic); + return (error); + } + return (0); } @@ -1357,47 +1361,43 @@ void icl_soft_conn_close(struct icl_conn *ic) { struct icl_pdu *pdu; - - ICL_CONN_LOCK_ASSERT_NOT(ic); + struct socket *so; ICL_CONN_LOCK(ic); - if (ic->ic_socket == NULL) { + + /* + * Wake up the threads, so they can properly terminate. + */ + ic->ic_disconnecting = true; + while (ic->ic_receive_running || ic->ic_send_running) { + cv_signal(&ic->ic_receive_cv); + cv_signal(&ic->ic_send_cv); + cv_wait(&ic->ic_send_cv, ic->ic_lock); + } + + /* Some other thread could close the connection same time. */ + so = ic->ic_socket; + if (so == NULL) { ICL_CONN_UNLOCK(ic); return; } + ic->ic_socket = NULL; /* * Deregister socket upcalls. */ ICL_CONN_UNLOCK(ic); - SOCKBUF_LOCK(&ic->ic_socket->so_snd); - if (ic->ic_socket->so_snd.sb_upcall != NULL) - soupcall_clear(ic->ic_socket, SO_SND); - SOCKBUF_UNLOCK(&ic->ic_socket->so_snd); - SOCKBUF_LOCK(&ic->ic_socket->so_rcv); - if (ic->ic_socket->so_rcv.sb_upcall != NULL) - soupcall_clear(ic->ic_socket, SO_RCV); - SOCKBUF_UNLOCK(&ic->ic_socket->so_rcv); + SOCKBUF_LOCK(&so->so_snd); + if (so->so_snd.sb_upcall != NULL) + soupcall_clear(so, SO_SND); + SOCKBUF_UNLOCK(&so->so_snd); + SOCKBUF_LOCK(&so->so_rcv); + if (so->so_rcv.sb_upcall != NULL) + soupcall_clear(so, SO_RCV); + SOCKBUF_UNLOCK(&so->so_rcv); + soclose(so); ICL_CONN_LOCK(ic); - ic->ic_disconnecting = true; - - /* - * Wake up the threads, so they can properly terminate. - */ - while (ic->ic_receive_running || ic->ic_send_running) { - //ICL_DEBUG("waiting for send/receive threads to terminate"); - cv_signal(&ic->ic_receive_cv); - cv_signal(&ic->ic_send_cv); - cv_wait(&ic->ic_send_cv, ic->ic_lock); - } - //ICL_DEBUG("send/receive threads terminated"); - - ICL_CONN_UNLOCK(ic); - soclose(ic->ic_socket); - ICL_CONN_LOCK(ic); - ic->ic_socket = NULL; - if (ic->ic_receive_pdu != NULL) { //ICL_DEBUG("freeing partially received PDU"); icl_pdu_free(ic->ic_receive_pdu); diff --git a/sys/dev/iwi/if_iwi.c b/sys/dev/iwi/if_iwi.c index b6de4b69e7af..bc95802956d2 100644 --- a/sys/dev/iwi/if_iwi.c +++ b/sys/dev/iwi/if_iwi.c @@ -364,6 +364,8 @@ iwi_attach(device_t dev) IFQ_SET_READY(&ifp->if_snd); ic->ic_ifp = ifp; + ic->ic_softc = sc; + ic->ic_name = device_get_nameunit(dev); ic->ic_opmode = IEEE80211_M_STA; ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ diff --git a/sys/dev/iwn/if_iwn.c b/sys/dev/iwn/if_iwn.c index 37335099dad2..fd91f8d1ff97 100644 --- a/sys/dev/iwn/if_iwn.c +++ b/sys/dev/iwn/if_iwn.c @@ -247,7 +247,7 @@ static int iwn_set_link_quality(struct iwn_softc *, struct ieee80211_node *); static int iwn_add_broadcast_node(struct iwn_softc *, int); static int iwn_updateedca(struct ieee80211com *); -static void iwn_update_mcast(struct ifnet *); +static void iwn_update_mcast(struct ieee80211com *); static void iwn_set_led(struct iwn_softc *, uint8_t, uint8_t, uint8_t); static int iwn_set_critical_temp(struct iwn_softc *); static int iwn_set_timing(struct iwn_softc *, struct ieee80211_node *); @@ -556,6 +556,8 @@ iwn_attach(device_t dev) ic = ifp->if_l2com; ic->ic_ifp = ifp; + ic->ic_softc = sc; + ic->ic_name = device_get_nameunit(dev); ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ @@ -1315,10 +1317,10 @@ iwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, const uint8_t bssid[IEEE80211_ADDR_LEN], const uint8_t mac[IEEE80211_ADDR_LEN]) { + struct iwn_softc *sc = ic->ic_softc; struct iwn_vap *ivp; struct ieee80211vap *vap; uint8_t mac1[IEEE80211_ADDR_LEN]; - struct iwn_softc *sc = ic->ic_ifp->if_softc; if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ return NULL; @@ -1875,7 +1877,7 @@ iwn_alloc_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring) &paddr, BUS_DMA_NOWAIT); if (error != 0 && error != EFBIG) { device_printf(sc->sc_dev, - "%s: can't not map mbuf, error %d\n", __func__, + "%s: can't map mbuf, error %d\n", __func__, error); goto fail; } @@ -2036,6 +2038,10 @@ iwn_reset_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring) m_freem(data->m); data->m = NULL; } + if (data->ni != NULL) { + ieee80211_free_node(data->ni); + data->ni = NULL; + } } /* Clear TX descriptors. */ memset(ring->desc, 0, ring->desc_dma.size); @@ -2521,7 +2527,7 @@ static int iwn_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *rd, int nchan, struct ieee80211_channel chans[]) { - struct iwn_softc *sc = ic->ic_ifp->if_softc; + struct iwn_softc *sc = ic->ic_softc; int i; for (i = 0; i < nchan; i++) { @@ -2530,8 +2536,7 @@ iwn_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *rd, channel = iwn_find_eeprom_channel(sc, c); if (channel == NULL) { - if_printf(ic->ic_ifp, - "%s: invalid channel %u freq %u/0x%x\n", + ic_printf(ic, "%s: invalid channel %u freq %u/0x%x\n", __func__, c->ic_ieee, c->ic_freq, c->ic_flags); return EINVAL; } @@ -2793,7 +2798,7 @@ iwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) { struct iwn_vap *ivp = IWN_VAP(vap); struct ieee80211com *ic = vap->iv_ic; - struct iwn_softc *sc = ic->ic_ifp->if_softc; + struct iwn_softc *sc = ic->ic_softc; int error = 0; DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__); @@ -2969,7 +2974,7 @@ iwn_rx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, return; } /* Discard frames that are too short. */ - if (len < sizeof (*wh)) { + if (len < sizeof (struct ieee80211_frame_ack)) { DPRINTF(sc, IWN_DEBUG_RECV, "%s: frame too short: %d\n", __func__, len); if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); @@ -3021,7 +3026,10 @@ iwn_rx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, /* Grab a reference to the source node. */ wh = mtod(m, struct ieee80211_frame *); - ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); + if (len >= sizeof(struct ieee80211_frame_min)) + ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); + else + ni = NULL; nf = (ni != NULL && ni->ni_vap->iv_state == IEEE80211_S_RUN && (ic->ic_flags & IEEE80211_F_SCAN) == 0) ? sc->noise : -95; @@ -4047,8 +4055,10 @@ iwn_intr(void *arg) r2 = 0; /* Unused. */ } else { r1 = IWN_READ(sc, IWN_INT); - if (r1 == 0xffffffff || (r1 & 0xfffffff0) == 0xa5a5a5a0) + if (r1 == 0xffffffff || (r1 & 0xfffffff0) == 0xa5a5a5a0) { + IWN_UNLOCK(sc); return; /* Hardware gone! */ + } r2 = IWN_READ(sc, IWN_FH_INT); } @@ -4519,7 +4529,7 @@ iwn_tx_data(struct iwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni) return error; } /* Too many DMA segments, linearize mbuf. */ - m1 = m_collapse(m, M_NOWAIT, IWN_MAX_SCATTER); + m1 = m_collapse(m, M_NOWAIT, IWN_MAX_SCATTER - 1); if (m1 == NULL) { device_printf(sc->sc_dev, "%s: could not defrag mbuf\n", __func__); @@ -4725,7 +4735,7 @@ iwn_tx_data_raw(struct iwn_softc *sc, struct mbuf *m, return error; } /* Too many DMA segments, linearize mbuf. */ - m1 = m_collapse(m, M_NOWAIT, IWN_MAX_SCATTER); + m1 = m_collapse(m, M_NOWAIT, IWN_MAX_SCATTER - 1); if (m1 == NULL) { device_printf(sc->sc_dev, "%s: could not defrag mbuf\n", __func__); @@ -4825,8 +4835,8 @@ iwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, /* NB: m is reclaimed on tx failure */ ieee80211_free_node(ni); if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); - } - sc->sc_tx_timer = 5; + } else + sc->sc_tx_timer = 5; IWN_UNLOCK(sc); @@ -4872,9 +4882,8 @@ iwn_start_locked(struct ifnet *ifp) if (iwn_tx_data(sc, m, ni) != 0) { ieee80211_free_node(ni); if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); - continue; - } - sc->sc_tx_timer = 5; + } else + sc->sc_tx_timer = 5; } DPRINTF(sc, IWN_DEBUG_XMIT, "%s: done\n", __func__); @@ -4895,7 +4904,7 @@ iwn_watchdog(void *arg) if (sc->sc_tx_timer > 0) { if (--sc->sc_tx_timer == 0) { - if_printf(ifp, "device timeout\n"); + ic_printf(ic, "device timeout\n"); ieee80211_runtask(ic, &sc->sc_reinit_task); return; } @@ -4950,7 +4959,6 @@ iwn_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) IWN_LOCK(sc); memset(&sc->last_stat, 0, sizeof(struct iwn_stats)); IWN_UNLOCK(sc); - error = 0; break; default: error = EINVAL; @@ -5240,7 +5248,7 @@ static int iwn_updateedca(struct ieee80211com *ic) { #define IWN_EXP2(x) ((1 << (x)) - 1) /* CWmin = 2^ECWmin - 1 */ - struct iwn_softc *sc = ic->ic_ifp->if_softc; + struct iwn_softc *sc = ic->ic_softc; struct iwn_edca_params cmd; int aci; @@ -5270,7 +5278,7 @@ iwn_updateedca(struct ieee80211com *ic) } static void -iwn_update_mcast(struct ifnet *ifp) +iwn_update_mcast(struct ieee80211com *ic) { /* Ignore */ } @@ -6818,16 +6826,10 @@ iwn_scan(struct iwn_softc *sc, struct ieee80211vap *vap, chan->active = htole16(dwell_active); chan->passive = htole16(dwell_passive); - if (IEEE80211_IS_CHAN_5GHZ(c) && - !(c->ic_flags & IEEE80211_CHAN_PASSIVE)) { + if (IEEE80211_IS_CHAN_5GHZ(c)) chan->rf_gain = 0x3b; - } else if (IEEE80211_IS_CHAN_5GHZ(c)) { - chan->rf_gain = 0x3b; - } else if (!(c->ic_flags & IEEE80211_CHAN_PASSIVE)) { + else chan->rf_gain = 0x28; - } else { - chan->rf_gain = 0x28; - } DPRINTF(sc, IWN_DEBUG_STATE, "%s: chan %u flags 0x%x rf_gain 0x%x " @@ -7080,7 +7082,7 @@ iwn_ampdu_rx_start(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap, int baparamset, int batimeout, int baseqctl) { #define MS(_v, _f) (((_v) & _f) >> _f##_S) - struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc; + struct iwn_softc *sc = ni->ni_ic->ic_softc; struct iwn_ops *ops = &sc->ops; struct iwn_node *wn = (void *)ni; struct iwn_node_info node; @@ -7116,7 +7118,7 @@ static void iwn_ampdu_rx_stop(struct ieee80211_node *ni, struct ieee80211_rx_ampdu *rap) { struct ieee80211com *ic = ni->ni_ic; - struct iwn_softc *sc = ic->ic_ifp->if_softc; + struct iwn_softc *sc = ic->ic_softc; struct iwn_ops *ops = &sc->ops; struct iwn_node *wn = (void *)ni; struct iwn_node_info node; @@ -7144,7 +7146,7 @@ static int iwn_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, int dialogtoken, int baparamset, int batimeout) { - struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc; + struct iwn_softc *sc = ni->ni_ic->ic_softc; int qid; DPRINTF(sc, IWN_DEBUG_TRACE, "->Doing %s\n", __func__); @@ -7174,7 +7176,7 @@ static int iwn_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, int code, int baparamset, int batimeout) { - struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc; + struct iwn_softc *sc = ni->ni_ic->ic_softc; int qid = *(int *)tap->txa_private; uint8_t tid = tap->txa_tid; int ret; @@ -7203,7 +7205,7 @@ iwn_ampdu_tx_start(struct ieee80211com *ic, struct ieee80211_node *ni, uint8_t tid) { struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[tid]; - struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc; + struct iwn_softc *sc = ni->ni_ic->ic_softc; struct iwn_ops *ops = &sc->ops; struct iwn_node *wn = (void *)ni; struct iwn_node_info node; @@ -7237,7 +7239,7 @@ iwn_ampdu_tx_start(struct ieee80211com *ic, struct ieee80211_node *ni, static void iwn_ampdu_tx_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) { - struct iwn_softc *sc = ni->ni_ic->ic_ifp->if_softc; + struct iwn_softc *sc = ni->ni_ic->ic_softc; struct iwn_ops *ops = &sc->ops; uint8_t tid = tap->txa_tid; int qid; @@ -8772,8 +8774,8 @@ static void iwn_scan_curchan(struct ieee80211_scan_state *ss, unsigned long maxdwell) { struct ieee80211vap *vap = ss->ss_vap; - struct iwn_softc *sc = vap->iv_ic->ic_ifp->if_softc; struct ieee80211com *ic = vap->iv_ic; + struct iwn_softc *sc = ic->ic_softc; int error; IWN_LOCK(sc); @@ -8809,7 +8811,6 @@ iwn_hw_reset(void *arg0, int pending) } #ifdef IWN_DEBUG #define IWN_DESC(x) case x: return #x -#define COUNTOF(array) (sizeof(array) / sizeof(array[0])) /* * Translate CSR code to string @@ -8880,7 +8881,7 @@ iwn_debug_register(struct iwn_softc *sc) DPRINTF(sc, IWN_DEBUG_REGISTER, "CSR values: (2nd byte of IWN_INT_COALESCING is IWN_INT_PERIODIC)%s", "\n"); - for (i = 0; i < COUNTOF(csr_tbl); i++){ + for (i = 0; i < nitems(csr_tbl); i++){ DPRINTF(sc, IWN_DEBUG_REGISTER," %10s: 0x%08x ", iwn_get_csr_string(csr_tbl[i]), IWN_READ(sc, csr_tbl[i])); if ((i+1) % 3 == 0) diff --git a/sys/dev/ixl/i40e_adminq.c b/sys/dev/ixl/i40e_adminq.c old mode 100755 new mode 100644 diff --git a/sys/dev/ixl/i40e_adminq.h b/sys/dev/ixl/i40e_adminq.h old mode 100755 new mode 100644 diff --git a/sys/dev/ixl/i40e_adminq_cmd.h b/sys/dev/ixl/i40e_adminq_cmd.h old mode 100755 new mode 100644 diff --git a/sys/dev/ixl/i40e_alloc.h b/sys/dev/ixl/i40e_alloc.h old mode 100755 new mode 100644 diff --git a/sys/dev/ixl/i40e_common.c b/sys/dev/ixl/i40e_common.c old mode 100755 new mode 100644 diff --git a/sys/dev/ixl/i40e_hmc.c b/sys/dev/ixl/i40e_hmc.c old mode 100755 new mode 100644 diff --git a/sys/dev/ixl/i40e_hmc.h b/sys/dev/ixl/i40e_hmc.h old mode 100755 new mode 100644 diff --git a/sys/dev/ixl/i40e_lan_hmc.c b/sys/dev/ixl/i40e_lan_hmc.c old mode 100755 new mode 100644 diff --git a/sys/dev/ixl/i40e_lan_hmc.h b/sys/dev/ixl/i40e_lan_hmc.h old mode 100755 new mode 100644 diff --git a/sys/dev/ixl/i40e_nvm.c b/sys/dev/ixl/i40e_nvm.c old mode 100755 new mode 100644 diff --git a/sys/dev/ixl/i40e_osdep.c b/sys/dev/ixl/i40e_osdep.c old mode 100755 new mode 100644 diff --git a/sys/dev/ixl/i40e_osdep.h b/sys/dev/ixl/i40e_osdep.h old mode 100755 new mode 100644 diff --git a/sys/dev/ixl/i40e_prototype.h b/sys/dev/ixl/i40e_prototype.h old mode 100755 new mode 100644 diff --git a/sys/dev/ixl/i40e_register.h b/sys/dev/ixl/i40e_register.h old mode 100755 new mode 100644 diff --git a/sys/dev/ixl/i40e_status.h b/sys/dev/ixl/i40e_status.h old mode 100755 new mode 100644 diff --git a/sys/dev/ixl/i40e_type.h b/sys/dev/ixl/i40e_type.h old mode 100755 new mode 100644 diff --git a/sys/dev/ixl/i40e_virtchnl.h b/sys/dev/ixl/i40e_virtchnl.h old mode 100755 new mode 100644 diff --git a/sys/dev/ixl/if_ixl.c b/sys/dev/ixl/if_ixl.c old mode 100755 new mode 100644 diff --git a/sys/dev/ixl/if_ixlv.c b/sys/dev/ixl/if_ixlv.c index a9ee127f75e9..fe4c63f85bfe 100644 --- a/sys/dev/ixl/if_ixlv.c +++ b/sys/dev/ixl/if_ixlv.c @@ -1693,7 +1693,6 @@ ixlv_setup_queues(struct ixlv_sc *sc) return (0); fail: - free(vsi->queues, M_DEVBUF); for (int i = 0; i < vsi->num_queues; i++) { que = &vsi->queues[i]; rxr = &que->rxr; @@ -1703,6 +1702,7 @@ ixlv_setup_queues(struct ixlv_sc *sc) if (txr->base) i40e_free_dma_mem(&sc->hw, &txr->dma); } + free(vsi->queues, M_DEVBUF); early: return (error); diff --git a/sys/dev/ixl/ixl_txrx.c b/sys/dev/ixl/ixl_txrx.c old mode 100755 new mode 100644 diff --git a/sys/dev/led/led.c b/sys/dev/led/led.c index fe0b66b8782e..c519e2218ece 100644 --- a/sys/dev/led/led.c +++ b/sys/dev/led/led.c @@ -293,7 +293,8 @@ led_create_state(led_t *func, void *priv, char const *name, int state) mtx_lock(&led_mtx); sc->dev->si_drv1 = sc; LIST_INSERT_HEAD(&led_list, sc, list); - sc->func(sc->private, state != 0); + if (state != -1) + sc->func(sc->private, state != 0); mtx_unlock(&led_mtx); return (sc->dev); diff --git a/sys/dev/malo/if_malo.c b/sys/dev/malo/if_malo.c index a3aa04eea913..741837949909 100644 --- a/sys/dev/malo/if_malo.c +++ b/sys/dev/malo/if_malo.c @@ -133,7 +133,7 @@ static void malo_tx_cleanupq(struct malo_softc *, struct malo_txq *); static void malo_start(struct ifnet *); static void malo_watchdog(void *); static int malo_ioctl(struct ifnet *, u_long, caddr_t); -static void malo_updateslot(struct ifnet *); +static void malo_updateslot(struct ieee80211com *); static int malo_newstate(struct ieee80211vap *, enum ieee80211_state, int); static void malo_scan_start(struct ieee80211com *); static void malo_scan_end(struct ieee80211com *); @@ -276,6 +276,8 @@ malo_attach(uint16_t devid, struct malo_softc *sc) IFQ_SET_READY(&ifp->if_snd); ic->ic_ifp = ifp; + ic->ic_softc = sc; + ic->ic_name = device_get_nameunit(sc->malo_dev); /* XXX not right but it's not used anywhere important */ ic->ic_phytype = IEEE80211_T_OFDM; ic->ic_opmode = IEEE80211_M_STA; @@ -1764,15 +1766,14 @@ malo_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) * like slot time and preamble. */ static void -malo_updateslot(struct ifnet *ifp) +malo_updateslot(struct ieee80211com *ic) { - struct malo_softc *sc = ifp->if_softc; - struct ieee80211com *ic = ifp->if_l2com; + struct malo_softc *sc = ic->ic_softc; struct malo_hal *mh = sc->malo_mh; int error; /* NB: can be called early; suppress needless cmds */ - if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) + if ((ic->ic_ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) return; DPRINTF(sc, MALO_DEBUG_RESET, diff --git a/sys/dev/mfi/mfi.c b/sys/dev/mfi/mfi.c index 5ec813eafaee..a2d604cf3f5d 100644 --- a/sys/dev/mfi/mfi.c +++ b/sys/dev/mfi/mfi.c @@ -780,7 +780,7 @@ mfi_attach(struct mfi_softc *sc) bus_generic_attach(sc->mfi_dev); /* Start the timeout watchdog */ - callout_init(&sc->mfi_watchdog_callout, CALLOUT_MPSAFE); + callout_init(&sc->mfi_watchdog_callout, 1); callout_reset(&sc->mfi_watchdog_callout, mfi_cmd_timeout * hz, mfi_timeout, sc); diff --git a/sys/dev/mmc/mmc.c b/sys/dev/mmc/mmc.c index d623870f1284..a61da4446c05 100644 --- a/sys/dev/mmc/mmc.c +++ b/sys/dev/mmc/mmc.c @@ -1379,6 +1379,20 @@ mmc_discover_cards(struct mmc_softc *sc) ivar->hs_tran_speed = SD_MAX_HS; } } + + /* + * We reselect the card here. Some cards become + * unselected and timeout with the above two commands, + * although the state tables / diagrams in the standard + * suggest they go back to the transfer state. The only + * thing we use from the sd_status is the erase sector + * size, but it is still nice to get that right. It is + * normally harmless for cards not misbehaving. The + * Atmel bridge will complain about this command timing + * out. Others seem to handle it correctly, so it may + * be a combination of card and controller. + */ + mmc_select_card(sc, ivar->rca); mmc_app_sd_status(sc, ivar->rca, ivar->raw_sd_status); mmc_app_decode_sd_status(ivar->raw_sd_status, &ivar->sd_status); @@ -1797,6 +1811,7 @@ static driver_t mmc_driver = { }; static devclass_t mmc_devclass; +DRIVER_MODULE(mmc, a10_mmc, mmc_driver, mmc_devclass, NULL, NULL); DRIVER_MODULE(mmc, aml8726_mmc, mmc_driver, mmc_devclass, NULL, NULL); DRIVER_MODULE(mmc, aml8726_sdxc, mmc_driver, mmc_devclass, NULL, NULL); DRIVER_MODULE(mmc, at91_mci, mmc_driver, mmc_devclass, NULL, NULL); @@ -1807,4 +1822,3 @@ DRIVER_MODULE(mmc, sdhci_pci, mmc_driver, mmc_devclass, NULL, NULL); DRIVER_MODULE(mmc, sdhci_ti, mmc_driver, mmc_devclass, NULL, NULL); DRIVER_MODULE(mmc, ti_mmchs, mmc_driver, mmc_devclass, NULL, NULL); DRIVER_MODULE(mmc, dwmmc, mmc_driver, mmc_devclass, NULL, NULL); - diff --git a/sys/dev/mpr/mpi/mpi2.h b/sys/dev/mpr/mpi/mpi2.h index 10f17aba067e..42fdec20c503 100644 --- a/sys/dev/mpr/mpi/mpi2.h +++ b/sys/dev/mpr/mpi/mpi2.h @@ -1,5 +1,6 @@ /*- - * Copyright (c) 2013 LSI Corp. + * Copyright (c) 2012-2015 LSI Corp. + * Copyright (c) 2013-2015 Avago Technologies * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -26,13 +27,14 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * LSI MPT-Fusion Host Adapter FreeBSD + * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD * * $FreeBSD$ */ /* - * Copyright (c) 2000-2013 LSI Corporation. + * Copyright (c) 2000-2015 LSI Corporation. + * Copyright (c) 2013-2015 Avago Technologies * * * Name: mpi2.h diff --git a/sys/dev/mpr/mpi/mpi2_cnfg.h b/sys/dev/mpr/mpi/mpi2_cnfg.h index d82750f80913..3b0eb637a9e2 100644 --- a/sys/dev/mpr/mpi/mpi2_cnfg.h +++ b/sys/dev/mpr/mpi/mpi2_cnfg.h @@ -1,5 +1,6 @@ /*- - * Copyright (c) 2013 LSI Corp. + * Copyright (c) 2012-2015 LSI Corp. + * Copyright (c) 2013-2015 Avago Technologies * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -26,13 +27,14 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * LSI MPT-Fusion Host Adapter FreeBSD + * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD * * $FreeBSD$ */ /* - * Copyright (c) 2000-2013 LSI Corporation. + * Copyright (c) 2000-2015 LSI Corporation. + * Copyright (c) 2013-2015 Avago Technologies * * * Name: mpi2_cnfg.h diff --git a/sys/dev/mpr/mpi/mpi2_hbd.h b/sys/dev/mpr/mpi/mpi2_hbd.h index d0cc09f905a0..520407b39948 100644 --- a/sys/dev/mpr/mpi/mpi2_hbd.h +++ b/sys/dev/mpr/mpi/mpi2_hbd.h @@ -1,5 +1,6 @@ /*- - * Copyright (c) 2013 LSI Corp. + * Copyright (c) 2012-2015 LSI Corp. + * Copyright (c) 2013-2015 Avago Technologies * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -26,13 +27,14 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * LSI MPT-Fusion Host Adapter FreeBSD + * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD * * $FreeBSD$ */ /* - * Copyright (c) 2009-2011 LSI Corporation. + * Copyright (c) 2009-2015 LSI Corporation. + * Copyright (c) 2013-2015 Avago Technologies * * * Name: mpi2_hbd.h diff --git a/sys/dev/mpr/mpi/mpi2_history.txt b/sys/dev/mpr/mpi/mpi2_history.txt index 296b75b87859..9fca7966f65a 100644 --- a/sys/dev/mpr/mpi/mpi2_history.txt +++ b/sys/dev/mpr/mpi/mpi2_history.txt @@ -1,5 +1,6 @@ /*- - * Copyright (c) 2013 LSI Corp. + * Copyright (c) 2012-2015 LSI Corp. + * Copyright (c) 2013-2015 Avago Technologies * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -26,7 +27,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * LSI MPT-Fusion Host Adapter FreeBSD + * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD * * $FreeBSD$ */ @@ -35,7 +36,8 @@ Fusion-MPT MPI 2.0 / 2.5 Header File Change History ============================== - Copyright (c) 2000-2013 LSI Corporation. + Copyright (c) 2000-2015 LSI Corporation. + Copyright (c) 2013-2015 Avago Technologies --------------------------------------- Header Set Release Version: 02.00.33 diff --git a/sys/dev/mpr/mpi/mpi2_init.h b/sys/dev/mpr/mpi/mpi2_init.h index 62b0cfed120a..5f475c0e26ba 100644 --- a/sys/dev/mpr/mpi/mpi2_init.h +++ b/sys/dev/mpr/mpi/mpi2_init.h @@ -1,5 +1,6 @@ /*- - * Copyright (c) 2013 LSI Corp. + * Copyright (c) 2012-2015 LSI Corp. + * Copyright (c) 2013-2015 Avago Technologies * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -26,13 +27,14 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * LSI MPT-Fusion Host Adapter FreeBSD + * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD * * $FreeBSD$ */ /* - * Copyright (c) 2000-2013 LSI Corporation. + * Copyright (c) 2000-2015 LSI Corporation. + * Copyright (c) 2013-2015 Avago Technologies * * * Name: mpi2_init.h diff --git a/sys/dev/mpr/mpi/mpi2_ioc.h b/sys/dev/mpr/mpi/mpi2_ioc.h index 38a46f5280bc..54f39a5adc71 100644 --- a/sys/dev/mpr/mpi/mpi2_ioc.h +++ b/sys/dev/mpr/mpi/mpi2_ioc.h @@ -1,5 +1,6 @@ /*- - * Copyright (c) 2013 LSI Corp. + * Copyright (c) 2012-2015 LSI Corp. + * Copyright (c) 2013-2015 Avago Technologies * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -26,13 +27,14 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * LSI MPT-Fusion Host Adapter FreeBSD + * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD * * $FreeBSD$ */ /* - * Copyright (c) 2000-2013 LSI Corporation. + * Copyright (c) 2000-2015 LSI Corporation. + * Copyright (c) 2013-2015 Avago Technologies * * * Name: mpi2_ioc.h diff --git a/sys/dev/mpr/mpi/mpi2_ra.h b/sys/dev/mpr/mpi/mpi2_ra.h index 76db06b71b98..02304aaa002e 100644 --- a/sys/dev/mpr/mpi/mpi2_ra.h +++ b/sys/dev/mpr/mpi/mpi2_ra.h @@ -1,5 +1,6 @@ /*- - * Copyright (c) 2013 LSI Corp. + * Copyright (c) 2012-2015 LSI Corp. + * Copyright (c) 2013-2015 Avago Technologies * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -26,13 +27,14 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * LSI MPT-Fusion Host Adapter FreeBSD + * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD * * $FreeBSD$ */ /* - * Copyright (c) 2009 LSI Corporation. + * Copyright (c) 2012-2015 LSI Corporation. + * Copyright (c) 2013-2015 Avago Technologies * * * Name: mpi2_ra.h diff --git a/sys/dev/mpr/mpi/mpi2_raid.h b/sys/dev/mpr/mpi/mpi2_raid.h index c6bb59864a3c..52ebf07ee096 100644 --- a/sys/dev/mpr/mpi/mpi2_raid.h +++ b/sys/dev/mpr/mpi/mpi2_raid.h @@ -1,5 +1,6 @@ /*- - * Copyright (c) 2013 LSI Corp. + * Copyright (c) 2012-2015 LSI Corp. + * Copyright (c) 2013-2015 Avago Technologies * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -26,13 +27,14 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * LSI MPT-Fusion Host Adapter FreeBSD + * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD * * $FreeBSD$ */ /* - * Copyright (c) 2000-2013 LSI Corporation. + * Copyright (c) 2000-2015 LSI Corporation. + * Copyright (c) 2013-2015 Avago Technologies * * * Name: mpi2_raid.h diff --git a/sys/dev/mpr/mpi/mpi2_sas.h b/sys/dev/mpr/mpi/mpi2_sas.h index 2a107f1e1617..7cae2c3d4adf 100644 --- a/sys/dev/mpr/mpi/mpi2_sas.h +++ b/sys/dev/mpr/mpi/mpi2_sas.h @@ -1,5 +1,6 @@ /*- - * Copyright (c) 2013 LSI Corp. + * Copyright (c) 2012-2015 LSI Corp. + * Copyright (c) 2013-2015 Avago Technologies * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -26,13 +27,14 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * LSI MPT-Fusion Host Adapter FreeBSD + * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD * * $FreeBSD$ */ /* - * Copyright (c) 2000-2013 LSI Corporation. + * Copyright (c) 2000-2015 LSI Corporation. + * Copyright (c) 2013-2015 Avago Technologies * * * Name: mpi2_sas.h diff --git a/sys/dev/mpr/mpi/mpi2_targ.h b/sys/dev/mpr/mpi/mpi2_targ.h index 506e64f6370c..85b5ac562610 100644 --- a/sys/dev/mpr/mpi/mpi2_targ.h +++ b/sys/dev/mpr/mpi/mpi2_targ.h @@ -1,5 +1,6 @@ /*- - * Copyright (c) 2013 LSI Corp. + * Copyright (c) 2012-2015 LSI Corp. + * Copyright (c) 2013-2015 Avago Technologies * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -26,13 +27,14 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * LSI MPT-Fusion Host Adapter FreeBSD + * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD * * $FreeBSD$ */ /* - * Copyright (c) 2000-2012 LSI Corporation. + * Copyright (c) 2000-2015 LSI Corporation. + * Copyright (c) 2013-2015 Avago Technologies * * * Name: mpi2_targ.h diff --git a/sys/dev/mpr/mpi/mpi2_tool.h b/sys/dev/mpr/mpi/mpi2_tool.h index 94542cc7959b..59917c0077f5 100644 --- a/sys/dev/mpr/mpi/mpi2_tool.h +++ b/sys/dev/mpr/mpi/mpi2_tool.h @@ -1,5 +1,6 @@ /*- - * Copyright (c) 2013 LSI Corp. + * Copyright (c) 2012-2015 LSI Corp. + * Copyright (c) 2013-2015 Avago Technologies * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -26,13 +27,14 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * LSI MPT-Fusion Host Adapter FreeBSD + * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD * * $FreeBSD$ */ /* - * Copyright (c) 2000-2013 LSI Corporation. + * Copyright (c) 2000-2015 LSI Corporation. + * Copyright (c) 2013-2015 Avago Technologies * * * Name: mpi2_tool.h diff --git a/sys/dev/mpr/mpi/mpi2_type.h b/sys/dev/mpr/mpi/mpi2_type.h index da3aefb968f4..b063683263d0 100644 --- a/sys/dev/mpr/mpi/mpi2_type.h +++ b/sys/dev/mpr/mpi/mpi2_type.h @@ -1,5 +1,6 @@ /*- - * Copyright (c) 2013 LSI Corp. + * Copyright (c) 2012-2015 LSI Corp. + * Copyright (c) 2013-2015 Avago Technologies * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -26,13 +27,14 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * LSI MPT-Fusion Host Adapter FreeBSD + * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD * * $FreeBSD$ */ /* - * Copyright (c) 2000-2007 LSI Corporation. + * Copyright (c) 2000-2015 LSI Corporation. + * Copyright (c) 2013-2015 Avago Technologies * * * Name: mpi2_type.h diff --git a/sys/dev/mpr/mpr.c b/sys/dev/mpr/mpr.c index d3fb9a0682b8..07e73c54e8be 100644 --- a/sys/dev/mpr/mpr.c +++ b/sys/dev/mpr/mpr.c @@ -1,6 +1,7 @@ /*- * Copyright (c) 2009 Yahoo! Inc. - * Copyright (c) 2012-2014 LSI Corp. + * Copyright (c) 2011-2015 LSI Corp. + * Copyright (c) 2013-2015 Avago Technologies * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -24,12 +25,14 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * + * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD + * */ #include __FBSDID("$FreeBSD$"); -/* Communications core for LSI MPT2 */ +/* Communications core for Avago Technologies (LSI) MPT3 */ /* TODO Move headers to mprvar */ #include @@ -72,7 +75,6 @@ __FBSDID("$FreeBSD$"); #include #include #include -#include static int mpr_diag_reset(struct mpr_softc *sc, int sleep_flag); static int mpr_init_queues(struct mpr_softc *sc); @@ -352,11 +354,9 @@ mpr_transition_operational(struct mpr_softc *sc) static int mpr_iocfacts_allocate(struct mpr_softc *sc, uint8_t attaching) { - int error, i; + int error; Mpi2IOCFactsReply_t saved_facts; uint8_t saved_mode, reallocating; - struct mprsas_lun *lun, *lun_tmp; - struct mprsas_target *targ; mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); @@ -513,27 +513,7 @@ mpr_iocfacts_allocate(struct mpr_softc *sc, uint8_t attaching) */ if (reallocating) { mpr_iocfacts_free(sc); - - /* - * The number of targets is based on IOC Facts, so free all of - * the allocated LUNs for each target and then the target buffer - * itself. - */ - for (i=0; i< saved_facts.MaxTargets; i++) { - targ = &sc->sassc->targets[i]; - SLIST_FOREACH_SAFE(lun, &targ->luns, lun_link, - lun_tmp) { - free(lun, M_MPR); - } - } - free(sc->sassc->targets, M_MPR); - - sc->sassc->targets = malloc(sizeof(struct mprsas_target) * - sc->facts->MaxTargets, M_MPR, M_WAITOK|M_ZERO); - if (!sc->sassc->targets) { - panic("%s failed to alloc targets with error %d\n", - __func__, ENOMEM); - } + mprsas_realloc_targets(sc, saved_facts.MaxTargets); } /* @@ -775,7 +755,7 @@ mpr_reinit(struct mpr_softc *sc) /* the end of discovery will release the simq, so we're done. */ mpr_dprint(sc, MPR_INFO, "%s finished sc %p post %u free %u\n", __func__, sc, sc->replypostindex, sc->replyfreeindex); - mprsas_release_simq_reinit(sassc); + mprsas_release_simq_reinit(sassc); return 0; } @@ -816,7 +796,8 @@ mpr_wait_db_ack(struct mpr_softc *sc, int timeout, int sleep_flag) * 0.5 milisecond */ if (mtx_owned(&sc->mpr_mtx) && sleep_flag == CAN_SLEEP) - msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0, "mprdba", hz/1000); + msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0, "mprdba", + hz/1000); else if (sleep_flag == CAN_SLEEP) pause("mprdba", hz/1000); else @@ -982,7 +963,7 @@ mpr_enqueue_request(struct mpr_softc *sc, struct mpr_command *cm) reply_descriptor rd; MPR_FUNCTRACE(sc); - mpr_dprint(sc, MPR_TRACE, "%s SMID %u cm %p ccb %p\n", __func__, + mpr_dprint(sc, MPR_TRACE, "SMID %u cm %p ccb %p\n", cm->cm_desc.Default.SMID, cm, cm->cm_ccb); if (sc->mpr_flags & MPR_FLAGS_ATTACH_DONE && !(sc->mpr_flags & @@ -1372,6 +1353,8 @@ mpr_get_tunables(struct mpr_softc *sc) sc->disable_msix = 0; sc->disable_msi = 0; sc->max_chains = MPR_CHAIN_FRAMES; + sc->enable_ssu = MPR_SSU_ENABLE_SSD_DISABLE_HDD; + sc->spinup_wait_time = DEFAULT_SPINUP_WAIT; /* * Grab the global variables. @@ -1380,6 +1363,8 @@ mpr_get_tunables(struct mpr_softc *sc) TUNABLE_INT_FETCH("hw.mpr.disable_msix", &sc->disable_msix); TUNABLE_INT_FETCH("hw.mpr.disable_msi", &sc->disable_msi); TUNABLE_INT_FETCH("hw.mpr.max_chains", &sc->max_chains); + TUNABLE_INT_FETCH("hw.mpr.enable_ssu", &sc->enable_ssu); + TUNABLE_INT_FETCH("hw.mpr.spinup_wait_time", &sc->spinup_wait_time); /* Grab the unit-instance variables */ snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.debug_level", @@ -1402,6 +1387,14 @@ mpr_get_tunables(struct mpr_softc *sc) snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.exclude_ids", device_get_unit(sc->mpr_dev)); TUNABLE_STR_FETCH(tmpstr, sc->exclude_ids, sizeof(sc->exclude_ids)); + + snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.enable_ssu", + device_get_unit(sc->mpr_dev)); + TUNABLE_INT_FETCH(tmpstr, &sc->enable_ssu); + + snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.spinup_wait_time", + device_get_unit(sc->mpr_dev)); + TUNABLE_INT_FETCH(tmpstr, &sc->spinup_wait_time); } static void @@ -1474,11 +1467,20 @@ mpr_setup_sysctl(struct mpr_softc *sc) OID_AUTO, "max_chains", CTLFLAG_RD, &sc->max_chains, 0,"maximum chain frames that will be allocated"); + SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), + OID_AUTO, "enable_ssu", CTLFLAG_RW, &sc->enable_ssu, 0, + "enable SSU to SATA SSD/HDD at shutdown"); + #if __FreeBSD_version >= 900030 SYSCTL_ADD_UQUAD(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO, "chain_alloc_fail", CTLFLAG_RD, &sc->chain_alloc_fail, "chain allocation failures"); #endif //FreeBSD_version >= 900030 + + SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), + OID_AUTO, "spinup_wait_time", CTLFLAG_RD, + &sc->spinup_wait_time, DEFAULT_SPINUP_WAIT, "seconds to wait for " + "spinup after SATA ID error"); } int @@ -2096,7 +2098,7 @@ mpr_update_events(struct mpr_softc *sc, struct mpr_event_handle *handle, (reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) error = ENXIO; - if(reply) + if (reply) mpr_print_event(sc, reply); mpr_dprint(sc, MPR_TRACE, "%s finished error %d\n", __func__, error); @@ -2163,8 +2165,8 @@ mpr_deregister_events(struct mpr_softc *sc, struct mpr_event_handle *handle) * Add a chain element as the next SGE for the specified command. * Reset cm_sge and cm_sgesize to indicate all the available space. Chains are * only required for IEEE commands. Therefore there is no code for commands - * that have the MPR_CM_FLAGS_SGE_SIMPLE flag set (and those commands shouldn't - * be requesting chains). + * that have the MPR_CM_FLAGS_SGE_SIMPLE flag set (and those commands + * shouldn't be requesting chains). */ static int mpr_add_chain(struct mpr_command *cm, int segsleft) @@ -2246,9 +2248,9 @@ mpr_add_chain(struct mpr_command *cm, int segsleft) /* * Add one scatter-gather element to the scatter-gather list for a command. - * Maintain cm_sglsize and cm_sge as the remaining size and pointer to the next - * SGE to fill in, respectively. In Gen3, the MPI SGL does not have a chain, - * so don't consider any chain additions. + * Maintain cm_sglsize and cm_sge as the remaining size and pointer to the + * next SGE to fill in, respectively. In Gen3, the MPI SGL does not have a + * chain, so don't consider any chain additions. */ int mpr_push_sge(struct mpr_command *cm, MPI2_SGE_SIMPLE64 *sge, size_t len, @@ -2660,7 +2662,7 @@ mpr_request_polled(struct mpr_softc *sc, struct mpr_command *cm) } } - if(error) { + if (error) { mpr_dprint(sc, MPR_FAULT, "Calling Reinit from %s\n", __func__); rc = mpr_reinit(sc); mpr_dprint(sc, MPR_FAULT, "Reinit %s\n", (rc == 0) ? @@ -2717,9 +2719,12 @@ mpr_read_config_page(struct mpr_softc *sc, struct mpr_config_params *params) cm->cm_data = params->buffer; cm->cm_length = params->length; - cm->cm_sge = &req->PageBufferSGE; - cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION); - cm->cm_flags = MPR_CM_FLAGS_SGE_SIMPLE | MPR_CM_FLAGS_DATAIN; + if (cm->cm_data != NULL) { + cm->cm_sge = &req->PageBufferSGE; + cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION); + cm->cm_flags = MPR_CM_FLAGS_SGE_SIMPLE | MPR_CM_FLAGS_DATAIN; + } else + cm->cm_sge = NULL; cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; cm->cm_complete_data = params; @@ -2776,9 +2781,12 @@ mpr_config_complete(struct mpr_softc *sc, struct mpr_command *cm) goto done; } params->status = reply->IOCStatus; - if (params->hdr.Ext.ExtPageType != 0) { + if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) { params->hdr.Ext.ExtPageType = reply->ExtPageType; params->hdr.Ext.ExtPageLength = reply->ExtPageLength; + params->hdr.Ext.PageType = reply->Header.PageType; + params->hdr.Ext.PageNumber = reply->Header.PageNumber; + params->hdr.Ext.PageVersion = reply->Header.PageVersion; } else { params->hdr.Struct.PageType = reply->Header.PageType; params->hdr.Struct.PageNumber = reply->Header.PageNumber; diff --git a/sys/dev/mpr/mpr_config.c b/sys/dev/mpr/mpr_config.c index 125451608dee..c0ea3d5ffb08 100644 --- a/sys/dev/mpr/mpr_config.c +++ b/sys/dev/mpr/mpr_config.c @@ -1,5 +1,6 @@ /*- - * Copyright (c) 2011-2014 LSI Corp. + * Copyright (c) 2011-2015 LSI Corp. + * Copyright (c) 2013-2015 Avago Technologies * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * LSI MPT-Fusion Host Adapter FreeBSD + * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD */ #include diff --git a/sys/dev/mpr/mpr_ioctl.h b/sys/dev/mpr/mpr_ioctl.h index 5ec482f311b0..aa1a4cbf7697 100644 --- a/sys/dev/mpr/mpr_ioctl.h +++ b/sys/dev/mpr/mpr_ioctl.h @@ -27,12 +27,13 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * LSI MPT-Fusion Host Adapter FreeBSD userland interface + * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD userland interface * * $FreeBSD$ */ /*- - * Copyright (c) 2011-2014 LSI Corp. + * Copyright (c) 2011-2015 LSI Corp. + * Copyright (c) 2013-2015 Avago Technologies * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -56,7 +57,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * LSI MPT-Fusion Host Adapter FreeBSD + * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD * * $FreeBSD$ */ diff --git a/sys/dev/mpr/mpr_mapping.c b/sys/dev/mpr/mpr_mapping.c index 7f0fc00a9c52..110e6a3b943f 100644 --- a/sys/dev/mpr/mpr_mapping.c +++ b/sys/dev/mpr/mpr_mapping.c @@ -1,5 +1,6 @@ /*- - * Copyright (c) 2011-2014 LSI Corp. + * Copyright (c) 2011-2015 LSI Corp. + * Copyright (c) 2013-2015 Avago Technologies * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * LSI MPT-Fusion Host Adapter FreeBSD + * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD */ #include @@ -326,11 +327,13 @@ _mapping_get_high_missing_mt_idx(struct mpr_softc *sc) { u32 map_idx, high_idx = MPR_ENCTABLE_BAD_IDX; u8 high_missing_count = 0; - u32 start_idx, end_idx, start_idx_ir = 0, end_idx_ir; + u32 start_idx, end_idx, start_idx_ir, end_idx_ir; struct dev_mapping_table *mt_entry; u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags); start_idx = 0; + start_idx_ir = 0; + end_idx_ir = 0; end_idx = sc->max_devices; if (ioc_pg8_flags & MPI2_IOCPAGE8_FLAGS_RESERVED_TARGETID_0) start_idx = 1; @@ -887,14 +890,14 @@ _mapping_get_dev_info(struct mpr_softc *sc, u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags); Mpi2ConfigReply_t mpi_reply; Mpi2SasDevicePage0_t sas_device_pg0; - u8 entry, enc_idx, phy_idx; + u8 entry, enc_idx, phy_idx, sata_end_device; u32 map_idx, index, device_info; struct _map_phy_change *phy_change, *tmp_phy_change; uint64_t sas_address; struct enc_mapping_table *et_entry; struct dev_mapping_table *mt_entry; u8 add_code = MPI2_EVENT_SAS_TOPO_RC_TARG_ADDED; - int rc; + int rc = 1; for (entry = 0; entry < topo_change->num_entries; entry++) { phy_change = &topo_change->phy_details[entry]; @@ -908,41 +911,36 @@ _mapping_get_dev_info(struct mpr_softc *sc, continue; } + /* + * Always get SATA Identify information because this is used + * to determine if Start/Stop Unit should be sent to the drive + * when the system is shutdown. + */ device_info = le32toh(sas_device_pg0.DeviceInfo); - if ((ioc_pg8_flags & MPI2_IOCPAGE8_FLAGS_MASK_MAPPING_MODE) == - MPI2_IOCPAGE8_FLAGS_DEVICE_PERSISTENCE_MAPPING) { - if ((device_info & MPI2_SAS_DEVICE_INFO_END_DEVICE) && - (device_info & MPI2_SAS_DEVICE_INFO_SATA_DEVICE)) { - rc = mprsas_get_sas_address_for_sata_disk(sc, - &sas_address, phy_change->dev_handle, - device_info); - if (rc) { - printf("%s: failed to compute the " - "hashed SAS Address for SATA " - "device with handle 0x%04x\n", - __func__, phy_change->dev_handle); - sas_address = - sas_device_pg0.SASAddress.High; - sas_address = (sas_address << 32) | - sas_device_pg0.SASAddress.Low; - } + sas_address = sas_device_pg0.SASAddress.High; + sas_address = (sas_address << 32) | + sas_device_pg0.SASAddress.Low; + sata_end_device = 0; + if ((device_info & MPI2_SAS_DEVICE_INFO_END_DEVICE) && + (device_info & MPI2_SAS_DEVICE_INFO_SATA_DEVICE)) { + sata_end_device = 1; + rc = mprsas_get_sas_address_for_sata_disk(sc, + &sas_address, phy_change->dev_handle, device_info, + &phy_change->is_SATA_SSD); + if (rc) { + mpr_dprint(sc, MPR_ERROR, "%s: failed to get " + "disk type (SSD or HDD) and SAS Address " + "for SATA device with handle 0x%04x\n", + __func__, phy_change->dev_handle); + } else { mpr_dprint(sc, MPR_INFO, "SAS Address for SATA " "device = %jx\n", sas_address); - } else { - sas_address = - sas_device_pg0.SASAddress.High; - sas_address = (sas_address << 32) | - sas_device_pg0.SASAddress.Low; } - } else { - sas_address = sas_device_pg0.SASAddress.High; - sas_address = (sas_address << 32) | - sas_device_pg0.SASAddress.Low; } + phy_change->physical_id = sas_address; phy_change->slot = le16toh(sas_device_pg0.Slot); - phy_change->device_info = - le32toh(sas_device_pg0.DeviceInfo); + phy_change->device_info = le32toh(sas_device_pg0.DeviceInfo); if ((ioc_pg8_flags & MPI2_IOCPAGE8_FLAGS_MASK_MAPPING_MODE) == MPI2_IOCPAGE8_FLAGS_ENCLOSURE_SLOT_MAPPING) { @@ -950,10 +948,10 @@ _mapping_get_dev_info(struct mpr_softc *sc, topo_change->enc_handle); if (enc_idx == MPR_ENCTABLE_BAD_IDX) { phy_change->is_processed = 1; - printf("%s: failed to add the device with " - "handle 0x%04x because the enclosure is " - "not in the mapping table\n", __func__, - phy_change->dev_handle); + mpr_dprint(sc, MPR_MAPPING, "%s: failed to add " + "the device with handle 0x%04x because the " + "enclosure is not in the mapping table\n", + __func__, phy_change->dev_handle); continue; } if (!((phy_change->device_info & diff --git a/sys/dev/mpr/mpr_mapping.h b/sys/dev/mpr/mpr_mapping.h index 3250c424e2a4..c00a3b795122 100644 --- a/sys/dev/mpr/mpr_mapping.h +++ b/sys/dev/mpr/mpr_mapping.h @@ -1,5 +1,6 @@ /*- - * Copyright (c) 2011-2014 LSI Corp. + * Copyright (c) 2011-2015 LSI Corp. + * Copyright (c) 2013-2015 Avago Technologies * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * LSI MPT-Fusion Host Adapter FreeBSD + * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD * * $FreeBSD$ */ @@ -38,6 +39,7 @@ * @dev_handle: device handle for the device pointed by this entry * @slot: slot ID * @is_processed: Flag to indicate whether this entry is processed or not + * @is_SATA_SSD: 1 if this is a SATA device AND an SSD, 0 otherwise */ struct _map_phy_change { uint64_t physical_id; @@ -46,6 +48,8 @@ struct _map_phy_change { uint16_t slot; uint8_t reason; uint8_t is_processed; + uint8_t is_SATA_SSD; + uint8_t reserved; }; /** @@ -66,6 +70,6 @@ struct _map_topology_change { extern int mprsas_get_sas_address_for_sata_disk(struct mpr_softc *ioc, - u64 *sas_address, u16 handle, u32 device_info); + u64 *sas_address, u16 handle, u32 device_info, u8 *is_SATA_SSD); #endif diff --git a/sys/dev/mpr/mpr_pci.c b/sys/dev/mpr/mpr_pci.c index e19f33adceb4..7430eac03b3a 100644 --- a/sys/dev/mpr/mpr_pci.c +++ b/sys/dev/mpr/mpr_pci.c @@ -27,7 +27,7 @@ #include __FBSDID("$FreeBSD$"); -/* PCI/PCI-X/PCIe bus interface for the LSI MPT2 controllers */ +/* PCI/PCI-X/PCIe bus interface for the Avago Tech (LSI) MPT3 controllers */ /* TODO Move headers to mprvar */ #include @@ -99,17 +99,17 @@ struct mpr_ident { const char *desc; } mpr_identifiers[] = { { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3004, - 0xffff, 0xffff, 0, "LSI SAS3004" }, + 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3004" }, { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3008, - 0xffff, 0xffff, 0, "LSI SAS3008" }, + 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3008" }, { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_1, - 0xffff, 0xffff, 0, "LSI SAS3108_1" }, + 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_1" }, { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_2, - 0xffff, 0xffff, 0, "LSI SAS3108_2" }, + 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_2" }, { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_5, - 0xffff, 0xffff, 0, "LSI SAS3108_5" }, + 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_5" }, { MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_6, - 0xffff, 0xffff, 0, "LSI SAS3108_6" }, + 0xffff, 0xffff, 0, "Avago Technologies (LSI) SAS3108_6" }, { 0, 0, 0, 0, 0, NULL } }; diff --git a/sys/dev/mpr/mpr_sas.c b/sys/dev/mpr/mpr_sas.c index 32c3a4633a1f..eac336068295 100644 --- a/sys/dev/mpr/mpr_sas.c +++ b/sys/dev/mpr/mpr_sas.c @@ -1,6 +1,7 @@ /*- * Copyright (c) 2009 Yahoo! Inc. - * Copyright (c) 2011-2014 LSI Corp. + * Copyright (c) 2011-2015 LSI Corp. + * Copyright (c) 2013-2015 Avago Technologies * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -23,12 +24,15 @@ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. + * + * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD + * */ #include __FBSDID("$FreeBSD$"); -/* Communications core for LSI MPT2 */ +/* Communications core for Avago Technologies (LSI) MPT3 */ /* TODO Move headers to mprvar */ #include @@ -122,14 +126,10 @@ static void mprsas_scsiio_complete(struct mpr_softc *, struct mpr_command *); static void mprsas_action_resetdev(struct mprsas_softc *, union ccb *); static void mprsas_resetdev_complete(struct mpr_softc *, struct mpr_command *); -static int mprsas_send_abort(struct mpr_softc *sc, struct mpr_command *tm, +static int mprsas_send_abort(struct mpr_softc *sc, struct mpr_command *tm, struct mpr_command *cm); -static int mprsas_send_reset(struct mpr_softc *sc, struct mpr_command *tm, - uint8_t type); static void mprsas_async(void *callback_arg, uint32_t code, struct cam_path *path, void *arg); -static void mprsas_prepare_ssu(struct mpr_softc *sc, struct cam_path *path, - struct ccb_getdev *cgd); #if (__FreeBSD_version < 901503) || \ ((__FreeBSD_version >= 1000000) && (__FreeBSD_version < 1000006)) static void mprsas_check_eedp(struct mpr_softc *sc, struct cam_path *path, @@ -142,13 +142,12 @@ static void mprsas_portenable_complete(struct mpr_softc *sc, struct mpr_command *cm); #if __FreeBSD_version >= 900026 -static void -mprsas_smpio_complete(struct mpr_softc *sc, struct mpr_command *cm); +static void mprsas_smpio_complete(struct mpr_softc *sc, + struct mpr_command *cm); static void mprsas_send_smpcmd(struct mprsas_softc *sassc, - union ccb *ccb, uint64_t sasaddr); -static void -mprsas_action_smpio(struct mprsas_softc *sassc, union ccb *ccb); -#endif + union ccb *ccb, uint64_t sasaddr); +static void mprsas_action_smpio(struct mprsas_softc *sassc, union ccb *ccb); +#endif //FreeBSD_version >= 900026 struct mprsas_target * mprsas_find_target_by_handle(struct mprsas_softc *sassc, int start, @@ -230,7 +229,7 @@ mprsas_startup_decrement(struct mprsas_softc *sassc) } } -/* LSI's firmware requires us to stop sending commands when we're doing task +/* The firmware requires us to stop sending commands when we're doing task * management, so refcount the TMs and keep the simq frozen when any are in * use. */ @@ -241,35 +240,31 @@ mprsas_alloc_tm(struct mpr_softc *sc) MPR_FUNCTRACE(sc); tm = mpr_alloc_high_priority_command(sc); - if (tm != NULL) { - if (sc->sassc->tm_count++ == 0) { - mpr_dprint(sc, MPR_RECOVERY, - "%s freezing simq\n", __func__); - xpt_freeze_simq(sc->sassc->sim, 1); - } - mpr_dprint(sc, MPR_RECOVERY, "%s tm_count %u\n", __func__, - sc->sassc->tm_count); - } return tm; } void mprsas_free_tm(struct mpr_softc *sc, struct mpr_command *tm) { - mpr_dprint(sc, MPR_TRACE, "%s", __func__); + MPR_FUNCTRACE(sc); if (tm == NULL) return; - /* if there are no TMs in use, we can release the simq. We use our - * own refcount so that it's easier for a diag reset to cleanup and - * release the simq. + /* + * For TM's the devq is frozen for the device. Unfreeze it here and + * free the resources used for freezing the devq. Must clear the + * INRESET flag as well or scsi I/O will not work. */ - if (--sc->sassc->tm_count == 0) { - mpr_dprint(sc, MPR_RECOVERY, "%s releasing simq\n", __func__); - xpt_release_simq(sc->sassc->sim, 1); + if (tm->cm_targ != NULL) { + tm->cm_targ->flags &= ~MPRSAS_TARGET_INRESET; + } + if (tm->cm_ccb) { + mpr_dprint(sc, MPR_INFO, "Unfreezing devq for target ID %d\n", + tm->cm_targ->tid); + xpt_release_devq(tm->cm_ccb->ccb_h.path, 1, TRUE); + xpt_free_path(tm->cm_ccb->ccb_h.path); + xpt_free_ccb(tm->cm_ccb); } - mpr_dprint(sc, MPR_RECOVERY, "%s tm_count %u\n", __func__, - sc->sassc->tm_count); mpr_free_high_priority_command(sc, tm); } @@ -298,8 +293,8 @@ mprsas_rescan_target(struct mpr_softc *sc, struct mprsas_target *targ) return; } - if (xpt_create_path(&ccb->ccb_h.path, NULL, pathid, - targetid, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { + if (xpt_create_path(&ccb->ccb_h.path, NULL, pathid, targetid, + CAM_LUN_WILDCARD) != CAM_REQ_CMP) { mpr_dprint(sc, MPR_ERROR, "unable to create path for rescan\n"); xpt_free_ccb(ccb); return; @@ -473,11 +468,16 @@ mprsas_prepare_volume_remove(struct mprsas_softc *sassc, uint16_t handle) MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY; cm->cm_complete = mprsas_remove_volume; cm->cm_complete_data = (void *)(uintptr_t)handle; + + mpr_dprint(sc, MPR_INFO, "%s: Sending reset for target ID %d\n", + __func__, targ->tid); + mprsas_prepare_for_tm(sc, cm, targ, CAM_LUN_WILDCARD); + mpr_map_command(sc, cm); } /* - * The MPT2 firmware performs debounce on the link to avoid transient link + * The MPT3 firmware performs debounce on the link to avoid transient link * errors and false removals. When it does decide that link has been lost * and a device needs to go away, it expects that the host will perform a * target reset and then an op remove. The reset has the side-effect of @@ -532,6 +532,11 @@ mprsas_prepare_remove(struct mprsas_softc *sassc, uint16_t handle) MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY; cm->cm_complete = mprsas_remove_device; cm->cm_complete_data = (void *)(uintptr_t)handle; + + mpr_dprint(sc, MPR_INFO, "%s: Sending reset for target ID %d\n", + __func__, targ->tid); + mprsas_prepare_for_tm(sc, cm, targ, CAM_LUN_WILDCARD); + mpr_map_command(sc, cm); } @@ -596,10 +601,10 @@ mprsas_remove_device(struct mpr_softc *sc, struct mpr_command *tm) mpr_map_command(sc, tm); - mpr_dprint(sc, MPR_XINFO, "clearing target %u handle 0x%04x\n", + mpr_dprint(sc, MPR_INFO, "clearing target %u handle 0x%04x\n", targ->tid, handle); if (targ->encl_level_valid) { - mpr_dprint(sc, MPR_XINFO, "At enclosure level %d, slot %d, " + mpr_dprint(sc, MPR_INFO, "At enclosure level %d, slot %d, " "connector name (%4s)\n", targ->encl_level, targ->encl_slot, targ->connector_name); } @@ -608,7 +613,7 @@ mprsas_remove_device(struct mpr_softc *sc, struct mpr_command *tm) mpr_dprint(sc, MPR_XINFO, "Completing missed command %p\n", tm); ccb = tm->cm_complete_data; - ccb->ccb_h.status = CAM_DEV_NOT_THERE; + mprsas_set_ccbstatus(ccb, CAM_DEV_NOT_THERE); mprsas_scsiio_complete(sc, tm); } } @@ -726,7 +731,7 @@ mpr_attach_sas(struct mpr_softc *sc) } /* - * XXX MaxTargets could change during a reinit. since we don't + * XXX MaxTargets could change during a reinit. Since we don't * resize the targets[] array during such an event, cache the value * of MaxTargets here so that we don't get into trouble later. This * should move into the reinit logic. @@ -782,7 +787,7 @@ mpr_attach_sas(struct mpr_softc *sc) } /* - * Assume that discovery events will start right away. Freezing + * Assume that discovery events will start right away. * * Hold off boot until discovery is complete. */ @@ -790,9 +795,7 @@ mpr_attach_sas(struct mpr_softc *sc) sc->sassc->startup_refcount = 0; mprsas_startup_increment(sassc); - callout_init(&sassc->discovery_callout, 1 /*mprafe*/); - - sassc->tm_count = 0; + callout_init(&sassc->discovery_callout, 1 /*mpsafe*/); /* * Register for async events so we can determine the EEDP @@ -962,7 +965,7 @@ mprsas_action(struct cam_sim *sim, union ccb *ccb) sassc = cam_sim_softc(sim); MPR_FUNCTRACE(sassc->sc); - mpr_dprint(sassc->sc, MPR_TRACE, "%s func 0x%x\n", __func__, + mpr_dprint(sassc->sc, MPR_TRACE, "ccb func_code 0x%x\n", ccb->ccb_h.func_code); mtx_assert(&sassc->sc->mpr_mtx, MA_OWNED); @@ -985,7 +988,7 @@ mprsas_action(struct cam_sim *sim, union ccb *ccb) cpi->max_lun = 255; cpi->initiator_id = sassc->maxtargets - 1; strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); - strncpy(cpi->hba_vid, "LSILogic", HBA_IDLEN); + strncpy(cpi->hba_vid, "Avago Tech (LSI)", HBA_IDLEN); strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); cpi->unit_number = cam_sim_unit(sim); cpi->bus_id = cam_sim_bus(sim); @@ -1005,7 +1008,7 @@ mprsas_action(struct cam_sim *sim, union ccb *ccb) */ cpi->maxio = 256 * 1024; #endif - cpi->ccb_h.status = CAM_REQ_CMP; + mprsas_set_ccbstatus(ccb, CAM_REQ_CMP); break; } case XPT_GET_TRAN_SETTINGS: @@ -1024,7 +1027,7 @@ mprsas_action(struct cam_sim *sim, union ccb *ccb) cts->ccb_h.target_id)); targ = &sassc->targets[cts->ccb_h.target_id]; if (targ->handle == 0x0) { - cts->ccb_h.status = CAM_DEV_NOT_THERE; + mprsas_set_ccbstatus(ccb, CAM_DEV_NOT_THERE); break; } @@ -1054,12 +1057,12 @@ mprsas_action(struct cam_sim *sim, union ccb *ccb) scsi->valid = CTS_SCSI_VALID_TQ; scsi->flags = CTS_SCSI_FLAGS_TAG_ENB; - cts->ccb_h.status = CAM_REQ_CMP; + mprsas_set_ccbstatus(ccb, CAM_REQ_CMP); break; } case XPT_CALC_GEOMETRY: cam_calc_geometry(&ccb->ccg, /*extended*/1); - ccb->ccb_h.status = CAM_REQ_CMP; + mprsas_set_ccbstatus(ccb, CAM_REQ_CMP); break; case XPT_RESET_DEV: mpr_dprint(sassc->sc, MPR_XINFO, @@ -1071,7 +1074,7 @@ mprsas_action(struct cam_sim *sim, union ccb *ccb) case XPT_TERM_IO: mpr_dprint(sassc->sc, MPR_XINFO, "mprsas_action faking success for abort or reset\n"); - ccb->ccb_h.status = CAM_REQ_CMP; + mprsas_set_ccbstatus(ccb, CAM_REQ_CMP); break; case XPT_SCSI_IO: mprsas_action_scsiio(sassc, ccb); @@ -1082,7 +1085,7 @@ mprsas_action(struct cam_sim *sim, union ccb *ccb) return; #endif default: - ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; + mprsas_set_ccbstatus(ccb, CAM_FUNC_NOTAVAIL); break; } xpt_done(ccb); @@ -1102,7 +1105,7 @@ mprsas_announce_reset(struct mpr_softc *sc, uint32_t ac_code, if (xpt_create_path(&path, NULL, path_id, target_id, lun_id) != CAM_REQ_CMP) { mpr_dprint(sc, MPR_ERROR, "unable to create path for reset " - "notification\n"); + "notification\n"); return; } @@ -1131,8 +1134,8 @@ mprsas_complete_all_commands(struct mpr_softc *sc) if (cm->cm_complete != NULL) { mprsas_log_command(cm, MPR_RECOVERY, - "completing cm %p state %x ccb %p for diag reset\n", - cm, cm->cm_state, cm->cm_ccb); + "completing cm %p state %x ccb %p for diag " + "reset\n", cm, cm->cm_state, cm->cm_ccb); cm->cm_complete(sc, cm); completed = 1; } @@ -1145,6 +1148,14 @@ mprsas_complete_all_commands(struct mpr_softc *sc) completed = 1; } + if (cm->cm_sc->io_cmds_active != 0) { + cm->cm_sc->io_cmds_active--; + } else { + mpr_dprint(cm->cm_sc, MPR_INFO, "Warning: " + "io_cmds_active is out of sync - resynching to " + "0\n"); + } + if ((completed == 0) && (cm->cm_state != MPR_CM_STATE_FREE)) { /* this should never happen, but if it does, log */ mprsas_log_command(cm, MPR_RECOVERY, @@ -1180,9 +1191,8 @@ mprsas_handle_reinit(struct mpr_softc *sc) /* complete and cleanup after all outstanding commands */ mprsas_complete_all_commands(sc); - mpr_dprint(sc, MPR_INIT, "%s startup %u tm %u after command " - "completion\n", __func__, sc->sassc->startup_refcount, - sc->sassc->tm_count); + mpr_dprint(sc, MPR_INIT, "%s startup %u after command completion\n", + __func__, sc->sassc->startup_refcount); /* zero all the target handles, since they may change after the * reset, and we have to rediscover all the targets and use the new @@ -1244,7 +1254,6 @@ mprsas_logical_unit_reset_complete(struct mpr_softc *sc, "NULL reset reply for tm %p\n", tm); if ((sc->mpr_flags & MPR_FLAGS_DIAGRESET) != 0) { /* this completion was due to a reset, just cleanup */ - targ->flags &= ~MPRSAS_TARGET_INRESET; targ->tm = NULL; mprsas_free_tm(sc, tm); } @@ -1322,8 +1331,8 @@ mprsas_target_reset_complete(struct mpr_softc *sc, struct mpr_command *tm) * task management commands don't have S/G lists. */ if ((tm->cm_flags & MPR_CM_FLAGS_ERROR_MASK) != 0) { - mpr_dprint(sc, MPR_ERROR,"%s: cm_flags = %#x for target reset! " - "This should not happen!\n", __func__, tm->cm_flags); + mpr_dprint(sc, MPR_ERROR, "%s: cm_flags = %#x for target " + "reset! This should not happen!\n", __func__, tm->cm_flags); mprsas_free_tm(sc, tm); return; } @@ -1333,7 +1342,6 @@ mprsas_target_reset_complete(struct mpr_softc *sc, struct mpr_command *tm) "NULL reset reply for tm %p\n", tm); if ((sc->mpr_flags & MPR_FLAGS_DIAGRESET) != 0) { /* this completion was due to a reset, just cleanup */ - targ->flags &= ~MPRSAS_TARGET_INRESET; targ->tm = NULL; mprsas_free_tm(sc, tm); } @@ -1349,8 +1357,6 @@ mprsas_target_reset_complete(struct mpr_softc *sc, struct mpr_command *tm) le16toh(reply->IOCStatus), le32toh(reply->ResponseCode), le32toh(reply->TerminationCount)); - targ->flags &= ~MPRSAS_TARGET_INRESET; - if (targ->outstanding == 0) { /* we've finished recovery for this target and all * of its logical units. @@ -1378,7 +1384,7 @@ mprsas_target_reset_complete(struct mpr_softc *sc, struct mpr_command *tm) #define MPR_RESET_TIMEOUT 30 -static int +int mprsas_send_reset(struct mpr_softc *sc, struct mpr_command *tm, uint8_t type) { MPI2_SCSI_TASK_MANAGE_REQUEST *req; @@ -1387,8 +1393,8 @@ mprsas_send_reset(struct mpr_softc *sc, struct mpr_command *tm, uint8_t type) target = tm->cm_targ; if (target->handle == 0) { - mpr_dprint(sc, MPR_ERROR,"%s null devhandle for target_id %d\n", - __func__, target->tid); + mpr_dprint(sc, MPR_ERROR, "%s null devhandle for target_id " + "%d\n", __func__, target->tid); return -1; } @@ -1404,6 +1410,7 @@ mprsas_send_reset(struct mpr_softc *sc, struct mpr_command *tm, uint8_t type) mprsas_log_command(tm, MPR_RECOVERY|MPR_INFO, "sending logical unit reset\n"); tm->cm_complete = mprsas_logical_unit_reset_complete; + mprsas_prepare_for_tm(sc, tm, target, tm->cm_lun); } else if (type == MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET) { /* @@ -1412,20 +1419,20 @@ mprsas_send_reset(struct mpr_softc *sc, struct mpr_command *tm, uint8_t type) */ req->MsgFlags = MPI2_SCSITASKMGMT_MSGFLAGS_LINK_RESET; tm->cm_targ->target_resets++; - tm->cm_targ->flags |= MPRSAS_TARGET_INRESET; mprsas_log_command(tm, MPR_RECOVERY|MPR_INFO, "sending target reset\n"); tm->cm_complete = mprsas_target_reset_complete; + mprsas_prepare_for_tm(sc, tm, target, CAM_LUN_WILDCARD); } else { mpr_dprint(sc, MPR_ERROR, "unexpected reset type 0x%x\n", type); return -1; } - mpr_dprint(sc, MPR_XINFO, "to target %u handle 0x%04x\n", target->tid, + mpr_dprint(sc, MPR_INFO, "to target %u handle 0x%04x\n", target->tid, target->handle); if (target->encl_level_valid) { - mpr_dprint(sc, MPR_XINFO, "At enclosure level %d, slot %d, " + mpr_dprint(sc, MPR_INFO, "At enclosure level %d, slot %d, " "connector name (%4s)\n", target->encl_level, target->encl_slot, target->connector_name); } @@ -1441,8 +1448,7 @@ mprsas_send_reset(struct mpr_softc *sc, struct mpr_command *tm, uint8_t type) err = mpr_map_command(sc, tm); if (err) mprsas_log_command(tm, MPR_RECOVERY, - "error %d sending reset type %u\n", - err, type); + "error %d sending reset type %u\n", err, type); return err; } @@ -1573,6 +1579,10 @@ mprsas_send_abort(struct mpr_softc *sc, struct mpr_command *tm, targ->aborts++; + mpr_dprint(sc, MPR_INFO, "Sending reset from %s for target ID %d\n", + __func__, targ->tid); + mprsas_prepare_for_tm(sc, tm, targ, tm->cm_lun); + err = mpr_map_command(sc, tm); if (err) mprsas_log_command(tm, MPR_RECOVERY, @@ -1581,7 +1591,6 @@ mprsas_send_abort(struct mpr_softc *sc, struct mpr_command *tm, return err; } - static void mprsas_scsiio_timeout(void *data) { @@ -1617,11 +1626,11 @@ mprsas_scsiio_timeout(void *data) targ = cm->cm_targ; targ->timeouts++; - mprsas_log_command(cm, MPR_XINFO, "command timeout cm %p ccb %p " + mprsas_log_command(cm, MPR_ERROR, "command timeout cm %p ccb %p " "target %u, handle(0x%04x)\n", cm, cm->cm_ccb, targ->tid, targ->handle); if (targ->encl_level_valid) { - mpr_dprint(sc, MPR_XINFO, "At enclosure level %d, slot %d, " + mpr_dprint(sc, MPR_ERROR, "At enclosure level %d, slot %d, " "connector name (%4s)\n", targ->encl_level, targ->encl_slot, targ->connector_name); } @@ -1629,8 +1638,7 @@ mprsas_scsiio_timeout(void *data) /* XXX first, check the firmware state, to see if it's still * operational. if not, do a diag reset. */ - - cm->cm_ccb->ccb_h.status = CAM_CMD_TIMEOUT; + mprsas_set_ccbstatus(cm->cm_ccb, CAM_CMD_TIMEOUT); cm->cm_state = MPR_CM_STATE_TIMEDOUT; TAILQ_INSERT_TAIL(&targ->timedout_commands, cm, cm_recovery); @@ -1681,19 +1689,22 @@ mprsas_action_scsiio(struct mprsas_softc *sassc, union ccb *ccb) mtx_assert(&sc->mpr_mtx, MA_OWNED); csio = &ccb->csio; + KASSERT(csio->ccb_h.target_id < sassc->maxtargets, + ("Target %d out of bounds in XPT_SCSI_IO\n", + csio->ccb_h.target_id)); targ = &sassc->targets[csio->ccb_h.target_id]; mpr_dprint(sc, MPR_TRACE, "ccb %p target flag %x\n", ccb, targ->flags); if (targ->handle == 0x0) { mpr_dprint(sc, MPR_ERROR, "%s NULL handle for target %u\n", __func__, csio->ccb_h.target_id); - csio->ccb_h.status = CAM_DEV_NOT_THERE; + mprsas_set_ccbstatus(ccb, CAM_DEV_NOT_THERE); xpt_done(ccb); return; } if (targ->flags & MPR_TARGET_FLAGS_RAID_COMPONENT) { - mpr_dprint(sc, MPR_TRACE, "%s Raid component no SCSI IO " + mpr_dprint(sc, MPR_ERROR, "%s Raid component no SCSI IO " "supported %u\n", __func__, csio->ccb_h.target_id); - csio->ccb_h.status = CAM_DEV_NOT_THERE; + mprsas_set_ccbstatus(ccb, CAM_DEV_NOT_THERE); xpt_done(ccb); return; } @@ -1702,7 +1713,7 @@ mprsas_action_scsiio(struct mprsas_softc *sassc, union ccb *ccb) * Progress" and was actually aborted by the upper layer. Check for * this here and complete the command without error. */ - if (ccb->ccb_h.status != CAM_REQ_INPROG) { + if (mprsas_get_ccbstatus(ccb) != CAM_REQ_INPROG) { mpr_dprint(sc, MPR_TRACE, "%s Command is not in progress for " "target %u\n", __func__, csio->ccb_h.target_id); xpt_done(ccb); @@ -1715,16 +1726,29 @@ mprsas_action_scsiio(struct mprsas_softc *sassc, union ccb *ccb) */ if (targ->flags & MPRSAS_TARGET_INREMOVAL) { if (targ->devinfo == 0) - csio->ccb_h.status = CAM_REQ_CMP; + mprsas_set_ccbstatus(ccb, CAM_REQ_CMP); else - csio->ccb_h.status = CAM_SEL_TIMEOUT; + mprsas_set_ccbstatus(ccb, CAM_SEL_TIMEOUT); xpt_done(ccb); return; } if ((sc->mpr_flags & MPR_FLAGS_SHUTDOWN) != 0) { - mpr_dprint(sc, MPR_TRACE, "%s shutting down\n", __func__); - csio->ccb_h.status = CAM_DEV_NOT_THERE; + mpr_dprint(sc, MPR_INFO, "%s shutting down\n", __func__); + mprsas_set_ccbstatus(ccb, CAM_DEV_NOT_THERE); + xpt_done(ccb); + return; + } + + /* + * If target has a reset in progress, freeze the devq and return. The + * devq will be released when the TM reset is finished. + */ + if (targ->flags & MPRSAS_TARGET_INRESET) { + ccb->ccb_h.status = CAM_BUSY | CAM_DEV_QFRZN; + mpr_dprint(sc, MPR_INFO, "%s: Freezing devq for target ID %d\n", + __func__, targ->tid); + xpt_freeze_devq(ccb->ccb_h.path, 1); xpt_done(ccb); return; } @@ -1807,7 +1831,7 @@ mprsas_action_scsiio(struct mprsas_softc *sassc, union ccb *ccb) if (MPR_SET_LUN(req->LUN, csio->ccb_h.target_lun) != 0) { mpr_free_command(sc, cm); - ccb->ccb_h.status = CAM_LUN_INVALID; + mprsas_set_ccbstatus(ccb, CAM_LUN_INVALID); xpt_done(ccb); return; } @@ -1904,7 +1928,7 @@ mprsas_action_scsiio(struct mprsas_softc *sassc, union ccb *ccb) } callout_reset_sbt(&cm->cm_callout, SBT_1MS * ccb->ccb_h.timeout, 0, - mprsas_scsiio_timeout, cm, 0); + mprsas_scsiio_timeout, cm, 0); targ->issued++; targ->outstanding++; @@ -2102,7 +2126,7 @@ mpr_sc_failed_io_info(struct mpr_softc *sc, struct ccb_scsiio *csio, desc_scsi_state, scsi_state); if (sc->mpr_debug & MPR_XINFO && - scsi_state & MPI2_SCSI_STATE_AUTOSENSE_VALID) { + scsi_state & MPI2_SCSI_STATE_AUTOSENSE_VALID) { mpr_dprint(sc, MPR_XINFO, "-> Sense Buffer Data : Start :\n"); scsi_sense_print(csio); mpr_dprint(sc, MPR_XINFO, "-> Sense Buffer Data : End :\n"); @@ -2126,6 +2150,8 @@ mprsas_scsiio_complete(struct mpr_softc *sc, struct mpr_command *cm) u8 *TLR_bits, TLR_on; int dir = 0, i; u16 alloc_len; + struct mprsas_target *target; + target_id_t target_id; MPR_FUNCTRACE(sc); mpr_dprint(sc, MPR_TRACE, @@ -2139,6 +2165,7 @@ mprsas_scsiio_complete(struct mpr_softc *sc, struct mpr_command *cm) sassc = sc->sassc; ccb = cm->cm_complete_data; csio = &ccb->csio; + target_id = csio->ccb_h.target_id; rep = (MPI2_SCSI_IO_REPLY *)cm->cm_reply; /* * XXX KDM if the chain allocation fails, does it matter if we do @@ -2197,7 +2224,7 @@ mprsas_scsiio_complete(struct mpr_softc *sc, struct mpr_command *cm) * because there can be no reply when we haven't actually * gone out to the hardware. */ - ccb->ccb_h.status = CAM_REQUEUE_REQ; + mprsas_set_ccbstatus(ccb, CAM_REQUEUE_REQ); /* * Currently the only error included in the mask is @@ -2214,7 +2241,7 @@ mprsas_scsiio_complete(struct mpr_softc *sc, struct mpr_command *cm) xpt_freeze_simq(sassc->sim, 1); sassc->flags |= MPRSAS_QUEUE_FROZEN; mpr_dprint(sc, MPR_INFO, "Error sending command, " - "freezing SIM queue\n"); + "freezing SIM queue\n"); } } @@ -2224,7 +2251,7 @@ mprsas_scsiio_complete(struct mpr_softc *sc, struct mpr_command *cm) * commands that were sent. All SSU commands should be completed before * shutdown completes, meaning SSU_refcount will be 0 after SSU_started * is TRUE. - */ + */ if (sc->SSU_started && (csio->cdb_io.cdb_bytes[0] == START_STOP_UNIT)) { mpr_dprint(sc, MPR_INFO, "Decrementing SSU count.\n"); sc->SSU_refcount--; @@ -2232,12 +2259,12 @@ mprsas_scsiio_complete(struct mpr_softc *sc, struct mpr_command *cm) /* Take the fast path to completion */ if (cm->cm_reply == NULL) { - if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG) { + if (mprsas_get_ccbstatus(ccb) == CAM_REQ_INPROG) { if ((sc->mpr_flags & MPR_FLAGS_DIAGRESET) != 0) - ccb->ccb_h.status = CAM_SCSI_BUS_RESET; + mprsas_set_ccbstatus(ccb, CAM_SCSI_BUS_RESET); else { - ccb->ccb_h.status = CAM_REQ_CMP; - ccb->csio.scsi_status = SCSI_STATUS_OK; + mprsas_set_ccbstatus(ccb, CAM_REQ_CMP); + csio->scsi_status = SCSI_STATUS_OK; } if (sassc->flags & MPRSAS_QUEUE_FROZEN) { ccb->ccb_h.status |= CAM_RELEASE_SIMQ; @@ -2252,10 +2279,10 @@ mprsas_scsiio_complete(struct mpr_softc *sc, struct mpr_command *cm) * CAM_REQ_CMP. The first is if MPR_CM_FLAGS_ERROR_MASK is * set, the second is in the MPR_FLAGS_DIAGRESET above. */ - if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) { + if (mprsas_get_ccbstatus(ccb) != CAM_REQ_CMP) { /* * Freeze the dev queue so that commands are - * executed in the correct order with after error + * executed in the correct order after error * recovery. */ ccb->ccb_h.status |= CAM_DEV_QFRZN; @@ -2285,7 +2312,7 @@ mprsas_scsiio_complete(struct mpr_softc *sc, struct mpr_command *cm) /* Completion failed at the transport level. */ if (rep->SCSIState & (MPI2_SCSI_STATE_NO_SCSI_STATUS | MPI2_SCSI_STATE_TERMINATED)) { - ccb->ccb_h.status = CAM_REQ_CMP_ERR; + mprsas_set_ccbstatus(ccb, CAM_REQ_CMP_ERR); break; } @@ -2294,7 +2321,7 @@ mprsas_scsiio_complete(struct mpr_softc *sc, struct mpr_command *cm) * recover the command. */ if (rep->SCSIState & MPI2_SCSI_STATE_AUTOSENSE_FAILED) { - ccb->ccb_h.status = CAM_AUTOSENSE_FAIL; + mprsas_set_ccbstatus(ccb, CAM_AUTOSENSE_FAIL); break; } @@ -2306,7 +2333,7 @@ mprsas_scsiio_complete(struct mpr_softc *sc, struct mpr_command *cm) if ((rep->SCSIState & MPI2_SCSI_STATE_RESPONSE_INFO_VALID) && ((le32toh(rep->ResponseInfo) & MPI2_SCSI_RI_MASK_REASONCODE) == MPR_SCSI_RI_INVALID_FRAME)) { - sc->mapping_table[csio->ccb_h.target_id].TLR_bits = + sc->mapping_table[target_id].TLR_bits = (u8)MPI2_SCSIIO_CONTROL_NO_TLR; } @@ -2318,16 +2345,16 @@ mprsas_scsiio_complete(struct mpr_softc *sc, struct mpr_command *cm) */ if ((rep->SCSIStatus == MPI2_SCSI_STATUS_COMMAND_TERMINATED) || (rep->SCSIStatus == MPI2_SCSI_STATUS_TASK_ABORTED)) { - ccb->ccb_h.status = CAM_REQ_ABORTED; + mprsas_set_ccbstatus(ccb, CAM_REQ_ABORTED); break; } /* Handle normal status and sense */ csio->scsi_status = rep->SCSIStatus; if (rep->SCSIStatus == MPI2_SCSI_STATUS_GOOD) - ccb->ccb_h.status = CAM_REQ_CMP; + mprsas_set_ccbstatus(ccb, CAM_REQ_CMP); else - ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR; + mprsas_set_ccbstatus(ccb, CAM_SCSI_STATUS_ERROR); if (rep->SCSIState & MPI2_SCSI_STATE_AUTOSENSE_VALID) { int sense_len, returned_sense_len; @@ -2362,12 +2389,11 @@ mprsas_scsiio_complete(struct mpr_softc *sc, struct mpr_command *cm) (csio->data_ptr != NULL) && ((csio->data_ptr[0] & 0x1f) == T_SEQUENTIAL) && (sc->control_TLR) && - (sc->mapping_table[csio->ccb_h.target_id].device_info & + (sc->mapping_table[target_id].device_info & MPI2_SAS_DEVICE_INFO_SSP_TARGET)) { vpd_list = (struct scsi_vpd_supported_page_list *) csio->data_ptr; - TLR_bits = &sc->mapping_table[csio->ccb_h.target_id]. - TLR_bits; + TLR_bits = &sc->mapping_table[target_id].TLR_bits; *TLR_bits = (u8)MPI2_SCSIIO_CONTROL_NO_TLR; TLR_on = (u8)MPI2_SCSIIO_CONTROL_TLR_ON; alloc_len = ((u16)csio->cdb_io.cdb_bytes[3] << 8) + @@ -2380,6 +2406,24 @@ mprsas_scsiio_complete(struct mpr_softc *sc, struct mpr_command *cm) } } } + + /* + * If this is a SATA direct-access end device, mark it so that + * a SCSI StartStopUnit command will be sent to it when the + * driver is being shutdown. + */ + if ((csio->cdb_io.cdb_bytes[0] == INQUIRY) && + ((csio->data_ptr[0] & 0x1f) == T_DIRECT) && + (sc->mapping_table[target_id].device_info & + MPI2_SAS_DEVICE_INFO_SATA_DEVICE) && + ((sc->mapping_table[target_id].device_info & + MPI2_SAS_DEVICE_INFO_MASK_DEVICE_TYPE) == + MPI2_SAS_DEVICE_INFO_END_DEVICE)) { + target = &sassc->targets[target_id]; + target->supports_SSU = TRUE; + mpr_dprint(sc, MPR_XINFO, "Target %d supports SSU\n", + target_id); + } break; case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE: case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE: @@ -2390,13 +2434,13 @@ mprsas_scsiio_complete(struct mpr_softc *sc, struct mpr_command *cm) * failed. */ if (cm->cm_targ->devinfo == 0) - ccb->ccb_h.status = CAM_REQ_CMP; + mprsas_set_ccbstatus(ccb, CAM_REQ_CMP); else - ccb->ccb_h.status = CAM_DEV_NOT_THERE; + mprsas_set_ccbstatus(ccb, CAM_DEV_NOT_THERE); break; case MPI2_IOCSTATUS_INVALID_SGL: mpr_print_scsiio_cmd(sc, cm); - ccb->ccb_h.status = CAM_UNREC_HBA_ERROR; + mprsas_set_ccbstatus(ccb, CAM_UNREC_HBA_ERROR); break; case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED: /* @@ -2409,14 +2453,14 @@ mprsas_scsiio_complete(struct mpr_softc *sc, struct mpr_command *cm) * on the console. */ if (cm->cm_state == MPR_CM_STATE_TIMEDOUT) - ccb->ccb_h.status = CAM_CMD_TIMEOUT; + mprsas_set_ccbstatus(ccb, CAM_CMD_TIMEOUT); else - ccb->ccb_h.status = CAM_REQ_ABORTED; + mprsas_set_ccbstatus(ccb, CAM_REQ_ABORTED); break; case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN: /* resid is ignored for this condition */ csio->resid = 0; - ccb->ccb_h.status = CAM_DATA_RUN_ERR; + mprsas_set_ccbstatus(ccb, CAM_DATA_RUN_ERR); break; case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED: case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED: @@ -2425,7 +2469,7 @@ mprsas_scsiio_complete(struct mpr_softc *sc, struct mpr_command *cm) * transient transport-related) errors, retry these without * decrementing the retry count. */ - ccb->ccb_h.status = CAM_REQUEUE_REQ; + mprsas_set_ccbstatus(ccb, CAM_REQUEUE_REQ); mprsas_log_command(cm, MPR_INFO, "terminated ioc %x scsi %x state %x xfer %u\n", le16toh(rep->IOCStatus), rep->SCSIStatus, rep->SCSIState, @@ -2447,7 +2491,7 @@ mprsas_scsiio_complete(struct mpr_softc *sc, struct mpr_command *cm) le16toh(rep->IOCStatus), rep->SCSIStatus, rep->SCSIState, le32toh(rep->TransferCount)); csio->resid = cm->cm_length; - ccb->ccb_h.status = CAM_REQ_CMP_ERR; + mprsas_set_ccbstatus(ccb, CAM_REQ_CMP_ERR); break; } @@ -2460,7 +2504,7 @@ mprsas_scsiio_complete(struct mpr_softc *sc, struct mpr_command *cm) "queue\n"); } - if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) { + if (mprsas_get_ccbstatus(ccb) != CAM_REQ_CMP) { ccb->ccb_h.status |= CAM_DEV_QFRZN; xpt_freeze_devq(ccb->ccb_h.path, /*count*/ 1); } @@ -2487,16 +2531,16 @@ mprsas_smpio_complete(struct mpr_softc *sc, struct mpr_command *cm) * in the standard request size. */ if ((cm->cm_flags & MPR_CM_FLAGS_ERROR_MASK) != 0) { - mpr_dprint(sc, MPR_ERROR,"%s: cm_flags = %#x on SMP request!\n", - __func__, cm->cm_flags); - ccb->ccb_h.status = CAM_REQ_CMP_ERR; + mpr_dprint(sc, MPR_ERROR, "%s: cm_flags = %#x on SMP " + "request!\n", __func__, cm->cm_flags); + mprsas_set_ccbstatus(ccb, CAM_REQ_CMP_ERR); goto bailout; } rpl = (MPI2_SMP_PASSTHROUGH_REPLY *)cm->cm_reply; if (rpl == NULL) { mpr_dprint(sc, MPR_ERROR, "%s: NULL cm_reply!\n", __func__); - ccb->ccb_h.status = CAM_REQ_CMP_ERR; + mprsas_set_ccbstatus(ccb, CAM_REQ_CMP_ERR); goto bailout; } @@ -2509,17 +2553,17 @@ mprsas_smpio_complete(struct mpr_softc *sc, struct mpr_command *cm) rpl->SASStatus != MPI2_SASSTATUS_SUCCESS) { mpr_dprint(sc, MPR_XINFO, "%s: IOCStatus %04x SASStatus %02x\n", __func__, le16toh(rpl->IOCStatus), rpl->SASStatus); - ccb->ccb_h.status = CAM_REQ_CMP_ERR; + mprsas_set_ccbstatus(ccb, CAM_REQ_CMP_ERR); goto bailout; } - mpr_dprint(sc, MPR_XINFO, "%s: SMP request to SAS address " - "%#jx completed successfully\n", __func__, (uintmax_t)sasaddr); + mpr_dprint(sc, MPR_XINFO, "%s: SMP request to SAS address %#jx " + "completed successfully\n", __func__, (uintmax_t)sasaddr); if (ccb->smpio.smp_response[2] == SMP_FR_ACCEPTED) - ccb->ccb_h.status = CAM_REQ_CMP; + mprsas_set_ccbstatus(ccb, CAM_REQ_CMP); else - ccb->ccb_h.status = CAM_SMP_STATUS_ERROR; + mprsas_set_ccbstatus(ccb, CAM_SMP_STATUS_ERROR); bailout: /* @@ -2558,7 +2602,7 @@ mprsas_send_smpcmd(struct mprsas_softc *sassc, union ccb *ccb, */ mpr_dprint(sc, MPR_ERROR, "%s: physical addresses not " "supported\n", __func__); - ccb->ccb_h.status = CAM_REQ_INVALID; + mprsas_set_ccbstatus(ccb, CAM_REQ_INVALID); xpt_done(ccb); return; case CAM_DATA_SG: @@ -2571,7 +2615,7 @@ mprsas_send_smpcmd(struct mprsas_softc *sassc, union ccb *ccb, mpr_dprint(sc, MPR_ERROR, "%s: multiple request or response buffer segments " "not supported for SMP\n", __func__); - ccb->ccb_h.status = CAM_REQ_INVALID; + mprsas_set_ccbstatus(ccb, CAM_REQ_INVALID); xpt_done(ccb); return; } @@ -2605,7 +2649,7 @@ mprsas_send_smpcmd(struct mprsas_softc *sassc, union ccb *ccb, response = ccb->smpio.smp_response; break; default: - ccb->ccb_h.status = CAM_REQ_INVALID; + mprsas_set_ccbstatus(ccb, CAM_REQ_INVALID); xpt_done(ccb); return; } @@ -2614,9 +2658,9 @@ mprsas_send_smpcmd(struct mprsas_softc *sassc, union ccb *ccb, * XXX We don't yet support physical addresses here. */ if (ccb->ccb_h.flags & (CAM_DATA_PHYS|CAM_SG_LIST_PHYS)) { - mpr_printf(sc, "%s: physical addresses not supported\n", - __func__); - ccb->ccb_h.status = CAM_REQ_INVALID; + mpr_dprint(sc, MPR_ERROR, "%s: physical addresses not " + "supported\n", __func__); + mprsas_set_ccbstatus(ccb, CAM_REQ_INVALID); xpt_done(ccb); return; } @@ -2635,7 +2679,7 @@ mprsas_send_smpcmd(struct mprsas_softc *sassc, union ccb *ccb, mpr_dprint(sc, MPR_ERROR, "%s: multiple request or " "response buffer segments not supported for SMP\n", __func__); - ccb->ccb_h.status = CAM_REQ_INVALID; + mprsas_set_ccbstatus(ccb, CAM_REQ_INVALID); xpt_done(ccb); return; } @@ -2673,7 +2717,7 @@ mprsas_send_smpcmd(struct mprsas_softc *sassc, union ccb *ccb, if (cm == NULL) { mpr_dprint(sc, MPR_ERROR, "%s: cannot allocate command\n", __func__); - ccb->ccb_h.status = CAM_RESRC_UNAVAIL; + mprsas_set_ccbstatus(ccb, CAM_RESRC_UNAVAIL); xpt_done(ccb); return; } @@ -2760,7 +2804,7 @@ mprsas_send_smpcmd(struct mprsas_softc *sassc, union ccb *ccb, bailout_error: mpr_free_command(sc, cm); - ccb->ccb_h.status = CAM_RESRC_UNAVAIL; + mprsas_set_ccbstatus(ccb, CAM_RESRC_UNAVAIL); xpt_done(ccb); return; } @@ -2783,7 +2827,7 @@ mprsas_action_smpio(struct mprsas_softc *sassc, union ccb *ccb) if (targ->handle == 0x0) { mpr_dprint(sc, MPR_ERROR, "%s: target %d does not exist!\n", __func__, ccb->ccb_h.target_id); - ccb->ccb_h.status = CAM_SEL_TIMEOUT; + mprsas_set_ccbstatus(ccb, CAM_SEL_TIMEOUT); xpt_done(ccb); return; } @@ -2831,7 +2875,7 @@ mprsas_action_smpio(struct mprsas_softc *sassc, union ccb *ccb) if (targ->parent_handle == 0x0) { mpr_dprint(sc, MPR_ERROR, "%s: handle %d does not have " "a valid parent handle!\n", __func__, targ->handle); - ccb->ccb_h.status = CAM_DEV_NOT_THERE; + mprsas_set_ccbstatus(ccb, CAM_DEV_NOT_THERE); goto bailout; } #ifdef OLD_MPR_PROBE @@ -2841,7 +2885,7 @@ mprsas_action_smpio(struct mprsas_softc *sassc, union ccb *ccb) if (parent_target == NULL) { mpr_dprint(sc, MPR_ERROR, "%s: handle %d does not have " "a valid parent target!\n", __func__, targ->handle); - ccb->ccb_h.status = CAM_DEV_NOT_THERE; + mprsas_set_ccbstatus(ccb, CAM_DEV_NOT_THERE); goto bailout; } @@ -2850,9 +2894,8 @@ mprsas_action_smpio(struct mprsas_softc *sassc, union ccb *ccb) mpr_dprint(sc, MPR_ERROR, "%s: handle %d parent %d " "does not have an SMP target!\n", __func__, targ->handle, parent_target->handle); - ccb->ccb_h.status = CAM_DEV_NOT_THERE; + mprsas_set_ccbstatus(ccb, CAM_DEV_NOT_THERE); goto bailout; - } sasaddr = parent_target->sasaddr; @@ -2862,7 +2905,7 @@ mprsas_action_smpio(struct mprsas_softc *sassc, union ccb *ccb) mpr_dprint(sc, MPR_ERROR, "%s: handle %d parent %d " "does not have an SMP target!\n", __func__, targ->handle, targ->parent_handle); - ccb->ccb_h.status = CAM_DEV_NOT_THERE; + mprsas_set_ccbstatus(ccb, CAM_DEV_NOT_THERE); goto bailout; } @@ -2870,7 +2913,7 @@ mprsas_action_smpio(struct mprsas_softc *sassc, union ccb *ccb) mpr_dprint(sc, MPR_ERROR, "%s: handle %d parent handle " "%d does not have a valid SAS address!\n", __func__, targ->handle, targ->parent_handle); - ccb->ccb_h.status = CAM_DEV_NOT_THERE; + mprsas_set_ccbstatus(ccb, CAM_DEV_NOT_THERE); goto bailout; } @@ -2882,7 +2925,7 @@ mprsas_action_smpio(struct mprsas_softc *sassc, union ccb *ccb) if (sasaddr == 0) { mpr_dprint(sc, MPR_INFO, "%s: unable to find SAS address for " "handle %d\n", __func__, targ->handle); - ccb->ccb_h.status = CAM_DEV_NOT_THERE; + mprsas_set_ccbstatus(ccb, CAM_DEV_NOT_THERE); goto bailout; } mprsas_send_smpcmd(sassc, ccb, sasaddr); @@ -2914,7 +2957,7 @@ mprsas_action_resetdev(struct mprsas_softc *sassc, union ccb *ccb) if (tm == NULL) { mpr_dprint(sc, MPR_ERROR, "command alloc failure in mprsas_action_resetdev\n"); - ccb->ccb_h.status = CAM_RESRC_UNAVAIL; + mprsas_set_ccbstatus(ccb, CAM_RESRC_UNAVAIL); xpt_done(ccb); return; } @@ -2933,7 +2976,12 @@ mprsas_action_resetdev(struct mprsas_softc *sassc, union ccb *ccb) MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY; tm->cm_complete = mprsas_resetdev_complete; tm->cm_complete_data = ccb; + + mpr_dprint(sc, MPR_INFO, "%s: Sending reset for target ID %d\n", + __func__, targ->tid); tm->cm_targ = targ; + targ->flags |= MPRSAS_TARGET_INRESET; + mpr_map_command(sc, tm); } @@ -2962,7 +3010,7 @@ mprsas_resetdev_complete(struct mpr_softc *sc, struct mpr_command *tm) mpr_dprint(sc, MPR_ERROR, "%s: cm_flags = %#x for reset of " "handle %#04x! This should not happen!\n", __func__, tm->cm_flags, req->DevHandle); - ccb->ccb_h.status = CAM_REQ_CMP_ERR; + mprsas_set_ccbstatus(ccb, CAM_REQ_CMP_ERR); goto bailout; } @@ -2971,12 +3019,12 @@ mprsas_resetdev_complete(struct mpr_softc *sc, struct mpr_command *tm) le16toh(resp->IOCStatus), le32toh(resp->ResponseCode)); if (le32toh(resp->ResponseCode) == MPI2_SCSITASKMGMT_RSP_TM_COMPLETE) { - ccb->ccb_h.status = CAM_REQ_CMP; + mprsas_set_ccbstatus(ccb, CAM_REQ_CMP); mprsas_announce_reset(sc, AC_SENT_BDR, tm->cm_targ->tid, CAM_LUN_WILDCARD); } else - ccb->ccb_h.status = CAM_REQ_CMP_ERR; + mprsas_set_ccbstatus(ccb, CAM_REQ_CMP_ERR); bailout: @@ -2995,7 +3043,8 @@ mprsas_poll(struct cam_sim *sim) /* frequent debug messages during a panic just slow * everything down too much. */ - mpr_printf(sassc->sc, "%s clearing MPR_TRACE\n", __func__); + mpr_dprint(sassc->sc, MPR_XINFO, "%s clearing MPR_TRACE\n", + __func__); sassc->sc->mpr_debug &= ~MPR_TRACE; } @@ -3094,7 +3143,7 @@ mprsas_async(void *callback_arg, uint32_t code, struct cam_path *path, if ((cdai.ccb_h.status & CAM_DEV_QFRZN) != 0) cam_release_devq(cdai.ccb_h.path, 0, 0, 0, FALSE); - if (((cdai.ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP) + if ((mprsas_get_ccbstatus((union ccb *)&cdai) == CAM_REQ_CMP) && (rcap_buf.prot & SRC16_PROT_EN)) { lun->eedp_formatted = TRUE; lun->eedp_block_size = scsi_4btoul(rcap_buf.length); @@ -3121,8 +3170,6 @@ mprsas_async(void *callback_arg, uint32_t code, struct cam_path *path, #endif cgd = arg; - mprsas_prepare_ssu(sc, path, cgd); - #if (__FreeBSD_version < 901503) || \ ((__FreeBSD_version >= 1000000) && (__FreeBSD_version < 1000006)) mprsas_check_eedp(sc, path, cgd); @@ -3134,64 +3181,6 @@ mprsas_async(void *callback_arg, uint32_t code, struct cam_path *path, } } -static void -mprsas_prepare_ssu(struct mpr_softc *sc, struct cam_path *path, - struct ccb_getdev *cgd) -{ - struct mprsas_softc *sassc = sc->sassc; - path_id_t pathid; - target_id_t targetid; - lun_id_t lunid; - struct mprsas_target *target; - struct mprsas_lun *lun; - uint8_t found_lun; - - sassc = sc->sassc; - pathid = cam_sim_path(sassc->sim); - targetid = xpt_path_target_id(path); - lunid = xpt_path_lun_id(path); - - KASSERT(targetid < sassc->maxtargets, - ("Target %d out of bounds in mprsas_prepare_ssu\n", targetid)); - target = &sassc->targets[targetid]; - if (target->handle == 0x0) - return; - - /* - * If LUN is already in list, don't create a new one. - */ - found_lun = FALSE; - SLIST_FOREACH(lun, &target->luns, lun_link) { - if (lun->lun_id == lunid) { - found_lun = TRUE; - break; - } - } - if (!found_lun) { - lun = malloc(sizeof(struct mprsas_lun), M_MPR, - M_NOWAIT | M_ZERO); - if (lun == NULL) { - mpr_dprint(sc, MPR_ERROR, "Unable to alloc LUN for " - "preparing SSU.\n"); - return; - } - lun->lun_id = lunid; - SLIST_INSERT_HEAD(&target->luns, lun, lun_link); - } - - /* - * If this is a SATA direct-access end device, mark it so that a SCSI - * StartStopUnit command will be sent to it when the driver is being - * shutdown. - */ - if (((cgd->inq_data.device & 0x1F) == T_DIRECT) && - (target->devinfo & MPI2_SAS_DEVICE_INFO_SATA_DEVICE) && - ((target->devinfo & MPI2_SAS_DEVICE_INFO_MASK_DEVICE_TYPE) == - MPI2_SAS_DEVICE_INFO_END_DEVICE)) { - lun->stop_at_shutdown = TRUE; - } -} - #if (__FreeBSD_version < 901503) || \ ((__FreeBSD_version >= 1000000) && (__FreeBSD_version < 1000006)) static void @@ -3212,7 +3201,6 @@ mprsas_check_eedp(struct mpr_softc *sc, struct cam_path *path, uint8_t found_lun; char path_str[64]; - sassc = sc->sassc; pathid = cam_sim_path(sassc->sim); targetid = xpt_path_target_id(path); lunid = xpt_path_lun_id(path); @@ -3288,7 +3276,7 @@ mprsas_check_eedp(struct mpr_softc *sc, struct cam_path *path, rcap_buf = malloc(sizeof(struct scsi_read_capacity_eedp), M_MPR, M_NOWAIT | M_ZERO); if (rcap_buf == NULL) { - mpr_dprint(sc, MPR_FAULT, "Unable to alloc read capacity " + mpr_dprint(sc, MPR_ERROR, "Unable to alloc read capacity " "buffer for EEDP support.\n"); xpt_free_path(ccb->ccb_h.path); xpt_free_ccb(ccb); @@ -3341,7 +3329,7 @@ mprsas_read_cap_done(struct cam_periph *periph, union ccb *done_ccb) xpt_release_devq(done_ccb->ccb_h.path, /*count*/ 1, /*run_queue*/TRUE); } - + rcap_buf = (struct scsi_read_capacity_eedp *)done_ccb->csio.data_ptr; /* @@ -3359,21 +3347,21 @@ mprsas_read_cap_done(struct cam_periph *periph, union ccb *done_ccb) /* * Got the LUN in the target's LUN list. Fill it in with EEDP - * info. If the READ CAP 16 command had some SCSI error (common + * info. If the READ CAP 16 command had some SCSI error (common * if command is not supported), mark the lun as not supporting * EEDP and set the block size to 0. */ - if (((done_ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) - || (done_ccb->csio.scsi_status != SCSI_STATUS_OK)) { + if ((mprsas_get_ccbstatus(done_ccb) != CAM_REQ_CMP) || + (done_ccb->csio.scsi_status != SCSI_STATUS_OK)) { lun->eedp_formatted = FALSE; lun->eedp_block_size = 0; break; } if (rcap_buf->protect & 0x01) { - mpr_dprint(sassc->sc, MPR_INFO, "LUN %d for " - "target ID %d is formatted for EEDP " - "support.\n", done_ccb->ccb_h.target_lun, + mpr_dprint(sassc->sc, MPR_INFO, "LUN %d for target ID " + "%d is formatted for EEDP support.\n", + done_ccb->ccb_h.target_lun, done_ccb->ccb_h.target_id); lun->eedp_formatted = TRUE; lun->eedp_block_size = scsi_4btoul(rcap_buf->length); @@ -3389,6 +3377,34 @@ mprsas_read_cap_done(struct cam_periph *periph, union ccb *done_ccb) #endif /* (__FreeBSD_version < 901503) || \ ((__FreeBSD_version >= 1000000) && (__FreeBSD_version < 1000006)) */ +void +mprsas_prepare_for_tm(struct mpr_softc *sc, struct mpr_command *tm, + struct mprsas_target *target, lun_id_t lun_id) +{ + union ccb *ccb; + path_id_t path_id; + + /* + * Set the INRESET flag for this target so that no I/O will be sent to + * the target until the reset has completed. If an I/O request does + * happen, the devq will be frozen. The CCB holds the path which is + * used to release the devq. The devq is released and the CCB is freed + * when the TM completes. + */ + ccb = xpt_alloc_ccb_nowait(); + if (ccb) { + path_id = cam_sim_path(sc->sassc->sim); + if (xpt_create_path(&ccb->ccb_h.path, xpt_periph, path_id, + target->tid, lun_id) != CAM_REQ_CMP) { + xpt_free_ccb(ccb); + } else { + tm->cm_ccb = ccb; + tm->cm_targ = target; + target->flags |= MPRSAS_TARGET_INRESET; + } + } +} + int mprsas_startup(struct mpr_softc *sc) { @@ -3489,3 +3505,33 @@ mprsas_check_id(struct mprsas_softc *sassc, int id) return (0); } + +void +mprsas_realloc_targets(struct mpr_softc *sc, int maxtargets) +{ + struct mprsas_softc *sassc; + struct mprsas_lun *lun, *lun_tmp; + struct mprsas_target *targ; + int i; + + sassc = sc->sassc; + /* + * The number of targets is based on IOC Facts, so free all of + * the allocated LUNs for each target and then the target buffer + * itself. + */ + for (i=0; i< maxtargets; i++) { + targ = &sassc->targets[i]; + SLIST_FOREACH_SAFE(lun, &targ->luns, lun_link, lun_tmp) { + free(lun, M_MPR); + } + } + free(sassc->targets, M_MPR); + + sassc->targets = malloc(sizeof(struct mprsas_target) * maxtargets, + M_MPR, M_WAITOK|M_ZERO); + if (!sassc->targets) { + panic("%s failed to alloc targets with error %d\n", + __func__, ENOMEM); + } +} diff --git a/sys/dev/mpr/mpr_sas.h b/sys/dev/mpr/mpr_sas.h index 9d3116af29d0..ebeed300c9fb 100644 --- a/sys/dev/mpr/mpr_sas.h +++ b/sys/dev/mpr/mpr_sas.h @@ -1,5 +1,6 @@ /*- - * Copyright (c) 2011-2014 LSI Corp. + * Copyright (c) 2011-2015 LSI Corp. + * Copyright (c) 2013-2015 Avago Technologies * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * LSI MPT-Fusion Host Adapter FreeBSD + * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD * * $FreeBSD$ */ @@ -35,7 +36,6 @@ struct mprsas_lun { lun_id_t lun_id; uint8_t eedp_formatted; uint32_t eedp_block_size; - uint8_t stop_at_shutdown; }; struct mprsas_target { @@ -55,11 +55,10 @@ struct mprsas_target { #define MPRSAS_TARGET_INREMOVAL (1 << 3) #define MPR_TARGET_FLAGS_RAID_COMPONENT (1 << 4) #define MPR_TARGET_FLAGS_VOLUME (1 << 5) +#define MPR_TARGET_IS_SATA_SSD (1 << 6) #define MPRSAS_TARGET_INRECOVERY (MPRSAS_TARGET_INABORT | \ MPRSAS_TARGET_INRESET | MPRSAS_TARGET_INCHIPRESET) -#define MPRSAS_TARGET_ADD (1 << 29) -#define MPRSAS_TARGET_REMOVE (1 << 30) uint16_t tid; SLIST_HEAD(, mprsas_lun) luns; TAILQ_HEAD(, mpr_command) commands; @@ -82,6 +81,8 @@ struct mprsas_target { unsigned int logical_unit_resets; unsigned int target_resets; uint8_t scsi_req_desc_type; + uint8_t stop_at_shutdown; + uint8_t supports_SSU; }; struct mprsas_softc { @@ -92,7 +93,6 @@ struct mprsas_softc { #define MPRSAS_DISCOVERY_TIMEOUT_PENDING (1 << 2) #define MPRSAS_QUEUE_FROZEN (1 << 3) #define MPRSAS_SHUTDOWN (1 << 4) -#define MPRSAS_SCANTHREAD (1 << 5) u_int maxtargets; struct mprsas_target *targets; struct cam_devq *devq; @@ -103,7 +103,6 @@ struct mprsas_softc { struct mpr_event_handle *mprsas_eh; u_int startup_refcount; - u_int tm_count; struct proc *sysctl_proc; struct taskqueue *ev_tq; @@ -150,6 +149,19 @@ mprsas_set_lun(uint8_t *lun, u_int ccblun) return (0); } +static __inline void +mprsas_set_ccbstatus(union ccb *ccb, int status) +{ + ccb->ccb_h.status &= ~CAM_STATUS_MASK; + ccb->ccb_h.status |= status; +} + +static __inline int +mprsas_get_ccbstatus(union ccb *ccb) +{ + return (ccb->ccb_h.status & CAM_STATUS_MASK); +} + #define MPR_SET_SINGLE_LUN(req, lun) \ do { \ bzero((req)->LUN, 8); \ @@ -158,11 +170,10 @@ do { \ void mprsas_rescan_target(struct mpr_softc *sc, struct mprsas_target *targ); void mprsas_discovery_end(struct mprsas_softc *sassc); +void mprsas_prepare_for_tm(struct mpr_softc *sc, struct mpr_command *tm, + struct mprsas_target *target, lun_id_t lun_id); void mprsas_startup_increment(struct mprsas_softc *sassc); void mprsas_startup_decrement(struct mprsas_softc *sassc); -void mprsas_release_simq_reinit(struct mprsas_softc *sassc); -struct mpr_command * mprsas_alloc_tm(struct mpr_softc *sc); -void mprsas_free_tm(struct mpr_softc *sc, struct mpr_command *tm); void mprsas_firmware_event_work(void *arg, int pending); int mprsas_check_id(struct mprsas_softc *sassc, int id); diff --git a/sys/dev/mpr/mpr_sas_lsi.c b/sys/dev/mpr/mpr_sas_lsi.c index 32e9b3a07804..7d6ef7070f7d 100644 --- a/sys/dev/mpr/mpr_sas_lsi.c +++ b/sys/dev/mpr/mpr_sas_lsi.c @@ -1,5 +1,6 @@ /*- - * Copyright (c) 2011-2014 LSI Corp. + * Copyright (c) 2011-2015 LSI Corp. + * Copyright (c) 2013-2015 Avago Technologies * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -23,13 +24,13 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * LSI MPT-Fusion Host Adapter FreeBSD + * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD */ #include __FBSDID("$FreeBSD$"); -/* Communications core for LSI MPT2 */ +/* Communications core for LSI MPT3 */ /* TODO Move headers to mprvar */ #include @@ -105,7 +106,9 @@ struct _ata_identify_device_data { u16 serial_number[10]; /* 10-19 */ u16 reserved2[7]; /* 20-26 */ u16 model_number[20]; /* 27-46*/ - u16 reserved3[209]; /* 47-255*/ + u16 reserved3[170]; /* 47-216 */ + u16 rotational_speed; /* 217 */ + u16 reserved4[38]; /* 218-255 */ }; static u32 event_count; static void mprsas_fw_work(struct mpr_softc *sc, @@ -116,8 +119,9 @@ static int mprsas_add_device(struct mpr_softc *sc, u16 handle, u8 linkrate); static int mprsas_get_sata_identify(struct mpr_softc *sc, u16 handle, Mpi2SataPassthroughReply_t *mpi_reply, char *id_buffer, int sz, u32 devinfo); +static void mprsas_ata_id_timeout(void *data); int mprsas_get_sas_address_for_sata_disk(struct mpr_softc *sc, - u64 *sas_address, u16 handle, u32 device_info); + u64 *sas_address, u16 handle, u32 device_info, u8 *is_SATA_SSD); static int mprsas_volume_add(struct mpr_softc *sc, u16 handle); static void mprsas_SSU_to_SATA_devices(struct mpr_softc *sc); @@ -325,7 +329,7 @@ mprsas_fw_work(struct mpr_softc *sc, struct mpr_fw_event_work *fw_event) return; } - mpr_dprint(sc, MPR_INFO, "Sending FP action " + mpr_dprint(sc, MPR_EVENT, "Sending FP action " "from " "MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST " ":\n"); @@ -350,9 +354,9 @@ mprsas_fw_work(struct mpr_softc *sc, struct mpr_fw_event_work *fw_event) if (reply && (le16toh(reply->IOCStatus) & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) { - mpr_dprint(sc, MPR_INFO, "%s: error " - "sending RaidActionPage; iocstatus " - "= 0x%x\n", __func__, + mpr_dprint(sc, MPR_ERROR, "%s: error " + "sending RaidActionPage; " + "iocstatus = 0x%x\n", __func__, le16toh(reply->IOCStatus)); } @@ -360,7 +364,7 @@ mprsas_fw_work(struct mpr_softc *sc, struct mpr_fw_event_work *fw_event) mpr_free_command(sc, cm); } skip_fp_send: - mpr_dprint(sc, MPR_INFO, "Received " + mpr_dprint(sc, MPR_EVENT, "Received " "MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST Reason " "code %x:\n", element->ReasonCode); switch (element->ReasonCode) { @@ -421,7 +425,6 @@ mprsas_fw_work(struct mpr_softc *sc, struct mpr_fw_event_work *fw_event) break; targ->flags |= MPR_TARGET_FLAGS_RAID_COMPONENT; mprsas_rescan_target(sc, targ); - break; case MPI2_EVENT_IR_CHANGE_RC_PD_DELETED: /* @@ -678,14 +681,13 @@ mprsas_add_device(struct mpr_softc *sc, u16 handle, u8 linkrate){ struct mprsas_target *targ; Mpi2ConfigReply_t mpi_reply; Mpi2SasDevicePage0_t config_page; - uint64_t sas_address, sata_sas_address; - uint64_t parent_sas_address = 0; - u16 ioc_pg8_flags = le16toh(sc->ioc_pg8.Flags); + uint64_t sas_address, parent_sas_address = 0; u32 device_info, parent_devinfo = 0; unsigned int id; - int ret; - int error = 0; + int ret = 1, error = 0, i; struct mprsas_lun *lun; + u8 is_SATA_SSD = 0; + struct mpr_command *cm; sassc = sc->sassc; mprsas_startup_increment(sassc); @@ -717,26 +719,29 @@ mprsas_add_device(struct mpr_softc *sc, u16 handle, u8 linkrate){ } /* TODO Check proper endianess */ sas_address = config_page.SASAddress.High; - sas_address = (sas_address << 32) | - config_page.SASAddress.Low; + sas_address = (sas_address << 32) | config_page.SASAddress.Low; + mpr_dprint(sc, MPR_INFO, "SAS Address from SAS device page0 = %jx\n", + sas_address); - if ((ioc_pg8_flags & MPI2_IOCPAGE8_FLAGS_MASK_MAPPING_MODE) - == MPI2_IOCPAGE8_FLAGS_DEVICE_PERSISTENCE_MAPPING) { - if (device_info & MPI2_SAS_DEVICE_INFO_SATA_DEVICE) { - ret = mprsas_get_sas_address_for_sata_disk(sc, - &sata_sas_address, handle, device_info); - if (!ret) - id = mpr_mapping_get_sas_id(sc, - sata_sas_address, handle); - else - id = mpr_mapping_get_sas_id(sc, - sas_address, handle); - } else - id = mpr_mapping_get_sas_id(sc, sas_address, - handle); - } else - id = mpr_mapping_get_sas_id(sc, sas_address, handle); + /* + * Always get SATA Identify information because this is used to + * determine if Start/Stop Unit should be sent to the drive when the + * system is shutdown. + */ + if (device_info & MPI2_SAS_DEVICE_INFO_SATA_DEVICE) { + ret = mprsas_get_sas_address_for_sata_disk(sc, &sas_address, + handle, device_info, &is_SATA_SSD); + if (ret) { + mpr_dprint(sc, MPR_ERROR, "%s: failed to get disk type " + "(SSD or HDD) for SATA device with handle 0x%04x\n", + __func__, handle); + } else { + mpr_dprint(sc, MPR_INFO, "SAS Address from SATA " + "device = %jx\n", sas_address); + } + } + id = mpr_mapping_get_sas_id(sc, sas_address, handle); if (id == MPR_MAP_BAD_ID) { printf("failure at %s:%d/%s()! Could not get ID for device " "with handle 0x%04x\n", __FILE__, __LINE__, __func__, @@ -750,7 +755,7 @@ mprsas_add_device(struct mpr_softc *sc, u16 handle, u8 linkrate){ error = ENXIO; goto out; } - + mpr_dprint(sc, MPR_MAPPING, "SAS Address from SAS device page0 = %jx\n", sas_address); targ = &sassc->targets[id]; @@ -773,6 +778,9 @@ mprsas_add_device(struct mpr_softc *sc, u16 handle, u8 linkrate){ targ->tid = id; targ->linkrate = (linkrate>>4); targ->flags = 0; + if (is_SATA_SSD) { + targ->flags = MPR_TARGET_IS_SATA_SSD; + } if (le16toh(config_page.Flags) & MPI25_SAS_DEVICE0_FLAGS_FAST_PATH_CAPABLE) { targ->scsi_req_desc_type = @@ -792,12 +800,12 @@ mprsas_add_device(struct mpr_softc *sc, u16 handle, u8 linkrate){ SLIST_INIT(&targ->luns); mpr_describe_devinfo(targ->devinfo, devstring, 80); - mpr_dprint(sc, (MPR_XINFO|MPR_MAPPING), "Found device <%s> <%s> " + mpr_dprint(sc, (MPR_INFO|MPR_MAPPING), "Found device <%s> <%s> " "handle<0x%04x> enclosureHandle<0x%04x> slot %d\n", devstring, mpr_describe_table(mpr_linkrate_names, targ->linkrate), targ->handle, targ->encl_handle, targ->encl_slot); if (targ->encl_level_valid) { - mpr_dprint(sc, (MPR_XINFO|MPR_MAPPING), "At enclosure level %d " + mpr_dprint(sc, (MPR_INFO|MPR_MAPPING), "At enclosure level %d " "and connector name (%4s)\n", targ->encl_level, targ->connector_name); } @@ -807,15 +815,57 @@ mprsas_add_device(struct mpr_softc *sc, u16 handle, u8 linkrate){ #endif mprsas_rescan_target(sc, targ); mpr_dprint(sc, MPR_MAPPING, "Target id 0x%x added\n", targ->tid); + + /* + * Check all commands to see if the SATA_ID_TIMEOUT flag has been set. + * If so, send a Target Reset TM to the target that was just created. + * An Abort Task TM should be used instead of a Target Reset, but that + * would be much more difficult because targets have not been fully + * discovered yet, and LUN's haven't been setup. So, just reset the + * target instead of the LUN. + */ + for (i = 1; i < sc->num_reqs; i++) { + cm = &sc->commands[i]; + if (cm->cm_flags & MPR_CM_FLAGS_SATA_ID_TIMEOUT) { + targ->timeouts++; + cm->cm_state = MPR_CM_STATE_TIMEDOUT; + + if ((targ->tm = mprsas_alloc_tm(sc)) != NULL) { + mpr_dprint(sc, MPR_INFO, "%s: sending Target " + "Reset for stuck SATA identify command " + "(cm = %p)\n", __func__, cm); + targ->tm->cm_targ = targ; + mprsas_send_reset(sc, targ->tm, + MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET); + } else { + mpr_dprint(sc, MPR_ERROR, "Failed to allocate " + "tm for Target Reset after SATA ID " + "command timed out (cm %p)\n", cm); + } + /* + * No need to check for more since the target is + * already being reset. + */ + break; + } + } out: + /* + * Free the commands that may not have been freed from the SATA ID call + */ + for (i = 1; i < sc->num_reqs; i++) { + cm = &sc->commands[i]; + if (cm->cm_flags & MPR_CM_FLAGS_SATA_ID_TIMEOUT) { + mpr_free_command(sc, cm); + } + } mprsas_startup_decrement(sassc); return (error); - } int mprsas_get_sas_address_for_sata_disk(struct mpr_softc *sc, - u64 *sas_address, u16 handle, u32 device_info) + u64 *sas_address, u16 handle, u32 device_info, u8 *is_SATA_SSD) { Mpi2SataPassthroughReply_t mpi_reply; int i, rc, try_count; @@ -835,7 +885,16 @@ mprsas_get_sas_address_for_sata_disk(struct mpr_softc *sc, ioc_status = le16toh(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK; sas_status = mpi_reply.SASStatus; - } while ((rc == -EAGAIN || ioc_status || sas_status) && + if (ioc_status != MPI2_IOCSTATUS_SUCCESS) { + if (sc->spinup_wait_time > 0) { + mpr_dprint(sc, MPR_INFO, "Sleeping %d seconds " + "after SATA ID error to wait for spinup\n", + sc->spinup_wait_time); + msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0, + "mprid", sc->spinup_wait_time * hz); + } + } + } while (((rc && (rc != EWOULDBLOCK)) || ioc_status || sas_status) && (try_count < 5)); if (rc == 0 && !ioc_status && !sas_status) { @@ -884,6 +943,10 @@ mprsas_get_sas_address_for_sata_disk(struct mpr_softc *sc, (u64)hash_address.wwid[3] << 32 | (u64)hash_address.wwid[4] << 24 | (u64)hash_address.wwid[5] << 16 | (u64)hash_address.wwid[6] << 8 | (u64)hash_address.wwid[7]; + if (ata_identify.rotational_speed == 1) { + *is_SATA_SSD = 1; + } + return 0; } @@ -923,14 +986,29 @@ mprsas_get_sata_identify(struct mpr_softc *sc, u16 handle, cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; cm->cm_data = buffer; cm->cm_length = htole32(sz); + + /* + * Start a timeout counter specifically for the SATA ID command. This + * is used to fix a problem where the FW does not send a reply sometimes + * when a bad disk is in the topology. So, this is used to timeout the + * command so that processing can continue normally. + */ + mpr_dprint(sc, MPR_XINFO, "%s start timeout counter for SATA ID " + "command\n", __func__); + callout_reset(&cm->cm_callout, MPR_ATA_ID_TIMEOUT * hz, + mprsas_ata_id_timeout, cm); error = mpr_wait_command(sc, cm, 60, CAN_SLEEP); + mpr_dprint(sc, MPR_XINFO, "%s stop timeout counter for SATA ID " + "command\n", __func__); + callout_stop(&cm->cm_callout); + reply = (Mpi2SataPassthroughReply_t *)cm->cm_reply; if (error || (reply == NULL)) { /* FIXME */ /* * If the request returns an error then we need to do a diag * reset - */ + */ printf("%s: request for page completed with error %d", __func__, error); error = ENXIO; @@ -946,11 +1024,66 @@ mprsas_get_sata_identify(struct mpr_softc *sc, u16 handle, goto out; } out: - mpr_free_command(sc, cm); - free(buffer, M_MPR); + /* + * If the SATA_ID_TIMEOUT flag has been set for this command, don't free + * it. The command will be freed after sending a target reset TM. If + * the command did timeout, use EWOULDBLOCK. + */ + if ((cm->cm_flags & MPR_CM_FLAGS_SATA_ID_TIMEOUT) == 0) + mpr_free_command(sc, cm); + else if (error == 0) + error = EWOULDBLOCK; + free(buffer, M_MPR); return (error); } +static void +mprsas_ata_id_timeout(void *data) +{ + struct mpr_softc *sc; + struct mpr_command *cm; + + cm = (struct mpr_command *)data; + sc = cm->cm_sc; + mtx_assert(&sc->mpr_mtx, MA_OWNED); + + mpr_dprint(sc, MPR_INFO, "%s checking ATA ID command %p sc %p\n", + __func__, cm, sc); + if ((callout_pending(&cm->cm_callout)) || + (!callout_active(&cm->cm_callout))) { + mpr_dprint(sc, MPR_INFO, "%s ATA ID command almost timed " + "out\n", __func__); + return; + } + callout_deactivate(&cm->cm_callout); + + /* + * Run the interrupt handler to make sure it's not pending. This + * isn't perfect because the command could have already completed + * and been re-used, though this is unlikely. + */ + mpr_intr_locked(sc); + if (cm->cm_state == MPR_CM_STATE_FREE) { + mpr_dprint(sc, MPR_INFO, "%s ATA ID command almost timed " + "out\n", __func__); + return; + } + + mpr_dprint(sc, MPR_INFO, "ATA ID command timeout cm %p\n", cm); + + /* + * Send wakeup() to the sleeping thread that issued this ATA ID + * command. wakeup() will cause msleep to return a 0 (not EWOULDBLOCK), + * and this will keep reinit() from being called. This way, an Abort + * Task TM can be issued so that the timed out command can be cleared. + * The Abort Task cannot be sent from here because the driver has not + * completed setting up targets. Instead, the command is flagged so + * that special handling will be used to send the abort. + */ + cm->cm_flags |= MPR_CM_FLAGS_SATA_ID_TIMEOUT; + wakeup(cm); +} + static int mprsas_volume_add(struct mpr_softc *sc, u16 handle) { @@ -1024,15 +1157,13 @@ mprsas_SSU_to_SATA_devices(struct mpr_softc *sc) path_id_t pathid = cam_sim_path(sassc->sim); target_id_t targetid; struct mprsas_target *target; - struct mprsas_lun *lun; char path_str[64]; struct timeval cur_time, start_time; mpr_lock(sc); /* - * For each LUN of each target, issue a StartStopUnit command to stop - * the device. + * For each target, issue a StartStopUnit command to stop the device. */ sc->SSU_started = TRUE; sc->SSU_refcount = 0; @@ -1042,59 +1173,52 @@ mprsas_SSU_to_SATA_devices(struct mpr_softc *sc) continue; } - SLIST_FOREACH(lun, &target->luns, lun_link) { - ccb = xpt_alloc_ccb_nowait(); - if (ccb == NULL) { - mpr_unlock(sc); - mpr_dprint(sc, MPR_FAULT, "Unable to alloc " - "CCB to stop unit.\n"); + ccb = xpt_alloc_ccb_nowait(); + if (ccb == NULL) { + mpr_dprint(sc, MPR_FAULT, "Unable to alloc CCB to stop " + "unit.\n"); + return; + } + + /* + * The stop_at_shutdown flag will be set if this device is + * a SATA direct-access end device. + */ + if (target->stop_at_shutdown) { + if (xpt_create_path(&ccb->ccb_h.path, xpt_periph, + pathid, targetid, CAM_LUN_WILDCARD) != + CAM_REQ_CMP) { + mpr_dprint(sc, MPR_ERROR, "Unable to create " + "path to stop unit.\n"); + xpt_free_ccb(ccb); return; } + xpt_path_string(ccb->ccb_h.path, path_str, + sizeof(path_str)); + + mpr_dprint(sc, MPR_INFO, "Sending StopUnit: path %s " + "handle %d\n", path_str, target->handle); /* - * The stop_at_shutdown flag will be set if this LUN is - * a SATA direct-access end device. + * Issue a START STOP UNIT command for the target. + * Increment the SSU counter to be used to count the + * number of required replies. */ - if (lun->stop_at_shutdown) { - if (xpt_create_path(&ccb->ccb_h.path, - xpt_periph, pathid, targetid, - lun->lun_id) != CAM_REQ_CMP) { - mpr_dprint(sc, MPR_FAULT, "Unable to " - "create LUN path to stop unit.\n"); - xpt_free_ccb(ccb); - mpr_unlock(sc); - return; - } - xpt_path_string(ccb->ccb_h.path, path_str, - sizeof(path_str)); - - mpr_dprint(sc, MPR_INFO, "Sending StopUnit: " - "path %s handle %d\n", path_str, - target->handle); - - /* - * Issue a START STOP UNIT command for the LUN. - * Increment the SSU counter to be used to - * count the number of required replies. - */ - mpr_dprint(sc, MPR_INFO, "Incrementing SSU " - "count\n"); - sc->SSU_refcount++; - ccb->ccb_h.target_id = - xpt_path_target_id(ccb->ccb_h.path); - ccb->ccb_h.target_lun = lun->lun_id; - ccb->ccb_h.ppriv_ptr1 = sassc; - scsi_start_stop(&ccb->csio, - /*retries*/0, - mprsas_stop_unit_done, - MSG_SIMPLE_Q_TAG, - /*start*/FALSE, - /*load/eject*/0, - /*immediate*/FALSE, - MPR_SENSE_LEN, - /*timeout*/10000); - xpt_action(ccb); - } + mpr_dprint(sc, MPR_INFO, "Incrementing SSU count\n"); + sc->SSU_refcount++; + ccb->ccb_h.target_id = + xpt_path_target_id(ccb->ccb_h.path); + ccb->ccb_h.ppriv_ptr1 = sassc; + scsi_start_stop(&ccb->csio, + /*retries*/0, + mprsas_stop_unit_done, + MSG_SIMPLE_Q_TAG, + /*start*/FALSE, + /*load/eject*/0, + /*immediate*/FALSE, + MPR_SENSE_LEN, + /*timeout*/10000); + xpt_action(ccb); } } @@ -1102,7 +1226,7 @@ mprsas_SSU_to_SATA_devices(struct mpr_softc *sc) /* * Wait until all of the SSU commands have completed or time has - * expired (60 seconds). pause for 100ms each time through. If any + * expired (60 seconds). Pause for 100ms each time through. If any * command times out, the target will be reset in the SCSI command * timeout routine. */ @@ -1112,7 +1236,7 @@ mprsas_SSU_to_SATA_devices(struct mpr_softc *sc) getmicrotime(&cur_time); if ((cur_time.tv_sec - start_time.tv_sec) > 60) { - mpr_dprint(sc, MPR_FAULT, "Time has expired waiting " + mpr_dprint(sc, MPR_ERROR, "Time has expired waiting " "for SSU commands to complete.\n"); break; } @@ -1162,6 +1286,8 @@ mprsas_ir_shutdown(struct mpr_softc *sc) unsigned int id, found_volume = 0; struct mpr_command *cm; Mpi2RaidActionRequest_t *action; + target_id_t targetid; + struct mprsas_target *target; mpr_dprint(sc, MPR_TRACE, "%s\n", __func__); @@ -1214,5 +1340,47 @@ mprsas_ir_shutdown(struct mpr_softc *sc) mpr_free_command(sc, cm); out: + /* + * All of the targets must have the correct value set for + * 'stop_at_shutdown' for the current 'enable_ssu' sysctl variable. + * + * The possible values for the 'enable_ssu' variable are: + * 0: disable to SSD and HDD + * 1: disable only to HDD (default) + * 2: disable only to SSD + * 3: enable to SSD and HDD + * anything else will default to 1. + */ + for (targetid = 0; targetid < sc->facts->MaxTargets; targetid++) { + target = &sc->sassc->targets[targetid]; + if (target->handle == 0x0) { + continue; + } + + if (target->supports_SSU) { + switch (sc->enable_ssu) { + case MPR_SSU_DISABLE_SSD_DISABLE_HDD: + target->stop_at_shutdown = FALSE; + break; + case MPR_SSU_DISABLE_SSD_ENABLE_HDD: + target->stop_at_shutdown = TRUE; + if (target->flags & MPR_TARGET_IS_SATA_SSD) { + target->stop_at_shutdown = FALSE; + } + break; + case MPR_SSU_ENABLE_SSD_ENABLE_HDD: + target->stop_at_shutdown = TRUE; + break; + case MPR_SSU_ENABLE_SSD_DISABLE_HDD: + default: + target->stop_at_shutdown = TRUE; + if ((target->flags & + MPR_TARGET_IS_SATA_SSD) == 0) { + target->stop_at_shutdown = FALSE; + } + break; + } + } + } mprsas_SSU_to_SATA_devices(sc); } diff --git a/sys/dev/mpr/mpr_user.c b/sys/dev/mpr/mpr_user.c index 60680f5288a3..37d946718b23 100644 --- a/sys/dev/mpr/mpr_user.c +++ b/sys/dev/mpr/mpr_user.c @@ -27,10 +27,11 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * LSI MPT-Fusion Host Adapter FreeBSD userland interface + * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD userland interface */ /*- - * Copyright (c) 2011-2014 LSI Corp. + * Copyright (c) 2011-2015 LSI Corp. + * Copyright (c) 2013-2015 Avago Technologies * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -54,7 +55,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * LSI MPT-Fusion Host Adapter FreeBSD + * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD * * $FreeBSD$ */ @@ -90,7 +91,7 @@ __FBSDID("$FreeBSD$"); #include #include -#include +#include #include #include @@ -284,8 +285,7 @@ mpr_user_read_cfg_header(struct mpr_softc *sc, static int mpr_user_read_cfg_page(struct mpr_softc *sc, - struct mpr_cfg_page_req *page_req, - void *buf) + struct mpr_cfg_page_req *page_req, void *buf) { MPI2_CONFIG_PAGE_HEADER *reqhdr, *hdr; struct mpr_config_params params; @@ -328,6 +328,10 @@ mpr_user_read_extcfg_header(struct mpr_softc *sc, hdr->PageNumber = ext_page_req->header.PageNumber; hdr->ExtPageType = ext_page_req->header.ExtPageType; params.page_address = le32toh(ext_page_req->page_address); + params.buffer = NULL; + params.length = 0; + params.callback = NULL; + if ((error = mpr_read_config_page(sc, ¶ms)) != 0) { /* * Leave the request. Without resetting the chip, it's @@ -365,8 +369,8 @@ mpr_user_read_extcfg_page(struct mpr_softc *sc, params.action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT; params.page_address = le32toh(ext_page_req->page_address); hdr->PageVersion = reqhdr->PageVersion; - hdr->PageNumber = reqhdr->PageNumber; hdr->PageType = MPI2_CONFIG_PAGETYPE_EXTENDED; + hdr->PageNumber = reqhdr->PageNumber; hdr->ExtPageType = reqhdr->ExtPageType; hdr->ExtPageLength = reqhdr->ExtPageLength; params.buffer = buf; @@ -541,6 +545,8 @@ mpi_pre_fw_upload(struct mpr_command *cm, struct mpr_usr_command *cmd) req->ImageOffset = 0; req->ImageSize = cmd->len; + cm->cm_flags |= MPR_CM_FLAGS_DATAIN; + return (mpr_push_ieee_sge(cm, &req->SGL, 0)); } @@ -834,11 +840,22 @@ mpr_user_pass_thru(struct mpr_softc *sc, mpr_pass_thru_t *data) task->TaskMID = cm->cm_desc.Default.SMID; cm->cm_data = NULL; - cm->cm_desc.HighPriority.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY; + cm->cm_desc.HighPriority.RequestFlags = + MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY; cm->cm_complete = NULL; cm->cm_complete_data = NULL; - err = mpr_wait_command(sc, cm, 30, CAN_SLEEP); + targ = mprsas_find_target_by_handle(sc->sassc, 0, + task->DevHandle); + if (targ == NULL) { + mpr_dprint(sc, MPR_INFO, + "%s %d : invalid handle for requested TM 0x%x \n", + __func__, __LINE__, task->DevHandle); + err = 1; + } else { + mprsas_prepare_for_tm(sc, cm, targ, CAM_LUN_WILDCARD); + err = mpr_wait_command(sc, cm, 30, CAN_SLEEP); + } if (err != 0) { err = EIO; @@ -1029,7 +1046,7 @@ mpr_user_pass_thru(struct mpr_softc *sc, mpr_pass_thru_t *data) if (cm->cm_flags & MPR_CM_FLAGS_DATAIN) dir = BUS_DMASYNC_POSTREAD; else if (cm->cm_flags & MPR_CM_FLAGS_DATAOUT) - dir = BUS_DMASYNC_POSTWRITE;; + dir = BUS_DMASYNC_POSTWRITE; bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir); bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap); @@ -1351,8 +1368,8 @@ mpr_release_fw_diag_buffer(struct mpr_softc *sc, } static int -mpr_diag_register(struct mpr_softc *sc, - mpr_fw_diag_register_t *diag_register, uint32_t *return_code) +mpr_diag_register(struct mpr_softc *sc, mpr_fw_diag_register_t *diag_register, + uint32_t *return_code) { mpr_fw_diagnostic_buffer_t *pBuffer; uint8_t extended_type, buffer_type, i; diff --git a/sys/dev/mpr/mprvar.h b/sys/dev/mpr/mprvar.h index 9752dcd35f6f..acac44c5baec 100644 --- a/sys/dev/mpr/mprvar.h +++ b/sys/dev/mpr/mprvar.h @@ -1,6 +1,7 @@ /*- * Copyright (c) 2009 Yahoo! Inc. - * Copyright (c) 2011-2014 LSI Corp. + * Copyright (c) 2011-2015 LSI Corp. + * Copyright (c) 2013-2015 Avago Technologies * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -24,13 +25,15 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * + * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD + * * $FreeBSD$ */ #ifndef _MPRVAR_H #define _MPRVAR_H -#define MPR_DRIVER_VERSION "05.255.05.00-fbsd" +#define MPR_DRIVER_VERSION "09.255.01.00-fbsd" #define MPR_DB_MAX_WAIT 2500 @@ -47,16 +50,19 @@ #define MPR_FUNCTRACE(sc) \ mpr_dprint((sc), MPR_TRACE, "%s\n", __func__) -#define CAN_SLEEP 1 -#define NO_SLEEP 0 +#define CAN_SLEEP 1 +#define NO_SLEEP 0 #define MPR_PERIODIC_DELAY 1 /* 1 second heartbeat/watchdog check */ +#define MPR_ATA_ID_TIMEOUT 5 /* 5 second timeout for SATA ID cmd */ #define IFAULT_IOP_OVER_TEMP_THRESHOLD_EXCEEDED 0x2810 #define MPR_SCSI_RI_INVALID_FRAME (0x00000002) #define MPR_STRING_LENGTH 64 +#define DEFAULT_SPINUP_WAIT 3 /* seconds to wait for spinup */ + #include /* @@ -213,13 +219,14 @@ struct mpr_command { #define MPR_CM_FLAGS_CHAIN_FAILED (1 << 8) #define MPR_CM_FLAGS_ERROR_MASK MPR_CM_FLAGS_CHAIN_FAILED #define MPR_CM_FLAGS_USE_CCB (1 << 9) +#define MPR_CM_FLAGS_SATA_ID_TIMEOUT (1 << 10) u_int cm_state; #define MPR_CM_STATE_FREE 0 #define MPR_CM_STATE_BUSY 1 #define MPR_CM_STATE_TIMEDOUT 2 bus_dmamap_t cm_dmamap; struct scsi_sense_data *cm_sense; - TAILQ_HEAD(, mpr_chain) cm_chain_list; + TAILQ_HEAD(, mpr_chain) cm_chain_list; uint32_t cm_req_busaddr; uint32_t cm_sense_busaddr; struct callout cm_callout; @@ -256,6 +263,8 @@ struct mpr_softc { int chain_free; int max_chains; int chain_free_lowwater; + u_int enable_ssu; + int spinup_wait_time; #if __FreeBSD_version >= 900030 uint64_t chain_alloc_fail; #endif @@ -270,7 +279,7 @@ struct mpr_softc { char tmp_string[MPR_STRING_LENGTH]; TAILQ_HEAD(, mpr_command) req_list; TAILQ_HEAD(, mpr_command) high_priority_req_list; - TAILQ_HEAD(, mpr_chain) chain_list; + TAILQ_HEAD(, mpr_chain) chain_list; TAILQ_HEAD(, mpr_command) tm_list; int replypostindex; int replyfreeindex; @@ -291,7 +300,7 @@ struct mpr_softc { uint8_t event_mask[16]; TAILQ_HEAD(, mpr_event_handle) event_list; - struct mpr_event_handle *mpr_log_eh; + struct mpr_event_handle *mpr_log_eh; struct mtx mpr_mtx; struct intr_config_hook mpr_ich; @@ -565,6 +574,11 @@ mpr_unlock(struct mpr_softc *sc) #define MPR_MAPPING (1 << 9) /* Trace device mappings */ #define MPR_TRACE (1 << 10) /* Function-by-function trace */ +#define MPR_SSU_DISABLE_SSD_DISABLE_HDD 0 +#define MPR_SSU_ENABLE_SSD_DISABLE_HDD 1 +#define MPR_SSU_DISABLE_SSD_ENABLE_HDD 2 +#define MPR_SSU_ENABLE_SSD_ENABLE_HDD 3 + #define mpr_printf(sc, args...) \ device_printf((sc)->mpr_dev, ##args) @@ -600,9 +614,6 @@ do { \ #define MPR_EVENTFIELD(sc, facts, attr, fmt) \ mpr_dprint_field((sc), MPR_EVENT, #attr ": " #fmt "\n", (facts)->attr) -#define CAN_SLEEP 1 -#define NO_SLEEP 0 - static __inline void mpr_from_u64(uint64_t data, U64 *mpr) { @@ -613,7 +624,6 @@ mpr_from_u64(uint64_t data, U64 *mpr) static __inline uint64_t mpr_to_u64(U64 *data) { - return (((uint64_t)le32toh(data->High) << 32) | le32toh(data->Low)); } @@ -727,6 +737,12 @@ void mprsas_prepare_volume_remove(struct mprsas_softc *sassc, int mprsas_startup(struct mpr_softc *sc); struct mprsas_target * mprsas_find_target_by_handle(struct mprsas_softc *, int, uint16_t); +void mprsas_realloc_targets(struct mpr_softc *sc, int maxtargets); +struct mpr_command * mprsas_alloc_tm(struct mpr_softc *sc); +void mprsas_free_tm(struct mpr_softc *sc, struct mpr_command *tm); +void mprsas_release_simq_reinit(struct mprsas_softc *sassc); +int mprsas_send_reset(struct mpr_softc *sc, struct mpr_command *tm, + uint8_t type); SYSCTL_DECL(_hw_mpr); diff --git a/sys/dev/mwl/if_mwl.c b/sys/dev/mwl/if_mwl.c index 89a39c073f66..09975005eec2 100644 --- a/sys/dev/mwl/if_mwl.c +++ b/sys/dev/mwl/if_mwl.c @@ -113,9 +113,9 @@ static int mwl_key_delete(struct ieee80211vap *, static int mwl_key_set(struct ieee80211vap *, const struct ieee80211_key *, const uint8_t mac[IEEE80211_ADDR_LEN]); static int mwl_mode_init(struct mwl_softc *); -static void mwl_update_mcast(struct ifnet *); -static void mwl_update_promisc(struct ifnet *); -static void mwl_updateslot(struct ifnet *); +static void mwl_update_mcast(struct ieee80211com *); +static void mwl_update_promisc(struct ieee80211com *); +static void mwl_updateslot(struct ieee80211com *); static int mwl_beacon_setup(struct ieee80211vap *); static void mwl_beacon_update(struct ieee80211vap *, int); #ifdef MWL_HOST_PS_SUPPORT @@ -363,7 +363,7 @@ mwl_attach(uint16_t devid, struct mwl_softc *sc) if (error != 0) /* NB: mwl_setupdma prints msg */ goto bad1; - callout_init(&sc->sc_timer, CALLOUT_MPSAFE); + callout_init(&sc->sc_timer, 1); callout_init_mtx(&sc->sc_watchdog, &sc->sc_mtx, 0); sc->sc_tq = taskqueue_create("mwl_taskq", M_NOWAIT, @@ -413,6 +413,8 @@ mwl_attach(uint16_t devid, struct mwl_softc *sc) IFQ_SET_READY(&ifp->if_snd); ic->ic_ifp = ifp; + ic->ic_softc = sc; + ic->ic_name = device_get_nameunit(sc->sc_dev); /* XXX not right but it's not used anywhere important */ ic->ic_phytype = IEEE80211_T_OFDM; ic->ic_opmode = IEEE80211_M_STA; @@ -1843,9 +1845,9 @@ mwl_mode_init(struct mwl_softc *sc) * Callback from the 802.11 layer after a multicast state change. */ static void -mwl_update_mcast(struct ifnet *ifp) +mwl_update_mcast(struct ieee80211com *ic) { - struct mwl_softc *sc = ifp->if_softc; + struct mwl_softc *sc = ic->ic_softc; mwl_setmcastfilter(sc); } @@ -1858,11 +1860,12 @@ mwl_update_mcast(struct ifnet *ifp) * mode when operating in hostap mode to do ACS). */ static void -mwl_update_promisc(struct ifnet *ifp) +mwl_update_promisc(struct ieee80211com *ic) { - struct mwl_softc *sc = ifp->if_softc; + struct mwl_softc *sc = ic->ic_softc; - mwl_hal_setpromisc(sc->sc_mh, (ifp->if_flags & IFF_PROMISC) != 0); + mwl_hal_setpromisc(sc->sc_mh, + (ic->ic_ifp->if_flags & IFF_PROMISC) != 0); } /* @@ -1872,15 +1875,14 @@ mwl_update_promisc(struct ifnet *ifp) * like slot time and preamble. */ static void -mwl_updateslot(struct ifnet *ifp) +mwl_updateslot(struct ieee80211com *ic) { - struct mwl_softc *sc = ifp->if_softc; - struct ieee80211com *ic = ifp->if_l2com; + struct mwl_softc *sc = ic->ic_softc; struct mwl_hal *mh = sc->sc_mh; int prot; /* NB: can be called early; suppress needless cmds */ - if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) + if ((ic->ic_ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) return; /* @@ -1938,7 +1940,7 @@ mwl_beacon_update(struct ieee80211vap *vap, int item) KASSERT(hvap != NULL, ("no beacon")); switch (item) { case IEEE80211_BEACON_ERP: - mwl_updateslot(ic->ic_ifp); + mwl_updateslot(ic); break; case IEEE80211_BEACON_HTINFO: mwl_hal_setnprotmode(hvap, diff --git a/sys/dev/nand/nandsim_chip.c b/sys/dev/nand/nandsim_chip.c index f04ad805b167..3241e1ae6790 100644 --- a/sys/dev/nand/nandsim_chip.c +++ b/sys/dev/nand/nandsim_chip.c @@ -94,7 +94,7 @@ nandsim_chip_init(struct nandsim_softc* sc, uint8_t chip_num, return (NULL); mtx_init(&chip->ns_lock, "nandsim lock", NULL, MTX_DEF); - callout_init(&chip->ns_callout, CALLOUT_MPSAFE); + callout_init(&chip->ns_callout, 1); STAILQ_INIT(&chip->nandsim_events); chip->chip_num = chip_num; diff --git a/sys/dev/netmap/netmap_mem2.c b/sys/dev/netmap/netmap_mem2.c index fa891ec3a819..c823376dbab6 100644 --- a/sys/dev/netmap/netmap_mem2.c +++ b/sys/dev/netmap/netmap_mem2.c @@ -130,9 +130,9 @@ struct netmap_mem_d { /* the three allocators */ struct netmap_obj_pool pools[NETMAP_POOLS_NR]; - netmap_mem_config_t config; - netmap_mem_finalize_t finalize; - netmap_mem_deref_t deref; + netmap_mem_config_t config; /* called with NMA_LOCK held */ + netmap_mem_finalize_t finalize; /* called with NMA_LOCK held */ + netmap_mem_deref_t deref; /* called with NMA_LOCK held */ nm_memid_t nm_id; /* allocator identifier */ int nm_grp; /* iommu groupd id */ @@ -751,6 +751,12 @@ netmap_reset_obj_allocator(struct netmap_obj_pool *p) u_int i; size_t sz = p->_clustsize; + /* + * Free each cluster allocated in + * netmap_finalize_obj_allocator(). The cluster start + * addresses are stored at multiples of p->_clusterentries + * in the lut. + */ for (i = 0; i < p->objtotal; i += p->_clustentries) { if (p->lut[i].vaddr) contigfree(p->lut[i].vaddr, sz, M_NETMAP); @@ -929,6 +935,7 @@ netmap_finalize_obj_allocator(struct netmap_obj_pool *p) if (i % p->_clustentries == 0 && p->lut[i].vaddr) contigfree(p->lut[i].vaddr, n, M_NETMAP); + p->lut[i].vaddr = NULL; } out: p->objtotal = i; @@ -936,6 +943,17 @@ netmap_finalize_obj_allocator(struct netmap_obj_pool *p) p->numclusters = (i + p->_clustentries - 1) / p->_clustentries; break; } + /* + * Set bitmap and lut state for all buffers in the current + * cluster. + * + * [i, lim) is the set of buffer indexes that cover the + * current cluster. + * + * 'clust' is really the address of the current buffer in + * the current cluster as we index through it with a stride + * of p->_objsize. + */ for (; i < lim; i++, clust += p->_objsize) { p->bitmap[ (i>>5) ] |= ( 1 << (i & 31) ); p->lut[i].vaddr = clust; @@ -1092,10 +1110,8 @@ static int netmap_mem_private_finalize(struct netmap_mem_d *nmd) { int err; - NMA_LOCK(nmd); nmd->refcount++; err = netmap_mem_finalize_all(nmd); - NMA_UNLOCK(nmd); return err; } @@ -1103,10 +1119,8 @@ netmap_mem_private_finalize(struct netmap_mem_d *nmd) static void netmap_mem_private_deref(struct netmap_mem_d *nmd) { - NMA_LOCK(nmd); if (--nmd->refcount <= 0) netmap_mem_reset_all(nmd); - NMA_UNLOCK(nmd); } @@ -1242,10 +1256,7 @@ static int netmap_mem_global_finalize(struct netmap_mem_d *nmd) { int err; - - NMA_LOCK(nmd); - - + /* update configuration if changed */ if (netmap_mem_global_config(nmd)) goto out; @@ -1268,8 +1279,6 @@ netmap_mem_global_finalize(struct netmap_mem_d *nmd) nmd->refcount--; err = nmd->lasterr; - NMA_UNLOCK(nmd); - return err; } @@ -1518,7 +1527,6 @@ netmap_mem_if_delete(struct netmap_adapter *na, struct netmap_if *nifp) static void netmap_mem_global_deref(struct netmap_mem_d *nmd) { - NMA_LOCK(nmd); nmd->refcount--; if (!nmd->refcount) @@ -1526,7 +1534,6 @@ netmap_mem_global_deref(struct netmap_mem_d *nmd) if (netmap_verbose) D("refcount = %d", nmd->refcount); - NMA_UNLOCK(nmd); } int @@ -1535,7 +1542,9 @@ netmap_mem_finalize(struct netmap_mem_d *nmd, struct netmap_adapter *na) if (nm_mem_assign_group(nmd, na->pdev) < 0) { return ENOMEM; } else { + NMA_LOCK(nmd); nmd->finalize(nmd); + NMA_UNLOCK(nmd); } if (!nmd->lasterr && na->pdev) @@ -1549,6 +1558,48 @@ netmap_mem_deref(struct netmap_mem_d *nmd, struct netmap_adapter *na) { NMA_LOCK(nmd); netmap_mem_unmap(&nmd->pools[NETMAP_BUF_POOL], na); + if (nmd->refcount == 1) { + u_int i; + + /* + * Reset the allocator when it falls out of use so that any + * pool resources leaked by unclean application exits are + * reclaimed. + */ + for (i = 0; i < NETMAP_POOLS_NR; i++) { + struct netmap_obj_pool *p; + u_int j; + + p = &nmd->pools[i]; + p->objfree = p->objtotal; + /* + * Reproduce the net effect of the M_ZERO malloc() + * and marking of free entries in the bitmap that + * occur in finalize_obj_allocator() + */ + memset(p->bitmap, + '\0', + sizeof(uint32_t) * ((p->objtotal + 31) / 32)); + + /* + * Set all the bits in the bitmap that have + * corresponding buffers to 1 to indicate they are + * free. + */ + for (j = 0; j < p->objtotal; j++) { + if (p->lut[j].vaddr != NULL) { + p->bitmap[ (j>>5) ] |= ( 1 << (j & 31) ); + } + } + } + + /* + * Per netmap_mem_finalize_all(), + * buffers 0 and 1 are reserved + */ + nmd->pools[NETMAP_BUF_POOL].objfree -= 2; + nmd->pools[NETMAP_BUF_POOL].bitmap[0] = ~3; + } + nmd->deref(nmd); NMA_UNLOCK(nmd); - return nmd->deref(nmd); } diff --git a/sys/dev/ntb/if_ntb/if_ntb.c b/sys/dev/ntb/if_ntb/if_ntb.c index e86ed53b3bb3..84716d979081 100644 --- a/sys/dev/ntb/if_ntb/if_ntb.c +++ b/sys/dev/ntb/if_ntb/if_ntb.c @@ -555,8 +555,8 @@ ntb_transport_init_queue(struct ntb_netdev *nt, unsigned int qp_num) qp->tx_index = 0; callout_init(&qp->link_work, 0); - callout_init(&qp->queue_full, CALLOUT_MPSAFE); - callout_init(&qp->rx_full, CALLOUT_MPSAFE); + callout_init(&qp->queue_full, 1); + callout_init(&qp->rx_full, 1); mtx_init(&qp->ntb_rx_pend_q_lock, "ntb rx pend q", NULL, MTX_SPIN); mtx_init(&qp->ntb_rx_free_q_lock, "ntb rx free q", NULL, MTX_SPIN); diff --git a/sys/dev/ntb/ntb_hw/ntb_hw.c b/sys/dev/ntb/ntb_hw/ntb_hw.c index 019f2a77c8d9..731dfafb6524 100644 --- a/sys/dev/ntb/ntb_hw/ntb_hw.c +++ b/sys/dev/ntb/ntb_hw/ntb_hw.c @@ -266,8 +266,8 @@ ntb_attach(device_t device) ntb->features = p->features; /* Heartbeat timer for NTB_SOC since there is no link interrupt */ - callout_init(&ntb->heartbeat_timer, CALLOUT_MPSAFE); - callout_init(&ntb->lr_timer, CALLOUT_MPSAFE); + callout_init(&ntb->heartbeat_timer, 1); + callout_init(&ntb->lr_timer, 1); DETACH_ON_ERROR(ntb_map_pci_bars(ntb)); DETACH_ON_ERROR(ntb_initialize_hw(ntb)); diff --git a/sys/dev/nxge/if_nxge.c b/sys/dev/nxge/if_nxge.c index 9fa2cfe22b5d..90871aec9e88 100644 --- a/sys/dev/nxge/if_nxge.c +++ b/sys/dev/nxge/if_nxge.c @@ -1744,7 +1744,7 @@ xge_device_init(xge_lldev_t *lldev, xge_hal_channel_reopen_e option) return; /* Initializing timer */ - callout_init(&lldev->timer, CALLOUT_MPSAFE); + callout_init(&lldev->timer, 1); xge_trace(XGE_TRACE, "Set MTU size"); status = xge_hal_device_mtu_set(hldev, ifnetp->if_mtu); diff --git a/sys/dev/oce/oce_if.c b/sys/dev/oce/oce_if.c index 062181b2367b..826cd3c558cb 100644 --- a/sys/dev/oce/oce_if.c +++ b/sys/dev/oce/oce_if.c @@ -341,7 +341,7 @@ oce_attach(device_t dev) oce_add_sysctls(sc); - callout_init(&sc->timer, CALLOUT_MPSAFE); + callout_init(&sc->timer, 1); rc = callout_reset(&sc->timer, 2 * hz, oce_local_timer, sc); if (rc) goto stats_free; diff --git a/sys/dev/ofw/ofw_bus_subr.c b/sys/dev/ofw/ofw_bus_subr.c index 6756398dc317..a9261cee1346 100644 --- a/sys/dev/ofw/ofw_bus_subr.c +++ b/sys/dev/ofw/ofw_bus_subr.c @@ -176,12 +176,37 @@ ofw_bus_status_okay(device_t dev) return (0); } +static int +ofw_bus_node_is_compatible(const char *compat, int len, const char *onecompat) +{ + int onelen, l, ret; + + onelen = strlen(onecompat); + + ret = 0; + while (len > 0) { + if (strlen(compat) == onelen && + strncasecmp(compat, onecompat, onelen) == 0) { + /* Found it. */ + ret = 1; + break; + } + + /* Slide to the next sub-string. */ + l = strlen(compat) + 1; + compat += l; + len -= l; + } + + return (ret); +} + int ofw_bus_is_compatible(device_t dev, const char *onecompat) { phandle_t node; const char *compat; - int len, onelen, l; + int len; if ((compat = ofw_bus_get_compat(dev)) == NULL) return (0); @@ -193,20 +218,7 @@ ofw_bus_is_compatible(device_t dev, const char *onecompat) if ((len = OF_getproplen(node, "compatible")) <= 0) return (0); - onelen = strlen(onecompat); - - while (len > 0) { - if (strlen(compat) == onelen && - strncasecmp(compat, onecompat, onelen) == 0) - /* Found it. */ - return (1); - - /* Slide to the next sub-string. */ - l = strlen(compat) + 1; - compat += l; - len -= l; - } - return (0); + return (ofw_bus_node_is_compatible(compat, len, onecompat)); } int @@ -418,7 +430,8 @@ ofw_bus_reg_to_rl(device_t dev, phandle_t node, pcell_t acells, pcell_t scells, } int -ofw_bus_intr_to_rl(device_t dev, phandle_t node, struct resource_list *rl) +ofw_bus_intr_to_rl(device_t dev, phandle_t node, + struct resource_list *rl, int *rlen) { phandle_t iparent; uint32_t icells, *intr; @@ -483,7 +496,58 @@ ofw_bus_intr_to_rl(device_t dev, phandle_t node, struct resource_list *rl) irqnum = ofw_bus_map_intr(dev, iparent, icells, &intr[i]); resource_list_add(rl, SYS_RES_IRQ, rid++, irqnum, irqnum, 1); } + if (rlen != NULL) + *rlen = rid; free(intr, M_OFWPROP); return (err); } +phandle_t +ofw_bus_find_child(phandle_t start, const char *child_name) +{ + char *name; + int ret; + phandle_t child; + + for (child = OF_child(start); child != 0; child = OF_peer(child)) { + ret = OF_getencprop_alloc(child, "name", sizeof(*name), (void **)&name); + if (ret == -1) + continue; + if (strcmp(name, child_name) == 0) { + free(name, M_OFWPROP); + return (child); + } + + free(name, M_OFWPROP); + } + + return (0); +} + +phandle_t +ofw_bus_find_compatible(phandle_t node, const char *onecompat) +{ + phandle_t child, ret; + void *compat; + int len; + + /* + * Traverse all children of 'start' node, and find first with + * matching 'compatible' property. + */ + for (child = OF_child(node); child != 0; child = OF_peer(child)) { + len = OF_getprop_alloc(child, "compatible", 1, &compat); + if (len >= 0) { + ret = ofw_bus_node_is_compatible(compat, len, + onecompat); + free(compat, M_OFWPROP); + if (ret != 0) + return (child); + } + + ret = ofw_bus_find_compatible(child, onecompat); + if (ret != 0) + return (ret); + } + return (0); +} diff --git a/sys/dev/ofw/ofw_bus_subr.h b/sys/dev/ofw/ofw_bus_subr.h index 53a609b5fa3c..bbeda7f5533c 100644 --- a/sys/dev/ofw/ofw_bus_subr.h +++ b/sys/dev/ofw/ofw_bus_subr.h @@ -75,7 +75,7 @@ int ofw_bus_search_intrmap(void *, int, void *, int, void *, int, void *, /* Routines for parsing device-tree data into resource lists. */ int ofw_bus_reg_to_rl(device_t, phandle_t, pcell_t, pcell_t, struct resource_list *); -int ofw_bus_intr_to_rl(device_t, phandle_t, struct resource_list *); +int ofw_bus_intr_to_rl(device_t, phandle_t, struct resource_list *, int *); /* Helper to get device status property */ const char *ofw_bus_get_status(device_t dev); @@ -101,4 +101,10 @@ const struct ofw_compat_data * /* Helper routine for checking existence of a prop */ int ofw_bus_has_prop(device_t, const char *); +/* Helper to search for a child with a given compat prop */ +phandle_t ofw_bus_find_compatible(phandle_t, const char *); + +/* Helper to search for a child with a given name */ +phandle_t ofw_bus_find_child(phandle_t, const char *); + #endif /* !_DEV_OFW_OFW_BUS_SUBR_H_ */ diff --git a/sys/dev/ofw/ofw_iicbus.c b/sys/dev/ofw/ofw_iicbus.c index f6d1be58612f..e6816c10cd0e 100644 --- a/sys/dev/ofw/ofw_iicbus.c +++ b/sys/dev/ofw/ofw_iicbus.c @@ -72,7 +72,7 @@ static device_method_t ofw_iicbus_methods[] = { }; struct ofw_iicbus_devinfo { - struct iicbus_ivar opd_dinfo; + struct iicbus_ivar opd_dinfo; /* Must be the first. */ struct ofw_bus_devinfo opd_obdinfo; }; @@ -153,7 +153,11 @@ ofw_iicbus_attach(device_t dev) free(dinfo, M_DEVBUF); continue; } + childdev = device_add_child(dev, NULL, -1); + resource_list_init(&dinfo->opd_dinfo.rl); + ofw_bus_intr_to_rl(childdev, child, + &dinfo->opd_dinfo.rl, NULL); device_set_ivars(childdev, dinfo); } diff --git a/sys/dev/patm/if_patm_attach.c b/sys/dev/patm/if_patm_attach.c index f4b8c4e9f51d..ed48bda269cd 100644 --- a/sys/dev/patm/if_patm_attach.c +++ b/sys/dev/patm/if_patm_attach.c @@ -208,7 +208,7 @@ patm_attach(device_t dev) mtx_init(&sc->tst_lock, "tst lock", NULL, MTX_DEF); cv_init(&sc->vcc_cv, "vcc_close"); - callout_init(&sc->tst_callout, CALLOUT_MPSAFE); + callout_init(&sc->tst_callout, 1); sysctl_ctx_init(&sc->sysctl_ctx); diff --git a/sys/dev/pci/pci_pci.c b/sys/dev/pci/pci_pci.c index 789a9180313c..585ee863bc46 100644 --- a/sys/dev/pci/pci_pci.c +++ b/sys/dev/pci/pci_pci.c @@ -442,16 +442,7 @@ pcib_probe_windows(struct pcib_softc *sc) dev = sc->dev; if (pci_clear_pcib) { - pci_write_config(dev, PCIR_IOBASEL_1, 0xff, 1); - pci_write_config(dev, PCIR_IOBASEH_1, 0xffff, 2); - pci_write_config(dev, PCIR_IOLIMITL_1, 0, 1); - pci_write_config(dev, PCIR_IOLIMITH_1, 0, 2); - pci_write_config(dev, PCIR_MEMBASE_1, 0xffff, 2); - pci_write_config(dev, PCIR_MEMLIMIT_1, 0, 2); - pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2); - pci_write_config(dev, PCIR_PMBASEH_1, 0xffffffff, 4); - pci_write_config(dev, PCIR_PMLIMITL_1, 0, 2); - pci_write_config(dev, PCIR_PMLIMITH_1, 0, 4); + pcib_bridge_init(dev); } /* Determine if the I/O port window is implemented. */ @@ -1115,6 +1106,21 @@ pcib_resume(device_t dev) return (bus_generic_resume(dev)); } +void +pcib_bridge_init(device_t dev) +{ + pci_write_config(dev, PCIR_IOBASEL_1, 0xff, 1); + pci_write_config(dev, PCIR_IOBASEH_1, 0xffff, 2); + pci_write_config(dev, PCIR_IOLIMITL_1, 0, 1); + pci_write_config(dev, PCIR_IOLIMITH_1, 0, 2); + pci_write_config(dev, PCIR_MEMBASE_1, 0xffff, 2); + pci_write_config(dev, PCIR_MEMLIMIT_1, 0, 2); + pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2); + pci_write_config(dev, PCIR_PMBASEH_1, 0xffffffff, 4); + pci_write_config(dev, PCIR_PMLIMITL_1, 0, 2); + pci_write_config(dev, PCIR_PMLIMITH_1, 0, 4); +} + int pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) { diff --git a/sys/dev/pci/pcib_private.h b/sys/dev/pci/pcib_private.h index 20cb014c3b84..bba4ce290926 100644 --- a/sys/dev/pci/pcib_private.h +++ b/sys/dev/pci/pcib_private.h @@ -145,6 +145,7 @@ void pcib_setup_secbus(device_t dev, struct pcib_secbus *bus, #endif int pcib_attach(device_t dev); void pcib_attach_common(device_t dev); +void pcib_bridge_init(device_t dev); #ifdef NEW_PCIB const char *pcib_child_name(device_t child); #endif diff --git a/sys/dev/psci/psci.c b/sys/dev/psci/psci.c index 67f700a89b5a..4554fa6cd0fd 100644 --- a/sys/dev/psci/psci.c +++ b/sys/dev/psci/psci.c @@ -102,6 +102,24 @@ EARLY_DRIVER_MODULE(psci, simplebus, psci_driver, psci_devclass, 0, 0, EARLY_DRIVER_MODULE(psci, ofwbus, psci_driver, psci_devclass, 0, 0, BUS_PASS_CPU + BUS_PASS_ORDER_FIRST); +static psci_callfn_t +psci_get_callfn(phandle_t node) +{ + char method[16]; + + if ((OF_getprop(node, "method", method, sizeof(method))) > 0) { + if (strcmp(method, "hvc") == 0) + return (psci_hvc_despatch); + else if (strcmp(method, "smc") == 0) + return (psci_smc_despatch); + else + printf("psci: PSCI conduit \"%s\" invalid\n", method); + } else + printf("psci: PSCI conduit not supplied in the device tree\n"); + + return (NULL); +} + static int psci_probe(device_t dev) { @@ -126,7 +144,6 @@ psci_attach(device_t dev) const struct ofw_compat_data *ocd; psci_initfn_t psci_init; phandle_t node; - char method[16]; if (psci_softc != NULL) return (ENXIO); @@ -136,22 +153,9 @@ psci_attach(device_t dev) KASSERT(psci_init != NULL, ("PSCI init function cannot be NULL")); node = ofw_bus_get_node(dev); - if ((OF_getprop(node, "method", method, sizeof(method))) > 0) { - if (strcmp(method, "hvc") == 0) - sc->psci_call = psci_hvc_despatch; - else if (strcmp(method, "smc") == 0) - sc->psci_call = psci_smc_despatch; - else { - device_printf(dev, - "psci_attach: PSCI conduit \"%s\" invalid\n", - method); - return (ENXIO); - } - } else { - device_printf(dev, - "psci_attach: PSCI conduit not supplied in the DT\n"); + sc->psci_call = psci_get_callfn(node); + if (sc->psci_call == NULL) return (ENXIO); - } if (psci_init(dev)) return (ENXIO); @@ -177,10 +181,27 @@ psci_get_version(struct psci_softc *sc) int psci_cpu_on(unsigned long cpu, unsigned long entry, unsigned long context_id) { + psci_callfn_t callfn; + phandle_t node; + uint32_t fnid; + + if (psci_softc == NULL) { + node = ofw_bus_find_compatible(OF_peer(0), "arm,psci-0.2"); + if (node == 0) + /* TODO: Handle psci 0.1 */ + return (PSCI_RETVAL_INTERNAL_FAILURE); + + fnid = PSCI_FNID_CPU_ON; + callfn = psci_get_callfn(node); + if (callfn == NULL) + return (PSCI_RETVAL_INTERNAL_FAILURE); + } else { + callfn = psci_softc->psci_call; + fnid = psci_softc->psci_fnids[PSCI_FN_CPU_ON]; + } /* PSCI v0.1 and v0.2 both support cpu_on. */ - return(psci_softc->psci_call(psci_softc->psci_fnids[PSCI_FN_CPU_ON], cpu, - entry, context_id)); + return (callfn(fnid, cpu, entry, context_id)); } static void diff --git a/sys/dev/qlxgb/qla_os.c b/sys/dev/qlxgb/qla_os.c index 54619cb214f2..da1e34f0c5b9 100644 --- a/sys/dev/qlxgb/qla_os.c +++ b/sys/dev/qlxgb/qla_os.c @@ -378,7 +378,7 @@ qla_pci_attach(device_t dev) ha->flags.qla_watchdog_active = 1; ha->flags.qla_watchdog_pause = 1; - callout_init(&ha->tx_callout, TRUE); + callout_init(&ha->tx_callout, 1); /* create ioctl device interface */ if (qla_make_cdev(ha)) { diff --git a/sys/dev/qlxgbe/ql_os.c b/sys/dev/qlxgbe/ql_os.c index 04fbf7195529..8b7023c0483a 100644 --- a/sys/dev/qlxgbe/ql_os.c +++ b/sys/dev/qlxgbe/ql_os.c @@ -419,7 +419,7 @@ qla_pci_attach(device_t dev) taskqueue_start_threads(&ha->tx_tq, 1, PI_NET, "%s txq", device_get_nameunit(ha->pci_dev)); - callout_init(&ha->tx_callout, TRUE); + callout_init(&ha->tx_callout, 1); ha->flags.qla_callout_init = 1; /* create ioctl device interface */ diff --git a/sys/dev/qlxge/qls_os.c b/sys/dev/qlxge/qls_os.c index 1617d24095e1..878a0e635b81 100644 --- a/sys/dev/qlxge/qls_os.c +++ b/sys/dev/qlxge/qls_os.c @@ -453,7 +453,7 @@ qls_pci_attach(device_t dev) taskqueue_start_threads(&ha->tx_tq, 1, PI_NET, "%s txq", device_get_nameunit(ha->pci_dev)); - callout_init(&ha->tx_callout, TRUE); + callout_init(&ha->tx_callout, 1); ha->flags.qla_callout_init = 1; /* create ioctl device interface */ diff --git a/sys/dev/ral/rt2560.c b/sys/dev/ral/rt2560.c index 02c93103245b..29ce8cbf8014 100644 --- a/sys/dev/ral/rt2560.c +++ b/sys/dev/ral/rt2560.c @@ -144,14 +144,14 @@ static void rt2560_disable_rf_tune(struct rt2560_softc *); static void rt2560_enable_tsf_sync(struct rt2560_softc *); static void rt2560_enable_tsf(struct rt2560_softc *); static void rt2560_update_plcp(struct rt2560_softc *); -static void rt2560_update_slot(struct ifnet *); +static void rt2560_update_slot(struct ieee80211com *); static void rt2560_set_basicrates(struct rt2560_softc *, const struct ieee80211_rateset *); static void rt2560_update_led(struct rt2560_softc *, int, int); static void rt2560_set_bssid(struct rt2560_softc *, const uint8_t *); static void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *); static void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *); -static void rt2560_update_promisc(struct ifnet *); +static void rt2560_update_promisc(struct ieee80211com *); static const char *rt2560_get_rf(int); static void rt2560_read_config(struct rt2560_softc *); static int rt2560_bbp_init(struct rt2560_softc *); @@ -273,6 +273,8 @@ rt2560_attach(device_t dev, int id) IFQ_SET_READY(&ifp->if_snd); ic->ic_ifp = ifp; + ic->ic_softc = sc; + ic->ic_name = device_get_nameunit(dev); ic->ic_opmode = IEEE80211_M_STA; ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ @@ -1996,7 +1998,7 @@ rt2560_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) rt2560_init_locked(sc); startall = 1; } else - rt2560_update_promisc(ifp); + rt2560_update_promisc(ic); } else { if (ifp->if_drv_flags & IFF_DRV_RUNNING) rt2560_stop_locked(sc); @@ -2305,10 +2307,9 @@ rt2560_update_plcp(struct rt2560_softc *sc) * IEEE Std 802.11-1999 pp. 85 to know how these values are computed. */ static void -rt2560_update_slot(struct ifnet *ifp) +rt2560_update_slot(struct ieee80211com *ic) { - struct rt2560_softc *sc = ifp->if_softc; - struct ieee80211com *ic = ifp->if_l2com; + struct rt2560_softc *sc = ic->ic_softc; uint8_t slottime; uint16_t tx_sifs, tx_pifs, tx_difs, eifs; uint32_t tmp; @@ -2435,21 +2436,21 @@ rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr) } static void -rt2560_update_promisc(struct ifnet *ifp) +rt2560_update_promisc(struct ieee80211com *ic) { - struct rt2560_softc *sc = ifp->if_softc; + struct rt2560_softc *sc = ic->ic_softc; uint32_t tmp; tmp = RAL_READ(sc, RT2560_RXCSR0); tmp &= ~RT2560_DROP_NOT_TO_ME; - if (!(ifp->if_flags & IFF_PROMISC)) + if (!(ic->ic_ifp->if_flags & IFF_PROMISC)) tmp |= RT2560_DROP_NOT_TO_ME; RAL_WRITE(sc, RT2560_RXCSR0, tmp); - DPRINTF(sc, "%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? - "entering" : "leaving"); + DPRINTF(sc, "%s promiscuous mode\n", + (ic->ic_ifp->if_flags & IFF_PROMISC) ? "entering" : "leaving"); } static const char * @@ -2658,7 +2659,7 @@ rt2560_init_locked(struct rt2560_softc *sc) /* set basic rate set (will be updated later) */ RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); - rt2560_update_slot(ifp); + rt2560_update_slot(ic); rt2560_update_plcp(sc); rt2560_update_led(sc, 0, 0); diff --git a/sys/dev/ral/rt2661.c b/sys/dev/ral/rt2661.c index 448ba5746bd2..15a2364a2c74 100644 --- a/sys/dev/ral/rt2661.c +++ b/sys/dev/ral/rt2661.c @@ -147,9 +147,9 @@ static void rt2661_set_bssid(struct rt2661_softc *, const uint8_t *); static void rt2661_set_macaddr(struct rt2661_softc *, const uint8_t *); -static void rt2661_update_promisc(struct ifnet *); +static void rt2661_update_promisc(struct ieee80211com *); static int rt2661_wme_update(struct ieee80211com *) __unused; -static void rt2661_update_slot(struct ifnet *); +static void rt2661_update_slot(struct ieee80211com *); static const char *rt2661_get_rf(int); static void rt2661_read_eeprom(struct rt2661_softc *, uint8_t macaddr[IEEE80211_ADDR_LEN]); @@ -274,6 +274,8 @@ rt2661_attach(device_t dev, int id) IFQ_SET_READY(&ifp->if_snd); ic->ic_ifp = ifp; + ic->ic_softc = sc; + ic->ic_name = device_get_nameunit(dev); ic->ic_opmode = IEEE80211_M_STA; ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ @@ -1734,7 +1736,7 @@ rt2661_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) rt2661_init_locked(sc); startall = 1; } else - rt2661_update_promisc(ifp); + rt2661_update_promisc(ic); } else { if (ifp->if_drv_flags & IFF_DRV_RUNNING) rt2661_stop_locked(sc); @@ -2078,21 +2080,21 @@ rt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr) } static void -rt2661_update_promisc(struct ifnet *ifp) +rt2661_update_promisc(struct ieee80211com *ic) { - struct rt2661_softc *sc = ifp->if_softc; + struct rt2661_softc *sc = ic->ic_softc; uint32_t tmp; tmp = RAL_READ(sc, RT2661_TXRX_CSR0); tmp &= ~RT2661_DROP_NOT_TO_ME; - if (!(ifp->if_flags & IFF_PROMISC)) + if (!(ic->ic_ifp->if_flags & IFF_PROMISC)) tmp |= RT2661_DROP_NOT_TO_ME; RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); - DPRINTF(sc, "%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? - "entering" : "leaving"); + DPRINTF(sc, "%s promiscuous mode\n", + (ic->ic_ifp->if_flags & IFF_PROMISC) ? "entering" : "leaving"); } /* @@ -2142,10 +2144,9 @@ rt2661_wme_update(struct ieee80211com *ic) } static void -rt2661_update_slot(struct ifnet *ifp) +rt2661_update_slot(struct ieee80211com *ic) { - struct rt2661_softc *sc = ifp->if_softc; - struct ieee80211com *ic = ifp->if_l2com; + struct rt2661_softc *sc = ic->ic_softc; uint8_t slottime; uint32_t tmp; diff --git a/sys/dev/ral/rt2860.c b/sys/dev/ral/rt2860.c index b29a0eb60aaf..782fa1f9780b 100644 --- a/sys/dev/ral/rt2860.c +++ b/sys/dev/ral/rt2860.c @@ -154,8 +154,8 @@ static void rt2860_set_leds(struct rt2860_softc *, uint16_t); static void rt2860_set_gp_timer(struct rt2860_softc *, int); static void rt2860_set_bssid(struct rt2860_softc *, const uint8_t *); static void rt2860_set_macaddr(struct rt2860_softc *, const uint8_t *); -static void rt2860_update_promisc(struct ifnet *); -static void rt2860_updateslot(struct ifnet *); +static void rt2860_update_promisc(struct ieee80211com *); +static void rt2860_updateslot(struct ieee80211com *); static void rt2860_updateprot(struct ifnet *); static int rt2860_updateedca(struct ieee80211com *); #ifdef HW_CRYPTO @@ -315,6 +315,8 @@ rt2860_attach(device_t dev, int id) IFQ_SET_READY(&ifp->if_snd); ic->ic_ifp = ifp; + ic->ic_softc = sc; + ic->ic_name = device_get_nameunit(dev); ic->ic_opmode = IEEE80211_M_STA; ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ @@ -2051,7 +2053,7 @@ rt2860_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) rt2860_init_locked(sc); startall = 1; } else - rt2860_update_promisc(ifp); + rt2860_update_promisc(ic); } else { if (ifp->if_drv_flags & IFF_DRV_RUNNING) rt2860_stop_locked(sc); @@ -3099,10 +3101,9 @@ rt2860_set_macaddr(struct rt2860_softc *sc, const uint8_t *addr) } static void -rt2860_updateslot(struct ifnet *ifp) +rt2860_updateslot(struct ieee80211com *ic) { - struct rt2860_softc *sc = ifp->if_softc; - struct ieee80211com *ic = ifp->if_l2com; + struct rt2860_softc *sc = ic->ic_softc; uint32_t tmp; tmp = RAL_READ(sc, RT2860_BKOFF_SLOT_CFG); @@ -3137,14 +3138,14 @@ rt2860_updateprot(struct ifnet *ifp) } static void -rt2860_update_promisc(struct ifnet *ifp) +rt2860_update_promisc(struct ieee80211com *ic) { - struct rt2860_softc *sc = ifp->if_softc; + struct rt2860_softc *sc = ic->ic_softc; uint32_t tmp; tmp = RAL_READ(sc, RT2860_RX_FILTR_CFG); tmp &= ~RT2860_DROP_NOT_MYBSS; - if (!(ifp->if_flags & IFF_PROMISC)) + if (!(ic->ic_ifp->if_flags & IFF_PROMISC)) tmp |= RT2860_DROP_NOT_MYBSS; RAL_WRITE(sc, RT2860_RX_FILTR_CFG, tmp); } diff --git a/sys/dev/rndtest/rndtest.c b/sys/dev/rndtest/rndtest.c index e4fd3b0b2cbb..871d0b71d971 100644 --- a/sys/dev/rndtest/rndtest.c +++ b/sys/dev/rndtest/rndtest.c @@ -98,7 +98,7 @@ rndtest_attach(device_t dev) #if __FreeBSD_version < 500000 callout_init(&rsp->rs_to); #else - callout_init(&rsp->rs_to, CALLOUT_MPSAFE); + callout_init(&rsp->rs_to, 1); #endif } else device_printf(dev, "rndtest_init: no memory for state block\n"); diff --git a/sys/dev/safe/safe.c b/sys/dev/safe/safe.c index 9b91ed01c143..2df1f51cd1fb 100644 --- a/sys/dev/safe/safe.c +++ b/sys/dev/safe/safe.c @@ -425,7 +425,7 @@ safe_attach(device_t dev) #endif safe_rng_init(sc); - callout_init(&sc->sc_rngto, CALLOUT_MPSAFE); + callout_init(&sc->sc_rngto, 1); callout_reset(&sc->sc_rngto, hz*safe_rnginterval, safe_rng, sc); } #endif /* SAFE_NO_RNG */ diff --git a/sys/dev/sdhci/sdhci.c b/sys/dev/sdhci/sdhci.c index b9af721c0a35..b1fae2916ccf 100644 --- a/sys/dev/sdhci/sdhci.c +++ b/sys/dev/sdhci/sdhci.c @@ -615,10 +615,16 @@ sdhci_init_slot(device_t dev, struct sdhci_slot *slot, int num) (slot->opt & SDHCI_HAVE_DMA) ? "DMA" : "PIO"); sdhci_dumpregs(slot); } - + + slot->timeout = 10; + SYSCTL_ADD_INT(device_get_sysctl_ctx(slot->bus), + SYSCTL_CHILDREN(device_get_sysctl_tree(slot->bus)), OID_AUTO, + "timeout", CTLFLAG_RW, &slot->timeout, 0, + "Maximum timeout for SDHCI transfers (in secs)"); TASK_INIT(&slot->card_task, 0, sdhci_card_task, slot); callout_init(&slot->card_callout, 1); callout_init_mtx(&slot->timeout_callout, &slot->mtx, 0); + return (0); } @@ -872,7 +878,8 @@ sdhci_start_command(struct sdhci_slot *slot, struct mmc_command *cmd) /* Start command. */ WR2(slot, SDHCI_COMMAND_FLAGS, (cmd->opcode << 8) | (flags & 0xff)); /* Start timeout callout. */ - callout_reset(&slot->timeout_callout, 2*hz, sdhci_timeout, slot); + callout_reset(&slot->timeout_callout, slot->timeout * hz, + sdhci_timeout, slot); } static void diff --git a/sys/dev/sdhci/sdhci.h b/sys/dev/sdhci/sdhci.h index b7d196039d0f..3c27d0c3cd22 100644 --- a/sys/dev/sdhci/sdhci.h +++ b/sys/dev/sdhci/sdhci.h @@ -271,6 +271,7 @@ struct sdhci_slot { #define SDHCI_HAVE_DMA 1 #define SDHCI_PLATFORM_TRANSFER 2 u_char version; + int timeout; /* Transfer timeout */ uint32_t max_clk; /* Max possible freq */ uint32_t timeout_clk; /* Timeout freq */ bus_dma_tag_t dmatag; diff --git a/sys/dev/sfxge/common/ef10_tlv_layout.h b/sys/dev/sfxge/common/ef10_tlv_layout.h new file mode 100644 index 000000000000..e413a5d8c70b --- /dev/null +++ b/sys/dev/sfxge/common/ef10_tlv_layout.h @@ -0,0 +1,691 @@ +/*- + * Copyright (c) 2012-2015 Solarflare Communications Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. + * + * $FreeBSD$ + */ + +/* These structures define the layouts for the TLV items stored in static and + * dynamic configuration partitions in NVRAM for EF10 (Huntington etc.). + * + * They contain the same sort of information that was kept in the + * siena_mc_static_config_hdr_t and siena_mc_dynamic_config_hdr_t structures + * (defined in and ) for + * Siena. + * + * These are used directly by the MC and should also be usable directly on host + * systems which are little-endian and do not do strange things with structure + * padding. (Big-endian host systems will require some byte-swapping.) + * + * ----- + * + * Please refer to SF-108797-SW for a general overview of the TLV partition + * format. + * + * ----- + * + * The current tag IDs have a general structure: with the exception of the + * special values defined in the document, they are of the form 0xLTTTNNNN, + * where: + * + * - L is a location, indicating where this tag is expected to be found: + * 0 for static configuration, or 1 for dynamic configuration. Other + * values are reserved. + * + * - TTT is a type, which is just a unique value. The same type value + * might appear in both locations, indicating a relationship between + * the items (e.g. static and dynamic VPD below). + * + * - NNNN is an index of some form. Some item types are per-port, some + * are per-PF, some are per-partition-type. + * + * ----- + * + * As with the previous Siena structures, each structure here is laid out + * carefully: values are aligned to their natural boundary, with explicit + * padding fields added where necessary. (No, technically this does not + * absolutely guarantee portability. But, in practice, compilers are generally + * sensible enough not to introduce completely pointless padding, and it works + * well enough.) + */ + + +#ifndef CI_MGMT_TLV_LAYOUT_H +#define CI_MGMT_TLV_LAYOUT_H + + +/* ---------------------------------------------------------------------------- + * General structure (defined by SF-108797-SW) + * ---------------------------------------------------------------------------- + */ + + +/* The "end" tag. + * + * (Note that this is *not* followed by length or value fields: anything after + * the tag itself is irrelevant.) + */ + +#define TLV_TAG_END (0xEEEEEEEE) + + +/* Other special reserved tag values. + */ + +#define TLV_TAG_SKIP (0x00000000) +#define TLV_TAG_INVALID (0xFFFFFFFF) + + +/* TLV partition header. + * + * In a TLV partition, this must be the first item in the sequence, at offset + * 0. + */ + +#define TLV_TAG_PARTITION_HEADER (0xEF10DA7A) + +struct tlv_partition_header { + uint32_t tag; + uint32_t length; + uint16_t type_id; + uint16_t reserved; + uint32_t generation; + uint32_t total_length; +}; + + +/* TLV partition trailer. + * + * In a TLV partition, this must be the last item in the sequence, immediately + * preceding the TLV_TAG_END word. + */ + +#define TLV_TAG_PARTITION_TRAILER (0xEF101A57) + +struct tlv_partition_trailer { + uint32_t tag; + uint32_t length; + uint32_t generation; + uint32_t checksum; +}; + + +/* Appendable TLV partition header. + * + * In an appendable TLV partition, this must be the first item in the sequence, + * at offset 0. (Note that, unlike the configuration partitions, there is no + * trailer before the TLV_TAG_END word.) + */ + +#define TLV_TAG_APPENDABLE_PARTITION_HEADER (0xEF10ADA7) + +struct tlv_appendable_partition_header { + uint32_t tag; + uint32_t length; + uint16_t type_id; + uint16_t reserved; +}; + + +/* ---------------------------------------------------------------------------- + * Configuration items + * ---------------------------------------------------------------------------- + */ + + +/* NIC global capabilities. + */ + +#define TLV_TAG_GLOBAL_CAPABILITIES (0x00010000) + +struct tlv_global_capabilities { + uint32_t tag; + uint32_t length; + uint32_t flags; +}; + + +/* Siena-style per-port MAC address allocation. + * + * There are addresses, starting at and incrementing + * by adding to the low-order byte(s). + * + * (See also TLV_TAG_GLOBAL_MAC for an alternative, specifying a global pool + * of contiguous MAC addresses for the firmware to allocate as it sees fit.) + */ + +#define TLV_TAG_PORT_MAC(port) (0x00020000 + (port)) + +struct tlv_port_mac { + uint32_t tag; + uint32_t length; + uint8_t base_address[6]; + uint16_t reserved; + uint16_t count; + uint16_t stride; +}; + + +/* Static VPD. + * + * This is the portion of VPD which is set at manufacturing time and not + * expected to change. It is formatted as a standard PCI VPD block. + */ + +#define TLV_TAG_PF_STATIC_VPD(pf) (0x00030000 + (pf)) + +struct tlv_pf_static_vpd { + uint32_t tag; + uint32_t length; + uint8_t bytes[]; +}; + + +/* Dynamic VPD. + * + * This is the portion of VPD which may be changed (e.g. by firmware updates). + * It is formatted as a standard PCI VPD block. + */ + +#define TLV_TAG_PF_DYNAMIC_VPD(pf) (0x10030000 + (pf)) + +struct tlv_pf_dynamic_vpd { + uint32_t tag; + uint32_t length; + uint8_t bytes[]; +}; + + +/* "DBI" PCI config space changes. + * + * This is a set of edits made to the default PCI config space values before + * the device is allowed to enumerate. + */ + +#define TLV_TAG_PF_DBI(pf) (0x00040000 + (pf)) + +struct tlv_pf_dbi { + uint32_t tag; + uint32_t length; + struct { + uint16_t addr; + uint16_t byte_enables; + uint32_t value; + } items[]; +}; + + +/* Partition subtype codes. + * + * A subtype may optionally be stored for each type of partition present in + * the NVRAM. For example, this may be used to allow a generic firmware update + * utility to select a specific variant of firmware for a specific variant of + * board. + * + * The description[] field is an optional string which is returned in the + * MC_CMD_NVRAM_METADATA response if present. + */ + +#define TLV_TAG_PARTITION_SUBTYPE(type) (0x00050000 + (type)) + +struct tlv_partition_subtype { + uint32_t tag; + uint32_t length; + uint32_t subtype; + uint8_t description[]; +}; + + +/* Partition version codes. + * + * A version may optionally be stored for each type of partition present in + * the NVRAM. This provides a standard way of tracking the currently stored + * version of each of the various component images. + */ + +#define TLV_TAG_PARTITION_VERSION(type) (0x10060000 + (type)) + +struct tlv_partition_version { + uint32_t tag; + uint32_t length; + uint16_t version_w; + uint16_t version_x; + uint16_t version_y; + uint16_t version_z; +}; + +/* Global PCIe configuration */ + +#define TLV_TAG_GLOBAL_PCIE_CONFIG (0x10070000) + +struct tlv_pcie_config { + uint32_t tag; + uint32_t length; + int16_t max_pf_number; /**< Largest PF RID (lower PFs may be hidden) */ + uint16_t pf_aper; /**< BIU aperture for PF BAR2 */ + uint16_t vf_aper; /**< BIU aperture for VF BAR0 */ + uint16_t int_aper; /**< BIU aperture for PF BAR4 and VF BAR2 */ +#define TLV_MAX_PF_DEFAULT (-1) /* Use FW default for largest PF RID */ +#define TLV_APER_DEFAULT (0xFFFF) /* Use FW default for a given aperture */ +}; + +/* Per-PF configuration. Note that not all these fields are necessarily useful + * as the apertures are constrained by the BIU settings (the one case we do + * use is to make BAR2 bigger than the BIU thinks to reserve space), but we can + * tidy things up later */ + +#define TLV_TAG_PF_PCIE_CONFIG(pf) (0x10080000 + (pf)) + +struct tlv_per_pf_pcie_config { + uint32_t tag; + uint32_t length; + uint8_t vfs_total; + uint8_t port_allocation; + uint16_t vectors_per_pf; + uint16_t vectors_per_vf; + uint8_t pf_bar0_aperture; + uint8_t pf_bar2_aperture; + uint8_t vf_bar0_aperture; + uint8_t vf_base; + uint16_t supp_pagesz; + uint16_t msix_vec_base; +}; + + +/* Development ONLY. This is a single TLV tag for all the gubbins + * that can be set through the MC command-line other than the PCIe + * settings. This is a temporary measure. */ +#define TLV_TAG_TMP_GUBBINS (0x10090000) + +struct tlv_tmp_gubbins { + uint32_t tag; + uint32_t length; + /* Consumed by dpcpu.c */ + uint64_t tx0_tags; /* Bitmap */ + uint64_t tx1_tags; /* Bitmap */ + uint64_t dl_tags; /* Bitmap */ + uint32_t flags; +#define TLV_DPCPU_TX_STRIPE (1) /* TX striping is on */ +#define TLV_DPCPU_BIU_TAGS (2) /* Use BIU tag manager */ +#define TLV_DPCPU_TX0_TAGS (4) /* tx0_tags is valid */ +#define TLV_DPCPU_TX1_TAGS (8) /* tx1_tags is valid */ +#define TLV_DPCPU_DL_TAGS (16) /* dl_tags is valid */ + /* Consumed by features.c */ + uint32_t dut_features; /* All 1s -> leave alone */ + int8_t with_rmon; /* 0 -> off, 1 -> on, -1 -> leave alone */ + /* Consumed by clocks_hunt.c */ + int8_t clk_mode; /* 0 -> off, 1 -> on, -1 -> leave alone */ + /* Consumed by sram.c */ + int8_t rx_dc_size; /* -1 -> leave alone */ + int8_t tx_dc_size; + int16_t num_q_allocs; +}; + +/* Global port configuration + * + * This is now deprecated in favour of a platform-provided default + * and dynamic config override via tlv_global_port_options. + */ +#define TLV_TAG_GLOBAL_PORT_CONFIG (0x000a0000) + +struct tlv_global_port_config { + uint32_t tag; + uint32_t length; + uint32_t ports_per_core; + uint32_t max_port_speed; +}; + + +/* Firmware options. + * + * This is intended for user-configurable selection of optional firmware + * features and variants. + * + * Initially, this consists only of the satellite CPU firmware variant + * selection, but this tag could be extended in the future (using the + * tag length to determine whether additional fields are present). + */ + +#define TLV_TAG_FIRMWARE_OPTIONS (0x100b0000) + +struct tlv_firmware_options { + uint32_t tag; + uint32_t length; + uint32_t firmware_variant; +#define TLV_FIRMWARE_VARIANT_DRIVER_SELECTED (0xffffffff) + +/* These are the values for overriding the driver's choice; the definitions + * are taken from MCDI so that they don't get out of step. Include + * or the equivalent from your driver's tree if + * you need to use these constants. + */ +#define TLV_FIRMWARE_VARIANT_FULL_FEATURED MC_CMD_FW_FULL_FEATURED +#define TLV_FIRMWARE_VARIANT_LOW_LATENCY MC_CMD_FW_LOW_LATENCY +#define TLV_FIRMWARE_VARIANT_PACKED_STREAM MC_CMD_FW_PACKED_STREAM +#define TLV_FIRMWARE_VARIANT_HIGH_TX_RATE MC_CMD_FW_HIGH_TX_RATE +#define TLV_FIRMWARE_VARIANT_PACKED_STREAM_HASH_MODE_1 \ + MC_CMD_FW_PACKED_STREAM_HASH_MODE_1 +}; + +/* Voltage settings + * + * Intended for boards with A0 silicon where the core voltage may + * need tweaking. Most likely set once when the pass voltage is + * determined. */ + +#define TLV_TAG_0V9_SETTINGS (0x000c0000) + +struct tlv_0v9_settings { + uint32_t tag; + uint32_t length; + uint16_t flags; /* Boards with high 0v9 settings may need active cooling */ +#define TLV_TAG_0V9_REQUIRES_FAN (1) + uint16_t target_voltage; /* In millivolts */ + /* Since the limits are meant to be centred to the target (and must at least + * contain it) they need setting as well. */ + uint16_t warn_low; /* In millivolts */ + uint16_t warn_high; /* In millivolts */ + uint16_t panic_low; /* In millivolts */ + uint16_t panic_high; /* In millivolts */ +}; + + +/* Clock configuration */ + +#define TLV_TAG_CLOCK_CONFIG (0x000d0000) + +struct tlv_clock_config { + uint32_t tag; + uint32_t length; + uint16_t clk_sys; /* MHz */ + uint16_t clk_dpcpu; /* MHz */ + uint16_t clk_icore; /* MHz */ + uint16_t clk_pcs; /* MHz */ +}; + +#define TLV_TAG_CLOCK_CONFIG_MEDFORD (0x00100000) + +struct tlv_clock_config_medford { + uint32_t tag; + uint32_t length; + uint16_t clk_sys; /* MHz */ + uint16_t clk_mc; /* MHz */ + uint16_t clk_rmon; /* MHz */ + uint16_t clk_vswitch; /* MHz */ + uint16_t clk_dpcpu; /* MHz */ + uint16_t clk_pcs; /* MHz */ +}; + + +/* EF10-style global pool of MAC addresses. + * + * There are addresses, starting at , which are + * contiguous. Firmware is responsible for allocating addresses from this + * pool to ports / PFs as appropriate. + */ + +#define TLV_TAG_GLOBAL_MAC (0x000e0000) + +struct tlv_global_mac { + uint32_t tag; + uint32_t length; + uint8_t base_address[6]; + uint16_t reserved1; + uint16_t count; + uint16_t reserved2; +}; + +#define TLV_TAG_ATB_0V9_TARGET (0x000f0000) + +/* The target value for the 0v9 power rail measured on-chip at the + * analogue test bus */ +struct tlv_0v9_atb_target { + uint32_t tag; + uint32_t length; + uint16_t millivolts; + uint16_t reserved; +}; + +/* Global PCIe configuration, second revision. This represents the visible PFs + * by a bitmap rather than having the number of the highest visible one. As such + * it can (for a 16-PF chip) represent a superset of what TLV_TAG_GLOBAL_PCIE_CONFIG + * can and it should be used in place of that tag in future (but compatibility with + * the old tag will be left in the firmware indefinitely). */ + +#define TLV_TAG_GLOBAL_PCIE_CONFIG_R2 (0x10100000) + +struct tlv_pcie_config_r2 { + uint32_t tag; + uint32_t length; + uint16_t visible_pfs; /**< Bitmap of visible PFs */ + uint16_t pf_aper; /**< BIU aperture for PF BAR2 */ + uint16_t vf_aper; /**< BIU aperture for VF BAR0 */ + uint16_t int_aper; /**< BIU aperture for PF BAR4 and VF BAR2 */ +}; + +/* Dynamic port mode. + * + * Allows selecting alternate port configuration for platforms that support it + * (e.g. 1x40G vs 2x10G on Milano, 1x40G vs 4x10G on Medford). This affects the + * number of externally visible ports (and, hence, PF to port mapping), so must + * be done at boot time. + * + * This tag supercedes tlv_global_port_config. + */ + +#define TLV_TAG_GLOBAL_PORT_MODE (0x10110000) + +struct tlv_global_port_mode { + uint32_t tag; + uint32_t length; + uint32_t port_mode; +#define TLV_PORT_MODE_DEFAULT (0xffffffff) /* Default for given platform */ +#define TLV_PORT_MODE_10G (0) /* 10G, single SFP/10G-KR */ +#define TLV_PORT_MODE_40G (1) /* 40G, single QSFP/40G-KR */ +#define TLV_PORT_MODE_10G_10G (2) /* 2x10G, dual SFP/10G-KR or single QSFP */ +#define TLV_PORT_MODE_40G_40G (3) /* 40G + 40G, dual QSFP/40G-KR (Greenport, Medford) */ +#define TLV_PORT_MODE_10G_10G_10G_10G (4) /* 2x10G + 2x10G, quad SFP/10G-KR or dual QSFP (Greenport, Medford) */ +#define TLV_PORT_MODE_10G_10G_10G_10G_Q (5) /* 4x10G, single QSFP, cage 0 (Medford) */ +#define TLV_PORT_MODE_40G_10G_10G (6) /* 1x40G + 2x10G, dual QSFP (Greenport, Medford) */ +#define TLV_PORT_MODE_10G_10G_40G (7) /* 2x10G + 1x40G, dual QSFP (Greenport, Medford) */ +#define TLV_PORT_MODE_10G_10G_10G_10G_Q2 (8) /* 4x10G, single QSFP, cage 1 (Medford) */ +#define TLV_PORT_MODE_MAX TLV_PORT_MODE_10G_10G_10G_10G_Q2 +}; + +/* Type of the v-switch created implicitly by the firmware */ + +#define TLV_TAG_VSWITCH_TYPE(port) (0x10120000 + (port)) + +struct tlv_vswitch_type { + uint32_t tag; + uint32_t length; + uint32_t vswitch_type; +#define TLV_VSWITCH_TYPE_DEFAULT (0xffffffff) /* Firmware default; equivalent to no TLV present for a given port */ +#define TLV_VSWITCH_TYPE_NONE (0) +#define TLV_VSWITCH_TYPE_VLAN (1) +#define TLV_VSWITCH_TYPE_VEB (2) +#define TLV_VSWITCH_TYPE_VEPA (3) +#define TLV_VSWITCH_TYPE_MUX (4) +#define TLV_VSWITCH_TYPE_TEST (5) +}; + +/* A VLAN tag for the v-port created implicitly by the firmware */ + +#define TLV_TAG_VPORT_VLAN_TAG(pf) (0x10130000 + (pf)) + +struct tlv_vport_vlan_tag { + uint32_t tag; + uint32_t length; + uint32_t vlan_tag; +#define TLV_VPORT_NO_VLAN_TAG (0xFFFFFFFF) /* Default in the absence of TLV for a given PF */ +}; + +/* Offset to be applied to the 0v9 setting, wherever it came from */ + +#define TLV_TAG_ATB_0V9_OFFSET (0x10140000) + +struct tlv_0v9_atb_offset { + uint32_t tag; + uint32_t length; + int16_t offset_millivolts; + uint16_t reserved; +}; + +/* A privilege mask given on reset to all non-admin PCIe functions (that is other than first-PF-per-port). + * The meaning of particular bits is defined in mcdi_ef10.yml under MC_CMD_PRIVILEGE_MASK, see also bug 44583. + * TLV_TAG_PRIVILEGE_MASK_ADD specifies bits that should be added (ORed) to firmware default while + * TLV_TAG_PRIVILEGE_MASK_REM specifies bits that should be removed (ANDed) from firmware default: + * Initial_privilege_mask = (firmware_default_mask | privilege_mask_add) & ~privilege_mask_rem */ + +#define TLV_TAG_PRIVILEGE_MASK (0x10150000) /* legacy symbol - do not use */ + +struct tlv_privilege_mask { /* legacy structure - do not use */ + uint32_t tag; + uint32_t length; + uint32_t privilege_mask; +}; + +#define TLV_TAG_PRIVILEGE_MASK_ADD (0x10150000) + +struct tlv_privilege_mask_add { + uint32_t tag; + uint32_t length; + uint32_t privilege_mask_add; +}; + +#define TLV_TAG_PRIVILEGE_MASK_REM (0x10160000) + +struct tlv_privilege_mask_rem { + uint32_t tag; + uint32_t length; + uint32_t privilege_mask_rem; +}; + +/* Additional privileges given to all PFs. + * This tag takes precedence over TLV_TAG_PRIVILEGE_MASK_REM. */ + +#define TLV_TAG_PRIVILEGE_MASK_ADD_ALL_PFS (0x10190000) + +struct tlv_privilege_mask_add_all_pfs { + uint32_t tag; + uint32_t length; + uint32_t privilege_mask_add; +}; + +/* Additional privileges given to a selected PF. + * This tag takes precedence over TLV_TAG_PRIVILEGE_MASK_REM. */ + +#define TLV_TAG_PRIVILEGE_MASK_ADD_SINGLE_PF(pf) (0x101A0000 + (pf)) + +struct tlv_privilege_mask_add_single_pf { + uint32_t tag; + uint32_t length; + uint32_t privilege_mask_add; +}; + +/* Turning on/off the PFIOV mode. + * This tag only takes effect if TLV_TAG_VSWITCH_TYPE is missing or set to DEFAULT. */ + +#define TLV_TAG_PFIOV(port) (0x10170000 + (port)) + +struct tlv_pfiov { + uint32_t tag; + uint32_t length; + uint32_t pfiov; +#define TLV_PFIOV_OFF (0) /* Default */ +#define TLV_PFIOV_ON (1) +}; + +/* Multicast filter chaining mode selection. + * + * When enabled, multicast packets are delivered to all recipients of all + * matching multicast filters, with the exception that IP multicast filters + * will steal traffic from MAC multicast filters on a per-function basis. + * (New behaviour.) + * + * When disabled, multicast packets will always be delivered only to the + * recipients of the highest priority matching multicast filter. + * (Legacy behaviour.) + * + * The DEFAULT mode (which is the same as the tag not being present at all) + * is equivalent to ENABLED in production builds, and DISABLED in eftest + * builds. + * + * This option is intended to provide run-time control over this feature + * while it is being stabilised and may be withdrawn at some point in the + * future; the new behaviour is intended to become the standard behaviour. + */ + +#define TLV_TAG_MCAST_FILTER_CHAINING (0x10180000) + +struct tlv_mcast_filter_chaining { + uint32_t tag; + uint32_t length; + uint32_t mode; +#define TLV_MCAST_FILTER_CHAINING_DEFAULT (0xffffffff) +#define TLV_MCAST_FILTER_CHAINING_DISABLED (0) +#define TLV_MCAST_FILTER_CHAINING_ENABLED (1) +}; + + +/* Pacer rate limit per PF */ +#define TLV_TAG_RATE_LIMIT(pf) (0x101b0000 + (pf)) + +struct tlv_rate_limit { + uint32_t tag; + uint32_t length; + uint32_t rate_mbps; +}; + + +/* OCSD Enable/Disable + * + * This setting allows OCSD to be disabled. This is a requirement for HP + * servers to support PCI passthrough for virtualization. + * + * The DEFAULT mode (which is the same as the tag not being present) is + * equivalent to ENABLED. + * + * This option is not used by the MCFW, and is entirely handled by the various + * drivers that support OCSD, by reading the setting before they attempt + * to enable OCSD. + * + * bit0: OCSD Disabled/Enabled + */ + +#define TLV_TAG_OCSD (0x101C0000) + +struct tlv_ocsd { + uint32_t tag; + uint32_t length; + uint32_t mode; +#define TLV_OCSD_DISABLED 0 +#define TLV_OCSD_ENABLED 1 /* Default */ +}; + +#endif /* CI_MGMT_TLV_LAYOUT_H */ diff --git a/sys/dev/sfxge/common/efsys.h b/sys/dev/sfxge/common/efsys.h index d911c43c51fa..0a7b1ad6cd3f 100644 --- a/sys/dev/sfxge/common/efsys.h +++ b/sys/dev/sfxge/common/efsys.h @@ -1,30 +1,34 @@ /*- - * Copyright (c) 2010-2011 Solarflare Communications, Inc. + * Copyright (c) 2010-2015 Solarflare Communications Inc. * All rights reserved. * * This software was developed in part by Philip Paeps under contract for * Solarflare Communications, Inc. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. * * $FreeBSD$ */ @@ -56,6 +60,7 @@ extern "C" { #else #define EFSYS_USE_UINT64 0 #endif +#define EFSYS_HAS_SSE2_M128 0 #if _BYTE_ORDER == _BIG_ENDIAN #define EFSYS_IS_BIG_ENDIAN 1 #define EFSYS_IS_LITTLE_ENDIAN 0 @@ -90,6 +95,10 @@ extern "C" { #define P2ROUNDUP(x, align) (-(-(x) & -(align))) #endif +#ifndef P2ALIGN +#define P2ALIGN(_x, _a) ((_x) & -(_a)) +#endif + #ifndef IS2P #define ISP2(x) (((x) & ((x) - 1)) == 0) #endif @@ -176,7 +185,7 @@ prefetch_read_once(void *addr) #endif static __inline void sfxge_map_mbuf_fast(bus_dma_tag_t tag, bus_dmamap_t map, - struct mbuf *m, bus_dma_segment_t *seg) + struct mbuf *m, bus_dma_segment_t *seg) { #if defined(__i386__) || defined(__amd64__) seg->ds_addr = pmap_kextract(mtod(m, vm_offset_t)); @@ -188,10 +197,6 @@ sfxge_map_mbuf_fast(bus_dma_tag_t tag, bus_dmamap_t map, #endif } -/* Modifiers used for DOS builds */ -#define __cs -#define __far - /* Modifiers used for Windows builds */ #define __in #define __in_opt @@ -231,6 +236,7 @@ sfxge_map_mbuf_fast(bus_dma_tag_t tag, bus_dmamap_t map, #define EFSYS_OPT_FALCON 0 #define EFSYS_OPT_FALCON_NIC_CFG_OVERRIDE 0 #define EFSYS_OPT_SIENA 1 +#define EFSYS_OPT_HUNTINGTON 1 #ifdef DEBUG #define EFSYS_OPT_CHECK_REG 1 #else @@ -248,19 +254,19 @@ sfxge_map_mbuf_fast(bus_dma_tag_t tag, bus_dmamap_t map, #define EFSYS_OPT_MON_NULL 0 #define EFSYS_OPT_MON_LM87 0 #define EFSYS_OPT_MON_MAX6647 0 -#define EFSYS_OPT_MON_SIENA 0 +#define EFSYS_OPT_MON_MCDI 0 #define EFSYS_OPT_MON_STATS 0 #define EFSYS_OPT_PHY_NULL 0 #define EFSYS_OPT_PHY_QT2022C2 0 #define EFSYS_OPT_PHY_SFX7101 0 #define EFSYS_OPT_PHY_TXC43128 0 -#define EFSYS_OPT_PHY_PM8358 0 #define EFSYS_OPT_PHY_SFT9001 0 #define EFSYS_OPT_PHY_QT2025C 0 #define EFSYS_OPT_PHY_STATS 1 #define EFSYS_OPT_PHY_PROPS 0 -#define EFSYS_OPT_PHY_BIST 1 +#define EFSYS_OPT_PHY_BIST 0 +#define EFSYS_OPT_BIST 1 #define EFSYS_OPT_PHY_LED_CONTROL 1 #define EFSYS_OPT_PHY_FLAGS 0 @@ -276,7 +282,8 @@ sfxge_map_mbuf_fast(bus_dma_tag_t tag, bus_dmamap_t map, #define EFSYS_OPT_WOL 1 #define EFSYS_OPT_RX_SCALE 1 #define EFSYS_OPT_QSTATS 1 -#define EFSYS_OPT_FILTER 0 +#define EFSYS_OPT_FILTER 1 +#define EFSYS_OPT_MCAST_FILTER_LIST 1 #define EFSYS_OPT_RX_SCATTER 0 #define EFSYS_OPT_RX_HDR_SPLIT 0 @@ -618,6 +625,9 @@ typedef struct efsys_mem_s { #define EFSYS_MEM_ADDR(_esmp) \ ((_esmp)->esm_addr) +#define EFSYS_MEM_IS_NULL(_esmp) \ + ((_esmp)->esm_base == NULL) + /* BAR */ #define SFXGE_LOCK_NAME_MAX 16 @@ -880,6 +890,24 @@ typedef struct efsys_bar_s { } while (B_FALSE) #endif +/* + * Guarantees 64bit aligned 64bit writes to write combined BAR mapping + * (required by PIO hardware) + */ +#define EFSYS_BAR_WC_WRITEQ(_esbp, _offset, _eqp) \ + do { \ + _NOTE(CONSTANTCONDITION) \ + KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_qword_t)), \ + ("not power of 2 aligned")); \ + \ + (void) (_esbp); \ + \ + /* FIXME: Perform a 64-bit write */ \ + KASSERT(0, ("not implemented")); \ + \ + _NOTE(CONSTANTCONDITION) \ + } while (B_FALSE) + #if defined(SFXGE_USE_BUS_SPACE_8) #define EFSYS_BAR_WRITEO(_esbp, _offset, _eop, _lock) \ do { \ @@ -979,6 +1007,13 @@ typedef struct efsys_bar_s { } while (B_FALSE) #endif +/* Use the standard octo-word write for doorbell writes */ +#define EFSYS_BAR_DOORBELL_WRITEO(_esbp, _offset, _eop) \ + do { \ + EFSYS_BAR_WRITEO((_esbp), (_offset), (_eop), B_FALSE); \ + _NOTE(CONSTANTCONDITION) \ + } while (B_FALSE) + /* SPIN */ #define EFSYS_SPIN(_us) \ @@ -994,6 +1029,23 @@ typedef struct efsys_bar_s { #define EFSYS_MEM_READ_BARRIER() rmb() #define EFSYS_PIO_WRITE_BARRIER() +/* DMA SYNC */ +#define EFSYS_DMA_SYNC_FOR_KERNEL(_esmp, _offset, _size) \ + do { \ + bus_dmamap_sync((_esmp)->esm_tag, \ + (_esmp)->esm_map, \ + BUS_DMASYNC_POSTREAD); \ + _NOTE(CONSTANTCONDITION) \ + } while (B_FALSE) + +#define EFSYS_DMA_SYNC_FOR_DEVICE(_esmp, _offset, _size) \ + do { \ + bus_dmamap_sync((_esmp)->esm_tag, \ + (_esmp)->esm_map, \ + BUS_DMASYNC_PREWRITE); \ + _NOTE(CONSTANTCONDITION) \ + } while (B_FALSE) + /* TIMESTAMP */ typedef clock_t efsys_timestamp_t; @@ -1150,7 +1202,7 @@ extern void sfxge_err(efsys_identifier_t *, unsigned int, #define EFSYS_ASSERT(_exp) do { \ if (!(_exp)) \ - panic(#_exp); \ + panic("%s", #_exp); \ } while (0) #define EFSYS_ASSERT3(_x, _op, _y, _t) do { \ @@ -1164,6 +1216,10 @@ extern void sfxge_err(efsys_identifier_t *, unsigned int, #define EFSYS_ASSERT3S(_x, _op, _y) EFSYS_ASSERT3(_x, _op, _y, int64_t) #define EFSYS_ASSERT3P(_x, _op, _y) EFSYS_ASSERT3(_x, _op, _y, uintptr_t) +/* ROTATE */ + +#define EFSYS_HAS_ROTL_DWORD 0 + #ifdef __cplusplus } #endif diff --git a/sys/dev/sfxge/common/efx.h b/sys/dev/sfxge/common/efx.h index c5ef44877582..3435951e58fb 100644 --- a/sys/dev/sfxge/common/efx.h +++ b/sys/dev/sfxge/common/efx.h @@ -1,26 +1,31 @@ /*- - * Copyright 2006-2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2006-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. * * $FreeBSD$ */ @@ -29,6 +34,7 @@ #define _SYS_EFX_H #include "efsys.h" +#include "efx_phy_ids.h" #ifdef __cplusplus extern "C" { @@ -38,14 +44,13 @@ extern "C" { #define EFX_ARRAY_SIZE(_array) (sizeof(_array) / sizeof((_array)[0])) -#ifndef EFSYS_MEM_IS_NULL -#define EFSYS_MEM_IS_NULL(_esmp) ((_esmp)->esm_base == NULL) -#endif +#define EFX_FIELD_OFFSET(_type, _field) ((size_t) &(((_type *)0)->_field)) typedef enum efx_family_e { EFX_FAMILY_INVALID, EFX_FAMILY_FALCON, EFX_FAMILY_SIENA, + EFX_FAMILY_HUNTINGTON, EFX_FAMILY_NTYPES } efx_family_t; @@ -60,11 +65,23 @@ efx_infer_family( __in efsys_bar_t *esbp, __out efx_family_t *efp); -#define EFX_PCI_VENID_SFC 0x1924 -#define EFX_PCI_DEVID_FALCON 0x0710 -#define EFX_PCI_DEVID_BETHPAGE 0x0803 -#define EFX_PCI_DEVID_SIENA 0x0813 -#define EFX_PCI_DEVID_SIENA_F1_UNINIT 0x0810 +#define EFX_PCI_VENID_SFC 0x1924 + +#define EFX_PCI_DEVID_FALCON 0x0710 /* SFC4000 */ + +#define EFX_PCI_DEVID_BETHPAGE 0x0803 /* SFC9020 */ +#define EFX_PCI_DEVID_SIENA 0x0813 /* SFL9021 */ +#define EFX_PCI_DEVID_SIENA_F1_UNINIT 0x0810 + +#define EFX_PCI_DEVID_HUNTINGTON_PF_UNINIT 0x0901 +#define EFX_PCI_DEVID_FARMINGDALE 0x0903 /* SFC9120 PF */ +#define EFX_PCI_DEVID_HUNTINGTON 0x0913 /* SFL9122 PF */ +#define EFX_PCI_DEVID_GREENPORT 0x0923 /* SFC9140 PF */ + +#define EFX_PCI_DEVID_FARMINGDALE_VF 0x1903 /* SFC9120 VF */ +#define EFX_PCI_DEVID_HUNTINGTON_VF 0x1913 /* SFL9122 VF */ +#define EFX_PCI_DEVID_GREENPORT_VF 0x1923 /* SFC9140 VF */ + #define EFX_MEM_BAR 2 @@ -86,10 +103,27 @@ enum { EFX_ERR_NCODES }; +/* Calculate the IEEE 802.3 CRC32 of a MAC addr */ +extern __checkReturn uint32_t +efx_crc32_calculate( + __in uint32_t crc_init, + __in_ecount(length) uint8_t const *input, + __in int length); + + +/* Type prototypes */ + +typedef struct efx_rxq_s efx_rxq_t; + /* NIC */ typedef struct efx_nic_s efx_nic_t; +#define EFX_NIC_FUNC_PRIMARY 0x00000001 +#define EFX_NIC_FUNC_LINKCTRL 0x00000002 +#define EFX_NIC_FUNC_TRUSTED 0x00000004 + + extern __checkReturn int efx_nic_create( __in efx_family_t family, @@ -145,6 +179,11 @@ efx_nic_destroy( #if EFSYS_OPT_MCDI +#if EFSYS_OPT_HUNTINGTON +/* Huntington requires MCDIv2 commands */ +#define WITH_MCDI_V2 1 +#endif + typedef struct efx_mcdi_req_s efx_mcdi_req_t; typedef enum efx_mcdi_exception_e { @@ -154,6 +193,7 @@ typedef enum efx_mcdi_exception_e { typedef struct efx_mcdi_transport_s { void *emt_context; + efsys_mem_t *emt_dma_mem; void (*emt_execute)(void *, efx_mcdi_req_t *); void (*emt_ev_cpl)(void *); void (*emt_exception)(void *, efx_mcdi_exception_t); @@ -166,6 +206,10 @@ efx_mcdi_init( extern __checkReturn int efx_mcdi_reboot( + __in efx_nic_t *enp); + + void +efx_mcdi_new_epoch( __in efx_nic_t *enp); extern void @@ -251,7 +295,7 @@ efx_intr_fini( #if EFSYS_OPT_MAC_STATS -/* START MKCONFIG GENERATED EfxHeaderMacBlock bb8d39428b6fdcf5 */ +/* START MKCONFIG GENERATED EfxHeaderMacBlock e323546097fd7c65 */ typedef enum efx_mac_stat_e { EFX_MAC_RX_OCTETS, EFX_MAC_RX_PKTS, @@ -304,6 +348,36 @@ typedef enum efx_mac_stat_e { EFX_MAC_TX_LATE_COL_PKTS, EFX_MAC_TX_DEF_PKTS, EFX_MAC_TX_EX_DEF_PKTS, + EFX_MAC_PM_TRUNC_BB_OVERFLOW, + EFX_MAC_PM_DISCARD_BB_OVERFLOW, + EFX_MAC_PM_TRUNC_VFIFO_FULL, + EFX_MAC_PM_DISCARD_VFIFO_FULL, + EFX_MAC_PM_TRUNC_QBB, + EFX_MAC_PM_DISCARD_QBB, + EFX_MAC_PM_DISCARD_MAPPING, + EFX_MAC_RXDP_Q_DISABLED_PKTS, + EFX_MAC_RXDP_DI_DROPPED_PKTS, + EFX_MAC_RXDP_STREAMING_PKTS, + EFX_MAC_RXDP_HLB_FETCH, + EFX_MAC_RXDP_HLB_WAIT, + EFX_MAC_VADAPTER_RX_UNICAST_PACKETS, + EFX_MAC_VADAPTER_RX_UNICAST_BYTES, + EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS, + EFX_MAC_VADAPTER_RX_MULTICAST_BYTES, + EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS, + EFX_MAC_VADAPTER_RX_BROADCAST_BYTES, + EFX_MAC_VADAPTER_RX_BAD_PACKETS, + EFX_MAC_VADAPTER_RX_BAD_BYTES, + EFX_MAC_VADAPTER_RX_OVERFLOW, + EFX_MAC_VADAPTER_TX_UNICAST_PACKETS, + EFX_MAC_VADAPTER_TX_UNICAST_BYTES, + EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS, + EFX_MAC_VADAPTER_TX_MULTICAST_BYTES, + EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS, + EFX_MAC_VADAPTER_TX_BROADCAST_BYTES, + EFX_MAC_VADAPTER_TX_BAD_PACKETS, + EFX_MAC_VADAPTER_TX_BAD_BYTES, + EFX_MAC_VADAPTER_TX_OVERFLOW, EFX_MAC_NSTATS } efx_mac_stat_t; @@ -321,9 +395,16 @@ typedef enum efx_link_mode_e { EFX_LINK_1000HDX, EFX_LINK_1000FDX, EFX_LINK_10000FDX, + EFX_LINK_40000FDX, EFX_LINK_NMODES } efx_link_mode_t; +#define EFX_MAC_ADDR_LEN 6 + +#define EFX_MAC_ADDR_IS_MULTICAST(_address) (((uint8_t*)_address)[0] & 0x01) + +#define EFX_MAC_MULTICAST_LIST_MAX 256 + #define EFX_MAC_SDU_MAX 9202 #define EFX_MAC_PDU(_sdu) \ @@ -347,11 +428,29 @@ efx_mac_addr_set( __in efx_nic_t *enp, __in uint8_t *addr); -extern __checkReturn int +extern __checkReturn int efx_mac_filter_set( + __in efx_nic_t *enp, + __in boolean_t all_unicst, + __in boolean_t mulcst, + __in boolean_t all_mulcst, + __in boolean_t brdcst); + +extern __checkReturn int +efx_mac_multicast_list_set( + __in efx_nic_t *enp, + __in_ecount(6*count) uint8_t const *addrs, + __in int count); + +extern __checkReturn int +efx_mac_filter_default_rxq_set( __in efx_nic_t *enp, - __in boolean_t unicst, - __in boolean_t brdcst); + __in efx_rxq_t *erp, + __in boolean_t using_rss); + +extern void +efx_mac_filter_default_rxq_clear( + __in efx_nic_t *enp); extern __checkReturn int efx_mac_drain( @@ -380,16 +479,42 @@ efx_mac_fcntl_get( #define EFX_MAC_HASH_BITS (1 << 8) +extern __checkReturn int +efx_pktfilter_init( + __in efx_nic_t *enp); + +extern void +efx_pktfilter_fini( + __in efx_nic_t *enp); + +extern __checkReturn int +efx_pktfilter_set( + __in efx_nic_t *enp, + __in boolean_t unicst, + __in boolean_t brdcst); + extern __checkReturn int efx_mac_hash_set( __in efx_nic_t *enp, __in_ecount(EFX_MAC_HASH_BITS) unsigned int const *bucket); +#if EFSYS_OPT_MCAST_FILTER_LIST +extern __checkReturn int +efx_pktfilter_mcast_list_set( + __in efx_nic_t *enp, + __in uint8_t const *addrs, + __in int count); +#endif /* EFSYS_OPT_MCAST_FILTER_LIST */ + +extern __checkReturn int +efx_pktfilter_mcast_all( + __in efx_nic_t *enp); + #if EFSYS_OPT_MAC_STATS #if EFSYS_OPT_NAMES -extern __checkReturn const char __cs * +extern __checkReturn const char * efx_mac_stat_name( __in efx_nic_t *enp, __in unsigned int id); @@ -440,12 +565,13 @@ typedef enum efx_mon_type_e { EFX_MON_LM87, EFX_MON_MAX6647, EFX_MON_SFC90X0, + EFX_MON_SFC91X0, EFX_MON_NTYPES } efx_mon_type_t; #if EFSYS_OPT_NAMES -extern const char __cs * +extern const char * efx_mon_name( __in efx_nic_t *enp); @@ -457,9 +583,10 @@ efx_mon_init( #if EFSYS_OPT_MON_STATS -#define EFX_MON_STATS_SIZE 0x100 +#define EFX_MON_STATS_PAGE_SIZE 0x100 +#define EFX_MON_MASK_ELEMENT_SIZE 32 -/* START MKCONFIG GENERATED MonitorHeaderStatsBlock 58706a378332aeee */ +/* START MKCONFIG GENERATED MonitorHeaderStatsBlock c79c86b62a144846 */ typedef enum efx_mon_stat_e { EFX_MON_STAT_2_5V, EFX_MON_STAT_VCCP1, @@ -491,6 +618,45 @@ typedef enum efx_mon_stat_e { EFX_MON_STAT_VAOE_IN, EFX_MON_STAT_IAOE, EFX_MON_STAT_IAOE_IN, + EFX_MON_STAT_NIC_POWER, + EFX_MON_STAT_0_9V, + EFX_MON_STAT_I0_9V, + EFX_MON_STAT_I1_2V, + EFX_MON_STAT_0_9V_ADC, + EFX_MON_STAT_INT_TEMP2, + EFX_MON_STAT_VREG_TEMP, + EFX_MON_STAT_VREG_0_9V_TEMP, + EFX_MON_STAT_VREG_1_2V_TEMP, + EFX_MON_STAT_INT_VPTAT, + EFX_MON_STAT_INT_ADC_TEMP, + EFX_MON_STAT_EXT_VPTAT, + EFX_MON_STAT_EXT_ADC_TEMP, + EFX_MON_STAT_AMBIENT_TEMP, + EFX_MON_STAT_AIRFLOW, + EFX_MON_STAT_VDD08D_VSS08D_CSR, + EFX_MON_STAT_VDD08D_VSS08D_CSR_EXTADC, + EFX_MON_STAT_HOTPOINT_TEMP, + EFX_MON_STAT_PHY_POWER_SWITCH_PORT0, + EFX_MON_STAT_PHY_POWER_SWITCH_PORT1, + EFX_MON_STAT_MUM_VCC, + EFX_MON_STAT_0V9_A, + EFX_MON_STAT_I0V9_A, + EFX_MON_STAT_0V9_A_TEMP, + EFX_MON_STAT_0V9_B, + EFX_MON_STAT_I0V9_B, + EFX_MON_STAT_0V9_B_TEMP, + EFX_MON_STAT_CCOM_AVREG_1V2_SUPPLY, + EFX_MON_STAT_CCOM_AVREG_1V2_SUPPLY_EXT_ADC, + EFX_MON_STAT_CCOM_AVREG_1V8_SUPPLY, + EFX_MON_STAT_CCOM_AVREG_1V8_SUPPLY_EXT_ADC, + EFX_MON_STAT_CONTROLLER_MASTER_VPTAT, + EFX_MON_STAT_CONTROLLER_MASTER_INTERNAL_TEMP, + EFX_MON_STAT_CONTROLLER_MASTER_VPTAT_EXT_ADC, + EFX_MON_STAT_CONTROLLER_MASTER_INTERNAL_TEMP_EXT_ADC, + EFX_MON_STAT_CONTROLLER_SLAVE_VPTAT, + EFX_MON_STAT_CONTROLLER_SLAVE_INTERNAL_TEMP, + EFX_MON_STAT_CONTROLLER_SLAVE_VPTAT_EXT_ADC, + EFX_MON_STAT_CONTROLLER_SLAVE_INTERNAL_TEMP_EXT_ADC, EFX_MON_NSTATS } efx_mon_stat_t; @@ -501,16 +667,17 @@ typedef enum efx_mon_stat_state_e { EFX_MON_STAT_STATE_WARNING = 1, EFX_MON_STAT_STATE_FATAL = 2, EFX_MON_STAT_STATE_BROKEN = 3, + EFX_MON_STAT_STATE_NO_READING = 4, } efx_mon_stat_state_t; -typedef struct efx_mon_stat_value_t { +typedef struct efx_mon_stat_value_s { uint16_t emsv_value; uint16_t emsv_state; } efx_mon_stat_value_t; #if EFSYS_OPT_NAMES -extern const char __cs * +extern const char * efx_mon_stat_name( __in efx_nic_t *enp, __in efx_mon_stat_t id); @@ -540,16 +707,6 @@ efx_mon_fini( #define MAXMMD ((1 << 5) - 1) -/* PHY types */ -#define EFX_PHY_NULL 0x0 -#define EFX_PHY_TXC43128 0x1 -#define EFX_PHY_SFX7101 0x3 -#define EFX_PHY_QT2022C2 0x4 -#define EFX_PHY_SFT9001A 0x8 -#define EFX_PHY_QT2025C 0x9 -#define EFX_PHY_SFT9001B 0xa -#define EFX_PHY_QLX111V 0xc - extern __checkReturn int efx_phy_verify( __in efx_nic_t *enp); @@ -596,26 +753,38 @@ typedef enum efx_loopback_type_e { EFX_LOOPBACK_PHY_XS = 15, EFX_LOOPBACK_PCS = 16, EFX_LOOPBACK_PMA_PMD = 17, + EFX_LOOPBACK_XPORT = 18, + EFX_LOOPBACK_XGMII_WS = 19, + EFX_LOOPBACK_XAUI_WS = 20, + EFX_LOOPBACK_XAUI_WS_FAR = 21, + EFX_LOOPBACK_XAUI_WS_NEAR = 22, + EFX_LOOPBACK_GMII_WS = 23, + EFX_LOOPBACK_XFI_WS = 24, + EFX_LOOPBACK_XFI_WS_FAR = 25, + EFX_LOOPBACK_PHYXS_WS = 26, + EFX_LOOPBACK_PMA_INT = 27, + EFX_LOOPBACK_SD_NEAR = 28, + EFX_LOOPBACK_SD_FAR = 29, + EFX_LOOPBACK_PMA_INT_WS = 30, + EFX_LOOPBACK_SD_FEP2_WS = 31, + EFX_LOOPBACK_SD_FEP1_5_WS = 32, + EFX_LOOPBACK_SD_FEP_WS = 33, + EFX_LOOPBACK_SD_FES_WS = 34, EFX_LOOPBACK_NTYPES } efx_loopback_type_t; -#define EFX_LOOPBACK_MAC_MASK \ - ((1 << EFX_LOOPBACK_DATA) | \ - (1 << EFX_LOOPBACK_GMAC) | \ - (1 << EFX_LOOPBACK_XGMII) | \ - (1 << EFX_LOOPBACK_XGXS) | \ - (1 << EFX_LOOPBACK_XAUI) | \ - (1 << EFX_LOOPBACK_GMII) | \ - (1 << EFX_LOOPBACK_SGMII) | \ - (1 << EFX_LOOPBACK_XGBR) | \ - (1 << EFX_LOOPBACK_XFI) | \ - (1 << EFX_LOOPBACK_XAUI_FAR) | \ - (1 << EFX_LOOPBACK_GMII_FAR) | \ - (1 << EFX_LOOPBACK_SGMII_FAR) | \ - (1 << EFX_LOOPBACK_XFI_FAR)) +typedef enum efx_loopback_kind_e { + EFX_LOOPBACK_KIND_OFF = 0, + EFX_LOOPBACK_KIND_ALL, + EFX_LOOPBACK_KIND_MAC, + EFX_LOOPBACK_KIND_PHY, + EFX_LOOPBACK_NKINDS +} efx_loopback_kind_t; -#define EFX_LOOPBACK_MASK \ - ((1 << EFX_LOOPBACK_NTYPES) - 1) +extern void +efx_loopback_mask( + __in efx_loopback_kind_t loopback_kind, + __out efx_qword_t *maskp); extern __checkReturn int efx_port_loopback_set( @@ -625,7 +794,7 @@ efx_port_loopback_set( #if EFSYS_OPT_NAMES -extern __checkReturn const char __cs * +extern __checkReturn const char * efx_loopback_type_name( __in efx_nic_t *enp, __in efx_loopback_type_t type); @@ -637,7 +806,7 @@ efx_loopback_type_name( extern __checkReturn int efx_port_poll( __in efx_nic_t *enp, - __out efx_link_mode_t *link_modep); + __out_opt efx_link_mode_t *link_modep); extern void efx_port_fini( @@ -655,6 +824,7 @@ typedef enum efx_phy_cap_type_e { EFX_PHY_CAP_PAUSE, EFX_PHY_CAP_ASYM, EFX_PHY_CAP_AN, + EFX_PHY_CAP_40000FDX, EFX_PHY_CAP_NTYPES } efx_phy_cap_type_t; @@ -692,6 +862,7 @@ typedef enum efx_phy_media_type_e { EFX_PHY_MEDIA_XFP, EFX_PHY_MEDIA_SFP_PLUS, EFX_PHY_MEDIA_BASE_T, + EFX_PHY_MEDIA_QSFP_PLUS, EFX_PHY_MEDIA_NTYPES } efx_phy_media_type_t; @@ -762,7 +933,7 @@ typedef enum efx_phy_stat_e { #if EFSYS_OPT_NAMES -extern const char __cs * +extern const char * efx_phy_stat_name( __in efx_nic_t *enp, __in efx_phy_stat_t stat); @@ -783,7 +954,7 @@ efx_phy_stats_update( #if EFSYS_OPT_NAMES -extern const char __cs * +extern const char * efx_phy_prop_name( __in efx_nic_t *enp, __in unsigned int id); @@ -807,22 +978,25 @@ efx_phy_prop_set( #endif /* EFSYS_OPT_PHY_PROPS */ -#if EFSYS_OPT_PHY_BIST +#if EFSYS_OPT_BIST -typedef enum efx_phy_bist_type_e { - EFX_PHY_BIST_TYPE_UNKNOWN, - EFX_PHY_BIST_TYPE_NORMAL, - EFX_PHY_BIST_TYPE_CABLE_SHORT, - EFX_PHY_BIST_TYPE_CABLE_LONG, - EFX_PHY_BIST_TYPE_NTYPES, -} efx_phy_bist_type_t; +typedef enum efx_bist_type_e { + EFX_BIST_TYPE_UNKNOWN, + EFX_BIST_TYPE_PHY_NORMAL, + EFX_BIST_TYPE_PHY_CABLE_SHORT, + EFX_BIST_TYPE_PHY_CABLE_LONG, + EFX_BIST_TYPE_MC_MEM, /* Test the MC DMEM and IMEM */ + EFX_BIST_TYPE_SAT_MEM, /* Test the DMEM and IMEM of satellite cpus*/ + EFX_BIST_TYPE_REG, /* Test the register memories */ + EFX_BIST_TYPE_NTYPES, +} efx_bist_type_t; -typedef enum efx_phy_bist_result_e { - EFX_PHY_BIST_RESULT_UNKNOWN, - EFX_PHY_BIST_RESULT_RUNNING, - EFX_PHY_BIST_RESULT_PASSED, - EFX_PHY_BIST_RESULT_FAILED, -} efx_phy_bist_result_t; +typedef enum efx_bist_result_e { + EFX_BIST_RESULT_UNKNOWN, + EFX_BIST_RESULT_RUNNING, + EFX_BIST_RESULT_PASSED, + EFX_BIST_RESULT_FAILED, +} efx_bist_result_t; typedef enum efx_phy_cable_status_e { EFX_PHY_CABLE_STATUS_OK, @@ -833,39 +1007,53 @@ typedef enum efx_phy_cable_status_e { EFX_PHY_CABLE_STATUS_BUSY, } efx_phy_cable_status_t; -typedef enum efx_phy_bist_value_e { - EFX_PHY_BIST_CABLE_LENGTH_A, - EFX_PHY_BIST_CABLE_LENGTH_B, - EFX_PHY_BIST_CABLE_LENGTH_C, - EFX_PHY_BIST_CABLE_LENGTH_D, - EFX_PHY_BIST_CABLE_STATUS_A, - EFX_PHY_BIST_CABLE_STATUS_B, - EFX_PHY_BIST_CABLE_STATUS_C, - EFX_PHY_BIST_CABLE_STATUS_D, - EFX_PHY_BIST_FAULT_CODE, - EFX_PHY_BIST_NVALUES, -} efx_phy_bist_value_t; +typedef enum efx_bist_value_e { + EFX_BIST_PHY_CABLE_LENGTH_A, + EFX_BIST_PHY_CABLE_LENGTH_B, + EFX_BIST_PHY_CABLE_LENGTH_C, + EFX_BIST_PHY_CABLE_LENGTH_D, + EFX_BIST_PHY_CABLE_STATUS_A, + EFX_BIST_PHY_CABLE_STATUS_B, + EFX_BIST_PHY_CABLE_STATUS_C, + EFX_BIST_PHY_CABLE_STATUS_D, + EFX_BIST_FAULT_CODE, + /* Memory BIST specific values. These match to the MC_CMD_BIST_POLL + * response. */ + EFX_BIST_MEM_TEST, + EFX_BIST_MEM_ADDR, + EFX_BIST_MEM_BUS, + EFX_BIST_MEM_EXPECT, + EFX_BIST_MEM_ACTUAL, + EFX_BIST_MEM_ECC, + EFX_BIST_MEM_ECC_PARITY, + EFX_BIST_MEM_ECC_FATAL, + EFX_BIST_NVALUES, +} efx_bist_value_t; extern __checkReturn int -efx_phy_bist_start( - __in efx_nic_t *enp, - __in efx_phy_bist_type_t type); +efx_bist_enable_offline( + __in efx_nic_t *enp); extern __checkReturn int -efx_phy_bist_poll( +efx_bist_start( __in efx_nic_t *enp, - __in efx_phy_bist_type_t type, - __out efx_phy_bist_result_t *resultp, + __in efx_bist_type_t type); + +extern __checkReturn int +efx_bist_poll( + __in efx_nic_t *enp, + __in efx_bist_type_t type, + __out efx_bist_result_t *resultp, __out_opt uint32_t *value_maskp, __out_ecount_opt(count) unsigned long *valuesp, __in size_t count); extern void -efx_phy_bist_stop( +efx_bist_stop( __in efx_nic_t *enp, - __in efx_phy_bist_type_t type); + __in efx_bist_type_t type); -#endif /* EFSYS_OPT_PHY_BIST */ +#endif /* EFSYS_OPT_BIST */ #define EFX_FEATURE_IPV6 0x00000001 #define EFX_FEATURE_LFSR_HASH_INSERT 0x00000002 @@ -876,6 +1064,10 @@ efx_phy_bist_stop( #define EFX_FEATURE_LOOKAHEAD_SPLIT 0x00000040 #define EFX_FEATURE_MAC_HEADER_FILTERS 0x00000080 #define EFX_FEATURE_TURBO 0x00000100 +#define EFX_FEATURE_MCDI_DMA 0x00000200 +#define EFX_FEATURE_TX_SRC_FILTERS 0x00000400 +#define EFX_FEATURE_PIO_BUFFERS 0x00000800 +#define EFX_FEATURE_FW_ASSISTED_TSO 0x00001000 typedef struct efx_nic_cfg_s { uint32_t enc_board_type; @@ -886,20 +1078,29 @@ typedef struct efx_nic_cfg_s { char enc_phy_revision[21]; efx_mon_type_t enc_mon_type; #if EFSYS_OPT_MON_STATS - uint32_t enc_mon_stat_mask; + uint32_t enc_mon_stat_dma_buf_size; + uint32_t enc_mon_stat_mask[(EFX_MON_NSTATS + 31) / 32]; #endif unsigned int enc_features; uint8_t enc_mac_addr[6]; - uint8_t enc_port; + uint8_t enc_port; /* PHY port number */ + uint32_t enc_func_flags; + uint32_t enc_intr_vec_base; + uint32_t enc_intr_limit; uint32_t enc_evq_limit; uint32_t enc_txq_limit; uint32_t enc_rxq_limit; uint32_t enc_buftbl_limit; + uint32_t enc_piobuf_limit; + uint32_t enc_piobuf_size; uint32_t enc_evq_timer_quantum_ns; uint32_t enc_evq_timer_max_us; uint32_t enc_clk_mult; + uint32_t enc_rx_prefix_size; + uint32_t enc_rx_buf_align_start; + uint32_t enc_rx_buf_align_end; #if EFSYS_OPT_LOOPBACK - uint32_t enc_loopback_types[EFX_LINK_NMODES]; + efx_qword_t enc_loopback_types[EFX_LINK_NMODES]; #endif /* EFSYS_OPT_LOOPBACK */ #if EFSYS_OPT_PHY_FLAGS uint32_t enc_phy_flags_mask; @@ -914,23 +1115,100 @@ typedef struct efx_nic_cfg_s { unsigned int enc_phy_nprops; #endif /* EFSYS_OPT_PHY_PROPS */ #if EFSYS_OPT_SIENA - uint8_t enc_siena_channel; + uint8_t enc_mcdi_mdio_channel; #if EFSYS_OPT_PHY_STATS - uint32_t enc_siena_phy_stat_mask; + uint32_t enc_mcdi_phy_stat_mask; #endif /* EFSYS_OPT_PHY_STATS */ +#endif /* EFSYS_OPT_SIENA */ +#if (EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON) #if EFSYS_OPT_MON_STATS - uint32_t enc_siena_mon_stat_mask; + uint32_t *enc_mcdi_sensor_maskp; + uint32_t enc_mcdi_sensor_mask_size; #endif /* EFSYS_OPT_MON_STATS */ -#endif /* EFSYS_OPT_SIENA */ -#if EFSYS_OPT_PHY_BIST +#endif /* (EFSYS_OPT_SIENA | EFSYS_OPT_HUNTINGTON) */ +#if EFSYS_OPT_BIST uint32_t enc_bist_mask; -#endif /* EFSYS_OPT_PHY_BIST */ +#endif /* EFSYS_OPT_BIST */ +#if EFSYS_OPT_HUNTINGTON + uint32_t enc_pf; + uint32_t enc_vf; + uint32_t enc_privilege_mask; +#endif /* EFSYS_OPT_HUNTINGTON */ + boolean_t enc_bug26807_workaround; + boolean_t enc_bug35388_workaround; + boolean_t enc_bug41750_workaround; + boolean_t enc_rx_batching_enabled; + /* Maximum number of descriptors completed in an rx event. */ + uint32_t enc_rx_batch_max; + /* Number of rx descriptors the hardware requires for a push. */ + uint32_t enc_rx_push_align; + /* + * Maximum number of bytes into the packet the TCP header can start for + * the hardware to apply TSO packet edits. + */ + uint32_t enc_tx_tso_tcp_header_offset_limit; + boolean_t enc_fw_assisted_tso_enabled; + boolean_t enc_hw_tx_insert_vlan_enabled; + /* Datapath firmware vadapter/vport/vswitch support */ + boolean_t enc_datapath_cap_evb; + /* External port identifier */ + uint8_t enc_external_port; } efx_nic_cfg_t; +#define EFX_PCI_FUNCTION_IS_PF(_encp) ((_encp)->enc_vf == 0xffff) +#define EFX_PCI_FUNCTION_IS_VF(_encp) ((_encp)->enc_vf != 0xffff) + +#define EFX_PCI_FUNCTION(_encp) \ + (EFX_PCI_FUNCTION_IS_PF(_encp) ? (_encp)->enc_pf : (_encp)->enc_vf) + +#define EFX_PCI_VF_PARENT(_encp) ((_encp)->enc_pf) + extern const efx_nic_cfg_t * efx_nic_cfg_get( __in efx_nic_t *enp); +/* Driver resource limits (minimum required/maximum usable). */ +typedef struct efx_drv_limits_s +{ + uint32_t edl_min_evq_count; + uint32_t edl_max_evq_count; + + uint32_t edl_min_rxq_count; + uint32_t edl_max_rxq_count; + + uint32_t edl_min_txq_count; + uint32_t edl_max_txq_count; + + /* PIO blocks (sub-allocated from piobuf) */ + uint32_t edl_min_pio_alloc_size; + uint32_t edl_max_pio_alloc_count; +} efx_drv_limits_t; + +extern __checkReturn int +efx_nic_set_drv_limits( + __inout efx_nic_t *enp, + __in efx_drv_limits_t *edlp); + +typedef enum efx_nic_region_e { + EFX_REGION_VI, /* Memory BAR UC mapping */ + EFX_REGION_PIO_WRITE_VI, /* Memory BAR WC mapping */ +} efx_nic_region_t; + +extern __checkReturn int +efx_nic_get_bar_region( + __in efx_nic_t *enp, + __in efx_nic_region_t region, + __out uint32_t *offsetp, + __out size_t *sizep); + +extern __checkReturn int +efx_nic_get_vi_pool( + __in efx_nic_t *enp, + __out uint32_t *evq_countp, + __out uint32_t *rxq_countp, + __out uint32_t *txq_countp); + + #if EFSYS_OPT_VPD typedef enum efx_vpd_tag_e { @@ -1029,6 +1307,7 @@ typedef enum efx_nvram_type_e { EFX_NVRAM_FCFW, EFX_NVRAM_CPLD, EFX_NVRAM_FPGA_BACKUP, + EFX_NVRAM_DYNAMIC_CFG, EFX_NVRAM_NTYPES, } efx_nvram_type_t; @@ -1080,7 +1359,15 @@ extern __checkReturn int efx_nvram_set_version( __in efx_nic_t *enp, __in efx_nvram_type_t type, - __out uint16_t version[4]); + __in_ecount(4) uint16_t version[4]); + +/* Validate contents of TLV formatted partition */ +extern __checkReturn int +efx_nvram_tlv_validate( + __in efx_nic_t *enp, + __in uint32_t partn, + __in_bcount(partn_size) caddr_t partn_data, + __in size_t partn_size); extern __checkReturn int efx_nvram_erase( @@ -1246,12 +1533,11 @@ typedef struct efx_evq_s efx_evq_t; #if EFSYS_OPT_QSTATS -/* START MKCONFIG GENERATED EfxHeaderEventQueueBlock d5614a5d669c8ca3 */ +/* START MKCONFIG GENERATED EfxHeaderEventQueueBlock 6f3843f5fe7cc843 */ typedef enum efx_ev_qstat_e { EV_ALL, EV_RX, EV_RX_OK, - EV_RX_RECOVERY, EV_RX_FRM_TRUNC, EV_RX_TOBE_DISC, EV_RX_PAUSE_FRM_ERR, @@ -1269,16 +1555,14 @@ typedef enum efx_ev_qstat_e { EV_RX_OTHER_IPV4, EV_RX_OTHER_IPV6, EV_RX_NON_IP, - EV_RX_OVERRUN, + EV_RX_BATCH, EV_TX, EV_TX_WQ_FF_FULL, EV_TX_PKT_ERR, EV_TX_PKT_TOO_BIG, EV_TX_UNEXPECTED, EV_GLOBAL, - EV_GLOBAL_PHY, EV_GLOBAL_MNT, - EV_GLOBAL_RX_RECOVERY, EV_DRIVER, EV_DRIVER_SRM_UPD_DONE, EV_DRIVER_TX_DESCQ_FLS_DONE, @@ -1303,13 +1587,9 @@ extern void efx_ev_fini( __in efx_nic_t *enp); -#define EFX_MASK(_max, _min) (-((_max) << 1) ^ -(_min)) - #define EFX_EVQ_MAXNEVS 32768 #define EFX_EVQ_MINNEVS 512 -#define EFX_EVQ_NEVS_MASK EFX_MASK(EFX_EVQ_MAXNEVS, EFX_EVQ_MINNEVS) - #define EFX_EVQ_SIZE(_nevs) ((_nevs) * sizeof (efx_qword_t)) #define EFX_EVQ_NBUFS(_nevs) (EFX_EVQ_SIZE(_nevs) / EFX_BUF_SIZE) @@ -1345,6 +1625,7 @@ typedef __checkReturn boolean_t #define EFX_PKT_IPV4 0x0800 #define EFX_PKT_IPV6 0x1000 +#define EFX_PKT_PREFIX_LEN 0x2000 #define EFX_ADDR_MISMATCH 0x4000 #define EFX_DISCARD 0x8000 @@ -1371,6 +1652,9 @@ typedef __checkReturn boolean_t #define EFX_EXCEPTION_UNKNOWN_SENSOREVT 0x00000004 #define EFX_EXCEPTION_FWALERT_SRAM 0x00000005 #define EFX_EXCEPTION_UNKNOWN_FWALERT 0x00000006 +#define EFX_EXCEPTION_RX_ERROR 0x00000007 +#define EFX_EXCEPTION_TX_ERROR 0x00000008 +#define EFX_EXCEPTION_EV_ERROR 0x00000009 typedef __checkReturn boolean_t (*efx_exception_ev_t)( @@ -1460,7 +1744,7 @@ typedef struct efx_ev_callbacks_s { #endif /* EFSYS_OPT_MON_STATS */ #if EFSYS_OPT_MAC_STATS efx_mac_stats_ev_t eec_mac_stats; -#endif /* EFSYS_OPT_MON_STATS */ +#endif /* EFSYS_OPT_MAC_STATS */ } efx_ev_callbacks_t; extern __checkReturn boolean_t @@ -1498,7 +1782,7 @@ efx_ev_qprime( #if EFSYS_OPT_NAMES -extern const char __cs * +extern const char * efx_ev_qstat_name( __in efx_nic_t *enp, __in unsigned int id); @@ -1518,11 +1802,9 @@ efx_ev_qdestroy( /* RX */ -typedef struct efx_rxq_s efx_rxq_t; - extern __checkReturn int efx_rx_init( - __in efx_nic_t *enp); + __inout efx_nic_t *enp); extern void efx_rx_fini( @@ -1558,10 +1840,32 @@ typedef enum efx_rx_hash_type_e { EFX_RX_HASH_TCPIPV6, } efx_rx_hash_type_t; +typedef enum efx_rx_hash_support_e { + EFX_RX_HASH_UNAVAILABLE = 0, /* Hardware hash not inserted */ + EFX_RX_HASH_AVAILABLE /* Insert hash with/without RSS */ +} efx_rx_hash_support_t; + #define EFX_RSS_TBL_SIZE 128 /* Rows in RX indirection table */ #define EFX_MAXRSS 64 /* RX indirection entry range */ #define EFX_MAXRSS_LEGACY 16 /* See bug16611 and bug17213 */ +typedef enum efx_rx_scale_support_e { + EFX_RX_SCALE_UNAVAILABLE = 0, /* Not supported */ + EFX_RX_SCALE_EXCLUSIVE, /* Writable key/indirection table */ + EFX_RX_SCALE_SHARED /* Read-only key/indirection table */ +} efx_rx_scale_support_t; + + extern __checkReturn int +efx_rx_hash_support_get( + __in efx_nic_t *enp, + __out efx_rx_hash_support_t *supportp); + + +extern __checkReturn int +efx_rx_scale_support_get( + __in efx_nic_t *enp, + __out efx_rx_scale_support_t *supportp); + extern __checkReturn int efx_rx_scale_mode_set( __in efx_nic_t *enp, @@ -1576,54 +1880,28 @@ efx_rx_scale_tbl_set( __in size_t n); extern __checkReturn int -efx_rx_scale_toeplitz_ipv4_key_set( +efx_rx_scale_key_set( __in efx_nic_t *enp, __in_ecount(n) uint8_t *key, __in size_t n); -extern __checkReturn int -efx_rx_scale_toeplitz_ipv6_key_set( +extern uint32_t +efx_psuedo_hdr_hash_get( __in efx_nic_t *enp, - __in_ecount(n) uint8_t *key, - __in size_t n); - -/* - * The prefix is a byte array of one of the forms: - * - * 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 - * XX.XX.XX.XX.XX.XX.XX.XX.XX.XX.XX.XX.TT.TT.TT.TT - * XX.XX.XX.XX.XX.XX.XX.XX.XX.XX.XX.XX.XX.XX.LL.LL - * - * where: - * - * TT.TT.TT.TT is a 32-bit Toeplitz hash - * LL.LL is a 16-bit LFSR hash - * - * Hash values are in network (big-endian) byte order. - */ - -#define EFX_RX_PREFIX_SIZE 16 - -#define EFX_RX_HASH_VALUE(_func, _buffer) \ - (((_func) == EFX_RX_HASHALG_LFSR) ? \ - ((uint16_t)(((_buffer)[14] << 8) | (_buffer)[15])) : \ - ((uint32_t)(((_buffer)[12] << 24) | \ - ((_buffer)[13] << 16) | \ - ((_buffer)[14] << 8) | \ - (_buffer)[15]))) - -#define EFX_RX_HASH_SIZE(_func) \ - (((_func) == EFX_RX_HASHALG_LFSR) ? \ - sizeof (uint16_t) : \ - sizeof (uint32_t)) + __in efx_rx_hash_alg_t func, + __in uint8_t *buffer); #endif /* EFSYS_OPT_RX_SCALE */ +extern __checkReturn int +efx_psuedo_hdr_pkt_length_get( + __in efx_nic_t *enp, + __in uint8_t *buffer, + __out uint16_t *pkt_lengthp); + #define EFX_RXQ_MAXNDESCS 4096 #define EFX_RXQ_MINNDESCS 512 -#define EFX_RXQ_NDESCS_MASK EFX_MASK(EFX_RXQ_MAXNDESCS, EFX_RXQ_MINNDESCS) - #define EFX_RXQ_SIZE(_ndescs) ((_ndescs) * sizeof (efx_qword_t)) #define EFX_RXQ_NBUFS(_ndescs) (EFX_RXQ_SIZE(_ndescs) / EFX_BUF_SIZE) #define EFX_RXQ_LIMIT(_ndescs) ((_ndescs) - 16) @@ -1655,6 +1933,10 @@ typedef struct efx_buffer_s { boolean_t eb_eop; } efx_buffer_t; +typedef struct efx_desc_s { + efx_qword_t ed_eq; +} efx_desc_t; + extern void efx_rx_qpost( __in efx_rxq_t *erp, @@ -1667,9 +1949,10 @@ efx_rx_qpost( extern void efx_rx_qpush( __in efx_rxq_t *erp, - __in unsigned int added); + __in unsigned int added, + __inout unsigned int *pushedp); -extern void +extern __checkReturn int efx_rx_qflush( __in efx_rxq_t *erp); @@ -1687,10 +1970,10 @@ typedef struct efx_txq_s efx_txq_t; #if EFSYS_OPT_QSTATS -/* START MKCONFIG GENERATED EfxHeaderTransmitQueueBlock 536c5fa5014944bf */ +/* START MKCONFIG GENERATED EfxHeaderTransmitQueueBlock 12dff8778598b2db */ typedef enum efx_tx_qstat_e { TX_POST, - TX_UNALIGNED_SPLIT, + TX_POST_PIO, TX_NQSTATS } efx_tx_qstat_t; @@ -1706,16 +1989,21 @@ extern void efx_tx_fini( __in efx_nic_t *enp); -#define EFX_TXQ_MAXNDESCS 4096 -#define EFX_TXQ_MINNDESCS 512 +#define EFX_BUG35388_WORKAROUND(_encp) \ + (((_encp) == NULL) ? 1 : ((_encp)->enc_bug35388_workaround != 0)) -#define EFX_TXQ_NDESCS_MASK EFX_MASK(EFX_TXQ_MAXNDESCS, EFX_TXQ_MINNDESCS) +#define EFX_TXQ_MAXNDESCS(_encp) \ + ((EFX_BUG35388_WORKAROUND(_encp)) ? 2048 : 4096) + +#define EFX_TXQ_MINNDESCS 512 #define EFX_TXQ_SIZE(_ndescs) ((_ndescs) * sizeof (efx_qword_t)) #define EFX_TXQ_NBUFS(_ndescs) (EFX_TXQ_SIZE(_ndescs) / EFX_BUF_SIZE) #define EFX_TXQ_LIMIT(_ndescs) ((_ndescs) - 16) #define EFX_TXQ_DC_NDESCS(_dcsize) (8 << _dcsize) +#define EFX_TXQ_MAX_BUFS 8 /* Maximum independent of EFX_BUG35388_WORKAROUND. */ + extern __checkReturn int efx_tx_qcreate( __in efx_nic_t *enp, @@ -1726,7 +2014,8 @@ efx_tx_qcreate( __in uint32_t id, __in uint16_t flags, __in efx_evq_t *eep, - __deref_out efx_txq_t **etpp); + __deref_out efx_txq_t **etpp, + __out unsigned int *addedp); extern __checkReturn int efx_tx_qpost( @@ -1741,24 +2030,77 @@ efx_tx_qpace( __in efx_txq_t *etp, __in unsigned int ns); -extern void +extern void efx_tx_qpush( - __in efx_txq_t *etp, - __in unsigned int added); + __in efx_txq_t *etp, + __in unsigned int added, + __in unsigned int pushed); -extern void +extern __checkReturn int efx_tx_qflush( - __in efx_txq_t *etp); + __in efx_txq_t *etp); -extern void +extern void efx_tx_qenable( - __in efx_txq_t *etp); + __in efx_txq_t *etp); + +extern __checkReturn int +efx_tx_qpio_enable( + __in efx_txq_t *etp); + +extern void +efx_tx_qpio_disable( + __in efx_txq_t *etp); + +extern __checkReturn int +efx_tx_qpio_write( + __in efx_txq_t *etp, + __in_ecount(buf_length) uint8_t *buffer, + __in size_t buf_length, + __in size_t pio_buf_offset); + +extern __checkReturn int +efx_tx_qpio_post( + __in efx_txq_t *etp, + __in size_t pkt_length, + __in unsigned int completed, + __inout unsigned int *addedp); + +extern __checkReturn int +efx_tx_qdesc_post( + __in efx_txq_t *etp, + __in_ecount(n) efx_desc_t *ed, + __in unsigned int n, + __in unsigned int completed, + __inout unsigned int *addedp); + +extern void +efx_tx_qdesc_dma_create( + __in efx_txq_t *etp, + __in efsys_dma_addr_t addr, + __in size_t size, + __in boolean_t eop, + __out efx_desc_t *edp); + +extern void +efx_tx_qdesc_tso_create( + __in efx_txq_t *etp, + __in uint16_t ipv4_id, + __in uint32_t tcp_seq, + __in uint8_t tcp_flags, + __out efx_desc_t *edp); + +extern void +efx_tx_qdesc_vlantci_create( + __in efx_txq_t *etp, + __in uint16_t tci, + __out efx_desc_t *edp); #if EFSYS_OPT_QSTATS #if EFSYS_OPT_NAMES -extern const char __cs * +extern const char * efx_tx_qstat_name( __in efx_nic_t *etp, __in unsigned int id); @@ -1781,21 +2123,89 @@ efx_tx_qdestroy( #if EFSYS_OPT_FILTER +#define EFX_ETHER_TYPE_IPV4 0x0800 +#define EFX_ETHER_TYPE_IPV6 0x86DD + +#define EFX_IPPROTO_TCP 6 +#define EFX_IPPROTO_UDP 17 + typedef enum efx_filter_flag_e { EFX_FILTER_FLAG_RX_RSS = 0x01, /* use RSS to spread across * multiple queues */ EFX_FILTER_FLAG_RX_SCATTER = 0x02, /* enable RX scatter */ - EFX_FILTER_FLAG_RX_OVERRIDE_IP = 0x04, /* MAC filter overrides - * any matching IP filter */ + EFX_FILTER_FLAG_RX_OVER_AUTO = 0x04, /* Override an automatic filter + * (priority EFX_FILTER_PRI_AUTO). + * May only be set by the filter + * implementation for each type. + * A removal request will + * restore the automatic filter + * in its place. */ + EFX_FILTER_FLAG_RX = 0x08, /* Filter is for RX */ + EFX_FILTER_FLAG_TX = 0x10, /* Filter is for TX */ } efx_filter_flag_t; +typedef enum efx_filter_match_flags_e { + EFX_FILTER_MATCH_REM_HOST = 0x0001, /* Match by remote IP host + * address */ + EFX_FILTER_MATCH_LOC_HOST = 0x0002, /* Match by local IP host + * address */ + EFX_FILTER_MATCH_REM_MAC = 0x0004, /* Match by remote MAC address */ + EFX_FILTER_MATCH_REM_PORT = 0x0008, /* Match by remote TCP/UDP port */ + EFX_FILTER_MATCH_LOC_MAC = 0x0010, /* Match by remote TCP/UDP port */ + EFX_FILTER_MATCH_LOC_PORT = 0x0020, /* Match by local TCP/UDP port */ + EFX_FILTER_MATCH_ETHER_TYPE = 0x0040, /* Match by Ether-type */ + EFX_FILTER_MATCH_INNER_VID = 0x0080, /* Match by inner VLAN ID */ + EFX_FILTER_MATCH_OUTER_VID = 0x0100, /* Match by outer VLAN ID */ + EFX_FILTER_MATCH_IP_PROTO = 0x0200, /* Match by IP transport + * protocol */ + EFX_FILTER_MATCH_LOC_MAC_IG = 0x0400, /* Match by local MAC address + * I/G bit. Used for RX default + * unicast and multicast/ + * broadcast filters. */ +} efx_filter_match_flags_t; + +typedef enum efx_filter_priority_s { + EFX_FILTER_PRI_HINT = 0, /* Performance hint */ + EFX_FILTER_PRI_AUTO, /* Automatic filter based on device + * address list or hardware + * requirements. This may only be used + * by the filter implementation for + * each NIC type. */ + EFX_FILTER_PRI_MANUAL, /* Manually configured filter */ + EFX_FILTER_PRI_REQUIRED, /* Required for correct behaviour of the + * client (e.g. SR-IOV, HyperV VMQ etc.) + */ +} efx_filter_priority_t; + +/* + * FIXME: All these fields are assumed to be in little-endian byte order. + * It may be better for some to be big-endian. See bug42804. + */ + typedef struct efx_filter_spec_s { - uint8_t efs_type; - uint8_t efs_flags; - uint16_t efs_dmaq_id; - uint32_t efs_dword[3]; + uint32_t efs_match_flags:12; + uint32_t efs_priority:2; + uint32_t efs_flags:6; + uint32_t efs_dmaq_id:12; + uint32_t efs_rss_context; + uint16_t efs_outer_vid; + uint16_t efs_inner_vid; + uint8_t efs_loc_mac[EFX_MAC_ADDR_LEN]; + uint8_t efs_rem_mac[EFX_MAC_ADDR_LEN]; + uint16_t efs_ether_type; + uint8_t efs_ip_proto; + uint16_t efs_loc_port; + uint16_t efs_rem_port; + efx_oword_t efs_rem_host; + efx_oword_t efs_loc_host; } efx_filter_spec_t; + +/* Default values for use in filter specifications */ +#define EFX_FILTER_SPEC_RSS_CONTEXT_DEFAULT 0xffffffff +#define EFX_FILTER_SPEC_RX_DMAQ_ID_DROP 0xfff +#define EFX_FILTER_SPEC_VID_UNSPEC 0xffff + extern __checkReturn int efx_filter_init( __in efx_nic_t *enp); @@ -1805,116 +2215,83 @@ efx_filter_fini( __in efx_nic_t *enp); extern __checkReturn int -efx_rx_filter_insert( - __in efx_rxq_t *erp, +efx_filter_insert( + __in efx_nic_t *enp, __inout efx_filter_spec_t *spec); extern __checkReturn int -efx_rx_filter_remove( - __in efx_rxq_t *erp, +efx_filter_remove( + __in efx_nic_t *enp, __inout efx_filter_spec_t *spec); - void +extern __checkReturn int efx_filter_restore( __in efx_nic_t *enp); -extern void -efx_filter_spec_rx_ipv4_tcp_full( - __inout efx_filter_spec_t *spec, - __in unsigned int flags, - __in uint32_t src_ip, - __in uint16_t src_tcp, - __in uint32_t dest_ip, - __in uint16_t dest_tcp); +extern __checkReturn int +efx_filter_supported_filters( + __in efx_nic_t *enp, + __out uint32_t *list, + __out size_t *length); extern void -efx_filter_spec_rx_ipv4_tcp_wild( +efx_filter_spec_init_rx( __inout efx_filter_spec_t *spec, - __in unsigned int flags, - __in uint32_t dest_ip, - __in uint16_t dest_tcp); + __in efx_filter_priority_t priority, + __in efx_filter_flag_t flags, + __in efx_rxq_t *erp); extern void -efx_filter_spec_rx_ipv4_udp_full( +efx_filter_spec_init_tx( __inout efx_filter_spec_t *spec, - __in unsigned int flags, - __in uint32_t src_ip, - __in uint16_t src_udp, - __in uint32_t dest_ip, - __in uint16_t dest_udp); - -extern void -efx_filter_spec_rx_ipv4_udp_wild( - __inout efx_filter_spec_t *spec, - __in unsigned int flags, - __in uint32_t dest_ip, - __in uint16_t dest_udp); - -extern void -efx_filter_spec_rx_mac_full( - __inout efx_filter_spec_t *spec, - __in unsigned int flags, - __in uint16_t vlan_id, - __in uint8_t *dest_mac); - -extern void -efx_filter_spec_rx_mac_wild( - __inout efx_filter_spec_t *spec, - __in unsigned int flags, - __in uint8_t *dest_mac); - + __in efx_txq_t *etp); extern __checkReturn int -efx_tx_filter_insert( - __in efx_txq_t *etp, +efx_filter_spec_set_ipv4_local( + __inout efx_filter_spec_t *spec, + __in uint8_t proto, + __in uint32_t host, + __in uint16_t port); + +extern __checkReturn int +efx_filter_spec_set_ipv4_full( + __inout efx_filter_spec_t *spec, + __in uint8_t proto, + __in uint32_t lhost, + __in uint16_t lport, + __in uint32_t rhost, + __in uint16_t rport); + +extern __checkReturn int +efx_filter_spec_set_eth_local( + __inout efx_filter_spec_t *spec, + __in uint16_t vid, + __in const uint8_t *addr); + +extern __checkReturn int +efx_filter_spec_set_uc_def( __inout efx_filter_spec_t *spec); extern __checkReturn int -efx_tx_filter_remove( - __in efx_txq_t *etp, +efx_filter_spec_set_mc_def( __inout efx_filter_spec_t *spec); -extern void -efx_filter_spec_tx_ipv4_tcp_full( - __inout efx_filter_spec_t *spec, - __in uint32_t src_ip, - __in uint16_t src_tcp, - __in uint32_t dest_ip, - __in uint16_t dest_tcp); - -extern void -efx_filter_spec_tx_ipv4_tcp_wild( - __inout efx_filter_spec_t *spec, - __in uint32_t src_ip, - __in uint16_t src_tcp); - -extern void -efx_filter_spec_tx_ipv4_udp_full( - __inout efx_filter_spec_t *spec, - __in uint32_t src_ip, - __in uint16_t src_udp, - __in uint32_t dest_ip, - __in uint16_t dest_udp); - -extern void -efx_filter_spec_tx_ipv4_udp_wild( - __inout efx_filter_spec_t *spec, - __in uint32_t src_ip, - __in uint16_t src_udp); - -extern void -efx_filter_spec_tx_mac_full( - __inout efx_filter_spec_t *spec, - __in uint16_t vlan_id, - __in uint8_t *src_mac); - -extern void -efx_filter_spec_tx_mac_wild( - __inout efx_filter_spec_t *spec, - __in uint8_t *src_mac); - #endif /* EFSYS_OPT_FILTER */ +/* HASH */ + +extern __checkReturn uint32_t +efx_hash_dwords( + __in_ecount(count) uint32_t const *input, + __in size_t count, + __in uint32_t init); + +extern __checkReturn uint32_t +efx_hash_bytes( + __in_ecount(length) uint8_t const *input, + __in size_t length, + __in uint32_t init); + #ifdef __cplusplus } diff --git a/sys/dev/sfxge/common/efx_bootcfg.c b/sys/dev/sfxge/common/efx_bootcfg.c index d770a5c3cad0..330f69dbd5a9 100644 --- a/sys/dev/sfxge/common/efx_bootcfg.c +++ b/sys/dev/sfxge/common/efx_bootcfg.c @@ -1,26 +1,31 @@ /*- - * Copyright 2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2009-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -64,7 +69,7 @@ efx_bootcfg_verify( __in efx_nic_t *enp, __in_bcount(size) caddr_t data, __in size_t size, - __out size_t *usedp) + __out_opt size_t *usedp) { size_t offset = 0; size_t used = 0; diff --git a/sys/dev/sfxge/common/efx_check.h b/sys/dev/sfxge/common/efx_check.h new file mode 100644 index 000000000000..9e590a41d967 --- /dev/null +++ b/sys/dev/sfxge/common/efx_check.h @@ -0,0 +1,388 @@ +/*- + * Copyright (c) 2012-2015 Solarflare Communications Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. + * + * $FreeBSD$ + */ + +#ifndef _SYS_EFX_CHECK_H +#define _SYS_EFX_CHECK_H + +#include "efsys.h" + +/* + * Check that the efsys.h header in client code has a valid combination of + * EFSYS_OPT_xxx options. + * + * NOTE: Keep checks for obsolete options here to ensure that they are removed + * from client code (and do not reappear in merges from other branches). + */ + +/* Support NVRAM based boot config */ +#if EFSYS_OPT_BOOTCFG +# if !EFSYS_OPT_NVRAM +# error "BOOTCFG requires NVRAM" +# endif +#endif /* EFSYS_OPT_BOOTCFG */ + +/* Verify chip implements accessed registers */ +#if EFSYS_OPT_CHECK_REG +# if !(EFSYS_OPT_FALCON || EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON) +# error "CHECK_REG requires FALCON or SIENA or HUNTINGTON" +# endif +#endif /* EFSYS_OPT_CHECK_REG */ + +/* Decode fatal errors */ +#if EFSYS_OPT_DECODE_INTR_FATAL +# if !(EFSYS_OPT_FALCON || EFSYS_OPT_SIENA) +# if EFSYS_OPT_HUNTINGTON +# error "INTR_FATAL not supported on HUNTINGTON" +# endif +# error "INTR_FATAL requires FALCON or SIENA" +# endif +#endif /* EFSYS_OPT_DECODE_INTR_FATAL */ + +/* Support diagnostic hardware tests */ +#if EFSYS_OPT_DIAG +# if !(EFSYS_OPT_FALCON || EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON) +# error "DIAG requires FALCON or SIENA or HUNTINGTON" +# endif +#endif /* EFSYS_OPT_DIAG */ + +/* Support optimized EVQ data access */ +#if EFSYS_OPT_EV_PREFETCH +# if !(EFSYS_OPT_FALCON || EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON) +# error "EV_PREFETCH requires FALCON or SIENA or HUNTINGTON" +# endif +#endif /* EFSYS_OPT_EV_PREFETCH */ + +/* Support overriding the NVRAM and VPD configuration */ +#if EFSYS_OPT_FALCON_NIC_CFG_OVERRIDE +# if !EFSYS_OPT_FALCON +# error "FALCON_NIC_CFG_OVERRIDE requires FALCON" +# endif +#endif /* EFSYS_OPT_FALCON_NIC_CFG_OVERRIDE */ + +/* Support hardware packet filters */ +#if EFSYS_OPT_FILTER +# if !(EFSYS_OPT_FALCON || EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON) +# error "FILTER requires FALCON or SIENA or HUNTINGTON" +# endif +#endif /* EFSYS_OPT_FILTER */ + +#if EFSYS_OPT_HUNTINGTON +# if !EFSYS_OPT_FILTER +# error "HUNTINGTON requires FILTER" +# endif +#endif /* EFSYS_OPT_HUNTINGTON */ + +/* Support hardware loopback modes */ +#if EFSYS_OPT_LOOPBACK +# if !(EFSYS_OPT_FALCON || EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON) +# error "LOOPBACK requires FALCON or SIENA or HUNTINGTON" +# endif +#endif /* EFSYS_OPT_LOOPBACK */ + +/* Support Falcon GMAC */ +#if EFSYS_OPT_MAC_FALCON_GMAC +# if !EFSYS_OPT_FALCON +# error "MAC_FALCON_GMAC requires FALCON" +# endif +#endif /* EFSYS_OPT_MAC_FALCON_GMAC */ + +/* Support Falcon XMAC */ +#if EFSYS_OPT_MAC_FALCON_XMAC +# if !EFSYS_OPT_FALCON +# error "MAC_FALCON_XMAC requires FALCON" +# endif +#endif /* EFSYS_OPT_MAC_FALCON_XMAC */ + +/* Support MAC statistics */ +#if EFSYS_OPT_MAC_STATS +# if !(EFSYS_OPT_FALCON || EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON) +# error "MAC_STATS requires FALCON or SIENA or HUNTINGTON" +# endif +#endif /* EFSYS_OPT_MAC_STATS */ + +/* Support management controller messages */ +#if EFSYS_OPT_MCDI +# if !(EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON) +# if EFSYS_OPT_FALCON +# error "MCDI not supported on FALCON" +# endif +# error "MCDI requires SIENA or HUNTINGTON" +# endif +#endif /* EFSYS_OPT_MCDI */ + +#if EFSYS_OPT_SIENA && !EFSYS_OPT_MCDI +# error "SIENA requires MCDI" +#endif +#if EFSYS_OPT_HUNTINGTON && !EFSYS_OPT_MCDI +# error "HUNTINGTON requires MCDI" +#endif + +/* Support LM87 monitor */ +#if EFSYS_OPT_MON_LM87 +# if !EFSYS_OPT_FALCON +# error "MON_LM87 requires FALCON" +# endif +#endif /* EFSYS_OPT_MON_LM87 */ + +/* Support MAX6647 monitor */ +#if EFSYS_OPT_MON_MAX6647 +# if !EFSYS_OPT_FALCON +# error "MON_MAX6647 requires FALCON" +# endif +#endif /* EFSYS_OPT_MON_MAX6647 */ + +/* Support null monitor */ +#if EFSYS_OPT_MON_NULL +# if !EFSYS_OPT_FALCON +# error "MON_NULL requires FALCON" +# endif +#endif /* EFSYS_OPT_MON_NULL */ + +/* Support Siena monitor */ +#ifdef EFSYS_OPT_MON_SIENA +# error "MON_SIENA is obsolete use MON_MCDI" +#endif /* EFSYS_OPT_MON_SIENA*/ + +/* Support Huntington monitor */ +#ifdef EFSYS_OPT_MON_HUNTINGTON +# error "MON_HUNTINGTON is obsolete use MON_MCDI" +#endif /* EFSYS_OPT_MON_HUNTINGTON*/ + +/* Support monitor statistics (voltage/temperature) */ +#if EFSYS_OPT_MON_STATS +# if !(EFSYS_OPT_FALCON || EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON) +# error "MON_STATS requires FALCON or SIENA or HUNTINGTON" +# endif +#endif /* EFSYS_OPT_MON_STATS */ + +/* Support Monitor via mcdi */ +#if EFSYS_OPT_MON_MCDI +# if !(EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON) +# error "MON_MCDI requires SIENA or HUNTINGTON" +# endif +#endif /* EFSYS_OPT_MON_MCDI*/ + +/* Support printable names for statistics */ +#if EFSYS_OPT_NAMES +# if !(EFSYS_OPT_LOOPBACK || EFSYS_OPT_MAC_STATS || EFSYS_OPT_MCDI || \ + EFSYS_MON_STATS || EFSYS_OPT_PHY_PROPS || EFSYS_OPT_PHY_STATS || \ + EFSYS_OPT_QSTATS) +# error "NAMES requires LOOPBACK or xxxSTATS or MCDI or PHY_PROPS" +# endif +#endif /* EFSYS_OPT_NAMES */ + +/* Support non volatile configuration */ +#if EFSYS_OPT_NVRAM +# if !(EFSYS_OPT_FALCON || EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON) +# error "NVRAM requires FALCON or SIENA or HUNTINGTON" +# endif +#endif /* EFSYS_OPT_NVRAM */ + +/* Support Falcon bootrom */ +#if EFSYS_OPT_NVRAM_FALCON_BOOTROM +# if !EFSYS_OPT_NVRAM +# error "NVRAM_FALCON_BOOTROM requires NVRAM" +# endif +# if !EFSYS_OPT_FALCON +# error "NVRAM_FALCON_BOOTROM requires FALCON" +# endif +#endif /* EFSYS_OPT_NVRAM_FALCON_BOOTROM */ + +/* Support NVRAM config for SFT9001 */ +#if EFSYS_OPT_NVRAM_SFT9001 +# if !EFSYS_OPT_NVRAM +# error "NVRAM_SFT9001 requires NVRAM" +# endif +# if !EFSYS_OPT_FALCON +# error "NVRAM_SFT9001 requires FALCON" +# endif +#endif /* EFSYS_OPT_NVRAM_SFT9001 */ + +/* Support NVRAM config for SFX7101 */ +#if EFSYS_OPT_NVRAM_SFX7101 +# if !EFSYS_OPT_NVRAM +# error "NVRAM_SFX7101 requires NVRAM" +# endif +# if !EFSYS_OPT_FALCON +# error "NVRAM_SFX7101 requires FALCON" +# endif +#endif /* EFSYS_OPT_NVRAM_SFX7101 */ + +/* Support PCIe interface tuning */ +#if EFSYS_OPT_PCIE_TUNE +# if !(EFSYS_OPT_FALCON || EFSYS_OPT_SIENA) +# error "PCIE_TUNE requires FALCON or SIENA" +# endif +#endif /* EFSYS_OPT_PCIE_TUNE */ + +/* Support PHY BIST diagnostics */ +#if EFSYS_OPT_PHY_BIST +# error "PHY_BIST is obsolete. It has been replaced by the BIST option." +#endif /* EFSYS_OPT_PHY_BIST */ + +/* Support PHY flags */ +#if EFSYS_OPT_PHY_FLAGS +# if !(EFSYS_OPT_FALCON || EFSYS_OPT_SIENA) +# error "PHY_FLAGS requires FALCON or SIENA" +# endif +#endif /* EFSYS_OPT_PHY_FLAGS */ + +/* Support for PHY LED control */ +#if EFSYS_OPT_PHY_LED_CONTROL +# if !(EFSYS_OPT_FALCON || EFSYS_OPT_SIENA) +# error "PHY_LED_CONTROL requires FALCON or SIENA" +# endif +#endif /* EFSYS_OPT_PHY_LED_CONTROL */ + +/* Support NULL PHY */ +#if EFSYS_OPT_PHY_NULL +# if !EFSYS_OPT_FALCON +# error "PHY_NULL requires FALCON" +# endif +#endif /* EFSYS_OPT_PHY_NULL */ + +/* Obsolete option */ +#ifdef EFSYS_OPT_PHY_PM8358 +# error "EFSYS_OPT_PHY_PM8358 is obsolete and is not supported." +#endif + +/* Support PHY properties */ +#if EFSYS_OPT_PHY_PROPS +# if !(EFSYS_OPT_FALCON || EFSYS_OPT_SIENA) +# error "PHY_PROPS requires FALCON or SIENA" +# endif +#endif /* EFSYS_OPT_PHY_PROPS */ + +/* Support QT2022C2 PHY */ +#if EFSYS_OPT_PHY_QT2022C2 +# if !EFSYS_OPT_FALCON +# error "PHY_QT2022C2 requires FALCON" +# endif +#endif /* EFSYS_OPT_PHY_QT2022C2 */ + +/* Support QT2025C PHY (Wakefield NIC) */ +#if EFSYS_OPT_PHY_QT2025C +# if !EFSYS_OPT_FALCON +# error "PHY_QT2025C requires FALCON" +# endif +#endif /* EFSYS_OPT_PHY_QT2025C */ + +/* Support SFT9001 PHY (Starbolt NIC) */ +#if EFSYS_OPT_PHY_SFT9001 +# if !EFSYS_OPT_FALCON +# error "PHY_SFT9001 requires FALCON" +# endif +#endif /* EFSYS_OPT_PHY_SFT9001 */ + +/* Support SFX7101 PHY (SFE4001 NIC) */ +#if EFSYS_OPT_PHY_SFX7101 +# if !EFSYS_OPT_FALCON +# error "PHY_SFX7101 requires FALCON" +# endif +#endif /* EFSYS_OPT_PHY_SFX7101 */ + +/* Support PHY statistics */ +#if EFSYS_OPT_PHY_STATS +# if !(EFSYS_OPT_FALCON || EFSYS_OPT_SIENA) +# error "PHY_STATS requires FALCON or SIENA" +# endif +#endif /* EFSYS_OPT_PHY_STATS */ + +/* Support TXC43128 PHY (SFE4003 NIC) */ +#if EFSYS_OPT_PHY_TXC43128 +# if !EFSYS_OPT_FALCON +# error "PHY_TXC43128 requires FALCON" +# endif +#endif /* EFSYS_OPT_PHY_TXC43128 */ + +/* Support EVQ/RXQ/TXQ statistics */ +#if EFSYS_OPT_QSTATS +# if !(EFSYS_OPT_FALCON || EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON) +# error "QSTATS requires FALCON or SIENA or HUNTINGTON" +# endif +#endif /* EFSYS_OPT_QSTATS */ + +/* Support receive header split */ +#if EFSYS_OPT_RX_HDR_SPLIT +# if !(EFSYS_OPT_FALCON || EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON) +# error "RX_HDR_SPLIT requires FALCON or SIENA or HUNTINGTON" +# endif +#endif /* EFSYS_OPT_RX_HDR_SPLIT */ + +/* Support receive scaling (RSS) */ +#if EFSYS_OPT_RX_SCALE +# if !(EFSYS_OPT_FALCON || EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON) +# error "RX_SCALE requires FALCON or SIENA or HUNTINGTON" +# endif +#endif /* EFSYS_OPT_RX_SCALE */ + +/* Support receive scatter DMA */ +#if EFSYS_OPT_RX_SCATTER +# if !(EFSYS_OPT_FALCON || EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON) +# error "RX_SCATTER requires FALCON or SIENA or HUNTINGTON" +# endif +#endif /* EFSYS_OPT_RX_SCATTER */ + +/* Obsolete option */ +#ifdef EFSYS_OPT_STAT_NAME +# error "EFSYS_OPT_STAT_NAME is obsolete (replaced by EFSYS_OPT_NAMES)." +#endif + +/* Support PCI Vital Product Data (VPD) */ +#if EFSYS_OPT_VPD +# if !(EFSYS_OPT_FALCON || EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON) +# error "VPD requires FALCON or SIENA or HUNTINGTON" +# endif +#endif /* EFSYS_OPT_VPD */ + +/* Support Wake on LAN */ +#if EFSYS_OPT_WOL +# if !EFSYS_OPT_SIENA +# error "WOL requires SIENA" +# endif +#endif /* EFSYS_OPT_WOL */ + +/* Support calculating multicast pktfilter in common code */ +#if EFSYS_OPT_MCAST_FILTER_LIST +# if !(EFSYS_OPT_FALCON || EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON) +# error "MCAST_FILTER_LIST requires FALCON or SIENA or HUNTINGTON" +# endif +#endif /* EFSYS_OPT_MCAST_FILTER_LIST */ + +/* Support BIST */ +#if EFSYS_OPT_BIST +# if !(EFSYS_OPT_FALCON || EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON) +# error "BIST requires FALCON or SIENA or HUNTINGTON" +# endif +#endif /* EFSYS_OPT_BIST */ + +#endif /* _SYS_EFX_CHECK_H */ diff --git a/sys/dev/sfxge/common/efx_crc32.c b/sys/dev/sfxge/common/efx_crc32.c new file mode 100644 index 000000000000..7e4cfc451336 --- /dev/null +++ b/sys/dev/sfxge/common/efx_crc32.c @@ -0,0 +1,127 @@ +/*- + * Copyright (c) 2013-2015 Solarflare Communications Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "efsys.h" +#include "efx.h" +#include "efx_types.h" +#include "efx_impl.h" + +/* + * Precomputed table for computing IEEE 802.3 CRC32 + * with polynomial 0x04c11db7 (bit-reversed 0xedb88320) + */ + +static const uint32_t crc32_table[256] = { + 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, + 0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3, + 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988, + 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, + 0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de, + 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7, + 0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, + 0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5, + 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172, + 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, + 0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, + 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59, + 0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, + 0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f, + 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, + 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, + 0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a, + 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433, + 0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, + 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01, + 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, + 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, + 0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c, + 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65, + 0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, + 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb, + 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0, + 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, + 0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086, + 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f, + 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, + 0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad, + 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a, + 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, + 0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8, + 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1, + 0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, + 0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7, + 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc, + 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, + 0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, + 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b, + 0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, + 0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79, + 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, + 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, + 0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, + 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d, + 0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, + 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713, + 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, + 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, + 0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e, + 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777, + 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, + 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45, + 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2, + 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, + 0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0, + 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9, + 0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, + 0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf, + 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94, + 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d +}; + +/* Calculate the IEEE 802.3 CRC32 of a MAC addr */ + __checkReturn uint32_t +efx_crc32_calculate( + __in uint32_t crc_init, + __in_ecount(length) uint8_t const *input, + __in int length) +{ + int index; + uint32_t crc = crc_init; + + for (index = 0; index < length; index++) { + uint32_t data = *(input++); + crc = (crc >> 8) ^ crc32_table[(crc ^ data) & 0xff]; + } + + return (crc); +} diff --git a/sys/dev/sfxge/common/efx_ev.c b/sys/dev/sfxge/common/efx_ev.c index fff7803a13d1..9669fc450c2c 100644 --- a/sys/dev/sfxge/common/efx_ev.c +++ b/sys/dev/sfxge/common/efx_ev.c @@ -1,26 +1,31 @@ /*- - * Copyright 2007-2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2007-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -31,6 +36,7 @@ __FBSDID("$FreeBSD$"); #include "efx_types.h" #include "efx_regs.h" #include "efx_impl.h" +#include "mcdi_mon.h" #if EFSYS_OPT_QSTATS #define EFX_EV_QSTAT_INCR(_eep, _stat) \ @@ -42,11 +48,118 @@ __FBSDID("$FreeBSD$"); #define EFX_EV_QSTAT_INCR(_eep, _stat) #endif +#define EFX_EV_PRESENT(_qword) \ + (EFX_QWORD_FIELD((_qword), EFX_DWORD_0) != 0xffffffff && \ + EFX_QWORD_FIELD((_qword), EFX_DWORD_1) != 0xffffffff) + + + +#if EFSYS_OPT_FALCON || EFSYS_OPT_SIENA + +static __checkReturn int +falconsiena_ev_init( + __in efx_nic_t *enp); + +static void +falconsiena_ev_fini( + __in efx_nic_t *enp); + +static __checkReturn int +falconsiena_ev_qcreate( + __in efx_nic_t *enp, + __in unsigned int index, + __in efsys_mem_t *esmp, + __in size_t n, + __in uint32_t id, + __in efx_evq_t *eep); + +static void +falconsiena_ev_qdestroy( + __in efx_evq_t *eep); + +static __checkReturn int +falconsiena_ev_qprime( + __in efx_evq_t *eep, + __in unsigned int count); + +static void +falconsiena_ev_qpoll( + __in efx_evq_t *eep, + __inout unsigned int *countp, + __in const efx_ev_callbacks_t *eecp, + __in_opt void *arg); + +static void +falconsiena_ev_qpost( + __in efx_evq_t *eep, + __in uint16_t data); + +static __checkReturn int +falconsiena_ev_qmoderate( + __in efx_evq_t *eep, + __in unsigned int us); + +#if EFSYS_OPT_QSTATS +static void +falconsiena_ev_qstats_update( + __in efx_evq_t *eep, + __inout_ecount(EV_NQSTATS) efsys_stat_t *stat); + +#endif + +#endif /* EFSYS_OPT_FALCON || EFSYS_OPT_SIENA */ + +#if EFSYS_OPT_FALCON +static efx_ev_ops_t __efx_ev_falcon_ops = { + falconsiena_ev_init, /* eevo_init */ + falconsiena_ev_fini, /* eevo_fini */ + falconsiena_ev_qcreate, /* eevo_qcreate */ + falconsiena_ev_qdestroy, /* eevo_qdestroy */ + falconsiena_ev_qprime, /* eevo_qprime */ + falconsiena_ev_qpost, /* eevo_qpost */ + falconsiena_ev_qmoderate, /* eevo_qmoderate */ +#if EFSYS_OPT_QSTATS + falconsiena_ev_qstats_update, /* eevo_qstats_update */ +#endif +}; +#endif /* EFSYS_OPT_FALCON */ + +#if EFSYS_OPT_SIENA +static efx_ev_ops_t __efx_ev_siena_ops = { + falconsiena_ev_init, /* eevo_init */ + falconsiena_ev_fini, /* eevo_fini */ + falconsiena_ev_qcreate, /* eevo_qcreate */ + falconsiena_ev_qdestroy, /* eevo_qdestroy */ + falconsiena_ev_qprime, /* eevo_qprime */ + falconsiena_ev_qpost, /* eevo_qpost */ + falconsiena_ev_qmoderate, /* eevo_qmoderate */ +#if EFSYS_OPT_QSTATS + falconsiena_ev_qstats_update, /* eevo_qstats_update */ +#endif +}; +#endif /* EFSYS_OPT_SIENA */ + +#if EFSYS_OPT_HUNTINGTON +static efx_ev_ops_t __efx_ev_hunt_ops = { + hunt_ev_init, /* eevo_init */ + hunt_ev_fini, /* eevo_fini */ + hunt_ev_qcreate, /* eevo_qcreate */ + hunt_ev_qdestroy, /* eevo_qdestroy */ + hunt_ev_qprime, /* eevo_qprime */ + hunt_ev_qpost, /* eevo_qpost */ + hunt_ev_qmoderate, /* eevo_qmoderate */ +#if EFSYS_OPT_QSTATS + hunt_ev_qstats_update, /* eevo_qstats_update */ +#endif +}; +#endif /* EFSYS_OPT_HUNTINGTON */ + + __checkReturn int efx_ev_init( __in efx_nic_t *enp) { - efx_oword_t oword; + efx_ev_ops_t *eevop; int rc; EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); @@ -57,8 +170,290 @@ efx_ev_init( goto fail1; } + switch (enp->en_family) { +#if EFSYS_OPT_FALCON + case EFX_FAMILY_FALCON: + eevop = (efx_ev_ops_t *)&__efx_ev_falcon_ops; + break; +#endif /* EFSYS_OPT_FALCON */ + +#if EFSYS_OPT_SIENA + case EFX_FAMILY_SIENA: + eevop = (efx_ev_ops_t *)&__efx_ev_siena_ops; + break; +#endif /* EFSYS_OPT_SIENA */ + +#if EFSYS_OPT_HUNTINGTON + case EFX_FAMILY_HUNTINGTON: + eevop = (efx_ev_ops_t *)&__efx_ev_hunt_ops; + break; +#endif /* EFSYS_OPT_HUNTINGTON */ + + default: + EFSYS_ASSERT(0); + rc = ENOTSUP; + goto fail1; + } + EFSYS_ASSERT3U(enp->en_ev_qcount, ==, 0); + if ((rc = eevop->eevo_init(enp)) != 0) + goto fail2; + + enp->en_eevop = eevop; + enp->en_mod_flags |= EFX_MOD_EV; + return (0); + +fail2: + EFSYS_PROBE(fail2); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + enp->en_eevop = NULL; + enp->en_mod_flags &= ~EFX_MOD_EV; + return (rc); +} + + void +efx_ev_fini( + __in efx_nic_t *enp) +{ + efx_ev_ops_t *eevop = enp->en_eevop; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_EV); + EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_RX)); + EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_TX)); + EFSYS_ASSERT3U(enp->en_ev_qcount, ==, 0); + + eevop->eevo_fini(enp); + + enp->en_eevop = NULL; + enp->en_mod_flags &= ~EFX_MOD_EV; +} + + + __checkReturn int +efx_ev_qcreate( + __in efx_nic_t *enp, + __in unsigned int index, + __in efsys_mem_t *esmp, + __in size_t n, + __in uint32_t id, + __deref_out efx_evq_t **eepp) +{ + efx_ev_ops_t *eevop = enp->en_eevop; + efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + efx_evq_t *eep; + int rc; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_EV); + + EFSYS_ASSERT3U(enp->en_ev_qcount + 1, <, encp->enc_evq_limit); + + /* Allocate an EVQ object */ + EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (efx_evq_t), eep); + if (eep == NULL) { + rc = ENOMEM; + goto fail1; + } + + eep->ee_magic = EFX_EVQ_MAGIC; + eep->ee_enp = enp; + eep->ee_index = index; + eep->ee_mask = n - 1; + eep->ee_esmp = esmp; + + if ((rc = eevop->eevo_qcreate(enp, index, esmp, n, id, eep)) != 0) + goto fail2; + + enp->en_ev_qcount++; + *eepp = eep; + + return (0); + +fail2: + EFSYS_PROBE(fail2); + EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_evq_t), eep); +fail1: + EFSYS_PROBE1(fail1, int, rc); + return (rc); +} + + void +efx_ev_qdestroy( + __in efx_evq_t *eep) +{ + efx_nic_t *enp = eep->ee_enp; + efx_ev_ops_t *eevop = enp->en_eevop; + + EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC); + + EFSYS_ASSERT(enp->en_ev_qcount != 0); + --enp->en_ev_qcount; + + eevop->eevo_qdestroy(eep); + + /* Free the EVQ object */ + EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_evq_t), eep); +} + + __checkReturn int +efx_ev_qprime( + __in efx_evq_t *eep, + __in unsigned int count) +{ + efx_nic_t *enp = eep->ee_enp; + efx_ev_ops_t *eevop = enp->en_eevop; + int rc; + + EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC); + + if (!(enp->en_mod_flags & EFX_MOD_INTR)) { + rc = EINVAL; + goto fail1; + } + + if ((rc = eevop->eevo_qprime(eep, count)) != 0) + goto fail2; + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + return (rc); +} + + __checkReturn boolean_t +efx_ev_qpending( + __in efx_evq_t *eep, + __in unsigned int count) +{ + size_t offset; + efx_qword_t qword; + + EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC); + + offset = (count & eep->ee_mask) * sizeof (efx_qword_t); + EFSYS_MEM_READQ(eep->ee_esmp, offset, &qword); + + return (EFX_EV_PRESENT(qword)); +} + +#if EFSYS_OPT_EV_PREFETCH + + void +efx_ev_qprefetch( + __in efx_evq_t *eep, + __in unsigned int count) +{ + efx_nic_t *enp = eep->ee_enp; + unsigned int offset; + + EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC); + + offset = (count & eep->ee_mask) * sizeof (efx_qword_t); + EFSYS_MEM_PREFETCH(eep->ee_esmp, offset); +} + +#endif /* EFSYS_OPT_EV_PREFETCH */ + + void +efx_ev_qpoll( + __in efx_evq_t *eep, + __inout unsigned int *countp, + __in const efx_ev_callbacks_t *eecp, + __in_opt void *arg) +{ + EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC); + + /* + * FIXME: Huntington will require support for hardware event batching + * and merging, which will need a different ev_qpoll implementation. + * + * Without those features the Falcon/Siena code can be used unchanged. + */ + EFX_STATIC_ASSERT(ESF_DZ_EV_CODE_LBN == FSF_AZ_EV_CODE_LBN); + EFX_STATIC_ASSERT(ESF_DZ_EV_CODE_WIDTH == FSF_AZ_EV_CODE_WIDTH); + + EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_RX_EV == FSE_AZ_EV_CODE_RX_EV); + EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_TX_EV == FSE_AZ_EV_CODE_TX_EV); + EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_DRIVER_EV == FSE_AZ_EV_CODE_DRIVER_EV); + EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_DRV_GEN_EV == + FSE_AZ_EV_CODE_DRV_GEN_EV); +#if EFSYS_OPT_MCDI + EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_MCDI_EV == + FSE_AZ_EV_CODE_MCDI_EVRESPONSE); +#endif + falconsiena_ev_qpoll(eep, countp, eecp, arg); +} + + void +efx_ev_qpost( + __in efx_evq_t *eep, + __in uint16_t data) +{ + efx_nic_t *enp = eep->ee_enp; + efx_ev_ops_t *eevop = enp->en_eevop; + + EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC); + + EFSYS_ASSERT(eevop != NULL && + eevop->eevo_qpost != NULL); + + eevop->eevo_qpost(eep, data); +} + + __checkReturn int +efx_ev_qmoderate( + __in efx_evq_t *eep, + __in unsigned int us) +{ + efx_nic_t *enp = eep->ee_enp; + efx_ev_ops_t *eevop = enp->en_eevop; + int rc; + + EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC); + + if ((rc = eevop->eevo_qmoderate(eep, us)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + return (rc); +} + +#if EFSYS_OPT_QSTATS + void +efx_ev_qstats_update( + __in efx_evq_t *eep, + __inout_ecount(EV_NQSTATS) efsys_stat_t *stat) + +{ efx_nic_t *enp = eep->ee_enp; + efx_ev_ops_t *eevop = enp->en_eevop; + + EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC); + + eevop->eevo_qstats_update(eep, stat); +} + +#endif /* EFSYS_OPT_QSTATS */ + +#if EFSYS_OPT_FALCON || EFSYS_OPT_SIENA + +static __checkReturn int +falconsiena_ev_init( + __in efx_nic_t *enp) +{ + efx_oword_t oword; + /* * Program the event queue for receive and transmit queue * flush events. @@ -67,17 +462,12 @@ efx_ev_init( EFX_SET_OWORD_FIELD(oword, FRF_AZ_FLS_EVQ_ID, 0); EFX_BAR_WRITEO(enp, FR_AZ_DP_CTRL_REG, &oword); - enp->en_mod_flags |= EFX_MOD_EV; return (0); -fail1: - EFSYS_PROBE1(fail1, int, rc); - - return (rc); } static __checkReturn boolean_t -efx_ev_rx_not_ok( +falconsiena_ev_rx_not_ok( __in efx_evq_t *eep, __in efx_qword_t *eqp, __in uint32_t label, @@ -167,7 +557,7 @@ efx_ev_rx_not_ok( } static __checkReturn boolean_t -efx_ev_rx( +falconsiena_ev_rx( __in efx_evq_t *eep, __in efx_qword_t *eqp, __in const efx_ev_callbacks_t *eecp, @@ -264,7 +654,7 @@ efx_ev_rx( /* Detect errors included in the FSF_AZ_RX_EV_PKT_OK indication */ if (!ok) { - ignore = efx_ev_rx_not_ok(eep, eqp, label, id, &flags); + ignore = falconsiena_ev_rx_not_ok(eep, eqp, label, id, &flags); if (ignore) { EFSYS_PROBE4(rx_complete, uint32_t, label, uint32_t, id, uint32_t, size, uint16_t, flags); @@ -323,7 +713,7 @@ efx_ev_rx( } static __checkReturn boolean_t -efx_ev_tx( +falconsiena_ev_tx( __in efx_evq_t *eep, __in efx_qword_t *eqp, __in const efx_ev_callbacks_t *eecp, @@ -370,7 +760,7 @@ efx_ev_tx( } static __checkReturn boolean_t -efx_ev_global( +falconsiena_ev_global( __in efx_evq_t *eep, __in efx_qword_t *eqp, __in const efx_ev_callbacks_t *eecp, @@ -396,7 +786,7 @@ efx_ev_global( } static __checkReturn boolean_t -efx_ev_driver( +falconsiena_ev_driver( __in efx_evq_t *eep, __in efx_qword_t *eqp, __in const efx_ev_callbacks_t *eecp, @@ -437,7 +827,8 @@ efx_ev_driver( EFSYS_PROBE1(rx_descq_fls_failed, uint32_t, rxq_index); - should_abort = eecp->eec_rxq_flush_failed(arg, rxq_index); + should_abort = eecp->eec_rxq_flush_failed(arg, + rxq_index); } else { EFX_EV_QSTAT_INCR(eep, EV_DRIVER_RX_DESCQ_FLS_DONE); @@ -524,7 +915,7 @@ efx_ev_driver( } static __checkReturn boolean_t -efx_ev_drv_gen( +falconsiena_ev_drv_gen( __in efx_evq_t *eep, __in efx_qword_t *eqp, __in const efx_ev_callbacks_t *eecp, @@ -552,7 +943,7 @@ efx_ev_drv_gen( #if EFSYS_OPT_MCDI static __checkReturn boolean_t -efx_ev_mcdi( +falconsiena_ev_mcdi( __in efx_evq_t *eep, __in efx_qword_t *eqp, __in const efx_ev_callbacks_t *eecp, @@ -583,9 +974,9 @@ efx_ev_mcdi( case MCDI_EVENT_CODE_CMDDONE: efx_mcdi_ev_cpl(enp, - MCDI_EV_FIELD(eqp, CMDDONE_SEQ), - MCDI_EV_FIELD(eqp, CMDDONE_DATALEN), - MCDI_EV_FIELD(eqp, CMDDONE_ERRNO)); + MCDI_EV_FIELD(eqp, CMDDONE_SEQ), + MCDI_EV_FIELD(eqp, CMDDONE_DATALEN), + MCDI_EV_FIELD(eqp, CMDDONE_ERRNO)); break; case MCDI_EVENT_CODE_LINKCHANGE: { @@ -601,7 +992,7 @@ efx_ev_mcdi( efx_mon_stat_value_t value; int rc; - if ((rc = siena_mon_ev(enp, eqp, &id, &value)) == 0) + if ((rc = mcdi_mon_ev(enp, eqp, &id, &value)) == 0) should_abort = eecp->eec_monitor(arg, id, value); else if (rc == ENOTSUP) { should_abort = eecp->eec_exception(arg, @@ -656,22 +1047,14 @@ efx_ev_mcdi( #endif /* EFSYS_OPT_MCDI */ - __checkReturn int -efx_ev_qprime( +static __checkReturn int +falconsiena_ev_qprime( __in efx_evq_t *eep, __in unsigned int count) { efx_nic_t *enp = eep->ee_enp; uint32_t rptr; efx_dword_t dword; - int rc; - - EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC); - - if (!(enp->en_mod_flags & EFX_MOD_INTR)) { - rc = EINVAL; - goto fail1; - } rptr = count & eep->ee_mask; @@ -681,55 +1064,12 @@ efx_ev_qprime( &dword, B_FALSE); return (0); - -fail1: - EFSYS_PROBE1(fail1, int, rc); - - return (rc); } - __checkReturn boolean_t -efx_ev_qpending( - __in efx_evq_t *eep, - __in unsigned int count) -{ - size_t offset; - efx_qword_t qword; - - EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC); - - offset = (count & eep->ee_mask) * sizeof (efx_qword_t); - EFSYS_MEM_READQ(eep->ee_esmp, offset, &qword); - - return (EFX_QWORD_FIELD(qword, EFX_DWORD_0) != 0xffffffff && - EFX_QWORD_FIELD(qword, EFX_DWORD_1) != 0xffffffff); -} - -#if EFSYS_OPT_EV_PREFETCH - - void -efx_ev_qprefetch( - __in efx_evq_t *eep, - __in unsigned int count) -{ - unsigned int offset; - - EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC); - - offset = (count & eep->ee_mask) * sizeof (efx_qword_t); - EFSYS_MEM_PREFETCH(eep->ee_esmp, offset); -} - -#endif /* EFSYS_OPT_EV_PREFETCH */ - #define EFX_EV_BATCH 8 -#define EFX_EV_PRESENT(_qword) \ - (EFX_QWORD_FIELD((_qword), EFX_DWORD_0) != 0xffffffff && \ - EFX_QWORD_FIELD((_qword), EFX_DWORD_1) != 0xffffffff) - - void -efx_ev_qpoll( +static void +falconsiena_ev_qpoll( __in efx_evq_t *eep, __inout unsigned int *countp, __in const efx_ev_callbacks_t *eecp, @@ -742,7 +1082,6 @@ efx_ev_qpoll( unsigned int index; size_t offset; - EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC); EFSYS_ASSERT(countp != NULL); EFSYS_ASSERT(eecp != NULL); @@ -778,7 +1117,6 @@ efx_ev_qpoll( for (index = 0; index < total; ++index) { boolean_t should_abort; uint32_t code; - efx_ev_handler_t handler; #if EFSYS_OPT_EV_PREFETCH /* Prefetch if we've now reached the batch period */ @@ -794,9 +1132,49 @@ efx_ev_qpoll( EFX_EV_QSTAT_INCR(eep, EV_ALL); code = EFX_QWORD_FIELD(ev[index], FSF_AZ_EV_CODE); - handler = eep->ee_handler[code]; - EFSYS_ASSERT(handler != NULL); - should_abort = handler(eep, &(ev[index]), eecp, arg); + switch (code) { + case FSE_AZ_EV_CODE_RX_EV: + should_abort = eep->ee_rx(eep, + &(ev[index]), eecp, arg); + break; + case FSE_AZ_EV_CODE_TX_EV: + should_abort = eep->ee_tx(eep, + &(ev[index]), eecp, arg); + break; + case FSE_AZ_EV_CODE_DRIVER_EV: + should_abort = eep->ee_driver(eep, + &(ev[index]), eecp, arg); + break; + case FSE_AZ_EV_CODE_DRV_GEN_EV: + should_abort = eep->ee_drv_gen(eep, + &(ev[index]), eecp, arg); + break; +#if EFSYS_OPT_MCDI + case FSE_AZ_EV_CODE_MCDI_EVRESPONSE: + should_abort = eep->ee_mcdi(eep, + &(ev[index]), eecp, arg); + break; +#endif + case FSE_AZ_EV_CODE_GLOBAL_EV: + if (eep->ee_global) { + should_abort = eep->ee_global(eep, + &(ev[index]), eecp, arg); + break; + } + /* else fallthrough */ + default: + EFSYS_PROBE3(bad_event, + unsigned int, eep->ee_index, + uint32_t, + EFX_QWORD_FIELD(ev[index], EFX_DWORD_1), + uint32_t, + EFX_QWORD_FIELD(ev[index], EFX_DWORD_0)); + + EFSYS_ASSERT(eecp->eec_exception != NULL); + (void) eecp->eec_exception(arg, + EFX_EXCEPTION_EV_ERROR, code); + should_abort = B_TRUE; + } if (should_abort) { /* Ignore subsequent events */ total = index + 1; @@ -823,8 +1201,8 @@ efx_ev_qpoll( *countp = count; } - void -efx_ev_qpost( +static void +falconsiena_ev_qpost( __in efx_evq_t *eep, __in uint16_t data) { @@ -832,8 +1210,6 @@ efx_ev_qpost( efx_qword_t ev; efx_oword_t oword; - EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC); - EFX_POPULATE_QWORD_2(ev, FSF_AZ_EV_CODE, FSE_AZ_EV_CODE_DRV_GEN_EV, FSF_AZ_EV_DATA_DW0, (uint32_t)data); @@ -844,8 +1220,8 @@ efx_ev_qpost( EFX_BAR_WRITEO(enp, FR_AZ_DRV_EV_REG, &oword); } - __checkReturn int -efx_ev_qmoderate( +static __checkReturn int +falconsiena_ev_qmoderate( __in efx_evq_t *eep, __in unsigned int us) { @@ -855,8 +1231,6 @@ efx_ev_qmoderate( efx_dword_t dword; int rc; - EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC); - if (us > encp->enc_evq_timer_max_us) { rc = EINVAL; goto fail1; @@ -905,27 +1279,24 @@ efx_ev_qmoderate( return (rc); } - __checkReturn int -efx_ev_qcreate( +static __checkReturn int +falconsiena_ev_qcreate( __in efx_nic_t *enp, __in unsigned int index, __in efsys_mem_t *esmp, __in size_t n, __in uint32_t id, - __deref_out efx_evq_t **eepp) + __in efx_evq_t *eep) { efx_nic_cfg_t *encp = &(enp->en_nic_cfg); uint32_t size; - efx_evq_t *eep; efx_oword_t oword; int rc; - EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_EV); + EFX_STATIC_ASSERT(ISP2(EFX_EVQ_MAXNEVS)); + EFX_STATIC_ASSERT(ISP2(EFX_EVQ_MINNEVS)); - EFSYS_ASSERT3U(enp->en_ev_qcount + 1, <, encp->enc_evq_limit); - - if (!ISP2(n) || !(n & EFX_EVQ_NEVS_MASK)) { + if (!ISP2(n) || (n < EFX_EVQ_MINNEVS) || (n > EFX_EVQ_MAXNEVS)) { rc = EINVAL; goto fail1; } @@ -949,46 +1320,29 @@ efx_ev_qcreate( goto fail4; } - /* Allocate an EVQ object */ - EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (efx_evq_t), eep); - if (eep == NULL) { - rc = ENOMEM; - goto fail5; - } - - eep->ee_magic = EFX_EVQ_MAGIC; - eep->ee_enp = enp; - eep->ee_index = index; - eep->ee_mask = n - 1; - eep->ee_esmp = esmp; - /* Set up the handler table */ - eep->ee_handler[FSE_AZ_EV_CODE_RX_EV] = efx_ev_rx; - eep->ee_handler[FSE_AZ_EV_CODE_TX_EV] = efx_ev_tx; - eep->ee_handler[FSE_AZ_EV_CODE_DRIVER_EV] = efx_ev_driver; - eep->ee_handler[FSE_AZ_EV_CODE_GLOBAL_EV] = efx_ev_global; - eep->ee_handler[FSE_AZ_EV_CODE_DRV_GEN_EV] = efx_ev_drv_gen; + eep->ee_rx = falconsiena_ev_rx; + eep->ee_tx = falconsiena_ev_tx; + eep->ee_driver = falconsiena_ev_driver; + eep->ee_global = falconsiena_ev_global; + eep->ee_drv_gen = falconsiena_ev_drv_gen; #if EFSYS_OPT_MCDI - eep->ee_handler[FSE_AZ_EV_CODE_MCDI_EVRESPONSE] = efx_ev_mcdi; + eep->ee_mcdi = falconsiena_ev_mcdi; #endif /* EFSYS_OPT_MCDI */ /* Set up the new event queue */ if (enp->en_family != EFX_FAMILY_FALCON) { EFX_POPULATE_OWORD_1(oword, FRF_CZ_TIMER_Q_EN, 1); - EFX_BAR_TBL_WRITEO(enp, FR_AZ_TIMER_TBL, index, &oword); + EFX_BAR_TBL_WRITEO(enp, FR_AZ_TIMER_TBL, index, &oword, B_TRUE); } EFX_POPULATE_OWORD_3(oword, FRF_AZ_EVQ_EN, 1, FRF_AZ_EVQ_SIZE, size, FRF_AZ_EVQ_BUF_BASE_ID, id); - EFX_BAR_TBL_WRITEO(enp, FR_AZ_EVQ_PTR_TBL, index, &oword); + EFX_BAR_TBL_WRITEO(enp, FR_AZ_EVQ_PTR_TBL, index, &oword, B_TRUE); - enp->en_ev_qcount++; - *eepp = eep; return (0); -fail5: - EFSYS_PROBE(fail5); fail4: EFSYS_PROBE(fail4); #if EFSYS_OPT_RX_SCALE @@ -1003,14 +1357,15 @@ efx_ev_qcreate( return (rc); } +#endif /* EFSYS_OPT_FALCON || EFSYS_OPT_SIENA */ + #if EFSYS_OPT_QSTATS #if EFSYS_OPT_NAMES -/* START MKCONFIG GENERATED EfxEventQueueStatNamesBlock 67e9bdcd920059bd */ -static const char __cs * __cs __efx_ev_qstat_name[] = { +/* START MKCONFIG GENERATED EfxEventQueueStatNamesBlock b693ddf85aee1bfd */ +static const char *__efx_ev_qstat_name[] = { "all", "rx", "rx_ok", - "rx_recovery", "rx_frm_trunc", "rx_tobe_disc", "rx_pause_frm_err", @@ -1028,16 +1383,14 @@ static const char __cs * __cs __efx_ev_qstat_name[] = { "rx_other_ipv4", "rx_other_ipv6", "rx_non_ip", - "rx_overrun", + "rx_batch", "tx", "tx_wq_ff_full", "tx_pkt_err", "tx_pkt_too_big", "tx_unexpected", "global", - "global_phy", "global_mnt", - "global_rx_recovery", "driver", "driver_srm_upd_done", "driver_tx_descq_fls_done", @@ -1050,7 +1403,7 @@ static const char __cs * __cs __efx_ev_qstat_name[] = { }; /* END MKCONFIG GENERATED EfxEventQueueStatNamesBlock */ - const char __cs * + const char * efx_ev_qstat_name( __in efx_nic_t *enp, __in unsigned int id) @@ -1063,16 +1416,16 @@ efx_ev_qstat_name( #endif /* EFSYS_OPT_NAMES */ #endif /* EFSYS_OPT_QSTATS */ +#if EFSYS_OPT_FALCON || EFSYS_OPT_SIENA + #if EFSYS_OPT_QSTATS - void -efx_ev_qstats_update( +static void +falconsiena_ev_qstats_update( __in efx_evq_t *eep, __inout_ecount(EV_NQSTATS) efsys_stat_t *stat) { unsigned int id; - EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC); - for (id = 0; id < EV_NQSTATS; id++) { efsys_stat_t *essp = &stat[id]; @@ -1082,44 +1435,31 @@ efx_ev_qstats_update( } #endif /* EFSYS_OPT_QSTATS */ - void -efx_ev_qdestroy( +static void +falconsiena_ev_qdestroy( __in efx_evq_t *eep) { efx_nic_t *enp = eep->ee_enp; efx_oword_t oword; - EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC); - - EFSYS_ASSERT(enp->en_ev_qcount != 0); - --enp->en_ev_qcount; - /* Purge event queue */ EFX_ZERO_OWORD(oword); EFX_BAR_TBL_WRITEO(enp, FR_AZ_EVQ_PTR_TBL, - eep->ee_index, &oword); + eep->ee_index, &oword, B_TRUE); if (enp->en_family != EFX_FAMILY_FALCON) { EFX_ZERO_OWORD(oword); EFX_BAR_TBL_WRITEO(enp, FR_AZ_TIMER_TBL, - eep->ee_index, &oword); + eep->ee_index, &oword, B_TRUE); } - - /* Free the EVQ object */ - EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_evq_t), eep); } - void -efx_ev_fini( +static void +falconsiena_ev_fini( __in efx_nic_t *enp) { - EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_EV); - EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_RX)); - EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_TX)); - EFSYS_ASSERT3U(enp->en_ev_qcount, ==, 0); - - enp->en_mod_flags &= ~EFX_MOD_EV; + _NOTE(ARGUNUSED(enp)) } + +#endif /* EFSYS_OPT_FALCON || EFSYS_OPT_SIENA */ diff --git a/sys/dev/sfxge/common/efx_filter.c b/sys/dev/sfxge/common/efx_filter.c index e8455db47c32..7ae7ea583e8f 100644 --- a/sys/dev/sfxge/common/efx_filter.c +++ b/sys/dev/sfxge/common/efx_filter.c @@ -1,26 +1,31 @@ /*- - * Copyright 2007-2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2007-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -35,24 +40,569 @@ __FBSDID("$FreeBSD$"); #if EFSYS_OPT_FILTER -/* "Fudge factors" - difference between programmed value and actual depth. +#if EFSYS_OPT_FALCON || EFSYS_OPT_SIENA + +static __checkReturn int +falconsiena_filter_init( + __in efx_nic_t *enp); + +static void +falconsiena_filter_fini( + __in efx_nic_t *enp); + +static __checkReturn int +falconsiena_filter_restore( + __in efx_nic_t *enp); + +static __checkReturn int +falconsiena_filter_add( + __in efx_nic_t *enp, + __inout efx_filter_spec_t *spec, + __in boolean_t may_replace); + +static __checkReturn int +falconsiena_filter_delete( + __in efx_nic_t *enp, + __inout efx_filter_spec_t *spec); + +static __checkReturn int +falconsiena_filter_supported_filters( + __in efx_nic_t *enp, + __out uint32_t *list, + __out size_t *length); + +#endif /* EFSYS_OPT_FALCON || EFSYS_OPT_SIENA */ + +#if EFSYS_OPT_FALCON +static efx_filter_ops_t __efx_filter_falcon_ops = { + falconsiena_filter_init, /* efo_init */ + falconsiena_filter_fini, /* efo_fini */ + falconsiena_filter_restore, /* efo_restore */ + falconsiena_filter_add, /* efo_add */ + falconsiena_filter_delete, /* efo_delete */ + falconsiena_filter_supported_filters, /* efo_supported_filters */ + NULL, /* efo_reconfigure */ +}; +#endif /* EFSYS_OPT_FALCON */ + +#if EFSYS_OPT_SIENA +static efx_filter_ops_t __efx_filter_siena_ops = { + falconsiena_filter_init, /* efo_init */ + falconsiena_filter_fini, /* efo_fini */ + falconsiena_filter_restore, /* efo_restore */ + falconsiena_filter_add, /* efo_add */ + falconsiena_filter_delete, /* efo_delete */ + falconsiena_filter_supported_filters, /* efo_supported_filters */ + NULL, /* efo_reconfigure */ +}; +#endif /* EFSYS_OPT_SIENA */ + +#if EFSYS_OPT_HUNTINGTON +static efx_filter_ops_t __efx_filter_hunt_ops = { + hunt_filter_init, /* efo_init */ + hunt_filter_fini, /* efo_fini */ + hunt_filter_restore, /* efo_restore */ + hunt_filter_add, /* efo_add */ + hunt_filter_delete, /* efo_delete */ + hunt_filter_supported_filters, /* efo_supported_filters */ + hunt_filter_reconfigure, /* efo_reconfigure */ +}; +#endif /* EFSYS_OPT_HUNTINGTON */ + + __checkReturn int +efx_filter_insert( + __in efx_nic_t *enp, + __inout efx_filter_spec_t *spec) +{ + efx_filter_ops_t *efop = enp->en_efop; + + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_FILTER); + EFSYS_ASSERT3P(spec, !=, NULL); + EFSYS_ASSERT3U(spec->efs_flags, &, EFX_FILTER_FLAG_RX); + + return (efop->efo_add(enp, spec, B_FALSE)); +} + + __checkReturn int +efx_filter_remove( + __in efx_nic_t *enp, + __inout efx_filter_spec_t *spec) +{ + efx_filter_ops_t *efop = enp->en_efop; + + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_FILTER); + EFSYS_ASSERT3P(spec, !=, NULL); + EFSYS_ASSERT3U(spec->efs_flags, &, EFX_FILTER_FLAG_RX); + +#if EFSYS_OPT_RX_SCALE + spec->efs_rss_context = enp->en_rss_context; +#endif + + return (efop->efo_delete(enp, spec)); +} + + __checkReturn int +efx_filter_restore( + __in efx_nic_t *enp) +{ + int rc; + + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_FILTER); + + if ((rc = enp->en_efop->efo_restore(enp)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +efx_filter_init( + __in efx_nic_t *enp) +{ + efx_filter_ops_t *efop; + int rc; + + /* Check that efx_filter_spec_t is 64 bytes. */ + EFX_STATIC_ASSERT(sizeof (efx_filter_spec_t) == 64); + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE); + EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_FILTER)); + + switch (enp->en_family) { +#if EFSYS_OPT_FALCON + case EFX_FAMILY_FALCON: + efop = (efx_filter_ops_t *)&__efx_filter_falcon_ops; + break; +#endif /* EFSYS_OPT_FALCON */ + +#if EFSYS_OPT_SIENA + case EFX_FAMILY_SIENA: + efop = (efx_filter_ops_t *)&__efx_filter_siena_ops; + break; +#endif /* EFSYS_OPT_SIENA */ + +#if EFSYS_OPT_HUNTINGTON + case EFX_FAMILY_HUNTINGTON: + efop = (efx_filter_ops_t *)&__efx_filter_hunt_ops; + break; +#endif /* EFSYS_OPT_HUNTINGTON */ + + default: + EFSYS_ASSERT(0); + rc = ENOTSUP; + goto fail1; + } + + if ((rc = efop->efo_init(enp)) != 0) + goto fail2; + + enp->en_efop = efop; + enp->en_mod_flags |= EFX_MOD_FILTER; + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + enp->en_efop = NULL; + enp->en_mod_flags &= ~EFX_MOD_FILTER; + return (rc); +} + + void +efx_filter_fini( + __in efx_nic_t *enp) +{ + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_FILTER); + + enp->en_efop->efo_fini(enp); + + enp->en_efop = NULL; + enp->en_mod_flags &= ~EFX_MOD_FILTER; +} + + __checkReturn int +efx_filter_supported_filters( + __in efx_nic_t *enp, + __out uint32_t *list, + __out size_t *length) +{ + int rc; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_FILTER); + EFSYS_ASSERT(enp->en_efop->efo_supported_filters != NULL); + + if ((rc = enp->en_efop->efo_supported_filters(enp, list, length)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +efx_filter_reconfigure( + __in efx_nic_t *enp, + __in_ecount(6) uint8_t const *mac_addr, + __in boolean_t all_unicst, + __in boolean_t mulcst, + __in boolean_t all_mulcst, + __in boolean_t brdcst, + __in_ecount(6*count) uint8_t const *addrs, + __in int count) +{ + int rc; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_FILTER); + + if (enp->en_efop->efo_reconfigure != NULL) { + if ((rc = enp->en_efop->efo_reconfigure(enp, mac_addr, + all_unicst, mulcst, + all_mulcst, brdcst, + addrs, count)) != 0) + goto fail1; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + void +efx_filter_spec_init_rx( + __inout efx_filter_spec_t *spec, + __in efx_filter_priority_t priority, + __in efx_filter_flag_t flags, + __in efx_rxq_t *erp) +{ + EFSYS_ASSERT3P(spec, !=, NULL); + EFSYS_ASSERT3P(erp, !=, NULL); + EFSYS_ASSERT((flags & ~(EFX_FILTER_FLAG_RX_RSS | + EFX_FILTER_FLAG_RX_SCATTER)) == 0); + + memset(spec, 0, sizeof (*spec)); + spec->efs_priority = priority; + spec->efs_flags = EFX_FILTER_FLAG_RX | flags; + spec->efs_rss_context = EFX_FILTER_SPEC_RSS_CONTEXT_DEFAULT; + spec->efs_dmaq_id = (uint16_t)erp->er_index; +} + + void +efx_filter_spec_init_tx( + __inout efx_filter_spec_t *spec, + __in efx_txq_t *etp) +{ + EFSYS_ASSERT3P(spec, !=, NULL); + EFSYS_ASSERT3P(etp, !=, NULL); + + memset(spec, 0, sizeof (*spec)); + spec->efs_priority = EFX_FILTER_PRI_REQUIRED; + spec->efs_flags = EFX_FILTER_FLAG_TX; + spec->efs_dmaq_id = (uint16_t)etp->et_index; +} + + +/* + * Specify IPv4 host, transport protocol and port in a filter specification + */ +__checkReturn int +efx_filter_spec_set_ipv4_local( + __inout efx_filter_spec_t *spec, + __in uint8_t proto, + __in uint32_t host, + __in uint16_t port) +{ + EFSYS_ASSERT3P(spec, !=, NULL); + + spec->efs_match_flags |= + EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO | + EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT; + spec->efs_ether_type = EFX_ETHER_TYPE_IPV4; + spec->efs_ip_proto = proto; + spec->efs_loc_host.eo_u32[0] = host; + spec->efs_loc_port = port; + return (0); +} + +/* + * Specify IPv4 hosts, transport protocol and ports in a filter specification + */ +__checkReturn int +efx_filter_spec_set_ipv4_full( + __inout efx_filter_spec_t *spec, + __in uint8_t proto, + __in uint32_t lhost, + __in uint16_t lport, + __in uint32_t rhost, + __in uint16_t rport) +{ + EFSYS_ASSERT3P(spec, !=, NULL); + + spec->efs_match_flags |= + EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO | + EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT | + EFX_FILTER_MATCH_REM_HOST | EFX_FILTER_MATCH_REM_PORT; + spec->efs_ether_type = EFX_ETHER_TYPE_IPV4; + spec->efs_ip_proto = proto; + spec->efs_loc_host.eo_u32[0] = lhost; + spec->efs_loc_port = lport; + spec->efs_rem_host.eo_u32[0] = rhost; + spec->efs_rem_port = rport; + return (0); +} + +/* + * Specify local Ethernet address and/or VID in filter specification + */ +__checkReturn int +efx_filter_spec_set_eth_local( + __inout efx_filter_spec_t *spec, + __in uint16_t vid, + __in const uint8_t *addr) +{ + EFSYS_ASSERT3P(spec, !=, NULL); + EFSYS_ASSERT3P(addr, !=, NULL); + + if (vid == EFX_FILTER_SPEC_VID_UNSPEC && addr == NULL) + return (EINVAL); + + if (vid != EFX_FILTER_SPEC_VID_UNSPEC) { + spec->efs_match_flags |= EFX_FILTER_MATCH_OUTER_VID; + spec->efs_outer_vid = vid; + } + if (addr != NULL) { + spec->efs_match_flags |= EFX_FILTER_MATCH_LOC_MAC; + memcpy(spec->efs_loc_mac, addr, EFX_MAC_ADDR_LEN); + } + return (0); +} + +/* + * Specify matching otherwise-unmatched unicast in a filter specification + */ +__checkReturn int +efx_filter_spec_set_uc_def( + __inout efx_filter_spec_t *spec) +{ + EFSYS_ASSERT3P(spec, !=, NULL); + + spec->efs_match_flags |= EFX_FILTER_MATCH_LOC_MAC_IG; + return (0); +} + +/* + * Specify matching otherwise-unmatched multicast in a filter specification + */ +__checkReturn int +efx_filter_spec_set_mc_def( + __inout efx_filter_spec_t *spec) +{ + EFSYS_ASSERT3P(spec, !=, NULL); + + spec->efs_match_flags |= EFX_FILTER_MATCH_LOC_MAC_IG; + spec->efs_loc_mac[0] = 1; + return (0); +} + + + +#if EFSYS_OPT_FALCON || EFSYS_OPT_SIENA + +/* + * "Fudge factors" - difference between programmed value and actual depth. * Due to pipelined implementation we need to program H/W with a value that * is larger than the hop limit we want. */ -#define FILTER_CTL_SRCH_FUDGE_WILD 3 -#define FILTER_CTL_SRCH_FUDGE_FULL 1 +#define FILTER_CTL_SRCH_FUDGE_WILD 3 +#define FILTER_CTL_SRCH_FUDGE_FULL 1 -/* Hard maximum hop limit. Hardware will time-out beyond 200-something. +/* + * Hard maximum hop limit. Hardware will time-out beyond 200-something. * We also need to avoid infinite loops in efx_filter_search() when the * table is full. */ -#define FILTER_CTL_SRCH_MAX 200 +#define FILTER_CTL_SRCH_MAX 200 -/* The filter hash function is LFSR polynomial x^16 + x^3 + 1 of a 32-bit - * key derived from the n-tuple. */ +static __checkReturn int +falconsiena_filter_spec_from_gen_spec( + __out falconsiena_filter_spec_t *fs_spec, + __in efx_filter_spec_t *gen_spec) +{ + int rc; + boolean_t is_full = B_FALSE; + + if (gen_spec->efs_flags & EFX_FILTER_FLAG_TX) + EFSYS_ASSERT3U(gen_spec->efs_flags, ==, EFX_FILTER_FLAG_TX); + else + EFSYS_ASSERT3U(gen_spec->efs_flags, &, EFX_FILTER_FLAG_RX); + + /* Falconsiena only has one RSS context */ + if ((gen_spec->efs_flags & EFX_FILTER_FLAG_RX_RSS) && + gen_spec->efs_rss_context != 0) { + rc = EINVAL; + goto fail1; + } + + fs_spec->fsfs_flags = gen_spec->efs_flags; + fs_spec->fsfs_dmaq_id = gen_spec->efs_dmaq_id; + + switch (gen_spec->efs_match_flags) { + case EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO | + EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT | + EFX_FILTER_MATCH_REM_HOST | EFX_FILTER_MATCH_REM_PORT: + is_full = B_TRUE; + /* Fall through */ + case EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO | + EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT: { + uint32_t rhost, host1, host2; + uint16_t rport, port1, port2; + + if (gen_spec->efs_ether_type != EFX_ETHER_TYPE_IPV4) { + rc = ENOTSUP; + goto fail2; + } + if (gen_spec->efs_loc_port == 0 || + (is_full && gen_spec->efs_rem_port == 0)) { + rc = EINVAL; + goto fail3; + } + switch (gen_spec->efs_ip_proto) { + case EFX_IPPROTO_TCP: + if (gen_spec->efs_flags & EFX_FILTER_FLAG_TX) { + fs_spec->fsfs_type = (is_full ? + EFX_FS_FILTER_TX_TCP_FULL : + EFX_FS_FILTER_TX_TCP_WILD); + } else { + fs_spec->fsfs_type = (is_full ? + EFX_FS_FILTER_RX_TCP_FULL : + EFX_FS_FILTER_RX_TCP_WILD); + } + break; + case EFX_IPPROTO_UDP: + if (gen_spec->efs_flags & EFX_FILTER_FLAG_TX) { + fs_spec->fsfs_type = (is_full ? + EFX_FS_FILTER_TX_UDP_FULL : + EFX_FS_FILTER_TX_UDP_WILD); + } else { + fs_spec->fsfs_type = (is_full ? + EFX_FS_FILTER_RX_UDP_FULL : + EFX_FS_FILTER_RX_UDP_WILD); + } + break; + default: + rc = ENOTSUP; + goto fail4; + } + /* + * The filter is constructed in terms of source and destination, + * with the odd wrinkle that the ports are swapped in a UDP + * wildcard filter. We need to convert from local and remote + * addresses (zero for a wildcard). + */ + rhost = is_full ? gen_spec->efs_rem_host.eo_u32[0] : 0; + rport = is_full ? gen_spec->efs_rem_port : 0; + if (gen_spec->efs_flags & EFX_FILTER_FLAG_TX) { + host1 = gen_spec->efs_loc_host.eo_u32[0]; + host2 = rhost; + } else { + host1 = rhost; + host2 = gen_spec->efs_loc_host.eo_u32[0]; + } + if (gen_spec->efs_flags & EFX_FILTER_FLAG_TX) { + if (fs_spec->fsfs_type == EFX_FS_FILTER_TX_UDP_WILD) { + port1 = rport; + port2 = gen_spec->efs_loc_port; + } else { + port1 = gen_spec->efs_loc_port; + port2 = rport; + } + } else { + if (fs_spec->fsfs_type == EFX_FS_FILTER_RX_UDP_WILD) { + port1 = gen_spec->efs_loc_port; + port2 = rport; + } else { + port1 = rport; + port2 = gen_spec->efs_loc_port; + } + } + fs_spec->fsfs_dword[0] = (host1 << 16) | port1; + fs_spec->fsfs_dword[1] = (port2 << 16) | (host1 >> 16); + fs_spec->fsfs_dword[2] = host2; + break; + } + + case EFX_FILTER_MATCH_LOC_MAC | EFX_FILTER_MATCH_OUTER_VID: + is_full = B_TRUE; + /* Fall through */ + case EFX_FILTER_MATCH_LOC_MAC: + if (gen_spec->efs_flags & EFX_FILTER_FLAG_TX) { + fs_spec->fsfs_type = (is_full ? + EFX_FS_FILTER_TX_MAC_FULL : + EFX_FS_FILTER_TX_MAC_WILD); + } else { + fs_spec->fsfs_type = (is_full ? + EFX_FS_FILTER_RX_MAC_FULL : + EFX_FS_FILTER_RX_MAC_WILD); + } + fs_spec->fsfs_dword[0] = is_full ? gen_spec->efs_outer_vid : 0; + fs_spec->fsfs_dword[1] = + gen_spec->efs_loc_mac[2] << 24 | + gen_spec->efs_loc_mac[3] << 16 | + gen_spec->efs_loc_mac[4] << 8 | + gen_spec->efs_loc_mac[5]; + fs_spec->fsfs_dword[2] = + gen_spec->efs_loc_mac[0] << 8 | + gen_spec->efs_loc_mac[1]; + break; + + default: + EFSYS_ASSERT(B_FALSE); + rc = ENOTSUP; + goto fail5; + } + + return (0); + +fail5: + EFSYS_PROBE(fail5); +fail4: + EFSYS_PROBE(fail4); +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +/* + * The filter hash function is LFSR polynomial x^16 + x^3 + 1 of a 32-bit + * key derived from the n-tuple. + */ static uint16_t -efx_filter_tbl_hash( - __in uint32_t key) +falconsiena_filter_tbl_hash( + __in uint32_t key) { uint16_t tmp; @@ -69,119 +619,119 @@ efx_filter_tbl_hash( return (tmp); } - -/* To allow for hash collisions, filter search continues at these - * increments from the first possible entry selected by the hash. */ +/* + * To allow for hash collisions, filter search continues at these + * increments from the first possible entry selected by the hash. + */ static uint16_t -efx_filter_tbl_increment( +falconsiena_filter_tbl_increment( __in uint32_t key) { return ((uint16_t)(key * 2 - 1)); } static __checkReturn boolean_t -efx_filter_test_used( - __in efx_filter_tbl_t *eftp, +falconsiena_filter_test_used( + __in falconsiena_filter_tbl_t *fsftp, __in unsigned int index) { - EFSYS_ASSERT3P(eftp->eft_bitmap, !=, NULL); - return ((eftp->eft_bitmap[index / 32] & (1 << (index % 32))) != 0); + EFSYS_ASSERT3P(fsftp->fsft_bitmap, !=, NULL); + return ((fsftp->fsft_bitmap[index / 32] & (1 << (index % 32))) != 0); } static void -efx_filter_set_used( - __in efx_filter_tbl_t *eftp, +falconsiena_filter_set_used( + __in falconsiena_filter_tbl_t *fsftp, __in unsigned int index) { - EFSYS_ASSERT3P(eftp->eft_bitmap, !=, NULL); - eftp->eft_bitmap[index / 32] |= (1 << (index % 32)); - ++eftp->eft_used; + EFSYS_ASSERT3P(fsftp->fsft_bitmap, !=, NULL); + fsftp->fsft_bitmap[index / 32] |= (1 << (index % 32)); + ++fsftp->fsft_used; } static void -efx_filter_clear_used( - __in efx_filter_tbl_t *eftp, +falconsiena_filter_clear_used( + __in falconsiena_filter_tbl_t *fsftp, __in unsigned int index) { - EFSYS_ASSERT3P(eftp->eft_bitmap, !=, NULL); - eftp->eft_bitmap[index / 32] &= ~(1 << (index % 32)); + EFSYS_ASSERT3P(fsftp->fsft_bitmap, !=, NULL); + fsftp->fsft_bitmap[index / 32] &= ~(1 << (index % 32)); - --eftp->eft_used; - EFSYS_ASSERT3U(eftp->eft_used, >=, 0); + --fsftp->fsft_used; + EFSYS_ASSERT3U(fsftp->fsft_used, >=, 0); } -static efx_filter_tbl_id_t -efx_filter_tbl_id( - __in efx_filter_type_t type) +static falconsiena_filter_tbl_id_t +falconsiena_filter_tbl_id( + __in falconsiena_filter_type_t type) { - efx_filter_tbl_id_t tbl_id; + falconsiena_filter_tbl_id_t tbl_id; - switch (type) - { - case EFX_FILTER_RX_TCP_FULL: - case EFX_FILTER_RX_TCP_WILD: - case EFX_FILTER_RX_UDP_FULL: - case EFX_FILTER_RX_UDP_WILD: - tbl_id = EFX_FILTER_TBL_RX_IP; + switch (type) { + case EFX_FS_FILTER_RX_TCP_FULL: + case EFX_FS_FILTER_RX_TCP_WILD: + case EFX_FS_FILTER_RX_UDP_FULL: + case EFX_FS_FILTER_RX_UDP_WILD: + tbl_id = EFX_FS_FILTER_TBL_RX_IP; break; #if EFSYS_OPT_SIENA - case EFX_FILTER_RX_MAC_FULL: - case EFX_FILTER_RX_MAC_WILD: - tbl_id = EFX_FILTER_TBL_RX_MAC; + case EFX_FS_FILTER_RX_MAC_FULL: + case EFX_FS_FILTER_RX_MAC_WILD: + tbl_id = EFX_FS_FILTER_TBL_RX_MAC; break; - case EFX_FILTER_TX_TCP_FULL: - case EFX_FILTER_TX_TCP_WILD: - case EFX_FILTER_TX_UDP_FULL: - case EFX_FILTER_TX_UDP_WILD: - tbl_id = EFX_FILTER_TBL_TX_IP; + case EFX_FS_FILTER_TX_TCP_FULL: + case EFX_FS_FILTER_TX_TCP_WILD: + case EFX_FS_FILTER_TX_UDP_FULL: + case EFX_FS_FILTER_TX_UDP_WILD: + tbl_id = EFX_FS_FILTER_TBL_TX_IP; break; - case EFX_FILTER_TX_MAC_FULL: - case EFX_FILTER_TX_MAC_WILD: - tbl_id = EFX_FILTER_TBL_RX_MAC; + case EFX_FS_FILTER_TX_MAC_FULL: + case EFX_FS_FILTER_TX_MAC_WILD: + tbl_id = EFX_FS_FILTER_TBL_TX_MAC; break; #endif /* EFSYS_OPT_SIENA */ default: EFSYS_ASSERT(B_FALSE); + tbl_id = EFX_FS_FILTER_NTBLS; break; } return (tbl_id); } static void -efx_filter_reset_search_depth( - __inout efx_filter_t *efp, - __in efx_filter_tbl_id_t tbl_id) +falconsiena_filter_reset_search_depth( + __inout falconsiena_filter_t *fsfp, + __in falconsiena_filter_tbl_id_t tbl_id) { - switch (tbl_id) - { - case EFX_FILTER_TBL_RX_IP: - efp->ef_depth[EFX_FILTER_RX_TCP_FULL] = 0; - efp->ef_depth[EFX_FILTER_RX_TCP_WILD] = 0; - efp->ef_depth[EFX_FILTER_RX_UDP_FULL] = 0; - efp->ef_depth[EFX_FILTER_RX_UDP_WILD] = 0; + switch (tbl_id) { + case EFX_FS_FILTER_TBL_RX_IP: + fsfp->fsf_depth[EFX_FS_FILTER_RX_TCP_FULL] = 0; + fsfp->fsf_depth[EFX_FS_FILTER_RX_TCP_WILD] = 0; + fsfp->fsf_depth[EFX_FS_FILTER_RX_UDP_FULL] = 0; + fsfp->fsf_depth[EFX_FS_FILTER_RX_UDP_WILD] = 0; break; #if EFSYS_OPT_SIENA - case EFX_FILTER_TBL_RX_MAC: - efp->ef_depth[EFX_FILTER_RX_MAC_FULL] = 0; - efp->ef_depth[EFX_FILTER_RX_MAC_WILD] = 0; + case EFX_FS_FILTER_TBL_RX_MAC: + fsfp->fsf_depth[EFX_FS_FILTER_RX_MAC_FULL] = 0; + fsfp->fsf_depth[EFX_FS_FILTER_RX_MAC_WILD] = 0; break; - case EFX_FILTER_TBL_TX_IP: - efp->ef_depth[EFX_FILTER_TX_TCP_FULL] = 0; - efp->ef_depth[EFX_FILTER_TX_TCP_WILD] = 0; - efp->ef_depth[EFX_FILTER_TX_UDP_FULL] = 0; - efp->ef_depth[EFX_FILTER_TX_UDP_WILD] = 0; + case EFX_FS_FILTER_TBL_TX_IP: + fsfp->fsf_depth[EFX_FS_FILTER_TX_TCP_FULL] = 0; + fsfp->fsf_depth[EFX_FS_FILTER_TX_TCP_WILD] = 0; + fsfp->fsf_depth[EFX_FS_FILTER_TX_UDP_FULL] = 0; + fsfp->fsf_depth[EFX_FS_FILTER_TX_UDP_WILD] = 0; break; - case EFX_FILTER_TBL_TX_MAC: - efp->ef_depth[EFX_FILTER_TX_MAC_FULL] = 0; - efp->ef_depth[EFX_FILTER_TX_MAC_WILD] = 0; + case EFX_FS_FILTER_TBL_TX_MAC: + fsfp->fsf_depth[EFX_FS_FILTER_TX_MAC_FULL] = 0; + fsfp->fsf_depth[EFX_FS_FILTER_TX_MAC_WILD] = 0; break; #endif /* EFSYS_OPT_SIENA */ @@ -192,36 +742,36 @@ efx_filter_reset_search_depth( } static void -efx_filter_push_rx_limits( +falconsiena_filter_push_rx_limits( __in efx_nic_t *enp) { - efx_filter_t *efp = &enp->en_filter; + falconsiena_filter_t *fsfp = enp->en_filter.ef_falconsiena_filter; efx_oword_t oword; EFX_BAR_READO(enp, FR_AZ_RX_FILTER_CTL_REG, &oword); EFX_SET_OWORD_FIELD(oword, FRF_AZ_TCP_FULL_SRCH_LIMIT, - efp->ef_depth[EFX_FILTER_RX_TCP_FULL] + + fsfp->fsf_depth[EFX_FS_FILTER_RX_TCP_FULL] + FILTER_CTL_SRCH_FUDGE_FULL); EFX_SET_OWORD_FIELD(oword, FRF_AZ_TCP_WILD_SRCH_LIMIT, - efp->ef_depth[EFX_FILTER_RX_TCP_WILD] + + fsfp->fsf_depth[EFX_FS_FILTER_RX_TCP_WILD] + FILTER_CTL_SRCH_FUDGE_WILD); EFX_SET_OWORD_FIELD(oword, FRF_AZ_UDP_FULL_SRCH_LIMIT, - efp->ef_depth[EFX_FILTER_RX_UDP_FULL] + + fsfp->fsf_depth[EFX_FS_FILTER_RX_UDP_FULL] + FILTER_CTL_SRCH_FUDGE_FULL); EFX_SET_OWORD_FIELD(oword, FRF_AZ_UDP_WILD_SRCH_LIMIT, - efp->ef_depth[EFX_FILTER_RX_UDP_WILD] + + fsfp->fsf_depth[EFX_FS_FILTER_RX_UDP_WILD] + FILTER_CTL_SRCH_FUDGE_WILD); #if EFSYS_OPT_SIENA - if (efp->ef_tbl[EFX_FILTER_TBL_RX_MAC].eft_size) { + if (fsfp->fsf_tbl[EFX_FS_FILTER_TBL_RX_MAC].fsft_size) { EFX_SET_OWORD_FIELD(oword, FRF_CZ_ETHERNET_FULL_SEARCH_LIMIT, - efp->ef_depth[EFX_FILTER_RX_MAC_FULL] + + fsfp->fsf_depth[EFX_FS_FILTER_RX_MAC_FULL] + FILTER_CTL_SRCH_FUDGE_FULL); EFX_SET_OWORD_FIELD(oword, FRF_CZ_ETHERNET_WILDCARD_SEARCH_LIMIT, - efp->ef_depth[EFX_FILTER_RX_MAC_WILD] + + fsfp->fsf_depth[EFX_FS_FILTER_RX_MAC_WILD] + FILTER_CTL_SRCH_FUDGE_WILD); } #endif /* EFSYS_OPT_SIENA */ @@ -230,150 +780,177 @@ efx_filter_push_rx_limits( } static void -efx_filter_push_tx_limits( +falconsiena_filter_push_tx_limits( __in efx_nic_t *enp) { - efx_filter_t *efp = &enp->en_filter; + falconsiena_filter_t *fsfp = enp->en_filter.ef_falconsiena_filter; efx_oword_t oword; - if (efp->ef_tbl[EFX_FILTER_TBL_TX_IP].eft_size == 0) - return; - EFX_BAR_READO(enp, FR_AZ_TX_CFG_REG, &oword); - EFX_SET_OWORD_FIELD(oword, FRF_CZ_TX_TCPIP_FILTER_FULL_SEARCH_RANGE, - efp->ef_depth[EFX_FILTER_TX_TCP_FULL] + - FILTER_CTL_SRCH_FUDGE_FULL); - EFX_SET_OWORD_FIELD(oword, FRF_CZ_TX_TCPIP_FILTER_WILD_SEARCH_RANGE, - efp->ef_depth[EFX_FILTER_TX_TCP_WILD] + - FILTER_CTL_SRCH_FUDGE_WILD); - EFX_SET_OWORD_FIELD(oword, FRF_CZ_TX_UDPIP_FILTER_FULL_SEARCH_RANGE, - efp->ef_depth[EFX_FILTER_TX_UDP_FULL] + - FILTER_CTL_SRCH_FUDGE_FULL); - EFX_SET_OWORD_FIELD(oword, FRF_CZ_TX_UDPIP_FILTER_WILD_SEARCH_RANGE, - efp->ef_depth[EFX_FILTER_TX_UDP_WILD] + - FILTER_CTL_SRCH_FUDGE_WILD); + if (fsfp->fsf_tbl[EFX_FS_FILTER_TBL_TX_IP].fsft_size != 0) { + EFX_SET_OWORD_FIELD(oword, + FRF_CZ_TX_TCPIP_FILTER_FULL_SEARCH_RANGE, + fsfp->fsf_depth[EFX_FS_FILTER_TX_TCP_FULL] + + FILTER_CTL_SRCH_FUDGE_FULL); + EFX_SET_OWORD_FIELD(oword, + FRF_CZ_TX_TCPIP_FILTER_WILD_SEARCH_RANGE, + fsfp->fsf_depth[EFX_FS_FILTER_TX_TCP_WILD] + + FILTER_CTL_SRCH_FUDGE_WILD); + EFX_SET_OWORD_FIELD(oword, + FRF_CZ_TX_UDPIP_FILTER_FULL_SEARCH_RANGE, + fsfp->fsf_depth[EFX_FS_FILTER_TX_UDP_FULL] + + FILTER_CTL_SRCH_FUDGE_FULL); + EFX_SET_OWORD_FIELD(oword, + FRF_CZ_TX_UDPIP_FILTER_WILD_SEARCH_RANGE, + fsfp->fsf_depth[EFX_FS_FILTER_TX_UDP_WILD] + + FILTER_CTL_SRCH_FUDGE_WILD); + } + + if (fsfp->fsf_tbl[EFX_FS_FILTER_TBL_TX_MAC].fsft_size != 0) { + EFX_SET_OWORD_FIELD( + oword, FRF_CZ_TX_ETH_FILTER_FULL_SEARCH_RANGE, + fsfp->fsf_depth[EFX_FS_FILTER_TX_MAC_FULL] + + FILTER_CTL_SRCH_FUDGE_FULL); + EFX_SET_OWORD_FIELD( + oword, FRF_CZ_TX_ETH_FILTER_WILD_SEARCH_RANGE, + fsfp->fsf_depth[EFX_FS_FILTER_TX_MAC_WILD] + + FILTER_CTL_SRCH_FUDGE_WILD); + } EFX_BAR_WRITEO(enp, FR_AZ_TX_CFG_REG, &oword); } /* Build a filter entry and return its n-tuple key. */ static __checkReturn uint32_t -efx_filter_build( +falconsiena_filter_build( __out efx_oword_t *filter, - __in efx_filter_spec_t *spec) + __in falconsiena_filter_spec_t *spec) { uint32_t dword3; uint32_t key; - uint8_t type = spec->efs_type; - uint8_t flags = spec->efs_flags; + uint8_t type = spec->fsfs_type; + uint32_t flags = spec->fsfs_flags; - switch (efx_filter_tbl_id(type)) { - case EFX_FILTER_TBL_RX_IP: { - boolean_t is_udp = (type == EFX_FILTER_RX_UDP_FULL || - type == EFX_FILTER_RX_UDP_WILD); + switch (falconsiena_filter_tbl_id(type)) { + case EFX_FS_FILTER_TBL_RX_IP: { + boolean_t is_udp = (type == EFX_FS_FILTER_RX_UDP_FULL || + type == EFX_FS_FILTER_RX_UDP_WILD); EFX_POPULATE_OWORD_7(*filter, - FRF_BZ_RSS_EN, (flags & EFX_FILTER_FLAG_RX_RSS) ? 1 : 0, - FRF_BZ_SCATTER_EN, (flags & EFX_FILTER_FLAG_RX_SCATTER) ? 1 : 0, + FRF_BZ_RSS_EN, + (flags & EFX_FILTER_FLAG_RX_RSS) ? 1 : 0, + FRF_BZ_SCATTER_EN, + (flags & EFX_FILTER_FLAG_RX_SCATTER) ? 1 : 0, FRF_AZ_TCP_UDP, is_udp, - FRF_AZ_RXQ_ID, spec->efs_dmaq_id, - EFX_DWORD_2, spec->efs_dword[2], - EFX_DWORD_1, spec->efs_dword[1], - EFX_DWORD_0, spec->efs_dword[0]); + FRF_AZ_RXQ_ID, spec->fsfs_dmaq_id, + EFX_DWORD_2, spec->fsfs_dword[2], + EFX_DWORD_1, spec->fsfs_dword[1], + EFX_DWORD_0, spec->fsfs_dword[0]); dword3 = is_udp; break; } #if EFSYS_OPT_SIENA - case EFX_FILTER_TBL_RX_MAC: { - boolean_t is_wild = (type == EFX_FILTER_RX_MAC_WILD); - EFX_POPULATE_OWORD_8(*filter, - FRF_CZ_RMFT_RSS_EN, (flags & EFX_FILTER_FLAG_RX_RSS) ? 1 : 0, - FRF_CZ_RMFT_SCATTER_EN, (flags & EFX_FILTER_FLAG_RX_SCATTER) ? 1 : 0, - FRF_CZ_RMFT_IP_OVERRIDE, (flags & EFX_FILTER_FLAG_RX_OVERRIDE_IP) ? 1 : 0, - FRF_CZ_RMFT_RXQ_ID, spec->efs_dmaq_id, + case EFX_FS_FILTER_TBL_RX_MAC: { + boolean_t is_wild = (type == EFX_FS_FILTER_RX_MAC_WILD); + EFX_POPULATE_OWORD_7(*filter, + FRF_CZ_RMFT_RSS_EN, + (flags & EFX_FILTER_FLAG_RX_RSS) ? 1 : 0, + FRF_CZ_RMFT_SCATTER_EN, + (flags & EFX_FILTER_FLAG_RX_SCATTER) ? 1 : 0, + FRF_CZ_RMFT_RXQ_ID, spec->fsfs_dmaq_id, FRF_CZ_RMFT_WILDCARD_MATCH, is_wild, - FRF_CZ_RMFT_DEST_MAC_DW1, spec->efs_dword[2], - FRF_CZ_RMFT_DEST_MAC_DW0, spec->efs_dword[1], - FRF_CZ_RMFT_VLAN_ID, spec->efs_dword[0]); + FRF_CZ_RMFT_DEST_MAC_DW1, spec->fsfs_dword[2], + FRF_CZ_RMFT_DEST_MAC_DW0, spec->fsfs_dword[1], + FRF_CZ_RMFT_VLAN_ID, spec->fsfs_dword[0]); dword3 = is_wild; break; } #endif /* EFSYS_OPT_SIENA */ - case EFX_FILTER_TBL_TX_IP: { - boolean_t is_udp = (type == EFX_FILTER_TX_UDP_FULL || - type == EFX_FILTER_TX_UDP_WILD); + case EFX_FS_FILTER_TBL_TX_IP: { + boolean_t is_udp = (type == EFX_FS_FILTER_TX_UDP_FULL || + type == EFX_FS_FILTER_TX_UDP_WILD); EFX_POPULATE_OWORD_5(*filter, FRF_CZ_TIFT_TCP_UDP, is_udp, - FRF_CZ_TIFT_TXQ_ID, spec->efs_dmaq_id, - EFX_DWORD_2, spec->efs_dword[2], - EFX_DWORD_1, spec->efs_dword[1], - EFX_DWORD_0, spec->efs_dword[0]); - dword3 = is_udp | spec->efs_dmaq_id << 1; + FRF_CZ_TIFT_TXQ_ID, spec->fsfs_dmaq_id, + EFX_DWORD_2, spec->fsfs_dword[2], + EFX_DWORD_1, spec->fsfs_dword[1], + EFX_DWORD_0, spec->fsfs_dword[0]); + dword3 = is_udp | spec->fsfs_dmaq_id << 1; break; } #if EFSYS_OPT_SIENA - case EFX_FILTER_TBL_TX_MAC: { - boolean_t is_wild = (type == EFX_FILTER_TX_MAC_WILD); + case EFX_FS_FILTER_TBL_TX_MAC: { + boolean_t is_wild = (type == EFX_FS_FILTER_TX_MAC_WILD); EFX_POPULATE_OWORD_5(*filter, - FRF_CZ_TMFT_TXQ_ID, spec->efs_dmaq_id, + FRF_CZ_TMFT_TXQ_ID, spec->fsfs_dmaq_id, FRF_CZ_TMFT_WILDCARD_MATCH, is_wild, - FRF_CZ_TMFT_SRC_MAC_DW1, spec->efs_dword[2], - FRF_CZ_TMFT_SRC_MAC_DW0, spec->efs_dword[1], - FRF_CZ_TMFT_VLAN_ID, spec->efs_dword[0]); - dword3 = is_wild | spec->efs_dmaq_id << 1; + FRF_CZ_TMFT_SRC_MAC_DW1, spec->fsfs_dword[2], + FRF_CZ_TMFT_SRC_MAC_DW0, spec->fsfs_dword[1], + FRF_CZ_TMFT_VLAN_ID, spec->fsfs_dword[0]); + dword3 = is_wild | spec->fsfs_dmaq_id << 1; break; } #endif /* EFSYS_OPT_SIENA */ default: EFSYS_ASSERT(B_FALSE); + return (0); } - key = spec->efs_dword[0] ^ spec->efs_dword[1] ^ spec->efs_dword[2] ^ dword3; + key = + spec->fsfs_dword[0] ^ + spec->fsfs_dword[1] ^ + spec->fsfs_dword[2] ^ + dword3; + return (key); } static __checkReturn int -efx_filter_push_entry( +falconsiena_filter_push_entry( __inout efx_nic_t *enp, - __in efx_filter_type_t type, + __in falconsiena_filter_type_t type, __in int index, __in efx_oword_t *eop) { int rc; - switch (type) - { - case EFX_FILTER_RX_TCP_FULL: - case EFX_FILTER_RX_TCP_WILD: - case EFX_FILTER_RX_UDP_FULL: - case EFX_FILTER_RX_UDP_WILD: - EFX_BAR_TBL_WRITEO(enp, FR_AZ_RX_FILTER_TBL0, index, eop); + switch (type) { + case EFX_FS_FILTER_RX_TCP_FULL: + case EFX_FS_FILTER_RX_TCP_WILD: + case EFX_FS_FILTER_RX_UDP_FULL: + case EFX_FS_FILTER_RX_UDP_WILD: + EFX_BAR_TBL_WRITEO(enp, FR_AZ_RX_FILTER_TBL0, index, + eop, B_TRUE); break; #if EFSYS_OPT_SIENA - case EFX_FILTER_RX_MAC_FULL: - case EFX_FILTER_RX_MAC_WILD: - EFX_BAR_TBL_WRITEO(enp, FR_CZ_RX_MAC_FILTER_TBL0, index, eop); + case EFX_FS_FILTER_RX_MAC_FULL: + case EFX_FS_FILTER_RX_MAC_WILD: + EFX_BAR_TBL_WRITEO(enp, FR_CZ_RX_MAC_FILTER_TBL0, index, + eop, B_TRUE); break; - case EFX_FILTER_TX_TCP_FULL: - case EFX_FILTER_TX_TCP_WILD: - case EFX_FILTER_TX_UDP_FULL: - case EFX_FILTER_TX_UDP_WILD: - EFX_BAR_TBL_WRITEO(enp, FR_CZ_TX_FILTER_TBL0, index, eop); + case EFX_FS_FILTER_TX_TCP_FULL: + case EFX_FS_FILTER_TX_TCP_WILD: + case EFX_FS_FILTER_TX_UDP_FULL: + case EFX_FS_FILTER_TX_UDP_WILD: + EFX_BAR_TBL_WRITEO(enp, FR_CZ_TX_FILTER_TBL0, index, + eop, B_TRUE); break; - case EFX_FILTER_TX_MAC_FULL: - case EFX_FILTER_TX_MAC_WILD: - EFX_BAR_TBL_WRITEO(enp, FR_CZ_TX_MAC_FILTER_TBL0, index, eop); + case EFX_FS_FILTER_TX_MAC_FULL: + case EFX_FS_FILTER_TX_MAC_WILD: + EFX_BAR_TBL_WRITEO(enp, FR_CZ_TX_MAC_FILTER_TBL0, index, + eop, B_TRUE); break; #endif /* EFSYS_OPT_SIENA */ default: + EFSYS_ASSERT(B_FALSE); rc = ENOTSUP; goto fail1; } @@ -385,30 +962,34 @@ efx_filter_push_entry( static __checkReturn boolean_t -efx_filter_equal( - __in const efx_filter_spec_t *left, - __in const efx_filter_spec_t *right) +falconsiena_filter_equal( + __in const falconsiena_filter_spec_t *left, + __in const falconsiena_filter_spec_t *right) { - efx_filter_tbl_id_t tbl_id = efx_filter_tbl_id(left->efs_type); + falconsiena_filter_tbl_id_t tbl_id; - if (left->efs_type != right->efs_type) + tbl_id = falconsiena_filter_tbl_id(left->fsfs_type); + + + if (left->fsfs_type != right->fsfs_type) return (B_FALSE); - if (memcmp(left->efs_dword, right->efs_dword, sizeof(left->efs_dword))) + if (memcmp(left->fsfs_dword, right->fsfs_dword, + sizeof (left->fsfs_dword))) return (B_FALSE); - if ((tbl_id == EFX_FILTER_TBL_TX_IP || - tbl_id == EFX_FILTER_TBL_TX_MAC) && - left->efs_dmaq_id != right->efs_dmaq_id) + if ((tbl_id == EFX_FS_FILTER_TBL_TX_IP || + tbl_id == EFX_FS_FILTER_TBL_TX_MAC) && + left->fsfs_dmaq_id != right->fsfs_dmaq_id) return (B_FALSE); return (B_TRUE); } static __checkReturn int -efx_filter_search( - __in efx_filter_tbl_t *eftp, - __in efx_filter_spec_t *spec, +falconsiena_filter_search( + __in falconsiena_filter_tbl_t *fsftp, + __in falconsiena_filter_spec_t *spec, __in uint32_t key, __in boolean_t for_insert, __out int *filter_index, @@ -416,18 +997,20 @@ efx_filter_search( { unsigned hash, incr, filter_idx, depth; - hash = efx_filter_tbl_hash(key); - incr = efx_filter_tbl_increment(key); + hash = falconsiena_filter_tbl_hash(key); + incr = falconsiena_filter_tbl_increment(key); - filter_idx = hash & (eftp->eft_size - 1); + filter_idx = hash & (fsftp->fsft_size - 1); depth = 1; for (;;) { - /* Return success if entry is used and matches this spec + /* + * Return success if entry is used and matches this spec * or entry is unused and we are trying to insert. */ - if (efx_filter_test_used(eftp, filter_idx) ? - efx_filter_equal(spec, &eftp->eft_spec[filter_idx]) : + if (falconsiena_filter_test_used(fsftp, filter_idx) ? + falconsiena_filter_equal(spec, + &fsftp->fsft_spec[filter_idx]) : for_insert) { *filter_index = filter_idx; *depth_required = depth; @@ -436,594 +1019,421 @@ efx_filter_search( /* Return failure if we reached the maximum search depth */ if (depth == FILTER_CTL_SRCH_MAX) - return for_insert ? EBUSY : ENOENT; + return (for_insert ? EBUSY : ENOENT); - filter_idx = (filter_idx + incr) & (eftp->eft_size - 1); + filter_idx = (filter_idx + incr) & (fsftp->fsft_size - 1); ++depth; } } - __checkReturn int -efx_filter_insert_filter( - __in efx_nic_t *enp, - __in efx_filter_spec_t *spec, - __in boolean_t replace) -{ - efx_filter_t *efp = &enp->en_filter; - efx_filter_tbl_id_t tbl_id = efx_filter_tbl_id(spec->efs_type); - efx_filter_tbl_t *eftp = &efp->ef_tbl[tbl_id]; - efx_filter_spec_t *saved_spec; - efx_oword_t filter; - int filter_idx; - unsigned int depth; - int state; - uint32_t key; - int rc; - - if (eftp->eft_size == 0) - return (EINVAL); - - key = efx_filter_build(&filter, spec); - - EFSYS_LOCK(enp->en_eslp, state); - - rc = efx_filter_search(eftp, spec, key, B_TRUE, &filter_idx, &depth); - if (rc != 0) - goto done; - - EFSYS_ASSERT3U(filter_idx, <, eftp->eft_size); - saved_spec = &eftp->eft_spec[filter_idx]; - - if (efx_filter_test_used(eftp, filter_idx)) { - if (replace == B_FALSE) { - rc = EEXIST; - goto done; - } - } - efx_filter_set_used(eftp, filter_idx); - *saved_spec = *spec; - - if (efp->ef_depth[spec->efs_type] < depth) { - efp->ef_depth[spec->efs_type] = depth; - if (tbl_id == EFX_FILTER_TBL_TX_IP || - tbl_id == EFX_FILTER_TBL_TX_MAC) - efx_filter_push_tx_limits(enp); - else - efx_filter_push_rx_limits(enp); - } - - efx_filter_push_entry(enp, spec->efs_type, filter_idx, &filter); - -done: - EFSYS_UNLOCK(enp->en_eslp, state); - return (rc); -} - static void -efx_filter_clear_entry( +falconsiena_filter_clear_entry( __in efx_nic_t *enp, - __in efx_filter_tbl_t *eftp, + __in falconsiena_filter_tbl_t *fsftp, __in int index) { efx_oword_t filter; - if (efx_filter_test_used(eftp, index)) { - efx_filter_clear_used(eftp, index); + if (falconsiena_filter_test_used(fsftp, index)) { + falconsiena_filter_clear_used(fsftp, index); EFX_ZERO_OWORD(filter); - efx_filter_push_entry(enp, eftp->eft_spec[index].efs_type, + falconsiena_filter_push_entry(enp, + fsftp->fsft_spec[index].fsfs_type, index, &filter); - memset(&eftp->eft_spec[index], 0, sizeof(eftp->eft_spec[0])); + memset(&fsftp->fsft_spec[index], + 0, sizeof (fsftp->fsft_spec[0])); } } - __checkReturn int -efx_filter_remove_filter( + void +falconsiena_filter_tbl_clear( __in efx_nic_t *enp, - __in efx_filter_spec_t *spec) + __in falconsiena_filter_tbl_id_t tbl_id) { - efx_filter_t *efp = &enp->en_filter; - efx_filter_tbl_id_t tbl_id = efx_filter_tbl_id(spec->efs_type); - efx_filter_tbl_t *eftp = &efp->ef_tbl[tbl_id]; - efx_filter_spec_t *saved_spec; - efx_oword_t filter; - int filter_idx; - unsigned int depth; - int state; - uint32_t key; - int rc; - - key = efx_filter_build(&filter, spec); - - EFSYS_LOCK(enp->en_eslp, state); - - rc = efx_filter_search(eftp, spec, key, B_FALSE, &filter_idx, &depth); - if (rc != 0) - goto out; - - saved_spec = &eftp->eft_spec[filter_idx]; - - efx_filter_clear_entry(enp, eftp, filter_idx); - if (eftp->eft_used == 0) - efx_filter_reset_search_depth(efp, tbl_id); - - rc = 0; - -out: - EFSYS_UNLOCK(enp->en_eslp, state); - return (rc); -} - - void -efx_filter_remove_index( - __inout efx_nic_t *enp, - __in efx_filter_type_t type, - __in int index) -{ - efx_filter_t *efp = &enp->en_filter; - efx_filter_tbl_id_t tbl_id = efx_filter_tbl_id(type); - efx_filter_tbl_t *eftp = &efp->ef_tbl[tbl_id]; - int state; - - if (index < 0) - return; - - EFSYS_LOCK(enp->en_eslp, state); - - efx_filter_clear_entry(enp, eftp, index); - if (eftp->eft_used == 0) - efx_filter_reset_search_depth(efp, tbl_id); - - EFSYS_UNLOCK(enp->en_eslp, state); -} - - void -efx_filter_tbl_clear( - __inout efx_nic_t *enp, - __in efx_filter_tbl_id_t tbl_id) -{ - efx_filter_t *efp = &enp->en_filter; - efx_filter_tbl_t *eftp = &efp->ef_tbl[tbl_id]; + falconsiena_filter_t *fsfp = enp->en_filter.ef_falconsiena_filter; + falconsiena_filter_tbl_t *fsftp = &fsfp->fsf_tbl[tbl_id]; int index; int state; EFSYS_LOCK(enp->en_eslp, state); - for (index = 0; index < eftp->eft_size; ++index) { - efx_filter_clear_entry(enp, eftp, index); + for (index = 0; index < fsftp->fsft_size; ++index) { + falconsiena_filter_clear_entry(enp, fsftp, index); } - if (eftp->eft_used == 0) - efx_filter_reset_search_depth(efp, tbl_id); + if (fsftp->fsft_used == 0) + falconsiena_filter_reset_search_depth(fsfp, tbl_id); EFSYS_UNLOCK(enp->en_eslp, state); } -/* Restore filter state after a reset */ - void -efx_filter_restore( +static __checkReturn int +falconsiena_filter_init( __in efx_nic_t *enp) { - efx_filter_t *efp = &enp->en_filter; - efx_filter_tbl_id_t tbl_id; - efx_filter_tbl_t *eftp; - efx_filter_spec_t *spec; - efx_oword_t filter; - int filter_idx; - int state; - - EFSYS_LOCK(enp->en_eslp, state); - - for (tbl_id = 0; tbl_id < EFX_FILTER_NTBLS; tbl_id++) { - eftp = &efp->ef_tbl[tbl_id]; - for (filter_idx = 0; filter_idx < eftp->eft_size; filter_idx++) { - if (!efx_filter_test_used(eftp, filter_idx)) - continue; - - spec = &eftp->eft_spec[filter_idx]; - efx_filter_build(&filter, spec); - efx_filter_push_entry(enp, spec->efs_type, - filter_idx, &filter); - } - } - - efx_filter_push_rx_limits(enp); - efx_filter_push_tx_limits(enp); - - EFSYS_UNLOCK(enp->en_eslp, state); -} - - void -efx_filter_redirect_index( - __inout efx_nic_t *enp, - __in efx_filter_type_t type, - __in int filter_index, - __in int rxq_index) -{ - efx_filter_t *efp = &enp->en_filter; - efx_filter_tbl_t *eftp = - &efp->ef_tbl[efx_filter_tbl_id(type)]; - efx_filter_spec_t *spec; - efx_oword_t filter; - int state; - - EFSYS_LOCK(enp->en_eslp, state); - - spec = &eftp->eft_spec[filter_index]; - spec->efs_dmaq_id = (uint16_t)rxq_index; - - efx_filter_build(&filter, spec); - efx_filter_push_entry(enp, spec->efs_type, filter_index, &filter); - - EFSYS_UNLOCK(enp->en_eslp, state); -} - - __checkReturn int -efx_filter_init( - __in efx_nic_t *enp) -{ - efx_filter_t *efp = &enp->en_filter; - efx_filter_tbl_t *eftp; + falconsiena_filter_t *fsfp; + falconsiena_filter_tbl_t *fsftp; int tbl_id; int rc; - EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE); - EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_FILTER)); + EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (falconsiena_filter_t), fsfp); - switch (enp->en_family) - { + if (!fsfp) { + rc = ENOMEM; + goto fail1; + } + + enp->en_filter.ef_falconsiena_filter = fsfp; + + switch (enp->en_family) { #if EFSYS_OPT_FALCON case EFX_FAMILY_FALCON: - eftp = &efp->ef_tbl[EFX_FILTER_TBL_RX_IP]; - eftp->eft_size = FR_AZ_RX_FILTER_TBL0_ROWS; + fsftp = &fsfp->fsf_tbl[EFX_FS_FILTER_TBL_RX_IP]; + fsftp->fsft_size = FR_AZ_RX_FILTER_TBL0_ROWS; break; #endif /* EFSYS_OPT_FALCON */ #if EFSYS_OPT_SIENA case EFX_FAMILY_SIENA: - eftp = &efp->ef_tbl[EFX_FILTER_TBL_RX_IP]; - eftp->eft_size = FR_AZ_RX_FILTER_TBL0_ROWS; + fsftp = &fsfp->fsf_tbl[EFX_FS_FILTER_TBL_RX_IP]; + fsftp->fsft_size = FR_AZ_RX_FILTER_TBL0_ROWS; - eftp = &efp->ef_tbl[EFX_FILTER_TBL_RX_MAC]; - eftp->eft_size = FR_CZ_RX_MAC_FILTER_TBL0_ROWS; + fsftp = &fsfp->fsf_tbl[EFX_FS_FILTER_TBL_RX_MAC]; + fsftp->fsft_size = FR_CZ_RX_MAC_FILTER_TBL0_ROWS; - eftp = &efp->ef_tbl[EFX_FILTER_TBL_TX_IP]; - eftp->eft_size = FR_CZ_TX_FILTER_TBL0_ROWS; + fsftp = &fsfp->fsf_tbl[EFX_FS_FILTER_TBL_TX_IP]; + fsftp->fsft_size = FR_CZ_TX_FILTER_TBL0_ROWS; - eftp = &efp->ef_tbl[EFX_FILTER_TBL_TX_MAC]; - eftp->eft_size = FR_CZ_TX_MAC_FILTER_TBL0_ROWS; + fsftp = &fsfp->fsf_tbl[EFX_FS_FILTER_TBL_TX_MAC]; + fsftp->fsft_size = FR_CZ_TX_MAC_FILTER_TBL0_ROWS; break; #endif /* EFSYS_OPT_SIENA */ default: rc = ENOTSUP; - goto fail1; + goto fail2; } - for (tbl_id = 0; tbl_id < EFX_FILTER_NTBLS; tbl_id++) { + for (tbl_id = 0; tbl_id < EFX_FS_FILTER_NTBLS; tbl_id++) { unsigned int bitmap_size; - eftp = &efp->ef_tbl[tbl_id]; - if (eftp->eft_size == 0) + fsftp = &fsfp->fsf_tbl[tbl_id]; + if (fsftp->fsft_size == 0) continue; - EFX_STATIC_ASSERT(sizeof(eftp->eft_bitmap[0]) == sizeof(uint32_t)); - bitmap_size = (eftp->eft_size + (sizeof(uint32_t) * 8) - 1) / 8; + EFX_STATIC_ASSERT(sizeof (fsftp->fsft_bitmap[0]) == + sizeof (uint32_t)); + bitmap_size = + (fsftp->fsft_size + (sizeof (uint32_t) * 8) - 1) / 8; - EFSYS_KMEM_ALLOC(enp->en_esip, bitmap_size, eftp->eft_bitmap); - if (!eftp->eft_bitmap) { - rc = ENOMEM; - goto fail2; - } - - EFSYS_KMEM_ALLOC(enp->en_esip, eftp->eft_size * sizeof(*eftp->eft_spec), - eftp->eft_spec); - if (!eftp->eft_spec) { + EFSYS_KMEM_ALLOC(enp->en_esip, bitmap_size, fsftp->fsft_bitmap); + if (!fsftp->fsft_bitmap) { rc = ENOMEM; goto fail3; } - memset(eftp->eft_spec, 0, eftp->eft_size * sizeof(*eftp->eft_spec)); + + EFSYS_KMEM_ALLOC(enp->en_esip, + fsftp->fsft_size * sizeof (*fsftp->fsft_spec), + fsftp->fsft_spec); + if (!fsftp->fsft_spec) { + rc = ENOMEM; + goto fail4; + } + memset(fsftp->fsft_spec, 0, + fsftp->fsft_size * sizeof (*fsftp->fsft_spec)); } - enp->en_mod_flags |= EFX_MOD_FILTER; return (0); +fail4: + EFSYS_PROBE(fail4); + fail3: EFSYS_PROBE(fail3); fail2: EFSYS_PROBE(fail2); - efx_filter_fini(enp); + falconsiena_filter_fini(enp); fail1: EFSYS_PROBE1(fail1, int, rc); return (rc); } - void -efx_filter_fini( +static void +falconsiena_filter_fini( __in efx_nic_t *enp) { - efx_filter_t *efp = &enp->en_filter; - efx_filter_tbl_id_t tbl_id; + falconsiena_filter_t *fsfp = enp->en_filter.ef_falconsiena_filter; + falconsiena_filter_tbl_id_t tbl_id; EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE); - for (tbl_id = 0; tbl_id < EFX_FILTER_NTBLS; tbl_id++) { - efx_filter_tbl_t *eftp = &efp->ef_tbl[tbl_id]; + if (fsfp == NULL) + return; + + for (tbl_id = 0; tbl_id < EFX_FS_FILTER_NTBLS; tbl_id++) { + falconsiena_filter_tbl_t *fsftp = &fsfp->fsf_tbl[tbl_id]; unsigned int bitmap_size; - EFX_STATIC_ASSERT(sizeof(eftp->eft_bitmap[0]) == sizeof(uint32_t)); - bitmap_size = (eftp->eft_size + (sizeof(uint32_t) * 8) - 1) / 8; + EFX_STATIC_ASSERT(sizeof (fsftp->fsft_bitmap[0]) == + sizeof (uint32_t)); + bitmap_size = + (fsftp->fsft_size + (sizeof (uint32_t) * 8) - 1) / 8; - if (eftp->eft_bitmap != NULL) { + if (fsftp->fsft_bitmap != NULL) { EFSYS_KMEM_FREE(enp->en_esip, bitmap_size, - eftp->eft_bitmap); - eftp->eft_bitmap = NULL; + fsftp->fsft_bitmap); + fsftp->fsft_bitmap = NULL; } - if (eftp->eft_spec != NULL) { - EFSYS_KMEM_FREE(enp->en_esip, eftp->eft_size * - sizeof(*eftp->eft_spec), eftp->eft_spec); - eftp->eft_spec = NULL; + if (fsftp->fsft_spec != NULL) { + EFSYS_KMEM_FREE(enp->en_esip, fsftp->fsft_size * + sizeof (*fsftp->fsft_spec), fsftp->fsft_spec); + fsftp->fsft_spec = NULL; } } - enp->en_mod_flags &= ~EFX_MOD_FILTER; + EFSYS_KMEM_FREE(enp->en_esip, sizeof (falconsiena_filter_t), + enp->en_filter.ef_falconsiena_filter); } -extern void -efx_filter_spec_rx_ipv4_tcp_full( - __inout efx_filter_spec_t *spec, - __in unsigned int flags, - __in uint32_t src_ip, - __in uint16_t src_tcp, - __in uint32_t dest_ip, - __in uint16_t dest_tcp) +/* Restore filter state after a reset */ +static __checkReturn int +falconsiena_filter_restore( + __in efx_nic_t *enp) { - EFSYS_ASSERT3P(spec, !=, NULL); - EFSYS_ASSERT((flags & ~(EFX_FILTER_FLAG_RX_RSS | - EFX_FILTER_FLAG_RX_SCATTER)) == 0); + falconsiena_filter_t *fsfp = enp->en_filter.ef_falconsiena_filter; + falconsiena_filter_tbl_id_t tbl_id; + falconsiena_filter_tbl_t *fsftp; + falconsiena_filter_spec_t *spec; + efx_oword_t filter; + int filter_idx; + int state; + int rc; - spec->efs_type = EFX_FILTER_RX_TCP_FULL; - spec->efs_flags = (uint8_t)flags; - spec->efs_dword[0] = src_tcp | src_ip << 16; - spec->efs_dword[1] = dest_tcp << 16 | src_ip >> 16; - spec->efs_dword[2] = dest_ip; + EFSYS_LOCK(enp->en_eslp, state); + + for (tbl_id = 0; tbl_id < EFX_FS_FILTER_NTBLS; tbl_id++) { + fsftp = &fsfp->fsf_tbl[tbl_id]; + for (filter_idx = 0; + filter_idx < fsftp->fsft_size; + filter_idx++) { + if (!falconsiena_filter_test_used(fsftp, filter_idx)) + continue; + + spec = &fsftp->fsft_spec[filter_idx]; + if ((rc = falconsiena_filter_build(&filter, spec)) != 0) + goto fail1; + if ((rc = falconsiena_filter_push_entry(enp, + spec->fsfs_type, filter_idx, &filter)) != 0) + goto fail2; + } + } + + falconsiena_filter_push_rx_limits(enp); + falconsiena_filter_push_tx_limits(enp); + + EFSYS_UNLOCK(enp->en_eslp, state); + + return (0); + +fail2: + EFSYS_PROBE(fail2); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + EFSYS_UNLOCK(enp->en_eslp, state); + + return (rc); } -extern void -efx_filter_spec_rx_ipv4_tcp_wild( +static __checkReturn int +falconsiena_filter_add( + __in efx_nic_t *enp, __inout efx_filter_spec_t *spec, - __in unsigned int flags, - __in uint32_t dest_ip, - __in uint16_t dest_tcp) + __in boolean_t may_replace) { - EFSYS_ASSERT3P(spec, !=, NULL); - EFSYS_ASSERT((flags & ~(EFX_FILTER_FLAG_RX_RSS | - EFX_FILTER_FLAG_RX_SCATTER)) == 0); + int rc; + falconsiena_filter_spec_t fs_spec; + falconsiena_filter_t *fsfp = enp->en_filter.ef_falconsiena_filter; + falconsiena_filter_tbl_id_t tbl_id; + falconsiena_filter_tbl_t *fsftp; + falconsiena_filter_spec_t *saved_fs_spec; + efx_oword_t filter; + int filter_idx; + unsigned int depth; + int state; + uint32_t key; - spec->efs_type = EFX_FILTER_RX_TCP_WILD; - spec->efs_flags = (uint8_t)flags; - spec->efs_dword[0] = 0; - spec->efs_dword[1] = dest_tcp << 16; - spec->efs_dword[2] = dest_ip; -} -extern void -efx_filter_spec_rx_ipv4_udp_full( - __inout efx_filter_spec_t *spec, - __in unsigned int flags, - __in uint32_t src_ip, - __in uint16_t src_udp, - __in uint32_t dest_ip, - __in uint16_t dest_udp) -{ - EFSYS_ASSERT3P(spec, !=, NULL); - EFSYS_ASSERT((flags & ~(EFX_FILTER_FLAG_RX_RSS | - EFX_FILTER_FLAG_RX_SCATTER)) == 0); - - spec->efs_type = EFX_FILTER_RX_UDP_FULL; - spec->efs_flags = (uint8_t)flags; - spec->efs_dword[0] = src_udp | src_ip << 16; - spec->efs_dword[1] = dest_udp << 16 | src_ip >> 16; - spec->efs_dword[2] = dest_ip; -} - -extern void -efx_filter_spec_rx_ipv4_udp_wild( - __inout efx_filter_spec_t *spec, - __in unsigned int flags, - __in uint32_t dest_ip, - __in uint16_t dest_udp) -{ - EFSYS_ASSERT3P(spec, !=, NULL); - EFSYS_ASSERT((flags & ~(EFX_FILTER_FLAG_RX_RSS | - EFX_FILTER_FLAG_RX_SCATTER)) == 0); - - spec->efs_type = EFX_FILTER_RX_UDP_WILD; - spec->efs_flags = (uint8_t)flags; - spec->efs_dword[0] = dest_udp; - spec->efs_dword[1] = 0; - spec->efs_dword[2] = dest_ip; -} - -#if EFSYS_OPT_SIENA -extern void -efx_filter_spec_rx_mac_full( - __inout efx_filter_spec_t *spec, - __in unsigned int flags, - __in uint16_t vlan_id, - __in uint8_t *dest_mac) -{ - EFSYS_ASSERT3P(spec, !=, NULL); - EFSYS_ASSERT3P(dest_mac, !=, NULL); - EFSYS_ASSERT((flags & ~(EFX_FILTER_FLAG_RX_RSS | - EFX_FILTER_FLAG_RX_SCATTER | - EFX_FILTER_FLAG_RX_OVERRIDE_IP)) == 0); - - spec->efs_type = EFX_FILTER_RX_MAC_FULL; - spec->efs_flags = (uint8_t)flags; - spec->efs_dword[0] = vlan_id; - spec->efs_dword[1] = - dest_mac[2] << 24 | - dest_mac[3] << 16 | - dest_mac[4] << 8 | - dest_mac[5]; - spec->efs_dword[2] = - dest_mac[0] << 8 | - dest_mac[1]; -} -#endif /* EFSYS_OPT_SIENA */ - -#if EFSYS_OPT_SIENA -extern void -efx_filter_spec_rx_mac_wild( - __inout efx_filter_spec_t *spec, - __in unsigned int flags, - __in uint8_t *dest_mac) -{ - EFSYS_ASSERT3P(spec, !=, NULL); - EFSYS_ASSERT3P(dest_mac, !=, NULL); - EFSYS_ASSERT((flags & ~(EFX_FILTER_FLAG_RX_RSS | - EFX_FILTER_FLAG_RX_SCATTER | - EFX_FILTER_FLAG_RX_OVERRIDE_IP)) == 0); - - spec->efs_type = EFX_FILTER_RX_MAC_WILD; - spec->efs_flags = (uint8_t)flags; - spec->efs_dword[0] = 0; - spec->efs_dword[1] = - dest_mac[2] << 24 | - dest_mac[3] << 16 | - dest_mac[4] << 8 | - dest_mac[5]; - spec->efs_dword[2] = - dest_mac[0] << 8 | - dest_mac[1]; -} -#endif /* EFSYS_OPT_SIENA */ - -#if EFSYS_OPT_SIENA -extern void -efx_filter_spec_tx_ipv4_tcp_full( - __inout efx_filter_spec_t *spec, - __in uint32_t src_ip, - __in uint16_t src_tcp, - __in uint32_t dest_ip, - __in uint16_t dest_tcp) -{ EFSYS_ASSERT3P(spec, !=, NULL); - spec->efs_type = EFX_FILTER_TX_TCP_FULL; - spec->efs_flags = 0; - spec->efs_dword[0] = src_tcp | src_ip << 16; - spec->efs_dword[1] = dest_tcp << 16 | src_ip >> 16; - spec->efs_dword[2] = dest_ip; -} -#endif /* EFSYS_OPT_SIENA */ + if ((rc = falconsiena_filter_spec_from_gen_spec(&fs_spec, spec)) != 0) + goto fail1; -#if EFSYS_OPT_SIENA -extern void -efx_filter_spec_tx_ipv4_tcp_wild( - __inout efx_filter_spec_t *spec, - __in uint32_t src_ip, - __in uint16_t src_tcp) + tbl_id = falconsiena_filter_tbl_id(fs_spec.fsfs_type); + fsftp = &fsfp->fsf_tbl[tbl_id]; + + if (fsftp->fsft_size == 0) { + rc = EINVAL; + goto fail2; + } + + key = falconsiena_filter_build(&filter, &fs_spec); + + EFSYS_LOCK(enp->en_eslp, state); + + rc = falconsiena_filter_search(fsftp, &fs_spec, key, B_TRUE, + &filter_idx, &depth); + if (rc != 0) + goto fail3; + + EFSYS_ASSERT3U(filter_idx, <, fsftp->fsft_size); + saved_fs_spec = &fsftp->fsft_spec[filter_idx]; + + if (falconsiena_filter_test_used(fsftp, filter_idx)) { + if (may_replace == B_FALSE) { + rc = EEXIST; + goto fail4; + } + } + falconsiena_filter_set_used(fsftp, filter_idx); + *saved_fs_spec = fs_spec; + + if (fsfp->fsf_depth[fs_spec.fsfs_type] < depth) { + fsfp->fsf_depth[fs_spec.fsfs_type] = depth; + if (tbl_id == EFX_FS_FILTER_TBL_TX_IP || + tbl_id == EFX_FS_FILTER_TBL_TX_MAC) + falconsiena_filter_push_tx_limits(enp); + else + falconsiena_filter_push_rx_limits(enp); + } + + falconsiena_filter_push_entry(enp, fs_spec.fsfs_type, + filter_idx, &filter); + + EFSYS_UNLOCK(enp->en_eslp, state); + return (0); + +fail4: + EFSYS_PROBE(fail4); + +fail3: + EFSYS_UNLOCK(enp->en_eslp, state); + EFSYS_PROBE(fail3); + +fail2: + EFSYS_PROBE(fail2); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + return (rc); +} + +static __checkReturn int +falconsiena_filter_delete( + __in efx_nic_t *enp, + __inout efx_filter_spec_t *spec) { + int rc; + falconsiena_filter_spec_t fs_spec; + falconsiena_filter_t *fsfp = enp->en_filter.ef_falconsiena_filter; + falconsiena_filter_tbl_id_t tbl_id; + falconsiena_filter_tbl_t *fsftp; + falconsiena_filter_spec_t *saved_spec; + efx_oword_t filter; + int filter_idx; + unsigned int depth; + int state; + uint32_t key; + EFSYS_ASSERT3P(spec, !=, NULL); - spec->efs_type = EFX_FILTER_TX_TCP_WILD; - spec->efs_flags = 0; - spec->efs_dword[0] = 0; - spec->efs_dword[1] = src_tcp << 16; - spec->efs_dword[2] = src_ip; -} -#endif /* EFSYS_OPT_SIENA */ + if ((rc = falconsiena_filter_spec_from_gen_spec(&fs_spec, spec)) != 0) + goto fail1; -#if EFSYS_OPT_SIENA -extern void -efx_filter_spec_tx_ipv4_udp_full( - __inout efx_filter_spec_t *spec, - __in uint32_t src_ip, - __in uint16_t src_udp, - __in uint32_t dest_ip, - __in uint16_t dest_udp) + tbl_id = falconsiena_filter_tbl_id(fs_spec.fsfs_type); + fsftp = &fsfp->fsf_tbl[tbl_id]; + + key = falconsiena_filter_build(&filter, &fs_spec); + + EFSYS_LOCK(enp->en_eslp, state); + + rc = falconsiena_filter_search(fsftp, &fs_spec, key, B_FALSE, + &filter_idx, &depth); + if (rc != 0) + goto fail2; + + saved_spec = &fsftp->fsft_spec[filter_idx]; + + falconsiena_filter_clear_entry(enp, fsftp, filter_idx); + if (fsftp->fsft_used == 0) + falconsiena_filter_reset_search_depth(fsfp, tbl_id); + + EFSYS_UNLOCK(enp->en_eslp, state); + return (0); + +fail2: + EFSYS_UNLOCK(enp->en_eslp, state); + EFSYS_PROBE(fail2); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + return (rc); +} + +#define MAX_SUPPORTED 4 + +static __checkReturn int +falconsiena_filter_supported_filters( + __in efx_nic_t *enp, + __out uint32_t *list, + __out size_t *length) { - EFSYS_ASSERT3P(spec, !=, NULL); + int index = 0; + uint32_t rx_matches[MAX_SUPPORTED]; + int rc; - spec->efs_type = EFX_FILTER_TX_UDP_FULL; - spec->efs_flags = 0; - spec->efs_dword[0] = src_udp | src_ip << 16; - spec->efs_dword[1] = dest_udp << 16 | src_ip >> 16; - spec->efs_dword[2] = dest_ip; + if (list == NULL) { + rc = EINVAL; + goto fail1; + } + + rx_matches[index++] = + EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO | + EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT | + EFX_FILTER_MATCH_REM_HOST | EFX_FILTER_MATCH_REM_PORT; + + rx_matches[index++] = + EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO | + EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT; + + if (enp->en_features & EFX_FEATURE_MAC_HEADER_FILTERS) { + rx_matches[index++] = + EFX_FILTER_MATCH_OUTER_VID | EFX_FILTER_MATCH_LOC_MAC; + + rx_matches[index++] = EFX_FILTER_MATCH_LOC_MAC; + } + + EFSYS_ASSERT3U(index, <=, MAX_SUPPORTED); + + *length = index; + memcpy(list, rx_matches, *length); + + return (0); + +fail1: + + return (rc); } -#endif /* EFSYS_OPT_SIENA */ -#if EFSYS_OPT_SIENA -extern void -efx_filter_spec_tx_ipv4_udp_wild( - __inout efx_filter_spec_t *spec, - __in uint32_t src_ip, - __in uint16_t src_udp) -{ - EFSYS_ASSERT3P(spec, !=, NULL); - - spec->efs_type = EFX_FILTER_TX_UDP_WILD; - spec->efs_flags = 0; - spec->efs_dword[0] = src_udp; - spec->efs_dword[1] = 0; - spec->efs_dword[2] = src_ip; -} -#endif /* EFSYS_OPT_SIENA */ - -#if EFSYS_OPT_SIENA -extern void -efx_filter_spec_tx_mac_full( - __inout efx_filter_spec_t *spec, - __in uint16_t vlan_id, - __in uint8_t *src_mac) -{ - EFSYS_ASSERT3P(spec, !=, NULL); - EFSYS_ASSERT3P(src_mac, !=, NULL); - - spec->efs_type = EFX_FILTER_TX_MAC_FULL; - spec->efs_flags = 0; - spec->efs_dword[0] = vlan_id; - spec->efs_dword[1] = - src_mac[2] << 24 | - src_mac[3] << 16 | - src_mac[4] << 8 | - src_mac[5]; - spec->efs_dword[2] = - src_mac[0] << 8 | - src_mac[1]; -} -#endif /* EFSYS_OPT_SIENA */ - -#if EFSYS_OPT_SIENA -extern void -efx_filter_spec_tx_mac_wild( - __inout efx_filter_spec_t *spec, - __in uint8_t *src_mac) -{ - EFSYS_ASSERT3P(spec, !=, NULL); - EFSYS_ASSERT3P(src_mac, !=, NULL); - - spec->efs_type = EFX_FILTER_TX_MAC_WILD; - spec->efs_flags = 0; - spec->efs_dword[0] = 0; - spec->efs_dword[1] = - src_mac[2] << 24 | - src_mac[3] << 16 | - src_mac[4] << 8 | - src_mac[5]; - spec->efs_dword[2] = - src_mac[0] << 8 | - src_mac[1]; -} -#endif /* EFSYS_OPT_SIENA */ +#undef MAX_SUPPORTED +#endif /* EFSYS_OPT_FALCON || EFSYS_OPT_SIENA */ #endif /* EFSYS_OPT_FILTER */ diff --git a/sys/dev/sfxge/common/efx_hash.c b/sys/dev/sfxge/common/efx_hash.c new file mode 100644 index 000000000000..3005c1bb4738 --- /dev/null +++ b/sys/dev/sfxge/common/efx_hash.c @@ -0,0 +1,333 @@ +/*- + * Copyright 2006 Bob Jenkins + * + * Derived from public domain source, see + * : + * + * "lookup3.c, by Bob Jenkins, May 2006, Public Domain. + * + * These are functions for producing 32-bit hashes for hash table lookup... + * ...You can use this free for any purpose. It's in the public domain. + * It has no warranty." + * + * Copyright (c) 2014-2015 Solarflare Communications Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "efsys.h" +#include "efx.h" +#include "efx_types.h" +#include "efx_impl.h" + +/* Hash initial value */ +#define EFX_HASH_INITIAL_VALUE 0xdeadbeef + +/* + * Rotate a 32-bit value left + * + * Allow platform to provide an intrinsic or optimised routine and + * fall-back to a simple shift based implementation. + */ +#if EFSYS_HAS_ROTL_DWORD + +#define EFX_HASH_ROTATE(_value, _shift) \ + EFSYS_ROTL_DWORD(_value, _shift) + +#else + +#define EFX_HASH_ROTATE(_value, _shift) \ + (((_value) << (_shift)) | ((_value) >> (32 - (_shift)))) + +#endif + +/* Mix three 32-bit values reversibly */ +#define EFX_HASH_MIX(_a, _b, _c) \ + do { \ + _a -= _c; \ + _a ^= EFX_HASH_ROTATE(_c, 4); \ + _c += _b; \ + _b -= _a; \ + _b ^= EFX_HASH_ROTATE(_a, 6); \ + _a += _c; \ + _c -= _b; \ + _c ^= EFX_HASH_ROTATE(_b, 8); \ + _b += _a; \ + _a -= _c; \ + _a ^= EFX_HASH_ROTATE(_c, 16); \ + _c += _b; \ + _b -= _a; \ + _b ^= EFX_HASH_ROTATE(_a, 19); \ + _a += _c; \ + _c -= _b; \ + _c ^= EFX_HASH_ROTATE(_b, 4); \ + _b += _a; \ + _NOTE(CONSTANTCONDITION) \ + } while (B_FALSE) + +/* Final mixing of three 32-bit values into one (_c) */ +#define EFX_HASH_FINALISE(_a, _b, _c) \ + do { \ + _c ^= _b; \ + _c -= EFX_HASH_ROTATE(_b, 14); \ + _a ^= _c; \ + _a -= EFX_HASH_ROTATE(_c, 11); \ + _b ^= _a; \ + _b -= EFX_HASH_ROTATE(_a, 25); \ + _c ^= _b; \ + _c -= EFX_HASH_ROTATE(_b, 16); \ + _a ^= _c; \ + _a -= EFX_HASH_ROTATE(_c, 4); \ + _b ^= _a; \ + _b -= EFX_HASH_ROTATE(_a, 14); \ + _c ^= _b; \ + _c -= EFX_HASH_ROTATE(_b, 24); \ + _NOTE(CONSTANTCONDITION) \ + } while (B_FALSE) + + +/* Produce a 32-bit hash from 32-bit aligned input */ + __checkReturn uint32_t +efx_hash_dwords( + __in_ecount(count) uint32_t const *input, + __in size_t count, + __in uint32_t init) +{ + uint32_t a; + uint32_t b; + uint32_t c; + + /* Set up the initial internal state */ + a = b = c = EFX_HASH_INITIAL_VALUE + + (((uint32_t)count) * sizeof (uint32_t)) + init; + + /* Handle all but the last three dwords of the input */ + while (count > 3) { + a += input[0]; + b += input[1]; + c += input[2]; + EFX_HASH_MIX(a, b, c); + + count -= 3; + input += 3; + } + + /* Handle the left-overs */ + switch (count) { + case 3: + c += input[2]; + /* Fall-through */ + case 2: + b += input[1]; + /* Fall-through */ + case 1: + a += input[0]; + EFX_HASH_FINALISE(a, b, c); + break; + + case 0: + /* Should only get here if count parameter was zero */ + break; + } + + return (c); +} + +#if EFSYS_IS_BIG_ENDIAN + +/* Produce a 32-bit hash from arbitrarily aligned input */ + __checkReturn uint32_t +efx_hash_bytes( + __in_ecount(length) uint8_t const *input, + __in size_t length, + __in uint32_t init) +{ + uint32_t a; + uint32_t b; + uint32_t c; + + /* Set up the initial internal state */ + a = b = c = EFX_HASH_INITIAL_VALUE + (uint32_t)length + init; + + /* Handle all but the last twelve bytes of the input */ + while (length > 12) { + a += ((uint32_t)input[0]) << 24; + a += ((uint32_t)input[1]) << 16; + a += ((uint32_t)input[2]) << 8; + a += ((uint32_t)input[3]); + b += ((uint32_t)input[4]) << 24; + b += ((uint32_t)input[5]) << 16; + b += ((uint32_t)input[6]) << 8; + b += ((uint32_t)input[7]); + c += ((uint32_t)input[8]) << 24; + c += ((uint32_t)input[9]) << 16; + c += ((uint32_t)input[10]) << 8; + c += ((uint32_t)input[11]); + EFX_HASH_MIX(a, b, c); + length -= 12; + input += 12; + } + + /* Handle the left-overs */ + switch (length) { + case 12: + c += ((uint32_t)input[11]); + /* Fall-through */ + case 11: + c += ((uint32_t)input[10]) << 8; + /* Fall-through */ + case 10: + c += ((uint32_t)input[9]) << 16; + /* Fall-through */ + case 9: + c += ((uint32_t)input[8]) << 24; + /* Fall-through */ + case 8: + b += ((uint32_t)input[7]); + /* Fall-through */ + case 7: + b += ((uint32_t)input[6]) << 8; + /* Fall-through */ + case 6: + b += ((uint32_t)input[5]) << 16; + /* Fall-through */ + case 5: + b += ((uint32_t)input[4]) << 24; + /* Fall-through */ + case 4: + a += ((uint32_t)input[3]); + /* Fall-through */ + case 3: + a += ((uint32_t)input[2]) << 8; + /* Fall-through */ + case 2: + a += ((uint32_t)input[1]) << 16; + /* Fall-through */ + case 1: + a += ((uint32_t)input[0]) << 24; + EFX_HASH_FINALISE(a, b, c); + break; + + case 0: + /* Should only get here if length parameter was zero */ + break; + } + + return (c); +} + +#elif EFSYS_IS_LITTLE_ENDIAN + +/* Produce a 32-bit hash from arbitrarily aligned input */ + __checkReturn uint32_t +efx_hash_bytes( + __in_ecount(length) uint8_t const *input, + __in size_t length, + __in uint32_t init) +{ + uint32_t a; + uint32_t b; + uint32_t c; + + /* Set up the initial internal state */ + a = b = c = EFX_HASH_INITIAL_VALUE + (uint32_t)length + init; + + /* Handle all but the last twelve bytes of the input */ + while (length > 12) { + a += ((uint32_t)input[0]); + a += ((uint32_t)input[1]) << 8; + a += ((uint32_t)input[2]) << 16; + a += ((uint32_t)input[3]) << 24; + b += ((uint32_t)input[4]); + b += ((uint32_t)input[5]) << 8; + b += ((uint32_t)input[6]) << 16; + b += ((uint32_t)input[7]) << 24; + c += ((uint32_t)input[8]); + c += ((uint32_t)input[9]) << 8; + c += ((uint32_t)input[10]) << 16; + c += ((uint32_t)input[11]) << 24; + EFX_HASH_MIX(a, b, c); + length -= 12; + input += 12; + } + + /* Handle the left-overs */ + switch (length) { + case 12: + c += ((uint32_t)input[11]) << 24; + /* Fall-through */ + case 11: + c += ((uint32_t)input[10]) << 16; + /* Fall-through */ + case 10: + c += ((uint32_t)input[9]) << 8; + /* Fall-through */ + case 9: + c += ((uint32_t)input[8]); + /* Fall-through */ + case 8: + b += ((uint32_t)input[7]) << 24; + /* Fall-through */ + case 7: + b += ((uint32_t)input[6]) << 16; + /* Fall-through */ + case 6: + b += ((uint32_t)input[5]) << 8; + /* Fall-through */ + case 5: + b += ((uint32_t)input[4]); + /* Fall-through */ + case 4: + a += ((uint32_t)input[3]) << 24; + /* Fall-through */ + case 3: + a += ((uint32_t)input[2]) << 16; + /* Fall-through */ + case 2: + a += ((uint32_t)input[1]) << 8; + /* Fall-through */ + case 1: + a += ((uint32_t)input[0]); + EFX_HASH_FINALISE(a, b, c); + break; + + case 0: + /* Should only get here if length parameter was zero */ + break; + } + + return (c); +} + +#else + +#error "Neither of EFSYS_IS_{BIG,LITTLE}_ENDIAN is set" + +#endif diff --git a/sys/dev/sfxge/common/efx_impl.h b/sys/dev/sfxge/common/efx_impl.h index e7c2231b52fc..6f72d5fe2c38 100644 --- a/sys/dev/sfxge/common/efx_impl.h +++ b/sys/dev/sfxge/common/efx_impl.h @@ -1,26 +1,31 @@ /*- - * Copyright 2007-2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2007-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. * * $FreeBSD$ */ @@ -31,6 +36,15 @@ #include "efsys.h" #include "efx.h" #include "efx_regs.h" +#include "efx_regs_ef10.h" + +/* FIXME: Add definition for driver generated software events */ +#ifndef ESE_DZ_EV_CODE_DRV_GEN_EV +#define ESE_DZ_EV_CODE_DRV_GEN_EV FSE_AZ_EV_CODE_DRV_GEN_EV +#endif + +#include "efx_check.h" + #if EFSYS_OPT_FALCON #include "falcon_impl.h" @@ -40,40 +54,138 @@ #include "siena_impl.h" #endif /* EFSYS_OPT_SIENA */ +#if EFSYS_OPT_HUNTINGTON +#include "hunt_impl.h" +#endif /* EFSYS_OPT_HUNTINGTON */ + #ifdef __cplusplus extern "C" { #endif -#define EFX_MOD_MCDI 0x00000001 -#define EFX_MOD_PROBE 0x00000002 -#define EFX_MOD_NVRAM 0x00000004 -#define EFX_MOD_VPD 0x00000008 -#define EFX_MOD_NIC 0x00000010 -#define EFX_MOD_INTR 0x00000020 -#define EFX_MOD_EV 0x00000040 -#define EFX_MOD_RX 0x00000080 -#define EFX_MOD_TX 0x00000100 -#define EFX_MOD_PORT 0x00000200 -#define EFX_MOD_MON 0x00000400 -#define EFX_MOD_WOL 0x00000800 -#define EFX_MOD_FILTER 0x00001000 +#define EFX_MOD_MCDI 0x00000001 +#define EFX_MOD_PROBE 0x00000002 +#define EFX_MOD_NVRAM 0x00000004 +#define EFX_MOD_VPD 0x00000008 +#define EFX_MOD_NIC 0x00000010 +#define EFX_MOD_INTR 0x00000020 +#define EFX_MOD_EV 0x00000040 +#define EFX_MOD_RX 0x00000080 +#define EFX_MOD_TX 0x00000100 +#define EFX_MOD_PORT 0x00000200 +#define EFX_MOD_MON 0x00000400 +#define EFX_MOD_WOL 0x00000800 +#define EFX_MOD_FILTER 0x00001000 +#define EFX_MOD_PKTFILTER 0x00002000 -#define EFX_RESET_MAC 0x00000001 -#define EFX_RESET_PHY 0x00000002 +#define EFX_RESET_MAC 0x00000001 +#define EFX_RESET_PHY 0x00000002 +#define EFX_RESET_RXQ_ERR 0x00000004 +#define EFX_RESET_TXQ_ERR 0x00000008 typedef enum efx_mac_type_e { EFX_MAC_INVALID = 0, EFX_MAC_FALCON_GMAC, EFX_MAC_FALCON_XMAC, EFX_MAC_SIENA, + EFX_MAC_HUNTINGTON, EFX_MAC_NTYPES } efx_mac_type_t; +typedef struct efx_ev_ops_s { + int (*eevo_init)(efx_nic_t *); + void (*eevo_fini)(efx_nic_t *); + int (*eevo_qcreate)(efx_nic_t *, unsigned int, + efsys_mem_t *, size_t, uint32_t, + efx_evq_t *); + void (*eevo_qdestroy)(efx_evq_t *); + int (*eevo_qprime)(efx_evq_t *, unsigned int); + void (*eevo_qpost)(efx_evq_t *, uint16_t); + int (*eevo_qmoderate)(efx_evq_t *, unsigned int); +#if EFSYS_OPT_QSTATS + void (*eevo_qstats_update)(efx_evq_t *, efsys_stat_t *); +#endif +} efx_ev_ops_t; + +typedef struct efx_tx_ops_s { + int (*etxo_init)(efx_nic_t *); + void (*etxo_fini)(efx_nic_t *); + int (*etxo_qcreate)(efx_nic_t *, + unsigned int, unsigned int, + efsys_mem_t *, size_t, + uint32_t, uint16_t, + efx_evq_t *, efx_txq_t *, + unsigned int *); + void (*etxo_qdestroy)(efx_txq_t *); + int (*etxo_qpost)(efx_txq_t *, efx_buffer_t *, + unsigned int, unsigned int, + unsigned int *); + void (*etxo_qpush)(efx_txq_t *, unsigned int, unsigned int); + int (*etxo_qpace)(efx_txq_t *, unsigned int); + int (*etxo_qflush)(efx_txq_t *); + void (*etxo_qenable)(efx_txq_t *); + int (*etxo_qpio_enable)(efx_txq_t *); + void (*etxo_qpio_disable)(efx_txq_t *); + int (*etxo_qpio_write)(efx_txq_t *,uint8_t *, size_t, + size_t); + int (*etxo_qpio_post)(efx_txq_t *, size_t, unsigned int, + unsigned int *); + int (*etxo_qdesc_post)(efx_txq_t *, efx_desc_t *, + unsigned int, unsigned int, + unsigned int *); + void (*etxo_qdesc_dma_create)(efx_txq_t *, efsys_dma_addr_t, + size_t, boolean_t, + efx_desc_t *); + void (*etxo_qdesc_tso_create)(efx_txq_t *, uint16_t, + uint32_t, uint8_t, + efx_desc_t *); + void (*etxo_qdesc_vlantci_create)(efx_txq_t *, uint16_t, + efx_desc_t *); +#if EFSYS_OPT_QSTATS + void (*etxo_qstats_update)(efx_txq_t *, + efsys_stat_t *); +#endif +} efx_tx_ops_t; + +typedef struct efx_rx_ops_s { + int (*erxo_init)(efx_nic_t *); + void (*erxo_fini)(efx_nic_t *); +#if EFSYS_OPT_RX_HDR_SPLIT + int (*erxo_hdr_split_enable)(efx_nic_t *, unsigned int, + unsigned int); +#endif +#if EFSYS_OPT_RX_SCATTER + int (*erxo_scatter_enable)(efx_nic_t *, unsigned int); +#endif +#if EFSYS_OPT_RX_SCALE + int (*erxo_scale_mode_set)(efx_nic_t *, efx_rx_hash_alg_t, + efx_rx_hash_type_t, boolean_t); + int (*erxo_scale_key_set)(efx_nic_t *, uint8_t *, size_t); + int (*erxo_scale_tbl_set)(efx_nic_t *, unsigned int *, + size_t); +#endif + void (*erxo_qpost)(efx_rxq_t *, efsys_dma_addr_t *, size_t, + unsigned int, unsigned int, + unsigned int); + void (*erxo_qpush)(efx_rxq_t *, unsigned int, unsigned int *); + int (*erxo_qflush)(efx_rxq_t *); + void (*erxo_qenable)(efx_rxq_t *); + int (*erxo_qcreate)(efx_nic_t *enp, unsigned int, + unsigned int, efx_rxq_type_t, + efsys_mem_t *, size_t, uint32_t, + efx_evq_t *, efx_rxq_t *); + void (*erxo_qdestroy)(efx_rxq_t *); +} efx_rx_ops_t; + typedef struct efx_mac_ops_s { int (*emo_reset)(efx_nic_t *); /* optional */ int (*emo_poll)(efx_nic_t *, efx_link_mode_t *); int (*emo_up)(efx_nic_t *, boolean_t *); + int (*emo_addr_set)(efx_nic_t *); int (*emo_reconfigure)(efx_nic_t *); + int (*emo_multicast_list_set)(efx_nic_t *); + int (*emo_filter_default_rxq_set)(efx_nic_t *, + efx_rxq_t *, boolean_t); + void (*emo_filter_default_rxq_clear)(efx_nic_t *); #if EFSYS_OPT_LOOPBACK int (*emo_loopback_set)(efx_nic_t *, efx_link_mode_t, efx_loopback_type_t); @@ -103,21 +215,59 @@ typedef struct efx_phy_ops_s { #endif /* EFSYS_OPT_PHY_STATS */ #if EFSYS_OPT_PHY_PROPS #if EFSYS_OPT_NAMES - const char __cs *(*epo_prop_name)(efx_nic_t *, unsigned int); + const char *(*epo_prop_name)(efx_nic_t *, unsigned int); #endif /* EFSYS_OPT_PHY_PROPS */ int (*epo_prop_get)(efx_nic_t *, unsigned int, uint32_t, uint32_t *); int (*epo_prop_set)(efx_nic_t *, unsigned int, uint32_t); #endif /* EFSYS_OPT_PHY_PROPS */ -#if EFSYS_OPT_PHY_BIST - int (*epo_bist_start)(efx_nic_t *, efx_phy_bist_type_t); - int (*epo_bist_poll)(efx_nic_t *, efx_phy_bist_type_t, - efx_phy_bist_result_t *, uint32_t *, +#if EFSYS_OPT_BIST + int (*epo_bist_enable_offline)(efx_nic_t *); + int (*epo_bist_start)(efx_nic_t *, efx_bist_type_t); + int (*epo_bist_poll)(efx_nic_t *, efx_bist_type_t, + efx_bist_result_t *, uint32_t *, unsigned long *, size_t); - void (*epo_bist_stop)(efx_nic_t *, efx_phy_bist_type_t); -#endif /* EFSYS_OPT_PHY_BIST */ + void (*epo_bist_stop)(efx_nic_t *, efx_bist_type_t); +#endif /* EFSYS_OPT_BIST */ } efx_phy_ops_t; +#if EFSYS_OPT_FILTER +typedef struct efx_filter_ops_s { + int (*efo_init)(efx_nic_t *); + void (*efo_fini)(efx_nic_t *); + int (*efo_restore)(efx_nic_t *); + int (*efo_add)(efx_nic_t *, efx_filter_spec_t *, + boolean_t may_replace); + int (*efo_delete)(efx_nic_t *, efx_filter_spec_t *); + int (*efo_supported_filters)(efx_nic_t *, uint32_t *, size_t *); + int (*efo_reconfigure)(efx_nic_t *, uint8_t const *, boolean_t, + boolean_t, boolean_t, boolean_t, + uint8_t const *, int); +} efx_filter_ops_t; + +extern __checkReturn int +efx_filter_reconfigure( + __in efx_nic_t *enp, + __in_ecount(6) uint8_t const *mac_addr, + __in boolean_t all_unicst, + __in boolean_t mulcst, + __in boolean_t all_mulcst, + __in boolean_t brdcst, + __in_ecount(6*count) uint8_t const *addrs, + __in int count); + +#endif /* EFSYS_OPT_FILTER */ + +typedef struct efx_pktfilter_ops_s { + int (*epfo_set)(efx_nic_t *, + boolean_t unicst, + boolean_t brdcast); +#if EFSYS_OPT_MCAST_FILTER_LIST + int (*epfo_mcast_list_set)(efx_nic_t *, uint8_t const *addrs, int count); +#endif /* EFSYS_OPT_MCAST_FILTER_LIST */ + int (*epfo_mcast_all)(efx_nic_t *); +} efx_pktfilter_ops_t; + typedef struct efx_port_s { efx_mac_type_t ep_mac_type; uint32_t ep_phy_type; @@ -125,11 +275,16 @@ typedef struct efx_port_s { uint32_t ep_mac_pdu; uint8_t ep_mac_addr[6]; efx_link_mode_t ep_link_mode; - boolean_t ep_unicst; + boolean_t ep_all_unicst; + boolean_t ep_mulcst; + boolean_t ep_all_mulcst; boolean_t ep_brdcst; unsigned int ep_fcntl; boolean_t ep_fcntl_autoneg; efx_oword_t ep_multicst_hash[2]; + uint8_t ep_mulcst_addr_list[EFX_MAC_ADDR_LEN * + EFX_MAC_MULTICAST_LIST_MAX]; + uint32_t ep_mulcst_addr_count; #if EFSYS_OPT_LOOPBACK efx_loopback_type_t ep_loopback_type; efx_link_mode_t ep_loopback_link_mode; @@ -161,8 +316,8 @@ typedef struct efx_port_s { uint32_t ep_fwver; /* falcon only */ boolean_t ep_mac_drain; boolean_t ep_mac_stats_pending; -#if EFSYS_OPT_PHY_BIST - efx_phy_bist_type_t ep_current_bist; +#if EFSYS_OPT_BIST + efx_bist_type_t ep_current_bist; #endif efx_mac_ops_t *ep_emop; efx_phy_ops_t *ep_epop; @@ -182,16 +337,30 @@ typedef struct efx_mon_s { efx_mon_ops_t *em_emop; } efx_mon_t; +typedef struct efx_intr_ops_s { + int (*eio_init)(efx_nic_t *, efx_intr_type_t, efsys_mem_t *); + void (*eio_enable)(efx_nic_t *); + void (*eio_disable)(efx_nic_t *); + void (*eio_disable_unlocked)(efx_nic_t *); + int (*eio_trigger)(efx_nic_t *, unsigned int); + void (*eio_fini)(efx_nic_t *); +} efx_intr_ops_t; + typedef struct efx_intr_s { - efx_intr_type_t ei_type; + efx_intr_ops_t *ei_eiop; efsys_mem_t *ei_esmp; + efx_intr_type_t ei_type; unsigned int ei_level; } efx_intr_t; typedef struct efx_nic_ops_s { int (*eno_probe)(efx_nic_t *); + int (*eno_set_drv_limits)(efx_nic_t *, efx_drv_limits_t*); int (*eno_reset)(efx_nic_t *); int (*eno_init)(efx_nic_t *); + int (*eno_get_vi_pool)(efx_nic_t *, uint32_t *); + int (*eno_get_bar_region)(efx_nic_t *, efx_nic_region_t, + uint32_t *, size_t *); #if EFSYS_OPT_DIAG int (*eno_sram_test)(efx_nic_t *, efx_sram_pattern_fn_t); int (*eno_register_test)(efx_nic_t *); @@ -201,94 +370,107 @@ typedef struct efx_nic_ops_s { } efx_nic_ops_t; #ifndef EFX_TXQ_LIMIT_TARGET -# define EFX_TXQ_LIMIT_TARGET 259 +#define EFX_TXQ_LIMIT_TARGET 259 #endif #ifndef EFX_RXQ_LIMIT_TARGET -# define EFX_RXQ_LIMIT_TARGET 512 +#define EFX_RXQ_LIMIT_TARGET 512 #endif #ifndef EFX_TXQ_DC_SIZE -#define EFX_TXQ_DC_SIZE 1 /* 16 descriptors */ +#define EFX_TXQ_DC_SIZE 1 /* 16 descriptors */ #endif #ifndef EFX_RXQ_DC_SIZE -#define EFX_RXQ_DC_SIZE 3 /* 64 descriptors */ +#define EFX_RXQ_DC_SIZE 3 /* 64 descriptors */ #endif #if EFSYS_OPT_FILTER -typedef enum efx_filter_type_e { - EFX_FILTER_RX_TCP_FULL, /* TCP/IPv4 4-tuple {dIP,dTCP,sIP,sTCP} */ - EFX_FILTER_RX_TCP_WILD, /* TCP/IPv4 dest {dIP,dTCP, -, -} */ - EFX_FILTER_RX_UDP_FULL, /* UDP/IPv4 4-tuple {dIP,dUDP,sIP,sUDP} */ - EFX_FILTER_RX_UDP_WILD, /* UDP/IPv4 dest {dIP,dUDP, -, -} */ +typedef struct falconsiena_filter_spec_s { + uint8_t fsfs_type; + uint32_t fsfs_flags; + uint32_t fsfs_dmaq_id; + uint32_t fsfs_dword[3]; +} falconsiena_filter_spec_t; + +typedef enum falconsiena_filter_type_e { + EFX_FS_FILTER_RX_TCP_FULL, /* TCP/IPv4 4-tuple {dIP,dTCP,sIP,sTCP} */ + EFX_FS_FILTER_RX_TCP_WILD, /* TCP/IPv4 dest {dIP,dTCP, -, -} */ + EFX_FS_FILTER_RX_UDP_FULL, /* UDP/IPv4 4-tuple {dIP,dUDP,sIP,sUDP} */ + EFX_FS_FILTER_RX_UDP_WILD, /* UDP/IPv4 dest {dIP,dUDP, -, -} */ #if EFSYS_OPT_SIENA - EFX_FILTER_RX_MAC_FULL, /* Ethernet {dMAC,VLAN} */ - EFX_FILTER_RX_MAC_WILD, /* Ethernet {dMAC, -} */ + EFX_FS_FILTER_RX_MAC_FULL, /* Ethernet {dMAC,VLAN} */ + EFX_FS_FILTER_RX_MAC_WILD, /* Ethernet {dMAC, -} */ - EFX_FILTER_TX_TCP_FULL, /* TCP/IPv4 {dIP,dTCP,sIP,sTCP} */ - EFX_FILTER_TX_TCP_WILD, /* TCP/IPv4 { -, -,sIP,sTCP} */ - EFX_FILTER_TX_UDP_FULL, /* UDP/IPv4 {dIP,dTCP,sIP,sTCP} */ - EFX_FILTER_TX_UDP_WILD, /* UDP/IPv4 source (host, port) */ + EFX_FS_FILTER_TX_TCP_FULL, /* TCP/IPv4 {dIP,dTCP,sIP,sTCP} */ + EFX_FS_FILTER_TX_TCP_WILD, /* TCP/IPv4 { -, -,sIP,sTCP} */ + EFX_FS_FILTER_TX_UDP_FULL, /* UDP/IPv4 {dIP,dTCP,sIP,sTCP} */ + EFX_FS_FILTER_TX_UDP_WILD, /* UDP/IPv4 source (host, port) */ - EFX_FILTER_TX_MAC_FULL, /* Ethernet source (MAC address, VLAN ID) */ - EFX_FILTER_TX_MAC_WILD, /* Ethernet source (MAC address) */ + EFX_FS_FILTER_TX_MAC_FULL, /* Ethernet source (MAC address, VLAN ID) */ + EFX_FS_FILTER_TX_MAC_WILD, /* Ethernet source (MAC address) */ #endif /* EFSYS_OPT_SIENA */ - EFX_FILTER_NTYPES -} efx_filter_type_t; + EFX_FS_FILTER_NTYPES +} falconsiena_filter_type_t; -typedef enum efx_filter_tbl_id_e { - EFX_FILTER_TBL_RX_IP = 0, - EFX_FILTER_TBL_RX_MAC, - EFX_FILTER_TBL_TX_IP, - EFX_FILTER_TBL_TX_MAC, - EFX_FILTER_NTBLS -} efx_filter_tbl_id_t; +typedef enum falconsiena_filter_tbl_id_e { + EFX_FS_FILTER_TBL_RX_IP = 0, + EFX_FS_FILTER_TBL_RX_MAC, + EFX_FS_FILTER_TBL_TX_IP, + EFX_FS_FILTER_TBL_TX_MAC, + EFX_FS_FILTER_NTBLS +} falconsiena_filter_tbl_id_t; -typedef struct efx_filter_tbl_s { - int eft_size; /* number of entries */ - int eft_used; /* active count */ - uint32_t *eft_bitmap; /* active bitmap */ - efx_filter_spec_t *eft_spec; /* array of saved specs */ -} efx_filter_tbl_t; +typedef struct falconsiena_filter_tbl_s { + int fsft_size; /* number of entries */ + int fsft_used; /* active count */ + uint32_t *fsft_bitmap; /* active bitmap */ + falconsiena_filter_spec_t *fsft_spec; /* array of saved specs */ +} falconsiena_filter_tbl_t; + +typedef struct falconsiena_filter_s { + falconsiena_filter_tbl_t fsf_tbl[EFX_FS_FILTER_NTBLS]; + unsigned int fsf_depth[EFX_FS_FILTER_NTYPES]; +} falconsiena_filter_t; typedef struct efx_filter_s { - efx_filter_tbl_t ef_tbl[EFX_FILTER_NTBLS]; - unsigned int ef_depth[EFX_FILTER_NTYPES]; +#if EFSYS_OPT_FALCON || EFSYS_OPT_SIENA + falconsiena_filter_t *ef_falconsiena_filter; +#endif /* EFSYS_OPT_FALCON || EFSYS_OPT_SIENA */ +#if EFSYS_OPT_HUNTINGTON + hunt_filter_table_t *ef_hunt_filter_table; +#endif /* EFSYS_OPT_HUNTINGTON */ } efx_filter_t; - -extern __checkReturn int -efx_filter_insert_filter( - __in efx_nic_t *enp, - __in efx_filter_spec_t *spec, - __in boolean_t replace); - -extern __checkReturn int -efx_filter_remove_filter( - __in efx_nic_t *enp, - __in efx_filter_spec_t *spec); - extern void -efx_filter_remove_index( - __inout efx_nic_t *enp, - __in efx_filter_type_t type, - __in int filter_idx); - -extern void -efx_filter_redirect_index( - __inout efx_nic_t *enp, - __in efx_filter_type_t type, - __in int filter_index, - __in int rxq_index); - -extern __checkReturn int -efx_filter_clear_tbl( +falconsiena_filter_tbl_clear( __in efx_nic_t *enp, - __in efx_filter_tbl_id_t tbl); + __in falconsiena_filter_tbl_id_t tbl); #endif /* EFSYS_OPT_FILTER */ +#if EFSYS_OPT_MCDI + +typedef struct efx_mcdi_ops_s { + int (*emco_init)(efx_nic_t *, const efx_mcdi_transport_t *); + void (*emco_request_copyin)(efx_nic_t *, efx_mcdi_req_t *, + unsigned int, boolean_t, boolean_t); + boolean_t (*emco_request_poll)(efx_nic_t *); + void (*emco_request_copyout)(efx_nic_t *, efx_mcdi_req_t *); + int (*emco_poll_reboot)(efx_nic_t *); + void (*emco_fini)(efx_nic_t *); + int (*emco_fw_update_supported)(efx_nic_t *, boolean_t *); + int (*emco_macaddr_change_supported)(efx_nic_t *, boolean_t *); +} efx_mcdi_ops_t; + +typedef struct efx_mcdi_s { + efx_mcdi_ops_t *em_emcop; + const efx_mcdi_transport_t *em_emtp; + efx_mcdi_iface_t em_emip; +} efx_mcdi_t; + +#endif /* EFSYS_OPT_MCDI */ + #if EFSYS_OPT_NVRAM typedef struct efx_nvram_ops_s { #if EFSYS_OPT_DIAG @@ -325,6 +507,85 @@ typedef struct efx_vpd_ops_s { } efx_vpd_ops_t; #endif /* EFSYS_OPT_VPD */ +#if EFSYS_OPT_VPD || EFSYS_OPT_NVRAM + + __checkReturn int +efx_mcdi_nvram_partitions( + __in efx_nic_t *enp, + __out_bcount(size) caddr_t data, + __in size_t size, + __out unsigned int *npartnp); + + __checkReturn int +efx_mcdi_nvram_metadata( + __in efx_nic_t *enp, + __in uint32_t partn, + __out uint32_t *subtypep, + __out_ecount(4) uint16_t version[4], + __out_bcount_opt(size) char *descp, + __in size_t size); + + __checkReturn int +efx_mcdi_nvram_info( + __in efx_nic_t *enp, + __in uint32_t partn, + __out_opt size_t *sizep, + __out_opt uint32_t *addressp, + __out_opt uint32_t *erase_sizep); + + __checkReturn int +efx_mcdi_nvram_update_start( + __in efx_nic_t *enp, + __in uint32_t partn); + + __checkReturn int +efx_mcdi_nvram_read( + __in efx_nic_t *enp, + __in uint32_t partn, + __in uint32_t offset, + __out_bcount(size) caddr_t data, + __in size_t size); + + __checkReturn int +efx_mcdi_nvram_erase( + __in efx_nic_t *enp, + __in uint32_t partn, + __in uint32_t offset, + __in size_t size); + + __checkReturn int +efx_mcdi_nvram_write( + __in efx_nic_t *enp, + __in uint32_t partn, + __in uint32_t offset, + __out_bcount(size) caddr_t data, + __in size_t size); + + __checkReturn int +efx_mcdi_nvram_update_finish( + __in efx_nic_t *enp, + __in uint32_t partn, + __in boolean_t reboot); + +#if EFSYS_OPT_DIAG + + __checkReturn int +efx_mcdi_nvram_test( + __in efx_nic_t *enp, + __in uint32_t partn); + +#endif /* EFSYS_OPT_DIAG */ + +#endif /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */ + +typedef struct efx_drv_cfg_s { + uint32_t edc_min_vi_count; + uint32_t edc_max_vi_count; + + uint32_t edc_max_piobuf_count; + uint32_t edc_pio_alloc_size; +} efx_drv_cfg_t; + struct efx_nic_s { uint32_t en_magic; efx_family_t en_family; @@ -335,6 +596,7 @@ struct efx_nic_s { unsigned int en_mod_flags; unsigned int en_reset_flags; efx_nic_cfg_t en_nic_cfg; + efx_drv_cfg_t en_drv_cfg; efx_port_t en_port; efx_mon_t en_mon; efx_intr_t en_intr; @@ -342,9 +604,17 @@ struct efx_nic_s { uint32_t en_rx_qcount; uint32_t en_tx_qcount; efx_nic_ops_t *en_enop; + efx_ev_ops_t *en_eevop; + efx_tx_ops_t *en_etxop; + efx_rx_ops_t *en_erxop; #if EFSYS_OPT_FILTER efx_filter_t en_filter; + efx_filter_ops_t *en_efop; #endif /* EFSYS_OPT_FILTER */ + efx_pktfilter_ops_t *en_epfop; +#if EFSYS_OPT_MCDI + efx_mcdi_t en_mcdi; +#endif /* EFSYS_OPT_MCDI */ #if EFSYS_OPT_NVRAM efx_nvram_type_t en_nvram_locked; efx_nvram_ops_t *en_envop; @@ -352,6 +622,12 @@ struct efx_nic_s { #if EFSYS_OPT_VPD efx_vpd_ops_t *en_evpdop; #endif /* EFSYS_OPT_VPD */ +#if EFSYS_OPT_RX_SCALE + efx_rx_hash_support_t en_hash_support; + efx_rx_scale_support_t en_rss_support; + uint32_t en_rss_context; +#endif /* EFSYS_OPT_RX_SCALE */ + uint32_t en_vport_id; union { #if EFSYS_OPT_FALCON struct { @@ -373,9 +649,6 @@ struct efx_nic_s { #endif /* EFSYS_OPT_FALCON */ #if EFSYS_OPT_SIENA struct { -#if EFSYS_OPT_MCDI - efx_mcdi_iface_t enu_mip; -#endif /* EFSYS_OPT_MCDI */ #if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD unsigned int enu_partn_mask; #endif /* EFSYS_OPT_NVRAM || EFSYS_OPT_VPD */ @@ -383,8 +656,28 @@ struct efx_nic_s { caddr_t enu_svpd; size_t enu_svpd_length; #endif /* EFSYS_OPT_VPD */ + int enu_unused; } siena; #endif /* EFSYS_OPT_SIENA */ +#if EFSYS_OPT_HUNTINGTON + struct { + int enu_vi_base; + int enu_vi_count; +#if EFSYS_OPT_VPD + caddr_t enu_svpd; + size_t enu_svpd_length; +#endif /* EFSYS_OPT_VPD */ + efx_piobuf_handle_t enu_piobuf_handle[HUNT_PIOBUF_NBUFS]; + uint32_t enu_piobuf_count; + uint32_t enu_pio_alloc_map[HUNT_PIOBUF_NBUFS]; + uint32_t enu_pio_write_vi_base; + /* Memory BAR mapping regions */ + uint32_t enu_uc_mem_map_offset; + size_t enu_uc_mem_map_size; + uint32_t enu_wc_mem_map_offset; + size_t enu_wc_mem_map_size; + } hunt; +#endif /* EFSYS_OPT_HUNTINGTON */ } en_u; }; @@ -394,6 +687,11 @@ struct efx_nic_s { typedef boolean_t (*efx_ev_handler_t)(efx_evq_t *, efx_qword_t *, const efx_ev_callbacks_t *, void *); +typedef struct efx_evq_rxq_state_s { + unsigned int eers_rx_read_ptr; + unsigned int eers_rx_mask; +} efx_evq_rxq_state_t; + struct efx_evq_s { uint32_t ee_magic; efx_nic_t *ee_enp; @@ -403,7 +701,17 @@ struct efx_evq_s { #if EFSYS_OPT_QSTATS uint32_t ee_stat[EV_NQSTATS]; #endif /* EFSYS_OPT_QSTATS */ - efx_ev_handler_t ee_handler[1 << FSF_AZ_EV_CODE_WIDTH]; + + efx_ev_handler_t ee_rx; + efx_ev_handler_t ee_tx; + efx_ev_handler_t ee_driver; + efx_ev_handler_t ee_global; + efx_ev_handler_t ee_drv_gen; +#if EFSYS_OPT_MCDI + efx_ev_handler_t ee_mcdi; +#endif /* EFSYS_OPT_MCDI */ + + efx_evq_rxq_state_t ee_rxq_state[EFX_EV_RX_NLABELS]; }; #define EFX_EVQ_MAGIC 0x08081997 @@ -414,7 +722,9 @@ struct efx_evq_s { struct efx_rxq_s { uint32_t er_magic; efx_nic_t *er_enp; + efx_evq_t *er_eep; unsigned int er_index; + unsigned int er_label; unsigned int er_mask; efsys_mem_t *er_esmp; }; @@ -427,6 +737,13 @@ struct efx_txq_s { unsigned int et_index; unsigned int et_mask; efsys_mem_t *et_esmp; +#if EFSYS_OPT_HUNTINGTON + uint32_t et_pio_bufnum; + uint32_t et_pio_blknum; + uint32_t et_pio_write_offset; + uint32_t et_pio_offset; + size_t et_pio_size; +#endif #if EFSYS_OPT_QSTATS uint32_t et_stat[TX_NQSTATS]; #endif /* EFSYS_OPT_QSTATS */ @@ -445,10 +762,19 @@ struct efx_txq_s { _NOTE(CONSTANTCONDITION) \ } while (B_FALSE) +#define EFX_MAC_BROADCAST_ADDR_SET(_dst) \ + do { \ + uint16_t *_d = (uint16_t *)(_dst); \ + _d[0] = 0xffff; \ + _d[1] = 0xffff; \ + _d[2] = 0xffff; \ + _NOTE(CONSTANTCONDITION) \ + } while (B_FALSE) + #if EFSYS_OPT_CHECK_REG #define EFX_CHECK_REG(_enp, _reg) \ do { \ - const char __cs *name = #_reg; \ + const char *name = #_reg; \ char min = name[4]; \ char max = name[5]; \ char rev; \ @@ -462,6 +788,10 @@ struct efx_txq_s { rev = 'C'; \ break; \ \ + case EFX_FAMILY_HUNTINGTON: \ + rev = 'D'; \ + break; \ + \ default: \ rev = '?'; \ break; \ @@ -578,6 +908,21 @@ struct efx_txq_s { _NOTE(CONSTANTCONDITION) \ } while (B_FALSE) +#define EFX_BAR_TBL_WRITED2(_enp, _reg, _index, _edp, _lock) \ + do { \ + EFX_CHECK_REG((_enp), (_reg)); \ + EFSYS_PROBE4(efx_bar_tbl_writed, const char *, #_reg, \ + uint32_t, (_index), \ + uint32_t, _reg ## _OFST, \ + uint32_t, (_edp)->ed_u32[0]); \ + EFSYS_BAR_WRITED((_enp)->en_esbp, \ + (_reg ## _OFST + \ + (2 * sizeof (efx_dword_t)) + \ + ((_index) * _reg ## _STEP)), \ + (_edp), (_lock)); \ + _NOTE(CONSTANTCONDITION) \ + } while (B_FALSE) + #define EFX_BAR_TBL_WRITED3(_enp, _reg, _index, _edp, _lock) \ do { \ EFX_CHECK_REG((_enp), (_reg)); \ @@ -621,12 +966,12 @@ struct efx_txq_s { _NOTE(CONSTANTCONDITION) \ } while (B_FALSE) -#define EFX_BAR_TBL_READO(_enp, _reg, _index, _eop) \ +#define EFX_BAR_TBL_READO(_enp, _reg, _index, _eop, _lock) \ do { \ EFX_CHECK_REG((_enp), (_reg)); \ EFSYS_BAR_READO((_enp)->en_esbp, \ (_reg ## _OFST + ((_index) * _reg ## _STEP)), \ - (_eop), B_TRUE); \ + (_eop), (_lock)); \ EFSYS_PROBE7(efx_bar_tbl_reado, const char *, #_reg, \ uint32_t, (_index), \ uint32_t, _reg ## _OFST, \ @@ -637,7 +982,7 @@ struct efx_txq_s { _NOTE(CONSTANTCONDITION) \ } while (B_FALSE) -#define EFX_BAR_TBL_WRITEO(_enp, _reg, _index, _eop) \ +#define EFX_BAR_TBL_WRITEO(_enp, _reg, _index, _eop, _lock) \ do { \ EFX_CHECK_REG((_enp), (_reg)); \ EFSYS_PROBE7(efx_bar_tbl_writeo, const char *, #_reg, \ @@ -649,14 +994,71 @@ struct efx_txq_s { uint32_t, (_eop)->eo_u32[0]); \ EFSYS_BAR_WRITEO((_enp)->en_esbp, \ (_reg ## _OFST + ((_index) * _reg ## _STEP)), \ - (_eop), B_TRUE); \ + (_eop), (_lock)); \ + _NOTE(CONSTANTCONDITION) \ + } while (B_FALSE) + +/* + * Allow drivers to perform optimised 128-bit doorbell writes. + * The DMA descriptor pointers (RX_DESC_UPD and TX_DESC_UPD) are + * special-cased in the BIU on the Falcon/Siena and EF10 architectures to avoid + * the need for locking in the host, and are the only ones known to be safe to + * use 128-bites write with. + */ +#define EFX_BAR_TBL_DOORBELL_WRITEO(_enp, _reg, _index, _eop) \ + do { \ + EFX_CHECK_REG((_enp), (_reg)); \ + EFSYS_PROBE7(efx_bar_tbl_doorbell_writeo, \ + const char *, \ + #_reg, \ + uint32_t, (_index), \ + uint32_t, _reg ## _OFST, \ + uint32_t, (_eop)->eo_u32[3], \ + uint32_t, (_eop)->eo_u32[2], \ + uint32_t, (_eop)->eo_u32[1], \ + uint32_t, (_eop)->eo_u32[0]); \ + EFSYS_BAR_DOORBELL_WRITEO((_enp)->en_esbp, \ + (_reg ## _OFST + ((_index) * _reg ## _STEP)), \ + (_eop)); \ + _NOTE(CONSTANTCONDITION) \ + } while (B_FALSE) + +#define EFX_DMA_SYNC_QUEUE_FOR_DEVICE(_esmp, _entries, _wptr, _owptr) \ + do { \ + unsigned int _new = (_wptr); \ + unsigned int _old = (_owptr); \ + \ + if ((_new) >= (_old)) \ + EFSYS_DMA_SYNC_FOR_DEVICE((_esmp), \ + (_old) * sizeof (efx_desc_t), \ + ((_new) - (_old)) * sizeof (efx_desc_t)); \ + else \ + /* \ + * It is cheaper to sync entire map than sync \ + * two parts especially when offset/size are \ + * ignored and entire map is synced in any case.\ + */ \ + EFSYS_DMA_SYNC_FOR_DEVICE((_esmp), \ + 0, \ + (_entries) * sizeof (efx_desc_t)); \ _NOTE(CONSTANTCONDITION) \ } while (B_FALSE) +extern __checkReturn int +efx_nic_biu_test( + __in efx_nic_t *enp); + extern __checkReturn int efx_mac_select( __in efx_nic_t *enp); +extern void +efx_mac_multicast_hash_compute( + __in_ecount(6*count) uint8_t const *addrs, + __in int count, + __out efx_oword_t *hash_low, + __out efx_oword_t *hash_high); + extern __checkReturn int efx_phy_probe( __in efx_nic_t *enp); @@ -683,7 +1085,7 @@ efx_vpd_hunk_verify( extern __checkReturn int efx_vpd_hunk_reinit( - __in caddr_t data, + __in_bcount(size) caddr_t data, __in size_t size, __in boolean_t wantpid); @@ -716,7 +1118,7 @@ efx_vpd_hunk_set( #if EFSYS_OPT_DIAG -extern efx_sram_pattern_fn_t __cs __efx_sram_pattern_fns[]; +extern efx_sram_pattern_fn_t __efx_sram_pattern_fns[]; typedef struct efx_register_set_s { unsigned int address; @@ -740,6 +1142,23 @@ efx_nic_test_tables( #endif /* EFSYS_OPT_DIAG */ +#if EFSYS_OPT_MCDI + +extern __checkReturn int +efx_mcdi_set_workaround( + __in efx_nic_t *enp, + __in uint32_t type, + __in boolean_t enabled, + __out_opt uint32_t *flagsp); + +extern __checkReturn int +efx_mcdi_get_workarounds( + __in efx_nic_t *enp, + __out_opt uint32_t *implementedp, + __out_opt uint32_t *enabledp); + +#endif /* EFSYS_OPT_MCDI */ + #ifdef __cplusplus } #endif diff --git a/sys/dev/sfxge/common/efx_intr.c b/sys/dev/sfxge/common/efx_intr.c index 556728df7ba9..d40f57f0b037 100644 --- a/sys/dev/sfxge/common/efx_intr.c +++ b/sys/dev/sfxge/common/efx_intr.c @@ -1,26 +1,31 @@ /*- - * Copyright 2007-2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2007-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -32,6 +37,82 @@ __FBSDID("$FreeBSD$"); #include "efx_regs.h" #include "efx_impl.h" + +#if EFSYS_OPT_FALCON || EFSYS_OPT_SIENA + +static __checkReturn int +falconsiena_intr_init( + __in efx_nic_t *enp, + __in efx_intr_type_t type, + __in efsys_mem_t *esmp); + +static void +falconsiena_intr_enable( + __in efx_nic_t *enp); + +static void +falconsiena_intr_disable( + __in efx_nic_t *enp); + +static void +falconsiena_intr_disable_unlocked( + __in efx_nic_t *enp); + +static __checkReturn int +falconsiena_intr_trigger( + __in efx_nic_t *enp, + __in unsigned int level); + +static void +falconsiena_intr_fini( + __in efx_nic_t *enp); + + +static __checkReturn boolean_t +falconsiena_intr_check_fatal( + __in efx_nic_t *enp); + +static void +falconsiena_intr_fatal( + __in efx_nic_t *enp); + +#endif /* EFSYS_OPT_FALCON || EFSYS_OPT_SIENA */ + + +#if EFSYS_OPT_FALCON +static efx_intr_ops_t __efx_intr_falcon_ops = { + falconsiena_intr_init, /* eio_init */ + falconsiena_intr_enable, /* eio_enable */ + falconsiena_intr_disable, /* eio_disable */ + falconsiena_intr_disable_unlocked, /* eio_disable_unlocked */ + falconsiena_intr_trigger, /* eio_trigger */ + falconsiena_intr_fini, /* eio_fini */ +}; +#endif /* EFSYS_OPT_FALCON */ + +#if EFSYS_OPT_SIENA +static efx_intr_ops_t __efx_intr_siena_ops = { + falconsiena_intr_init, /* eio_init */ + falconsiena_intr_enable, /* eio_enable */ + falconsiena_intr_disable, /* eio_disable */ + falconsiena_intr_disable_unlocked, /* eio_disable_unlocked */ + falconsiena_intr_trigger, /* eio_trigger */ + falconsiena_intr_fini, /* eio_fini */ +}; +#endif /* EFSYS_OPT_SIENA */ + +#if EFSYS_OPT_HUNTINGTON +static efx_intr_ops_t __efx_intr_hunt_ops = { + hunt_intr_init, /* eio_init */ + hunt_intr_enable, /* eio_enable */ + hunt_intr_disable, /* eio_disable */ + hunt_intr_disable_unlocked, /* eio_disable_unlocked */ + hunt_intr_trigger, /* eio_trigger */ + hunt_intr_fini, /* eio_fini */ +}; +#endif /* EFSYS_OPT_HUNTINGTON */ + + __checkReturn int efx_intr_init( __in efx_nic_t *enp, @@ -39,7 +120,7 @@ efx_intr_init( __in efsys_mem_t *esmp) { efx_intr_t *eip = &(enp->en_intr); - efx_oword_t oword; + efx_intr_ops_t *eiop; int rc; EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); @@ -50,10 +131,219 @@ efx_intr_init( goto fail1; } + eip->ei_esmp = esmp; + eip->ei_type = type; + eip->ei_level = 0; + enp->en_mod_flags |= EFX_MOD_INTR; - eip->ei_type = type; - eip->ei_esmp = esmp; + switch (enp->en_family) { +#if EFSYS_OPT_FALCON + case EFX_FAMILY_FALCON: + eiop = (efx_intr_ops_t *)&__efx_intr_falcon_ops; + break; +#endif /* EFSYS_OPT_FALCON */ + +#if EFSYS_OPT_SIENA + case EFX_FAMILY_SIENA: + eiop = (efx_intr_ops_t *)&__efx_intr_siena_ops; + break; +#endif /* EFSYS_OPT_SIENA */ + +#if EFSYS_OPT_HUNTINGTON + case EFX_FAMILY_HUNTINGTON: + eiop = (efx_intr_ops_t *)&__efx_intr_hunt_ops; + break; +#endif /* EFSYS_OPT_HUNTINGTON */ + + default: + EFSYS_ASSERT(B_FALSE); + rc = ENOTSUP; + goto fail2; + } + + if ((rc = eiop->eio_init(enp, type, esmp)) != 0) + goto fail3; + + eip->ei_eiop = eiop; + + return (0); + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + void +efx_intr_fini( + __in efx_nic_t *enp) +{ + efx_intr_t *eip = &(enp->en_intr); + efx_intr_ops_t *eiop = eip->ei_eiop; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR); + + eiop->eio_fini(enp); + + enp->en_mod_flags &= ~EFX_MOD_INTR; +} + + void +efx_intr_enable( + __in efx_nic_t *enp) +{ + efx_intr_t *eip = &(enp->en_intr); + efx_intr_ops_t *eiop = eip->ei_eiop; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR); + + eiop->eio_enable(enp); +} + + void +efx_intr_disable( + __in efx_nic_t *enp) +{ + efx_intr_t *eip = &(enp->en_intr); + efx_intr_ops_t *eiop = eip->ei_eiop; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR); + + eiop->eio_disable(enp); +} + + void +efx_intr_disable_unlocked( + __in efx_nic_t *enp) +{ + efx_intr_t *eip = &(enp->en_intr); + efx_intr_ops_t *eiop = eip->ei_eiop; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR); + + eiop->eio_disable_unlocked(enp); +} + + + __checkReturn int +efx_intr_trigger( + __in efx_nic_t *enp, + __in unsigned int level) +{ + efx_intr_t *eip = &(enp->en_intr); + efx_intr_ops_t *eiop = eip->ei_eiop; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR); + + return (eiop->eio_trigger(enp, level)); +} + + void +efx_intr_status_line( + __in efx_nic_t *enp, + __out boolean_t *fatalp, + __out uint32_t *qmaskp) +{ + efx_intr_t *eip = &(enp->en_intr); + efx_dword_t dword; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR); + + /* Ensure Huntington and Falcon/Siena ISR at same location */ + EFX_STATIC_ASSERT(FR_BZ_INT_ISR0_REG_OFST == + ER_DZ_BIU_INT_ISR_REG_OFST); + + /* + * Read the queue mask and implicitly acknowledge the + * interrupt. + */ + EFX_BAR_READD(enp, FR_BZ_INT_ISR0_REG, &dword, B_FALSE); + *qmaskp = EFX_DWORD_FIELD(dword, EFX_DWORD_0); + + EFSYS_PROBE1(qmask, uint32_t, *qmaskp); + +#if EFSYS_OPT_HUNTINGTON + if (enp->en_family == EFX_FAMILY_HUNTINGTON) { + /* Huntington reports fatal errors via events */ + *fatalp = B_FALSE; + return; + } +#endif + if (*qmaskp & (1U << eip->ei_level)) + *fatalp = falconsiena_intr_check_fatal(enp); + else + *fatalp = B_FALSE; +} + + void +efx_intr_status_message( + __in efx_nic_t *enp, + __in unsigned int message, + __out boolean_t *fatalp) +{ + efx_intr_t *eip = &(enp->en_intr); + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR); + +#if EFSYS_OPT_HUNTINGTON + if (enp->en_family == EFX_FAMILY_HUNTINGTON) { + /* Huntington reports fatal errors via events */ + *fatalp = B_FALSE; + return; + } +#endif + if (message == eip->ei_level) + *fatalp = falconsiena_intr_check_fatal(enp); + else + *fatalp = B_FALSE; +} + + void +efx_intr_fatal( + __in efx_nic_t *enp) +{ + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR); + +#if EFSYS_OPT_HUNTINGTON + if (enp->en_family == EFX_FAMILY_HUNTINGTON) { + /* Huntington reports fatal errors via events */ + return; + } +#endif +#if EFSYS_OPT_FALCON || EFSYS_OPT_SIENA + falconsiena_intr_fatal(enp); +#endif +} + + +/* ************************************************************************* */ +/* ************************************************************************* */ +/* ************************************************************************* */ + +#if EFSYS_OPT_FALCON || EFSYS_OPT_SIENA + +static __checkReturn int +falconsiena_intr_init( + __in efx_nic_t *enp, + __in efx_intr_type_t type, + __in efsys_mem_t *esmp) +{ + efx_intr_t *eip = &(enp->en_intr); + efx_oword_t oword; /* * bug17213 workaround. @@ -85,23 +375,15 @@ efx_intr_init( EFX_BAR_WRITEO(enp, FR_AZ_INT_ADR_REG_KER, &oword); return (0); - -fail1: - EFSYS_PROBE1(fail1, int, rc); - - return (rc); } - void -efx_intr_enable( +static void +falconsiena_intr_enable( __in efx_nic_t *enp) { efx_intr_t *eip = &(enp->en_intr); efx_oword_t oword; - EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR); - EFX_BAR_READO(enp, FR_AZ_INT_EN_REG_KER, &oword); EFX_SET_OWORD_FIELD(oword, FRF_AZ_KER_INT_LEVE_SEL, eip->ei_level); @@ -109,15 +391,12 @@ efx_intr_enable( EFX_BAR_WRITEO(enp, FR_AZ_INT_EN_REG_KER, &oword); } - void -efx_intr_disable( +static void +falconsiena_intr_disable( __in efx_nic_t *enp) { efx_oword_t oword; - EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR); - EFX_BAR_READO(enp, FR_AZ_INT_EN_REG_KER, &oword); EFX_SET_OWORD_FIELD(oword, FRF_AZ_DRV_INT_EN_KER, 0); EFX_BAR_WRITEO(enp, FR_AZ_INT_EN_REG_KER, &oword); @@ -125,15 +404,12 @@ efx_intr_disable( EFSYS_SPIN(10); } - void -efx_intr_disable_unlocked( +static void +falconsiena_intr_disable_unlocked( __in efx_nic_t *enp) { efx_oword_t oword; - EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR); - EFSYS_BAR_READO(enp->en_esbp, FR_AZ_INT_EN_REG_KER_OFST, &oword, B_FALSE); EFX_SET_OWORD_FIELD(oword, FRF_AZ_DRV_INT_EN_KER, 0); @@ -141,8 +417,8 @@ efx_intr_disable_unlocked( &oword, B_FALSE); } - __checkReturn int -efx_intr_trigger( +static __checkReturn int +falconsiena_intr_trigger( __in efx_nic_t *enp, __in unsigned int level) { @@ -152,22 +428,19 @@ efx_intr_trigger( uint32_t sel; int rc; - EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR); - /* bug16757: No event queues can be initialized */ EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_EV)); switch (enp->en_family) { case EFX_FAMILY_FALCON: - if (level > EFX_NINTR_FALCON) { + if (level >= EFX_NINTR_FALCON) { rc = EINVAL; goto fail1; } break; case EFX_FAMILY_SIENA: - if (level > EFX_NINTR_SIENA) { + if (level >= EFX_NINTR_SIENA) { rc = EINVAL; goto fail1; } @@ -213,7 +486,7 @@ efx_intr_trigger( } static __checkReturn boolean_t -efx_intr_check_fatal( +falconsiena_intr_check_fatal( __in efx_nic_t *enp) { efx_intr_t *eip = &(enp->en_intr); @@ -236,61 +509,14 @@ efx_intr_check_fatal( return (B_FALSE); } - void -efx_intr_status_line( - __in efx_nic_t *enp, - __out boolean_t *fatalp, - __out uint32_t *qmaskp) -{ - efx_intr_t *eip = &(enp->en_intr); - efx_dword_t dword; - - EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR); - - /* - * Read the queue mask and implicitly acknowledge the - * interrupt. - */ - EFX_BAR_READD(enp, FR_BZ_INT_ISR0_REG, &dword, B_FALSE); - *qmaskp = EFX_DWORD_FIELD(dword, EFX_DWORD_0); - - EFSYS_PROBE1(qmask, uint32_t, *qmaskp); - - if (*qmaskp & (1U << eip->ei_level)) - *fatalp = efx_intr_check_fatal(enp); - else - *fatalp = B_FALSE; -} - - void -efx_intr_status_message( - __in efx_nic_t *enp, - __in unsigned int message, - __out boolean_t *fatalp) -{ - efx_intr_t *eip = &(enp->en_intr); - - EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR); - - if (message == eip->ei_level) - *fatalp = efx_intr_check_fatal(enp); - else - *fatalp = B_FALSE; -} - - void -efx_intr_fatal( +static void +falconsiena_intr_fatal( __in efx_nic_t *enp) { #if EFSYS_OPT_DECODE_INTR_FATAL efx_oword_t fatal; efx_oword_t mem_per; - EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR); - EFX_BAR_READO(enp, FR_AZ_FATAL_INTR_REG_KER, &fatal); EFX_ZERO_OWORD(mem_per); @@ -339,19 +565,15 @@ efx_intr_fatal( #endif } - void -efx_intr_fini( +static void +falconsiena_intr_fini( __in efx_nic_t *enp) { efx_oword_t oword; - EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR); - /* Clear the interrupt address register */ EFX_ZERO_OWORD(oword); EFX_BAR_WRITEO(enp, FR_AZ_INT_ADR_REG_KER, &oword); - - enp->en_mod_flags &= ~EFX_MOD_INTR; } + +#endif /* EFSYS_OPT_FALCON || EFSYS_OPT_SIENA */ diff --git a/sys/dev/sfxge/common/efx_mac.c b/sys/dev/sfxge/common/efx_mac.c index 3e9449ad70fb..a701797c80bb 100644 --- a/sys/dev/sfxge/common/efx_mac.c +++ b/sys/dev/sfxge/common/efx_mac.c @@ -1,26 +1,31 @@ /*- - * Copyright 2007-2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2007-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -39,74 +44,126 @@ __FBSDID("$FreeBSD$"); #include "falcon_xmac.h" #endif +#if EFSYS_OPT_FALCON || EFSYS_OPT_SIENA + +static __checkReturn int +falconsiena_mac_multicast_list_set( + __in efx_nic_t *enp); + +#endif /* EFSYS_OPT_FALCON || EFSYS_OPT_SIENA */ + #if EFSYS_OPT_MAC_FALCON_GMAC -static efx_mac_ops_t __cs __efx_falcon_gmac_ops = { - falcon_gmac_reset, /* emo_reset */ - falcon_mac_poll, /* emo_poll */ - falcon_mac_up, /* emo_up */ - falcon_gmac_reconfigure, /* emo_reconfigure */ +static efx_mac_ops_t __efx_falcon_gmac_ops = { + falcon_gmac_reset, /* emo_reset */ + falcon_mac_poll, /* emo_poll */ + falcon_mac_up, /* emo_up */ + falcon_gmac_reconfigure, /* emo_addr_set */ + falcon_gmac_reconfigure, /* emo_reconfigure */ + falconsiena_mac_multicast_list_set, /* emo_multicast_list_set */ + NULL, /* emo_filter_set_default_rxq */ + NULL, /* emo_filter_default_rxq_clear */ #if EFSYS_OPT_LOOPBACK - falcon_mac_loopback_set, /* emo_loopback_set */ + falcon_mac_loopback_set, /* emo_loopback_set */ #endif /* EFSYS_OPT_LOOPBACK */ #if EFSYS_OPT_MAC_STATS - falcon_mac_stats_upload, /* emo_stats_upload */ - NULL, /* emo_stats_periodic */ - falcon_gmac_stats_update /* emo_stats_update */ + falcon_mac_stats_upload, /* emo_stats_upload */ + NULL, /* emo_stats_periodic */ + falcon_gmac_stats_update /* emo_stats_update */ #endif /* EFSYS_OPT_MAC_STATS */ }; #endif /* EFSYS_OPT_MAC_FALCON_GMAC */ #if EFSYS_OPT_MAC_FALCON_XMAC -static efx_mac_ops_t __cs __efx_falcon_xmac_ops = { - falcon_xmac_reset, /* emo_reset */ - falcon_mac_poll, /* emo_poll */ - falcon_mac_up, /* emo_up */ - falcon_xmac_reconfigure, /* emo_reconfigure */ +static efx_mac_ops_t __efx_falcon_xmac_ops = { + falcon_xmac_reset, /* emo_reset */ + falcon_mac_poll, /* emo_poll */ + falcon_mac_up, /* emo_up */ + falcon_xmac_reconfigure, /* emo_addr_set */ + falcon_xmac_reconfigure, /* emo_reconfigure */ + falconsiena_mac_multicast_list_set, /* emo_multicast_list_set */ + NULL, /* emo_filter_set_default_rxq */ + NULL, /* emo_filter_default_rxq_clear */ #if EFSYS_OPT_LOOPBACK - falcon_mac_loopback_set, /* emo_loopback_set */ + falcon_mac_loopback_set, /* emo_loopback_set */ #endif /* EFSYS_OPT_LOOPBACK */ #if EFSYS_OPT_MAC_STATS - falcon_mac_stats_upload, /* emo_stats_upload */ - NULL, /* emo_stats_periodic */ - falcon_xmac_stats_update /* emo_stats_update */ + falcon_mac_stats_upload, /* emo_stats_upload */ + NULL, /* emo_stats_periodic */ + falcon_xmac_stats_update /* emo_stats_update */ #endif /* EFSYS_OPT_MAC_STATS */ }; #endif /* EFSYS_OPT_MAC_FALCON_XMAC */ #if EFSYS_OPT_SIENA -static efx_mac_ops_t __cs __efx_siena_mac_ops = { - NULL, /* emo_reset */ - siena_mac_poll, /* emo_poll */ - siena_mac_up, /* emo_up */ - siena_mac_reconfigure, /* emo_reconfigure */ +static efx_mac_ops_t __efx_siena_mac_ops = { + NULL, /* emo_reset */ + siena_mac_poll, /* emo_poll */ + siena_mac_up, /* emo_up */ + siena_mac_reconfigure, /* emo_addr_set */ + siena_mac_reconfigure, /* emo_reconfigure */ + falconsiena_mac_multicast_list_set, /* emo_multicast_list_set */ + NULL, /* emo_filter_set_default_rxq */ + NULL, /* emo_filter_default_rxq_clear */ #if EFSYS_OPT_LOOPBACK - siena_mac_loopback_set, /* emo_loopback_set */ + siena_mac_loopback_set, /* emo_loopback_set */ #endif /* EFSYS_OPT_LOOPBACK */ #if EFSYS_OPT_MAC_STATS - siena_mac_stats_upload, /* emo_stats_upload */ - siena_mac_stats_periodic, /* emo_stats_periodic */ - siena_mac_stats_update /* emo_stats_update */ + efx_mcdi_mac_stats_upload, /* emo_stats_upload */ + efx_mcdi_mac_stats_periodic, /* emo_stats_periodic */ + siena_mac_stats_update /* emo_stats_update */ #endif /* EFSYS_OPT_MAC_STATS */ }; #endif /* EFSYS_OPT_SIENA */ -static efx_mac_ops_t __cs * __cs __efx_mac_ops[] = { +#if EFSYS_OPT_HUNTINGTON +static efx_mac_ops_t __efx_hunt_mac_ops = { + NULL, /* emo_reset */ + hunt_mac_poll, /* emo_poll */ + hunt_mac_up, /* emo_up */ + hunt_mac_addr_set, /* emo_addr_set */ + hunt_mac_reconfigure, /* emo_reconfigure */ + hunt_mac_multicast_list_set, /* emo_multicast_list_set */ + hunt_mac_filter_default_rxq_set, /* emo_filter_default_rxq_set */ + hunt_mac_filter_default_rxq_clear, + /* emo_filter_default_rxq_clear */ +#if EFSYS_OPT_LOOPBACK + hunt_mac_loopback_set, /* emo_loopback_set */ +#endif /* EFSYS_OPT_LOOPBACK */ +#if EFSYS_OPT_MAC_STATS + efx_mcdi_mac_stats_upload, /* emo_stats_upload */ + efx_mcdi_mac_stats_periodic, /* emo_stats_periodic */ + hunt_mac_stats_update /* emo_stats_update */ +#endif /* EFSYS_OPT_MAC_STATS */ +}; +#endif /* EFSYS_OPT_HUNTINGTON */ + +static efx_mac_ops_t *__efx_mac_ops[] = { + /* [EFX_MAC_INVALID] */ NULL, + /* [EFX_MAC_FALCON_GMAC] */ #if EFSYS_OPT_MAC_FALCON_GMAC &__efx_falcon_gmac_ops, #else NULL, -#endif /* EFSYS_OPT_MAC_FALCON_GMAC */ +#endif + /* [EFX_MAC_FALCON_XMAC] */ #if EFSYS_OPT_MAC_FALCON_XMAC &__efx_falcon_xmac_ops, #else NULL, -#endif /* EFSYS_OPT_MAC_FALCON_XMAC */ +#endif + /* [EFX_MAC_SIENA] */ #if EFSYS_OPT_SIENA &__efx_siena_mac_ops, #else NULL, -#endif /* EFSYS_OPT_SIENA */ +#endif + /* [EFX_MAC_HUNTINGTON] */ +#if EFSYS_OPT_HUNTINGTON + &__efx_hunt_mac_ops, +#else + NULL, +#endif }; __checkReturn int @@ -167,7 +224,7 @@ efx_mac_addr_set( EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT); - if (addr[0] & 0x01) { + if (EFX_MAC_ADDR_IS_MULTICAST(addr)) { rc = EINVAL; goto fail1; } @@ -180,7 +237,7 @@ efx_mac_addr_set( EFX_MAC_ADDR_COPY(old_addr, epp->ep_mac_addr); EFX_MAC_ADDR_COPY(epp->ep_mac_addr, addr); - if ((rc = emop->emo_reconfigure(enp)) != 0) + if ((rc = emop->emo_addr_set(enp)) != 0) goto fail3; return (0); @@ -201,22 +258,30 @@ efx_mac_addr_set( __checkReturn int efx_mac_filter_set( __in efx_nic_t *enp, - __in boolean_t unicst, + __in boolean_t all_unicst, + __in boolean_t mulcst, + __in boolean_t all_mulcst, __in boolean_t brdcst) { efx_port_t *epp = &(enp->en_port); efx_mac_ops_t *emop = epp->ep_emop; - boolean_t old_unicst; + boolean_t old_all_unicst; + boolean_t old_mulcst; + boolean_t old_all_mulcst; boolean_t old_brdcst; int rc; EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT); - old_unicst = unicst; - old_brdcst = brdcst; + old_all_unicst = epp->ep_all_unicst; + old_mulcst = epp->ep_mulcst; + old_all_mulcst = epp->ep_all_mulcst; + old_brdcst = epp->ep_brdcst; - epp->ep_unicst = unicst; + epp->ep_all_unicst = all_unicst; + epp->ep_mulcst = mulcst; + epp->ep_all_mulcst = all_mulcst; epp->ep_brdcst = brdcst; if ((rc = emop->emo_reconfigure(enp)) != 0) @@ -227,7 +292,9 @@ efx_mac_filter_set( fail1: EFSYS_PROBE1(fail1, int, rc); - epp->ep_unicst = old_unicst; + epp->ep_all_unicst = old_all_unicst; + epp->ep_mulcst = old_mulcst; + epp->ep_all_mulcst = old_all_mulcst; epp->ep_brdcst = old_brdcst; return (rc); @@ -318,45 +385,45 @@ efx_mac_fcntl_set( } /* - * Ignore a request to set flow control autonegotiation + * Ignore a request to set flow control auto-negotiation * if the PHY doesn't support it. */ if (~epp->ep_phy_cap_mask & (1 << EFX_PHY_CAP_AN)) autoneg = B_FALSE; old_fcntl = epp->ep_fcntl; - old_autoneg = autoneg; + old_autoneg = epp->ep_fcntl_autoneg; old_adv_cap = epp->ep_adv_cap_mask; epp->ep_fcntl = fcntl; epp->ep_fcntl_autoneg = autoneg; /* - * If the PHY supports autonegotiation, then encode the flow control - * settings in the advertised capabilities, and restart AN. Otherwise, - * just push the new settings directly to the MAC. + * Always encode the flow control settings in the advertised + * capabilities even if we are not trying to auto-negotiate + * them and reconfigure both the PHY and the MAC. */ - if (epp->ep_phy_cap_mask & (1 << EFX_PHY_CAP_AN)) { - if (fcntl & EFX_FCNTL_RESPOND) - epp->ep_adv_cap_mask |= (1 << EFX_PHY_CAP_PAUSE | - 1 << EFX_PHY_CAP_ASYM); - else - epp->ep_adv_cap_mask &= ~(1 << EFX_PHY_CAP_PAUSE | - 1 << EFX_PHY_CAP_ASYM); + if (fcntl & EFX_FCNTL_RESPOND) + epp->ep_adv_cap_mask |= (1 << EFX_PHY_CAP_PAUSE | + 1 << EFX_PHY_CAP_ASYM); + else + epp->ep_adv_cap_mask &= ~(1 << EFX_PHY_CAP_PAUSE | + 1 << EFX_PHY_CAP_ASYM); - if (fcntl & EFX_FCNTL_GENERATE) - epp->ep_adv_cap_mask ^= (1 << EFX_PHY_CAP_ASYM); + if (fcntl & EFX_FCNTL_GENERATE) + epp->ep_adv_cap_mask ^= (1 << EFX_PHY_CAP_ASYM); - if ((rc = epop->epo_reconfigure(enp)) != 0) - goto fail2; + if ((rc = epop->epo_reconfigure(enp)) != 0) + goto fail2; - } else { - if ((rc = emop->emo_reconfigure(enp)) != 0) - goto fail2; - } + if ((rc = emop->emo_reconfigure(enp)) != 0) + goto fail3; return (0); +fail3: + EFSYS_PROBE(fail3); + fail2: EFSYS_PROBE(fail2); @@ -377,29 +444,30 @@ efx_mac_fcntl_get( __out unsigned int *fcntl_linkp) { efx_port_t *epp = &(enp->en_port); - unsigned int wanted; + unsigned int wanted = 0; EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT); /* - * If the PHY supports auto negotiation, then the requested flow - * control settings are encoded in the advertised capabilities. + * Decode the requested flow control settings from the PHY + * advertised capabilities. */ - if (epp->ep_phy_cap_mask & (1 << EFX_PHY_CAP_AN)) { - wanted = 0; - - if (epp->ep_adv_cap_mask & (1 << EFX_PHY_CAP_PAUSE)) - wanted = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE; - if (epp->ep_adv_cap_mask & (1 << EFX_PHY_CAP_ASYM)) - wanted ^= EFX_FCNTL_GENERATE; - } else - wanted = epp->ep_fcntl; + if (epp->ep_adv_cap_mask & (1 << EFX_PHY_CAP_PAUSE)) + wanted = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE; + if (epp->ep_adv_cap_mask & (1 << EFX_PHY_CAP_ASYM)) + wanted ^= EFX_FCNTL_GENERATE; *fcntl_linkp = epp->ep_fcntl; *fcntl_wantedp = wanted; } +/* + * FIXME: efx_mac_hash_set() should be deleted once all its callers have been + * updated to use efx_mac_multicast_list_set(). + * Then efx_port_t.ep_multicst_hash could be made Falcon/Siena specific as + * well. + */ __checkReturn int efx_mac_hash_set( __in efx_nic_t *enp, @@ -443,12 +511,130 @@ efx_mac_hash_set( return (rc); } + __checkReturn int +efx_mac_multicast_list_set( + __in efx_nic_t *enp, + __in_ecount(6*count) uint8_t const *addrs, + __in int count) +{ + efx_port_t *epp = &(enp->en_port); + efx_mac_ops_t *emop = epp->ep_emop; + uint8_t *old_mulcst_addr_list = NULL; + uint32_t old_mulcst_addr_count; + int rc; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT); + + if (count > EFX_MAC_MULTICAST_LIST_MAX) { + rc = EINVAL; + goto fail1; + } + + old_mulcst_addr_count = epp->ep_mulcst_addr_count; + if (old_mulcst_addr_count > 0) { + /* Allocate memory to store old list (instead of using stack) */ + EFSYS_KMEM_ALLOC(enp->en_esip, + old_mulcst_addr_count * EFX_MAC_ADDR_LEN, + old_mulcst_addr_list); + if (old_mulcst_addr_list == NULL) { + rc = ENOMEM; + goto fail2; + } + + /* Save the old list in case we need to rollback */ + memcpy(old_mulcst_addr_list, epp->ep_mulcst_addr_list, + old_mulcst_addr_count * EFX_MAC_ADDR_LEN); + } + + /* Store the new list */ + memcpy(epp->ep_mulcst_addr_list, addrs, + count * EFX_MAC_ADDR_LEN); + epp->ep_mulcst_addr_count = count; + + if ((rc = emop->emo_multicast_list_set(enp)) != 0) + goto fail3; + + if (old_mulcst_addr_count > 0) { + EFSYS_KMEM_FREE(enp->en_esip, + old_mulcst_addr_count * EFX_MAC_ADDR_LEN, + old_mulcst_addr_list); + } + + return (0); + +fail3: + EFSYS_PROBE(fail3); + + /* Restore original list on failure */ + epp->ep_mulcst_addr_count = old_mulcst_addr_count; + if (old_mulcst_addr_count > 0) { + memcpy(epp->ep_mulcst_addr_list, old_mulcst_addr_list, + old_mulcst_addr_count * EFX_MAC_ADDR_LEN); + + EFSYS_KMEM_FREE(enp->en_esip, + old_mulcst_addr_count * EFX_MAC_ADDR_LEN, + old_mulcst_addr_list); + } + +fail2: + EFSYS_PROBE(fail2); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); + +} + + __checkReturn int +efx_mac_filter_default_rxq_set( + __in efx_nic_t *enp, + __in efx_rxq_t *erp, + __in boolean_t using_rss) +{ + efx_port_t *epp = &(enp->en_port); + efx_mac_ops_t *emop = epp->ep_emop; + int rc; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT); + + if (emop->emo_filter_default_rxq_set != NULL) { + rc = emop->emo_filter_default_rxq_set(enp, erp, using_rss); + if (rc != 0) + goto fail1; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + void +efx_mac_filter_default_rxq_clear( + __in efx_nic_t *enp) +{ + efx_port_t *epp = &(enp->en_port); + efx_mac_ops_t *emop = epp->ep_emop; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT); + + if (emop->emo_filter_default_rxq_clear != NULL) + emop->emo_filter_default_rxq_clear(enp); +} + + #if EFSYS_OPT_MAC_STATS #if EFSYS_OPT_NAMES -/* START MKCONFIG GENERATED EfxMacStatNamesBlock adf707adba80813e */ -static const char __cs * __cs __efx_mac_stat_name[] = { +/* START MKCONFIG GENERATED EfxMacStatNamesBlock 054d43a31d2d7a45 */ +static const char *__efx_mac_stat_name[] = { "rx_octets", "rx_pkts", "rx_unicst_pkts", @@ -500,10 +686,40 @@ static const char __cs * __cs __efx_mac_stat_name[] = { "tx_late_col_pkts", "tx_def_pkts", "tx_ex_def_pkts", + "pm_trunc_bb_overflow", + "pm_discard_bb_overflow", + "pm_trunc_vfifo_full", + "pm_discard_vfifo_full", + "pm_trunc_qbb", + "pm_discard_qbb", + "pm_discard_mapping", + "rxdp_q_disabled_pkts", + "rxdp_di_dropped_pkts", + "rxdp_streaming_pkts", + "rxdp_hlb_fetch", + "rxdp_hlb_wait", + "vadapter_rx_unicast_packets", + "vadapter_rx_unicast_bytes", + "vadapter_rx_multicast_packets", + "vadapter_rx_multicast_bytes", + "vadapter_rx_broadcast_packets", + "vadapter_rx_broadcast_bytes", + "vadapter_rx_bad_packets", + "vadapter_rx_bad_bytes", + "vadapter_rx_overflow", + "vadapter_tx_unicast_packets", + "vadapter_tx_unicast_bytes", + "vadapter_tx_multicast_packets", + "vadapter_tx_multicast_bytes", + "vadapter_tx_broadcast_packets", + "vadapter_tx_broadcast_bytes", + "vadapter_tx_bad_packets", + "vadapter_tx_bad_bytes", + "vadapter_tx_overflow", }; /* END MKCONFIG GENERATED EfxMacStatNamesBlock */ - __checkReturn const char __cs * + __checkReturn const char * efx_mac_stat_name( __in efx_nic_t *enp, __in unsigned int id) @@ -515,7 +731,7 @@ efx_mac_stat_name( return (__efx_mac_stat_name[id]); } -#endif /* EFSYS_OPT_STAT_NAME */ +#endif /* EFSYS_OPT_NAMES */ __checkReturn int efx_mac_stats_upload( @@ -588,7 +804,7 @@ efx_mac_stats_update( __in efx_nic_t *enp, __in efsys_mem_t *esmp, __inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *essp, - __in uint32_t *generationp) + __out_opt uint32_t *generationp) { efx_port_t *epp = &(enp->en_port); efx_mac_ops_t *emop = epp->ep_emop; @@ -616,6 +832,13 @@ efx_mac_select( efx_mac_ops_t *emop; int rc = EINVAL; +#if EFSYS_OPT_HUNTINGTON + if (enp->en_family == EFX_FAMILY_HUNTINGTON) { + type = EFX_MAC_HUNTINGTON; + goto chosen; + } +#endif + #if EFSYS_OPT_SIENA if (enp->en_family == EFX_FAMILY_SIENA) { type = EFX_MAC_SIENA; @@ -685,3 +908,71 @@ efx_mac_select( return (rc); } + + +#if EFSYS_OPT_FALCON || EFSYS_OPT_SIENA + +/* Compute the multicast hash as used on Falcon and Siena. */ +static void +falconsiena_mac_multicast_hash_compute( + __in_ecount(6*count) uint8_t const *addrs, + __in int count, + __out efx_oword_t *hash_low, + __out efx_oword_t *hash_high) +{ + uint32_t crc, index; + int i; + + EFSYS_ASSERT(hash_low != NULL); + EFSYS_ASSERT(hash_high != NULL); + + EFX_ZERO_OWORD(*hash_low); + EFX_ZERO_OWORD(*hash_high); + + for (i = 0; i < count; i++) { + /* Calculate hash bucket (IEEE 802.3 CRC32 of the MAC addr) */ + crc = efx_crc32_calculate(0xffffffff, addrs, EFX_MAC_ADDR_LEN); + index = crc % EFX_MAC_HASH_BITS; + if (index < 128) { + EFX_SET_OWORD_BIT(*hash_low, index); + } else { + EFX_SET_OWORD_BIT(*hash_high, index - 128); + } + + addrs += EFX_MAC_ADDR_LEN; + } +} + +static __checkReturn int +falconsiena_mac_multicast_list_set( + __in efx_nic_t *enp) +{ + efx_port_t *epp = &(enp->en_port); + efx_mac_ops_t *emop = epp->ep_emop; + efx_oword_t old_hash[2]; + int rc; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT); + + memcpy(old_hash, epp->ep_multicst_hash, sizeof (old_hash)); + + falconsiena_mac_multicast_hash_compute(epp->ep_mulcst_addr_list, + epp->ep_mulcst_addr_count, + &epp->ep_multicst_hash[0], + &epp->ep_multicst_hash[1]); + + if ((rc = emop->emo_reconfigure(enp)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + memcpy(epp->ep_multicst_hash, old_hash, sizeof (old_hash)); + + return (rc); +} + +#endif /* EFSYS_OPT_FALCON || EFSYS_OPT_SIENA */ diff --git a/sys/dev/sfxge/common/efx_mcdi.c b/sys/dev/sfxge/common/efx_mcdi.c index f389d57c7acc..e1c4b456dd59 100644 --- a/sys/dev/sfxge/common/efx_mcdi.c +++ b/sys/dev/sfxge/common/efx_mcdi.c @@ -1,26 +1,31 @@ /*- - * Copyright 2008-2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2008-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -35,12 +40,144 @@ __FBSDID("$FreeBSD$"); #if EFSYS_OPT_MCDI -/* - * A reboot/assertion causes the MCDI status word to be set after the - * command word is set or a REBOOT event is sent. If we notice a reboot - * via these mechanisms then wait 10ms for the status word to be set. - */ -#define MCDI_STATUS_SLEEP_US 10000 + +#if EFSYS_OPT_SIENA + +static efx_mcdi_ops_t __efx_mcdi_siena_ops = { + siena_mcdi_init, /* emco_init */ + siena_mcdi_request_copyin, /* emco_request_copyin */ + siena_mcdi_request_poll, /* emco_request_poll */ + siena_mcdi_request_copyout, /* emco_request_copyout */ + siena_mcdi_poll_reboot, /* emco_poll_reboot */ + siena_mcdi_fini, /* emco_fini */ + siena_mcdi_fw_update_supported, /* emco_fw_update_supported */ + siena_mcdi_macaddr_change_supported, + /* emco_macaddr_change_supported */ +}; + +#endif /* EFSYS_OPT_SIENA */ + +#if EFSYS_OPT_HUNTINGTON + +static efx_mcdi_ops_t __efx_mcdi_hunt_ops = { + hunt_mcdi_init, /* emco_init */ + hunt_mcdi_request_copyin, /* emco_request_copyin */ + hunt_mcdi_request_poll, /* emco_request_poll */ + hunt_mcdi_request_copyout, /* emco_request_copyout */ + hunt_mcdi_poll_reboot, /* emco_poll_reboot */ + hunt_mcdi_fini, /* emco_fini */ + hunt_mcdi_fw_update_supported, /* emco_fw_update_supported */ + hunt_mcdi_macaddr_change_supported, + /* emco_macaddr_change_supported */ +}; + +#endif /* EFSYS_OPT_HUNTINGTON */ + + + + __checkReturn int +efx_mcdi_init( + __in efx_nic_t *enp, + __in const efx_mcdi_transport_t *emtp) +{ + efx_mcdi_ops_t *emcop; + int rc; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, ==, 0); + + switch (enp->en_family) { +#if EFSYS_OPT_FALCON + case EFX_FAMILY_FALCON: + emcop = NULL; + emtp = NULL; + break; +#endif /* EFSYS_OPT_FALCON */ + +#if EFSYS_OPT_SIENA + case EFX_FAMILY_SIENA: + emcop = (efx_mcdi_ops_t *)&__efx_mcdi_siena_ops; + break; +#endif /* EFSYS_OPT_SIENA */ + +#if EFSYS_OPT_HUNTINGTON + case EFX_FAMILY_HUNTINGTON: + emcop = (efx_mcdi_ops_t *)&__efx_mcdi_hunt_ops; + break; +#endif /* EFSYS_OPT_HUNTINGTON */ + + default: + EFSYS_ASSERT(0); + rc = ENOTSUP; + goto fail1; + } + + if (enp->en_features & EFX_FEATURE_MCDI_DMA) { + /* MCDI requires a DMA buffer in host memory */ + if ((emtp == NULL) || (emtp->emt_dma_mem) == NULL) { + rc = EINVAL; + goto fail2; + } + } + enp->en_mcdi.em_emtp = emtp; + + if (emcop != NULL && emcop->emco_init != NULL) { + if ((rc = emcop->emco_init(enp, emtp)) != 0) + goto fail3; + } + + enp->en_mcdi.em_emcop = emcop; + enp->en_mod_flags |= EFX_MOD_MCDI; + + return (0); + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + enp->en_mcdi.em_emcop = NULL; + enp->en_mcdi.em_emtp = NULL; + enp->en_mod_flags &= ~EFX_MOD_MCDI; + + return (rc); +} + + void +efx_mcdi_fini( + __in efx_nic_t *enp) +{ + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); + efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, ==, EFX_MOD_MCDI); + + if (emcop != NULL && emcop->emco_fini != NULL) + emcop->emco_fini(enp); + + emip->emi_port = 0; + emip->emi_aborted = 0; + + enp->en_mcdi.em_emcop = NULL; + enp->en_mod_flags &= ~EFX_MOD_MCDI; +} + + void +efx_mcdi_new_epoch( + __in efx_nic_t *enp) +{ + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); + int state; + + /* Start a new epoch (allow fresh MCDI requests to succeed) */ + EFSYS_LOCK(enp->en_eslp, state); + emip->emi_new_epoch = B_TRUE; + EFSYS_UNLOCK(enp->en_eslp, state); +} + void efx_mcdi_request_start( @@ -48,32 +185,18 @@ efx_mcdi_request_start( __in efx_mcdi_req_t *emrp, __in boolean_t ev_cpl) { - efx_mcdi_iface_t *emip = &(enp->en_u.siena.enu_mip); - efx_dword_t dword; + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); + efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop; unsigned int seq; - unsigned int xflags; - unsigned int pdur; - unsigned int dbr; - unsigned int pos; + boolean_t new_epoch; int state; EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI); EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI); - switch (emip->emi_port) { - case 1: - pdur = MC_SMEM_P0_PDU_OFST >> 2; - dbr = MC_SMEM_P0_DOORBELL_OFST >> 2; - break; - case 2: - pdur = MC_SMEM_P1_PDU_OFST >> 2; - dbr = MC_SMEM_P1_DOORBELL_OFST >> 2; - break; - default: - EFSYS_ASSERT(0); - pdur = dbr = 0; - }; + if (emcop == NULL || emcop->emco_request_copyin == NULL) + return; /* * efx_mcdi_request_start() is naturally serialised against both @@ -92,68 +215,85 @@ efx_mcdi_request_start( emip->emi_pending_req = emrp; emip->emi_ev_cpl = ev_cpl; emip->emi_poll_cnt = 0; - seq = emip->emi_seq++ & 0xf; + seq = emip->emi_seq++ & EFX_MASK32(MCDI_HEADER_SEQ); + new_epoch = emip->emi_new_epoch; EFSYS_UNLOCK(enp->en_eslp, state); - xflags = 0; - if (ev_cpl) - xflags |= MCDI_HEADER_XFLAGS_EVREQ; - - /* Construct the header in shared memory */ - EFX_POPULATE_DWORD_6(dword, - MCDI_HEADER_CODE, emrp->emr_cmd, - MCDI_HEADER_RESYNC, 1, - MCDI_HEADER_DATALEN, emrp->emr_in_length, - MCDI_HEADER_SEQ, seq, - MCDI_HEADER_RESPONSE, 0, - MCDI_HEADER_XFLAGS, xflags); - EFX_BAR_TBL_WRITED(enp, FR_CZ_MC_TREG_SMEM, pdur, &dword, B_TRUE); - - for (pos = 0; pos < emrp->emr_in_length; pos += sizeof (efx_dword_t)) { - memcpy(&dword, MCDI_IN(*emrp, efx_dword_t, pos), - MIN(sizeof (dword), emrp->emr_in_length - pos)); - EFX_BAR_TBL_WRITED(enp, FR_CZ_MC_TREG_SMEM, - pdur + 1 + (pos >> 2), &dword, B_FALSE); - } - - /* Ring the doorbell */ - EFX_POPULATE_DWORD_1(dword, EFX_DWORD_0, 0xd004be11); - EFX_BAR_TBL_WRITED(enp, FR_CZ_MC_TREG_SMEM, dbr, &dword, B_FALSE); + emcop->emco_request_copyin(enp, emrp, seq, ev_cpl, new_epoch); } -static void -efx_mcdi_request_copyout( - __in efx_nic_t *enp, - __in efx_mcdi_req_t *emrp) + __checkReturn boolean_t +efx_mcdi_request_poll( + __in efx_nic_t *enp) { - efx_mcdi_iface_t *emip = &(enp->en_u.siena.enu_mip); - unsigned int pos; - unsigned int pdur; - efx_dword_t data; + efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop; + boolean_t completed; - pdur = (emip->emi_port == 1) - ? MC_SMEM_P0_PDU_OFST >> 2 - : MC_SMEM_P1_PDU_OFST >> 2; + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI); + EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI); - /* Copy payload out if caller supplied buffer */ - if (emrp->emr_out_buf != NULL) { - size_t bytes = MIN(emrp->emr_out_length_used, - emrp->emr_out_length); - for (pos = 0; pos < bytes; pos += sizeof (efx_dword_t)) { - EFX_BAR_TBL_READD(enp, FR_CZ_MC_TREG_SMEM, - pdur + 1 + (pos >> 2), &data, B_FALSE); - memcpy(MCDI_OUT(*emrp, efx_dword_t, pos), &data, - MIN(sizeof (data), bytes - pos)); - } - } + completed = B_FALSE; + + if (emcop != NULL && emcop->emco_request_poll != NULL) + completed = emcop->emco_request_poll(enp); + + return (completed); } -static int + __checkReturn boolean_t +efx_mcdi_request_abort( + __in efx_nic_t *enp) +{ + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); + efx_mcdi_req_t *emrp; + boolean_t aborted; + int state; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI); + EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI); + + /* + * efx_mcdi_ev_* may have already completed this event, and be + * spinning/blocked on the upper layer lock. So it *is* legitimate + * to for emi_pending_req to be NULL. If there is a pending event + * completed request, then provide a "credit" to allow + * efx_mcdi_ev_cpl() to accept a single spurious completion. + */ + EFSYS_LOCK(enp->en_eslp, state); + emrp = emip->emi_pending_req; + aborted = (emrp != NULL); + if (aborted) { + emip->emi_pending_req = NULL; + + /* Error the request */ + emrp->emr_out_length_used = 0; + emrp->emr_rc = ETIMEDOUT; + + /* Provide a credit for seqno/emr_pending_req mismatches */ + if (emip->emi_ev_cpl) + ++emip->emi_aborted; + + /* + * The upper layer has called us, so we don't + * need to complete the request. + */ + } + EFSYS_UNLOCK(enp->en_eslp, state); + + return (aborted); +} + + __checkReturn int efx_mcdi_request_errcode( __in unsigned int err) { switch (err) { + /* MCDI v1 */ + case MC_CMD_ERR_EPERM: + return (EACCES); case MC_CMD_ERR_ENOENT: return (ENOENT); case MC_CMD_ERR_EINTR: @@ -170,26 +310,55 @@ efx_mcdi_request_errcode( return (ENOTSUP); case MC_CMD_ERR_ETIME: return (ETIMEDOUT); -#ifdef WITH_MCDI_V2 + case MC_CMD_ERR_ENOTSUP: + return (ENOTSUP); + case MC_CMD_ERR_EALREADY: + return (EALREADY); + + /* MCDI v2 */ +#ifdef MC_CMD_ERR_EAGAIN case MC_CMD_ERR_EAGAIN: return (EAGAIN); +#endif +#ifdef MC_CMD_ERR_ENOSPC case MC_CMD_ERR_ENOSPC: return (ENOSPC); #endif + + case MC_CMD_ERR_ALLOC_FAIL: + return (ENOMEM); + case MC_CMD_ERR_NO_VADAPTOR: + return (ENOENT); + case MC_CMD_ERR_NO_EVB_PORT: + return (ENOENT); + case MC_CMD_ERR_NO_VSWITCH: + return (ENODEV); + case MC_CMD_ERR_VLAN_LIMIT: + return (EINVAL); + case MC_CMD_ERR_BAD_PCI_FUNC: + return (ENODEV); + case MC_CMD_ERR_BAD_VLAN_MODE: + return (EINVAL); + case MC_CMD_ERR_BAD_VSWITCH_TYPE: + return (EINVAL); + case MC_CMD_ERR_BAD_VPORT_TYPE: + return (EINVAL); + case MC_CMD_ERR_MAC_EXIST: + return (EEXIST); + default: EFSYS_PROBE1(mc_pcol_error, int, err); return (EIO); } } -static void + void efx_mcdi_raise_exception( __in efx_nic_t *enp, __in_opt efx_mcdi_req_t *emrp, __in int rc) { - efx_mcdi_iface_t *emip = &(enp->en_u.siena.enu_mip); - const efx_mcdi_transport_t *emtp = emip->emi_mtp; + const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp; efx_mcdi_exception_t exception; /* Reboot or Assertion failure only */ @@ -213,167 +382,37 @@ static int efx_mcdi_poll_reboot( __in efx_nic_t *enp) { -#ifndef EFX_GRACEFUL_MC_REBOOT - /* - * This function is not being used properly. - * Until its callers are fixed, it should always return 0. - */ - _NOTE(ARGUNUSED(enp)) - return (0); -#else - efx_mcdi_iface_t *emip = &(enp->en_u.siena.enu_mip); - unsigned int rebootr; - efx_dword_t dword; - uint32_t value; + efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop; - EFSYS_ASSERT(emip->emi_port == 1 || emip->emi_port == 2); - rebootr = ((emip->emi_port == 1) - ? MC_SMEM_P0_STATUS_OFST >> 2 - : MC_SMEM_P1_STATUS_OFST >> 2); - - EFX_BAR_TBL_READD(enp, FR_CZ_MC_TREG_SMEM, rebootr, &dword, B_FALSE); - value = EFX_DWORD_FIELD(dword, EFX_DWORD_0); - - if (value == 0) - return (0); - - EFX_ZERO_DWORD(dword); - EFX_BAR_TBL_WRITED(enp, FR_CZ_MC_TREG_SMEM, rebootr, &dword, B_FALSE); - - if (value == MC_STATUS_DWORD_ASSERT) - return (EINTR); - else - return (EIO); -#endif + return (emcop->emco_poll_reboot(enp)); } - __checkReturn boolean_t -efx_mcdi_request_poll( - __in efx_nic_t *enp) -{ - efx_mcdi_iface_t *emip = &(enp->en_u.siena.enu_mip); - efx_mcdi_req_t *emrp; - efx_dword_t dword; - unsigned int pdur; - unsigned int seq; - unsigned int length; - int state; - int rc; - - EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI); - EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_SIENA); - EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI); - - /* Serialise against post-watchdog efx_mcdi_ev* */ - EFSYS_LOCK(enp->en_eslp, state); - - EFSYS_ASSERT(emip->emi_pending_req != NULL); - EFSYS_ASSERT(!emip->emi_ev_cpl); - emrp = emip->emi_pending_req; - - /* Check for reboot atomically w.r.t efx_mcdi_request_start */ - if (emip->emi_poll_cnt++ == 0) { - if ((rc = efx_mcdi_poll_reboot(enp)) != 0) { - emip->emi_pending_req = NULL; - EFSYS_UNLOCK(enp->en_eslp, state); - - goto fail1; - } - } - - EFSYS_ASSERT(emip->emi_port == 1 || emip->emi_port == 2); - pdur = (emip->emi_port == 1) - ? MC_SMEM_P0_PDU_OFST >> 2 - : MC_SMEM_P1_PDU_OFST >> 2; - - /* Read the command header */ - EFX_BAR_TBL_READD(enp, FR_CZ_MC_TREG_SMEM, pdur, &dword, B_FALSE); - if (EFX_DWORD_FIELD(dword, MCDI_HEADER_RESPONSE) == 0) { - EFSYS_UNLOCK(enp->en_eslp, state); - return (B_FALSE); - } - - /* Request complete */ - emip->emi_pending_req = NULL; - seq = (emip->emi_seq - 1) & 0xf; - - /* Check for synchronous reboot */ - if (EFX_DWORD_FIELD(dword, MCDI_HEADER_ERROR) != 0 && - EFX_DWORD_FIELD(dword, MCDI_HEADER_DATALEN) == 0) { - /* Consume status word */ - EFSYS_SPIN(MCDI_STATUS_SLEEP_US); - efx_mcdi_poll_reboot(enp); - EFSYS_UNLOCK(enp->en_eslp, state); - rc = EIO; - goto fail2; - } - - EFSYS_UNLOCK(enp->en_eslp, state); - - /* Check that the returned data is consistent */ - if (EFX_DWORD_FIELD(dword, MCDI_HEADER_CODE) != emrp->emr_cmd || - EFX_DWORD_FIELD(dword, MCDI_HEADER_SEQ) != seq) { - /* Response is for a different request */ - rc = EIO; - goto fail3; - } - - length = EFX_DWORD_FIELD(dword, MCDI_HEADER_DATALEN); - if (EFX_DWORD_FIELD(dword, MCDI_HEADER_ERROR)) { - efx_dword_t errdword; - int errcode; - - EFSYS_ASSERT3U(length, ==, 4); - EFX_BAR_TBL_READD(enp, FR_CZ_MC_TREG_SMEM, - pdur + 1 + (MC_CMD_ERR_CODE_OFST >> 2), - &errdword, B_FALSE); - errcode = EFX_DWORD_FIELD(errdword, EFX_DWORD_0); - rc = efx_mcdi_request_errcode(errcode); - EFSYS_PROBE2(mcdi_err, int, emrp->emr_cmd, int, errcode); - goto fail4; - - } else { - emrp->emr_out_length_used = length; - emrp->emr_rc = 0; - efx_mcdi_request_copyout(enp, emrp); - } - - goto out; - -fail4: - EFSYS_PROBE(fail4); -fail3: - EFSYS_PROBE(fail3); -fail2: - EFSYS_PROBE(fail2); -fail1: - EFSYS_PROBE1(fail1, int, rc); - - /* Fill out error state */ - emrp->emr_rc = rc; - emrp->emr_out_length_used = 0; - - /* Reboot/Assertion */ - if (rc == EIO || rc == EINTR) - efx_mcdi_raise_exception(enp, emrp, rc); - -out: - return (B_TRUE); -} void efx_mcdi_execute( __in efx_nic_t *enp, - __in efx_mcdi_req_t *emrp) + __inout efx_mcdi_req_t *emrp) { - efx_mcdi_iface_t *emip = &(enp->en_u.siena.enu_mip); - const efx_mcdi_transport_t *emtp = emip->emi_mtp; + const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp; EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI); - EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_SIENA); EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI); + emrp->emr_quiet = B_FALSE; + emtp->emt_execute(emtp->emt_context, emrp); +} + + void +efx_mcdi_execute_quiet( + __in efx_nic_t *enp, + __inout efx_mcdi_req_t *emrp) +{ + const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp; + + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI); + EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI); + + emrp->emr_quiet = B_TRUE; emtp->emt_execute(emtp->emt_context, emrp); } @@ -384,13 +423,13 @@ efx_mcdi_ev_cpl( __in unsigned int outlen, __in int errcode) { - efx_mcdi_iface_t *emip = &(enp->en_u.siena.enu_mip); - const efx_mcdi_transport_t *emtp = emip->emi_mtp; + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); + const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp; + efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop; efx_mcdi_req_t *emrp; int state; EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI); - EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_SIENA); EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI); /* @@ -399,7 +438,7 @@ efx_mcdi_ev_cpl( */ EFSYS_LOCK(enp->en_eslp, state); if (emip->emi_pending_req == NULL || !emip->emi_ev_cpl || - (seq != ((emip->emi_seq - 1) & 0xf))) { + (seq != ((emip->emi_seq - 1) & EFX_MASK32(MCDI_HEADER_SEQ)))) { EFSYS_ASSERT(emip->emi_aborted > 0); if (emip->emi_aborted > 0) --emip->emi_aborted; @@ -416,14 +455,17 @@ efx_mcdi_ev_cpl( * if the user supplied an output buffer. */ if (errcode != 0) { - EFSYS_PROBE2(mcdi_err, int, emrp->emr_cmd, - int, errcode); + if (!emrp->emr_quiet) { + EFSYS_PROBE2(mcdi_err, int, emrp->emr_cmd, + int, errcode); + } emrp->emr_out_length_used = 0; emrp->emr_rc = efx_mcdi_request_errcode(errcode); } else { emrp->emr_out_length_used = outlen; emrp->emr_rc = 0; - efx_mcdi_request_copyout(enp, emrp); + + emcop->emco_request_copyout(enp, emrp); } emtp->emt_ev_cpl(emtp->emt_context); @@ -434,8 +476,8 @@ efx_mcdi_ev_death( __in efx_nic_t *enp, __in int rc) { - efx_mcdi_iface_t *emip = &(enp->en_u.siena.enu_mip); - const efx_mcdi_transport_t *emtp = emip->emi_mtp; + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); + const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp; efx_mcdi_req_t *emrp = NULL; boolean_t ev_cpl; int state; @@ -469,8 +511,9 @@ efx_mcdi_ev_death( * status word before dropping the lock. */ if (rc == EIO || rc == EINTR) { - EFSYS_SPIN(MCDI_STATUS_SLEEP_US); + EFSYS_SPIN(EFX_MCDI_STATUS_SLEEP_US); (void) efx_mcdi_poll_reboot(enp); + emip->emi_new_epoch = B_TRUE; } EFSYS_UNLOCK(enp->en_eslp, state); @@ -488,23 +531,24 @@ efx_mcdi_version( __out_opt uint32_t *buildp, __out_opt efx_mcdi_boot_t *statusp) { - uint8_t outbuf[MAX(MC_CMD_GET_VERSION_OUT_LEN, - MC_CMD_GET_BOOT_STATUS_OUT_LEN)]; efx_mcdi_req_t req; + uint8_t payload[MAX(MAX(MC_CMD_GET_VERSION_IN_LEN, + MC_CMD_GET_VERSION_OUT_LEN), + MAX(MC_CMD_GET_BOOT_STATUS_IN_LEN, + MC_CMD_GET_BOOT_STATUS_OUT_LEN))]; efx_word_t *ver_words; uint16_t version[4]; uint32_t build; efx_mcdi_boot_t status; int rc; - EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_SIENA); EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI); - EFX_STATIC_ASSERT(MC_CMD_GET_VERSION_IN_LEN == 0); + (void) memset(payload, 0, sizeof (payload)); req.emr_cmd = MC_CMD_GET_VERSION; - req.emr_in_buf = NULL; - req.emr_in_length = 0; - req.emr_out_buf = outbuf; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_GET_VERSION_IN_LEN; + req.emr_out_buf = payload; req.emr_out_length = MC_CMD_GET_VERSION_OUT_LEN; efx_mcdi_execute(enp, &req); @@ -536,19 +580,27 @@ efx_mcdi_version( version: /* The bootrom doesn't understand BOOT_STATUS */ - if (build == MC_CMD_GET_VERSION_OUT_FIRMWARE_SIENA_BOOTROM) { + if (MC_FW_VERSION_IS_BOOTLOADER(build)) { status = EFX_MCDI_BOOT_ROM; goto out; } + (void) memset(payload, 0, sizeof (payload)); req.emr_cmd = MC_CMD_GET_BOOT_STATUS; - EFX_STATIC_ASSERT(MC_CMD_GET_BOOT_STATUS_IN_LEN == 0); - req.emr_in_buf = NULL; - req.emr_in_length = 0; - req.emr_out_buf = outbuf; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_GET_BOOT_STATUS_IN_LEN; + req.emr_out_buf = payload; req.emr_out_length = MC_CMD_GET_BOOT_STATUS_OUT_LEN; - efx_mcdi_execute(enp, &req); + efx_mcdi_execute_quiet(enp, &req); + + if (req.emr_rc == EACCES) { + /* Unprivileged functions cannot access BOOT_STATUS */ + status = EFX_MCDI_BOOT_PRIMARY; + version[0] = version[1] = version[2] = version[3] = 0; + build = 0; + goto out; + } if (req.emr_rc != 0) { rc = req.emr_rc; @@ -588,61 +640,12 @@ efx_mcdi_version( return (rc); } - __checkReturn int -efx_mcdi_init( +static __checkReturn int +efx_mcdi_do_reboot( __in efx_nic_t *enp, - __in const efx_mcdi_transport_t *mtp) + __in boolean_t after_assertion) { - efx_mcdi_iface_t *emip = &(enp->en_u.siena.enu_mip); - efx_oword_t oword; - unsigned int portnum; - int rc; - - EFSYS_ASSERT3U(enp->en_mod_flags, ==, 0); - enp->en_mod_flags |= EFX_MOD_MCDI; - - if (enp->en_family == EFX_FAMILY_FALCON) - return (0); - - emip->emi_mtp = mtp; - - /* Determine the port number to use for MCDI */ - EFX_BAR_READO(enp, FR_AZ_CS_DEBUG_REG, &oword); - portnum = EFX_OWORD_FIELD(oword, FRF_CZ_CS_PORT_NUM); - - if (portnum == 0) { - /* Presumably booted from ROM; only MCDI port 1 will work */ - emip->emi_port = 1; - } else if (portnum <= 2) { - emip->emi_port = portnum; - } else { - rc = EINVAL; - goto fail1; - } - - /* - * Wipe the atomic reboot status so subsequent MCDI requests succeed. - * BOOT_STATUS is preserved so eno_nic_probe() can boot out of the - * assertion handler. - */ - (void) efx_mcdi_poll_reboot(enp); - - return (0); - -fail1: - EFSYS_PROBE1(fail1, int, rc); - - enp->en_mod_flags &= ~EFX_MOD_MCDI; - - return (rc); -} - - - __checkReturn int -efx_mcdi_reboot( - __in efx_nic_t *enp) -{ - uint8_t payload[MC_CMD_REBOOT_IN_LEN]; + uint8_t payload[MAX(MC_CMD_REBOOT_IN_LEN, MC_CMD_REBOOT_OUT_LEN)]; efx_mcdi_req_t req; int rc; @@ -655,19 +658,606 @@ efx_mcdi_reboot( */ EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + (void) memset(payload, 0, sizeof (payload)); req.emr_cmd = MC_CMD_REBOOT; req.emr_in_buf = payload; req.emr_in_length = MC_CMD_REBOOT_IN_LEN; - req.emr_out_buf = NULL; - req.emr_out_length = 0; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_REBOOT_OUT_LEN; - MCDI_IN_SET_DWORD(req, REBOOT_IN_FLAGS, 0); + MCDI_IN_SET_DWORD(req, REBOOT_IN_FLAGS, + (after_assertion ? MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION : 0)); + + efx_mcdi_execute_quiet(enp, &req); + + if (req.emr_rc == EACCES) { + /* Unprivileged functions cannot reboot the MC. */ + goto out; + } + + /* A successful reboot request returns EIO. */ + if (req.emr_rc != 0 && req.emr_rc != EIO) { + rc = req.emr_rc; + goto fail1; + } + +out: + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +efx_mcdi_reboot( + __in efx_nic_t *enp) +{ + return (efx_mcdi_do_reboot(enp, B_FALSE)); +} + + __checkReturn int +efx_mcdi_exit_assertion_handler( + __in efx_nic_t *enp) +{ + return (efx_mcdi_do_reboot(enp, B_TRUE)); +} + + __checkReturn int +efx_mcdi_read_assertion( + __in efx_nic_t *enp) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_GET_ASSERTS_IN_LEN, + MC_CMD_GET_ASSERTS_OUT_LEN)]; + const char *reason; + unsigned int flags; + unsigned int index; + unsigned int ofst; + int retry; + int rc; + + /* + * Before we attempt to chat to the MC, we should verify that the MC + * isn't in it's assertion handler, either due to a previous reboot, + * or because we're reinitializing due to an eec_exception(). + * + * Use GET_ASSERTS to read any assertion state that may be present. + * Retry this command twice. Once because a boot-time assertion failure + * might cause the 1st MCDI request to fail. And once again because + * we might race with efx_mcdi_exit_assertion_handler() running on + * partner port(s) on the same NIC. + */ + retry = 2; + do { + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_GET_ASSERTS; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_GET_ASSERTS_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_GET_ASSERTS_OUT_LEN; + + MCDI_IN_SET_DWORD(req, GET_ASSERTS_IN_CLEAR, 1); + efx_mcdi_execute_quiet(enp, &req); + + } while ((req.emr_rc == EINTR || req.emr_rc == EIO) && retry-- > 0); + + if (req.emr_rc != 0) { + if (req.emr_rc == EACCES) { + /* Unprivileged functions cannot clear assertions. */ + goto out; + } + rc = req.emr_rc; + goto fail1; + } + + if (req.emr_out_length_used < MC_CMD_GET_ASSERTS_OUT_LEN) { + rc = EMSGSIZE; + goto fail2; + } + + /* Print out any assertion state recorded */ + flags = MCDI_OUT_DWORD(req, GET_ASSERTS_OUT_GLOBAL_FLAGS); + if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS) + return (0); + + reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL) + ? "system-level assertion" + : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL) + ? "thread-level assertion" + : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED) + ? "watchdog reset" + : (flags == MC_CMD_GET_ASSERTS_FLAGS_ADDR_TRAP) + ? "illegal address trap" + : "unknown assertion"; + EFSYS_PROBE3(mcpu_assertion, + const char *, reason, unsigned int, + MCDI_OUT_DWORD(req, GET_ASSERTS_OUT_SAVED_PC_OFFS), + unsigned int, + MCDI_OUT_DWORD(req, GET_ASSERTS_OUT_THREAD_OFFS)); + + /* Print out the registers (r1 ... r31) */ + ofst = MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_OFST; + for (index = 1; + index < 1 + MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM; + index++) { + EFSYS_PROBE2(mcpu_register, unsigned int, index, unsigned int, + EFX_DWORD_FIELD(*MCDI_OUT(req, efx_dword_t, ofst), + EFX_DWORD_0)); + ofst += sizeof (efx_dword_t); + } + EFSYS_ASSERT(ofst <= MC_CMD_GET_ASSERTS_OUT_LEN); + +out: + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + +/* + * Internal routines for for specific MCDI requests. + */ + + __checkReturn int +efx_mcdi_drv_attach( + __in efx_nic_t *enp, + __in boolean_t attach) +{ + efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_DRV_ATTACH_IN_LEN, + MC_CMD_DRV_ATTACH_EXT_OUT_LEN)]; + uint32_t flags; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_DRV_ATTACH; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_DRV_ATTACH_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_DRV_ATTACH_EXT_OUT_LEN; + + /* + * Use DONT_CARE for the datapath firmware type to ensure that the + * driver can attach to an unprivileged function. The datapath firmware + * type to use is controlled by the 'sfboot' utility. + */ + MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_NEW_STATE, attach ? 1 : 0); + MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_UPDATE, 1); + MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_DONT_CARE); efx_mcdi_execute(enp, &req); - /* Invert EIO */ - if (req.emr_rc != EIO) { - rc = EIO; + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (req.emr_out_length_used < MC_CMD_DRV_ATTACH_OUT_LEN) { + rc = EMSGSIZE; + goto fail2; + } + + if (attach == B_FALSE) { + flags = 0; + } else if (enp->en_family == EFX_FAMILY_SIENA) { + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); + + /* Create synthetic privileges for Siena functions */ + flags = EFX_NIC_FUNC_LINKCTRL | EFX_NIC_FUNC_TRUSTED; + if (emip->emi_port == 1) + flags |= EFX_NIC_FUNC_PRIMARY; + } else { + EFX_STATIC_ASSERT(EFX_NIC_FUNC_PRIMARY == + (1u << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY)); + EFX_STATIC_ASSERT(EFX_NIC_FUNC_LINKCTRL == + (1u << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL)); + EFX_STATIC_ASSERT(EFX_NIC_FUNC_TRUSTED == + (1u << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED)); + + /* Save function privilege flags (EF10 and later) */ + if (req.emr_out_length_used < MC_CMD_DRV_ATTACH_EXT_OUT_LEN) { + rc = EMSGSIZE; + goto fail3; + } + flags = MCDI_OUT_DWORD(req, DRV_ATTACH_EXT_OUT_FUNC_FLAGS); + } + encp->enc_func_flags = flags; + + return (0); + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +efx_mcdi_get_board_cfg( + __in efx_nic_t *enp, + __out_opt uint32_t *board_typep, + __out_opt efx_dword_t *capabilitiesp, + __out_ecount_opt(6) uint8_t mac_addrp[6]) +{ + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_GET_BOARD_CFG_IN_LEN, + MC_CMD_GET_BOARD_CFG_OUT_LENMIN)]; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_GET_BOARD_CFG; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_GET_BOARD_CFG_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_GET_BOARD_CFG_OUT_LENMIN; + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (req.emr_out_length_used < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) { + rc = EMSGSIZE; + goto fail2; + } + + if (mac_addrp != NULL) { + uint8_t *addrp; + + if (emip->emi_port == 1) { + addrp = MCDI_OUT2(req, uint8_t, + GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0); + } else if (emip->emi_port == 2) { + addrp = MCDI_OUT2(req, uint8_t, + GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1); + } else { + rc = EINVAL; + goto fail3; + } + + EFX_MAC_ADDR_COPY(mac_addrp, addrp); + } + + if (capabilitiesp != NULL) { + if (emip->emi_port == 1) { + *capabilitiesp = *MCDI_OUT2(req, efx_dword_t, + GET_BOARD_CFG_OUT_CAPABILITIES_PORT0); + } else if (emip->emi_port == 2) { + *capabilitiesp = *MCDI_OUT2(req, efx_dword_t, + GET_BOARD_CFG_OUT_CAPABILITIES_PORT1); + } else { + rc = EINVAL; + goto fail4; + } + } + + if (board_typep != NULL) { + *board_typep = MCDI_OUT_DWORD(req, + GET_BOARD_CFG_OUT_BOARD_TYPE); + } + + return (0); + +fail4: + EFSYS_PROBE(fail4); +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +efx_mcdi_get_resource_limits( + __in efx_nic_t *enp, + __out_opt uint32_t *nevqp, + __out_opt uint32_t *nrxqp, + __out_opt uint32_t *ntxqp) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_GET_RESOURCE_LIMITS_IN_LEN, + MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN)]; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_GET_RESOURCE_LIMITS; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_GET_RESOURCE_LIMITS_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN; + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (req.emr_out_length_used < MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN) { + rc = EMSGSIZE; + goto fail2; + } + + if (nevqp != NULL) + *nevqp = MCDI_OUT_DWORD(req, GET_RESOURCE_LIMITS_OUT_EVQ); + if (nrxqp != NULL) + *nrxqp = MCDI_OUT_DWORD(req, GET_RESOURCE_LIMITS_OUT_RXQ); + if (ntxqp != NULL) + *ntxqp = MCDI_OUT_DWORD(req, GET_RESOURCE_LIMITS_OUT_TXQ); + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +efx_mcdi_get_phy_cfg( + __in efx_nic_t *enp) +{ + efx_port_t *epp = &(enp->en_port); + efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_GET_PHY_CFG_IN_LEN, + MC_CMD_GET_PHY_CFG_OUT_LEN)]; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_GET_PHY_CFG; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_GET_PHY_CFG_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_GET_PHY_CFG_OUT_LEN; + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (req.emr_out_length_used < MC_CMD_GET_PHY_CFG_OUT_LEN) { + rc = EMSGSIZE; + goto fail2; + } + + encp->enc_phy_type = MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_TYPE); +#if EFSYS_OPT_NAMES + (void) strncpy(encp->enc_phy_name, + MCDI_OUT2(req, char, GET_PHY_CFG_OUT_NAME), + MIN(sizeof (encp->enc_phy_name) - 1, + MC_CMD_GET_PHY_CFG_OUT_NAME_LEN)); +#endif /* EFSYS_OPT_NAMES */ + (void) memset(encp->enc_phy_revision, 0, + sizeof (encp->enc_phy_revision)); + memcpy(encp->enc_phy_revision, + MCDI_OUT2(req, char, GET_PHY_CFG_OUT_REVISION), + MIN(sizeof (encp->enc_phy_revision) - 1, + MC_CMD_GET_PHY_CFG_OUT_REVISION_LEN)); +#if EFSYS_OPT_PHY_LED_CONTROL + encp->enc_led_mask = ((1 << EFX_PHY_LED_DEFAULT) | + (1 << EFX_PHY_LED_OFF) | + (1 << EFX_PHY_LED_ON)); +#endif /* EFSYS_OPT_PHY_LED_CONTROL */ + +#if EFSYS_OPT_PHY_PROPS + encp->enc_phy_nprops = 0; +#endif /* EFSYS_OPT_PHY_PROPS */ + + /* Get the media type of the fixed port, if recognised. */ + EFX_STATIC_ASSERT(MC_CMD_MEDIA_XAUI == EFX_PHY_MEDIA_XAUI); + EFX_STATIC_ASSERT(MC_CMD_MEDIA_CX4 == EFX_PHY_MEDIA_CX4); + EFX_STATIC_ASSERT(MC_CMD_MEDIA_KX4 == EFX_PHY_MEDIA_KX4); + EFX_STATIC_ASSERT(MC_CMD_MEDIA_XFP == EFX_PHY_MEDIA_XFP); + EFX_STATIC_ASSERT(MC_CMD_MEDIA_SFP_PLUS == EFX_PHY_MEDIA_SFP_PLUS); + EFX_STATIC_ASSERT(MC_CMD_MEDIA_BASE_T == EFX_PHY_MEDIA_BASE_T); + EFX_STATIC_ASSERT(MC_CMD_MEDIA_QSFP_PLUS == EFX_PHY_MEDIA_QSFP_PLUS); + epp->ep_fixed_port_type = + MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_MEDIA_TYPE); + if (epp->ep_fixed_port_type >= EFX_PHY_MEDIA_NTYPES) + epp->ep_fixed_port_type = EFX_PHY_MEDIA_INVALID; + + epp->ep_phy_cap_mask = + MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_SUPPORTED_CAP); +#if EFSYS_OPT_PHY_FLAGS + encp->enc_phy_flags_mask = MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_FLAGS); +#endif /* EFSYS_OPT_PHY_FLAGS */ + + encp->enc_port = (uint8_t)MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_PRT); + + /* Populate internal state */ + encp->enc_mcdi_mdio_channel = + (uint8_t)MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_CHANNEL); + +#if EFSYS_OPT_PHY_STATS + encp->enc_mcdi_phy_stat_mask = + MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_STATS_MASK); +#endif /* EFSYS_OPT_PHY_STATS */ + +#if EFSYS_OPT_BIST + encp->enc_bist_mask = 0; + if (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS, + GET_PHY_CFG_OUT_BIST_CABLE_SHORT)) + encp->enc_bist_mask |= (1 << EFX_BIST_TYPE_PHY_CABLE_SHORT); + if (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS, + GET_PHY_CFG_OUT_BIST_CABLE_LONG)) + encp->enc_bist_mask |= (1 << EFX_BIST_TYPE_PHY_CABLE_LONG); + if (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS, + GET_PHY_CFG_OUT_BIST)) + encp->enc_bist_mask |= (1 << EFX_BIST_TYPE_PHY_NORMAL); +#endif /* EFSYS_OPT_BIST */ + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + + __checkReturn int +efx_mcdi_firmware_update_supported( + __in efx_nic_t *enp, + __out boolean_t *supportedp) +{ + efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop; + int rc; + + if (emcop != NULL && emcop->emco_fw_update_supported != NULL) { + if ((rc = emcop->emco_fw_update_supported(enp, supportedp)) + != 0) + goto fail1; + } else { + /* Earlier devices always supported updates */ + *supportedp = B_TRUE; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +efx_mcdi_macaddr_change_supported( + __in efx_nic_t *enp, + __out boolean_t *supportedp) +{ + efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop; + int rc; + + if (emcop != NULL && emcop->emco_macaddr_change_supported != NULL) { + if ((rc = emcop->emco_macaddr_change_supported(enp, supportedp)) + != 0) + goto fail1; + } else { + /* Earlier devices always supported MAC changes */ + *supportedp = B_TRUE; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +#if EFSYS_OPT_BIST + +#if EFSYS_OPT_HUNTINGTON +/* + * Enter bist offline mode. This is a fw mode which puts the NIC into a state + * where memory BIST tests can be run and not much else can interfere or happen. + * A reboot is required to exit this mode. + */ + __checkReturn int +efx_mcdi_bist_enable_offline( + __in efx_nic_t *enp) +{ + efx_mcdi_req_t req; + int rc; + + EFX_STATIC_ASSERT(MC_CMD_ENABLE_OFFLINE_BIST_IN_LEN == 0); + EFX_STATIC_ASSERT(MC_CMD_ENABLE_OFFLINE_BIST_OUT_LEN == 0); + + req.emr_cmd = MC_CMD_ENABLE_OFFLINE_BIST; + req.emr_in_buf = NULL; + req.emr_in_length = 0; + req.emr_out_buf = NULL; + req.emr_out_length = 0; + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} +#endif /* EFSYS_OPT_HUNTINGTON */ + + __checkReturn int +efx_mcdi_bist_start( + __in efx_nic_t *enp, + __in efx_bist_type_t type) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_START_BIST_IN_LEN, + MC_CMD_START_BIST_OUT_LEN)]; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_START_BIST; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_START_BIST_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_START_BIST_OUT_LEN; + + switch (type) { + case EFX_BIST_TYPE_PHY_NORMAL: + MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE, MC_CMD_PHY_BIST); + break; + case EFX_BIST_TYPE_PHY_CABLE_SHORT: + MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE, + MC_CMD_PHY_BIST_CABLE_SHORT); + break; + case EFX_BIST_TYPE_PHY_CABLE_LONG: + MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE, + MC_CMD_PHY_BIST_CABLE_LONG); + break; + case EFX_BIST_TYPE_MC_MEM: + MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE, + MC_CMD_MC_MEM_BIST); + break; + case EFX_BIST_TYPE_SAT_MEM: + MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE, + MC_CMD_PORT_MEM_BIST); + break; + case EFX_BIST_TYPE_REG: + MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE, + MC_CMD_REG_BIST); + break; + default: + EFSYS_ASSERT(0); + } + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; goto fail1; } @@ -679,64 +1269,391 @@ efx_mcdi_reboot( return (rc); } - __checkReturn boolean_t -efx_mcdi_request_abort( +#endif /* EFSYS_OPT_BIST */ + + +/* Enable logging of some events (e.g. link state changes) */ + __checkReturn int +efx_mcdi_log_ctrl( __in efx_nic_t *enp) { - efx_mcdi_iface_t *emip = &(enp->en_u.siena.enu_mip); - efx_mcdi_req_t *emrp; - boolean_t aborted; - int state; + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_LOG_CTRL_IN_LEN, + MC_CMD_LOG_CTRL_OUT_LEN)]; + int rc; - EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_SIENA); - EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI); + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_LOG_CTRL; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_LOG_CTRL_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_LOG_CTRL_OUT_LEN; + + MCDI_IN_SET_DWORD(req, LOG_CTRL_IN_LOG_DEST, + MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ); + MCDI_IN_SET_DWORD(req, LOG_CTRL_IN_LOG_DEST_EVQ, 0); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + +#if EFSYS_OPT_MAC_STATS + +typedef enum efx_stats_action_e +{ + EFX_STATS_CLEAR, + EFX_STATS_UPLOAD, + EFX_STATS_ENABLE_NOEVENTS, + EFX_STATS_ENABLE_EVENTS, + EFX_STATS_DISABLE, +} efx_stats_action_t; + +static __checkReturn int +efx_mcdi_mac_stats( + __in efx_nic_t *enp, + __in_opt efsys_mem_t *esmp, + __in efx_stats_action_t action) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_MAC_STATS_IN_LEN, + MC_CMD_MAC_STATS_OUT_DMA_LEN)]; + int clear = (action == EFX_STATS_CLEAR); + int upload = (action == EFX_STATS_UPLOAD); + int enable = (action == EFX_STATS_ENABLE_NOEVENTS); + int events = (action == EFX_STATS_ENABLE_EVENTS); + int disable = (action == EFX_STATS_DISABLE); + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_MAC_STATS; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_MAC_STATS_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_MAC_STATS_OUT_DMA_LEN; + + MCDI_IN_POPULATE_DWORD_6(req, MAC_STATS_IN_CMD, + MAC_STATS_IN_DMA, upload, + MAC_STATS_IN_CLEAR, clear, + MAC_STATS_IN_PERIODIC_CHANGE, enable | events | disable, + MAC_STATS_IN_PERIODIC_ENABLE, enable | events, + MAC_STATS_IN_PERIODIC_NOEVENT, !events, + MAC_STATS_IN_PERIOD_MS, (enable | events) ? 1000: 0); + + if (esmp != NULL) { + int bytes = MC_CMD_MAC_NSTATS * sizeof (uint64_t); + + EFX_STATIC_ASSERT(MC_CMD_MAC_NSTATS * sizeof (uint64_t) <= + EFX_MAC_STATS_SIZE); + + MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_ADDR_LO, + EFSYS_MEM_ADDR(esmp) & 0xffffffff); + MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_ADDR_HI, + EFSYS_MEM_ADDR(esmp) >> 32); + MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_LEN, bytes); + } else { + EFSYS_ASSERT(!upload && !enable && !events); + } /* - * efx_mcdi_ev_* may have already completed this event, and be - * spinning/blocked on the upper layer lock. So it *is* legitimate - * to for emi_pending_req to be NULL. If there is a pending event - * completed request, then provide a "credit" to allow - * efx_mcdi_ev_cpl() to accept a single spurious completion. + * NOTE: Do not use EVB_PORT_ID_ASSIGNED when disabling periodic stats, + * as this may fail (and leave periodic DMA enabled) if the + * vadapter has already been deleted. */ - EFSYS_LOCK(enp->en_eslp, state); - emrp = emip->emi_pending_req; - aborted = (emrp != NULL); - if (aborted) { - emip->emi_pending_req = NULL; + MCDI_IN_SET_DWORD(req, MAC_STATS_IN_PORT_ID, + (disable ? EVB_PORT_ID_NULL : enp->en_vport_id)); - /* Error the request */ - emrp->emr_out_length_used = 0; - emrp->emr_rc = ETIMEDOUT; + efx_mcdi_execute(enp, &req); - /* Provide a credit for seqno/emr_pending_req mismatches */ - if (emip->emi_ev_cpl) - ++emip->emi_aborted; - - /* - * The upper layer has called us, so we don't - * need to complete the request. - */ + if (req.emr_rc != 0) { + /* EF10: Expect ENOENT if no DMA queues are initialised */ + if ((req.emr_rc != ENOENT) || + (enp->en_rx_qcount + enp->en_tx_qcount != 0)) { + rc = req.emr_rc; + goto fail1; + } } - EFSYS_UNLOCK(enp->en_eslp, state); - return (aborted); + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); } - void -efx_mcdi_fini( + __checkReturn int +efx_mcdi_mac_stats_clear( __in efx_nic_t *enp) { - efx_mcdi_iface_t *emip = &(enp->en_u.siena.enu_mip); + int rc; - EFSYS_ASSERT3U(enp->en_mod_flags, ==, EFX_MOD_MCDI); - enp->en_mod_flags &= ~EFX_MOD_MCDI; + if ((rc = efx_mcdi_mac_stats(enp, NULL, EFX_STATS_CLEAR)) != 0) + goto fail1; - if (~(enp->en_features) & EFX_FEATURE_MCDI) - return; + return (0); - emip->emi_mtp = NULL; - emip->emi_port = 0; - emip->emi_aborted = 0; +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); } + __checkReturn int +efx_mcdi_mac_stats_upload( + __in efx_nic_t *enp, + __in efsys_mem_t *esmp) +{ + int rc; + + /* + * The MC DMAs aggregate statistics for our convenience, so we can + * avoid having to pull the statistics buffer into the cache to + * maintain cumulative statistics. + */ + if ((rc = efx_mcdi_mac_stats(enp, esmp, EFX_STATS_UPLOAD)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +efx_mcdi_mac_stats_periodic( + __in efx_nic_t *enp, + __in efsys_mem_t *esmp, + __in uint16_t period, + __in boolean_t events) +{ + int rc; + + /* + * The MC DMAs aggregate statistics for our convenience, so we can + * avoid having to pull the statistics buffer into the cache to + * maintain cumulative statistics. + * Huntington uses a fixed 1sec period, so use that on Siena too. + */ + if (period == 0) + rc = efx_mcdi_mac_stats(enp, NULL, EFX_STATS_DISABLE); + else if (events) + rc = efx_mcdi_mac_stats(enp, esmp, EFX_STATS_ENABLE_EVENTS); + else + rc = efx_mcdi_mac_stats(enp, esmp, EFX_STATS_ENABLE_NOEVENTS); + + if (rc != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +#endif /* EFSYS_OPT_MAC_STATS */ + +#if EFSYS_OPT_HUNTINGTON + +/* + * This function returns the pf and vf number of a function. If it is a pf the + * vf number is 0xffff. The vf number is the index of the vf on that + * function. So if you have 3 vfs on pf 0 the 3 vfs will return (pf=0,vf=0), + * (pf=0,vf=1), (pf=0,vf=2) aand the pf will return (pf=0, vf=0xffff). + */ + __checkReturn int +efx_mcdi_get_function_info( + __in efx_nic_t *enp, + __out uint32_t *pfp, + __out_opt uint32_t *vfp) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_GET_FUNCTION_INFO_IN_LEN, + MC_CMD_GET_FUNCTION_INFO_OUT_LEN)]; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_GET_FUNCTION_INFO; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_GET_FUNCTION_INFO_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_GET_FUNCTION_INFO_OUT_LEN; + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (req.emr_out_length_used < MC_CMD_GET_FUNCTION_INFO_OUT_LEN) { + rc = EMSGSIZE; + goto fail2; + } + + *pfp = MCDI_OUT_DWORD(req, GET_FUNCTION_INFO_OUT_PF); + if (vfp != NULL) + *vfp = MCDI_OUT_DWORD(req, GET_FUNCTION_INFO_OUT_VF); + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +efx_mcdi_privilege_mask( + __in efx_nic_t *enp, + __in uint32_t pf, + __in uint32_t vf, + __out uint32_t *maskp) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_PRIVILEGE_MASK_IN_LEN, + MC_CMD_PRIVILEGE_MASK_OUT_LEN)]; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_PRIVILEGE_MASK; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_PRIVILEGE_MASK_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_PRIVILEGE_MASK_OUT_LEN; + + MCDI_IN_POPULATE_DWORD_2(req, PRIVILEGE_MASK_IN_FUNCTION, + PRIVILEGE_MASK_IN_FUNCTION_PF, pf, + PRIVILEGE_MASK_IN_FUNCTION_VF, vf); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (req.emr_out_length_used < MC_CMD_PRIVILEGE_MASK_OUT_LEN) { + rc = EMSGSIZE; + goto fail2; + } + + *maskp = MCDI_OUT_DWORD(req, PRIVILEGE_MASK_OUT_OLD_MASK); + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +#endif /* EFSYS_OPT_HUNTINGTON */ + + __checkReturn int +efx_mcdi_set_workaround( + __in efx_nic_t *enp, + __in uint32_t type, + __in boolean_t enabled, + __out_opt uint32_t *flagsp) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_WORKAROUND_IN_LEN, + MC_CMD_WORKAROUND_EXT_OUT_LEN)]; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_WORKAROUND; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_WORKAROUND_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_WORKAROUND_OUT_LEN; + + MCDI_IN_SET_DWORD(req, WORKAROUND_IN_TYPE, type); + MCDI_IN_SET_DWORD(req, WORKAROUND_IN_ENABLED, enabled ? 1 : 0); + + efx_mcdi_execute_quiet(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (flagsp != NULL) { + if (req.emr_out_length_used >= MC_CMD_WORKAROUND_EXT_OUT_LEN) + *flagsp = MCDI_OUT_DWORD(req, WORKAROUND_EXT_OUT_FLAGS); + else + *flagsp = 0; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + + __checkReturn int +efx_mcdi_get_workarounds( + __in efx_nic_t *enp, + __out_opt uint32_t *implementedp, + __out_opt uint32_t *enabledp) +{ + efx_mcdi_req_t req; + uint8_t payload[MC_CMD_GET_WORKAROUNDS_OUT_LEN]; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_GET_WORKAROUNDS; + req.emr_in_buf = NULL; + req.emr_in_length = 0; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_GET_WORKAROUNDS_OUT_LEN; + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (implementedp != NULL) { + *implementedp = + MCDI_OUT_DWORD(req, GET_WORKAROUNDS_OUT_IMPLEMENTED); + } + + if (enabledp != NULL) { + *enabledp = MCDI_OUT_DWORD(req, GET_WORKAROUNDS_OUT_ENABLED); + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + #endif /* EFSYS_OPT_MCDI */ diff --git a/sys/dev/sfxge/common/efx_mcdi.h b/sys/dev/sfxge/common/efx_mcdi.h index b1157466495b..ea0224878162 100644 --- a/sys/dev/sfxge/common/efx_mcdi.h +++ b/sys/dev/sfxge/common/efx_mcdi.h @@ -1,26 +1,31 @@ /*- - * Copyright 2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2009-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. * * $FreeBSD$ */ @@ -36,10 +41,15 @@ extern "C" { #endif -/* Number of retries attempted for init code */ -#define EFX_MCDI_REQ_RETRY_INIT 2 +/* + * A reboot/assertion causes the MCDI status word to be set after the + * command word is set or a REBOOT event is sent. If we notice a reboot + * via these mechanisms then wait 10ms for the status word to be set. + */ +#define EFX_MCDI_STATUS_SLEEP_US 10000 struct efx_mcdi_req_s { + boolean_t emr_quiet; /* Inputs: Command #, input buffer and length */ unsigned int emr_cmd; uint8_t *emr_in_buf; @@ -52,19 +62,25 @@ struct efx_mcdi_req_s { }; typedef struct efx_mcdi_iface_s { - const efx_mcdi_transport_t *emi_mtp; unsigned int emi_port; unsigned int emi_seq; efx_mcdi_req_t *emi_pending_req; boolean_t emi_ev_cpl; + boolean_t emi_new_epoch; int emi_aborted; uint32_t emi_poll_cnt; + uint32_t emi_mc_reboot_status; } efx_mcdi_iface_t; extern void efx_mcdi_execute( __in efx_nic_t *enp, - __in efx_mcdi_req_t *emrp); + __inout efx_mcdi_req_t *emrp); + +extern void +efx_mcdi_execute_quiet( + __in efx_nic_t *enp, + __inout efx_mcdi_req_t *emrp); extern void efx_mcdi_ev_cpl( @@ -78,6 +94,16 @@ efx_mcdi_ev_death( __in efx_nic_t *enp, __in int rc); +extern __checkReturn int +efx_mcdi_request_errcode( + __in unsigned int err); + +extern void +efx_mcdi_raise_exception( + __in efx_nic_t *enp, + __in_opt efx_mcdi_req_t *emrp, + __in int rc); + typedef enum efx_mcdi_boot_e { EFX_MCDI_BOOT_PRIMARY, EFX_MCDI_BOOT_SECONDARY, @@ -91,6 +117,86 @@ efx_mcdi_version( __out_opt uint32_t *buildp, __out_opt efx_mcdi_boot_t *statusp); +extern __checkReturn int +efx_mcdi_read_assertion( + __in efx_nic_t *enp); + +extern __checkReturn int +efx_mcdi_exit_assertion_handler( + __in efx_nic_t *enp); + +extern __checkReturn int +efx_mcdi_drv_attach( + __in efx_nic_t *enp, + __in boolean_t attach); + +extern __checkReturn int +efx_mcdi_get_board_cfg( + __in efx_nic_t *enp, + __out_opt uint32_t *board_typep, + __out_opt efx_dword_t *capabilitiesp, + __out_ecount_opt(6) uint8_t mac_addrp[6]); + +extern __checkReturn int +efx_mcdi_get_phy_cfg( + __in efx_nic_t *enp); + +extern __checkReturn int +efx_mcdi_firmware_update_supported( + __in efx_nic_t *enp, + __out boolean_t *supportedp); + +extern __checkReturn int +efx_mcdi_macaddr_change_supported( + __in efx_nic_t *enp, + __out boolean_t *supportedp); + +#if EFSYS_OPT_BIST +#if EFSYS_OPT_HUNTINGTON +extern __checkReturn int +efx_mcdi_bist_enable_offline( + __in efx_nic_t *enp); +#endif /* EFSYS_OPT_HUNTINGTON */ +extern __checkReturn int +efx_mcdi_bist_start( + __in efx_nic_t *enp, + __in efx_bist_type_t type); +#endif /* EFSYS_OPT_BIST */ + +extern __checkReturn int +efx_mcdi_get_resource_limits( + __in efx_nic_t *enp, + __out_opt uint32_t *nevqp, + __out_opt uint32_t *nrxqp, + __out_opt uint32_t *ntxqp); + +extern __checkReturn int +efx_mcdi_log_ctrl( + __in efx_nic_t *enp); + +extern __checkReturn int +efx_mcdi_mac_stats_clear( + __in efx_nic_t *enp); + +extern __checkReturn int +efx_mcdi_mac_stats_upload( + __in efx_nic_t *enp, + __in efsys_mem_t *esmp); + +extern __checkReturn int +efx_mcdi_mac_stats_periodic( + __in efx_nic_t *enp, + __in efsys_mem_t *esmp, + __in uint16_t period, + __in boolean_t events); + + +#if EFSYS_OPT_LOOPBACK +extern __checkReturn int +efx_mcdi_get_loopback_modes( + __in efx_nic_t *enp); +#endif /* EFSYS_OPT_LOOPBACK */ + #define MCDI_IN(_emr, _type, _ofst) \ ((_type *)((_emr).emr_in_buf + (_ofst))) @@ -101,10 +207,18 @@ efx_mcdi_version( EFX_POPULATE_BYTE_1(*MCDI_IN2(_emr, efx_byte_t, _ofst), \ EFX_BYTE_0, _value) +#define MCDI_IN_SET_WORD(_emr, _ofst, _value) \ + EFX_POPULATE_WORD_1(*MCDI_IN2(_emr, efx_word_t, _ofst), \ + EFX_WORD_0, _value) + #define MCDI_IN_SET_DWORD(_emr, _ofst, _value) \ EFX_POPULATE_DWORD_1(*MCDI_IN2(_emr, efx_dword_t, _ofst), \ EFX_DWORD_0, _value) +#define MCDI_IN_SET_DWORD_FIELD(_emr, _ofst, _field, _value) \ + EFX_SET_DWORD_FIELD(*MCDI_IN2(_emr, efx_dword_t, _ofst), \ + MC_CMD_ ## _field, _value) + #define MCDI_IN_POPULATE_DWORD_1(_emr, _ofst, _field1, _value1) \ EFX_POPULATE_DWORD_1(*MCDI_IN2(_emr, efx_dword_t, _ofst), \ MC_CMD_ ## _field1, _value1) @@ -154,7 +268,7 @@ efx_mcdi_version( #define MCDI_IN_POPULATE_DWORD_7(_emr, _ofst, _field1, _value1, \ _field2, _value2, _field3, _value3, _field4, _value4, \ _field5, _value5, _field6, _value6, _field7, _value7) \ - EFX_POPULATE_DWORD_7(MCDI_IN2(_emr, efx_dword_t, _ofst), \ + EFX_POPULATE_DWORD_7(*MCDI_IN2(_emr, efx_dword_t, _ofst), \ MC_CMD_ ## _field1, _value1, \ MC_CMD_ ## _field2, _value2, \ MC_CMD_ ## _field3, _value3, \ @@ -233,7 +347,7 @@ efx_mcdi_version( #define MCDI_EV_FIELD(_eqp, _field) \ EFX_QWORD_FIELD(*_eqp, MCDI_EVENT_ ## _field) -#define MCDI_CMD_DWORD_FIELD(_edp, _field) \ +#define MCDI_CMD_DWORD_FIELD(_edp, _field) \ EFX_DWORD_FIELD(*_edp, MC_CMD_ ## _field) #ifdef __cplusplus diff --git a/sys/dev/sfxge/common/efx_mon.c b/sys/dev/sfxge/common/efx_mon.c index dc2e25603e7e..c5b356d687a9 100644 --- a/sys/dev/sfxge/common/efx_mon.c +++ b/sys/dev/sfxge/common/efx_mon.c @@ -1,26 +1,31 @@ /*- - * Copyright 2007-2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2007-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -44,17 +49,22 @@ __FBSDID("$FreeBSD$"); #include "max6647.h" #endif +#if EFSYS_OPT_MON_MCDI +#include "mcdi_mon.h" +#endif + #if EFSYS_OPT_NAMES -static const char __cs * __cs __efx_mon_name[] = { +static const char *__efx_mon_name[] = { "", "nullmon", "lm87", "max6647", - "sfx90x0" + "sfx90x0", + "sfx91x0" }; - const char __cs * + const char * efx_mon_name( __in efx_nic_t *enp) { @@ -70,47 +80,46 @@ efx_mon_name( #endif /* EFSYS_OPT_NAMES */ #if EFSYS_OPT_MON_NULL -static efx_mon_ops_t __cs __efx_mon_null_ops = { +static efx_mon_ops_t __efx_mon_null_ops = { nullmon_reset, /* emo_reset */ nullmon_reconfigure, /* emo_reconfigure */ #if EFSYS_OPT_MON_STATS - nullmon_stats_update /* emo_stat_update */ + nullmon_stats_update /* emo_stats_update */ #endif /* EFSYS_OPT_MON_STATS */ }; #endif #if EFSYS_OPT_MON_LM87 -static efx_mon_ops_t __cs __efx_mon_lm87_ops = { +static efx_mon_ops_t __efx_mon_lm87_ops = { lm87_reset, /* emo_reset */ lm87_reconfigure, /* emo_reconfigure */ #if EFSYS_OPT_MON_STATS - lm87_stats_update /* emo_stat_update */ + lm87_stats_update /* emo_stats_update */ #endif /* EFSYS_OPT_MON_STATS */ }; #endif #if EFSYS_OPT_MON_MAX6647 -static efx_mon_ops_t __cs __efx_mon_max6647_ops = { +static efx_mon_ops_t __efx_mon_max6647_ops = { max6647_reset, /* emo_reset */ max6647_reconfigure, /* emo_reconfigure */ #if EFSYS_OPT_MON_STATS - max6647_stats_update /* emo_stat_update */ + max6647_stats_update /* emo_stats_update */ #endif /* EFSYS_OPT_MON_STATS */ }; #endif -#if EFSYS_OPT_MON_SIENA -static efx_mon_ops_t __cs __efx_mon_siena_ops = { - siena_mon_reset, /* emo_reset */ - siena_mon_reconfigure, /* emo_reconfigure */ +#if EFSYS_OPT_MON_MCDI +static efx_mon_ops_t __efx_mon_mcdi_ops = { + NULL, /* emo_reset */ + NULL, /* emo_reconfigure */ #if EFSYS_OPT_MON_STATS - siena_mon_stats_update /* emo_stat_update */ + mcdi_mon_stats_update /* emo_stats_update */ #endif /* EFSYS_OPT_MON_STATS */ }; #endif - -static efx_mon_ops_t __cs * __cs __efx_mon_ops[] = { +static efx_mon_ops_t *__efx_mon_ops[] = { NULL, #if EFSYS_OPT_MON_NULL &__efx_mon_null_ops, @@ -127,8 +136,13 @@ static efx_mon_ops_t __cs * __cs __efx_mon_ops[] = { #else NULL, #endif -#if EFSYS_OPT_MON_SIENA - &__efx_mon_siena_ops +#if EFSYS_OPT_MON_MCDI + &__efx_mon_mcdi_ops, +#else + NULL, +#endif +#if EFSYS_OPT_MON_MCDI + &__efx_mon_mcdi_ops #else NULL #endif @@ -162,11 +176,15 @@ efx_mon_init( goto fail2; } - if ((rc = emop->emo_reset(enp)) != 0) - goto fail3; + if (emop->emo_reset != NULL) { + if ((rc = emop->emo_reset(enp)) != 0) + goto fail3; + } - if ((rc = emop->emo_reconfigure(enp)) != 0) - goto fail4; + if (emop->emo_reconfigure != NULL) { + if ((rc = emop->emo_reconfigure(enp)) != 0) + goto fail4; + } emp->em_emop = emop; return (0); @@ -174,7 +192,8 @@ efx_mon_init( fail4: EFSYS_PROBE(fail5); - (void) emop->emo_reset(enp); + if (emop->emo_reset != NULL) + (void) emop->emo_reset(enp); fail3: EFSYS_PROBE(fail4); @@ -195,8 +214,8 @@ efx_mon_init( #if EFSYS_OPT_NAMES -/* START MKCONFIG GENERATED MonitorStatNamesBlock 89ff37f1d74ad8b3 */ -static const char __cs * __cs __mon_stat_name[] = { +/* START MKCONFIG GENERATED MonitorStatNamesBlock b9328f15438c4d01 */ +static const char *__mon_stat_name[] = { "value_2_5v", "value_vccp1", "value_vcc", @@ -227,11 +246,50 @@ static const char __cs * __cs __mon_stat_name[] = { "vaoe_in", "iaoe", "iaoe_in", + "nic_power", + "0_9v", + "i0_9v", + "i1_2v", + "0_9v_adc", + "controller_temperature2", + "vreg_temperature", + "vreg_0_9v_temperature", + "vreg_1_2v_temperature", + "int_vptat", + "controller_internal_adc_temperature", + "ext_vptat", + "controller_external_adc_temperature", + "ambient_temperature", + "airflow", + "vdd08d_vss08d_csr", + "vdd08d_vss08d_csr_extadc", + "hotpoint_temperature", + "phy_power_switch_port0", + "phy_power_switch_port1", + "mum_vcc", + "0v9_a", + "i0v9_a", + "0v9_a_temp", + "0v9_b", + "i0v9_b", + "0v9_b_temp", + "ccom_avreg_1v2_supply", + "ccom_avreg_1v2_supply_ext_adc", + "ccom_avreg_1v8_supply", + "ccom_avreg_1v8_supply_ext_adc", + "controller_master_vptat", + "controller_master_internal_temp", + "controller_master_vptat_ext_adc", + "controller_master_internal_temp_ext_adc", + "controller_slave_vptat", + "controller_slave_internal_temp", + "controller_slave_vptat_ext_adc", + "controller_slave_internal_temp_ext_adc", }; /* END MKCONFIG GENERATED MonitorStatNamesBlock */ -extern const char __cs * +extern const char * efx_mon_stat_name( __in efx_nic_t *enp, __in efx_mon_stat_t id) @@ -276,9 +334,11 @@ efx_mon_fini( emp->em_emop = NULL; - rc = emop->emo_reset(enp); - if (rc != 0) - EFSYS_PROBE1(fail1, int, rc); + if (emop->emo_reset != NULL) { + rc = emop->emo_reset(enp); + if (rc != 0) + EFSYS_PROBE1(fail1, int, rc); + } emp->em_type = EFX_MON_INVALID; diff --git a/sys/dev/sfxge/common/efx_nic.c b/sys/dev/sfxge/common/efx_nic.c index b0ba58ccfc7a..b5ad65ead44c 100644 --- a/sys/dev/sfxge/common/efx_nic.c +++ b/sys/dev/sfxge/common/efx_nic.c @@ -1,26 +1,31 @@ /*- - * Copyright 2007-2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2007-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -38,27 +43,55 @@ efx_family( __in uint16_t devid, __out efx_family_t *efp) { + if (venid == EFX_PCI_VENID_SFC) { + switch (devid) { #if EFSYS_OPT_FALCON - if (venid == EFX_PCI_VENID_SFC && devid == EFX_PCI_DEVID_FALCON) { - *efp = EFX_FAMILY_FALCON; - return (0); - } + case EFX_PCI_DEVID_FALCON: + *efp = EFX_FAMILY_FALCON; + return (0); #endif #if EFSYS_OPT_SIENA - if (venid == EFX_PCI_VENID_SFC && devid == EFX_PCI_DEVID_BETHPAGE) { - *efp = EFX_FAMILY_SIENA; - return (0); - } - if (venid == EFX_PCI_VENID_SFC && devid == EFX_PCI_DEVID_SIENA) { - *efp = EFX_FAMILY_SIENA; - return (0); - } - if (venid == EFX_PCI_VENID_SFC && - devid == EFX_PCI_DEVID_SIENA_F1_UNINIT) { - *efp = EFX_FAMILY_SIENA; - return (0); - } + case EFX_PCI_DEVID_SIENA_F1_UNINIT: + /* + * Hardware default for PF0 of uninitialised Siena. + * manftest must be able to cope with this device id. + */ + *efp = EFX_FAMILY_SIENA; + return (0); + + case EFX_PCI_DEVID_BETHPAGE: + case EFX_PCI_DEVID_SIENA: + *efp = EFX_FAMILY_SIENA; + return (0); #endif + +#if EFSYS_OPT_HUNTINGTON + case EFX_PCI_DEVID_HUNTINGTON_PF_UNINIT: + /* + * Hardware default for PF0 of uninitialised Huntington. + * manftest must be able to cope with this device id. + */ + *efp = EFX_FAMILY_HUNTINGTON; + return (0); + + case EFX_PCI_DEVID_FARMINGDALE: + case EFX_PCI_DEVID_GREENPORT: + case EFX_PCI_DEVID_HUNTINGTON: + *efp = EFX_FAMILY_HUNTINGTON; + return (0); + + case EFX_PCI_DEVID_FARMINGDALE_VF: + case EFX_PCI_DEVID_GREENPORT_VF: + case EFX_PCI_DEVID_HUNTINGTON_VF: + *efp = EFX_FAMILY_HUNTINGTON; + return (0); +#endif + default: + break; + } + } + + *efp = EFX_FAMILY_INVALID; return (ENOTSUP); } @@ -80,11 +113,28 @@ efx_infer_family( EFSYS_BAR_READO(esbp, FR_AZ_CS_DEBUG_REG_OFST, &oword, B_TRUE); portnum = EFX_OWORD_FIELD(oword, FRF_CZ_CS_PORT_NUM); switch (portnum) { -#if EFSYS_OPT_FALCON - case 0: - family = EFX_FAMILY_FALCON; - break; + case 0: { + efx_dword_t dword; + uint32_t hw_rev; + + EFSYS_BAR_READD(esbp, ER_DZ_BIU_HW_REV_ID_REG_OFST, &dword, + B_TRUE); + hw_rev = EFX_DWORD_FIELD(dword, ERF_DZ_HW_REV_ID); + if (hw_rev == ER_DZ_BIU_HW_REV_ID_REG_RESET) { +#if EFSYS_OPT_HUNTINGTON + family = EFX_FAMILY_HUNTINGTON; + break; #endif + } else { +#if EFSYS_OPT_FALCON + family = EFX_FAMILY_FALCON; + break; +#endif + } + rc = ENOTSUP; + goto fail1; + } + #if EFSYS_OPT_SIENA case 1: case 2: @@ -106,15 +156,10 @@ efx_infer_family( return (rc); } -/* - * The built-in default value device id for port 1 of Siena is 0x0810. - * manftest needs to be able to cope with that. - */ - #define EFX_BIU_MAGIC0 0x01234567 #define EFX_BIU_MAGIC1 0xfedcba98 -static __checkReturn int + __checkReturn int efx_nic_biu_test( __in efx_nic_t *enp) { @@ -128,18 +173,18 @@ efx_nic_biu_test( * back the cached value that was last written. */ EFX_POPULATE_OWORD_1(oword, FRF_AZ_DRIVER_DW0, EFX_BIU_MAGIC0); - EFX_BAR_TBL_WRITEO(enp, FR_AZ_DRIVER_REG, 0, &oword); + EFX_BAR_TBL_WRITEO(enp, FR_AZ_DRIVER_REG, 0, &oword, B_TRUE); EFX_POPULATE_OWORD_1(oword, FRF_AZ_DRIVER_DW0, EFX_BIU_MAGIC1); - EFX_BAR_TBL_WRITEO(enp, FR_AZ_DRIVER_REG, 1, &oword); + EFX_BAR_TBL_WRITEO(enp, FR_AZ_DRIVER_REG, 1, &oword, B_TRUE); - EFX_BAR_TBL_READO(enp, FR_AZ_DRIVER_REG, 0, &oword); + EFX_BAR_TBL_READO(enp, FR_AZ_DRIVER_REG, 0, &oword, B_TRUE); if (EFX_OWORD_FIELD(oword, FRF_AZ_DRIVER_DW0) != EFX_BIU_MAGIC0) { rc = EIO; goto fail1; } - EFX_BAR_TBL_READO(enp, FR_AZ_DRIVER_REG, 1, &oword); + EFX_BAR_TBL_READO(enp, FR_AZ_DRIVER_REG, 1, &oword, B_TRUE); if (EFX_OWORD_FIELD(oword, FRF_AZ_DRIVER_DW0) != EFX_BIU_MAGIC1) { rc = EIO; goto fail2; @@ -151,18 +196,18 @@ efx_nic_biu_test( * values already written into the scratch registers. */ EFX_POPULATE_OWORD_1(oword, FRF_AZ_DRIVER_DW0, EFX_BIU_MAGIC1); - EFX_BAR_TBL_WRITEO(enp, FR_AZ_DRIVER_REG, 0, &oword); + EFX_BAR_TBL_WRITEO(enp, FR_AZ_DRIVER_REG, 0, &oword, B_TRUE); EFX_POPULATE_OWORD_1(oword, FRF_AZ_DRIVER_DW0, EFX_BIU_MAGIC0); - EFX_BAR_TBL_WRITEO(enp, FR_AZ_DRIVER_REG, 1, &oword); + EFX_BAR_TBL_WRITEO(enp, FR_AZ_DRIVER_REG, 1, &oword, B_TRUE); - EFX_BAR_TBL_READO(enp, FR_AZ_DRIVER_REG, 0, &oword); + EFX_BAR_TBL_READO(enp, FR_AZ_DRIVER_REG, 0, &oword, B_TRUE); if (EFX_OWORD_FIELD(oword, FRF_AZ_DRIVER_DW0) != EFX_BIU_MAGIC1) { rc = EIO; goto fail3; } - EFX_BAR_TBL_READO(enp, FR_AZ_DRIVER_REG, 1, &oword); + EFX_BAR_TBL_READO(enp, FR_AZ_DRIVER_REG, 1, &oword, B_TRUE); if (EFX_OWORD_FIELD(oword, FRF_AZ_DRIVER_DW0) != EFX_BIU_MAGIC0) { rc = EIO; goto fail4; @@ -184,10 +229,13 @@ efx_nic_biu_test( #if EFSYS_OPT_FALCON -static efx_nic_ops_t __cs __efx_nic_falcon_ops = { +static efx_nic_ops_t __efx_nic_falcon_ops = { falcon_nic_probe, /* eno_probe */ + NULL, /* eno_set_drv_limits */ falcon_nic_reset, /* eno_reset */ falcon_nic_init, /* eno_init */ + NULL, /* eno_get_vi_pool */ + NULL, /* eno_get_bar_region */ #if EFSYS_OPT_DIAG falcon_sram_test, /* eno_sram_test */ falcon_nic_register_test, /* eno_register_test */ @@ -200,10 +248,13 @@ static efx_nic_ops_t __cs __efx_nic_falcon_ops = { #if EFSYS_OPT_SIENA -static efx_nic_ops_t __cs __efx_nic_siena_ops = { +static efx_nic_ops_t __efx_nic_siena_ops = { siena_nic_probe, /* eno_probe */ + NULL, /* eno_set_drv_limits */ siena_nic_reset, /* eno_reset */ siena_nic_init, /* eno_init */ + NULL, /* eno_get_vi_pool */ + NULL, /* eno_get_bar_region */ #if EFSYS_OPT_DIAG siena_sram_test, /* eno_sram_test */ siena_nic_register_test, /* eno_register_test */ @@ -214,6 +265,25 @@ static efx_nic_ops_t __cs __efx_nic_siena_ops = { #endif /* EFSYS_OPT_SIENA */ +#if EFSYS_OPT_HUNTINGTON + +static efx_nic_ops_t __efx_nic_hunt_ops = { + hunt_nic_probe, /* eno_probe */ + hunt_nic_set_drv_limits, /* eno_set_drv_limits */ + hunt_nic_reset, /* eno_reset */ + hunt_nic_init, /* eno_init */ + hunt_nic_get_vi_pool, /* eno_get_vi_pool */ + hunt_nic_get_bar_region, /* eno_get_bar_region */ +#if EFSYS_OPT_DIAG + hunt_sram_test, /* eno_sram_test */ + hunt_nic_register_test, /* eno_register_test */ +#endif /* EFSYS_OPT_DIAG */ + hunt_nic_fini, /* eno_fini */ + hunt_nic_unprobe, /* eno_unprobe */ +}; + +#endif /* EFSYS_OPT_HUNTINGTON */ + __checkReturn int efx_nic_create( __in efx_family_t family, @@ -257,10 +327,27 @@ efx_nic_create( EFX_FEATURE_WOL | EFX_FEATURE_MCDI | EFX_FEATURE_LOOKAHEAD_SPLIT | - EFX_FEATURE_MAC_HEADER_FILTERS; + EFX_FEATURE_MAC_HEADER_FILTERS | + EFX_FEATURE_TX_SRC_FILTERS; break; #endif /* EFSYS_OPT_SIENA */ +#if EFSYS_OPT_HUNTINGTON + case EFX_FAMILY_HUNTINGTON: + enp->en_enop = (efx_nic_ops_t *)&__efx_nic_hunt_ops; + /* FIXME: Add WOL support */ + enp->en_features = + EFX_FEATURE_IPV6 | + EFX_FEATURE_LINK_EVENTS | + EFX_FEATURE_PERIODIC_MAC_STATS | + EFX_FEATURE_MCDI | + EFX_FEATURE_MAC_HEADER_FILTERS | + EFX_FEATURE_MCDI_DMA | + EFX_FEATURE_PIO_BUFFERS | + EFX_FEATURE_FW_ASSISTED_TSO; + break; +#endif /* EFSYS_OPT_HUNTINGTON */ + default: rc = ENOTSUP; goto fail2; @@ -276,7 +363,7 @@ efx_nic_create( return (0); fail2: - EFSYS_PROBE(fail3); + EFSYS_PROBE(fail2); enp->en_magic = 0; @@ -294,7 +381,6 @@ efx_nic_probe( __in efx_nic_t *enp) { efx_nic_ops_t *enop; - efx_oword_t oword; int rc; EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); @@ -303,36 +389,22 @@ efx_nic_probe( #endif /* EFSYS_OPT_MCDI */ EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_PROBE)); - /* Test BIU */ - if ((rc = efx_nic_biu_test(enp)) != 0) - goto fail1; - - /* Clear the region register */ - EFX_POPULATE_OWORD_4(oword, - FRF_AZ_ADR_REGION0, 0, - FRF_AZ_ADR_REGION1, (1 << 16), - FRF_AZ_ADR_REGION2, (2 << 16), - FRF_AZ_ADR_REGION3, (3 << 16)); - EFX_BAR_WRITEO(enp, FR_AZ_ADR_REGION_REG, &oword); - enop = enp->en_enop; if ((rc = enop->eno_probe(enp)) != 0) - goto fail2; + goto fail1; if ((rc = efx_phy_probe(enp)) != 0) - goto fail3; + goto fail2; enp->en_mod_flags |= EFX_MOD_PROBE; return (0); -fail3: - EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); enop->eno_unprobe(enp); -fail2: - EFSYS_PROBE(fail2); fail1: EFSYS_PROBE1(fail1, int, rc); @@ -375,6 +447,105 @@ efx_nic_pcie_extended_sync( #endif /* EFSYS_OPT_PCIE_TUNE */ + __checkReturn int +efx_nic_set_drv_limits( + __inout efx_nic_t *enp, + __in efx_drv_limits_t *edlp) +{ + efx_nic_ops_t *enop = enp->en_enop; + int rc; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE); + + if (enop->eno_set_drv_limits != NULL) { + if ((rc = enop->eno_set_drv_limits(enp, edlp)) != 0) + goto fail1; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +efx_nic_get_bar_region( + __in efx_nic_t *enp, + __in efx_nic_region_t region, + __out uint32_t *offsetp, + __out size_t *sizep) +{ + efx_nic_ops_t *enop = enp->en_enop; + int rc; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC); + + if (enop->eno_get_bar_region == NULL) { + rc = ENOTSUP; + goto fail1; + } + if ((rc = (enop->eno_get_bar_region)(enp, + region, offsetp, sizep)) != 0) { + goto fail2; + } + + return (0); + +fail2: + EFSYS_PROBE(fail2); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + + __checkReturn int +efx_nic_get_vi_pool( + __in efx_nic_t *enp, + __out uint32_t *evq_countp, + __out uint32_t *rxq_countp, + __out uint32_t *txq_countp) +{ + efx_nic_ops_t *enop = enp->en_enop; + efx_nic_cfg_t *encp = &enp->en_nic_cfg; + int rc; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC); + + if (enop->eno_get_vi_pool != NULL) { + uint32_t vi_count = 0; + + if ((rc = (enop->eno_get_vi_pool)(enp, &vi_count)) != 0) + goto fail1; + + *evq_countp = vi_count; + *rxq_countp = vi_count; + *txq_countp = vi_count; + } else { + /* Use NIC limits as default value */ + *evq_countp = encp->enc_evq_limit; + *rxq_countp = encp->enc_rxq_limit; + *txq_countp = encp->enc_txq_limit; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int efx_nic_init( __in efx_nic_t *enp) @@ -679,3 +850,191 @@ efx_nic_test_tables( } #endif /* EFSYS_OPT_DIAG */ + +#if EFSYS_OPT_LOOPBACK + +extern void +efx_loopback_mask( + __in efx_loopback_kind_t loopback_kind, + __out efx_qword_t *maskp) +{ + efx_qword_t mask; + + EFSYS_ASSERT3U(loopback_kind, <, EFX_LOOPBACK_NKINDS); + EFSYS_ASSERT(maskp != NULL); + + /* Assert the MC_CMD_LOOPBACK and EFX_LOOPBACK namespace agree */ + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_NONE == EFX_LOOPBACK_OFF); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_DATA == EFX_LOOPBACK_DATA); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GMAC == EFX_LOOPBACK_GMAC); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XGMII == EFX_LOOPBACK_XGMII); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XGXS == EFX_LOOPBACK_XGXS); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XAUI == EFX_LOOPBACK_XAUI); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GMII == EFX_LOOPBACK_GMII); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_SGMII == EFX_LOOPBACK_SGMII); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XGBR == EFX_LOOPBACK_XGBR); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XFI == EFX_LOOPBACK_XFI); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XAUI_FAR == EFX_LOOPBACK_XAUI_FAR); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GMII_FAR == EFX_LOOPBACK_GMII_FAR); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_SGMII_FAR == EFX_LOOPBACK_SGMII_FAR); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XFI_FAR == EFX_LOOPBACK_XFI_FAR); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GPHY == EFX_LOOPBACK_GPHY); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_PHYXS == EFX_LOOPBACK_PHY_XS); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_PCS == EFX_LOOPBACK_PCS); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_PMAPMD == EFX_LOOPBACK_PMA_PMD); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XPORT == EFX_LOOPBACK_XPORT); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XGMII_WS == EFX_LOOPBACK_XGMII_WS); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XAUI_WS == EFX_LOOPBACK_XAUI_WS); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XAUI_WS_FAR == + EFX_LOOPBACK_XAUI_WS_FAR); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XAUI_WS_NEAR == + EFX_LOOPBACK_XAUI_WS_NEAR); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GMII_WS == EFX_LOOPBACK_GMII_WS); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XFI_WS == EFX_LOOPBACK_XFI_WS); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XFI_WS_FAR == + EFX_LOOPBACK_XFI_WS_FAR); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_PHYXS_WS == EFX_LOOPBACK_PHYXS_WS); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_PMA_INT == EFX_LOOPBACK_PMA_INT); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_SD_NEAR == EFX_LOOPBACK_SD_NEAR); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_SD_FAR == EFX_LOOPBACK_SD_FAR); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_PMA_INT_WS == + EFX_LOOPBACK_PMA_INT_WS); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_SD_FEP2_WS == + EFX_LOOPBACK_SD_FEP2_WS); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_SD_FEP1_5_WS == + EFX_LOOPBACK_SD_FEP1_5_WS); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_SD_FEP_WS == EFX_LOOPBACK_SD_FEP_WS); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_SD_FES_WS == EFX_LOOPBACK_SD_FES_WS); + + /* Build bitmask of possible loopback types */ + EFX_ZERO_QWORD(mask); + + if ((loopback_kind == EFX_LOOPBACK_KIND_OFF) || + (loopback_kind == EFX_LOOPBACK_KIND_ALL)) { + EFX_SET_QWORD_BIT(mask, EFX_LOOPBACK_OFF); + } + + if ((loopback_kind == EFX_LOOPBACK_KIND_MAC) || + (loopback_kind == EFX_LOOPBACK_KIND_ALL)) { + /* + * The "MAC" grouping has historically been used by drivers to + * mean loopbacks supported by on-chip hardware. Keep that + * meaning here, and include on-chip PHY layer loopbacks. + */ + EFX_SET_QWORD_BIT(mask, EFX_LOOPBACK_DATA); + EFX_SET_QWORD_BIT(mask, EFX_LOOPBACK_GMAC); + EFX_SET_QWORD_BIT(mask, EFX_LOOPBACK_XGMII); + EFX_SET_QWORD_BIT(mask, EFX_LOOPBACK_XGXS); + EFX_SET_QWORD_BIT(mask, EFX_LOOPBACK_XAUI); + EFX_SET_QWORD_BIT(mask, EFX_LOOPBACK_GMII); + EFX_SET_QWORD_BIT(mask, EFX_LOOPBACK_SGMII); + EFX_SET_QWORD_BIT(mask, EFX_LOOPBACK_XGBR); + EFX_SET_QWORD_BIT(mask, EFX_LOOPBACK_XFI); + EFX_SET_QWORD_BIT(mask, EFX_LOOPBACK_XAUI_FAR); + EFX_SET_QWORD_BIT(mask, EFX_LOOPBACK_GMII_FAR); + EFX_SET_QWORD_BIT(mask, EFX_LOOPBACK_SGMII_FAR); + EFX_SET_QWORD_BIT(mask, EFX_LOOPBACK_XFI_FAR); + EFX_SET_QWORD_BIT(mask, EFX_LOOPBACK_PMA_INT); + EFX_SET_QWORD_BIT(mask, EFX_LOOPBACK_SD_NEAR); + EFX_SET_QWORD_BIT(mask, EFX_LOOPBACK_SD_FAR); + } + + if ((loopback_kind == EFX_LOOPBACK_KIND_PHY) || + (loopback_kind == EFX_LOOPBACK_KIND_ALL)) { + /* + * The "PHY" grouping has historically been used by drivers to + * mean loopbacks supported by off-chip hardware. Keep that + * meaning here. + */ + EFX_SET_QWORD_BIT(mask, EFX_LOOPBACK_GPHY); + EFX_SET_QWORD_BIT(mask, EFX_LOOPBACK_PHY_XS); + EFX_SET_QWORD_BIT(mask, EFX_LOOPBACK_PCS); + EFX_SET_QWORD_BIT(mask, EFX_LOOPBACK_PMA_PMD); + } + + *maskp = mask; +} + +__checkReturn int +efx_mcdi_get_loopback_modes( + __in efx_nic_t *enp) +{ + efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_GET_LOOPBACK_MODES_IN_LEN, + MC_CMD_GET_LOOPBACK_MODES_OUT_LEN)]; + efx_qword_t mask; + efx_qword_t modes; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_GET_LOOPBACK_MODES; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_GET_LOOPBACK_MODES_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_GET_LOOPBACK_MODES_OUT_LEN; + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (req.emr_out_length_used < + MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_OFST + + MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LEN) { + rc = EMSGSIZE; + goto fail2; + } + + /* + * We assert the MC_CMD_LOOPBACK and EFX_LOOPBACK namespaces agree + * in efx_loopback_mask() and in siena_phy.c:siena_phy_get_link(). + */ + efx_loopback_mask(EFX_LOOPBACK_KIND_ALL, &mask); + + EFX_AND_QWORD(mask, + *MCDI_OUT2(req, efx_qword_t, GET_LOOPBACK_MODES_OUT_SUGGESTED)); + + modes = *MCDI_OUT2(req, efx_qword_t, GET_LOOPBACK_MODES_OUT_100M); + EFX_AND_QWORD(modes, mask); + encp->enc_loopback_types[EFX_LINK_100FDX] = modes; + + modes = *MCDI_OUT2(req, efx_qword_t, GET_LOOPBACK_MODES_OUT_1G); + EFX_AND_QWORD(modes, mask); + encp->enc_loopback_types[EFX_LINK_1000FDX] = modes; + + modes = *MCDI_OUT2(req, efx_qword_t, GET_LOOPBACK_MODES_OUT_10G); + EFX_AND_QWORD(modes, mask); + encp->enc_loopback_types[EFX_LINK_10000FDX] = modes; + + if (req.emr_out_length_used >= + MC_CMD_GET_LOOPBACK_MODES_OUT_40G_OFST + + MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LEN) { + /* Response includes 40G loopback modes */ + modes = + *MCDI_OUT2(req, efx_qword_t, GET_LOOPBACK_MODES_OUT_40G); + EFX_AND_QWORD(modes, mask); + encp->enc_loopback_types[EFX_LINK_40000FDX] = modes; + } + + EFX_ZERO_QWORD(modes); + EFX_SET_QWORD_BIT(modes, EFX_LOOPBACK_OFF); + EFX_OR_QWORD(modes, encp->enc_loopback_types[EFX_LINK_100FDX]); + EFX_OR_QWORD(modes, encp->enc_loopback_types[EFX_LINK_1000FDX]); + EFX_OR_QWORD(modes, encp->enc_loopback_types[EFX_LINK_10000FDX]); + EFX_OR_QWORD(modes, encp->enc_loopback_types[EFX_LINK_40000FDX]); + encp->enc_loopback_types[EFX_LINK_UNKNOWN] = modes; + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +#endif /* EFSYS_OPT_LOOPBACK */ diff --git a/sys/dev/sfxge/common/efx_nvram.c b/sys/dev/sfxge/common/efx_nvram.c index 2df9bb98b3ca..82bb1d9842f5 100644 --- a/sys/dev/sfxge/common/efx_nvram.c +++ b/sys/dev/sfxge/common/efx_nvram.c @@ -1,26 +1,31 @@ /*- - * Copyright 2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2009-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -36,7 +41,7 @@ __FBSDID("$FreeBSD$"); #if EFSYS_OPT_FALCON -static efx_nvram_ops_t __cs __efx_nvram_falcon_ops = { +static efx_nvram_ops_t __efx_nvram_falcon_ops = { #if EFSYS_OPT_DIAG falcon_nvram_test, /* envo_test */ #endif /* EFSYS_OPT_DIAG */ @@ -54,7 +59,7 @@ static efx_nvram_ops_t __cs __efx_nvram_falcon_ops = { #if EFSYS_OPT_SIENA -static efx_nvram_ops_t __cs __efx_nvram_siena_ops = { +static efx_nvram_ops_t __efx_nvram_siena_ops = { #if EFSYS_OPT_DIAG siena_nvram_test, /* envo_test */ #endif /* EFSYS_OPT_DIAG */ @@ -70,6 +75,24 @@ static efx_nvram_ops_t __cs __efx_nvram_siena_ops = { #endif /* EFSYS_OPT_SIENA */ +#if EFSYS_OPT_HUNTINGTON + +static efx_nvram_ops_t __efx_nvram_hunt_ops = { +#if EFSYS_OPT_DIAG + hunt_nvram_test, /* envo_test */ +#endif /* EFSYS_OPT_DIAG */ + hunt_nvram_size, /* envo_size */ + hunt_nvram_get_version, /* envo_get_version */ + hunt_nvram_rw_start, /* envo_rw_start */ + hunt_nvram_read_chunk, /* envo_read_chunk */ + hunt_nvram_erase, /* envo_erase */ + hunt_nvram_write_chunk, /* envo_write_chunk */ + hunt_nvram_rw_finish, /* envo_rw_finish */ + hunt_nvram_set_version, /* envo_set_version */ +}; + +#endif /* EFSYS_OPT_HUNTINGTON */ + __checkReturn int efx_nvram_init( __in efx_nic_t *enp) @@ -94,6 +117,12 @@ efx_nvram_init( break; #endif /* EFSYS_OPT_SIENA */ +#if EFSYS_OPT_HUNTINGTON + case EFX_FAMILY_HUNTINGTON: + envop = (efx_nvram_ops_t *)&__efx_nvram_hunt_ops; + break; +#endif /* EFSYS_OPT_HUNTINGTON */ + default: EFSYS_ASSERT(0); rc = ENOTSUP; @@ -329,7 +358,7 @@ efx_nvram_rw_finish( efx_nvram_set_version( __in efx_nic_t *enp, __in efx_nvram_type_t type, - __out uint16_t version[4]) + __in_ecount(4) uint16_t version[4]) { efx_nvram_ops_t *envop = enp->en_envop; int rc; @@ -373,3 +402,486 @@ efx_nvram_fini( } #endif /* EFSYS_OPT_NVRAM */ + +#if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD + +/* + * Internal MCDI request handling + */ + + __checkReturn int +efx_mcdi_nvram_partitions( + __in efx_nic_t *enp, + __out_bcount(size) caddr_t data, + __in size_t size, + __out unsigned int *npartnp) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_NVRAM_PARTITIONS_IN_LEN, + MC_CMD_NVRAM_PARTITIONS_OUT_LENMAX)]; + unsigned int npartn; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_NVRAM_PARTITIONS; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_NVRAM_PARTITIONS_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_NVRAM_PARTITIONS_OUT_LENMAX; + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (req.emr_out_length_used < MC_CMD_NVRAM_PARTITIONS_OUT_LENMIN) { + rc = EMSGSIZE; + goto fail2; + } + npartn = MCDI_OUT_DWORD(req, NVRAM_PARTITIONS_OUT_NUM_PARTITIONS); + + if (req.emr_out_length_used < MC_CMD_NVRAM_PARTITIONS_OUT_LEN(npartn)) { + rc = ENOENT; + goto fail3; + } + + if (size < npartn * sizeof (uint32_t)) { + rc = ENOSPC; + goto fail3; + } + + *npartnp = npartn; + + memcpy(data, + MCDI_OUT2(req, uint32_t, NVRAM_PARTITIONS_OUT_TYPE_ID), + (npartn * sizeof (uint32_t))); + + return (0); + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +efx_mcdi_nvram_metadata( + __in efx_nic_t *enp, + __in uint32_t partn, + __out uint32_t *subtypep, + __out_ecount(4) uint16_t version[4], + __out_bcount_opt(size) char *descp, + __in size_t size) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_NVRAM_METADATA_IN_LEN, + MC_CMD_NVRAM_METADATA_OUT_LENMAX)]; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_NVRAM_METADATA; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_NVRAM_METADATA_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_NVRAM_METADATA_OUT_LENMAX; + + MCDI_IN_SET_DWORD(req, NVRAM_METADATA_IN_TYPE, partn); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (req.emr_out_length_used < MC_CMD_NVRAM_METADATA_OUT_LENMIN) { + rc = EMSGSIZE; + goto fail2; + } + + if (MCDI_OUT_DWORD_FIELD(req, NVRAM_METADATA_OUT_FLAGS, + NVRAM_METADATA_OUT_SUBTYPE_VALID)) { + *subtypep = MCDI_OUT_DWORD(req, NVRAM_METADATA_OUT_SUBTYPE); + } else { + *subtypep = 0; + } + + if (MCDI_OUT_DWORD_FIELD(req, NVRAM_METADATA_OUT_FLAGS, + NVRAM_METADATA_OUT_VERSION_VALID)) { + version[0] = MCDI_OUT_WORD(req, NVRAM_METADATA_OUT_VERSION_W); + version[1] = MCDI_OUT_WORD(req, NVRAM_METADATA_OUT_VERSION_X); + version[2] = MCDI_OUT_WORD(req, NVRAM_METADATA_OUT_VERSION_Y); + version[3] = MCDI_OUT_WORD(req, NVRAM_METADATA_OUT_VERSION_Z); + } else { + version[0] = version[1] = version[2] = version[3] = 0; + } + + if (MCDI_OUT_DWORD_FIELD(req, NVRAM_METADATA_OUT_FLAGS, + NVRAM_METADATA_OUT_DESCRIPTION_VALID)) { + /* Return optional descrition string */ + if ((descp != NULL) && (size > 0)) { + size_t desclen; + + descp[0] = '\0'; + desclen = (req.emr_out_length_used + - MC_CMD_NVRAM_METADATA_OUT_LEN(0)); + + EFSYS_ASSERT3U(desclen, <=, + MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_MAXNUM); + + if (size < desclen) { + rc = ENOSPC; + goto fail3; + } + + memcpy(descp, MCDI_OUT2(req, char, + NVRAM_METADATA_OUT_DESCRIPTION), + desclen); + + /* Ensure string is NUL terminated */ + descp[desclen] = '\0'; + } + } + + return (0); + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +efx_mcdi_nvram_info( + __in efx_nic_t *enp, + __in uint32_t partn, + __out_opt size_t *sizep, + __out_opt uint32_t *addressp, + __out_opt uint32_t *erase_sizep) +{ + uint8_t payload[MAX(MC_CMD_NVRAM_INFO_IN_LEN, + MC_CMD_NVRAM_INFO_OUT_LEN)]; + efx_mcdi_req_t req; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_NVRAM_INFO; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_NVRAM_INFO_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_NVRAM_INFO_OUT_LEN; + + MCDI_IN_SET_DWORD(req, NVRAM_INFO_IN_TYPE, partn); + + efx_mcdi_execute_quiet(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (req.emr_out_length_used < MC_CMD_NVRAM_INFO_OUT_LEN) { + rc = EMSGSIZE; + goto fail2; + } + + if (sizep) + *sizep = MCDI_OUT_DWORD(req, NVRAM_INFO_OUT_SIZE); + + if (addressp) + *addressp = MCDI_OUT_DWORD(req, NVRAM_INFO_OUT_PHYSADDR); + + if (erase_sizep) + *erase_sizep = MCDI_OUT_DWORD(req, NVRAM_INFO_OUT_ERASESIZE); + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +efx_mcdi_nvram_update_start( + __in efx_nic_t *enp, + __in uint32_t partn) +{ + uint8_t payload[MAX(MC_CMD_NVRAM_UPDATE_START_IN_LEN, + MC_CMD_NVRAM_UPDATE_START_OUT_LEN)]; + efx_mcdi_req_t req; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_NVRAM_UPDATE_START; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_NVRAM_UPDATE_START_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_NVRAM_UPDATE_START_OUT_LEN; + + MCDI_IN_SET_DWORD(req, NVRAM_UPDATE_START_IN_TYPE, partn); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +efx_mcdi_nvram_read( + __in efx_nic_t *enp, + __in uint32_t partn, + __in uint32_t offset, + __out_bcount(size) caddr_t data, + __in size_t size) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_NVRAM_READ_IN_LEN, + MC_CMD_NVRAM_READ_OUT_LENMAX)]; + int rc; + + if (size > MC_CMD_NVRAM_READ_OUT_LENMAX) { + rc = EINVAL; + goto fail1; + } + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_NVRAM_READ; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_NVRAM_READ_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_NVRAM_READ_OUT_LENMAX; + + MCDI_IN_SET_DWORD(req, NVRAM_READ_IN_TYPE, partn); + MCDI_IN_SET_DWORD(req, NVRAM_READ_IN_OFFSET, offset); + MCDI_IN_SET_DWORD(req, NVRAM_READ_IN_LENGTH, size); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (req.emr_out_length_used < MC_CMD_NVRAM_READ_OUT_LEN(size)) { + rc = EMSGSIZE; + goto fail2; + } + + memcpy(data, + MCDI_OUT2(req, uint8_t, NVRAM_READ_OUT_READ_BUFFER), + size); + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +efx_mcdi_nvram_erase( + __in efx_nic_t *enp, + __in uint32_t partn, + __in uint32_t offset, + __in size_t size) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_NVRAM_ERASE_IN_LEN, + MC_CMD_NVRAM_ERASE_OUT_LEN)]; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_NVRAM_ERASE; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_NVRAM_ERASE_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_NVRAM_ERASE_OUT_LEN; + + MCDI_IN_SET_DWORD(req, NVRAM_ERASE_IN_TYPE, partn); + MCDI_IN_SET_DWORD(req, NVRAM_ERASE_IN_OFFSET, offset); + MCDI_IN_SET_DWORD(req, NVRAM_ERASE_IN_LENGTH, size); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +efx_mcdi_nvram_write( + __in efx_nic_t *enp, + __in uint32_t partn, + __in uint32_t offset, + __out_bcount(size) caddr_t data, + __in size_t size) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_NVRAM_WRITE_IN_LENMAX, + MC_CMD_NVRAM_WRITE_OUT_LEN)]; + int rc; + + if (size > MC_CMD_NVRAM_WRITE_IN_LENMAX) { + rc = EINVAL; + goto fail1; + } + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_NVRAM_WRITE; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_NVRAM_WRITE_IN_LEN(size); + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_NVRAM_WRITE_OUT_LEN; + + MCDI_IN_SET_DWORD(req, NVRAM_WRITE_IN_TYPE, partn); + MCDI_IN_SET_DWORD(req, NVRAM_WRITE_IN_OFFSET, offset); + MCDI_IN_SET_DWORD(req, NVRAM_WRITE_IN_LENGTH, size); + + memcpy(MCDI_IN2(req, uint8_t, NVRAM_WRITE_IN_WRITE_BUFFER), + data, size); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail2; + } + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +efx_mcdi_nvram_update_finish( + __in efx_nic_t *enp, + __in uint32_t partn, + __in boolean_t reboot) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN, + MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN)]; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_NVRAM_UPDATE_FINISH; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN; + + MCDI_IN_SET_DWORD(req, NVRAM_UPDATE_FINISH_IN_TYPE, partn); + MCDI_IN_SET_DWORD(req, NVRAM_UPDATE_FINISH_IN_REBOOT, reboot); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +#if EFSYS_OPT_DIAG + + __checkReturn int +efx_mcdi_nvram_test( + __in efx_nic_t *enp, + __in uint32_t partn) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_NVRAM_TEST_IN_LEN, + MC_CMD_NVRAM_TEST_OUT_LEN)]; + int result; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_NVRAM_TEST; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_NVRAM_TEST_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_NVRAM_TEST_OUT_LEN; + + MCDI_IN_SET_DWORD(req, NVRAM_TEST_IN_TYPE, partn); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (req.emr_out_length_used < MC_CMD_NVRAM_TEST_OUT_LEN) { + rc = EMSGSIZE; + goto fail2; + } + + result = MCDI_OUT_DWORD(req, NVRAM_TEST_OUT_RESULT); + if (result == MC_CMD_NVRAM_TEST_FAIL) { + + EFSYS_PROBE1(nvram_test_failure, int, partn); + + rc = (EINVAL); + goto fail3; + } + + return (0); + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +#endif /* EFSYS_OPT_DIAG */ + + +#endif /* EFSYS_OPT_NVRAM || EFSYS_OPT_VPD */ diff --git a/sys/dev/sfxge/common/efx_phy.c b/sys/dev/sfxge/common/efx_phy.c index bb34ea7bd99d..5d18dc70b97b 100644 --- a/sys/dev/sfxge/common/efx_phy.c +++ b/sys/dev/sfxge/common/efx_phy.c @@ -1,26 +1,31 @@ /*- - * Copyright 2007-2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2007-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -68,7 +73,7 @@ __FBSDID("$FreeBSD$"); #endif #if EFSYS_OPT_PHY_NULL -static efx_phy_ops_t __cs __efx_phy_null_ops = { +static efx_phy_ops_t __efx_phy_null_ops = { NULL, /* epo_power */ nullphy_reset, /* epo_reset */ nullphy_reconfigure, /* epo_reconfigure */ @@ -86,16 +91,17 @@ static efx_phy_ops_t __cs __efx_phy_null_ops = { nullphy_prop_get, /* epo_prop_get */ nullphy_prop_set, /* epo_prop_set */ #endif /* EFSYS_OPT_PHY_PROPS */ -#if EFSYS_OPT_PHY_BIST +#if EFSYS_OPT_BIST + NULL, /* epo_bist_enable_offline */ NULL, /* epo_bist_start */ NULL, /* epo_bist_poll */ NULL, /* epo_bist_stop */ -#endif /* EFSYS_OPT_PHY_BIST */ +#endif /* EFSYS_OPT_BIST */ }; #endif /* EFSYS_OPT_PHY_NULL */ #if EFSYS_OPT_PHY_QT2022C2 -static efx_phy_ops_t __cs __efx_phy_qt2022c2_ops = { +static efx_phy_ops_t __efx_phy_qt2022c2_ops = { NULL, /* epo_power */ qt2022c2_reset, /* epo_reset */ qt2022c2_reconfigure, /* epo_reconfigure */ @@ -113,16 +119,17 @@ static efx_phy_ops_t __cs __efx_phy_qt2022c2_ops = { qt2022c2_prop_get, /* epo_prop_get */ qt2022c2_prop_set, /* epo_prop_set */ #endif /* EFSYS_OPT_PHY_PROPS */ -#if EFSYS_OPT_PHY_BIST +#if EFSYS_OPT_BIST + NULL, /* epo_bist_enable_offline */ NULL, /* epo_bist_start */ NULL, /* epo_bist_poll */ NULL, /* epo_bist_stop */ -#endif /* EFSYS_OPT_PHY_BIST */ +#endif /* EFSYS_OPT_BIST */ }; #endif /* EFSYS_OPT_PHY_QT2022C2 */ #if EFSYS_OPT_PHY_SFX7101 -static efx_phy_ops_t __cs __efx_phy_sfx7101_ops = { +static efx_phy_ops_t __efx_phy_sfx7101_ops = { sfx7101_power, /* epo_power */ sfx7101_reset, /* epo_reset */ sfx7101_reconfigure, /* epo_reconfigure */ @@ -140,16 +147,17 @@ static efx_phy_ops_t __cs __efx_phy_sfx7101_ops = { sfx7101_prop_get, /* epo_prop_get */ sfx7101_prop_set, /* epo_prop_set */ #endif /* EFSYS_OPT_PHY_PROPS */ -#if EFSYS_OPT_PHY_BIST +#if EFSYS_OPT_BIST + NULL, /* epo_bist_enable_offline */ NULL, /* epo_bist_start */ NULL, /* epo_bist_poll */ NULL, /* epo_bist_stop */ -#endif /* EFSYS_OPT_PHY_BIST */ +#endif /* EFSYS_OPT_BIST */ }; #endif /* EFSYS_OPT_PHY_SFX7101 */ #if EFSYS_OPT_PHY_TXC43128 -static efx_phy_ops_t __cs __efx_phy_txc43128_ops = { +static efx_phy_ops_t __efx_phy_txc43128_ops = { NULL, /* epo_power */ txc43128_reset, /* epo_reset */ txc43128_reconfigure, /* epo_reconfigure */ @@ -167,16 +175,17 @@ static efx_phy_ops_t __cs __efx_phy_txc43128_ops = { txc43128_prop_get, /* epo_prop_get */ txc43128_prop_set, /* epo_prop_set */ #endif /* EFSYS_OPT_PHY_PROPS */ -#if EFSYS_OPT_PHY_BIST +#if EFSYS_OPT_BIST + NULL, /* epo_bist_enable_offline */ NULL, /* epo_bist_start */ NULL, /* epo_bist_poll */ NULL, /* epo_bist_stop */ -#endif /* EFSYS_OPT_PHY_BIST */ +#endif /* EFSYS_OPT_BIST */ }; #endif /* EFSYS_OPT_PHY_TXC43128 */ #if EFSYS_OPT_PHY_SFT9001 -static efx_phy_ops_t __cs __efx_phy_sft9001_ops = { +static efx_phy_ops_t __efx_phy_sft9001_ops = { NULL, /* epo_power */ sft9001_reset, /* epo_reset */ sft9001_reconfigure, /* epo_reconfigure */ @@ -194,16 +203,17 @@ static efx_phy_ops_t __cs __efx_phy_sft9001_ops = { sft9001_prop_get, /* epo_prop_get */ sft9001_prop_set, /* epo_prop_set */ #endif /* EFSYS_OPT_PHY_PROPS */ -#if EFSYS_OPT_PHY_BIST +#if EFSYS_OPT_BIST + NULL, /* epo_bist_enable_offline */ sft9001_bist_start, /* epo_bist_start */ sft9001_bist_poll, /* epo_bist_poll */ sft9001_bist_stop, /* epo_bist_stop */ -#endif /* EFSYS_OPT_PHY_BIST */ +#endif /* EFSYS_OPT_BIST */ }; #endif /* EFSYS_OPT_PHY_SFT9001 */ #if EFSYS_OPT_PHY_QT2025C -static efx_phy_ops_t __cs __efx_phy_qt2025c_ops = { +static efx_phy_ops_t __efx_phy_qt2025c_ops = { NULL, /* epo_power */ qt2025c_reset, /* epo_reset */ qt2025c_reconfigure, /* epo_reconfigure */ @@ -221,16 +231,17 @@ static efx_phy_ops_t __cs __efx_phy_qt2025c_ops = { qt2025c_prop_get, /* epo_prop_get */ qt2025c_prop_set, /* epo_prop_set */ #endif /* EFSYS_OPT_PHY_PROPS */ -#if EFSYS_OPT_PHY_BIST +#if EFSYS_OPT_BIST + NULL, /* epo_bist_enable_offline */ NULL, /* epo_bist_start */ NULL, /* epo_bist_poll */ NULL, /* epo_bist_stop */ -#endif /* EFSYS_OPT_PHY_BIST */ +#endif /* EFSYS_OPT_BIST */ }; #endif /* EFSYS_OPT_PHY_QT2025C */ #if EFSYS_OPT_SIENA -static efx_phy_ops_t __cs __efx_phy_siena_ops = { +static efx_phy_ops_t __efx_phy_siena_ops = { siena_phy_power, /* epo_power */ NULL, /* epo_reset */ siena_phy_reconfigure, /* epo_reconfigure */ @@ -248,14 +259,43 @@ static efx_phy_ops_t __cs __efx_phy_siena_ops = { siena_phy_prop_get, /* epo_prop_get */ siena_phy_prop_set, /* epo_prop_set */ #endif /* EFSYS_OPT_PHY_PROPS */ -#if EFSYS_OPT_PHY_BIST +#if EFSYS_OPT_BIST + NULL, /* epo_bist_enable_offline */ siena_phy_bist_start, /* epo_bist_start */ siena_phy_bist_poll, /* epo_bist_poll */ siena_phy_bist_stop, /* epo_bist_stop */ -#endif /* EFSYS_OPT_PHY_BIST */ +#endif /* EFSYS_OPT_BIST */ }; #endif /* EFSYS_OPT_SIENA */ +#if EFSYS_OPT_HUNTINGTON +static efx_phy_ops_t __efx_phy_hunt_ops = { + hunt_phy_power, /* epo_power */ + NULL, /* epo_reset */ + hunt_phy_reconfigure, /* epo_reconfigure */ + hunt_phy_verify, /* epo_verify */ + NULL, /* epo_uplink_check */ + NULL, /* epo_downlink_check */ + hunt_phy_oui_get, /* epo_oui_get */ +#if EFSYS_OPT_PHY_STATS + hunt_phy_stats_update, /* epo_stats_update */ +#endif /* EFSYS_OPT_PHY_STATS */ +#if EFSYS_OPT_PHY_PROPS +#if EFSYS_OPT_NAMES + hunt_phy_prop_name, /* epo_prop_name */ +#endif + hunt_phy_prop_get, /* epo_prop_get */ + hunt_phy_prop_set, /* epo_prop_set */ +#endif /* EFSYS_OPT_PHY_PROPS */ +#if EFSYS_OPT_BIST + hunt_bist_enable_offline, /* epo_bist_enable_offline */ + hunt_bist_start, /* epo_bist_start */ + hunt_bist_poll, /* epo_bist_poll */ + hunt_bist_stop, /* epo_bist_stop */ +#endif /* EFSYS_OPT_BIST */ +}; +#endif /* EFSYS_OPT_HUNTINGTON */ + __checkReturn int efx_phy_probe( __in efx_nic_t *enp) @@ -317,6 +357,11 @@ efx_phy_probe( epop = (efx_phy_ops_t *)&__efx_phy_siena_ops; break; #endif /* EFSYS_OPT_SIENA */ +#if EFSYS_OPT_HUNTINGTON + case EFX_FAMILY_HUNTINGTON: + epop = (efx_phy_ops_t *)&__efx_phy_hunt_ops; + break; +#endif /* EFSYS_OPT_HUNTINGTON */ default: rc = ENOTSUP; goto fail1; @@ -516,8 +561,8 @@ efx_phy_media_type_get( #if EFSYS_OPT_NAMES -/* START MKCONFIG GENERATED PhyStatNamesBlock 271268f3da0e804f */ -static const char __cs * __cs __efx_phy_stat_name[] = { +/* START MKCONFIG GENERATED PhyStatNamesBlock d5f79b4bc2c050fe */ +static const char *__efx_phy_stat_name[] = { "oui", "pma_pmd_link_up", "pma_pmd_rx_fault", @@ -568,7 +613,7 @@ static const char __cs * __cs __efx_phy_stat_name[] = { /* END MKCONFIG GENERATED PhyStatNamesBlock */ - const char __cs * + const char * efx_phy_stat_name( __in efx_nic_t *enp, __in efx_phy_stat_t type) @@ -602,7 +647,7 @@ efx_phy_stats_update( #if EFSYS_OPT_PHY_PROPS #if EFSYS_OPT_NAMES - const char __cs * + const char * efx_phy_prop_name( __in efx_nic_t *enp, __in unsigned int id) @@ -649,23 +694,51 @@ efx_phy_prop_set( } #endif /* EFSYS_OPT_PHY_STATS */ -#if EFSYS_OPT_PHY_BIST +#if EFSYS_OPT_BIST __checkReturn int -efx_phy_bist_start( - __in efx_nic_t *enp, - __in efx_phy_bist_type_t type) +efx_bist_enable_offline( + __in efx_nic_t *enp) { efx_port_t *epp = &(enp->en_port); efx_phy_ops_t *epop = epp->ep_epop; int rc; EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT); - EFSYS_ASSERT3U(type, !=, EFX_PHY_BIST_TYPE_UNKNOWN); - EFSYS_ASSERT3U(type, <, EFX_PHY_BIST_TYPE_NTYPES); - EFSYS_ASSERT3U(epp->ep_current_bist, ==, EFX_PHY_BIST_TYPE_UNKNOWN); + if (epop->epo_bist_enable_offline == NULL) { + rc = ENOTSUP; + goto fail1; + } + + if ((rc = epop->epo_bist_enable_offline(enp)) != 0) + goto fail2; + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); + +} + + __checkReturn int +efx_bist_start( + __in efx_nic_t *enp, + __in efx_bist_type_t type) +{ + efx_port_t *epp = &(enp->en_port); + efx_phy_ops_t *epop = epp->ep_epop; + int rc; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + + EFSYS_ASSERT3U(type, !=, EFX_BIST_TYPE_UNKNOWN); + EFSYS_ASSERT3U(type, <, EFX_BIST_TYPE_NTYPES); + EFSYS_ASSERT3U(epp->ep_current_bist, ==, EFX_BIST_TYPE_UNKNOWN); if (epop->epo_bist_start == NULL) { rc = ENOTSUP; @@ -688,10 +761,10 @@ efx_phy_bist_start( } __checkReturn int -efx_phy_bist_poll( +efx_bist_poll( __in efx_nic_t *enp, - __in efx_phy_bist_type_t type, - __out efx_phy_bist_result_t *resultp, + __in efx_bist_type_t type, + __out efx_bist_result_t *resultp, __out_opt uint32_t *value_maskp, __out_ecount_opt(count) unsigned long *valuesp, __in size_t count) @@ -701,10 +774,9 @@ efx_phy_bist_poll( int rc; EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT); - EFSYS_ASSERT3U(type, !=, EFX_PHY_BIST_TYPE_UNKNOWN); - EFSYS_ASSERT3U(type, <, EFX_PHY_BIST_TYPE_NTYPES); + EFSYS_ASSERT3U(type, !=, EFX_BIST_TYPE_UNKNOWN); + EFSYS_ASSERT3U(type, <, EFX_BIST_TYPE_NTYPES); EFSYS_ASSERT3U(epp->ep_current_bist, ==, type); EFSYS_ASSERT(epop->epo_bist_poll != NULL); @@ -728,18 +800,17 @@ efx_phy_bist_poll( } void -efx_phy_bist_stop( +efx_bist_stop( __in efx_nic_t *enp, - __in efx_phy_bist_type_t type) + __in efx_bist_type_t type) { efx_port_t *epp = &(enp->en_port); efx_phy_ops_t *epop = epp->ep_epop; EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT); - EFSYS_ASSERT3U(type, !=, EFX_PHY_BIST_TYPE_UNKNOWN); - EFSYS_ASSERT3U(type, <, EFX_PHY_BIST_TYPE_NTYPES); + EFSYS_ASSERT3U(type, !=, EFX_BIST_TYPE_UNKNOWN); + EFSYS_ASSERT3U(type, <, EFX_BIST_TYPE_NTYPES); EFSYS_ASSERT3U(epp->ep_current_bist, ==, type); EFSYS_ASSERT(epop->epo_bist_stop != NULL); @@ -747,10 +818,10 @@ efx_phy_bist_stop( if (epop->epo_bist_stop != NULL) epop->epo_bist_stop(enp, type); - epp->ep_current_bist = EFX_PHY_BIST_TYPE_UNKNOWN; + epp->ep_current_bist = EFX_BIST_TYPE_UNKNOWN; } -#endif /* EFSYS_OPT_PHY_BIST */ +#endif /* EFSYS_OPT_BIST */ void efx_phy_unprobe( __in efx_nic_t *enp) diff --git a/sys/dev/sfxge/common/efx_phy_ids.h b/sys/dev/sfxge/common/efx_phy_ids.h new file mode 100644 index 000000000000..e06251923938 --- /dev/null +++ b/sys/dev/sfxge/common/efx_phy_ids.h @@ -0,0 +1,53 @@ +/*- + * Copyright (c) 2013-2015 Solarflare Communications Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. + * + * $FreeBSD$ + */ + +#ifndef _SYS_EFX_PHY_IDS_H +#define _SYS_EFX_PHY_IDS_H + +#define EFX_PHY_NULL 0 + +typedef enum efx_phy_type_e { /* GENERATED BY scripts/genfwdef */ + EFX_PHY_TXC43128 = 1, + EFX_PHY_SFX7101 = 3, + EFX_PHY_QT2022C2 = 4, + EFX_PHY_PM8358 = 6, + EFX_PHY_SFT9001A = 8, + EFX_PHY_QT2025C = 9, + EFX_PHY_SFT9001B = 10, + EFX_PHY_QLX111V = 12, + EFX_PHY_QT2025_KR = 17, + EFX_PHY_AEL3020 = 18, + EFX_PHY_XFI_FARMI = 19, +} efx_phy_type_t; + + +#endif /* _SYS_EFX_PHY_IDS_H */ diff --git a/sys/dev/sfxge/common/efx_port.c b/sys/dev/sfxge/common/efx_port.c index 0b67d065f2fb..a750c15edb3b 100644 --- a/sys/dev/sfxge/common/efx_port.c +++ b/sys/dev/sfxge/common/efx_port.c @@ -1,26 +1,31 @@ /*- - * Copyright 2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2009-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -61,6 +66,9 @@ efx_port_init( epp->ep_emop->emo_reconfigure(enp); + /* Pick up current phy capababilities */ + efx_port_poll(enp, NULL); + /* * Turn on the PHY if available, otherwise reset it, and * reconfigure it with the current configuration. @@ -96,7 +104,7 @@ efx_port_init( __checkReturn int efx_port_poll( __in efx_nic_t *enp, - __out efx_link_mode_t *link_modep) + __out_opt efx_link_mode_t *link_modep) { efx_port_t *epp = &(enp->en_port); efx_mac_ops_t *emop = epp->ep_emop; @@ -141,7 +149,9 @@ efx_port_loopback_set( EFSYS_ASSERT(emop != NULL); EFSYS_ASSERT(link_mode < EFX_LINK_NMODES); - if ((1 << loopback_type) & ~encp->enc_loopback_types[link_mode]) { + + if (EFX_TEST_QWORD_BIT(encp->enc_loopback_types[link_mode], + loopback_type) == 0) { rc = ENOTSUP; goto fail1; } @@ -165,7 +175,7 @@ efx_port_loopback_set( #if EFSYS_OPT_NAMES -static const char __cs * __cs __efx_loopback_type_name[] = { +static const char *__efx_loopback_type_name[] = { "OFF", "DATA", "GMAC", @@ -184,13 +194,33 @@ static const char __cs * __cs __efx_loopback_type_name[] = { "PHY_XS", "PCS", "PMA_PMD", + "XPORT", + "XGMII_WS", + "XAUI_WS", + "XAUI_WS_FAR", + "XAUI_WS_NEAR", + "GMII_WS", + "XFI_WS", + "XFI_WS_FAR", + "PHYXS_WS", + "PMA_INT", + "SD_NEAR", + "SD_FAR", + "PMA_INT_WS", + "SD_FEP2_WS", + "SD_FEP1_5_WS", + "SD_FEP_WS", + "SD_FES_WS", }; - __checkReturn const char __cs * + __checkReturn const char * efx_loopback_type_name( __in efx_nic_t *enp, __in efx_loopback_type_t type) { + EFX_STATIC_ASSERT(EFX_ARRAY_SIZE(__efx_loopback_type_name) == + EFX_LOOPBACK_NTYPES); + _NOTE(ARGUNUSED(enp)) EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); EFSYS_ASSERT3U(type, <, EFX_LOOPBACK_NTYPES); diff --git a/sys/dev/sfxge/common/efx_regs.h b/sys/dev/sfxge/common/efx_regs.h index 4019663933cb..5ece431fe2ea 100644 --- a/sys/dev/sfxge/common/efx_regs.h +++ b/sys/dev/sfxge/common/efx_regs.h @@ -1,26 +1,31 @@ /*- - * Copyright 2007-2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2007-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. * * $FreeBSD$ */ @@ -3854,7 +3859,7 @@ extern "C" { */ -#define FR_AZ_TX_PACE_TBL_OFST FR_BZ_TX_PACE_TBL_OFST +#define FR_AZ_TX_PACE_TBL_OFST FR_BZ_TX_PACE_TBL_OFST #ifdef __cplusplus diff --git a/sys/dev/sfxge/common/efx_regs_ef10.h b/sys/dev/sfxge/common/efx_regs_ef10.h index c4a6d0e7c35b..8401726d6935 100644 --- a/sys/dev/sfxge/common/efx_regs_ef10.h +++ b/sys/dev/sfxge/common/efx_regs_ef10.h @@ -1,26 +1,31 @@ /*- - * Copyright 2007-2010 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2007-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. * * $FreeBSD$ */ @@ -34,11 +39,13 @@ extern "C" { /* * BIU_HW_REV_ID_REG(32bit): - * + * */ -#define ER_DZ_BIU_HW_REV_ID_REG 0x00000000 +#define ER_DZ_BIU_HW_REV_ID_REG_OFST 0x00000000 /* hunta0=pcie_pf_bar2 */ +#define ER_DZ_BIU_HW_REV_ID_REG_RESET 0xeb14face + #define ERF_DZ_HW_REV_ID_LBN 0 #define ERF_DZ_HW_REV_ID_WIDTH 32 @@ -46,13 +53,15 @@ extern "C" { /* * BIU_MC_SFT_STATUS_REG(32bit): - * + * */ -#define ER_DZ_BIU_MC_SFT_STATUS_REG 0x00000010 +#define ER_DZ_BIU_MC_SFT_STATUS_REG_OFST 0x00000010 /* hunta0=pcie_pf_bar2 */ #define ER_DZ_BIU_MC_SFT_STATUS_REG_STEP 4 #define ER_DZ_BIU_MC_SFT_STATUS_REG_ROWS 8 +#define ER_DZ_BIU_MC_SFT_STATUS_REG_RESET 0x1111face + #define ERF_DZ_MC_SFT_STATUS_LBN 0 #define ERF_DZ_MC_SFT_STATUS_WIDTH 32 @@ -60,11 +69,13 @@ extern "C" { /* * BIU_INT_ISR_REG(32bit): - * + * */ -#define ER_DZ_BIU_INT_ISR_REG 0x00000090 +#define ER_DZ_BIU_INT_ISR_REG_OFST 0x00000090 /* hunta0=pcie_pf_bar2 */ +#define ER_DZ_BIU_INT_ISR_REG_RESET 0x0 + #define ERF_DZ_ISR_REG_LBN 0 #define ERF_DZ_ISR_REG_WIDTH 32 @@ -72,11 +83,13 @@ extern "C" { /* * MC_DB_LWRD_REG(32bit): - * + * */ -#define ER_DZ_MC_DB_LWRD_REG 0x00000200 +#define ER_DZ_MC_DB_LWRD_REG_OFST 0x00000200 /* hunta0=pcie_pf_bar2 */ +#define ER_DZ_MC_DB_LWRD_REG_RESET 0x0 + #define ERF_DZ_MC_DOORBELL_L_LBN 0 #define ERF_DZ_MC_DOORBELL_L_WIDTH 32 @@ -84,11 +97,13 @@ extern "C" { /* * MC_DB_HWRD_REG(32bit): - * + * */ -#define ER_DZ_MC_DB_HWRD_REG 0x00000204 +#define ER_DZ_MC_DB_HWRD_REG_OFST 0x00000204 /* hunta0=pcie_pf_bar2 */ +#define ER_DZ_MC_DB_HWRD_REG_RESET 0x0 + #define ERF_DZ_MC_DOORBELL_H_LBN 0 #define ERF_DZ_MC_DOORBELL_H_WIDTH 32 @@ -96,13 +111,15 @@ extern "C" { /* * EVQ_RPTR_REG(32bit): - * + * */ -#define ER_DZ_EVQ_RPTR_REG 0x00000400 +#define ER_DZ_EVQ_RPTR_REG_OFST 0x00000400 /* hunta0=pcie_pf_bar2 */ -#define ER_DZ_EVQ_RPTR_REG_STEP 4096 +#define ER_DZ_EVQ_RPTR_REG_STEP 8192 #define ER_DZ_EVQ_RPTR_REG_ROWS 2048 +#define ER_DZ_EVQ_RPTR_REG_RESET 0x0 + #define ERF_DZ_EVQ_RPTR_VLD_LBN 15 #define ERF_DZ_EVQ_RPTR_VLD_WIDTH 1 @@ -112,13 +129,15 @@ extern "C" { /* * EVQ_TMR_REG(32bit): - * + * */ -#define ER_DZ_EVQ_TMR_REG 0x00000420 +#define ER_DZ_EVQ_TMR_REG_OFST 0x00000420 /* hunta0=pcie_pf_bar2 */ -#define ER_DZ_EVQ_TMR_REG_STEP 4096 +#define ER_DZ_EVQ_TMR_REG_STEP 8192 #define ER_DZ_EVQ_TMR_REG_ROWS 2048 +#define ER_DZ_EVQ_TMR_REG_RESET 0x0 + #define ERF_DZ_TC_TIMER_MODE_LBN 14 #define ERF_DZ_TC_TIMER_MODE_WIDTH 2 @@ -128,28 +147,34 @@ extern "C" { /* * RX_DESC_UPD_REG(32bit): - * + * */ -#define ER_DZ_RX_DESC_UPD_REG 0x00000830 +#define ER_DZ_RX_DESC_UPD_REG_OFST 0x00000830 /* hunta0=pcie_pf_bar2 */ -#define ER_DZ_RX_DESC_UPD_REG_STEP 4096 +#define ER_DZ_RX_DESC_UPD_REG_STEP 8192 #define ER_DZ_RX_DESC_UPD_REG_ROWS 2048 +#define ER_DZ_RX_DESC_UPD_REG_RESET 0x0 + #define ERF_DZ_RX_DESC_WPTR_LBN 0 #define ERF_DZ_RX_DESC_WPTR_WIDTH 12 /* - * TX_DESC_UPD_REG(76bit): - * + * TX_DESC_UPD_REG(96bit): + * */ -#define ER_DZ_TX_DESC_UPD_REG 0x00000a10 +#define ER_DZ_TX_DESC_UPD_REG_OFST 0x00000a10 /* hunta0=pcie_pf_bar2 */ -#define ER_DZ_TX_DESC_UPD_REG_STEP 4096 +#define ER_DZ_TX_DESC_UPD_REG_STEP 8192 #define ER_DZ_TX_DESC_UPD_REG_ROWS 2048 +#define ER_DZ_TX_DESC_UPD_REG_RESET 0x0 + +#define ERF_DZ_RSVD_LBN 76 +#define ERF_DZ_RSVD_WIDTH 20 #define ERF_DZ_TX_DESC_WPTR_LBN 64 #define ERF_DZ_TX_DESC_WPTR_WIDTH 12 #define ERF_DZ_TX_DESC_HWORD_LBN 32 @@ -157,14 +182,38 @@ extern "C" { #define ERF_DZ_TX_DESC_LWORD_LBN 0 #define ERF_DZ_TX_DESC_LWORD_WIDTH 32 +/* + * The workaround for bug 35388 requires multiplexing writes through + * the ERF_DZ_TX_DESC_WPTR address. + * TX_DESC_UPD: 0ppppppppppp (bit 11 lost) + * EVQ_RPTR: 1000hhhhhhhh, 1001llllllll (split into high and low bits) + * EVQ_TMR: 11mmvvvvvvvv (bits 8:13 of value lost) + */ +#define ER_DD_EVQ_INDIRECT_OFST (ER_DZ_TX_DESC_UPD_REG_OFST + 2 * 4) +#define ER_DD_EVQ_INDIRECT_STEP ER_DZ_TX_DESC_UPD_REG_STEP +#define ERF_DD_EVQ_IND_RPTR_FLAGS_LBN 8 +#define ERF_DD_EVQ_IND_RPTR_FLAGS_WIDTH 4 +#define EFE_DD_EVQ_IND_RPTR_FLAGS_HIGH 8 +#define EFE_DD_EVQ_IND_RPTR_FLAGS_LOW 9 +#define ERF_DD_EVQ_IND_RPTR_LBN 0 +#define ERF_DD_EVQ_IND_RPTR_WIDTH 8 +#define ERF_DD_EVQ_IND_TIMER_FLAGS_LBN 10 +#define ERF_DD_EVQ_IND_TIMER_FLAGS_WIDTH 2 +#define EFE_DD_EVQ_IND_TIMER_FLAGS 3 +#define ERF_DD_EVQ_IND_TIMER_MODE_LBN 8 +#define ERF_DD_EVQ_IND_TIMER_MODE_WIDTH 2 +#define ERF_DD_EVQ_IND_TIMER_VAL_LBN 0 +#define ERF_DD_EVQ_IND_TIMER_VAL_WIDTH 8 + /* ES_DRIVER_EV */ #define ESF_DZ_DRV_CODE_LBN 60 #define ESF_DZ_DRV_CODE_WIDTH 4 #define ESF_DZ_DRV_SUB_CODE_LBN 56 #define ESF_DZ_DRV_SUB_CODE_WIDTH 4 -#define ESE_DZ_DRV_TIMER_EV 10 -#define ESE_DZ_DRV_WAKE_UP_EV 6 +#define ESE_DZ_DRV_TIMER_EV 3 +#define ESE_DZ_DRV_START_UP_EV 2 +#define ESE_DZ_DRV_WAKE_UP_EV 1 #define ESF_DZ_DRV_SUB_DATA_DW0_LBN 0 #define ESF_DZ_DRV_SUB_DATA_DW0_WIDTH 32 #define ESF_DZ_DRV_SUB_DATA_DW1_LBN 32 @@ -194,9 +243,9 @@ extern "C" { /* ES_FF_UMSG_CPU2DL_DESC_FETCH */ -#define ESF_DZ_C2DDF_DSCR_CACHE_RPTR_LBN 112 +#define ESF_DZ_C2DDF_DSCR_CACHE_RPTR_LBN 208 #define ESF_DZ_C2DDF_DSCR_CACHE_RPTR_WIDTH 6 -#define ESF_DZ_C2DDF_QID_LBN 96 +#define ESF_DZ_C2DDF_QID_LBN 160 #define ESF_DZ_C2DDF_QID_WIDTH 11 #define ESF_DZ_C2DDF_DSCR_BASE_PAGE_ID_LBN 64 #define ESF_DZ_C2DDF_DSCR_BASE_PAGE_ID_WIDTH 18 @@ -217,16 +266,16 @@ extern "C" { /* ES_FF_UMSG_CPU2DL_DESC_PUSH */ +#define ESF_DZ_C2DDP_DSCR_HW_RPTR_LBN 224 +#define ESF_DZ_C2DDP_DSCR_HW_RPTR_WIDTH 12 #define ESF_DZ_C2DDP_DESC_DW0_LBN 128 #define ESF_DZ_C2DDP_DESC_DW0_WIDTH 32 #define ESF_DZ_C2DDP_DESC_DW1_LBN 160 #define ESF_DZ_C2DDP_DESC_DW1_WIDTH 32 #define ESF_DZ_C2DDP_DESC_LBN 128 #define ESF_DZ_C2DDP_DESC_WIDTH 64 -#define ESF_DZ_C2DDP_QID_LBN 96 +#define ESF_DZ_C2DDP_QID_LBN 64 #define ESF_DZ_C2DDP_QID_WIDTH 11 -#define ESF_DZ_C2DDP_DSCR_HW_RPTR_LBN 48 -#define ESF_DZ_C2DDP_DSCR_HW_RPTR_WIDTH 12 #define ESF_DZ_C2DDP_DSCR_HW_WPTR_LBN 32 #define ESF_DZ_C2DDP_DSCR_HW_WPTR_WIDTH 12 #define ESF_DZ_C2DDP_OID_LBN 16 @@ -258,8 +307,18 @@ extern "C" { /* ES_FF_UMSG_CPU2EV_TXCMPLT */ -#define ESF_DZ_C2ET_EV_SOFT0_LBN 32 -#define ESF_DZ_C2ET_EV_SOFT0_WIDTH 16 +#define ESF_DZ_C2ET_EV_SOFT2_LBN 48 +#define ESF_DZ_C2ET_EV_SOFT2_WIDTH 16 +#define ESF_DZ_C2ET_EV_CODE_LBN 42 +#define ESF_DZ_C2ET_EV_CODE_WIDTH 4 +#define ESF_DZ_C2ET_EV_OVERRIDE_HOLDOFF_LBN 41 +#define ESF_DZ_C2ET_EV_OVERRIDE_HOLDOFF_WIDTH 1 +#define ESF_DZ_C2ET_EV_DROP_EVENT_LBN 40 +#define ESF_DZ_C2ET_EV_DROP_EVENT_WIDTH 1 +#define ESF_DZ_C2ET_EV_CAN_MERGE_LBN 39 +#define ESF_DZ_C2ET_EV_CAN_MERGE_WIDTH 1 +#define ESF_DZ_C2ET_EV_SOFT1_LBN 32 +#define ESF_DZ_C2ET_EV_SOFT1_WIDTH 7 #define ESF_DZ_C2ET_DSCR_IDX_LBN 16 #define ESF_DZ_C2ET_DSCR_IDX_WIDTH 16 #define ESF_DZ_C2ET_EV_QID_LBN 5 @@ -310,7 +369,6 @@ extern "C" { #define ESF_DZ_C2RIP_EV_ARG1_WIDTH 16 #define ESF_DZ_C2RIP_UPD_CRC_MODE_LBN 157 #define ESF_DZ_C2RIP_UPD_CRC_MODE_WIDTH 3 -#define ESE_DZ_C2RIP_FCOIP_MPA 5 #define ESE_DZ_C2RIP_FCOIP_FCOE 4 #define ESE_DZ_C2RIP_ISCSI_HDR_AND_PYLD 3 #define ESE_DZ_C2RIP_ISCSI_HDR 2 @@ -379,7 +437,7 @@ extern "C" { #define ESF_DZ_C2SD_ENCODED_HOST_ADDR_DW1_WIDTH 16 #define ESF_DZ_C2SD_ENCODED_HOST_ADDR_LBN 64 #define ESF_DZ_C2SD_ENCODED_HOST_ADDR_WIDTH 48 -#define ESF_DZ_C2SD_OFFSET_LBN 48 +#define ESF_DZ_C2SD_OFFSET_LBN 80 #define ESF_DZ_C2SD_OFFSET_WIDTH 8 #define ESF_DZ_C2SD_QID_LBN 32 #define ESF_DZ_C2SD_QID_WIDTH 11 @@ -419,7 +477,6 @@ extern "C" { #define ESF_DZ_C2TDB_DESC_IDX_WIDTH 16 #define ESF_DZ_C2TDB_UPD_CRC_MODE_LBN 93 #define ESF_DZ_C2TDB_UPD_CRC_MODE_WIDTH 3 -#define ESE_DZ_C2RIP_FCOIP_MPA 5 #define ESE_DZ_C2RIP_FCOIP_FCOE 4 #define ESE_DZ_C2RIP_ISCSI_HDR_AND_PYLD 3 #define ESE_DZ_C2RIP_ISCSI_HDR 2 @@ -460,6 +517,14 @@ extern "C" { /* ES_FF_UMSG_CPU2TXDP_EGR */ +#define ESF_DZ_C2TE_RMON_SOFT_LBN 240 +#define ESF_DZ_C2TE_RMON_SOFT_WIDTH 1 +#define ESF_DZ_C2TE_VLAN_PRIO_LBN 224 +#define ESF_DZ_C2TE_VLAN_PRIO_WIDTH 3 +#define ESF_DZ_C2TE_VLAN_LBN 208 +#define ESF_DZ_C2TE_VLAN_WIDTH 1 +#define ESF_DZ_C2TE_QID_LBN 192 +#define ESF_DZ_C2TE_QID_WIDTH 11 #define ESF_DZ_C2TE_PEDIT_DELTA_LBN 168 #define ESF_DZ_C2TE_PEDIT_DELTA_WIDTH 8 #define ESF_DZ_C2TE_PYLOAD_OFST_LBN 160 @@ -480,20 +545,19 @@ extern "C" { #define ESF_DZ_C2TE_IS_FCOE_WIDTH 1 #define ESF_DZ_C2TE_PARSE_INCOMP_LBN 128 #define ESF_DZ_C2TE_PARSE_INCOMP_WIDTH 1 -#define ESF_DZ_C2TE_PKT_LEN_LBN 112 -#define ESF_DZ_C2TE_PKT_LEN_WIDTH 16 -#define ESF_DZ_C2TE_UPD_TCPUDPCSUM_MODE_LBN 97 -#define ESF_DZ_C2TE_UPD_TCPUDPCSUM_MODE_WIDTH 1 -#define ESF_DZ_C2TE_UPD_IPCSUM_MODE_LBN 96 -#define ESF_DZ_C2TE_UPD_IPCSUM_MODE_WIDTH 1 -#define ESF_DZ_C2TE_UPD_CRC_MODE_LBN 93 +#define ESF_DZ_C2TE_UPD_CRC_MODE_LBN 98 #define ESF_DZ_C2TE_UPD_CRC_MODE_WIDTH 3 -#define ESE_DZ_C2RIP_FCOIP_MPA 5 #define ESE_DZ_C2RIP_FCOIP_FCOE 4 #define ESE_DZ_C2RIP_ISCSI_HDR_AND_PYLD 3 #define ESE_DZ_C2RIP_ISCSI_HDR 2 #define ESE_DZ_C2RIP_FCOE 1 #define ESE_DZ_C2RIP_OFF 0 +#define ESF_DZ_C2TE_UPD_TCPUDPCSUM_MODE_LBN 97 +#define ESF_DZ_C2TE_UPD_TCPUDPCSUM_MODE_WIDTH 1 +#define ESF_DZ_C2TE_UPD_IPCSUM_MODE_LBN 96 +#define ESF_DZ_C2TE_UPD_IPCSUM_MODE_WIDTH 1 +#define ESF_DZ_C2TE_PKT_LEN_LBN 64 +#define ESF_DZ_C2TE_PKT_LEN_WIDTH 16 #define ESF_DZ_C2TE_FINFO_WRD3_LBN 48 #define ESF_DZ_C2TE_FINFO_WRD3_WIDTH 16 #define ESF_DZ_C2TE_FINFO_WRD2_LBN 32 @@ -542,7 +606,7 @@ extern "C" { /* ES_FF_UMSG_PACER_BKT_TBL_RD_REQ */ #define ESF_DZ_BKT_ID_LBN 0 -#define ESF_DZ_BKT_ID_WIDTH 9 +#define ESF_DZ_BKT_ID_WIDTH 10 /* ES_FF_UMSG_PACER_BKT_TBL_RD_RSP */ @@ -563,7 +627,7 @@ extern "C" { #define ESF_DZ_MAX_FILL_REG_LBN 12 #define ESF_DZ_MAX_FILL_REG_WIDTH 2 #define ESF_DZ_BKT_ID_LBN 0 -#define ESF_DZ_BKT_ID_WIDTH 9 +#define ESF_DZ_BKT_ID_WIDTH 10 /* ES_FF_UMSG_PACER_BKT_TBL_WR_REQ */ @@ -580,7 +644,7 @@ extern "C" { #define ESF_DZ_MAX_FILL_REG_LBN 12 #define ESF_DZ_MAX_FILL_REG_WIDTH 2 #define ESF_DZ_BKT_ID_LBN 0 -#define ESF_DZ_BKT_ID_WIDTH 9 +#define ESF_DZ_BKT_ID_WIDTH 10 /* ES_FF_UMSG_PACER_TXQ_TBL_RD_REQ */ @@ -590,13 +654,13 @@ extern "C" { /* ES_FF_UMSG_PACER_TXQ_TBL_RD_RSP */ #define ESF_DZ_MAX_BKT2_LBN 112 -#define ESF_DZ_MAX_BKT2_WIDTH 9 +#define ESF_DZ_MAX_BKT2_WIDTH 10 #define ESF_DZ_MAX_BKT1_LBN 96 -#define ESF_DZ_MAX_BKT1_WIDTH 9 +#define ESF_DZ_MAX_BKT1_WIDTH 10 #define ESF_DZ_MAX_BKT0_LBN 80 -#define ESF_DZ_MAX_BKT0_WIDTH 9 +#define ESF_DZ_MAX_BKT0_WIDTH 10 #define ESF_DZ_MIN_BKT_LBN 64 -#define ESF_DZ_MIN_BKT_WIDTH 9 +#define ESF_DZ_MIN_BKT_WIDTH 10 #define ESF_DZ_LABEL_LBN 48 #define ESF_DZ_LABEL_WIDTH 4 #define ESF_DZ_PQ_FLAGS_LBN 32 @@ -609,13 +673,13 @@ extern "C" { /* ES_FF_UMSG_PACER_TXQ_TBL_WR_REQ */ #define ESF_DZ_MAX_BKT2_LBN 112 -#define ESF_DZ_MAX_BKT2_WIDTH 9 +#define ESF_DZ_MAX_BKT2_WIDTH 10 #define ESF_DZ_MAX_BKT1_LBN 96 -#define ESF_DZ_MAX_BKT1_WIDTH 9 +#define ESF_DZ_MAX_BKT1_WIDTH 10 #define ESF_DZ_MAX_BKT0_LBN 80 -#define ESF_DZ_MAX_BKT0_WIDTH 9 +#define ESF_DZ_MAX_BKT0_WIDTH 10 #define ESF_DZ_MIN_BKT_LBN 64 -#define ESF_DZ_MIN_BKT_WIDTH 9 +#define ESF_DZ_MIN_BKT_WIDTH 10 #define ESF_DZ_LABEL_LBN 48 #define ESF_DZ_LABEL_WIDTH 4 #define ESF_DZ_PQ_FLAGS_LBN 32 @@ -663,17 +727,19 @@ extern "C" { /* ES_FF_UMSG_RXDP_INGR2CPU */ +#define ESF_DZ_RI2C_QUEUE_ID_LBN 224 +#define ESF_DZ_RI2C_QUEUE_ID_WIDTH 11 #define ESF_DZ_RI2C_LEN_LBN 208 #define ESF_DZ_RI2C_LEN_WIDTH 16 -#define ESF_DZ_RI2C_L4_CLASS_LBN 202 +#define ESF_DZ_RI2C_L4_CLASS_LBN 205 #define ESF_DZ_RI2C_L4_CLASS_WIDTH 3 -#define ESF_DZ_RI2C_L3_CLASS_LBN 199 +#define ESF_DZ_RI2C_L3_CLASS_LBN 202 #define ESF_DZ_RI2C_L3_CLASS_WIDTH 3 -#define ESF_DZ_RI2C_ETHTAG_CLASS_LBN 196 +#define ESF_DZ_RI2C_ETHTAG_CLASS_LBN 199 #define ESF_DZ_RI2C_ETHTAG_CLASS_WIDTH 3 -#define ESF_DZ_RI2C_ETHBASE_CLASS_LBN 193 +#define ESF_DZ_RI2C_ETHBASE_CLASS_LBN 196 #define ESF_DZ_RI2C_ETHBASE_CLASS_WIDTH 3 -#define ESF_DZ_RI2C_MAC_CLASS_LBN 192 +#define ESF_DZ_RI2C_MAC_CLASS_LBN 195 #define ESF_DZ_RI2C_MAC_CLASS_WIDTH 1 #define ESF_DZ_RI2C_PKT_OFST_LBN 176 #define ESF_DZ_RI2C_PKT_OFST_WIDTH 16 @@ -765,12 +831,12 @@ extern "C" { #define ESF_DZ_TD2CP_ETHBASE_CLASS_WIDTH 3 #define ESF_DZ_TD2CP_MAC_CLASS_LBN 240 #define ESF_DZ_TD2CP_MAC_CLASS_WIDTH 1 -#define ESF_DZ_TD2CP_SOFT_LBN 226 -#define ESF_DZ_TD2CP_SOFT_WIDTH 14 -#define ESF_DZ_TD2CP_PKT_ABORT_LBN 225 +#define ESF_DZ_TD2CP_PCIE_ERR_OR_ABORT_LBN 239 +#define ESF_DZ_TD2CP_PCIE_ERR_OR_ABORT_WIDTH 1 +#define ESF_DZ_TD2CP_PKT_ABORT_LBN 238 #define ESF_DZ_TD2CP_PKT_ABORT_WIDTH 1 -#define ESF_DZ_TD2CP_PCIE_ERR_LBN 224 -#define ESF_DZ_TD2CP_PCIE_ERR_WIDTH 1 +#define ESF_DZ_TD2CP_SOFT_LBN 224 +#define ESF_DZ_TD2CP_SOFT_WIDTH 14 #define ESF_DZ_TD2CP_DESC_IDX_LBN 208 #define ESF_DZ_TD2CP_DESC_IDX_WIDTH 16 #define ESF_DZ_TD2CP_PKT_LEN_LBN 192 @@ -854,7 +920,7 @@ extern "C" { /* ES_LUE_DB_MATCH_ENTRY */ #define ESF_DZ_LUE_DSCRMNTR_LBN 140 -#define ESF_DZ_LUE_DSCRMNTR_WIDTH 4 +#define ESF_DZ_LUE_DSCRMNTR_WIDTH 6 #define ESF_DZ_LUE_MATCH_VAL_DW0_LBN 44 #define ESF_DZ_LUE_MATCH_VAL_DW0_WIDTH 32 #define ESF_DZ_LUE_MATCH_VAL_DW1_LBN 76 @@ -875,13 +941,11 @@ extern "C" { #define ESE_DZ_LUE_SINGLE 0 #define ESF_DZ_LUE_RCPNTR_LBN 0 #define ESF_DZ_LUE_RCPNTR_WIDTH 24 -#define ESF_DZ_LUE_RCPNTR_ME_PTR_LBN 0 -#define ESF_DZ_LUE_RCPNTR_ME_PTR_WIDTH 14 /* ES_LUE_DB_NONMATCH_ENTRY */ #define ESF_DZ_LUE_DSCRMNTR_LBN 140 -#define ESF_DZ_LUE_DSCRMNTR_WIDTH 4 +#define ESF_DZ_LUE_DSCRMNTR_WIDTH 6 #define ESF_DZ_LUE_TERMINAL_LBN 139 #define ESF_DZ_LUE_TERMINAL_WIDTH 1 #define ESF_DZ_LUE_LAST_LBN 138 @@ -914,9 +978,9 @@ extern "C" { #define ESF_DZ_MC2L_DR_PAD_DW3_LBN 118 #define ESF_DZ_MC2L_DR_PAD_DW3_WIDTH 32 #define ESF_DZ_MC2L_DR_PAD_DW4_LBN 150 -#define ESF_DZ_MC2L_DR_PAD_DW4_WIDTH 16 +#define ESF_DZ_MC2L_DR_PAD_DW4_WIDTH 18 #define ESF_DZ_MC2L_DR_PAD_LBN 22 -#define ESF_DZ_MC2L_DR_PAD_WIDTH 144 +#define ESF_DZ_MC2L_DR_PAD_WIDTH 146 #define ESF_DZ_MC2L_DR_ADDR_LBN 8 #define ESF_DZ_MC2L_DR_ADDR_WIDTH 14 #define ESF_DZ_MC2L_DR_THREAD_ID_LBN 5 @@ -933,7 +997,7 @@ extern "C" { /* ES_LUE_MC_DIRECT_RESPONSE_MSG */ #define ESF_DZ_L2MC_DR_PAD_LBN 146 -#define ESF_DZ_L2MC_DR_PAD_WIDTH 6 +#define ESF_DZ_L2MC_DR_PAD_WIDTH 8 #define ESF_DZ_L2MC_DR_RCPNT_PTR_LBN 132 #define ESF_DZ_L2MC_DR_RCPNT_PTR_WIDTH 14 #define ESF_DZ_L2MC_DR_RCPNT4_LBN 108 @@ -972,9 +1036,9 @@ extern "C" { #define ESF_DZ_MC2L_GPR_PAD_DW3_LBN 118 #define ESF_DZ_MC2L_GPR_PAD_DW3_WIDTH 32 #define ESF_DZ_MC2L_GPR_PAD_DW4_LBN 150 -#define ESF_DZ_MC2L_GPR_PAD_DW4_WIDTH 16 +#define ESF_DZ_MC2L_GPR_PAD_DW4_WIDTH 18 #define ESF_DZ_MC2L_GPR_PAD_LBN 22 -#define ESF_DZ_MC2L_GPR_PAD_WIDTH 144 +#define ESF_DZ_MC2L_GPR_PAD_WIDTH 146 #define ESF_DZ_MC2L_GPR_ADDR_LBN 8 #define ESF_DZ_MC2L_GPR_ADDR_WIDTH 14 #define ESF_DZ_MC2L_GPR_THREAD_ID_LBN 5 @@ -999,9 +1063,9 @@ extern "C" { #define ESF_DZ_L2MC_GPR_DATA_DW3_LBN 104 #define ESF_DZ_L2MC_GPR_DATA_DW3_WIDTH 32 #define ESF_DZ_L2MC_GPR_DATA_DW4_LBN 136 -#define ESF_DZ_L2MC_GPR_DATA_DW4_WIDTH 16 +#define ESF_DZ_L2MC_GPR_DATA_DW4_WIDTH 18 #define ESF_DZ_L2MC_GPR_DATA_LBN 8 -#define ESF_DZ_L2MC_GPR_DATA_WIDTH 144 +#define ESF_DZ_L2MC_GPR_DATA_WIDTH 146 #define ESF_DZ_L2MC_GPR_THREAD_ID_LBN 5 #define ESF_DZ_L2MC_GPR_THREAD_ID_WIDTH 3 #define ESF_DZ_L2MC_GPR_CLIENT_ID_LBN 2 @@ -1024,9 +1088,9 @@ extern "C" { #define ESF_DZ_MC2L_GPW_DATA_DW3_LBN 118 #define ESF_DZ_MC2L_GPW_DATA_DW3_WIDTH 32 #define ESF_DZ_MC2L_GPW_DATA_DW4_LBN 150 -#define ESF_DZ_MC2L_GPW_DATA_DW4_WIDTH 16 +#define ESF_DZ_MC2L_GPW_DATA_DW4_WIDTH 18 #define ESF_DZ_MC2L_GPW_DATA_LBN 22 -#define ESF_DZ_MC2L_GPW_DATA_WIDTH 144 +#define ESF_DZ_MC2L_GPW_DATA_WIDTH 146 #define ESF_DZ_MC2L_GPW_ADDR_LBN 8 #define ESF_DZ_MC2L_GPW_ADDR_WIDTH 14 #define ESF_DZ_MC2L_GPW_THREAD_ID_LBN 5 @@ -1042,22 +1106,22 @@ extern "C" { /* ES_LUE_MC_MATCH_REQUEST_MSG */ -#define ESF_DZ_MC2L_MR_PAD_LBN 135 +#define ESF_DZ_MC2L_MR_PAD_LBN 137 #define ESF_DZ_MC2L_MR_PAD_WIDTH 31 -#define ESF_DZ_MC2L_MR_HASH2_LBN 122 +#define ESF_DZ_MC2L_MR_HASH2_LBN 124 #define ESF_DZ_MC2L_MR_HASH2_WIDTH 13 -#define ESF_DZ_MC2L_MR_HASH1_LBN 108 +#define ESF_DZ_MC2L_MR_HASH1_LBN 110 #define ESF_DZ_MC2L_MR_HASH1_WIDTH 14 -#define ESF_DZ_MC2L_MR_MATCH_BITS_DW0_LBN 12 +#define ESF_DZ_MC2L_MR_MATCH_BITS_DW0_LBN 14 #define ESF_DZ_MC2L_MR_MATCH_BITS_DW0_WIDTH 32 -#define ESF_DZ_MC2L_MR_MATCH_BITS_DW1_LBN 44 +#define ESF_DZ_MC2L_MR_MATCH_BITS_DW1_LBN 46 #define ESF_DZ_MC2L_MR_MATCH_BITS_DW1_WIDTH 32 -#define ESF_DZ_MC2L_MR_MATCH_BITS_DW2_LBN 76 +#define ESF_DZ_MC2L_MR_MATCH_BITS_DW2_LBN 78 #define ESF_DZ_MC2L_MR_MATCH_BITS_DW2_WIDTH 32 -#define ESF_DZ_MC2L_MR_MATCH_BITS_LBN 12 +#define ESF_DZ_MC2L_MR_MATCH_BITS_LBN 14 #define ESF_DZ_MC2L_MR_MATCH_BITS_WIDTH 96 #define ESF_DZ_MC2L_MR_DSCRMNTR_LBN 8 -#define ESF_DZ_MC2L_MR_DSCRMNTR_WIDTH 4 +#define ESF_DZ_MC2L_MR_DSCRMNTR_WIDTH 6 #define ESF_DZ_MC2L_MR_THREAD_ID_LBN 5 #define ESF_DZ_MC2L_MR_THREAD_ID_WIDTH 3 #define ESF_DZ_MC2L_MR_CLIENT_ID_LBN 2 @@ -1078,9 +1142,9 @@ extern "C" { #define ESF_DZ_L2MC_MR_PAD_DW2_LBN 117 #define ESF_DZ_L2MC_MR_PAD_DW2_WIDTH 32 #define ESF_DZ_L2MC_MR_PAD_DW3_LBN 149 -#define ESF_DZ_L2MC_MR_PAD_DW3_WIDTH 3 +#define ESF_DZ_L2MC_MR_PAD_DW3_WIDTH 5 #define ESF_DZ_L2MC_MR_PAD_LBN 53 -#define ESF_DZ_L2MC_MR_PAD_WIDTH 99 +#define ESF_DZ_L2MC_MR_PAD_WIDTH 101 #define ESF_DZ_L2MC_MR_LUE_RCPNT_LBN 29 #define ESF_DZ_L2MC_MR_LUE_RCPNT_WIDTH 24 #define ESF_DZ_L2MC_MR_RX_MCAST_LBN 28 @@ -1115,9 +1179,9 @@ extern "C" { #define ESF_DZ_LUE_HW_REQ_BASE_REQ_MSG_DATA_DW3_LBN 104 #define ESF_DZ_LUE_HW_REQ_BASE_REQ_MSG_DATA_DW3_WIDTH 32 #define ESF_DZ_LUE_HW_REQ_BASE_REQ_MSG_DATA_DW4_LBN 136 -#define ESF_DZ_LUE_HW_REQ_BASE_REQ_MSG_DATA_DW4_WIDTH 30 +#define ESF_DZ_LUE_HW_REQ_BASE_REQ_MSG_DATA_DW4_WIDTH 32 #define ESF_DZ_LUE_HW_REQ_BASE_REQ_MSG_DATA_LBN 8 -#define ESF_DZ_LUE_HW_REQ_BASE_REQ_MSG_DATA_WIDTH 158 +#define ESF_DZ_LUE_HW_REQ_BASE_REQ_MSG_DATA_WIDTH 160 #define ESF_DZ_LUE_HW_REQ_BASE_THREAD_ID_LBN 5 #define ESF_DZ_LUE_HW_REQ_BASE_THREAD_ID_WIDTH 3 #define ESF_DZ_LUE_HW_REQ_BASE_CLIENT_ID_LBN 2 @@ -1144,9 +1208,9 @@ extern "C" { #define ESF_DZ_LUE_HW_RSP_BASE_RSP_DATA_DW3_LBN 104 #define ESF_DZ_LUE_HW_RSP_BASE_RSP_DATA_DW3_WIDTH 32 #define ESF_DZ_LUE_HW_RSP_BASE_RSP_DATA_DW4_LBN 136 -#define ESF_DZ_LUE_HW_RSP_BASE_RSP_DATA_DW4_WIDTH 16 +#define ESF_DZ_LUE_HW_RSP_BASE_RSP_DATA_DW4_WIDTH 18 #define ESF_DZ_LUE_HW_RSP_BASE_RSP_DATA_LBN 8 -#define ESF_DZ_LUE_HW_RSP_BASE_RSP_DATA_WIDTH 144 +#define ESF_DZ_LUE_HW_RSP_BASE_RSP_DATA_WIDTH 146 #define ESF_DZ_LUE_HW_RSP_BASE_THREAD_ID_LBN 5 #define ESF_DZ_LUE_HW_RSP_BASE_THREAD_ID_WIDTH 3 #define ESF_DZ_LUE_HW_RSP_BASE_CLIENT_ID_LBN 2 @@ -1244,9 +1308,9 @@ extern "C" { #define ESF_DZ_LUE_HW_RSP_GPRD_LUE_DATA_DW3_LBN 104 #define ESF_DZ_LUE_HW_RSP_GPRD_LUE_DATA_DW3_WIDTH 32 #define ESF_DZ_LUE_HW_RSP_GPRD_LUE_DATA_DW4_LBN 136 -#define ESF_DZ_LUE_HW_RSP_GPRD_LUE_DATA_DW4_WIDTH 16 +#define ESF_DZ_LUE_HW_RSP_GPRD_LUE_DATA_DW4_WIDTH 18 #define ESF_DZ_LUE_HW_RSP_GPRD_LUE_DATA_LBN 8 -#define ESF_DZ_LUE_HW_RSP_GPRD_LUE_DATA_WIDTH 144 +#define ESF_DZ_LUE_HW_RSP_GPRD_LUE_DATA_WIDTH 146 #define ESF_DZ_LUE_HW_RSP_GPRD_THREAD_ID_LBN 5 #define ESF_DZ_LUE_HW_RSP_GPRD_THREAD_ID_WIDTH 3 #define ESF_DZ_LUE_HW_RSP_GPRD_CLIENT_ID_LBN 2 @@ -1273,9 +1337,9 @@ extern "C" { #define ESF_DZ_LUE_HW_REQ_GPWR_LUE_DATA_DW3_LBN 118 #define ESF_DZ_LUE_HW_REQ_GPWR_LUE_DATA_DW3_WIDTH 32 #define ESF_DZ_LUE_HW_REQ_GPWR_LUE_DATA_DW4_LBN 150 -#define ESF_DZ_LUE_HW_REQ_GPWR_LUE_DATA_DW4_WIDTH 16 +#define ESF_DZ_LUE_HW_REQ_GPWR_LUE_DATA_DW4_WIDTH 18 #define ESF_DZ_LUE_HW_REQ_GPWR_LUE_DATA_LBN 22 -#define ESF_DZ_LUE_HW_REQ_GPWR_LUE_DATA_WIDTH 144 +#define ESF_DZ_LUE_HW_REQ_GPWR_LUE_DATA_WIDTH 146 #define ESF_DZ_LUE_HW_REQ_GPWR_ADDR_LBN 8 #define ESF_DZ_LUE_HW_REQ_GPWR_ADDR_WIDTH 14 #define ESF_DZ_LUE_HW_REQ_GPWR_THREAD_ID_LBN 5 @@ -1295,22 +1359,22 @@ extern "C" { /* ES_LUE_MSG_MATCH_REQ */ -#define ESF_DZ_LUE_HW_REQ_MATCH_MATCH_REQ_COUNT_LBN 135 -#define ESF_DZ_LUE_HW_REQ_MATCH_MATCH_REQ_COUNT_WIDTH 6 -#define ESF_DZ_LUE_HW_REQ_MATCH_HASH2_LBN 122 +#define ESF_DZ_LUE_HW_REQ_MATCH_MATCH_REQ_COUNT_LBN 137 +#define ESF_DZ_LUE_HW_REQ_MATCH_MATCH_REQ_COUNT_WIDTH 8 +#define ESF_DZ_LUE_HW_REQ_MATCH_HASH2_LBN 124 #define ESF_DZ_LUE_HW_REQ_MATCH_HASH2_WIDTH 13 -#define ESF_DZ_LUE_HW_REQ_MATCH_HASH1_LBN 108 +#define ESF_DZ_LUE_HW_REQ_MATCH_HASH1_LBN 110 #define ESF_DZ_LUE_HW_REQ_MATCH_HASH1_WIDTH 14 -#define ESF_DZ_LUE_HW_REQ_MATCH_MATCH_BITS_DW0_LBN 12 +#define ESF_DZ_LUE_HW_REQ_MATCH_MATCH_BITS_DW0_LBN 14 #define ESF_DZ_LUE_HW_REQ_MATCH_MATCH_BITS_DW0_WIDTH 32 -#define ESF_DZ_LUE_HW_REQ_MATCH_MATCH_BITS_DW1_LBN 44 +#define ESF_DZ_LUE_HW_REQ_MATCH_MATCH_BITS_DW1_LBN 46 #define ESF_DZ_LUE_HW_REQ_MATCH_MATCH_BITS_DW1_WIDTH 32 -#define ESF_DZ_LUE_HW_REQ_MATCH_MATCH_BITS_DW2_LBN 76 +#define ESF_DZ_LUE_HW_REQ_MATCH_MATCH_BITS_DW2_LBN 78 #define ESF_DZ_LUE_HW_REQ_MATCH_MATCH_BITS_DW2_WIDTH 32 -#define ESF_DZ_LUE_HW_REQ_MATCH_MATCH_BITS_LBN 12 +#define ESF_DZ_LUE_HW_REQ_MATCH_MATCH_BITS_LBN 14 #define ESF_DZ_LUE_HW_REQ_MATCH_MATCH_BITS_WIDTH 96 #define ESF_DZ_LUE_HW_REQ_MATCH_DSCRMNTR_LBN 8 -#define ESF_DZ_LUE_HW_REQ_MATCH_DSCRMNTR_WIDTH 4 +#define ESF_DZ_LUE_HW_REQ_MATCH_DSCRMNTR_WIDTH 6 #define ESF_DZ_LUE_HW_REQ_MATCH_THREAD_ID_LBN 5 #define ESF_DZ_LUE_HW_REQ_MATCH_THREAD_ID_WIDTH 3 #define ESF_DZ_LUE_HW_REQ_MATCH_CLIENT_ID_LBN 2 @@ -1543,10 +1607,10 @@ extern "C" { #define ESF_DZ_RX_OVERRIDE_HOLDOFF_WIDTH 1 #define ESF_DZ_RX_DROP_EVENT_LBN 58 #define ESF_DZ_RX_DROP_EVENT_WIDTH 1 -#define ESF_DZ_RX_EV_RSVD2_LBN 55 -#define ESF_DZ_RX_EV_RSVD2_WIDTH 3 +#define ESF_DZ_RX_EV_RSVD2_LBN 54 +#define ESF_DZ_RX_EV_RSVD2_WIDTH 4 #define ESF_DZ_RX_EV_SOFT2_LBN 52 -#define ESF_DZ_RX_EV_SOFT2_WIDTH 3 +#define ESF_DZ_RX_EV_SOFT2_WIDTH 2 #define ESF_DZ_RX_DSC_PTR_LBITS_LBN 48 #define ESF_DZ_RX_DSC_PTR_LBITS_WIDTH 4 #define ESF_DZ_RX_L4_CLASS_LBN 45 @@ -1590,8 +1654,10 @@ extern "C" { #define ESE_DZ_MAC_CLASS_UCAST 0 #define ESF_DZ_RX_EV_SOFT1_LBN 32 #define ESF_DZ_RX_EV_SOFT1_WIDTH 3 -#define ESF_DZ_RX_EV_RSVD1_LBN 30 -#define ESF_DZ_RX_EV_RSVD1_WIDTH 2 +#define ESF_DZ_RX_EV_RSVD1_LBN 31 +#define ESF_DZ_RX_EV_RSVD1_WIDTH 1 +#define ESF_DZ_RX_ABORT_LBN 30 +#define ESF_DZ_RX_ABORT_WIDTH 1 #define ESF_DZ_RX_ECC_ERR_LBN 29 #define ESF_DZ_RX_ECC_ERR_WIDTH 1 #define ESF_DZ_RX_CRC1_ERR_LBN 28 @@ -1605,7 +1671,7 @@ extern "C" { #define ESF_DZ_RX_ECRC_ERR_LBN 24 #define ESF_DZ_RX_ECRC_ERR_WIDTH 1 #define ESF_DZ_RX_QLABEL_LBN 16 -#define ESF_DZ_RX_QLABEL_WIDTH 8 +#define ESF_DZ_RX_QLABEL_WIDTH 5 #define ESF_DZ_RX_PARSE_INCOMPLETE_LBN 15 #define ESF_DZ_RX_PARSE_INCOMPLETE_WIDTH 1 #define ESF_DZ_RX_CONT_LBN 14 @@ -1687,16 +1753,16 @@ extern "C" { #define ESF_DZ_RX_U_FAST_PATH_WIDTH 1 #define ESF_DZ_RX_U_SOFT1_B1R0_4_LBN 68 #define ESF_DZ_RX_U_SOFT1_B1R0_4_WIDTH 1 -#define ESF_DZ_RX_U_NO_FLUSH_LBN 67 -#define ESF_DZ_RX_U_NO_FLUSH_WIDTH 1 +#define ESF_DZ_RX_U_CHAIN_LBN 67 +#define ESF_DZ_RX_U_CHAIN_WIDTH 1 #define ESF_DZ_RX_U_SOFT1_B1R0_3_LBN 67 #define ESF_DZ_RX_U_SOFT1_B1R0_3_WIDTH 1 #define ESF_DZ_RX_U_DESC_ACTIVE_LBN 66 #define ESF_DZ_RX_U_DESC_ACTIVE_WIDTH 1 #define ESF_DZ_RX_U_SOFT1_B1R0_2_LBN 66 #define ESF_DZ_RX_U_SOFT1_B1R0_2_WIDTH 1 -#define ESF_DZ_RX_U_HDR_SPLIT_LBN 65 -#define ESF_DZ_RX_U_HDR_SPLIT_WIDTH 1 +#define ESF_DZ_RX_U_TIMESTAMP_LBN 65 +#define ESF_DZ_RX_U_TIMESTAMP_WIDTH 1 #define ESF_DZ_RX_U_SOFT1_B1R0_1_LBN 65 #define ESF_DZ_RX_U_SOFT1_B1R0_1_WIDTH 1 #define ESF_DZ_RX_U_Q_ENABLE_LBN 64 @@ -1728,12 +1794,14 @@ extern "C" { #define ESF_DZ_RX_U_DSCR_BASE_PAGE_ID_WIDTH 18 #define ESF_DZ_RX_U_SOFT18_B1R0_0_LBN 64 #define ESF_DZ_RX_U_SOFT18_B1R0_0_WIDTH 18 -#define ESF_DZ_RX_U_QST1_SPARE_LBN 52 -#define ESF_DZ_RX_U_QST1_SPARE_WIDTH 12 +#define ESF_DZ_RX_U_QST1_SPARE_LBN 53 +#define ESF_DZ_RX_U_QST1_SPARE_WIDTH 11 #define ESF_DZ_RX_U_SOFT16_B0R3_0_LBN 48 #define ESF_DZ_RX_U_SOFT16_B0R3_0_WIDTH 16 -#define ESF_DZ_RX_U_TIMESTAMP_LBN 51 -#define ESF_DZ_RX_U_TIMESTAMP_WIDTH 1 +#define ESF_DZ_RX_U_NO_FLUSH_LBN 52 +#define ESF_DZ_RX_U_NO_FLUSH_WIDTH 1 +#define ESF_DZ_RX_U_HDR_SPLIT_LBN 51 +#define ESF_DZ_RX_U_HDR_SPLIT_WIDTH 1 #define ESF_DZ_RX_U_DOORBELL_ENABLED_LBN 50 #define ESF_DZ_RX_U_DOORBELL_ENABLED_WIDTH 1 #define ESF_DZ_RX_U_WORK_PENDING_LBN 49 @@ -1758,6 +1826,39 @@ extern "C" { #define ESF_DZ_RX_U_SOFT3_B0R0_0_WIDTH 3 +/* ES_SGMII_DEV_PTNR_ABILITY_1000BX_MD */ +#define ESF_DZ_SGMII_DPA_NXT_PG_LBN 15 +#define ESF_DZ_SGMII_DPA_NXT_PG_WIDTH 1 +#define ESF_DZ_SGMII_DPA_ACK_LBN 14 +#define ESF_DZ_SGMII_DPA_ACK_WIDTH 1 +#define ESF_DZ_SGMII_DPA_REMOTE_FLT_LBN 12 +#define ESF_DZ_SGMII_DPA_REMOTE_FLT_WIDTH 2 +#define ESE_DZ_SGMII_DPA_RF_AN_ERR 3 +#define ESE_DZ_SGMII_DPA_RF_OFFLINE 2 +#define ESE_DZ_SGMII_DPA_RF_LINK_FAIL 1 +#define ESE_DZ_SGMII_DPA_RF_NONE 0 +#define ESF_DZ_SGMII_DPA_PS_LBN 7 +#define ESF_DZ_SGMII_DPA_PS_WIDTH 2 +#define ESF_DZ_SGMII_DPA_HD_LBN 6 +#define ESF_DZ_SGMII_DPA_HD_WIDTH 1 +#define ESF_DZ_SGMII_DPA_FD_LBN 5 +#define ESF_DZ_SGMII_DPA_FD_WIDTH 1 + + +/* ES_SGMII_DEV_PTNR_ABILITY_SGMII_MD */ +#define ESF_DZ_SGMII_DPA_CPR_LINK_STATE_LBN 15 +#define ESF_DZ_SGMII_DPA_CPR_LINK_STATE_WIDTH 1 +#define ESF_DZ_SGMII_DPA_ACK_LBN 14 +#define ESF_DZ_SGMII_DPA_ACK_WIDTH 1 +#define ESF_DZ_SGMII_CPR_BPLX_STS_LBN 12 +#define ESF_DZ_SGMII_CPR_BPLX_STS_WIDTH 1 +#define ESF_DZ_SGMII_DPA_COPPER_SPEED_LBN 10 +#define ESF_DZ_SGMII_DPA_COPPER_SPEED_WIDTH 2 +#define ESE_DZ_SGMII_DPA_CPR_1GBS 2 +#define ESE_DZ_SGMII_DPA_CPR_100MBS 1 +#define ESE_DZ_SGMII_DPA_CPR_10MBS 0 + + /* ES_SMC_BUFTBL_CNTRL_ENTRY */ #define ESF_DZ_SMC_SW_CNTXT_DW0_LBN 16 #define ESF_DZ_SMC_SW_CNTXT_DW0_WIDTH 32 @@ -2187,6 +2288,30 @@ extern "C" { #define ESE_DZ_SMC_REQ_BUFTBL_LOOKUP 0 +/* ES_TX_CSUM_TSTAMP_DESC */ +#define ESF_DZ_TX_DESC_IS_OPT_LBN 63 +#define ESF_DZ_TX_DESC_IS_OPT_WIDTH 1 +#define ESF_DZ_TX_OPTION_TYPE_LBN 60 +#define ESF_DZ_TX_OPTION_TYPE_WIDTH 3 +#define ESE_DZ_TX_OPTION_DESC_TSO 7 +#define ESE_DZ_TX_OPTION_DESC_VLAN 6 +#define ESE_DZ_TX_OPTION_DESC_CRC_CSUM 0 +#define ESF_DZ_TX_TIMESTAMP_LBN 5 +#define ESF_DZ_TX_TIMESTAMP_WIDTH 1 +#define ESF_DZ_TX_OPTION_CRC_MODE_LBN 2 +#define ESF_DZ_TX_OPTION_CRC_MODE_WIDTH 3 +#define ESE_DZ_TX_OPTION_CRC_FCOIP_MPA 5 +#define ESE_DZ_TX_OPTION_CRC_FCOIP_FCOE 4 +#define ESE_DZ_TX_OPTION_CRC_ISCSI_HDR_AND_PYLD 3 +#define ESE_DZ_TX_OPTION_CRC_ISCSI_HDR 2 +#define ESE_DZ_TX_OPTION_CRC_FCOE 1 +#define ESE_DZ_TX_OPTION_CRC_OFF 0 +#define ESF_DZ_TX_OPTION_UDP_TCP_CSUM_LBN 1 +#define ESF_DZ_TX_OPTION_UDP_TCP_CSUM_WIDTH 1 +#define ESF_DZ_TX_OPTION_IP_CSUM_LBN 0 +#define ESF_DZ_TX_OPTION_IP_CSUM_WIDTH 1 + + /* ES_TX_EVENT */ #define ESF_DZ_TX_CODE_LBN 60 #define ESF_DZ_TX_CODE_WIDTH 4 @@ -2198,10 +2323,12 @@ extern "C" { #define ESF_DZ_TX_EV_RSVD_WIDTH 10 #define ESF_DZ_TX_SOFT2_LBN 32 #define ESF_DZ_TX_SOFT2_WIDTH 16 +#define ESF_DZ_TX_CAN_MERGE_LBN 31 +#define ESF_DZ_TX_CAN_MERGE_WIDTH 1 #define ESF_DZ_TX_SOFT1_LBN 24 -#define ESF_DZ_TX_SOFT1_WIDTH 8 +#define ESF_DZ_TX_SOFT1_WIDTH 7 #define ESF_DZ_TX_QLABEL_LBN 16 -#define ESF_DZ_TX_QLABEL_WIDTH 8 +#define ESF_DZ_TX_QLABEL_WIDTH 5 #define ESF_DZ_TX_DESCR_INDX_LBN 0 #define ESF_DZ_TX_DESCR_INDX_WIDTH 16 @@ -2221,305 +2348,33 @@ extern "C" { #define ESF_DZ_TX_KER_BUF_ADDR_WIDTH 48 -/* ES_TX_OPTION_DESC */ +/* ES_TX_PIO_DESC */ +#define ESF_DZ_TX_PIO_TYPE_LBN 63 +#define ESF_DZ_TX_PIO_TYPE_WIDTH 1 +#define ESF_DZ_TX_PIO_OPT_LBN 60 +#define ESF_DZ_TX_PIO_OPT_WIDTH 3 +#define ESF_DZ_TX_PIO_CONT_LBN 59 +#define ESF_DZ_TX_PIO_CONT_WIDTH 1 +#define ESF_DZ_TX_PIO_BYTE_CNT_LBN 32 +#define ESF_DZ_TX_PIO_BYTE_CNT_WIDTH 12 +#define ESF_DZ_TX_PIO_BUF_ADDR_LBN 0 +#define ESF_DZ_TX_PIO_BUF_ADDR_WIDTH 12 + + +/* ES_TX_TSO_DESC */ #define ESF_DZ_TX_DESC_IS_OPT_LBN 63 #define ESF_DZ_TX_DESC_IS_OPT_WIDTH 1 #define ESF_DZ_TX_OPTION_TYPE_LBN 60 #define ESF_DZ_TX_OPTION_TYPE_WIDTH 3 -#define ESE_DZ_TX_OPTION_DESC_TSO 4 +#define ESE_DZ_TX_OPTION_DESC_TSO 7 +#define ESE_DZ_TX_OPTION_DESC_VLAN 6 #define ESE_DZ_TX_OPTION_DESC_CRC_CSUM 0 #define ESF_DZ_TX_TSO_TCP_FLAGS_LBN 48 #define ESF_DZ_TX_TSO_TCP_FLAGS_WIDTH 8 -#define ESF_DZ_TX_TSO_TCP_MSS_LBN 32 -#define ESF_DZ_TX_TSO_TCP_MSS_WIDTH 16 +#define ESF_DZ_TX_TSO_IP_ID_LBN 32 +#define ESF_DZ_TX_TSO_IP_ID_WIDTH 16 #define ESF_DZ_TX_TSO_TCP_SEQNO_LBN 0 #define ESF_DZ_TX_TSO_TCP_SEQNO_WIDTH 32 -#define ESF_DZ_TX_OPTION_CRC_MODE_LBN 2 -#define ESF_DZ_TX_OPTION_CRC_MODE_WIDTH 3 -#define ESE_DZ_TX_OPTION_CRC_FCOIP_MPA 5 -#define ESE_DZ_TX_OPTION_CRC_FCOIP_FCOE 4 -#define ESE_DZ_TX_OPTION_CRC_ISCSI_HDR_AND_PYLD 3 -#define ESE_DZ_TX_OPTION_CRC_ISCSI_HDR 2 -#define ESE_DZ_TX_OPTION_CRC_FCOE 1 -#define ESE_DZ_TX_OPTION_CRC_OFF 0 -#define ESF_DZ_TX_OPTION_UDP_TCP_CSUM_LBN 1 -#define ESF_DZ_TX_OPTION_UDP_TCP_CSUM_WIDTH 1 -#define ESF_DZ_TX_OPTION_IP_CSUM_LBN 0 -#define ESF_DZ_TX_OPTION_IP_CSUM_WIDTH 1 - - -/* ES_TX_PACER_BASE_MSG */ -#define ESF_DZ_TXP_BASE_REQ_MSG_DATA_DW0_LBN 11 -#define ESF_DZ_TXP_BASE_REQ_MSG_DATA_DW0_WIDTH 32 -#define ESF_DZ_TXP_BASE_REQ_MSG_DATA_DW1_LBN 43 -#define ESF_DZ_TXP_BASE_REQ_MSG_DATA_DW1_WIDTH 32 -#define ESF_DZ_TXP_BASE_REQ_MSG_DATA_DW2_LBN 75 -#define ESF_DZ_TXP_BASE_REQ_MSG_DATA_DW2_WIDTH 23 -#define ESF_DZ_TXP_BASE_REQ_MSG_DATA_LBN 11 -#define ESF_DZ_TXP_BASE_REQ_MSG_DATA_WIDTH 87 -#define ESF_DZ_TXP_BASE_OP_LBN 2 -#define ESF_DZ_TXP_BASE_OP_WIDTH 3 -#define ESE_DZ_DPCPU_PACER_BKT_TBL_RD 7 -#define ESE_DZ_DPCPU_PACER_BKT_TBL_WR 6 -#define ESE_DZ_DPCPU_PACER_TXQ_TBL_RD 5 -#define ESE_DZ_DPCPU_PACER_TXQ_TBL_WR 4 -#define ESE_DZ_DPCPU_PACER_TXQ_D_R_NI 3 -#define ESE_DZ_DPCPU_PACER_TXQ_D_R_I 2 -#define ESE_DZ_DPCPU_PACER_BKT_D_R_RD 1 -#define ESE_DZ_DPCPU_PACER_BKT_D_RD 0 -#define ESF_DZ_TXP_BASE_CLIENT_ID_LBN 0 -#define ESF_DZ_TXP_BASE_CLIENT_ID_WIDTH 2 -#define ESE_DZ_DPCPU_PACER_CPU_CLIENT 2 -#define ESE_DZ_DPCPU_PACER_CMD_CTL_CLIENT 1 -#define ESE_DZ_DPCPU_PACER_ALRT_CTL_CLIENT 0 - - -/* ES_TX_PACER_BKT_D_R_REQ */ -#define ESF_DZ_TXP_BKT_D_R_REQ_FRM_LEN_LBN 45 -#define ESF_DZ_TXP_BKT_D_R_REQ_FRM_LEN_WIDTH 14 -#define ESF_DZ_TXP_BKT_D_R_REQ_MAX_BKT2_LBN 35 -#define ESF_DZ_TXP_BKT_D_R_REQ_MAX_BKT2_WIDTH 10 -#define ESF_DZ_TXP_BKT_D_R_REQ_MAX_BKT1_LBN 25 -#define ESF_DZ_TXP_BKT_D_R_REQ_MAX_BKT1_WIDTH 10 -#define ESF_DZ_TXP_BKT_D_R_REQ_MAX_BKT0_LBN 15 -#define ESF_DZ_TXP_BKT_D_R_REQ_MAX_BKT0_WIDTH 10 -#define ESF_DZ_TXP_BKT_D_R_REQ_MIN_BKT_LBN 5 -#define ESF_DZ_TXP_BKT_D_R_REQ_MIN_BKT_WIDTH 10 -#define ESF_DZ_TXP_BKT_D_R_REQ_OP_LBN 2 -#define ESF_DZ_TXP_BKT_D_R_REQ_OP_WIDTH 3 -#define ESE_DZ_DPCPU_PACER_BKT_TBL_RD 7 -#define ESE_DZ_DPCPU_PACER_BKT_TBL_WR 6 -#define ESE_DZ_DPCPU_PACER_TXQ_TBL_RD 5 -#define ESE_DZ_DPCPU_PACER_TXQ_TBL_WR 4 -#define ESE_DZ_DPCPU_PACER_TXQ_D_R_NI 3 -#define ESE_DZ_DPCPU_PACER_TXQ_D_R_I 2 -#define ESE_DZ_DPCPU_PACER_BKT_D_R_RD 1 -#define ESE_DZ_DPCPU_PACER_BKT_D_RD 0 -#define ESF_DZ_TXP_BKT_D_R_REQ_CLIENT_ID_LBN 0 -#define ESF_DZ_TXP_BKT_D_R_REQ_CLIENT_ID_WIDTH 2 -#define ESE_DZ_DPCPU_PACER_CPU_CLIENT 2 -#define ESE_DZ_DPCPU_PACER_CMD_CTL_CLIENT 1 -#define ESE_DZ_DPCPU_PACER_ALRT_CTL_CLIENT 0 - - -/* ES_TX_PACER_BKT_TBL_D_R_RSP */ -#define ESF_DZ_TXP_BKT_TBL_D_R_RSP_DUE_TIME_WITH_MIN_BKT_LBN 21 -#define ESF_DZ_TXP_BKT_TBL_D_R_RSP_DUE_TIME_WITH_MIN_BKT_WIDTH 26 -#define ESF_DZ_TXP_BKT_TBL_D_R_RSP_DUE_TIME_LBN 5 -#define ESF_DZ_TXP_BKT_TBL_D_R_RSP_DUE_TIME_WIDTH 16 -#define ESF_DZ_TXP_BKT_TBL_D_R_RSP_OP_LBN 2 -#define ESF_DZ_TXP_BKT_TBL_D_R_RSP_OP_WIDTH 3 -#define ESE_DZ_DPCPU_PACER_BKT_TBL_RD 7 -#define ESE_DZ_DPCPU_PACER_BKT_TBL_WR 6 -#define ESE_DZ_DPCPU_PACER_TXQ_TBL_RD 5 -#define ESE_DZ_DPCPU_PACER_TXQ_TBL_WR 4 -#define ESE_DZ_DPCPU_PACER_TXQ_D_R_NI 3 -#define ESE_DZ_DPCPU_PACER_TXQ_D_R_I 2 -#define ESE_DZ_DPCPU_PACER_BKT_D_R_RD 1 -#define ESE_DZ_DPCPU_PACER_BKT_D_RD 0 -#define ESF_DZ_TXP_BKT_TBL_D_R_RSP_CLIENT_ID_LBN 0 -#define ESF_DZ_TXP_BKT_TBL_D_R_RSP_CLIENT_ID_WIDTH 2 -#define ESE_DZ_DPCPU_PACER_CPU_CLIENT 2 -#define ESE_DZ_DPCPU_PACER_CMD_CTL_CLIENT 1 -#define ESE_DZ_DPCPU_PACER_ALRT_CTL_CLIENT 0 - - -/* ES_TX_PACER_BKT_TBL_RD_REQ */ -#define ESF_DZ_TXP_BKT_TBL_RD_REQ_BKT_ID_LBN 5 -#define ESF_DZ_TXP_BKT_TBL_RD_REQ_BKT_ID_WIDTH 10 -#define ESF_DZ_TXP_BKT_TBL_RD_REQ_OP_LBN 2 -#define ESF_DZ_TXP_BKT_TBL_RD_REQ_OP_WIDTH 3 -#define ESE_DZ_DPCPU_PACER_BKT_TBL_RD 7 -#define ESE_DZ_DPCPU_PACER_BKT_TBL_WR 6 -#define ESE_DZ_DPCPU_PACER_TXQ_TBL_RD 5 -#define ESE_DZ_DPCPU_PACER_TXQ_TBL_WR 4 -#define ESE_DZ_DPCPU_PACER_TXQ_D_R_NI 3 -#define ESE_DZ_DPCPU_PACER_TXQ_D_R_I 2 -#define ESE_DZ_DPCPU_PACER_BKT_D_R_RD 1 -#define ESE_DZ_DPCPU_PACER_BKT_D_RD 0 -#define ESF_DZ_TXP_BKT_TBL_RD_REQ_CLIENT_ID_LBN 0 -#define ESF_DZ_TXP_BKT_TBL_RD_REQ_CLIENT_ID_WIDTH 2 -#define ESE_DZ_DPCPU_PACER_CPU_CLIENT 2 -#define ESE_DZ_DPCPU_PACER_CMD_CTL_CLIENT 1 -#define ESE_DZ_DPCPU_PACER_ALRT_CTL_CLIENT 0 - - -/* ES_TX_PACER_BKT_TBL_RD_RSP */ -#define ESF_DZ_TXP_BKT_TBL_RD_RSP_IDLE_LBN 97 -#define ESF_DZ_TXP_BKT_TBL_RD_RSP_IDLE_WIDTH 1 -#define ESF_DZ_TXP_BKT_TBL_RD_RSP_USED_LBN 96 -#define ESF_DZ_TXP_BKT_TBL_RD_RSP_USED_WIDTH 1 -#define ESF_DZ_TXP_BKT_TBL_RD_RSP_MAX_FILL_REG_LBN 94 -#define ESF_DZ_TXP_BKT_TBL_RD_RSP_MAX_FILL_REG_WIDTH 2 -#define ESF_DZ_TXP_BKT_TBL_RD_RSP_RATE_REC_LBN 78 -#define ESF_DZ_TXP_BKT_TBL_RD_RSP_RATE_REC_WIDTH 16 -#define ESF_DZ_TXP_BKT_TBL_RD_RSP_RATE_LBN 62 -#define ESF_DZ_TXP_BKT_TBL_RD_RSP_RATE_WIDTH 16 -#define ESF_DZ_TXP_BKT_TBL_RD_RSP_FILL_LEVEL_LBN 47 -#define ESF_DZ_TXP_BKT_TBL_RD_RSP_FILL_LEVEL_WIDTH 15 -#define ESF_DZ_TXP_BKT_TBL_RD_RSP_DUE_TIME_LBN 31 -#define ESF_DZ_TXP_BKT_TBL_RD_RSP_DUE_TIME_WIDTH 16 -#define ESF_DZ_TXP_BKT_TBL_RD_RSP_LAST_FILL_TIME_LBN 15 -#define ESF_DZ_TXP_BKT_TBL_RD_RSP_LAST_FILL_TIME_WIDTH 16 -#define ESF_DZ_TXP_BKT_TBL_RD_RSP_BKT_ID_LBN 5 -#define ESF_DZ_TXP_BKT_TBL_RD_RSP_BKT_ID_WIDTH 10 -#define ESF_DZ_TXP_BKT_TBL_RD_RSP_OP_LBN 2 -#define ESF_DZ_TXP_BKT_TBL_RD_RSP_OP_WIDTH 3 -#define ESE_DZ_DPCPU_PACER_BKT_TBL_RD 7 -#define ESE_DZ_DPCPU_PACER_BKT_TBL_WR 6 -#define ESE_DZ_DPCPU_PACER_TXQ_TBL_RD 5 -#define ESE_DZ_DPCPU_PACER_TXQ_TBL_WR 4 -#define ESE_DZ_DPCPU_PACER_TXQ_D_R_NI 3 -#define ESE_DZ_DPCPU_PACER_TXQ_D_R_I 2 -#define ESE_DZ_DPCPU_PACER_BKT_D_R_RD 1 -#define ESE_DZ_DPCPU_PACER_BKT_D_RD 0 -#define ESF_DZ_TXP_BKT_TBL_RD_RSP_CLIENT_ID_LBN 0 -#define ESF_DZ_TXP_BKT_TBL_RD_RSP_CLIENT_ID_WIDTH 2 -#define ESE_DZ_DPCPU_PACER_CPU_CLIENT 2 -#define ESE_DZ_DPCPU_PACER_CMD_CTL_CLIENT 1 -#define ESE_DZ_DPCPU_PACER_ALRT_CTL_CLIENT 0 - - -/* ES_TX_PACER_BKT_TBL_WR_REQ */ -#define ESF_DZ_TXP_BKT_TBL_WR_REQ_IDLE_LBN 65 -#define ESF_DZ_TXP_BKT_TBL_WR_REQ_IDLE_WIDTH 1 -#define ESF_DZ_TXP_BKT_TBL_WR_REQ_USED_LBN 64 -#define ESF_DZ_TXP_BKT_TBL_WR_REQ_USED_WIDTH 1 -#define ESF_DZ_TXP_BKT_TBL_WR_REQ_MAX_FILL_REG_LBN 62 -#define ESF_DZ_TXP_BKT_TBL_WR_REQ_MAX_FILL_REG_WIDTH 2 -#define ESF_DZ_TXP_BKT_TBL_WR_REQ_RATE_REC_LBN 46 -#define ESF_DZ_TXP_BKT_TBL_WR_REQ_RATE_REC_WIDTH 16 -#define ESF_DZ_TXP_BKT_TBL_WR_REQ_RATE_LBN 30 -#define ESF_DZ_TXP_BKT_TBL_WR_REQ_RATE_WIDTH 16 -#define ESF_DZ_TXP_BKT_TBL_WR_REQ_FILL_LEVEL_LBN 15 -#define ESF_DZ_TXP_BKT_TBL_WR_REQ_FILL_LEVEL_WIDTH 15 -#define ESF_DZ_TXP_BKT_TBL_WR_REQ_BKT_ID_LBN 5 -#define ESF_DZ_TXP_BKT_TBL_WR_REQ_BKT_ID_WIDTH 10 -#define ESF_DZ_TXP_BKT_TBL_WR_REQ_OP_LBN 2 -#define ESF_DZ_TXP_BKT_TBL_WR_REQ_OP_WIDTH 3 -#define ESE_DZ_DPCPU_PACER_BKT_TBL_RD 7 -#define ESE_DZ_DPCPU_PACER_BKT_TBL_WR 6 -#define ESE_DZ_DPCPU_PACER_TXQ_TBL_RD 5 -#define ESE_DZ_DPCPU_PACER_TXQ_TBL_WR 4 -#define ESE_DZ_DPCPU_PACER_TXQ_D_R_NI 3 -#define ESE_DZ_DPCPU_PACER_TXQ_D_R_I 2 -#define ESE_DZ_DPCPU_PACER_BKT_D_R_RD 1 -#define ESE_DZ_DPCPU_PACER_BKT_D_RD 0 -#define ESF_DZ_TXP_BKT_TBL_WR_REQ_CLIENT_ID_LBN 0 -#define ESF_DZ_TXP_BKT_TBL_WR_REQ_CLIENT_ID_WIDTH 2 -#define ESE_DZ_DPCPU_PACER_CPU_CLIENT 2 -#define ESE_DZ_DPCPU_PACER_CMD_CTL_CLIENT 1 -#define ESE_DZ_DPCPU_PACER_ALRT_CTL_CLIENT 0 - - -/* ES_TX_PACER_TXQ_D_R_I_REQ */ -#define ESF_DZ_TXP_TXQ_D_R_I_REQ_FRM_LEN_LBN 15 -#define ESF_DZ_TXP_TXQ_D_R_I_REQ_FRM_LEN_WIDTH 14 -#define ESF_DZ_TXP_TXQ_D_R_I_REQ_TXQ_ID_LBN 5 -#define ESF_DZ_TXP_TXQ_D_R_I_REQ_TXQ_ID_WIDTH 10 -#define ESF_DZ_TXP_TXQ_D_R_I_REQ_OP_LBN 2 -#define ESF_DZ_TXP_TXQ_D_R_I_REQ_OP_WIDTH 3 -#define ESE_DZ_DPCPU_PACER_BKT_TBL_RD 7 -#define ESE_DZ_DPCPU_PACER_BKT_TBL_WR 6 -#define ESE_DZ_DPCPU_PACER_TXQ_TBL_RD 5 -#define ESE_DZ_DPCPU_PACER_TXQ_TBL_WR 4 -#define ESE_DZ_DPCPU_PACER_TXQ_D_R_NI 3 -#define ESE_DZ_DPCPU_PACER_TXQ_D_R_I 2 -#define ESE_DZ_DPCPU_PACER_BKT_D_R_RD 1 -#define ESE_DZ_DPCPU_PACER_BKT_D_RD 0 -#define ESF_DZ_TXP_TXQ_D_R_I_REQ_CLIENT_ID_LBN 0 -#define ESF_DZ_TXP_TXQ_D_R_I_REQ_CLIENT_ID_WIDTH 2 -#define ESE_DZ_DPCPU_PACER_CPU_CLIENT 2 -#define ESE_DZ_DPCPU_PACER_CMD_CTL_CLIENT 1 -#define ESE_DZ_DPCPU_PACER_ALRT_CTL_CLIENT 0 - - -/* ES_TX_PACER_TXQ_TBL_RD_REQ */ -#define ESF_DZ_TXP_TXQ_TBL_RD_REQ_TXQ_ID_LBN 5 -#define ESF_DZ_TXP_TXQ_TBL_RD_REQ_TXQ_ID_WIDTH 10 -#define ESF_DZ_TXP_TXQ_TBL_RD_REQ_OP_LBN 2 -#define ESF_DZ_TXP_TXQ_TBL_RD_REQ_OP_WIDTH 3 -#define ESE_DZ_DPCPU_PACER_BKT_TBL_RD 7 -#define ESE_DZ_DPCPU_PACER_BKT_TBL_WR 6 -#define ESE_DZ_DPCPU_PACER_TXQ_TBL_RD 5 -#define ESE_DZ_DPCPU_PACER_TXQ_TBL_WR 4 -#define ESE_DZ_DPCPU_PACER_TXQ_D_R_NI 3 -#define ESE_DZ_DPCPU_PACER_TXQ_D_R_I 2 -#define ESE_DZ_DPCPU_PACER_BKT_D_R_RD 1 -#define ESE_DZ_DPCPU_PACER_BKT_D_RD 0 -#define ESF_DZ_TXP_TXQ_TBL_RD_REQ_CLIENT_ID_LBN 0 -#define ESF_DZ_TXP_TXQ_TBL_RD_REQ_CLIENT_ID_WIDTH 2 -#define ESE_DZ_DPCPU_PACER_CPU_CLIENT 2 -#define ESE_DZ_DPCPU_PACER_CMD_CTL_CLIENT 1 -#define ESE_DZ_DPCPU_PACER_ALRT_CTL_CLIENT 0 - - -/* ES_TX_PACER_TXQ_TBL_RD_RSP */ -#define ESF_DZ_TXP_TXQ_TBL_RD_RSP_MAX_BKT2_LBN 53 -#define ESF_DZ_TXP_TXQ_TBL_RD_RSP_MAX_BKT2_WIDTH 10 -#define ESF_DZ_TXP_TXQ_TBL_RD_RSP_MAX_BKT1_LBN 43 -#define ESF_DZ_TXP_TXQ_TBL_RD_RSP_MAX_BKT1_WIDTH 10 -#define ESF_DZ_TXP_TXQ_TBL_RD_RSP_MAX_BKT0_LBN 33 -#define ESF_DZ_TXP_TXQ_TBL_RD_RSP_MAX_BKT0_WIDTH 10 -#define ESF_DZ_TXP_TXQ_TBL_RD_RSP_MIN_BKT_LBN 23 -#define ESF_DZ_TXP_TXQ_TBL_RD_RSP_MIN_BKT_WIDTH 10 -#define ESF_DZ_TXP_TXQ_TBL_RD_RSP_LABEL_LBN 19 -#define ESF_DZ_TXP_TXQ_TBL_RD_RSP_LABEL_WIDTH 4 -#define ESF_DZ_TXP_TXQ_TBL_RD_RSP_PQ_FLAGS_LBN 16 -#define ESF_DZ_TXP_TXQ_TBL_RD_RSP_PQ_FLAGS_WIDTH 3 -#define ESF_DZ_TXP_TXQ_TBL_RD_RSP_DSBL_LBN 15 -#define ESF_DZ_TXP_TXQ_TBL_RD_RSP_DSBL_WIDTH 1 -#define ESF_DZ_TXP_TXQ_TBL_RD_RSP_TXQ_ID_LBN 5 -#define ESF_DZ_TXP_TXQ_TBL_RD_RSP_TXQ_ID_WIDTH 10 -#define ESF_DZ_TXP_TXQ_TBL_RD_RSP_OP_LBN 2 -#define ESF_DZ_TXP_TXQ_TBL_RD_RSP_OP_WIDTH 3 -#define ESE_DZ_DPCPU_PACER_BKT_TBL_RD 7 -#define ESE_DZ_DPCPU_PACER_BKT_TBL_WR 6 -#define ESE_DZ_DPCPU_PACER_TXQ_TBL_RD 5 -#define ESE_DZ_DPCPU_PACER_TXQ_TBL_WR 4 -#define ESE_DZ_DPCPU_PACER_TXQ_D_R_NI 3 -#define ESE_DZ_DPCPU_PACER_TXQ_D_R_I 2 -#define ESE_DZ_DPCPU_PACER_BKT_D_R_RD 1 -#define ESE_DZ_DPCPU_PACER_BKT_D_RD 0 -#define ESF_DZ_TXP_TXQ_TBL_RD_RSP_CLIENT_ID_LBN 0 -#define ESF_DZ_TXP_TXQ_TBL_RD_RSP_CLIENT_ID_WIDTH 2 -#define ESE_DZ_DPCPU_PACER_CPU_CLIENT 2 -#define ESE_DZ_DPCPU_PACER_CMD_CTL_CLIENT 1 -#define ESE_DZ_DPCPU_PACER_ALRT_CTL_CLIENT 0 - - -/* ES_TX_PACER_TXQ_TBL_WR_REQ */ -#define ESF_DZ_TXP_TXQ_TBL_WR_REQ_MAX_BKT2_LBN 53 -#define ESF_DZ_TXP_TXQ_TBL_WR_REQ_MAX_BKT2_WIDTH 10 -#define ESF_DZ_TXP_TXQ_TBL_WR_REQ_MAX_BKT1_LBN 43 -#define ESF_DZ_TXP_TXQ_TBL_WR_REQ_MAX_BKT1_WIDTH 10 -#define ESF_DZ_TXP_TXQ_TBL_WR_REQ_MAX_BKT0_LBN 33 -#define ESF_DZ_TXP_TXQ_TBL_WR_REQ_MAX_BKT0_WIDTH 10 -#define ESF_DZ_TXP_TXQ_TBL_WR_REQ_MIN_BKT_LBN 23 -#define ESF_DZ_TXP_TXQ_TBL_WR_REQ_MIN_BKT_WIDTH 10 -#define ESF_DZ_TXP_TXQ_TBL_WR_REQ_LABEL_LBN 19 -#define ESF_DZ_TXP_TXQ_TBL_WR_REQ_LABEL_WIDTH 4 -#define ESF_DZ_TXP_TXQ_TBL_WR_REQ_PQ_FLAGS_LBN 16 -#define ESF_DZ_TXP_TXQ_TBL_WR_REQ_PQ_FLAGS_WIDTH 3 -#define ESF_DZ_TXP_TXQ_TBL_WR_REQ_DSBL_LBN 15 -#define ESF_DZ_TXP_TXQ_TBL_WR_REQ_DSBL_WIDTH 1 -#define ESF_DZ_TXP_TXQ_TBL_WR_REQ_TXQ_ID_LBN 5 -#define ESF_DZ_TXP_TXQ_TBL_WR_REQ_TXQ_ID_WIDTH 10 -#define ESF_DZ_TXP_TXQ_TBL_WR_REQ_OP_LBN 2 -#define ESF_DZ_TXP_TXQ_TBL_WR_REQ_OP_WIDTH 3 -#define ESE_DZ_DPCPU_PACER_BKT_TBL_RD 7 -#define ESE_DZ_DPCPU_PACER_BKT_TBL_WR 6 -#define ESE_DZ_DPCPU_PACER_TXQ_TBL_RD 5 -#define ESE_DZ_DPCPU_PACER_TXQ_TBL_WR 4 -#define ESE_DZ_DPCPU_PACER_TXQ_D_R_NI 3 -#define ESE_DZ_DPCPU_PACER_TXQ_D_R_I 2 -#define ESE_DZ_DPCPU_PACER_BKT_D_R_RD 1 -#define ESE_DZ_DPCPU_PACER_BKT_D_RD 0 -#define ESF_DZ_TXP_TXQ_TBL_WR_REQ_CLIENT_ID_LBN 0 -#define ESF_DZ_TXP_TXQ_TBL_WR_REQ_CLIENT_ID_WIDTH 2 -#define ESE_DZ_DPCPU_PACER_CPU_CLIENT 2 -#define ESE_DZ_DPCPU_PACER_CMD_CTL_CLIENT 1 -#define ESE_DZ_DPCPU_PACER_ALRT_CTL_CLIENT 0 /* ES_TX_USER_DESC */ @@ -2572,8 +2427,12 @@ extern "C" { #define ESF_DZ_TX_U_DC_RPTR_WIDTH 6 #define ESF_DZ_TX_U_SOFT6_B1R1_LBN 80 #define ESF_DZ_TX_U_SOFT6_B1R1_WIDTH 6 +#define ESF_DZ_TX_U_CNTAG_LBN 68 +#define ESF_DZ_TX_U_CNTAG_WIDTH 1 #define ESF_DZ_TX_U_SOFT5_B1R0_LBN 64 #define ESF_DZ_TX_U_SOFT5_B1R0_WIDTH 5 +#define ESF_DZ_TX_U_TIMESTAMP_LBN 67 +#define ESF_DZ_TX_U_TIMESTAMP_WIDTH 1 #define ESF_DZ_TX_U_PREFETCH_ACTIVE_LBN 66 #define ESF_DZ_TX_U_PREFETCH_ACTIVE_WIDTH 1 #define ESF_DZ_TX_U_PREFETCH_PENDING_LBN 65 @@ -2613,6 +2472,18 @@ extern "C" { #define ESF_DZ_TX_U_SOFT18_B1R0_WIDTH 18 #define ESF_DZ_TX_U_SOFT16_B0R3_LBN 48 #define ESF_DZ_TX_U_SOFT16_B0R3_WIDTH 16 +#define ESF_DZ_TX_U_EMERGENCY_FETCH_FAILED_LBN 56 +#define ESF_DZ_TX_U_EMERGENCY_FETCH_FAILED_WIDTH 1 +#define ESF_DZ_TX_U_PACER_BYPASS_OK_LBN 55 +#define ESF_DZ_TX_U_PACER_BYPASS_OK_WIDTH 1 +#define ESF_DZ_TX_U_STALE_DL_FETCH_LBN 54 +#define ESF_DZ_TX_U_STALE_DL_FETCH_WIDTH 1 +#define ESF_DZ_TX_U_ROLLBACK_IDX_REACHED_LBN 52 +#define ESF_DZ_TX_U_ROLLBACK_IDX_REACHED_WIDTH 1 +#define ESF_DZ_TX_U_ROLLBACK_ACTIVE_LBN 51 +#define ESF_DZ_TX_U_ROLLBACK_ACTIVE_WIDTH 1 +#define ESF_DZ_TX_U_QUEUE_PAUSED_LBN 50 +#define ESF_DZ_TX_U_QUEUE_PAUSED_WIDTH 1 #define ESF_DZ_TX_U_QUEUE_ENABLED_LBN 49 #define ESF_DZ_TX_U_QUEUE_ENABLED_WIDTH 1 #define ESF_DZ_TX_U_FLUSH_PENDING_LBN 48 @@ -2625,7 +2496,7 @@ extern "C" { #define ESF_DZ_TX_U_OWNER_ID_WIDTH 12 #define ESF_DZ_TX_U_SOFT12_B0R1_LBN 16 #define ESF_DZ_TX_U_SOFT12_B0R1_WIDTH 12 -#define ESF_DZ_TX_U_DSCR_SIZE_LBN 0 +#define ESF_DZ_TX_U_DSCR_SIZE_LBN 13 #define ESF_DZ_TX_U_DSCR_SIZE_WIDTH 3 #define ESF_DZ_TX_U_SOFT3_B0R0_LBN 0 #define ESF_DZ_TX_U_SOFT3_B0R0_WIDTH 3 @@ -2642,9 +2513,27 @@ extern "C" { #define ESF_DZ_TX_FINFO_SRCDST_WIDTH 16 +/* ES_TX_VLAN_DESC */ +#define ESF_DZ_TX_DESC_IS_OPT_LBN 63 +#define ESF_DZ_TX_DESC_IS_OPT_WIDTH 1 +#define ESF_DZ_TX_OPTION_TYPE_LBN 60 +#define ESF_DZ_TX_OPTION_TYPE_WIDTH 3 +#define ESE_DZ_TX_OPTION_DESC_TSO 7 +#define ESE_DZ_TX_OPTION_DESC_VLAN 6 +#define ESE_DZ_TX_OPTION_DESC_CRC_CSUM 0 +#define ESF_DZ_TX_VLAN_OP_LBN 32 +#define ESF_DZ_TX_VLAN_OP_WIDTH 2 +#define ESF_DZ_TX_VLAN_TAG2_LBN 16 +#define ESF_DZ_TX_VLAN_TAG2_WIDTH 16 +#define ESF_DZ_TX_VLAN_TAG1_LBN 0 +#define ESF_DZ_TX_VLAN_TAG1_WIDTH 16 + + /* ES_b2t_cpl_rsp */ -#define ESF_DZ_B2T_CPL_RSP_CPL_ECC_LBN 268 +#define ESF_DZ_B2T_CPL_RSP_CPL_ECC_LBN 284 #define ESF_DZ_B2T_CPL_RSP_CPL_ECC_WIDTH 32 +#define ESF_DZ_B2T_CPL_RSP_CPL_EOT_LBN 283 +#define ESF_DZ_B2T_CPL_RSP_CPL_EOT_WIDTH 1 #define ESF_DZ_B2T_CPL_RSP_CPL_DATA_DW0_LBN 27 #define ESF_DZ_B2T_CPL_RSP_CPL_DATA_DW0_WIDTH 32 #define ESF_DZ_B2T_CPL_RSP_CPL_DATA_DW1_LBN 59 @@ -2663,8 +2552,6 @@ extern "C" { #define ESF_DZ_B2T_CPL_RSP_CPL_DATA_DW7_WIDTH 32 #define ESF_DZ_B2T_CPL_RSP_CPL_DATA_LBN 27 #define ESF_DZ_B2T_CPL_RSP_CPL_DATA_WIDTH 256 -#define ESF_DZ_B2T_CPL_RSP_CPL_EOT_LBN 283 -#define ESF_DZ_B2T_CPL_RSP_CPL_EOT_WIDTH -15 #define ESF_DZ_B2T_CPL_RSP_CPL_ERROR_LBN 26 #define ESF_DZ_B2T_CPL_RSP_CPL_ERROR_WIDTH 1 #define ESF_DZ_B2T_CPL_RSP_CPL_LAST_LBN 25 @@ -2677,95 +2564,321 @@ extern "C" { #define ESF_DZ_B2T_CPL_RSP_CPL_ADRS_WIDTH 7 +/* ES_fltr_info_wrd_mac_to_rx */ +#define ESF_DZ_FLTR_INFO_MAC_TO_RX_RESERVED2_LBN 112 +#define ESF_DZ_FLTR_INFO_MAC_TO_RX_RESERVED2_WIDTH 16 +#define ESF_DZ_FLTR_INFO_MAC_TO_RX_TIMESTAMP2_LBN 96 +#define ESF_DZ_FLTR_INFO_MAC_TO_RX_TIMESTAMP2_WIDTH 16 +#define ESF_DZ_FLTR_INFO_MAC_TO_RX_TIMESTAMP1_LBN 80 +#define ESF_DZ_FLTR_INFO_MAC_TO_RX_TIMESTAMP1_WIDTH 16 +#define ESF_DZ_FLTR_INFO_MAC_TO_RX_TIMESTAMP0_LBN 64 +#define ESF_DZ_FLTR_INFO_MAC_TO_RX_TIMESTAMP0_WIDTH 16 +#define ESF_DZ_FLTR_INFO_MAC_TO_RX_RESERVED1_LBN 48 +#define ESF_DZ_FLTR_INFO_MAC_TO_RX_RESERVED1_WIDTH 16 +#define ESF_DZ_FLTR_INFO_MAC_TO_RX_IPSEC_SA_LBN 32 +#define ESF_DZ_FLTR_INFO_MAC_TO_RX_IPSEC_SA_WIDTH 16 +#define ESF_DZ_FLTR_INFO_MAC_TO_RX_RESERVED0_LBN 8 +#define ESF_DZ_FLTR_INFO_MAC_TO_RX_RESERVED0_WIDTH 24 +#define ESF_DZ_FLTR_INFO_MAC_TO_RX_IPSEC_LBN 7 +#define ESF_DZ_FLTR_INFO_MAC_TO_RX_IPSEC_WIDTH 1 +#define ESF_DZ_FLTR_INFO_MAC_TO_RX_PRIORITY_LBN 4 +#define ESF_DZ_FLTR_INFO_MAC_TO_RX_PRIORITY_WIDTH 3 +#define ESF_DZ_FLTR_INFO_MAC_TO_RX_SRC_LBN 0 +#define ESF_DZ_FLTR_INFO_MAC_TO_RX_SRC_WIDTH 4 -/* Enum DPCPU_INSTR_BRTYPE */ -#define ESE_DZ_BNEZAL 19 -#define ESE_DZ_BEQZAL 18 -#define ESE_DZ_BGEZAL 17 -#define ESE_DZ_BLTZAL 16 -#define ESE_DZ_BNEZ 3 -#define ESE_DZ_BEQZ 2 -#define ESE_DZ_BGEZ 1 -#define ESE_DZ_BLTZ 0 -/* Enum DPCPU_INSTR_FUNCT */ -#define ESE_DZ_MASKMOD 44 -#define ESE_DZ_SLTU 43 -#define ESE_DZ_SLT 42 -#define ESE_DZ_INCMOD 40 -#define ESE_DZ_NOR 39 -#define ESE_DZ_XOR 38 -#define ESE_DZ_OR 37 -#define ESE_DZ_AND 36 -#define ESE_DZ_SUBU 35 -#define ESE_DZ_SUB 34 -#define ESE_DZ_ADDU 33 -#define ESE_DZ_ADD 32 -#define ESE_DZ_MULT 25 -#define ESE_DZ_MFLO 18 -#define ESE_DZ_MFHI 16 -#define ESE_DZ_JALR 9 -#define ESE_DZ_JR 8 -#define ESE_DZ_SRAV 7 -#define ESE_DZ_SRLV 6 -#define ESE_DZ_SLLV 4 -#define ESE_DZ_SRA 3 -#define ESE_DZ_SRL 2 -#define ESE_DZ_SLL 0 +/* ES_fltr_info_wrd_mc_pdma */ +#define ESF_DZ_FLTR_INFO_MC_PDMA_FLTR_OUT_LBN 64 +#define ESF_DZ_FLTR_INFO_MC_PDMA_FLTR_OUT_WIDTH 16 +#define ESE_DZ_FLTR_MULTICAST_VLAN 512 +#define ESE_DZ_FLTR_MAC_VLAN 256 +#define ESE_DZ_FLTR_STRUCTURED7 128 +#define ESE_DZ_FLTR_STRUCTURED6 64 +#define ESE_DZ_FLTR_STRUCTURED5 32 +#define ESE_DZ_FLTR_STRUCTURED4 16 +#define ESE_DZ_FLTR_STRUCTURED3 8 +#define ESE_DZ_FLTR_STRUCTURED2 4 +#define ESE_DZ_FLTR_STRUCTURED1 2 +#define ESE_DZ_FLTR_STRUCTURED0 1 +#define ESF_DZ_FLTR_INFO_MC_PDMA_TIMESTAMP_DW0_LBN 16 +#define ESF_DZ_FLTR_INFO_MC_PDMA_TIMESTAMP_DW0_WIDTH 32 +#define ESF_DZ_FLTR_INFO_MC_PDMA_TIMESTAMP_DW1_LBN 48 +#define ESF_DZ_FLTR_INFO_MC_PDMA_TIMESTAMP_DW1_WIDTH 16 +#define ESF_DZ_FLTR_INFO_MC_PDMA_TIMESTAMP_LBN 16 +#define ESF_DZ_FLTR_INFO_MC_PDMA_TIMESTAMP_WIDTH 48 +#define ESF_DZ_FLTR_INFO_MC_PDMA_DST_LBN 8 +#define ESF_DZ_FLTR_INFO_MC_PDMA_DST_WIDTH 8 +#define ESE_DZ_DST_NCSI 64 +#define ESE_DZ_DST_PORT0 32 +#define ESE_DZ_DST_PORT1 16 +#define ESE_DZ_DST_PORT0_IPSEC 8 +#define ESE_DZ_DST_PORT1_IPSEC 4 +#define ESE_DZ_DST_PM 2 +#define ESE_DZ_DST_TIMESTAMP 1 +#define ESF_DZ_FLTR_INFO_MC_PDMA_PRIORITY_LBN 4 +#define ESF_DZ_FLTR_INFO_MC_PDMA_PRIORITY_WIDTH 4 +#define ESF_DZ_FLTR_INFO_MC_PDMA_SRC_LBN 0 +#define ESF_DZ_FLTR_INFO_MC_PDMA_SRC_WIDTH 4 -/* Enum DPCPU_INSTR_OP */ -#define ESE_DZ_LM_MSG 49 -#define ESE_DZ_MSG 48 -#define ESE_DZ_SHA 43 -#define ESE_DZ_SBA 42 -#define ESE_DZ_SH 41 -#define ESE_DZ_SB 40 -#define ESE_DZ_LHUA 39 -#define ESE_DZ_LBUA 38 -#define ESE_DZ_LHU 37 -#define ESE_DZ_LBU 36 -#define ESE_DZ_LHA 35 -#define ESE_DZ_LBA 34 -#define ESE_DZ_LH 33 -#define ESE_DZ_LB 32 -#define ESE_DZ_BGTU 31 -#define ESE_DZ_BLEU 30 -#define ESE_DZ_MODI 28 -#define ESE_DZ_NEGU 27 -#define ESE_DZ_NEG 26 -#define ESE_DZ_LI 25 -#define ESE_DZ_INCMODI 24 -#define ESE_DZ_BGT 23 -#define ESE_DZ_BLE 22 -#define ESE_DZ_BBS 21 -#define ESE_DZ_BBC 20 -#define ESE_DZ_JAL_EVT 19 -#define ESE_DZ_J_EVT 18 -#define ESE_DZ_HALT 16 -#define ESE_DZ_NORI 15 -#define ESE_DZ_XORI 14 -#define ESE_DZ_ORI 13 -#define ESE_DZ_ANDI 12 -#define ESE_DZ_SLTIU 11 -#define ESE_DZ_SLTI 10 -#define ESE_DZ_ADDIU 9 -#define ESE_DZ_ADDI 8 -#define ESE_DZ_BGTZ 7 -#define ESE_DZ_BLEZ 6 -#define ESE_DZ_BNE 5 -#define ESE_DZ_BEQ 4 -#define ESE_DZ_JAL 3 -#define ESE_DZ_J 2 -#define ESE_DZ_BRANCH 1 -#define ESE_DZ_REG2REG 0 -/* Enum DPCPU_MSG_DIR */ -#define ESE_DPCPU_MSG_DZ_OUTB 0x1 -#define ESE_DPCPU_MSG_DZ_INB 0x0 +/* ES_fltr_info_wrd_rxdi_to_rxdp */ +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_INNER_VLAN_LBN 112 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_INNER_VLAN_WIDTH 16 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_OUTER_VLAN_LBN 96 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_OUTER_VLAN_WIDTH 16 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_THASH1_LBN 80 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_THASH1_WIDTH 16 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_THASH0_LBN 64 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_THASH0_WIDTH 16 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_TIMESTAMP1_LBN 48 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_TIMESTAMP1_WIDTH 16 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_TIMESTAMP0_LBN 32 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_TIMESTAMP0_WIDTH 16 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_CNP_LBN 31 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_CNP_WIDTH 1 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_IVP_LBN 30 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_IVP_WIDTH 1 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_OVP_LBN 29 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_OVP_WIDTH 1 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_ST2_LBN 28 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_ST2_WIDTH 1 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_ST1_LBN 27 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_ST1_WIDTH 1 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_ST0_LBN 26 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_ST0_WIDTH 1 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_RX_QID_LBN 16 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_RX_QID_WIDTH 10 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_DST_HOST_LBN 15 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_DST_HOST_WIDTH 1 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_DST_MC_LBN 14 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_DST_MC_WIDTH 1 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_DST_P0_LBN 13 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_DST_P0_WIDTH 1 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_DST_P1_LBN 12 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_DST_P1_WIDTH 1 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_RESERVED1_LBN 11 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_RESERVED1_WIDTH 1 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_DST_CRF_LBN 10 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_DST_CRF_WIDTH 1 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_RESERVED0_LBN 9 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_RESERVED0_WIDTH 1 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_REPLAY_LBN 8 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_REPLAY_WIDTH 1 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_IPSEC_LBN 7 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_IPSEC_WIDTH 1 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_PRIORITY_LBN 4 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_PRIORITY_WIDTH 3 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_SRC_LBN 0 +#define ESF_DZ_FLTR_INFO_RXDI_TO_RXDP_SRC_WIDTH 4 + + +/* ES_fltr_info_wrd_rxdp_to_host */ +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_RESERVED3_LBN 33 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_RESERVED3_WIDTH 31 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_RMON_SOFT_LBN 32 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_RMON_SOFT_WIDTH 1 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_RESERVED2_LBN 27 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_RESERVED2_WIDTH 5 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_RX_QID_LBN 16 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_RX_QID_WIDTH 11 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_DST_HOST_LBN 15 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_DST_HOST_WIDTH 1 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_DST_MC_LBN 14 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_DST_MC_WIDTH 1 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_DST_P0_LBN 13 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_DST_P0_WIDTH 1 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_DST_P1_LBN 12 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_DST_P1_WIDTH 1 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_RESERVED1_LBN 11 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_RESERVED1_WIDTH 1 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_DST_CRF_LBN 10 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_DST_CRF_WIDTH 1 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_RESERVED0_LBN 9 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_RESERVED0_WIDTH 1 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_REPLAY_LBN 8 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_REPLAY_WIDTH 1 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_IPSEC_LBN 7 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_IPSEC_WIDTH 1 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_PRIORITY_LBN 4 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_PRIORITY_WIDTH 3 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_SRC_LBN 0 +#define ESF_DZ_FLTR_INFO_RXDP_TO_HOST_SRC_WIDTH 4 + + +/* ES_fltr_info_wrd_tx_to_mac */ +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_PRV_LBN 63 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_PRV_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_LB_LBN 62 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_LB_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_MS0_LBN 61 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_MS0_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_MS1_LBN 60 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_MS1_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_NDI_LBN 59 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_NDI_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_RESERVED2_LBN 48 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_RESERVED2_WIDTH 11 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_IPSEC_SA_LBN 32 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_IPSEC_SA_WIDTH 16 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_TX_STACK_ID_LBN 24 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_TX_STACK_ID_WIDTH 8 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_TX_DOMAIN_LBN 16 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_TX_DOMAIN_WIDTH 8 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_RESERVED1_LBN 14 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_RESERVED1_WIDTH 2 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_DST_P0_LBN 13 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_DST_P0_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_DST_P1_LBN 12 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_DST_P1_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_DST_IP0_LBN 11 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_DST_IP0_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_DST_IP1_LBN 10 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_DST_IP1_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_DST_PM_LBN 9 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_DST_PM_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_RESERVED0_LBN 8 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_RESERVED0_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_IPSEC_LBN 7 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_IPSEC_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_PRIORITY_LBN 4 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_PRIORITY_WIDTH 3 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_SRC_LBN 0 +#define ESF_DZ_FLTR_INFO_TX_TO_MAC_SRC_WIDTH 4 + + +/* ES_fltr_info_wrd_txdi_to_txdp */ +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_INNER_VLAN_LBN 112 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_INNER_VLAN_WIDTH 16 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_OUTER_VLAN_LBN 96 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_OUTER_VLAN_WIDTH 16 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_CNP_LBN 95 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_CNP_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_IVP_LBN 94 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_IVP_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_OVP_LBN 93 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_OVP_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_RESERVED4_LBN 90 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_RESERVED4_WIDTH 3 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_QID_LBN 80 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_QID_WIDTH 10 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_VRI_LBN 79 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_VRI_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_RESERVED3_LBN 78 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_RESERVED3_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_MTU_DIV4_LBN 66 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_MTU_DIV4_WIDTH 12 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_VRI_OP_LBN 64 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_VRI_OP_WIDTH 2 +#define ESE_DZ_VRI_OP_INSERT_REPLACE 3 +#define ESE_DZ_VRI_OP_INSERT_INSERT 2 +#define ESE_DZ_VRI_OP_REPLACE 1 +#define ESE_DZ_VRI_OP_INSERT 0 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_PRV_LBN 63 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_PRV_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_LB_LBN 62 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_LB_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_MS0_LBN 61 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_MS0_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_MS1_LBN 60 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_MS1_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_NDI_LBN 59 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_NDI_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_TXDP_CONTEXT_OUT_LBN 48 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_TXDP_CONTEXT_OUT_WIDTH 11 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_IPSEC_SA_LBN 32 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_IPSEC_SA_WIDTH 16 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_TX_STACK_ID_LBN 24 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_TX_STACK_ID_WIDTH 8 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_TX_DOMAIN_LBN 16 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_TX_DOMAIN_WIDTH 8 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_RESERVED1_LBN 14 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_RESERVED1_WIDTH 2 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_DST_P0_LBN 13 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_DST_P0_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_DST_P1_LBN 12 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_DST_P1_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_DST_IP0_LBN 11 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_DST_IP0_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_DST_IP1_LBN 10 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_DST_IP1_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_DST_PM_LBN 9 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_DST_PM_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_RESERVED0_LBN 8 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_RESERVED0_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_IPSEC_LBN 7 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_IPSEC_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_PRIORITY_LBN 4 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_PRIORITY_WIDTH 3 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_SRC_LBN 0 +#define ESF_DZ_FLTR_INFO_TXDI_TO_TXDP_SRC_WIDTH 4 + + +/* ES_fltr_info_wrd_txdp_to_txdi */ +#define ESF_DZ_FLTR_INFO_TXDP_TO_TXDI_VLAN_OP_LBN 62 +#define ESF_DZ_FLTR_INFO_TXDP_TO_TXDI_VLAN_OP_WIDTH 2 +#define ESF_DZ_FLTR_INFO_TXDP_TO_TXDI_RESERVED1_LBN 58 +#define ESF_DZ_FLTR_INFO_TXDP_TO_TXDI_RESERVED1_WIDTH 4 +#define ESF_DZ_FLTR_INFO_TXDP_TO_TXDI_TX_QID_LBN 48 +#define ESF_DZ_FLTR_INFO_TXDP_TO_TXDI_TX_QID_WIDTH 10 +#define ESF_DZ_FLTR_INFO_TXDP_TO_TXDI_INNER_VLAN_LBN 32 +#define ESF_DZ_FLTR_INFO_TXDP_TO_TXDI_INNER_VLAN_WIDTH 16 +#define ESF_DZ_FLTR_INFO_TXDP_TO_TXDI_OUTER_VLAN_LBN 16 +#define ESF_DZ_FLTR_INFO_TXDP_TO_TXDI_OUTER_VLAN_WIDTH 16 +#define ESF_DZ_FLTR_INFO_TXDP_TO_TXDI_TXDP_CONTEXT_IN_LBN 5 +#define ESF_DZ_FLTR_INFO_TXDP_TO_TXDI_TXDP_CONTEXT_IN_WIDTH 11 +#define ESF_DZ_FLTR_INFO_TXDP_TO_TXDI_RESERVED0_LBN 4 +#define ESF_DZ_FLTR_INFO_TXDP_TO_TXDI_RESERVED0_WIDTH 1 +#define ESF_DZ_FLTR_INFO_TXDP_TO_TXDI_SRC_LBN 0 +#define ESF_DZ_FLTR_INFO_TXDP_TO_TXDI_SRC_WIDTH 4 + + +/* ES_nwk_ev_merge_blk_cmd */ +#define ESF_DZ_EV_MERGE_BLK_COMMAND_OP_LBN 28 +#define ESF_DZ_EV_MERGE_BLK_COMMAND_OP_WIDTH 4 +#define ESE_DZ_EV_MERGE_BLK_COMMAND_OP_FLUSH 2 +#define ESE_DZ_EV_MERGE_BLK_COMMAND_OP_ENABLE 1 +#define ESE_DZ_EV_MERGE_BLK_COMMAND_OP_DISABLE 0 +#define ESF_DZ_EV_MERGE_BLK_COMMAND_BUSY_LBN 31 +#define ESF_DZ_EV_MERGE_BLK_COMMAND_BUSY_WIDTH 1 +#define ESF_DZ_EV_MERGE_BLK_COMMAND_EVQ_IDX_LBN 0 +#define ESF_DZ_EV_MERGE_BLK_COMMAND_EVQ_IDX_WIDTH 11 + + +/* ES_txpm2ini_cpl_rsp */ +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_ECC_LBN 284 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_ECC_WIDTH 32 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_EOT_LBN 283 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_EOT_WIDTH 1 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_DATA_DW0_LBN 27 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_DATA_DW0_WIDTH 32 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_DATA_DW1_LBN 59 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_DATA_DW1_WIDTH 32 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_DATA_DW2_LBN 91 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_DATA_DW2_WIDTH 32 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_DATA_DW3_LBN 123 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_DATA_DW3_WIDTH 32 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_DATA_DW4_LBN 155 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_DATA_DW4_WIDTH 32 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_DATA_DW5_LBN 187 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_DATA_DW5_WIDTH 32 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_DATA_DW6_LBN 219 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_DATA_DW6_WIDTH 32 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_DATA_DW7_LBN 251 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_DATA_DW7_WIDTH 32 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_DATA_LBN 27 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_DATA_WIDTH 256 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_ERROR_LBN 26 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_ERROR_WIDTH 1 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_LAST_LBN 25 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_LAST_WIDTH 1 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_TAG_LBN 19 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_TAG_WIDTH 6 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_LEN_LBN 7 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_LEN_WIDTH 12 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_ADRS_LBN 0 +#define ESF_DZ_TXPM2INI_CPL_RSP_CPL_ADRS_WIDTH 7 + -/* Enum DPCPU_PDBUS_OP */ -#define ESE_DPCPU_PDBUS_DZ_RD 0x1 -#define ESE_DPCPU_PDBUS_DZ_WR 0x0 /* Enum INI_OP */ #define ESE_DZ_RD_COMPL 0x3 @@ -2778,6 +2891,19 @@ extern "C" { #define ESE_DZ_MSI 0x1 #define ESE_DZ_MSIX 0x0 +/* Enum MC_PDMA_BUFFER_ID */ +#define ESE_DZ_MC_PDMA_BUFFER_ALL 4 +#define ESE_DZ_MC_PDMA_BUFFER_RXDP 3 +#define ESE_DZ_MC_PDMA_BUFFER_NCSI 2 +#define ESE_DZ_MC_PDMA_BUFFER_NWPORT1 1 +#define ESE_DZ_MC_PDMA_BUFFER_NWPORT0 0 + +/* Enum MC_PDMA_INTERFACE_ID */ +#define ESE_DZ_MC_PDMA_INTERFACE_RXDP 3 +#define ESE_DZ_MC_PDMA_INTERFACE_NCSI 2 +#define ESE_DZ_MC_PDMA_INTERFACE_NWPORT1 1 +#define ESE_DZ_MC_PDMA_INTERFACE_NWPORT0 0 + /* Enum PKT_STRM_CTL */ #define ESE_DZ_EOP_TRUNC 0x3 #define ESE_DZ_EOP_CRC_ERR 0x2 diff --git a/sys/dev/sfxge/common/efx_regs_mcdi.h b/sys/dev/sfxge/common/efx_regs_mcdi.h index 9016ca9a4766..bd35970768ec 100644 --- a/sys/dev/sfxge/common/efx_regs_mcdi.h +++ b/sys/dev/sfxge/common/efx_regs_mcdi.h @@ -1,5 +1,5 @@ /*- - * Copyright 2008-2011 Solarflare Communications Inc. All rights reserved. + * Copyright 2008-2013 Solarflare Communications Inc. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -39,6 +39,17 @@ #define MC_FW_STATE_BOOTING (4) /* The Scheduler has started. */ #define MC_FW_STATE_SCHED (8) +/* If this is set in MC_RESET_STATE_REG then it should be + * possible to jump into IMEM without loading code from flash. + * Unlike a warm boot, assume DMEM has been reloaded, so that + * the MC persistent data must be reinitialised. */ +#define MC_FW_TEPID_BOOT_OK (16) +/* We have entered the main firmware via recovery mode. This + * means that MC persistent data must be reinitialised, but that + * we shouldn't touch PCIe config. */ +#define MC_FW_RECOVERY_MODE_PCIE_INIT_OK (32) +/* BIST state has been initialized */ +#define MC_FW_BIST_INIT_OK (128) /* Siena MC shared memmory offsets */ /* The 'doorbell' addresses are hard-wired to alert the MC when written */ @@ -57,6 +68,9 @@ #define MC_STATUS_DWORD_REBOOT (0xb007b007) #define MC_STATUS_DWORD_ASSERT (0xdeaddead) +/* Check whether an mcfw version (in host order) belongs to a bootloader */ +#define MC_FW_VERSION_IS_BOOTLOADER(_v) (((_v) >> 16) == 0xb007) + /* The current version of the MCDI protocol. * * Note that the ROM burnt into the card only talks V0, so at the very @@ -72,7 +86,7 @@ /* MCDI version 1 * - * Each MCDI request starts with an MCDI_HEADER, which is a 32byte + * Each MCDI request starts with an MCDI_HEADER, which is a 32bit * structure, filled in by the client. * * 0 7 8 16 20 22 23 24 31 @@ -109,9 +123,11 @@ #define MCDI_HEADER_DATALEN_LBN 8 #define MCDI_HEADER_DATALEN_WIDTH 8 #define MCDI_HEADER_SEQ_LBN 16 -#define MCDI_HEADER_RSVD_LBN 20 -#define MCDI_HEADER_RSVD_WIDTH 2 #define MCDI_HEADER_SEQ_WIDTH 4 +#define MCDI_HEADER_RSVD_LBN 20 +#define MCDI_HEADER_RSVD_WIDTH 1 +#define MCDI_HEADER_NOT_EPOCH_LBN 21 +#define MCDI_HEADER_NOT_EPOCH_WIDTH 1 #define MCDI_HEADER_ERROR_LBN 22 #define MCDI_HEADER_ERROR_WIDTH 1 #define MCDI_HEADER_RESPONSE_LBN 23 @@ -122,12 +138,16 @@ #define MCDI_HEADER_XFLAGS_EVREQ 0x01 /* Maximum number of payload bytes */ +#define MCDI_CTL_SDU_LEN_MAX_V1 0xfc +#define MCDI_CTL_SDU_LEN_MAX_V2 0x400 + #ifdef WITH_MCDI_V2 -#define MCDI_CTL_SDU_LEN_MAX 0x400 +#define MCDI_CTL_SDU_LEN_MAX MCDI_CTL_SDU_LEN_MAX_V2 #else -#define MCDI_CTL_SDU_LEN_MAX 0xfc +#define MCDI_CTL_SDU_LEN_MAX MCDI_CTL_SDU_LEN_MAX_V1 #endif + /* The MC can generate events for two reasons: * - To complete a shared memory request if XFLAGS_EVREQ was set * - As a notification (link state, i2c event), controlled @@ -171,22 +191,114 @@ #define FSE_AZ_EV_CODE_MCDI_EVRESPONSE 0xc +/* Operation not permitted. */ +#define MC_CMD_ERR_EPERM 1 /* Non-existent command target */ #define MC_CMD_ERR_ENOENT 2 /* assert() has killed the MC */ #define MC_CMD_ERR_EINTR 4 +/* I/O failure */ +#define MC_CMD_ERR_EIO 5 +/* Already exists */ +#define MC_CMD_ERR_EEXIST 6 +/* Try again */ +#define MC_CMD_ERR_EAGAIN 11 +/* Out of memory */ +#define MC_CMD_ERR_ENOMEM 12 /* Caller does not hold required locks */ #define MC_CMD_ERR_EACCES 13 /* Resource is currently unavailable (e.g. lock contention) */ #define MC_CMD_ERR_EBUSY 16 +/* No such device */ +#define MC_CMD_ERR_ENODEV 19 /* Invalid argument to target */ #define MC_CMD_ERR_EINVAL 22 +/* Broken pipe */ +#define MC_CMD_ERR_EPIPE 32 +/* Read-only */ +#define MC_CMD_ERR_EROFS 30 +/* Out of range */ +#define MC_CMD_ERR_ERANGE 34 /* Non-recursive resource is already acquired */ #define MC_CMD_ERR_EDEADLK 35 /* Operation not implemented */ #define MC_CMD_ERR_ENOSYS 38 /* Operation timed out */ #define MC_CMD_ERR_ETIME 62 +/* Link has been severed */ +#define MC_CMD_ERR_ENOLINK 67 +/* Protocol error */ +#define MC_CMD_ERR_EPROTO 71 +/* Operation not supported */ +#define MC_CMD_ERR_ENOTSUP 95 +/* Address not available */ +#define MC_CMD_ERR_EADDRNOTAVAIL 99 +/* Not connected */ +#define MC_CMD_ERR_ENOTCONN 107 +/* Operation already in progress */ +#define MC_CMD_ERR_EALREADY 114 + +/* Resource allocation failed. */ +#define MC_CMD_ERR_ALLOC_FAIL 0x1000 +/* V-adaptor not found. */ +#define MC_CMD_ERR_NO_VADAPTOR 0x1001 +/* EVB port not found. */ +#define MC_CMD_ERR_NO_EVB_PORT 0x1002 +/* V-switch not found. */ +#define MC_CMD_ERR_NO_VSWITCH 0x1003 +/* Too many VLAN tags. */ +#define MC_CMD_ERR_VLAN_LIMIT 0x1004 +/* Bad PCI function number. */ +#define MC_CMD_ERR_BAD_PCI_FUNC 0x1005 +/* Invalid VLAN mode. */ +#define MC_CMD_ERR_BAD_VLAN_MODE 0x1006 +/* Invalid v-switch type. */ +#define MC_CMD_ERR_BAD_VSWITCH_TYPE 0x1007 +/* Invalid v-port type. */ +#define MC_CMD_ERR_BAD_VPORT_TYPE 0x1008 +/* MAC address exists. */ +#define MC_CMD_ERR_MAC_EXIST 0x1009 +/* Slave core not present */ +#define MC_CMD_ERR_SLAVE_NOT_PRESENT 0x100a +/* The datapath is disabled. */ +#define MC_CMD_ERR_DATAPATH_DISABLED 0x100b +/* The requesting client is not a function */ +#define MC_CMD_ERR_CLIENT_NOT_FN 0x100c +/* The requested operation might require the + command to be passed between MCs, and the + transport doesn't support that. Should + only ever been seen over the UART. */ +#define MC_CMD_ERR_TRANSPORT_NOPROXY 0x100d +/* VLAN tag(s) exists */ +#define MC_CMD_ERR_VLAN_EXIST 0x100e +/* No MAC address assigned to an EVB port */ +#define MC_CMD_ERR_NO_MAC_ADDR 0x100f +/* Notifies the driver that the request has been relayed + * to an admin function for authorization. The driver should + * wait for a PROXY_RESPONSE event and then resend its request. + * This error code is followed by a 32-bit handle that + * helps matching it with the respective PROXY_RESPONSE event. */ +#define MC_CMD_ERR_PROXY_PENDING 0x1010 +#define MC_CMD_ERR_PROXY_PENDING_HANDLE_OFST 4 +/* The request cannot be passed for authorization because + * another request from the same function is currently being + * authorized. The drvier should try again later. */ +#define MC_CMD_ERR_PROXY_INPROGRESS 0x1011 +/* Returned by MC_CMD_PROXY_COMPLETE if the caller is not the function + * that has enabled proxying or BLOCK_INDEX points to a function that + * doesn't await an authorization. */ +#define MC_CMD_ERR_PROXY_UNEXPECTED 0x1012 +/* This code is currently only used internally in FW. Its meaning is that + * an operation failed due to lack of SR-IOV privilege. + * Normally it is translated to EPERM by send_cmd_err(), + * but it may also be used to trigger some special mechanism + * for handling such case, e.g. to relay the failed request + * to a designated admin function for authorization. */ +#define MC_CMD_ERR_NO_PRIVILEGE 0x1013 +/* Workaround 26807 could not be turned on/off because some functions + * have already installed filters. See the comment at + * MC_CMD_WORKAROUND_BUG26807. */ +#define MC_CMD_ERR_FILTERS_PRESENT 0x1014 #define MC_CMD_ERR_CODE_OFST 0 @@ -204,9 +316,11 @@ /* Vectors in the boot ROM */ /* Point to the copycode entry point. */ -#define MC_BOOTROM_COPYCODE_VEC (0x7f4) +#define SIENA_MC_BOOTROM_COPYCODE_VEC (0x800 - 3 * 0x4) +#define HUNT_MC_BOOTROM_COPYCODE_VEC (0x8000 - 3 * 0x4) /* Points to the recovery mode entry point. */ -#define MC_BOOTROM_NOFLASH_VEC (0x7f8) +#define SIENA_MC_BOOTROM_NOFLASH_VEC (0x800 - 2 * 0x4) +#define HUNT_MC_BOOTROM_NOFLASH_VEC (0x8000 - 2 * 0x4) /* The command set exported by the boot ROM (MCDI v0) */ #define MC_CMD_GET_VERSION_V0_SUPPORTED_FUNCS { \ @@ -216,23 +330,28 @@ (1 << MC_CMD_GET_VERSION), \ 0, 0, 0 } -#define MC_CMD_SENSOR_INFO_OUT_OFFSET_OFST(_x) \ +#define MC_CMD_SENSOR_INFO_OUT_OFFSET_OFST(_x) \ (MC_CMD_SENSOR_ENTRY_OFST + (_x)) -#define MC_CMD_DBI_WRITE_IN_ADDRESS_OFST(n) ( \ - (MC_CMD_DBI_WRITE_IN_DBIWROP_OFST+ \ - MC_CMD_DBIWROP_TYPEDEF_ADDRESS_OFST)+ \ - ((n)*MC_CMD_DBIWROP_TYPEDEF_LEN)) +#define MC_CMD_DBI_WRITE_IN_ADDRESS_OFST(n) \ + (MC_CMD_DBI_WRITE_IN_DBIWROP_OFST + \ + MC_CMD_DBIWROP_TYPEDEF_ADDRESS_OFST + \ + (n) * MC_CMD_DBIWROP_TYPEDEF_LEN) -#define MC_CMD_DBI_WRITE_IN_BYTE_MASK_OFST(n) ( \ - (MC_CMD_DBI_WRITE_IN_DBIWROP_OFST+ \ - MC_CMD_DBIWROP_TYPEDEF_BYTE_MASK_OFST)+ \ - ((n)*MC_CMD_DBIWROP_TYPEDEF_LEN)) +#define MC_CMD_DBI_WRITE_IN_BYTE_MASK_OFST(n) \ + (MC_CMD_DBI_WRITE_IN_DBIWROP_OFST + \ + MC_CMD_DBIWROP_TYPEDEF_BYTE_MASK_OFST + \ + (n) * MC_CMD_DBIWROP_TYPEDEF_LEN) -#define MC_CMD_DBI_WRITE_IN_VALUE_OFST(n) ( \ - (MC_CMD_DBI_WRITE_IN_DBIWROP_OFST+ \ - MC_CMD_DBIWROP_TYPEDEF_VALUE_OFST)+ \ - ((n)*MC_CMD_DBIWROP_TYPEDEF_LEN)) +#define MC_CMD_DBI_WRITE_IN_VALUE_OFST(n) \ + (MC_CMD_DBI_WRITE_IN_DBIWROP_OFST + \ + MC_CMD_DBIWROP_TYPEDEF_VALUE_OFST + \ + (n) * MC_CMD_DBIWROP_TYPEDEF_LEN) + +/* This may be ORed with an EVB_PORT_ID_xxx constant to pass a non-default + * stack ID (which must be in the range 1-255) along with an EVB port ID. + */ +#define EVB_STACK_ID(n) (((n) & 0xff) << 16) #ifdef WITH_MCDI_V2 @@ -243,8 +362,6 @@ */ #define MC_CMD_ERR_ARG_OFST 4 -/* Try again */ -#define MC_CMD_ERR_EAGAIN 11 /* No space */ #define MC_CMD_ERR_ENOSPC 28 @@ -256,10 +373,14 @@ #define MCDI_EVENT_CONT_WIDTH 1 #define MCDI_EVENT_LEVEL_LBN 33 #define MCDI_EVENT_LEVEL_WIDTH 3 -#define MCDI_EVENT_LEVEL_INFO 0x0 /* enum */ -#define MCDI_EVENT_LEVEL_WARN 0x1 /* enum */ -#define MCDI_EVENT_LEVEL_ERR 0x2 /* enum */ -#define MCDI_EVENT_LEVEL_FATAL 0x3 /* enum */ +/* enum: Info. */ +#define MCDI_EVENT_LEVEL_INFO 0x0 +/* enum: Warning. */ +#define MCDI_EVENT_LEVEL_WARN 0x1 +/* enum: Error. */ +#define MCDI_EVENT_LEVEL_ERR 0x2 +/* enum: Fatal. */ +#define MCDI_EVENT_LEVEL_FATAL 0x3 #define MCDI_EVENT_DATA_OFST 0 #define MCDI_EVENT_CMDDONE_SEQ_LBN 0 #define MCDI_EVENT_CMDDONE_SEQ_WIDTH 8 @@ -271,9 +392,14 @@ #define MCDI_EVENT_LINKCHANGE_LP_CAP_WIDTH 16 #define MCDI_EVENT_LINKCHANGE_SPEED_LBN 16 #define MCDI_EVENT_LINKCHANGE_SPEED_WIDTH 4 -#define MCDI_EVENT_LINKCHANGE_SPEED_100M 0x1 /* enum */ -#define MCDI_EVENT_LINKCHANGE_SPEED_1G 0x2 /* enum */ -#define MCDI_EVENT_LINKCHANGE_SPEED_10G 0x3 /* enum */ +/* enum: 100Mbs */ +#define MCDI_EVENT_LINKCHANGE_SPEED_100M 0x1 +/* enum: 1Gbs */ +#define MCDI_EVENT_LINKCHANGE_SPEED_1G 0x2 +/* enum: 10Gbs */ +#define MCDI_EVENT_LINKCHANGE_SPEED_10G 0x3 +/* enum: 40Gbs */ +#define MCDI_EVENT_LINKCHANGE_SPEED_40G 0x4 #define MCDI_EVENT_LINKCHANGE_FCNTL_LBN 20 #define MCDI_EVENT_LINKCHANGE_FCNTL_WIDTH 4 #define MCDI_EVENT_LINKCHANGE_LINK_FLAGS_LBN 24 @@ -288,41 +414,94 @@ #define MCDI_EVENT_FWALERT_DATA_WIDTH 24 #define MCDI_EVENT_FWALERT_REASON_LBN 0 #define MCDI_EVENT_FWALERT_REASON_WIDTH 8 -#define MCDI_EVENT_FWALERT_REASON_SRAM_ACCESS 0x1 /* enum */ +/* enum: SRAM Access. */ +#define MCDI_EVENT_FWALERT_REASON_SRAM_ACCESS 0x1 #define MCDI_EVENT_FLR_VF_LBN 0 #define MCDI_EVENT_FLR_VF_WIDTH 8 #define MCDI_EVENT_TX_ERR_TXQ_LBN 0 #define MCDI_EVENT_TX_ERR_TXQ_WIDTH 12 #define MCDI_EVENT_TX_ERR_TYPE_LBN 12 #define MCDI_EVENT_TX_ERR_TYPE_WIDTH 4 -#define MCDI_EVENT_TX_ERR_DL_FAIL 0x1 /* enum */ -#define MCDI_EVENT_TX_ERR_NO_EOP 0x2 /* enum */ -#define MCDI_EVENT_TX_ERR_2BIG 0x3 /* enum */ +/* enum: Descriptor loader reported failure */ +#define MCDI_EVENT_TX_ERR_DL_FAIL 0x1 +/* enum: Descriptor ring empty and no EOP seen for packet */ +#define MCDI_EVENT_TX_ERR_NO_EOP 0x2 +/* enum: Overlength packet */ +#define MCDI_EVENT_TX_ERR_2BIG 0x3 +/* enum: Malformed option descriptor */ +#define MCDI_EVENT_TX_BAD_OPTDESC 0x5 +/* enum: Option descriptor part way through a packet */ +#define MCDI_EVENT_TX_OPT_IN_PKT 0x8 +/* enum: DMA or PIO data access error */ +#define MCDI_EVENT_TX_ERR_BAD_DMA_OR_PIO 0x9 #define MCDI_EVENT_TX_ERR_INFO_LBN 16 #define MCDI_EVENT_TX_ERR_INFO_WIDTH 16 +#define MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN 12 +#define MCDI_EVENT_TX_FLUSH_TO_DRIVER_WIDTH 1 #define MCDI_EVENT_TX_FLUSH_TXQ_LBN 0 #define MCDI_EVENT_TX_FLUSH_TXQ_WIDTH 12 #define MCDI_EVENT_PTP_ERR_TYPE_LBN 0 #define MCDI_EVENT_PTP_ERR_TYPE_WIDTH 8 -#define MCDI_EVENT_PTP_ERR_PLL_LOST 0x1 /* enum */ -#define MCDI_EVENT_PTP_ERR_FILTER 0x2 /* enum */ -#define MCDI_EVENT_PTP_ERR_FIFO 0x3 /* enum */ -#define MCDI_EVENT_PTP_ERR_QUEUE 0x4 /* enum */ +/* enum: PLL lost lock */ +#define MCDI_EVENT_PTP_ERR_PLL_LOST 0x1 +/* enum: Filter overflow (PDMA) */ +#define MCDI_EVENT_PTP_ERR_FILTER 0x2 +/* enum: FIFO overflow (FPGA) */ +#define MCDI_EVENT_PTP_ERR_FIFO 0x3 +/* enum: Merge queue overflow */ +#define MCDI_EVENT_PTP_ERR_QUEUE 0x4 #define MCDI_EVENT_AOE_ERR_TYPE_LBN 0 #define MCDI_EVENT_AOE_ERR_TYPE_WIDTH 8 -#define MCDI_EVENT_AOE_NO_LOAD 0x1 /* enum */ -#define MCDI_EVENT_AOE_FC_ASSERT 0x2 /* enum */ -#define MCDI_EVENT_AOE_FC_WATCHDOG 0x3 /* enum */ -#define MCDI_EVENT_AOE_FC_NO_START 0x4 /* enum */ -#define MCDI_EVENT_AOE_FAULT 0x5 /* enum */ -#define MCDI_EVENT_AOE_CPLD_REPROGRAMMED 0x6 /* enum */ -#define MCDI_EVENT_AOE_LOAD 0x7 /* enum */ -#define MCDI_EVENT_AOE_DMA 0x8 /* enum */ -#define MCDI_EVENT_AOE_BYTEBLASTER 0x9 /* enum */ -#define MCDI_EVENT_AOE_DDR_ECC_STATUS 0xa /* enum */ -#define MCDI_EVENT_AOE_PTP_STATUS 0xb /* enum */ +/* enum: AOE failed to load - no valid image? */ +#define MCDI_EVENT_AOE_NO_LOAD 0x1 +/* enum: AOE FC reported an exception */ +#define MCDI_EVENT_AOE_FC_ASSERT 0x2 +/* enum: AOE FC watchdogged */ +#define MCDI_EVENT_AOE_FC_WATCHDOG 0x3 +/* enum: AOE FC failed to start */ +#define MCDI_EVENT_AOE_FC_NO_START 0x4 +/* enum: Generic AOE fault - likely to have been reported via other means too + * but intended for use by aoex driver. + */ +#define MCDI_EVENT_AOE_FAULT 0x5 +/* enum: Results of reprogramming the CPLD (status in AOE_ERR_DATA) */ +#define MCDI_EVENT_AOE_CPLD_REPROGRAMMED 0x6 +/* enum: AOE loaded successfully */ +#define MCDI_EVENT_AOE_LOAD 0x7 +/* enum: AOE DMA operation completed (LSB of HOST_HANDLE in AOE_ERR_DATA) */ +#define MCDI_EVENT_AOE_DMA 0x8 +/* enum: AOE byteblaster connected/disconnected (Connection status in + * AOE_ERR_DATA) + */ +#define MCDI_EVENT_AOE_BYTEBLASTER 0x9 +/* enum: DDR ECC status update */ +#define MCDI_EVENT_AOE_DDR_ECC_STATUS 0xa +/* enum: PTP status update */ +#define MCDI_EVENT_AOE_PTP_STATUS 0xb #define MCDI_EVENT_AOE_ERR_DATA_LBN 8 #define MCDI_EVENT_AOE_ERR_DATA_WIDTH 8 +#define MCDI_EVENT_RX_ERR_RXQ_LBN 0 +#define MCDI_EVENT_RX_ERR_RXQ_WIDTH 12 +#define MCDI_EVENT_RX_ERR_TYPE_LBN 12 +#define MCDI_EVENT_RX_ERR_TYPE_WIDTH 4 +#define MCDI_EVENT_RX_ERR_INFO_LBN 16 +#define MCDI_EVENT_RX_ERR_INFO_WIDTH 16 +#define MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN 12 +#define MCDI_EVENT_RX_FLUSH_TO_DRIVER_WIDTH 1 +#define MCDI_EVENT_RX_FLUSH_RXQ_LBN 0 +#define MCDI_EVENT_RX_FLUSH_RXQ_WIDTH 12 +#define MCDI_EVENT_MC_REBOOT_COUNT_LBN 0 +#define MCDI_EVENT_MC_REBOOT_COUNT_WIDTH 16 +#define MCDI_EVENT_MUM_ERR_TYPE_LBN 0 +#define MCDI_EVENT_MUM_ERR_TYPE_WIDTH 8 +/* enum: MUM failed to load - no valid image? */ +#define MCDI_EVENT_MUM_NO_LOAD 0x1 +/* enum: MUM f/w reported an exception */ +#define MCDI_EVENT_MUM_ASSERT 0x2 +/* enum: MUM not kicking watchdog */ +#define MCDI_EVENT_MUM_WATCHDOG 0x3 +#define MCDI_EVENT_MUM_ERR_DATA_LBN 8 +#define MCDI_EVENT_MUM_ERR_DATA_WIDTH 8 #define MCDI_EVENT_DATA_LBN 0 #define MCDI_EVENT_DATA_WIDTH 32 #define MCDI_EVENT_SRC_LBN 36 @@ -331,24 +510,74 @@ #define MCDI_EVENT_EV_CODE_WIDTH 4 #define MCDI_EVENT_CODE_LBN 44 #define MCDI_EVENT_CODE_WIDTH 8 -#define MCDI_EVENT_CODE_BADSSERT 0x1 /* enum */ -#define MCDI_EVENT_CODE_PMNOTICE 0x2 /* enum */ -#define MCDI_EVENT_CODE_CMDDONE 0x3 /* enum */ -#define MCDI_EVENT_CODE_LINKCHANGE 0x4 /* enum */ -#define MCDI_EVENT_CODE_SENSOREVT 0x5 /* enum */ -#define MCDI_EVENT_CODE_SCHEDERR 0x6 /* enum */ -#define MCDI_EVENT_CODE_REBOOT 0x7 /* enum */ -#define MCDI_EVENT_CODE_MAC_STATS_DMA 0x8 /* enum */ -#define MCDI_EVENT_CODE_FWALERT 0x9 /* enum */ -#define MCDI_EVENT_CODE_FLR 0xa /* enum */ -#define MCDI_EVENT_CODE_TX_ERR 0xb /* enum */ -#define MCDI_EVENT_CODE_TX_FLUSH 0xc /* enum */ -#define MCDI_EVENT_CODE_PTP_RX 0xd /* enum */ -#define MCDI_EVENT_CODE_PTP_FAULT 0xe /* enum */ -#define MCDI_EVENT_CODE_PTP_PPS 0xf /* enum */ -#define MCDI_EVENT_CODE_AOE 0x12 /* enum */ -#define MCDI_EVENT_CODE_VCAL_FAIL 0x13 /* enum */ -#define MCDI_EVENT_CODE_HW_PPS 0x14 /* enum */ +/* enum: Event generated by host software */ +#define MCDI_EVENT_SW_EVENT 0x0 +/* enum: Bad assert. */ +#define MCDI_EVENT_CODE_BADSSERT 0x1 +/* enum: PM Notice. */ +#define MCDI_EVENT_CODE_PMNOTICE 0x2 +/* enum: Command done. */ +#define MCDI_EVENT_CODE_CMDDONE 0x3 +/* enum: Link change. */ +#define MCDI_EVENT_CODE_LINKCHANGE 0x4 +/* enum: Sensor Event. */ +#define MCDI_EVENT_CODE_SENSOREVT 0x5 +/* enum: Schedule error. */ +#define MCDI_EVENT_CODE_SCHEDERR 0x6 +/* enum: Reboot. */ +#define MCDI_EVENT_CODE_REBOOT 0x7 +/* enum: Mac stats DMA. */ +#define MCDI_EVENT_CODE_MAC_STATS_DMA 0x8 +/* enum: Firmware alert. */ +#define MCDI_EVENT_CODE_FWALERT 0x9 +/* enum: Function level reset. */ +#define MCDI_EVENT_CODE_FLR 0xa +/* enum: Transmit error */ +#define MCDI_EVENT_CODE_TX_ERR 0xb +/* enum: Tx flush has completed */ +#define MCDI_EVENT_CODE_TX_FLUSH 0xc +/* enum: PTP packet received timestamp */ +#define MCDI_EVENT_CODE_PTP_RX 0xd +/* enum: PTP NIC failure */ +#define MCDI_EVENT_CODE_PTP_FAULT 0xe +/* enum: PTP PPS event */ +#define MCDI_EVENT_CODE_PTP_PPS 0xf +/* enum: Rx flush has completed */ +#define MCDI_EVENT_CODE_RX_FLUSH 0x10 +/* enum: Receive error */ +#define MCDI_EVENT_CODE_RX_ERR 0x11 +/* enum: AOE fault */ +#define MCDI_EVENT_CODE_AOE 0x12 +/* enum: Network port calibration failed (VCAL). */ +#define MCDI_EVENT_CODE_VCAL_FAIL 0x13 +/* enum: HW PPS event */ +#define MCDI_EVENT_CODE_HW_PPS 0x14 +/* enum: The MC has rebooted (huntington and later, siena uses CODE_REBOOT and + * a different format) + */ +#define MCDI_EVENT_CODE_MC_REBOOT 0x15 +/* enum: the MC has detected a parity error */ +#define MCDI_EVENT_CODE_PAR_ERR 0x16 +/* enum: the MC has detected a correctable error */ +#define MCDI_EVENT_CODE_ECC_CORR_ERR 0x17 +/* enum: the MC has detected an uncorrectable error */ +#define MCDI_EVENT_CODE_ECC_FATAL_ERR 0x18 +/* enum: The MC has entered offline BIST mode */ +#define MCDI_EVENT_CODE_MC_BIST 0x19 +/* enum: PTP tick event providing current NIC time */ +#define MCDI_EVENT_CODE_PTP_TIME 0x1a +/* enum: MUM fault */ +#define MCDI_EVENT_CODE_MUM 0x1b +/* enum: notify the designated PF of a new authorization request */ +#define MCDI_EVENT_CODE_PROXY_REQUEST 0x1c +/* enum: notify a function that awaits an authorization that its request has + * been processed and it may now resend the command + */ +#define MCDI_EVENT_CODE_PROXY_RESPONSE 0x1d +/* enum: Artificial event generated by host and posted via MC for test + * purposes. + */ +#define MCDI_EVENT_CODE_TESTGEN 0xfa #define MCDI_EVENT_CMDDONE_DATA_OFST 0 #define MCDI_EVENT_CMDDONE_DATA_LBN 0 #define MCDI_EVENT_CMDDONE_DATA_WIDTH 32 @@ -364,15 +593,81 @@ #define MCDI_EVENT_TX_ERR_DATA_OFST 0 #define MCDI_EVENT_TX_ERR_DATA_LBN 0 #define MCDI_EVENT_TX_ERR_DATA_WIDTH 32 +/* For CODE_PTP_RX, CODE_PTP_PPS and CODE_HW_PPS events the seconds field of + * timestamp + */ #define MCDI_EVENT_PTP_SECONDS_OFST 0 #define MCDI_EVENT_PTP_SECONDS_LBN 0 #define MCDI_EVENT_PTP_SECONDS_WIDTH 32 +/* For CODE_PTP_RX, CODE_PTP_PPS and CODE_HW_PPS events the major field of + * timestamp + */ +#define MCDI_EVENT_PTP_MAJOR_OFST 0 +#define MCDI_EVENT_PTP_MAJOR_LBN 0 +#define MCDI_EVENT_PTP_MAJOR_WIDTH 32 +/* For CODE_PTP_RX, CODE_PTP_PPS and CODE_HW_PPS events the nanoseconds field + * of timestamp + */ #define MCDI_EVENT_PTP_NANOSECONDS_OFST 0 #define MCDI_EVENT_PTP_NANOSECONDS_LBN 0 #define MCDI_EVENT_PTP_NANOSECONDS_WIDTH 32 +/* For CODE_PTP_RX, CODE_PTP_PPS and CODE_HW_PPS events the minor field of + * timestamp + */ +#define MCDI_EVENT_PTP_MINOR_OFST 0 +#define MCDI_EVENT_PTP_MINOR_LBN 0 +#define MCDI_EVENT_PTP_MINOR_WIDTH 32 +/* For CODE_PTP_RX events, the lowest four bytes of sourceUUID from PTP packet + */ #define MCDI_EVENT_PTP_UUID_OFST 0 #define MCDI_EVENT_PTP_UUID_LBN 0 #define MCDI_EVENT_PTP_UUID_WIDTH 32 +#define MCDI_EVENT_RX_ERR_DATA_OFST 0 +#define MCDI_EVENT_RX_ERR_DATA_LBN 0 +#define MCDI_EVENT_RX_ERR_DATA_WIDTH 32 +#define MCDI_EVENT_PAR_ERR_DATA_OFST 0 +#define MCDI_EVENT_PAR_ERR_DATA_LBN 0 +#define MCDI_EVENT_PAR_ERR_DATA_WIDTH 32 +#define MCDI_EVENT_ECC_CORR_ERR_DATA_OFST 0 +#define MCDI_EVENT_ECC_CORR_ERR_DATA_LBN 0 +#define MCDI_EVENT_ECC_CORR_ERR_DATA_WIDTH 32 +#define MCDI_EVENT_ECC_FATAL_ERR_DATA_OFST 0 +#define MCDI_EVENT_ECC_FATAL_ERR_DATA_LBN 0 +#define MCDI_EVENT_ECC_FATAL_ERR_DATA_WIDTH 32 +/* For CODE_PTP_TIME events, the major value of the PTP clock */ +#define MCDI_EVENT_PTP_TIME_MAJOR_OFST 0 +#define MCDI_EVENT_PTP_TIME_MAJOR_LBN 0 +#define MCDI_EVENT_PTP_TIME_MAJOR_WIDTH 32 +/* For CODE_PTP_TIME events, bits 19-26 of the minor value of the PTP clock */ +#define MCDI_EVENT_PTP_TIME_MINOR_26_19_LBN 36 +#define MCDI_EVENT_PTP_TIME_MINOR_26_19_WIDTH 8 +/* For CODE_PTP_TIME events where report sync status is enabled, indicates + * whether the NIC clock has ever been set + */ +#define MCDI_EVENT_PTP_TIME_NIC_CLOCK_VALID_LBN 36 +#define MCDI_EVENT_PTP_TIME_NIC_CLOCK_VALID_WIDTH 1 +/* For CODE_PTP_TIME events where report sync status is enabled, indicates + * whether the NIC and System clocks are in sync + */ +#define MCDI_EVENT_PTP_TIME_HOST_NIC_IN_SYNC_LBN 37 +#define MCDI_EVENT_PTP_TIME_HOST_NIC_IN_SYNC_WIDTH 1 +/* For CODE_PTP_TIME events where report sync status is enabled, bits 21-26 of + * the minor value of the PTP clock + */ +#define MCDI_EVENT_PTP_TIME_MINOR_26_21_LBN 38 +#define MCDI_EVENT_PTP_TIME_MINOR_26_21_WIDTH 6 +#define MCDI_EVENT_PROXY_REQUEST_BUFF_INDEX_OFST 0 +#define MCDI_EVENT_PROXY_REQUEST_BUFF_INDEX_LBN 0 +#define MCDI_EVENT_PROXY_REQUEST_BUFF_INDEX_WIDTH 32 +#define MCDI_EVENT_PROXY_RESPONSE_HANDLE_OFST 0 +#define MCDI_EVENT_PROXY_RESPONSE_HANDLE_LBN 0 +#define MCDI_EVENT_PROXY_RESPONSE_HANDLE_WIDTH 32 +/* Zero means that the request has been completed or authorized, and the driver + * should resend it. A non-zero value means that the authorization has been + * denied, and gives the reason. Typically it will be EPERM. + */ +#define MCDI_EVENT_PROXY_RESPONSE_RC_LBN 36 +#define MCDI_EVENT_PROXY_RESPONSE_RC_WIDTH 8 /* FCDI_EVENT structuredef */ #define FCDI_EVENT_LEN 8 @@ -380,10 +675,14 @@ #define FCDI_EVENT_CONT_WIDTH 1 #define FCDI_EVENT_LEVEL_LBN 33 #define FCDI_EVENT_LEVEL_WIDTH 3 -#define FCDI_EVENT_LEVEL_INFO 0x0 /* enum */ -#define FCDI_EVENT_LEVEL_WARN 0x1 /* enum */ -#define FCDI_EVENT_LEVEL_ERR 0x2 /* enum */ -#define FCDI_EVENT_LEVEL_FATAL 0x3 /* enum */ +/* enum: Info. */ +#define FCDI_EVENT_LEVEL_INFO 0x0 +/* enum: Warning. */ +#define FCDI_EVENT_LEVEL_WARN 0x1 +/* enum: Error. */ +#define FCDI_EVENT_LEVEL_ERR 0x2 +/* enum: Fatal. */ +#define FCDI_EVENT_LEVEL_FATAL 0x3 #define FCDI_EVENT_DATA_OFST 0 #define FCDI_EVENT_LINK_STATE_STATUS_LBN 0 #define FCDI_EVENT_LINK_STATE_STATUS_WIDTH 1 @@ -397,15 +696,26 @@ #define FCDI_EVENT_EV_CODE_WIDTH 4 #define FCDI_EVENT_CODE_LBN 44 #define FCDI_EVENT_CODE_WIDTH 8 -#define FCDI_EVENT_CODE_REBOOT 0x1 /* enum */ -#define FCDI_EVENT_CODE_ASSERT 0x2 /* enum */ -#define FCDI_EVENT_CODE_DDR_TEST_RESULT 0x3 /* enum */ -#define FCDI_EVENT_CODE_LINK_STATE 0x4 /* enum */ -#define FCDI_EVENT_CODE_TIMED_READ 0x5 /* enum */ -#define FCDI_EVENT_CODE_PPS_IN 0x6 /* enum */ -#define FCDI_EVENT_CODE_PTP_TICK 0x7 /* enum */ -#define FCDI_EVENT_CODE_DDR_ECC_STATUS 0x8 /* enum */ -#define FCDI_EVENT_CODE_PTP_STATUS 0x9 /* enum */ +/* enum: The FC was rebooted. */ +#define FCDI_EVENT_CODE_REBOOT 0x1 +/* enum: Bad assert. */ +#define FCDI_EVENT_CODE_ASSERT 0x2 +/* enum: DDR3 test result. */ +#define FCDI_EVENT_CODE_DDR_TEST_RESULT 0x3 +/* enum: Link status. */ +#define FCDI_EVENT_CODE_LINK_STATE 0x4 +/* enum: A timed read is ready to be serviced. */ +#define FCDI_EVENT_CODE_TIMED_READ 0x5 +/* enum: One or more PPS IN events */ +#define FCDI_EVENT_CODE_PPS_IN 0x6 +/* enum: Tick event from PTP clock */ +#define FCDI_EVENT_CODE_PTP_TICK 0x7 +/* enum: ECC error counters */ +#define FCDI_EVENT_CODE_DDR_ECC_STATUS 0x8 +/* enum: Current status of PTP */ +#define FCDI_EVENT_CODE_PTP_STATUS 0x9 +/* enum: Port id config to map MC-FC port idx */ +#define FCDI_EVENT_CODE_PORT_CONFIG 0xa #define FCDI_EVENT_ASSERT_INSTR_ADDRESS_OFST 0 #define FCDI_EVENT_ASSERT_INSTR_ADDRESS_LBN 0 #define FCDI_EVENT_ASSERT_INSTR_ADDRESS_WIDTH 32 @@ -430,20 +740,36 @@ #define FCDI_EVENT_DDR_ECC_STATUS_STATUS_OFST 0 #define FCDI_EVENT_DDR_ECC_STATUS_STATUS_LBN 0 #define FCDI_EVENT_DDR_ECC_STATUS_STATUS_WIDTH 32 +/* Index of MC port being referred to */ +#define FCDI_EVENT_PORT_CONFIG_SRC_LBN 36 +#define FCDI_EVENT_PORT_CONFIG_SRC_WIDTH 8 +/* FC Port index that matches the MC port index in SRC */ +#define FCDI_EVENT_PORT_CONFIG_DATA_OFST 0 +#define FCDI_EVENT_PORT_CONFIG_DATA_LBN 0 +#define FCDI_EVENT_PORT_CONFIG_DATA_WIDTH 32 -/* FCDI_EXTENDED_EVENT_PPS structuredef */ +/* FCDI_EXTENDED_EVENT_PPS structuredef: Extended FCDI event to send PPS events + * to the MC. Note that this structure | is overlayed over a normal FCDI event + * such that bits 32-63 containing | event code, level, source etc remain the + * same. In this case the data | field of the header is defined to be the + * number of timestamps + */ #define FCDI_EXTENDED_EVENT_PPS_LENMIN 16 #define FCDI_EXTENDED_EVENT_PPS_LENMAX 248 #define FCDI_EXTENDED_EVENT_PPS_LEN(num) (8+8*(num)) +/* Number of timestamps following */ #define FCDI_EXTENDED_EVENT_PPS_COUNT_OFST 0 #define FCDI_EXTENDED_EVENT_PPS_COUNT_LBN 0 #define FCDI_EXTENDED_EVENT_PPS_COUNT_WIDTH 32 +/* Seconds field of a timestamp record */ #define FCDI_EXTENDED_EVENT_PPS_SECONDS_OFST 8 #define FCDI_EXTENDED_EVENT_PPS_SECONDS_LBN 64 #define FCDI_EXTENDED_EVENT_PPS_SECONDS_WIDTH 32 +/* Nanoseconds field of a timestamp record */ #define FCDI_EXTENDED_EVENT_PPS_NANOSECONDS_OFST 12 #define FCDI_EXTENDED_EVENT_PPS_NANOSECONDS_LBN 96 #define FCDI_EXTENDED_EVENT_PPS_NANOSECONDS_WIDTH 32 +/* Timestamp records comprising the event */ #define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_OFST 8 #define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LEN 8 #define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_OFST 8 @@ -453,12 +779,99 @@ #define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LBN 64 #define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_WIDTH 64 +/* MUM_EVENT structuredef */ +#define MUM_EVENT_LEN 8 +#define MUM_EVENT_CONT_LBN 32 +#define MUM_EVENT_CONT_WIDTH 1 +#define MUM_EVENT_LEVEL_LBN 33 +#define MUM_EVENT_LEVEL_WIDTH 3 +/* enum: Info. */ +#define MUM_EVENT_LEVEL_INFO 0x0 +/* enum: Warning. */ +#define MUM_EVENT_LEVEL_WARN 0x1 +/* enum: Error. */ +#define MUM_EVENT_LEVEL_ERR 0x2 +/* enum: Fatal. */ +#define MUM_EVENT_LEVEL_FATAL 0x3 +#define MUM_EVENT_DATA_OFST 0 +#define MUM_EVENT_SENSOR_ID_LBN 0 +#define MUM_EVENT_SENSOR_ID_WIDTH 8 +/* Enum values, see field(s): */ +/* MC_CMD_SENSOR_INFO/MC_CMD_SENSOR_INFO_OUT/MASK */ +#define MUM_EVENT_SENSOR_STATE_LBN 8 +#define MUM_EVENT_SENSOR_STATE_WIDTH 8 +#define MUM_EVENT_PORT_PHY_READY_LBN 0 +#define MUM_EVENT_PORT_PHY_READY_WIDTH 1 +#define MUM_EVENT_PORT_PHY_LINK_UP_LBN 1 +#define MUM_EVENT_PORT_PHY_LINK_UP_WIDTH 1 +#define MUM_EVENT_PORT_PHY_TX_LOL_LBN 2 +#define MUM_EVENT_PORT_PHY_TX_LOL_WIDTH 1 +#define MUM_EVENT_PORT_PHY_RX_LOL_LBN 3 +#define MUM_EVENT_PORT_PHY_RX_LOL_WIDTH 1 +#define MUM_EVENT_PORT_PHY_TX_LOS_LBN 4 +#define MUM_EVENT_PORT_PHY_TX_LOS_WIDTH 1 +#define MUM_EVENT_PORT_PHY_RX_LOS_LBN 5 +#define MUM_EVENT_PORT_PHY_RX_LOS_WIDTH 1 +#define MUM_EVENT_PORT_PHY_TX_FAULT_LBN 6 +#define MUM_EVENT_PORT_PHY_TX_FAULT_WIDTH 1 +#define MUM_EVENT_DATA_LBN 0 +#define MUM_EVENT_DATA_WIDTH 32 +#define MUM_EVENT_SRC_LBN 36 +#define MUM_EVENT_SRC_WIDTH 8 +#define MUM_EVENT_EV_CODE_LBN 60 +#define MUM_EVENT_EV_CODE_WIDTH 4 +#define MUM_EVENT_CODE_LBN 44 +#define MUM_EVENT_CODE_WIDTH 8 +/* enum: The MUM was rebooted. */ +#define MUM_EVENT_CODE_REBOOT 0x1 +/* enum: Bad assert. */ +#define MUM_EVENT_CODE_ASSERT 0x2 +/* enum: Sensor failure. */ +#define MUM_EVENT_CODE_SENSOR 0x3 +/* enum: Link fault has been asserted, or has cleared. */ +#define MUM_EVENT_CODE_QSFP_LASI_INTERRUPT 0x4 +#define MUM_EVENT_SENSOR_DATA_OFST 0 +#define MUM_EVENT_SENSOR_DATA_LBN 0 +#define MUM_EVENT_SENSOR_DATA_WIDTH 32 +#define MUM_EVENT_PORT_PHY_FLAGS_OFST 0 +#define MUM_EVENT_PORT_PHY_FLAGS_LBN 0 +#define MUM_EVENT_PORT_PHY_FLAGS_WIDTH 32 +#define MUM_EVENT_PORT_PHY_COPPER_LEN_OFST 0 +#define MUM_EVENT_PORT_PHY_COPPER_LEN_LBN 0 +#define MUM_EVENT_PORT_PHY_COPPER_LEN_WIDTH 32 +#define MUM_EVENT_PORT_PHY_CAPS_OFST 0 +#define MUM_EVENT_PORT_PHY_CAPS_LBN 0 +#define MUM_EVENT_PORT_PHY_CAPS_WIDTH 32 +#define MUM_EVENT_PORT_PHY_TECH_OFST 0 +#define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_UNKNOWN 0x0 /* enum */ +#define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_OPTICAL 0x1 /* enum */ +#define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_COPPER_PASSIVE 0x2 /* enum */ +#define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_COPPER_PASSIVE_EQUALIZED 0x3 /* enum */ +#define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_COPPER_ACTIVE_LIMITING 0x4 /* enum */ +#define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_COPPER_ACTIVE_LINEAR 0x5 /* enum */ +#define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_BASE_T 0x6 /* enum */ +#define MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_LOOPBACK_PASSIVE 0x7 /* enum */ +#define MUM_EVENT_PORT_PHY_TECH_LBN 0 +#define MUM_EVENT_PORT_PHY_TECH_WIDTH 32 +#define MUM_EVENT_PORT_PHY_SRC_DATA_ID_LBN 36 +#define MUM_EVENT_PORT_PHY_SRC_DATA_ID_WIDTH 4 +#define MUM_EVENT_PORT_PHY_SRC_DATA_ID_FLAGS 0x0 /* enum */ +#define MUM_EVENT_PORT_PHY_SRC_DATA_ID_COPPER_LEN 0x1 /* enum */ +#define MUM_EVENT_PORT_PHY_SRC_DATA_ID_CAPS 0x2 /* enum */ +#define MUM_EVENT_PORT_PHY_SRC_DATA_ID_TECH 0x3 /* enum */ +#define MUM_EVENT_PORT_PHY_SRC_DATA_ID_MAX 0x4 /* enum */ +#define MUM_EVENT_PORT_PHY_SRC_PORT_NO_LBN 40 +#define MUM_EVENT_PORT_PHY_SRC_PORT_NO_WIDTH 4 + /***********************************/ /* MC_CMD_READ32 * Read multiple 32byte words from MC memory. */ #define MC_CMD_READ32 0x1 +#undef MC_CMD_0x1_PRIVILEGE_CTG + +#define MC_CMD_0x1_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_READ32_IN msgrequest */ #define MC_CMD_READ32_IN_LEN 8 @@ -480,6 +893,9 @@ * Write multiple 32byte words to MC memory. */ #define MC_CMD_WRITE32 0x2 +#undef MC_CMD_0x2_PRIVILEGE_CTG + +#define MC_CMD_0x2_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_WRITE32_IN msgrequest */ #define MC_CMD_WRITE32_IN_LENMIN 8 @@ -500,26 +916,64 @@ * Copy MC code between two locations and jump. */ #define MC_CMD_COPYCODE 0x3 +#undef MC_CMD_0x3_PRIVILEGE_CTG + +#define MC_CMD_0x3_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_COPYCODE_IN msgrequest */ #define MC_CMD_COPYCODE_IN_LEN 16 +/* Source address + * + * The main image should be entered via a copy of a single word from and to a + * magic address, which controls various aspects of the boot. The magic address + * is a bitfield, with each bit as documented below. + */ #define MC_CMD_COPYCODE_IN_SRC_ADDR_OFST 0 +/* enum: Deprecated; equivalent to setting BOOT_MAGIC_PRESENT (see below) */ +#define MC_CMD_COPYCODE_HUNT_NO_MAGIC_ADDR 0x10000 +/* enum: Deprecated; equivalent to setting BOOT_MAGIC_PRESENT and + * BOOT_MAGIC_SATELLITE_CPUS_NOT_LOADED (see below) + */ +#define MC_CMD_COPYCODE_HUNT_NO_DATAPATH_MAGIC_ADDR 0x1d0d0 +/* enum: Deprecated; equivalent to setting BOOT_MAGIC_PRESENT, + * BOOT_MAGIC_SATELLITE_CPUS_NOT_LOADED and BOOT_MAGIC_IGNORE_CONFIG (see + * below) + */ +#define MC_CMD_COPYCODE_HUNT_IGNORE_CONFIG_MAGIC_ADDR 0x1badc +#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_PRESENT_LBN 17 +#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_PRESENT_WIDTH 1 +#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SATELLITE_CPUS_NOT_LOADED_LBN 2 +#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SATELLITE_CPUS_NOT_LOADED_WIDTH 1 +#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_IGNORE_CONFIG_LBN 3 +#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_IGNORE_CONFIG_WIDTH 1 +#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SKIP_BOOT_ICORE_SYNC_LBN 4 +#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SKIP_BOOT_ICORE_SYNC_WIDTH 1 +#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_FORCE_STANDALONE_LBN 5 +#define MC_CMD_COPYCODE_IN_BOOT_MAGIC_FORCE_STANDALONE_WIDTH 1 +/* Destination address */ #define MC_CMD_COPYCODE_IN_DEST_ADDR_OFST 4 #define MC_CMD_COPYCODE_IN_NUMWORDS_OFST 8 +/* Address of where to jump after copy. */ #define MC_CMD_COPYCODE_IN_JUMP_OFST 12 -#define MC_CMD_COPYCODE_JUMP_NONE 0x1 /* enum */ +/* enum: Control should return to the caller rather than jumping */ +#define MC_CMD_COPYCODE_JUMP_NONE 0x1 /* MC_CMD_COPYCODE_OUT msgresponse */ #define MC_CMD_COPYCODE_OUT_LEN 0 /***********************************/ -/* MC_CMD_SET_FUNC +/* MC_CMD_SET_FUNC + * Select function for function-specific commands. */ -#define MC_CMD_SET_FUNC 0x4 +#define MC_CMD_SET_FUNC 0x4 +#undef MC_CMD_0x4_PRIVILEGE_CTG + +#define MC_CMD_0x4_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_SET_FUNC_IN msgrequest */ #define MC_CMD_SET_FUNC_IN_LEN 4 +/* Set function */ #define MC_CMD_SET_FUNC_IN_FUNC_OFST 0 /* MC_CMD_SET_FUNC_OUT msgresponse */ @@ -528,15 +982,22 @@ /***********************************/ /* MC_CMD_GET_BOOT_STATUS + * Get the instruction address from which the MC booted. */ #define MC_CMD_GET_BOOT_STATUS 0x5 +#undef MC_CMD_0x5_PRIVILEGE_CTG + +#define MC_CMD_0x5_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_GET_BOOT_STATUS_IN msgrequest */ #define MC_CMD_GET_BOOT_STATUS_IN_LEN 0 /* MC_CMD_GET_BOOT_STATUS_OUT msgresponse */ #define MC_CMD_GET_BOOT_STATUS_OUT_LEN 8 +/* ?? */ #define MC_CMD_GET_BOOT_STATUS_OUT_BOOT_OFFSET_OFST 0 +/* enum: indicates that the MC wasn't flash booted */ +#define MC_CMD_GET_BOOT_STATUS_OUT_BOOT_OFFSET_NULL 0xdeadbeef #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_OFST 4 #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_WATCHDOG_LBN 0 #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_WATCHDOG_WIDTH 1 @@ -547,41 +1008,69 @@ /***********************************/ -/* MC_CMD_GET_ASSERTS - * Get and clear any assertion status. +/* MC_CMD_GET_ASSERTS + * Get (and optionally clear) the current assertion status. Only + * OUT.GLOBAL_FLAGS is guaranteed to exist in the completion payload. The other + * fields will only be present if OUT.GLOBAL_FLAGS != NO_FAILS */ -#define MC_CMD_GET_ASSERTS 0x6 +#define MC_CMD_GET_ASSERTS 0x6 +#undef MC_CMD_0x6_PRIVILEGE_CTG + +#define MC_CMD_0x6_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_GET_ASSERTS_IN msgrequest */ #define MC_CMD_GET_ASSERTS_IN_LEN 4 +/* Set to clear assertion */ #define MC_CMD_GET_ASSERTS_IN_CLEAR_OFST 0 /* MC_CMD_GET_ASSERTS_OUT msgresponse */ #define MC_CMD_GET_ASSERTS_OUT_LEN 140 +/* Assertion status flag. */ #define MC_CMD_GET_ASSERTS_OUT_GLOBAL_FLAGS_OFST 0 -#define MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS 0x1 /* enum */ -#define MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL 0x2 /* enum */ -#define MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL 0x3 /* enum */ -#define MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED 0x4 /* enum */ +/* enum: No assertions have failed. */ +#define MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS 0x1 +/* enum: A system-level assertion has failed. */ +#define MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL 0x2 +/* enum: A thread-level assertion has failed. */ +#define MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL 0x3 +/* enum: The system was reset by the watchdog. */ +#define MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED 0x4 +/* enum: An illegal address trap stopped the system (huntington and later) */ +#define MC_CMD_GET_ASSERTS_FLAGS_ADDR_TRAP 0x5 +/* Failing PC value */ #define MC_CMD_GET_ASSERTS_OUT_SAVED_PC_OFFS_OFST 4 +/* Saved GP regs */ #define MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_OFST 8 #define MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_LEN 4 #define MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM 31 +/* enum: A magic value hinting that the value in this register at the time of + * the failure has likely been lost. + */ +#define MC_CMD_GET_ASSERTS_REG_NO_DATA 0xda7a1057 +/* Failing thread address */ #define MC_CMD_GET_ASSERTS_OUT_THREAD_OFFS_OFST 132 #define MC_CMD_GET_ASSERTS_OUT_RESERVED_OFST 136 /***********************************/ -/* MC_CMD_LOG_CTRL - * Configure the output stream for various events and messages. +/* MC_CMD_LOG_CTRL + * Configure the output stream for log events such as link state changes, + * sensor notifications and MCDI completions */ -#define MC_CMD_LOG_CTRL 0x7 +#define MC_CMD_LOG_CTRL 0x7 +#undef MC_CMD_0x7_PRIVILEGE_CTG + +#define MC_CMD_0x7_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_LOG_CTRL_IN msgrequest */ #define MC_CMD_LOG_CTRL_IN_LEN 8 +/* Log destination */ #define MC_CMD_LOG_CTRL_IN_LOG_DEST_OFST 0 -#define MC_CMD_LOG_CTRL_IN_LOG_DEST_UART 0x1 /* enum */ -#define MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ 0x2 /* enum */ +/* enum: UART. */ +#define MC_CMD_LOG_CTRL_IN_LOG_DEST_UART 0x1 +/* enum: Event queue. */ +#define MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ 0x2 +/* Legacy argument. Must be zero. */ #define MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ_OFST 4 /* MC_CMD_LOG_CTRL_OUT msgresponse */ @@ -589,21 +1078,31 @@ /***********************************/ -/* MC_CMD_GET_VERSION +/* MC_CMD_GET_VERSION * Get version information about the MC firmware. */ -#define MC_CMD_GET_VERSION 0x8 +#define MC_CMD_GET_VERSION 0x8 +#undef MC_CMD_0x8_PRIVILEGE_CTG + +#define MC_CMD_0x8_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_GET_VERSION_IN msgrequest */ #define MC_CMD_GET_VERSION_IN_LEN 0 -/* MC_CMD_GET_VERSION_V0_OUT msgresponse */ +/* MC_CMD_GET_VERSION_EXT_IN msgrequest: Asks for the extended version */ +#define MC_CMD_GET_VERSION_EXT_IN_LEN 4 +/* placeholder, set to 0 */ +#define MC_CMD_GET_VERSION_EXT_IN_EXT_FLAGS_OFST 0 + +/* MC_CMD_GET_VERSION_V0_OUT msgresponse: deprecated version format */ #define MC_CMD_GET_VERSION_V0_OUT_LEN 4 #define MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 -#define MC_CMD_GET_VERSION_OUT_FIRMWARE_ANY 0xffffffff /* enum */ -#define MC_CMD_GET_VERSION_OUT_FIRMWARE_BOOTROM 0xb0070000 /* enum */ -#define MC_CMD_GET_VERSION_OUT_FIRMWARE_SIENA_BOOTROM 0xb0070000 /* enum */ -#define MC_CMD_GET_VERSION_OUT_FIRMWARE_HUNT_BOOTROM 0xb0070001 /* enum */ +/* enum: Reserved version number to indicate "any" version. */ +#define MC_CMD_GET_VERSION_OUT_FIRMWARE_ANY 0xffffffff +/* enum: Bootrom version value for Siena. */ +#define MC_CMD_GET_VERSION_OUT_FIRMWARE_SIENA_BOOTROM 0xb0070000 +/* enum: Bootrom version value for Huntington. */ +#define MC_CMD_GET_VERSION_OUT_FIRMWARE_HUNT_BOOTROM 0xb0070001 /* MC_CMD_GET_VERSION_OUT msgresponse */ #define MC_CMD_GET_VERSION_OUT_LEN 32 @@ -611,6 +1110,7 @@ /* Enum values, see field(s): */ /* MC_CMD_GET_VERSION_V0_OUT/MC_CMD_GET_VERSION_OUT_FIRMWARE */ #define MC_CMD_GET_VERSION_OUT_PCOL_OFST 4 +/* 128bit mask of functions supported by the current firmware */ #define MC_CMD_GET_VERSION_OUT_SUPPORTED_FUNCS_OFST 8 #define MC_CMD_GET_VERSION_OUT_SUPPORTED_FUNCS_LEN 16 #define MC_CMD_GET_VERSION_OUT_VERSION_OFST 24 @@ -618,77 +1118,187 @@ #define MC_CMD_GET_VERSION_OUT_VERSION_LO_OFST 24 #define MC_CMD_GET_VERSION_OUT_VERSION_HI_OFST 28 +/* MC_CMD_GET_VERSION_EXT_OUT msgresponse */ +#define MC_CMD_GET_VERSION_EXT_OUT_LEN 48 +/* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */ +/* Enum values, see field(s): */ +/* MC_CMD_GET_VERSION_V0_OUT/MC_CMD_GET_VERSION_OUT_FIRMWARE */ +#define MC_CMD_GET_VERSION_EXT_OUT_PCOL_OFST 4 +/* 128bit mask of functions supported by the current firmware */ +#define MC_CMD_GET_VERSION_EXT_OUT_SUPPORTED_FUNCS_OFST 8 +#define MC_CMD_GET_VERSION_EXT_OUT_SUPPORTED_FUNCS_LEN 16 +#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_OFST 24 +#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LEN 8 +#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_OFST 24 +#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_OFST 28 +/* extra info */ +#define MC_CMD_GET_VERSION_EXT_OUT_EXTRA_OFST 32 +#define MC_CMD_GET_VERSION_EXT_OUT_EXTRA_LEN 16 + /***********************************/ -/* MC_CMD_FC +/* MC_CMD_FC * Perform an FC operation */ -#define MC_CMD_FC 0x9 +#define MC_CMD_FC 0x9 /* MC_CMD_FC_IN msgrequest */ #define MC_CMD_FC_IN_LEN 4 #define MC_CMD_FC_IN_OP_HDR_OFST 0 #define MC_CMD_FC_IN_OP_LBN 0 #define MC_CMD_FC_IN_OP_WIDTH 8 -#define MC_CMD_FC_OP_NULL 0x1 /* enum */ -#define MC_CMD_FC_OP_UNUSED 0x2 /* enum */ -#define MC_CMD_FC_OP_MAC 0x3 /* enum */ -#define MC_CMD_FC_OP_READ32 0x4 /* enum */ -#define MC_CMD_FC_OP_WRITE32 0x5 /* enum */ -#define MC_CMD_FC_OP_TRC_READ 0x6 /* enum */ -#define MC_CMD_FC_OP_TRC_WRITE 0x7 /* enum */ -#define MC_CMD_FC_OP_GET_VERSION 0x8 /* enum */ -#define MC_CMD_FC_OP_TRC_RX_READ 0x9 /* enum */ -#define MC_CMD_FC_OP_TRC_RX_WRITE 0xa /* enum */ -#define MC_CMD_FC_OP_SFP 0xb /* enum */ -#define MC_CMD_FC_OP_DDR_TEST 0xc /* enum */ -#define MC_CMD_FC_OP_GET_ASSERT 0xd /* enum */ -#define MC_CMD_FC_OP_FPGA_BUILD 0xe /* enum */ -#define MC_CMD_FC_OP_READ_MAP 0xf /* enum */ -#define MC_CMD_FC_OP_CAPABILITIES 0x10 /* enum */ -#define MC_CMD_FC_OP_GLOBAL_FLAGS 0x11 /* enum */ -#define MC_CMD_FC_OP_IO_REL 0x12 /* enum */ -#define MC_CMD_FC_OP_UHLINK 0x13 /* enum */ -#define MC_CMD_FC_OP_SET_LINK 0x14 /* enum */ -#define MC_CMD_FC_OP_LICENSE 0x15 /* enum */ -#define MC_CMD_FC_OP_STARTUP 0x16 /* enum */ -#define MC_CMD_FC_OP_DMA 0x17 /* enum */ -#define MC_CMD_FC_OP_TIMED_READ 0x18 /* enum */ -#define MC_CMD_FC_OP_LOG 0x19 /* enum */ -#define MC_CMD_FC_OP_CLOCK 0x1a /* enum */ -#define MC_CMD_FC_OP_DDR 0x1b /* enum */ -#define MC_CMD_FC_OP_TIMESTAMP 0x1c /* enum */ -#define MC_CMD_FC_OP_SPI 0x1d /* enum */ -#define MC_CMD_FC_OP_DIAG 0x1e /* enum */ -#define MC_CMD_FC_IN_PORT_EXT_OFST 0x0 /* enum */ -#define MC_CMD_FC_IN_PORT_INT_OFST 0x40 /* enum */ +/* enum: NULL MCDI command to FC. */ +#define MC_CMD_FC_OP_NULL 0x1 +/* enum: Unused opcode */ +#define MC_CMD_FC_OP_UNUSED 0x2 +/* enum: MAC driver commands */ +#define MC_CMD_FC_OP_MAC 0x3 +/* enum: Read FC memory */ +#define MC_CMD_FC_OP_READ32 0x4 +/* enum: Write to FC memory */ +#define MC_CMD_FC_OP_WRITE32 0x5 +/* enum: Read FC memory */ +#define MC_CMD_FC_OP_TRC_READ 0x6 +/* enum: Write to FC memory */ +#define MC_CMD_FC_OP_TRC_WRITE 0x7 +/* enum: FC firmware Version */ +#define MC_CMD_FC_OP_GET_VERSION 0x8 +/* enum: Read FC memory */ +#define MC_CMD_FC_OP_TRC_RX_READ 0x9 +/* enum: Write to FC memory */ +#define MC_CMD_FC_OP_TRC_RX_WRITE 0xa +/* enum: SFP parameters */ +#define MC_CMD_FC_OP_SFP 0xb +/* enum: DDR3 test */ +#define MC_CMD_FC_OP_DDR_TEST 0xc +/* enum: Get Crash context from FC */ +#define MC_CMD_FC_OP_GET_ASSERT 0xd +/* enum: Get FPGA Build registers */ +#define MC_CMD_FC_OP_FPGA_BUILD 0xe +/* enum: Read map support commands */ +#define MC_CMD_FC_OP_READ_MAP 0xf +/* enum: FC Capabilities */ +#define MC_CMD_FC_OP_CAPABILITIES 0x10 +/* enum: FC Global flags */ +#define MC_CMD_FC_OP_GLOBAL_FLAGS 0x11 +/* enum: FC IO using relative addressing modes */ +#define MC_CMD_FC_OP_IO_REL 0x12 +/* enum: FPGA link information */ +#define MC_CMD_FC_OP_UHLINK 0x13 +/* enum: Configure loopbacks and link on FPGA ports */ +#define MC_CMD_FC_OP_SET_LINK 0x14 +/* enum: Licensing operations relating to AOE */ +#define MC_CMD_FC_OP_LICENSE 0x15 +/* enum: Startup information to the FC */ +#define MC_CMD_FC_OP_STARTUP 0x16 +/* enum: Configure a DMA read */ +#define MC_CMD_FC_OP_DMA 0x17 +/* enum: Configure a timed read */ +#define MC_CMD_FC_OP_TIMED_READ 0x18 +/* enum: Control UART logging */ +#define MC_CMD_FC_OP_LOG 0x19 +/* enum: Get the value of a given clock_id */ +#define MC_CMD_FC_OP_CLOCK 0x1a +/* enum: DDR3/QDR3 parameters */ +#define MC_CMD_FC_OP_DDR 0x1b +/* enum: PTP and timestamp control */ +#define MC_CMD_FC_OP_TIMESTAMP 0x1c +/* enum: Commands for SPI Flash interface */ +#define MC_CMD_FC_OP_SPI 0x1d +/* enum: Commands for diagnostic components */ +#define MC_CMD_FC_OP_DIAG 0x1e +/* enum: External AOE port. */ +#define MC_CMD_FC_IN_PORT_EXT_OFST 0x0 +/* enum: Internal AOE port. */ +#define MC_CMD_FC_IN_PORT_INT_OFST 0x40 /* MC_CMD_FC_IN_NULL msgrequest */ #define MC_CMD_FC_IN_NULL_LEN 4 #define MC_CMD_FC_IN_CMD_OFST 0 +/* MC_CMD_FC_IN_PHY msgrequest */ +#define MC_CMD_FC_IN_PHY_LEN 5 +/* MC_CMD_FC_IN_CMD_OFST 0 */ +/* FC PHY driver operation code */ +#define MC_CMD_FC_IN_PHY_OP_OFST 4 +#define MC_CMD_FC_IN_PHY_OP_LEN 1 +/* enum: PHY init handler */ +#define MC_CMD_FC_OP_PHY_OP_INIT 0x1 +/* enum: PHY reconfigure handler */ +#define MC_CMD_FC_OP_PHY_OP_RECONFIGURE 0x2 +/* enum: PHY reboot handler */ +#define MC_CMD_FC_OP_PHY_OP_REBOOT 0x3 +/* enum: PHY get_supported_cap handler */ +#define MC_CMD_FC_OP_PHY_OP_GET_SUPPORTED_CAP 0x4 +/* enum: PHY get_config handler */ +#define MC_CMD_FC_OP_PHY_OP_GET_CONFIG 0x5 +/* enum: PHY get_media_info handler */ +#define MC_CMD_FC_OP_PHY_OP_GET_MEDIA_INFO 0x6 +/* enum: PHY set_led handler */ +#define MC_CMD_FC_OP_PHY_OP_SET_LED 0x7 +/* enum: PHY lasi_interrupt handler */ +#define MC_CMD_FC_OP_PHY_OP_LASI_INTERRUPT 0x8 +/* enum: PHY check_link handler */ +#define MC_CMD_FC_OP_PHY_OP_CHECK_LINK 0x9 +/* enum: PHY fill_stats handler */ +#define MC_CMD_FC_OP_PHY_OP_FILL_STATS 0xa +/* enum: PHY bpx_link_state_changed handler */ +#define MC_CMD_FC_OP_PHY_OP_BPX_LINK_STATE_CHANGED 0xb +/* enum: PHY get_state handler */ +#define MC_CMD_FC_OP_PHY_OP_GET_STATE 0xc +/* enum: PHY start_bist handler */ +#define MC_CMD_FC_OP_PHY_OP_START_BIST 0xd +/* enum: PHY poll_bist handler */ +#define MC_CMD_FC_OP_PHY_OP_POLL_BIST 0xe +/* enum: PHY nvram_test handler */ +#define MC_CMD_FC_OP_PHY_OP_NVRAM_TEST 0xf +/* enum: PHY relinquish handler */ +#define MC_CMD_FC_OP_PHY_OP_RELINQUISH_SPI 0x10 +/* enum: PHY read connection from FC - may be not required */ +#define MC_CMD_FC_OP_PHY_OP_GET_CONNECTION 0x11 +/* enum: PHY read flags from FC - may be not required */ +#define MC_CMD_FC_OP_PHY_OP_GET_FLAGS 0x12 + +/* MC_CMD_FC_IN_PHY_INIT msgrequest */ +#define MC_CMD_FC_IN_PHY_INIT_LEN 4 +#define MC_CMD_FC_IN_PHY_CMD_OFST 0 + /* MC_CMD_FC_IN_MAC msgrequest */ #define MC_CMD_FC_IN_MAC_LEN 8 /* MC_CMD_FC_IN_CMD_OFST 0 */ #define MC_CMD_FC_IN_MAC_HEADER_OFST 4 #define MC_CMD_FC_IN_MAC_OP_LBN 0 #define MC_CMD_FC_IN_MAC_OP_WIDTH 8 -#define MC_CMD_FC_OP_MAC_OP_RECONFIGURE 0x1 /* enum */ -#define MC_CMD_FC_OP_MAC_OP_SET_LINK 0x2 /* enum */ -#define MC_CMD_FC_OP_MAC_OP_GET_STATS 0x3 /* enum */ -#define MC_CMD_FC_OP_MAC_OP_GET_RX_STATS 0x6 /* enum */ -#define MC_CMD_FC_OP_MAC_OP_GET_TX_STATS 0x7 /* enum */ -#define MC_CMD_FC_OP_MAC_OP_READ_STATUS 0x8 /* enum */ +/* enum: MAC reconfigure handler */ +#define MC_CMD_FC_OP_MAC_OP_RECONFIGURE 0x1 +/* enum: MAC Set command - same as MC_CMD_SET_MAC */ +#define MC_CMD_FC_OP_MAC_OP_SET_LINK 0x2 +/* enum: MAC statistics */ +#define MC_CMD_FC_OP_MAC_OP_GET_STATS 0x3 +/* enum: MAC RX statistics */ +#define MC_CMD_FC_OP_MAC_OP_GET_RX_STATS 0x6 +/* enum: MAC TX statistics */ +#define MC_CMD_FC_OP_MAC_OP_GET_TX_STATS 0x7 +/* enum: MAC Read status */ +#define MC_CMD_FC_OP_MAC_OP_READ_STATUS 0x8 #define MC_CMD_FC_IN_MAC_PORT_TYPE_LBN 8 #define MC_CMD_FC_IN_MAC_PORT_TYPE_WIDTH 8 -#define MC_CMD_FC_PORT_EXT 0x0 /* enum */ -#define MC_CMD_FC_PORT_INT 0x1 /* enum */ +/* enum: External FPGA port. */ +#define MC_CMD_FC_PORT_EXT 0x0 +/* enum: Internal Siena-facing FPGA ports. */ +#define MC_CMD_FC_PORT_INT 0x1 #define MC_CMD_FC_IN_MAC_PORT_IDX_LBN 16 #define MC_CMD_FC_IN_MAC_PORT_IDX_WIDTH 8 #define MC_CMD_FC_IN_MAC_CMD_FORMAT_LBN 24 #define MC_CMD_FC_IN_MAC_CMD_FORMAT_WIDTH 8 -#define MC_CMD_FC_OP_MAC_CMD_FORMAT_DEFAULT 0x0 /* enum */ -#define MC_CMD_FC_OP_MAC_CMD_FORMAT_PORT_OVERRIDE 0x1 /* enum */ +/* enum: Default FC command format; the fields PORT_TYPE and PORT_IDX are + * irrelevant. Port number is derived from pci_fn; passed in FC header. + */ +#define MC_CMD_FC_OP_MAC_CMD_FORMAT_DEFAULT 0x0 +/* enum: Override default port number. Port number determined by fields + * PORT_TYPE and PORT_IDX. + */ +#define MC_CMD_FC_OP_MAC_CMD_FORMAT_PORT_OVERRIDE 0x1 /* MC_CMD_FC_IN_MAC_RECONFIGURE msgrequest */ #define MC_CMD_FC_IN_MAC_RECONFIGURE_LEN 8 @@ -699,7 +1309,9 @@ #define MC_CMD_FC_IN_MAC_SET_LINK_LEN 32 /* MC_CMD_FC_IN_CMD_OFST 0 */ /* MC_CMD_FC_IN_MAC_HEADER_OFST 4 */ +/* MTU size */ #define MC_CMD_FC_IN_MAC_SET_LINK_MTU_OFST 8 +/* Drain Tx FIFO */ #define MC_CMD_FC_IN_MAC_SET_LINK_DRAIN_OFST 12 #define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_OFST 16 #define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LEN 8 @@ -731,6 +1343,7 @@ #define MC_CMD_FC_IN_MAC_GET_STATS_LEN 20 /* MC_CMD_FC_IN_CMD_OFST 0 */ /* MC_CMD_FC_IN_MAC_HEADER_OFST 4 */ +/* MC Statistics index */ #define MC_CMD_FC_IN_MAC_GET_STATS_STATS_INDEX_OFST 8 #define MC_CMD_FC_IN_MAC_GET_STATS_FLAGS_OFST 12 #define MC_CMD_FC_IN_MAC_GET_STATS_CLEAR_ALL_LBN 0 @@ -739,6 +1352,7 @@ #define MC_CMD_FC_IN_MAC_GET_STATS_CLEAR_WIDTH 1 #define MC_CMD_FC_IN_MAC_GET_STATS_UPDATE_LBN 2 #define MC_CMD_FC_IN_MAC_GET_STATS_UPDATE_WIDTH 1 +/* Number of statistics to read */ #define MC_CMD_FC_IN_MAC_GET_STATS_NUM_OFST 16 #define MC_CMD_FC_MAC_NSTATS_PER_BLOCK 0x1e /* enum */ #define MC_CMD_FC_MAC_NBYTES_PER_STAT 0x8 /* enum */ @@ -797,13 +1411,24 @@ #define MC_CMD_FC_IN_TRC_RX_WRITE_DATA_NUM 2 /* MC_CMD_FC_IN_SFP msgrequest */ -#define MC_CMD_FC_IN_SFP_LEN 24 +#define MC_CMD_FC_IN_SFP_LEN 28 /* MC_CMD_FC_IN_CMD_OFST 0 */ +/* Link speed is 100, 1000, 10000, 40000 */ #define MC_CMD_FC_IN_SFP_SPEED_OFST 4 +/* Length of copper cable - zero when not relevant (e.g. if cable is fibre) */ #define MC_CMD_FC_IN_SFP_COPPER_LEN_OFST 8 +/* Not relevant for cards with QSFP modules. For older cards, true if module is + * a dual speed SFP+ module. + */ #define MC_CMD_FC_IN_SFP_DUAL_SPEED_OFST 12 +/* True if an SFP Module is present (other fields valid when true) */ #define MC_CMD_FC_IN_SFP_PRESENT_OFST 16 +/* The type of the SFP+ Module. For later cards with QSFP modules, this field + * is unused and the type is communicated by other means. + */ #define MC_CMD_FC_IN_SFP_TYPE_OFST 20 +/* Capabilities corresponding to 1 bits. */ +#define MC_CMD_FC_IN_SFP_CAPS_OFST 24 /* MC_CMD_FC_IN_DDR_TEST msgrequest */ #define MC_CMD_FC_IN_DDR_TEST_LEN 8 @@ -811,8 +1436,10 @@ #define MC_CMD_FC_IN_DDR_TEST_HEADER_OFST 4 #define MC_CMD_FC_IN_DDR_TEST_OP_LBN 0 #define MC_CMD_FC_IN_DDR_TEST_OP_WIDTH 8 -#define MC_CMD_FC_OP_DDR_TEST_START 0x1 /* enum */ -#define MC_CMD_FC_OP_DDR_TEST_POLL 0x2 /* enum */ +/* enum: DRAM Test Start */ +#define MC_CMD_FC_OP_DDR_TEST_START 0x1 +/* enum: DRAM Test Poll */ +#define MC_CMD_FC_OP_DDR_TEST_POLL 0x2 /* MC_CMD_FC_IN_DDR_TEST_START msgrequest */ #define MC_CMD_FC_IN_DDR_TEST_START_LEN 12 @@ -840,10 +1467,14 @@ /* MC_CMD_FC_IN_FPGA_BUILD msgrequest */ #define MC_CMD_FC_IN_FPGA_BUILD_LEN 8 /* MC_CMD_FC_IN_CMD_OFST 0 */ +/* FPGA build info operation code */ #define MC_CMD_FC_IN_FPGA_BUILD_OP_OFST 4 -#define MC_CMD_FC_IN_FPGA_BUILD_BUILD 0x1 /* enum */ -#define MC_CMD_FC_IN_FPGA_BUILD_SERVICES 0x2 /* enum */ -#define MC_CMD_FC_IN_FPGA_BUILD_BSP_VERSION 0x3 /* enum */ +/* enum: Get the build registers */ +#define MC_CMD_FC_IN_FPGA_BUILD_BUILD 0x1 +/* enum: Get the services registers */ +#define MC_CMD_FC_IN_FPGA_BUILD_SERVICES 0x2 +/* enum: Get the BSP version */ +#define MC_CMD_FC_IN_FPGA_BUILD_BSP_VERSION 0x3 /* MC_CMD_FC_IN_READ_MAP msgrequest */ #define MC_CMD_FC_IN_READ_MAP_LEN 8 @@ -851,8 +1482,10 @@ #define MC_CMD_FC_IN_READ_MAP_HEADER_OFST 4 #define MC_CMD_FC_IN_READ_MAP_OP_LBN 0 #define MC_CMD_FC_IN_READ_MAP_OP_WIDTH 8 -#define MC_CMD_FC_OP_READ_MAP_COUNT 0x1 /* enum */ -#define MC_CMD_FC_OP_READ_MAP_INDEX 0x2 /* enum */ +/* enum: Get the number of map regions */ +#define MC_CMD_FC_OP_READ_MAP_COUNT 0x1 +/* enum: Get the specified map */ +#define MC_CMD_FC_OP_READ_MAP_INDEX 0x2 /* MC_CMD_FC_IN_READ_MAP_COUNT msgrequest */ #define MC_CMD_FC_IN_READ_MAP_COUNT_LEN 8 @@ -892,13 +1525,18 @@ #define MC_CMD_FC_IN_IO_REL_HEADER_OFST 4 #define MC_CMD_FC_IN_IO_REL_OP_LBN 0 #define MC_CMD_FC_IN_IO_REL_OP_WIDTH 8 -#define MC_CMD_FC_IN_IO_REL_GET_ADDR 0x1 /* enum */ -#define MC_CMD_FC_IN_IO_REL_READ32 0x2 /* enum */ -#define MC_CMD_FC_IN_IO_REL_WRITE32 0x3 /* enum */ +/* enum: Get the base address that the FC applies to relative commands */ +#define MC_CMD_FC_IN_IO_REL_GET_ADDR 0x1 +/* enum: Read data */ +#define MC_CMD_FC_IN_IO_REL_READ32 0x2 +/* enum: Write data */ +#define MC_CMD_FC_IN_IO_REL_WRITE32 0x3 #define MC_CMD_FC_IN_IO_REL_COMP_TYPE_LBN 8 #define MC_CMD_FC_IN_IO_REL_COMP_TYPE_WIDTH 8 -#define MC_CMD_FC_COMP_TYPE_APP_ADDR_SPACE 0x1 /* enum */ -#define MC_CMD_FC_COMP_TYPE_FLASH 0x2 /* enum */ +/* enum: Application address space */ +#define MC_CMD_FC_COMP_TYPE_APP_ADDR_SPACE 0x1 +/* enum: Flash address space */ +#define MC_CMD_FC_COMP_TYPE_FLASH 0x2 /* MC_CMD_FC_IN_IO_REL_GET_ADDR msgrequest */ #define MC_CMD_FC_IN_IO_REL_GET_ADDR_LEN 8 @@ -932,22 +1570,36 @@ #define MC_CMD_FC_IN_UHLINK_HEADER_OFST 4 #define MC_CMD_FC_IN_UHLINK_OP_LBN 0 #define MC_CMD_FC_IN_UHLINK_OP_WIDTH 8 -#define MC_CMD_FC_OP_UHLINK_PHY 0x1 /* enum */ -#define MC_CMD_FC_OP_UHLINK_MAC 0x2 /* enum */ -#define MC_CMD_FC_OP_UHLINK_RX_EYE 0x3 /* enum */ -#define MC_CMD_FC_OP_UHLINK_DUMP_RX_EYE_PLOT 0x4 /* enum */ -#define MC_CMD_FC_OP_UHLINK_READ_RX_EYE_PLOT 0x5 /* enum */ -#define MC_CMD_FC_OP_UHLINK_RX_TUNE 0x6 /* enum */ -#define MC_CMD_FC_OP_UHLINK_LOOPBACK_SET 0x7 /* enum */ -#define MC_CMD_FC_OP_UHLINK_LOOPBACK_GET 0x8 /* enum */ +/* enum: Get PHY configuration info */ +#define MC_CMD_FC_OP_UHLINK_PHY 0x1 +/* enum: Get MAC configuration info */ +#define MC_CMD_FC_OP_UHLINK_MAC 0x2 +/* enum: Get Rx eye table */ +#define MC_CMD_FC_OP_UHLINK_RX_EYE 0x3 +/* enum: Get Rx eye plot */ +#define MC_CMD_FC_OP_UHLINK_DUMP_RX_EYE_PLOT 0x4 +/* enum: Get Rx eye plot */ +#define MC_CMD_FC_OP_UHLINK_READ_RX_EYE_PLOT 0x5 +/* enum: Retune Rx settings */ +#define MC_CMD_FC_OP_UHLINK_RX_TUNE 0x6 +/* enum: Set loopback mode on fpga port */ +#define MC_CMD_FC_OP_UHLINK_LOOPBACK_SET 0x7 +/* enum: Get loopback mode config state on fpga port */ +#define MC_CMD_FC_OP_UHLINK_LOOPBACK_GET 0x8 #define MC_CMD_FC_IN_UHLINK_PORT_TYPE_LBN 8 #define MC_CMD_FC_IN_UHLINK_PORT_TYPE_WIDTH 8 #define MC_CMD_FC_IN_UHLINK_PORT_IDX_LBN 16 #define MC_CMD_FC_IN_UHLINK_PORT_IDX_WIDTH 8 #define MC_CMD_FC_IN_UHLINK_CMD_FORMAT_LBN 24 #define MC_CMD_FC_IN_UHLINK_CMD_FORMAT_WIDTH 8 -#define MC_CMD_FC_OP_UHLINK_CMD_FORMAT_DEFAULT 0x0 /* enum */ -#define MC_CMD_FC_OP_UHLINK_CMD_FORMAT_PORT_OVERRIDE 0x1 /* enum */ +/* enum: Default FC command format; the fields PORT_TYPE and PORT_IDX are + * irrelevant. Port number is derived from pci_fn; passed in FC header. + */ +#define MC_CMD_FC_OP_UHLINK_CMD_FORMAT_DEFAULT 0x0 +/* enum: Override default port number. Port number determined by fields + * PORT_TYPE and PORT_IDX. + */ +#define MC_CMD_FC_OP_UHLINK_CMD_FORMAT_PORT_OVERRIDE 0x1 /* MC_CMD_FC_OP_UHLINK_PHY msgrequest */ #define MC_CMD_FC_OP_UHLINK_PHY_LEN 8 @@ -1006,6 +1658,7 @@ /* MC_CMD_FC_IN_SET_LINK msgrequest */ #define MC_CMD_FC_IN_SET_LINK_LEN 16 /* MC_CMD_FC_IN_CMD_OFST 0 */ +/* See MC_CMD_GET_LOOPBACK_MODES/MC_CMD_GET_LOOPBACK_MODES_OUT/100M */ #define MC_CMD_FC_IN_SET_LINK_MODE_OFST 4 #define MC_CMD_FC_IN_SET_LINK_SPEED_OFST 8 #define MC_CMD_FC_IN_SET_LINK_FLAGS_OFST 12 @@ -1028,7 +1681,9 @@ /* MC_CMD_FC_IN_CMD_OFST 0 */ #define MC_CMD_FC_IN_STARTUP_BASE_OFST 4 #define MC_CMD_FC_IN_STARTUP_LENGTH_OFST 8 +/* Length of identifier */ #define MC_CMD_FC_IN_STARTUP_IDLENGTH_OFST 12 +/* Identifier for AOE FPGA */ #define MC_CMD_FC_IN_STARTUP_ID_OFST 16 #define MC_CMD_FC_IN_STARTUP_ID_LEN 1 #define MC_CMD_FC_IN_STARTUP_ID_NUM 24 @@ -1044,6 +1699,7 @@ #define MC_CMD_FC_IN_DMA_STOP_LEN 12 /* MC_CMD_FC_IN_CMD_OFST 0 */ /* MC_CMD_FC_IN_DMA_OP_OFST 4 */ +/* FC supplied handle */ #define MC_CMD_FC_IN_DMA_STOP_FC_HANDLE_OFST 8 /* MC_CMD_FC_IN_DMA_READ msgrequest */ @@ -1065,18 +1721,25 @@ #define MC_CMD_FC_IN_TIMED_READ_SET_LEN 52 /* MC_CMD_FC_IN_CMD_OFST 0 */ /* MC_CMD_FC_IN_TIMED_READ_OP_OFST 4 */ +/* Host supplied handle (unique) */ #define MC_CMD_FC_IN_TIMED_READ_SET_HOST_HANDLE_OFST 8 +/* Address into which to transfer data in host */ #define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_OFST 12 #define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LEN 8 #define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LO_OFST 12 #define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_HI_OFST 16 +/* AOE address from which to transfer data */ #define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_OFST 20 #define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LEN 8 #define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LO_OFST 20 #define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_HI_OFST 24 +/* Length of AOE transfer (total) */ #define MC_CMD_FC_IN_TIMED_READ_SET_AOE_LENGTH_OFST 28 +/* Length of host transfer (total) */ #define MC_CMD_FC_IN_TIMED_READ_SET_HOST_LENGTH_OFST 32 +/* Offset back from aoe_address to apply operation to */ #define MC_CMD_FC_IN_TIMED_READ_SET_OFFSET_OFST 36 +/* Data to apply at offset */ #define MC_CMD_FC_IN_TIMED_READ_SET_DATA_OFST 40 #define MC_CMD_FC_IN_TIMED_READ_SET_FLAGS_OFST 44 #define MC_CMD_FC_IN_TIMED_READ_SET_INDIRECT_LBN 0 @@ -1091,18 +1754,21 @@ #define MC_CMD_FC_IN_TIMED_READ_SET_READ 0x1 /* enum */ #define MC_CMD_FC_IN_TIMED_READ_SET_WRITE 0x2 /* enum */ #define MC_CMD_FC_IN_TIMED_READ_SET_READWRITE 0x3 /* enum */ +/* Period at which reads are performed (100ms units) */ #define MC_CMD_FC_IN_TIMED_READ_SET_PERIOD_OFST 48 /* MC_CMD_FC_IN_TIMED_READ_GET msgrequest */ #define MC_CMD_FC_IN_TIMED_READ_GET_LEN 12 /* MC_CMD_FC_IN_CMD_OFST 0 */ /* MC_CMD_FC_IN_TIMED_READ_OP_OFST 4 */ +/* FC supplied handle */ #define MC_CMD_FC_IN_TIMED_READ_GET_FC_HANDLE_OFST 8 /* MC_CMD_FC_IN_TIMED_READ_CLEAR msgrequest */ #define MC_CMD_FC_IN_TIMED_READ_CLEAR_LEN 12 /* MC_CMD_FC_IN_CMD_OFST 0 */ /* MC_CMD_FC_IN_TIMED_READ_OP_OFST 4 */ +/* FC supplied handle */ #define MC_CMD_FC_IN_TIMED_READ_CLEAR_FC_HANDLE_OFST 8 /* MC_CMD_FC_IN_LOG msgrequest */ @@ -1116,14 +1782,18 @@ #define MC_CMD_FC_IN_LOG_ADDR_RANGE_LEN 20 /* MC_CMD_FC_IN_CMD_OFST 0 */ /* MC_CMD_FC_IN_LOG_OP_OFST 4 */ +/* Partition offset into flash */ #define MC_CMD_FC_IN_LOG_ADDR_RANGE_OFFSET_OFST 8 +/* Partition length */ #define MC_CMD_FC_IN_LOG_ADDR_RANGE_LENGTH_OFST 12 +/* Partition erase size */ #define MC_CMD_FC_IN_LOG_ADDR_RANGE_ERASE_SIZE_OFST 16 /* MC_CMD_FC_IN_LOG_JTAG_UART msgrequest */ #define MC_CMD_FC_IN_LOG_JTAG_UART_LEN 12 /* MC_CMD_FC_IN_CMD_OFST 0 */ /* MC_CMD_FC_IN_LOG_OP_OFST 4 */ +/* Enable/disable printing to JTAG UART */ #define MC_CMD_FC_IN_LOG_JTAG_UART_ENABLE_OFST 8 /* MC_CMD_FC_IN_CLOCK msgrequest */ @@ -1132,6 +1802,7 @@ #define MC_CMD_FC_IN_CLOCK_OP_OFST 4 #define MC_CMD_FC_IN_CLOCK_GET_TIME 0x0 /* enum */ #define MC_CMD_FC_IN_CLOCK_SET_TIME 0x1 /* enum */ +/* Perform a clock operation */ #define MC_CMD_FC_IN_CLOCK_ID_OFST 8 #define MC_CMD_FC_IN_CLOCK_STATS 0x0 /* enum */ #define MC_CMD_FC_IN_CLOCK_MAC 0x1 /* enum */ @@ -1140,6 +1811,7 @@ #define MC_CMD_FC_IN_CLOCK_GET_TIME_LEN 12 /* MC_CMD_FC_IN_CMD_OFST 0 */ /* MC_CMD_FC_IN_CLOCK_OP_OFST 4 */ +/* Retrieve the clock value of the specified clock */ /* MC_CMD_FC_IN_CLOCK_ID_OFST 8 */ /* MC_CMD_FC_IN_CLOCK_SET_TIME msgrequest */ @@ -1151,6 +1823,7 @@ #define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LEN 8 #define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LO_OFST 12 #define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_HI_OFST 16 +/* Set the clock value of the specified clock */ #define MC_CMD_FC_IN_CLOCK_SET_TIME_NANOSECONDS_OFST 20 /* MC_CMD_FC_IN_DDR msgrequest */ @@ -1170,40 +1843,59 @@ #define MC_CMD_FC_IN_DDR_SET_SPD_LEN 148 /* MC_CMD_FC_IN_CMD_OFST 0 */ /* MC_CMD_FC_IN_DDR_OP_OFST 4 */ +/* Affected bank */ /* MC_CMD_FC_IN_DDR_BANK_OFST 8 */ +/* Flags */ #define MC_CMD_FC_IN_DDR_FLAGS_OFST 12 #define MC_CMD_FC_IN_DDR_SET_SPD_ACTIVE 0x1 /* enum */ +/* 128-byte page of serial presence detect data read from module's EEPROM */ #define MC_CMD_FC_IN_DDR_SPD_OFST 16 #define MC_CMD_FC_IN_DDR_SPD_LEN 1 #define MC_CMD_FC_IN_DDR_SPD_NUM 128 +/* Page index of the spd data copied into MC_CMD_FC_IN_DDR_SPD */ #define MC_CMD_FC_IN_DDR_SPD_PAGE_ID_OFST 144 /* MC_CMD_FC_IN_DDR_GET_STATUS msgrequest */ #define MC_CMD_FC_IN_DDR_GET_STATUS_LEN 12 /* MC_CMD_FC_IN_CMD_OFST 0 */ /* MC_CMD_FC_IN_DDR_OP_OFST 4 */ +/* Affected bank */ /* MC_CMD_FC_IN_DDR_BANK_OFST 8 */ /* MC_CMD_FC_IN_TIMESTAMP msgrequest */ #define MC_CMD_FC_IN_TIMESTAMP_LEN 8 /* MC_CMD_FC_IN_CMD_OFST 0 */ +/* FC timestamp operation code */ #define MC_CMD_FC_IN_TIMESTAMP_OP_OFST 4 -#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT 0x0 /* enum */ -#define MC_CMD_FC_IN_TIMESTAMP_READ_SNAPSHOT 0x1 /* enum */ -#define MC_CMD_FC_IN_TIMESTAMP_CLEAR_TRANSMIT 0x2 /* enum */ +/* enum: Read transmit timestamp(s) */ +#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT 0x0 +/* enum: Read snapshot timestamps */ +#define MC_CMD_FC_IN_TIMESTAMP_READ_SNAPSHOT 0x1 +/* enum: Clear all transmit timestamps */ +#define MC_CMD_FC_IN_TIMESTAMP_CLEAR_TRANSMIT 0x2 /* MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT msgrequest */ #define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_LEN 28 /* MC_CMD_FC_IN_CMD_OFST 0 */ #define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_OP_OFST 4 +/* Control filtering of the returned timestamp and sequence number specified + * here + */ #define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_FILTER_OFST 8 -#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_LATEST 0x0 /* enum */ -#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_MATCH 0x1 /* enum */ +/* enum: Return most recent timestamp. No filtering */ +#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_LATEST 0x0 +/* enum: Match timestamp against the PTP clock ID, port number and sequence + * number specified + */ +#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_MATCH 0x1 +/* Clock identity of PTP packet for which timestamp required */ #define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_OFST 12 #define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LEN 8 #define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LO_OFST 12 #define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_HI_OFST 16 +/* Port number of PTP packet for which timestamp required */ #define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_PORT_NUM_OFST 20 +/* Sequence number of PTP packet for which timestamp required */ #define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_SEQ_NUM_OFST 24 /* MC_CMD_FC_IN_TIMESTAMP_READ_SNAPSHOT msgrequest */ @@ -1219,10 +1911,14 @@ /* MC_CMD_FC_IN_SPI msgrequest */ #define MC_CMD_FC_IN_SPI_LEN 8 /* MC_CMD_FC_IN_CMD_OFST 0 */ +/* Basic commands for SPI Flash. */ #define MC_CMD_FC_IN_SPI_OP_OFST 4 -#define MC_CMD_FC_IN_SPI_READ 0x0 /* enum */ -#define MC_CMD_FC_IN_SPI_WRITE 0x1 /* enum */ -#define MC_CMD_FC_IN_SPI_ERASE 0x2 /* enum */ +/* enum: SPI Flash read */ +#define MC_CMD_FC_IN_SPI_READ 0x0 +/* enum: SPI Flash write */ +#define MC_CMD_FC_IN_SPI_WRITE 0x1 +/* enum: SPI Flash erase */ +#define MC_CMD_FC_IN_SPI_ERASE 0x2 /* MC_CMD_FC_IN_SPI_READ msgrequest */ #define MC_CMD_FC_IN_SPI_READ_LEN 16 @@ -1253,18 +1949,29 @@ /* MC_CMD_FC_IN_DIAG msgrequest */ #define MC_CMD_FC_IN_DIAG_LEN 8 /* MC_CMD_FC_IN_CMD_OFST 0 */ +/* Operation code indicating component type */ #define MC_CMD_FC_IN_DIAG_OP_OFST 4 -#define MC_CMD_FC_IN_DIAG_POWER_NOISE 0x0 /* enum */ -#define MC_CMD_FC_IN_DIAG_DDR_SOAK 0x1 /* enum */ -#define MC_CMD_FC_IN_DIAG_DATAPATH_CTRL 0x2 /* enum */ +/* enum: Power noise generator. */ +#define MC_CMD_FC_IN_DIAG_POWER_NOISE 0x0 +/* enum: DDR soak test component. */ +#define MC_CMD_FC_IN_DIAG_DDR_SOAK 0x1 +/* enum: Diagnostics datapath control component. */ +#define MC_CMD_FC_IN_DIAG_DATAPATH_CTRL 0x2 /* MC_CMD_FC_IN_DIAG_POWER_NOISE msgrequest */ #define MC_CMD_FC_IN_DIAG_POWER_NOISE_LEN 12 /* MC_CMD_FC_IN_CMD_OFST 0 */ #define MC_CMD_FC_IN_DIAG_POWER_NOISE_OP_OFST 4 +/* Sub-opcode describing the operation to be carried out */ #define MC_CMD_FC_IN_DIAG_POWER_NOISE_SUB_OP_OFST 8 -#define MC_CMD_FC_IN_DIAG_POWER_NOISE_READ_CONFIG 0x0 /* enum */ -#define MC_CMD_FC_IN_DIAG_POWER_NOISE_WRITE_CONFIG 0x1 /* enum */ +/* enum: Read the configuration (the 32-bit values in each of the clock enable + * count and toggle count registers) + */ +#define MC_CMD_FC_IN_DIAG_POWER_NOISE_READ_CONFIG 0x0 +/* enum: Write a new configuration to the clock enable count and toggle count + * registers + */ +#define MC_CMD_FC_IN_DIAG_POWER_NOISE_WRITE_CONFIG 0x1 /* MC_CMD_FC_IN_DIAG_POWER_NOISE_READ_CONFIG msgrequest */ #define MC_CMD_FC_IN_DIAG_POWER_NOISE_READ_CONFIG_LEN 12 @@ -1277,28 +1984,42 @@ /* MC_CMD_FC_IN_CMD_OFST 0 */ #define MC_CMD_FC_IN_DIAG_POWER_NOISE_WRITE_CONFIG_OP_OFST 4 #define MC_CMD_FC_IN_DIAG_POWER_NOISE_WRITE_CONFIG_SUB_OP_OFST 8 +/* The 32-bit value to be written to the toggle count register */ #define MC_CMD_FC_IN_DIAG_POWER_NOISE_WRITE_CONFIG_TOGGLE_COUNT_OFST 12 +/* The 32-bit value to be written to the clock enable count register */ #define MC_CMD_FC_IN_DIAG_POWER_NOISE_WRITE_CONFIG_CLKEN_COUNT_OFST 16 /* MC_CMD_FC_IN_DIAG_DDR_SOAK msgrequest */ #define MC_CMD_FC_IN_DIAG_DDR_SOAK_LEN 12 /* MC_CMD_FC_IN_CMD_OFST 0 */ #define MC_CMD_FC_IN_DIAG_DDR_SOAK_OP_OFST 4 +/* Sub-opcode describing the operation to be carried out */ #define MC_CMD_FC_IN_DIAG_DDR_SOAK_SUB_OP_OFST 8 -#define MC_CMD_FC_IN_DIAG_DDR_SOAK_START 0x0 /* enum */ -#define MC_CMD_FC_IN_DIAG_DDR_SOAK_RESULT 0x1 /* enum */ -#define MC_CMD_FC_IN_DIAG_DDR_SOAK_STOP 0x2 /* enum */ -#define MC_CMD_FC_IN_DIAG_DDR_SOAK_ERROR 0x3 /* enum */ +/* enum: Starts DDR soak test on selected banks */ +#define MC_CMD_FC_IN_DIAG_DDR_SOAK_START 0x0 +/* enum: Read status of DDR soak test */ +#define MC_CMD_FC_IN_DIAG_DDR_SOAK_RESULT 0x1 +/* enum: Stop test */ +#define MC_CMD_FC_IN_DIAG_DDR_SOAK_STOP 0x2 +/* enum: Set or clear bit that triggers fake errors. These cause subsequent + * tests to fail until the bit is cleared. + */ +#define MC_CMD_FC_IN_DIAG_DDR_SOAK_ERROR 0x3 /* MC_CMD_FC_IN_DIAG_DDR_SOAK_START msgrequest */ #define MC_CMD_FC_IN_DIAG_DDR_SOAK_START_LEN 24 /* MC_CMD_FC_IN_CMD_OFST 0 */ #define MC_CMD_FC_IN_DIAG_DDR_SOAK_START_OP_OFST 4 #define MC_CMD_FC_IN_DIAG_DDR_SOAK_START_SUB_OP_OFST 8 +/* Mask of DDR banks to be tested */ #define MC_CMD_FC_IN_DIAG_DDR_SOAK_START_BANK_MASK_OFST 12 +/* Pattern to use in the soak test */ #define MC_CMD_FC_IN_DIAG_DDR_SOAK_START_TEST_PATTERN_OFST 16 #define MC_CMD_FC_IN_DIAG_DDR_SOAK_START_ZEROS 0x0 /* enum */ #define MC_CMD_FC_IN_DIAG_DDR_SOAK_START_ONES 0x1 /* enum */ +/* Either multiple automatic tests until a STOP command is issued, or one + * single test + */ #define MC_CMD_FC_IN_DIAG_DDR_SOAK_START_TEST_TYPE_OFST 20 #define MC_CMD_FC_IN_DIAG_DDR_SOAK_START_ONGOING_TEST 0x0 /* enum */ #define MC_CMD_FC_IN_DIAG_DDR_SOAK_START_SINGLE_TEST 0x1 /* enum */ @@ -1308,6 +2029,7 @@ /* MC_CMD_FC_IN_CMD_OFST 0 */ #define MC_CMD_FC_IN_DIAG_DDR_SOAK_RESULT_OP_OFST 4 #define MC_CMD_FC_IN_DIAG_DDR_SOAK_RESULT_SUB_OP_OFST 8 +/* DDR bank to read status from */ #define MC_CMD_FC_IN_DIAG_DDR_SOAK_RESULT_BANK_ID_OFST 12 #define MC_CMD_FC_DDR_BANK0 0x0 /* enum */ #define MC_CMD_FC_DDR_BANK1 0x1 /* enum */ @@ -1320,6 +2042,7 @@ /* MC_CMD_FC_IN_CMD_OFST 0 */ #define MC_CMD_FC_IN_DIAG_DDR_SOAK_STOP_OP_OFST 4 #define MC_CMD_FC_IN_DIAG_DDR_SOAK_STOP_SUB_OP_OFST 8 +/* Mask of DDR banks to be tested */ #define MC_CMD_FC_IN_DIAG_DDR_SOAK_STOP_BANK_MASK_OFST 12 /* MC_CMD_FC_IN_DIAG_DDR_SOAK_ERROR msgrequest */ @@ -1327,6 +2050,7 @@ /* MC_CMD_FC_IN_CMD_OFST 0 */ #define MC_CMD_FC_IN_DIAG_DDR_SOAK_ERROR_OP_OFST 4 #define MC_CMD_FC_IN_DIAG_DDR_SOAK_ERROR_SUB_OP_OFST 8 +/* Mask of DDR banks to set/clear error flag on */ #define MC_CMD_FC_IN_DIAG_DDR_SOAK_ERROR_BANK_MASK_OFST 12 #define MC_CMD_FC_IN_DIAG_DDR_SOAK_ERROR_FLAG_ACTION_OFST 16 #define MC_CMD_FC_IN_DIAG_DDR_SOAK_ERROR_CLEAR 0x0 /* enum */ @@ -1336,15 +2060,19 @@ #define MC_CMD_FC_IN_DIAG_DATAPATH_CTRL_LEN 12 /* MC_CMD_FC_IN_CMD_OFST 0 */ #define MC_CMD_FC_IN_DIAG_DATAPATH_CTRL_OP_OFST 4 +/* Sub-opcode describing the operation to be carried out */ #define MC_CMD_FC_IN_DIAG_DATAPATH_CTRL_SUB_OP_OFST 8 -#define MC_CMD_FC_IN_DIAG_DATAPATH_CTRL_SET_MODE 0x0 /* enum */ -#define MC_CMD_FC_IN_DIAG_DATAPATH_CTRL_RAW_CONFIG 0x1 /* enum */ +/* enum: Set a known datapath configuration */ +#define MC_CMD_FC_IN_DIAG_DATAPATH_CTRL_SET_MODE 0x0 +/* enum: Apply raw config to datapath control registers */ +#define MC_CMD_FC_IN_DIAG_DATAPATH_CTRL_RAW_CONFIG 0x1 /* MC_CMD_FC_IN_DIAG_DATAPATH_CTRL_SET_MODE msgrequest */ #define MC_CMD_FC_IN_DIAG_DATAPATH_CTRL_SET_MODE_LEN 16 /* MC_CMD_FC_IN_CMD_OFST 0 */ #define MC_CMD_FC_IN_DIAG_DATAPATH_CTRL_SET_MODE_OP_OFST 4 #define MC_CMD_FC_IN_DIAG_DATAPATH_CTRL_SET_MODE_SUB_OP_OFST 8 +/* Datapath configuration identifier */ #define MC_CMD_FC_IN_DIAG_DATAPATH_CTRL_SET_MODE_MODE_OFST 12 #define MC_CMD_FC_IN_DIAG_DATAPATH_CTRL_SET_MODE_PASSTHROUGH 0x0 /* enum */ #define MC_CMD_FC_IN_DIAG_DATAPATH_CTRL_SET_MODE_SNAKE 0x1 /* enum */ @@ -1354,8 +2082,11 @@ /* MC_CMD_FC_IN_CMD_OFST 0 */ #define MC_CMD_FC_IN_DIAG_DATAPATH_CTRL_RAW_CONFIG_OP_OFST 4 #define MC_CMD_FC_IN_DIAG_DATAPATH_CTRL_RAW_CONFIG_SUB_OP_OFST 8 +/* Value to write into control register 1 */ #define MC_CMD_FC_IN_DIAG_DATAPATH_CTRL_RAW_CONFIG_CONTROL1_OFST 12 +/* Value to write into control register 2 */ #define MC_CMD_FC_IN_DIAG_DATAPATH_CTRL_RAW_CONFIG_CONTROL2_OFST 16 +/* Value to write into control register 3 */ #define MC_CMD_FC_IN_DIAG_DATAPATH_CTRL_RAW_CONFIG_CONTROL3_OFST 20 /* MC_CMD_FC_OUT msgresponse */ @@ -1444,7 +2175,8 @@ #define MC_CMD_FC_MAC_RX_STATS_JABBERS 0x16 /* enum */ #define MC_CMD_FC_MAC_RX_STATS_FRAGMENTS 0x17 /* enum */ #define MC_CMD_FC_MAC_RX_MAC_CONTROL_FRAMES 0x18 /* enum */ -#define MC_CMD_FC_MAC_RX_NSTATS 0x19 /* enum */ +/* enum: (Last entry) */ +#define MC_CMD_FC_MAC_RX_NSTATS 0x19 /* MC_CMD_FC_OUT_MAC_GET_TX_STATS msgresponse */ #define MC_CMD_FC_OUT_MAC_GET_TX_STATS_LEN ((((0-1+(64*MC_CMD_FC_MAC_TX_NSTATS))+1))>>3) @@ -1475,10 +2207,12 @@ #define MC_CMD_FC_MAC_TX_STATS_PKTS_1024_1518 0x13 /* enum */ #define MC_CMD_FC_MAC_TX_STATS_PKTS_1519_TX_MTU 0x14 /* enum */ #define MC_CMD_FC_MAC_TX_MAC_CONTROL_FRAMES 0x15 /* enum */ -#define MC_CMD_FC_MAC_TX_NSTATS 0x16 /* enum */ +/* enum: (Last entry) */ +#define MC_CMD_FC_MAC_TX_NSTATS 0x16 /* MC_CMD_FC_OUT_MAC_GET_STATS msgresponse */ #define MC_CMD_FC_OUT_MAC_GET_STATS_LEN ((((0-1+(64*MC_CMD_FC_MAC_NSTATS_PER_BLOCK))+1))>>3) +/* MAC Statistics */ #define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_OFST 0 #define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LEN 8 #define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LO_OFST 0 @@ -1499,10 +2233,14 @@ #define MC_CMD_FC_OUT_DDR_TEST_POLL_STATUS_OFST 0 #define MC_CMD_FC_OUT_DDR_TEST_POLL_CODE_LBN 0 #define MC_CMD_FC_OUT_DDR_TEST_POLL_CODE_WIDTH 8 -#define MC_CMD_FC_OP_DDR_TEST_NONE 0x0 /* enum */ -#define MC_CMD_FC_OP_DDR_TEST_INPROGRESS 0x1 /* enum */ -#define MC_CMD_FC_OP_DDR_TEST_SUCCESS 0x2 /* enum */ -#define MC_CMD_FC_OP_DDR_TEST_TIMER_EXPIRED 0x3 /* enum */ +/* enum: Test not yet initiated */ +#define MC_CMD_FC_OP_DDR_TEST_NONE 0x0 +/* enum: Test is in progress */ +#define MC_CMD_FC_OP_DDR_TEST_INPROGRESS 0x1 +/* enum: Timed completed */ +#define MC_CMD_FC_OP_DDR_TEST_SUCCESS 0x2 +/* enum: Test did not complete in specified time */ +#define MC_CMD_FC_OP_DDR_TEST_TIMER_EXPIRED 0x3 #define MC_CMD_FC_OUT_DDR_TEST_POLL_PRESENT_T0_LBN 11 #define MC_CMD_FC_OUT_DDR_TEST_POLL_PRESENT_T0_WIDTH 1 #define MC_CMD_FC_OUT_DDR_TEST_POLL_PRESENT_T1_LBN 10 @@ -1511,6 +2249,7 @@ #define MC_CMD_FC_OUT_DDR_TEST_POLL_PRESENT_B0_WIDTH 1 #define MC_CMD_FC_OUT_DDR_TEST_POLL_PRESENT_B1_LBN 8 #define MC_CMD_FC_OUT_DDR_TEST_POLL_PRESENT_B1_WIDTH 1 +/* Test result from FPGA */ #define MC_CMD_FC_OUT_DDR_TEST_POLL_RESULT_OFST 4 #define MC_CMD_FC_OUT_DDR_TEST_POLL_FPGA_SUPPORTS_T0_LBN 31 #define MC_CMD_FC_OUT_DDR_TEST_POLL_FPGA_SUPPORTS_T0_WIDTH 1 @@ -1539,23 +2278,35 @@ /* MC_CMD_FC_OUT_GET_ASSERT msgresponse */ #define MC_CMD_FC_OUT_GET_ASSERT_LEN 144 +/* Assertion status flag. */ #define MC_CMD_FC_OUT_GET_ASSERT_GLOBAL_FLAGS_OFST 0 #define MC_CMD_FC_OUT_GET_ASSERT_STATE_LBN 8 #define MC_CMD_FC_OUT_GET_ASSERT_STATE_WIDTH 8 -#define MC_CMD_FC_GET_ASSERT_FLAGS_STATE_CLEAR 0x0 /* enum */ -#define MC_CMD_FC_GET_ASSERT_FLAGS_STATE_NEW 0x1 /* enum */ -#define MC_CMD_FC_GET_ASSERT_FLAGS_STATE_NOTIFIED 0x2 /* enum */ +/* enum: No crash data available */ +#define MC_CMD_FC_GET_ASSERT_FLAGS_STATE_CLEAR 0x0 +/* enum: New crash data available */ +#define MC_CMD_FC_GET_ASSERT_FLAGS_STATE_NEW 0x1 +/* enum: Crash data has been sent */ +#define MC_CMD_FC_GET_ASSERT_FLAGS_STATE_NOTIFIED 0x2 #define MC_CMD_FC_OUT_GET_ASSERT_TYPE_LBN 0 #define MC_CMD_FC_OUT_GET_ASSERT_TYPE_WIDTH 8 -#define MC_CMD_FC_GET_ASSERT_FLAGS_TYPE_NONE 0x0 /* enum */ -#define MC_CMD_FC_GET_ASSERT_FLAGS_TYPE_EXCEPTION 0x1 /* enum */ -#define MC_CMD_FC_GET_ASSERT_FLAGS_TYPE_ASSERTION 0x2 /* enum */ +/* enum: No crash has been recorded. */ +#define MC_CMD_FC_GET_ASSERT_FLAGS_TYPE_NONE 0x0 +/* enum: Crash due to exception. */ +#define MC_CMD_FC_GET_ASSERT_FLAGS_TYPE_EXCEPTION 0x1 +/* enum: Crash due to assertion. */ +#define MC_CMD_FC_GET_ASSERT_FLAGS_TYPE_ASSERTION 0x2 +/* Failing PC value */ #define MC_CMD_FC_OUT_GET_ASSERT_SAVED_PC_OFFS_OFST 4 +/* Saved GP regs */ #define MC_CMD_FC_OUT_GET_ASSERT_GP_REGS_OFFS_OFST 8 #define MC_CMD_FC_OUT_GET_ASSERT_GP_REGS_OFFS_LEN 4 #define MC_CMD_FC_OUT_GET_ASSERT_GP_REGS_OFFS_NUM 31 +/* Exception Type */ #define MC_CMD_FC_OUT_GET_ASSERT_EXCEPTION_TYPE_OFFS_OFST 132 +/* Instruction at which exception occurred */ #define MC_CMD_FC_OUT_GET_ASSERT_EXCEPTION_PC_ADDR_OFFS_OFST 136 +/* BAD Address that triggered address-based exception */ #define MC_CMD_FC_OUT_GET_ASSERT_EXCEPTION_BAD_ADDR_OFFS_OFST 140 /* MC_CMD_FC_OUT_FPGA_BUILD msgresponse */ @@ -1573,6 +2324,7 @@ #define MC_CMD_FC_OUT_FPGA_BUILD_VERSION_MINOR_WIDTH 8 #define MC_CMD_FC_OUT_FPGA_BUILD_BUILD_NUM_LBN 0 #define MC_CMD_FC_OUT_FPGA_BUILD_BUILD_NUM_WIDTH 4 +/* Build timestamp (seconds since epoch) */ #define MC_CMD_FC_OUT_FPGA_BUILD_TIMESTAMP_OFST 4 #define MC_CMD_FC_OUT_FPGA_BUILD_PARAMETERS_OFST 8 #define MC_CMD_FC_OUT_FPGA_BUILD_FPGA_TYPE_LBN 0 @@ -1650,6 +2402,7 @@ #define MC_CMD_FC_OUT_FPGA_SERVICES_VERSION_MINOR_WIDTH 8 #define MC_CMD_FC_OUT_FPGA_SERVICES_BUILD_NUM_LBN 0 #define MC_CMD_FC_OUT_FPGA_SERVICES_BUILD_NUM_WIDTH 4 +/* Build timestamp (seconds since epoch) */ #define MC_CMD_FC_OUT_FPGA_SERVICES_TIMESTAMP_OFST 4 #define MC_CMD_FC_OUT_FPGA_SERVICES_PARAMETERS_OFST 8 #define MC_CMD_FC_OUT_FPGA_SERVICES_FC_FLASH_BOOTED_LBN 8 @@ -1686,6 +2439,7 @@ /* MC_CMD_FC_OUT_BSP_VERSION msgresponse */ #define MC_CMD_FC_OUT_BSP_VERSION_LEN 4 +/* Qsys system ID */ #define MC_CMD_FC_OUT_BSP_VERSION_SYSID_OFST 0 #define MC_CMD_FC_OUT_BSP_VERSION_VERSION_MAJOR_LBN 12 #define MC_CMD_FC_OUT_BSP_VERSION_VERSION_MAJOR_WIDTH 4 @@ -1696,11 +2450,14 @@ /* MC_CMD_FC_OUT_READ_MAP_COUNT msgresponse */ #define MC_CMD_FC_OUT_READ_MAP_COUNT_LEN 4 +/* Number of maps */ #define MC_CMD_FC_OUT_READ_MAP_COUNT_NUM_MAPS_OFST 0 /* MC_CMD_FC_OUT_READ_MAP_INDEX msgresponse */ #define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN 164 +/* Index of the map */ #define MC_CMD_FC_OUT_READ_MAP_INDEX_INDEX_OFST 0 +/* Options for the map */ #define MC_CMD_FC_OUT_READ_MAP_INDEX_OPTIONS_OFST 4 #define MC_CMD_FC_OUT_READ_MAP_INDEX_ALIGN_8 0x0 /* enum */ #define MC_CMD_FC_OUT_READ_MAP_INDEX_ALIGN_16 0x1 /* enum */ @@ -1713,19 +2470,24 @@ #define MC_CMD_FC_OUT_READ_MAP_INDEX_PERM_WRITE 0x20 /* enum */ #define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_FREE 0x0 /* enum */ #define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_LICENSED 0x40 /* enum */ +/* Address of start of map */ #define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_OFST 8 #define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LEN 8 #define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LO_OFST 8 #define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_HI_OFST 12 +/* Length of address map */ #define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_OFST 16 #define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LEN 8 #define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LO_OFST 16 #define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_HI_OFST 20 +/* Component information field */ #define MC_CMD_FC_OUT_READ_MAP_INDEX_COMP_INFO_OFST 24 +/* License expiry data for map */ #define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_OFST 28 #define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LEN 8 #define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LO_OFST 28 #define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_HI_OFST 32 +/* Name of the component */ #define MC_CMD_FC_OUT_READ_MAP_INDEX_NAME_OFST 36 #define MC_CMD_FC_OUT_READ_MAP_INDEX_NAME_LEN 1 #define MC_CMD_FC_OUT_READ_MAP_INDEX_NAME_NUM 128 @@ -1735,7 +2497,9 @@ /* MC_CMD_FC_OUT_CAPABILITIES msgresponse */ #define MC_CMD_FC_OUT_CAPABILITIES_LEN 8 +/* Number of internal ports */ #define MC_CMD_FC_OUT_CAPABILITIES_INTERNAL_OFST 0 +/* Number of external ports */ #define MC_CMD_FC_OUT_CAPABILITIES_EXTERNAL_OFST 4 /* MC_CMD_FC_OUT_GLOBAL_FLAGS msgresponse */ @@ -1769,34 +2533,46 @@ #define MC_CMD_FC_OUT_UHLINK_PHY_TRC_TX_VOD_WIDTH 16 #define MC_CMD_FC_OUT_UHLINK_PHY_TRC_TX_PREEMP_1STPOSTTAP_LBN 16 #define MC_CMD_FC_OUT_UHLINK_PHY_TRC_TX_PREEMP_1STPOSTTAP_WIDTH 16 +/* Transceiver Transmit settings */ #define MC_CMD_FC_OUT_UHLINK_PHY_TRC_TX_SETTINGS_1_OFST 4 #define MC_CMD_FC_OUT_UHLINK_PHY_TRC_TX_PREEMP_PRETAP_LBN 0 #define MC_CMD_FC_OUT_UHLINK_PHY_TRC_TX_PREEMP_PRETAP_WIDTH 16 #define MC_CMD_FC_OUT_UHLINK_PHY_TRC_TX_PREEMP_2NDPOSTTAP_LBN 16 #define MC_CMD_FC_OUT_UHLINK_PHY_TRC_TX_PREEMP_2NDPOSTTAP_WIDTH 16 +/* Transceiver Receive settings */ #define MC_CMD_FC_OUT_UHLINK_PHY_TRC_RX_SETTINGS_OFST 8 #define MC_CMD_FC_OUT_UHLINK_PHY_TRC_RX_DC_GAIN_LBN 0 #define MC_CMD_FC_OUT_UHLINK_PHY_TRC_RX_DC_GAIN_WIDTH 16 #define MC_CMD_FC_OUT_UHLINK_PHY_TRC_RX_EQ_CONTROL_LBN 16 #define MC_CMD_FC_OUT_UHLINK_PHY_TRC_RX_EQ_CONTROL_WIDTH 16 +/* Rx eye opening */ #define MC_CMD_FC_OUT_UHLINK_PHY_RX_EYE_OFST 12 #define MC_CMD_FC_OUT_UHLINK_PHY_RX_EYE_WIDTH_LBN 0 #define MC_CMD_FC_OUT_UHLINK_PHY_RX_EYE_WIDTH_WIDTH 16 #define MC_CMD_FC_OUT_UHLINK_PHY_RX_EYE_HEIGHT_LBN 16 #define MC_CMD_FC_OUT_UHLINK_PHY_RX_EYE_HEIGHT_WIDTH 16 +/* PCS status word */ #define MC_CMD_FC_OUT_UHLINK_PHY_PCS_STATUS_OFST 16 +/* Link status word */ #define MC_CMD_FC_OUT_UHLINK_PHY_LINK_STATE_WORD_OFST 20 #define MC_CMD_FC_OUT_UHLINK_PHY_LINK_STATE_LBN 0 #define MC_CMD_FC_OUT_UHLINK_PHY_LINK_STATE_WIDTH 1 #define MC_CMD_FC_OUT_UHLINK_PHY_LINK_CONFIGURED_LBN 1 #define MC_CMD_FC_OUT_UHLINK_PHY_LINK_CONFIGURED_WIDTH 1 +/* Current SFp parameters applied */ #define MC_CMD_FC_OUT_UHLINK_PHY_SFP_PARAMS_OFST 24 #define MC_CMD_FC_OUT_UHLINK_PHY_SFP_PARAMS_LEN 20 +/* Link speed is 100, 1000, 10000 */ #define MC_CMD_FC_OUT_UHLINK_PHY_SFP_SPEED_OFST 24 +/* Length of copper cable - zero when not relevant */ #define MC_CMD_FC_OUT_UHLINK_PHY_SFP_COPPER_LEN_OFST 28 +/* True if a dual speed SFP+ module */ #define MC_CMD_FC_OUT_UHLINK_PHY_SFP_DUAL_SPEED_OFST 32 +/* True if an SFP Module is present (other fields valid when true) */ #define MC_CMD_FC_OUT_UHLINK_PHY_SFP_PRESENT_OFST 36 +/* The type of the SFP+ Module */ #define MC_CMD_FC_OUT_UHLINK_PHY_SFP_TYPE_OFST 40 +/* PHY config flags */ #define MC_CMD_FC_OUT_UHLINK_PHY_PHY_CFG_OFST 44 #define MC_CMD_FC_OUT_UHLINK_PHY_PHY_CFG_DFE_LBN 0 #define MC_CMD_FC_OUT_UHLINK_PHY_PHY_CFG_DFE_WIDTH 1 @@ -1807,9 +2583,13 @@ /* MC_CMD_FC_OUT_UHLINK_MAC msgresponse */ #define MC_CMD_FC_OUT_UHLINK_MAC_LEN 20 +/* MAC configuration applied */ #define MC_CMD_FC_OUT_UHLINK_MAC_CONFIG_OFST 0 +/* MTU size */ #define MC_CMD_FC_OUT_UHLINK_MAC_MTU_OFST 4 +/* IF Mode status */ #define MC_CMD_FC_OUT_UHLINK_MAC_IF_STATUS_OFST 8 +/* MAC address configured */ #define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_OFST 12 #define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LEN 8 #define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LO_OFST 12 @@ -1817,6 +2597,7 @@ /* MC_CMD_FC_OUT_UHLINK_RX_EYE msgresponse */ #define MC_CMD_FC_OUT_UHLINK_RX_EYE_LEN ((((0-1+(32*MC_CMD_FC_UHLINK_RX_EYE_PER_BLOCK))+1))>>3) +/* Rx Eye measurements */ #define MC_CMD_FC_OUT_UHLINK_RX_EYE_RX_EYE_OFST 0 #define MC_CMD_FC_OUT_UHLINK_RX_EYE_RX_EYE_LEN 4 #define MC_CMD_FC_OUT_UHLINK_RX_EYE_RX_EYE_NUM MC_CMD_FC_UHLINK_RX_EYE_PER_BLOCK @@ -1826,7 +2607,9 @@ /* MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT msgresponse */ #define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_LEN ((((32-1+(64*MC_CMD_FC_UHLINK_RX_EYE_PLOT_ROWS_PER_BLOCK))+1))>>3) +/* Has the eye plot dump completed and data returned is valid? */ #define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_VALID_OFST 0 +/* Rx Eye binary plot */ #define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_OFST 4 #define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LEN 8 #define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LO_OFST 4 @@ -1851,12 +2634,16 @@ /* MC_CMD_FC_OUT_LICENSE msgresponse */ #define MC_CMD_FC_OUT_LICENSE_LEN 12 +/* Count of valid keys */ #define MC_CMD_FC_OUT_LICENSE_VALID_KEYS_OFST 0 +/* Count of invalid keys */ #define MC_CMD_FC_OUT_LICENSE_INVALID_KEYS_OFST 4 +/* Count of blacklisted keys */ #define MC_CMD_FC_OUT_LICENSE_BLACKLISTED_KEYS_OFST 8 /* MC_CMD_FC_OUT_STARTUP msgresponse */ #define MC_CMD_FC_OUT_STARTUP_LEN 4 +/* Capabilities of the FPGA/FC */ #define MC_CMD_FC_OUT_STARTUP_CAPABILITIES_OFST 0 #define MC_CMD_FC_OUT_STARTUP_CAN_ACCESS_FLASH_LBN 0 #define MC_CMD_FC_OUT_STARTUP_CAN_ACCESS_FLASH_WIDTH 1 @@ -1865,6 +2652,7 @@ #define MC_CMD_FC_OUT_DMA_READ_LENMIN 1 #define MC_CMD_FC_OUT_DMA_READ_LENMAX 252 #define MC_CMD_FC_OUT_DMA_READ_LEN(num) (0+1*(num)) +/* The data read */ #define MC_CMD_FC_OUT_DMA_READ_DATA_OFST 0 #define MC_CMD_FC_OUT_DMA_READ_DATA_LEN 1 #define MC_CMD_FC_OUT_DMA_READ_DATA_MINNUM 1 @@ -1872,27 +2660,36 @@ /* MC_CMD_FC_OUT_TIMED_READ_SET msgresponse */ #define MC_CMD_FC_OUT_TIMED_READ_SET_LEN 4 +/* Timer handle */ #define MC_CMD_FC_OUT_TIMED_READ_SET_FC_HANDLE_OFST 0 /* MC_CMD_FC_OUT_TIMED_READ_GET msgresponse */ #define MC_CMD_FC_OUT_TIMED_READ_GET_LEN 52 +/* Host supplied handle (unique) */ #define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_HANDLE_OFST 0 +/* Address into which to transfer data in host */ #define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_OFST 4 #define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LEN 8 #define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LO_OFST 4 #define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_HI_OFST 8 +/* AOE address from which to transfer data */ #define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_OFST 12 #define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LEN 8 #define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LO_OFST 12 #define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_HI_OFST 16 +/* Length of AOE transfer (total) */ #define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_LENGTH_OFST 20 +/* Length of host transfer (total) */ #define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_LENGTH_OFST 24 +/* See FLAGS entry for MC_CMD_FC_IN_TIMED_READ_SET */ #define MC_CMD_FC_OUT_TIMED_READ_GET_FLAGS_OFST 28 #define MC_CMD_FC_OUT_TIMED_READ_GET_PERIOD_OFST 32 +/* When active, start read time */ #define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_OFST 36 #define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LEN 8 #define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LO_OFST 36 #define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_HI_OFST 40 +/* When active, end read time */ #define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_OFST 44 #define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LEN 8 #define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LO_OFST 44 @@ -1964,7 +2761,9 @@ /* MC_CMD_FC_OUT_DIAG_POWER_NOISE_READ_CONFIG msgresponse */ #define MC_CMD_FC_OUT_DIAG_POWER_NOISE_READ_CONFIG_LEN 8 +/* The 32-bit value read from the toggle count register */ #define MC_CMD_FC_OUT_DIAG_POWER_NOISE_READ_CONFIG_TOGGLE_COUNT_OFST 0 +/* The 32-bit value read from the clock enable count register */ #define MC_CMD_FC_OUT_DIAG_POWER_NOISE_READ_CONFIG_CLKEN_COUNT_OFST 4 /* MC_CMD_FC_OUT_DIAG_POWER_NOISE_WRITE_CONFIG msgresponse */ @@ -1975,6 +2774,7 @@ /* MC_CMD_FC_OUT_DIAG_DDR_SOAK_RESULT msgresponse */ #define MC_CMD_FC_OUT_DIAG_DDR_SOAK_RESULT_LEN 8 +/* DDR soak test status word; bits [4:0] are relevant. */ #define MC_CMD_FC_OUT_DIAG_DDR_SOAK_RESULT_STATUS_OFST 0 #define MC_CMD_FC_OUT_DIAG_DDR_SOAK_RESULT_PASSED_LBN 0 #define MC_CMD_FC_OUT_DIAG_DDR_SOAK_RESULT_PASSED_WIDTH 1 @@ -1986,6 +2786,7 @@ #define MC_CMD_FC_OUT_DIAG_DDR_SOAK_RESULT_TIMEOUT_WIDTH 1 #define MC_CMD_FC_OUT_DIAG_DDR_SOAK_RESULT_PNF_LBN 4 #define MC_CMD_FC_OUT_DIAG_DDR_SOAK_RESULT_PNF_WIDTH 1 +/* DDR soak test error count */ #define MC_CMD_FC_OUT_DIAG_DDR_SOAK_RESULT_ERR_COUNT_OFST 4 /* MC_CMD_FC_OUT_DIAG_DDR_SOAK_STOP msgresponse */ @@ -2002,39 +2803,70 @@ /***********************************/ -/* MC_CMD_AOE - * AOE operations (on MC rather than FC) +/* MC_CMD_AOE + * AOE operations on MC */ -#define MC_CMD_AOE 0xa +#define MC_CMD_AOE 0xa /* MC_CMD_AOE_IN msgrequest */ #define MC_CMD_AOE_IN_LEN 4 #define MC_CMD_AOE_IN_OP_HDR_OFST 0 #define MC_CMD_AOE_IN_OP_LBN 0 #define MC_CMD_AOE_IN_OP_WIDTH 8 -#define MC_CMD_AOE_OP_INFO 0x1 /* enum */ -#define MC_CMD_AOE_OP_CURRENTS 0x2 /* enum */ -#define MC_CMD_AOE_OP_TEMPERATURES 0x3 /* enum */ -#define MC_CMD_AOE_OP_CPLD_IDLE 0x4 /* enum */ -#define MC_CMD_AOE_OP_CPLD_READ 0x5 /* enum */ -#define MC_CMD_AOE_OP_CPLD_WRITE 0x6 /* enum */ -#define MC_CMD_AOE_OP_CPLD_INSTRUCTION 0x7 /* enum */ -#define MC_CMD_AOE_OP_CPLD_REPROGRAM 0x8 /* enum */ -#define MC_CMD_AOE_OP_POWER 0x9 /* enum */ -#define MC_CMD_AOE_OP_LOAD 0xa /* enum */ -#define MC_CMD_AOE_OP_FAN_CONTROL 0xb /* enum */ -#define MC_CMD_AOE_OP_FAN_FAILURES 0xc /* enum */ -#define MC_CMD_AOE_OP_MAC_STATS 0xd /* enum */ -#define MC_CMD_AOE_OP_GET_PHY_MEDIA_INFO 0xe /* enum */ -#define MC_CMD_AOE_OP_JTAG_WRITE 0xf /* enum */ -#define MC_CMD_AOE_OP_FPGA_ACCESS 0x10 /* enum */ -#define MC_CMD_AOE_OP_SET_MTU_OFFSET 0x11 /* enum */ -#define MC_CMD_AOE_OP_LINK_STATE 0x12 /* enum */ -#define MC_CMD_AOE_OP_SIENA_STATS 0x13 /* enum */ -#define MC_CMD_AOE_OP_DDR 0x14 /* enum */ -#define MC_CMD_AOE_OP_FC 0x15 /* enum */ -#define MC_CMD_AOE_OP_DDR_ECC_STATUS 0x16 /* enum */ -#define MC_CMD_AOE_OP_MC_SPI_MASTER 0x17 /* enum */ +/* enum: FPGA and CPLD information */ +#define MC_CMD_AOE_OP_INFO 0x1 +/* enum: Currents and voltages read from MCP3424s; DEBUG */ +#define MC_CMD_AOE_OP_CURRENTS 0x2 +/* enum: Temperatures at locations around the PCB; DEBUG */ +#define MC_CMD_AOE_OP_TEMPERATURES 0x3 +/* enum: Set CPLD to idle */ +#define MC_CMD_AOE_OP_CPLD_IDLE 0x4 +/* enum: Read from CPLD register */ +#define MC_CMD_AOE_OP_CPLD_READ 0x5 +/* enum: Write to CPLD register */ +#define MC_CMD_AOE_OP_CPLD_WRITE 0x6 +/* enum: Execute CPLD instruction */ +#define MC_CMD_AOE_OP_CPLD_INSTRUCTION 0x7 +/* enum: Reprogram the CPLD on the AOE device */ +#define MC_CMD_AOE_OP_CPLD_REPROGRAM 0x8 +/* enum: AOE power control */ +#define MC_CMD_AOE_OP_POWER 0x9 +/* enum: AOE image loading */ +#define MC_CMD_AOE_OP_LOAD 0xa +/* enum: Fan monitoring */ +#define MC_CMD_AOE_OP_FAN_CONTROL 0xb +/* enum: Fan failures since last reset */ +#define MC_CMD_AOE_OP_FAN_FAILURES 0xc +/* enum: Get generic AOE MAC statistics */ +#define MC_CMD_AOE_OP_MAC_STATS 0xd +/* enum: Retrieve PHY specific information */ +#define MC_CMD_AOE_OP_GET_PHY_MEDIA_INFO 0xe +/* enum: Write a number of JTAG primitive commands, return will give data */ +#define MC_CMD_AOE_OP_JTAG_WRITE 0xf +/* enum: Control access to the FPGA via the Siena JTAG Chain */ +#define MC_CMD_AOE_OP_FPGA_ACCESS 0x10 +/* enum: Set the MTU offset between Siena and AOE MACs */ +#define MC_CMD_AOE_OP_SET_MTU_OFFSET 0x11 +/* enum: How link state is handled */ +#define MC_CMD_AOE_OP_LINK_STATE 0x12 +/* enum: How Siena MAC statistics are reported (deprecated - use + * MC_CMD_AOE_OP_ASIC_STATS) + */ +#define MC_CMD_AOE_OP_SIENA_STATS 0x13 +/* enum: How native ASIC MAC statistics are reported - replaces the deprecated + * command MC_CMD_AOE_OP_SIENA_STATS + */ +#define MC_CMD_AOE_OP_ASIC_STATS 0x13 +/* enum: DDR memory information */ +#define MC_CMD_AOE_OP_DDR 0x14 +/* enum: FC control */ +#define MC_CMD_AOE_OP_FC 0x15 +/* enum: DDR ECC status reads */ +#define MC_CMD_AOE_OP_DDR_ECC_STATUS 0x16 +/* enum: Commands for MC-SPI Master emulation */ +#define MC_CMD_AOE_OP_MC_SPI_MASTER 0x17 +/* enum: Commands for FC boot control */ +#define MC_CMD_AOE_OP_FC_BOOT 0x18 /* MC_CMD_AOE_OUT msgresponse */ #define MC_CMD_AOE_OUT_LEN 0 @@ -2077,31 +2909,46 @@ #define MC_CMD_AOE_IN_CPLD_REPROGRAM_LEN 8 /* MC_CMD_AOE_IN_CMD_OFST 0 */ #define MC_CMD_AOE_IN_CPLD_REPROGRAM_OP_OFST 4 -#define MC_CMD_AOE_IN_CPLD_REPROGRAM_REPROGRAM 0x1 /* enum */ -#define MC_CMD_AOE_IN_CPLD_REPROGRAM_REPROGRAM_EVENT 0x3 /* enum */ -#define MC_CMD_AOE_IN_CPLD_REPROGRAM_STATUS 0x4 /* enum */ +/* enum: Reprogram CPLD, poll for completion */ +#define MC_CMD_AOE_IN_CPLD_REPROGRAM_REPROGRAM 0x1 +/* enum: Reprogram CPLD, send event on completion */ +#define MC_CMD_AOE_IN_CPLD_REPROGRAM_REPROGRAM_EVENT 0x3 +/* enum: Get status of reprogramming operation */ +#define MC_CMD_AOE_IN_CPLD_REPROGRAM_STATUS 0x4 /* MC_CMD_AOE_IN_POWER msgrequest */ #define MC_CMD_AOE_IN_POWER_LEN 8 /* MC_CMD_AOE_IN_CMD_OFST 0 */ +/* Turn on or off AOE power */ #define MC_CMD_AOE_IN_POWER_OP_OFST 4 -#define MC_CMD_AOE_IN_POWER_OFF 0x0 /* enum */ -#define MC_CMD_AOE_IN_POWER_ON 0x1 /* enum */ -#define MC_CMD_AOE_IN_POWER_CLEAR 0x2 /* enum */ -#define MC_CMD_AOE_IN_POWER_SHOW_CURRENT 0x3 /* enum */ -#define MC_CMD_AOE_IN_POWER_SHOW_PEAK 0x4 /* enum */ -#define MC_CMD_AOE_IN_POWER_DDR_LAST 0x5 /* enum */ -#define MC_CMD_AOE_IN_POWER_DDR_PEAK 0x6 /* enum */ -#define MC_CMD_AOE_IN_POWER_DDR_CLEAR 0x7 /* enum */ +/* enum: Turn off FPGA power */ +#define MC_CMD_AOE_IN_POWER_OFF 0x0 +/* enum: Turn on FPGA power */ +#define MC_CMD_AOE_IN_POWER_ON 0x1 +/* enum: Clear peak power measurement */ +#define MC_CMD_AOE_IN_POWER_CLEAR 0x2 +/* enum: Show current power in sensors output */ +#define MC_CMD_AOE_IN_POWER_SHOW_CURRENT 0x3 +/* enum: Show peak power in sensors output */ +#define MC_CMD_AOE_IN_POWER_SHOW_PEAK 0x4 +/* enum: Show current DDR current */ +#define MC_CMD_AOE_IN_POWER_DDR_LAST 0x5 +/* enum: Show peak DDR current */ +#define MC_CMD_AOE_IN_POWER_DDR_PEAK 0x6 +/* enum: Clear peak DDR current */ +#define MC_CMD_AOE_IN_POWER_DDR_CLEAR 0x7 /* MC_CMD_AOE_IN_LOAD msgrequest */ #define MC_CMD_AOE_IN_LOAD_LEN 8 /* MC_CMD_AOE_IN_CMD_OFST 0 */ +/* Image to be loaded (0 - main or 1 - diagnostic) to load in normal sequence + */ #define MC_CMD_AOE_IN_LOAD_IMAGE_OFST 4 /* MC_CMD_AOE_IN_FAN_CONTROL msgrequest */ #define MC_CMD_AOE_IN_FAN_CONTROL_LEN 8 /* MC_CMD_AOE_IN_CMD_OFST 0 */ +/* If non zero report measured fan RPM rather than nominal */ #define MC_CMD_AOE_IN_FAN_CONTROL_REAL_RPM_OFST 4 /* MC_CMD_AOE_IN_FAN_FAILURES msgrequest */ @@ -2111,7 +2958,9 @@ /* MC_CMD_AOE_IN_MAC_STATS msgrequest */ #define MC_CMD_AOE_IN_MAC_STATS_LEN 24 /* MC_CMD_AOE_IN_CMD_OFST 0 */ +/* AOE port */ #define MC_CMD_AOE_IN_MAC_STATS_PORT_OFST 4 +/* Host memory address for statistics */ #define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_OFST 8 #define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LEN 8 #define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LO_OFST 8 @@ -2131,11 +2980,13 @@ #define MC_CMD_AOE_IN_MAC_STATS_PERIODIC_NOEVENT_WIDTH 1 #define MC_CMD_AOE_IN_MAC_STATS_PERIOD_MS_LBN 16 #define MC_CMD_AOE_IN_MAC_STATS_PERIOD_MS_WIDTH 16 +/* Length of DMA data (optional) */ #define MC_CMD_AOE_IN_MAC_STATS_DMA_LEN_OFST 20 /* MC_CMD_AOE_IN_GET_PHY_MEDIA_INFO msgrequest */ #define MC_CMD_AOE_IN_GET_PHY_MEDIA_INFO_LEN 12 /* MC_CMD_AOE_IN_CMD_OFST 0 */ +/* AOE port */ #define MC_CMD_AOE_IN_GET_PHY_MEDIA_INFO_PORT_OFST 4 #define MC_CMD_AOE_IN_GET_PHY_MEDIA_INFO_PAGE_OFST 8 @@ -2153,16 +3004,23 @@ /* MC_CMD_AOE_IN_FPGA_ACCESS msgrequest */ #define MC_CMD_AOE_IN_FPGA_ACCESS_LEN 8 /* MC_CMD_AOE_IN_CMD_OFST 0 */ +/* Enable or disable access */ #define MC_CMD_AOE_IN_FPGA_ACCESS_OP_OFST 4 -#define MC_CMD_AOE_IN_FPGA_ACCESS_ENABLE 0x1 /* enum */ -#define MC_CMD_AOE_IN_FPGA_ACCESS_DISABLE 0x2 /* enum */ +/* enum: Enable access */ +#define MC_CMD_AOE_IN_FPGA_ACCESS_ENABLE 0x1 +/* enum: Disable access */ +#define MC_CMD_AOE_IN_FPGA_ACCESS_DISABLE 0x2 /* MC_CMD_AOE_IN_SET_MTU_OFFSET msgrequest */ #define MC_CMD_AOE_IN_SET_MTU_OFFSET_LEN 12 /* MC_CMD_AOE_IN_CMD_OFST 0 */ +/* AOE port - when not ALL_EXTERNAL or ALL_INTERNAL specifies port number */ #define MC_CMD_AOE_IN_SET_MTU_OFFSET_PORT_OFST 4 -#define MC_CMD_AOE_IN_SET_MTU_OFFSET_ALL_EXTERNAL 0x8000 /* enum */ -#define MC_CMD_AOE_IN_SET_MTU_OFFSET_ALL_INTERNAL 0x4000 /* enum */ +/* enum: Apply to all external ports */ +#define MC_CMD_AOE_IN_SET_MTU_OFFSET_ALL_EXTERNAL 0x8000 +/* enum: Apply to all internal ports */ +#define MC_CMD_AOE_IN_SET_MTU_OFFSET_ALL_INTERNAL 0x4000 +/* The MTU offset to be applied to the external ports */ #define MC_CMD_AOE_IN_SET_MTU_OFFSET_OFFSET_OFST 8 /* MC_CMD_AOE_IN_LINK_STATE msgrequest */ @@ -2171,31 +3029,52 @@ #define MC_CMD_AOE_IN_LINK_STATE_MODE_OFST 4 #define MC_CMD_AOE_IN_LINK_STATE_CONFIG_MODE_LBN 0 #define MC_CMD_AOE_IN_LINK_STATE_CONFIG_MODE_WIDTH 8 -#define MC_CMD_AOE_IN_LINK_STATE_SIMPLE_SEPARATE 0x0 /* enum */ -#define MC_CMD_AOE_IN_LINK_STATE_SIMPLE_COMBINED 0x1 /* enum */ -#define MC_CMD_AOE_IN_LINK_STATE_DIAGNOSTIC 0x2 /* enum */ -#define MC_CMD_AOE_IN_LINK_STATE_CUSTOM 0x3 /* enum */ +/* enum: AOE and associated external port */ +#define MC_CMD_AOE_IN_LINK_STATE_SIMPLE_SEPARATE 0x0 +/* enum: AOE and OR of all external ports */ +#define MC_CMD_AOE_IN_LINK_STATE_SIMPLE_COMBINED 0x1 +/* enum: Individual ports */ +#define MC_CMD_AOE_IN_LINK_STATE_DIAGNOSTIC 0x2 +/* enum: Configure link state mode on given AOE port */ +#define MC_CMD_AOE_IN_LINK_STATE_CUSTOM 0x3 #define MC_CMD_AOE_IN_LINK_STATE_OPERATION_LBN 8 #define MC_CMD_AOE_IN_LINK_STATE_OPERATION_WIDTH 8 -#define MC_CMD_AOE_IN_LINK_STATE_OP_NONE 0x0 /* enum */ -#define MC_CMD_AOE_IN_LINK_STATE_OP_OR 0x1 /* enum */ -#define MC_CMD_AOE_IN_LINK_STATE_OP_AND 0x2 /* enum */ +/* enum: No-op */ +#define MC_CMD_AOE_IN_LINK_STATE_OP_NONE 0x0 +/* enum: logical OR of all SFP ports link status */ +#define MC_CMD_AOE_IN_LINK_STATE_OP_OR 0x1 +/* enum: logical AND of all SFP ports link status */ +#define MC_CMD_AOE_IN_LINK_STATE_OP_AND 0x2 #define MC_CMD_AOE_IN_LINK_STATE_SFP_MASK_LBN 16 #define MC_CMD_AOE_IN_LINK_STATE_SFP_MASK_WIDTH 16 /* MC_CMD_AOE_IN_SIENA_STATS msgrequest */ #define MC_CMD_AOE_IN_SIENA_STATS_LEN 8 /* MC_CMD_AOE_IN_CMD_OFST 0 */ +/* How MAC statistics are reported */ #define MC_CMD_AOE_IN_SIENA_STATS_MODE_OFST 4 -#define MC_CMD_AOE_IN_SIENA_STATS_STATS_SIENA 0x0 /* enum */ -#define MC_CMD_AOE_IN_SIENA_STATS_STATS_AOE 0x1 /* enum */ +/* enum: Statistics from Siena (default) */ +#define MC_CMD_AOE_IN_SIENA_STATS_STATS_SIENA 0x0 +/* enum: Statistics from AOE external ports */ +#define MC_CMD_AOE_IN_SIENA_STATS_STATS_AOE 0x1 + +/* MC_CMD_AOE_IN_ASIC_STATS msgrequest */ +#define MC_CMD_AOE_IN_ASIC_STATS_LEN 8 +/* MC_CMD_AOE_IN_CMD_OFST 0 */ +/* How MAC statistics are reported */ +#define MC_CMD_AOE_IN_ASIC_STATS_MODE_OFST 4 +/* enum: Statistics from the ASIC (default) */ +#define MC_CMD_AOE_IN_ASIC_STATS_STATS_ASIC 0x0 +/* enum: Statistics from AOE external ports */ +#define MC_CMD_AOE_IN_ASIC_STATS_STATS_AOE 0x1 /* MC_CMD_AOE_IN_DDR msgrequest */ #define MC_CMD_AOE_IN_DDR_LEN 12 /* MC_CMD_AOE_IN_CMD_OFST 0 */ #define MC_CMD_AOE_IN_DDR_BANK_OFST 4 /* Enum values, see field(s): */ -/* MC_CMD_FC_IN_DDR_BANK */ +/* MC_CMD_FC/MC_CMD_FC_IN_DDR/MC_CMD_FC_IN_DDR_BANK */ +/* Page index of SPD data */ #define MC_CMD_AOE_IN_DDR_SPD_PAGE_ID_OFST 8 /* MC_CMD_AOE_IN_FC msgrequest */ @@ -2207,14 +3086,17 @@ /* MC_CMD_AOE_IN_CMD_OFST 0 */ #define MC_CMD_AOE_IN_DDR_ECC_STATUS_BANK_OFST 4 /* Enum values, see field(s): */ -/* MC_CMD_FC_IN_DDR_BANK */ +/* MC_CMD_FC/MC_CMD_FC_IN_DDR/MC_CMD_FC_IN_DDR_BANK */ /* MC_CMD_AOE_IN_MC_SPI_MASTER msgrequest */ #define MC_CMD_AOE_IN_MC_SPI_MASTER_LEN 8 /* MC_CMD_AOE_IN_CMD_OFST 0 */ +/* Basic commands for MC SPI Master emulation. */ #define MC_CMD_AOE_IN_MC_SPI_MASTER_OP_OFST 4 -#define MC_CMD_AOE_IN_MC_SPI_MASTER_READ 0x0 /* enum */ -#define MC_CMD_AOE_IN_MC_SPI_MASTER_WRITE 0x1 /* enum */ +/* enum: MC SPI read */ +#define MC_CMD_AOE_IN_MC_SPI_MASTER_READ 0x0 +/* enum: MC SPI write */ +#define MC_CMD_AOE_IN_MC_SPI_MASTER_WRITE 0x1 /* MC_CMD_AOE_IN_MC_SPI_MASTER_READ msgrequest */ #define MC_CMD_AOE_IN_MC_SPI_MASTER_READ_LEN 12 @@ -2229,42 +3111,80 @@ #define MC_CMD_AOE_IN_MC_SPI_MASTER_WRITE_OFFSET_OFST 8 #define MC_CMD_AOE_IN_MC_SPI_MASTER_WRITE_DATA_OFST 12 +/* MC_CMD_AOE_IN_FC_BOOT msgrequest */ +#define MC_CMD_AOE_IN_FC_BOOT_LEN 8 +/* MC_CMD_AOE_IN_CMD_OFST 0 */ +/* FC boot control flags */ +#define MC_CMD_AOE_IN_FC_BOOT_CONTROL_OFST 4 +#define MC_CMD_AOE_IN_FC_BOOT_CONTROL_BOOT_ENABLE_LBN 0 +#define MC_CMD_AOE_IN_FC_BOOT_CONTROL_BOOT_ENABLE_WIDTH 1 + /* MC_CMD_AOE_OUT_INFO msgresponse */ #define MC_CMD_AOE_OUT_INFO_LEN 44 +/* JTAG IDCODE of CPLD */ #define MC_CMD_AOE_OUT_INFO_CPLD_IDCODE_OFST 0 +/* Version of CPLD */ #define MC_CMD_AOE_OUT_INFO_CPLD_VERSION_OFST 4 +/* JTAG IDCODE of FPGA */ #define MC_CMD_AOE_OUT_INFO_FPGA_IDCODE_OFST 8 +/* JTAG USERCODE of FPGA */ #define MC_CMD_AOE_OUT_INFO_FPGA_VERSION_OFST 12 +/* FPGA type - read from CPLD straps */ #define MC_CMD_AOE_OUT_INFO_FPGA_TYPE_OFST 16 +/* FPGA state (debug) */ #define MC_CMD_AOE_OUT_INFO_FPGA_STATE_OFST 20 +/* FPGA image - partition from which loaded */ #define MC_CMD_AOE_OUT_INFO_FPGA_IMAGE_OFST 24 +/* FC state */ #define MC_CMD_AOE_OUT_INFO_FC_STATE_OFST 28 -#define MC_CMD_AOE_OUT_INFO_WATCHDOG 0x1 /* enum */ -#define MC_CMD_AOE_OUT_INFO_COMMS 0x2 /* enum */ +/* enum: Set if watchdog working */ +#define MC_CMD_AOE_OUT_INFO_WATCHDOG 0x1 +/* enum: Set if MC-FC communications working */ +#define MC_CMD_AOE_OUT_INFO_COMMS 0x2 +/* Random pieces of information */ #define MC_CMD_AOE_OUT_INFO_FLAGS_OFST 32 -#define MC_CMD_AOE_OUT_INFO_PEG_POWER 0x1 /* enum */ -#define MC_CMD_AOE_OUT_INFO_CPLD_GOOD 0x2 /* enum */ -#define MC_CMD_AOE_OUT_INFO_FPGA_GOOD 0x4 /* enum */ -#define MC_CMD_AOE_OUT_INFO_FPGA_POWER 0x8 /* enum */ -#define MC_CMD_AOE_OUT_INFO_BAD_SODIMM 0x10 /* enum */ -#define MC_CMD_AOE_OUT_INFO_HAS_BYTEBLASTER 0x20 /* enum */ +/* enum: Power to FPGA supplied by PEG connector, not PCIe bus */ +#define MC_CMD_AOE_OUT_INFO_PEG_POWER 0x1 +/* enum: CPLD apparently good */ +#define MC_CMD_AOE_OUT_INFO_CPLD_GOOD 0x2 +/* enum: FPGA working normally */ +#define MC_CMD_AOE_OUT_INFO_FPGA_GOOD 0x4 +/* enum: FPGA is powered */ +#define MC_CMD_AOE_OUT_INFO_FPGA_POWER 0x8 +/* enum: Board has incompatible SODIMMs fitted */ +#define MC_CMD_AOE_OUT_INFO_BAD_SODIMM 0x10 +/* enum: Board has ByteBlaster connected */ +#define MC_CMD_AOE_OUT_INFO_HAS_BYTEBLASTER 0x20 +/* Revision of Modena board */ #define MC_CMD_AOE_OUT_INFO_BOARD_REVISION_OFST 36 #define MC_CMD_AOE_OUT_INFO_UNKNOWN 0x0 /* enum */ #define MC_CMD_AOE_OUT_INFO_R1_0 0x10 /* enum */ #define MC_CMD_AOE_OUT_INFO_R1_1 0x11 /* enum */ #define MC_CMD_AOE_OUT_INFO_R1_2 0x12 /* enum */ +/* Result of FC booting - not valid while a ByteBlaster is connected. */ #define MC_CMD_AOE_OUT_INFO_FC_BOOT_RESULT_OFST 40 -#define MC_CMD_AOE_OUT_INFO_FC_BOOT_FAIL_NO_ERROR 0x0 /* enum */ -#define MC_CMD_AOE_OUT_INFO_FC_BOOT_FAIL_BAD_ADDRESS 0x1 /* enum */ -#define MC_CMD_AOE_OUT_INFO_FC_BOOT_FAIL_BAD_MAGIC 0x2 /* enum */ -#define MC_CMD_AOE_OUT_INFO_FC_BOOT_FAIL_BAD_TEXT 0x3 /* enum */ -#define MC_CMD_AOE_OUT_INFO_FC_BOOT_FAIL_BAD_CHECKSUM 0x4 /* enum */ -#define MC_CMD_AOE_OUT_INFO_FC_BOOT_FAIL_BAD_BSP 0x5 /* enum */ -#define MC_CMD_AOE_OUT_INFO_FC_BOOT_APP_EXECUTE 0x80 /* enum */ -#define MC_CMD_AOE_OUT_INFO_FC_BOOT_NO_BOOTROM 0xff /* enum */ +/* enum: No error */ +#define MC_CMD_AOE_OUT_INFO_FC_BOOT_FAIL_NO_ERROR 0x0 +/* enum: Bad address set in CPLD */ +#define MC_CMD_AOE_OUT_INFO_FC_BOOT_FAIL_BAD_ADDRESS 0x1 +/* enum: Bad header */ +#define MC_CMD_AOE_OUT_INFO_FC_BOOT_FAIL_BAD_MAGIC 0x2 +/* enum: Bad text section details */ +#define MC_CMD_AOE_OUT_INFO_FC_BOOT_FAIL_BAD_TEXT 0x3 +/* enum: Bad checksum */ +#define MC_CMD_AOE_OUT_INFO_FC_BOOT_FAIL_BAD_CHECKSUM 0x4 +/* enum: Bad BSP */ +#define MC_CMD_AOE_OUT_INFO_FC_BOOT_FAIL_BAD_BSP 0x5 +/* enum: FC application loaded and execution attempted */ +#define MC_CMD_AOE_OUT_INFO_FC_BOOT_APP_EXECUTE 0x80 +/* enum: FC application Started */ +#define MC_CMD_AOE_OUT_INFO_FC_BOOT_APP_STARTED 0x81 +/* enum: No bootrom in FPGA */ +#define MC_CMD_AOE_OUT_INFO_FC_BOOT_NO_BOOTROM 0xff /* MC_CMD_AOE_OUT_CURRENTS msgresponse */ #define MC_CMD_AOE_OUT_CURRENTS_LEN 68 +/* Set of currents and voltages (mA or mV as appropriate) */ #define MC_CMD_AOE_OUT_CURRENTS_VALUES_OFST 0 #define MC_CMD_AOE_OUT_CURRENTS_VALUES_LEN 4 #define MC_CMD_AOE_OUT_CURRENTS_VALUES_NUM 17 @@ -2288,10 +3208,12 @@ /* MC_CMD_AOE_OUT_TEMPERATURES msgresponse */ #define MC_CMD_AOE_OUT_TEMPERATURES_LEN 40 +/* Set of temperatures */ #define MC_CMD_AOE_OUT_TEMPERATURES_VALUES_OFST 0 #define MC_CMD_AOE_OUT_TEMPERATURES_VALUES_LEN 4 #define MC_CMD_AOE_OUT_TEMPERATURES_VALUES_NUM 10 -#define MC_CMD_AOE_OUT_TEMPERATURES_MAIN_0 0x0 /* enum */ +/* enum: The first set of enum values are for Modena code. */ +#define MC_CMD_AOE_OUT_TEMPERATURES_MAIN_0 0x0 #define MC_CMD_AOE_OUT_TEMPERATURES_MAIN_1 0x1 /* enum */ #define MC_CMD_AOE_OUT_TEMPERATURES_IND_0 0x2 /* enum */ #define MC_CMD_AOE_OUT_TEMPERATURES_IND_1 0x3 /* enum */ @@ -2301,15 +3223,27 @@ #define MC_CMD_AOE_OUT_TEMPERATURES_PSU 0x7 /* enum */ #define MC_CMD_AOE_OUT_TEMPERATURES_FPGA 0x8 /* enum */ #define MC_CMD_AOE_OUT_TEMPERATURES_SIENA 0x9 /* enum */ +/* enum: The second set of enum values are for Sorrento code. */ +#define MC_CMD_AOE_OUT_TEMPERATURES_SORRENTO_MAIN_0 0x0 +#define MC_CMD_AOE_OUT_TEMPERATURES_SORRENTO_MAIN_1 0x1 /* enum */ +#define MC_CMD_AOE_OUT_TEMPERATURES_SORRENTO_IND_0 0x2 /* enum */ +#define MC_CMD_AOE_OUT_TEMPERATURES_SORRENTO_IND_1 0x3 /* enum */ +#define MC_CMD_AOE_OUT_TEMPERATURES_SORRENTO_SODIMM_0 0x4 /* enum */ +#define MC_CMD_AOE_OUT_TEMPERATURES_SORRENTO_SODIMM_1 0x5 /* enum */ +#define MC_CMD_AOE_OUT_TEMPERATURES_SORRENTO_FPGA 0x6 /* enum */ +#define MC_CMD_AOE_OUT_TEMPERATURES_SORRENTO_PHY0 0x7 /* enum */ +#define MC_CMD_AOE_OUT_TEMPERATURES_SORRENTO_PHY1 0x8 /* enum */ /* MC_CMD_AOE_OUT_CPLD_READ msgresponse */ #define MC_CMD_AOE_OUT_CPLD_READ_LEN 4 +/* The value read from the CPLD */ #define MC_CMD_AOE_OUT_CPLD_READ_VALUE_OFST 0 /* MC_CMD_AOE_OUT_FAN_FAILURES msgresponse */ #define MC_CMD_AOE_OUT_FAN_FAILURES_LENMIN 4 #define MC_CMD_AOE_OUT_FAN_FAILURES_LENMAX 252 #define MC_CMD_AOE_OUT_FAN_FAILURES_LEN(num) (0+4*(num)) +/* Failure counts for each fan */ #define MC_CMD_AOE_OUT_FAN_FAILURES_COUNT_OFST 0 #define MC_CMD_AOE_OUT_FAN_FAILURES_COUNT_LEN 4 #define MC_CMD_AOE_OUT_FAN_FAILURES_COUNT_MINNUM 1 @@ -2317,12 +3251,24 @@ /* MC_CMD_AOE_OUT_CPLD_REPROGRAM msgresponse */ #define MC_CMD_AOE_OUT_CPLD_REPROGRAM_LEN 4 +/* Results of status command (only) */ #define MC_CMD_AOE_OUT_CPLD_REPROGRAM_STATUS_OFST 0 +/* MC_CMD_AOE_OUT_POWER_OFF msgresponse */ +#define MC_CMD_AOE_OUT_POWER_OFF_LEN 0 + +/* MC_CMD_AOE_OUT_POWER_ON msgresponse */ +#define MC_CMD_AOE_OUT_POWER_ON_LEN 0 + +/* MC_CMD_AOE_OUT_LOAD msgresponse */ +#define MC_CMD_AOE_OUT_LOAD_LEN 0 + /* MC_CMD_AOE_OUT_MAC_STATS_DMA msgresponse */ #define MC_CMD_AOE_OUT_MAC_STATS_DMA_LEN 0 -/* MC_CMD_AOE_OUT_MAC_STATS_NO_DMA msgresponse */ +/* MC_CMD_AOE_OUT_MAC_STATS_NO_DMA msgresponse: See MC_CMD_MAC_STATS_OUT_NO_DMA + * for details + */ #define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_LEN (((MC_CMD_MAC_NSTATS*64))>>3) #define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_OFST 0 #define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LEN 8 @@ -2334,6 +3280,7 @@ #define MC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO_LENMIN 5 #define MC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO_LENMAX 252 #define MC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO_LEN(num) (4+1*(num)) +/* in bytes */ #define MC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO_DATALEN_OFST 0 #define MC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO_DATA_OFST 4 #define MC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO_DATA_LEN 1 @@ -2344,7 +3291,9 @@ #define MC_CMD_AOE_OUT_JTAG_WRITE_LENMIN 12 #define MC_CMD_AOE_OUT_JTAG_WRITE_LENMAX 252 #define MC_CMD_AOE_OUT_JTAG_WRITE_LEN(num) (8+4*(num)) +/* Used to align the in and out data blocks so the MC can re-use the cmd */ #define MC_CMD_AOE_OUT_JTAG_WRITE_DATALEN_OFST 0 +/* out bytes */ #define MC_CMD_AOE_OUT_JTAG_WRITE_PAD_OFST 4 #define MC_CMD_AOE_OUT_JTAG_WRITE_DATA_OFST 8 #define MC_CMD_AOE_OUT_JTAG_WRITE_DATA_LEN 4 @@ -2358,6 +3307,7 @@ #define MC_CMD_AOE_OUT_DDR_LENMIN 17 #define MC_CMD_AOE_OUT_DDR_LENMAX 252 #define MC_CMD_AOE_OUT_DDR_LEN(num) (16+1*(num)) +/* Information on the module. */ #define MC_CMD_AOE_OUT_DDR_FLAGS_OFST 0 #define MC_CMD_AOE_OUT_DDR_PRESENT_LBN 0 #define MC_CMD_AOE_OUT_DDR_PRESENT_WIDTH 1 @@ -2365,25 +3315,42 @@ #define MC_CMD_AOE_OUT_DDR_POWERED_WIDTH 1 #define MC_CMD_AOE_OUT_DDR_OPERATIONAL_LBN 2 #define MC_CMD_AOE_OUT_DDR_OPERATIONAL_WIDTH 1 +#define MC_CMD_AOE_OUT_DDR_NOT_REACHABLE_LBN 3 +#define MC_CMD_AOE_OUT_DDR_NOT_REACHABLE_WIDTH 1 +/* Memory size, in MB. */ #define MC_CMD_AOE_OUT_DDR_CAPACITY_OFST 4 +/* The memory type, as reported from SPD information */ #define MC_CMD_AOE_OUT_DDR_TYPE_OFST 8 +/* Nominal voltage of the module (as applied) */ #define MC_CMD_AOE_OUT_DDR_VOLTAGE_OFST 12 +/* SPD data read from the module */ #define MC_CMD_AOE_OUT_DDR_SPD_OFST 16 #define MC_CMD_AOE_OUT_DDR_SPD_LEN 1 #define MC_CMD_AOE_OUT_DDR_SPD_MINNUM 1 #define MC_CMD_AOE_OUT_DDR_SPD_MAXNUM 236 +/* MC_CMD_AOE_OUT_SET_MTU_OFFSET msgresponse */ +#define MC_CMD_AOE_OUT_SET_MTU_OFFSET_LEN 0 + /* MC_CMD_AOE_OUT_LINK_STATE msgresponse */ #define MC_CMD_AOE_OUT_LINK_STATE_LEN 0 +/* MC_CMD_AOE_OUT_SIENA_STATS msgresponse */ +#define MC_CMD_AOE_OUT_SIENA_STATS_LEN 0 + +/* MC_CMD_AOE_OUT_ASIC_STATS msgresponse */ +#define MC_CMD_AOE_OUT_ASIC_STATS_LEN 0 + /* MC_CMD_AOE_OUT_FC msgresponse */ #define MC_CMD_AOE_OUT_FC_LEN 0 /* MC_CMD_AOE_OUT_DDR_ECC_STATUS msgresponse */ #define MC_CMD_AOE_OUT_DDR_ECC_STATUS_LEN 8 +/* Flags describing status info on the module. */ #define MC_CMD_AOE_OUT_DDR_ECC_STATUS_FLAGS_OFST 0 #define MC_CMD_AOE_OUT_DDR_ECC_STATUS_VALID_LBN 0 #define MC_CMD_AOE_OUT_DDR_ECC_STATUS_VALID_WIDTH 1 +/* DDR ECC status on the module. */ #define MC_CMD_AOE_OUT_DDR_ECC_STATUS_STATUS_OFST 4 #define MC_CMD_AOE_OUT_DDR_ECC_STATUS_SBE_LBN 0 #define MC_CMD_AOE_OUT_DDR_ECC_STATUS_SBE_WIDTH 1 @@ -2408,51 +3375,113 @@ /* MC_CMD_AOE_OUT_MC_SPI_MASTER msgresponse */ #define MC_CMD_AOE_OUT_MC_SPI_MASTER_LEN 0 +/* MC_CMD_AOE_OUT_FC_BOOT msgresponse */ +#define MC_CMD_AOE_OUT_FC_BOOT_LEN 0 + /***********************************/ -/* MC_CMD_PTP +/* MC_CMD_PTP * Perform PTP operation */ -#define MC_CMD_PTP 0xb +#define MC_CMD_PTP 0xb +#undef MC_CMD_0xb_PRIVILEGE_CTG + +#define MC_CMD_0xb_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_PTP_IN msgrequest */ #define MC_CMD_PTP_IN_LEN 1 +/* PTP operation code */ #define MC_CMD_PTP_IN_OP_OFST 0 #define MC_CMD_PTP_IN_OP_LEN 1 -#define MC_CMD_PTP_OP_ENABLE 0x1 /* enum */ -#define MC_CMD_PTP_OP_DISABLE 0x2 /* enum */ -#define MC_CMD_PTP_OP_TRANSMIT 0x3 /* enum */ -#define MC_CMD_PTP_OP_READ_NIC_TIME 0x4 /* enum */ -#define MC_CMD_PTP_OP_STATUS 0x5 /* enum */ -#define MC_CMD_PTP_OP_ADJUST 0x6 /* enum */ -#define MC_CMD_PTP_OP_SYNCHRONIZE 0x7 /* enum */ -#define MC_CMD_PTP_OP_MANFTEST_BASIC 0x8 /* enum */ -#define MC_CMD_PTP_OP_MANFTEST_PACKET 0x9 /* enum */ -#define MC_CMD_PTP_OP_RESET_STATS 0xa /* enum */ -#define MC_CMD_PTP_OP_DEBUG 0xb /* enum */ -#define MC_CMD_PTP_OP_FPGAREAD 0xc /* enum */ -#define MC_CMD_PTP_OP_FPGAWRITE 0xd /* enum */ -#define MC_CMD_PTP_OP_CLOCK_OFFSET_ADJUST 0xe /* enum */ -#define MC_CMD_PTP_OP_CLOCK_FREQ_ADJUST 0xf /* enum */ -#define MC_CMD_PTP_OP_RX_SET_VLAN_FILTER 0x10 /* enum */ -#define MC_CMD_PTP_OP_RX_SET_UUID_FILTER 0x11 /* enum */ -#define MC_CMD_PTP_OP_RX_SET_DOMAIN_FILTER 0x12 /* enum */ -#define MC_CMD_PTP_OP_SET_CLK_SRC 0x13 /* enum */ -#define MC_CMD_PTP_OP_RST_CLK 0x14 /* enum */ -#define MC_CMD_PTP_OP_PPS_ENABLE 0x15 /* enum */ -#define MC_CMD_PTP_OP_MAX 0x16 /* enum */ +/* enum: Enable PTP packet timestamping operation. */ +#define MC_CMD_PTP_OP_ENABLE 0x1 +/* enum: Disable PTP packet timestamping operation. */ +#define MC_CMD_PTP_OP_DISABLE 0x2 +/* enum: Send a PTP packet. */ +#define MC_CMD_PTP_OP_TRANSMIT 0x3 +/* enum: Read the current NIC time. */ +#define MC_CMD_PTP_OP_READ_NIC_TIME 0x4 +/* enum: Get the current PTP status. */ +#define MC_CMD_PTP_OP_STATUS 0x5 +/* enum: Adjust the PTP NIC's time. */ +#define MC_CMD_PTP_OP_ADJUST 0x6 +/* enum: Synchronize host and NIC time. */ +#define MC_CMD_PTP_OP_SYNCHRONIZE 0x7 +/* enum: Basic manufacturing tests. */ +#define MC_CMD_PTP_OP_MANFTEST_BASIC 0x8 +/* enum: Packet based manufacturing tests. */ +#define MC_CMD_PTP_OP_MANFTEST_PACKET 0x9 +/* enum: Reset some of the PTP related statistics */ +#define MC_CMD_PTP_OP_RESET_STATS 0xa +/* enum: Debug operations to MC. */ +#define MC_CMD_PTP_OP_DEBUG 0xb +/* enum: Read an FPGA register */ +#define MC_CMD_PTP_OP_FPGAREAD 0xc +/* enum: Write an FPGA register */ +#define MC_CMD_PTP_OP_FPGAWRITE 0xd +/* enum: Apply an offset to the NIC clock */ +#define MC_CMD_PTP_OP_CLOCK_OFFSET_ADJUST 0xe +/* enum: Change Apply an offset to the NIC clock */ +#define MC_CMD_PTP_OP_CLOCK_FREQ_ADJUST 0xf +/* enum: Set the MC packet filter VLAN tags for received PTP packets */ +#define MC_CMD_PTP_OP_RX_SET_VLAN_FILTER 0x10 +/* enum: Set the MC packet filter UUID for received PTP packets */ +#define MC_CMD_PTP_OP_RX_SET_UUID_FILTER 0x11 +/* enum: Set the MC packet filter Domain for received PTP packets */ +#define MC_CMD_PTP_OP_RX_SET_DOMAIN_FILTER 0x12 +/* enum: Set the clock source */ +#define MC_CMD_PTP_OP_SET_CLK_SRC 0x13 +/* enum: Reset value of Timer Reg. */ +#define MC_CMD_PTP_OP_RST_CLK 0x14 +/* enum: Enable the forwarding of PPS events to the host */ +#define MC_CMD_PTP_OP_PPS_ENABLE 0x15 +/* enum: Get the time format used by this NIC for PTP operations */ +#define MC_CMD_PTP_OP_GET_TIME_FORMAT 0x16 +/* enum: Get the clock attributes. NOTE- extended version of + * MC_CMD_PTP_OP_GET_TIME_FORMAT + */ +#define MC_CMD_PTP_OP_GET_ATTRIBUTES 0x16 +/* enum: Get corrections that should be applied to the various different + * timestamps + */ +#define MC_CMD_PTP_OP_GET_TIMESTAMP_CORRECTIONS 0x17 +/* enum: Subscribe to receive periodic time events indicating the current NIC + * time + */ +#define MC_CMD_PTP_OP_TIME_EVENT_SUBSCRIBE 0x18 +/* enum: Unsubscribe to stop receiving time events */ +#define MC_CMD_PTP_OP_TIME_EVENT_UNSUBSCRIBE 0x19 +/* enum: PPS based manfacturing tests. Requires PPS output to be looped to PPS + * input on the same NIC. + */ +#define MC_CMD_PTP_OP_MANFTEST_PPS 0x1a +/* enum: Set the PTP sync status. Status is used by firmware to report to event + * subscribers. + */ +#define MC_CMD_PTP_OP_SET_SYNC_STATUS 0x1b +/* enum: Above this for future use. */ +#define MC_CMD_PTP_OP_MAX 0x1c /* MC_CMD_PTP_IN_ENABLE msgrequest */ #define MC_CMD_PTP_IN_ENABLE_LEN 16 #define MC_CMD_PTP_IN_CMD_OFST 0 #define MC_CMD_PTP_IN_PERIPH_ID_OFST 4 +/* Event queue for PTP events */ #define MC_CMD_PTP_IN_ENABLE_QUEUE_OFST 8 +/* PTP timestamping mode */ #define MC_CMD_PTP_IN_ENABLE_MODE_OFST 12 -#define MC_CMD_PTP_MODE_V1 0x0 /* enum */ -#define MC_CMD_PTP_MODE_V1_VLAN 0x1 /* enum */ -#define MC_CMD_PTP_MODE_V2 0x2 /* enum */ -#define MC_CMD_PTP_MODE_V2_VLAN 0x3 /* enum */ -#define MC_CMD_PTP_MODE_V2_ENHANCED 0x4 /* enum */ +/* enum: PTP, version 1 */ +#define MC_CMD_PTP_MODE_V1 0x0 +/* enum: PTP, version 1, with VLAN headers - deprecated */ +#define MC_CMD_PTP_MODE_V1_VLAN 0x1 +/* enum: PTP, version 2 */ +#define MC_CMD_PTP_MODE_V2 0x2 +/* enum: PTP, version 2, with VLAN headers - deprecated */ +#define MC_CMD_PTP_MODE_V2_VLAN 0x3 +/* enum: PTP, version 2, with improved UUID filtering */ +#define MC_CMD_PTP_MODE_V2_ENHANCED 0x4 +/* enum: FCoE (seconds and microseconds) */ +#define MC_CMD_PTP_MODE_FCOE 0x5 /* MC_CMD_PTP_IN_DISABLE msgrequest */ #define MC_CMD_PTP_IN_DISABLE_LEN 8 @@ -2465,7 +3494,9 @@ #define MC_CMD_PTP_IN_TRANSMIT_LEN(num) (12+1*(num)) /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ +/* Transmit packet length */ #define MC_CMD_PTP_IN_TRANSMIT_LENGTH_OFST 8 +/* Transmit packet data */ #define MC_CMD_PTP_IN_TRANSMIT_PACKET_OFST 12 #define MC_CMD_PTP_IN_TRANSMIT_PACKET_LEN 1 #define MC_CMD_PTP_IN_TRANSMIT_PACKET_MINNUM 1 @@ -2485,19 +3516,31 @@ #define MC_CMD_PTP_IN_ADJUST_LEN 24 /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ +/* Frequency adjustment 40 bit fixed point ns */ #define MC_CMD_PTP_IN_ADJUST_FREQ_OFST 8 #define MC_CMD_PTP_IN_ADJUST_FREQ_LEN 8 #define MC_CMD_PTP_IN_ADJUST_FREQ_LO_OFST 8 #define MC_CMD_PTP_IN_ADJUST_FREQ_HI_OFST 12 -#define MC_CMD_PTP_IN_ADJUST_BITS 0x28 /* enum */ +/* enum: Number of fractional bits in frequency adjustment */ +#define MC_CMD_PTP_IN_ADJUST_BITS 0x28 +/* Time adjustment in seconds */ #define MC_CMD_PTP_IN_ADJUST_SECONDS_OFST 16 +/* Time adjustment major value */ +#define MC_CMD_PTP_IN_ADJUST_MAJOR_OFST 16 +/* Time adjustment in nanoseconds */ #define MC_CMD_PTP_IN_ADJUST_NANOSECONDS_OFST 20 +/* Time adjustment minor value */ +#define MC_CMD_PTP_IN_ADJUST_MINOR_OFST 20 /* MC_CMD_PTP_IN_SYNCHRONIZE msgrequest */ #define MC_CMD_PTP_IN_SYNCHRONIZE_LEN 20 /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ +/* Number of time readings to capture */ #define MC_CMD_PTP_IN_SYNCHRONIZE_NUMTIMESETS_OFST 8 +/* Host address in which to write "synchronization started" indication (64 + * bits) + */ #define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_OFST 12 #define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LEN 8 #define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_OFST 12 @@ -2512,17 +3555,20 @@ #define MC_CMD_PTP_IN_MANFTEST_PACKET_LEN 12 /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ +/* Enable or disable packet testing */ #define MC_CMD_PTP_IN_MANFTEST_PACKET_TEST_ENABLE_OFST 8 /* MC_CMD_PTP_IN_RESET_STATS msgrequest */ #define MC_CMD_PTP_IN_RESET_STATS_LEN 8 /* MC_CMD_PTP_IN_CMD_OFST 0 */ +/* Reset PTP statistics */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ /* MC_CMD_PTP_IN_DEBUG msgrequest */ #define MC_CMD_PTP_IN_DEBUG_LEN 12 /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ +/* Debug operations */ #define MC_CMD_PTP_IN_DEBUG_DEBUG_PARAM_OFST 8 /* MC_CMD_PTP_IN_FPGAREAD msgrequest */ @@ -2548,24 +3594,34 @@ #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_LEN 16 /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ +/* Time adjustment in seconds */ #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_SECONDS_OFST 8 +/* Time adjustment major value */ +#define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_MAJOR_OFST 8 +/* Time adjustment in nanoseconds */ #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_NANOSECONDS_OFST 12 +/* Time adjustment minor value */ +#define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_MINOR_OFST 12 /* MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST msgrequest */ #define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_LEN 16 /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ +/* Frequency adjustment 40 bit fixed point ns */ #define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_OFST 8 #define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LEN 8 #define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_OFST 8 #define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_OFST 12 +/* enum: Number of fractional bits in frequency adjustment */ /* MC_CMD_PTP_IN_ADJUST_BITS 0x28 */ /* MC_CMD_PTP_IN_RX_SET_VLAN_FILTER msgrequest */ #define MC_CMD_PTP_IN_RX_SET_VLAN_FILTER_LEN 24 /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ +/* Number of VLAN tags, 0 if not VLAN */ #define MC_CMD_PTP_IN_RX_SET_VLAN_FILTER_NUM_VLAN_TAGS_OFST 8 +/* Set of VLAN tags to filter against */ #define MC_CMD_PTP_IN_RX_SET_VLAN_FILTER_VLAN_TAG_OFST 12 #define MC_CMD_PTP_IN_RX_SET_VLAN_FILTER_VLAN_TAG_LEN 4 #define MC_CMD_PTP_IN_RX_SET_VLAN_FILTER_VLAN_TAG_NUM 3 @@ -2574,7 +3630,9 @@ #define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_LEN 20 /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ +/* 1 to enable UUID filtering, 0 to disable */ #define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_ENABLE_OFST 8 +/* UUID to filter against */ #define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_OFST 12 #define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LEN 8 #define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_OFST 12 @@ -2584,82 +3642,237 @@ #define MC_CMD_PTP_IN_RX_SET_DOMAIN_FILTER_LEN 16 /* MC_CMD_PTP_IN_CMD_OFST 0 */ /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ +/* 1 to enable Domain filtering, 0 to disable */ #define MC_CMD_PTP_IN_RX_SET_DOMAIN_FILTER_ENABLE_OFST 8 +/* Domain number to filter against */ #define MC_CMD_PTP_IN_RX_SET_DOMAIN_FILTER_DOMAIN_OFST 12 +/* MC_CMD_PTP_IN_SET_CLK_SRC msgrequest */ +#define MC_CMD_PTP_IN_SET_CLK_SRC_LEN 12 +/* MC_CMD_PTP_IN_CMD_OFST 0 */ +/* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ +/* Set the clock source. */ +#define MC_CMD_PTP_IN_SET_CLK_SRC_CLK_OFST 8 +/* enum: Internal. */ +#define MC_CMD_PTP_CLK_SRC_INTERNAL 0x0 +/* enum: External. */ +#define MC_CMD_PTP_CLK_SRC_EXTERNAL 0x1 + +/* MC_CMD_PTP_IN_RST_CLK msgrequest */ +#define MC_CMD_PTP_IN_RST_CLK_LEN 8 +/* MC_CMD_PTP_IN_CMD_OFST 0 */ +/* Reset value of Timer Reg. */ +/* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ + /* MC_CMD_PTP_IN_PPS_ENABLE msgrequest */ #define MC_CMD_PTP_IN_PPS_ENABLE_LEN 12 /* MC_CMD_PTP_IN_CMD_OFST 0 */ +/* Enable or disable */ #define MC_CMD_PTP_IN_PPS_ENABLE_OP_OFST 4 -#define MC_CMD_PTP_ENABLE_PPS 0x0 /* enum */ -#define MC_CMD_PTP_DISABLE_PPS 0x1 /* enum */ +/* enum: Enable */ +#define MC_CMD_PTP_ENABLE_PPS 0x0 +/* enum: Disable */ +#define MC_CMD_PTP_DISABLE_PPS 0x1 +/* Queue id to send events back */ #define MC_CMD_PTP_IN_PPS_ENABLE_QUEUE_ID_OFST 8 +/* MC_CMD_PTP_IN_GET_TIME_FORMAT msgrequest */ +#define MC_CMD_PTP_IN_GET_TIME_FORMAT_LEN 8 +/* MC_CMD_PTP_IN_CMD_OFST 0 */ +/* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ + +/* MC_CMD_PTP_IN_GET_ATTRIBUTES msgrequest */ +#define MC_CMD_PTP_IN_GET_ATTRIBUTES_LEN 8 +/* MC_CMD_PTP_IN_CMD_OFST 0 */ +/* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ + +/* MC_CMD_PTP_IN_GET_TIMESTAMP_CORRECTIONS msgrequest */ +#define MC_CMD_PTP_IN_GET_TIMESTAMP_CORRECTIONS_LEN 8 +/* MC_CMD_PTP_IN_CMD_OFST 0 */ +/* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ + +/* MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE msgrequest */ +#define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_LEN 12 +/* MC_CMD_PTP_IN_CMD_OFST 0 */ +/* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ +/* Original field containing queue ID. Now extended to include flags. */ +#define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_QUEUE_OFST 8 +#define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_QUEUE_ID_LBN 0 +#define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_QUEUE_ID_WIDTH 16 +#define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_REPORT_SYNC_STATUS_LBN 31 +#define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_REPORT_SYNC_STATUS_WIDTH 1 + +/* MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE msgrequest */ +#define MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_LEN 16 +/* MC_CMD_PTP_IN_CMD_OFST 0 */ +/* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ +/* Unsubscribe options */ +#define MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_CONTROL_OFST 8 +/* enum: Unsubscribe a single queue */ +#define MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_SINGLE 0x0 +/* enum: Unsubscribe all queues */ +#define MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_ALL 0x1 +/* Event queue ID */ +#define MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_QUEUE_OFST 12 + +/* MC_CMD_PTP_IN_MANFTEST_PPS msgrequest */ +#define MC_CMD_PTP_IN_MANFTEST_PPS_LEN 12 +/* MC_CMD_PTP_IN_CMD_OFST 0 */ +/* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ +/* 1 to enable PPS test mode, 0 to disable and return result. */ +#define MC_CMD_PTP_IN_MANFTEST_PPS_TEST_ENABLE_OFST 8 + +/* MC_CMD_PTP_IN_SET_SYNC_STATUS msgrequest */ +#define MC_CMD_PTP_IN_SET_SYNC_STATUS_LEN 24 +/* MC_CMD_PTP_IN_CMD_OFST 0 */ +/* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */ +/* NIC - Host System Clock Synchronization status */ +#define MC_CMD_PTP_IN_SET_SYNC_STATUS_STATUS_OFST 8 +/* enum: Host System clock and NIC clock are not in sync */ +#define MC_CMD_PTP_IN_SET_SYNC_STATUS_NOT_IN_SYNC 0x0 +/* enum: Host System clock and NIC clock are synchronized */ +#define MC_CMD_PTP_IN_SET_SYNC_STATUS_IN_SYNC 0x1 +/* If synchronized, number of seconds until clocks should be considered to be + * no longer in sync. + */ +#define MC_CMD_PTP_IN_SET_SYNC_STATUS_TIMEOUT_OFST 12 +#define MC_CMD_PTP_IN_SET_SYNC_STATUS_RESERVED0_OFST 16 +#define MC_CMD_PTP_IN_SET_SYNC_STATUS_RESERVED1_OFST 20 + /* MC_CMD_PTP_OUT msgresponse */ #define MC_CMD_PTP_OUT_LEN 0 /* MC_CMD_PTP_OUT_TRANSMIT msgresponse */ #define MC_CMD_PTP_OUT_TRANSMIT_LEN 8 +/* Value of seconds timestamp */ #define MC_CMD_PTP_OUT_TRANSMIT_SECONDS_OFST 0 +/* Timestamp major value */ +#define MC_CMD_PTP_OUT_TRANSMIT_MAJOR_OFST 0 +/* Value of nanoseconds timestamp */ #define MC_CMD_PTP_OUT_TRANSMIT_NANOSECONDS_OFST 4 +/* Timestamp minor value */ +#define MC_CMD_PTP_OUT_TRANSMIT_MINOR_OFST 4 + +/* MC_CMD_PTP_OUT_TIME_EVENT_SUBSCRIBE msgresponse */ +#define MC_CMD_PTP_OUT_TIME_EVENT_SUBSCRIBE_LEN 0 + +/* MC_CMD_PTP_OUT_TIME_EVENT_UNSUBSCRIBE msgresponse */ +#define MC_CMD_PTP_OUT_TIME_EVENT_UNSUBSCRIBE_LEN 0 /* MC_CMD_PTP_OUT_READ_NIC_TIME msgresponse */ #define MC_CMD_PTP_OUT_READ_NIC_TIME_LEN 8 +/* Value of seconds timestamp */ #define MC_CMD_PTP_OUT_READ_NIC_TIME_SECONDS_OFST 0 +/* Timestamp major value */ +#define MC_CMD_PTP_OUT_READ_NIC_TIME_MAJOR_OFST 0 +/* Value of nanoseconds timestamp */ #define MC_CMD_PTP_OUT_READ_NIC_TIME_NANOSECONDS_OFST 4 +/* Timestamp minor value */ +#define MC_CMD_PTP_OUT_READ_NIC_TIME_MINOR_OFST 4 /* MC_CMD_PTP_OUT_STATUS msgresponse */ #define MC_CMD_PTP_OUT_STATUS_LEN 64 +/* Frequency of NIC's hardware clock */ #define MC_CMD_PTP_OUT_STATUS_CLOCK_FREQ_OFST 0 +/* Number of packets transmitted and timestamped */ #define MC_CMD_PTP_OUT_STATUS_STATS_TX_OFST 4 +/* Number of packets received and timestamped */ #define MC_CMD_PTP_OUT_STATUS_STATS_RX_OFST 8 +/* Number of packets timestamped by the FPGA */ #define MC_CMD_PTP_OUT_STATUS_STATS_TS_OFST 12 +/* Number of packets filter matched */ #define MC_CMD_PTP_OUT_STATUS_STATS_FM_OFST 16 +/* Number of packets not filter matched */ #define MC_CMD_PTP_OUT_STATUS_STATS_NFM_OFST 20 +/* Number of PPS overflows (noise on input?) */ #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFLOW_OFST 24 +/* Number of PPS bad periods */ #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_BAD_OFST 28 +/* Minimum period of PPS pulse in nanoseconds */ #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_PER_MIN_OFST 32 +/* Maximum period of PPS pulse in nanoseconds */ #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_PER_MAX_OFST 36 +/* Last period of PPS pulse in nanoseconds */ #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_PER_LAST_OFST 40 +/* Mean period of PPS pulse in nanoseconds */ #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_PER_MEAN_OFST 44 +/* Minimum offset of PPS pulse in nanoseconds (signed) */ #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFF_MIN_OFST 48 +/* Maximum offset of PPS pulse in nanoseconds (signed) */ #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFF_MAX_OFST 52 +/* Last offset of PPS pulse in nanoseconds (signed) */ #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFF_LAST_OFST 56 +/* Mean offset of PPS pulse in nanoseconds (signed) */ #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFF_MEAN_OFST 60 /* MC_CMD_PTP_OUT_SYNCHRONIZE msgresponse */ #define MC_CMD_PTP_OUT_SYNCHRONIZE_LENMIN 20 #define MC_CMD_PTP_OUT_SYNCHRONIZE_LENMAX 240 #define MC_CMD_PTP_OUT_SYNCHRONIZE_LEN(num) (0+20*(num)) +/* A set of host and NIC times */ #define MC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_OFST 0 #define MC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_LEN 20 #define MC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_MINNUM 1 #define MC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_MAXNUM 12 +/* Host time immediately before NIC's hardware clock read */ #define MC_CMD_PTP_OUT_SYNCHRONIZE_HOSTSTART_OFST 0 +/* Value of seconds timestamp */ #define MC_CMD_PTP_OUT_SYNCHRONIZE_SECONDS_OFST 4 +/* Timestamp major value */ +#define MC_CMD_PTP_OUT_SYNCHRONIZE_MAJOR_OFST 4 +/* Value of nanoseconds timestamp */ #define MC_CMD_PTP_OUT_SYNCHRONIZE_NANOSECONDS_OFST 8 +/* Timestamp minor value */ +#define MC_CMD_PTP_OUT_SYNCHRONIZE_MINOR_OFST 8 +/* Host time immediately after NIC's hardware clock read */ #define MC_CMD_PTP_OUT_SYNCHRONIZE_HOSTEND_OFST 12 +/* Number of nanoseconds waited after reading NIC's hardware clock */ #define MC_CMD_PTP_OUT_SYNCHRONIZE_WAITNS_OFST 16 /* MC_CMD_PTP_OUT_MANFTEST_BASIC msgresponse */ #define MC_CMD_PTP_OUT_MANFTEST_BASIC_LEN 8 +/* Results of testing */ #define MC_CMD_PTP_OUT_MANFTEST_BASIC_TEST_RESULT_OFST 0 -#define MC_CMD_PTP_MANF_SUCCESS 0x0 /* enum */ -#define MC_CMD_PTP_MANF_FPGA_LOAD 0x1 /* enum */ -#define MC_CMD_PTP_MANF_FPGA_VERSION 0x2 /* enum */ -#define MC_CMD_PTP_MANF_FPGA_REGISTERS 0x3 /* enum */ -#define MC_CMD_PTP_MANF_OSCILLATOR 0x4 /* enum */ -#define MC_CMD_PTP_MANF_TIMESTAMPS 0x5 /* enum */ -#define MC_CMD_PTP_MANF_PACKET_COUNT 0x6 /* enum */ -#define MC_CMD_PTP_MANF_FILTER_COUNT 0x7 /* enum */ -#define MC_CMD_PTP_MANF_PACKET_ENOUGH 0x8 /* enum */ -#define MC_CMD_PTP_MANF_GPIO_TRIGGER 0x9 /* enum */ +/* enum: Successful test */ +#define MC_CMD_PTP_MANF_SUCCESS 0x0 +/* enum: FPGA load failed */ +#define MC_CMD_PTP_MANF_FPGA_LOAD 0x1 +/* enum: FPGA version invalid */ +#define MC_CMD_PTP_MANF_FPGA_VERSION 0x2 +/* enum: FPGA registers incorrect */ +#define MC_CMD_PTP_MANF_FPGA_REGISTERS 0x3 +/* enum: Oscillator possibly not working? */ +#define MC_CMD_PTP_MANF_OSCILLATOR 0x4 +/* enum: Timestamps not increasing */ +#define MC_CMD_PTP_MANF_TIMESTAMPS 0x5 +/* enum: Mismatched packet count */ +#define MC_CMD_PTP_MANF_PACKET_COUNT 0x6 +/* enum: Mismatched packet count (Siena filter and FPGA) */ +#define MC_CMD_PTP_MANF_FILTER_COUNT 0x7 +/* enum: Not enough packets to perform timestamp check */ +#define MC_CMD_PTP_MANF_PACKET_ENOUGH 0x8 +/* enum: Timestamp trigger GPIO not working */ +#define MC_CMD_PTP_MANF_GPIO_TRIGGER 0x9 +/* enum: Insufficient PPS events to perform checks */ +#define MC_CMD_PTP_MANF_PPS_ENOUGH 0xa +/* enum: PPS time event period not sufficiently close to 1s. */ +#define MC_CMD_PTP_MANF_PPS_PERIOD 0xb +/* enum: PPS time event nS reading not sufficiently close to zero. */ +#define MC_CMD_PTP_MANF_PPS_NS 0xc +/* enum: PTP peripheral registers incorrect */ +#define MC_CMD_PTP_MANF_REGISTERS 0xd +/* enum: Failed to read time from PTP peripheral */ +#define MC_CMD_PTP_MANF_CLOCK_READ 0xe +/* Presence of external oscillator */ #define MC_CMD_PTP_OUT_MANFTEST_BASIC_TEST_EXTOSC_OFST 4 /* MC_CMD_PTP_OUT_MANFTEST_PACKET msgresponse */ #define MC_CMD_PTP_OUT_MANFTEST_PACKET_LEN 12 +/* Results of testing */ #define MC_CMD_PTP_OUT_MANFTEST_PACKET_TEST_RESULT_OFST 0 +/* Number of packets received by FPGA */ #define MC_CMD_PTP_OUT_MANFTEST_PACKET_TEST_FPGACOUNT_OFST 4 +/* Number of packets received by Siena filters */ #define MC_CMD_PTP_OUT_MANFTEST_PACKET_TEST_FILTERCOUNT_OFST 8 /* MC_CMD_PTP_OUT_FPGAREAD msgresponse */ @@ -2671,15 +3884,85 @@ #define MC_CMD_PTP_OUT_FPGAREAD_BUFFER_MINNUM 1 #define MC_CMD_PTP_OUT_FPGAREAD_BUFFER_MAXNUM 252 +/* MC_CMD_PTP_OUT_GET_TIME_FORMAT msgresponse */ +#define MC_CMD_PTP_OUT_GET_TIME_FORMAT_LEN 4 +/* Time format required/used by for this NIC. Applies to all PTP MCDI + * operations that pass times between the host and firmware. If this operation + * is not supported (older firmware) a format of seconds and nanoseconds should + * be assumed. + */ +#define MC_CMD_PTP_OUT_GET_TIME_FORMAT_FORMAT_OFST 0 +/* enum: Times are in seconds and nanoseconds */ +#define MC_CMD_PTP_OUT_GET_TIME_FORMAT_SECONDS_NANOSECONDS 0x0 +/* enum: Major register has units of 16 second per tick, minor 8 ns per tick */ +#define MC_CMD_PTP_OUT_GET_TIME_FORMAT_16SECONDS_8NANOSECONDS 0x1 +/* enum: Major register has units of seconds, minor 2^-27s per tick */ +#define MC_CMD_PTP_OUT_GET_TIME_FORMAT_SECONDS_27FRACTION 0x2 + +/* MC_CMD_PTP_OUT_GET_ATTRIBUTES msgresponse */ +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_LEN 24 +/* Time format required/used by for this NIC. Applies to all PTP MCDI + * operations that pass times between the host and firmware. If this operation + * is not supported (older firmware) a format of seconds and nanoseconds should + * be assumed. + */ +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_TIME_FORMAT_OFST 0 +/* enum: Times are in seconds and nanoseconds */ +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_SECONDS_NANOSECONDS 0x0 +/* enum: Major register has units of 16 second per tick, minor 8 ns per tick */ +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_16SECONDS_8NANOSECONDS 0x1 +/* enum: Major register has units of seconds, minor 2^-27s per tick */ +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_SECONDS_27FRACTION 0x2 +/* Minimum acceptable value for a corrected synchronization timeset. When + * comparing host and NIC clock times, the MC returns a set of samples that + * contain the host start and end time, the MC time when the host start was + * detected and the time the MC waited between reading the time and detecting + * the host end. The corrected sync window is the difference between the host + * end and start times minus the time that the MC waited for host end. + */ +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_SYNC_WINDOW_MIN_OFST 4 +/* Various PTP capabilities */ +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_CAPABILITIES_OFST 8 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_REPORT_SYNC_STATUS_LBN 0 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_REPORT_SYNC_STATUS_WIDTH 1 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_RESERVED0_OFST 12 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_RESERVED1_OFST 16 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_RESERVED2_OFST 20 + +/* MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS msgresponse */ +#define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_LEN 16 +/* Uncorrected error on transmit timestamps in NIC clock format */ +#define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_TRANSMIT_OFST 0 +/* Uncorrected error on receive timestamps in NIC clock format */ +#define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_RECEIVE_OFST 4 +/* Uncorrected error on PPS output in NIC clock format */ +#define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_PPS_OUT_OFST 8 +/* Uncorrected error on PPS input in NIC clock format */ +#define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_PPS_IN_OFST 12 + +/* MC_CMD_PTP_OUT_MANFTEST_PPS msgresponse */ +#define MC_CMD_PTP_OUT_MANFTEST_PPS_LEN 4 +/* Results of testing */ +#define MC_CMD_PTP_OUT_MANFTEST_PPS_TEST_RESULT_OFST 0 +/* Enum values, see field(s): */ +/* MC_CMD_PTP_OUT_MANFTEST_BASIC/TEST_RESULT */ + +/* MC_CMD_PTP_OUT_SET_SYNC_STATUS msgresponse */ +#define MC_CMD_PTP_OUT_SET_SYNC_STATUS_LEN 0 + /***********************************/ -/* MC_CMD_CSR_READ32 +/* MC_CMD_CSR_READ32 * Read 32bit words from the indirect memory map. */ -#define MC_CMD_CSR_READ32 0xc +#define MC_CMD_CSR_READ32 0xc +#undef MC_CMD_0xc_PRIVILEGE_CTG + +#define MC_CMD_0xc_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_CSR_READ32_IN msgrequest */ #define MC_CMD_CSR_READ32_IN_LEN 12 +/* Address */ #define MC_CMD_CSR_READ32_IN_ADDR_OFST 0 #define MC_CMD_CSR_READ32_IN_STEP_OFST 4 #define MC_CMD_CSR_READ32_IN_NUMWORDS_OFST 8 @@ -2688,6 +3971,7 @@ #define MC_CMD_CSR_READ32_OUT_LENMIN 4 #define MC_CMD_CSR_READ32_OUT_LENMAX 252 #define MC_CMD_CSR_READ32_OUT_LEN(num) (0+4*(num)) +/* The last dword is the status, not a value read */ #define MC_CMD_CSR_READ32_OUT_BUFFER_OFST 0 #define MC_CMD_CSR_READ32_OUT_BUFFER_LEN 4 #define MC_CMD_CSR_READ32_OUT_BUFFER_MINNUM 1 @@ -2695,15 +3979,19 @@ /***********************************/ -/* MC_CMD_CSR_WRITE32 +/* MC_CMD_CSR_WRITE32 * Write 32bit dwords to the indirect memory map. */ -#define MC_CMD_CSR_WRITE32 0xd +#define MC_CMD_CSR_WRITE32 0xd +#undef MC_CMD_0xd_PRIVILEGE_CTG + +#define MC_CMD_0xd_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_CSR_WRITE32_IN msgrequest */ #define MC_CMD_CSR_WRITE32_IN_LENMIN 12 #define MC_CMD_CSR_WRITE32_IN_LENMAX 252 #define MC_CMD_CSR_WRITE32_IN_LEN(num) (8+4*(num)) +/* Address */ #define MC_CMD_CSR_WRITE32_IN_ADDR_OFST 0 #define MC_CMD_CSR_WRITE32_IN_STEP_OFST 4 #define MC_CMD_CSR_WRITE32_IN_BUFFER_OFST 8 @@ -2717,35 +4005,58 @@ /***********************************/ -/* MC_CMD_HP - * HP specific commands. +/* MC_CMD_HP + * These commands are used for HP related features. They are grouped under one + * MCDI command to avoid creating too many MCDI commands. */ -#define MC_CMD_HP 0x54 +#define MC_CMD_HP 0x54 +#undef MC_CMD_0x54_PRIVILEGE_CTG + +#define MC_CMD_0x54_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_HP_IN msgrequest */ #define MC_CMD_HP_IN_LEN 16 +/* HP OCSD sub-command. When address is not NULL, request activation of OCSD at + * the specified address with the specified interval.When address is NULL, + * INTERVAL is interpreted as a command: 0: stop OCSD / 1: Report OCSD current + * state / 2: (debug) Show temperature reported by one of the supported + * sensors. + */ #define MC_CMD_HP_IN_SUBCMD_OFST 0 -#define MC_CMD_HP_IN_OCSD_SUBCMD 0x0 /* enum */ -#define MC_CMD_HP_IN_LAST_SUBCMD 0x0 /* enum */ +/* enum: OCSD (Option Card Sensor Data) sub-command. */ +#define MC_CMD_HP_IN_OCSD_SUBCMD 0x0 +/* enum: Last known valid HP sub-command. */ +#define MC_CMD_HP_IN_LAST_SUBCMD 0x0 +/* The address to the array of sensor fields. (Or NULL to use a sub-command.) + */ #define MC_CMD_HP_IN_OCSD_ADDR_OFST 4 #define MC_CMD_HP_IN_OCSD_ADDR_LEN 8 #define MC_CMD_HP_IN_OCSD_ADDR_LO_OFST 4 #define MC_CMD_HP_IN_OCSD_ADDR_HI_OFST 8 +/* The requested update interval, in seconds. (Or the sub-command if ADDR is + * NULL.) + */ #define MC_CMD_HP_IN_OCSD_INTERVAL_OFST 12 /* MC_CMD_HP_OUT msgresponse */ #define MC_CMD_HP_OUT_LEN 4 #define MC_CMD_HP_OUT_OCSD_STATUS_OFST 0 -#define MC_CMD_HP_OUT_OCSD_STOPPED 0x1 /* enum */ -#define MC_CMD_HP_OUT_OCSD_STARTED 0x2 /* enum */ -#define MC_CMD_HP_OUT_OCSD_ALREADY_STARTED 0x3 /* enum */ +/* enum: OCSD stopped for this card. */ +#define MC_CMD_HP_OUT_OCSD_STOPPED 0x1 +/* enum: OCSD was successfully started with the address provided. */ +#define MC_CMD_HP_OUT_OCSD_STARTED 0x2 +/* enum: OCSD was already started for this card. */ +#define MC_CMD_HP_OUT_OCSD_ALREADY_STARTED 0x3 /***********************************/ -/* MC_CMD_STACKINFO +/* MC_CMD_STACKINFO * Get stack information. */ -#define MC_CMD_STACKINFO 0xf +#define MC_CMD_STACKINFO 0xf +#undef MC_CMD_0xf_PRIVILEGE_CTG + +#define MC_CMD_0xf_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_STACKINFO_IN msgrequest */ #define MC_CMD_STACKINFO_IN_LEN 0 @@ -2754,6 +4065,7 @@ #define MC_CMD_STACKINFO_OUT_LENMIN 12 #define MC_CMD_STACKINFO_OUT_LENMAX 252 #define MC_CMD_STACKINFO_OUT_LEN(num) (0+12*(num)) +/* (thread ptr, stack size, free space) for each thread in system */ #define MC_CMD_STACKINFO_OUT_THREAD_INFO_OFST 0 #define MC_CMD_STACKINFO_OUT_THREAD_INFO_LEN 12 #define MC_CMD_STACKINFO_OUT_THREAD_INFO_MINNUM 1 @@ -2761,61 +4073,105 @@ /***********************************/ -/* MC_CMD_MDIO_READ +/* MC_CMD_MDIO_READ * MDIO register read. */ -#define MC_CMD_MDIO_READ 0x10 +#define MC_CMD_MDIO_READ 0x10 +#undef MC_CMD_0x10_PRIVILEGE_CTG + +#define MC_CMD_0x10_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_MDIO_READ_IN msgrequest */ #define MC_CMD_MDIO_READ_IN_LEN 16 +/* Bus number; there are two MDIO buses: one for the internal PHY, and one for + * external devices. + */ #define MC_CMD_MDIO_READ_IN_BUS_OFST 0 -#define MC_CMD_MDIO_BUS_INTERNAL 0x0 /* enum */ -#define MC_CMD_MDIO_BUS_EXTERNAL 0x1 /* enum */ +/* enum: Internal. */ +#define MC_CMD_MDIO_BUS_INTERNAL 0x0 +/* enum: External. */ +#define MC_CMD_MDIO_BUS_EXTERNAL 0x1 +/* Port address */ #define MC_CMD_MDIO_READ_IN_PRTAD_OFST 4 +/* Device Address or clause 22. */ #define MC_CMD_MDIO_READ_IN_DEVAD_OFST 8 -#define MC_CMD_MDIO_CLAUSE22 0x20 /* enum */ +/* enum: By default all the MCDI MDIO operations perform clause45 mode. If you + * want to use clause22 then set DEVAD = MC_CMD_MDIO_CLAUSE22. + */ +#define MC_CMD_MDIO_CLAUSE22 0x20 +/* Address */ #define MC_CMD_MDIO_READ_IN_ADDR_OFST 12 /* MC_CMD_MDIO_READ_OUT msgresponse */ #define MC_CMD_MDIO_READ_OUT_LEN 8 +/* Value */ #define MC_CMD_MDIO_READ_OUT_VALUE_OFST 0 +/* Status the MDIO commands return the raw status bits from the MDIO block. A + * "good" transaction should have the DONE bit set and all other bits clear. + */ #define MC_CMD_MDIO_READ_OUT_STATUS_OFST 4 -#define MC_CMD_MDIO_STATUS_GOOD 0x8 /* enum */ +/* enum: Good. */ +#define MC_CMD_MDIO_STATUS_GOOD 0x8 /***********************************/ -/* MC_CMD_MDIO_WRITE +/* MC_CMD_MDIO_WRITE * MDIO register write. */ -#define MC_CMD_MDIO_WRITE 0x11 +#define MC_CMD_MDIO_WRITE 0x11 +#undef MC_CMD_0x11_PRIVILEGE_CTG + +#define MC_CMD_0x11_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_MDIO_WRITE_IN msgrequest */ #define MC_CMD_MDIO_WRITE_IN_LEN 20 +/* Bus number; there are two MDIO buses: one for the internal PHY, and one for + * external devices. + */ #define MC_CMD_MDIO_WRITE_IN_BUS_OFST 0 +/* enum: Internal. */ /* MC_CMD_MDIO_BUS_INTERNAL 0x0 */ +/* enum: External. */ /* MC_CMD_MDIO_BUS_EXTERNAL 0x1 */ +/* Port address */ #define MC_CMD_MDIO_WRITE_IN_PRTAD_OFST 4 +/* Device Address or clause 22. */ #define MC_CMD_MDIO_WRITE_IN_DEVAD_OFST 8 +/* enum: By default all the MCDI MDIO operations perform clause45 mode. If you + * want to use clause22 then set DEVAD = MC_CMD_MDIO_CLAUSE22. + */ /* MC_CMD_MDIO_CLAUSE22 0x20 */ +/* Address */ #define MC_CMD_MDIO_WRITE_IN_ADDR_OFST 12 +/* Value */ #define MC_CMD_MDIO_WRITE_IN_VALUE_OFST 16 /* MC_CMD_MDIO_WRITE_OUT msgresponse */ #define MC_CMD_MDIO_WRITE_OUT_LEN 4 +/* Status; the MDIO commands return the raw status bits from the MDIO block. A + * "good" transaction should have the DONE bit set and all other bits clear. + */ #define MC_CMD_MDIO_WRITE_OUT_STATUS_OFST 0 +/* enum: Good. */ /* MC_CMD_MDIO_STATUS_GOOD 0x8 */ /***********************************/ -/* MC_CMD_DBI_WRITE +/* MC_CMD_DBI_WRITE * Write DBI register(s). */ -#define MC_CMD_DBI_WRITE 0x12 +#define MC_CMD_DBI_WRITE 0x12 +#undef MC_CMD_0x12_PRIVILEGE_CTG + +#define MC_CMD_0x12_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_DBI_WRITE_IN msgrequest */ #define MC_CMD_DBI_WRITE_IN_LENMIN 12 #define MC_CMD_DBI_WRITE_IN_LENMAX 252 #define MC_CMD_DBI_WRITE_IN_LEN(num) (0+12*(num)) +/* Each write op consists of an address (offset 0), byte enable/VF/CS2 (offset + * 32) and value (offset 64). See MC_CMD_DBIWROP_TYPEDEF. + */ #define MC_CMD_DBI_WRITE_IN_DBIWROP_OFST 0 #define MC_CMD_DBI_WRITE_IN_DBIWROP_LEN 12 #define MC_CMD_DBI_WRITE_IN_DBIWROP_MINNUM 1 @@ -2829,85 +4185,136 @@ #define MC_CMD_DBIWROP_TYPEDEF_ADDRESS_OFST 0 #define MC_CMD_DBIWROP_TYPEDEF_ADDRESS_LBN 0 #define MC_CMD_DBIWROP_TYPEDEF_ADDRESS_WIDTH 32 -#define MC_CMD_DBIWROP_TYPEDEF_BYTE_MASK_OFST 4 -#define MC_CMD_DBIWROP_TYPEDEF_BYTE_MASK_LBN 32 -#define MC_CMD_DBIWROP_TYPEDEF_BYTE_MASK_WIDTH 32 +#define MC_CMD_DBIWROP_TYPEDEF_PARMS_OFST 4 +#define MC_CMD_DBIWROP_TYPEDEF_VF_NUM_LBN 16 +#define MC_CMD_DBIWROP_TYPEDEF_VF_NUM_WIDTH 16 +#define MC_CMD_DBIWROP_TYPEDEF_VF_ACTIVE_LBN 15 +#define MC_CMD_DBIWROP_TYPEDEF_VF_ACTIVE_WIDTH 1 +#define MC_CMD_DBIWROP_TYPEDEF_CS2_LBN 14 +#define MC_CMD_DBIWROP_TYPEDEF_CS2_WIDTH 1 +#define MC_CMD_DBIWROP_TYPEDEF_PARMS_LBN 32 +#define MC_CMD_DBIWROP_TYPEDEF_PARMS_WIDTH 32 #define MC_CMD_DBIWROP_TYPEDEF_VALUE_OFST 8 #define MC_CMD_DBIWROP_TYPEDEF_VALUE_LBN 64 #define MC_CMD_DBIWROP_TYPEDEF_VALUE_WIDTH 32 /***********************************/ -/* MC_CMD_PORT_READ32 - * Read a 32-bit register from the indirect port register map. +/* MC_CMD_PORT_READ32 + * Read a 32-bit register from the indirect port register map. The port to + * access is implied by the Shared memory channel used. */ -#define MC_CMD_PORT_READ32 0x14 +#define MC_CMD_PORT_READ32 0x14 /* MC_CMD_PORT_READ32_IN msgrequest */ #define MC_CMD_PORT_READ32_IN_LEN 4 +/* Address */ #define MC_CMD_PORT_READ32_IN_ADDR_OFST 0 /* MC_CMD_PORT_READ32_OUT msgresponse */ #define MC_CMD_PORT_READ32_OUT_LEN 8 +/* Value */ #define MC_CMD_PORT_READ32_OUT_VALUE_OFST 0 +/* Status */ #define MC_CMD_PORT_READ32_OUT_STATUS_OFST 4 /***********************************/ -/* MC_CMD_PORT_WRITE32 - * Write a 32-bit register to the indirect port register map. +/* MC_CMD_PORT_WRITE32 + * Write a 32-bit register to the indirect port register map. The port to + * access is implied by the Shared memory channel used. */ -#define MC_CMD_PORT_WRITE32 0x15 +#define MC_CMD_PORT_WRITE32 0x15 /* MC_CMD_PORT_WRITE32_IN msgrequest */ #define MC_CMD_PORT_WRITE32_IN_LEN 8 +/* Address */ #define MC_CMD_PORT_WRITE32_IN_ADDR_OFST 0 +/* Value */ #define MC_CMD_PORT_WRITE32_IN_VALUE_OFST 4 /* MC_CMD_PORT_WRITE32_OUT msgresponse */ #define MC_CMD_PORT_WRITE32_OUT_LEN 4 +/* Status */ #define MC_CMD_PORT_WRITE32_OUT_STATUS_OFST 0 /***********************************/ -/* MC_CMD_PORT_READ128 - * Read a 128-bit register from the indirect port register map. +/* MC_CMD_PORT_READ128 + * Read a 128-bit register from the indirect port register map. The port to + * access is implied by the Shared memory channel used. */ -#define MC_CMD_PORT_READ128 0x16 +#define MC_CMD_PORT_READ128 0x16 /* MC_CMD_PORT_READ128_IN msgrequest */ #define MC_CMD_PORT_READ128_IN_LEN 4 +/* Address */ #define MC_CMD_PORT_READ128_IN_ADDR_OFST 0 /* MC_CMD_PORT_READ128_OUT msgresponse */ #define MC_CMD_PORT_READ128_OUT_LEN 20 +/* Value */ #define MC_CMD_PORT_READ128_OUT_VALUE_OFST 0 #define MC_CMD_PORT_READ128_OUT_VALUE_LEN 16 +/* Status */ #define MC_CMD_PORT_READ128_OUT_STATUS_OFST 16 /***********************************/ -/* MC_CMD_PORT_WRITE128 - * Write a 128-bit register to the indirect port register map. +/* MC_CMD_PORT_WRITE128 + * Write a 128-bit register to the indirect port register map. The port to + * access is implied by the Shared memory channel used. */ -#define MC_CMD_PORT_WRITE128 0x17 +#define MC_CMD_PORT_WRITE128 0x17 /* MC_CMD_PORT_WRITE128_IN msgrequest */ #define MC_CMD_PORT_WRITE128_IN_LEN 20 +/* Address */ #define MC_CMD_PORT_WRITE128_IN_ADDR_OFST 0 +/* Value */ #define MC_CMD_PORT_WRITE128_IN_VALUE_OFST 4 #define MC_CMD_PORT_WRITE128_IN_VALUE_LEN 16 /* MC_CMD_PORT_WRITE128_OUT msgresponse */ #define MC_CMD_PORT_WRITE128_OUT_LEN 4 +/* Status */ #define MC_CMD_PORT_WRITE128_OUT_STATUS_OFST 0 +/* MC_CMD_CAPABILITIES structuredef */ +#define MC_CMD_CAPABILITIES_LEN 4 +/* Small buf table. */ +#define MC_CMD_CAPABILITIES_SMALL_BUF_TBL_LBN 0 +#define MC_CMD_CAPABILITIES_SMALL_BUF_TBL_WIDTH 1 +/* Turbo mode (for Maranello). */ +#define MC_CMD_CAPABILITIES_TURBO_LBN 1 +#define MC_CMD_CAPABILITIES_TURBO_WIDTH 1 +/* Turbo mode active (for Maranello). */ +#define MC_CMD_CAPABILITIES_TURBO_ACTIVE_LBN 2 +#define MC_CMD_CAPABILITIES_TURBO_ACTIVE_WIDTH 1 +/* PTP offload. */ +#define MC_CMD_CAPABILITIES_PTP_LBN 3 +#define MC_CMD_CAPABILITIES_PTP_WIDTH 1 +/* AOE mode. */ +#define MC_CMD_CAPABILITIES_AOE_LBN 4 +#define MC_CMD_CAPABILITIES_AOE_WIDTH 1 +/* AOE mode active. */ +#define MC_CMD_CAPABILITIES_AOE_ACTIVE_LBN 5 +#define MC_CMD_CAPABILITIES_AOE_ACTIVE_WIDTH 1 +/* AOE mode active. */ +#define MC_CMD_CAPABILITIES_FC_ACTIVE_LBN 6 +#define MC_CMD_CAPABILITIES_FC_ACTIVE_WIDTH 1 +#define MC_CMD_CAPABILITIES_RESERVED_LBN 7 +#define MC_CMD_CAPABILITIES_RESERVED_WIDTH 25 + /***********************************/ -/* MC_CMD_GET_BOARD_CFG +/* MC_CMD_GET_BOARD_CFG * Returns the MC firmware configuration structure. */ -#define MC_CMD_GET_BOARD_CFG 0x18 +#define MC_CMD_GET_BOARD_CFG 0x18 +#undef MC_CMD_0x18_PRIVILEGE_CTG + +#define MC_CMD_0x18_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_GET_BOARD_CFG_IN msgrequest */ #define MC_CMD_GET_BOARD_CFG_IN_LEN 0 @@ -2919,24 +4326,10 @@ #define MC_CMD_GET_BOARD_CFG_OUT_BOARD_TYPE_OFST 0 #define MC_CMD_GET_BOARD_CFG_OUT_BOARD_NAME_OFST 4 #define MC_CMD_GET_BOARD_CFG_OUT_BOARD_NAME_LEN 32 +/* See MC_CMD_CAPABILITIES */ #define MC_CMD_GET_BOARD_CFG_OUT_CAPABILITIES_PORT0_OFST 36 -#define MC_CMD_CAPABILITIES_SMALL_BUF_TBL_LBN 0x0 /* enum */ -#define MC_CMD_CAPABILITIES_SMALL_BUF_TBL_WIDTH 0x1 /* enum */ -#define MC_CMD_CAPABILITIES_TURBO_LBN 0x1 /* enum */ -#define MC_CMD_CAPABILITIES_TURBO_WIDTH 0x1 /* enum */ -#define MC_CMD_CAPABILITIES_TURBO_ACTIVE_LBN 0x2 /* enum */ -#define MC_CMD_CAPABILITIES_TURBO_ACTIVE_WIDTH 0x1 /* enum */ -#define MC_CMD_CAPABILITIES_PTP_LBN 0x3 /* enum */ -#define MC_CMD_CAPABILITIES_PTP_WIDTH 0x1 /* enum */ -#define MC_CMD_CAPABILITIES_AOE_LBN 0x4 /* enum */ -#define MC_CMD_CAPABILITIES_AOE_WIDTH 0x1 /* enum */ -#define MC_CMD_CAPABILITIES_AOE_ACTIVE_LBN 0x5 /* enum */ -#define MC_CMD_CAPABILITIES_AOE_ACTIVE_WIDTH 0x1 /* enum */ -#define MC_CMD_CAPABILITIES_FC_ACTIVE_LBN 0x6 /* enum */ -#define MC_CMD_CAPABILITIES_FC_ACTIVE_WIDTH 0x1 /* enum */ +/* See MC_CMD_CAPABILITIES */ #define MC_CMD_GET_BOARD_CFG_OUT_CAPABILITIES_PORT1_OFST 40 -/* Enum values, see field(s): */ -/* CAPABILITIES_PORT0 */ #define MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST 44 #define MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_LEN 6 #define MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST 50 @@ -2945,6 +4338,11 @@ #define MC_CMD_GET_BOARD_CFG_OUT_MAC_COUNT_PORT1_OFST 60 #define MC_CMD_GET_BOARD_CFG_OUT_MAC_STRIDE_PORT0_OFST 64 #define MC_CMD_GET_BOARD_CFG_OUT_MAC_STRIDE_PORT1_OFST 68 +/* This field contains a 16-bit value for each of the types of NVRAM area. The + * values are defined in the firmware/mc/platform/.c file for a specific board + * type, but otherwise have no meaning to the MC; they are used by the driver + * to manage selection of appropriate firmware updates. + */ #define MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST 72 #define MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_LEN 2 #define MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MINNUM 12 @@ -2952,15 +4350,19 @@ /***********************************/ -/* MC_CMD_DBI_READX - * Read DBI register(s). +/* MC_CMD_DBI_READX + * Read DBI register(s) -- extended functionality */ -#define MC_CMD_DBI_READX 0x19 +#define MC_CMD_DBI_READX 0x19 +#undef MC_CMD_0x19_PRIVILEGE_CTG + +#define MC_CMD_0x19_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_DBI_READX_IN msgrequest */ #define MC_CMD_DBI_READX_IN_LENMIN 8 #define MC_CMD_DBI_READX_IN_LENMAX 248 #define MC_CMD_DBI_READX_IN_LEN(num) (0+8*(num)) +/* Each Read op consists of an address (offset 0), VF/CS2) */ #define MC_CMD_DBI_READX_IN_DBIRDOP_OFST 0 #define MC_CMD_DBI_READX_IN_DBIRDOP_LEN 8 #define MC_CMD_DBI_READX_IN_DBIRDOP_LO_OFST 0 @@ -2972,20 +4374,40 @@ #define MC_CMD_DBI_READX_OUT_LENMIN 4 #define MC_CMD_DBI_READX_OUT_LENMAX 252 #define MC_CMD_DBI_READX_OUT_LEN(num) (0+4*(num)) +/* Value */ #define MC_CMD_DBI_READX_OUT_VALUE_OFST 0 #define MC_CMD_DBI_READX_OUT_VALUE_LEN 4 #define MC_CMD_DBI_READX_OUT_VALUE_MINNUM 1 #define MC_CMD_DBI_READX_OUT_VALUE_MAXNUM 63 +/* MC_CMD_DBIRDOP_TYPEDEF structuredef */ +#define MC_CMD_DBIRDOP_TYPEDEF_LEN 8 +#define MC_CMD_DBIRDOP_TYPEDEF_ADDRESS_OFST 0 +#define MC_CMD_DBIRDOP_TYPEDEF_ADDRESS_LBN 0 +#define MC_CMD_DBIRDOP_TYPEDEF_ADDRESS_WIDTH 32 +#define MC_CMD_DBIRDOP_TYPEDEF_PARMS_OFST 4 +#define MC_CMD_DBIRDOP_TYPEDEF_VF_NUM_LBN 16 +#define MC_CMD_DBIRDOP_TYPEDEF_VF_NUM_WIDTH 16 +#define MC_CMD_DBIRDOP_TYPEDEF_VF_ACTIVE_LBN 15 +#define MC_CMD_DBIRDOP_TYPEDEF_VF_ACTIVE_WIDTH 1 +#define MC_CMD_DBIRDOP_TYPEDEF_CS2_LBN 14 +#define MC_CMD_DBIRDOP_TYPEDEF_CS2_WIDTH 1 +#define MC_CMD_DBIRDOP_TYPEDEF_PARMS_LBN 32 +#define MC_CMD_DBIRDOP_TYPEDEF_PARMS_WIDTH 32 + /***********************************/ -/* MC_CMD_SET_RAND_SEED +/* MC_CMD_SET_RAND_SEED * Set the 16byte seed for the MC pseudo-random generator. */ -#define MC_CMD_SET_RAND_SEED 0x1a +#define MC_CMD_SET_RAND_SEED 0x1a +#undef MC_CMD_0x1a_PRIVILEGE_CTG + +#define MC_CMD_0x1a_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_SET_RAND_SEED_IN msgrequest */ #define MC_CMD_SET_RAND_SEED_IN_LEN 16 +/* Seed value. */ #define MC_CMD_SET_RAND_SEED_IN_SEED_OFST 0 #define MC_CMD_SET_RAND_SEED_IN_SEED_LEN 16 @@ -2994,10 +4416,10 @@ /***********************************/ -/* MC_CMD_LTSSM_HIST - * Retrieve the history of the PCIE LTSSM. +/* MC_CMD_LTSSM_HIST + * Retrieve the history of the LTSSM, if the build supports it. */ -#define MC_CMD_LTSSM_HIST 0x1b +#define MC_CMD_LTSSM_HIST 0x1b /* MC_CMD_LTSSM_HIST_IN msgrequest */ #define MC_CMD_LTSSM_HIST_IN_LEN 0 @@ -3006,6 +4428,7 @@ #define MC_CMD_LTSSM_HIST_OUT_LENMIN 0 #define MC_CMD_LTSSM_HIST_OUT_LENMAX 252 #define MC_CMD_LTSSM_HIST_OUT_LEN(num) (0+4*(num)) +/* variable number of LTSSM values, as bytes. The history is read-to-clear. */ #define MC_CMD_LTSSM_HIST_OUT_DATA_OFST 0 #define MC_CMD_LTSSM_HIST_OUT_DATA_LEN 4 #define MC_CMD_LTSSM_HIST_OUT_DATA_MINNUM 0 @@ -3013,29 +4436,72 @@ /***********************************/ -/* MC_CMD_DRV_ATTACH - * Inform MCPU that this port is managed on the host. +/* MC_CMD_DRV_ATTACH + * Inform MCPU that this port is managed on the host (i.e. driver active). For + * Huntington, also request the preferred datapath firmware to use if possible + * (it may not be possible for this request to be fulfilled; the driver must + * issue a subsequent MC_CMD_GET_CAPABILITIES command to determine which + * features are actually available). The FIRMWARE_ID field is ignored by older + * platforms. */ -#define MC_CMD_DRV_ATTACH 0x1c +#define MC_CMD_DRV_ATTACH 0x1c +#undef MC_CMD_0x1c_PRIVILEGE_CTG + +#define MC_CMD_0x1c_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_DRV_ATTACH_IN msgrequest */ -#define MC_CMD_DRV_ATTACH_IN_LEN 8 +#define MC_CMD_DRV_ATTACH_IN_LEN 12 +/* new state (0=detached, 1=attached) to set if UPDATE=1 */ #define MC_CMD_DRV_ATTACH_IN_NEW_STATE_OFST 0 +/* 1 to set new state, or 0 to just report the existing state */ #define MC_CMD_DRV_ATTACH_IN_UPDATE_OFST 4 +/* preferred datapath firmware (for Huntington; ignored for Siena) */ +#define MC_CMD_DRV_ATTACH_IN_FIRMWARE_ID_OFST 8 +/* enum: Prefer to use full featured firmware */ +#define MC_CMD_FW_FULL_FEATURED 0x0 +/* enum: Prefer to use firmware with fewer features but lower latency */ +#define MC_CMD_FW_LOW_LATENCY 0x1 +/* enum: Prefer to use firmware for SolarCapture packed stream mode */ +#define MC_CMD_FW_PACKED_STREAM 0x2 +/* enum: Prefer to use firmware with fewer features and simpler TX event + * batching but higher TX packet rate + */ +#define MC_CMD_FW_HIGH_TX_RATE 0x3 +/* enum: Reserved value */ +#define MC_CMD_FW_PACKED_STREAM_HASH_MODE_1 0x4 +/* enum: Only this option is allowed for non-admin functions */ +#define MC_CMD_FW_DONT_CARE 0xffffffff /* MC_CMD_DRV_ATTACH_OUT msgresponse */ #define MC_CMD_DRV_ATTACH_OUT_LEN 4 +/* previous or existing state (0=detached, 1=attached) */ #define MC_CMD_DRV_ATTACH_OUT_OLD_STATE_OFST 0 +/* MC_CMD_DRV_ATTACH_EXT_OUT msgresponse */ +#define MC_CMD_DRV_ATTACH_EXT_OUT_LEN 8 +/* previous or existing state (0=detached, 1=attached) */ +#define MC_CMD_DRV_ATTACH_EXT_OUT_OLD_STATE_OFST 0 +/* Flags associated with this function */ +#define MC_CMD_DRV_ATTACH_EXT_OUT_FUNC_FLAGS_OFST 4 +/* enum: Labels the lowest-numbered function visible to the OS */ +#define MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY 0x0 +/* enum: The function can control the link state of the physical port it is + * bound to. + */ +#define MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL 0x1 +/* enum: The function can perform privileged operations */ +#define MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED 0x2 + /***********************************/ -/* MC_CMD_SHMUART +/* MC_CMD_SHMUART * Route UART output to circular buffer in shared memory instead. */ -#define MC_CMD_SHMUART 0x1f +#define MC_CMD_SHMUART 0x1f /* MC_CMD_SHMUART_IN msgrequest */ #define MC_CMD_SHMUART_IN_LEN 4 +/* ??? */ #define MC_CMD_SHMUART_IN_FLAG_OFST 0 /* MC_CMD_SHMUART_OUT msgresponse */ @@ -3043,10 +4509,15 @@ /***********************************/ -/* MC_CMD_PORT_RESET - * Generic per-port reset. +/* MC_CMD_PORT_RESET + * Generic per-port reset. There is no equivalent for per-board reset. Locks + * required: None; Return code: 0, ETIME. NOTE: This command is deprecated - + * use MC_CMD_ENTITY_RESET instead. */ -#define MC_CMD_PORT_RESET 0x20 +#define MC_CMD_PORT_RESET 0x20 +#undef MC_CMD_0x20_PRIVILEGE_CTG + +#define MC_CMD_0x20_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_PORT_RESET_IN msgrequest */ #define MC_CMD_PORT_RESET_IN_LEN 0 @@ -3056,14 +4527,38 @@ /***********************************/ -/* MC_CMD_PCIE_CREDITS +/* MC_CMD_ENTITY_RESET + * Generic per-resource reset. There is no equivalent for per-board reset. + * Locks required: None; Return code: 0, ETIME. NOTE: This command is an + * extended version of the deprecated MC_CMD_PORT_RESET with added fields. + */ +#define MC_CMD_ENTITY_RESET 0x20 +/* MC_CMD_0x20_PRIVILEGE_CTG SRIOV_CTG_GENERAL */ + +/* MC_CMD_ENTITY_RESET_IN msgrequest */ +#define MC_CMD_ENTITY_RESET_IN_LEN 4 +/* Optional flags field. Omitting this will perform a "legacy" reset action + * (TBD). + */ +#define MC_CMD_ENTITY_RESET_IN_FLAG_OFST 0 +#define MC_CMD_ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET_LBN 0 +#define MC_CMD_ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET_WIDTH 1 + +/* MC_CMD_ENTITY_RESET_OUT msgresponse */ +#define MC_CMD_ENTITY_RESET_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_PCIE_CREDITS * Read instantaneous and minimum flow control thresholds. */ -#define MC_CMD_PCIE_CREDITS 0x21 +#define MC_CMD_PCIE_CREDITS 0x21 /* MC_CMD_PCIE_CREDITS_IN msgrequest */ #define MC_CMD_PCIE_CREDITS_IN_LEN 8 +/* poll period. 0 is disabled */ #define MC_CMD_PCIE_CREDITS_IN_POLL_PERIOD_OFST 0 +/* wipe statistics */ #define MC_CMD_PCIE_CREDITS_IN_WIPE_OFST 4 /* MC_CMD_PCIE_CREDITS_OUT msgresponse */ @@ -3087,10 +4582,10 @@ /***********************************/ -/* MC_CMD_RXD_MONITOR +/* MC_CMD_RXD_MONITOR * Get histogram of RX queue fill level. */ -#define MC_CMD_RXD_MONITOR 0x22 +#define MC_CMD_RXD_MONITOR 0x22 /* MC_CMD_RXD_MONITOR_IN msgrequest */ #define MC_CMD_RXD_MONITOR_IN_LEN 12 @@ -3123,10 +4618,13 @@ /***********************************/ -/* MC_CMD_PUTS - * puts(3) implementation over MCDI +/* MC_CMD_PUTS + * Copy the given ASCII string out onto UART and/or out of the network port. */ -#define MC_CMD_PUTS 0x23 +#define MC_CMD_PUTS 0x23 +#undef MC_CMD_0x23_PRIVILEGE_CTG + +#define MC_CMD_0x23_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_PUTS_IN msgrequest */ #define MC_CMD_PUTS_IN_LENMIN 13 @@ -3149,16 +4647,21 @@ /***********************************/ -/* MC_CMD_GET_PHY_CFG - * Report PHY configuration. +/* MC_CMD_GET_PHY_CFG + * Report PHY configuration. This guarantees to succeed even if the PHY is in a + * 'zombie' state. Locks required: None */ -#define MC_CMD_GET_PHY_CFG 0x24 +#define MC_CMD_GET_PHY_CFG 0x24 +#undef MC_CMD_0x24_PRIVILEGE_CTG + +#define MC_CMD_0x24_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_GET_PHY_CFG_IN msgrequest */ #define MC_CMD_GET_PHY_CFG_IN_LEN 0 /* MC_CMD_GET_PHY_CFG_OUT msgresponse */ #define MC_CMD_GET_PHY_CFG_OUT_LEN 72 +/* flags */ #define MC_CMD_GET_PHY_CFG_OUT_FLAGS_OFST 0 #define MC_CMD_GET_PHY_CFG_OUT_PRESENT_LBN 0 #define MC_CMD_GET_PHY_CFG_OUT_PRESENT_WIDTH 1 @@ -3174,7 +4677,9 @@ #define MC_CMD_GET_PHY_CFG_OUT_TXDIS_WIDTH 1 #define MC_CMD_GET_PHY_CFG_OUT_BIST_LBN 6 #define MC_CMD_GET_PHY_CFG_OUT_BIST_WIDTH 1 +/* ?? */ #define MC_CMD_GET_PHY_CFG_OUT_TYPE_OFST 4 +/* Bitmask of supported capabilities */ #define MC_CMD_GET_PHY_CFG_OUT_SUPPORTED_CAP_OFST 8 #define MC_CMD_PHY_CAP_10HDX_LBN 1 #define MC_CMD_PHY_CAP_10HDX_WIDTH 1 @@ -3196,22 +4701,38 @@ #define MC_CMD_PHY_CAP_ASYM_WIDTH 1 #define MC_CMD_PHY_CAP_AN_LBN 10 #define MC_CMD_PHY_CAP_AN_WIDTH 1 +#define MC_CMD_PHY_CAP_40000FDX_LBN 11 +#define MC_CMD_PHY_CAP_40000FDX_WIDTH 1 #define MC_CMD_PHY_CAP_DDM_LBN 12 #define MC_CMD_PHY_CAP_DDM_WIDTH 1 +/* ?? */ #define MC_CMD_GET_PHY_CFG_OUT_CHANNEL_OFST 12 +/* ?? */ #define MC_CMD_GET_PHY_CFG_OUT_PRT_OFST 16 +/* ?? */ #define MC_CMD_GET_PHY_CFG_OUT_STATS_MASK_OFST 20 +/* ?? */ #define MC_CMD_GET_PHY_CFG_OUT_NAME_OFST 24 #define MC_CMD_GET_PHY_CFG_OUT_NAME_LEN 20 +/* ?? */ #define MC_CMD_GET_PHY_CFG_OUT_MEDIA_TYPE_OFST 44 -#define MC_CMD_MEDIA_XAUI 0x1 /* enum */ -#define MC_CMD_MEDIA_CX4 0x2 /* enum */ -#define MC_CMD_MEDIA_KX4 0x3 /* enum */ -#define MC_CMD_MEDIA_XFP 0x4 /* enum */ -#define MC_CMD_MEDIA_SFP_PLUS 0x5 /* enum */ -#define MC_CMD_MEDIA_BASE_T 0x6 /* enum */ +/* enum: Xaui. */ +#define MC_CMD_MEDIA_XAUI 0x1 +/* enum: CX4. */ +#define MC_CMD_MEDIA_CX4 0x2 +/* enum: KX4. */ +#define MC_CMD_MEDIA_KX4 0x3 +/* enum: XFP Far. */ +#define MC_CMD_MEDIA_XFP 0x4 +/* enum: SFP+. */ +#define MC_CMD_MEDIA_SFP_PLUS 0x5 +/* enum: 10GBaseT. */ +#define MC_CMD_MEDIA_BASE_T 0x6 +/* enum: QSFP+. */ +#define MC_CMD_MEDIA_QSFP_PLUS 0x7 #define MC_CMD_GET_PHY_CFG_OUT_MMD_MASK_OFST 48 -#define MC_CMD_MMD_CLAUSE22 0x0 /* enum */ +/* enum: Native clause 22 */ +#define MC_CMD_MMD_CLAUSE22 0x0 #define MC_CMD_MMD_CLAUSE45_PMAPMD 0x1 /* enum */ #define MC_CMD_MMD_CLAUSE45_WIS 0x2 /* enum */ #define MC_CMD_MMD_CLAUSE45_PCS 0x3 /* enum */ @@ -3219,7 +4740,8 @@ #define MC_CMD_MMD_CLAUSE45_DTEXS 0x5 /* enum */ #define MC_CMD_MMD_CLAUSE45_TC 0x6 /* enum */ #define MC_CMD_MMD_CLAUSE45_AN 0x7 /* enum */ -#define MC_CMD_MMD_CLAUSE45_C22EXT 0x1d /* enum */ +/* enum: Clause22 proxied over clause45 by PHY. */ +#define MC_CMD_MMD_CLAUSE45_C22EXT 0x1d #define MC_CMD_MMD_CLAUSE45_VEND1 0x1e /* enum */ #define MC_CMD_MMD_CLAUSE45_VEND2 0x1f /* enum */ #define MC_CMD_GET_PHY_CFG_OUT_REVISION_OFST 52 @@ -3227,44 +4749,74 @@ /***********************************/ -/* MC_CMD_START_BIST - * Start a BIST test on the PHY. +/* MC_CMD_START_BIST + * Start a BIST test on the PHY. Locks required: PHY_LOCK if doing a PHY BIST + * Return code: 0, EINVAL, EACCES (if PHY_LOCK is not held) */ -#define MC_CMD_START_BIST 0x25 +#define MC_CMD_START_BIST 0x25 +#undef MC_CMD_0x25_PRIVILEGE_CTG + +#define MC_CMD_0x25_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_START_BIST_IN msgrequest */ #define MC_CMD_START_BIST_IN_LEN 4 +/* Type of test. */ #define MC_CMD_START_BIST_IN_TYPE_OFST 0 -#define MC_CMD_PHY_BIST_CABLE_SHORT 0x1 /* enum */ -#define MC_CMD_PHY_BIST_CABLE_LONG 0x2 /* enum */ -#define MC_CMD_BPX_SERDES_BIST 0x3 /* enum */ -#define MC_CMD_MC_LOOPBACK_BIST 0x4 /* enum */ -#define MC_CMD_PHY_BIST 0x5 /* enum */ +/* enum: Run the PHY's short cable BIST. */ +#define MC_CMD_PHY_BIST_CABLE_SHORT 0x1 +/* enum: Run the PHY's long cable BIST. */ +#define MC_CMD_PHY_BIST_CABLE_LONG 0x2 +/* enum: Run BIST on the currently selected BPX Serdes (XAUI or XFI) . */ +#define MC_CMD_BPX_SERDES_BIST 0x3 +/* enum: Run the MC loopback tests. */ +#define MC_CMD_MC_LOOPBACK_BIST 0x4 +/* enum: Run the PHY's standard BIST. */ +#define MC_CMD_PHY_BIST 0x5 +/* enum: Run MC RAM test. */ +#define MC_CMD_MC_MEM_BIST 0x6 +/* enum: Run Port RAM test. */ +#define MC_CMD_PORT_MEM_BIST 0x7 +/* enum: Run register test. */ +#define MC_CMD_REG_BIST 0x8 /* MC_CMD_START_BIST_OUT msgresponse */ #define MC_CMD_START_BIST_OUT_LEN 0 /***********************************/ -/* MC_CMD_POLL_BIST - * Poll for BIST completion. +/* MC_CMD_POLL_BIST + * Poll for BIST completion. Returns a single status code, and optionally some + * PHY specific bist output. The driver should only consume the BIST output + * after validating OUTLEN and MC_CMD_GET_PHY_CFG.TYPE. If a driver can't + * successfully parse the BIST output, it should still respect the pass/Fail in + * OUT.RESULT. Locks required: PHY_LOCK if doing a PHY BIST. Return code: 0, + * EACCES (if PHY_LOCK is not held). */ -#define MC_CMD_POLL_BIST 0x26 +#define MC_CMD_POLL_BIST 0x26 +#undef MC_CMD_0x26_PRIVILEGE_CTG + +#define MC_CMD_0x26_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_POLL_BIST_IN msgrequest */ #define MC_CMD_POLL_BIST_IN_LEN 0 /* MC_CMD_POLL_BIST_OUT msgresponse */ #define MC_CMD_POLL_BIST_OUT_LEN 8 +/* result */ #define MC_CMD_POLL_BIST_OUT_RESULT_OFST 0 -#define MC_CMD_POLL_BIST_RUNNING 0x1 /* enum */ -#define MC_CMD_POLL_BIST_PASSED 0x2 /* enum */ -#define MC_CMD_POLL_BIST_FAILED 0x3 /* enum */ -#define MC_CMD_POLL_BIST_TIMEOUT 0x4 /* enum */ +/* enum: Running. */ +#define MC_CMD_POLL_BIST_RUNNING 0x1 +/* enum: Passed. */ +#define MC_CMD_POLL_BIST_PASSED 0x2 +/* enum: Failed. */ +#define MC_CMD_POLL_BIST_FAILED 0x3 +/* enum: Timed-out. */ +#define MC_CMD_POLL_BIST_TIMEOUT 0x4 #define MC_CMD_POLL_BIST_OUT_PRIVATE_OFST 4 /* MC_CMD_POLL_BIST_OUT_SFT9001 msgresponse */ #define MC_CMD_POLL_BIST_OUT_SFT9001_LEN 36 +/* result */ /* MC_CMD_POLL_BIST_OUT_RESULT_OFST 0 */ /* Enum values, see field(s): */ /* MC_CMD_POLL_BIST_OUT/MC_CMD_POLL_BIST_OUT_RESULT */ @@ -3272,44 +4824,118 @@ #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_LENGTH_B_OFST 8 #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_LENGTH_C_OFST 12 #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_LENGTH_D_OFST 16 +/* Status of each channel A */ #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_STATUS_A_OFST 20 -#define MC_CMD_POLL_BIST_SFT9001_PAIR_OK 0x1 /* enum */ -#define MC_CMD_POLL_BIST_SFT9001_PAIR_OPEN 0x2 /* enum */ -#define MC_CMD_POLL_BIST_SFT9001_INTRA_PAIR_SHORT 0x3 /* enum */ -#define MC_CMD_POLL_BIST_SFT9001_INTER_PAIR_SHORT 0x4 /* enum */ -#define MC_CMD_POLL_BIST_SFT9001_PAIR_BUSY 0x9 /* enum */ +/* enum: Ok. */ +#define MC_CMD_POLL_BIST_SFT9001_PAIR_OK 0x1 +/* enum: Open. */ +#define MC_CMD_POLL_BIST_SFT9001_PAIR_OPEN 0x2 +/* enum: Intra-pair short. */ +#define MC_CMD_POLL_BIST_SFT9001_INTRA_PAIR_SHORT 0x3 +/* enum: Inter-pair short. */ +#define MC_CMD_POLL_BIST_SFT9001_INTER_PAIR_SHORT 0x4 +/* enum: Busy. */ +#define MC_CMD_POLL_BIST_SFT9001_PAIR_BUSY 0x9 +/* Status of each channel B */ #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_STATUS_B_OFST 24 /* Enum values, see field(s): */ /* CABLE_STATUS_A */ +/* Status of each channel C */ #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_STATUS_C_OFST 28 /* Enum values, see field(s): */ /* CABLE_STATUS_A */ +/* Status of each channel D */ #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_STATUS_D_OFST 32 /* Enum values, see field(s): */ /* CABLE_STATUS_A */ /* MC_CMD_POLL_BIST_OUT_MRSFP msgresponse */ #define MC_CMD_POLL_BIST_OUT_MRSFP_LEN 8 +/* result */ /* MC_CMD_POLL_BIST_OUT_RESULT_OFST 0 */ /* Enum values, see field(s): */ /* MC_CMD_POLL_BIST_OUT/MC_CMD_POLL_BIST_OUT_RESULT */ #define MC_CMD_POLL_BIST_OUT_MRSFP_TEST_OFST 4 -#define MC_CMD_POLL_BIST_MRSFP_TEST_COMPLETE 0x0 /* enum */ -#define MC_CMD_POLL_BIST_MRSFP_TEST_BUS_SWITCH_OFF_I2C_WRITE 0x1 /* enum */ -#define MC_CMD_POLL_BIST_MRSFP_TEST_BUS_SWITCH_OFF_I2C_NO_ACCESS_IO_EXP 0x2 /* enum */ -#define MC_CMD_POLL_BIST_MRSFP_TEST_BUS_SWITCH_OFF_I2C_NO_ACCESS_MODULE 0x3 /* enum */ -#define MC_CMD_POLL_BIST_MRSFP_TEST_IO_EXP_I2C_CONFIGURE 0x4 /* enum */ -#define MC_CMD_POLL_BIST_MRSFP_TEST_BUS_SWITCH_I2C_NO_CROSSTALK 0x5 /* enum */ -#define MC_CMD_POLL_BIST_MRSFP_TEST_MODULE_PRESENCE 0x6 /* enum */ -#define MC_CMD_POLL_BIST_MRSFP_TEST_MODULE_ID_I2C_ACCESS 0x7 /* enum */ -#define MC_CMD_POLL_BIST_MRSFP_TEST_MODULE_ID_SANE_VALUE 0x8 /* enum */ +/* enum: Complete. */ +#define MC_CMD_POLL_BIST_MRSFP_TEST_COMPLETE 0x0 +/* enum: Bus switch off I2C write. */ +#define MC_CMD_POLL_BIST_MRSFP_TEST_BUS_SWITCH_OFF_I2C_WRITE 0x1 +/* enum: Bus switch off I2C no access IO exp. */ +#define MC_CMD_POLL_BIST_MRSFP_TEST_BUS_SWITCH_OFF_I2C_NO_ACCESS_IO_EXP 0x2 +/* enum: Bus switch off I2C no access module. */ +#define MC_CMD_POLL_BIST_MRSFP_TEST_BUS_SWITCH_OFF_I2C_NO_ACCESS_MODULE 0x3 +/* enum: IO exp I2C configure. */ +#define MC_CMD_POLL_BIST_MRSFP_TEST_IO_EXP_I2C_CONFIGURE 0x4 +/* enum: Bus switch I2C no cross talk. */ +#define MC_CMD_POLL_BIST_MRSFP_TEST_BUS_SWITCH_I2C_NO_CROSSTALK 0x5 +/* enum: Module presence. */ +#define MC_CMD_POLL_BIST_MRSFP_TEST_MODULE_PRESENCE 0x6 +/* enum: Module ID I2C access. */ +#define MC_CMD_POLL_BIST_MRSFP_TEST_MODULE_ID_I2C_ACCESS 0x7 +/* enum: Module ID sane value. */ +#define MC_CMD_POLL_BIST_MRSFP_TEST_MODULE_ID_SANE_VALUE 0x8 + +/* MC_CMD_POLL_BIST_OUT_MEM msgresponse */ +#define MC_CMD_POLL_BIST_OUT_MEM_LEN 36 +/* result */ +/* MC_CMD_POLL_BIST_OUT_RESULT_OFST 0 */ +/* Enum values, see field(s): */ +/* MC_CMD_POLL_BIST_OUT/MC_CMD_POLL_BIST_OUT_RESULT */ +#define MC_CMD_POLL_BIST_OUT_MEM_TEST_OFST 4 +/* enum: Test has completed. */ +#define MC_CMD_POLL_BIST_MEM_COMPLETE 0x0 +/* enum: RAM test - walk ones. */ +#define MC_CMD_POLL_BIST_MEM_MEM_WALK_ONES 0x1 +/* enum: RAM test - walk zeros. */ +#define MC_CMD_POLL_BIST_MEM_MEM_WALK_ZEROS 0x2 +/* enum: RAM test - walking inversions zeros/ones. */ +#define MC_CMD_POLL_BIST_MEM_MEM_INV_ZERO_ONE 0x3 +/* enum: RAM test - walking inversions checkerboard. */ +#define MC_CMD_POLL_BIST_MEM_MEM_INV_CHKBOARD 0x4 +/* enum: Register test - set / clear individual bits. */ +#define MC_CMD_POLL_BIST_MEM_REG 0x5 +/* enum: ECC error detected. */ +#define MC_CMD_POLL_BIST_MEM_ECC 0x6 +/* Failure address, only valid if result is POLL_BIST_FAILED */ +#define MC_CMD_POLL_BIST_OUT_MEM_ADDR_OFST 8 +/* Bus or address space to which the failure address corresponds */ +#define MC_CMD_POLL_BIST_OUT_MEM_BUS_OFST 12 +/* enum: MC MIPS bus. */ +#define MC_CMD_POLL_BIST_MEM_BUS_MC 0x0 +/* enum: CSR IREG bus. */ +#define MC_CMD_POLL_BIST_MEM_BUS_CSR 0x1 +/* enum: RX DPCPU bus. */ +#define MC_CMD_POLL_BIST_MEM_BUS_DPCPU_RX 0x2 +/* enum: TX0 DPCPU bus. */ +#define MC_CMD_POLL_BIST_MEM_BUS_DPCPU_TX0 0x3 +/* enum: TX1 DPCPU bus. */ +#define MC_CMD_POLL_BIST_MEM_BUS_DPCPU_TX1 0x4 +/* enum: RX DICPU bus. */ +#define MC_CMD_POLL_BIST_MEM_BUS_DICPU_RX 0x5 +/* enum: TX DICPU bus. */ +#define MC_CMD_POLL_BIST_MEM_BUS_DICPU_TX 0x6 +/* Pattern written to RAM / register */ +#define MC_CMD_POLL_BIST_OUT_MEM_EXPECT_OFST 16 +/* Actual value read from RAM / register */ +#define MC_CMD_POLL_BIST_OUT_MEM_ACTUAL_OFST 20 +/* ECC error mask */ +#define MC_CMD_POLL_BIST_OUT_MEM_ECC_OFST 24 +/* ECC parity error mask */ +#define MC_CMD_POLL_BIST_OUT_MEM_ECC_PARITY_OFST 28 +/* ECC fatal error mask */ +#define MC_CMD_POLL_BIST_OUT_MEM_ECC_FATAL_OFST 32 /***********************************/ -/* MC_CMD_FLUSH_RX_QUEUES - * Flush receive queue(s). +/* MC_CMD_FLUSH_RX_QUEUES + * Flush receive queue(s). If SRIOV is enabled (via MC_CMD_SRIOV), then RXQ + * flushes should be initiated via this MCDI operation, rather than via + * directly writing FLUSH_CMD. + * + * The flush is completed (either done/fail) asynchronously (after this command + * returns). The driver must still wait for flush done/failure events as usual. */ -#define MC_CMD_FLUSH_RX_QUEUES 0x27 +#define MC_CMD_FLUSH_RX_QUEUES 0x27 /* MC_CMD_FLUSH_RX_QUEUES_IN msgrequest */ #define MC_CMD_FLUSH_RX_QUEUES_IN_LENMIN 4 @@ -3325,82 +4951,156 @@ /***********************************/ -/* MC_CMD_GET_LOOPBACK_MODES - * Get port's loopback modes. +/* MC_CMD_GET_LOOPBACK_MODES + * Returns a bitmask of loopback modes available at each speed. */ -#define MC_CMD_GET_LOOPBACK_MODES 0x28 +#define MC_CMD_GET_LOOPBACK_MODES 0x28 +#undef MC_CMD_0x28_PRIVILEGE_CTG + +#define MC_CMD_0x28_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_GET_LOOPBACK_MODES_IN msgrequest */ #define MC_CMD_GET_LOOPBACK_MODES_IN_LEN 0 /* MC_CMD_GET_LOOPBACK_MODES_OUT msgresponse */ -#define MC_CMD_GET_LOOPBACK_MODES_OUT_LEN 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_LEN 40 +/* Supported loopbacks. */ #define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_OFST 0 #define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LEN 8 #define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_OFST 0 #define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_OFST 4 -#define MC_CMD_LOOPBACK_NONE 0x0 /* enum */ -#define MC_CMD_LOOPBACK_DATA 0x1 /* enum */ -#define MC_CMD_LOOPBACK_GMAC 0x2 /* enum */ -#define MC_CMD_LOOPBACK_XGMII 0x3 /* enum */ -#define MC_CMD_LOOPBACK_XGXS 0x4 /* enum */ -#define MC_CMD_LOOPBACK_XAUI 0x5 /* enum */ -#define MC_CMD_LOOPBACK_GMII 0x6 /* enum */ -#define MC_CMD_LOOPBACK_SGMII 0x7 /* enum */ -#define MC_CMD_LOOPBACK_XGBR 0x8 /* enum */ -#define MC_CMD_LOOPBACK_XFI 0x9 /* enum */ -#define MC_CMD_LOOPBACK_XAUI_FAR 0xa /* enum */ -#define MC_CMD_LOOPBACK_GMII_FAR 0xb /* enum */ -#define MC_CMD_LOOPBACK_SGMII_FAR 0xc /* enum */ -#define MC_CMD_LOOPBACK_XFI_FAR 0xd /* enum */ -#define MC_CMD_LOOPBACK_GPHY 0xe /* enum */ -#define MC_CMD_LOOPBACK_PHYXS 0xf /* enum */ -#define MC_CMD_LOOPBACK_PCS 0x10 /* enum */ -#define MC_CMD_LOOPBACK_PMAPMD 0x11 /* enum */ -#define MC_CMD_LOOPBACK_XPORT 0x12 /* enum */ -#define MC_CMD_LOOPBACK_XGMII_WS 0x13 /* enum */ -#define MC_CMD_LOOPBACK_XAUI_WS 0x14 /* enum */ -#define MC_CMD_LOOPBACK_XAUI_WS_FAR 0x15 /* enum */ -#define MC_CMD_LOOPBACK_XAUI_WS_NEAR 0x16 /* enum */ -#define MC_CMD_LOOPBACK_GMII_WS 0x17 /* enum */ -#define MC_CMD_LOOPBACK_XFI_WS 0x18 /* enum */ -#define MC_CMD_LOOPBACK_XFI_WS_FAR 0x19 /* enum */ -#define MC_CMD_LOOPBACK_PHYXS_WS 0x1a /* enum */ -#define MC_CMD_LOOPBACK_AOE_INT_NEAR 0x23 /* enum */ +/* enum: None. */ +#define MC_CMD_LOOPBACK_NONE 0x0 +/* enum: Data. */ +#define MC_CMD_LOOPBACK_DATA 0x1 +/* enum: GMAC. */ +#define MC_CMD_LOOPBACK_GMAC 0x2 +/* enum: XGMII. */ +#define MC_CMD_LOOPBACK_XGMII 0x3 +/* enum: XGXS. */ +#define MC_CMD_LOOPBACK_XGXS 0x4 +/* enum: XAUI. */ +#define MC_CMD_LOOPBACK_XAUI 0x5 +/* enum: GMII. */ +#define MC_CMD_LOOPBACK_GMII 0x6 +/* enum: SGMII. */ +#define MC_CMD_LOOPBACK_SGMII 0x7 +/* enum: XGBR. */ +#define MC_CMD_LOOPBACK_XGBR 0x8 +/* enum: XFI. */ +#define MC_CMD_LOOPBACK_XFI 0x9 +/* enum: XAUI Far. */ +#define MC_CMD_LOOPBACK_XAUI_FAR 0xa +/* enum: GMII Far. */ +#define MC_CMD_LOOPBACK_GMII_FAR 0xb +/* enum: SGMII Far. */ +#define MC_CMD_LOOPBACK_SGMII_FAR 0xc +/* enum: XFI Far. */ +#define MC_CMD_LOOPBACK_XFI_FAR 0xd +/* enum: GPhy. */ +#define MC_CMD_LOOPBACK_GPHY 0xe +/* enum: PhyXS. */ +#define MC_CMD_LOOPBACK_PHYXS 0xf +/* enum: PCS. */ +#define MC_CMD_LOOPBACK_PCS 0x10 +/* enum: PMA-PMD. */ +#define MC_CMD_LOOPBACK_PMAPMD 0x11 +/* enum: Cross-Port. */ +#define MC_CMD_LOOPBACK_XPORT 0x12 +/* enum: XGMII-Wireside. */ +#define MC_CMD_LOOPBACK_XGMII_WS 0x13 +/* enum: XAUI Wireside. */ +#define MC_CMD_LOOPBACK_XAUI_WS 0x14 +/* enum: XAUI Wireside Far. */ +#define MC_CMD_LOOPBACK_XAUI_WS_FAR 0x15 +/* enum: XAUI Wireside near. */ +#define MC_CMD_LOOPBACK_XAUI_WS_NEAR 0x16 +/* enum: GMII Wireside. */ +#define MC_CMD_LOOPBACK_GMII_WS 0x17 +/* enum: XFI Wireside. */ +#define MC_CMD_LOOPBACK_XFI_WS 0x18 +/* enum: XFI Wireside Far. */ +#define MC_CMD_LOOPBACK_XFI_WS_FAR 0x19 +/* enum: PhyXS Wireside. */ +#define MC_CMD_LOOPBACK_PHYXS_WS 0x1a +/* enum: PMA lanes MAC-Serdes. */ +#define MC_CMD_LOOPBACK_PMA_INT 0x1b +/* enum: KR Serdes Parallel (Encoder). */ +#define MC_CMD_LOOPBACK_SD_NEAR 0x1c +/* enum: KR Serdes Serial. */ +#define MC_CMD_LOOPBACK_SD_FAR 0x1d +/* enum: PMA lanes MAC-Serdes Wireside. */ +#define MC_CMD_LOOPBACK_PMA_INT_WS 0x1e +/* enum: KR Serdes Parallel Wireside (Full PCS). */ +#define MC_CMD_LOOPBACK_SD_FEP2_WS 0x1f +/* enum: KR Serdes Parallel Wireside (Sym Aligner to TX). */ +#define MC_CMD_LOOPBACK_SD_FEP1_5_WS 0x20 +/* enum: KR Serdes Parallel Wireside (Deserializer to Serializer). */ +#define MC_CMD_LOOPBACK_SD_FEP_WS 0x21 +/* enum: KR Serdes Serial Wireside. */ +#define MC_CMD_LOOPBACK_SD_FES_WS 0x22 +/* enum: Near side of AOE Siena side port */ +#define MC_CMD_LOOPBACK_AOE_INT_NEAR 0x23 +/* enum: Medford Wireside datapath loopback */ +#define MC_CMD_LOOPBACK_DATA_WS 0x24 +/* enum: Force link up without setting up any physical loopback (snapper use + * only) + */ +#define MC_CMD_LOOPBACK_FORCE_EXT_LINK 0x25 +/* Supported loopbacks. */ #define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_OFST 8 #define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LEN 8 #define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_OFST 8 #define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_OFST 12 /* Enum values, see field(s): */ /* 100M */ +/* Supported loopbacks. */ #define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_OFST 16 #define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LEN 8 #define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_OFST 16 #define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_OFST 20 /* Enum values, see field(s): */ /* 100M */ +/* Supported loopbacks. */ #define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_OFST 24 #define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LEN 8 #define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_OFST 24 #define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_OFST 28 /* Enum values, see field(s): */ /* 100M */ +/* Supported loopbacks. */ +#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_OFST 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LEN 8 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_OFST 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_OFST 36 +/* Enum values, see field(s): */ +/* 100M */ /***********************************/ -/* MC_CMD_GET_LINK - * Read the unified MAC/PHY link state. +/* MC_CMD_GET_LINK + * Read the unified MAC/PHY link state. Locks required: None Return code: 0, + * ETIME. */ -#define MC_CMD_GET_LINK 0x29 +#define MC_CMD_GET_LINK 0x29 +#undef MC_CMD_0x29_PRIVILEGE_CTG + +#define MC_CMD_0x29_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_GET_LINK_IN msgrequest */ #define MC_CMD_GET_LINK_IN_LEN 0 /* MC_CMD_GET_LINK_OUT msgresponse */ #define MC_CMD_GET_LINK_OUT_LEN 28 +/* near-side advertised capabilities */ #define MC_CMD_GET_LINK_OUT_CAP_OFST 0 +/* link-partner advertised capabilities */ #define MC_CMD_GET_LINK_OUT_LP_CAP_OFST 4 +/* Autonegotiated speed in mbit/s. The link may still be down even if this + * reads non-zero. + */ #define MC_CMD_GET_LINK_OUT_LINK_SPEED_OFST 8 +/* Current loopback setting. */ #define MC_CMD_GET_LINK_OUT_LOOPBACK_MODE_OFST 12 /* Enum values, see field(s): */ /* MC_CMD_GET_LOOPBACK_MODES/MC_CMD_GET_LOOPBACK_MODES_OUT/100M */ @@ -3417,10 +5117,10 @@ #define MC_CMD_GET_LINK_OUT_LINK_FAULT_RX_WIDTH 1 #define MC_CMD_GET_LINK_OUT_LINK_FAULT_TX_LBN 7 #define MC_CMD_GET_LINK_OUT_LINK_FAULT_TX_WIDTH 1 +/* This returns the negotiated flow control value. */ #define MC_CMD_GET_LINK_OUT_FCNTL_OFST 20 -#define MC_CMD_FCNTL_OFF 0x0 /* enum */ -#define MC_CMD_FCNTL_RESPOND 0x1 /* enum */ -#define MC_CMD_FCNTL_BIDIR 0x2 /* enum */ +/* Enum values, see field(s): */ +/* MC_CMD_SET_MAC/MC_CMD_SET_MAC_IN/FCNTL */ #define MC_CMD_GET_LINK_OUT_MAC_FAULT_OFST 24 #define MC_CMD_MAC_FAULT_XGMII_LOCAL_LBN 0 #define MC_CMD_MAC_FAULT_XGMII_LOCAL_WIDTH 1 @@ -3433,14 +5133,20 @@ /***********************************/ -/* MC_CMD_SET_LINK - * Write the unified MAC/PHY link configuration. +/* MC_CMD_SET_LINK + * Write the unified MAC/PHY link configuration. Locks required: None. Return + * code: 0, EINVAL, ETIME */ -#define MC_CMD_SET_LINK 0x2a +#define MC_CMD_SET_LINK 0x2a +#undef MC_CMD_0x2a_PRIVILEGE_CTG + +#define MC_CMD_0x2a_PRIVILEGE_CTG SRIOV_CTG_LINK /* MC_CMD_SET_LINK_IN msgrequest */ #define MC_CMD_SET_LINK_IN_LEN 16 +/* ??? */ #define MC_CMD_SET_LINK_IN_CAP_OFST 0 +/* Flags */ #define MC_CMD_SET_LINK_IN_FLAGS_OFST 4 #define MC_CMD_SET_LINK_IN_LOWPOWER_LBN 0 #define MC_CMD_SET_LINK_IN_LOWPOWER_WIDTH 1 @@ -3448,9 +5154,13 @@ #define MC_CMD_SET_LINK_IN_POWEROFF_WIDTH 1 #define MC_CMD_SET_LINK_IN_TXDIS_LBN 2 #define MC_CMD_SET_LINK_IN_TXDIS_WIDTH 1 +/* Loopback mode. */ #define MC_CMD_SET_LINK_IN_LOOPBACK_MODE_OFST 8 /* Enum values, see field(s): */ /* MC_CMD_GET_LOOPBACK_MODES/MC_CMD_GET_LOOPBACK_MODES_OUT/100M */ +/* A loopback speed of "0" is supported, and means (choose any available + * speed). + */ #define MC_CMD_SET_LINK_IN_LOOPBACK_SPEED_OFST 12 /* MC_CMD_SET_LINK_OUT msgresponse */ @@ -3458,13 +5168,17 @@ /***********************************/ -/* MC_CMD_SET_ID_LED - * Set indentification LED state. +/* MC_CMD_SET_ID_LED + * Set identification LED state. Locks required: None. Return code: 0, EINVAL */ -#define MC_CMD_SET_ID_LED 0x2b +#define MC_CMD_SET_ID_LED 0x2b +#undef MC_CMD_0x2b_PRIVILEGE_CTG + +#define MC_CMD_0x2b_PRIVILEGE_CTG SRIOV_CTG_LINK /* MC_CMD_SET_ID_LED_IN msgrequest */ #define MC_CMD_SET_ID_LED_IN_LEN 4 +/* Set LED state. */ #define MC_CMD_SET_ID_LED_IN_STATE_OFST 0 #define MC_CMD_LED_OFF 0x0 /* enum */ #define MC_CMD_LED_ON 0x1 /* enum */ @@ -3475,13 +5189,19 @@ /***********************************/ -/* MC_CMD_SET_MAC - * Set MAC configuration. +/* MC_CMD_SET_MAC + * Set MAC configuration. Locks required: None. Return code: 0, EINVAL */ -#define MC_CMD_SET_MAC 0x2c +#define MC_CMD_SET_MAC 0x2c +#undef MC_CMD_0x2c_PRIVILEGE_CTG + +#define MC_CMD_0x2c_PRIVILEGE_CTG SRIOV_CTG_LINK /* MC_CMD_SET_MAC_IN msgrequest */ -#define MC_CMD_SET_MAC_IN_LEN 24 +#define MC_CMD_SET_MAC_IN_LEN 28 +/* The MTU is the MTU programmed directly into the XMAC/GMAC (inclusive of + * EtherII, VLAN, bug16011 padding). + */ #define MC_CMD_SET_MAC_IN_MTU_OFST 0 #define MC_CMD_SET_MAC_IN_DRAIN_OFST 4 #define MC_CMD_SET_MAC_IN_ADDR_OFST 8 @@ -3494,23 +5214,43 @@ #define MC_CMD_SET_MAC_IN_REJECT_BRDCST_LBN 1 #define MC_CMD_SET_MAC_IN_REJECT_BRDCST_WIDTH 1 #define MC_CMD_SET_MAC_IN_FCNTL_OFST 20 -/* MC_CMD_FCNTL_OFF 0x0 */ -/* MC_CMD_FCNTL_RESPOND 0x1 */ -/* MC_CMD_FCNTL_BIDIR 0x2 */ -#define MC_CMD_FCNTL_AUTO 0x3 /* enum */ +/* enum: Flow control is off. */ +#define MC_CMD_FCNTL_OFF 0x0 +/* enum: Respond to flow control. */ +#define MC_CMD_FCNTL_RESPOND 0x1 +/* enum: Respond to and Issue flow control. */ +#define MC_CMD_FCNTL_BIDIR 0x2 +/* enum: Auto neg flow control. */ +#define MC_CMD_FCNTL_AUTO 0x3 +/* enum: Priority flow control (eftest builds only). */ +#define MC_CMD_FCNTL_QBB 0x4 +/* enum: Issue flow control. */ +#define MC_CMD_FCNTL_GENERATE 0x5 +#define MC_CMD_SET_MAC_IN_FLAGS_OFST 24 +#define MC_CMD_SET_MAC_IN_FLAG_INCLUDE_FCS_LBN 0 +#define MC_CMD_SET_MAC_IN_FLAG_INCLUDE_FCS_WIDTH 1 /* MC_CMD_SET_MAC_OUT msgresponse */ #define MC_CMD_SET_MAC_OUT_LEN 0 /***********************************/ -/* MC_CMD_PHY_STATS - * Get generic PHY statistics. +/* MC_CMD_PHY_STATS + * Get generic PHY statistics. This call returns the statistics for a generic + * PHY in a sparse array (indexed by the enumerate). Each value is represented + * by a 32bit number. If the DMA_ADDR is 0, then no DMA is performed, and the + * statistics may be read from the message response. If DMA_ADDR != 0, then the + * statistics are dmad to that (page-aligned location). Locks required: None. + * Returns: 0, ETIME */ -#define MC_CMD_PHY_STATS 0x2d +#define MC_CMD_PHY_STATS 0x2d +#undef MC_CMD_0x2d_PRIVILEGE_CTG + +#define MC_CMD_0x2d_PRIVILEGE_CTG SRIOV_CTG_LINK /* MC_CMD_PHY_STATS_IN msgrequest */ #define MC_CMD_PHY_STATS_IN_LEN 8 +/* ??? */ #define MC_CMD_PHY_STATS_IN_DMA_ADDR_OFST 0 #define MC_CMD_PHY_STATS_IN_DMA_ADDR_LEN 8 #define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_OFST 0 @@ -3524,40 +5264,75 @@ #define MC_CMD_PHY_STATS_OUT_NO_DMA_STATISTICS_OFST 0 #define MC_CMD_PHY_STATS_OUT_NO_DMA_STATISTICS_LEN 4 #define MC_CMD_PHY_STATS_OUT_NO_DMA_STATISTICS_NUM MC_CMD_PHY_NSTATS -#define MC_CMD_OUI 0x0 /* enum */ -#define MC_CMD_PMA_PMD_LINK_UP 0x1 /* enum */ -#define MC_CMD_PMA_PMD_RX_FAULT 0x2 /* enum */ -#define MC_CMD_PMA_PMD_TX_FAULT 0x3 /* enum */ -#define MC_CMD_PMA_PMD_SIGNAL 0x4 /* enum */ -#define MC_CMD_PMA_PMD_SNR_A 0x5 /* enum */ -#define MC_CMD_PMA_PMD_SNR_B 0x6 /* enum */ -#define MC_CMD_PMA_PMD_SNR_C 0x7 /* enum */ -#define MC_CMD_PMA_PMD_SNR_D 0x8 /* enum */ -#define MC_CMD_PCS_LINK_UP 0x9 /* enum */ -#define MC_CMD_PCS_RX_FAULT 0xa /* enum */ -#define MC_CMD_PCS_TX_FAULT 0xb /* enum */ -#define MC_CMD_PCS_BER 0xc /* enum */ -#define MC_CMD_PCS_BLOCK_ERRORS 0xd /* enum */ -#define MC_CMD_PHYXS_LINK_UP 0xe /* enum */ -#define MC_CMD_PHYXS_RX_FAULT 0xf /* enum */ -#define MC_CMD_PHYXS_TX_FAULT 0x10 /* enum */ -#define MC_CMD_PHYXS_ALIGN 0x11 /* enum */ -#define MC_CMD_PHYXS_SYNC 0x12 /* enum */ -#define MC_CMD_AN_LINK_UP 0x13 /* enum */ -#define MC_CMD_AN_COMPLETE 0x14 /* enum */ -#define MC_CMD_AN_10GBT_STATUS 0x15 /* enum */ -#define MC_CMD_CL22_LINK_UP 0x16 /* enum */ -#define MC_CMD_PHY_NSTATS 0x17 /* enum */ +/* enum: OUI. */ +#define MC_CMD_OUI 0x0 +/* enum: PMA-PMD Link Up. */ +#define MC_CMD_PMA_PMD_LINK_UP 0x1 +/* enum: PMA-PMD RX Fault. */ +#define MC_CMD_PMA_PMD_RX_FAULT 0x2 +/* enum: PMA-PMD TX Fault. */ +#define MC_CMD_PMA_PMD_TX_FAULT 0x3 +/* enum: PMA-PMD Signal */ +#define MC_CMD_PMA_PMD_SIGNAL 0x4 +/* enum: PMA-PMD SNR A. */ +#define MC_CMD_PMA_PMD_SNR_A 0x5 +/* enum: PMA-PMD SNR B. */ +#define MC_CMD_PMA_PMD_SNR_B 0x6 +/* enum: PMA-PMD SNR C. */ +#define MC_CMD_PMA_PMD_SNR_C 0x7 +/* enum: PMA-PMD SNR D. */ +#define MC_CMD_PMA_PMD_SNR_D 0x8 +/* enum: PCS Link Up. */ +#define MC_CMD_PCS_LINK_UP 0x9 +/* enum: PCS RX Fault. */ +#define MC_CMD_PCS_RX_FAULT 0xa +/* enum: PCS TX Fault. */ +#define MC_CMD_PCS_TX_FAULT 0xb +/* enum: PCS BER. */ +#define MC_CMD_PCS_BER 0xc +/* enum: PCS Block Errors. */ +#define MC_CMD_PCS_BLOCK_ERRORS 0xd +/* enum: PhyXS Link Up. */ +#define MC_CMD_PHYXS_LINK_UP 0xe +/* enum: PhyXS RX Fault. */ +#define MC_CMD_PHYXS_RX_FAULT 0xf +/* enum: PhyXS TX Fault. */ +#define MC_CMD_PHYXS_TX_FAULT 0x10 +/* enum: PhyXS Align. */ +#define MC_CMD_PHYXS_ALIGN 0x11 +/* enum: PhyXS Sync. */ +#define MC_CMD_PHYXS_SYNC 0x12 +/* enum: AN link-up. */ +#define MC_CMD_AN_LINK_UP 0x13 +/* enum: AN Complete. */ +#define MC_CMD_AN_COMPLETE 0x14 +/* enum: AN 10GBaseT Status. */ +#define MC_CMD_AN_10GBT_STATUS 0x15 +/* enum: Clause 22 Link-Up. */ +#define MC_CMD_CL22_LINK_UP 0x16 +/* enum: (Last entry) */ +#define MC_CMD_PHY_NSTATS 0x17 /***********************************/ -/* MC_CMD_MAC_STATS - * Get generic MAC statistics. +/* MC_CMD_MAC_STATS + * Get generic MAC statistics. This call returns unified statistics maintained + * by the MC as it switches between the GMAC and XMAC. The MC will write out + * all supported stats. The driver should zero initialise the buffer to + * guarantee consistent results. If the DMA_ADDR is 0, then no DMA is + * performed, and the statistics may be read from the message response. If + * DMA_ADDR != 0, then the statistics are dmad to that (page-aligned location). + * Locks required: None. The PERIODIC_CLEAR option is not used and now has no + * effect. Returns: 0, ETIME */ -#define MC_CMD_MAC_STATS 0x2e +#define MC_CMD_MAC_STATS 0x2e +#undef MC_CMD_0x2e_PRIVILEGE_CTG + +#define MC_CMD_0x2e_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_MAC_STATS_IN msgrequest */ -#define MC_CMD_MAC_STATS_IN_LEN 16 +#define MC_CMD_MAC_STATS_IN_LEN 20 +/* ??? */ #define MC_CMD_MAC_STATS_IN_DMA_ADDR_OFST 0 #define MC_CMD_MAC_STATS_IN_DMA_ADDR_LEN 8 #define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_OFST 0 @@ -3578,6 +5353,8 @@ #define MC_CMD_MAC_STATS_IN_PERIOD_MS_LBN 16 #define MC_CMD_MAC_STATS_IN_PERIOD_MS_WIDTH 16 #define MC_CMD_MAC_STATS_IN_DMA_LEN_OFST 12 +/* port id so vadapter stats can be provided */ +#define MC_CMD_MAC_STATS_IN_PORT_ID_OFST 16 /* MC_CMD_MAC_STATS_OUT_DMA msgresponse */ #define MC_CMD_MAC_STATS_OUT_DMA_LEN 0 @@ -3590,6 +5367,7 @@ #define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_OFST 4 #define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS #define MC_CMD_MAC_GENERATION_START 0x0 /* enum */ +#define MC_CMD_MAC_DMABUF_START 0x1 /* enum */ #define MC_CMD_MAC_TX_PKTS 0x1 /* enum */ #define MC_CMD_MAC_TX_PAUSE_PKTS 0x2 /* enum */ #define MC_CMD_MAC_TX_CONTROL_PKTS 0x3 /* enum */ @@ -3649,17 +5427,87 @@ #define MC_CMD_MAC_RX_LANES01_DISP_ERR 0x39 /* enum */ #define MC_CMD_MAC_RX_LANES23_DISP_ERR 0x3a /* enum */ #define MC_CMD_MAC_RX_MATCH_FAULT 0x3b /* enum */ -#define MC_CMD_GMAC_DMABUF_START 0x40 /* enum */ -#define MC_CMD_GMAC_DMABUF_END 0x5f /* enum */ +/* enum: PM trunc_bb_overflow counter. Valid for EF10 with PM_AND_RXDP_COUNTERS + * capability only. + */ +#define MC_CMD_MAC_PM_TRUNC_BB_OVERFLOW 0x3c +/* enum: PM discard_bb_overflow counter. Valid for EF10 with + * PM_AND_RXDP_COUNTERS capability only. + */ +#define MC_CMD_MAC_PM_DISCARD_BB_OVERFLOW 0x3d +/* enum: PM trunc_vfifo_full counter. Valid for EF10 with PM_AND_RXDP_COUNTERS + * capability only. + */ +#define MC_CMD_MAC_PM_TRUNC_VFIFO_FULL 0x3e +/* enum: PM discard_vfifo_full counter. Valid for EF10 with + * PM_AND_RXDP_COUNTERS capability only. + */ +#define MC_CMD_MAC_PM_DISCARD_VFIFO_FULL 0x3f +/* enum: PM trunc_qbb counter. Valid for EF10 with PM_AND_RXDP_COUNTERS + * capability only. + */ +#define MC_CMD_MAC_PM_TRUNC_QBB 0x40 +/* enum: PM discard_qbb counter. Valid for EF10 with PM_AND_RXDP_COUNTERS + * capability only. + */ +#define MC_CMD_MAC_PM_DISCARD_QBB 0x41 +/* enum: PM discard_mapping counter. Valid for EF10 with PM_AND_RXDP_COUNTERS + * capability only. + */ +#define MC_CMD_MAC_PM_DISCARD_MAPPING 0x42 +/* enum: RXDP counter: Number of packets dropped due to the queue being + * disabled. Valid for EF10 with PM_AND_RXDP_COUNTERS capability only. + */ +#define MC_CMD_MAC_RXDP_Q_DISABLED_PKTS 0x43 +/* enum: RXDP counter: Number of packets dropped by the DICPU. Valid for EF10 + * with PM_AND_RXDP_COUNTERS capability only. + */ +#define MC_CMD_MAC_RXDP_DI_DROPPED_PKTS 0x45 +/* enum: RXDP counter: Number of non-host packets. Valid for EF10 with + * PM_AND_RXDP_COUNTERS capability only. + */ +#define MC_CMD_MAC_RXDP_STREAMING_PKTS 0x46 +/* enum: RXDP counter: Number of times an hlb descriptor fetch was performed. + * Valid for EF10 with PM_AND_RXDP_COUNTERS capability only. + */ +#define MC_CMD_MAC_RXDP_HLB_FETCH_CONDITIONS 0x47 +/* enum: RXDP counter: Number of times the DPCPU waited for an existing + * descriptor fetch. Valid for EF10 with PM_AND_RXDP_COUNTERS capability only. + */ +#define MC_CMD_MAC_RXDP_HLB_WAIT_CONDITIONS 0x48 +#define MC_CMD_MAC_VADAPTER_RX_DMABUF_START 0x4c /* enum */ +#define MC_CMD_MAC_VADAPTER_RX_UNICAST_PACKETS 0x4c /* enum */ +#define MC_CMD_MAC_VADAPTER_RX_UNICAST_BYTES 0x4d /* enum */ +#define MC_CMD_MAC_VADAPTER_RX_MULTICAST_PACKETS 0x4e /* enum */ +#define MC_CMD_MAC_VADAPTER_RX_MULTICAST_BYTES 0x4f /* enum */ +#define MC_CMD_MAC_VADAPTER_RX_BROADCAST_PACKETS 0x50 /* enum */ +#define MC_CMD_MAC_VADAPTER_RX_BROADCAST_BYTES 0x51 /* enum */ +#define MC_CMD_MAC_VADAPTER_RX_BAD_PACKETS 0x52 /* enum */ +#define MC_CMD_MAC_VADAPTER_RX_BAD_BYTES 0x53 /* enum */ +#define MC_CMD_MAC_VADAPTER_RX_OVERFLOW 0x54 /* enum */ +#define MC_CMD_MAC_VADAPTER_TX_DMABUF_START 0x57 /* enum */ +#define MC_CMD_MAC_VADAPTER_TX_UNICAST_PACKETS 0x57 /* enum */ +#define MC_CMD_MAC_VADAPTER_TX_UNICAST_BYTES 0x58 /* enum */ +#define MC_CMD_MAC_VADAPTER_TX_MULTICAST_PACKETS 0x59 /* enum */ +#define MC_CMD_MAC_VADAPTER_TX_MULTICAST_BYTES 0x5a /* enum */ +#define MC_CMD_MAC_VADAPTER_TX_BROADCAST_PACKETS 0x5b /* enum */ +#define MC_CMD_MAC_VADAPTER_TX_BROADCAST_BYTES 0x5c /* enum */ +#define MC_CMD_MAC_VADAPTER_TX_BAD_PACKETS 0x5d /* enum */ +#define MC_CMD_MAC_VADAPTER_TX_BAD_BYTES 0x5e /* enum */ +#define MC_CMD_MAC_VADAPTER_TX_OVERFLOW 0x5f /* enum */ +/* enum: Start of GMAC stats buffer space, for Siena only. */ +#define MC_CMD_GMAC_DMABUF_START 0x40 +/* enum: End of GMAC stats buffer space, for Siena only. */ +#define MC_CMD_GMAC_DMABUF_END 0x5f #define MC_CMD_MAC_GENERATION_END 0x60 /* enum */ #define MC_CMD_MAC_NSTATS 0x61 /* enum */ /***********************************/ -/* MC_CMD_SRIOV +/* MC_CMD_SRIOV * to be documented */ -#define MC_CMD_SRIOV 0x30 +#define MC_CMD_SRIOV 0x30 /* MC_CMD_SRIOV_IN msgrequest */ #define MC_CMD_SRIOV_IN_LEN 12 @@ -3674,6 +5522,7 @@ /* MC_CMD_MEMCPY_RECORD_TYPEDEF structuredef */ #define MC_CMD_MEMCPY_RECORD_TYPEDEF_LEN 32 +/* this is only used for the first record */ #define MC_CMD_MEMCPY_RECORD_TYPEDEF_NUM_RECORDS_OFST 0 #define MC_CMD_MEMCPY_RECORD_TYPEDEF_NUM_RECORDS_LBN 0 #define MC_CMD_MEMCPY_RECORD_TYPEDEF_NUM_RECORDS_WIDTH 32 @@ -3702,15 +5551,32 @@ /***********************************/ -/* MC_CMD_MEMCPY - * Perform memory copy operation. +/* MC_CMD_MEMCPY + * DMA write data into (Rid,Addr), either by dma reading (Rid,Addr), or by data + * embedded directly in the command. + * + * A common pattern is for a client to use generation counts to signal a dma + * update of a datastructure. To facilitate this, this MCDI operation can + * contain multiple requests which are executed in strict order. Requests take + * the form of duplicating the entire MCDI request continuously (including the + * requests record, which is ignored in all but the first structure) + * + * The source data can either come from a DMA from the host, or it can be + * embedded within the request directly, thereby eliminating a DMA read. To + * indicate this, the client sets FROM_RID=%RID_INLINE, ADDR_HI=0, and + * ADDR_LO=offset, and inserts the data at %offset from the start of the + * payload. It's the callers responsibility to ensure that the embedded data + * doesn't overlap the records. + * + * Returns: 0, EINVAL (invalid RID) */ -#define MC_CMD_MEMCPY 0x31 +#define MC_CMD_MEMCPY 0x31 /* MC_CMD_MEMCPY_IN msgrequest */ #define MC_CMD_MEMCPY_IN_LENMIN 32 #define MC_CMD_MEMCPY_IN_LENMAX 224 #define MC_CMD_MEMCPY_IN_LEN(num) (0+32*(num)) +/* see MC_CMD_MEMCPY_RECORD_TYPEDEF */ #define MC_CMD_MEMCPY_IN_RECORD_OFST 0 #define MC_CMD_MEMCPY_IN_RECORD_LEN 32 #define MC_CMD_MEMCPY_IN_RECORD_MINNUM 1 @@ -3721,24 +5587,35 @@ /***********************************/ -/* MC_CMD_WOL_FILTER_SET +/* MC_CMD_WOL_FILTER_SET * Set a WoL filter. */ -#define MC_CMD_WOL_FILTER_SET 0x32 +#define MC_CMD_WOL_FILTER_SET 0x32 +#undef MC_CMD_0x32_PRIVILEGE_CTG + +#define MC_CMD_0x32_PRIVILEGE_CTG SRIOV_CTG_LINK /* MC_CMD_WOL_FILTER_SET_IN msgrequest */ #define MC_CMD_WOL_FILTER_SET_IN_LEN 192 #define MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_OFST 0 #define MC_CMD_FILTER_MODE_SIMPLE 0x0 /* enum */ #define MC_CMD_FILTER_MODE_STRUCTURED 0xffffffff /* enum */ +/* A type value of 1 is unused. */ #define MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_OFST 4 -#define MC_CMD_WOL_TYPE_MAGIC 0x0 /* enum */ -#define MC_CMD_WOL_TYPE_WIN_MAGIC 0x2 /* enum */ -#define MC_CMD_WOL_TYPE_IPV4_SYN 0x3 /* enum */ -#define MC_CMD_WOL_TYPE_IPV6_SYN 0x4 /* enum */ -#define MC_CMD_WOL_TYPE_BITMAP 0x5 /* enum */ -#define MC_CMD_WOL_TYPE_LINK 0x6 /* enum */ -#define MC_CMD_WOL_TYPE_MAX 0x7 /* enum */ +/* enum: Magic */ +#define MC_CMD_WOL_TYPE_MAGIC 0x0 +/* enum: MS Windows Magic */ +#define MC_CMD_WOL_TYPE_WIN_MAGIC 0x2 +/* enum: IPv4 Syn */ +#define MC_CMD_WOL_TYPE_IPV4_SYN 0x3 +/* enum: IPv6 Syn */ +#define MC_CMD_WOL_TYPE_IPV6_SYN 0x4 +/* enum: Bitmap */ +#define MC_CMD_WOL_TYPE_BITMAP 0x5 +/* enum: Link */ +#define MC_CMD_WOL_TYPE_LINK 0x6 +/* enum: (Above this for future use) */ +#define MC_CMD_WOL_TYPE_MAX 0x7 #define MC_CMD_WOL_FILTER_SET_IN_DATA_OFST 8 #define MC_CMD_WOL_FILTER_SET_IN_DATA_LEN 4 #define MC_CMD_WOL_FILTER_SET_IN_DATA_NUM 46 @@ -3807,10 +5684,13 @@ /***********************************/ -/* MC_CMD_WOL_FILTER_REMOVE - * Remove a WoL filter. +/* MC_CMD_WOL_FILTER_REMOVE + * Remove a WoL filter. Locks required: None. Returns: 0, EINVAL, ENOSYS */ -#define MC_CMD_WOL_FILTER_REMOVE 0x33 +#define MC_CMD_WOL_FILTER_REMOVE 0x33 +#undef MC_CMD_0x33_PRIVILEGE_CTG + +#define MC_CMD_0x33_PRIVILEGE_CTG SRIOV_CTG_LINK /* MC_CMD_WOL_FILTER_REMOVE_IN msgrequest */ #define MC_CMD_WOL_FILTER_REMOVE_IN_LEN 4 @@ -3821,10 +5701,14 @@ /***********************************/ -/* MC_CMD_WOL_FILTER_RESET - * Reset (i.e. remove all) WoL filters. +/* MC_CMD_WOL_FILTER_RESET + * Reset (i.e. remove all) WoL filters. Locks required: None. Returns: 0, + * ENOSYS */ -#define MC_CMD_WOL_FILTER_RESET 0x34 +#define MC_CMD_WOL_FILTER_RESET 0x34 +#undef MC_CMD_0x34_PRIVILEGE_CTG + +#define MC_CMD_0x34_PRIVILEGE_CTG SRIOV_CTG_LINK /* MC_CMD_WOL_FILTER_RESET_IN msgrequest */ #define MC_CMD_WOL_FILTER_RESET_IN_LEN 4 @@ -3837,10 +5721,10 @@ /***********************************/ -/* MC_CMD_SET_MCAST_HASH - * Set the MCASH hash value. +/* MC_CMD_SET_MCAST_HASH + * Set the MCAST hash value without otherwise reconfiguring the MAC */ -#define MC_CMD_SET_MCAST_HASH 0x35 +#define MC_CMD_SET_MCAST_HASH 0x35 /* MC_CMD_SET_MCAST_HASH_IN msgrequest */ #define MC_CMD_SET_MCAST_HASH_IN_LEN 32 @@ -3854,45 +5738,75 @@ /***********************************/ -/* MC_CMD_NVRAM_TYPES - * Get virtual NVRAM partitions information. +/* MC_CMD_NVRAM_TYPES + * Return bitfield indicating available types of virtual NVRAM partitions. + * Locks required: none. Returns: 0 */ -#define MC_CMD_NVRAM_TYPES 0x36 +#define MC_CMD_NVRAM_TYPES 0x36 +#undef MC_CMD_0x36_PRIVILEGE_CTG + +#define MC_CMD_0x36_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_NVRAM_TYPES_IN msgrequest */ #define MC_CMD_NVRAM_TYPES_IN_LEN 0 /* MC_CMD_NVRAM_TYPES_OUT msgresponse */ #define MC_CMD_NVRAM_TYPES_OUT_LEN 4 +/* Bit mask of supported types. */ #define MC_CMD_NVRAM_TYPES_OUT_TYPES_OFST 0 -#define MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO 0x0 /* enum */ -#define MC_CMD_NVRAM_TYPE_MC_FW 0x1 /* enum */ -#define MC_CMD_NVRAM_TYPE_MC_FW_BACKUP 0x2 /* enum */ -#define MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT0 0x3 /* enum */ -#define MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT1 0x4 /* enum */ -#define MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 0x5 /* enum */ -#define MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1 0x6 /* enum */ -#define MC_CMD_NVRAM_TYPE_EXP_ROM 0x7 /* enum */ -#define MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0 0x8 /* enum */ -#define MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1 0x9 /* enum */ -#define MC_CMD_NVRAM_TYPE_PHY_PORT0 0xa /* enum */ -#define MC_CMD_NVRAM_TYPE_PHY_PORT1 0xb /* enum */ -#define MC_CMD_NVRAM_TYPE_LOG 0xc /* enum */ -#define MC_CMD_NVRAM_TYPE_FPGA 0xd /* enum */ -#define MC_CMD_NVRAM_TYPE_FPGA_BACKUP 0xe /* enum */ -#define MC_CMD_NVRAM_TYPE_FC_FW 0xf /* enum */ -#define MC_CMD_NVRAM_TYPE_FC_FW_BACKUP 0x10 /* enum */ -#define MC_CMD_NVRAM_TYPE_CPLD 0x11 /* enum */ -#define MC_CMD_NVRAM_TYPE_LICENSE 0x12 /* enum */ -#define MC_CMD_NVRAM_TYPE_FC_LOG 0x13 /* enum */ -#define MC_CMD_NVRAM_TYPE_FC_EXTRA 0x14 /* enum */ +/* enum: Disabled callisto. */ +#define MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO 0x0 +/* enum: MC firmware. */ +#define MC_CMD_NVRAM_TYPE_MC_FW 0x1 +/* enum: MC backup firmware. */ +#define MC_CMD_NVRAM_TYPE_MC_FW_BACKUP 0x2 +/* enum: Static configuration Port0. */ +#define MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT0 0x3 +/* enum: Static configuration Port1. */ +#define MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT1 0x4 +/* enum: Dynamic configuration Port0. */ +#define MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 0x5 +/* enum: Dynamic configuration Port1. */ +#define MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1 0x6 +/* enum: Expansion Rom. */ +#define MC_CMD_NVRAM_TYPE_EXP_ROM 0x7 +/* enum: Expansion Rom Configuration Port0. */ +#define MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0 0x8 +/* enum: Expansion Rom Configuration Port1. */ +#define MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1 0x9 +/* enum: Phy Configuration Port0. */ +#define MC_CMD_NVRAM_TYPE_PHY_PORT0 0xa +/* enum: Phy Configuration Port1. */ +#define MC_CMD_NVRAM_TYPE_PHY_PORT1 0xb +/* enum: Log. */ +#define MC_CMD_NVRAM_TYPE_LOG 0xc +/* enum: FPGA image. */ +#define MC_CMD_NVRAM_TYPE_FPGA 0xd +/* enum: FPGA backup image */ +#define MC_CMD_NVRAM_TYPE_FPGA_BACKUP 0xe +/* enum: FC firmware. */ +#define MC_CMD_NVRAM_TYPE_FC_FW 0xf +/* enum: FC backup firmware. */ +#define MC_CMD_NVRAM_TYPE_FC_FW_BACKUP 0x10 +/* enum: CPLD image. */ +#define MC_CMD_NVRAM_TYPE_CPLD 0x11 +/* enum: Licensing information. */ +#define MC_CMD_NVRAM_TYPE_LICENSE 0x12 +/* enum: FC Log. */ +#define MC_CMD_NVRAM_TYPE_FC_LOG 0x13 +/* enum: Additional flash on FPGA. */ +#define MC_CMD_NVRAM_TYPE_FC_EXTRA 0x14 /***********************************/ -/* MC_CMD_NVRAM_INFO - * Read info about a virtual NVRAM partition. +/* MC_CMD_NVRAM_INFO + * Read info about a virtual NVRAM partition. Locks required: none. Returns: 0, + * EINVAL (bad type). */ -#define MC_CMD_NVRAM_INFO 0x37 +#define MC_CMD_NVRAM_INFO 0x37 +#undef MC_CMD_0x37_PRIVILEGE_CTG + +#define MC_CMD_0x37_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_NVRAM_INFO_IN msgrequest */ #define MC_CMD_NVRAM_INFO_IN_LEN 4 @@ -3910,15 +5824,24 @@ #define MC_CMD_NVRAM_INFO_OUT_FLAGS_OFST 12 #define MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN 0 #define MC_CMD_NVRAM_INFO_OUT_PROTECTED_WIDTH 1 +#define MC_CMD_NVRAM_INFO_OUT_TLV_LBN 1 +#define MC_CMD_NVRAM_INFO_OUT_TLV_WIDTH 1 +#define MC_CMD_NVRAM_INFO_OUT_A_B_LBN 7 +#define MC_CMD_NVRAM_INFO_OUT_A_B_WIDTH 1 #define MC_CMD_NVRAM_INFO_OUT_PHYSDEV_OFST 16 #define MC_CMD_NVRAM_INFO_OUT_PHYSADDR_OFST 20 /***********************************/ -/* MC_CMD_NVRAM_UPDATE_START - * Start a group of update operations on a virtual NVRAM partition. +/* MC_CMD_NVRAM_UPDATE_START + * Start a group of update operations on a virtual NVRAM partition. Locks + * required: PHY_LOCK if type==*PHY*. Returns: 0, EINVAL (bad type), EACCES (if + * PHY_LOCK required and not held). */ -#define MC_CMD_NVRAM_UPDATE_START 0x38 +#define MC_CMD_NVRAM_UPDATE_START 0x38 +#undef MC_CMD_0x38_PRIVILEGE_CTG + +#define MC_CMD_0x38_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_NVRAM_UPDATE_START_IN msgrequest */ #define MC_CMD_NVRAM_UPDATE_START_IN_LEN 4 @@ -3931,10 +5854,15 @@ /***********************************/ -/* MC_CMD_NVRAM_READ - * Read data from a virtual NVRAM partition. +/* MC_CMD_NVRAM_READ + * Read data from a virtual NVRAM partition. Locks required: PHY_LOCK if + * type==*PHY*. Returns: 0, EINVAL (bad type/offset/length), EACCES (if + * PHY_LOCK required and not held) */ -#define MC_CMD_NVRAM_READ 0x39 +#define MC_CMD_NVRAM_READ 0x39 +#undef MC_CMD_0x39_PRIVILEGE_CTG + +#define MC_CMD_0x39_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_NVRAM_READ_IN msgrequest */ #define MC_CMD_NVRAM_READ_IN_LEN 12 @@ -3942,6 +5870,7 @@ /* Enum values, see field(s): */ /* MC_CMD_NVRAM_TYPES/MC_CMD_NVRAM_TYPES_OUT/TYPES */ #define MC_CMD_NVRAM_READ_IN_OFFSET_OFST 4 +/* amount to read in bytes */ #define MC_CMD_NVRAM_READ_IN_LENGTH_OFST 8 /* MC_CMD_NVRAM_READ_OUT msgresponse */ @@ -3955,10 +5884,15 @@ /***********************************/ -/* MC_CMD_NVRAM_WRITE - * Write data to a virtual NVRAM partition. +/* MC_CMD_NVRAM_WRITE + * Write data to a virtual NVRAM partition. Locks required: PHY_LOCK if + * type==*PHY*. Returns: 0, EINVAL (bad type/offset/length), EACCES (if + * PHY_LOCK required and not held) */ -#define MC_CMD_NVRAM_WRITE 0x3a +#define MC_CMD_NVRAM_WRITE 0x3a +#undef MC_CMD_0x3a_PRIVILEGE_CTG + +#define MC_CMD_0x3a_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_NVRAM_WRITE_IN msgrequest */ #define MC_CMD_NVRAM_WRITE_IN_LENMIN 13 @@ -3979,10 +5913,15 @@ /***********************************/ -/* MC_CMD_NVRAM_ERASE - * Erase sector(s) from a virtual NVRAM partition. +/* MC_CMD_NVRAM_ERASE + * Erase sector(s) from a virtual NVRAM partition. Locks required: PHY_LOCK if + * type==*PHY*. Returns: 0, EINVAL (bad type/offset/length), EACCES (if + * PHY_LOCK required and not held) */ -#define MC_CMD_NVRAM_ERASE 0x3b +#define MC_CMD_NVRAM_ERASE 0x3b +#undef MC_CMD_0x3b_PRIVILEGE_CTG + +#define MC_CMD_0x3b_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_NVRAM_ERASE_IN msgrequest */ #define MC_CMD_NVRAM_ERASE_IN_LEN 12 @@ -3997,10 +5936,15 @@ /***********************************/ -/* MC_CMD_NVRAM_UPDATE_FINISH - * Finish a group of update operations on a virtual NVRAM partition. +/* MC_CMD_NVRAM_UPDATE_FINISH + * Finish a group of update operations on a virtual NVRAM partition. Locks + * required: PHY_LOCK if type==*PHY*. Returns: 0, EINVAL (bad + * type/offset/length), EACCES (if PHY_LOCK required and not held) */ -#define MC_CMD_NVRAM_UPDATE_FINISH 0x3c +#define MC_CMD_NVRAM_UPDATE_FINISH 0x3c +#undef MC_CMD_0x3c_PRIVILEGE_CTG + +#define MC_CMD_0x3c_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_NVRAM_UPDATE_FINISH_IN msgrequest */ #define MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN 8 @@ -4014,10 +5958,27 @@ /***********************************/ -/* MC_CMD_REBOOT +/* MC_CMD_REBOOT * Reboot the MC. + * + * The AFTER_ASSERTION flag is intended to be used when the driver notices an + * assertion failure (at which point it is expected to perform a complete tear + * down and reinitialise), to allow both ports to reset the MC once in an + * atomic fashion. + * + * Production mc firmwares are generally compiled with REBOOT_ON_ASSERT=1, + * which means that they will automatically reboot out of the assertion + * handler, so this is in practise an optional operation. It is still + * recommended that drivers execute this to support custom firmwares with + * REBOOT_ON_ASSERT=0. + * + * Locks required: NONE Returns: Nothing. You get back a response with ERR=1, + * DATALEN=0 */ -#define MC_CMD_REBOOT 0x3d +#define MC_CMD_REBOOT 0x3d +#undef MC_CMD_0x3d_PRIVILEGE_CTG + +#define MC_CMD_0x3d_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_REBOOT_IN msgrequest */ #define MC_CMD_REBOOT_IN_LEN 4 @@ -4029,10 +5990,15 @@ /***********************************/ -/* MC_CMD_SCHEDINFO - * Request scheduler info. +/* MC_CMD_SCHEDINFO + * Request scheduler info. Locks required: NONE. Returns: An array of + * (timeslice,maximum overrun), one for each thread, in ascending order of + * thread address. */ -#define MC_CMD_SCHEDINFO 0x3e +#define MC_CMD_SCHEDINFO 0x3e +#undef MC_CMD_0x3e_PRIVILEGE_CTG + +#define MC_CMD_0x3e_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_SCHEDINFO_IN msgrequest */ #define MC_CMD_SCHEDINFO_IN_LEN 0 @@ -4048,15 +6014,28 @@ /***********************************/ -/* MC_CMD_REBOOT_MODE +/* MC_CMD_REBOOT_MODE + * Set the mode for the next MC reboot. Locks required: NONE. Sets the reboot + * mode to the specified value. Returns the old mode. */ -#define MC_CMD_REBOOT_MODE 0x3f +#define MC_CMD_REBOOT_MODE 0x3f +#undef MC_CMD_0x3f_PRIVILEGE_CTG + +#define MC_CMD_0x3f_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_REBOOT_MODE_IN msgrequest */ #define MC_CMD_REBOOT_MODE_IN_LEN 4 #define MC_CMD_REBOOT_MODE_IN_VALUE_OFST 0 -#define MC_CMD_REBOOT_MODE_NORMAL 0x0 /* enum */ -#define MC_CMD_REBOOT_MODE_SNAPPER 0x3 /* enum */ +/* enum: Normal. */ +#define MC_CMD_REBOOT_MODE_NORMAL 0x0 +/* enum: Power-on Reset. */ +#define MC_CMD_REBOOT_MODE_POR 0x2 +/* enum: Snapper. */ +#define MC_CMD_REBOOT_MODE_SNAPPER 0x3 +/* enum: snapper fake POR */ +#define MC_CMD_REBOOT_MODE_SNAPPER_POR 0x4 +#define MC_CMD_REBOOT_MODE_IN_FAKE_LBN 7 +#define MC_CMD_REBOOT_MODE_IN_FAKE_WIDTH 1 /* MC_CMD_REBOOT_MODE_OUT msgresponse */ #define MC_CMD_REBOOT_MODE_OUT_LEN 4 @@ -4064,54 +6043,238 @@ /***********************************/ -/* MC_CMD_SENSOR_INFO +/* MC_CMD_SENSOR_INFO * Returns information about every available sensor. + * + * Each sensor has a single (16bit) value, and a corresponding state. The + * mapping between value and state is nominally determined by the MC, but may + * be implemented using up to 2 ranges per sensor. + * + * This call returns a mask (32bit) of the sensors that are supported by this + * platform, then an array of sensor information structures, in order of sensor + * type (but without gaps for unimplemented sensors). Each structure defines + * the ranges for the corresponding sensor. An unused range is indicated by + * equal limit values. If one range is used, a value outside that range results + * in STATE_FATAL. If two ranges are used, a value outside the second range + * results in STATE_FATAL while a value outside the first and inside the second + * range results in STATE_WARNING. + * + * Sensor masks and sensor information arrays are organised into pages. For + * backward compatibility, older host software can only use sensors in page 0. + * Bit 32 in the sensor mask was previously unused, and is no reserved for use + * as the next page flag. + * + * If the request does not contain a PAGE value then firmware will only return + * page 0 of sensor information, with bit 31 in the sensor mask cleared. + * + * If the request contains a PAGE value then firmware responds with the sensor + * mask and sensor information array for that page of sensors. In this case bit + * 31 in the mask is set if another page exists. + * + * Locks required: None Returns: 0 */ -#define MC_CMD_SENSOR_INFO 0x41 +#define MC_CMD_SENSOR_INFO 0x41 +#undef MC_CMD_0x41_PRIVILEGE_CTG + +#define MC_CMD_0x41_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_SENSOR_INFO_IN msgrequest */ #define MC_CMD_SENSOR_INFO_IN_LEN 0 +/* MC_CMD_SENSOR_INFO_EXT_IN msgrequest */ +#define MC_CMD_SENSOR_INFO_EXT_IN_LEN 4 +/* Which page of sensors to report. + * + * Page 0 contains sensors 0 to 30 (sensor 31 is the next page bit). + * + * Page 1 contains sensors 32 to 62 (sensor 63 is the next page bit). etc. + */ +#define MC_CMD_SENSOR_INFO_EXT_IN_PAGE_OFST 0 + /* MC_CMD_SENSOR_INFO_OUT msgresponse */ -#define MC_CMD_SENSOR_INFO_OUT_LENMIN 12 +#define MC_CMD_SENSOR_INFO_OUT_LENMIN 4 #define MC_CMD_SENSOR_INFO_OUT_LENMAX 252 #define MC_CMD_SENSOR_INFO_OUT_LEN(num) (4+8*(num)) #define MC_CMD_SENSOR_INFO_OUT_MASK_OFST 0 -#define MC_CMD_SENSOR_CONTROLLER_TEMP 0x0 /* enum */ -#define MC_CMD_SENSOR_PHY_COMMON_TEMP 0x1 /* enum */ -#define MC_CMD_SENSOR_CONTROLLER_COOLING 0x2 /* enum */ -#define MC_CMD_SENSOR_PHY0_TEMP 0x3 /* enum */ -#define MC_CMD_SENSOR_PHY0_COOLING 0x4 /* enum */ -#define MC_CMD_SENSOR_PHY1_TEMP 0x5 /* enum */ -#define MC_CMD_SENSOR_PHY1_COOLING 0x6 /* enum */ -#define MC_CMD_SENSOR_IN_1V0 0x7 /* enum */ -#define MC_CMD_SENSOR_IN_1V2 0x8 /* enum */ -#define MC_CMD_SENSOR_IN_1V8 0x9 /* enum */ -#define MC_CMD_SENSOR_IN_2V5 0xa /* enum */ -#define MC_CMD_SENSOR_IN_3V3 0xb /* enum */ -#define MC_CMD_SENSOR_IN_12V0 0xc /* enum */ -#define MC_CMD_SENSOR_IN_1V2A 0xd /* enum */ -#define MC_CMD_SENSOR_IN_VREF 0xe /* enum */ -#define MC_CMD_SENSOR_OUT_VAOE 0xf /* enum */ -#define MC_CMD_SENSOR_AOE_TEMP 0x10 /* enum */ -#define MC_CMD_SENSOR_PSU_AOE_TEMP 0x11 /* enum */ -#define MC_CMD_SENSOR_PSU_TEMP 0x12 /* enum */ -#define MC_CMD_SENSOR_FAN_0 0x13 /* enum */ -#define MC_CMD_SENSOR_FAN_1 0x14 /* enum */ -#define MC_CMD_SENSOR_FAN_2 0x15 /* enum */ -#define MC_CMD_SENSOR_FAN_3 0x16 /* enum */ -#define MC_CMD_SENSOR_FAN_4 0x17 /* enum */ -#define MC_CMD_SENSOR_IN_VAOE 0x18 /* enum */ -#define MC_CMD_SENSOR_OUT_IAOE 0x19 /* enum */ -#define MC_CMD_SENSOR_IN_IAOE 0x1a /* enum */ -#define MC_CMD_SENSOR_NIC_POWER 0x1b /* enum */ +/* enum: Controller temperature: degC */ +#define MC_CMD_SENSOR_CONTROLLER_TEMP 0x0 +/* enum: Phy common temperature: degC */ +#define MC_CMD_SENSOR_PHY_COMMON_TEMP 0x1 +/* enum: Controller cooling: bool */ +#define MC_CMD_SENSOR_CONTROLLER_COOLING 0x2 +/* enum: Phy 0 temperature: degC */ +#define MC_CMD_SENSOR_PHY0_TEMP 0x3 +/* enum: Phy 0 cooling: bool */ +#define MC_CMD_SENSOR_PHY0_COOLING 0x4 +/* enum: Phy 1 temperature: degC */ +#define MC_CMD_SENSOR_PHY1_TEMP 0x5 +/* enum: Phy 1 cooling: bool */ +#define MC_CMD_SENSOR_PHY1_COOLING 0x6 +/* enum: 1.0v power: mV */ +#define MC_CMD_SENSOR_IN_1V0 0x7 +/* enum: 1.2v power: mV */ +#define MC_CMD_SENSOR_IN_1V2 0x8 +/* enum: 1.8v power: mV */ +#define MC_CMD_SENSOR_IN_1V8 0x9 +/* enum: 2.5v power: mV */ +#define MC_CMD_SENSOR_IN_2V5 0xa +/* enum: 3.3v power: mV */ +#define MC_CMD_SENSOR_IN_3V3 0xb +/* enum: 12v power: mV */ +#define MC_CMD_SENSOR_IN_12V0 0xc +/* enum: 1.2v analogue power: mV */ +#define MC_CMD_SENSOR_IN_1V2A 0xd +/* enum: reference voltage: mV */ +#define MC_CMD_SENSOR_IN_VREF 0xe +/* enum: AOE FPGA power: mV */ +#define MC_CMD_SENSOR_OUT_VAOE 0xf +/* enum: AOE FPGA temperature: degC */ +#define MC_CMD_SENSOR_AOE_TEMP 0x10 +/* enum: AOE FPGA PSU temperature: degC */ +#define MC_CMD_SENSOR_PSU_AOE_TEMP 0x11 +/* enum: AOE PSU temperature: degC */ +#define MC_CMD_SENSOR_PSU_TEMP 0x12 +/* enum: Fan 0 speed: RPM */ +#define MC_CMD_SENSOR_FAN_0 0x13 +/* enum: Fan 1 speed: RPM */ +#define MC_CMD_SENSOR_FAN_1 0x14 +/* enum: Fan 2 speed: RPM */ +#define MC_CMD_SENSOR_FAN_2 0x15 +/* enum: Fan 3 speed: RPM */ +#define MC_CMD_SENSOR_FAN_3 0x16 +/* enum: Fan 4 speed: RPM */ +#define MC_CMD_SENSOR_FAN_4 0x17 +/* enum: AOE FPGA input power: mV */ +#define MC_CMD_SENSOR_IN_VAOE 0x18 +/* enum: AOE FPGA current: mA */ +#define MC_CMD_SENSOR_OUT_IAOE 0x19 +/* enum: AOE FPGA input current: mA */ +#define MC_CMD_SENSOR_IN_IAOE 0x1a +/* enum: NIC power consumption: W */ +#define MC_CMD_SENSOR_NIC_POWER 0x1b +/* enum: 0.9v power voltage: mV */ +#define MC_CMD_SENSOR_IN_0V9 0x1c +/* enum: 0.9v power current: mA */ +#define MC_CMD_SENSOR_IN_I0V9 0x1d +/* enum: 1.2v power current: mA */ +#define MC_CMD_SENSOR_IN_I1V2 0x1e +/* enum: Not a sensor: reserved for the next page flag */ +#define MC_CMD_SENSOR_PAGE0_NEXT 0x1f +/* enum: 0.9v power voltage (at ADC): mV */ +#define MC_CMD_SENSOR_IN_0V9_ADC 0x20 +/* enum: Controller temperature 2: degC */ +#define MC_CMD_SENSOR_CONTROLLER_2_TEMP 0x21 +/* enum: Voltage regulator internal temperature: degC */ +#define MC_CMD_SENSOR_VREG_INTERNAL_TEMP 0x22 +/* enum: 0.9V voltage regulator temperature: degC */ +#define MC_CMD_SENSOR_VREG_0V9_TEMP 0x23 +/* enum: 1.2V voltage regulator temperature: degC */ +#define MC_CMD_SENSOR_VREG_1V2_TEMP 0x24 +/* enum: controller internal temperature sensor voltage (internal ADC): mV */ +#define MC_CMD_SENSOR_CONTROLLER_VPTAT 0x25 +/* enum: controller internal temperature (internal ADC): degC */ +#define MC_CMD_SENSOR_CONTROLLER_INTERNAL_TEMP 0x26 +/* enum: controller internal temperature sensor voltage (external ADC): mV */ +#define MC_CMD_SENSOR_CONTROLLER_VPTAT_EXTADC 0x27 +/* enum: controller internal temperature (external ADC): degC */ +#define MC_CMD_SENSOR_CONTROLLER_INTERNAL_TEMP_EXTADC 0x28 +/* enum: ambient temperature: degC */ +#define MC_CMD_SENSOR_AMBIENT_TEMP 0x29 +/* enum: air flow: bool */ +#define MC_CMD_SENSOR_AIRFLOW 0x2a +/* enum: voltage between VSS08D and VSS08D at CSR: mV */ +#define MC_CMD_SENSOR_VDD08D_VSS08D_CSR 0x2b +/* enum: voltage between VSS08D and VSS08D at CSR (external ADC): mV */ +#define MC_CMD_SENSOR_VDD08D_VSS08D_CSR_EXTADC 0x2c +/* enum: Hotpoint temperature: degC */ +#define MC_CMD_SENSOR_HOTPOINT_TEMP 0x2d +/* enum: Port 0 PHY power switch over-current: bool */ +#define MC_CMD_SENSOR_PHY_POWER_PORT0 0x2e +/* enum: Port 1 PHY power switch over-current: bool */ +#define MC_CMD_SENSOR_PHY_POWER_PORT1 0x2f +/* enum: Mop-up microcontroller reference voltage (millivolts) */ +#define MC_CMD_SENSOR_MUM_VCC 0x30 +/* enum: 0.9v power phase A voltage: mV */ +#define MC_CMD_SENSOR_IN_0V9_A 0x31 +/* enum: 0.9v power phase A current: mA */ +#define MC_CMD_SENSOR_IN_I0V9_A 0x32 +/* enum: 0.9V voltage regulator phase A temperature: degC */ +#define MC_CMD_SENSOR_VREG_0V9_A_TEMP 0x33 +/* enum: 0.9v power phase B voltage: mV */ +#define MC_CMD_SENSOR_IN_0V9_B 0x34 +/* enum: 0.9v power phase B current: mA */ +#define MC_CMD_SENSOR_IN_I0V9_B 0x35 +/* enum: 0.9V voltage regulator phase B temperature: degC */ +#define MC_CMD_SENSOR_VREG_0V9_B_TEMP 0x36 +/* enum: CCOM AVREG 1v2 supply (interval ADC): mV */ +#define MC_CMD_SENSOR_CCOM_AVREG_1V2_SUPPLY 0x37 +/* enum: CCOM AVREG 1v2 supply (external ADC): mV */ +#define MC_CMD_SENSOR_CCOM_AVREG_1V2_SUPPLY_EXTADC 0x38 +/* enum: CCOM AVREG 1v8 supply (interval ADC): mV */ +#define MC_CMD_SENSOR_CCOM_AVREG_1V8_SUPPLY 0x39 +/* enum: CCOM AVREG 1v8 supply (external ADC): mV */ +#define MC_CMD_SENSOR_CCOM_AVREG_1V8_SUPPLY_EXTADC 0x3a +/* enum: Not a sensor: reserved for the next page flag */ +#define MC_CMD_SENSOR_PAGE1_NEXT 0x3f +/* enum: controller internal temperature sensor voltage on master core + * (internal ADC): mV + */ +#define MC_CMD_SENSOR_CONTROLLER_MASTER_VPTAT 0x40 +/* enum: controller internal temperature on master core (internal ADC): degC */ +#define MC_CMD_SENSOR_CONTROLLER_MASTER_INTERNAL_TEMP 0x41 +/* enum: controller internal temperature sensor voltage on master core + * (external ADC): mV + */ +#define MC_CMD_SENSOR_CONTROLLER_MASTER_VPTAT_EXTADC 0x42 +/* enum: controller internal temperature on master core (external ADC): degC */ +#define MC_CMD_SENSOR_CONTROLLER_MASTER_INTERNAL_TEMP_EXTADC 0x43 +/* enum: controller internal temperature on slave core sensor voltage (internal + * ADC): mV + */ +#define MC_CMD_SENSOR_CONTROLLER_SLAVE_VPTAT 0x44 +/* enum: controller internal temperature on slave core (internal ADC): degC */ +#define MC_CMD_SENSOR_CONTROLLER_SLAVE_INTERNAL_TEMP 0x45 +/* enum: controller internal temperature on slave core sensor voltage (external + * ADC): mV + */ +#define MC_CMD_SENSOR_CONTROLLER_SLAVE_VPTAT_EXTADC 0x46 +/* enum: controller internal temperature on slave core (external ADC): degC */ +#define MC_CMD_SENSOR_CONTROLLER_SLAVE_INTERNAL_TEMP_EXTADC 0x47 +/* enum: Voltage supplied to the SODIMMs from their power supply: mV */ +#define MC_CMD_SENSOR_SODIMM_VOUT 0x49 +/* enum: Temperature of SODIMM 0 (if installed): degC */ +#define MC_CMD_SENSOR_SODIMM_0_TEMP 0x4a +/* enum: Temperature of SODIMM 1 (if installed): degC */ +#define MC_CMD_SENSOR_SODIMM_1_TEMP 0x4b +/* enum: Voltage supplied to the QSFP #0 from their power supply: mV */ +#define MC_CMD_SENSOR_PHY0_VCC 0x4c +/* enum: Voltage supplied to the QSFP #1 from their power supply: mV */ +#define MC_CMD_SENSOR_PHY1_VCC 0x4d +/* MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF */ #define MC_CMD_SENSOR_ENTRY_OFST 4 #define MC_CMD_SENSOR_ENTRY_LEN 8 #define MC_CMD_SENSOR_ENTRY_LO_OFST 4 #define MC_CMD_SENSOR_ENTRY_HI_OFST 8 -#define MC_CMD_SENSOR_ENTRY_MINNUM 1 +#define MC_CMD_SENSOR_ENTRY_MINNUM 0 #define MC_CMD_SENSOR_ENTRY_MAXNUM 31 +/* MC_CMD_SENSOR_INFO_EXT_OUT msgresponse */ +#define MC_CMD_SENSOR_INFO_EXT_OUT_LENMIN 4 +#define MC_CMD_SENSOR_INFO_EXT_OUT_LENMAX 252 +#define MC_CMD_SENSOR_INFO_EXT_OUT_LEN(num) (4+8*(num)) +#define MC_CMD_SENSOR_INFO_EXT_OUT_MASK_OFST 0 +/* Enum values, see field(s): */ +/* MC_CMD_SENSOR_INFO_OUT */ +#define MC_CMD_SENSOR_INFO_EXT_OUT_NEXT_PAGE_LBN 31 +#define MC_CMD_SENSOR_INFO_EXT_OUT_NEXT_PAGE_WIDTH 1 +/* MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF */ +/* MC_CMD_SENSOR_ENTRY_OFST 4 */ +/* MC_CMD_SENSOR_ENTRY_LEN 8 */ +/* MC_CMD_SENSOR_ENTRY_LO_OFST 4 */ +/* MC_CMD_SENSOR_ENTRY_HI_OFST 8 */ +/* MC_CMD_SENSOR_ENTRY_MINNUM 0 */ +/* MC_CMD_SENSOR_ENTRY_MAXNUM 31 */ + /* MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF structuredef */ #define MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_LEN 8 #define MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_MIN1_OFST 0 @@ -4133,42 +6296,91 @@ /***********************************/ -/* MC_CMD_READ_SENSORS - * Returns the current reading from each sensor. +/* MC_CMD_READ_SENSORS + * Returns the current reading from each sensor. DMAs an array of sensor + * readings, in order of sensor type (but without gaps for unimplemented + * sensors), into host memory. Each array element is a + * MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF dword. + * + * If the request does not contain the LENGTH field then only sensors 0 to 30 + * are reported, to avoid DMA buffer overflow in older host software. If the + * sensor reading require more space than the LENGTH allows, then return + * EINVAL. + * + * The MC will send a SENSOREVT event every time any sensor changes state. The + * driver is responsible for ensuring that it doesn't miss any events. The + * board will function normally if all sensors are in STATE_OK or + * STATE_WARNING. Otherwise the board should not be expected to function. */ -#define MC_CMD_READ_SENSORS 0x42 +#define MC_CMD_READ_SENSORS 0x42 +#undef MC_CMD_0x42_PRIVILEGE_CTG + +#define MC_CMD_0x42_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_READ_SENSORS_IN msgrequest */ #define MC_CMD_READ_SENSORS_IN_LEN 8 +/* DMA address of host buffer for sensor readings (must be 4Kbyte aligned). */ #define MC_CMD_READ_SENSORS_IN_DMA_ADDR_OFST 0 #define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LEN 8 #define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_OFST 0 #define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_OFST 4 +/* MC_CMD_READ_SENSORS_EXT_IN msgrequest */ +#define MC_CMD_READ_SENSORS_EXT_IN_LEN 12 +/* DMA address of host buffer for sensor readings */ +#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_OFST 0 +#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LEN 8 +#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_OFST 0 +#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_OFST 4 +/* Size in bytes of host buffer. */ +#define MC_CMD_READ_SENSORS_EXT_IN_LENGTH_OFST 8 + /* MC_CMD_READ_SENSORS_OUT msgresponse */ #define MC_CMD_READ_SENSORS_OUT_LEN 0 +/* MC_CMD_READ_SENSORS_EXT_OUT msgresponse */ +#define MC_CMD_READ_SENSORS_EXT_OUT_LEN 0 + /* MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF structuredef */ -#define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_LEN 3 +#define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_LEN 4 #define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_VALUE_OFST 0 #define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_VALUE_LEN 2 #define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_VALUE_LBN 0 #define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_VALUE_WIDTH 16 #define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_STATE_OFST 2 #define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_STATE_LEN 1 -#define MC_CMD_SENSOR_STATE_OK 0x0 /* enum */ -#define MC_CMD_SENSOR_STATE_WARNING 0x1 /* enum */ -#define MC_CMD_SENSOR_STATE_FATAL 0x2 /* enum */ -#define MC_CMD_SENSOR_STATE_BROKEN 0x3 /* enum */ +/* enum: Ok. */ +#define MC_CMD_SENSOR_STATE_OK 0x0 +/* enum: Breached warning threshold. */ +#define MC_CMD_SENSOR_STATE_WARNING 0x1 +/* enum: Breached fatal threshold. */ +#define MC_CMD_SENSOR_STATE_FATAL 0x2 +/* enum: Fault with sensor. */ +#define MC_CMD_SENSOR_STATE_BROKEN 0x3 +/* enum: Sensor is working but does not currently have a reading. */ +#define MC_CMD_SENSOR_STATE_NO_READING 0x4 +/* enum: Sensor initialisation failed. */ +#define MC_CMD_SENSOR_STATE_INIT_FAILED 0x5 #define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_STATE_LBN 16 #define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_STATE_WIDTH 8 +#define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_TYPE_OFST 3 +#define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_TYPE_LEN 1 +/* Enum values, see field(s): */ +/* MC_CMD_SENSOR_INFO/MC_CMD_SENSOR_INFO_OUT/MASK */ +#define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_TYPE_LBN 24 +#define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_TYPE_WIDTH 8 /***********************************/ -/* MC_CMD_GET_PHY_STATE - * Report current state of PHY. +/* MC_CMD_GET_PHY_STATE + * Report current state of PHY. A 'zombie' PHY is a PHY that has failed to boot + * (e.g. due to missing or corrupted firmware). Locks required: None. Return + * code: 0 */ -#define MC_CMD_GET_PHY_STATE 0x43 +#define MC_CMD_GET_PHY_STATE 0x43 +#undef MC_CMD_0x43_PRIVILEGE_CTG + +#define MC_CMD_0x43_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_GET_PHY_STATE_IN msgrequest */ #define MC_CMD_GET_PHY_STATE_IN_LEN 0 @@ -4176,15 +6388,18 @@ /* MC_CMD_GET_PHY_STATE_OUT msgresponse */ #define MC_CMD_GET_PHY_STATE_OUT_LEN 4 #define MC_CMD_GET_PHY_STATE_OUT_STATE_OFST 0 -#define MC_CMD_PHY_STATE_OK 0x1 /* enum */ -#define MC_CMD_PHY_STATE_ZOMBIE 0x2 /* enum */ +/* enum: Ok. */ +#define MC_CMD_PHY_STATE_OK 0x1 +/* enum: Faulty. */ +#define MC_CMD_PHY_STATE_ZOMBIE 0x2 /***********************************/ -/* MC_CMD_SETUP_8021QBB - * 802.1Qbb control. +/* MC_CMD_SETUP_8021QBB + * 802.1Qbb control. 8 Tx queues that map to priorities 0 - 7. Use all 1s to + * disable 802.Qbb for a given priority. */ -#define MC_CMD_SETUP_8021QBB 0x44 +#define MC_CMD_SETUP_8021QBB 0x44 /* MC_CMD_SETUP_8021QBB_IN msgrequest */ #define MC_CMD_SETUP_8021QBB_IN_LEN 32 @@ -4196,10 +6411,13 @@ /***********************************/ -/* MC_CMD_WOL_FILTER_GET - * Retrieve ID of any WoL filters. +/* MC_CMD_WOL_FILTER_GET + * Retrieve ID of any WoL filters. Locks required: None. Returns: 0, ENOSYS */ -#define MC_CMD_WOL_FILTER_GET 0x45 +#define MC_CMD_WOL_FILTER_GET 0x45 +#undef MC_CMD_0x45_PRIVILEGE_CTG + +#define MC_CMD_0x45_PRIVILEGE_CTG SRIOV_CTG_LINK /* MC_CMD_WOL_FILTER_GET_IN msgrequest */ #define MC_CMD_WOL_FILTER_GET_IN_LEN 0 @@ -4210,10 +6428,14 @@ /***********************************/ -/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD - * Add a protocol offload to NIC for lights-out state. +/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD + * Add a protocol offload to NIC for lights-out state. Locks required: None. + * Returns: 0, ENOSYS */ -#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD 0x46 +#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD 0x46 +#undef MC_CMD_0x46_PRIVILEGE_CTG + +#define MC_CMD_0x46_PRIVILEGE_CTG SRIOV_CTG_LINK /* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN msgrequest */ #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LENMIN 8 @@ -4250,10 +6472,14 @@ /***********************************/ -/* MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD - * Remove a protocol offload from NIC for lights-out state. +/* MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD + * Remove a protocol offload from NIC for lights-out state. Locks required: + * None. Returns: 0, ENOSYS */ -#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD 0x47 +#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD 0x47 +#undef MC_CMD_0x47_PRIVILEGE_CTG + +#define MC_CMD_0x47_PRIVILEGE_CTG SRIOV_CTG_LINK /* MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN msgrequest */ #define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_LEN 8 @@ -4265,10 +6491,10 @@ /***********************************/ -/* MC_CMD_MAC_RESET_RESTORE - * Restore MAC after block reset. +/* MC_CMD_MAC_RESET_RESTORE + * Restore MAC after block reset. Locks required: None. Returns: 0. */ -#define MC_CMD_MAC_RESET_RESTORE 0x48 +#define MC_CMD_MAC_RESET_RESTORE 0x48 /* MC_CMD_MAC_RESET_RESTORE_IN msgrequest */ #define MC_CMD_MAC_RESET_RESTORE_IN_LEN 0 @@ -4278,9 +6504,15 @@ /***********************************/ -/* MC_CMD_TESTASSERT +/* MC_CMD_TESTASSERT + * Deliberately trigger an assert-detonation in the firmware for testing + * purposes (i.e. to allow tests that the driver copes gracefully). Locks + * required: None Returns: 0 */ -#define MC_CMD_TESTASSERT 0x49 +#define MC_CMD_TESTASSERT 0x49 +#undef MC_CMD_0x49_PRIVILEGE_CTG + +#define MC_CMD_0x49_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_TESTASSERT_IN msgrequest */ #define MC_CMD_TESTASSERT_IN_LEN 0 @@ -4290,26 +6522,74 @@ /***********************************/ -/* MC_CMD_WORKAROUND - * Enable/Disable a given workaround. +/* MC_CMD_WORKAROUND + * Enable/Disable a given workaround. The mcfw will return EINVAL if it doesn't + * understand the given workaround number - which should not be treated as a + * hard error by client code. This op does not imply any semantics about each + * workaround, that's between the driver and the mcfw on a per-workaround + * basis. Locks required: None. Returns: 0, EINVAL . */ -#define MC_CMD_WORKAROUND 0x4a +#define MC_CMD_WORKAROUND 0x4a +#undef MC_CMD_0x4a_PRIVILEGE_CTG + +#define MC_CMD_0x4a_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_WORKAROUND_IN msgrequest */ #define MC_CMD_WORKAROUND_IN_LEN 8 +/* The enums here must correspond with those in MC_CMD_GET_WORKAROUND. */ #define MC_CMD_WORKAROUND_IN_TYPE_OFST 0 -#define MC_CMD_WORKAROUND_BUG17230 0x1 /* enum */ +/* enum: Bug 17230 work around. */ +#define MC_CMD_WORKAROUND_BUG17230 0x1 +/* enum: Bug 35388 work around (unsafe EVQ writes). */ +#define MC_CMD_WORKAROUND_BUG35388 0x2 +/* enum: Bug35017 workaround (A64 tables must be identity map) */ +#define MC_CMD_WORKAROUND_BUG35017 0x3 +/* enum: Bug 41750 present (MC_CMD_TRIGGER_INTERRUPT won't work) */ +#define MC_CMD_WORKAROUND_BUG41750 0x4 +/* enum: Bug 42008 present (Interrupts can overtake associated events). Caution + * - before adding code that queries this workaround, remember that there's + * released Monza firmware that doesn't understand MC_CMD_WORKAROUND_BUG42008, + * and will hence (incorrectly) report that the bug doesn't exist. + */ +#define MC_CMD_WORKAROUND_BUG42008 0x5 +/* enum: Bug 26807 features present in firmware (multicast filter chaining) + * This feature cannot be turned on/off while there are any filters already + * present. The behaviour in such case depends on the acting client's privilege + * level. If the client has the admin privilege, then all functions that have + * filters installed will be FLRed and the FLR_DONE flag will be set. Otherwise + * the command will fail with MC_CMD_ERR_FILTERS_PRESENT. + */ +#define MC_CMD_WORKAROUND_BUG26807 0x6 +/* 0 = disable the workaround indicated by TYPE; any non-zero value = enable + * the workaround + */ #define MC_CMD_WORKAROUND_IN_ENABLED_OFST 4 /* MC_CMD_WORKAROUND_OUT msgresponse */ #define MC_CMD_WORKAROUND_OUT_LEN 0 +/* MC_CMD_WORKAROUND_EXT_OUT msgresponse: This response format will be used + * when (TYPE == MC_CMD_WORKAROUND_BUG26807) + */ +#define MC_CMD_WORKAROUND_EXT_OUT_LEN 4 +#define MC_CMD_WORKAROUND_EXT_OUT_FLAGS_OFST 0 +#define MC_CMD_WORKAROUND_EXT_OUT_FLR_DONE_LBN 0 +#define MC_CMD_WORKAROUND_EXT_OUT_FLR_DONE_WIDTH 1 + /***********************************/ -/* MC_CMD_GET_PHY_MEDIA_INFO - * Read media-specific data from PHY. +/* MC_CMD_GET_PHY_MEDIA_INFO + * Read media-specific data from PHY (e.g. SFP/SFP+ module ID information for + * SFP+ PHYs). The 'media type' can be found via GET_PHY_CFG + * (GET_PHY_CFG_OUT_MEDIA_TYPE); the valid 'page number' input values, and the + * output data, are interpreted on a per-type basis. For SFP+: PAGE=0 or 1 + * returns a 128-byte block read from module I2C address 0xA0 offset 0 or 0x80. + * Anything else: currently undefined. Locks required: None. Return code: 0. */ -#define MC_CMD_GET_PHY_MEDIA_INFO 0x4b +#define MC_CMD_GET_PHY_MEDIA_INFO 0x4b +#undef MC_CMD_0x4b_PRIVILEGE_CTG + +#define MC_CMD_0x4b_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_GET_PHY_MEDIA_INFO_IN msgrequest */ #define MC_CMD_GET_PHY_MEDIA_INFO_IN_LEN 4 @@ -4319,6 +6599,7 @@ #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_LENMIN 5 #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_LENMAX 252 #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_LEN(num) (4+1*(num)) +/* in bytes */ #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATALEN_OFST 0 #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_OFST 4 #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_LEN 1 @@ -4327,10 +6608,14 @@ /***********************************/ -/* MC_CMD_NVRAM_TEST - * Test a particular NVRAM partition. +/* MC_CMD_NVRAM_TEST + * Test a particular NVRAM partition for valid contents (where "valid" depends + * on the type of partition). */ -#define MC_CMD_NVRAM_TEST 0x4c +#define MC_CMD_NVRAM_TEST 0x4c +#undef MC_CMD_0x4c_PRIVILEGE_CTG + +#define MC_CMD_0x4c_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_NVRAM_TEST_IN msgrequest */ #define MC_CMD_NVRAM_TEST_IN_LEN 4 @@ -4341,22 +6626,31 @@ /* MC_CMD_NVRAM_TEST_OUT msgresponse */ #define MC_CMD_NVRAM_TEST_OUT_LEN 4 #define MC_CMD_NVRAM_TEST_OUT_RESULT_OFST 0 -#define MC_CMD_NVRAM_TEST_PASS 0x0 /* enum */ -#define MC_CMD_NVRAM_TEST_FAIL 0x1 /* enum */ -#define MC_CMD_NVRAM_TEST_NOTSUPP 0x2 /* enum */ +/* enum: Passed. */ +#define MC_CMD_NVRAM_TEST_PASS 0x0 +/* enum: Failed. */ +#define MC_CMD_NVRAM_TEST_FAIL 0x1 +/* enum: Not supported. */ +#define MC_CMD_NVRAM_TEST_NOTSUPP 0x2 /***********************************/ -/* MC_CMD_MRSFP_TWEAK - * Read status and/or set parameters for the 'mrsfp' driver. +/* MC_CMD_MRSFP_TWEAK + * Read status and/or set parameters for the 'mrsfp' driver in mr_rusty builds. + * I2C I/O expander bits are always read; if equaliser parameters are supplied, + * they are configured first. Locks required: None. Return code: 0, EINVAL. */ -#define MC_CMD_MRSFP_TWEAK 0x4d +#define MC_CMD_MRSFP_TWEAK 0x4d /* MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG msgrequest */ #define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_LEN 16 +/* 0-6 low->high de-emph. */ #define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_TXEQ_LEVEL_OFST 0 +/* 0-8 low->high ref.V */ #define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_TXEQ_DT_CFG_OFST 4 +/* 0-8 0-8 low->high boost */ #define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_RXEQ_BOOST_OFST 8 +/* 0-8 low->high ref.V */ #define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_RXEQ_DT_CFG_OFST 12 /* MC_CMD_MRSFP_TWEAK_IN_READ_ONLY msgrequest */ @@ -4364,27 +6658,41 @@ /* MC_CMD_MRSFP_TWEAK_OUT msgresponse */ #define MC_CMD_MRSFP_TWEAK_OUT_LEN 12 +/* input bits */ #define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_INPUTS_OFST 0 +/* output bits */ #define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_OUTPUTS_OFST 4 +/* direction */ #define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_DIRECTION_OFST 8 -#define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_DIRECTION_OUT 0x0 /* enum */ -#define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_DIRECTION_IN 0x1 /* enum */ +/* enum: Out. */ +#define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_DIRECTION_OUT 0x0 +/* enum: In. */ +#define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_DIRECTION_IN 0x1 /***********************************/ -/* MC_CMD_SENSOR_SET_LIMS - * Adjusts the sensor limits. +/* MC_CMD_SENSOR_SET_LIMS + * Adjusts the sensor limits. This is a warranty-voiding operation. Returns: + * ENOENT if the sensor specified does not exist, EINVAL if the limits are out + * of range. */ -#define MC_CMD_SENSOR_SET_LIMS 0x4e +#define MC_CMD_SENSOR_SET_LIMS 0x4e +#undef MC_CMD_0x4e_PRIVILEGE_CTG + +#define MC_CMD_0x4e_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_SENSOR_SET_LIMS_IN msgrequest */ #define MC_CMD_SENSOR_SET_LIMS_IN_LEN 20 #define MC_CMD_SENSOR_SET_LIMS_IN_SENSOR_OFST 0 /* Enum values, see field(s): */ /* MC_CMD_SENSOR_INFO/MC_CMD_SENSOR_INFO_OUT/MASK */ +/* interpretation is is sensor-specific. */ #define MC_CMD_SENSOR_SET_LIMS_IN_LOW0_OFST 4 +/* interpretation is is sensor-specific. */ #define MC_CMD_SENSOR_SET_LIMS_IN_HI0_OFST 8 +/* interpretation is is sensor-specific. */ #define MC_CMD_SENSOR_SET_LIMS_IN_LOW1_OFST 12 +/* interpretation is is sensor-specific. */ #define MC_CMD_SENSOR_SET_LIMS_IN_HI1_OFST 16 /* MC_CMD_SENSOR_SET_LIMS_OUT msgresponse */ @@ -4392,9 +6700,9 @@ /***********************************/ -/* MC_CMD_GET_RESOURCE_LIMITS +/* MC_CMD_GET_RESOURCE_LIMITS */ -#define MC_CMD_GET_RESOURCE_LIMITS 0x4f +#define MC_CMD_GET_RESOURCE_LIMITS 0x4f /* MC_CMD_GET_RESOURCE_LIMITS_IN msgrequest */ #define MC_CMD_GET_RESOURCE_LIMITS_IN_LEN 0 @@ -4408,19 +6716,129 @@ /***********************************/ -/* MC_CMD_CLP - * CLP support operations +/* MC_CMD_NVRAM_PARTITIONS + * Reads the list of available virtual NVRAM partition types. Locks required: + * none. Returns: 0, EINVAL (bad type). */ -#define MC_CMD_CLP 0x56 +#define MC_CMD_NVRAM_PARTITIONS 0x51 +#undef MC_CMD_0x51_PRIVILEGE_CTG + +#define MC_CMD_0x51_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_NVRAM_PARTITIONS_IN msgrequest */ +#define MC_CMD_NVRAM_PARTITIONS_IN_LEN 0 + +/* MC_CMD_NVRAM_PARTITIONS_OUT msgresponse */ +#define MC_CMD_NVRAM_PARTITIONS_OUT_LENMIN 4 +#define MC_CMD_NVRAM_PARTITIONS_OUT_LENMAX 252 +#define MC_CMD_NVRAM_PARTITIONS_OUT_LEN(num) (4+4*(num)) +/* total number of partitions */ +#define MC_CMD_NVRAM_PARTITIONS_OUT_NUM_PARTITIONS_OFST 0 +/* type ID code for each of NUM_PARTITIONS partitions */ +#define MC_CMD_NVRAM_PARTITIONS_OUT_TYPE_ID_OFST 4 +#define MC_CMD_NVRAM_PARTITIONS_OUT_TYPE_ID_LEN 4 +#define MC_CMD_NVRAM_PARTITIONS_OUT_TYPE_ID_MINNUM 0 +#define MC_CMD_NVRAM_PARTITIONS_OUT_TYPE_ID_MAXNUM 62 + + +/***********************************/ +/* MC_CMD_NVRAM_METADATA + * Reads soft metadata for a virtual NVRAM partition type. Locks required: + * none. Returns: 0, EINVAL (bad type). + */ +#define MC_CMD_NVRAM_METADATA 0x52 +#undef MC_CMD_0x52_PRIVILEGE_CTG + +#define MC_CMD_0x52_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_NVRAM_METADATA_IN msgrequest */ +#define MC_CMD_NVRAM_METADATA_IN_LEN 4 +/* Partition type ID code */ +#define MC_CMD_NVRAM_METADATA_IN_TYPE_OFST 0 + +/* MC_CMD_NVRAM_METADATA_OUT msgresponse */ +#define MC_CMD_NVRAM_METADATA_OUT_LENMIN 20 +#define MC_CMD_NVRAM_METADATA_OUT_LENMAX 252 +#define MC_CMD_NVRAM_METADATA_OUT_LEN(num) (20+1*(num)) +/* Partition type ID code */ +#define MC_CMD_NVRAM_METADATA_OUT_TYPE_OFST 0 +#define MC_CMD_NVRAM_METADATA_OUT_FLAGS_OFST 4 +#define MC_CMD_NVRAM_METADATA_OUT_SUBTYPE_VALID_LBN 0 +#define MC_CMD_NVRAM_METADATA_OUT_SUBTYPE_VALID_WIDTH 1 +#define MC_CMD_NVRAM_METADATA_OUT_VERSION_VALID_LBN 1 +#define MC_CMD_NVRAM_METADATA_OUT_VERSION_VALID_WIDTH 1 +#define MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_VALID_LBN 2 +#define MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_VALID_WIDTH 1 +/* Subtype ID code for content of this partition */ +#define MC_CMD_NVRAM_METADATA_OUT_SUBTYPE_OFST 8 +/* 1st component of W.X.Y.Z version number for content of this partition */ +#define MC_CMD_NVRAM_METADATA_OUT_VERSION_W_OFST 12 +#define MC_CMD_NVRAM_METADATA_OUT_VERSION_W_LEN 2 +/* 2nd component of W.X.Y.Z version number for content of this partition */ +#define MC_CMD_NVRAM_METADATA_OUT_VERSION_X_OFST 14 +#define MC_CMD_NVRAM_METADATA_OUT_VERSION_X_LEN 2 +/* 3rd component of W.X.Y.Z version number for content of this partition */ +#define MC_CMD_NVRAM_METADATA_OUT_VERSION_Y_OFST 16 +#define MC_CMD_NVRAM_METADATA_OUT_VERSION_Y_LEN 2 +/* 4th component of W.X.Y.Z version number for content of this partition */ +#define MC_CMD_NVRAM_METADATA_OUT_VERSION_Z_OFST 18 +#define MC_CMD_NVRAM_METADATA_OUT_VERSION_Z_LEN 2 +/* Zero-terminated string describing the content of this partition */ +#define MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_OFST 20 +#define MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_LEN 1 +#define MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_MINNUM 0 +#define MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_MAXNUM 232 + + +/***********************************/ +/* MC_CMD_GET_MAC_ADDRESSES + * Returns the base MAC, count and stride for the requesting function + */ +#define MC_CMD_GET_MAC_ADDRESSES 0x55 +#undef MC_CMD_0x55_PRIVILEGE_CTG + +#define MC_CMD_0x55_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_GET_MAC_ADDRESSES_IN msgrequest */ +#define MC_CMD_GET_MAC_ADDRESSES_IN_LEN 0 + +/* MC_CMD_GET_MAC_ADDRESSES_OUT msgresponse */ +#define MC_CMD_GET_MAC_ADDRESSES_OUT_LEN 16 +/* Base MAC address */ +#define MC_CMD_GET_MAC_ADDRESSES_OUT_MAC_ADDR_BASE_OFST 0 +#define MC_CMD_GET_MAC_ADDRESSES_OUT_MAC_ADDR_BASE_LEN 6 +/* Padding */ +#define MC_CMD_GET_MAC_ADDRESSES_OUT_RESERVED_OFST 6 +#define MC_CMD_GET_MAC_ADDRESSES_OUT_RESERVED_LEN 2 +/* Number of allocated MAC addresses */ +#define MC_CMD_GET_MAC_ADDRESSES_OUT_MAC_COUNT_OFST 8 +/* Spacing of allocated MAC addresses */ +#define MC_CMD_GET_MAC_ADDRESSES_OUT_MAC_STRIDE_OFST 12 + + +/***********************************/ +/* MC_CMD_CLP + * Perform a CLP related operation + */ +#define MC_CMD_CLP 0x56 +#undef MC_CMD_0x56_PRIVILEGE_CTG + +#define MC_CMD_0x56_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_CLP_IN msgrequest */ #define MC_CMD_CLP_IN_LEN 4 +/* Sub operation */ #define MC_CMD_CLP_IN_OP_OFST 0 -#define MC_CMD_CLP_OP_DEFAULT 0x1 /* enum */ -#define MC_CMD_CLP_OP_SET_MAC 0x2 /* enum */ -#define MC_CMD_CLP_OP_GET_MAC 0x3 /* enum */ -#define MC_CMD_CLP_OP_SET_BOOT 0x4 /* enum */ -#define MC_CMD_CLP_OP_GET_BOOT 0x5 /* enum */ +/* enum: Return to factory default settings */ +#define MC_CMD_CLP_OP_DEFAULT 0x1 +/* enum: Set MAC address */ +#define MC_CMD_CLP_OP_SET_MAC 0x2 +/* enum: Get MAC address */ +#define MC_CMD_CLP_OP_GET_MAC 0x3 +/* enum: Set UEFI/GPXE boot mode */ +#define MC_CMD_CLP_OP_SET_BOOT 0x4 +/* enum: Get UEFI/GPXE boot mode */ +#define MC_CMD_CLP_OP_GET_BOOT 0x5 /* MC_CMD_CLP_OUT msgresponse */ #define MC_CMD_CLP_OUT_LEN 0 @@ -4435,8 +6853,10 @@ /* MC_CMD_CLP_IN_SET_MAC msgrequest */ #define MC_CMD_CLP_IN_SET_MAC_LEN 12 /* MC_CMD_CLP_IN_OP_OFST 0 */ +/* MAC address assigned to port */ #define MC_CMD_CLP_IN_SET_MAC_ADDR_OFST 4 #define MC_CMD_CLP_IN_SET_MAC_ADDR_LEN 6 +/* Padding */ #define MC_CMD_CLP_IN_SET_MAC_RESERVED_OFST 10 #define MC_CMD_CLP_IN_SET_MAC_RESERVED_LEN 2 @@ -4449,14 +6869,17 @@ /* MC_CMD_CLP_OUT_GET_MAC msgresponse */ #define MC_CMD_CLP_OUT_GET_MAC_LEN 8 +/* MAC address assigned to port */ #define MC_CMD_CLP_OUT_GET_MAC_ADDR_OFST 0 #define MC_CMD_CLP_OUT_GET_MAC_ADDR_LEN 6 +/* Padding */ #define MC_CMD_CLP_OUT_GET_MAC_RESERVED_OFST 6 #define MC_CMD_CLP_OUT_GET_MAC_RESERVED_LEN 2 /* MC_CMD_CLP_IN_SET_BOOT msgrequest */ #define MC_CMD_CLP_IN_SET_BOOT_LEN 5 /* MC_CMD_CLP_IN_OP_OFST 0 */ +/* Boot flag */ #define MC_CMD_CLP_IN_SET_BOOT_FLAG_OFST 4 #define MC_CMD_CLP_IN_SET_BOOT_FLAG_LEN 1 @@ -4469,113 +6892,920 @@ /* MC_CMD_CLP_OUT_GET_BOOT msgresponse */ #define MC_CMD_CLP_OUT_GET_BOOT_LEN 4 +/* Boot flag */ #define MC_CMD_CLP_OUT_GET_BOOT_FLAG_OFST 0 #define MC_CMD_CLP_OUT_GET_BOOT_FLAG_LEN 1 +/* Padding */ #define MC_CMD_CLP_OUT_GET_BOOT_RESERVED_OFST 1 #define MC_CMD_CLP_OUT_GET_BOOT_RESERVED_LEN 3 + +/***********************************/ +/* MC_CMD_MUM + * Perform a MUM operation + */ +#define MC_CMD_MUM 0x57 +#undef MC_CMD_0x57_PRIVILEGE_CTG + +#define MC_CMD_0x57_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_MUM_IN msgrequest */ +#define MC_CMD_MUM_IN_LEN 4 +#define MC_CMD_MUM_IN_OP_HDR_OFST 0 +#define MC_CMD_MUM_IN_OP_LBN 0 +#define MC_CMD_MUM_IN_OP_WIDTH 8 +/* enum: NULL MCDI command to MUM */ +#define MC_CMD_MUM_OP_NULL 0x1 +/* enum: Get MUM version */ +#define MC_CMD_MUM_OP_GET_VERSION 0x2 +/* enum: Issue raw I2C command to MUM */ +#define MC_CMD_MUM_OP_RAW_CMD 0x3 +/* enum: Read from registers on devices connected to MUM. */ +#define MC_CMD_MUM_OP_READ 0x4 +/* enum: Write to registers on devices connected to MUM. */ +#define MC_CMD_MUM_OP_WRITE 0x5 +/* enum: Control UART logging. */ +#define MC_CMD_MUM_OP_LOG 0x6 +/* enum: Operations on MUM GPIO lines */ +#define MC_CMD_MUM_OP_GPIO 0x7 +/* enum: Get sensor readings from MUM */ +#define MC_CMD_MUM_OP_READ_SENSORS 0x8 +/* enum: Initiate clock programming on the MUM */ +#define MC_CMD_MUM_OP_PROGRAM_CLOCKS 0x9 +/* enum: Initiate FPGA load from flash on the MUM */ +#define MC_CMD_MUM_OP_FPGA_LOAD 0xa +/* enum: Request sensor reading from MUM ADC resulting from earlier request via + * MUM ATB + */ +#define MC_CMD_MUM_OP_READ_ATB_SENSOR 0xb +/* enum: Send commands relating to the QSFP ports via the MUM for PHY + * operations + */ +#define MC_CMD_MUM_OP_QSFP 0xc + +/* MC_CMD_MUM_IN_NULL msgrequest */ +#define MC_CMD_MUM_IN_NULL_LEN 4 +/* MUM cmd header */ +#define MC_CMD_MUM_IN_CMD_OFST 0 + +/* MC_CMD_MUM_IN_GET_VERSION msgrequest */ +#define MC_CMD_MUM_IN_GET_VERSION_LEN 4 +/* MUM cmd header */ +/* MC_CMD_MUM_IN_CMD_OFST 0 */ + +/* MC_CMD_MUM_IN_READ msgrequest */ +#define MC_CMD_MUM_IN_READ_LEN 16 +/* MUM cmd header */ +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +/* ID of (device connected to MUM) to read from registers of */ +#define MC_CMD_MUM_IN_READ_DEVICE_OFST 4 +/* enum: Hittite HMC1035 clock generator on Sorrento board */ +#define MC_CMD_MUM_DEV_HITTITE 0x1 +/* enum: Hittite HMC1035 clock generator for NIC-side on Sorrento board */ +#define MC_CMD_MUM_DEV_HITTITE_NIC 0x2 +/* 32-bit address to read from */ +#define MC_CMD_MUM_IN_READ_ADDR_OFST 8 +/* Number of words to read. */ +#define MC_CMD_MUM_IN_READ_NUMWORDS_OFST 12 + +/* MC_CMD_MUM_IN_WRITE msgrequest */ +#define MC_CMD_MUM_IN_WRITE_LENMIN 16 +#define MC_CMD_MUM_IN_WRITE_LENMAX 252 +#define MC_CMD_MUM_IN_WRITE_LEN(num) (12+4*(num)) +/* MUM cmd header */ +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +/* ID of (device connected to MUM) to write to registers of */ +#define MC_CMD_MUM_IN_WRITE_DEVICE_OFST 4 +/* enum: Hittite HMC1035 clock generator on Sorrento board */ +/* MC_CMD_MUM_DEV_HITTITE 0x1 */ +/* 32-bit address to write to */ +#define MC_CMD_MUM_IN_WRITE_ADDR_OFST 8 +/* Words to write */ +#define MC_CMD_MUM_IN_WRITE_BUFFER_OFST 12 +#define MC_CMD_MUM_IN_WRITE_BUFFER_LEN 4 +#define MC_CMD_MUM_IN_WRITE_BUFFER_MINNUM 1 +#define MC_CMD_MUM_IN_WRITE_BUFFER_MAXNUM 60 + +/* MC_CMD_MUM_IN_RAW_CMD msgrequest */ +#define MC_CMD_MUM_IN_RAW_CMD_LENMIN 17 +#define MC_CMD_MUM_IN_RAW_CMD_LENMAX 252 +#define MC_CMD_MUM_IN_RAW_CMD_LEN(num) (16+1*(num)) +/* MUM cmd header */ +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +/* MUM I2C cmd code */ +#define MC_CMD_MUM_IN_RAW_CMD_CMD_CODE_OFST 4 +/* Number of bytes to write */ +#define MC_CMD_MUM_IN_RAW_CMD_NUM_WRITE_OFST 8 +/* Number of bytes to read */ +#define MC_CMD_MUM_IN_RAW_CMD_NUM_READ_OFST 12 +/* Bytes to write */ +#define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_OFST 16 +#define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_LEN 1 +#define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_MINNUM 1 +#define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_MAXNUM 236 + +/* MC_CMD_MUM_IN_LOG msgrequest */ +#define MC_CMD_MUM_IN_LOG_LEN 8 +/* MUM cmd header */ +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +#define MC_CMD_MUM_IN_LOG_OP_OFST 4 +#define MC_CMD_MUM_IN_LOG_OP_UART 0x1 /* enum */ + +/* MC_CMD_MUM_IN_LOG_OP_UART msgrequest */ +#define MC_CMD_MUM_IN_LOG_OP_UART_LEN 12 +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +/* MC_CMD_MUM_IN_LOG_OP_OFST 4 */ +/* Enable/disable debug output to UART */ +#define MC_CMD_MUM_IN_LOG_OP_UART_ENABLE_OFST 8 + +/* MC_CMD_MUM_IN_GPIO msgrequest */ +#define MC_CMD_MUM_IN_GPIO_LEN 8 +/* MUM cmd header */ +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +#define MC_CMD_MUM_IN_GPIO_HDR_OFST 4 +#define MC_CMD_MUM_IN_GPIO_OPCODE_LBN 0 +#define MC_CMD_MUM_IN_GPIO_OPCODE_WIDTH 8 +#define MC_CMD_MUM_IN_GPIO_IN_READ 0x0 /* enum */ +#define MC_CMD_MUM_IN_GPIO_OUT_WRITE 0x1 /* enum */ +#define MC_CMD_MUM_IN_GPIO_OUT_READ 0x2 /* enum */ +#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE 0x3 /* enum */ +#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ 0x4 /* enum */ +#define MC_CMD_MUM_IN_GPIO_OP 0x5 /* enum */ + +/* MC_CMD_MUM_IN_GPIO_IN_READ msgrequest */ +#define MC_CMD_MUM_IN_GPIO_IN_READ_LEN 8 +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +#define MC_CMD_MUM_IN_GPIO_IN_READ_HDR_OFST 4 + +/* MC_CMD_MUM_IN_GPIO_OUT_WRITE msgrequest */ +#define MC_CMD_MUM_IN_GPIO_OUT_WRITE_LEN 16 +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +#define MC_CMD_MUM_IN_GPIO_OUT_WRITE_HDR_OFST 4 +/* The first 32-bit word to be written to the GPIO OUT register. */ +#define MC_CMD_MUM_IN_GPIO_OUT_WRITE_GPIOMASK1_OFST 8 +/* The second 32-bit word to be written to the GPIO OUT register. */ +#define MC_CMD_MUM_IN_GPIO_OUT_WRITE_GPIOMASK2_OFST 12 + +/* MC_CMD_MUM_IN_GPIO_OUT_READ msgrequest */ +#define MC_CMD_MUM_IN_GPIO_OUT_READ_LEN 8 +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +#define MC_CMD_MUM_IN_GPIO_OUT_READ_HDR_OFST 4 + +/* MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE msgrequest */ +#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_LEN 16 +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_HDR_OFST 4 +/* The first 32-bit word to be written to the GPIO OUT ENABLE register. */ +#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_GPIOMASK1_OFST 8 +/* The second 32-bit word to be written to the GPIO OUT ENABLE register. */ +#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_GPIOMASK2_OFST 12 + +/* MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ msgrequest */ +#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ_LEN 8 +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +#define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ_HDR_OFST 4 + +/* MC_CMD_MUM_IN_GPIO_OP msgrequest */ +#define MC_CMD_MUM_IN_GPIO_OP_LEN 8 +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +#define MC_CMD_MUM_IN_GPIO_OP_HDR_OFST 4 +#define MC_CMD_MUM_IN_GPIO_OP_BITWISE_OP_LBN 8 +#define MC_CMD_MUM_IN_GPIO_OP_BITWISE_OP_WIDTH 8 +#define MC_CMD_MUM_IN_GPIO_OP_OUT_READ 0x0 /* enum */ +#define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE 0x1 /* enum */ +#define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG 0x2 /* enum */ +#define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE 0x3 /* enum */ +#define MC_CMD_MUM_IN_GPIO_OP_GPIO_NUMBER_LBN 16 +#define MC_CMD_MUM_IN_GPIO_OP_GPIO_NUMBER_WIDTH 8 + +/* MC_CMD_MUM_IN_GPIO_OP_OUT_READ msgrequest */ +#define MC_CMD_MUM_IN_GPIO_OP_OUT_READ_LEN 8 +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +#define MC_CMD_MUM_IN_GPIO_OP_OUT_READ_HDR_OFST 4 + +/* MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE msgrequest */ +#define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_LEN 8 +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +#define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_HDR_OFST 4 +#define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_WRITEBIT_LBN 24 +#define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_WRITEBIT_WIDTH 8 + +/* MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG msgrequest */ +#define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_LEN 8 +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +#define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_HDR_OFST 4 +#define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_CFG_LBN 24 +#define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_CFG_WIDTH 8 + +/* MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE msgrequest */ +#define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_LEN 8 +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +#define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_HDR_OFST 4 +#define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_ENABLEBIT_LBN 24 +#define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_ENABLEBIT_WIDTH 8 + +/* MC_CMD_MUM_IN_READ_SENSORS msgrequest */ +#define MC_CMD_MUM_IN_READ_SENSORS_LEN 8 +/* MUM cmd header */ +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +#define MC_CMD_MUM_IN_READ_SENSORS_PARAMS_OFST 4 +#define MC_CMD_MUM_IN_READ_SENSORS_SENSOR_ID_LBN 0 +#define MC_CMD_MUM_IN_READ_SENSORS_SENSOR_ID_WIDTH 8 +#define MC_CMD_MUM_IN_READ_SENSORS_NUM_SENSORS_LBN 8 +#define MC_CMD_MUM_IN_READ_SENSORS_NUM_SENSORS_WIDTH 8 + +/* MC_CMD_MUM_IN_PROGRAM_CLOCKS msgrequest */ +#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_LEN 12 +/* MUM cmd header */ +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +/* Bit-mask of clocks to be programmed */ +#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_MASK_OFST 4 +#define MC_CMD_MUM_CLOCK_ID_FPGA 0x0 /* enum */ +#define MC_CMD_MUM_CLOCK_ID_DDR 0x1 /* enum */ +#define MC_CMD_MUM_CLOCK_ID_NIC 0x2 /* enum */ +/* Control flags for clock programming */ +#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_FLAGS_OFST 8 +#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_OVERCLOCK_110_LBN 0 +#define MC_CMD_MUM_IN_PROGRAM_CLOCKS_OVERCLOCK_110_WIDTH 1 + +/* MC_CMD_MUM_IN_FPGA_LOAD msgrequest */ +#define MC_CMD_MUM_IN_FPGA_LOAD_LEN 8 +/* MUM cmd header */ +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +/* Enable/Disable FPGA config from flash */ +#define MC_CMD_MUM_IN_FPGA_LOAD_ENABLE_OFST 4 + +/* MC_CMD_MUM_IN_READ_ATB_SENSOR msgrequest */ +#define MC_CMD_MUM_IN_READ_ATB_SENSOR_LEN 4 +/* MUM cmd header */ +/* MC_CMD_MUM_IN_CMD_OFST 0 */ + +/* MC_CMD_MUM_IN_QSFP msgrequest */ +#define MC_CMD_MUM_IN_QSFP_LEN 12 +/* MUM cmd header */ +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +#define MC_CMD_MUM_IN_QSFP_HDR_OFST 4 +#define MC_CMD_MUM_IN_QSFP_OPCODE_LBN 0 +#define MC_CMD_MUM_IN_QSFP_OPCODE_WIDTH 4 +#define MC_CMD_MUM_IN_QSFP_INIT 0x0 /* enum */ +#define MC_CMD_MUM_IN_QSFP_RECONFIGURE 0x1 /* enum */ +#define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP 0x2 /* enum */ +#define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO 0x3 /* enum */ +#define MC_CMD_MUM_IN_QSFP_FILL_STATS 0x4 /* enum */ +#define MC_CMD_MUM_IN_QSFP_POLL_BIST 0x5 /* enum */ +#define MC_CMD_MUM_IN_QSFP_IDX_OFST 8 + +/* MC_CMD_MUM_IN_QSFP_INIT msgrequest */ +#define MC_CMD_MUM_IN_QSFP_INIT_LEN 16 +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +#define MC_CMD_MUM_IN_QSFP_INIT_HDR_OFST 4 +#define MC_CMD_MUM_IN_QSFP_INIT_IDX_OFST 8 +#define MC_CMD_MUM_IN_QSFP_INIT_CAGE_OFST 12 + +/* MC_CMD_MUM_IN_QSFP_RECONFIGURE msgrequest */ +#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_LEN 24 +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_HDR_OFST 4 +#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_IDX_OFST 8 +#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_TX_DISABLE_OFST 12 +#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_PORT_LANES_OFST 16 +#define MC_CMD_MUM_IN_QSFP_RECONFIGURE_PORT_LINK_SPEED_OFST 20 + +/* MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP msgrequest */ +#define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_LEN 12 +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +#define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_HDR_OFST 4 +#define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_IDX_OFST 8 + +/* MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO msgrequest */ +#define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_LEN 16 +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +#define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_HDR_OFST 4 +#define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_IDX_OFST 8 +#define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_PAGE_OFST 12 + +/* MC_CMD_MUM_IN_QSFP_FILL_STATS msgrequest */ +#define MC_CMD_MUM_IN_QSFP_FILL_STATS_LEN 12 +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +#define MC_CMD_MUM_IN_QSFP_FILL_STATS_HDR_OFST 4 +#define MC_CMD_MUM_IN_QSFP_FILL_STATS_IDX_OFST 8 + +/* MC_CMD_MUM_IN_QSFP_POLL_BIST msgrequest */ +#define MC_CMD_MUM_IN_QSFP_POLL_BIST_LEN 12 +/* MC_CMD_MUM_IN_CMD_OFST 0 */ +#define MC_CMD_MUM_IN_QSFP_POLL_BIST_HDR_OFST 4 +#define MC_CMD_MUM_IN_QSFP_POLL_BIST_IDX_OFST 8 + +/* MC_CMD_MUM_OUT msgresponse */ +#define MC_CMD_MUM_OUT_LEN 0 + +/* MC_CMD_MUM_OUT_NULL msgresponse */ +#define MC_CMD_MUM_OUT_NULL_LEN 0 + +/* MC_CMD_MUM_OUT_GET_VERSION msgresponse */ +#define MC_CMD_MUM_OUT_GET_VERSION_LEN 12 +#define MC_CMD_MUM_OUT_GET_VERSION_FIRMWARE_OFST 0 +#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_OFST 4 +#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LEN 8 +#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_OFST 4 +#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_OFST 8 + +/* MC_CMD_MUM_OUT_RAW_CMD msgresponse */ +#define MC_CMD_MUM_OUT_RAW_CMD_LENMIN 1 +#define MC_CMD_MUM_OUT_RAW_CMD_LENMAX 252 +#define MC_CMD_MUM_OUT_RAW_CMD_LEN(num) (0+1*(num)) +/* returned data */ +#define MC_CMD_MUM_OUT_RAW_CMD_DATA_OFST 0 +#define MC_CMD_MUM_OUT_RAW_CMD_DATA_LEN 1 +#define MC_CMD_MUM_OUT_RAW_CMD_DATA_MINNUM 1 +#define MC_CMD_MUM_OUT_RAW_CMD_DATA_MAXNUM 252 + +/* MC_CMD_MUM_OUT_READ msgresponse */ +#define MC_CMD_MUM_OUT_READ_LENMIN 4 +#define MC_CMD_MUM_OUT_READ_LENMAX 252 +#define MC_CMD_MUM_OUT_READ_LEN(num) (0+4*(num)) +#define MC_CMD_MUM_OUT_READ_BUFFER_OFST 0 +#define MC_CMD_MUM_OUT_READ_BUFFER_LEN 4 +#define MC_CMD_MUM_OUT_READ_BUFFER_MINNUM 1 +#define MC_CMD_MUM_OUT_READ_BUFFER_MAXNUM 63 + +/* MC_CMD_MUM_OUT_WRITE msgresponse */ +#define MC_CMD_MUM_OUT_WRITE_LEN 0 + +/* MC_CMD_MUM_OUT_LOG msgresponse */ +#define MC_CMD_MUM_OUT_LOG_LEN 0 + +/* MC_CMD_MUM_OUT_LOG_OP_UART msgresponse */ +#define MC_CMD_MUM_OUT_LOG_OP_UART_LEN 0 + +/* MC_CMD_MUM_OUT_GPIO_IN_READ msgresponse */ +#define MC_CMD_MUM_OUT_GPIO_IN_READ_LEN 8 +/* The first 32-bit word read from the GPIO IN register. */ +#define MC_CMD_MUM_OUT_GPIO_IN_READ_GPIOMASK1_OFST 0 +/* The second 32-bit word read from the GPIO IN register. */ +#define MC_CMD_MUM_OUT_GPIO_IN_READ_GPIOMASK2_OFST 4 + +/* MC_CMD_MUM_OUT_GPIO_OUT_WRITE msgresponse */ +#define MC_CMD_MUM_OUT_GPIO_OUT_WRITE_LEN 0 + +/* MC_CMD_MUM_OUT_GPIO_OUT_READ msgresponse */ +#define MC_CMD_MUM_OUT_GPIO_OUT_READ_LEN 8 +/* The first 32-bit word read from the GPIO OUT register. */ +#define MC_CMD_MUM_OUT_GPIO_OUT_READ_GPIOMASK1_OFST 0 +/* The second 32-bit word read from the GPIO OUT register. */ +#define MC_CMD_MUM_OUT_GPIO_OUT_READ_GPIOMASK2_OFST 4 + +/* MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_WRITE msgresponse */ +#define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_WRITE_LEN 0 + +/* MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ msgresponse */ +#define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_LEN 8 +#define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_GPIOMASK1_OFST 0 +#define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_GPIOMASK2_OFST 4 + +/* MC_CMD_MUM_OUT_GPIO_OP_OUT_READ msgresponse */ +#define MC_CMD_MUM_OUT_GPIO_OP_OUT_READ_LEN 4 +#define MC_CMD_MUM_OUT_GPIO_OP_OUT_READ_BIT_READ_OFST 0 + +/* MC_CMD_MUM_OUT_GPIO_OP_OUT_WRITE msgresponse */ +#define MC_CMD_MUM_OUT_GPIO_OP_OUT_WRITE_LEN 0 + +/* MC_CMD_MUM_OUT_GPIO_OP_OUT_CONFIG msgresponse */ +#define MC_CMD_MUM_OUT_GPIO_OP_OUT_CONFIG_LEN 0 + +/* MC_CMD_MUM_OUT_GPIO_OP_OUT_ENABLE msgresponse */ +#define MC_CMD_MUM_OUT_GPIO_OP_OUT_ENABLE_LEN 0 + +/* MC_CMD_MUM_OUT_READ_SENSORS msgresponse */ +#define MC_CMD_MUM_OUT_READ_SENSORS_LENMIN 4 +#define MC_CMD_MUM_OUT_READ_SENSORS_LENMAX 252 +#define MC_CMD_MUM_OUT_READ_SENSORS_LEN(num) (0+4*(num)) +#define MC_CMD_MUM_OUT_READ_SENSORS_DATA_OFST 0 +#define MC_CMD_MUM_OUT_READ_SENSORS_DATA_LEN 4 +#define MC_CMD_MUM_OUT_READ_SENSORS_DATA_MINNUM 1 +#define MC_CMD_MUM_OUT_READ_SENSORS_DATA_MAXNUM 63 +#define MC_CMD_MUM_OUT_READ_SENSORS_READING_LBN 0 +#define MC_CMD_MUM_OUT_READ_SENSORS_READING_WIDTH 16 +#define MC_CMD_MUM_OUT_READ_SENSORS_STATE_LBN 16 +#define MC_CMD_MUM_OUT_READ_SENSORS_STATE_WIDTH 8 +#define MC_CMD_MUM_OUT_READ_SENSORS_TYPE_LBN 24 +#define MC_CMD_MUM_OUT_READ_SENSORS_TYPE_WIDTH 8 + +/* MC_CMD_MUM_OUT_PROGRAM_CLOCKS msgresponse */ +#define MC_CMD_MUM_OUT_PROGRAM_CLOCKS_LEN 4 +#define MC_CMD_MUM_OUT_PROGRAM_CLOCKS_OK_MASK_OFST 0 + +/* MC_CMD_MUM_OUT_FPGA_LOAD msgresponse */ +#define MC_CMD_MUM_OUT_FPGA_LOAD_LEN 0 + +/* MC_CMD_MUM_OUT_READ_ATB_SENSOR msgresponse */ +#define MC_CMD_MUM_OUT_READ_ATB_SENSOR_LEN 4 +#define MC_CMD_MUM_OUT_READ_ATB_SENSOR_RESULT_OFST 0 + +/* MC_CMD_MUM_OUT_QSFP_INIT msgresponse */ +#define MC_CMD_MUM_OUT_QSFP_INIT_LEN 0 + +/* MC_CMD_MUM_OUT_QSFP_RECONFIGURE msgresponse */ +#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_LEN 8 +#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LP_CAP_OFST 0 +#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_FLAGS_OFST 4 +#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_READY_LBN 0 +#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_READY_WIDTH 1 +#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LINK_UP_LBN 1 +#define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LINK_UP_WIDTH 1 + +/* MC_CMD_MUM_OUT_QSFP_GET_SUPPORTED_CAP msgresponse */ +#define MC_CMD_MUM_OUT_QSFP_GET_SUPPORTED_CAP_LEN 4 +#define MC_CMD_MUM_OUT_QSFP_GET_SUPPORTED_CAP_PORT_PHY_LP_CAP_OFST 0 + +/* MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO msgresponse */ +#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LENMIN 5 +#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LENMAX 252 +#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LEN(num) (4+1*(num)) +/* in bytes */ +#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATALEN_OFST 0 +#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_OFST 4 +#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_LEN 1 +#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_MINNUM 1 +#define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_MAXNUM 248 + +/* MC_CMD_MUM_OUT_QSFP_FILL_STATS msgresponse */ +#define MC_CMD_MUM_OUT_QSFP_FILL_STATS_LEN 8 +#define MC_CMD_MUM_OUT_QSFP_FILL_STATS_PORT_PHY_STATS_PMA_PMD_LINK_UP_OFST 0 +#define MC_CMD_MUM_OUT_QSFP_FILL_STATS_PORT_PHY_STATS_PCS_LINK_UP_OFST 4 + +/* MC_CMD_MUM_OUT_QSFP_POLL_BIST msgresponse */ +#define MC_CMD_MUM_OUT_QSFP_POLL_BIST_LEN 4 +#define MC_CMD_MUM_OUT_QSFP_POLL_BIST_TEST_OFST 0 + /* MC_CMD_RESOURCE_SPECIFIER enum */ -#define MC_CMD_RESOURCE_INSTANCE_ANY 0xffffffff /* enum */ -#define MC_CMD_RESOURCE_INSTANCE_NONE 0xfffffffe /* enum */ +/* enum: Any */ +#define MC_CMD_RESOURCE_INSTANCE_ANY 0xffffffff +/* enum: None */ +#define MC_CMD_RESOURCE_INSTANCE_NONE 0xfffffffe + +/* EVB_PORT_ID structuredef */ +#define EVB_PORT_ID_LEN 4 +#define EVB_PORT_ID_PORT_ID_OFST 0 +/* enum: An invalid port handle. */ +#define EVB_PORT_ID_NULL 0x0 +/* enum: The port assigned to this function.. */ +#define EVB_PORT_ID_ASSIGNED 0x1000000 +/* enum: External network port 0 */ +#define EVB_PORT_ID_MAC0 0x2000000 +/* enum: External network port 1 */ +#define EVB_PORT_ID_MAC1 0x2000001 +/* enum: External network port 2 */ +#define EVB_PORT_ID_MAC2 0x2000002 +/* enum: External network port 3 */ +#define EVB_PORT_ID_MAC3 0x2000003 +#define EVB_PORT_ID_PORT_ID_LBN 0 +#define EVB_PORT_ID_PORT_ID_WIDTH 32 + +/* EVB_VLAN_TAG structuredef */ +#define EVB_VLAN_TAG_LEN 2 +/* The VLAN tag value */ +#define EVB_VLAN_TAG_VLAN_ID_LBN 0 +#define EVB_VLAN_TAG_VLAN_ID_WIDTH 12 +#define EVB_VLAN_TAG_MODE_LBN 12 +#define EVB_VLAN_TAG_MODE_WIDTH 4 +/* enum: Insert the VLAN. */ +#define EVB_VLAN_TAG_INSERT 0x0 +/* enum: Replace the VLAN if already present. */ +#define EVB_VLAN_TAG_REPLACE 0x1 + +/* BUFTBL_ENTRY structuredef */ +#define BUFTBL_ENTRY_LEN 12 +/* the owner ID */ +#define BUFTBL_ENTRY_OID_OFST 0 +#define BUFTBL_ENTRY_OID_LEN 2 +#define BUFTBL_ENTRY_OID_LBN 0 +#define BUFTBL_ENTRY_OID_WIDTH 16 +/* the page parameter as one of ESE_DZ_SMC_PAGE_SIZE_ */ +#define BUFTBL_ENTRY_PGSZ_OFST 2 +#define BUFTBL_ENTRY_PGSZ_LEN 2 +#define BUFTBL_ENTRY_PGSZ_LBN 16 +#define BUFTBL_ENTRY_PGSZ_WIDTH 16 +/* the raw 64-bit address field from the SMC, not adjusted for page size */ +#define BUFTBL_ENTRY_RAWADDR_OFST 4 +#define BUFTBL_ENTRY_RAWADDR_LEN 8 +#define BUFTBL_ENTRY_RAWADDR_LO_OFST 4 +#define BUFTBL_ENTRY_RAWADDR_HI_OFST 8 +#define BUFTBL_ENTRY_RAWADDR_LBN 32 +#define BUFTBL_ENTRY_RAWADDR_WIDTH 64 + +/* NVRAM_PARTITION_TYPE structuredef */ +#define NVRAM_PARTITION_TYPE_LEN 2 +#define NVRAM_PARTITION_TYPE_ID_OFST 0 +#define NVRAM_PARTITION_TYPE_ID_LEN 2 +/* enum: Primary MC firmware partition */ +#define NVRAM_PARTITION_TYPE_MC_FIRMWARE 0x100 +/* enum: Secondary MC firmware partition */ +#define NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP 0x200 +/* enum: Expansion ROM partition */ +#define NVRAM_PARTITION_TYPE_EXPANSION_ROM 0x300 +/* enum: Static configuration TLV partition */ +#define NVRAM_PARTITION_TYPE_STATIC_CONFIG 0x400 +/* enum: Dynamic configuration TLV partition */ +#define NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG 0x500 +/* enum: Expansion ROM configuration data for port 0 */ +#define NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT0 0x600 +/* enum: Expansion ROM configuration data for port 1 */ +#define NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT1 0x601 +/* enum: Expansion ROM configuration data for port 2 */ +#define NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT2 0x602 +/* enum: Expansion ROM configuration data for port 3 */ +#define NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT3 0x603 +/* enum: Non-volatile log output partition */ +#define NVRAM_PARTITION_TYPE_LOG 0x700 +/* enum: Device state dump output partition */ +#define NVRAM_PARTITION_TYPE_DUMP 0x800 +/* enum: Application license key storage partition */ +#define NVRAM_PARTITION_TYPE_LICENSE 0x900 +/* enum: Start of range used for PHY partitions (low 8 bits are the PHY ID) */ +#define NVRAM_PARTITION_TYPE_PHY_MIN 0xa00 +/* enum: End of range used for PHY partitions (low 8 bits are the PHY ID) */ +#define NVRAM_PARTITION_TYPE_PHY_MAX 0xaff +/* enum: Primary FPGA partition */ +#define NVRAM_PARTITION_TYPE_FPGA 0xb00 +/* enum: Secondary FPGA partition */ +#define NVRAM_PARTITION_TYPE_FPGA_BACKUP 0xb01 +/* enum: FC firmware partition */ +#define NVRAM_PARTITION_TYPE_FC_FIRMWARE 0xb02 +/* enum: FC License partition */ +#define NVRAM_PARTITION_TYPE_FC_LICENSE 0xb03 +/* enum: Non-volatile log output partition for FC */ +#define NVRAM_PARTITION_TYPE_FC_LOG 0xb04 +/* enum: MUM firmware partition */ +#define NVRAM_PARTITION_TYPE_MUM_FIRMWARE 0xc00 +/* enum: MUM Non-volatile log output partition. */ +#define NVRAM_PARTITION_TYPE_MUM_LOG 0xc01 +/* enum: MUM Application table partition. */ +#define NVRAM_PARTITION_TYPE_MUM_APPTABLE 0xc02 +/* enum: MUM boot rom partition. */ +#define NVRAM_PARTITION_TYPE_MUM_BOOT_ROM 0xc03 +/* enum: MUM production signatures & calibration rom partition. */ +#define NVRAM_PARTITION_TYPE_MUM_PROD_ROM 0xc04 +/* enum: MUM user signatures & calibration rom partition. */ +#define NVRAM_PARTITION_TYPE_MUM_USER_ROM 0xc05 +/* enum: MUM fuses and lockbits partition. */ +#define NVRAM_PARTITION_TYPE_MUM_FUSELOCK 0xc06 +/* enum: Start of reserved value range (firmware may use for any purpose) */ +#define NVRAM_PARTITION_TYPE_RESERVED_VALUES_MIN 0xff00 +/* enum: End of reserved value range (firmware may use for any purpose) */ +#define NVRAM_PARTITION_TYPE_RESERVED_VALUES_MAX 0xfffd +/* enum: Recovery partition map (provided if real map is missing or corrupt) */ +#define NVRAM_PARTITION_TYPE_RECOVERY_MAP 0xfffe +/* enum: Partition map (real map as stored in flash) */ +#define NVRAM_PARTITION_TYPE_PARTITION_MAP 0xffff +#define NVRAM_PARTITION_TYPE_ID_LBN 0 +#define NVRAM_PARTITION_TYPE_ID_WIDTH 16 + +/* LICENSED_APP_ID structuredef */ +#define LICENSED_APP_ID_LEN 4 +#define LICENSED_APP_ID_ID_OFST 0 +/* enum: OpenOnload */ +#define LICENSED_APP_ID_ONLOAD 0x1 +/* enum: PTP timestamping */ +#define LICENSED_APP_ID_PTP 0x2 +/* enum: SolarCapture Pro */ +#define LICENSED_APP_ID_SOLARCAPTURE_PRO 0x4 +/* enum: SolarSecure filter engine */ +#define LICENSED_APP_ID_SOLARSECURE 0x8 +/* enum: Performance monitor */ +#define LICENSED_APP_ID_PERF_MONITOR 0x10 +/* enum: SolarCapture Live */ +#define LICENSED_APP_ID_SOLARCAPTURE_LIVE 0x20 +/* enum: Capture SolarSystem */ +#define LICENSED_APP_ID_CAPTURE_SOLARSYSTEM 0x40 +/* enum: Network Access Control */ +#define LICENSED_APP_ID_NETWORK_ACCESS_CONTROL 0x80 +#define LICENSED_APP_ID_ID_LBN 0 +#define LICENSED_APP_ID_ID_WIDTH 32 + +/* TX_TIMESTAMP_EVENT structuredef */ +#define TX_TIMESTAMP_EVENT_LEN 6 +/* lower 16 bits of timestamp data */ +#define TX_TIMESTAMP_EVENT_TSTAMP_DATA_LO_OFST 0 +#define TX_TIMESTAMP_EVENT_TSTAMP_DATA_LO_LEN 2 +#define TX_TIMESTAMP_EVENT_TSTAMP_DATA_LO_LBN 0 +#define TX_TIMESTAMP_EVENT_TSTAMP_DATA_LO_WIDTH 16 +/* Type of TX event, ordinary TX completion, low or high part of TX timestamp + */ +#define TX_TIMESTAMP_EVENT_TX_EV_TYPE_OFST 3 +#define TX_TIMESTAMP_EVENT_TX_EV_TYPE_LEN 1 +/* enum: This is a TX completion event, not a timestamp */ +#define TX_TIMESTAMP_EVENT_TX_EV_COMPLETION 0x0 +/* enum: This is the low part of a TX timestamp event */ +#define TX_TIMESTAMP_EVENT_TX_EV_TSTAMP_LO 0x51 +/* enum: This is the high part of a TX timestamp event */ +#define TX_TIMESTAMP_EVENT_TX_EV_TSTAMP_HI 0x52 +#define TX_TIMESTAMP_EVENT_TX_EV_TYPE_LBN 24 +#define TX_TIMESTAMP_EVENT_TX_EV_TYPE_WIDTH 8 +/* upper 16 bits of timestamp data */ +#define TX_TIMESTAMP_EVENT_TSTAMP_DATA_HI_OFST 4 +#define TX_TIMESTAMP_EVENT_TSTAMP_DATA_HI_LEN 2 +#define TX_TIMESTAMP_EVENT_TSTAMP_DATA_HI_LBN 32 +#define TX_TIMESTAMP_EVENT_TSTAMP_DATA_HI_WIDTH 16 + +/* RSS_MODE structuredef */ +#define RSS_MODE_LEN 1 +/* The RSS mode for a particular packet type is a value from 0 - 15 which can + * be considered as 4 bits selecting which fields are included in the hash. (A + * value 0 effectively disables RSS spreading for the packet type.) The YAML + * generation tools require this structure to be a whole number of bytes wide, + * but only 4 bits are relevant. + */ +#define RSS_MODE_HASH_SELECTOR_OFST 0 +#define RSS_MODE_HASH_SELECTOR_LEN 1 +#define RSS_MODE_HASH_SRC_ADDR_LBN 0 +#define RSS_MODE_HASH_SRC_ADDR_WIDTH 1 +#define RSS_MODE_HASH_DST_ADDR_LBN 1 +#define RSS_MODE_HASH_DST_ADDR_WIDTH 1 +#define RSS_MODE_HASH_SRC_PORT_LBN 2 +#define RSS_MODE_HASH_SRC_PORT_WIDTH 1 +#define RSS_MODE_HASH_DST_PORT_LBN 3 +#define RSS_MODE_HASH_DST_PORT_WIDTH 1 +#define RSS_MODE_HASH_SELECTOR_LBN 0 +#define RSS_MODE_HASH_SELECTOR_WIDTH 8 /***********************************/ -/* MC_CMD_INIT_EVQ +/* MC_CMD_READ_REGS + * Get a dump of the MCPU registers */ -#define MC_CMD_INIT_EVQ 0x50 +#define MC_CMD_READ_REGS 0x50 +#undef MC_CMD_0x50_PRIVILEGE_CTG + +#define MC_CMD_0x50_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_READ_REGS_IN msgrequest */ +#define MC_CMD_READ_REGS_IN_LEN 0 + +/* MC_CMD_READ_REGS_OUT msgresponse */ +#define MC_CMD_READ_REGS_OUT_LEN 308 +/* Whether the corresponding register entry contains a valid value */ +#define MC_CMD_READ_REGS_OUT_MASK_OFST 0 +#define MC_CMD_READ_REGS_OUT_MASK_LEN 16 +/* Same order as MIPS GDB (r0-r31, sr, lo, hi, bad, cause, 32 x float, fsr, + * fir, fp) + */ +#define MC_CMD_READ_REGS_OUT_REGS_OFST 16 +#define MC_CMD_READ_REGS_OUT_REGS_LEN 4 +#define MC_CMD_READ_REGS_OUT_REGS_NUM 73 + + +/***********************************/ +/* MC_CMD_INIT_EVQ + * Set up an event queue according to the supplied parameters. The IN arguments + * end with an address for each 4k of host memory required to back the EVQ. + */ +#define MC_CMD_INIT_EVQ 0x80 +#undef MC_CMD_0x80_PRIVILEGE_CTG + +#define MC_CMD_0x80_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_INIT_EVQ_IN msgrequest */ -#define MC_CMD_INIT_EVQ_IN_LENMIN 36 -#define MC_CMD_INIT_EVQ_IN_LENMAX 540 -#define MC_CMD_INIT_EVQ_IN_LEN(num) (28+8*(num)) +#define MC_CMD_INIT_EVQ_IN_LENMIN 44 +#define MC_CMD_INIT_EVQ_IN_LENMAX 548 +#define MC_CMD_INIT_EVQ_IN_LEN(num) (36+8*(num)) +/* Size, in entries */ #define MC_CMD_INIT_EVQ_IN_SIZE_OFST 0 +/* Desired instance. Must be set to a specific instance, which is a function + * local queue index. + */ #define MC_CMD_INIT_EVQ_IN_INSTANCE_OFST 4 +/* The initial timer value. The load value is ignored if the timer mode is DIS. + */ #define MC_CMD_INIT_EVQ_IN_TMR_LOAD_OFST 8 +/* The reload value is ignored in one-shot modes */ #define MC_CMD_INIT_EVQ_IN_TMR_RELOAD_OFST 12 +/* tbd */ #define MC_CMD_INIT_EVQ_IN_FLAGS_OFST 16 #define MC_CMD_INIT_EVQ_IN_FLAG_INTERRUPTING_LBN 0 #define MC_CMD_INIT_EVQ_IN_FLAG_INTERRUPTING_WIDTH 1 #define MC_CMD_INIT_EVQ_IN_FLAG_RPTR_DOS_LBN 1 #define MC_CMD_INIT_EVQ_IN_FLAG_RPTR_DOS_WIDTH 1 +#define MC_CMD_INIT_EVQ_IN_FLAG_INT_ARMD_LBN 2 +#define MC_CMD_INIT_EVQ_IN_FLAG_INT_ARMD_WIDTH 1 +#define MC_CMD_INIT_EVQ_IN_FLAG_CUT_THRU_LBN 3 +#define MC_CMD_INIT_EVQ_IN_FLAG_CUT_THRU_WIDTH 1 +#define MC_CMD_INIT_EVQ_IN_FLAG_RX_MERGE_LBN 4 +#define MC_CMD_INIT_EVQ_IN_FLAG_RX_MERGE_WIDTH 1 +#define MC_CMD_INIT_EVQ_IN_FLAG_TX_MERGE_LBN 5 +#define MC_CMD_INIT_EVQ_IN_FLAG_TX_MERGE_WIDTH 1 #define MC_CMD_INIT_EVQ_IN_TMR_MODE_OFST 20 -#define MC_CMD_INIT_EVQ_IN_TMR_MODE_DIS 0x0 /* enum */ -#define MC_CMD_INIT_EVQ_IN_TMR_IMMED_START 0x1 /* enum */ -#define MC_CMD_INIT_EVQ_IN_TMR_TRIG_START 0x2 /* enum */ -#define MC_CMD_INIT_EVQ_IN_TMR_INT_HLDOFF 0x3 /* enum */ +/* enum: Disabled */ +#define MC_CMD_INIT_EVQ_IN_TMR_MODE_DIS 0x0 +/* enum: Immediate */ +#define MC_CMD_INIT_EVQ_IN_TMR_IMMED_START 0x1 +/* enum: Triggered */ +#define MC_CMD_INIT_EVQ_IN_TMR_TRIG_START 0x2 +/* enum: Hold-off */ +#define MC_CMD_INIT_EVQ_IN_TMR_INT_HLDOFF 0x3 +/* Target EVQ for wakeups if in wakeup mode. */ #define MC_CMD_INIT_EVQ_IN_TARGET_EVQ_OFST 24 +/* Target interrupt if in interrupting mode (note union with target EVQ). Use + * MC_CMD_RESOURCE_INSTANCE_ANY unless a specific one required for test + * purposes. + */ #define MC_CMD_INIT_EVQ_IN_IRQ_NUM_OFST 24 -#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_OFST 28 +/* Event Counter Mode. */ +#define MC_CMD_INIT_EVQ_IN_COUNT_MODE_OFST 28 +/* enum: Disabled */ +#define MC_CMD_INIT_EVQ_IN_COUNT_MODE_DIS 0x0 +/* enum: Disabled */ +#define MC_CMD_INIT_EVQ_IN_COUNT_MODE_RX 0x1 +/* enum: Disabled */ +#define MC_CMD_INIT_EVQ_IN_COUNT_MODE_TX 0x2 +/* enum: Disabled */ +#define MC_CMD_INIT_EVQ_IN_COUNT_MODE_RXTX 0x3 +/* Event queue packet count threshold. */ +#define MC_CMD_INIT_EVQ_IN_COUNT_THRSHLD_OFST 32 +/* 64-bit address of 4k of 4k-aligned host memory buffer */ +#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_OFST 36 #define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LEN 8 -#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_OFST 28 -#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_OFST 32 +#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_OFST 36 +#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_OFST 40 #define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MINNUM 1 #define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MAXNUM 64 /* MC_CMD_INIT_EVQ_OUT msgresponse */ #define MC_CMD_INIT_EVQ_OUT_LEN 4 +/* Only valid if INTRFLAG was true */ #define MC_CMD_INIT_EVQ_OUT_IRQ_OFST 0 /* QUEUE_CRC_MODE structuredef */ #define QUEUE_CRC_MODE_LEN 1 #define QUEUE_CRC_MODE_MODE_LBN 0 #define QUEUE_CRC_MODE_MODE_WIDTH 4 -#define QUEUE_CRC_MODE_NONE 0x0 /* enum */ -#define QUEUE_CRC_MODE_FCOE 0x1 /* enum */ -#define QUEUE_CRC_MODE_ISCSI_HDR 0x2 /* enum */ -#define QUEUE_CRC_MODE_ISCSI 0x3 /* enum */ -#define QUEUE_CRC_MODE_FCOIPOE 0x4 /* enum */ -#define QUEUE_CRC_MODE_MPA 0x5 /* enum */ +/* enum: No CRC. */ +#define QUEUE_CRC_MODE_NONE 0x0 +/* enum: CRC Fiber channel over ethernet. */ +#define QUEUE_CRC_MODE_FCOE 0x1 +/* enum: CRC (digest) iSCSI header only. */ +#define QUEUE_CRC_MODE_ISCSI_HDR 0x2 +/* enum: CRC (digest) iSCSI header and payload. */ +#define QUEUE_CRC_MODE_ISCSI 0x3 +/* enum: CRC Fiber channel over IP over ethernet. */ +#define QUEUE_CRC_MODE_FCOIPOE 0x4 +/* enum: CRC MPA. */ +#define QUEUE_CRC_MODE_MPA 0x5 #define QUEUE_CRC_MODE_SPARE_LBN 4 #define QUEUE_CRC_MODE_SPARE_WIDTH 4 /***********************************/ -/* MC_CMD_INIT_RXQ +/* MC_CMD_INIT_RXQ + * set up a receive queue according to the supplied parameters. The IN + * arguments end with an address for each 4k of host memory required to back + * the RXQ. */ -#define MC_CMD_INIT_RXQ 0x51 +#define MC_CMD_INIT_RXQ 0x81 +#undef MC_CMD_0x81_PRIVILEGE_CTG -/* MC_CMD_INIT_RXQ_IN msgrequest */ -#define MC_CMD_INIT_RXQ_IN_LENMIN 32 -#define MC_CMD_INIT_RXQ_IN_LENMAX 248 -#define MC_CMD_INIT_RXQ_IN_LEN(num) (24+8*(num)) +#define MC_CMD_0x81_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_INIT_RXQ_IN msgrequest: Legacy RXQ_INIT request. Use extended version + * in new code. + */ +#define MC_CMD_INIT_RXQ_IN_LENMIN 36 +#define MC_CMD_INIT_RXQ_IN_LENMAX 252 +#define MC_CMD_INIT_RXQ_IN_LEN(num) (28+8*(num)) +/* Size, in entries */ #define MC_CMD_INIT_RXQ_IN_SIZE_OFST 0 +/* The EVQ to send events to. This is an index originally specified to INIT_EVQ + */ #define MC_CMD_INIT_RXQ_IN_TARGET_EVQ_OFST 4 +/* The value to put in the event data. Check hardware spec. for valid range. */ #define MC_CMD_INIT_RXQ_IN_LABEL_OFST 8 +/* Desired instance. Must be set to a specific instance, which is a function + * local queue index. + */ #define MC_CMD_INIT_RXQ_IN_INSTANCE_OFST 12 +/* There will be more flags here. */ #define MC_CMD_INIT_RXQ_IN_FLAGS_OFST 16 #define MC_CMD_INIT_RXQ_IN_FLAG_BUFF_MODE_LBN 0 #define MC_CMD_INIT_RXQ_IN_FLAG_BUFF_MODE_WIDTH 1 #define MC_CMD_INIT_RXQ_IN_FLAG_HDR_SPLIT_LBN 1 #define MC_CMD_INIT_RXQ_IN_FLAG_HDR_SPLIT_WIDTH 1 -#define MC_CMD_INIT_RXQ_IN_FLAG_PKT_EDIT_LBN 2 -#define MC_CMD_INIT_RXQ_IN_FLAG_PKT_EDIT_WIDTH 1 +#define MC_CMD_INIT_RXQ_IN_FLAG_TIMESTAMP_LBN 2 +#define MC_CMD_INIT_RXQ_IN_FLAG_TIMESTAMP_WIDTH 1 #define MC_CMD_INIT_RXQ_IN_CRC_MODE_LBN 3 #define MC_CMD_INIT_RXQ_IN_CRC_MODE_WIDTH 4 +#define MC_CMD_INIT_RXQ_IN_FLAG_CHAIN_LBN 7 +#define MC_CMD_INIT_RXQ_IN_FLAG_CHAIN_WIDTH 1 +#define MC_CMD_INIT_RXQ_IN_FLAG_PREFIX_LBN 8 +#define MC_CMD_INIT_RXQ_IN_FLAG_PREFIX_WIDTH 1 +#define MC_CMD_INIT_RXQ_IN_FLAG_DISABLE_SCATTER_LBN 9 +#define MC_CMD_INIT_RXQ_IN_FLAG_DISABLE_SCATTER_WIDTH 1 +/* Owner ID to use if in buffer mode (zero if physical) */ #define MC_CMD_INIT_RXQ_IN_OWNER_ID_OFST 20 -#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_OFST 24 +/* The port ID associated with the v-adaptor which should contain this DMAQ. */ +#define MC_CMD_INIT_RXQ_IN_PORT_ID_OFST 24 +/* 64-bit address of 4k of 4k-aligned host memory buffer */ +#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_OFST 28 #define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LEN 8 -#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_OFST 24 -#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_OFST 28 +#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_OFST 28 +#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_OFST 32 #define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MINNUM 1 #define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MAXNUM 28 +/* MC_CMD_INIT_RXQ_EXT_IN msgrequest: Extended RXQ_INIT with additional mode + * flags + */ +#define MC_CMD_INIT_RXQ_EXT_IN_LEN 544 +/* Size, in entries */ +#define MC_CMD_INIT_RXQ_EXT_IN_SIZE_OFST 0 +/* The EVQ to send events to. This is an index originally specified to INIT_EVQ + */ +#define MC_CMD_INIT_RXQ_EXT_IN_TARGET_EVQ_OFST 4 +/* The value to put in the event data. Check hardware spec. for valid range. */ +#define MC_CMD_INIT_RXQ_EXT_IN_LABEL_OFST 8 +/* Desired instance. Must be set to a specific instance, which is a function + * local queue index. + */ +#define MC_CMD_INIT_RXQ_EXT_IN_INSTANCE_OFST 12 +/* There will be more flags here. */ +#define MC_CMD_INIT_RXQ_EXT_IN_FLAGS_OFST 16 +#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_BUFF_MODE_LBN 0 +#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_BUFF_MODE_WIDTH 1 +#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_HDR_SPLIT_LBN 1 +#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_HDR_SPLIT_WIDTH 1 +#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_TIMESTAMP_LBN 2 +#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_TIMESTAMP_WIDTH 1 +#define MC_CMD_INIT_RXQ_EXT_IN_CRC_MODE_LBN 3 +#define MC_CMD_INIT_RXQ_EXT_IN_CRC_MODE_WIDTH 4 +#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_CHAIN_LBN 7 +#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_CHAIN_WIDTH 1 +#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_PREFIX_LBN 8 +#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_PREFIX_WIDTH 1 +#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_DISABLE_SCATTER_LBN 9 +#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_DISABLE_SCATTER_WIDTH 1 +#define MC_CMD_INIT_RXQ_EXT_IN_DMA_MODE_LBN 10 +#define MC_CMD_INIT_RXQ_EXT_IN_DMA_MODE_WIDTH 4 +/* enum: One packet per descriptor (for normal networking) */ +#define MC_CMD_INIT_RXQ_EXT_IN_SINGLE_PACKET 0x0 +/* enum: Pack multiple packets into large descriptors (for SolarCapture) */ +#define MC_CMD_INIT_RXQ_EXT_IN_PACKED_STREAM 0x1 +#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_SNAPSHOT_MODE_LBN 14 +#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_SNAPSHOT_MODE_WIDTH 1 +#define MC_CMD_INIT_RXQ_EXT_IN_PACKED_STREAM_BUFF_SIZE_LBN 15 +#define MC_CMD_INIT_RXQ_EXT_IN_PACKED_STREAM_BUFF_SIZE_WIDTH 3 +#define MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_1M 0x0 /* enum */ +#define MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_512K 0x1 /* enum */ +#define MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_256K 0x2 /* enum */ +#define MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_128K 0x3 /* enum */ +#define MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_64K 0x4 /* enum */ +#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_WANT_OUTER_CLASSES_LBN 18 +#define MC_CMD_INIT_RXQ_EXT_IN_FLAG_WANT_OUTER_CLASSES_WIDTH 1 +/* Owner ID to use if in buffer mode (zero if physical) */ +#define MC_CMD_INIT_RXQ_EXT_IN_OWNER_ID_OFST 20 +/* The port ID associated with the v-adaptor which should contain this DMAQ. */ +#define MC_CMD_INIT_RXQ_EXT_IN_PORT_ID_OFST 24 +/* 64-bit address of 4k of 4k-aligned host memory buffer */ +#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_OFST 28 +#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LEN 8 +#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_OFST 28 +#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_OFST 32 +#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_NUM 64 +/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */ +#define MC_CMD_INIT_RXQ_EXT_IN_SNAPSHOT_LENGTH_OFST 540 + /* MC_CMD_INIT_RXQ_OUT msgresponse */ #define MC_CMD_INIT_RXQ_OUT_LEN 0 +/* MC_CMD_INIT_RXQ_EXT_OUT msgresponse */ +#define MC_CMD_INIT_RXQ_EXT_OUT_LEN 0 + /***********************************/ -/* MC_CMD_INIT_TXQ +/* MC_CMD_INIT_TXQ */ -#define MC_CMD_INIT_TXQ 0x52 +#define MC_CMD_INIT_TXQ 0x82 +#undef MC_CMD_0x82_PRIVILEGE_CTG -/* MC_CMD_INIT_TXQ_IN msgrequest */ -#define MC_CMD_INIT_TXQ_IN_LENMIN 32 -#define MC_CMD_INIT_TXQ_IN_LENMAX 248 -#define MC_CMD_INIT_TXQ_IN_LEN(num) (24+8*(num)) +#define MC_CMD_0x82_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_INIT_TXQ_IN msgrequest: Legacy INIT_TXQ request. Use extended version + * in new code. + */ +#define MC_CMD_INIT_TXQ_IN_LENMIN 36 +#define MC_CMD_INIT_TXQ_IN_LENMAX 252 +#define MC_CMD_INIT_TXQ_IN_LEN(num) (28+8*(num)) +/* Size, in entries */ #define MC_CMD_INIT_TXQ_IN_SIZE_OFST 0 +/* The EVQ to send events to. This is an index originally specified to + * INIT_EVQ. + */ #define MC_CMD_INIT_TXQ_IN_TARGET_EVQ_OFST 4 +/* The value to put in the event data. Check hardware spec. for valid range. */ #define MC_CMD_INIT_TXQ_IN_LABEL_OFST 8 +/* Desired instance. Must be set to a specific instance, which is a function + * local queue index. + */ #define MC_CMD_INIT_TXQ_IN_INSTANCE_OFST 12 +/* There will be more flags here. */ #define MC_CMD_INIT_TXQ_IN_FLAGS_OFST 16 #define MC_CMD_INIT_TXQ_IN_FLAG_BUFF_MODE_LBN 0 #define MC_CMD_INIT_TXQ_IN_FLAG_BUFF_MODE_WIDTH 1 @@ -4587,25 +7817,101 @@ #define MC_CMD_INIT_TXQ_IN_FLAG_TCP_UDP_ONLY_WIDTH 1 #define MC_CMD_INIT_TXQ_IN_CRC_MODE_LBN 4 #define MC_CMD_INIT_TXQ_IN_CRC_MODE_WIDTH 4 +#define MC_CMD_INIT_TXQ_IN_FLAG_TIMESTAMP_LBN 8 +#define MC_CMD_INIT_TXQ_IN_FLAG_TIMESTAMP_WIDTH 1 +#define MC_CMD_INIT_TXQ_IN_FLAG_PACER_BYPASS_LBN 9 +#define MC_CMD_INIT_TXQ_IN_FLAG_PACER_BYPASS_WIDTH 1 +#define MC_CMD_INIT_TXQ_IN_FLAG_INNER_IP_CSUM_EN_LBN 10 +#define MC_CMD_INIT_TXQ_IN_FLAG_INNER_IP_CSUM_EN_WIDTH 1 +#define MC_CMD_INIT_TXQ_IN_FLAG_INNER_TCP_CSUM_EN_LBN 11 +#define MC_CMD_INIT_TXQ_IN_FLAG_INNER_TCP_CSUM_EN_WIDTH 1 +/* Owner ID to use if in buffer mode (zero if physical) */ #define MC_CMD_INIT_TXQ_IN_OWNER_ID_OFST 20 -#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_OFST 24 +/* The port ID associated with the v-adaptor which should contain this DMAQ. */ +#define MC_CMD_INIT_TXQ_IN_PORT_ID_OFST 24 +/* 64-bit address of 4k of 4k-aligned host memory buffer */ +#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_OFST 28 #define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LEN 8 -#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_OFST 24 -#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_OFST 28 +#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_OFST 28 +#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_OFST 32 #define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MINNUM 1 #define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MAXNUM 28 +/* MC_CMD_INIT_TXQ_EXT_IN msgrequest: Extended INIT_TXQ with additional mode + * flags + */ +#define MC_CMD_INIT_TXQ_EXT_IN_LEN 544 +/* Size, in entries */ +#define MC_CMD_INIT_TXQ_EXT_IN_SIZE_OFST 0 +/* The EVQ to send events to. This is an index originally specified to + * INIT_EVQ. + */ +#define MC_CMD_INIT_TXQ_EXT_IN_TARGET_EVQ_OFST 4 +/* The value to put in the event data. Check hardware spec. for valid range. */ +#define MC_CMD_INIT_TXQ_EXT_IN_LABEL_OFST 8 +/* Desired instance. Must be set to a specific instance, which is a function + * local queue index. + */ +#define MC_CMD_INIT_TXQ_EXT_IN_INSTANCE_OFST 12 +/* There will be more flags here. */ +#define MC_CMD_INIT_TXQ_EXT_IN_FLAGS_OFST 16 +#define MC_CMD_INIT_TXQ_EXT_IN_FLAG_BUFF_MODE_LBN 0 +#define MC_CMD_INIT_TXQ_EXT_IN_FLAG_BUFF_MODE_WIDTH 1 +#define MC_CMD_INIT_TXQ_EXT_IN_FLAG_IP_CSUM_DIS_LBN 1 +#define MC_CMD_INIT_TXQ_EXT_IN_FLAG_IP_CSUM_DIS_WIDTH 1 +#define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TCP_CSUM_DIS_LBN 2 +#define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TCP_CSUM_DIS_WIDTH 1 +#define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TCP_UDP_ONLY_LBN 3 +#define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TCP_UDP_ONLY_WIDTH 1 +#define MC_CMD_INIT_TXQ_EXT_IN_CRC_MODE_LBN 4 +#define MC_CMD_INIT_TXQ_EXT_IN_CRC_MODE_WIDTH 4 +#define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TIMESTAMP_LBN 8 +#define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TIMESTAMP_WIDTH 1 +#define MC_CMD_INIT_TXQ_EXT_IN_FLAG_PACER_BYPASS_LBN 9 +#define MC_CMD_INIT_TXQ_EXT_IN_FLAG_PACER_BYPASS_WIDTH 1 +#define MC_CMD_INIT_TXQ_EXT_IN_FLAG_INNER_IP_CSUM_EN_LBN 10 +#define MC_CMD_INIT_TXQ_EXT_IN_FLAG_INNER_IP_CSUM_EN_WIDTH 1 +#define MC_CMD_INIT_TXQ_EXT_IN_FLAG_INNER_TCP_CSUM_EN_LBN 11 +#define MC_CMD_INIT_TXQ_EXT_IN_FLAG_INNER_TCP_CSUM_EN_WIDTH 1 +/* Owner ID to use if in buffer mode (zero if physical) */ +#define MC_CMD_INIT_TXQ_EXT_IN_OWNER_ID_OFST 20 +/* The port ID associated with the v-adaptor which should contain this DMAQ. */ +#define MC_CMD_INIT_TXQ_EXT_IN_PORT_ID_OFST 24 +/* 64-bit address of 4k of 4k-aligned host memory buffer */ +#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_OFST 28 +#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LEN 8 +#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_OFST 28 +#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_OFST 32 +#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MINNUM 1 +#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MAXNUM 64 +/* Flags related to Qbb flow control mode. */ +#define MC_CMD_INIT_TXQ_EXT_IN_QBB_FLAGS_OFST 540 +#define MC_CMD_INIT_TXQ_EXT_IN_QBB_ENABLE_LBN 0 +#define MC_CMD_INIT_TXQ_EXT_IN_QBB_ENABLE_WIDTH 1 +#define MC_CMD_INIT_TXQ_EXT_IN_QBB_PRIORITY_LBN 1 +#define MC_CMD_INIT_TXQ_EXT_IN_QBB_PRIORITY_WIDTH 3 + /* MC_CMD_INIT_TXQ_OUT msgresponse */ #define MC_CMD_INIT_TXQ_OUT_LEN 0 /***********************************/ -/* MC_CMD_FINI_EVQ +/* MC_CMD_FINI_EVQ + * Teardown an EVQ. + * + * All DMAQs or EVQs that point to the EVQ to tear down must be torn down first + * or the operation will fail with EBUSY */ -#define MC_CMD_FINI_EVQ 0x55 +#define MC_CMD_FINI_EVQ 0x83 +#undef MC_CMD_0x83_PRIVILEGE_CTG + +#define MC_CMD_0x83_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_FINI_EVQ_IN msgrequest */ #define MC_CMD_FINI_EVQ_IN_LEN 4 +/* Instance of EVQ to destroy. Should be the same instance as that previously + * passed to INIT_EVQ + */ #define MC_CMD_FINI_EVQ_IN_INSTANCE_OFST 0 /* MC_CMD_FINI_EVQ_OUT msgresponse */ @@ -4613,12 +7919,17 @@ /***********************************/ -/* MC_CMD_FINI_RXQ +/* MC_CMD_FINI_RXQ + * Teardown a RXQ. */ -#define MC_CMD_FINI_RXQ 0x56 +#define MC_CMD_FINI_RXQ 0x84 +#undef MC_CMD_0x84_PRIVILEGE_CTG + +#define MC_CMD_0x84_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_FINI_RXQ_IN msgrequest */ #define MC_CMD_FINI_RXQ_IN_LEN 4 +/* Instance of RXQ to destroy */ #define MC_CMD_FINI_RXQ_IN_INSTANCE_OFST 0 /* MC_CMD_FINI_RXQ_OUT msgresponse */ @@ -4626,12 +7937,17 @@ /***********************************/ -/* MC_CMD_FINI_TXQ +/* MC_CMD_FINI_TXQ + * Teardown a TXQ. */ -#define MC_CMD_FINI_TXQ 0x57 +#define MC_CMD_FINI_TXQ 0x85 +#undef MC_CMD_0x85_PRIVILEGE_CTG + +#define MC_CMD_0x85_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_FINI_TXQ_IN msgrequest */ #define MC_CMD_FINI_TXQ_IN_LEN 4 +/* Instance of TXQ to destroy */ #define MC_CMD_FINI_TXQ_IN_INSTANCE_OFST 0 /* MC_CMD_FINI_TXQ_OUT msgresponse */ @@ -4639,102 +7955,247 @@ /***********************************/ -/* MC_CMD_DRIVER_EVENT +/* MC_CMD_DRIVER_EVENT + * Generate an event on an EVQ belonging to the function issuing the command. */ -#define MC_CMD_DRIVER_EVENT 0x5a +#define MC_CMD_DRIVER_EVENT 0x86 +#undef MC_CMD_0x86_PRIVILEGE_CTG + +#define MC_CMD_0x86_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_DRIVER_EVENT_IN msgrequest */ #define MC_CMD_DRIVER_EVENT_IN_LEN 12 +/* Handle of target EVQ */ #define MC_CMD_DRIVER_EVENT_IN_EVQ_OFST 0 +/* Bits 0 - 63 of event */ #define MC_CMD_DRIVER_EVENT_IN_DATA_OFST 4 #define MC_CMD_DRIVER_EVENT_IN_DATA_LEN 8 #define MC_CMD_DRIVER_EVENT_IN_DATA_LO_OFST 4 #define MC_CMD_DRIVER_EVENT_IN_DATA_HI_OFST 8 +/* MC_CMD_DRIVER_EVENT_OUT msgresponse */ +#define MC_CMD_DRIVER_EVENT_OUT_LEN 0 + /***********************************/ -/* MC_CMD_PROXY_CMD +/* MC_CMD_PROXY_CMD + * Execute an arbitrary MCDI command on behalf of a different function, subject + * to security restrictions. The command to be proxied follows immediately + * afterward in the host buffer (or on the UART). This command supercedes + * MC_CMD_SET_FUNC, which remains available for Siena but now deprecated. */ -#define MC_CMD_PROXY_CMD 0x5b +#define MC_CMD_PROXY_CMD 0x5b +#undef MC_CMD_0x5b_PRIVILEGE_CTG + +#define MC_CMD_0x5b_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_PROXY_CMD_IN msgrequest */ #define MC_CMD_PROXY_CMD_IN_LEN 4 +/* The handle of the target function. */ #define MC_CMD_PROXY_CMD_IN_TARGET_OFST 0 +#define MC_CMD_PROXY_CMD_IN_TARGET_PF_LBN 0 +#define MC_CMD_PROXY_CMD_IN_TARGET_PF_WIDTH 16 +#define MC_CMD_PROXY_CMD_IN_TARGET_VF_LBN 16 +#define MC_CMD_PROXY_CMD_IN_TARGET_VF_WIDTH 16 +#define MC_CMD_PROXY_CMD_IN_VF_NULL 0xffff /* enum */ + +/* MC_CMD_PROXY_CMD_OUT msgresponse */ +#define MC_CMD_PROXY_CMD_OUT_LEN 0 + +/* MC_PROXY_STATUS_BUFFER structuredef: Host memory status buffer used to + * manage proxied requests + */ +#define MC_PROXY_STATUS_BUFFER_LEN 16 +/* Handle allocated by the firmware for this proxy transaction */ +#define MC_PROXY_STATUS_BUFFER_HANDLE_OFST 0 +/* enum: An invalid handle. */ +#define MC_PROXY_STATUS_BUFFER_HANDLE_INVALID 0x0 +#define MC_PROXY_STATUS_BUFFER_HANDLE_LBN 0 +#define MC_PROXY_STATUS_BUFFER_HANDLE_WIDTH 32 +/* The requesting physical function number */ +#define MC_PROXY_STATUS_BUFFER_PF_OFST 4 +#define MC_PROXY_STATUS_BUFFER_PF_LEN 2 +#define MC_PROXY_STATUS_BUFFER_PF_LBN 32 +#define MC_PROXY_STATUS_BUFFER_PF_WIDTH 16 +/* The requesting virtual function number. Set to VF_NULL if the target is a + * PF. + */ +#define MC_PROXY_STATUS_BUFFER_VF_OFST 6 +#define MC_PROXY_STATUS_BUFFER_VF_LEN 2 +#define MC_PROXY_STATUS_BUFFER_VF_LBN 48 +#define MC_PROXY_STATUS_BUFFER_VF_WIDTH 16 +/* The target function RID. */ +#define MC_PROXY_STATUS_BUFFER_RID_OFST 8 +#define MC_PROXY_STATUS_BUFFER_RID_LEN 2 +#define MC_PROXY_STATUS_BUFFER_RID_LBN 64 +#define MC_PROXY_STATUS_BUFFER_RID_WIDTH 16 +/* The status of the proxy as described in MC_CMD_PROXY_COMPLETE. */ +#define MC_PROXY_STATUS_BUFFER_STATUS_OFST 10 +#define MC_PROXY_STATUS_BUFFER_STATUS_LEN 2 +#define MC_PROXY_STATUS_BUFFER_STATUS_LBN 80 +#define MC_PROXY_STATUS_BUFFER_STATUS_WIDTH 16 +/* If a request is authorized rather than carried out by the host, this is the + * elevated privilege mask granted to the requesting function. + */ +#define MC_PROXY_STATUS_BUFFER_GRANTED_PRIVILEGES_OFST 12 +#define MC_PROXY_STATUS_BUFFER_GRANTED_PRIVILEGES_LBN 96 +#define MC_PROXY_STATUS_BUFFER_GRANTED_PRIVILEGES_WIDTH 32 /***********************************/ -/* MC_CMD_ALLOC_OWNER_IDS +/* MC_CMD_PROXY_CONFIGURE + * Enable/disable authorization of MCDI requests from unprivileged functions by + * a designated admin function */ -#define MC_CMD_ALLOC_OWNER_IDS 0x54 +#define MC_CMD_PROXY_CONFIGURE 0x58 +#undef MC_CMD_0x58_PRIVILEGE_CTG -/* MC_CMD_ALLOC_OWNER_IDS_IN msgrequest */ -#define MC_CMD_ALLOC_OWNER_IDS_IN_LEN 4 -#define MC_CMD_ALLOC_OWNER_IDS_IN_NIDS_OFST 0 +#define MC_CMD_0x58_PRIVILEGE_CTG SRIOV_CTG_ADMIN -/* MC_CMD_ALLOC_OWNER_IDS_OUT msgresponse */ -#define MC_CMD_ALLOC_OWNER_IDS_OUT_LEN 12 -#define MC_CMD_ALLOC_OWNER_IDS_OUT_HANDLE_OFST 0 -#define MC_CMD_ALLOC_OWNER_IDS_OUT_NIDS_OFST 4 -#define MC_CMD_ALLOC_OWNER_IDS_OUT_BASE_OFST 8 +/* MC_CMD_PROXY_CONFIGURE_IN msgrequest */ +#define MC_CMD_PROXY_CONFIGURE_IN_LEN 108 +#define MC_CMD_PROXY_CONFIGURE_IN_FLAGS_OFST 0 +#define MC_CMD_PROXY_CONFIGURE_IN_ENABLE_LBN 0 +#define MC_CMD_PROXY_CONFIGURE_IN_ENABLE_WIDTH 1 +/* Host provides a contiguous memory buffer that contains at least NUM_BLOCKS + * of blocks, each of the size REQUEST_BLOCK_SIZE. + */ +#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_OFST 4 +#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LEN 8 +#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_OFST 4 +#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_OFST 8 +/* Must be a power of 2 */ +#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BLOCK_SIZE_OFST 12 +/* Host provides a contiguous memory buffer that contains at least NUM_BLOCKS + * of blocks, each of the size REPLY_BLOCK_SIZE. + */ +#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_OFST 16 +#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LEN 8 +#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_OFST 16 +#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_OFST 20 +/* Must be a power of 2 */ +#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BLOCK_SIZE_OFST 24 +/* Host provides a contiguous memory buffer that contains at least NUM_BLOCKS + * of blocks, each of the size STATUS_BLOCK_SIZE. This buffer is only needed if + * host intends to complete proxied operations by using MC_CMD_PROXY_CMD. + */ +#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_OFST 28 +#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LEN 8 +#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_OFST 28 +#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_OFST 32 +/* Must be a power of 2, or zero if this buffer is not provided */ +#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BLOCK_SIZE_OFST 36 +/* Applies to all three buffers */ +#define MC_CMD_PROXY_CONFIGURE_IN_NUM_BLOCKS_OFST 40 +/* A bit mask defining which MCDI operations may be proxied */ +#define MC_CMD_PROXY_CONFIGURE_IN_ALLOWED_MCDI_MASK_OFST 44 +#define MC_CMD_PROXY_CONFIGURE_IN_ALLOWED_MCDI_MASK_LEN 64 + +/* MC_CMD_PROXY_CONFIGURE_OUT msgresponse */ +#define MC_CMD_PROXY_CONFIGURE_OUT_LEN 0 /***********************************/ -/* MC_CMD_FREE_OWNER_IDS +/* MC_CMD_PROXY_COMPLETE + * Tells FW that a requested proxy operation has either been completed (by + * using MC_CMD_PROXY_CMD) or authorized/declined. May only be sent by the + * function that enabled proxying/authorization (by using + * MC_CMD_PROXY_CONFIGURE). */ -#define MC_CMD_FREE_OWNER_IDS 0x59 +#define MC_CMD_PROXY_COMPLETE 0x5f +#undef MC_CMD_0x5f_PRIVILEGE_CTG -/* MC_CMD_FREE_OWNER_IDS_IN msgrequest */ -#define MC_CMD_FREE_OWNER_IDS_IN_LEN 4 -#define MC_CMD_FREE_OWNER_IDS_IN_HANDLE_OFST 0 +#define MC_CMD_0x5f_PRIVILEGE_CTG SRIOV_CTG_ADMIN -/* MC_CMD_FREE_OWNER_IDS_OUT msgresponse */ -#define MC_CMD_FREE_OWNER_IDS_OUT_LEN 0 +/* MC_CMD_PROXY_COMPLETE_IN msgrequest */ +#define MC_CMD_PROXY_COMPLETE_IN_LEN 12 +#define MC_CMD_PROXY_COMPLETE_IN_BLOCK_INDEX_OFST 0 +#define MC_CMD_PROXY_COMPLETE_IN_STATUS_OFST 4 +/* enum: The operation has been completed by using MC_CMD_PROXY_CMD, the reply + * is stored in the REPLY_BUFF. + */ +#define MC_CMD_PROXY_COMPLETE_IN_COMPLETE 0x0 +/* enum: The operation has been authorized. The originating function may now + * try again. + */ +#define MC_CMD_PROXY_COMPLETE_IN_AUTHORIZED 0x1 +/* enum: The operation has been declined. */ +#define MC_CMD_PROXY_COMPLETE_IN_DECLINED 0x2 +/* enum: The authorization failed because the relevant application did not + * respond in time. + */ +#define MC_CMD_PROXY_COMPLETE_IN_TIMEDOUT 0x3 +#define MC_CMD_PROXY_COMPLETE_IN_HANDLE_OFST 8 + +/* MC_CMD_PROXY_COMPLETE_OUT msgresponse */ +#define MC_CMD_PROXY_COMPLETE_OUT_LEN 0 /***********************************/ -/* MC_CMD_ALLOC_BUFTBL_CHUNK +/* MC_CMD_ALLOC_BUFTBL_CHUNK + * Allocate a set of buffer table entries using the specified owner ID. This + * operation allocates the required buffer table entries (and fails if it + * cannot do so). The buffer table entries will initially be zeroed. */ -#define MC_CMD_ALLOC_BUFTBL_CHUNK 0x5c +#define MC_CMD_ALLOC_BUFTBL_CHUNK 0x87 +#undef MC_CMD_0x87_PRIVILEGE_CTG + +#define MC_CMD_0x87_PRIVILEGE_CTG SRIOV_CTG_ONLOAD /* MC_CMD_ALLOC_BUFTBL_CHUNK_IN msgrequest */ #define MC_CMD_ALLOC_BUFTBL_CHUNK_IN_LEN 8 +/* Owner ID to use */ #define MC_CMD_ALLOC_BUFTBL_CHUNK_IN_OWNER_OFST 0 +/* Size of buffer table pages to use, in bytes (note that only a few values are + * legal on any specific hardware). + */ #define MC_CMD_ALLOC_BUFTBL_CHUNK_IN_PAGE_SIZE_OFST 4 /* MC_CMD_ALLOC_BUFTBL_CHUNK_OUT msgresponse */ #define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_LEN 12 #define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_HANDLE_OFST 0 #define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_NUMENTRIES_OFST 4 +/* Buffer table IDs for use in DMA descriptors. */ #define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_ID_OFST 8 /***********************************/ -/* MC_CMD_PROGRAM_BUFTBL_ENTRIES +/* MC_CMD_PROGRAM_BUFTBL_ENTRIES + * Reprogram a set of buffer table entries in the specified chunk. */ -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES 0x5d +#define MC_CMD_PROGRAM_BUFTBL_ENTRIES 0x88 +#undef MC_CMD_0x88_PRIVILEGE_CTG + +#define MC_CMD_0x88_PRIVILEGE_CTG SRIOV_CTG_ONLOAD /* MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN msgrequest */ #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LENMIN 20 -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LENMAX 252 +#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LENMAX 268 #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LEN(num) (12+8*(num)) #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_HANDLE_OFST 0 +/* ID */ #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_FIRSTID_OFST 4 +/* Num entries */ #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_NUMENTRIES_OFST 8 +/* Buffer table entry address */ #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_OFST 12 #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LEN 8 #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_OFST 12 #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_OFST 16 #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MINNUM 1 -#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM 30 +#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM 32 /* MC_CMD_PROGRAM_BUFTBL_ENTRIES_OUT msgresponse */ #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_OUT_LEN 0 /***********************************/ -/* MC_CMD_FREE_BUFTBL_CHUNK +/* MC_CMD_FREE_BUFTBL_CHUNK */ -#define MC_CMD_FREE_BUFTBL_CHUNK 0x5e +#define MC_CMD_FREE_BUFTBL_CHUNK 0x89 +#undef MC_CMD_0x89_PRIVILEGE_CTG + +#define MC_CMD_0x89_PRIVILEGE_CTG SRIOV_CTG_ONLOAD /* MC_CMD_FREE_BUFTBL_CHUNK_IN msgrequest */ #define MC_CMD_FREE_BUFTBL_CHUNK_IN_LEN 4 @@ -4743,35 +8204,80 @@ /* MC_CMD_FREE_BUFTBL_CHUNK_OUT msgresponse */ #define MC_CMD_FREE_BUFTBL_CHUNK_OUT_LEN 0 - -/***********************************/ -/* MC_CMD_GET_PF_COUNT - */ -#define MC_CMD_GET_PF_COUNT 0x60 - -/* MC_CMD_GET_PF_COUNT_IN msgrequest */ -#define MC_CMD_GET_PF_COUNT_IN_LEN 0 - -/* MC_CMD_GET_PF_COUNT_OUT msgresponse */ -#define MC_CMD_GET_PF_COUNT_OUT_LEN 1 -#define MC_CMD_GET_PF_COUNT_OUT_PF_COUNT_OFST 0 -#define MC_CMD_GET_PF_COUNT_OUT_PF_COUNT_LEN 1 +/* PORT_CONFIG_ENTRY structuredef */ +#define PORT_CONFIG_ENTRY_LEN 16 +/* External port number (label) */ +#define PORT_CONFIG_ENTRY_EXT_NUMBER_OFST 0 +#define PORT_CONFIG_ENTRY_EXT_NUMBER_LEN 1 +#define PORT_CONFIG_ENTRY_EXT_NUMBER_LBN 0 +#define PORT_CONFIG_ENTRY_EXT_NUMBER_WIDTH 8 +/* Port core location */ +#define PORT_CONFIG_ENTRY_CORE_OFST 1 +#define PORT_CONFIG_ENTRY_CORE_LEN 1 +#define PORT_CONFIG_ENTRY_STANDALONE 0x0 /* enum */ +#define PORT_CONFIG_ENTRY_MASTER 0x1 /* enum */ +#define PORT_CONFIG_ENTRY_SLAVE 0x2 /* enum */ +#define PORT_CONFIG_ENTRY_CORE_LBN 8 +#define PORT_CONFIG_ENTRY_CORE_WIDTH 8 +/* Internal number (HW resource) relative to the core */ +#define PORT_CONFIG_ENTRY_INT_NUMBER_OFST 2 +#define PORT_CONFIG_ENTRY_INT_NUMBER_LEN 1 +#define PORT_CONFIG_ENTRY_INT_NUMBER_LBN 16 +#define PORT_CONFIG_ENTRY_INT_NUMBER_WIDTH 8 +/* Reserved */ +#define PORT_CONFIG_ENTRY_RSVD_OFST 3 +#define PORT_CONFIG_ENTRY_RSVD_LEN 1 +#define PORT_CONFIG_ENTRY_RSVD_LBN 24 +#define PORT_CONFIG_ENTRY_RSVD_WIDTH 8 +/* Bitmask of KR lanes used by the port */ +#define PORT_CONFIG_ENTRY_LANES_OFST 4 +#define PORT_CONFIG_ENTRY_LANES_LBN 32 +#define PORT_CONFIG_ENTRY_LANES_WIDTH 32 +/* Port capabilities (MC_CMD_PHY_CAP_*) */ +#define PORT_CONFIG_ENTRY_SUPPORTED_CAPS_OFST 8 +#define PORT_CONFIG_ENTRY_SUPPORTED_CAPS_LBN 64 +#define PORT_CONFIG_ENTRY_SUPPORTED_CAPS_WIDTH 32 +/* Reserved (align to 16 bytes) */ +#define PORT_CONFIG_ENTRY_RSVD2_OFST 12 +#define PORT_CONFIG_ENTRY_RSVD2_LBN 96 +#define PORT_CONFIG_ENTRY_RSVD2_WIDTH 32 /***********************************/ -/* MC_CMD_FILTER_OP +/* MC_CMD_FILTER_OP + * Multiplexed MCDI call for filter operations */ -#define MC_CMD_FILTER_OP 0x61 +#define MC_CMD_FILTER_OP 0x8a +#undef MC_CMD_0x8a_PRIVILEGE_CTG + +#define MC_CMD_0x8a_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_FILTER_OP_IN msgrequest */ -#define MC_CMD_FILTER_OP_IN_LEN 100 +#define MC_CMD_FILTER_OP_IN_LEN 108 +/* identifies the type of operation requested */ #define MC_CMD_FILTER_OP_IN_OP_OFST 0 -#define MC_CMD_FILTER_OP_IN_OP_INSERT 0x0 /* enum */ -#define MC_CMD_FILTER_OP_IN_OP_REMOVE 0x1 /* enum */ -#define MC_CMD_FILTER_OP_IN_OP_SUBSCRIBE 0x2 /* enum */ -#define MC_CMD_FILTER_OP_IN_OP_UNSUBSCRIBE 0x3 /* enum */ +/* enum: single-recipient filter insert */ +#define MC_CMD_FILTER_OP_IN_OP_INSERT 0x0 +/* enum: single-recipient filter remove */ +#define MC_CMD_FILTER_OP_IN_OP_REMOVE 0x1 +/* enum: multi-recipient filter subscribe */ +#define MC_CMD_FILTER_OP_IN_OP_SUBSCRIBE 0x2 +/* enum: multi-recipient filter unsubscribe */ +#define MC_CMD_FILTER_OP_IN_OP_UNSUBSCRIBE 0x3 +/* enum: replace one recipient with another (warning - the filter handle may + * change) + */ +#define MC_CMD_FILTER_OP_IN_OP_REPLACE 0x4 +/* filter handle (for remove / unsubscribe operations) */ #define MC_CMD_FILTER_OP_IN_HANDLE_OFST 4 -#define MC_CMD_FILTER_OP_IN_MATCH_FIELDS_OFST 8 +#define MC_CMD_FILTER_OP_IN_HANDLE_LEN 8 +#define MC_CMD_FILTER_OP_IN_HANDLE_LO_OFST 4 +#define MC_CMD_FILTER_OP_IN_HANDLE_HI_OFST 8 +/* The port ID associated with the v-adaptor which should contain this filter. + */ +#define MC_CMD_FILTER_OP_IN_PORT_ID_OFST 12 +/* fields to include in match criteria */ +#define MC_CMD_FILTER_OP_IN_MATCH_FIELDS_OFST 16 #define MC_CMD_FILTER_OP_IN_MATCH_SRC_IP_LBN 0 #define MC_CMD_FILTER_OP_IN_MATCH_SRC_IP_WIDTH 1 #define MC_CMD_FILTER_OP_IN_MATCH_DST_IP_LBN 1 @@ -4796,63 +8302,493 @@ #define MC_CMD_FILTER_OP_IN_MATCH_FWDEF0_WIDTH 1 #define MC_CMD_FILTER_OP_IN_MATCH_FWDEF1_LBN 11 #define MC_CMD_FILTER_OP_IN_MATCH_FWDEF1_WIDTH 1 -#define MC_CMD_FILTER_OP_IN_RX_DEST_OFST 12 -#define MC_CMD_FILTER_OP_IN_RX_DEST_DROP 0x0 /* enum */ -#define MC_CMD_FILTER_OP_IN_RX_DEST_HOST 0x1 /* enum */ -#define MC_CMD_FILTER_OP_IN_RX_DEST_MC 0x2 /* enum */ -#define MC_CMD_FILTER_OP_IN_RX_DEST_TX0 0x3 /* enum */ -#define MC_CMD_FILTER_OP_IN_RX_DEST_TX1 0x4 /* enum */ -#define MC_CMD_FILTER_OP_IN_RX_QUEUE_OFST 16 -#define MC_CMD_FILTER_OP_IN_RX_FLAGS_OFST 20 -#define MC_CMD_FILTER_OP_IN_RX_FLAG_RSS_LBN 0 -#define MC_CMD_FILTER_OP_IN_RX_FLAG_RSS_WIDTH 1 -#define MC_CMD_FILTER_OP_IN_RSS_CONTEXT_OFST 24 -#define MC_CMD_FILTER_OP_IN_TX_DOMAIN_OFST 28 -#define MC_CMD_FILTER_OP_IN_TX_DEST_OFST 32 +#define MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_MCAST_DST_LBN 30 +#define MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_MCAST_DST_WIDTH 1 +#define MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_UCAST_DST_LBN 31 +#define MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_UCAST_DST_WIDTH 1 +/* receive destination */ +#define MC_CMD_FILTER_OP_IN_RX_DEST_OFST 20 +/* enum: drop packets */ +#define MC_CMD_FILTER_OP_IN_RX_DEST_DROP 0x0 +/* enum: receive to host */ +#define MC_CMD_FILTER_OP_IN_RX_DEST_HOST 0x1 +/* enum: receive to MC */ +#define MC_CMD_FILTER_OP_IN_RX_DEST_MC 0x2 +/* enum: loop back to TXDP 0 */ +#define MC_CMD_FILTER_OP_IN_RX_DEST_TX0 0x3 +/* enum: loop back to TXDP 1 */ +#define MC_CMD_FILTER_OP_IN_RX_DEST_TX1 0x4 +/* receive queue handle (for multiple queue modes, this is the base queue) */ +#define MC_CMD_FILTER_OP_IN_RX_QUEUE_OFST 24 +/* receive mode */ +#define MC_CMD_FILTER_OP_IN_RX_MODE_OFST 28 +/* enum: receive to just the specified queue */ +#define MC_CMD_FILTER_OP_IN_RX_MODE_SIMPLE 0x0 +/* enum: receive to multiple queues using RSS context */ +#define MC_CMD_FILTER_OP_IN_RX_MODE_RSS 0x1 +/* enum: receive to multiple queues using .1p mapping */ +#define MC_CMD_FILTER_OP_IN_RX_MODE_DOT1P_MAPPING 0x2 +/* enum: install a filter entry that will never match; for test purposes only + */ +#define MC_CMD_FILTER_OP_IN_RX_MODE_TEST_NEVER_MATCH 0x80000000 +/* RSS context (for RX_MODE_RSS) or .1p mapping handle (for + * RX_MODE_DOT1P_MAPPING), as returned by MC_CMD_RSS_CONTEXT_ALLOC or + * MC_CMD_DOT1P_MAPPING_ALLOC. + */ +#define MC_CMD_FILTER_OP_IN_RX_CONTEXT_OFST 32 +/* transmit domain (reserved; set to 0) */ +#define MC_CMD_FILTER_OP_IN_TX_DOMAIN_OFST 36 +/* transmit destination (either set the MAC and/or PM bits for explicit + * control, or set this field to TX_DEST_DEFAULT for sensible default + * behaviour) + */ +#define MC_CMD_FILTER_OP_IN_TX_DEST_OFST 40 +/* enum: request default behaviour (based on filter type) */ +#define MC_CMD_FILTER_OP_IN_TX_DEST_DEFAULT 0xffffffff #define MC_CMD_FILTER_OP_IN_TX_DEST_MAC_LBN 0 #define MC_CMD_FILTER_OP_IN_TX_DEST_MAC_WIDTH 1 #define MC_CMD_FILTER_OP_IN_TX_DEST_PM_LBN 1 #define MC_CMD_FILTER_OP_IN_TX_DEST_PM_WIDTH 1 -#define MC_CMD_FILTER_OP_IN_SRC_MAC_OFST 36 +/* source MAC address to match (as bytes in network order) */ +#define MC_CMD_FILTER_OP_IN_SRC_MAC_OFST 44 #define MC_CMD_FILTER_OP_IN_SRC_MAC_LEN 6 -#define MC_CMD_FILTER_OP_IN_SRC_PORT_OFST 42 +/* source port to match (as bytes in network order) */ +#define MC_CMD_FILTER_OP_IN_SRC_PORT_OFST 50 #define MC_CMD_FILTER_OP_IN_SRC_PORT_LEN 2 -#define MC_CMD_FILTER_OP_IN_DST_MAC_OFST 44 +/* destination MAC address to match (as bytes in network order) */ +#define MC_CMD_FILTER_OP_IN_DST_MAC_OFST 52 #define MC_CMD_FILTER_OP_IN_DST_MAC_LEN 6 -#define MC_CMD_FILTER_OP_IN_DST_PORT_OFST 50 +/* destination port to match (as bytes in network order) */ +#define MC_CMD_FILTER_OP_IN_DST_PORT_OFST 58 #define MC_CMD_FILTER_OP_IN_DST_PORT_LEN 2 -#define MC_CMD_FILTER_OP_IN_ETHER_TYPE_OFST 52 +/* Ethernet type to match (as bytes in network order) */ +#define MC_CMD_FILTER_OP_IN_ETHER_TYPE_OFST 60 #define MC_CMD_FILTER_OP_IN_ETHER_TYPE_LEN 2 -#define MC_CMD_FILTER_OP_IN_INNER_VLAN_OFST 54 +/* Inner VLAN tag to match (as bytes in network order) */ +#define MC_CMD_FILTER_OP_IN_INNER_VLAN_OFST 62 #define MC_CMD_FILTER_OP_IN_INNER_VLAN_LEN 2 -#define MC_CMD_FILTER_OP_IN_OUTER_VLAN_OFST 56 +/* Outer VLAN tag to match (as bytes in network order) */ +#define MC_CMD_FILTER_OP_IN_OUTER_VLAN_OFST 64 #define MC_CMD_FILTER_OP_IN_OUTER_VLAN_LEN 2 -#define MC_CMD_FILTER_OP_IN_IP_PROTO_OFST 58 +/* IP protocol to match (in low byte; set high byte to 0) */ +#define MC_CMD_FILTER_OP_IN_IP_PROTO_OFST 66 #define MC_CMD_FILTER_OP_IN_IP_PROTO_LEN 2 -#define MC_CMD_FILTER_OP_IN_FWDEF0_OFST 60 -#define MC_CMD_FILTER_OP_IN_FWDEF1_OFST 64 -#define MC_CMD_FILTER_OP_IN_SRC_IP_OFST 68 +/* Firmware defined register 0 to match (reserved; set to 0) */ +#define MC_CMD_FILTER_OP_IN_FWDEF0_OFST 68 +/* Firmware defined register 1 to match (reserved; set to 0) */ +#define MC_CMD_FILTER_OP_IN_FWDEF1_OFST 72 +/* source IP address to match (as bytes in network order; set last 12 bytes to + * 0 for IPv4 address) + */ +#define MC_CMD_FILTER_OP_IN_SRC_IP_OFST 76 #define MC_CMD_FILTER_OP_IN_SRC_IP_LEN 16 -#define MC_CMD_FILTER_OP_IN_DST_IP_OFST 84 +/* destination IP address to match (as bytes in network order; set last 12 + * bytes to 0 for IPv4 address) + */ +#define MC_CMD_FILTER_OP_IN_DST_IP_OFST 92 #define MC_CMD_FILTER_OP_IN_DST_IP_LEN 16 +/* MC_CMD_FILTER_OP_EXT_IN msgrequest: Extension to MC_CMD_FILTER_OP_IN to + * include handling of VXLAN/NVGRE encapsulated frame filtering (which is + * supported on Medford only). + */ +#define MC_CMD_FILTER_OP_EXT_IN_LEN 172 +/* identifies the type of operation requested */ +#define MC_CMD_FILTER_OP_EXT_IN_OP_OFST 0 +/* Enum values, see field(s): */ +/* MC_CMD_FILTER_OP_IN/OP */ +/* filter handle (for remove / unsubscribe operations) */ +#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_OFST 4 +#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LEN 8 +#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_OFST 4 +#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_OFST 8 +/* The port ID associated with the v-adaptor which should contain this filter. + */ +#define MC_CMD_FILTER_OP_EXT_IN_PORT_ID_OFST 12 +/* fields to include in match criteria */ +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_FIELDS_OFST 16 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_SRC_IP_LBN 0 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_SRC_IP_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_IP_LBN 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_IP_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_SRC_MAC_LBN 2 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_SRC_MAC_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_SRC_PORT_LBN 3 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_SRC_PORT_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_MAC_LBN 4 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_MAC_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_PORT_LBN 5 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_PORT_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_ETHER_TYPE_LBN 6 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_ETHER_TYPE_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_INNER_VLAN_LBN 7 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_INNER_VLAN_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_OUTER_VLAN_LBN 8 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_OUTER_VLAN_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IP_PROTO_LBN 9 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IP_PROTO_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_FWDEF0_LBN 10 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_FWDEF0_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_VNI_OR_VSID_LBN 11 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_VNI_OR_VSID_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_SRC_IP_LBN 12 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_SRC_IP_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_DST_IP_LBN 13 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_DST_IP_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_SRC_MAC_LBN 14 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_SRC_MAC_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_SRC_PORT_LBN 15 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_SRC_PORT_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_DST_MAC_LBN 16 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_DST_MAC_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_DST_PORT_LBN 17 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_DST_PORT_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_ETHER_TYPE_LBN 18 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_ETHER_TYPE_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_INNER_VLAN_LBN 19 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_INNER_VLAN_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_OUTER_VLAN_LBN 20 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_OUTER_VLAN_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_IP_PROTO_LBN 21 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_IP_PROTO_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_FWDEF0_LBN 22 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_FWDEF0_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_FWDEF1_LBN 23 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_FWDEF1_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_MCAST_DST_LBN 24 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_MCAST_DST_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_LBN 25 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_MCAST_DST_LBN 30 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_MCAST_DST_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_UCAST_DST_LBN 31 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_UCAST_DST_WIDTH 1 +/* receive destination */ +#define MC_CMD_FILTER_OP_EXT_IN_RX_DEST_OFST 20 +/* enum: drop packets */ +#define MC_CMD_FILTER_OP_EXT_IN_RX_DEST_DROP 0x0 +/* enum: receive to host */ +#define MC_CMD_FILTER_OP_EXT_IN_RX_DEST_HOST 0x1 +/* enum: receive to MC */ +#define MC_CMD_FILTER_OP_EXT_IN_RX_DEST_MC 0x2 +/* enum: loop back to TXDP 0 */ +#define MC_CMD_FILTER_OP_EXT_IN_RX_DEST_TX0 0x3 +/* enum: loop back to TXDP 1 */ +#define MC_CMD_FILTER_OP_EXT_IN_RX_DEST_TX1 0x4 +/* receive queue handle (for multiple queue modes, this is the base queue) */ +#define MC_CMD_FILTER_OP_EXT_IN_RX_QUEUE_OFST 24 +/* receive mode */ +#define MC_CMD_FILTER_OP_EXT_IN_RX_MODE_OFST 28 +/* enum: receive to just the specified queue */ +#define MC_CMD_FILTER_OP_EXT_IN_RX_MODE_SIMPLE 0x0 +/* enum: receive to multiple queues using RSS context */ +#define MC_CMD_FILTER_OP_EXT_IN_RX_MODE_RSS 0x1 +/* enum: receive to multiple queues using .1p mapping */ +#define MC_CMD_FILTER_OP_EXT_IN_RX_MODE_DOT1P_MAPPING 0x2 +/* enum: install a filter entry that will never match; for test purposes only + */ +#define MC_CMD_FILTER_OP_EXT_IN_RX_MODE_TEST_NEVER_MATCH 0x80000000 +/* RSS context (for RX_MODE_RSS) or .1p mapping handle (for + * RX_MODE_DOT1P_MAPPING), as returned by MC_CMD_RSS_CONTEXT_ALLOC or + * MC_CMD_DOT1P_MAPPING_ALLOC. + */ +#define MC_CMD_FILTER_OP_EXT_IN_RX_CONTEXT_OFST 32 +/* transmit domain (reserved; set to 0) */ +#define MC_CMD_FILTER_OP_EXT_IN_TX_DOMAIN_OFST 36 +/* transmit destination (either set the MAC and/or PM bits for explicit + * control, or set this field to TX_DEST_DEFAULT for sensible default + * behaviour) + */ +#define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_OFST 40 +/* enum: request default behaviour (based on filter type) */ +#define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_DEFAULT 0xffffffff +#define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_MAC_LBN 0 +#define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_MAC_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_PM_LBN 1 +#define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_PM_WIDTH 1 +/* source MAC address to match (as bytes in network order) */ +#define MC_CMD_FILTER_OP_EXT_IN_SRC_MAC_OFST 44 +#define MC_CMD_FILTER_OP_EXT_IN_SRC_MAC_LEN 6 +/* source port to match (as bytes in network order) */ +#define MC_CMD_FILTER_OP_EXT_IN_SRC_PORT_OFST 50 +#define MC_CMD_FILTER_OP_EXT_IN_SRC_PORT_LEN 2 +/* destination MAC address to match (as bytes in network order) */ +#define MC_CMD_FILTER_OP_EXT_IN_DST_MAC_OFST 52 +#define MC_CMD_FILTER_OP_EXT_IN_DST_MAC_LEN 6 +/* destination port to match (as bytes in network order) */ +#define MC_CMD_FILTER_OP_EXT_IN_DST_PORT_OFST 58 +#define MC_CMD_FILTER_OP_EXT_IN_DST_PORT_LEN 2 +/* Ethernet type to match (as bytes in network order) */ +#define MC_CMD_FILTER_OP_EXT_IN_ETHER_TYPE_OFST 60 +#define MC_CMD_FILTER_OP_EXT_IN_ETHER_TYPE_LEN 2 +/* Inner VLAN tag to match (as bytes in network order) */ +#define MC_CMD_FILTER_OP_EXT_IN_INNER_VLAN_OFST 62 +#define MC_CMD_FILTER_OP_EXT_IN_INNER_VLAN_LEN 2 +/* Outer VLAN tag to match (as bytes in network order) */ +#define MC_CMD_FILTER_OP_EXT_IN_OUTER_VLAN_OFST 64 +#define MC_CMD_FILTER_OP_EXT_IN_OUTER_VLAN_LEN 2 +/* IP protocol to match (in low byte; set high byte to 0) */ +#define MC_CMD_FILTER_OP_EXT_IN_IP_PROTO_OFST 66 +#define MC_CMD_FILTER_OP_EXT_IN_IP_PROTO_LEN 2 +/* Firmware defined register 0 to match (reserved; set to 0) */ +#define MC_CMD_FILTER_OP_EXT_IN_FWDEF0_OFST 68 +/* VNI (for VXLAN/Geneve, when IP protocol is UDP) or VSID (for NVGRE, when IP + * protocol is GRE) to match (as bytes in network order; set last byte to 0 for + * VXLAN/NVGRE, or 1 for Geneve) + */ +#define MC_CMD_FILTER_OP_EXT_IN_VNI_OR_VSID_OFST 72 +#define MC_CMD_FILTER_OP_EXT_IN_VNI_VALUE_LBN 0 +#define MC_CMD_FILTER_OP_EXT_IN_VNI_VALUE_WIDTH 24 +#define MC_CMD_FILTER_OP_EXT_IN_VNI_TYPE_LBN 24 +#define MC_CMD_FILTER_OP_EXT_IN_VNI_TYPE_WIDTH 8 +/* enum: Match VXLAN traffic with this VNI */ +#define MC_CMD_FILTER_OP_EXT_IN_VNI_TYPE_VXLAN 0x0 +/* enum: Match Geneve traffic with this VNI */ +#define MC_CMD_FILTER_OP_EXT_IN_VNI_TYPE_GENEVE 0x1 +/* enum: Reserved for experimental development use */ +#define MC_CMD_FILTER_OP_EXT_IN_VNI_TYPE_EXPERIMENTAL 0xfe +#define MC_CMD_FILTER_OP_EXT_IN_VSID_VALUE_LBN 0 +#define MC_CMD_FILTER_OP_EXT_IN_VSID_VALUE_WIDTH 24 +#define MC_CMD_FILTER_OP_EXT_IN_VSID_TYPE_LBN 24 +#define MC_CMD_FILTER_OP_EXT_IN_VSID_TYPE_WIDTH 8 +/* enum: Match NVGRE traffic with this VSID */ +#define MC_CMD_FILTER_OP_EXT_IN_VSID_TYPE_NVGRE 0x0 +/* source IP address to match (as bytes in network order; set last 12 bytes to + * 0 for IPv4 address) + */ +#define MC_CMD_FILTER_OP_EXT_IN_SRC_IP_OFST 76 +#define MC_CMD_FILTER_OP_EXT_IN_SRC_IP_LEN 16 +/* destination IP address to match (as bytes in network order; set last 12 + * bytes to 0 for IPv4 address) + */ +#define MC_CMD_FILTER_OP_EXT_IN_DST_IP_OFST 92 +#define MC_CMD_FILTER_OP_EXT_IN_DST_IP_LEN 16 +/* VXLAN/NVGRE inner frame source MAC address to match (as bytes in network + * order) + */ +#define MC_CMD_FILTER_OP_EXT_IN_IFRM_SRC_MAC_OFST 108 +#define MC_CMD_FILTER_OP_EXT_IN_IFRM_SRC_MAC_LEN 6 +/* VXLAN/NVGRE inner frame source port to match (as bytes in network order) */ +#define MC_CMD_FILTER_OP_EXT_IN_IFRM_SRC_PORT_OFST 114 +#define MC_CMD_FILTER_OP_EXT_IN_IFRM_SRC_PORT_LEN 2 +/* VXLAN/NVGRE inner frame destination MAC address to match (as bytes in + * network order) + */ +#define MC_CMD_FILTER_OP_EXT_IN_IFRM_DST_MAC_OFST 116 +#define MC_CMD_FILTER_OP_EXT_IN_IFRM_DST_MAC_LEN 6 +/* VXLAN/NVGRE inner frame destination port to match (as bytes in network + * order) + */ +#define MC_CMD_FILTER_OP_EXT_IN_IFRM_DST_PORT_OFST 122 +#define MC_CMD_FILTER_OP_EXT_IN_IFRM_DST_PORT_LEN 2 +/* VXLAN/NVGRE inner frame Ethernet type to match (as bytes in network order) + */ +#define MC_CMD_FILTER_OP_EXT_IN_IFRM_ETHER_TYPE_OFST 124 +#define MC_CMD_FILTER_OP_EXT_IN_IFRM_ETHER_TYPE_LEN 2 +/* VXLAN/NVGRE inner frame Inner VLAN tag to match (as bytes in network order) + */ +#define MC_CMD_FILTER_OP_EXT_IN_IFRM_INNER_VLAN_OFST 126 +#define MC_CMD_FILTER_OP_EXT_IN_IFRM_INNER_VLAN_LEN 2 +/* VXLAN/NVGRE inner frame Outer VLAN tag to match (as bytes in network order) + */ +#define MC_CMD_FILTER_OP_EXT_IN_IFRM_OUTER_VLAN_OFST 128 +#define MC_CMD_FILTER_OP_EXT_IN_IFRM_OUTER_VLAN_LEN 2 +/* VXLAN/NVGRE inner frame IP protocol to match (in low byte; set high byte to + * 0) + */ +#define MC_CMD_FILTER_OP_EXT_IN_IFRM_IP_PROTO_OFST 130 +#define MC_CMD_FILTER_OP_EXT_IN_IFRM_IP_PROTO_LEN 2 +/* VXLAN/NVGRE inner frame Firmware defined register 0 to match (reserved; set + * to 0) + */ +#define MC_CMD_FILTER_OP_EXT_IN_IFRM_FWDEF0_OFST 132 +/* VXLAN/NVGRE inner frame Firmware defined register 1 to match (reserved; set + * to 0) + */ +#define MC_CMD_FILTER_OP_EXT_IN_IFRM_FWDEF1_OFST 136 +/* VXLAN/NVGRE inner frame source IP address to match (as bytes in network + * order; set last 12 bytes to 0 for IPv4 address) + */ +#define MC_CMD_FILTER_OP_EXT_IN_IFRM_SRC_IP_OFST 140 +#define MC_CMD_FILTER_OP_EXT_IN_IFRM_SRC_IP_LEN 16 +/* VXLAN/NVGRE inner frame destination IP address to match (as bytes in network + * order; set last 12 bytes to 0 for IPv4 address) + */ +#define MC_CMD_FILTER_OP_EXT_IN_IFRM_DST_IP_OFST 156 +#define MC_CMD_FILTER_OP_EXT_IN_IFRM_DST_IP_LEN 16 + /* MC_CMD_FILTER_OP_OUT msgresponse */ -#define MC_CMD_FILTER_OP_OUT_LEN 8 +#define MC_CMD_FILTER_OP_OUT_LEN 12 +/* identifies the type of operation requested */ #define MC_CMD_FILTER_OP_OUT_OP_OFST 0 -#define MC_CMD_FILTER_OP_OUT_OP_INSERT 0x0 /* enum */ -#define MC_CMD_FILTER_OP_OUT_OP_REMOVE 0x1 /* enum */ -#define MC_CMD_FILTER_OP_OUT_OP_SUBSCRIBE 0x2 /* enum */ -#define MC_CMD_FILTER_OP_OUT_OP_UNSUBSCRIBE 0x3 /* enum */ +/* Enum values, see field(s): */ +/* MC_CMD_FILTER_OP_IN/OP */ +/* Returned filter handle (for insert / subscribe operations). Note that these + * handles should be considered opaque to the host, although a value of + * 0xFFFFFFFF_FFFFFFFF is guaranteed never to be a valid handle. + */ #define MC_CMD_FILTER_OP_OUT_HANDLE_OFST 4 +#define MC_CMD_FILTER_OP_OUT_HANDLE_LEN 8 +#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_OFST 4 +#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_OFST 8 +/* enum: guaranteed invalid filter handle (low 32 bits) */ +#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_INVALID 0xffffffff +/* enum: guaranteed invalid filter handle (high 32 bits) */ +#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_INVALID 0xffffffff + +/* MC_CMD_FILTER_OP_EXT_OUT msgresponse */ +#define MC_CMD_FILTER_OP_EXT_OUT_LEN 12 +/* identifies the type of operation requested */ +#define MC_CMD_FILTER_OP_EXT_OUT_OP_OFST 0 +/* Enum values, see field(s): */ +/* MC_CMD_FILTER_OP_EXT_IN/OP */ +/* Returned filter handle (for insert / subscribe operations). Note that these + * handles should be considered opaque to the host, although a value of + * 0xFFFFFFFF_FFFFFFFF is guaranteed never to be a valid handle. + */ +#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_OFST 4 +#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LEN 8 +#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_OFST 4 +#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_OFST 8 +/* Enum values, see field(s): */ +/* MC_CMD_FILTER_OP_OUT/HANDLE */ /***********************************/ -/* MC_CMD_SET_PF_COUNT +/* MC_CMD_GET_PARSER_DISP_INFO + * Get information related to the parser-dispatcher subsystem */ -#define MC_CMD_SET_PF_COUNT 0x62 +#define MC_CMD_GET_PARSER_DISP_INFO 0xe4 +#undef MC_CMD_0xe4_PRIVILEGE_CTG + +#define MC_CMD_0xe4_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_GET_PARSER_DISP_INFO_IN msgrequest */ +#define MC_CMD_GET_PARSER_DISP_INFO_IN_LEN 4 +/* identifies the type of operation requested */ +#define MC_CMD_GET_PARSER_DISP_INFO_IN_OP_OFST 0 +/* enum: read the list of supported RX filter matches */ +#define MC_CMD_GET_PARSER_DISP_INFO_IN_OP_GET_SUPPORTED_RX_MATCHES 0x1 +/* enum: read flags indicating restrictions on filter insertion for the calling + * client + */ +#define MC_CMD_GET_PARSER_DISP_INFO_IN_OP_GET_RESTRICTIONS 0x2 + +/* MC_CMD_GET_PARSER_DISP_INFO_OUT msgresponse */ +#define MC_CMD_GET_PARSER_DISP_INFO_OUT_LENMIN 8 +#define MC_CMD_GET_PARSER_DISP_INFO_OUT_LENMAX 252 +#define MC_CMD_GET_PARSER_DISP_INFO_OUT_LEN(num) (8+4*(num)) +/* identifies the type of operation requested */ +#define MC_CMD_GET_PARSER_DISP_INFO_OUT_OP_OFST 0 +/* Enum values, see field(s): */ +/* MC_CMD_GET_PARSER_DISP_INFO_IN/OP */ +/* number of supported match types */ +#define MC_CMD_GET_PARSER_DISP_INFO_OUT_NUM_SUPPORTED_MATCHES_OFST 4 +/* array of supported match types (valid MATCH_FIELDS values for + * MC_CMD_FILTER_OP) sorted in decreasing priority order + */ +#define MC_CMD_GET_PARSER_DISP_INFO_OUT_SUPPORTED_MATCHES_OFST 8 +#define MC_CMD_GET_PARSER_DISP_INFO_OUT_SUPPORTED_MATCHES_LEN 4 +#define MC_CMD_GET_PARSER_DISP_INFO_OUT_SUPPORTED_MATCHES_MINNUM 0 +#define MC_CMD_GET_PARSER_DISP_INFO_OUT_SUPPORTED_MATCHES_MAXNUM 61 + +/* MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT msgresponse */ +#define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_LEN 8 +/* identifies the type of operation requested */ +#define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_OP_OFST 0 +/* Enum values, see field(s): */ +/* MC_CMD_GET_PARSER_DISP_INFO_IN/OP */ +/* bitfield of filter insertion restrictions */ +#define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_RESTRICTION_FLAGS_OFST 4 +#define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_DST_IP_MCAST_ONLY_LBN 0 +#define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_DST_IP_MCAST_ONLY_WIDTH 1 + + +/***********************************/ +/* MC_CMD_PARSER_DISP_RW + * Direct read/write of parser-dispatcher state (DICPUs and LUE) for debugging + */ +#define MC_CMD_PARSER_DISP_RW 0xe5 +#undef MC_CMD_0xe5_PRIVILEGE_CTG + +#define MC_CMD_0xe5_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_PARSER_DISP_RW_IN msgrequest */ +#define MC_CMD_PARSER_DISP_RW_IN_LEN 32 +/* identifies the target of the operation */ +#define MC_CMD_PARSER_DISP_RW_IN_TARGET_OFST 0 +/* enum: RX dispatcher CPU */ +#define MC_CMD_PARSER_DISP_RW_IN_RX_DICPU 0x0 +/* enum: TX dispatcher CPU */ +#define MC_CMD_PARSER_DISP_RW_IN_TX_DICPU 0x1 +/* enum: Lookup engine (with original metadata format) */ +#define MC_CMD_PARSER_DISP_RW_IN_LUE 0x2 +/* enum: Lookup engine (with requested metadata format) */ +#define MC_CMD_PARSER_DISP_RW_IN_LUE_VERSIONED_METADATA 0x3 +/* identifies the type of operation requested */ +#define MC_CMD_PARSER_DISP_RW_IN_OP_OFST 4 +/* enum: read a word of DICPU DMEM or a LUE entry */ +#define MC_CMD_PARSER_DISP_RW_IN_READ 0x0 +/* enum: write a word of DICPU DMEM or a LUE entry */ +#define MC_CMD_PARSER_DISP_RW_IN_WRITE 0x1 +/* enum: read-modify-write a word of DICPU DMEM (not valid for LUE) */ +#define MC_CMD_PARSER_DISP_RW_IN_RMW 0x2 +/* data memory address or LUE index */ +#define MC_CMD_PARSER_DISP_RW_IN_ADDRESS_OFST 8 +/* value to write (for DMEM writes) */ +#define MC_CMD_PARSER_DISP_RW_IN_DMEM_WRITE_VALUE_OFST 12 +/* XOR value (for DMEM read-modify-writes: new = (old & mask) ^ value) */ +#define MC_CMD_PARSER_DISP_RW_IN_DMEM_RMW_XOR_VALUE_OFST 12 +/* AND mask (for DMEM read-modify-writes: new = (old & mask) ^ value) */ +#define MC_CMD_PARSER_DISP_RW_IN_DMEM_RMW_AND_MASK_OFST 16 +/* metadata format (for LUE reads using LUE_VERSIONED_METADATA) */ +#define MC_CMD_PARSER_DISP_RW_IN_LUE_READ_METADATA_VERSION_OFST 12 +/* value to write (for LUE writes) */ +#define MC_CMD_PARSER_DISP_RW_IN_LUE_WRITE_VALUE_OFST 12 +#define MC_CMD_PARSER_DISP_RW_IN_LUE_WRITE_VALUE_LEN 20 + +/* MC_CMD_PARSER_DISP_RW_OUT msgresponse */ +#define MC_CMD_PARSER_DISP_RW_OUT_LEN 52 +/* value read (for DMEM reads) */ +#define MC_CMD_PARSER_DISP_RW_OUT_DMEM_READ_VALUE_OFST 0 +/* value read (for LUE reads) */ +#define MC_CMD_PARSER_DISP_RW_OUT_LUE_READ_VALUE_OFST 0 +#define MC_CMD_PARSER_DISP_RW_OUT_LUE_READ_VALUE_LEN 20 +/* up to 8 32-bit words of additional soft state from the LUE manager (the + * exact content is firmware-dependent and intended only for debug use) + */ +#define MC_CMD_PARSER_DISP_RW_OUT_LUE_MGR_STATE_OFST 20 +#define MC_CMD_PARSER_DISP_RW_OUT_LUE_MGR_STATE_LEN 32 + + +/***********************************/ +/* MC_CMD_GET_PF_COUNT + * Get number of PFs on the device. + */ +#define MC_CMD_GET_PF_COUNT 0xb6 +#undef MC_CMD_0xb6_PRIVILEGE_CTG + +#define MC_CMD_0xb6_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_GET_PF_COUNT_IN msgrequest */ +#define MC_CMD_GET_PF_COUNT_IN_LEN 0 + +/* MC_CMD_GET_PF_COUNT_OUT msgresponse */ +#define MC_CMD_GET_PF_COUNT_OUT_LEN 1 +/* Identifies the number of PFs on the device. */ +#define MC_CMD_GET_PF_COUNT_OUT_PF_COUNT_OFST 0 +#define MC_CMD_GET_PF_COUNT_OUT_PF_COUNT_LEN 1 + + +/***********************************/ +/* MC_CMD_SET_PF_COUNT + * Set number of PFs on the device. + */ +#define MC_CMD_SET_PF_COUNT 0xb7 /* MC_CMD_SET_PF_COUNT_IN msgrequest */ #define MC_CMD_SET_PF_COUNT_IN_LEN 4 +/* New number of PFs on the device. */ #define MC_CMD_SET_PF_COUNT_IN_PF_COUNT_OFST 0 /* MC_CMD_SET_PF_COUNT_OUT msgresponse */ @@ -4860,25 +8796,35 @@ /***********************************/ -/* MC_CMD_GET_PORT_ASSIGNMENT +/* MC_CMD_GET_PORT_ASSIGNMENT + * Get port assignment for current PCI function. */ -#define MC_CMD_GET_PORT_ASSIGNMENT 0x63 +#define MC_CMD_GET_PORT_ASSIGNMENT 0xb8 +#undef MC_CMD_0xb8_PRIVILEGE_CTG + +#define MC_CMD_0xb8_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_GET_PORT_ASSIGNMENT_IN msgrequest */ #define MC_CMD_GET_PORT_ASSIGNMENT_IN_LEN 0 /* MC_CMD_GET_PORT_ASSIGNMENT_OUT msgresponse */ #define MC_CMD_GET_PORT_ASSIGNMENT_OUT_LEN 4 +/* Identifies the port assignment for this function. */ #define MC_CMD_GET_PORT_ASSIGNMENT_OUT_PORT_OFST 0 /***********************************/ -/* MC_CMD_SET_PORT_ASSIGNMENT +/* MC_CMD_SET_PORT_ASSIGNMENT + * Set port assignment for current PCI function. */ -#define MC_CMD_SET_PORT_ASSIGNMENT 0x64 +#define MC_CMD_SET_PORT_ASSIGNMENT 0xb9 +#undef MC_CMD_0xb9_PRIVILEGE_CTG + +#define MC_CMD_0xb9_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_SET_PORT_ASSIGNMENT_IN msgrequest */ #define MC_CMD_SET_PORT_ASSIGNMENT_IN_LEN 4 +/* Identifies the port assignment for this function. */ #define MC_CMD_SET_PORT_ASSIGNMENT_IN_PORT_OFST 0 /* MC_CMD_SET_PORT_ASSIGNMENT_OUT msgresponse */ @@ -4886,22 +8832,53 @@ /***********************************/ -/* MC_CMD_ALLOC_VIS +/* MC_CMD_ALLOC_VIS + * Allocate VIs for current PCI function. */ -#define MC_CMD_ALLOC_VIS 0x65 +#define MC_CMD_ALLOC_VIS 0x8b +#undef MC_CMD_0x8b_PRIVILEGE_CTG + +#define MC_CMD_0x8b_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_ALLOC_VIS_IN msgrequest */ -#define MC_CMD_ALLOC_VIS_IN_LEN 4 -#define MC_CMD_ALLOC_VIS_IN_VI_COUNT_OFST 0 +#define MC_CMD_ALLOC_VIS_IN_LEN 8 +/* The minimum number of VIs that is acceptable */ +#define MC_CMD_ALLOC_VIS_IN_MIN_VI_COUNT_OFST 0 +/* The maximum number of VIs that would be useful */ +#define MC_CMD_ALLOC_VIS_IN_MAX_VI_COUNT_OFST 4 -/* MC_CMD_ALLOC_VIS_OUT msgresponse */ -#define MC_CMD_ALLOC_VIS_OUT_LEN 0 +/* MC_CMD_ALLOC_VIS_OUT msgresponse: Huntington-compatible VI_ALLOC request. + * Use extended version in new code. + */ +#define MC_CMD_ALLOC_VIS_OUT_LEN 8 +/* The number of VIs allocated on this function */ +#define MC_CMD_ALLOC_VIS_OUT_VI_COUNT_OFST 0 +/* The base absolute VI number allocated to this function. Required to + * correctly interpret wakeup events. + */ +#define MC_CMD_ALLOC_VIS_OUT_VI_BASE_OFST 4 + +/* MC_CMD_ALLOC_VIS_EXT_OUT msgresponse */ +#define MC_CMD_ALLOC_VIS_EXT_OUT_LEN 12 +/* The number of VIs allocated on this function */ +#define MC_CMD_ALLOC_VIS_EXT_OUT_VI_COUNT_OFST 0 +/* The base absolute VI number allocated to this function. Required to + * correctly interpret wakeup events. + */ +#define MC_CMD_ALLOC_VIS_EXT_OUT_VI_BASE_OFST 4 +/* Function's port vi_shift value (always 0 on Huntington) */ +#define MC_CMD_ALLOC_VIS_EXT_OUT_VI_SHIFT_OFST 8 /***********************************/ -/* MC_CMD_FREE_VIS +/* MC_CMD_FREE_VIS + * Free VIs for current PCI function. Any linked PIO buffers will be unlinked, + * but not freed. */ -#define MC_CMD_FREE_VIS 0x66 +#define MC_CMD_FREE_VIS 0x8c +#undef MC_CMD_0x8c_PRIVILEGE_CTG + +#define MC_CMD_0x8c_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_FREE_VIS_IN msgrequest */ #define MC_CMD_FREE_VIS_IN_LEN 0 @@ -4911,37 +8888,57 @@ /***********************************/ -/* MC_CMD_GET_SRIOV_CFG +/* MC_CMD_GET_SRIOV_CFG + * Get SRIOV config for this PF. */ -#define MC_CMD_GET_SRIOV_CFG 0x67 +#define MC_CMD_GET_SRIOV_CFG 0xba +#undef MC_CMD_0xba_PRIVILEGE_CTG + +#define MC_CMD_0xba_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_GET_SRIOV_CFG_IN msgrequest */ #define MC_CMD_GET_SRIOV_CFG_IN_LEN 0 /* MC_CMD_GET_SRIOV_CFG_OUT msgresponse */ #define MC_CMD_GET_SRIOV_CFG_OUT_LEN 20 +/* Number of VFs currently enabled. */ #define MC_CMD_GET_SRIOV_CFG_OUT_VF_CURRENT_OFST 0 +/* Max number of VFs before sriov stride and offset may need to be changed. */ #define MC_CMD_GET_SRIOV_CFG_OUT_VF_MAX_OFST 4 #define MC_CMD_GET_SRIOV_CFG_OUT_FLAGS_OFST 8 #define MC_CMD_GET_SRIOV_CFG_OUT_VF_ENABLED_LBN 0 #define MC_CMD_GET_SRIOV_CFG_OUT_VF_ENABLED_WIDTH 1 +/* RID offset of first VF from PF. */ #define MC_CMD_GET_SRIOV_CFG_OUT_VF_OFFSET_OFST 12 +/* RID offset of each subsequent VF from the previous. */ #define MC_CMD_GET_SRIOV_CFG_OUT_VF_STRIDE_OFST 16 /***********************************/ -/* MC_CMD_SET_SRIOV_CFG +/* MC_CMD_SET_SRIOV_CFG + * Set SRIOV config for this PF. */ -#define MC_CMD_SET_SRIOV_CFG 0x68 +#define MC_CMD_SET_SRIOV_CFG 0xbb +#undef MC_CMD_0xbb_PRIVILEGE_CTG + +#define MC_CMD_0xbb_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_SET_SRIOV_CFG_IN msgrequest */ #define MC_CMD_SET_SRIOV_CFG_IN_LEN 20 +/* Number of VFs currently enabled. */ #define MC_CMD_SET_SRIOV_CFG_IN_VF_CURRENT_OFST 0 +/* Max number of VFs before sriov stride and offset may need to be changed. */ #define MC_CMD_SET_SRIOV_CFG_IN_VF_MAX_OFST 4 #define MC_CMD_SET_SRIOV_CFG_IN_FLAGS_OFST 8 #define MC_CMD_SET_SRIOV_CFG_IN_VF_ENABLED_LBN 0 #define MC_CMD_SET_SRIOV_CFG_IN_VF_ENABLED_WIDTH 1 +/* RID offset of first VF from PF, or 0 for no change, or + * MC_CMD_RESOURCE_INSTANCE_ANY to allow the system to allocate an offset. + */ #define MC_CMD_SET_SRIOV_CFG_IN_VF_OFFSET_OFST 12 +/* RID offset of each subsequent VF from the previous, 0 for no change, or + * MC_CMD_RESOURCE_INSTANCE_ANY to allow the system to allocate a stride. + */ #define MC_CMD_SET_SRIOV_CFG_IN_VF_STRIDE_OFST 16 /* MC_CMD_SET_SRIOV_CFG_OUT msgresponse */ @@ -4949,68 +8946,172 @@ /***********************************/ -/* MC_CMD_GET_VI_COUNT +/* MC_CMD_GET_VI_ALLOC_INFO + * Get information about number of VI's and base VI number allocated to this + * function. */ -#define MC_CMD_GET_VI_COUNT 0x69 +#define MC_CMD_GET_VI_ALLOC_INFO 0x8d +#undef MC_CMD_0x8d_PRIVILEGE_CTG -/* MC_CMD_GET_VI_COUNT_IN msgrequest */ -#define MC_CMD_GET_VI_COUNT_IN_LEN 0 +#define MC_CMD_0x8d_PRIVILEGE_CTG SRIOV_CTG_GENERAL -/* MC_CMD_GET_VI_COUNT_OUT msgresponse */ -#define MC_CMD_GET_VI_COUNT_OUT_LEN 4 -#define MC_CMD_GET_VI_COUNT_OUT_VI_COUNT_OFST 0 +/* MC_CMD_GET_VI_ALLOC_INFO_IN msgrequest */ +#define MC_CMD_GET_VI_ALLOC_INFO_IN_LEN 0 + +/* MC_CMD_GET_VI_ALLOC_INFO_OUT msgresponse */ +#define MC_CMD_GET_VI_ALLOC_INFO_OUT_LEN 12 +/* The number of VIs allocated on this function */ +#define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_COUNT_OFST 0 +/* The base absolute VI number allocated to this function. Required to + * correctly interpret wakeup events. + */ +#define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_BASE_OFST 4 +/* Function's port vi_shift value (always 0 on Huntington) */ +#define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_SHIFT_OFST 8 /***********************************/ -/* MC_CMD_GET_VECTOR_CFG +/* MC_CMD_DUMP_VI_STATE + * For CmdClient use. Dump pertinent information on a specific absolute VI. */ -#define MC_CMD_GET_VECTOR_CFG 0x70 +#define MC_CMD_DUMP_VI_STATE 0x8e +#undef MC_CMD_0x8e_PRIVILEGE_CTG -/* MC_CMD_GET_VECTOR_CFG_IN msgrequest */ -#define MC_CMD_GET_VECTOR_CFG_IN_LEN 0 +#define MC_CMD_0x8e_PRIVILEGE_CTG SRIOV_CTG_GENERAL -/* MC_CMD_GET_VECTOR_CFG_OUT msgresponse */ -#define MC_CMD_GET_VECTOR_CFG_OUT_LEN 12 -#define MC_CMD_GET_VECTOR_CFG_OUT_VEC_BASE_OFST 0 -#define MC_CMD_GET_VECTOR_CFG_OUT_VECS_PER_PF_OFST 4 -#define MC_CMD_GET_VECTOR_CFG_OUT_VECS_PER_VF_OFST 8 +/* MC_CMD_DUMP_VI_STATE_IN msgrequest */ +#define MC_CMD_DUMP_VI_STATE_IN_LEN 4 +/* The VI number to query. */ +#define MC_CMD_DUMP_VI_STATE_IN_VI_NUMBER_OFST 0 + +/* MC_CMD_DUMP_VI_STATE_OUT msgresponse */ +#define MC_CMD_DUMP_VI_STATE_OUT_LEN 96 +/* The PF part of the function owning this VI. */ +#define MC_CMD_DUMP_VI_STATE_OUT_OWNER_PF_OFST 0 +#define MC_CMD_DUMP_VI_STATE_OUT_OWNER_PF_LEN 2 +/* The VF part of the function owning this VI. */ +#define MC_CMD_DUMP_VI_STATE_OUT_OWNER_VF_OFST 2 +#define MC_CMD_DUMP_VI_STATE_OUT_OWNER_VF_LEN 2 +/* Base of VIs allocated to this function. */ +#define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VI_BASE_OFST 4 +#define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VI_BASE_LEN 2 +/* Count of VIs allocated to the owner function. */ +#define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VI_COUNT_OFST 6 +#define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VI_COUNT_LEN 2 +/* Base interrupt vector allocated to this function. */ +#define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VECTOR_BASE_OFST 8 +#define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VECTOR_BASE_LEN 2 +/* Number of interrupt vectors allocated to this function. */ +#define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VECTOR_COUNT_OFST 10 +#define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VECTOR_COUNT_LEN 2 +/* Raw evq ptr table data. */ +#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_OFST 12 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LEN 8 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_OFST 12 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_OFST 16 +/* Raw evq timer table data. */ +#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_OFST 20 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LEN 8 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_OFST 20 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_OFST 24 +/* Combined metadata field. */ +#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_OFST 28 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_BASE_LBN 0 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_BASE_WIDTH 16 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_NPAGES_LBN 16 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_NPAGES_WIDTH 8 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_WKUP_REF_LBN 24 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_WKUP_REF_WIDTH 8 +/* TXDPCPU raw table data for queue. */ +#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_OFST 32 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LEN 8 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_OFST 32 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_OFST 36 +/* TXDPCPU raw table data for queue. */ +#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_OFST 40 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LEN 8 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_OFST 40 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_OFST 44 +/* TXDPCPU raw table data for queue. */ +#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_OFST 48 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LEN 8 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_OFST 48 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_OFST 52 +/* Combined metadata field. */ +#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_OFST 56 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LEN 8 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_OFST 56 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_OFST 60 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_LBN 0 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_WIDTH 16 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_NPAGES_LBN 16 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_NPAGES_WIDTH 8 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_QSTATE_LBN 24 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_QSTATE_WIDTH 8 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_WAITCOUNT_LBN 32 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_WAITCOUNT_WIDTH 8 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_PADDING_LBN 40 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_PADDING_WIDTH 24 +/* RXDPCPU raw table data for queue. */ +#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_OFST 64 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LEN 8 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_OFST 64 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_OFST 68 +/* RXDPCPU raw table data for queue. */ +#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_OFST 72 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LEN 8 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_OFST 72 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_OFST 76 +/* Reserved, currently 0. */ +#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_OFST 80 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LEN 8 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_OFST 80 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_OFST 84 +/* Combined metadata field. */ +#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_OFST 88 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LEN 8 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_OFST 88 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_OFST 92 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_LBN 0 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_WIDTH 16 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_NPAGES_LBN 16 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_NPAGES_WIDTH 8 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_QSTATE_LBN 24 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_QSTATE_WIDTH 8 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_LBN 32 +#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_WIDTH 8 /***********************************/ -/* MC_CMD_SET_VECTOR_CFG +/* MC_CMD_ALLOC_PIOBUF + * Allocate a push I/O buffer for later use with a tx queue. */ -#define MC_CMD_SET_VECTOR_CFG 0x71 +#define MC_CMD_ALLOC_PIOBUF 0x8f +#undef MC_CMD_0x8f_PRIVILEGE_CTG -/* MC_CMD_SET_VECTOR_CFG_IN msgrequest */ -#define MC_CMD_SET_VECTOR_CFG_IN_LEN 12 -#define MC_CMD_SET_VECTOR_CFG_IN_VEC_BASE_OFST 0 -#define MC_CMD_SET_VECTOR_CFG_IN_VECS_PER_PF_OFST 4 -#define MC_CMD_SET_VECTOR_CFG_IN_VECS_PER_VF_OFST 8 - -/* MC_CMD_SET_VECTOR_CFG_OUT msgresponse */ -#define MC_CMD_SET_VECTOR_CFG_OUT_LEN 0 - - -/***********************************/ -/* MC_CMD_ALLOC_PIOBUF - */ -#define MC_CMD_ALLOC_PIOBUF 0x72 +#define MC_CMD_0x8f_PRIVILEGE_CTG SRIOV_CTG_ONLOAD /* MC_CMD_ALLOC_PIOBUF_IN msgrequest */ #define MC_CMD_ALLOC_PIOBUF_IN_LEN 0 /* MC_CMD_ALLOC_PIOBUF_OUT msgresponse */ #define MC_CMD_ALLOC_PIOBUF_OUT_LEN 4 +/* Handle for allocated push I/O buffer. */ #define MC_CMD_ALLOC_PIOBUF_OUT_PIOBUF_HANDLE_OFST 0 /***********************************/ -/* MC_CMD_FREE_PIOBUF +/* MC_CMD_FREE_PIOBUF + * Free a push I/O buffer. */ -#define MC_CMD_FREE_PIOBUF 0x73 +#define MC_CMD_FREE_PIOBUF 0x90 +#undef MC_CMD_0x90_PRIVILEGE_CTG + +#define MC_CMD_0x90_PRIVILEGE_CTG SRIOV_CTG_ONLOAD /* MC_CMD_FREE_PIOBUF_IN msgrequest */ #define MC_CMD_FREE_PIOBUF_IN_LEN 4 +/* Handle for allocated push I/O buffer. */ #define MC_CMD_FREE_PIOBUF_IN_PIOBUF_HANDLE_OFST 0 /* MC_CMD_FREE_PIOBUF_OUT msgresponse */ @@ -5018,16 +9119,499 @@ /***********************************/ -/* MC_CMD_V2_EXTN +/* MC_CMD_GET_VI_TLP_PROCESSING + * Get TLP steering and ordering information for a VI. */ -#define MC_CMD_V2_EXTN 0x7f +#define MC_CMD_GET_VI_TLP_PROCESSING 0xb0 +#undef MC_CMD_0xb0_PRIVILEGE_CTG + +#define MC_CMD_0xb0_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_GET_VI_TLP_PROCESSING_IN msgrequest */ +#define MC_CMD_GET_VI_TLP_PROCESSING_IN_LEN 4 +/* VI number to get information for. */ +#define MC_CMD_GET_VI_TLP_PROCESSING_IN_INSTANCE_OFST 0 + +/* MC_CMD_GET_VI_TLP_PROCESSING_OUT msgresponse */ +#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_LEN 4 +/* Transaction processing steering hint 1 for use with the Rx Queue. */ +#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_TPH_TAG1_RX_OFST 0 +#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_TPH_TAG1_RX_LEN 1 +/* Transaction processing steering hint 2 for use with the Ev Queue. */ +#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_TPH_TAG2_EV_OFST 1 +#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_TPH_TAG2_EV_LEN 1 +/* Use Relaxed ordering model for TLPs on this VI. */ +#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_RELAXED_ORDERING_LBN 16 +#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_RELAXED_ORDERING_WIDTH 1 +/* Use ID based ordering for TLPs on this VI. */ +#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_ID_BASED_ORDERING_LBN 17 +#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_ID_BASED_ORDERING_WIDTH 1 +/* Set no snoop bit for TLPs on this VI. */ +#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_NO_SNOOP_LBN 18 +#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_NO_SNOOP_WIDTH 1 +/* Enable TPH for TLPs on this VI. */ +#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_TPH_ON_LBN 19 +#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_TPH_ON_WIDTH 1 +#define MC_CMD_GET_VI_TLP_PROCESSING_OUT_DATA_OFST 0 + + +/***********************************/ +/* MC_CMD_SET_VI_TLP_PROCESSING + * Set TLP steering and ordering information for a VI. + */ +#define MC_CMD_SET_VI_TLP_PROCESSING 0xb1 +#undef MC_CMD_0xb1_PRIVILEGE_CTG + +#define MC_CMD_0xb1_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_SET_VI_TLP_PROCESSING_IN msgrequest */ +#define MC_CMD_SET_VI_TLP_PROCESSING_IN_LEN 8 +/* VI number to set information for. */ +#define MC_CMD_SET_VI_TLP_PROCESSING_IN_INSTANCE_OFST 0 +/* Transaction processing steering hint 1 for use with the Rx Queue. */ +#define MC_CMD_SET_VI_TLP_PROCESSING_IN_TPH_TAG1_RX_OFST 4 +#define MC_CMD_SET_VI_TLP_PROCESSING_IN_TPH_TAG1_RX_LEN 1 +/* Transaction processing steering hint 2 for use with the Ev Queue. */ +#define MC_CMD_SET_VI_TLP_PROCESSING_IN_TPH_TAG2_EV_OFST 5 +#define MC_CMD_SET_VI_TLP_PROCESSING_IN_TPH_TAG2_EV_LEN 1 +/* Use Relaxed ordering model for TLPs on this VI. */ +#define MC_CMD_SET_VI_TLP_PROCESSING_IN_RELAXED_ORDERING_LBN 48 +#define MC_CMD_SET_VI_TLP_PROCESSING_IN_RELAXED_ORDERING_WIDTH 1 +/* Use ID based ordering for TLPs on this VI. */ +#define MC_CMD_SET_VI_TLP_PROCESSING_IN_ID_BASED_ORDERING_LBN 49 +#define MC_CMD_SET_VI_TLP_PROCESSING_IN_ID_BASED_ORDERING_WIDTH 1 +/* Set the no snoop bit for TLPs on this VI. */ +#define MC_CMD_SET_VI_TLP_PROCESSING_IN_NO_SNOOP_LBN 50 +#define MC_CMD_SET_VI_TLP_PROCESSING_IN_NO_SNOOP_WIDTH 1 +/* Enable TPH for TLPs on this VI. */ +#define MC_CMD_SET_VI_TLP_PROCESSING_IN_TPH_ON_LBN 51 +#define MC_CMD_SET_VI_TLP_PROCESSING_IN_TPH_ON_WIDTH 1 +#define MC_CMD_SET_VI_TLP_PROCESSING_IN_DATA_OFST 4 + +/* MC_CMD_SET_VI_TLP_PROCESSING_OUT msgresponse */ +#define MC_CMD_SET_VI_TLP_PROCESSING_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_GET_TLP_PROCESSING_GLOBALS + * Get global PCIe steering and transaction processing configuration. + */ +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS 0xbc +#undef MC_CMD_0xbc_PRIVILEGE_CTG + +#define MC_CMD_0xbc_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN msgrequest */ +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_LEN 4 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_OFST 0 +/* enum: MISC. */ +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_MISC 0x0 +/* enum: IDO. */ +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_IDO 0x1 +/* enum: RO. */ +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_RO 0x2 +/* enum: TPH Type. */ +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_TPH_TYPE 0x3 + +/* MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT msgresponse */ +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_LEN 8 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_GLOBAL_CATEGORY_OFST 0 +/* Enum values, see field(s): */ +/* MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN/TLP_GLOBAL_CATEGORY */ +/* Amalgamated TLP info word. */ +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_WORD_OFST 4 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_MISC_WTAG_EN_LBN 0 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_MISC_WTAG_EN_WIDTH 1 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_MISC_SPARE_LBN 1 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_MISC_SPARE_WIDTH 31 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_DL_EN_LBN 0 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_DL_EN_WIDTH 1 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_TX_EN_LBN 1 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_TX_EN_WIDTH 1 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_EV_EN_LBN 2 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_EV_EN_WIDTH 1 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_RX_EN_LBN 3 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_RX_EN_WIDTH 1 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_SPARE_LBN 4 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_SPARE_WIDTH 28 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_RXDMA_EN_LBN 0 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_RXDMA_EN_WIDTH 1 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_TXDMA_EN_LBN 1 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_TXDMA_EN_WIDTH 1 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_DL_EN_LBN 2 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_DL_EN_WIDTH 1 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_SPARE_LBN 3 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_SPARE_WIDTH 29 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_MSIX_LBN 0 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_MSIX_WIDTH 2 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_DL_LBN 2 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_DL_WIDTH 2 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_TX_LBN 4 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_TX_WIDTH 2 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_EV_LBN 6 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_EV_WIDTH 2 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_RX_LBN 8 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_RX_WIDTH 2 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TLP_TYPE_SPARE_LBN 9 +#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TLP_TYPE_SPARE_WIDTH 23 + + +/***********************************/ +/* MC_CMD_SET_TLP_PROCESSING_GLOBALS + * Set global PCIe steering and transaction processing configuration. + */ +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS 0xbd +#undef MC_CMD_0xbd_PRIVILEGE_CTG + +#define MC_CMD_0xbd_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN msgrequest */ +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_LEN 8 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_OFST 0 +/* Enum values, see field(s): */ +/* MC_CMD_GET_TLP_PROCESSING_GLOBALS/MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN/TLP_GLOBAL_CATEGORY */ +/* Amalgamated TLP info word. */ +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_WORD_OFST 4 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_MISC_WTAG_EN_LBN 0 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_MISC_WTAG_EN_WIDTH 1 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_DL_EN_LBN 0 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_DL_EN_WIDTH 1 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_TX_EN_LBN 1 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_TX_EN_WIDTH 1 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_EV_EN_LBN 2 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_EV_EN_WIDTH 1 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_RX_EN_LBN 3 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_RX_EN_WIDTH 1 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_RXDMA_EN_LBN 0 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_RXDMA_EN_WIDTH 1 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_TXDMA_EN_LBN 1 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_TXDMA_EN_WIDTH 1 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_DL_EN_LBN 2 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_DL_EN_WIDTH 1 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_MSIX_LBN 0 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_MSIX_WIDTH 2 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_DL_LBN 2 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_DL_WIDTH 2 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_TX_LBN 4 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_TX_WIDTH 2 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_EV_LBN 6 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_EV_WIDTH 2 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_RX_LBN 8 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_RX_WIDTH 2 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_SPARE_LBN 10 +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_SPARE_WIDTH 22 + +/* MC_CMD_SET_TLP_PROCESSING_GLOBALS_OUT msgresponse */ +#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_SATELLITE_DOWNLOAD + * Download a new set of images to the satellite CPUs from the host. + */ +#define MC_CMD_SATELLITE_DOWNLOAD 0x91 +#undef MC_CMD_0x91_PRIVILEGE_CTG + +#define MC_CMD_0x91_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_SATELLITE_DOWNLOAD_IN msgrequest: The reset requirements for the CPUs + * are subtle, and so downloads must proceed in a number of phases. + * + * 1) PHASE_RESET with a target of TARGET_ALL and chunk ID/length of 0. + * + * 2) PHASE_IMEMS for each of the IMEM targets (target IDs 0-11). Each download + * may consist of multiple chunks. The final chunk (with CHUNK_ID_LAST) should + * be a checksum (a simple 32-bit sum) of the transferred data. An individual + * download may be aborted using CHUNK_ID_ABORT. + * + * 3) PHASE_VECTORS for each of the vector table targets (target IDs 12-15), + * similar to PHASE_IMEMS. + * + * 4) PHASE_READY with a target of TARGET_ALL and chunk ID/length of 0. + * + * After any error (a requested abort is not considered to be an error) the + * sequence must be restarted from PHASE_RESET. + */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_LENMIN 20 +#define MC_CMD_SATELLITE_DOWNLOAD_IN_LENMAX 252 +#define MC_CMD_SATELLITE_DOWNLOAD_IN_LEN(num) (16+4*(num)) +/* Download phase. (Note: the IDLE phase is used internally and is never valid + * in a command from the host.) + */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_OFST 0 +#define MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_IDLE 0x0 /* enum */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_RESET 0x1 /* enum */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_IMEMS 0x2 /* enum */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_VECTORS 0x3 /* enum */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_READY 0x4 /* enum */ +/* Target for download. (These match the blob numbers defined in + * mc_flash_layout.h.) + */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_OFST 4 +/* enum: Valid in phase 2 (PHASE_IMEMS) only */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXDI_TEXT 0x0 +/* enum: Valid in phase 2 (PHASE_IMEMS) only */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXDI_TEXT 0x1 +/* enum: Valid in phase 2 (PHASE_IMEMS) only */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXDP_TEXT 0x2 +/* enum: Valid in phase 2 (PHASE_IMEMS) only */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXDP_TEXT 0x3 +/* enum: Valid in phase 2 (PHASE_IMEMS) only */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXHRSL_HR_LUT 0x4 +/* enum: Valid in phase 2 (PHASE_IMEMS) only */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXHRSL_HR_LUT_CFG 0x5 +/* enum: Valid in phase 2 (PHASE_IMEMS) only */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXHRSL_HR_LUT 0x6 +/* enum: Valid in phase 2 (PHASE_IMEMS) only */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXHRSL_HR_LUT_CFG 0x7 +/* enum: Valid in phase 2 (PHASE_IMEMS) only */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXHRSL_HR_PGM 0x8 +/* enum: Valid in phase 2 (PHASE_IMEMS) only */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXHRSL_SL_PGM 0x9 +/* enum: Valid in phase 2 (PHASE_IMEMS) only */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXHRSL_HR_PGM 0xa +/* enum: Valid in phase 2 (PHASE_IMEMS) only */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXHRSL_SL_PGM 0xb +/* enum: Valid in phase 3 (PHASE_VECTORS) only */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXDI_VTBL0 0xc +/* enum: Valid in phase 3 (PHASE_VECTORS) only */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXDI_VTBL0 0xd +/* enum: Valid in phase 3 (PHASE_VECTORS) only */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXDI_VTBL1 0xe +/* enum: Valid in phase 3 (PHASE_VECTORS) only */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXDI_VTBL1 0xf +/* enum: Valid in phases 1 (PHASE_RESET) and 4 (PHASE_READY) only */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_ALL 0xffffffff +/* Chunk ID, or CHUNK_ID_LAST or CHUNK_ID_ABORT */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_ID_OFST 8 +/* enum: Last chunk, containing checksum rather than data */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_ID_LAST 0xffffffff +/* enum: Abort download of this item */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_ID_ABORT 0xfffffffe +/* Length of this chunk in bytes */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_LEN_OFST 12 +/* Data for this chunk */ +#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_OFST 16 +#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_LEN 4 +#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_MINNUM 1 +#define MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_MAXNUM 59 + +/* MC_CMD_SATELLITE_DOWNLOAD_OUT msgresponse */ +#define MC_CMD_SATELLITE_DOWNLOAD_OUT_LEN 8 +/* Same as MC_CMD_ERR field, but included as 0 in success cases */ +#define MC_CMD_SATELLITE_DOWNLOAD_OUT_RESULT_OFST 0 +/* Extra status information */ +#define MC_CMD_SATELLITE_DOWNLOAD_OUT_INFO_OFST 4 +/* enum: Code download OK, completed. */ +#define MC_CMD_SATELLITE_DOWNLOAD_OUT_OK_COMPLETE 0x0 +/* enum: Code download aborted as requested. */ +#define MC_CMD_SATELLITE_DOWNLOAD_OUT_OK_ABORTED 0x1 +/* enum: Code download OK so far, send next chunk. */ +#define MC_CMD_SATELLITE_DOWNLOAD_OUT_OK_NEXT_CHUNK 0x2 +/* enum: Download phases out of sequence */ +#define MC_CMD_SATELLITE_DOWNLOAD_OUT_ERR_BAD_PHASE 0x100 +/* enum: Bad target for this phase */ +#define MC_CMD_SATELLITE_DOWNLOAD_OUT_ERR_BAD_TARGET 0x101 +/* enum: Chunk ID out of sequence */ +#define MC_CMD_SATELLITE_DOWNLOAD_OUT_ERR_BAD_CHUNK_ID 0x200 +/* enum: Chunk length zero or too large */ +#define MC_CMD_SATELLITE_DOWNLOAD_OUT_ERR_BAD_CHUNK_LEN 0x201 +/* enum: Checksum was incorrect */ +#define MC_CMD_SATELLITE_DOWNLOAD_OUT_ERR_BAD_CHECKSUM 0x300 + + +/***********************************/ +/* MC_CMD_GET_CAPABILITIES + * Get device capabilities. + * + * This is supplementary to the MC_CMD_GET_BOARD_CFG command, and intended to + * reference inherent device capabilities as opposed to current NVRAM config. + */ +#define MC_CMD_GET_CAPABILITIES 0xbe +#undef MC_CMD_0xbe_PRIVILEGE_CTG + +#define MC_CMD_0xbe_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_GET_CAPABILITIES_IN msgrequest */ +#define MC_CMD_GET_CAPABILITIES_IN_LEN 0 + +/* MC_CMD_GET_CAPABILITIES_OUT msgresponse */ +#define MC_CMD_GET_CAPABILITIES_OUT_LEN 20 +/* First word of flags. */ +#define MC_CMD_GET_CAPABILITIES_OUT_FLAGS1_OFST 0 +#define MC_CMD_GET_CAPABILITIES_OUT_TX_MAC_SECURITY_FILTERING_LBN 12 +#define MC_CMD_GET_CAPABILITIES_OUT_TX_MAC_SECURITY_FILTERING_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_OUT_ADDITIONAL_RSS_MODES_LBN 13 +#define MC_CMD_GET_CAPABILITIES_OUT_ADDITIONAL_RSS_MODES_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_OUT_QBB_LBN 14 +#define MC_CMD_GET_CAPABILITIES_OUT_QBB_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_OUT_RX_PACKED_STREAM_VAR_BUFFERS_LBN 15 +#define MC_CMD_GET_CAPABILITIES_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_OUT_RX_RSS_LIMITED_LBN 16 +#define MC_CMD_GET_CAPABILITIES_OUT_RX_RSS_LIMITED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_OUT_RX_PACKED_STREAM_LBN 17 +#define MC_CMD_GET_CAPABILITIES_OUT_RX_PACKED_STREAM_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_OUT_RX_INCLUDE_FCS_LBN 18 +#define MC_CMD_GET_CAPABILITIES_OUT_RX_INCLUDE_FCS_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_OUT_TX_VLAN_INSERTION_LBN 19 +#define MC_CMD_GET_CAPABILITIES_OUT_TX_VLAN_INSERTION_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_OUT_RX_VLAN_STRIPPING_LBN 20 +#define MC_CMD_GET_CAPABILITIES_OUT_RX_VLAN_STRIPPING_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_OUT_TX_TSO_LBN 21 +#define MC_CMD_GET_CAPABILITIES_OUT_TX_TSO_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_OUT_RX_PREFIX_LEN_0_LBN 22 +#define MC_CMD_GET_CAPABILITIES_OUT_RX_PREFIX_LEN_0_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_OUT_RX_PREFIX_LEN_14_LBN 23 +#define MC_CMD_GET_CAPABILITIES_OUT_RX_PREFIX_LEN_14_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_OUT_RX_TIMESTAMP_LBN 24 +#define MC_CMD_GET_CAPABILITIES_OUT_RX_TIMESTAMP_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_OUT_RX_BATCHING_LBN 25 +#define MC_CMD_GET_CAPABILITIES_OUT_RX_BATCHING_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_OUT_MCAST_FILTER_CHAINING_LBN 26 +#define MC_CMD_GET_CAPABILITIES_OUT_MCAST_FILTER_CHAINING_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_OUT_PM_AND_RXDP_COUNTERS_LBN 27 +#define MC_CMD_GET_CAPABILITIES_OUT_PM_AND_RXDP_COUNTERS_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_OUT_RX_DISABLE_SCATTER_LBN 28 +#define MC_CMD_GET_CAPABILITIES_OUT_RX_DISABLE_SCATTER_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_OUT_TX_MCAST_UDP_LOOPBACK_LBN 29 +#define MC_CMD_GET_CAPABILITIES_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_OUT_EVB_LBN 30 +#define MC_CMD_GET_CAPABILITIES_OUT_EVB_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_OUT_VXLAN_NVGRE_LBN 31 +#define MC_CMD_GET_CAPABILITIES_OUT_VXLAN_NVGRE_WIDTH 1 +/* RxDPCPU firmware id. */ +#define MC_CMD_GET_CAPABILITIES_OUT_RX_DPCPU_FW_ID_OFST 4 +#define MC_CMD_GET_CAPABILITIES_OUT_RX_DPCPU_FW_ID_LEN 2 +/* enum: Standard RXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_OUT_RXDP 0x0 +/* enum: Low latency RXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_OUT_RXDP_LOW_LATENCY 0x1 +/* enum: Packed stream RXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_OUT_RXDP_PACKED_STREAM 0x2 +/* enum: BIST RXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_OUT_RXDP_BIST 0x10a +/* enum: RXDP Test firmware image 1 */ +#define MC_CMD_GET_CAPABILITIES_OUT_RXDP_TEST_FW_TO_MC_CUT_THROUGH 0x101 +/* enum: RXDP Test firmware image 2 */ +#define MC_CMD_GET_CAPABILITIES_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD 0x102 +/* enum: RXDP Test firmware image 3 */ +#define MC_CMD_GET_CAPABILITIES_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD_FIRST 0x103 +/* enum: RXDP Test firmware image 4 */ +#define MC_CMD_GET_CAPABILITIES_OUT_RXDP_TEST_EVERY_EVENT_BATCHABLE 0x104 +/* enum: RXDP Test firmware image 5 */ +#define MC_CMD_GET_CAPABILITIES_OUT_RXDP_TEST_BACKPRESSURE 0x105 +/* enum: RXDP Test firmware image 6 */ +#define MC_CMD_GET_CAPABILITIES_OUT_RXDP_TEST_FW_PACKET_EDITS 0x106 +/* enum: RXDP Test firmware image 7 */ +#define MC_CMD_GET_CAPABILITIES_OUT_RXDP_TEST_FW_RX_HDR_SPLIT 0x107 +/* enum: RXDP Test firmware image 8 */ +#define MC_CMD_GET_CAPABILITIES_OUT_RXDP_TEST_FW_DISABLE_DL 0x108 +/* TxDPCPU firmware id. */ +#define MC_CMD_GET_CAPABILITIES_OUT_TX_DPCPU_FW_ID_OFST 6 +#define MC_CMD_GET_CAPABILITIES_OUT_TX_DPCPU_FW_ID_LEN 2 +/* enum: Standard TXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_OUT_TXDP 0x0 +/* enum: Low latency TXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_OUT_TXDP_LOW_LATENCY 0x1 +/* enum: High packet rate TXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_OUT_TXDP_HIGH_PACKET_RATE 0x3 +/* enum: BIST TXDP firmware */ +#define MC_CMD_GET_CAPABILITIES_OUT_TXDP_BIST 0x12d +/* enum: TXDP Test firmware image 1 */ +#define MC_CMD_GET_CAPABILITIES_OUT_TXDP_TEST_FW_TSO_EDIT 0x101 +/* enum: TXDP Test firmware image 2 */ +#define MC_CMD_GET_CAPABILITIES_OUT_TXDP_TEST_FW_PACKET_EDITS 0x102 +#define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_VERSION_OFST 8 +#define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_VERSION_LEN 2 +#define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_VERSION_REV_LBN 0 +#define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_VERSION_REV_WIDTH 12 +#define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_VERSION_TYPE_LBN 12 +#define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4 +/* enum: reserved value - do not use (may indicate alternative interpretation + * of REV field in future) + */ +#define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_RESERVED 0x0 +/* enum: Trivial RX PD firmware for early Huntington development (Huntington + * development only) + */ +#define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_FIRST_PKT 0x1 +/* enum: RX PD firmware with approximately Siena-compatible behaviour + * (Huntington development only) + */ +#define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_SIENA_COMPAT 0x2 +/* enum: Virtual switching (full feature) RX PD production firmware */ +#define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_VSWITCH 0x3 +/* enum: siena_compat variant RX PD firmware using PM rather than MAC + * (Huntington development only) + */ +#define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_SIENA_COMPAT_PM 0x4 +/* enum: Low latency RX PD production firmware */ +#define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_LOW_LATENCY 0x5 +/* enum: Packed stream RX PD production firmware */ +#define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_PACKED_STREAM 0x6 +/* enum: RX PD firmware handling layer 2 only for high packet rate performance + * tests (Medford development only) + */ +#define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_LAYER2_PERF 0x7 +/* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ +#define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE 0xe +/* enum: RX PD firmware parsing but not filtering network overlay tunnel + * encapsulations (Medford development only) + */ +#define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_TYPE_TESTFW_ENCAP_PARSING_ONLY 0xf +#define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_VERSION_OFST 10 +#define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_VERSION_LEN 2 +#define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_VERSION_REV_LBN 0 +#define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_VERSION_REV_WIDTH 12 +#define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_VERSION_TYPE_LBN 12 +#define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4 +/* enum: reserved value - do not use (may indicate alternative interpretation + * of REV field in future) + */ +#define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_TYPE_RESERVED 0x0 +/* enum: Trivial TX PD firmware for early Huntington development (Huntington + * development only) + */ +#define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_TYPE_FIRST_PKT 0x1 +/* enum: TX PD firmware with approximately Siena-compatible behaviour + * (Huntington development only) + */ +#define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_TYPE_SIENA_COMPAT 0x2 +/* enum: Virtual switching (full feature) TX PD production firmware */ +#define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_TYPE_VSWITCH 0x3 +/* enum: siena_compat variant TX PD firmware using PM rather than MAC + * (Huntington development only) + */ +#define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_TYPE_SIENA_COMPAT_PM 0x4 +#define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_TYPE_LOW_LATENCY 0x5 /* enum */ +/* enum: TX PD firmware handling layer 2 only for high packet rate performance + * tests (Medford development only) + */ +#define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_TYPE_LAYER2_PERF 0x7 +/* enum: RX PD firmware for GUE parsing prototype (Medford development only) */ +#define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE 0xe +/* Hardware capabilities of NIC */ +#define MC_CMD_GET_CAPABILITIES_OUT_HW_CAPABILITIES_OFST 12 +/* Licensed capabilities */ +#define MC_CMD_GET_CAPABILITIES_OUT_LICENSE_CAPABILITIES_OFST 16 + + +/***********************************/ +/* MC_CMD_V2_EXTN + * Encapsulation for a v2 extended command + */ +#define MC_CMD_V2_EXTN 0x7f /* MC_CMD_V2_EXTN_IN msgrequest */ #define MC_CMD_V2_EXTN_IN_LEN 4 +/* the extended command number */ #define MC_CMD_V2_EXTN_IN_EXTENDED_CMD_LBN 0 #define MC_CMD_V2_EXTN_IN_EXTENDED_CMD_WIDTH 15 #define MC_CMD_V2_EXTN_IN_UNUSED_LBN 15 #define MC_CMD_V2_EXTN_IN_UNUSED_WIDTH 1 +/* the actual length of the encapsulated command (which is not in the v1 + * header) + */ #define MC_CMD_V2_EXTN_IN_ACTUAL_LEN_LBN 16 #define MC_CMD_V2_EXTN_IN_ACTUAL_LEN_WIDTH 10 #define MC_CMD_V2_EXTN_IN_UNUSED2_LBN 26 @@ -5035,25 +9619,35 @@ /***********************************/ -/* MC_CMD_TCM_BUCKET_ALLOC +/* MC_CMD_TCM_BUCKET_ALLOC + * Allocate a pacer bucket (for qau rp or a snapper test) */ -#define MC_CMD_TCM_BUCKET_ALLOC 0x80 +#define MC_CMD_TCM_BUCKET_ALLOC 0xb2 +#undef MC_CMD_0xb2_PRIVILEGE_CTG + +#define MC_CMD_0xb2_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_TCM_BUCKET_ALLOC_IN msgrequest */ #define MC_CMD_TCM_BUCKET_ALLOC_IN_LEN 0 /* MC_CMD_TCM_BUCKET_ALLOC_OUT msgresponse */ #define MC_CMD_TCM_BUCKET_ALLOC_OUT_LEN 4 +/* the bucket id */ #define MC_CMD_TCM_BUCKET_ALLOC_OUT_BUCKET_OFST 0 /***********************************/ -/* MC_CMD_TCM_BUCKET_FREE +/* MC_CMD_TCM_BUCKET_FREE + * Free a pacer bucket */ -#define MC_CMD_TCM_BUCKET_FREE 0x81 +#define MC_CMD_TCM_BUCKET_FREE 0xb3 +#undef MC_CMD_0xb3_PRIVILEGE_CTG + +#define MC_CMD_0xb3_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_TCM_BUCKET_FREE_IN msgrequest */ #define MC_CMD_TCM_BUCKET_FREE_IN_LEN 4 +/* the bucket id */ #define MC_CMD_TCM_BUCKET_FREE_IN_BUCKET_OFST 0 /* MC_CMD_TCM_BUCKET_FREE_OUT msgresponse */ @@ -5061,35 +9655,2865 @@ /***********************************/ -/* MC_CMD_TCM_BUCKET_INIT +/* MC_CMD_TCM_BUCKET_INIT + * Initialise pacer bucket with a given rate */ -#define MC_CMD_TCM_BUCKET_INIT 0x82 +#define MC_CMD_TCM_BUCKET_INIT 0xb4 +#undef MC_CMD_0xb4_PRIVILEGE_CTG + +#define MC_CMD_0xb4_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_TCM_BUCKET_INIT_IN msgrequest */ #define MC_CMD_TCM_BUCKET_INIT_IN_LEN 8 +/* the bucket id */ #define MC_CMD_TCM_BUCKET_INIT_IN_BUCKET_OFST 0 +/* the rate in mbps */ #define MC_CMD_TCM_BUCKET_INIT_IN_RATE_OFST 4 +/* MC_CMD_TCM_BUCKET_INIT_EXT_IN msgrequest */ +#define MC_CMD_TCM_BUCKET_INIT_EXT_IN_LEN 12 +/* the bucket id */ +#define MC_CMD_TCM_BUCKET_INIT_EXT_IN_BUCKET_OFST 0 +/* the rate in mbps */ +#define MC_CMD_TCM_BUCKET_INIT_EXT_IN_RATE_OFST 4 +/* the desired maximum fill level */ +#define MC_CMD_TCM_BUCKET_INIT_EXT_IN_MAX_FILL_OFST 8 + /* MC_CMD_TCM_BUCKET_INIT_OUT msgresponse */ #define MC_CMD_TCM_BUCKET_INIT_OUT_LEN 0 /***********************************/ -/* MC_CMD_TCM_TXQ_INIT +/* MC_CMD_TCM_TXQ_INIT + * Initialise txq in pacer with given options or set options */ -#define MC_CMD_TCM_TXQ_INIT 0x83 +#define MC_CMD_TCM_TXQ_INIT 0xb5 +#undef MC_CMD_0xb5_PRIVILEGE_CTG + +#define MC_CMD_0xb5_PRIVILEGE_CTG SRIOV_CTG_GENERAL /* MC_CMD_TCM_TXQ_INIT_IN msgrequest */ #define MC_CMD_TCM_TXQ_INIT_IN_LEN 28 +/* the txq id */ #define MC_CMD_TCM_TXQ_INIT_IN_QID_OFST 0 +/* the static priority associated with the txq */ #define MC_CMD_TCM_TXQ_INIT_IN_LABEL_OFST 4 +/* bitmask of the priority queues this txq is inserted into when inserted. */ #define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAGS_OFST 8 +#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_GUARANTEED_LBN 0 +#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_GUARANTEED_WIDTH 1 +#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_NORMAL_LBN 1 +#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_NORMAL_WIDTH 1 +#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_LOW_LBN 2 +#define MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_LOW_WIDTH 1 +/* the reaction point (RP) bucket */ #define MC_CMD_TCM_TXQ_INIT_IN_RP_BKT_OFST 12 +/* an already reserved bucket (typically set to bucket associated with outer + * vswitch) + */ #define MC_CMD_TCM_TXQ_INIT_IN_MAX_BKT1_OFST 16 +/* an already reserved bucket (typically set to bucket associated with inner + * vswitch) + */ #define MC_CMD_TCM_TXQ_INIT_IN_MAX_BKT2_OFST 20 +/* the min bucket (typically for ETS/minimum bandwidth) */ #define MC_CMD_TCM_TXQ_INIT_IN_MIN_BKT_OFST 24 +/* MC_CMD_TCM_TXQ_INIT_EXT_IN msgrequest */ +#define MC_CMD_TCM_TXQ_INIT_EXT_IN_LEN 32 +/* the txq id */ +#define MC_CMD_TCM_TXQ_INIT_EXT_IN_QID_OFST 0 +/* the static priority associated with the txq */ +#define MC_CMD_TCM_TXQ_INIT_EXT_IN_LABEL_NORMAL_OFST 4 +/* bitmask of the priority queues this txq is inserted into when inserted. */ +#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAGS_OFST 8 +#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_GUARANTEED_LBN 0 +#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_GUARANTEED_WIDTH 1 +#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_NORMAL_LBN 1 +#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_NORMAL_WIDTH 1 +#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_LOW_LBN 2 +#define MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_LOW_WIDTH 1 +/* the reaction point (RP) bucket */ +#define MC_CMD_TCM_TXQ_INIT_EXT_IN_RP_BKT_OFST 12 +/* an already reserved bucket (typically set to bucket associated with outer + * vswitch) + */ +#define MC_CMD_TCM_TXQ_INIT_EXT_IN_MAX_BKT1_OFST 16 +/* an already reserved bucket (typically set to bucket associated with inner + * vswitch) + */ +#define MC_CMD_TCM_TXQ_INIT_EXT_IN_MAX_BKT2_OFST 20 +/* the min bucket (typically for ETS/minimum bandwidth) */ +#define MC_CMD_TCM_TXQ_INIT_EXT_IN_MIN_BKT_OFST 24 +/* the static priority associated with the txq */ +#define MC_CMD_TCM_TXQ_INIT_EXT_IN_LABEL_GUARANTEED_OFST 28 + /* MC_CMD_TCM_TXQ_INIT_OUT msgresponse */ #define MC_CMD_TCM_TXQ_INIT_OUT_LEN 0 + +/***********************************/ +/* MC_CMD_LINK_PIOBUF + * Link a push I/O buffer to a TxQ + */ +#define MC_CMD_LINK_PIOBUF 0x92 +#undef MC_CMD_0x92_PRIVILEGE_CTG + +#define MC_CMD_0x92_PRIVILEGE_CTG SRIOV_CTG_ONLOAD + +/* MC_CMD_LINK_PIOBUF_IN msgrequest */ +#define MC_CMD_LINK_PIOBUF_IN_LEN 8 +/* Handle for allocated push I/O buffer. */ +#define MC_CMD_LINK_PIOBUF_IN_PIOBUF_HANDLE_OFST 0 +/* Function Local Instance (VI) number. */ +#define MC_CMD_LINK_PIOBUF_IN_TXQ_INSTANCE_OFST 4 + +/* MC_CMD_LINK_PIOBUF_OUT msgresponse */ +#define MC_CMD_LINK_PIOBUF_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_UNLINK_PIOBUF + * Unlink a push I/O buffer from a TxQ + */ +#define MC_CMD_UNLINK_PIOBUF 0x93 +#undef MC_CMD_0x93_PRIVILEGE_CTG + +#define MC_CMD_0x93_PRIVILEGE_CTG SRIOV_CTG_ONLOAD + +/* MC_CMD_UNLINK_PIOBUF_IN msgrequest */ +#define MC_CMD_UNLINK_PIOBUF_IN_LEN 4 +/* Function Local Instance (VI) number. */ +#define MC_CMD_UNLINK_PIOBUF_IN_TXQ_INSTANCE_OFST 0 + +/* MC_CMD_UNLINK_PIOBUF_OUT msgresponse */ +#define MC_CMD_UNLINK_PIOBUF_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_VSWITCH_ALLOC + * allocate and initialise a v-switch. + */ +#define MC_CMD_VSWITCH_ALLOC 0x94 +#undef MC_CMD_0x94_PRIVILEGE_CTG + +#define MC_CMD_0x94_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_VSWITCH_ALLOC_IN msgrequest */ +#define MC_CMD_VSWITCH_ALLOC_IN_LEN 16 +/* The port to connect to the v-switch's upstream port. */ +#define MC_CMD_VSWITCH_ALLOC_IN_UPSTREAM_PORT_ID_OFST 0 +/* The type of v-switch to create. */ +#define MC_CMD_VSWITCH_ALLOC_IN_TYPE_OFST 4 +/* enum: VLAN */ +#define MC_CMD_VSWITCH_ALLOC_IN_VSWITCH_TYPE_VLAN 0x1 +/* enum: VEB */ +#define MC_CMD_VSWITCH_ALLOC_IN_VSWITCH_TYPE_VEB 0x2 +/* enum: VEPA (obsolete) */ +#define MC_CMD_VSWITCH_ALLOC_IN_VSWITCH_TYPE_VEPA 0x3 +/* enum: MUX */ +#define MC_CMD_VSWITCH_ALLOC_IN_VSWITCH_TYPE_MUX 0x4 +/* enum: Snapper specific; semantics TBD */ +#define MC_CMD_VSWITCH_ALLOC_IN_VSWITCH_TYPE_TEST 0x5 +/* Flags controlling v-port creation */ +#define MC_CMD_VSWITCH_ALLOC_IN_FLAGS_OFST 8 +#define MC_CMD_VSWITCH_ALLOC_IN_FLAG_AUTO_PORT_LBN 0 +#define MC_CMD_VSWITCH_ALLOC_IN_FLAG_AUTO_PORT_WIDTH 1 +/* The number of VLAN tags to allow for attached v-ports. For VLAN aggregators, + * this must be one or greated, and the attached v-ports must have exactly this + * number of tags. For other v-switch types, this must be zero of greater, and + * is an upper limit on the number of VLAN tags for attached v-ports. An error + * will be returned if existing configuration means we can't support attached + * v-ports with this number of tags. + */ +#define MC_CMD_VSWITCH_ALLOC_IN_NUM_VLAN_TAGS_OFST 12 + +/* MC_CMD_VSWITCH_ALLOC_OUT msgresponse */ +#define MC_CMD_VSWITCH_ALLOC_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_VSWITCH_FREE + * de-allocate a v-switch. + */ +#define MC_CMD_VSWITCH_FREE 0x95 +#undef MC_CMD_0x95_PRIVILEGE_CTG + +#define MC_CMD_0x95_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_VSWITCH_FREE_IN msgrequest */ +#define MC_CMD_VSWITCH_FREE_IN_LEN 4 +/* The port to which the v-switch is connected. */ +#define MC_CMD_VSWITCH_FREE_IN_UPSTREAM_PORT_ID_OFST 0 + +/* MC_CMD_VSWITCH_FREE_OUT msgresponse */ +#define MC_CMD_VSWITCH_FREE_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_VPORT_ALLOC + * allocate a v-port. + */ +#define MC_CMD_VPORT_ALLOC 0x96 +#undef MC_CMD_0x96_PRIVILEGE_CTG + +#define MC_CMD_0x96_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_VPORT_ALLOC_IN msgrequest */ +#define MC_CMD_VPORT_ALLOC_IN_LEN 20 +/* The port to which the v-switch is connected. */ +#define MC_CMD_VPORT_ALLOC_IN_UPSTREAM_PORT_ID_OFST 0 +/* The type of the new v-port. */ +#define MC_CMD_VPORT_ALLOC_IN_TYPE_OFST 4 +/* enum: VLAN (obsolete) */ +#define MC_CMD_VPORT_ALLOC_IN_VPORT_TYPE_VLAN 0x1 +/* enum: VEB (obsolete) */ +#define MC_CMD_VPORT_ALLOC_IN_VPORT_TYPE_VEB 0x2 +/* enum: VEPA (obsolete) */ +#define MC_CMD_VPORT_ALLOC_IN_VPORT_TYPE_VEPA 0x3 +/* enum: A normal v-port receives packets which match a specified MAC and/or + * VLAN. + */ +#define MC_CMD_VPORT_ALLOC_IN_VPORT_TYPE_NORMAL 0x4 +/* enum: An expansion v-port packets traffic which don't match any other + * v-port. + */ +#define MC_CMD_VPORT_ALLOC_IN_VPORT_TYPE_EXPANSION 0x5 +/* enum: An test v-port receives packets which match any filters installed by + * its downstream components. + */ +#define MC_CMD_VPORT_ALLOC_IN_VPORT_TYPE_TEST 0x6 +/* Flags controlling v-port creation */ +#define MC_CMD_VPORT_ALLOC_IN_FLAGS_OFST 8 +#define MC_CMD_VPORT_ALLOC_IN_FLAG_AUTO_PORT_LBN 0 +#define MC_CMD_VPORT_ALLOC_IN_FLAG_AUTO_PORT_WIDTH 1 +/* The number of VLAN tags to insert/remove. An error will be returned if + * incompatible with the number of VLAN tags specified for the upstream + * v-switch. + */ +#define MC_CMD_VPORT_ALLOC_IN_NUM_VLAN_TAGS_OFST 12 +/* The actual VLAN tags to insert/remove */ +#define MC_CMD_VPORT_ALLOC_IN_VLAN_TAGS_OFST 16 +#define MC_CMD_VPORT_ALLOC_IN_VLAN_TAG_0_LBN 0 +#define MC_CMD_VPORT_ALLOC_IN_VLAN_TAG_0_WIDTH 16 +#define MC_CMD_VPORT_ALLOC_IN_VLAN_TAG_1_LBN 16 +#define MC_CMD_VPORT_ALLOC_IN_VLAN_TAG_1_WIDTH 16 + +/* MC_CMD_VPORT_ALLOC_OUT msgresponse */ +#define MC_CMD_VPORT_ALLOC_OUT_LEN 4 +/* The handle of the new v-port */ +#define MC_CMD_VPORT_ALLOC_OUT_VPORT_ID_OFST 0 + + +/***********************************/ +/* MC_CMD_VPORT_FREE + * de-allocate a v-port. + */ +#define MC_CMD_VPORT_FREE 0x97 +#undef MC_CMD_0x97_PRIVILEGE_CTG + +#define MC_CMD_0x97_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_VPORT_FREE_IN msgrequest */ +#define MC_CMD_VPORT_FREE_IN_LEN 4 +/* The handle of the v-port */ +#define MC_CMD_VPORT_FREE_IN_VPORT_ID_OFST 0 + +/* MC_CMD_VPORT_FREE_OUT msgresponse */ +#define MC_CMD_VPORT_FREE_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_VADAPTOR_ALLOC + * allocate a v-adaptor. + */ +#define MC_CMD_VADAPTOR_ALLOC 0x98 +#undef MC_CMD_0x98_PRIVILEGE_CTG + +#define MC_CMD_0x98_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_VADAPTOR_ALLOC_IN msgrequest */ +#define MC_CMD_VADAPTOR_ALLOC_IN_LEN 30 +/* The port to connect to the v-adaptor's port. */ +#define MC_CMD_VADAPTOR_ALLOC_IN_UPSTREAM_PORT_ID_OFST 0 +/* Flags controlling v-adaptor creation */ +#define MC_CMD_VADAPTOR_ALLOC_IN_FLAGS_OFST 8 +#define MC_CMD_VADAPTOR_ALLOC_IN_FLAG_AUTO_VADAPTOR_LBN 0 +#define MC_CMD_VADAPTOR_ALLOC_IN_FLAG_AUTO_VADAPTOR_WIDTH 1 +/* The number of VLAN tags to strip on receive */ +#define MC_CMD_VADAPTOR_ALLOC_IN_NUM_VLANS_OFST 12 +/* The number of VLAN tags to transparently insert/remove. */ +#define MC_CMD_VADAPTOR_ALLOC_IN_NUM_VLAN_TAGS_OFST 16 +/* The actual VLAN tags to insert/remove */ +#define MC_CMD_VADAPTOR_ALLOC_IN_VLAN_TAGS_OFST 20 +#define MC_CMD_VADAPTOR_ALLOC_IN_VLAN_TAG_0_LBN 0 +#define MC_CMD_VADAPTOR_ALLOC_IN_VLAN_TAG_0_WIDTH 16 +#define MC_CMD_VADAPTOR_ALLOC_IN_VLAN_TAG_1_LBN 16 +#define MC_CMD_VADAPTOR_ALLOC_IN_VLAN_TAG_1_WIDTH 16 +/* The MAC address to assign to this v-adaptor */ +#define MC_CMD_VADAPTOR_ALLOC_IN_MACADDR_OFST 24 +#define MC_CMD_VADAPTOR_ALLOC_IN_MACADDR_LEN 6 +/* enum: Derive the MAC address from the upstream port */ +#define MC_CMD_VADAPTOR_ALLOC_IN_AUTO_MAC 0x0 + +/* MC_CMD_VADAPTOR_ALLOC_OUT msgresponse */ +#define MC_CMD_VADAPTOR_ALLOC_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_VADAPTOR_FREE + * de-allocate a v-adaptor. + */ +#define MC_CMD_VADAPTOR_FREE 0x99 +#undef MC_CMD_0x99_PRIVILEGE_CTG + +#define MC_CMD_0x99_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_VADAPTOR_FREE_IN msgrequest */ +#define MC_CMD_VADAPTOR_FREE_IN_LEN 4 +/* The port to which the v-adaptor is connected. */ +#define MC_CMD_VADAPTOR_FREE_IN_UPSTREAM_PORT_ID_OFST 0 + +/* MC_CMD_VADAPTOR_FREE_OUT msgresponse */ +#define MC_CMD_VADAPTOR_FREE_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_VADAPTOR_SET_MAC + * assign a new MAC address to a v-adaptor. + */ +#define MC_CMD_VADAPTOR_SET_MAC 0x5d +#undef MC_CMD_0x5d_PRIVILEGE_CTG + +#define MC_CMD_0x5d_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_VADAPTOR_SET_MAC_IN msgrequest */ +#define MC_CMD_VADAPTOR_SET_MAC_IN_LEN 10 +/* The port to which the v-adaptor is connected. */ +#define MC_CMD_VADAPTOR_SET_MAC_IN_UPSTREAM_PORT_ID_OFST 0 +/* The new MAC address to assign to this v-adaptor */ +#define MC_CMD_VADAPTOR_SET_MAC_IN_MACADDR_OFST 4 +#define MC_CMD_VADAPTOR_SET_MAC_IN_MACADDR_LEN 6 + +/* MC_CMD_VADAPTOR_SET_MAC_OUT msgresponse */ +#define MC_CMD_VADAPTOR_SET_MAC_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_VADAPTOR_GET_MAC + * read the MAC address assigned to a v-adaptor. + */ +#define MC_CMD_VADAPTOR_GET_MAC 0x5e +#undef MC_CMD_0x5e_PRIVILEGE_CTG + +#define MC_CMD_0x5e_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_VADAPTOR_GET_MAC_IN msgrequest */ +#define MC_CMD_VADAPTOR_GET_MAC_IN_LEN 4 +/* The port to which the v-adaptor is connected. */ +#define MC_CMD_VADAPTOR_GET_MAC_IN_UPSTREAM_PORT_ID_OFST 0 + +/* MC_CMD_VADAPTOR_GET_MAC_OUT msgresponse */ +#define MC_CMD_VADAPTOR_GET_MAC_OUT_LEN 6 +/* The MAC address assigned to this v-adaptor */ +#define MC_CMD_VADAPTOR_GET_MAC_OUT_MACADDR_OFST 0 +#define MC_CMD_VADAPTOR_GET_MAC_OUT_MACADDR_LEN 6 + + +/***********************************/ +/* MC_CMD_EVB_PORT_ASSIGN + * assign a port to a PCI function. + */ +#define MC_CMD_EVB_PORT_ASSIGN 0x9a +#undef MC_CMD_0x9a_PRIVILEGE_CTG + +#define MC_CMD_0x9a_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_EVB_PORT_ASSIGN_IN msgrequest */ +#define MC_CMD_EVB_PORT_ASSIGN_IN_LEN 8 +/* The port to assign. */ +#define MC_CMD_EVB_PORT_ASSIGN_IN_PORT_ID_OFST 0 +/* The target function to modify. */ +#define MC_CMD_EVB_PORT_ASSIGN_IN_FUNCTION_OFST 4 +#define MC_CMD_EVB_PORT_ASSIGN_IN_PF_LBN 0 +#define MC_CMD_EVB_PORT_ASSIGN_IN_PF_WIDTH 16 +#define MC_CMD_EVB_PORT_ASSIGN_IN_VF_LBN 16 +#define MC_CMD_EVB_PORT_ASSIGN_IN_VF_WIDTH 16 + +/* MC_CMD_EVB_PORT_ASSIGN_OUT msgresponse */ +#define MC_CMD_EVB_PORT_ASSIGN_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_RDWR_A64_REGIONS + * Assign the 64 bit region addresses. + */ +#define MC_CMD_RDWR_A64_REGIONS 0x9b +#undef MC_CMD_0x9b_PRIVILEGE_CTG + +#define MC_CMD_0x9b_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_RDWR_A64_REGIONS_IN msgrequest */ +#define MC_CMD_RDWR_A64_REGIONS_IN_LEN 17 +#define MC_CMD_RDWR_A64_REGIONS_IN_REGION0_OFST 0 +#define MC_CMD_RDWR_A64_REGIONS_IN_REGION1_OFST 4 +#define MC_CMD_RDWR_A64_REGIONS_IN_REGION2_OFST 8 +#define MC_CMD_RDWR_A64_REGIONS_IN_REGION3_OFST 12 +/* Write enable bits 0-3, set to write, clear to read. */ +#define MC_CMD_RDWR_A64_REGIONS_IN_WRITE_MASK_LBN 128 +#define MC_CMD_RDWR_A64_REGIONS_IN_WRITE_MASK_WIDTH 4 +#define MC_CMD_RDWR_A64_REGIONS_IN_WRITE_MASK_BYTE_OFST 16 +#define MC_CMD_RDWR_A64_REGIONS_IN_WRITE_MASK_BYTE_LEN 1 + +/* MC_CMD_RDWR_A64_REGIONS_OUT msgresponse: This data always included + * regardless of state of write bits in the request. + */ +#define MC_CMD_RDWR_A64_REGIONS_OUT_LEN 16 +#define MC_CMD_RDWR_A64_REGIONS_OUT_REGION0_OFST 0 +#define MC_CMD_RDWR_A64_REGIONS_OUT_REGION1_OFST 4 +#define MC_CMD_RDWR_A64_REGIONS_OUT_REGION2_OFST 8 +#define MC_CMD_RDWR_A64_REGIONS_OUT_REGION3_OFST 12 + + +/***********************************/ +/* MC_CMD_ONLOAD_STACK_ALLOC + * Allocate an Onload stack ID. + */ +#define MC_CMD_ONLOAD_STACK_ALLOC 0x9c +#undef MC_CMD_0x9c_PRIVILEGE_CTG + +#define MC_CMD_0x9c_PRIVILEGE_CTG SRIOV_CTG_ONLOAD + +/* MC_CMD_ONLOAD_STACK_ALLOC_IN msgrequest */ +#define MC_CMD_ONLOAD_STACK_ALLOC_IN_LEN 4 +/* The handle of the owning upstream port */ +#define MC_CMD_ONLOAD_STACK_ALLOC_IN_UPSTREAM_PORT_ID_OFST 0 + +/* MC_CMD_ONLOAD_STACK_ALLOC_OUT msgresponse */ +#define MC_CMD_ONLOAD_STACK_ALLOC_OUT_LEN 4 +/* The handle of the new Onload stack */ +#define MC_CMD_ONLOAD_STACK_ALLOC_OUT_ONLOAD_STACK_ID_OFST 0 + + +/***********************************/ +/* MC_CMD_ONLOAD_STACK_FREE + * Free an Onload stack ID. + */ +#define MC_CMD_ONLOAD_STACK_FREE 0x9d +#undef MC_CMD_0x9d_PRIVILEGE_CTG + +#define MC_CMD_0x9d_PRIVILEGE_CTG SRIOV_CTG_ONLOAD + +/* MC_CMD_ONLOAD_STACK_FREE_IN msgrequest */ +#define MC_CMD_ONLOAD_STACK_FREE_IN_LEN 4 +/* The handle of the Onload stack */ +#define MC_CMD_ONLOAD_STACK_FREE_IN_ONLOAD_STACK_ID_OFST 0 + +/* MC_CMD_ONLOAD_STACK_FREE_OUT msgresponse */ +#define MC_CMD_ONLOAD_STACK_FREE_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_RSS_CONTEXT_ALLOC + * Allocate an RSS context. + */ +#define MC_CMD_RSS_CONTEXT_ALLOC 0x9e +#undef MC_CMD_0x9e_PRIVILEGE_CTG + +#define MC_CMD_0x9e_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_RSS_CONTEXT_ALLOC_IN msgrequest */ +#define MC_CMD_RSS_CONTEXT_ALLOC_IN_LEN 12 +/* The handle of the owning upstream port */ +#define MC_CMD_RSS_CONTEXT_ALLOC_IN_UPSTREAM_PORT_ID_OFST 0 +/* The type of context to allocate */ +#define MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_OFST 4 +/* enum: Allocate a context for exclusive use. The key and indirection table + * must be explicitly configured. + */ +#define MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_EXCLUSIVE 0x0 +/* enum: Allocate a context for shared use; this will spread across a range of + * queues, but the key and indirection table are pre-configured and may not be + * changed. For this mode, NUM_QUEUES must 2, 4, 8, 16, 32 or 64. + */ +#define MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_SHARED 0x1 +/* Number of queues spanned by this context, in the range 1-64; valid offsets + * in the indirection table will be in the range 0 to NUM_QUEUES-1. + */ +#define MC_CMD_RSS_CONTEXT_ALLOC_IN_NUM_QUEUES_OFST 8 + +/* MC_CMD_RSS_CONTEXT_ALLOC_OUT msgresponse */ +#define MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN 4 +/* The handle of the new RSS context. This should be considered opaque to the + * host, although a value of 0xFFFFFFFF is guaranteed never to be a valid + * handle. + */ +#define MC_CMD_RSS_CONTEXT_ALLOC_OUT_RSS_CONTEXT_ID_OFST 0 +/* enum: guaranteed invalid RSS context handle value */ +#define MC_CMD_RSS_CONTEXT_ALLOC_OUT_RSS_CONTEXT_ID_INVALID 0xffffffff + + +/***********************************/ +/* MC_CMD_RSS_CONTEXT_FREE + * Free an RSS context. + */ +#define MC_CMD_RSS_CONTEXT_FREE 0x9f +#undef MC_CMD_0x9f_PRIVILEGE_CTG + +#define MC_CMD_0x9f_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_RSS_CONTEXT_FREE_IN msgrequest */ +#define MC_CMD_RSS_CONTEXT_FREE_IN_LEN 4 +/* The handle of the RSS context */ +#define MC_CMD_RSS_CONTEXT_FREE_IN_RSS_CONTEXT_ID_OFST 0 + +/* MC_CMD_RSS_CONTEXT_FREE_OUT msgresponse */ +#define MC_CMD_RSS_CONTEXT_FREE_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_RSS_CONTEXT_SET_KEY + * Set the Toeplitz hash key for an RSS context. + */ +#define MC_CMD_RSS_CONTEXT_SET_KEY 0xa0 +#undef MC_CMD_0xa0_PRIVILEGE_CTG + +#define MC_CMD_0xa0_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_RSS_CONTEXT_SET_KEY_IN msgrequest */ +#define MC_CMD_RSS_CONTEXT_SET_KEY_IN_LEN 44 +/* The handle of the RSS context */ +#define MC_CMD_RSS_CONTEXT_SET_KEY_IN_RSS_CONTEXT_ID_OFST 0 +/* The 40-byte Toeplitz hash key (TBD endianness issues?) */ +#define MC_CMD_RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY_OFST 4 +#define MC_CMD_RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY_LEN 40 + +/* MC_CMD_RSS_CONTEXT_SET_KEY_OUT msgresponse */ +#define MC_CMD_RSS_CONTEXT_SET_KEY_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_RSS_CONTEXT_GET_KEY + * Get the Toeplitz hash key for an RSS context. + */ +#define MC_CMD_RSS_CONTEXT_GET_KEY 0xa1 +#undef MC_CMD_0xa1_PRIVILEGE_CTG + +#define MC_CMD_0xa1_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_RSS_CONTEXT_GET_KEY_IN msgrequest */ +#define MC_CMD_RSS_CONTEXT_GET_KEY_IN_LEN 4 +/* The handle of the RSS context */ +#define MC_CMD_RSS_CONTEXT_GET_KEY_IN_RSS_CONTEXT_ID_OFST 0 + +/* MC_CMD_RSS_CONTEXT_GET_KEY_OUT msgresponse */ +#define MC_CMD_RSS_CONTEXT_GET_KEY_OUT_LEN 44 +/* The 40-byte Toeplitz hash key (TBD endianness issues?) */ +#define MC_CMD_RSS_CONTEXT_GET_KEY_OUT_TOEPLITZ_KEY_OFST 4 +#define MC_CMD_RSS_CONTEXT_GET_KEY_OUT_TOEPLITZ_KEY_LEN 40 + + +/***********************************/ +/* MC_CMD_RSS_CONTEXT_SET_TABLE + * Set the indirection table for an RSS context. + */ +#define MC_CMD_RSS_CONTEXT_SET_TABLE 0xa2 +#undef MC_CMD_0xa2_PRIVILEGE_CTG + +#define MC_CMD_0xa2_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_RSS_CONTEXT_SET_TABLE_IN msgrequest */ +#define MC_CMD_RSS_CONTEXT_SET_TABLE_IN_LEN 132 +/* The handle of the RSS context */ +#define MC_CMD_RSS_CONTEXT_SET_TABLE_IN_RSS_CONTEXT_ID_OFST 0 +/* The 128-byte indirection table (1 byte per entry) */ +#define MC_CMD_RSS_CONTEXT_SET_TABLE_IN_INDIRECTION_TABLE_OFST 4 +#define MC_CMD_RSS_CONTEXT_SET_TABLE_IN_INDIRECTION_TABLE_LEN 128 + +/* MC_CMD_RSS_CONTEXT_SET_TABLE_OUT msgresponse */ +#define MC_CMD_RSS_CONTEXT_SET_TABLE_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_RSS_CONTEXT_GET_TABLE + * Get the indirection table for an RSS context. + */ +#define MC_CMD_RSS_CONTEXT_GET_TABLE 0xa3 +#undef MC_CMD_0xa3_PRIVILEGE_CTG + +#define MC_CMD_0xa3_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_RSS_CONTEXT_GET_TABLE_IN msgrequest */ +#define MC_CMD_RSS_CONTEXT_GET_TABLE_IN_LEN 4 +/* The handle of the RSS context */ +#define MC_CMD_RSS_CONTEXT_GET_TABLE_IN_RSS_CONTEXT_ID_OFST 0 + +/* MC_CMD_RSS_CONTEXT_GET_TABLE_OUT msgresponse */ +#define MC_CMD_RSS_CONTEXT_GET_TABLE_OUT_LEN 132 +/* The 128-byte indirection table (1 byte per entry) */ +#define MC_CMD_RSS_CONTEXT_GET_TABLE_OUT_INDIRECTION_TABLE_OFST 4 +#define MC_CMD_RSS_CONTEXT_GET_TABLE_OUT_INDIRECTION_TABLE_LEN 128 + + +/***********************************/ +/* MC_CMD_RSS_CONTEXT_SET_FLAGS + * Set various control flags for an RSS context. + */ +#define MC_CMD_RSS_CONTEXT_SET_FLAGS 0xe1 +#undef MC_CMD_0xe1_PRIVILEGE_CTG + +#define MC_CMD_0xe1_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_RSS_CONTEXT_SET_FLAGS_IN msgrequest */ +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_LEN 8 +/* The handle of the RSS context */ +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_RSS_CONTEXT_ID_OFST 0 +/* Hash control flags. The _EN bits are always supported. The _MODE bits only + * work when the firmware reports ADDITIONAL_RSS_MODES in + * MC_CMD_GET_CAPABILITIES and override the _EN bits if any of them are not 0. + * See the RSS_MODE structure for the meaning of the mode bits. + */ +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_FLAGS_OFST 4 +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV4_EN_LBN 0 +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV4_EN_WIDTH 1 +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV4_EN_LBN 1 +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV4_EN_WIDTH 1 +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV6_EN_LBN 2 +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV6_EN_WIDTH 1 +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV6_EN_LBN 3 +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV6_EN_WIDTH 1 +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_RESERVED_LBN 4 +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_RESERVED_WIDTH 4 +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV4_RSS_MODE_LBN 8 +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV4_RSS_MODE_WIDTH 4 +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_UDP_IPV4_RSS_MODE_LBN 12 +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_UDP_IPV4_RSS_MODE_WIDTH 4 +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV4_RSS_MODE_LBN 16 +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV4_RSS_MODE_WIDTH 4 +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV6_RSS_MODE_LBN 20 +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV6_RSS_MODE_WIDTH 4 +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_UDP_IPV6_RSS_MODE_LBN 24 +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_UDP_IPV6_RSS_MODE_WIDTH 4 +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV6_RSS_MODE_LBN 28 +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV6_RSS_MODE_WIDTH 4 + +/* MC_CMD_RSS_CONTEXT_SET_FLAGS_OUT msgresponse */ +#define MC_CMD_RSS_CONTEXT_SET_FLAGS_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_RSS_CONTEXT_GET_FLAGS + * Get various control flags for an RSS context. + */ +#define MC_CMD_RSS_CONTEXT_GET_FLAGS 0xe2 +#undef MC_CMD_0xe2_PRIVILEGE_CTG + +#define MC_CMD_0xe2_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_RSS_CONTEXT_GET_FLAGS_IN msgrequest */ +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_IN_LEN 4 +/* The handle of the RSS context */ +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_IN_RSS_CONTEXT_ID_OFST 0 + +/* MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT msgresponse */ +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_LEN 8 +/* Hash control flags. If any _MODE bits are non-zero (which will only be true + * when the firmware reports ADDITIONAL_RSS_MODES) then the _EN bits should be + * disregarded (but are guaranteed to be consistent with the _MODE bits if + * RSS_CONTEXT_SET_FLAGS has never been called for this context since it was + * allocated). + */ +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_FLAGS_OFST 4 +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_IPV4_EN_LBN 0 +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_IPV4_EN_WIDTH 1 +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_TCPV4_EN_LBN 1 +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_TCPV4_EN_WIDTH 1 +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_IPV6_EN_LBN 2 +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_IPV6_EN_WIDTH 1 +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_TCPV6_EN_LBN 3 +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_TCPV6_EN_WIDTH 1 +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_RESERVED_LBN 4 +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_RESERVED_WIDTH 4 +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TCP_IPV4_RSS_MODE_LBN 8 +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TCP_IPV4_RSS_MODE_WIDTH 4 +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_UDP_IPV4_RSS_MODE_LBN 12 +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_UDP_IPV4_RSS_MODE_WIDTH 4 +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_OTHER_IPV4_RSS_MODE_LBN 16 +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_OTHER_IPV4_RSS_MODE_WIDTH 4 +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TCP_IPV6_RSS_MODE_LBN 20 +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TCP_IPV6_RSS_MODE_WIDTH 4 +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_UDP_IPV6_RSS_MODE_LBN 24 +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_UDP_IPV6_RSS_MODE_WIDTH 4 +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_OTHER_IPV6_RSS_MODE_LBN 28 +#define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_OTHER_IPV6_RSS_MODE_WIDTH 4 + + +/***********************************/ +/* MC_CMD_DOT1P_MAPPING_ALLOC + * Allocate a .1p mapping. + */ +#define MC_CMD_DOT1P_MAPPING_ALLOC 0xa4 +#undef MC_CMD_0xa4_PRIVILEGE_CTG + +#define MC_CMD_0xa4_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_DOT1P_MAPPING_ALLOC_IN msgrequest */ +#define MC_CMD_DOT1P_MAPPING_ALLOC_IN_LEN 8 +/* The handle of the owning upstream port */ +#define MC_CMD_DOT1P_MAPPING_ALLOC_IN_UPSTREAM_PORT_ID_OFST 0 +/* Number of queues spanned by this mapping, in the range 1-64; valid fixed + * offsets in the mapping table will be in the range 0 to NUM_QUEUES-1, and + * referenced RSS contexts must span no more than this number. + */ +#define MC_CMD_DOT1P_MAPPING_ALLOC_IN_NUM_QUEUES_OFST 4 + +/* MC_CMD_DOT1P_MAPPING_ALLOC_OUT msgresponse */ +#define MC_CMD_DOT1P_MAPPING_ALLOC_OUT_LEN 4 +/* The handle of the new .1p mapping. This should be considered opaque to the + * host, although a value of 0xFFFFFFFF is guaranteed never to be a valid + * handle. + */ +#define MC_CMD_DOT1P_MAPPING_ALLOC_OUT_DOT1P_MAPPING_ID_OFST 0 +/* enum: guaranteed invalid .1p mapping handle value */ +#define MC_CMD_DOT1P_MAPPING_ALLOC_OUT_DOT1P_MAPPING_ID_INVALID 0xffffffff + + +/***********************************/ +/* MC_CMD_DOT1P_MAPPING_FREE + * Free a .1p mapping. + */ +#define MC_CMD_DOT1P_MAPPING_FREE 0xa5 +#undef MC_CMD_0xa5_PRIVILEGE_CTG + +#define MC_CMD_0xa5_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_DOT1P_MAPPING_FREE_IN msgrequest */ +#define MC_CMD_DOT1P_MAPPING_FREE_IN_LEN 4 +/* The handle of the .1p mapping */ +#define MC_CMD_DOT1P_MAPPING_FREE_IN_DOT1P_MAPPING_ID_OFST 0 + +/* MC_CMD_DOT1P_MAPPING_FREE_OUT msgresponse */ +#define MC_CMD_DOT1P_MAPPING_FREE_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_DOT1P_MAPPING_SET_TABLE + * Set the mapping table for a .1p mapping. + */ +#define MC_CMD_DOT1P_MAPPING_SET_TABLE 0xa6 +#undef MC_CMD_0xa6_PRIVILEGE_CTG + +#define MC_CMD_0xa6_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_DOT1P_MAPPING_SET_TABLE_IN msgrequest */ +#define MC_CMD_DOT1P_MAPPING_SET_TABLE_IN_LEN 36 +/* The handle of the .1p mapping */ +#define MC_CMD_DOT1P_MAPPING_SET_TABLE_IN_DOT1P_MAPPING_ID_OFST 0 +/* Per-priority mappings (1 32-bit word per entry - an offset or RSS context + * handle) + */ +#define MC_CMD_DOT1P_MAPPING_SET_TABLE_IN_MAPPING_TABLE_OFST 4 +#define MC_CMD_DOT1P_MAPPING_SET_TABLE_IN_MAPPING_TABLE_LEN 32 + +/* MC_CMD_DOT1P_MAPPING_SET_TABLE_OUT msgresponse */ +#define MC_CMD_DOT1P_MAPPING_SET_TABLE_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_DOT1P_MAPPING_GET_TABLE + * Get the mapping table for a .1p mapping. + */ +#define MC_CMD_DOT1P_MAPPING_GET_TABLE 0xa7 +#undef MC_CMD_0xa7_PRIVILEGE_CTG + +#define MC_CMD_0xa7_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_DOT1P_MAPPING_GET_TABLE_IN msgrequest */ +#define MC_CMD_DOT1P_MAPPING_GET_TABLE_IN_LEN 4 +/* The handle of the .1p mapping */ +#define MC_CMD_DOT1P_MAPPING_GET_TABLE_IN_DOT1P_MAPPING_ID_OFST 0 + +/* MC_CMD_DOT1P_MAPPING_GET_TABLE_OUT msgresponse */ +#define MC_CMD_DOT1P_MAPPING_GET_TABLE_OUT_LEN 36 +/* Per-priority mappings (1 32-bit word per entry - an offset or RSS context + * handle) + */ +#define MC_CMD_DOT1P_MAPPING_GET_TABLE_OUT_MAPPING_TABLE_OFST 4 +#define MC_CMD_DOT1P_MAPPING_GET_TABLE_OUT_MAPPING_TABLE_LEN 32 + + +/***********************************/ +/* MC_CMD_GET_VECTOR_CFG + * Get Interrupt Vector config for this PF. + */ +#define MC_CMD_GET_VECTOR_CFG 0xbf +#undef MC_CMD_0xbf_PRIVILEGE_CTG + +#define MC_CMD_0xbf_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_GET_VECTOR_CFG_IN msgrequest */ +#define MC_CMD_GET_VECTOR_CFG_IN_LEN 0 + +/* MC_CMD_GET_VECTOR_CFG_OUT msgresponse */ +#define MC_CMD_GET_VECTOR_CFG_OUT_LEN 12 +/* Base absolute interrupt vector number. */ +#define MC_CMD_GET_VECTOR_CFG_OUT_VEC_BASE_OFST 0 +/* Number of interrupt vectors allocate to this PF. */ +#define MC_CMD_GET_VECTOR_CFG_OUT_VECS_PER_PF_OFST 4 +/* Number of interrupt vectors to allocate per VF. */ +#define MC_CMD_GET_VECTOR_CFG_OUT_VECS_PER_VF_OFST 8 + + +/***********************************/ +/* MC_CMD_SET_VECTOR_CFG + * Set Interrupt Vector config for this PF. + */ +#define MC_CMD_SET_VECTOR_CFG 0xc0 +#undef MC_CMD_0xc0_PRIVILEGE_CTG + +#define MC_CMD_0xc0_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_SET_VECTOR_CFG_IN msgrequest */ +#define MC_CMD_SET_VECTOR_CFG_IN_LEN 12 +/* Base absolute interrupt vector number, or MC_CMD_RESOURCE_INSTANCE_ANY to + * let the system find a suitable base. + */ +#define MC_CMD_SET_VECTOR_CFG_IN_VEC_BASE_OFST 0 +/* Number of interrupt vectors allocate to this PF. */ +#define MC_CMD_SET_VECTOR_CFG_IN_VECS_PER_PF_OFST 4 +/* Number of interrupt vectors to allocate per VF. */ +#define MC_CMD_SET_VECTOR_CFG_IN_VECS_PER_VF_OFST 8 + +/* MC_CMD_SET_VECTOR_CFG_OUT msgresponse */ +#define MC_CMD_SET_VECTOR_CFG_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_VPORT_ADD_MAC_ADDRESS + * Add a MAC address to a v-port + */ +#define MC_CMD_VPORT_ADD_MAC_ADDRESS 0xa8 +#undef MC_CMD_0xa8_PRIVILEGE_CTG + +#define MC_CMD_0xa8_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_VPORT_ADD_MAC_ADDRESS_IN msgrequest */ +#define MC_CMD_VPORT_ADD_MAC_ADDRESS_IN_LEN 10 +/* The handle of the v-port */ +#define MC_CMD_VPORT_ADD_MAC_ADDRESS_IN_VPORT_ID_OFST 0 +/* MAC address to add */ +#define MC_CMD_VPORT_ADD_MAC_ADDRESS_IN_MACADDR_OFST 4 +#define MC_CMD_VPORT_ADD_MAC_ADDRESS_IN_MACADDR_LEN 6 + +/* MC_CMD_VPORT_ADD_MAC_ADDRESS_OUT msgresponse */ +#define MC_CMD_VPORT_ADD_MAC_ADDRESS_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_VPORT_DEL_MAC_ADDRESS + * Delete a MAC address from a v-port + */ +#define MC_CMD_VPORT_DEL_MAC_ADDRESS 0xa9 +#undef MC_CMD_0xa9_PRIVILEGE_CTG + +#define MC_CMD_0xa9_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_VPORT_DEL_MAC_ADDRESS_IN msgrequest */ +#define MC_CMD_VPORT_DEL_MAC_ADDRESS_IN_LEN 10 +/* The handle of the v-port */ +#define MC_CMD_VPORT_DEL_MAC_ADDRESS_IN_VPORT_ID_OFST 0 +/* MAC address to add */ +#define MC_CMD_VPORT_DEL_MAC_ADDRESS_IN_MACADDR_OFST 4 +#define MC_CMD_VPORT_DEL_MAC_ADDRESS_IN_MACADDR_LEN 6 + +/* MC_CMD_VPORT_DEL_MAC_ADDRESS_OUT msgresponse */ +#define MC_CMD_VPORT_DEL_MAC_ADDRESS_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_VPORT_GET_MAC_ADDRESSES + * Delete a MAC address from a v-port + */ +#define MC_CMD_VPORT_GET_MAC_ADDRESSES 0xaa +#undef MC_CMD_0xaa_PRIVILEGE_CTG + +#define MC_CMD_0xaa_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_VPORT_GET_MAC_ADDRESSES_IN msgrequest */ +#define MC_CMD_VPORT_GET_MAC_ADDRESSES_IN_LEN 4 +/* The handle of the v-port */ +#define MC_CMD_VPORT_GET_MAC_ADDRESSES_IN_VPORT_ID_OFST 0 + +/* MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT msgresponse */ +#define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_LENMIN 4 +#define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_LENMAX 250 +#define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_LEN(num) (4+6*(num)) +/* The number of MAC addresses returned */ +#define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_COUNT_OFST 0 +/* Array of MAC addresses */ +#define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_OFST 4 +#define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_LEN 6 +#define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_MINNUM 0 +#define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_MAXNUM 41 + + +/***********************************/ +/* MC_CMD_DUMP_BUFTBL_ENTRIES + * Dump buffer table entries, mainly for command client debug use. Dumps + * absolute entries, and does not use chunk handles. All entries must be in + * range, and used for q page mapping, Although the latter restriction may be + * lifted in future. + */ +#define MC_CMD_DUMP_BUFTBL_ENTRIES 0xab +#undef MC_CMD_0xab_PRIVILEGE_CTG + +#define MC_CMD_0xab_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_DUMP_BUFTBL_ENTRIES_IN msgrequest */ +#define MC_CMD_DUMP_BUFTBL_ENTRIES_IN_LEN 8 +/* Index of the first buffer table entry. */ +#define MC_CMD_DUMP_BUFTBL_ENTRIES_IN_FIRSTID_OFST 0 +/* Number of buffer table entries to dump. */ +#define MC_CMD_DUMP_BUFTBL_ENTRIES_IN_NUMENTRIES_OFST 4 + +/* MC_CMD_DUMP_BUFTBL_ENTRIES_OUT msgresponse */ +#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_LENMIN 12 +#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_LENMAX 252 +#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_LEN(num) (0+12*(num)) +/* Raw buffer table entries, layed out as BUFTBL_ENTRY. */ +#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_OFST 0 +#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_LEN 12 +#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_MINNUM 1 +#define MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_MAXNUM 21 + + +/***********************************/ +/* MC_CMD_SET_RXDP_CONFIG + * Set global RXDP configuration settings + */ +#define MC_CMD_SET_RXDP_CONFIG 0xc1 +#undef MC_CMD_0xc1_PRIVILEGE_CTG + +#define MC_CMD_0xc1_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_SET_RXDP_CONFIG_IN msgrequest */ +#define MC_CMD_SET_RXDP_CONFIG_IN_LEN 4 +#define MC_CMD_SET_RXDP_CONFIG_IN_DATA_OFST 0 +#define MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_DMA_LBN 0 +#define MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_DMA_WIDTH 1 + +/* MC_CMD_SET_RXDP_CONFIG_OUT msgresponse */ +#define MC_CMD_SET_RXDP_CONFIG_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_GET_RXDP_CONFIG + * Get global RXDP configuration settings + */ +#define MC_CMD_GET_RXDP_CONFIG 0xc2 +#undef MC_CMD_0xc2_PRIVILEGE_CTG + +#define MC_CMD_0xc2_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_GET_RXDP_CONFIG_IN msgrequest */ +#define MC_CMD_GET_RXDP_CONFIG_IN_LEN 0 + +/* MC_CMD_GET_RXDP_CONFIG_OUT msgresponse */ +#define MC_CMD_GET_RXDP_CONFIG_OUT_LEN 4 +#define MC_CMD_GET_RXDP_CONFIG_OUT_DATA_OFST 0 +#define MC_CMD_GET_RXDP_CONFIG_OUT_PAD_HOST_DMA_LBN 0 +#define MC_CMD_GET_RXDP_CONFIG_OUT_PAD_HOST_DMA_WIDTH 1 + + +/***********************************/ +/* MC_CMD_GET_CLOCK + * Return the system and PDCPU clock frequencies. + */ +#define MC_CMD_GET_CLOCK 0xac +#undef MC_CMD_0xac_PRIVILEGE_CTG + +#define MC_CMD_0xac_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_GET_CLOCK_IN msgrequest */ +#define MC_CMD_GET_CLOCK_IN_LEN 0 + +/* MC_CMD_GET_CLOCK_OUT msgresponse */ +#define MC_CMD_GET_CLOCK_OUT_LEN 8 +/* System frequency, MHz */ +#define MC_CMD_GET_CLOCK_OUT_SYS_FREQ_OFST 0 +/* DPCPU frequency, MHz */ +#define MC_CMD_GET_CLOCK_OUT_DPCPU_FREQ_OFST 4 + + +/***********************************/ +/* MC_CMD_SET_CLOCK + * Control the system and DPCPU clock frequencies. Changes are lost reboot. + */ +#define MC_CMD_SET_CLOCK 0xad +#undef MC_CMD_0xad_PRIVILEGE_CTG + +#define MC_CMD_0xad_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_SET_CLOCK_IN msgrequest */ +#define MC_CMD_SET_CLOCK_IN_LEN 28 +/* Requested frequency in MHz for system clock domain */ +#define MC_CMD_SET_CLOCK_IN_SYS_FREQ_OFST 0 +/* enum: Leave the system clock domain frequency unchanged */ +#define MC_CMD_SET_CLOCK_IN_SYS_DOMAIN_DONT_CHANGE 0x0 +/* Requested frequency in MHz for inter-core clock domain */ +#define MC_CMD_SET_CLOCK_IN_ICORE_FREQ_OFST 4 +/* enum: Leave the inter-core clock domain frequency unchanged */ +#define MC_CMD_SET_CLOCK_IN_ICORE_DOMAIN_DONT_CHANGE 0x0 +/* Requested frequency in MHz for DPCPU clock domain */ +#define MC_CMD_SET_CLOCK_IN_DPCPU_FREQ_OFST 8 +/* enum: Leave the DPCPU clock domain frequency unchanged */ +#define MC_CMD_SET_CLOCK_IN_DPCPU_DOMAIN_DONT_CHANGE 0x0 +/* Requested frequency in MHz for PCS clock domain */ +#define MC_CMD_SET_CLOCK_IN_PCS_FREQ_OFST 12 +/* enum: Leave the PCS clock domain frequency unchanged */ +#define MC_CMD_SET_CLOCK_IN_PCS_DOMAIN_DONT_CHANGE 0x0 +/* Requested frequency in MHz for MC clock domain */ +#define MC_CMD_SET_CLOCK_IN_MC_FREQ_OFST 16 +/* enum: Leave the MC clock domain frequency unchanged */ +#define MC_CMD_SET_CLOCK_IN_MC_DOMAIN_DONT_CHANGE 0x0 +/* Requested frequency in MHz for rmon clock domain */ +#define MC_CMD_SET_CLOCK_IN_RMON_FREQ_OFST 20 +/* enum: Leave the rmon clock domain frequency unchanged */ +#define MC_CMD_SET_CLOCK_IN_RMON_DOMAIN_DONT_CHANGE 0x0 +/* Requested frequency in MHz for vswitch clock domain */ +#define MC_CMD_SET_CLOCK_IN_VSWITCH_FREQ_OFST 24 +/* enum: Leave the vswitch clock domain frequency unchanged */ +#define MC_CMD_SET_CLOCK_IN_VSWITCH_DOMAIN_DONT_CHANGE 0x0 + +/* MC_CMD_SET_CLOCK_OUT msgresponse */ +#define MC_CMD_SET_CLOCK_OUT_LEN 28 +/* Resulting system frequency in MHz */ +#define MC_CMD_SET_CLOCK_OUT_SYS_FREQ_OFST 0 +/* enum: The system clock domain doesn't exist */ +#define MC_CMD_SET_CLOCK_OUT_SYS_DOMAIN_UNSUPPORTED 0x0 +/* Resulting inter-core frequency in MHz */ +#define MC_CMD_SET_CLOCK_OUT_ICORE_FREQ_OFST 4 +/* enum: The inter-core clock domain doesn't exist / isn't used */ +#define MC_CMD_SET_CLOCK_OUT_ICORE_DOMAIN_UNSUPPORTED 0x0 +/* Resulting DPCPU frequency in MHz */ +#define MC_CMD_SET_CLOCK_OUT_DPCPU_FREQ_OFST 8 +/* enum: The dpcpu clock domain doesn't exist */ +#define MC_CMD_SET_CLOCK_OUT_DPCPU_DOMAIN_UNSUPPORTED 0x0 +/* Resulting PCS frequency in MHz */ +#define MC_CMD_SET_CLOCK_OUT_PCS_FREQ_OFST 12 +/* enum: The PCS clock domain doesn't exist / isn't controlled */ +#define MC_CMD_SET_CLOCK_OUT_PCS_DOMAIN_UNSUPPORTED 0x0 +/* Resulting MC frequency in MHz */ +#define MC_CMD_SET_CLOCK_OUT_MC_FREQ_OFST 16 +/* enum: The MC clock domain doesn't exist / isn't controlled */ +#define MC_CMD_SET_CLOCK_OUT_MC_DOMAIN_UNSUPPORTED 0x0 +/* Resulting rmon frequency in MHz */ +#define MC_CMD_SET_CLOCK_OUT_RMON_FREQ_OFST 20 +/* enum: The rmon clock domain doesn't exist / isn't controlled */ +#define MC_CMD_SET_CLOCK_OUT_RMON_DOMAIN_UNSUPPORTED 0x0 +/* Resulting vswitch frequency in MHz */ +#define MC_CMD_SET_CLOCK_OUT_VSWITCH_FREQ_OFST 24 +/* enum: The vswitch clock domain doesn't exist / isn't controlled */ +#define MC_CMD_SET_CLOCK_OUT_VSWITCH_DOMAIN_UNSUPPORTED 0x0 + + +/***********************************/ +/* MC_CMD_DPCPU_RPC + * Send an arbitrary DPCPU message. + */ +#define MC_CMD_DPCPU_RPC 0xae +#undef MC_CMD_0xae_PRIVILEGE_CTG + +#define MC_CMD_0xae_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_DPCPU_RPC_IN msgrequest */ +#define MC_CMD_DPCPU_RPC_IN_LEN 36 +#define MC_CMD_DPCPU_RPC_IN_CPU_OFST 0 +/* enum: RxDPCPU0 */ +#define MC_CMD_DPCPU_RPC_IN_DPCPU_RX0 0x0 +/* enum: TxDPCPU0 */ +#define MC_CMD_DPCPU_RPC_IN_DPCPU_TX0 0x1 +/* enum: TxDPCPU1 */ +#define MC_CMD_DPCPU_RPC_IN_DPCPU_TX1 0x2 +/* enum: RxDPCPU1 (Medford only) */ +#define MC_CMD_DPCPU_RPC_IN_DPCPU_RX1 0x3 +/* enum: RxDPCPU (will be for the calling function; for now, just an alias of + * DPCPU_RX0) + */ +#define MC_CMD_DPCPU_RPC_IN_DPCPU_RX 0x80 +/* enum: TxDPCPU (will be for the calling function; for now, just an alias of + * DPCPU_TX0) + */ +#define MC_CMD_DPCPU_RPC_IN_DPCPU_TX 0x81 +/* First 8 bits [39:32] of DATA are consumed by MC-DPCPU protocol and must be + * initialised to zero + */ +#define MC_CMD_DPCPU_RPC_IN_DATA_OFST 4 +#define MC_CMD_DPCPU_RPC_IN_DATA_LEN 32 +#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_CMDNUM_LBN 8 +#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_CMDNUM_WIDTH 8 +#define MC_CMD_DPCPU_RPC_IN_CMDNUM_TXDPCPU_READ 0x6 /* enum */ +#define MC_CMD_DPCPU_RPC_IN_CMDNUM_TXDPCPU_WRITE 0x7 /* enum */ +#define MC_CMD_DPCPU_RPC_IN_CMDNUM_TXDPCPU_SELF_TEST 0xc /* enum */ +#define MC_CMD_DPCPU_RPC_IN_CMDNUM_TXDPCPU_CSR_ACCESS 0xe /* enum */ +#define MC_CMD_DPCPU_RPC_IN_CMDNUM_RXDPCPU_READ 0x46 /* enum */ +#define MC_CMD_DPCPU_RPC_IN_CMDNUM_RXDPCPU_WRITE 0x47 /* enum */ +#define MC_CMD_DPCPU_RPC_IN_CMDNUM_RXDPCPU_SELF_TEST 0x4a /* enum */ +#define MC_CMD_DPCPU_RPC_IN_CMDNUM_RXDPCPU_CSR_ACCESS 0x4c /* enum */ +#define MC_CMD_DPCPU_RPC_IN_CMDNUM_RXDPCPU_SET_MC_REPLAY_CNTXT 0x4d /* enum */ +#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_OBJID_LBN 16 +#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_OBJID_WIDTH 16 +#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_ADDR_LBN 16 +#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_ADDR_WIDTH 16 +#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_COUNT_LBN 48 +#define MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_COUNT_WIDTH 16 +#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_INFO_LBN 16 +#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_INFO_WIDTH 240 +#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_LBN 16 +#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_WIDTH 16 +#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_STOP_RETURN_RESULT 0x0 /* enum */ +#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_START_READ 0x1 /* enum */ +#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_START_WRITE 0x2 /* enum */ +#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_START_WRITE_READ 0x3 /* enum */ +#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_START_PIPELINED_READ 0x4 /* enum */ +#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_START_DELAY_LBN 48 +#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_START_DELAY_WIDTH 16 +#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_RPT_COUNT_LBN 64 +#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_RPT_COUNT_WIDTH 16 +#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_GAP_DELAY_LBN 80 +#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_GAP_DELAY_WIDTH 16 +#define MC_CMD_DPCPU_RPC_IN_MC_REPLAY_MODE_LBN 16 +#define MC_CMD_DPCPU_RPC_IN_MC_REPLAY_MODE_WIDTH 16 +#define MC_CMD_DPCPU_RPC_IN_MC_REPLAY_MODE_CUT_THROUGH 0x1 /* enum */ +#define MC_CMD_DPCPU_RPC_IN_MC_REPLAY_MODE_STORE_FORWARD 0x2 /* enum */ +#define MC_CMD_DPCPU_RPC_IN_MC_REPLAY_MODE_STORE_FORWARD_FIRST 0x3 /* enum */ +#define MC_CMD_DPCPU_RPC_IN_MC_REPLAY_CNTXT_LBN 64 +#define MC_CMD_DPCPU_RPC_IN_MC_REPLAY_CNTXT_WIDTH 16 +#define MC_CMD_DPCPU_RPC_IN_WDATA_OFST 12 +#define MC_CMD_DPCPU_RPC_IN_WDATA_LEN 24 +/* Register data to write. Only valid in write/write-read. */ +#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_DATA_OFST 16 +/* Register address. */ +#define MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_ADDRESS_OFST 20 + +/* MC_CMD_DPCPU_RPC_OUT msgresponse */ +#define MC_CMD_DPCPU_RPC_OUT_LEN 36 +#define MC_CMD_DPCPU_RPC_OUT_RC_OFST 0 +/* DATA */ +#define MC_CMD_DPCPU_RPC_OUT_DATA_OFST 4 +#define MC_CMD_DPCPU_RPC_OUT_DATA_LEN 32 +#define MC_CMD_DPCPU_RPC_OUT_HDR_CMD_RESP_ERRCODE_LBN 32 +#define MC_CMD_DPCPU_RPC_OUT_HDR_CMD_RESP_ERRCODE_WIDTH 16 +#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_COUNT_LBN 48 +#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_COUNT_WIDTH 16 +#define MC_CMD_DPCPU_RPC_OUT_RDATA_OFST 12 +#define MC_CMD_DPCPU_RPC_OUT_RDATA_LEN 24 +#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_1_OFST 12 +#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_2_OFST 16 +#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_3_OFST 20 +#define MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_4_OFST 24 + + +/***********************************/ +/* MC_CMD_TRIGGER_INTERRUPT + * Trigger an interrupt by prodding the BIU. + */ +#define MC_CMD_TRIGGER_INTERRUPT 0xe3 +#undef MC_CMD_0xe3_PRIVILEGE_CTG + +#define MC_CMD_0xe3_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_TRIGGER_INTERRUPT_IN msgrequest */ +#define MC_CMD_TRIGGER_INTERRUPT_IN_LEN 4 +/* Interrupt level relative to base for function. */ +#define MC_CMD_TRIGGER_INTERRUPT_IN_INTR_LEVEL_OFST 0 + +/* MC_CMD_TRIGGER_INTERRUPT_OUT msgresponse */ +#define MC_CMD_TRIGGER_INTERRUPT_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_SHMBOOT_OP + * Special operations to support (for now) shmboot. + */ +#define MC_CMD_SHMBOOT_OP 0xe6 +#undef MC_CMD_0xe6_PRIVILEGE_CTG + +#define MC_CMD_0xe6_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_SHMBOOT_OP_IN msgrequest */ +#define MC_CMD_SHMBOOT_OP_IN_LEN 4 +/* Identifies the operation to perform */ +#define MC_CMD_SHMBOOT_OP_IN_SHMBOOT_OP_OFST 0 +/* enum: Copy slave_data section to the slave core. (Greenport only) */ +#define MC_CMD_SHMBOOT_OP_IN_PUSH_SLAVE_DATA 0x0 + +/* MC_CMD_SHMBOOT_OP_OUT msgresponse */ +#define MC_CMD_SHMBOOT_OP_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_CAP_BLK_READ + * Read multiple 64bit words from capture block memory + */ +#define MC_CMD_CAP_BLK_READ 0xe7 +#undef MC_CMD_0xe7_PRIVILEGE_CTG + +#define MC_CMD_0xe7_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_CAP_BLK_READ_IN msgrequest */ +#define MC_CMD_CAP_BLK_READ_IN_LEN 12 +#define MC_CMD_CAP_BLK_READ_IN_CAP_REG_OFST 0 +#define MC_CMD_CAP_BLK_READ_IN_ADDR_OFST 4 +#define MC_CMD_CAP_BLK_READ_IN_COUNT_OFST 8 + +/* MC_CMD_CAP_BLK_READ_OUT msgresponse */ +#define MC_CMD_CAP_BLK_READ_OUT_LENMIN 8 +#define MC_CMD_CAP_BLK_READ_OUT_LENMAX 248 +#define MC_CMD_CAP_BLK_READ_OUT_LEN(num) (0+8*(num)) +#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_OFST 0 +#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LEN 8 +#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_OFST 0 +#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_OFST 4 +#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MINNUM 1 +#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MAXNUM 31 + + +/***********************************/ +/* MC_CMD_DUMP_DO + * Take a dump of the DUT state + */ +#define MC_CMD_DUMP_DO 0xe8 +#undef MC_CMD_0xe8_PRIVILEGE_CTG + +#define MC_CMD_0xe8_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_DUMP_DO_IN msgrequest */ +#define MC_CMD_DUMP_DO_IN_LEN 52 +#define MC_CMD_DUMP_DO_IN_PADDING_OFST 0 +#define MC_CMD_DUMP_DO_IN_DUMPSPEC_SRC_OFST 4 +#define MC_CMD_DUMP_DO_IN_DUMPSPEC_SRC_CUSTOM 0x0 /* enum */ +#define MC_CMD_DUMP_DO_IN_DUMPSPEC_SRC_DEFAULT 0x1 /* enum */ +#define MC_CMD_DUMP_DO_IN_DUMPSPEC_SRC_CUSTOM_TYPE_OFST 8 +#define MC_CMD_DUMP_DO_IN_DUMP_LOCATION_NVRAM 0x1 /* enum */ +#define MC_CMD_DUMP_DO_IN_DUMP_LOCATION_HOST_MEMORY 0x2 /* enum */ +#define MC_CMD_DUMP_DO_IN_DUMP_LOCATION_HOST_MEMORY_MLI 0x3 /* enum */ +#define MC_CMD_DUMP_DO_IN_DUMP_LOCATION_UART 0x4 /* enum */ +#define MC_CMD_DUMP_DO_IN_DUMPSPEC_SRC_CUSTOM_NVRAM_PARTITION_TYPE_ID_OFST 12 +#define MC_CMD_DUMP_DO_IN_DUMPSPEC_SRC_CUSTOM_NVRAM_OFFSET_OFST 16 +#define MC_CMD_DUMP_DO_IN_DUMPSPEC_SRC_CUSTOM_HOST_MEMORY_ADDR_LO_OFST 12 +#define MC_CMD_DUMP_DO_IN_DUMPSPEC_SRC_CUSTOM_HOST_MEMORY_ADDR_HI_OFST 16 +#define MC_CMD_DUMP_DO_IN_DUMPSPEC_SRC_CUSTOM_HOST_MEMORY_MLI_ROOT_ADDR_LO_OFST 12 +#define MC_CMD_DUMP_DO_IN_HOST_MEMORY_MLI_PAGE_SIZE 0x1000 /* enum */ +#define MC_CMD_DUMP_DO_IN_DUMPSPEC_SRC_CUSTOM_HOST_MEMORY_MLI_ROOT_ADDR_HI_OFST 16 +#define MC_CMD_DUMP_DO_IN_DUMPSPEC_SRC_CUSTOM_HOST_MEMORY_MLI_DEPTH_OFST 20 +#define MC_CMD_DUMP_DO_IN_HOST_MEMORY_MLI_MAX_DEPTH 0x2 /* enum */ +#define MC_CMD_DUMP_DO_IN_DUMPSPEC_SRC_CUSTOM_UART_PORT_OFST 12 +/* enum: The uart port this command was received over (if using a uart + * transport) + */ +#define MC_CMD_DUMP_DO_IN_UART_PORT_SRC 0xff +#define MC_CMD_DUMP_DO_IN_DUMPSPEC_SRC_CUSTOM_SIZE_OFST 24 +#define MC_CMD_DUMP_DO_IN_DUMPFILE_DST_OFST 28 +#define MC_CMD_DUMP_DO_IN_DUMPFILE_DST_CUSTOM 0x0 /* enum */ +#define MC_CMD_DUMP_DO_IN_DUMPFILE_DST_NVRAM_DUMP_PARTITION 0x1 /* enum */ +#define MC_CMD_DUMP_DO_IN_DUMPFILE_DST_CUSTOM_TYPE_OFST 32 +/* Enum values, see field(s): */ +/* MC_CMD_DUMP_DO_IN/DUMPSPEC_SRC_CUSTOM_TYPE */ +#define MC_CMD_DUMP_DO_IN_DUMPFILE_DST_CUSTOM_NVRAM_PARTITION_TYPE_ID_OFST 36 +#define MC_CMD_DUMP_DO_IN_DUMPFILE_DST_CUSTOM_NVRAM_OFFSET_OFST 40 +#define MC_CMD_DUMP_DO_IN_DUMPFILE_DST_CUSTOM_HOST_MEMORY_ADDR_LO_OFST 36 +#define MC_CMD_DUMP_DO_IN_DUMPFILE_DST_CUSTOM_HOST_MEMORY_ADDR_HI_OFST 40 +#define MC_CMD_DUMP_DO_IN_DUMPFILE_DST_CUSTOM_HOST_MEMORY_MLI_ROOT_ADDR_LO_OFST 36 +#define MC_CMD_DUMP_DO_IN_DUMPFILE_DST_CUSTOM_HOST_MEMORY_MLI_ROOT_ADDR_HI_OFST 40 +#define MC_CMD_DUMP_DO_IN_DUMPFILE_DST_CUSTOM_HOST_MEMORY_MLI_DEPTH_OFST 44 +#define MC_CMD_DUMP_DO_IN_DUMPFILE_DST_CUSTOM_UART_PORT_OFST 36 +#define MC_CMD_DUMP_DO_IN_DUMPFILE_DST_CUSTOM_SIZE_OFST 48 + +/* MC_CMD_DUMP_DO_OUT msgresponse */ +#define MC_CMD_DUMP_DO_OUT_LEN 4 +#define MC_CMD_DUMP_DO_OUT_DUMPFILE_SIZE_OFST 0 + + +/***********************************/ +/* MC_CMD_DUMP_CONFIGURE_UNSOLICITED + * Configure unsolicited dumps + */ +#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED 0xe9 +#undef MC_CMD_0xe9_PRIVILEGE_CTG + +#define MC_CMD_0xe9_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN msgrequest */ +#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_LEN 52 +#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_ENABLE_OFST 0 +#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_DUMPSPEC_SRC_OFST 4 +/* Enum values, see field(s): */ +/* MC_CMD_DUMP_DO/MC_CMD_DUMP_DO_IN/DUMPSPEC_SRC */ +#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_DUMPSPEC_SRC_CUSTOM_TYPE_OFST 8 +/* Enum values, see field(s): */ +/* MC_CMD_DUMP_DO/MC_CMD_DUMP_DO_IN/DUMPSPEC_SRC_CUSTOM_TYPE */ +#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_DUMPSPEC_SRC_CUSTOM_NVRAM_PARTITION_TYPE_ID_OFST 12 +#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_DUMPSPEC_SRC_CUSTOM_NVRAM_OFFSET_OFST 16 +#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_DUMPSPEC_SRC_CUSTOM_HOST_MEMORY_ADDR_LO_OFST 12 +#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_DUMPSPEC_SRC_CUSTOM_HOST_MEMORY_ADDR_HI_OFST 16 +#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_DUMPSPEC_SRC_CUSTOM_HOST_MEMORY_MLI_ROOT_ADDR_LO_OFST 12 +#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_DUMPSPEC_SRC_CUSTOM_HOST_MEMORY_MLI_ROOT_ADDR_HI_OFST 16 +#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_DUMPSPEC_SRC_CUSTOM_HOST_MEMORY_MLI_DEPTH_OFST 20 +#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_DUMPSPEC_SRC_CUSTOM_UART_PORT_OFST 12 +#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_DUMPSPEC_SRC_CUSTOM_SIZE_OFST 24 +#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_DUMPFILE_DST_OFST 28 +/* Enum values, see field(s): */ +/* MC_CMD_DUMP_DO/MC_CMD_DUMP_DO_IN/DUMPFILE_DST */ +#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_DUMPFILE_DST_CUSTOM_TYPE_OFST 32 +/* Enum values, see field(s): */ +/* MC_CMD_DUMP_DO/MC_CMD_DUMP_DO_IN/DUMPSPEC_SRC_CUSTOM_TYPE */ +#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_DUMPFILE_DST_CUSTOM_NVRAM_PARTITION_TYPE_ID_OFST 36 +#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_DUMPFILE_DST_CUSTOM_NVRAM_OFFSET_OFST 40 +#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_DUMPFILE_DST_CUSTOM_HOST_MEMORY_ADDR_LO_OFST 36 +#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_DUMPFILE_DST_CUSTOM_HOST_MEMORY_ADDR_HI_OFST 40 +#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_DUMPFILE_DST_CUSTOM_HOST_MEMORY_MLI_ROOT_ADDR_LO_OFST 36 +#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_DUMPFILE_DST_CUSTOM_HOST_MEMORY_MLI_ROOT_ADDR_HI_OFST 40 +#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_DUMPFILE_DST_CUSTOM_HOST_MEMORY_MLI_DEPTH_OFST 44 +#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_DUMPFILE_DST_CUSTOM_UART_PORT_OFST 36 +#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_IN_DUMPFILE_DST_CUSTOM_SIZE_OFST 48 + + +/***********************************/ +/* MC_CMD_SET_PSU + * Adjusts power supply parameters. This is a warranty-voiding operation. + * Returns: ENOENT if the parameter or rail specified does not exist, EINVAL if + * the parameter is out of range. + */ +#define MC_CMD_SET_PSU 0xea +#undef MC_CMD_0xea_PRIVILEGE_CTG + +#define MC_CMD_0xea_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_SET_PSU_IN msgrequest */ +#define MC_CMD_SET_PSU_IN_LEN 12 +#define MC_CMD_SET_PSU_IN_PARAM_OFST 0 +#define MC_CMD_SET_PSU_IN_PARAM_SUPPLY_VOLTAGE 0x0 /* enum */ +#define MC_CMD_SET_PSU_IN_RAIL_OFST 4 +#define MC_CMD_SET_PSU_IN_RAIL_0V9 0x0 /* enum */ +#define MC_CMD_SET_PSU_IN_RAIL_1V2 0x1 /* enum */ +/* desired value, eg voltage in mV */ +#define MC_CMD_SET_PSU_IN_VALUE_OFST 8 + +/* MC_CMD_SET_PSU_OUT msgresponse */ +#define MC_CMD_SET_PSU_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_GET_FUNCTION_INFO + * Get function information. PF and VF number. + */ +#define MC_CMD_GET_FUNCTION_INFO 0xec +#undef MC_CMD_0xec_PRIVILEGE_CTG + +#define MC_CMD_0xec_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_GET_FUNCTION_INFO_IN msgrequest */ +#define MC_CMD_GET_FUNCTION_INFO_IN_LEN 0 + +/* MC_CMD_GET_FUNCTION_INFO_OUT msgresponse */ +#define MC_CMD_GET_FUNCTION_INFO_OUT_LEN 8 +#define MC_CMD_GET_FUNCTION_INFO_OUT_PF_OFST 0 +#define MC_CMD_GET_FUNCTION_INFO_OUT_VF_OFST 4 + + +/***********************************/ +/* MC_CMD_ENABLE_OFFLINE_BIST + * Enters offline BIST mode. All queues are torn down, chip enters quiescent + * mode, calling function gets exclusive MCDI ownership. The only way out is + * reboot. + */ +#define MC_CMD_ENABLE_OFFLINE_BIST 0xed +#undef MC_CMD_0xed_PRIVILEGE_CTG + +#define MC_CMD_0xed_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_ENABLE_OFFLINE_BIST_IN msgrequest */ +#define MC_CMD_ENABLE_OFFLINE_BIST_IN_LEN 0 + +/* MC_CMD_ENABLE_OFFLINE_BIST_OUT msgresponse */ +#define MC_CMD_ENABLE_OFFLINE_BIST_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_UART_SEND_DATA + * Send checksummed[sic] block of data over the uart. Response is a placeholder + * should we wish to make this reliable; currently requests are fire-and- + * forget. + */ +#define MC_CMD_UART_SEND_DATA 0xee +#undef MC_CMD_0xee_PRIVILEGE_CTG + +#define MC_CMD_0xee_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_UART_SEND_DATA_OUT msgrequest */ +#define MC_CMD_UART_SEND_DATA_OUT_LENMIN 16 +#define MC_CMD_UART_SEND_DATA_OUT_LENMAX 252 +#define MC_CMD_UART_SEND_DATA_OUT_LEN(num) (16+1*(num)) +/* CRC32 over OFFSET, LENGTH, RESERVED, DATA */ +#define MC_CMD_UART_SEND_DATA_OUT_CHECKSUM_OFST 0 +/* Offset at which to write the data */ +#define MC_CMD_UART_SEND_DATA_OUT_OFFSET_OFST 4 +/* Length of data */ +#define MC_CMD_UART_SEND_DATA_OUT_LENGTH_OFST 8 +/* Reserved for future use */ +#define MC_CMD_UART_SEND_DATA_OUT_RESERVED_OFST 12 +#define MC_CMD_UART_SEND_DATA_OUT_DATA_OFST 16 +#define MC_CMD_UART_SEND_DATA_OUT_DATA_LEN 1 +#define MC_CMD_UART_SEND_DATA_OUT_DATA_MINNUM 0 +#define MC_CMD_UART_SEND_DATA_OUT_DATA_MAXNUM 236 + +/* MC_CMD_UART_SEND_DATA_IN msgresponse */ +#define MC_CMD_UART_SEND_DATA_IN_LEN 0 + + +/***********************************/ +/* MC_CMD_UART_RECV_DATA + * Request checksummed[sic] block of data over the uart. Only a placeholder, + * subject to change and not currently implemented. + */ +#define MC_CMD_UART_RECV_DATA 0xef +#undef MC_CMD_0xef_PRIVILEGE_CTG + +#define MC_CMD_0xef_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_UART_RECV_DATA_OUT msgrequest */ +#define MC_CMD_UART_RECV_DATA_OUT_LEN 16 +/* CRC32 over OFFSET, LENGTH, RESERVED */ +#define MC_CMD_UART_RECV_DATA_OUT_CHECKSUM_OFST 0 +/* Offset from which to read the data */ +#define MC_CMD_UART_RECV_DATA_OUT_OFFSET_OFST 4 +/* Length of data */ +#define MC_CMD_UART_RECV_DATA_OUT_LENGTH_OFST 8 +/* Reserved for future use */ +#define MC_CMD_UART_RECV_DATA_OUT_RESERVED_OFST 12 + +/* MC_CMD_UART_RECV_DATA_IN msgresponse */ +#define MC_CMD_UART_RECV_DATA_IN_LENMIN 16 +#define MC_CMD_UART_RECV_DATA_IN_LENMAX 252 +#define MC_CMD_UART_RECV_DATA_IN_LEN(num) (16+1*(num)) +/* CRC32 over RESERVED1, RESERVED2, RESERVED3, DATA */ +#define MC_CMD_UART_RECV_DATA_IN_CHECKSUM_OFST 0 +/* Offset at which to write the data */ +#define MC_CMD_UART_RECV_DATA_IN_RESERVED1_OFST 4 +/* Length of data */ +#define MC_CMD_UART_RECV_DATA_IN_RESERVED2_OFST 8 +/* Reserved for future use */ +#define MC_CMD_UART_RECV_DATA_IN_RESERVED3_OFST 12 +#define MC_CMD_UART_RECV_DATA_IN_DATA_OFST 16 +#define MC_CMD_UART_RECV_DATA_IN_DATA_LEN 1 +#define MC_CMD_UART_RECV_DATA_IN_DATA_MINNUM 0 +#define MC_CMD_UART_RECV_DATA_IN_DATA_MAXNUM 236 + + +/***********************************/ +/* MC_CMD_READ_FUSES + * Read data programmed into the device One-Time-Programmable (OTP) Fuses + */ +#define MC_CMD_READ_FUSES 0xf0 +#undef MC_CMD_0xf0_PRIVILEGE_CTG + +#define MC_CMD_0xf0_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_READ_FUSES_IN msgrequest */ +#define MC_CMD_READ_FUSES_IN_LEN 8 +/* Offset in OTP to read */ +#define MC_CMD_READ_FUSES_IN_OFFSET_OFST 0 +/* Length of data to read in bytes */ +#define MC_CMD_READ_FUSES_IN_LENGTH_OFST 4 + +/* MC_CMD_READ_FUSES_OUT msgresponse */ +#define MC_CMD_READ_FUSES_OUT_LENMIN 4 +#define MC_CMD_READ_FUSES_OUT_LENMAX 252 +#define MC_CMD_READ_FUSES_OUT_LEN(num) (4+1*(num)) +/* Length of returned OTP data in bytes */ +#define MC_CMD_READ_FUSES_OUT_LENGTH_OFST 0 +/* Returned data */ +#define MC_CMD_READ_FUSES_OUT_DATA_OFST 4 +#define MC_CMD_READ_FUSES_OUT_DATA_LEN 1 +#define MC_CMD_READ_FUSES_OUT_DATA_MINNUM 0 +#define MC_CMD_READ_FUSES_OUT_DATA_MAXNUM 248 + + +/***********************************/ +/* MC_CMD_KR_TUNE + * Get or set KR Serdes RXEQ and TX Driver settings + */ +#define MC_CMD_KR_TUNE 0xf1 +#undef MC_CMD_0xf1_PRIVILEGE_CTG + +#define MC_CMD_0xf1_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_KR_TUNE_IN msgrequest */ +#define MC_CMD_KR_TUNE_IN_LENMIN 4 +#define MC_CMD_KR_TUNE_IN_LENMAX 252 +#define MC_CMD_KR_TUNE_IN_LEN(num) (4+4*(num)) +/* Requested operation */ +#define MC_CMD_KR_TUNE_IN_KR_TUNE_OP_OFST 0 +#define MC_CMD_KR_TUNE_IN_KR_TUNE_OP_LEN 1 +/* enum: Get current RXEQ settings */ +#define MC_CMD_KR_TUNE_IN_RXEQ_GET 0x0 +/* enum: Override RXEQ settings */ +#define MC_CMD_KR_TUNE_IN_RXEQ_SET 0x1 +/* enum: Get current TX Driver settings */ +#define MC_CMD_KR_TUNE_IN_TXEQ_GET 0x2 +/* enum: Override TX Driver settings */ +#define MC_CMD_KR_TUNE_IN_TXEQ_SET 0x3 +/* enum: Force KR Serdes reset / recalibration */ +#define MC_CMD_KR_TUNE_IN_RECAL 0x4 +/* enum: Start KR Serdes Eye diagram plot on a given lane. Lane must have valid + * signal. + */ +#define MC_CMD_KR_TUNE_IN_START_EYE_PLOT 0x5 +/* enum: Poll KR Serdes Eye diagram plot. Returns one row of BER data. The + * caller should call this command repeatedly after starting eye plot, until no + * more data is returned. + */ +#define MC_CMD_KR_TUNE_IN_POLL_EYE_PLOT 0x6 +/* enum: Read Figure Of Merit (eye quality, higher is better). */ +#define MC_CMD_KR_TUNE_IN_READ_FOM 0x7 +/* Align the arguments to 32 bits */ +#define MC_CMD_KR_TUNE_IN_KR_TUNE_RSVD_OFST 1 +#define MC_CMD_KR_TUNE_IN_KR_TUNE_RSVD_LEN 3 +/* Arguments specific to the operation */ +#define MC_CMD_KR_TUNE_IN_KR_TUNE_ARGS_OFST 4 +#define MC_CMD_KR_TUNE_IN_KR_TUNE_ARGS_LEN 4 +#define MC_CMD_KR_TUNE_IN_KR_TUNE_ARGS_MINNUM 0 +#define MC_CMD_KR_TUNE_IN_KR_TUNE_ARGS_MAXNUM 62 + +/* MC_CMD_KR_TUNE_OUT msgresponse */ +#define MC_CMD_KR_TUNE_OUT_LEN 0 + +/* MC_CMD_KR_TUNE_RXEQ_GET_IN msgrequest */ +#define MC_CMD_KR_TUNE_RXEQ_GET_IN_LEN 4 +/* Requested operation */ +#define MC_CMD_KR_TUNE_RXEQ_GET_IN_KR_TUNE_OP_OFST 0 +#define MC_CMD_KR_TUNE_RXEQ_GET_IN_KR_TUNE_OP_LEN 1 +/* Align the arguments to 32 bits */ +#define MC_CMD_KR_TUNE_RXEQ_GET_IN_KR_TUNE_RSVD_OFST 1 +#define MC_CMD_KR_TUNE_RXEQ_GET_IN_KR_TUNE_RSVD_LEN 3 + +/* MC_CMD_KR_TUNE_RXEQ_GET_OUT msgresponse */ +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_LENMIN 4 +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_LENMAX 252 +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_LEN(num) (0+4*(num)) +/* RXEQ Parameter */ +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_OFST 0 +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_LEN 4 +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_MINNUM 1 +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_MAXNUM 63 +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_ID_LBN 0 +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_ID_WIDTH 8 +/* enum: Attenuation (0-15, TBD for Medford) */ +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_ATT 0x0 +/* enum: CTLE Boost (0-15, TBD for Medford) */ +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_BOOST 0x1 +/* enum: Edge DFE Tap1 (0 - max negative, 64 - zero, 127 - max positive, TBD + * for Medford) + */ +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_EDFE_TAP1 0x2 +/* enum: Edge DFE Tap2 (0 - max negative, 32 - zero, 63 - max positive, TBD for + * Medford) + */ +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_EDFE_TAP2 0x3 +/* enum: Edge DFE Tap3 (0 - max negative, 32 - zero, 63 - max positive, TBD for + * Medford) + */ +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_EDFE_TAP3 0x4 +/* enum: Edge DFE Tap4 (0 - max negative, 32 - zero, 63 - max positive, TBD for + * Medford) + */ +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_EDFE_TAP4 0x5 +/* enum: Edge DFE Tap5 (0 - max negative, 32 - zero, 63 - max positive, TBD for + * Medford) + */ +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_EDFE_TAP5 0x6 +/* enum: Edge DFE DLEV (TBD for Medford) */ +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_EDFE_DLEV 0x7 +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_LANE_LBN 8 +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_LANE_WIDTH 3 +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_LANE_0 0x0 /* enum */ +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_LANE_1 0x1 /* enum */ +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_LANE_2 0x2 /* enum */ +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_LANE_3 0x3 /* enum */ +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_LANE_ALL 0x4 /* enum */ +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_AUTOCAL_LBN 11 +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_AUTOCAL_WIDTH 1 +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_RESERVED_LBN 12 +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_RESERVED_WIDTH 4 +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_INITIAL_LBN 16 +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_INITIAL_WIDTH 8 +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_CURRENT_LBN 24 +#define MC_CMD_KR_TUNE_RXEQ_GET_OUT_PARAM_CURRENT_WIDTH 8 + +/* MC_CMD_KR_TUNE_RXEQ_SET_IN msgrequest */ +#define MC_CMD_KR_TUNE_RXEQ_SET_IN_LENMIN 8 +#define MC_CMD_KR_TUNE_RXEQ_SET_IN_LENMAX 252 +#define MC_CMD_KR_TUNE_RXEQ_SET_IN_LEN(num) (4+4*(num)) +/* Requested operation */ +#define MC_CMD_KR_TUNE_RXEQ_SET_IN_KR_TUNE_OP_OFST 0 +#define MC_CMD_KR_TUNE_RXEQ_SET_IN_KR_TUNE_OP_LEN 1 +/* Align the arguments to 32 bits */ +#define MC_CMD_KR_TUNE_RXEQ_SET_IN_KR_TUNE_RSVD_OFST 1 +#define MC_CMD_KR_TUNE_RXEQ_SET_IN_KR_TUNE_RSVD_LEN 3 +/* RXEQ Parameter */ +#define MC_CMD_KR_TUNE_RXEQ_SET_IN_PARAM_OFST 4 +#define MC_CMD_KR_TUNE_RXEQ_SET_IN_PARAM_LEN 4 +#define MC_CMD_KR_TUNE_RXEQ_SET_IN_PARAM_MINNUM 1 +#define MC_CMD_KR_TUNE_RXEQ_SET_IN_PARAM_MAXNUM 62 +#define MC_CMD_KR_TUNE_RXEQ_SET_IN_PARAM_ID_LBN 0 +#define MC_CMD_KR_TUNE_RXEQ_SET_IN_PARAM_ID_WIDTH 8 +/* Enum values, see field(s): */ +/* MC_CMD_KR_TUNE_RXEQ_GET_OUT/PARAM_ID */ +#define MC_CMD_KR_TUNE_RXEQ_SET_IN_PARAM_LANE_LBN 8 +#define MC_CMD_KR_TUNE_RXEQ_SET_IN_PARAM_LANE_WIDTH 3 +/* Enum values, see field(s): */ +/* MC_CMD_KR_TUNE_RXEQ_GET_OUT/PARAM_LANE */ +#define MC_CMD_KR_TUNE_RXEQ_SET_IN_PARAM_AUTOCAL_LBN 11 +#define MC_CMD_KR_TUNE_RXEQ_SET_IN_PARAM_AUTOCAL_WIDTH 1 +#define MC_CMD_KR_TUNE_RXEQ_SET_IN_RESERVED_LBN 12 +#define MC_CMD_KR_TUNE_RXEQ_SET_IN_RESERVED_WIDTH 4 +#define MC_CMD_KR_TUNE_RXEQ_SET_IN_PARAM_INITIAL_LBN 16 +#define MC_CMD_KR_TUNE_RXEQ_SET_IN_PARAM_INITIAL_WIDTH 8 +#define MC_CMD_KR_TUNE_RXEQ_SET_IN_RESERVED2_LBN 24 +#define MC_CMD_KR_TUNE_RXEQ_SET_IN_RESERVED2_WIDTH 8 + +/* MC_CMD_KR_TUNE_RXEQ_SET_OUT msgresponse */ +#define MC_CMD_KR_TUNE_RXEQ_SET_OUT_LEN 0 + +/* MC_CMD_KR_TUNE_TXEQ_GET_IN msgrequest */ +#define MC_CMD_KR_TUNE_TXEQ_GET_IN_LEN 4 +/* Requested operation */ +#define MC_CMD_KR_TUNE_TXEQ_GET_IN_KR_TUNE_OP_OFST 0 +#define MC_CMD_KR_TUNE_TXEQ_GET_IN_KR_TUNE_OP_LEN 1 +/* Align the arguments to 32 bits */ +#define MC_CMD_KR_TUNE_TXEQ_GET_IN_KR_TUNE_RSVD_OFST 1 +#define MC_CMD_KR_TUNE_TXEQ_GET_IN_KR_TUNE_RSVD_LEN 3 + +/* MC_CMD_KR_TUNE_TXEQ_GET_OUT msgresponse */ +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_LENMIN 4 +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_LENMAX 252 +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_LEN(num) (0+4*(num)) +/* TXEQ Parameter */ +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_OFST 0 +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_LEN 4 +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_MINNUM 1 +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_MAXNUM 63 +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_ID_LBN 0 +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_ID_WIDTH 8 +/* enum: TX Amplitude */ +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TX_LEV 0x0 +/* enum: De-Emphasis Tap1 Magnitude (0-7) */ +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TX_MODE 0x1 +/* enum: De-Emphasis Tap1 Fine */ +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TX_DTLEV 0x2 +/* enum: De-Emphasis Tap2 Magnitude (0-6) */ +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TX_D2 0x3 +/* enum: De-Emphasis Tap2 Fine */ +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TX_D2TLEV 0x4 +/* enum: Pre-Emphasis Magnitude */ +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TX_E 0x5 +/* enum: Pre-Emphasis Fine */ +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TX_ETLEV 0x6 +/* enum: TX Slew Rate Coarse control */ +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TX_PREDRV_DLY 0x7 +/* enum: TX Slew Rate Fine control */ +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TX_SR_SET 0x8 +/* enum: TX Termination Impedance control */ +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_TX_RT_SET 0x9 +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_LANE_LBN 8 +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_LANE_WIDTH 3 +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_LANE_0 0x0 /* enum */ +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_LANE_1 0x1 /* enum */ +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_LANE_2 0x2 /* enum */ +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_LANE_3 0x3 /* enum */ +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_LANE_ALL 0x4 /* enum */ +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_RESERVED_LBN 11 +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_RESERVED_WIDTH 5 +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_INITIAL_LBN 16 +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_PARAM_INITIAL_WIDTH 8 +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_RESERVED2_LBN 24 +#define MC_CMD_KR_TUNE_TXEQ_GET_OUT_RESERVED2_WIDTH 8 + +/* MC_CMD_KR_TUNE_TXEQ_SET_IN msgrequest */ +#define MC_CMD_KR_TUNE_TXEQ_SET_IN_LENMIN 8 +#define MC_CMD_KR_TUNE_TXEQ_SET_IN_LENMAX 252 +#define MC_CMD_KR_TUNE_TXEQ_SET_IN_LEN(num) (4+4*(num)) +/* Requested operation */ +#define MC_CMD_KR_TUNE_TXEQ_SET_IN_KR_TUNE_OP_OFST 0 +#define MC_CMD_KR_TUNE_TXEQ_SET_IN_KR_TUNE_OP_LEN 1 +/* Align the arguments to 32 bits */ +#define MC_CMD_KR_TUNE_TXEQ_SET_IN_KR_TUNE_RSVD_OFST 1 +#define MC_CMD_KR_TUNE_TXEQ_SET_IN_KR_TUNE_RSVD_LEN 3 +/* TXEQ Parameter */ +#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_OFST 4 +#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_LEN 4 +#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_MINNUM 1 +#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_MAXNUM 62 +#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_ID_LBN 0 +#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_ID_WIDTH 8 +/* Enum values, see field(s): */ +/* MC_CMD_KR_TUNE_TXEQ_GET_OUT/PARAM_ID */ +#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_LANE_LBN 8 +#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_LANE_WIDTH 3 +/* Enum values, see field(s): */ +/* MC_CMD_KR_TUNE_TXEQ_GET_OUT/PARAM_LANE */ +#define MC_CMD_KR_TUNE_TXEQ_SET_IN_RESERVED_LBN 11 +#define MC_CMD_KR_TUNE_TXEQ_SET_IN_RESERVED_WIDTH 5 +#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_INITIAL_LBN 16 +#define MC_CMD_KR_TUNE_TXEQ_SET_IN_PARAM_INITIAL_WIDTH 8 +#define MC_CMD_KR_TUNE_TXEQ_SET_IN_RESERVED2_LBN 24 +#define MC_CMD_KR_TUNE_TXEQ_SET_IN_RESERVED2_WIDTH 8 + +/* MC_CMD_KR_TUNE_TXEQ_SET_OUT msgresponse */ +#define MC_CMD_KR_TUNE_TXEQ_SET_OUT_LEN 0 + +/* MC_CMD_KR_TUNE_RECAL_IN msgrequest */ +#define MC_CMD_KR_TUNE_RECAL_IN_LEN 4 +/* Requested operation */ +#define MC_CMD_KR_TUNE_RECAL_IN_KR_TUNE_OP_OFST 0 +#define MC_CMD_KR_TUNE_RECAL_IN_KR_TUNE_OP_LEN 1 +/* Align the arguments to 32 bits */ +#define MC_CMD_KR_TUNE_RECAL_IN_KR_TUNE_RSVD_OFST 1 +#define MC_CMD_KR_TUNE_RECAL_IN_KR_TUNE_RSVD_LEN 3 + +/* MC_CMD_KR_TUNE_RECAL_OUT msgresponse */ +#define MC_CMD_KR_TUNE_RECAL_OUT_LEN 0 + +/* MC_CMD_KR_TUNE_START_EYE_PLOT_IN msgrequest */ +#define MC_CMD_KR_TUNE_START_EYE_PLOT_IN_LEN 8 +/* Requested operation */ +#define MC_CMD_KR_TUNE_START_EYE_PLOT_IN_KR_TUNE_OP_OFST 0 +#define MC_CMD_KR_TUNE_START_EYE_PLOT_IN_KR_TUNE_OP_LEN 1 +/* Align the arguments to 32 bits */ +#define MC_CMD_KR_TUNE_START_EYE_PLOT_IN_KR_TUNE_RSVD_OFST 1 +#define MC_CMD_KR_TUNE_START_EYE_PLOT_IN_KR_TUNE_RSVD_LEN 3 +#define MC_CMD_KR_TUNE_START_EYE_PLOT_IN_LANE_OFST 4 + +/* MC_CMD_KR_TUNE_START_EYE_PLOT_OUT msgresponse */ +#define MC_CMD_KR_TUNE_START_EYE_PLOT_OUT_LEN 0 + +/* MC_CMD_KR_TUNE_POLL_EYE_PLOT_IN msgrequest */ +#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_IN_LEN 4 +/* Requested operation */ +#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_IN_KR_TUNE_OP_OFST 0 +#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_IN_KR_TUNE_OP_LEN 1 +/* Align the arguments to 32 bits */ +#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_IN_KR_TUNE_RSVD_OFST 1 +#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_IN_KR_TUNE_RSVD_LEN 3 + +/* MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT msgresponse */ +#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_LENMIN 0 +#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_LENMAX 252 +#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_LEN(num) (0+2*(num)) +#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_OFST 0 +#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_LEN 2 +#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_MINNUM 0 +#define MC_CMD_KR_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_MAXNUM 126 + +/* MC_CMD_KR_TUNE_READ_FOM_IN msgrequest */ +#define MC_CMD_KR_TUNE_READ_FOM_IN_LEN 8 +/* Requested operation */ +#define MC_CMD_KR_TUNE_READ_FOM_IN_KR_TUNE_OP_OFST 0 +#define MC_CMD_KR_TUNE_READ_FOM_IN_KR_TUNE_OP_LEN 1 +/* Align the arguments to 32 bits */ +#define MC_CMD_KR_TUNE_READ_FOM_IN_KR_TUNE_RSVD_OFST 1 +#define MC_CMD_KR_TUNE_READ_FOM_IN_KR_TUNE_RSVD_LEN 3 +#define MC_CMD_KR_TUNE_READ_FOM_IN_LANE_OFST 4 + +/* MC_CMD_KR_TUNE_READ_FOM_OUT msgresponse */ +#define MC_CMD_KR_TUNE_READ_FOM_OUT_LEN 4 +#define MC_CMD_KR_TUNE_READ_FOM_OUT_FOM_OFST 0 + + +/***********************************/ +/* MC_CMD_PCIE_TUNE + * Get or set PCIE Serdes RXEQ and TX Driver settings + */ +#define MC_CMD_PCIE_TUNE 0xf2 +#undef MC_CMD_0xf2_PRIVILEGE_CTG + +#define MC_CMD_0xf2_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_PCIE_TUNE_IN msgrequest */ +#define MC_CMD_PCIE_TUNE_IN_LENMIN 4 +#define MC_CMD_PCIE_TUNE_IN_LENMAX 252 +#define MC_CMD_PCIE_TUNE_IN_LEN(num) (4+4*(num)) +/* Requested operation */ +#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_OP_OFST 0 +#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_OP_LEN 1 +/* enum: Get current RXEQ settings */ +#define MC_CMD_PCIE_TUNE_IN_RXEQ_GET 0x0 +/* enum: Override RXEQ settings */ +#define MC_CMD_PCIE_TUNE_IN_RXEQ_SET 0x1 +/* enum: Get current TX Driver settings */ +#define MC_CMD_PCIE_TUNE_IN_TXEQ_GET 0x2 +/* enum: Override TX Driver settings */ +#define MC_CMD_PCIE_TUNE_IN_TXEQ_SET 0x3 +/* enum: Start PCIe Serdes Eye diagram plot on a given lane. */ +#define MC_CMD_PCIE_TUNE_IN_START_EYE_PLOT 0x5 +/* enum: Poll PCIe Serdes Eye diagram plot. Returns one row of BER data. The + * caller should call this command repeatedly after starting eye plot, until no + * more data is returned. + */ +#define MC_CMD_PCIE_TUNE_IN_POLL_EYE_PLOT 0x6 +/* Align the arguments to 32 bits */ +#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_RSVD_OFST 1 +#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_RSVD_LEN 3 +/* Arguments specific to the operation */ +#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_OFST 4 +#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_LEN 4 +#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_MINNUM 0 +#define MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_MAXNUM 62 + +/* MC_CMD_PCIE_TUNE_OUT msgresponse */ +#define MC_CMD_PCIE_TUNE_OUT_LEN 0 + +/* MC_CMD_PCIE_TUNE_RXEQ_GET_IN msgrequest */ +#define MC_CMD_PCIE_TUNE_RXEQ_GET_IN_LEN 4 +/* Requested operation */ +#define MC_CMD_PCIE_TUNE_RXEQ_GET_IN_PCIE_TUNE_OP_OFST 0 +#define MC_CMD_PCIE_TUNE_RXEQ_GET_IN_PCIE_TUNE_OP_LEN 1 +/* Align the arguments to 32 bits */ +#define MC_CMD_PCIE_TUNE_RXEQ_GET_IN_PCIE_TUNE_RSVD_OFST 1 +#define MC_CMD_PCIE_TUNE_RXEQ_GET_IN_PCIE_TUNE_RSVD_LEN 3 + +/* MC_CMD_PCIE_TUNE_RXEQ_GET_OUT msgresponse */ +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LENMIN 4 +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LENMAX 252 +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LEN(num) (0+4*(num)) +/* RXEQ Parameter */ +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_OFST 0 +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_LEN 4 +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_MINNUM 1 +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_MAXNUM 63 +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_ID_LBN 0 +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_ID_WIDTH 8 +/* enum: Attenuation (0-15) */ +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_ATT 0x0 +/* enum: CTLE Boost (0-15) */ +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_BOOST 0x1 +/* enum: DFE Tap1 (0 - max negative, 64 - zero, 127 - max positive) */ +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_DFE_TAP1 0x2 +/* enum: DFE Tap2 (0 - max negative, 32 - zero, 63 - max positive) */ +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_DFE_TAP2 0x3 +/* enum: DFE Tap3 (0 - max negative, 32 - zero, 63 - max positive) */ +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_DFE_TAP3 0x4 +/* enum: DFE Tap4 (0 - max negative, 32 - zero, 63 - max positive) */ +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_DFE_TAP4 0x5 +/* enum: DFE Tap5 (0 - max negative, 32 - zero, 63 - max positive) */ +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_DFE_TAP5 0x6 +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_LANE_LBN 8 +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_LANE_WIDTH 4 +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_0 0x0 /* enum */ +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_1 0x1 /* enum */ +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_2 0x2 /* enum */ +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_3 0x3 /* enum */ +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_4 0x4 /* enum */ +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_5 0x5 /* enum */ +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_6 0x6 /* enum */ +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_7 0x7 /* enum */ +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_ALL 0x8 /* enum */ +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_RESERVED_LBN 12 +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_RESERVED_WIDTH 12 +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_CURRENT_LBN 24 +#define MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_CURRENT_WIDTH 8 + +/* MC_CMD_PCIE_TUNE_TXEQ_GET_IN msgrequest */ +#define MC_CMD_PCIE_TUNE_TXEQ_GET_IN_LEN 4 +/* Requested operation */ +#define MC_CMD_PCIE_TUNE_TXEQ_GET_IN_PCIE_TUNE_OP_OFST 0 +#define MC_CMD_PCIE_TUNE_TXEQ_GET_IN_PCIE_TUNE_OP_LEN 1 +/* Align the arguments to 32 bits */ +#define MC_CMD_PCIE_TUNE_TXEQ_GET_IN_PCIE_TUNE_RSVD_OFST 1 +#define MC_CMD_PCIE_TUNE_TXEQ_GET_IN_PCIE_TUNE_RSVD_LEN 3 + +/* MC_CMD_PCIE_TUNE_TXEQ_GET_OUT msgresponse */ +#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_LENMIN 4 +#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_LENMAX 252 +#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_LEN(num) (0+4*(num)) +/* RXEQ Parameter */ +#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_OFST 0 +#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_LEN 4 +#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_MINNUM 1 +#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_MAXNUM 63 +#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_ID_LBN 0 +#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_ID_WIDTH 8 +/* enum: TxMargin (PIPE) */ +#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_TXMARGIN 0x0 +/* enum: TxSwing (PIPE) */ +#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_TXSWING 0x1 +/* enum: De-emphasis coefficient C(-1) (PIPE) */ +#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_CM1 0x2 +/* enum: De-emphasis coefficient C(0) (PIPE) */ +#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_C0 0x3 +/* enum: De-emphasis coefficient C(+1) (PIPE) */ +#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_CP1 0x4 +#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_LANE_LBN 8 +#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_LANE_WIDTH 4 +/* Enum values, see field(s): */ +/* MC_CMD_PCIE_TUNE_RXEQ_GET_OUT/PARAM_LANE */ +#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_RESERVED_LBN 12 +#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_RESERVED_WIDTH 12 +#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_CURRENT_LBN 24 +#define MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_CURRENT_WIDTH 8 + +/* MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN msgrequest */ +#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_LEN 8 +/* Requested operation */ +#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_PCIE_TUNE_OP_OFST 0 +#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_PCIE_TUNE_OP_LEN 1 +/* Align the arguments to 32 bits */ +#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_PCIE_TUNE_RSVD_OFST 1 +#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_PCIE_TUNE_RSVD_LEN 3 +#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_LANE_OFST 4 + +/* MC_CMD_PCIE_TUNE_START_EYE_PLOT_OUT msgresponse */ +#define MC_CMD_PCIE_TUNE_START_EYE_PLOT_OUT_LEN 0 + +/* MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN msgrequest */ +#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN_LEN 4 +/* Requested operation */ +#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN_PCIE_TUNE_OP_OFST 0 +#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN_PCIE_TUNE_OP_LEN 1 +/* Align the arguments to 32 bits */ +#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN_PCIE_TUNE_RSVD_OFST 1 +#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN_PCIE_TUNE_RSVD_LEN 3 + +/* MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT msgresponse */ +#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_LENMIN 0 +#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_LENMAX 252 +#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_LEN(num) (0+2*(num)) +#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_OFST 0 +#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_LEN 2 +#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_MINNUM 0 +#define MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_MAXNUM 126 + + +/***********************************/ +/* MC_CMD_LICENSING + * Operations on the NVRAM_PARTITION_TYPE_LICENSE application license partition + */ +#define MC_CMD_LICENSING 0xf3 +#undef MC_CMD_0xf3_PRIVILEGE_CTG + +#define MC_CMD_0xf3_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_LICENSING_IN msgrequest */ +#define MC_CMD_LICENSING_IN_LEN 4 +/* identifies the type of operation requested */ +#define MC_CMD_LICENSING_IN_OP_OFST 0 +/* enum: re-read and apply licenses after a license key partition update; note + * that this operation returns a zero-length response + */ +#define MC_CMD_LICENSING_IN_OP_UPDATE_LICENSE 0x0 +/* enum: report counts of installed licenses */ +#define MC_CMD_LICENSING_IN_OP_GET_KEY_STATS 0x1 + +/* MC_CMD_LICENSING_OUT msgresponse */ +#define MC_CMD_LICENSING_OUT_LEN 28 +/* count of application keys which are valid */ +#define MC_CMD_LICENSING_OUT_VALID_APP_KEYS_OFST 0 +/* sum of UNVERIFIABLE_APP_KEYS + WRONG_NODE_APP_KEYS (for compatibility with + * MC_CMD_FC_OP_LICENSE) + */ +#define MC_CMD_LICENSING_OUT_INVALID_APP_KEYS_OFST 4 +/* count of application keys which are invalid due to being blacklisted */ +#define MC_CMD_LICENSING_OUT_BLACKLISTED_APP_KEYS_OFST 8 +/* count of application keys which are invalid due to being unverifiable */ +#define MC_CMD_LICENSING_OUT_UNVERIFIABLE_APP_KEYS_OFST 12 +/* count of application keys which are invalid due to being for the wrong node + */ +#define MC_CMD_LICENSING_OUT_WRONG_NODE_APP_KEYS_OFST 16 +/* licensing state (for diagnostics; the exact meaning of the bits in this + * field are private to the firmware) + */ +#define MC_CMD_LICENSING_OUT_LICENSING_STATE_OFST 20 +/* licensing subsystem self-test report (for manftest) */ +#define MC_CMD_LICENSING_OUT_LICENSING_SELF_TEST_OFST 24 +/* enum: licensing subsystem self-test failed */ +#define MC_CMD_LICENSING_OUT_SELF_TEST_FAIL 0x0 +/* enum: licensing subsystem self-test passed */ +#define MC_CMD_LICENSING_OUT_SELF_TEST_PASS 0x1 + + +/***********************************/ +/* MC_CMD_MC2MC_PROXY + * Execute an arbitrary MCDI command on the slave MC of a dual-core device. + * This will fail on a single-core system. + */ +#define MC_CMD_MC2MC_PROXY 0xf4 +#undef MC_CMD_0xf4_PRIVILEGE_CTG + +#define MC_CMD_0xf4_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_MC2MC_PROXY_IN msgrequest */ +#define MC_CMD_MC2MC_PROXY_IN_LEN 0 + +/* MC_CMD_MC2MC_PROXY_OUT msgresponse */ +#define MC_CMD_MC2MC_PROXY_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_GET_LICENSED_APP_STATE + * Query the state of an individual licensed application. (Note that the actual + * state may be invalidated by the MC_CMD_LICENSING OP_UPDATE_LICENSE operation + * or a reboot of the MC.) + */ +#define MC_CMD_GET_LICENSED_APP_STATE 0xf5 +#undef MC_CMD_0xf5_PRIVILEGE_CTG + +#define MC_CMD_0xf5_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_GET_LICENSED_APP_STATE_IN msgrequest */ +#define MC_CMD_GET_LICENSED_APP_STATE_IN_LEN 4 +/* application ID to query (LICENSED_APP_ID_xxx) */ +#define MC_CMD_GET_LICENSED_APP_STATE_IN_APP_ID_OFST 0 + +/* MC_CMD_GET_LICENSED_APP_STATE_OUT msgresponse */ +#define MC_CMD_GET_LICENSED_APP_STATE_OUT_LEN 4 +/* state of this application */ +#define MC_CMD_GET_LICENSED_APP_STATE_OUT_STATE_OFST 0 +/* enum: no (or invalid) license is present for the application */ +#define MC_CMD_GET_LICENSED_APP_STATE_OUT_NOT_LICENSED 0x0 +/* enum: a valid license is present for the application */ +#define MC_CMD_GET_LICENSED_APP_STATE_OUT_LICENSED 0x1 + + +/***********************************/ +/* MC_CMD_LICENSED_APP_OP + * Perform an action for an individual licensed application. + */ +#define MC_CMD_LICENSED_APP_OP 0xf6 +#undef MC_CMD_0xf6_PRIVILEGE_CTG + +#define MC_CMD_0xf6_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_LICENSED_APP_OP_IN msgrequest */ +#define MC_CMD_LICENSED_APP_OP_IN_LENMIN 8 +#define MC_CMD_LICENSED_APP_OP_IN_LENMAX 252 +#define MC_CMD_LICENSED_APP_OP_IN_LEN(num) (8+4*(num)) +/* application ID */ +#define MC_CMD_LICENSED_APP_OP_IN_APP_ID_OFST 0 +/* the type of operation requested */ +#define MC_CMD_LICENSED_APP_OP_IN_OP_OFST 4 +/* enum: validate application */ +#define MC_CMD_LICENSED_APP_OP_IN_OP_VALIDATE 0x0 +/* enum: mask application */ +#define MC_CMD_LICENSED_APP_OP_IN_OP_MASK 0x1 +/* arguments specific to this particular operation */ +#define MC_CMD_LICENSED_APP_OP_IN_ARGS_OFST 8 +#define MC_CMD_LICENSED_APP_OP_IN_ARGS_LEN 4 +#define MC_CMD_LICENSED_APP_OP_IN_ARGS_MINNUM 0 +#define MC_CMD_LICENSED_APP_OP_IN_ARGS_MAXNUM 61 + +/* MC_CMD_LICENSED_APP_OP_OUT msgresponse */ +#define MC_CMD_LICENSED_APP_OP_OUT_LENMIN 0 +#define MC_CMD_LICENSED_APP_OP_OUT_LENMAX 252 +#define MC_CMD_LICENSED_APP_OP_OUT_LEN(num) (0+4*(num)) +/* result specific to this particular operation */ +#define MC_CMD_LICENSED_APP_OP_OUT_RESULT_OFST 0 +#define MC_CMD_LICENSED_APP_OP_OUT_RESULT_LEN 4 +#define MC_CMD_LICENSED_APP_OP_OUT_RESULT_MINNUM 0 +#define MC_CMD_LICENSED_APP_OP_OUT_RESULT_MAXNUM 63 + +/* MC_CMD_LICENSED_APP_OP_VALIDATE_IN msgrequest */ +#define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_LEN 72 +/* application ID */ +#define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_APP_ID_OFST 0 +/* the type of operation requested */ +#define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_OP_OFST 4 +/* validation challenge */ +#define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_CHALLENGE_OFST 8 +#define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_CHALLENGE_LEN 64 + +/* MC_CMD_LICENSED_APP_OP_VALIDATE_OUT msgresponse */ +#define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_LEN 68 +/* feature expiry (time_t) */ +#define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_EXPIRY_OFST 0 +/* validation response */ +#define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_RESPONSE_OFST 4 +#define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_RESPONSE_LEN 64 + +/* MC_CMD_LICENSED_APP_OP_MASK_IN msgrequest */ +#define MC_CMD_LICENSED_APP_OP_MASK_IN_LEN 12 +/* application ID */ +#define MC_CMD_LICENSED_APP_OP_MASK_IN_APP_ID_OFST 0 +/* the type of operation requested */ +#define MC_CMD_LICENSED_APP_OP_MASK_IN_OP_OFST 4 +/* flag */ +#define MC_CMD_LICENSED_APP_OP_MASK_IN_FLAG_OFST 8 + +/* MC_CMD_LICENSED_APP_OP_MASK_OUT msgresponse */ +#define MC_CMD_LICENSED_APP_OP_MASK_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_SET_PORT_SNIFF_CONFIG + * Configure RX port sniffing for the physical port associated with the calling + * function. Only a privileged function may change the port sniffing + * configuration. A copy of all traffic delivered to the host (non-promiscuous + * mode) or all traffic arriving at the port (promiscuous mode) may be + * delivered to a specific queue, or a set of queues with RSS. + */ +#define MC_CMD_SET_PORT_SNIFF_CONFIG 0xf7 +#undef MC_CMD_0xf7_PRIVILEGE_CTG + +#define MC_CMD_0xf7_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_SET_PORT_SNIFF_CONFIG_IN msgrequest */ +#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_LEN 16 +/* configuration flags */ +#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_FLAGS_OFST 0 +#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_ENABLE_LBN 0 +#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_ENABLE_WIDTH 1 +#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_PROMISCUOUS_LBN 1 +#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_PROMISCUOUS_WIDTH 1 +/* receive queue handle (for RSS mode, this is the base queue) */ +#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_QUEUE_OFST 4 +/* receive mode */ +#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_MODE_OFST 8 +/* enum: receive to just the specified queue */ +#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_MODE_SIMPLE 0x0 +/* enum: receive to multiple queues using RSS context */ +#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_MODE_RSS 0x1 +/* RSS context (for RX_MODE_RSS) as returned by MC_CMD_RSS_CONTEXT_ALLOC. Note + * that these handles should be considered opaque to the host, although a value + * of 0xFFFFFFFF is guaranteed never to be a valid handle. + */ +#define MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_CONTEXT_OFST 12 + +/* MC_CMD_SET_PORT_SNIFF_CONFIG_OUT msgresponse */ +#define MC_CMD_SET_PORT_SNIFF_CONFIG_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_GET_PORT_SNIFF_CONFIG + * Obtain the current RX port sniffing configuration for the physical port + * associated with the calling function. Only a privileged function may read + * the configuration. + */ +#define MC_CMD_GET_PORT_SNIFF_CONFIG 0xf8 +#undef MC_CMD_0xf8_PRIVILEGE_CTG + +#define MC_CMD_0xf8_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_GET_PORT_SNIFF_CONFIG_IN msgrequest */ +#define MC_CMD_GET_PORT_SNIFF_CONFIG_IN_LEN 0 + +/* MC_CMD_GET_PORT_SNIFF_CONFIG_OUT msgresponse */ +#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_LEN 16 +/* configuration flags */ +#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_FLAGS_OFST 0 +#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_ENABLE_LBN 0 +#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_ENABLE_WIDTH 1 +#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_PROMISCUOUS_LBN 1 +#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_PROMISCUOUS_WIDTH 1 +/* receiving queue handle (for RSS mode, this is the base queue) */ +#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_QUEUE_OFST 4 +/* receive mode */ +#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_MODE_OFST 8 +/* enum: receiving to just the specified queue */ +#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_MODE_SIMPLE 0x0 +/* enum: receiving to multiple queues using RSS context */ +#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_MODE_RSS 0x1 +/* RSS context (for RX_MODE_RSS) */ +#define MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_CONTEXT_OFST 12 + + +/***********************************/ +/* MC_CMD_SET_PARSER_DISP_CONFIG + * Change configuration related to the parser-dispatcher subsystem. + */ +#define MC_CMD_SET_PARSER_DISP_CONFIG 0xf9 +#undef MC_CMD_0xf9_PRIVILEGE_CTG + +#define MC_CMD_0xf9_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_SET_PARSER_DISP_CONFIG_IN msgrequest */ +#define MC_CMD_SET_PARSER_DISP_CONFIG_IN_LENMIN 12 +#define MC_CMD_SET_PARSER_DISP_CONFIG_IN_LENMAX 252 +#define MC_CMD_SET_PARSER_DISP_CONFIG_IN_LEN(num) (8+4*(num)) +/* the type of configuration setting to change */ +#define MC_CMD_SET_PARSER_DISP_CONFIG_IN_TYPE_OFST 0 +/* enum: Per-TXQ enable for multicast UDP destination lookup for possible + * internal loopback. (ENTITY is a queue handle, VALUE is a single boolean.) + */ +#define MC_CMD_SET_PARSER_DISP_CONFIG_IN_TXQ_MCAST_UDP_DST_LOOKUP_EN 0x0 +/* enum: Per-v-adaptor enable for suppression of self-transmissions on the + * internal loopback path. (ENTITY is an EVB_PORT_ID, VALUE is a single + * boolean.) + */ +#define MC_CMD_SET_PARSER_DISP_CONFIG_IN_VADAPTOR_SUPPRESS_SELF_TX 0x1 +/* handle for the entity to update: queue handle, EVB port ID, etc. depending + * on the type of configuration setting being changed + */ +#define MC_CMD_SET_PARSER_DISP_CONFIG_IN_ENTITY_OFST 4 +/* new value: the details depend on the type of configuration setting being + * changed + */ +#define MC_CMD_SET_PARSER_DISP_CONFIG_IN_VALUE_OFST 8 +#define MC_CMD_SET_PARSER_DISP_CONFIG_IN_VALUE_LEN 4 +#define MC_CMD_SET_PARSER_DISP_CONFIG_IN_VALUE_MINNUM 1 +#define MC_CMD_SET_PARSER_DISP_CONFIG_IN_VALUE_MAXNUM 61 + +/* MC_CMD_SET_PARSER_DISP_CONFIG_OUT msgresponse */ +#define MC_CMD_SET_PARSER_DISP_CONFIG_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_GET_PARSER_DISP_CONFIG + * Read configuration related to the parser-dispatcher subsystem. + */ +#define MC_CMD_GET_PARSER_DISP_CONFIG 0xfa +#undef MC_CMD_0xfa_PRIVILEGE_CTG + +#define MC_CMD_0xfa_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_GET_PARSER_DISP_CONFIG_IN msgrequest */ +#define MC_CMD_GET_PARSER_DISP_CONFIG_IN_LEN 8 +/* the type of configuration setting to read */ +#define MC_CMD_GET_PARSER_DISP_CONFIG_IN_TYPE_OFST 0 +/* Enum values, see field(s): */ +/* MC_CMD_SET_PARSER_DISP_CONFIG/MC_CMD_SET_PARSER_DISP_CONFIG_IN/TYPE */ +/* handle for the entity to query: queue handle, EVB port ID, etc. depending on + * the type of configuration setting being read + */ +#define MC_CMD_GET_PARSER_DISP_CONFIG_IN_ENTITY_OFST 4 + +/* MC_CMD_GET_PARSER_DISP_CONFIG_OUT msgresponse */ +#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LENMIN 4 +#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LENMAX 252 +#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LEN(num) (0+4*(num)) +/* current value: the details depend on the type of configuration setting being + * read + */ +#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_OFST 0 +#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_LEN 4 +#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_MINNUM 1 +#define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_MAXNUM 63 + + +/***********************************/ +/* MC_CMD_SET_TX_PORT_SNIFF_CONFIG + * Configure TX port sniffing for the physical port associated with the calling + * function. Only a privileged function may change the port sniffing + * configuration. A copy of all traffic transmitted through the port may be + * delivered to a specific queue, or a set of queues with RSS. Note that these + * packets are delivered with transmit timestamps in the packet prefix, not + * receive timestamps, so it is likely that the queue(s) will need to be + * dedicated as TX sniff receivers. + */ +#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG 0xfb +#undef MC_CMD_0xfb_PRIVILEGE_CTG + +#define MC_CMD_0xfb_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN msgrequest */ +#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_LEN 16 +/* configuration flags */ +#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_FLAGS_OFST 0 +#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_ENABLE_LBN 0 +#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_ENABLE_WIDTH 1 +/* receive queue handle (for RSS mode, this is the base queue) */ +#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_QUEUE_OFST 4 +/* receive mode */ +#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_MODE_OFST 8 +/* enum: receive to just the specified queue */ +#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_MODE_SIMPLE 0x0 +/* enum: receive to multiple queues using RSS context */ +#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_MODE_RSS 0x1 +/* RSS context (for RX_MODE_RSS) as returned by MC_CMD_RSS_CONTEXT_ALLOC. Note + * that these handles should be considered opaque to the host, although a value + * of 0xFFFFFFFF is guaranteed never to be a valid handle. + */ +#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_CONTEXT_OFST 12 + +/* MC_CMD_SET_TX_PORT_SNIFF_CONFIG_OUT msgresponse */ +#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_GET_TX_PORT_SNIFF_CONFIG + * Obtain the current TX port sniffing configuration for the physical port + * associated with the calling function. Only a privileged function may read + * the configuration. + */ +#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG 0xfc +#undef MC_CMD_0xfc_PRIVILEGE_CTG + +#define MC_CMD_0xfc_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_GET_TX_PORT_SNIFF_CONFIG_IN msgrequest */ +#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_IN_LEN 0 + +/* MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT msgresponse */ +#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_LEN 16 +/* configuration flags */ +#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_FLAGS_OFST 0 +#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_ENABLE_LBN 0 +#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_ENABLE_WIDTH 1 +/* receiving queue handle (for RSS mode, this is the base queue) */ +#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_QUEUE_OFST 4 +/* receive mode */ +#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_MODE_OFST 8 +/* enum: receiving to just the specified queue */ +#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_MODE_SIMPLE 0x0 +/* enum: receiving to multiple queues using RSS context */ +#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_MODE_RSS 0x1 +/* RSS context (for RX_MODE_RSS) */ +#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_CONTEXT_OFST 12 + + +/***********************************/ +/* MC_CMD_RMON_STATS_RX_ERRORS + * Per queue rx error stats. + */ +#define MC_CMD_RMON_STATS_RX_ERRORS 0xfe +#undef MC_CMD_0xfe_PRIVILEGE_CTG + +#define MC_CMD_0xfe_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_RMON_STATS_RX_ERRORS_IN msgrequest */ +#define MC_CMD_RMON_STATS_RX_ERRORS_IN_LEN 8 +/* The rx queue to get stats for. */ +#define MC_CMD_RMON_STATS_RX_ERRORS_IN_RX_QUEUE_OFST 0 +#define MC_CMD_RMON_STATS_RX_ERRORS_IN_FLAGS_OFST 4 +#define MC_CMD_RMON_STATS_RX_ERRORS_IN_RST_LBN 0 +#define MC_CMD_RMON_STATS_RX_ERRORS_IN_RST_WIDTH 1 + +/* MC_CMD_RMON_STATS_RX_ERRORS_OUT msgresponse */ +#define MC_CMD_RMON_STATS_RX_ERRORS_OUT_LEN 16 +#define MC_CMD_RMON_STATS_RX_ERRORS_OUT_CRC_ERRORS_OFST 0 +#define MC_CMD_RMON_STATS_RX_ERRORS_OUT_TRUNC_ERRORS_OFST 4 +#define MC_CMD_RMON_STATS_RX_ERRORS_OUT_RX_NO_DESC_DROPS_OFST 8 +#define MC_CMD_RMON_STATS_RX_ERRORS_OUT_RX_ABORT_OFST 12 + + +/***********************************/ +/* MC_CMD_GET_PCIE_RESOURCE_INFO + * Find out about available PCIE resources + */ +#define MC_CMD_GET_PCIE_RESOURCE_INFO 0xfd + +/* MC_CMD_GET_PCIE_RESOURCE_INFO_IN msgrequest */ +#define MC_CMD_GET_PCIE_RESOURCE_INFO_IN_LEN 0 + +/* MC_CMD_GET_PCIE_RESOURCE_INFO_OUT msgresponse */ +#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_LEN 28 +/* The maximum number of PFs the device can expose */ +#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_PFS_OFST 0 +/* The maximum number of VFs the device can expose in total */ +#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_VFS_OFST 4 +/* The maximum number of MSI-X vectors the device can provide in total */ +#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_VECTORS_OFST 8 +/* the number of MSI-X vectors the device will allocate by default to each PF + */ +#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_DEFAULT_PF_VECTORS_OFST 12 +/* the number of MSI-X vectors the device will allocate by default to each VF + */ +#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_DEFAULT_VF_VECTORS_OFST 16 +/* the maximum number of MSI-X vectors the device can allocate to any one PF */ +#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_PF_VECTORS_OFST 20 +/* the maximum number of MSI-X vectors the device can allocate to any one VF */ +#define MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_VF_VECTORS_OFST 24 + + +/***********************************/ +/* MC_CMD_GET_PORT_MODES + * Find out about available port modes + */ +#define MC_CMD_GET_PORT_MODES 0xff +#undef MC_CMD_0xff_PRIVILEGE_CTG + +#define MC_CMD_0xff_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_GET_PORT_MODES_IN msgrequest */ +#define MC_CMD_GET_PORT_MODES_IN_LEN 0 + +/* MC_CMD_GET_PORT_MODES_OUT msgresponse */ +#define MC_CMD_GET_PORT_MODES_OUT_LEN 12 +/* Bitmask of port modes available on the board (indexed by TLV_PORT_MODE_*) */ +#define MC_CMD_GET_PORT_MODES_OUT_MODES_OFST 0 +/* Default (canonical) board mode */ +#define MC_CMD_GET_PORT_MODES_OUT_DEFAULT_MODE_OFST 4 +/* Current board mode */ +#define MC_CMD_GET_PORT_MODES_OUT_CURRENT_MODE_OFST 8 + + +/***********************************/ +/* MC_CMD_READ_ATB + * Sample voltages on the ATB + */ +#define MC_CMD_READ_ATB 0x100 +#undef MC_CMD_0x100_PRIVILEGE_CTG + +#define MC_CMD_0x100_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_READ_ATB_IN msgrequest */ +#define MC_CMD_READ_ATB_IN_LEN 16 +#define MC_CMD_READ_ATB_IN_SIGNAL_BUS_OFST 0 +#define MC_CMD_READ_ATB_IN_BUS_CCOM 0x0 /* enum */ +#define MC_CMD_READ_ATB_IN_BUS_CKR 0x1 /* enum */ +#define MC_CMD_READ_ATB_IN_BUS_CPCIE 0x8 /* enum */ +#define MC_CMD_READ_ATB_IN_SIGNAL_EN_BITNO_OFST 4 +#define MC_CMD_READ_ATB_IN_SIGNAL_SEL_OFST 8 +#define MC_CMD_READ_ATB_IN_SETTLING_TIME_US_OFST 12 + +/* MC_CMD_READ_ATB_OUT msgresponse */ +#define MC_CMD_READ_ATB_OUT_LEN 4 +#define MC_CMD_READ_ATB_OUT_SAMPLE_MV_OFST 0 + + +/***********************************/ +/* MC_CMD_GET_WORKAROUNDS + * Read the list of all implemented and all currently enabled workarounds. The + * enums here must correspond with those in MC_CMD_WORKAROUND. + */ +#define MC_CMD_GET_WORKAROUNDS 0x59 +#undef MC_CMD_0x59_PRIVILEGE_CTG + +#define MC_CMD_0x59_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_GET_WORKAROUNDS_OUT msgresponse */ +#define MC_CMD_GET_WORKAROUNDS_OUT_LEN 8 +/* Each workaround is represented by a single bit according to the enums below. + */ +#define MC_CMD_GET_WORKAROUNDS_OUT_IMPLEMENTED_OFST 0 +#define MC_CMD_GET_WORKAROUNDS_OUT_ENABLED_OFST 4 +/* enum: Bug 17230 work around. */ +#define MC_CMD_GET_WORKAROUNDS_OUT_BUG17230 0x2 +/* enum: Bug 35388 work around (unsafe EVQ writes). */ +#define MC_CMD_GET_WORKAROUNDS_OUT_BUG35388 0x4 +/* enum: Bug35017 workaround (A64 tables must be identity map) */ +#define MC_CMD_GET_WORKAROUNDS_OUT_BUG35017 0x8 +/* enum: Bug 41750 present (MC_CMD_TRIGGER_INTERRUPT won't work) */ +#define MC_CMD_GET_WORKAROUNDS_OUT_BUG41750 0x10 +/* enum: Bug 42008 present (Interrupts can overtake associated events). Caution + * - before adding code that queries this workaround, remember that there's + * released Monza firmware that doesn't understand MC_CMD_WORKAROUND_BUG42008, + * and will hence (incorrectly) report that the bug doesn't exist. + */ +#define MC_CMD_GET_WORKAROUNDS_OUT_BUG42008 0x20 +/* enum: Bug 26807 features present in firmware (multicast filter chaining) */ +#define MC_CMD_GET_WORKAROUNDS_OUT_BUG26807 0x40 + + +/***********************************/ +/* MC_CMD_PRIVILEGE_MASK + * Read/set privileges of an arbitrary PCIe function + */ +#define MC_CMD_PRIVILEGE_MASK 0x5a +#undef MC_CMD_0x5a_PRIVILEGE_CTG + +#define MC_CMD_0x5a_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_PRIVILEGE_MASK_IN msgrequest */ +#define MC_CMD_PRIVILEGE_MASK_IN_LEN 8 +/* The target function to have its mask read or set e.g. PF 0 = 0xFFFF0000, VF + * 1,3 = 0x00030001 + */ +#define MC_CMD_PRIVILEGE_MASK_IN_FUNCTION_OFST 0 +#define MC_CMD_PRIVILEGE_MASK_IN_FUNCTION_PF_LBN 0 +#define MC_CMD_PRIVILEGE_MASK_IN_FUNCTION_PF_WIDTH 16 +#define MC_CMD_PRIVILEGE_MASK_IN_FUNCTION_VF_LBN 16 +#define MC_CMD_PRIVILEGE_MASK_IN_FUNCTION_VF_WIDTH 16 +#define MC_CMD_PRIVILEGE_MASK_IN_VF_NULL 0xffff /* enum */ +/* New privilege mask to be set. The mask will only be changed if the MSB is + * set to 1. + */ +#define MC_CMD_PRIVILEGE_MASK_IN_NEW_MASK_OFST 4 +#define MC_CMD_PRIVILEGE_MASK_IN_GRP_ADMIN 0x1 /* enum */ +#define MC_CMD_PRIVILEGE_MASK_IN_GRP_LINK 0x2 /* enum */ +#define MC_CMD_PRIVILEGE_MASK_IN_GRP_ONLOAD 0x4 /* enum */ +#define MC_CMD_PRIVILEGE_MASK_IN_GRP_PTP 0x8 /* enum */ +#define MC_CMD_PRIVILEGE_MASK_IN_GRP_INSECURE_FILTERS 0x10 /* enum */ +#define MC_CMD_PRIVILEGE_MASK_IN_GRP_MAC_SPOOFING 0x20 /* enum */ +#define MC_CMD_PRIVILEGE_MASK_IN_GRP_UNICAST 0x40 /* enum */ +#define MC_CMD_PRIVILEGE_MASK_IN_GRP_MULTICAST 0x80 /* enum */ +#define MC_CMD_PRIVILEGE_MASK_IN_GRP_BROADCAST 0x100 /* enum */ +#define MC_CMD_PRIVILEGE_MASK_IN_GRP_ALL_MULTICAST 0x200 /* enum */ +#define MC_CMD_PRIVILEGE_MASK_IN_GRP_PROMISCUOUS 0x400 /* enum */ +/* enum: Set this bit to indicate that a new privilege mask is to be set, + * otherwise the command will only read the existing mask. + */ +#define MC_CMD_PRIVILEGE_MASK_IN_DO_CHANGE 0x80000000 + +/* MC_CMD_PRIVILEGE_MASK_OUT msgresponse */ +#define MC_CMD_PRIVILEGE_MASK_OUT_LEN 4 +/* For an admin function, always all the privileges are reported. */ +#define MC_CMD_PRIVILEGE_MASK_OUT_OLD_MASK_OFST 0 + + +/***********************************/ +/* MC_CMD_LINK_STATE_MODE + * Read/set link state mode of a VF + */ +#define MC_CMD_LINK_STATE_MODE 0x5c +#undef MC_CMD_0x5c_PRIVILEGE_CTG + +#define MC_CMD_0x5c_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_LINK_STATE_MODE_IN msgrequest */ +#define MC_CMD_LINK_STATE_MODE_IN_LEN 8 +/* The target function to have its link state mode read or set, must be a VF + * e.g. VF 1,3 = 0x00030001 + */ +#define MC_CMD_LINK_STATE_MODE_IN_FUNCTION_OFST 0 +#define MC_CMD_LINK_STATE_MODE_IN_FUNCTION_PF_LBN 0 +#define MC_CMD_LINK_STATE_MODE_IN_FUNCTION_PF_WIDTH 16 +#define MC_CMD_LINK_STATE_MODE_IN_FUNCTION_VF_LBN 16 +#define MC_CMD_LINK_STATE_MODE_IN_FUNCTION_VF_WIDTH 16 +/* New link state mode to be set */ +#define MC_CMD_LINK_STATE_MODE_IN_NEW_MODE_OFST 4 +#define MC_CMD_LINK_STATE_MODE_IN_LINK_STATE_AUTO 0x0 /* enum */ +#define MC_CMD_LINK_STATE_MODE_IN_LINK_STATE_UP 0x1 /* enum */ +#define MC_CMD_LINK_STATE_MODE_IN_LINK_STATE_DOWN 0x2 /* enum */ +/* enum: Use this value to just read the existing setting without modifying it. + */ +#define MC_CMD_LINK_STATE_MODE_IN_DO_NOT_CHANGE 0xffffffff + +/* MC_CMD_LINK_STATE_MODE_OUT msgresponse */ +#define MC_CMD_LINK_STATE_MODE_OUT_LEN 4 +#define MC_CMD_LINK_STATE_MODE_OUT_OLD_MODE_OFST 0 + + +/***********************************/ +/* MC_CMD_GET_SNAPSHOT_LENGTH + * Obtain the curent range of allowable values for the SNAPSHOT_LENGTH + * parameter to MC_CMD_INIT_RXQ. + */ +#define MC_CMD_GET_SNAPSHOT_LENGTH 0x101 +#undef MC_CMD_0x101_PRIVILEGE_CTG + +#define MC_CMD_0x101_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_GET_SNAPSHOT_LENGTH_IN msgrequest */ +#define MC_CMD_GET_SNAPSHOT_LENGTH_IN_LEN 0 + +/* MC_CMD_GET_SNAPSHOT_LENGTH_OUT msgresponse */ +#define MC_CMD_GET_SNAPSHOT_LENGTH_OUT_LEN 8 +/* Minimum acceptable snapshot length. */ +#define MC_CMD_GET_SNAPSHOT_LENGTH_OUT_RX_SNAPLEN_MIN_OFST 0 +/* Maximum acceptable snapshot length. */ +#define MC_CMD_GET_SNAPSHOT_LENGTH_OUT_RX_SNAPLEN_MAX_OFST 4 + + +/***********************************/ +/* MC_CMD_FUSE_DIAGS + * Additional fuse diagnostics + */ +#define MC_CMD_FUSE_DIAGS 0x102 +#undef MC_CMD_0x102_PRIVILEGE_CTG + +#define MC_CMD_0x102_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_FUSE_DIAGS_IN msgrequest */ +#define MC_CMD_FUSE_DIAGS_IN_LEN 0 + +/* MC_CMD_FUSE_DIAGS_OUT msgresponse */ +#define MC_CMD_FUSE_DIAGS_OUT_LEN 48 +/* Total number of mismatched bits between pairs in area 0 */ +#define MC_CMD_FUSE_DIAGS_OUT_AREA0_MISMATCH_BITS_OFST 0 +/* Total number of unexpectedly clear (set in B but not A) bits in area 0 */ +#define MC_CMD_FUSE_DIAGS_OUT_AREA0_PAIR_A_BAD_BITS_OFST 4 +/* Total number of unexpectedly clear (set in A but not B) bits in area 0 */ +#define MC_CMD_FUSE_DIAGS_OUT_AREA0_PAIR_B_BAD_BITS_OFST 8 +/* Checksum of data after logical OR of pairs in area 0 */ +#define MC_CMD_FUSE_DIAGS_OUT_AREA0_CHECKSUM_OFST 12 +/* Total number of mismatched bits between pairs in area 1 */ +#define MC_CMD_FUSE_DIAGS_OUT_AREA1_MISMATCH_BITS_OFST 16 +/* Total number of unexpectedly clear (set in B but not A) bits in area 1 */ +#define MC_CMD_FUSE_DIAGS_OUT_AREA1_PAIR_A_BAD_BITS_OFST 20 +/* Total number of unexpectedly clear (set in A but not B) bits in area 1 */ +#define MC_CMD_FUSE_DIAGS_OUT_AREA1_PAIR_B_BAD_BITS_OFST 24 +/* Checksum of data after logical OR of pairs in area 1 */ +#define MC_CMD_FUSE_DIAGS_OUT_AREA1_CHECKSUM_OFST 28 +/* Total number of mismatched bits between pairs in area 2 */ +#define MC_CMD_FUSE_DIAGS_OUT_AREA2_MISMATCH_BITS_OFST 32 +/* Total number of unexpectedly clear (set in B but not A) bits in area 2 */ +#define MC_CMD_FUSE_DIAGS_OUT_AREA2_PAIR_A_BAD_BITS_OFST 36 +/* Total number of unexpectedly clear (set in A but not B) bits in area 2 */ +#define MC_CMD_FUSE_DIAGS_OUT_AREA2_PAIR_B_BAD_BITS_OFST 40 +/* Checksum of data after logical OR of pairs in area 2 */ +#define MC_CMD_FUSE_DIAGS_OUT_AREA2_CHECKSUM_OFST 44 + + +/***********************************/ +/* MC_CMD_PRIVILEGE_MODIFY + * Modify the privileges of a set of PCIe functions. Note that this operation + * only effects non-admin functions unless the admin privilege itself is + * included in one of the masks provided. + */ +#define MC_CMD_PRIVILEGE_MODIFY 0x60 +#undef MC_CMD_0x60_PRIVILEGE_CTG + +#define MC_CMD_0x60_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_PRIVILEGE_MODIFY_IN msgrequest */ +#define MC_CMD_PRIVILEGE_MODIFY_IN_LEN 16 +/* The groups of functions to have their privilege masks modified. */ +#define MC_CMD_PRIVILEGE_MODIFY_IN_FN_GROUP_OFST 0 +#define MC_CMD_PRIVILEGE_MODIFY_IN_NONE 0x0 /* enum */ +#define MC_CMD_PRIVILEGE_MODIFY_IN_ALL 0x1 /* enum */ +#define MC_CMD_PRIVILEGE_MODIFY_IN_PFS_ONLY 0x2 /* enum */ +#define MC_CMD_PRIVILEGE_MODIFY_IN_VFS_ONLY 0x3 /* enum */ +#define MC_CMD_PRIVILEGE_MODIFY_IN_VFS_OF_PF 0x4 /* enum */ +#define MC_CMD_PRIVILEGE_MODIFY_IN_ONE 0x5 /* enum */ +/* For VFS_OF_PF specify the PF, for ONE specify the target function */ +#define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_OFST 4 +#define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_PF_LBN 0 +#define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_PF_WIDTH 16 +#define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_VF_LBN 16 +#define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_VF_WIDTH 16 +/* Privileges to be added to the target functions. For privilege definitions + * refer to the command MC_CMD_PRIVILEGE_MASK + */ +#define MC_CMD_PRIVILEGE_MODIFY_IN_ADD_MASK_OFST 8 +/* Privileges to be removed from the target functions. For privilege + * definitions refer to the command MC_CMD_PRIVILEGE_MASK + */ +#define MC_CMD_PRIVILEGE_MODIFY_IN_REMOVE_MASK_OFST 12 + +/* MC_CMD_PRIVILEGE_MODIFY_OUT msgresponse */ +#define MC_CMD_PRIVILEGE_MODIFY_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_XPM_READ_BYTES + * Read XPM memory + */ +#define MC_CMD_XPM_READ_BYTES 0x103 +#undef MC_CMD_0x103_PRIVILEGE_CTG + +#define MC_CMD_0x103_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_XPM_READ_BYTES_IN msgrequest */ +#define MC_CMD_XPM_READ_BYTES_IN_LEN 8 +/* Start address (byte) */ +#define MC_CMD_XPM_READ_BYTES_IN_ADDR_OFST 0 +/* Count (bytes) */ +#define MC_CMD_XPM_READ_BYTES_IN_COUNT_OFST 4 + +/* MC_CMD_XPM_READ_BYTES_OUT msgresponse */ +#define MC_CMD_XPM_READ_BYTES_OUT_LENMIN 0 +#define MC_CMD_XPM_READ_BYTES_OUT_LENMAX 252 +#define MC_CMD_XPM_READ_BYTES_OUT_LEN(num) (0+1*(num)) +/* Data */ +#define MC_CMD_XPM_READ_BYTES_OUT_DATA_OFST 0 +#define MC_CMD_XPM_READ_BYTES_OUT_DATA_LEN 1 +#define MC_CMD_XPM_READ_BYTES_OUT_DATA_MINNUM 0 +#define MC_CMD_XPM_READ_BYTES_OUT_DATA_MAXNUM 252 + + +/***********************************/ +/* MC_CMD_XPM_WRITE_BYTES + * Write XPM memory + */ +#define MC_CMD_XPM_WRITE_BYTES 0x104 +#undef MC_CMD_0x104_PRIVILEGE_CTG + +#define MC_CMD_0x104_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_XPM_WRITE_BYTES_IN msgrequest */ +#define MC_CMD_XPM_WRITE_BYTES_IN_LENMIN 8 +#define MC_CMD_XPM_WRITE_BYTES_IN_LENMAX 252 +#define MC_CMD_XPM_WRITE_BYTES_IN_LEN(num) (8+1*(num)) +/* Start address (byte) */ +#define MC_CMD_XPM_WRITE_BYTES_IN_ADDR_OFST 0 +/* Count (bytes) */ +#define MC_CMD_XPM_WRITE_BYTES_IN_COUNT_OFST 4 +/* Data */ +#define MC_CMD_XPM_WRITE_BYTES_IN_DATA_OFST 8 +#define MC_CMD_XPM_WRITE_BYTES_IN_DATA_LEN 1 +#define MC_CMD_XPM_WRITE_BYTES_IN_DATA_MINNUM 0 +#define MC_CMD_XPM_WRITE_BYTES_IN_DATA_MAXNUM 244 + +/* MC_CMD_XPM_WRITE_BYTES_OUT msgresponse */ +#define MC_CMD_XPM_WRITE_BYTES_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_XPM_READ_SECTOR + * Read XPM sector + */ +#define MC_CMD_XPM_READ_SECTOR 0x105 +#undef MC_CMD_0x105_PRIVILEGE_CTG + +#define MC_CMD_0x105_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_XPM_READ_SECTOR_IN msgrequest */ +#define MC_CMD_XPM_READ_SECTOR_IN_LEN 8 +/* Sector index */ +#define MC_CMD_XPM_READ_SECTOR_IN_INDEX_OFST 0 +/* Sector size */ +#define MC_CMD_XPM_READ_SECTOR_IN_SIZE_OFST 4 + +/* MC_CMD_XPM_READ_SECTOR_OUT msgresponse */ +#define MC_CMD_XPM_READ_SECTOR_OUT_LENMIN 4 +#define MC_CMD_XPM_READ_SECTOR_OUT_LENMAX 36 +#define MC_CMD_XPM_READ_SECTOR_OUT_LEN(num) (4+1*(num)) +/* Sector type */ +#define MC_CMD_XPM_READ_SECTOR_OUT_TYPE_OFST 0 +#define MC_CMD_XPM_READ_SECTOR_OUT_BLANK 0x0 /* enum */ +#define MC_CMD_XPM_READ_SECTOR_OUT_CRYPTO_KEY_128 0x1 /* enum */ +#define MC_CMD_XPM_READ_SECTOR_OUT_CRYPTO_KEY_256 0x2 /* enum */ +#define MC_CMD_XPM_READ_SECTOR_OUT_INVALID 0xff /* enum */ +/* Sector data */ +#define MC_CMD_XPM_READ_SECTOR_OUT_DATA_OFST 4 +#define MC_CMD_XPM_READ_SECTOR_OUT_DATA_LEN 1 +#define MC_CMD_XPM_READ_SECTOR_OUT_DATA_MINNUM 0 +#define MC_CMD_XPM_READ_SECTOR_OUT_DATA_MAXNUM 32 + + +/***********************************/ +/* MC_CMD_XPM_WRITE_SECTOR + * Write XPM sector + */ +#define MC_CMD_XPM_WRITE_SECTOR 0x106 +#undef MC_CMD_0x106_PRIVILEGE_CTG + +#define MC_CMD_0x106_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_XPM_WRITE_SECTOR_IN msgrequest */ +#define MC_CMD_XPM_WRITE_SECTOR_IN_LENMIN 12 +#define MC_CMD_XPM_WRITE_SECTOR_IN_LENMAX 44 +#define MC_CMD_XPM_WRITE_SECTOR_IN_LEN(num) (12+1*(num)) +/* If writing fails due to an uncorrectable error, try up to RETRIES following + * sectors (or until no more space available). If 0, only one write attempt is + * made. Note that uncorrectable errors are unlikely, thanks to XPM self-repair + * mechanism. + */ +#define MC_CMD_XPM_WRITE_SECTOR_IN_RETRIES_OFST 0 +#define MC_CMD_XPM_WRITE_SECTOR_IN_RETRIES_LEN 1 +#define MC_CMD_XPM_WRITE_SECTOR_IN_RESERVED_OFST 1 +#define MC_CMD_XPM_WRITE_SECTOR_IN_RESERVED_LEN 3 +/* Sector type */ +#define MC_CMD_XPM_WRITE_SECTOR_IN_TYPE_OFST 4 +/* Enum values, see field(s): */ +/* MC_CMD_XPM_READ_SECTOR_OUT/TYPE */ +/* Sector size */ +#define MC_CMD_XPM_WRITE_SECTOR_IN_SIZE_OFST 8 +/* Sector data */ +#define MC_CMD_XPM_WRITE_SECTOR_IN_DATA_OFST 12 +#define MC_CMD_XPM_WRITE_SECTOR_IN_DATA_LEN 1 +#define MC_CMD_XPM_WRITE_SECTOR_IN_DATA_MINNUM 0 +#define MC_CMD_XPM_WRITE_SECTOR_IN_DATA_MAXNUM 32 + +/* MC_CMD_XPM_WRITE_SECTOR_OUT msgresponse */ +#define MC_CMD_XPM_WRITE_SECTOR_OUT_LEN 4 +/* New sector index */ +#define MC_CMD_XPM_WRITE_SECTOR_OUT_INDEX_OFST 0 + + +/***********************************/ +/* MC_CMD_XPM_INVALIDATE_SECTOR + * Invalidate XPM sector + */ +#define MC_CMD_XPM_INVALIDATE_SECTOR 0x107 +#undef MC_CMD_0x107_PRIVILEGE_CTG + +#define MC_CMD_0x107_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_XPM_INVALIDATE_SECTOR_IN msgrequest */ +#define MC_CMD_XPM_INVALIDATE_SECTOR_IN_LEN 4 +/* Sector index */ +#define MC_CMD_XPM_INVALIDATE_SECTOR_IN_INDEX_OFST 0 + +/* MC_CMD_XPM_INVALIDATE_SECTOR_OUT msgresponse */ +#define MC_CMD_XPM_INVALIDATE_SECTOR_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_XPM_BLANK_CHECK + * Blank-check XPM memory and report bad locations + */ +#define MC_CMD_XPM_BLANK_CHECK 0x108 +#undef MC_CMD_0x108_PRIVILEGE_CTG + +#define MC_CMD_0x108_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_XPM_BLANK_CHECK_IN msgrequest */ +#define MC_CMD_XPM_BLANK_CHECK_IN_LEN 8 +/* Start address (byte) */ +#define MC_CMD_XPM_BLANK_CHECK_IN_ADDR_OFST 0 +/* Count (bytes) */ +#define MC_CMD_XPM_BLANK_CHECK_IN_COUNT_OFST 4 + +/* MC_CMD_XPM_BLANK_CHECK_OUT msgresponse */ +#define MC_CMD_XPM_BLANK_CHECK_OUT_LENMIN 4 +#define MC_CMD_XPM_BLANK_CHECK_OUT_LENMAX 252 +#define MC_CMD_XPM_BLANK_CHECK_OUT_LEN(num) (4+2*(num)) +/* Total number of bad (non-blank) locations */ +#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_COUNT_OFST 0 +/* Addresses of bad locations (may be less than BAD_COUNT, if all cannot fit + * into MCDI response) + */ +#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_OFST 4 +#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_LEN 2 +#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_MINNUM 0 +#define MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_MAXNUM 124 + + +/***********************************/ +/* MC_CMD_XPM_REPAIR + * Blank-check and repair XPM memory + */ +#define MC_CMD_XPM_REPAIR 0x109 +#undef MC_CMD_0x109_PRIVILEGE_CTG + +#define MC_CMD_0x109_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_XPM_REPAIR_IN msgrequest */ +#define MC_CMD_XPM_REPAIR_IN_LEN 8 +/* Start address (byte) */ +#define MC_CMD_XPM_REPAIR_IN_ADDR_OFST 0 +/* Count (bytes) */ +#define MC_CMD_XPM_REPAIR_IN_COUNT_OFST 4 + +/* MC_CMD_XPM_REPAIR_OUT msgresponse */ +#define MC_CMD_XPM_REPAIR_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_XPM_DECODER_TEST + * Test XPM memory address decoders for gross manufacturing defects. Can only + * be performed on an unprogrammed part. + */ +#define MC_CMD_XPM_DECODER_TEST 0x10a +#undef MC_CMD_0x10a_PRIVILEGE_CTG + +#define MC_CMD_0x10a_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_XPM_DECODER_TEST_IN msgrequest */ +#define MC_CMD_XPM_DECODER_TEST_IN_LEN 0 + +/* MC_CMD_XPM_DECODER_TEST_OUT msgresponse */ +#define MC_CMD_XPM_DECODER_TEST_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_XPM_WRITE_TEST + * XPM memory write test. Test XPM write logic for gross manufacturing defects + * by writing to a dedicated test row. There are 16 locations in the test row + * and the test can only be performed on locations that have not been + * previously used (i.e. can be run at most 16 times). The test will pick the + * first available location to use, or fail with ENOSPC if none left. + */ +#define MC_CMD_XPM_WRITE_TEST 0x10b +#undef MC_CMD_0x10b_PRIVILEGE_CTG + +#define MC_CMD_0x10b_PRIVILEGE_CTG SRIOV_CTG_ADMIN + +/* MC_CMD_XPM_WRITE_TEST_IN msgrequest */ +#define MC_CMD_XPM_WRITE_TEST_IN_LEN 0 + +/* MC_CMD_XPM_WRITE_TEST_OUT msgresponse */ +#define MC_CMD_XPM_WRITE_TEST_OUT_LEN 0 + #endif /* _SIENA_MC_DRIVER_PCOL_H */ diff --git a/sys/dev/sfxge/common/efx_regs_pci.h b/sys/dev/sfxge/common/efx_regs_pci.h index 3a3a8273e22c..a5fd45b6739c 100644 --- a/sys/dev/sfxge/common/efx_regs_pci.h +++ b/sys/dev/sfxge/common/efx_regs_pci.h @@ -1,26 +1,31 @@ /*- - * Copyright 2007-2010 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2007-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. * * $FreeBSD$ */ @@ -366,6 +371,10 @@ extern "C" { #define PCRF_AZ_INT_PIN_LBN 0 #define PCRF_AZ_INT_PIN_WIDTH 8 +#define PCFE_DZ_INTPIN_INTD 4 +#define PCFE_DZ_INTPIN_INTC 3 +#define PCFE_DZ_INTPIN_INTB 2 +#define PCFE_DZ_INTPIN_INTA 1 /* @@ -373,11 +382,8 @@ extern "C" { * Power management capability ID */ -#define PCR_AC_PM_CAP_ID_REG 0x00000040 -/* falcona0,falconb0,sienaa0=pci_f0_config */ - -#define PCR_DZ_PM_CAP_ID_REG 0x00000080 -/* hunta0=pci_f0_config */ +#define PCR_AZ_PM_CAP_ID_REG 0x00000040 +/* falcona0,falconb0,sienaa0,hunta0=pci_f0_config */ #define PCRF_AZ_PM_CAP_ID_LBN 0 #define PCRF_AZ_PM_CAP_ID_WIDTH 8 @@ -388,11 +394,8 @@ extern "C" { * Power management next item pointer */ -#define PCR_AC_PM_NXT_PTR_REG 0x00000041 -/* falcona0,falconb0,sienaa0=pci_f0_config */ - -#define PCR_DZ_PM_NXT_PTR_REG 0x00000081 -/* hunta0=pci_f0_config */ +#define PCR_AZ_PM_NXT_PTR_REG 0x00000041 +/* falcona0,falconb0,sienaa0,hunta0=pci_f0_config */ #define PCRF_AZ_PM_NXT_PTR_LBN 0 #define PCRF_AZ_PM_NXT_PTR_WIDTH 8 @@ -403,11 +406,8 @@ extern "C" { * Power management capabilities register */ -#define PCR_AC_PM_CAP_REG 0x00000042 -/* falcona0,falconb0,sienaa0=pci_f0_config */ - -#define PCR_DZ_PM_CAP_REG 0x00000082 -/* hunta0=pci_f0_config */ +#define PCR_AZ_PM_CAP_REG 0x00000042 +/* falcona0,falconb0,sienaa0,hunta0=pci_f0_config */ #define PCRF_AZ_PM_PME_SUPT_LBN 11 #define PCRF_AZ_PM_PME_SUPT_WIDTH 5 @@ -430,11 +430,8 @@ extern "C" { * Power management control & status register */ -#define PCR_AC_PM_CS_REG 0x00000044 -/* falcona0,falconb0,sienaa0=pci_f0_config */ - -#define PCR_DZ_PM_CS_REG 0x00000084 -/* hunta0=pci_f0_config */ +#define PCR_AZ_PM_CS_REG 0x00000044 +/* falcona0,falconb0,sienaa0,hunta0=pci_f0_config */ #define PCRF_AZ_PM_PME_STAT_LBN 15 #define PCRF_AZ_PM_PME_STAT_WIDTH 1 @@ -455,11 +452,8 @@ extern "C" { * MSI capability ID */ -#define PCR_AC_MSI_CAP_ID_REG 0x00000050 -/* falcona0,falconb0,sienaa0=pci_f0_config */ - -#define PCR_DZ_MSI_CAP_ID_REG 0x00000090 -/* hunta0=pci_f0_config */ +#define PCR_AZ_MSI_CAP_ID_REG 0x00000050 +/* falcona0,falconb0,sienaa0,hunta0=pci_f0_config */ #define PCRF_AZ_MSI_CAP_ID_LBN 0 #define PCRF_AZ_MSI_CAP_ID_WIDTH 8 @@ -470,11 +464,8 @@ extern "C" { * MSI next item pointer */ -#define PCR_AC_MSI_NXT_PTR_REG 0x00000051 -/* falcona0,falconb0,sienaa0=pci_f0_config */ - -#define PCR_DZ_MSI_NXT_PTR_REG 0x00000091 -/* hunta0=pci_f0_config */ +#define PCR_AZ_MSI_NXT_PTR_REG 0x00000051 +/* falcona0,falconb0,sienaa0,hunta0=pci_f0_config */ #define PCRF_AZ_MSI_NXT_PTR_LBN 0 #define PCRF_AZ_MSI_NXT_PTR_WIDTH 8 @@ -485,11 +476,8 @@ extern "C" { * MSI control register */ -#define PCR_AC_MSI_CTL_REG 0x00000052 -/* falcona0,falconb0,sienaa0=pci_f0_config */ - -#define PCR_DZ_MSI_CTL_REG 0x00000092 -/* hunta0=pci_f0_config */ +#define PCR_AZ_MSI_CTL_REG 0x00000052 +/* falcona0,falconb0,sienaa0,hunta0=pci_f0_config */ #define PCRF_AZ_MSI_64_EN_LBN 7 #define PCRF_AZ_MSI_64_EN_WIDTH 1 @@ -506,65 +494,20 @@ extern "C" { * MSI low 32 bits address register */ -#define PCR_AC_MSI_ADR_LO_REG 0x00000054 -/* falcona0,falconb0,sienaa0=pci_f0_config */ - -#define PCR_DZ_MSI_ADR_LO_REG 0x00000094 -/* hunta0=pci_f0_config */ +#define PCR_AZ_MSI_ADR_LO_REG 0x00000054 +/* falcona0,falconb0,sienaa0,hunta0=pci_f0_config */ #define PCRF_AZ_MSI_ADR_LO_LBN 2 #define PCRF_AZ_MSI_ADR_LO_WIDTH 30 -/* - * PC_VPD_CAP_CTL_REG(8bit): - * VPD control and capabilities register - */ - -#define PCR_DZ_VPD_CAP_CTL_REG 0x00000054 -/* hunta0=pci_f0_config */ - -#define PCR_CC_VPD_CAP_CTL_REG 0x000000d0 -/* sienaa0=pci_f0_config */ - -#define PCRF_CZ_VPD_FLAG_LBN 31 -#define PCRF_CZ_VPD_FLAG_WIDTH 1 -#define PCRF_CZ_VPD_ADDR_LBN 16 -#define PCRF_CZ_VPD_ADDR_WIDTH 15 -#define PCRF_CZ_VPD_NXT_PTR_LBN 8 -#define PCRF_CZ_VPD_NXT_PTR_WIDTH 8 -#define PCRF_CZ_VPD_CAP_ID_LBN 0 -#define PCRF_CZ_VPD_CAP_ID_WIDTH 8 - - -/* - * PC_VPD_CAP_DATA_REG(32bit): - * documentation to be written for sum_PC_VPD_CAP_DATA_REG - */ - -#define PCR_DZ_VPD_CAP_DATA_REG 0x00000058 -/* hunta0=pci_f0_config */ - -#define PCR_AB_VPD_CAP_DATA_REG 0x000000b4 -/* falcona0,falconb0=pci_f0_config */ - -#define PCR_CC_VPD_CAP_DATA_REG 0x000000d4 -/* sienaa0=pci_f0_config */ - -#define PCRF_AZ_VPD_DATA_LBN 0 -#define PCRF_AZ_VPD_DATA_WIDTH 32 - - /* * PC_MSI_ADR_HI_REG(32bit): * MSI high 32 bits address register */ -#define PCR_AC_MSI_ADR_HI_REG 0x00000058 -/* falcona0,falconb0,sienaa0=pci_f0_config */ - -#define PCR_DZ_MSI_ADR_HI_REG 0x00000098 -/* hunta0=pci_f0_config */ +#define PCR_AZ_MSI_ADR_HI_REG 0x00000058 +/* falcona0,falconb0,sienaa0,hunta0=pci_f0_config */ #define PCRF_AZ_MSI_ADR_HI_LBN 0 #define PCRF_AZ_MSI_ADR_HI_WIDTH 32 @@ -575,11 +518,8 @@ extern "C" { * MSI data register */ -#define PCR_AC_MSI_DAT_REG 0x0000005c -/* falcona0,falconb0,sienaa0=pci_f0_config */ - -#define PCR_DZ_MSI_DAT_REG 0x0000009c -/* hunta0=pci_f0_config */ +#define PCR_AZ_MSI_DAT_REG 0x0000005c +/* falcona0,falconb0,sienaa0,hunta0=pci_f0_config */ #define PCRF_AZ_MSI_DAT_LBN 0 #define PCRF_AZ_MSI_DAT_WIDTH 16 @@ -593,11 +533,8 @@ extern "C" { #define PCR_AB_PCIE_CAP_LIST_REG 0x00000060 /* falcona0,falconb0=pci_f0_config */ -#define PCR_CC_PCIE_CAP_LIST_REG 0x00000070 -/* sienaa0=pci_f0_config */ - -#define PCR_DZ_PCIE_CAP_LIST_REG 0x000000c0 -/* hunta0=pci_f0_config */ +#define PCR_CZ_PCIE_CAP_LIST_REG 0x00000070 +/* sienaa0,hunta0=pci_f0_config */ #define PCRF_AZ_PCIE_NXT_PTR_LBN 8 #define PCRF_AZ_PCIE_NXT_PTR_WIDTH 8 @@ -613,11 +550,8 @@ extern "C" { #define PCR_AB_PCIE_CAP_REG 0x00000062 /* falcona0,falconb0=pci_f0_config */ -#define PCR_CC_PCIE_CAP_REG 0x00000072 -/* sienaa0=pci_f0_config */ - -#define PCR_DZ_PCIE_CAP_REG 0x000000c2 -/* hunta0=pci_f0_config */ +#define PCR_CZ_PCIE_CAP_REG 0x00000072 +/* sienaa0,hunta0=pci_f0_config */ #define PCRF_AZ_PCIE_INT_MSG_NUM_LBN 9 #define PCRF_AZ_PCIE_INT_MSG_NUM_WIDTH 5 @@ -637,11 +571,8 @@ extern "C" { #define PCR_AB_DEV_CAP_REG 0x00000064 /* falcona0,falconb0=pci_f0_config */ -#define PCR_CC_DEV_CAP_REG 0x00000074 -/* sienaa0=pci_f0_config */ - -#define PCR_DZ_DEV_CAP_REG 0x000000c4 -/* hunta0=pci_f0_config */ +#define PCR_CZ_DEV_CAP_REG 0x00000074 +/* sienaa0=pci_f0_config,hunta0=pci_f0_config */ #define PCRF_CZ_CAP_FN_LEVEL_RESET_LBN 28 #define PCRF_CZ_CAP_FN_LEVEL_RESET_WIDTH 1 @@ -677,11 +608,8 @@ extern "C" { #define PCR_AB_DEV_CTL_REG 0x00000068 /* falcona0,falconb0=pci_f0_config */ -#define PCR_CC_DEV_CTL_REG 0x00000078 -/* sienaa0=pci_f0_config */ - -#define PCR_DZ_DEV_CTL_REG 0x000000c8 -/* hunta0=pci_f0_config */ +#define PCR_CZ_DEV_CTL_REG 0x00000078 +/* sienaa0,hunta0=pci_f0_config */ #define PCRF_CZ_FN_LEVEL_RESET_LBN 15 #define PCRF_CZ_FN_LEVEL_RESET_WIDTH 1 @@ -693,7 +621,6 @@ extern "C" { #define PCFE_AZ_MAX_RD_REQ_SIZE_512 2 #define PCFE_AZ_MAX_RD_REQ_SIZE_256 1 #define PCFE_AZ_MAX_RD_REQ_SIZE_128 0 -#define PCFE_DZ_OTHER other #define PCRF_AZ_EN_NO_SNOOP_LBN 11 #define PCRF_AZ_EN_NO_SNOOP_WIDTH 1 #define PCRF_AZ_AUX_PWR_PM_EN_LBN 10 @@ -712,7 +639,6 @@ extern "C" { #define PCFE_AZ_MAX_PAYL_SIZE_512 2 #define PCFE_AZ_MAX_PAYL_SIZE_256 1 #define PCFE_AZ_MAX_PAYL_SIZE_128 0 -#define PCFE_DZ_OTHER other #define PCRF_AZ_EN_RELAX_ORDER_LBN 4 #define PCRF_AZ_EN_RELAX_ORDER_WIDTH 1 #define PCRF_AZ_UNSUP_REQ_RPT_EN_LBN 3 @@ -733,11 +659,8 @@ extern "C" { #define PCR_AB_DEV_STAT_REG 0x0000006a /* falcona0,falconb0=pci_f0_config */ -#define PCR_CC_DEV_STAT_REG 0x0000007a -/* sienaa0=pci_f0_config */ - -#define PCR_DZ_DEV_STAT_REG 0x000000ca -/* hunta0=pci_f0_config */ +#define PCR_CZ_DEV_STAT_REG 0x0000007a +/* sienaa0,hunta0=pci_f0_config */ #define PCRF_AZ_TRNS_PEND_LBN 5 #define PCRF_AZ_TRNS_PEND_WIDTH 1 @@ -761,14 +684,13 @@ extern "C" { #define PCR_AB_LNK_CAP_REG 0x0000006c /* falcona0,falconb0=pci_f0_config */ -#define PCR_CC_LNK_CAP_REG 0x0000007c -/* sienaa0=pci_f0_config */ - -#define PCR_DZ_LNK_CAP_REG 0x000000cc -/* hunta0=pci_f0_config */ +#define PCR_CZ_LNK_CAP_REG 0x0000007c +/* sienaa0,hunta0=pci_f0_config */ #define PCRF_AZ_PORT_NUM_LBN 24 #define PCRF_AZ_PORT_NUM_WIDTH 8 +#define PCRF_DZ_ASPM_OPTIONALITY_CAP_LBN 22 +#define PCRF_DZ_ASPM_OPTIONALITY_CAP_WIDTH 1 #define PCRF_CZ_LINK_BWDITH_NOTIF_CAP_LBN 21 #define PCRF_CZ_LINK_BWDITH_NOTIF_CAP_WIDTH 1 #define PCRF_CZ_DATA_LINK_ACTIVE_RPT_CAP_LBN 20 @@ -797,11 +719,8 @@ extern "C" { #define PCR_AB_LNK_CTL_REG 0x00000070 /* falcona0,falconb0=pci_f0_config */ -#define PCR_CC_LNK_CTL_REG 0x00000080 -/* sienaa0=pci_f0_config */ - -#define PCR_DZ_LNK_CTL_REG 0x000000d0 -/* hunta0=pci_f0_config */ +#define PCR_CZ_LNK_CTL_REG 0x00000080 +/* sienaa0,hunta0=pci_f0_config */ #define PCRF_AZ_EXT_SYNC_LBN 7 #define PCRF_AZ_EXT_SYNC_WIDTH 1 @@ -827,11 +746,8 @@ extern "C" { #define PCR_AB_LNK_STAT_REG 0x00000072 /* falcona0,falconb0=pci_f0_config */ -#define PCR_CC_LNK_STAT_REG 0x00000082 -/* sienaa0=pci_f0_config */ - -#define PCR_DZ_LNK_STAT_REG 0x000000d2 -/* hunta0=pci_f0_config */ +#define PCR_CZ_LNK_STAT_REG 0x00000082 +/* sienaa0,hunta0=pci_f0_config */ #define PCRF_AZ_SLOT_CLK_CFG_LBN 12 #define PCRF_AZ_SLOT_CLK_CFG_WIDTH 1 @@ -976,32 +892,6 @@ extern "C" { #define PCRF_BZ_MSIX_TBL_SIZE_WIDTH 11 -/* - * PC_DEV_CAP2_REG(16bit): - * PCIe Device Capabilities 2 - */ - -#define PCR_CC_DEV_CAP2_REG 0x00000094 -/* sienaa0=pci_f0_config */ - -#define PCR_DZ_DEV_CAP2_REG 0x000000e4 -/* hunta0=pci_f0_config */ - -#define PCRF_CZ_CMPL_TIMEOUT_DIS_LBN 4 -#define PCRF_CZ_CMPL_TIMEOUT_DIS_WIDTH 1 -#define PCRF_CZ_CMPL_TIMEOUT_LBN 0 -#define PCRF_CZ_CMPL_TIMEOUT_WIDTH 4 -#define PCFE_CZ_CMPL_TIMEOUT_17000_TO_6400MS 14 -#define PCFE_CZ_CMPL_TIMEOUT_4000_TO_1300MS 13 -#define PCFE_CZ_CMPL_TIMEOUT_1000_TO_3500MS 10 -#define PCFE_CZ_CMPL_TIMEOUT_260_TO_900MS 9 -#define PCFE_CZ_CMPL_TIMEOUT_65_TO_210MS 6 -#define PCFE_CZ_CMPL_TIMEOUT_16_TO_55MS 5 -#define PCFE_CZ_CMPL_TIMEOUT_1_TO_10MS 2 -#define PCFE_CZ_CMPL_TIMEOUT_50_TO_100US 1 -#define PCFE_CZ_CMPL_TIMEOUT_DEFAULT 0 - - /* * PC_MSIX_TBL_BASE_REG(32bit): * MSIX Capability Vector Table Base @@ -1019,17 +909,53 @@ extern "C" { #define PCRF_BZ_MSIX_TBL_BIR_WIDTH 3 +/* + * PC_DEV_CAP2_REG(32bit): + * PCIe Device Capabilities 2 + */ + +#define PCR_CZ_DEV_CAP2_REG 0x00000094 +/* sienaa0=pci_f0_config,hunta0=pci_f0_config */ + +#define PCRF_DZ_OBFF_SUPPORTED_LBN 18 +#define PCRF_DZ_OBFF_SUPPORTED_WIDTH 2 +#define PCRF_DZ_TPH_CMPL_SUPPORTED_LBN 12 +#define PCRF_DZ_TPH_CMPL_SUPPORTED_WIDTH 2 +#define PCRF_DZ_LTR_M_SUPPORTED_LBN 11 +#define PCRF_DZ_LTR_M_SUPPORTED_WIDTH 1 +#define PCRF_CC_CMPL_TIMEOUT_DIS_LBN 4 +#define PCRF_CC_CMPL_TIMEOUT_DIS_WIDTH 1 +#define PCRF_DZ_CMPL_TIMEOUT_DIS_SUPPORTED_LBN 4 +#define PCRF_DZ_CMPL_TIMEOUT_DIS_SUPPORTED_WIDTH 1 +#define PCRF_CZ_CMPL_TIMEOUT_LBN 0 +#define PCRF_CZ_CMPL_TIMEOUT_WIDTH 4 +#define PCFE_CZ_CMPL_TIMEOUT_17000_TO_6400MS 14 +#define PCFE_CZ_CMPL_TIMEOUT_4000_TO_1300MS 13 +#define PCFE_CZ_CMPL_TIMEOUT_1000_TO_3500MS 10 +#define PCFE_CZ_CMPL_TIMEOUT_260_TO_900MS 9 +#define PCFE_CZ_CMPL_TIMEOUT_65_TO_210MS 6 +#define PCFE_CZ_CMPL_TIMEOUT_16_TO_55MS 5 +#define PCFE_CZ_CMPL_TIMEOUT_1_TO_10MS 2 +#define PCFE_CZ_CMPL_TIMEOUT_50_TO_100US 1 +#define PCFE_CZ_CMPL_TIMEOUT_DEFAULT 0 + + /* * PC_DEV_CTL2_REG(16bit): * PCIe Device Control 2 */ -#define PCR_CC_DEV_CTL2_REG 0x00000098 -/* sienaa0=pci_f0_config */ - -#define PCR_DZ_DEV_CTL2_REG 0x000000e8 -/* hunta0=pci_f0_config */ +#define PCR_CZ_DEV_CTL2_REG 0x00000098 +/* sienaa0,hunta0=pci_f0_config */ +#define PCRF_DZ_OBFF_ENABLE_LBN 13 +#define PCRF_DZ_OBFF_ENABLE_WIDTH 2 +#define PCRF_DZ_LTR_ENABLE_LBN 10 +#define PCRF_DZ_LTR_ENABLE_WIDTH 1 +#define PCRF_DZ_IDO_COMPLETION_ENABLE_LBN 9 +#define PCRF_DZ_IDO_COMPLETION_ENABLE_WIDTH 1 +#define PCRF_DZ_IDO_REQUEST_ENABLE_LBN 8 +#define PCRF_DZ_IDO_REQUEST_ENABLE_WIDTH 1 #define PCRF_CZ_CMPL_TIMEOUT_DIS_CTL_LBN 4 #define PCRF_CZ_CMPL_TIMEOUT_DIS_CTL_WIDTH 1 #define PCRF_CZ_CMPL_TIMEOUT_CTL_LBN 0 @@ -1053,16 +979,25 @@ extern "C" { #define PCRF_BZ_MSIX_PBA_BIR_WIDTH 3 +/* + * PC_LNK_CAP2_REG(32bit): + * PCIe Link Capability 2 + */ + +#define PCR_DZ_LNK_CAP2_REG 0x0000009c +/* hunta0=pci_f0_config */ + +#define PCRF_DZ_LNK_SPEED_SUP_LBN 1 +#define PCRF_DZ_LNK_SPEED_SUP_WIDTH 7 + + /* * PC_LNK_CTL2_REG(16bit): * PCIe Link Control 2 */ -#define PCR_CC_LNK_CTL2_REG 0x000000a0 -/* sienaa0=pci_f0_config */ - -#define PCR_DZ_LNK_CTL2_REG 0x000000f0 -/* hunta0=pci_f0_config */ +#define PCR_CZ_LNK_CTL2_REG 0x000000a0 +/* sienaa0,hunta0=pci_f0_config */ #define PCRF_CZ_POLLING_DEEMPH_LVL_LBN 12 #define PCRF_CZ_POLLING_DEEMPH_LVL_WIDTH 1 @@ -1080,6 +1015,9 @@ extern "C" { #define PCRF_CZ_ENTER_COMPLIANCE_CTL_WIDTH 1 #define PCRF_CZ_TGT_LNK_SPEED_CTL_LBN 0 #define PCRF_CZ_TGT_LNK_SPEED_CTL_WIDTH 4 +#define PCFE_DZ_LCTL2_TGT_SPEED_GEN3 3 +#define PCFE_DZ_LCTL2_TGT_SPEED_GEN2 2 +#define PCFE_DZ_LCTL2_TGT_SPEED_GEN1 1 /* @@ -1087,11 +1025,8 @@ extern "C" { * PCIe Link Status 2 */ -#define PCR_CC_LNK_STAT2_REG 0x000000a2 -/* sienaa0=pci_f0_config */ - -#define PCR_DZ_LNK_STAT2_REG 0x000000f2 -/* hunta0=pci_f0_config */ +#define PCR_CZ_LNK_STAT2_REG 0x000000a2 +/* sienaa0,hunta0=pci_f0_config */ #define PCRF_CZ_CURRENT_DEEMPH_LBN 0 #define PCRF_CZ_CURRENT_DEEMPH_WIDTH 1 @@ -1135,6 +1070,39 @@ extern "C" { #define PCRF_AB_VPD_ADDR_WIDTH 15 +/* + * PC_VPD_CAP_DATA_REG(32bit): + * documentation to be written for sum_PC_VPD_CAP_DATA_REG + */ + +#define PCR_AB_VPD_CAP_DATA_REG 0x000000b4 +/* falcona0,falconb0=pci_f0_config */ + +#define PCR_CZ_VPD_CAP_DATA_REG 0x000000d4 +/* sienaa0,hunta0=pci_f0_config */ + +#define PCRF_AZ_VPD_DATA_LBN 0 +#define PCRF_AZ_VPD_DATA_WIDTH 32 + + +/* + * PC_VPD_CAP_CTL_REG(8bit): + * VPD control and capabilities register + */ + +#define PCR_CZ_VPD_CAP_CTL_REG 0x000000d0 +/* sienaa0,hunta0=pci_f0_config */ + +#define PCRF_CZ_VPD_FLAG_LBN 31 +#define PCRF_CZ_VPD_FLAG_WIDTH 1 +#define PCRF_CZ_VPD_ADDR_LBN 16 +#define PCRF_CZ_VPD_ADDR_WIDTH 15 +#define PCRF_CZ_VPD_NXT_PTR_LBN 8 +#define PCRF_CZ_VPD_NXT_PTR_WIDTH 8 +#define PCRF_CZ_VPD_CAP_ID_LBN 0 +#define PCRF_CZ_VPD_CAP_ID_WIDTH 8 + + /* * PC_AER_CAP_HDR_REG(32bit): * AER capability header register @@ -1191,6 +1159,10 @@ extern "C" { #define PCR_AZ_AER_UNCORR_ERR_MASK_REG 0x00000108 /* falcona0,falconb0,sienaa0,hunta0=pci_f0_config */ +#define PCRF_DZ_ATOMIC_OP_EGR_BLOCKED_MASK_LBN 24 +#define PCRF_DZ_ATOMIC_OP_EGR_BLOCKED_MASK_WIDTH 1 +#define PCRF_DZ_UNCORR_INT_ERR_MASK_LBN 22 +#define PCRF_DZ_UNCORR_INT_ERR_MASK_WIDTH 1 #define PCRF_AZ_UNSUPT_REQ_ERR_MASK_LBN 20 #define PCRF_AZ_UNSUPT_REQ_ERR_MASK_WIDTH 1 #define PCRF_AZ_ECRC_ERR_MASK_LBN 19 @@ -1328,11 +1300,8 @@ extern "C" { * Device serial number capability header register */ -#define PCR_DZ_DEVSN_CAP_HDR_REG 0x00000130 -/* hunta0=pci_f0_config */ - -#define PCR_CC_DEVSN_CAP_HDR_REG 0x00000140 -/* sienaa0=pci_f0_config */ +#define PCR_CZ_DEVSN_CAP_HDR_REG 0x00000140 +/* sienaa0,hunta0=pci_f0_config */ #define PCRF_CZ_DEVSNCAPHDR_NXT_PTR_LBN 20 #define PCRF_CZ_DEVSNCAPHDR_NXT_PTR_WIDTH 12 @@ -1347,11 +1316,8 @@ extern "C" { * Device serial number DWORD0 */ -#define PCR_DZ_DEVSN_DWORD0_REG 0x00000134 -/* hunta0=pci_f0_config */ - -#define PCR_CC_DEVSN_DWORD0_REG 0x00000144 -/* sienaa0=pci_f0_config */ +#define PCR_CZ_DEVSN_DWORD0_REG 0x00000144 +/* sienaa0,hunta0=pci_f0_config */ #define PCRF_CZ_DEVSN_DWORD0_LBN 0 #define PCRF_CZ_DEVSN_DWORD0_WIDTH 32 @@ -1362,11 +1328,8 @@ extern "C" { * Device serial number DWORD0 */ -#define PCR_DZ_DEVSN_DWORD1_REG 0x00000138 -/* hunta0=pci_f0_config */ - -#define PCR_CC_DEVSN_DWORD1_REG 0x00000148 -/* sienaa0=pci_f0_config */ +#define PCR_CZ_DEVSN_DWORD1_REG 0x00000148 +/* sienaa0,hunta0=pci_f0_config */ #define PCRF_CZ_DEVSN_DWORD1_LBN 0 #define PCRF_CZ_DEVSN_DWORD1_WIDTH 32 @@ -1377,11 +1340,8 @@ extern "C" { * ARI capability header register */ -#define PCR_DZ_ARI_CAP_HDR_REG 0x00000140 -/* hunta0=pci_f0_config */ - -#define PCR_CC_ARI_CAP_HDR_REG 0x00000150 -/* sienaa0=pci_f0_config */ +#define PCR_CZ_ARI_CAP_HDR_REG 0x00000150 +/* sienaa0,hunta0=pci_f0_config */ #define PCRF_CZ_ARICAPHDR_NXT_PTR_LBN 20 #define PCRF_CZ_ARICAPHDR_NXT_PTR_WIDTH 12 @@ -1396,11 +1356,8 @@ extern "C" { * ARI Capabilities */ -#define PCR_DZ_ARI_CAP_REG 0x00000144 -/* hunta0=pci_f0_config */ - -#define PCR_CC_ARI_CAP_REG 0x00000154 -/* sienaa0=pci_f0_config */ +#define PCR_CZ_ARI_CAP_REG 0x00000154 +/* sienaa0,hunta0=pci_f0_config */ #define PCRF_CZ_ARI_NXT_FN_NUM_LBN 8 #define PCRF_CZ_ARI_NXT_FN_NUM_WIDTH 8 @@ -1415,11 +1372,8 @@ extern "C" { * ARI Control */ -#define PCR_DZ_ARI_CTL_REG 0x00000146 -/* hunta0=pci_f0_config */ - -#define PCR_CC_ARI_CTL_REG 0x00000156 -/* sienaa0=pci_f0_config */ +#define PCR_CZ_ARI_CTL_REG 0x00000156 +/* sienaa0,hunta0=pci_f0_config */ #define PCRF_CZ_ARI_FN_GRP_LBN 4 #define PCRF_CZ_ARI_FN_GRP_WIDTH 3 @@ -1429,6 +1383,22 @@ extern "C" { #define PCRF_CZ_ARI_MFVC_FNGRP_EN_WIDTH 1 +/* + * PC_SEC_PCIE_CAP_REG(32bit): + * Secondary PCIE Capability Register + */ + +#define PCR_DZ_SEC_PCIE_CAP_REG 0x00000160 +/* hunta0=pci_f0_config */ + +#define PCRF_DZ_SEC_NXT_PTR_LBN 20 +#define PCRF_DZ_SEC_NXT_PTR_WIDTH 12 +#define PCRF_DZ_SEC_VERSION_LBN 16 +#define PCRF_DZ_SEC_VERSION_WIDTH 4 +#define PCRF_DZ_SEC_EXT_CAP_ID_LBN 0 +#define PCRF_DZ_SEC_EXT_CAP_ID_WIDTH 16 + + /* * PC_SRIOV_CAP_HDR_REG(32bit): * SRIOV capability header register @@ -1437,7 +1407,7 @@ extern "C" { #define PCR_CC_SRIOV_CAP_HDR_REG 0x00000160 /* sienaa0=pci_f0_config */ -#define PCR_DZ_SRIOV_CAP_HDR_REG 0x00000200 +#define PCR_DZ_SRIOV_CAP_HDR_REG 0x00000180 /* hunta0=pci_f0_config */ #define PCRF_CZ_SRIOVCAPHDR_NXT_PTR_LBN 20 @@ -1456,15 +1426,43 @@ extern "C" { #define PCR_CC_SRIOV_CAP_REG 0x00000164 /* sienaa0=pci_f0_config */ -#define PCR_DZ_SRIOV_CAP_REG 0x00000204 +#define PCR_DZ_SRIOV_CAP_REG 0x00000184 /* hunta0=pci_f0_config */ #define PCRF_CZ_VF_MIGR_INT_MSG_NUM_LBN 21 #define PCRF_CZ_VF_MIGR_INT_MSG_NUM_WIDTH 11 +#define PCRF_DZ_VF_ARI_CAP_PRESV_LBN 1 +#define PCRF_DZ_VF_ARI_CAP_PRESV_WIDTH 1 #define PCRF_CZ_VF_MIGR_CAP_LBN 0 #define PCRF_CZ_VF_MIGR_CAP_WIDTH 1 +/* + * PC_LINK_CONTROL3_REG(32bit): + * Link Control 3. + */ + +#define PCR_DZ_LINK_CONTROL3_REG 0x00000164 +/* hunta0=pci_f0_config */ + +#define PCRF_DZ_LINK_EQ_INT_EN_LBN 1 +#define PCRF_DZ_LINK_EQ_INT_EN_WIDTH 1 +#define PCRF_DZ_PERFORM_EQL_LBN 0 +#define PCRF_DZ_PERFORM_EQL_WIDTH 1 + + +/* + * PC_LANE_ERROR_STAT_REG(32bit): + * Lane Error Status Register. + */ + +#define PCR_DZ_LANE_ERROR_STAT_REG 0x00000168 +/* hunta0=pci_f0_config */ + +#define PCRF_DZ_LANE_STATUS_LBN 0 +#define PCRF_DZ_LANE_STATUS_WIDTH 8 + + /* * PC_SRIOV_CTL_REG(16bit): * SRIOV Control @@ -1473,7 +1471,7 @@ extern "C" { #define PCR_CC_SRIOV_CTL_REG 0x00000168 /* sienaa0=pci_f0_config */ -#define PCR_DZ_SRIOV_CTL_REG 0x00000208 +#define PCR_DZ_SRIOV_CTL_REG 0x00000188 /* hunta0=pci_f0_config */ #define PCRF_CZ_VF_ARI_CAP_HRCHY_LBN 4 @@ -1496,13 +1494,27 @@ extern "C" { #define PCR_CC_SRIOV_STAT_REG 0x0000016a /* sienaa0=pci_f0_config */ -#define PCR_DZ_SRIOV_STAT_REG 0x0000020a +#define PCR_DZ_SRIOV_STAT_REG 0x0000018a /* hunta0=pci_f0_config */ #define PCRF_CZ_VF_MIGR_STAT_LBN 0 #define PCRF_CZ_VF_MIGR_STAT_WIDTH 1 +/* + * PC_LANE01_EQU_CONTROL_REG(32bit): + * Lanes 0,1 Equalization Control Register. + */ + +#define PCR_DZ_LANE01_EQU_CONTROL_REG 0x0000016c +/* hunta0=pci_f0_config */ + +#define PCRF_DZ_LANE1_EQ_CTRL_LBN 16 +#define PCRF_DZ_LANE1_EQ_CTRL_WIDTH 16 +#define PCRF_DZ_LANE0_EQ_CTRL_LBN 0 +#define PCRF_DZ_LANE0_EQ_CTRL_WIDTH 16 + + /* * PC_SRIOV_INITIALVFS_REG(16bit): * SRIOV Initial VFs @@ -1511,7 +1523,7 @@ extern "C" { #define PCR_CC_SRIOV_INITIALVFS_REG 0x0000016c /* sienaa0=pci_f0_config */ -#define PCR_DZ_SRIOV_INITIALVFS_REG 0x0000020c +#define PCR_DZ_SRIOV_INITIALVFS_REG 0x0000018c /* hunta0=pci_f0_config */ #define PCRF_CZ_VF_INITIALVFS_LBN 0 @@ -1526,7 +1538,7 @@ extern "C" { #define PCR_CC_SRIOV_TOTALVFS_REG 0x0000016e /* sienaa0=pci_f0_config */ -#define PCR_DZ_SRIOV_TOTALVFS_REG 0x0000020e +#define PCR_DZ_SRIOV_TOTALVFS_REG 0x0000018e /* hunta0=pci_f0_config */ #define PCRF_CZ_VF_TOTALVFS_LBN 0 @@ -1541,13 +1553,27 @@ extern "C" { #define PCR_CC_SRIOV_NUMVFS_REG 0x00000170 /* sienaa0=pci_f0_config */ -#define PCR_DZ_SRIOV_NUMVFS_REG 0x00000210 +#define PCR_DZ_SRIOV_NUMVFS_REG 0x00000190 /* hunta0=pci_f0_config */ #define PCRF_CZ_VF_NUMVFS_LBN 0 #define PCRF_CZ_VF_NUMVFS_WIDTH 16 +/* + * PC_LANE23_EQU_CONTROL_REG(32bit): + * Lanes 2,3 Equalization Control Register. + */ + +#define PCR_DZ_LANE23_EQU_CONTROL_REG 0x00000170 +/* hunta0=pci_f0_config */ + +#define PCRF_DZ_LANE3_EQ_CTRL_LBN 16 +#define PCRF_DZ_LANE3_EQ_CTRL_WIDTH 16 +#define PCRF_DZ_LANE2_EQ_CTRL_LBN 0 +#define PCRF_DZ_LANE2_EQ_CTRL_WIDTH 16 + + /* * PC_SRIOV_FN_DPND_LNK_REG(16bit): * SRIOV Function dependency link @@ -1556,7 +1582,7 @@ extern "C" { #define PCR_CC_SRIOV_FN_DPND_LNK_REG 0x00000172 /* sienaa0=pci_f0_config */ -#define PCR_DZ_SRIOV_FN_DPND_LNK_REG 0x00000212 +#define PCR_DZ_SRIOV_FN_DPND_LNK_REG 0x00000192 /* hunta0=pci_f0_config */ #define PCRF_CZ_SRIOV_FN_DPND_LNK_LBN 0 @@ -1571,13 +1597,27 @@ extern "C" { #define PCR_CC_SRIOV_1STVF_OFFSET_REG 0x00000174 /* sienaa0=pci_f0_config */ -#define PCR_DZ_SRIOV_1STVF_OFFSET_REG 0x00000214 +#define PCR_DZ_SRIOV_1STVF_OFFSET_REG 0x00000194 /* hunta0=pci_f0_config */ #define PCRF_CZ_VF_1STVF_OFFSET_LBN 0 #define PCRF_CZ_VF_1STVF_OFFSET_WIDTH 16 +/* + * PC_LANE45_EQU_CONTROL_REG(32bit): + * Lanes 4,5 Equalization Control Register. + */ + +#define PCR_DZ_LANE45_EQU_CONTROL_REG 0x00000174 +/* hunta0=pci_f0_config */ + +#define PCRF_DZ_LANE5_EQ_CTRL_LBN 16 +#define PCRF_DZ_LANE5_EQ_CTRL_WIDTH 16 +#define PCRF_DZ_LANE4_EQ_CTRL_LBN 0 +#define PCRF_DZ_LANE4_EQ_CTRL_WIDTH 16 + + /* * PC_SRIOV_VFSTRIDE_REG(16bit): * SRIOV VF Stride @@ -1586,13 +1626,27 @@ extern "C" { #define PCR_CC_SRIOV_VFSTRIDE_REG 0x00000176 /* sienaa0=pci_f0_config */ -#define PCR_DZ_SRIOV_VFSTRIDE_REG 0x00000216 +#define PCR_DZ_SRIOV_VFSTRIDE_REG 0x00000196 /* hunta0=pci_f0_config */ #define PCRF_CZ_VF_VFSTRIDE_LBN 0 #define PCRF_CZ_VF_VFSTRIDE_WIDTH 16 +/* + * PC_LANE67_EQU_CONTROL_REG(32bit): + * Lanes 6,7 Equalization Control Register. + */ + +#define PCR_DZ_LANE67_EQU_CONTROL_REG 0x00000178 +/* hunta0=pci_f0_config */ + +#define PCRF_DZ_LANE7_EQ_CTRL_LBN 16 +#define PCRF_DZ_LANE7_EQ_CTRL_WIDTH 16 +#define PCRF_DZ_LANE6_EQ_CTRL_LBN 0 +#define PCRF_DZ_LANE6_EQ_CTRL_WIDTH 16 + + /* * PC_SRIOV_DEVID_REG(16bit): * SRIOV VF Device ID @@ -1601,7 +1655,7 @@ extern "C" { #define PCR_CC_SRIOV_DEVID_REG 0x0000017a /* sienaa0=pci_f0_config */ -#define PCR_DZ_SRIOV_DEVID_REG 0x0000021a +#define PCR_DZ_SRIOV_DEVID_REG 0x0000019a /* hunta0=pci_f0_config */ #define PCRF_CZ_VF_DEVID_LBN 0 @@ -1616,7 +1670,7 @@ extern "C" { #define PCR_CC_SRIOV_SUP_PAGESZ_REG 0x0000017c /* sienaa0=pci_f0_config */ -#define PCR_DZ_SRIOV_SUP_PAGESZ_REG 0x0000021c +#define PCR_DZ_SRIOV_SUP_PAGESZ_REG 0x0000019c /* hunta0=pci_f0_config */ #define PCRF_CZ_VF_SUP_PAGESZ_LBN 0 @@ -1631,7 +1685,7 @@ extern "C" { #define PCR_CC_SRIOV_SYS_PAGESZ_REG 0x00000180 /* sienaa0=pci_f0_config */ -#define PCR_DZ_SRIOV_SYS_PAGESZ_REG 0x00000220 +#define PCR_DZ_SRIOV_SYS_PAGESZ_REG 0x000001a0 /* hunta0=pci_f0_config */ #define PCRF_CZ_VF_SYS_PAGESZ_LBN 0 @@ -1646,13 +1700,19 @@ extern "C" { #define PCR_CC_SRIOV_BAR0_REG 0x00000184 /* sienaa0=pci_f0_config */ -#define PCR_DZ_SRIOV_BAR0_REG 0x00000224 +#define PCR_DZ_SRIOV_BAR0_REG 0x000001a4 /* hunta0=pci_f0_config */ #define PCRF_CC_VF_BAR_ADDRESS_LBN 0 #define PCRF_CC_VF_BAR_ADDRESS_WIDTH 32 -#define PCRF_DZ_VF_BAR0_ADDRESS_LBN 0 -#define PCRF_DZ_VF_BAR0_ADDRESS_WIDTH 32 +#define PCRF_DZ_VF_BAR0_ADDRESS_LBN 4 +#define PCRF_DZ_VF_BAR0_ADDRESS_WIDTH 28 +#define PCRF_DZ_VF_BAR0_PREF_LBN 3 +#define PCRF_DZ_VF_BAR0_PREF_WIDTH 1 +#define PCRF_DZ_VF_BAR0_TYPE_LBN 1 +#define PCRF_DZ_VF_BAR0_TYPE_WIDTH 2 +#define PCRF_DZ_VF_BAR0_IOM_LBN 0 +#define PCRF_DZ_VF_BAR0_IOM_WIDTH 1 /* @@ -1663,7 +1723,7 @@ extern "C" { #define PCR_CC_SRIOV_BAR1_REG 0x00000188 /* sienaa0=pci_f0_config */ -#define PCR_DZ_SRIOV_BAR1_REG 0x00000228 +#define PCR_DZ_SRIOV_BAR1_REG 0x000001a8 /* hunta0=pci_f0_config */ /* defined as PCRF_CC_VF_BAR_ADDRESS_LBN 0; */ @@ -1680,13 +1740,19 @@ extern "C" { #define PCR_CC_SRIOV_BAR2_REG 0x0000018c /* sienaa0=pci_f0_config */ -#define PCR_DZ_SRIOV_BAR2_REG 0x0000022c +#define PCR_DZ_SRIOV_BAR2_REG 0x000001ac /* hunta0=pci_f0_config */ /* defined as PCRF_CC_VF_BAR_ADDRESS_LBN 0; */ /* defined as PCRF_CC_VF_BAR_ADDRESS_WIDTH 32 */ -#define PCRF_DZ_VF_BAR2_ADDRESS_LBN 0 -#define PCRF_DZ_VF_BAR2_ADDRESS_WIDTH 32 +#define PCRF_DZ_VF_BAR2_ADDRESS_LBN 4 +#define PCRF_DZ_VF_BAR2_ADDRESS_WIDTH 28 +#define PCRF_DZ_VF_BAR2_PREF_LBN 3 +#define PCRF_DZ_VF_BAR2_PREF_WIDTH 1 +#define PCRF_DZ_VF_BAR2_TYPE_LBN 1 +#define PCRF_DZ_VF_BAR2_TYPE_WIDTH 2 +#define PCRF_DZ_VF_BAR2_IOM_LBN 0 +#define PCRF_DZ_VF_BAR2_IOM_WIDTH 1 /* @@ -1697,7 +1763,7 @@ extern "C" { #define PCR_CC_SRIOV_BAR3_REG 0x00000190 /* sienaa0=pci_f0_config */ -#define PCR_DZ_SRIOV_BAR3_REG 0x00000230 +#define PCR_DZ_SRIOV_BAR3_REG 0x000001b0 /* hunta0=pci_f0_config */ /* defined as PCRF_CC_VF_BAR_ADDRESS_LBN 0; */ @@ -1714,7 +1780,7 @@ extern "C" { #define PCR_CC_SRIOV_BAR4_REG 0x00000194 /* sienaa0=pci_f0_config */ -#define PCR_DZ_SRIOV_BAR4_REG 0x00000234 +#define PCR_DZ_SRIOV_BAR4_REG 0x000001b4 /* hunta0=pci_f0_config */ /* defined as PCRF_CC_VF_BAR_ADDRESS_LBN 0; */ @@ -1731,7 +1797,7 @@ extern "C" { #define PCR_CC_SRIOV_BAR5_REG 0x00000198 /* sienaa0=pci_f0_config */ -#define PCR_DZ_SRIOV_BAR5_REG 0x00000238 +#define PCR_DZ_SRIOV_BAR5_REG 0x000001b8 /* hunta0=pci_f0_config */ /* defined as PCRF_CC_VF_BAR_ADDRESS_LBN 0; */ @@ -1740,6 +1806,18 @@ extern "C" { #define PCRF_DZ_VF_BAR5_ADDRESS_WIDTH 32 +/* + * PC_SRIOV_RSVD_REG(16bit): + * Reserved register + */ + +#define PCR_DZ_SRIOV_RSVD_REG 0x00000198 +/* hunta0=pci_f0_config */ + +#define PCRF_DZ_VF_RSVD_LBN 0 +#define PCRF_DZ_VF_RSVD_WIDTH 16 + + /* * PC_SRIOV_MIBR_SARRAY_OFFSET_REG(32bit): * SRIOV VF Migration State Array Offset @@ -1748,7 +1826,7 @@ extern "C" { #define PCR_CC_SRIOV_MIBR_SARRAY_OFFSET_REG 0x0000019c /* sienaa0=pci_f0_config */ -#define PCR_DZ_SRIOV_MIBR_SARRAY_OFFSET_REG 0x0000023c +#define PCR_DZ_SRIOV_MIBR_SARRAY_OFFSET_REG 0x000001bc /* hunta0=pci_f0_config */ #define PCRF_CZ_VF_MIGR_OFFSET_LBN 3 @@ -1757,46 +1835,12 @@ extern "C" { #define PCRF_CZ_VF_MIGR_BIR_WIDTH 3 -/* - * PC_LTR_CAP_HDR_REG(32bit): - * Latency Tolerance Reporting Cap Header Reg - */ - -#define PCR_DZ_LTR_CAP_HDR_REG 0x00000240 -/* hunta0=pci_f0_config */ - -#define PCRF_DZ_LTR_NXT_PTR_LBN 20 -#define PCRF_DZ_LTR_NXT_PTR_WIDTH 12 -#define PCRF_DZ_LTR_VERSION_LBN 16 -#define PCRF_DZ_LTR_VERSION_WIDTH 4 -#define PCRF_DZ_LTR_EXT_CAP_ID_LBN 0 -#define PCRF_DZ_LTR_EXT_CAP_ID_WIDTH 16 - - -/* - * PC_LTR_MAX_SNOOP_REG(32bit): - * LTR Maximum Snoop/No Snoop Register - */ - -#define PCR_DZ_LTR_MAX_SNOOP_REG 0x00000244 -/* hunta0=pci_f0_config */ - -#define PCRF_DZ_LTR_MAX_NOSNOOP_SCALE_LBN 26 -#define PCRF_DZ_LTR_MAX_NOSNOOP_SCALE_WIDTH 3 -#define PCRF_DZ_LTR_MAX_NOSNOOP_LAT_LBN 16 -#define PCRF_DZ_LTR_MAX_NOSNOOP_LAT_WIDTH 10 -#define PCRF_DZ_LTR_MAX_SNOOP_SCALE_LBN 10 -#define PCRF_DZ_LTR_MAX_SNOOP_SCALE_WIDTH 3 -#define PCRF_DZ_LTR_MAX_SNOOP_LAT_LBN 0 -#define PCRF_DZ_LTR_MAX_SNOOP_LAT_WIDTH 10 - - /* * PC_TPH_CAP_HDR_REG(32bit): * TPH Capability Header Register */ -#define PCR_DZ_TPH_CAP_HDR_REG 0x00000274 +#define PCR_DZ_TPH_CAP_HDR_REG 0x000001c0 /* hunta0=pci_f0_config */ #define PCRF_DZ_TPH_NXT_PTR_LBN 20 @@ -1812,7 +1856,7 @@ extern "C" { * TPH Requester Capability Register */ -#define PCR_DZ_TPH_REQ_CAP_REG 0x00000278 +#define PCR_DZ_TPH_REQ_CAP_REG 0x000001c4 /* hunta0=pci_f0_config */ #define PCRF_DZ_ST_TBLE_SIZE_LBN 16 @@ -1834,7 +1878,7 @@ extern "C" { * TPH Requester Control Register */ -#define PCR_DZ_TPH_REQ_CTL_REG 0x0000027c +#define PCR_DZ_TPH_REQ_CTL_REG 0x000001c8 /* hunta0=pci_f0_config */ #define PCRF_DZ_TPH_REQ_ENABLE_LBN 8 @@ -1844,101 +1888,37 @@ extern "C" { /* - * PC_SEC_PCIE_CAP_REG(32bit): - * Secondary PCIE Capability Register + * PC_LTR_CAP_HDR_REG(32bit): + * Latency Tolerance Reporting Cap Header Reg */ -#define PCR_DZ_SEC_PCIE_CAP_REG 0x00000300 +#define PCR_DZ_LTR_CAP_HDR_REG 0x00000290 /* hunta0=pci_f0_config */ -#define PCRF_DZ_SEC_NXT_PTR_LBN 20 -#define PCRF_DZ_SEC_NXT_PTR_WIDTH 12 -#define PCRF_DZ_SEC_VERSION_LBN 16 -#define PCRF_DZ_SEC_VERSION_WIDTH 4 -#define PCRF_DZ_SEC_EXT_CAP_ID_LBN 0 -#define PCRF_DZ_SEC_EXT_CAP_ID_WIDTH 16 +#define PCRF_DZ_LTR_NXT_PTR_LBN 20 +#define PCRF_DZ_LTR_NXT_PTR_WIDTH 12 +#define PCRF_DZ_LTR_VERSION_LBN 16 +#define PCRF_DZ_LTR_VERSION_WIDTH 4 +#define PCRF_DZ_LTR_EXT_CAP_ID_LBN 0 +#define PCRF_DZ_LTR_EXT_CAP_ID_WIDTH 16 /* - * PC_LINK_CONTROL3_REG(32bit): - * Link Control 3. + * PC_LTR_MAX_SNOOP_REG(32bit): + * LTR Maximum Snoop/No Snoop Register */ -#define PCR_DZ_LINK_CONTROL3_REG 0x00000304 +#define PCR_DZ_LTR_MAX_SNOOP_REG 0x00000294 /* hunta0=pci_f0_config */ -#define PCRF_DZ_LINK_EQ_INT_EN_LBN 1 -#define PCRF_DZ_LINK_EQ_INT_EN_WIDTH 1 -#define PCRF_DZ_PERFORM_EQL_LBN 0 -#define PCRF_DZ_PERFORM_EQL_WIDTH 1 - - -/* - * PC_LANE_ERROR_STAT_REG(32bit): - * Lane Error Status Register. - */ - -#define PCR_DZ_LANE_ERROR_STAT_REG 0x00000308 -/* hunta0=pci_f0_config */ - -#define PCRF_DZ_LANE_STATUS_LBN 0 -#define PCRF_DZ_LANE_STATUS_WIDTH 8 - - -/* - * PC_LANE01_EQU_CONTROL_REG(32bit): - * Lanes 0,1 Equalization Control Register. - */ - -#define PCR_DZ_LANE01_EQU_CONTROL_REG 0x0000030c -/* hunta0=pci_f0_config */ - -#define PCRF_DZ_LANE1_EQ_CTRL_LBN 16 -#define PCRF_DZ_LANE1_EQ_CTRL_WIDTH 16 -#define PCRF_DZ_LANE0_EQ_CTRL_LBN 0 -#define PCRF_DZ_LANE0_EQ_CTRL_WIDTH 16 - - -/* - * PC_LANE23_EQU_CONTROL_REG(32bit): - * Lanes 2,3 Equalization Control Register. - */ - -#define PCR_DZ_LANE23_EQU_CONTROL_REG 0x00000310 -/* hunta0=pci_f0_config */ - -#define PCRF_DZ_LANE3_EQ_CTRL_LBN 16 -#define PCRF_DZ_LANE3_EQ_CTRL_WIDTH 16 -#define PCRF_DZ_LANE2_EQ_CTRL_LBN 0 -#define PCRF_DZ_LANE2_EQ_CTRL_WIDTH 16 - - -/* - * PC_LANE45_EQU_CONTROL_REG(32bit): - * Lanes 4,5 Equalization Control Register. - */ - -#define PCR_DZ_LANE45_EQU_CONTROL_REG 0x00000314 -/* hunta0=pci_f0_config */ - -#define PCRF_DZ_LANE5_EQ_CTRL_LBN 16 -#define PCRF_DZ_LANE5_EQ_CTRL_WIDTH 16 -#define PCRF_DZ_LANE4_EQ_CTRL_LBN 0 -#define PCRF_DZ_LANE4_EQ_CTRL_WIDTH 16 - - -/* - * PC_LANE67_EQU_CONTROL_REG(32bit): - * Lanes 6,7 Equalization Control Register. - */ - -#define PCR_DZ_LANE67_EQU_CONTROL_REG 0x00000318 -/* hunta0=pci_f0_config */ - -#define PCRF_DZ_LANE7_EQ_CTRL_LBN 16 -#define PCRF_DZ_LANE7_EQ_CTRL_WIDTH 16 -#define PCRF_DZ_LANE6_EQ_CTRL_LBN 0 -#define PCRF_DZ_LANE6_EQ_CTRL_WIDTH 16 +#define PCRF_DZ_LTR_MAX_NOSNOOP_SCALE_LBN 26 +#define PCRF_DZ_LTR_MAX_NOSNOOP_SCALE_WIDTH 3 +#define PCRF_DZ_LTR_MAX_NOSNOOP_LAT_LBN 16 +#define PCRF_DZ_LTR_MAX_NOSNOOP_LAT_WIDTH 10 +#define PCRF_DZ_LTR_MAX_SNOOP_SCALE_LBN 10 +#define PCRF_DZ_LTR_MAX_SNOOP_SCALE_WIDTH 3 +#define PCRF_DZ_LTR_MAX_SNOOP_LAT_LBN 0 +#define PCRF_DZ_LTR_MAX_SNOOP_LAT_WIDTH 10 /* @@ -2139,6 +2119,18 @@ extern "C" { #define PCRF_AB_SI0_WIDTH 8 +/* + * PC_FLT_MSK_REG(32bit): + * Filter Mask Register 2 + */ + +#define PCR_CC_FLT_MSK_REG 0x00000720 +/* sienaa0=pci_f0_config */ + +#define PCRF_CC_DEFAULT_FLT_MSK2_LBN 0 +#define PCRF_CC_DEFAULT_FLT_MSK2_WIDTH 32 + + /* * PC_PHY_STAT_REG(32bit): * PHY status register @@ -2160,18 +2152,6 @@ extern "C" { #define PCRF_AC_SSCD_WIDTH 1 -/* - * PC_FLT_MSK_REG(32bit): - * Filter Mask Register 2 - */ - -#define PCR_CC_FLT_MSK_REG 0x00000720 -/* sienaa0=pci_f0_config */ - -#define PCRF_CC_DEFAULT_FLT_MSK2_LBN 0 -#define PCRF_CC_DEFAULT_FLT_MSK2_WIDTH 32 - - /* * PC_PHY_CTL_REG(32bit): * PHY control register diff --git a/sys/dev/sfxge/common/efx_rx.c b/sys/dev/sfxge/common/efx_rx.c index c6e0d70e064e..3501d6ec0785 100644 --- a/sys/dev/sfxge/common/efx_rx.c +++ b/sys/dev/sfxge/common/efx_rx.c @@ -1,26 +1,31 @@ /*- - * Copyright 2007-2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2007-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -32,12 +37,174 @@ __FBSDID("$FreeBSD$"); #include "efx_regs.h" #include "efx_impl.h" + +#if EFSYS_OPT_FALCON || EFSYS_OPT_SIENA + +static __checkReturn int +falconsiena_rx_init( + __in efx_nic_t *enp); + +static void +falconsiena_rx_fini( + __in efx_nic_t *enp); + +#if EFSYS_OPT_RX_HDR_SPLIT +static __checkReturn int +falconsiena_rx_hdr_split_enable( + __in efx_nic_t *enp, + __in unsigned int hdr_buf_size, + __in unsigned int pld_buf_size); +#endif /* EFSYS_OPT_RX_HDR_SPLIT */ + +#if EFSYS_OPT_RX_SCATTER +static __checkReturn int +falconsiena_rx_scatter_enable( + __in efx_nic_t *enp, + __in unsigned int buf_size); +#endif /* EFSYS_OPT_RX_SCATTER */ + +#if EFSYS_OPT_RX_SCALE +static __checkReturn int +falconsiena_rx_scale_mode_set( + __in efx_nic_t *enp, + __in efx_rx_hash_alg_t alg, + __in efx_rx_hash_type_t type, + __in boolean_t insert); + +static __checkReturn int +falconsiena_rx_scale_key_set( + __in efx_nic_t *enp, + __in_ecount(n) uint8_t *key, + __in size_t n); + +static __checkReturn int +falconsiena_rx_scale_tbl_set( + __in efx_nic_t *enp, + __in_ecount(n) unsigned int *table, + __in size_t n); + +#endif /* EFSYS_OPT_RX_SCALE */ + +static void +falconsiena_rx_qpost( + __in efx_rxq_t *erp, + __in_ecount(n) efsys_dma_addr_t *addrp, + __in size_t size, + __in unsigned int n, + __in unsigned int completed, + __in unsigned int added); + +static void +falconsiena_rx_qpush( + __in efx_rxq_t *erp, + __in unsigned int added, + __inout unsigned int *pushedp); + +static __checkReturn int +falconsiena_rx_qflush( + __in efx_rxq_t *erp); + +static void +falconsiena_rx_qenable( + __in efx_rxq_t *erp); + +static __checkReturn int +falconsiena_rx_qcreate( + __in efx_nic_t *enp, + __in unsigned int index, + __in unsigned int label, + __in efx_rxq_type_t type, + __in efsys_mem_t *esmp, + __in size_t n, + __in uint32_t id, + __in efx_evq_t *eep, + __in efx_rxq_t *erp); + +static void +falconsiena_rx_qdestroy( + __in efx_rxq_t *erp); + +#endif /* EFSYS_OPT_FALCON || EFSYS_OPT_SIENA */ + + +#if EFSYS_OPT_FALCON +static efx_rx_ops_t __efx_rx_falcon_ops = { + falconsiena_rx_init, /* erxo_init */ + falconsiena_rx_fini, /* erxo_fini */ +#if EFSYS_OPT_RX_HDR_SPLIT + falconsiena_rx_hdr_split_enable, /* erxo_hdr_split_enable */ +#endif +#if EFSYS_OPT_RX_SCATTER + falconsiena_rx_scatter_enable, /* erxo_scatter_enable */ +#endif +#if EFSYS_OPT_RX_SCALE + falconsiena_rx_scale_mode_set, /* erxo_scale_mode_set */ + falconsiena_rx_scale_key_set, /* erxo_scale_key_set */ + falconsiena_rx_scale_tbl_set, /* erxo_scale_tbl_set */ +#endif + falconsiena_rx_qpost, /* erxo_qpost */ + falconsiena_rx_qpush, /* erxo_qpush */ + falconsiena_rx_qflush, /* erxo_qflush */ + falconsiena_rx_qenable, /* erxo_qenable */ + falconsiena_rx_qcreate, /* erxo_qcreate */ + falconsiena_rx_qdestroy, /* erxo_qdestroy */ +}; +#endif /* EFSYS_OPT_FALCON */ + +#if EFSYS_OPT_SIENA +static efx_rx_ops_t __efx_rx_siena_ops = { + falconsiena_rx_init, /* erxo_init */ + falconsiena_rx_fini, /* erxo_fini */ +#if EFSYS_OPT_RX_HDR_SPLIT + falconsiena_rx_hdr_split_enable, /* erxo_hdr_split_enable */ +#endif +#if EFSYS_OPT_RX_SCATTER + falconsiena_rx_scatter_enable, /* erxo_scatter_enable */ +#endif +#if EFSYS_OPT_RX_SCALE + falconsiena_rx_scale_mode_set, /* erxo_scale_mode_set */ + falconsiena_rx_scale_key_set, /* erxo_scale_key_set */ + falconsiena_rx_scale_tbl_set, /* erxo_scale_tbl_set */ +#endif + falconsiena_rx_qpost, /* erxo_qpost */ + falconsiena_rx_qpush, /* erxo_qpush */ + falconsiena_rx_qflush, /* erxo_qflush */ + falconsiena_rx_qenable, /* erxo_qenable */ + falconsiena_rx_qcreate, /* erxo_qcreate */ + falconsiena_rx_qdestroy, /* erxo_qdestroy */ +}; +#endif /* EFSYS_OPT_SIENA */ + +#if EFSYS_OPT_HUNTINGTON +static efx_rx_ops_t __efx_rx_hunt_ops = { + hunt_rx_init, /* erxo_init */ + hunt_rx_fini, /* erxo_fini */ +#if EFSYS_OPT_RX_HDR_SPLIT + hunt_rx_hdr_split_enable, /* erxo_hdr_split_enable */ +#endif +#if EFSYS_OPT_RX_SCATTER + hunt_rx_scatter_enable, /* erxo_scatter_enable */ +#endif +#if EFSYS_OPT_RX_SCALE + hunt_rx_scale_mode_set, /* erxo_scale_mode_set */ + hunt_rx_scale_key_set, /* erxo_scale_key_set */ + hunt_rx_scale_tbl_set, /* erxo_scale_tbl_set */ +#endif + hunt_rx_qpost, /* erxo_qpost */ + hunt_rx_qpush, /* erxo_qpush */ + hunt_rx_qflush, /* erxo_qflush */ + hunt_rx_qenable, /* erxo_qenable */ + hunt_rx_qcreate, /* erxo_qcreate */ + hunt_rx_qdestroy, /* erxo_qdestroy */ +}; +#endif /* EFSYS_OPT_HUNTINGTON */ + + __checkReturn int efx_rx_init( - __in efx_nic_t *enp) + __inout efx_nic_t *enp) { - efx_oword_t oword; - unsigned int index; + efx_rx_ops_t *erxop; int rc; EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); @@ -53,6 +220,471 @@ efx_rx_init( goto fail2; } + switch (enp->en_family) { +#if EFSYS_OPT_FALCON + case EFX_FAMILY_FALCON: + erxop = (efx_rx_ops_t *)&__efx_rx_falcon_ops; + break; +#endif /* EFSYS_OPT_FALCON */ + +#if EFSYS_OPT_SIENA + case EFX_FAMILY_SIENA: + erxop = (efx_rx_ops_t *)&__efx_rx_siena_ops; + break; +#endif /* EFSYS_OPT_SIENA */ + +#if EFSYS_OPT_HUNTINGTON + case EFX_FAMILY_HUNTINGTON: + erxop = (efx_rx_ops_t *)&__efx_rx_hunt_ops; + break; +#endif /* EFSYS_OPT_HUNTINGTON */ + + default: + EFSYS_ASSERT(0); + rc = ENOTSUP; + goto fail3; + } + + if ((rc = erxop->erxo_init(enp)) != 0) + goto fail4; + + enp->en_erxop = erxop; + enp->en_mod_flags |= EFX_MOD_RX; + return (0); + +fail4: + EFSYS_PROBE(fail4); +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + enp->en_erxop = NULL; + enp->en_mod_flags &= ~EFX_MOD_RX; + return (rc); +} + + void +efx_rx_fini( + __in efx_nic_t *enp) +{ + efx_rx_ops_t *erxop = enp->en_erxop; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX); + EFSYS_ASSERT3U(enp->en_rx_qcount, ==, 0); + + erxop->erxo_fini(enp); + + enp->en_erxop = NULL; + enp->en_mod_flags &= ~EFX_MOD_RX; +} + +#if EFSYS_OPT_RX_HDR_SPLIT + __checkReturn int +efx_rx_hdr_split_enable( + __in efx_nic_t *enp, + __in unsigned int hdr_buf_size, + __in unsigned int pld_buf_size) +{ + efx_rx_ops_t *erxop = enp->en_erxop; + int rc; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX); + EFSYS_ASSERT3U(enp->en_family, >=, EFX_FAMILY_SIENA); + + if ((rc = erxop->erxo_hdr_split_enable(enp, hdr_buf_size, + pld_buf_size)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + return (rc); +} +#endif /* EFSYS_OPT_RX_HDR_SPLIT */ + +#if EFSYS_OPT_RX_SCATTER + __checkReturn int +efx_rx_scatter_enable( + __in efx_nic_t *enp, + __in unsigned int buf_size) +{ + efx_rx_ops_t *erxop = enp->en_erxop; + int rc; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX); + + if ((rc = erxop->erxo_scatter_enable(enp, buf_size)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + return (rc); +} +#endif /* EFSYS_OPT_RX_SCATTER */ + +#if EFSYS_OPT_RX_SCALE + __checkReturn int +efx_rx_hash_support_get( + __in efx_nic_t *enp, + __out efx_rx_hash_support_t *supportp) +{ + int rc; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX); + + if (supportp == NULL) { + rc = EINVAL; + goto fail1; + } + + /* Report if resources are available to insert RX hash value */ + *supportp = enp->en_hash_support; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +efx_rx_scale_support_get( + __in efx_nic_t *enp, + __out efx_rx_scale_support_t *supportp) +{ + int rc; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX); + + if (supportp == NULL) { + rc = EINVAL; + goto fail1; + } + + /* Report if resources are available to support RSS */ + *supportp = enp->en_rss_support; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +efx_rx_scale_mode_set( + __in efx_nic_t *enp, + __in efx_rx_hash_alg_t alg, + __in efx_rx_hash_type_t type, + __in boolean_t insert) +{ + efx_rx_ops_t *erxop = enp->en_erxop; + int rc; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX); + + if (erxop->erxo_scale_mode_set != NULL) { + if ((rc = erxop->erxo_scale_mode_set(enp, alg, + type, insert)) != 0) + goto fail1; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + return (rc); +} +#endif /* EFSYS_OPT_RX_SCALE */ + +#if EFSYS_OPT_RX_SCALE + __checkReturn int +efx_rx_scale_key_set( + __in efx_nic_t *enp, + __in_ecount(n) uint8_t *key, + __in size_t n) +{ + efx_rx_ops_t *erxop = enp->en_erxop; + int rc; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX); + + if ((rc = erxop->erxo_scale_key_set(enp, key, n)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} +#endif /* EFSYS_OPT_RX_SCALE */ + +#if EFSYS_OPT_RX_SCALE + __checkReturn int +efx_rx_scale_tbl_set( + __in efx_nic_t *enp, + __in_ecount(n) unsigned int *table, + __in size_t n) +{ + efx_rx_ops_t *erxop = enp->en_erxop; + int rc; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX); + + if ((rc = erxop->erxo_scale_tbl_set(enp, table, n)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} +#endif /* EFSYS_OPT_RX_SCALE */ + + void +efx_rx_qpost( + __in efx_rxq_t *erp, + __in_ecount(n) efsys_dma_addr_t *addrp, + __in size_t size, + __in unsigned int n, + __in unsigned int completed, + __in unsigned int added) +{ + efx_nic_t *enp = erp->er_enp; + efx_rx_ops_t *erxop = enp->en_erxop; + + EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC); + + erxop->erxo_qpost(erp, addrp, size, n, completed, added); +} + + void +efx_rx_qpush( + __in efx_rxq_t *erp, + __in unsigned int added, + __inout unsigned int *pushedp) +{ + efx_nic_t *enp = erp->er_enp; + efx_rx_ops_t *erxop = enp->en_erxop; + + EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC); + + erxop->erxo_qpush(erp, added, pushedp); +} + + __checkReturn int +efx_rx_qflush( + __in efx_rxq_t *erp) +{ + efx_nic_t *enp = erp->er_enp; + efx_rx_ops_t *erxop = enp->en_erxop; + int rc; + + EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC); + + if ((rc = erxop->erxo_qflush(erp)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + void +efx_rx_qenable( + __in efx_rxq_t *erp) +{ + efx_nic_t *enp = erp->er_enp; + efx_rx_ops_t *erxop = enp->en_erxop; + + EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC); + + erxop->erxo_qenable(erp); +} + + __checkReturn int +efx_rx_qcreate( + __in efx_nic_t *enp, + __in unsigned int index, + __in unsigned int label, + __in efx_rxq_type_t type, + __in efsys_mem_t *esmp, + __in size_t n, + __in uint32_t id, + __in efx_evq_t *eep, + __deref_out efx_rxq_t **erpp) +{ + efx_rx_ops_t *erxop = enp->en_erxop; + efx_rxq_t *erp; + int rc; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX); + + /* Allocate an RXQ object */ + EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (efx_rxq_t), erp); + + if (erp == NULL) { + rc = ENOMEM; + goto fail1; + } + + erp->er_magic = EFX_RXQ_MAGIC; + erp->er_enp = enp; + erp->er_index = index; + erp->er_mask = n - 1; + erp->er_esmp = esmp; + + if ((rc = erxop->erxo_qcreate(enp, index, label, type, esmp, n, id, + eep, erp)) != 0) + goto fail2; + + enp->en_rx_qcount++; + *erpp = erp; + + return (0); + +fail2: + EFSYS_PROBE(fail2); + + EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_rxq_t), erp); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + void +efx_rx_qdestroy( + __in efx_rxq_t *erp) +{ + efx_nic_t *enp = erp->er_enp; + efx_rx_ops_t *erxop = enp->en_erxop; + + EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC); + + erxop->erxo_qdestroy(erp); +} + +/* + * Psuedo-header info for Siena/Falcon. + * + * The psuedo-header is a byte array of one of the forms: + * + * 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 + * XX.XX.XX.XX.XX.XX.XX.XX.XX.XX.XX.XX.TT.TT.TT.TT + * XX.XX.XX.XX.XX.XX.XX.XX.XX.XX.XX.XX.XX.XX.LL.LL + * + * where: + * + * TT.TT.TT.TT is a 32-bit Toeplitz hash + * LL.LL is a 16-bit LFSR hash + * + * Hash values are in network (big-endian) byte order. + * + * + * On Huntington the pseudo-header is laid out as: + * (See also SF-109306-TC section 9) + * + * Toeplitz hash (32 bits, little-endian) + * Out-of-band outer VLAN tag + * (16 bits, big-endian, 0 if the packet did not have an outer VLAN tag) + * Out-of-band inner VLAN tag + * (16 bits, big-endian, 0 if the packet did not have an inner VLAN tag) + * Packet length (16 bits, little-endian, may be 0) + * MAC timestamp (32 bits, little-endian, may be 0) + * VLAN tag + * (16 bits, big-endian, 0 if the packet did not have an outer VLAN tag) + * VLAN tag + * (16 bits, big-endian, 0 if the packet did not have an inner VLAN tag) + */ + + __checkReturn int +efx_psuedo_hdr_pkt_length_get( + __in efx_nic_t *enp, + __in uint8_t *buffer, + __out uint16_t *pkt_lengthp) +{ + if (enp->en_family != EFX_FAMILY_HUNTINGTON) { + EFSYS_ASSERT(0); + return (ENOTSUP); + } + + *pkt_lengthp = buffer[8] | (buffer[9] << 8); + + return (0); +} + +#if EFSYS_OPT_RX_SCALE + +uint32_t +efx_psuedo_hdr_hash_get( + __in efx_nic_t *enp, + __in efx_rx_hash_alg_t func, + __in uint8_t *buffer) +{ + if (func == EFX_RX_HASHALG_TOEPLITZ) { + switch (enp->en_family) { + case EFX_FAMILY_FALCON: + case EFX_FAMILY_SIENA: + return ((buffer[12] << 24) | + (buffer[13] << 16) | + (buffer[14] << 8) | + buffer[15]); + case EFX_FAMILY_HUNTINGTON: + return (buffer[0] | + (buffer[1] << 8) | + (buffer[2] << 16) | + (buffer[3] << 24)); + default: + EFSYS_ASSERT(0); + return (0); + } + } else if (func == EFX_RX_HASHALG_LFSR) { + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_FALCON || + enp->en_family == EFX_FAMILY_SIENA); + return ((buffer[14] << 8) | buffer[15]); + } else { + EFSYS_ASSERT(0); + return (0); + } +} + +#endif /* EFSYS_OPT_RX_SCALE */ + +#if EFSYS_OPT_FALCON || EFSYS_OPT_SIENA + +static __checkReturn int +falconsiena_rx_init( + __in efx_nic_t *enp) +{ + efx_oword_t oword; + unsigned int index; + EFX_BAR_READO(enp, FR_AZ_RX_CFG_REG, &oword); EFX_SET_OWORD_FIELD(oword, FRF_BZ_RX_DESC_PUSH_EN, 0); @@ -68,23 +700,23 @@ efx_rx_init( index++) { EFX_ZERO_OWORD(oword); EFX_BAR_TBL_WRITEO(enp, FR_BZ_RX_INDIRECTION_TBL, - index, &oword); + index, &oword, B_TRUE); } - enp->en_mod_flags |= EFX_MOD_RX; +#if EFSYS_OPT_RX_SCALE + /* The RSS key and indirection table are writable. */ + enp->en_rss_support = EFX_RX_SCALE_EXCLUSIVE; + + /* Hardware can insert RX hash with/without RSS */ + enp->en_hash_support = EFX_RX_HASH_AVAILABLE; +#endif /* EFSYS_OPT_RX_SCALE */ + return (0); - -fail2: - EFSYS_PROBE(fail2); -fail1: - EFSYS_PROBE1(fail1, int, rc); - - return (rc); } #if EFSYS_OPT_RX_HDR_SPLIT - __checkReturn int -efx_rx_hdr_split_enable( +static __checkReturn int +falconsiena_rx_hdr_split_enable( __in efx_nic_t *enp, __in unsigned int hdr_buf_size, __in unsigned int pld_buf_size) @@ -94,10 +726,6 @@ efx_rx_hdr_split_enable( efx_oword_t oword; int rc; - EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX); - EFSYS_ASSERT3U(enp->en_family, >=, EFX_FAMILY_SIENA); - nhdr32 = hdr_buf_size / 32; if ((nhdr32 == 0) || (nhdr32 >= (1 << FRF_CZ_RX_HDR_SPLIT_HDR_BUF_SIZE_WIDTH)) || @@ -140,10 +768,9 @@ efx_rx_hdr_split_enable( } #endif /* EFSYS_OPT_RX_HDR_SPLIT */ - #if EFSYS_OPT_RX_SCATTER - __checkReturn int -efx_rx_scatter_enable( +static __checkReturn int +falconsiena_rx_scatter_enable( __in efx_nic_t *enp, __in unsigned int buf_size) { @@ -151,10 +778,6 @@ efx_rx_scatter_enable( efx_oword_t oword; int rc; - EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX); - EFSYS_ASSERT3U(enp->en_family, >=, EFX_FAMILY_FALCON); - nbuf32 = buf_size / 32; if ((nbuf32 == 0) || (nbuf32 >= (1 << FRF_BZ_RX_USR_BUF_SIZE_WIDTH)) || @@ -191,7 +814,7 @@ efx_rx_scatter_enable( #define EFX_RX_LFSR_HASH(_enp, _insert) \ - do { \ + do { \ efx_oword_t oword; \ \ EFX_BAR_READO((_enp), FR_AZ_RX_CFG_REG, &oword); \ @@ -215,7 +838,7 @@ efx_rx_scatter_enable( } while (B_FALSE) #define EFX_RX_TOEPLITZ_IPV4_HASH(_enp, _insert, _ip, _tcp) \ - do { \ + do { \ efx_oword_t oword; \ \ EFX_BAR_READO((_enp), FR_AZ_RX_CFG_REG, &oword); \ @@ -232,7 +855,7 @@ efx_rx_scatter_enable( } while (B_FALSE) #define EFX_RX_TOEPLITZ_IPV6_HASH(_enp, _ip, _tcp, _rc) \ - do { \ + do { \ efx_oword_t oword; \ \ if ((_enp)->en_family == EFX_FAMILY_FALCON) { \ @@ -256,8 +879,9 @@ efx_rx_scatter_enable( #if EFSYS_OPT_RX_SCALE - __checkReturn int -efx_rx_scale_mode_set( + +static __checkReturn int +falconsiena_rx_scale_mode_set( __in efx_nic_t *enp, __in efx_rx_hash_alg_t alg, __in efx_rx_hash_type_t type, @@ -265,10 +889,6 @@ efx_rx_scale_mode_set( { int rc; - EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX); - EFSYS_ASSERT3U(enp->en_family, >=, EFX_FAMILY_FALCON); - switch (alg) { case EFX_RX_HASHALG_LFSR: EFX_RX_LFSR_HASH(enp, insert); @@ -307,8 +927,8 @@ efx_rx_scale_mode_set( #endif #if EFSYS_OPT_RX_SCALE - __checkReturn int -efx_rx_scale_toeplitz_ipv4_key_set( +static __checkReturn int +falconsiena_rx_scale_key_set( __in efx_nic_t *enp, __in_ecount(n) uint8_t *key, __in size_t n) @@ -318,12 +938,9 @@ efx_rx_scale_toeplitz_ipv4_key_set( unsigned int offset; int rc; - EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX); - byte = 0; - /* Write toeplitz hash key */ + /* Write Toeplitz IPv4 hash key */ EFX_ZERO_OWORD(oword); for (offset = (FRF_BZ_RX_RSS_TKEY_LBN + FRF_BZ_RX_RSS_TKEY_WIDTH) / 8; offset > 0 && byte < n; @@ -334,7 +951,7 @@ efx_rx_scale_toeplitz_ipv4_key_set( byte = 0; - /* Verify toeplitz hash key */ + /* Verify Toeplitz IPv4 hash key */ EFX_BAR_READO(enp, FR_BZ_RX_RSS_TKEY_REG, &oword); for (offset = (FRF_BZ_RX_RSS_TKEY_LBN + FRF_BZ_RX_RSS_TKEY_WIDTH) / 8; offset > 0 && byte < n; @@ -345,33 +962,14 @@ efx_rx_scale_toeplitz_ipv4_key_set( } } - return (0); + if ((enp->en_features & EFX_FEATURE_IPV6) == 0) + goto done; -fail1: - EFSYS_PROBE1(fail1, int, rc); - - return (rc); -} -#endif - -#if EFSYS_OPT_RX_SCALE - __checkReturn int -efx_rx_scale_toeplitz_ipv6_key_set( - __in efx_nic_t *enp, - __in_ecount(n) uint8_t *key, - __in size_t n) -{ - efx_oword_t oword; - unsigned int byte; - int offset; - int rc; - - EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX); + EFSYS_ASSERT3U(enp->en_family, !=, EFX_FAMILY_FALCON); byte = 0; - /* Write toeplitz hash key 3 */ + /* Write Toeplitz IPv6 hash key 3 */ EFX_BAR_READO(enp, FR_CZ_RX_RSS_IPV6_REG3, &oword); for (offset = (FRF_CZ_RX_RSS_IPV6_TKEY_HI_LBN + FRF_CZ_RX_RSS_IPV6_TKEY_HI_WIDTH) / 8; @@ -381,7 +979,7 @@ efx_rx_scale_toeplitz_ipv6_key_set( EFX_BAR_WRITEO(enp, FR_CZ_RX_RSS_IPV6_REG3, &oword); - /* Write toeplitz hash key 2 */ + /* Write Toeplitz IPv6 hash key 2 */ EFX_ZERO_OWORD(oword); for (offset = (FRF_CZ_RX_RSS_IPV6_TKEY_MID_LBN + FRF_CZ_RX_RSS_IPV6_TKEY_MID_WIDTH) / 8; @@ -391,7 +989,7 @@ efx_rx_scale_toeplitz_ipv6_key_set( EFX_BAR_WRITEO(enp, FR_CZ_RX_RSS_IPV6_REG2, &oword); - /* Write toeplitz hash key 1 */ + /* Write Toeplitz IPv6 hash key 1 */ EFX_ZERO_OWORD(oword); for (offset = (FRF_CZ_RX_RSS_IPV6_TKEY_LO_LBN + FRF_CZ_RX_RSS_IPV6_TKEY_LO_WIDTH) / 8; @@ -403,23 +1001,11 @@ efx_rx_scale_toeplitz_ipv6_key_set( byte = 0; - /* Verify toeplitz hash key 3 */ + /* Verify Toeplitz IPv6 hash key 3 */ EFX_BAR_READO(enp, FR_CZ_RX_RSS_IPV6_REG3, &oword); for (offset = (FRF_CZ_RX_RSS_IPV6_TKEY_HI_LBN + FRF_CZ_RX_RSS_IPV6_TKEY_HI_WIDTH) / 8; offset > 0 && byte < n; - --offset) { - if (oword.eo_u8[offset - 1] != key[byte++]) { - rc = EFAULT; - goto fail1; - } - } - - /* Verify toeplitz hash key 2 */ - EFX_BAR_READO(enp, FR_CZ_RX_RSS_IPV6_REG2, &oword); - for (offset = (FRF_CZ_RX_RSS_IPV6_TKEY_MID_LBN + - FRF_CZ_RX_RSS_IPV6_TKEY_MID_WIDTH) / 8; - offset > 0 && byte < n; --offset) { if (oword.eo_u8[offset - 1] != key[byte++]) { rc = EFAULT; @@ -427,10 +1013,10 @@ efx_rx_scale_toeplitz_ipv6_key_set( } } - /* Verify toeplitz hash key 1 */ - EFX_BAR_READO(enp, FR_CZ_RX_RSS_IPV6_REG1, &oword); - for (offset = (FRF_CZ_RX_RSS_IPV6_TKEY_LO_LBN + - FRF_CZ_RX_RSS_IPV6_TKEY_LO_WIDTH) / 8; + /* Verify Toeplitz IPv6 hash key 2 */ + EFX_BAR_READO(enp, FR_CZ_RX_RSS_IPV6_REG2, &oword); + for (offset = (FRF_CZ_RX_RSS_IPV6_TKEY_MID_LBN + + FRF_CZ_RX_RSS_IPV6_TKEY_MID_WIDTH) / 8; offset > 0 && byte < n; --offset) { if (oword.eo_u8[offset - 1] != key[byte++]) { @@ -439,8 +1025,23 @@ efx_rx_scale_toeplitz_ipv6_key_set( } } + /* Verify Toeplitz IPv6 hash key 1 */ + EFX_BAR_READO(enp, FR_CZ_RX_RSS_IPV6_REG1, &oword); + for (offset = (FRF_CZ_RX_RSS_IPV6_TKEY_LO_LBN + + FRF_CZ_RX_RSS_IPV6_TKEY_LO_WIDTH) / 8; + offset > 0 && byte < n; + --offset) { + if (oword.eo_u8[offset - 1] != key[byte++]) { + rc = EFAULT; + goto fail4; + } + } + +done: return (0); +fail4: + EFSYS_PROBE(fail4); fail3: EFSYS_PROBE(fail3); fail2: @@ -453,8 +1054,8 @@ efx_rx_scale_toeplitz_ipv6_key_set( #endif #if EFSYS_OPT_RX_SCALE - __checkReturn int -efx_rx_scale_tbl_set( +static __checkReturn int +falconsiena_rx_scale_tbl_set( __in efx_nic_t *enp, __in_ecount(n) unsigned int *table, __in size_t n) @@ -463,9 +1064,6 @@ efx_rx_scale_tbl_set( int index; int rc; - EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX); - EFX_STATIC_ASSERT(EFX_RSS_TBL_SIZE == FR_BZ_RX_INDIRECTION_TBL_ROWS); EFX_STATIC_ASSERT(EFX_MAXRSS == (1 << FRF_BZ_IT_QUEUE_WIDTH)); @@ -478,7 +1076,7 @@ efx_rx_scale_tbl_set( uint32_t byte; /* Calculate the entry to place in the table */ - byte = (uint32_t)table[index % n]; + byte = (n > 0) ? (uint32_t)table[index % n] : 0; EFSYS_PROBE2(table, int, index, uint32_t, byte); @@ -486,18 +1084,18 @@ efx_rx_scale_tbl_set( /* Write the table */ EFX_BAR_TBL_WRITEO(enp, FR_BZ_RX_INDIRECTION_TBL, - index, &oword); + index, &oword, B_TRUE); } for (index = FR_BZ_RX_INDIRECTION_TBL_ROWS - 1; index >= 0; --index) { uint32_t byte; /* Determine if we're starting a new batch */ - byte = (uint32_t)table[index % n]; + byte = (n > 0) ? (uint32_t)table[index % n] : 0; /* Read the table */ EFX_BAR_TBL_READO(enp, FR_BZ_RX_INDIRECTION_TBL, - index, &oword); + index, &oword, B_TRUE); /* Verify the entry */ if (EFX_OWORD_FIELD(oword, FRF_BZ_IT_QUEUE) != byte) { @@ -517,36 +1115,8 @@ efx_rx_scale_tbl_set( } #endif -#if EFSYS_OPT_FILTER -extern __checkReturn int -efx_rx_filter_insert( - __in efx_rxq_t *erp, - __inout efx_filter_spec_t *spec) -{ - EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC); - EFSYS_ASSERT3P(spec, !=, NULL); - - spec->efs_dmaq_id = (uint16_t)erp->er_index; - return (efx_filter_insert_filter(erp->er_enp, spec, B_FALSE)); -} -#endif - -#if EFSYS_OPT_FILTER -extern __checkReturn int -efx_rx_filter_remove( - __in efx_rxq_t *erp, - __inout efx_filter_spec_t *spec) -{ - EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC); - EFSYS_ASSERT3P(spec, !=, NULL); - - spec->efs_dmaq_id = (uint16_t)erp->er_index; - return (efx_filter_remove_filter(erp->er_enp, spec)); -} -#endif - -extern void -efx_rx_qpost( +static void +falconsiena_rx_qpost( __in efx_rxq_t *erp, __in_ecount(n) efsys_dma_addr_t *addrp, __in size_t size, @@ -559,8 +1129,6 @@ efx_rx_qpost( unsigned int offset; unsigned int id; - EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC); - /* The client driver must not overfill the queue */ EFSYS_ASSERT3U(added - completed + n, <=, EFX_RXQ_LIMIT(erp->er_mask + 1)); @@ -585,20 +1153,20 @@ efx_rx_qpost( } } - void -efx_rx_qpush( +static void +falconsiena_rx_qpush( __in efx_rxq_t *erp, - __in unsigned int added) + __in unsigned int added, + __inout unsigned int *pushedp) { efx_nic_t *enp = erp->er_enp; + unsigned int pushed = *pushedp; uint32_t wptr; efx_oword_t oword; efx_dword_t dword; - EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC); - - /* Guarantee ordering of memory (descriptors) and PIO (doorbell) */ - EFSYS_PIO_WRITE_BARRIER(); + /* All descriptors are pushed */ + *pushedp = added; /* Push the populated descriptors out */ wptr = added & erp->er_mask; @@ -608,30 +1176,35 @@ efx_rx_qpush( /* Only write the third DWORD */ EFX_POPULATE_DWORD_1(dword, EFX_DWORD_0, EFX_OWORD_FIELD(oword, EFX_DWORD_3)); + + /* Guarantee ordering of memory (descriptors) and PIO (doorbell) */ + EFX_DMA_SYNC_QUEUE_FOR_DEVICE(erp->er_esmp, erp->er_mask + 1, + wptr, pushed & erp->er_mask); + EFSYS_PIO_WRITE_BARRIER(); EFX_BAR_TBL_WRITED3(enp, FR_BZ_RX_DESC_UPD_REGP0, erp->er_index, &dword, B_FALSE); } - void -efx_rx_qflush( +static __checkReturn int +falconsiena_rx_qflush( __in efx_rxq_t *erp) { efx_nic_t *enp = erp->er_enp; efx_oword_t oword; uint32_t label; - EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC); - label = erp->er_index; /* Flush the queue */ EFX_POPULATE_OWORD_2(oword, FRF_AZ_RX_FLUSH_DESCQ_CMD, 1, FRF_AZ_RX_FLUSH_DESCQ, label); EFX_BAR_WRITEO(enp, FR_AZ_RX_FLUSH_DESCQ_REG, &oword); + + return (0); } - void -efx_rx_qenable( +static void +falconsiena_rx_qenable( __in efx_rxq_t *erp) { efx_nic_t *enp = erp->er_enp; @@ -640,18 +1213,18 @@ efx_rx_qenable( EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC); EFX_BAR_TBL_READO(enp, FR_AZ_RX_DESC_PTR_TBL, - erp->er_index, &oword); + erp->er_index, &oword, B_TRUE); EFX_SET_OWORD_FIELD(oword, FRF_AZ_RX_DC_HW_RPTR, 0); EFX_SET_OWORD_FIELD(oword, FRF_AZ_RX_DESCQ_HW_RPTR, 0); EFX_SET_OWORD_FIELD(oword, FRF_AZ_RX_DESCQ_EN, 1); EFX_BAR_TBL_WRITEO(enp, FR_AZ_RX_DESC_PTR_TBL, - erp->er_index, &oword); + erp->er_index, &oword, B_TRUE); } - __checkReturn int -efx_rx_qcreate( +static __checkReturn int +falconsiena_rx_qcreate( __in efx_nic_t *enp, __in unsigned int index, __in unsigned int label, @@ -660,25 +1233,24 @@ efx_rx_qcreate( __in size_t n, __in uint32_t id, __in efx_evq_t *eep, - __deref_out efx_rxq_t **erpp) + __in efx_rxq_t *erp) { efx_nic_cfg_t *encp = &(enp->en_nic_cfg); - efx_rxq_t *erp; efx_oword_t oword; uint32_t size; boolean_t split; boolean_t jumbo; int rc; - EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX); - EFX_STATIC_ASSERT(EFX_EV_RX_NLABELS == (1 << FRF_AZ_RX_DESCQ_LABEL_WIDTH)); EFSYS_ASSERT3U(label, <, EFX_EV_RX_NLABELS); EFSYS_ASSERT3U(enp->en_rx_qcount + 1, <, encp->enc_rxq_limit); - if (!ISP2(n) || !(n & EFX_RXQ_NDESCS_MASK)) { + EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MAXNDESCS)); + EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MINNDESCS)); + + if (!ISP2(n) || (n < EFX_RXQ_MINNDESCS) || (n > EFX_RXQ_MAXNDESCS)) { rc = EINVAL; goto fail1; } @@ -737,20 +1309,6 @@ efx_rx_qcreate( goto fail4; } - /* Allocate an RXQ object */ - EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (efx_rxq_t), erp); - - if (erp == NULL) { - rc = ENOMEM; - goto fail5; - } - - erp->er_magic = EFX_RXQ_MAGIC; - erp->er_enp = enp; - erp->er_index = index; - erp->er_mask = n - 1; - erp->er_esmp = esmp; - /* Set up the new descriptor queue */ EFX_POPULATE_OWORD_10(oword, FRF_CZ_RX_HDR_SPLIT, split, @@ -765,14 +1323,10 @@ efx_rx_qcreate( FRF_AZ_RX_DESCQ_JUMBO, jumbo); EFX_BAR_TBL_WRITEO(enp, FR_AZ_RX_DESC_PTR_TBL, - erp->er_index, &oword); + erp->er_index, &oword, B_TRUE); - enp->en_rx_qcount++; - *erpp = erp; return (0); -fail5: - EFSYS_PROBE(fail5); fail4: EFSYS_PROBE(fail4); fail3: @@ -785,15 +1339,13 @@ efx_rx_qcreate( return (rc); } - void -efx_rx_qdestroy( +static void +falconsiena_rx_qdestroy( __in efx_rxq_t *erp) { efx_nic_t *enp = erp->er_enp; efx_oword_t oword; - EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC); - EFSYS_ASSERT(enp->en_rx_qcount != 0); --enp->en_rx_qcount; @@ -801,20 +1353,17 @@ efx_rx_qdestroy( EFX_ZERO_OWORD(oword); EFX_BAR_TBL_WRITEO(enp, FR_AZ_RX_DESC_PTR_TBL, - erp->er_index, &oword); + erp->er_index, &oword, B_TRUE); /* Free the RXQ object */ EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_rxq_t), erp); } - void -efx_rx_fini( +static void +falconsiena_rx_fini( __in efx_nic_t *enp) { - EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX); - EFSYS_ASSERT3U(enp->en_rx_qcount, ==, 0); - - enp->en_mod_flags &= ~EFX_MOD_RX; + _NOTE(ARGUNUSED(enp)) } + +#endif /* EFSYS_OPT_FALCON || EFSYS_OPT_SIENA */ diff --git a/sys/dev/sfxge/common/efx_sram.c b/sys/dev/sfxge/common/efx_sram.c index f081adf391e5..4bd951b7466b 100644 --- a/sys/dev/sfxge/common/efx_sram.c +++ b/sys/dev/sfxge/common/efx_sram.c @@ -1,26 +1,31 @@ /*- - * Copyright 2007-2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2007-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -50,6 +55,21 @@ efx_sram_buf_tbl_set( EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC); +#if EFSYS_OPT_HUNTINGTON + if (enp->en_family == EFX_FAMILY_HUNTINGTON) { + /* + * FIXME: the efx_sram_buf_tbl_*() functionality needs to be + * pulled inside the Falcon/Siena queue create/destroy code, + * and then the original functions can be removed (see bug30834 + * comment #1). But, for now, we just ensure that they are + * no-ops for Huntington, to allow bringing up existing drivers + * without modification. + */ + + return (0); + } +#endif /* EFSYS_OPT_HUNTINGTON */ + if (stop >= EFX_BUF_TBL_SIZE) { rc = EFBIG; goto fail1; @@ -156,6 +176,21 @@ efx_sram_buf_tbl_clear( EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC); +#if EFSYS_OPT_HUNTINGTON + if (enp->en_family == EFX_FAMILY_HUNTINGTON) { + /* + * FIXME: the efx_sram_buf_tbl_*() functionality needs to be + * pulled inside the Falcon/Siena queue create/destroy code, + * and then the original functions can be removed (see bug30834 + * comment #1). But, for now, we just ensure that they are + * no-ops for Huntington, to allow bringing up existing drivers + * without modification. + */ + + return; + } +#endif /* EFSYS_OPT_HUNTINGTON */ + EFSYS_ASSERT3U(stop, <, EFX_BUF_TBL_SIZE); EFSYS_PROBE2(buf, uint32_t, start, uint32_t, stop - 1); @@ -262,7 +297,7 @@ efx_sram_bit_sweep_set( } } -efx_sram_pattern_fn_t __cs __efx_sram_pattern_fns[] = { +efx_sram_pattern_fn_t __efx_sram_pattern_fns[] = { efx_sram_byte_increment_set, efx_sram_all_the_same_set, efx_sram_bit_alternate_set, diff --git a/sys/dev/sfxge/common/efx_tx.c b/sys/dev/sfxge/common/efx_tx.c index 2b0f5e5fffdd..a2e876923ed5 100644 --- a/sys/dev/sfxge/common/efx_tx.c +++ b/sys/dev/sfxge/common/efx_tx.c @@ -1,26 +1,31 @@ /*- - * Copyright 2007-2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2007-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -42,11 +47,166 @@ __FBSDID("$FreeBSD$"); #define EFX_TX_QSTAT_INCR(_etp, _stat) #endif +#if EFSYS_OPT_FALCON || EFSYS_OPT_SIENA + +static __checkReturn int +falconsiena_tx_init( + __in efx_nic_t *enp); + +static void +falconsiena_tx_fini( + __in efx_nic_t *enp); + +static __checkReturn int +falconsiena_tx_qcreate( + __in efx_nic_t *enp, + __in unsigned int index, + __in unsigned int label, + __in efsys_mem_t *esmp, + __in size_t n, + __in uint32_t id, + __in uint16_t flags, + __in efx_evq_t *eep, + __in efx_txq_t *etp, + __out unsigned int *addedp); + +static void +falconsiena_tx_qdestroy( + __in efx_txq_t *etp); + +static __checkReturn int +falconsiena_tx_qpost( + __in efx_txq_t *etp, + __in_ecount(n) efx_buffer_t *eb, + __in unsigned int n, + __in unsigned int completed, + __inout unsigned int *addedp); + +static void +falconsiena_tx_qpush( + __in efx_txq_t *etp, + __in unsigned int added, + __in unsigned int pushed); + +static __checkReturn int +falconsiena_tx_qpace( + __in efx_txq_t *etp, + __in unsigned int ns); + +static __checkReturn int +falconsiena_tx_qflush( + __in efx_txq_t *etp); + +static void +falconsiena_tx_qenable( + __in efx_txq_t *etp); + + __checkReturn int +falconsiena_tx_qdesc_post( + __in efx_txq_t *etp, + __in_ecount(n) efx_desc_t *ed, + __in unsigned int n, + __in unsigned int completed, + __inout unsigned int *addedp); + + void +falconsiena_tx_qdesc_dma_create( + __in efx_txq_t *etp, + __in efsys_dma_addr_t addr, + __in size_t size, + __in boolean_t eop, + __out efx_desc_t *edp); + +#if EFSYS_OPT_QSTATS +static void +falconsiena_tx_qstats_update( + __in efx_txq_t *etp, + __inout_ecount(TX_NQSTATS) efsys_stat_t *stat); +#endif + +#endif /* EFSYS_OPT_FALCON || EFSYS_OPT_SIENA */ + + +#if EFSYS_OPT_FALCON +static efx_tx_ops_t __efx_tx_falcon_ops = { + falconsiena_tx_init, /* etxo_init */ + falconsiena_tx_fini, /* etxo_fini */ + falconsiena_tx_qcreate, /* etxo_qcreate */ + falconsiena_tx_qdestroy, /* etxo_qdestroy */ + falconsiena_tx_qpost, /* etxo_qpost */ + falconsiena_tx_qpush, /* etxo_qpush */ + falconsiena_tx_qpace, /* etxo_qpace */ + falconsiena_tx_qflush, /* etxo_qflush */ + falconsiena_tx_qenable, /* etxo_qenable */ + NULL, /* etxo_qpio_enable */ + NULL, /* etxo_qpio_disable */ + NULL, /* etxo_qpio_write */ + NULL, /* etxo_qpio_post */ + falconsiena_tx_qdesc_post, /* etxo_qdesc_post */ + falconsiena_tx_qdesc_dma_create, /* etxo_qdesc_dma_create */ + NULL, /* etxo_qdesc_tso_create */ + NULL, /* etxo_qdesc_vlantci_create */ +#if EFSYS_OPT_QSTATS + falconsiena_tx_qstats_update, /* etxo_qstats_update */ +#endif +}; +#endif /* EFSYS_OPT_FALCON */ + +#if EFSYS_OPT_SIENA +static efx_tx_ops_t __efx_tx_siena_ops = { + falconsiena_tx_init, /* etxo_init */ + falconsiena_tx_fini, /* etxo_fini */ + falconsiena_tx_qcreate, /* etxo_qcreate */ + falconsiena_tx_qdestroy, /* etxo_qdestroy */ + falconsiena_tx_qpost, /* etxo_qpost */ + falconsiena_tx_qpush, /* etxo_qpush */ + falconsiena_tx_qpace, /* etxo_qpace */ + falconsiena_tx_qflush, /* etxo_qflush */ + falconsiena_tx_qenable, /* etxo_qenable */ + NULL, /* etxo_qpio_enable */ + NULL, /* etxo_qpio_disable */ + NULL, /* etxo_qpio_write */ + NULL, /* etxo_qpio_post */ + falconsiena_tx_qdesc_post, /* etxo_qdesc_post */ + falconsiena_tx_qdesc_dma_create, /* etxo_qdesc_dma_create */ + NULL, /* etxo_qdesc_tso_create */ + NULL, /* etxo_qdesc_vlantci_create */ +#if EFSYS_OPT_QSTATS + falconsiena_tx_qstats_update, /* etxo_qstats_update */ +#endif +}; +#endif /* EFSYS_OPT_SIENA */ + +#if EFSYS_OPT_HUNTINGTON +static efx_tx_ops_t __efx_tx_hunt_ops = { + hunt_tx_init, /* etxo_init */ + hunt_tx_fini, /* etxo_fini */ + hunt_tx_qcreate, /* etxo_qcreate */ + hunt_tx_qdestroy, /* etxo_qdestroy */ + hunt_tx_qpost, /* etxo_qpost */ + hunt_tx_qpush, /* etxo_qpush */ + hunt_tx_qpace, /* etxo_qpace */ + hunt_tx_qflush, /* etxo_qflush */ + hunt_tx_qenable, /* etxo_qenable */ + hunt_tx_qpio_enable, /* etxo_qpio_enable */ + hunt_tx_qpio_disable, /* etxo_qpio_disable */ + hunt_tx_qpio_write, /* etxo_qpio_write */ + hunt_tx_qpio_post, /* etxo_qpio_post */ + hunt_tx_qdesc_post, /* etxo_qdesc_post */ + hunt_tx_qdesc_dma_create, /* etxo_qdesc_dma_create */ + hunt_tx_qdesc_tso_create, /* etxo_qdesc_tso_create */ + hunt_tx_qdesc_vlantci_create, /* etxo_qdesc_vlantci_create */ +#if EFSYS_OPT_QSTATS + hunt_tx_qstats_update, /* etxo_qstats_update */ +#endif +}; +#endif /* EFSYS_OPT_HUNTINGTON */ + __checkReturn int efx_tx_init( __in efx_nic_t *enp) { - efx_oword_t oword; + efx_tx_ops_t *etxop; int rc; EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); @@ -62,8 +222,436 @@ efx_tx_init( goto fail2; } + switch (enp->en_family) { +#if EFSYS_OPT_FALCON + case EFX_FAMILY_FALCON: + etxop = (efx_tx_ops_t *)&__efx_tx_falcon_ops; + break; +#endif /* EFSYS_OPT_FALCON */ + +#if EFSYS_OPT_SIENA + case EFX_FAMILY_SIENA: + etxop = (efx_tx_ops_t *)&__efx_tx_siena_ops; + break; +#endif /* EFSYS_OPT_SIENA */ + +#if EFSYS_OPT_HUNTINGTON + case EFX_FAMILY_HUNTINGTON: + etxop = (efx_tx_ops_t *)&__efx_tx_hunt_ops; + break; +#endif /* EFSYS_OPT_HUNTINGTON */ + + default: + EFSYS_ASSERT(0); + rc = ENOTSUP; + goto fail3; + } + EFSYS_ASSERT3U(enp->en_tx_qcount, ==, 0); + if ((rc = etxop->etxo_init(enp)) != 0) + goto fail4; + + enp->en_etxop = etxop; + enp->en_mod_flags |= EFX_MOD_TX; + return (0); + +fail4: + EFSYS_PROBE(fail4); +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + enp->en_etxop = NULL; + enp->en_mod_flags &= ~EFX_MOD_TX; + return (rc); +} + + void +efx_tx_fini( + __in efx_nic_t *enp) +{ + efx_tx_ops_t *etxop = enp->en_etxop; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_TX); + EFSYS_ASSERT3U(enp->en_tx_qcount, ==, 0); + + etxop->etxo_fini(enp); + + enp->en_etxop = NULL; + enp->en_mod_flags &= ~EFX_MOD_TX; +} + + __checkReturn int +efx_tx_qcreate( + __in efx_nic_t *enp, + __in unsigned int index, + __in unsigned int label, + __in efsys_mem_t *esmp, + __in size_t n, + __in uint32_t id, + __in uint16_t flags, + __in efx_evq_t *eep, + __deref_out efx_txq_t **etpp, + __out unsigned int *addedp) +{ + efx_tx_ops_t *etxop = enp->en_etxop; + efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + efx_txq_t *etp; + int rc; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_TX); + + EFSYS_ASSERT3U(enp->en_tx_qcount + 1, <, encp->enc_txq_limit); + + /* Allocate an TXQ object */ + EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (efx_txq_t), etp); + + if (etp == NULL) { + rc = ENOMEM; + goto fail1; + } + + etp->et_magic = EFX_TXQ_MAGIC; + etp->et_enp = enp; + etp->et_index = index; + etp->et_mask = n - 1; + etp->et_esmp = esmp; + + /* Initial descriptor index may be modified by etxo_qcreate */ + *addedp = 0; + + if ((rc = etxop->etxo_qcreate(enp, index, label, esmp, + n, id, flags, eep, etp, addedp)) != 0) + goto fail2; + + enp->en_tx_qcount++; + *etpp = etp; + + return (0); + +fail2: + EFSYS_PROBE(fail2); + EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_txq_t), etp); +fail1: + EFSYS_PROBE1(fail1, int, rc); + return (rc); +} + + void +efx_tx_qdestroy( + __in efx_txq_t *etp) +{ + efx_nic_t *enp = etp->et_enp; + efx_tx_ops_t *etxop = enp->en_etxop; + + EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); + + EFSYS_ASSERT(enp->en_tx_qcount != 0); + --enp->en_tx_qcount; + + etxop->etxo_qdestroy(etp); + + /* Free the TXQ object */ + EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_txq_t), etp); +} + + __checkReturn int +efx_tx_qpost( + __in efx_txq_t *etp, + __in_ecount(n) efx_buffer_t *eb, + __in unsigned int n, + __in unsigned int completed, + __inout unsigned int *addedp) +{ + efx_nic_t *enp = etp->et_enp; + efx_tx_ops_t *etxop = enp->en_etxop; + int rc; + + EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); + + if ((rc = etxop->etxo_qpost(etp, eb, + n, completed, addedp)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + return (rc); +} + + void +efx_tx_qpush( + __in efx_txq_t *etp, + __in unsigned int added, + __in unsigned int pushed) +{ + efx_nic_t *enp = etp->et_enp; + efx_tx_ops_t *etxop = enp->en_etxop; + + EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); + + etxop->etxo_qpush(etp, added, pushed); +} + + __checkReturn int +efx_tx_qpace( + __in efx_txq_t *etp, + __in unsigned int ns) +{ + efx_nic_t *enp = etp->et_enp; + efx_tx_ops_t *etxop = enp->en_etxop; + int rc; + + EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); + + if ((rc = etxop->etxo_qpace(etp, ns)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + return (rc); +} + + __checkReturn int +efx_tx_qflush( + __in efx_txq_t *etp) +{ + efx_nic_t *enp = etp->et_enp; + efx_tx_ops_t *etxop = enp->en_etxop; + int rc; + + EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); + + if ((rc = etxop->etxo_qflush(etp)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + return (rc); +} + + void +efx_tx_qenable( + __in efx_txq_t *etp) +{ + efx_nic_t *enp = etp->et_enp; + efx_tx_ops_t *etxop = enp->en_etxop; + + EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); + + etxop->etxo_qenable(etp); +} + + __checkReturn int +efx_tx_qpio_enable( + __in efx_txq_t *etp) +{ + efx_nic_t *enp = etp->et_enp; + efx_tx_ops_t *etxop = enp->en_etxop; + int rc; + + EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); + + if (~enp->en_features & EFX_FEATURE_PIO_BUFFERS) { + rc = ENOTSUP; + goto fail1; + } + if (etxop->etxo_qpio_enable == NULL) { + rc = ENOTSUP; + goto fail2; + } + if ((rc = etxop->etxo_qpio_enable(etp)) != 0) + goto fail3; + + return (0); + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + return (rc); +} + + void +efx_tx_qpio_disable( + __in efx_txq_t *etp) +{ + efx_nic_t *enp = etp->et_enp; + efx_tx_ops_t *etxop = enp->en_etxop; + + EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); + + if (etxop->etxo_qpio_disable != NULL) + etxop->etxo_qpio_disable(etp); +} + + __checkReturn int +efx_tx_qpio_write( + __in efx_txq_t *etp, + __in_ecount(buf_length) uint8_t *buffer, + __in size_t buf_length, + __in size_t pio_buf_offset) +{ + efx_nic_t *enp = etp->et_enp; + efx_tx_ops_t *etxop = enp->en_etxop; + int rc; + + EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); + + if (etxop->etxo_qpio_write != NULL) { + if ((rc = etxop->etxo_qpio_write(etp, buffer, buf_length, + pio_buf_offset)) != 0) + goto fail1; + return (0); + } + + return (ENOTSUP); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + return (rc); +} + + __checkReturn int +efx_tx_qpio_post( + __in efx_txq_t *etp, + __in size_t pkt_length, + __in unsigned int completed, + __inout unsigned int *addedp) +{ + efx_nic_t *enp = etp->et_enp; + efx_tx_ops_t *etxop = enp->en_etxop; + int rc; + + EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); + + if (etxop->etxo_qpio_post != NULL) { + if ((rc = etxop->etxo_qpio_post(etp, pkt_length, completed, + addedp)) != 0) + goto fail1; + return (0); + } + + return (ENOTSUP); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + return (rc); +} + + __checkReturn int +efx_tx_qdesc_post( + __in efx_txq_t *etp, + __in_ecount(n) efx_desc_t *ed, + __in unsigned int n, + __in unsigned int completed, + __inout unsigned int *addedp) +{ + efx_nic_t *enp = etp->et_enp; + efx_tx_ops_t *etxop = enp->en_etxop; + int rc; + + EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); + + if ((rc = etxop->etxo_qdesc_post(etp, ed, + n, completed, addedp)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + return (rc); +} + + void +efx_tx_qdesc_dma_create( + __in efx_txq_t *etp, + __in efsys_dma_addr_t addr, + __in size_t size, + __in boolean_t eop, + __out efx_desc_t *edp) +{ + efx_nic_t *enp = etp->et_enp; + efx_tx_ops_t *etxop = enp->en_etxop; + + EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); + EFSYS_ASSERT(etxop->etxo_qdesc_dma_create != NULL); + + etxop->etxo_qdesc_dma_create(etp, addr, size, eop, edp); +} + + void +efx_tx_qdesc_tso_create( + __in efx_txq_t *etp, + __in uint16_t ipv4_id, + __in uint32_t tcp_seq, + __in uint8_t tcp_flags, + __out efx_desc_t *edp) +{ + efx_nic_t *enp = etp->et_enp; + efx_tx_ops_t *etxop = enp->en_etxop; + + EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); + EFSYS_ASSERT(etxop->etxo_qdesc_tso_create != NULL); + + etxop->etxo_qdesc_tso_create(etp, ipv4_id, tcp_seq, tcp_flags, edp); +} + + void +efx_tx_qdesc_vlantci_create( + __in efx_txq_t *etp, + __in uint16_t tci, + __out efx_desc_t *edp) +{ + efx_nic_t *enp = etp->et_enp; + efx_tx_ops_t *etxop = enp->en_etxop; + + EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); + EFSYS_ASSERT(etxop->etxo_qdesc_vlantci_create != NULL); + + etxop->etxo_qdesc_vlantci_create(etp, tci, edp); +} + + +#if EFSYS_OPT_QSTATS + void +efx_tx_qstats_update( + __in efx_txq_t *etp, + __inout_ecount(TX_NQSTATS) efsys_stat_t *stat) +{ + efx_nic_t *enp = etp->et_enp; + efx_tx_ops_t *etxop = enp->en_etxop; + + EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); + + etxop->etxo_qstats_update(etp, stat); +} +#endif + + +#if EFSYS_OPT_FALCON || EFSYS_OPT_SIENA + +static __checkReturn int +falconsiena_tx_init( + __in efx_nic_t *enp) +{ + efx_oword_t oword; + /* * Disable the timer-based TX DMA backoff and allow TX DMA to be * controlled by the RX FIFO fill level (although always allow a @@ -93,45 +681,9 @@ efx_tx_init( EFX_SET_OWORD_FIELD(oword, FRF_AZ_TX_NO_EOP_DISC_EN, 0); EFX_BAR_WRITEO(enp, FR_AZ_TX_CFG_REG, &oword); - enp->en_mod_flags |= EFX_MOD_TX; return (0); - -fail2: - EFSYS_PROBE(fail2); -fail1: - EFSYS_PROBE1(fail1, int, rc); - - return (rc); } -#if EFSYS_OPT_FILTER -extern __checkReturn int -efx_tx_filter_insert( - __in efx_txq_t *etp, - __inout efx_filter_spec_t *spec) -{ - EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); - EFSYS_ASSERT3P(spec, !=, NULL); - - spec->efs_dmaq_id = (uint16_t)etp->et_index; - return (efx_filter_insert_filter(etp->et_enp, spec, B_FALSE)); -} -#endif - -#if EFSYS_OPT_FILTER -extern __checkReturn int -efx_tx_filter_remove( - __in efx_txq_t *etp, - __inout efx_filter_spec_t *spec) -{ - EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); - EFSYS_ASSERT3P(spec, !=, NULL); - - spec->efs_dmaq_id = (uint16_t)etp->et_index; - return (efx_filter_remove_filter(etp->et_enp, spec)); -} -#endif - #define EFX_TX_DESC(_etp, _addr, _size, _eop, _added) \ do { \ unsigned int id; \ @@ -157,8 +709,8 @@ efx_tx_filter_remove( _NOTE(CONSTANTCONDITION) \ } while (B_FALSE) - __checkReturn int -efx_tx_qpost( +static __checkReturn int +falconsiena_tx_qpost( __in efx_txq_t *etp, __in_ecount(n) efx_buffer_t *eb, __in unsigned int n, @@ -169,8 +721,6 @@ efx_tx_qpost( unsigned int i; int rc = ENOSPC; - EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); - if (added - completed + n > EFX_TXQ_LIMIT(etp->et_mask + 1)) goto fail1; @@ -197,21 +747,17 @@ efx_tx_qpost( return (rc); } - void -efx_tx_qpush( +static void +falconsiena_tx_qpush( __in efx_txq_t *etp, - __in unsigned int added) + __in unsigned int added, + __in unsigned int pushed) { efx_nic_t *enp = etp->et_enp; uint32_t wptr; efx_dword_t dword; efx_oword_t oword; - EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); - - /* Guarantee ordering of memory (descriptors) and PIO (doorbell) */ - EFSYS_PIO_WRITE_BARRIER(); - /* Push the populated descriptors out */ wptr = added & etp->et_mask; @@ -220,6 +766,11 @@ efx_tx_qpush( /* Only write the third DWORD */ EFX_POPULATE_DWORD_1(dword, EFX_DWORD_0, EFX_OWORD_FIELD(oword, EFX_DWORD_3)); + + /* Guarantee ordering of memory (descriptors) and PIO (doorbell) */ + EFX_DMA_SYNC_QUEUE_FOR_DEVICE(etp->et_esmp, etp->et_mask + 1, + wptr, pushed & etp->et_mask); + EFSYS_PIO_WRITE_BARRIER(); EFX_BAR_TBL_WRITED3(enp, FR_BZ_TX_DESC_UPD_REGP0, etp->et_index, &dword, B_FALSE); } @@ -227,8 +778,8 @@ efx_tx_qpush( #define EFX_MAX_PACE_VALUE 20 #define EFX_TX_PACE_CLOCK_BASE 104 - __checkReturn int -efx_tx_qpace( +static __checkReturn int +falconsiena_tx_qpace( __in efx_txq_t *etp, __in unsigned int ns) { @@ -239,8 +790,6 @@ efx_tx_qpace( unsigned int timer_period; int rc; - EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); - if (ns == 0) { pace_val = 0; } else { @@ -261,7 +810,8 @@ efx_tx_qpace( /* Update the pacing table */ EFX_POPULATE_OWORD_1(oword, FRF_AZ_TX_PACE, pace_val); - EFX_BAR_TBL_WRITEO(enp, FR_AZ_TX_PACE_TBL, etp->et_index, &oword); + EFX_BAR_TBL_WRITEO(enp, FR_AZ_TX_PACE_TBL, etp->et_index, + &oword, B_TRUE); return (0); @@ -271,16 +821,14 @@ efx_tx_qpace( return (rc); } - void -efx_tx_qflush( - __in efx_txq_t *etp) +static __checkReturn int +falconsiena_tx_qflush( + __in efx_txq_t *etp) { efx_nic_t *enp = etp->et_enp; efx_oword_t oword; uint32_t label; - EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); - efx_tx_qpace(etp, 0); label = etp->et_index; @@ -289,19 +837,19 @@ efx_tx_qflush( EFX_POPULATE_OWORD_2(oword, FRF_AZ_TX_FLUSH_DESCQ_CMD, 1, FRF_AZ_TX_FLUSH_DESCQ, label); EFX_BAR_WRITEO(enp, FR_AZ_TX_FLUSH_DESCQ_REG, &oword); + + return (0); } - void -efx_tx_qenable( +static void +falconsiena_tx_qenable( __in efx_txq_t *etp) { efx_nic_t *enp = etp->et_enp; efx_oword_t oword; - EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); - EFX_BAR_TBL_READO(enp, FR_AZ_TX_DESC_PTR_TBL, - etp->et_index, &oword); + etp->et_index, &oword, B_TRUE); EFSYS_PROBE5(tx_descq_ptr, unsigned int, etp->et_index, uint32_t, EFX_OWORD_FIELD(oword, EFX_DWORD_3), @@ -314,11 +862,11 @@ efx_tx_qenable( EFX_SET_OWORD_FIELD(oword, FRF_AZ_TX_DESCQ_EN, 1); EFX_BAR_TBL_WRITEO(enp, FR_AZ_TX_DESC_PTR_TBL, - etp->et_index, &oword); + etp->et_index, &oword, B_TRUE); } - __checkReturn int -efx_tx_qcreate( +static __checkReturn int +falconsiena_tx_qcreate( __in efx_nic_t *enp, __in unsigned int index, __in unsigned int label, @@ -327,23 +875,22 @@ efx_tx_qcreate( __in uint32_t id, __in uint16_t flags, __in efx_evq_t *eep, - __deref_out efx_txq_t **etpp) + __in efx_txq_t *etp, + __out unsigned int *addedp) { efx_nic_cfg_t *encp = &(enp->en_nic_cfg); - efx_txq_t *etp; efx_oword_t oword; uint32_t size; int rc; - EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_TX); - EFX_STATIC_ASSERT(EFX_EV_TX_NLABELS == (1 << FRF_AZ_TX_DESCQ_LABEL_WIDTH)); EFSYS_ASSERT3U(label, <, EFX_EV_TX_NLABELS); - EFSYS_ASSERT3U(enp->en_tx_qcount + 1, <, encp->enc_txq_limit); - if (!ISP2(n) || !(n & EFX_TXQ_NDESCS_MASK)) { + EFSYS_ASSERT(ISP2(EFX_TXQ_MAXNDESCS(encp))); + EFX_STATIC_ASSERT(ISP2(EFX_TXQ_MINNDESCS)); + + if (!ISP2(n) || (n < EFX_TXQ_MINNDESCS) || (n > EFX_EVQ_MAXNEVS)) { rc = EINVAL; goto fail1; } @@ -351,7 +898,8 @@ efx_tx_qcreate( rc = EINVAL; goto fail2; } - for (size = 0; (1 << size) <= (EFX_TXQ_MAXNDESCS / EFX_TXQ_MINNDESCS); + for (size = 0; + (1 << size) <= (EFX_TXQ_MAXNDESCS(encp) / EFX_TXQ_MINNDESCS); size++) if ((1 << size) == (int)(n / EFX_TXQ_MINNDESCS)) break; @@ -360,20 +908,6 @@ efx_tx_qcreate( goto fail3; } - /* Allocate an TXQ object */ - EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (efx_txq_t), etp); - - if (etp == NULL) { - rc = ENOMEM; - goto fail4; - } - - etp->et_magic = EFX_TXQ_MAGIC; - etp->et_enp = enp; - etp->et_index = index; - etp->et_mask = n - 1; - etp->et_esmp = esmp; - /* Set up the new descriptor queue */ EFX_POPULATE_OWORD_6(oword, FRF_AZ_TX_DESCQ_BUF_BASE_ID, id, @@ -390,14 +924,10 @@ efx_tx_qcreate( (flags & EFX_CKSUM_TCPUDP) ? 0 : 1); EFX_BAR_TBL_WRITEO(enp, FR_AZ_TX_DESC_PTR_TBL, - etp->et_index, &oword); + etp->et_index, &oword, B_TRUE); - enp->en_tx_qcount++; - *etpp = etp; return (0); -fail4: - EFSYS_PROBE(fail4); fail3: EFSYS_PROBE(fail3); fail2: @@ -408,16 +938,83 @@ efx_tx_qcreate( return (rc); } + __checkReturn int +falconsiena_tx_qdesc_post( + __in efx_txq_t *etp, + __in_ecount(n) efx_desc_t *ed, + __in unsigned int n, + __in unsigned int completed, + __inout unsigned int *addedp) +{ + unsigned int added = *addedp; + unsigned int i; + int rc; + + if (added - completed + n > EFX_TXQ_LIMIT(etp->et_mask + 1)) { + rc = ENOSPC; + goto fail1; + } + + for (i = 0; i < n; i++) { + efx_desc_t *edp = &ed[i]; + unsigned int id; + size_t offset; + + id = added++ & etp->et_mask; + offset = id * sizeof (efx_desc_t); + + EFSYS_MEM_WRITEQ(etp->et_esmp, offset, &edp->ed_eq); + } + + EFSYS_PROBE3(tx_desc_post, unsigned int, etp->et_index, + unsigned int, added, unsigned int, n); + + EFX_TX_QSTAT_INCR(etp, TX_POST); + + *addedp = added; + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + return (rc); +} + + void +falconsiena_tx_qdesc_dma_create( + __in efx_txq_t *etp, + __in efsys_dma_addr_t addr, + __in size_t size, + __in boolean_t eop, + __out efx_desc_t *edp) +{ + /* Fragments must not span 4k boundaries. */ + EFSYS_ASSERT(P2ROUNDUP(addr + 1, 4096) >= addr + size); + + EFSYS_PROBE4(tx_desc_dma_create, unsigned int, etp->et_index, + efsys_dma_addr_t, addr, + size_t, size, boolean_t, eop); + + EFX_POPULATE_QWORD_4(edp->ed_eq, + FSF_AZ_TX_KER_CONT, eop ? 0 : 1, + FSF_AZ_TX_KER_BYTE_COUNT, (uint32_t)size, + FSF_AZ_TX_KER_BUF_ADDR_DW0, + (uint32_t)(addr & 0xffffffff), + FSF_AZ_TX_KER_BUF_ADDR_DW1, + (uint32_t)(addr >> 32)); +} + +#endif /* EFSYS_OPT_FALCON || EFSYS_OPT_SIENA */ + #if EFSYS_OPT_QSTATS #if EFSYS_OPT_NAMES -/* START MKCONFIG GENERATED EfxTransmitQueueStatNamesBlock 78ca9ab00287fffb */ -static const char __cs * __cs __efx_tx_qstat_name[] = { +/* START MKCONFIG GENERATED EfxTransmitQueueStatNamesBlock 9d8d26a0a5e2c453 */ +static const char *__efx_tx_qstat_name[] = { "post", - "unaligned_split", + "post_pio", }; /* END MKCONFIG GENERATED EfxTransmitQueueStatNamesBlock */ - const char __cs * + const char * efx_tx_qstat_name( __in efx_nic_t *enp, __in unsigned int id) @@ -429,18 +1026,18 @@ efx_tx_qstat_name( return (__efx_tx_qstat_name[id]); } #endif /* EFSYS_OPT_NAMES */ -#endif /* EFSYS_OPT_QSTATS */ +#endif /* EFSYS_OPT_QSTATS */ + +#if EFSYS_OPT_FALCON || EFSYS_OPT_SIENA #if EFSYS_OPT_QSTATS - void -efx_tx_qstats_update( +static void +falconsiena_tx_qstats_update( __in efx_txq_t *etp, __inout_ecount(TX_NQSTATS) efsys_stat_t *stat) { unsigned int id; - EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); - for (id = 0; id < TX_NQSTATS; id++) { efsys_stat_t *essp = &stat[id]; @@ -450,36 +1047,25 @@ efx_tx_qstats_update( } #endif /* EFSYS_OPT_QSTATS */ - void -efx_tx_qdestroy( +static void +falconsiena_tx_qdestroy( __in efx_txq_t *etp) { efx_nic_t *enp = etp->et_enp; efx_oword_t oword; - EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC); - - EFSYS_ASSERT(enp->en_tx_qcount != 0); - --enp->en_tx_qcount; - /* Purge descriptor queue */ EFX_ZERO_OWORD(oword); EFX_BAR_TBL_WRITEO(enp, FR_AZ_TX_DESC_PTR_TBL, - etp->et_index, &oword); - - /* Free the TXQ object */ - EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_txq_t), etp); + etp->et_index, &oword, B_TRUE); } - void -efx_tx_fini( +static void +falconsiena_tx_fini( __in efx_nic_t *enp) { - EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC); - EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_TX); - EFSYS_ASSERT3U(enp->en_tx_qcount, ==, 0); - - enp->en_mod_flags &= ~EFX_MOD_TX; + _NOTE(ARGUNUSED(enp)) } + +#endif /* EFSYS_OPT_FALCON || EFSYS_OPT_SIENA */ diff --git a/sys/dev/sfxge/common/efx_types.h b/sys/dev/sfxge/common/efx_types.h index 9fbaea11a76b..ee357b1c0dc6 100644 --- a/sys/dev/sfxge/common/efx_types.h +++ b/sys/dev/sfxge/common/efx_types.h @@ -1,26 +1,31 @@ /*- - * Copyright 2007-2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2007-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. * * Ackowledgement to Fen Systems Ltd. * @@ -113,11 +118,10 @@ extern "C" { #define EFX_DWORD_3_LBN 96 #define EFX_DWORD_3_WIDTH 32 -#define EFX_QWORD_0_LBN 0 -#define EFX_QWORD_0_WIDTH 64 - -#define EFX_QWORD_1_LBN 64 -#define EFX_QWORD_1_WIDTH 64 +/* There are intentionally no EFX_QWORD_0 or EFX_QWORD_1 field definitions + * here as the implementaion of EFX_QWORD_FIELD and EFX_OWORD_FIELD do not + * support field widths larger than 32 bits. + */ /* Specified attribute (i.e. LBN ow WIDTH) of the specified field */ #define EFX_VAL(_field, _attribute) \ @@ -229,6 +233,9 @@ typedef union efx_oword_u { efx_word_t eo_word[8]; efx_dword_t eo_dword[4]; efx_qword_t eo_qword[2]; +#if EFSYS_HAS_SSE2_M128 + __m128i eo_u128[1]; +#endif #if EFSYS_HAS_UINT64 uint64_t eo_u64[2]; #endif @@ -891,11 +898,7 @@ extern int fix_lint; #define EFX_ZERO_OWORD(_oword) \ EFX_POPULATE_OWORD_1(_oword, EFX_DUMMY_FIELD, 0) -#define EFX_SET_OWORD64(_oword) \ - EFX_POPULATE_OWORD_2(_oword, \ - EFX_QWORD_0, (uint64_t)-1, EFX_QWORD_1, (uint64_t)-1) - -#define EFX_SET_OWORD32(_oword) \ +#define EFX_SET_OWORD(_oword) \ EFX_POPULATE_OWORD_4(_oword, \ EFX_DWORD_0, 0xffffffff, EFX_DWORD_1, 0xffffffff, \ EFX_DWORD_2, 0xffffffff, EFX_DWORD_3, 0xffffffff) @@ -969,11 +972,7 @@ extern int fix_lint; #define EFX_ZERO_QWORD(_qword) \ EFX_POPULATE_QWORD_1(_qword, EFX_DUMMY_FIELD, 0) -#define EFX_SET_QWORD64(_qword) \ - EFX_POPULATE_QWORD_1(_qword, \ - EFX_QWORD_0, (uint64_t)-1) - -#define EFX_SET_QWORD32(_qword) \ +#define EFX_SET_QWORD(_qword) \ EFX_POPULATE_QWORD_2(_qword, \ EFX_DWORD_0, 0xffffffff, EFX_DWORD_1, 0xffffffff) @@ -1380,6 +1379,23 @@ extern int fix_lint; _NOTE(CONSTANTCONDITION) \ } while (B_FALSE) +#define EFX_TEST_OWORD_BIT64(_oword, _bit) \ + (((_oword).eo_u64[0] & \ + __CPU_TO_LE_64(EFX_SHIFT64(_bit, FIX_LINT(0)))) || \ + ((_oword).eo_u64[1] & \ + __CPU_TO_LE_64(EFX_SHIFT64(_bit, FIX_LINT(64))))) + +#define EFX_TEST_OWORD_BIT32(_oword, _bit) \ + (((_oword).eo_u32[0] & \ + __CPU_TO_LE_32(EFX_SHIFT32(_bit, FIX_LINT(0)))) || \ + ((_oword).eo_u32[1] & \ + __CPU_TO_LE_32(EFX_SHIFT32(_bit, FIX_LINT(32)))) || \ + ((_oword).eo_u32[2] & \ + __CPU_TO_LE_32(EFX_SHIFT32(_bit, FIX_LINT(64)))) || \ + ((_oword).eo_u32[3] & \ + __CPU_TO_LE_32(EFX_SHIFT32(_bit, FIX_LINT(96))))) + + #define EFX_SET_QWORD_BIT64(_qword, _bit) \ do { \ _NOTE(CONSTANTCONDITION) \ @@ -1416,6 +1432,17 @@ extern int fix_lint; _NOTE(CONSTANTCONDITION) \ } while (B_FALSE) +#define EFX_TEST_QWORD_BIT64(_qword, _bit) \ + (((_qword).eq_u64[0] & \ + __CPU_TO_LE_64(EFX_SHIFT64(_bit, FIX_LINT(0)))) != 0) + +#define EFX_TEST_QWORD_BIT32(_qword, _bit) \ + (((_qword).eq_u32[0] & \ + __CPU_TO_LE_32(EFX_SHIFT32(_bit, FIX_LINT(0)))) || \ + ((_qword).eq_u32[1] & \ + __CPU_TO_LE_32(EFX_SHIFT32(_bit, FIX_LINT(32))))) + + #define EFX_SET_DWORD_BIT(_dword, _bit) \ do { \ (_dword).ed_u32[0] |= \ @@ -1430,6 +1457,11 @@ extern int fix_lint; _NOTE(CONSTANTCONDITION) \ } while (B_FALSE) +#define EFX_TEST_DWORD_BIT(_dword, _bit) \ + (((_dword).ed_u32[0] & \ + __CPU_TO_LE_32(EFX_SHIFT32(_bit, FIX_LINT(0)))) != 0) + + #define EFX_SET_WORD_BIT(_word, _bit) \ do { \ (_word).ew_u16[0] |= \ @@ -1444,6 +1476,11 @@ extern int fix_lint; _NOTE(CONSTANTCONDITION) \ } while (B_FALSE) +#define EFX_TEST_WORD_BIT(_word, _bit) \ + (((_word).ew_u16[0] & \ + __CPU_TO_LE_16(EFX_SHIFT16(_bit, FIX_LINT(0)))) != 0) + + #define EFX_SET_BYTE_BIT(_byte, _bit) \ do { \ (_byte).eb_u8[0] |= \ @@ -1458,6 +1495,11 @@ extern int fix_lint; _NOTE(CONSTANTCONDITION) \ } while (B_FALSE) +#define EFX_TEST_BYTE_BIT(_byte, _bit) \ + (((_byte).eb_u8[0] & \ + __NATIVE_8(EFX_SHIFT8(_bit, FIX_LINT(0)))) != 0) + + #define EFX_OR_OWORD64(_oword1, _oword2) \ do { \ (_oword1).eo_u64[0] |= (_oword2).eo_u64[0]; \ @@ -1563,18 +1605,18 @@ extern int fix_lint; #define EFX_QWORD_IS_SET EFX_QWORD_IS_SET64 #define EFX_POPULATE_OWORD EFX_POPULATE_OWORD64 #define EFX_POPULATE_QWORD EFX_POPULATE_QWORD64 -#define EFX_SET_OWORD EFX_SET_OWORD64 -#define EFX_SET_QWORD EFX_SET_QWORD64 #define EFX_SET_OWORD_FIELD EFX_SET_OWORD_FIELD64 #define EFX_SET_QWORD_FIELD EFX_SET_QWORD_FIELD64 #define EFX_SET_OWORD_BIT EFX_SET_OWORD_BIT64 #define EFX_CLEAR_OWORD_BIT EFX_CLEAR_OWORD_BIT64 +#define EFX_TEST_OWORD_BIT EFX_TEST_OWORD_BIT64 #define EFX_SET_QWORD_BIT EFX_SET_QWORD_BIT64 #define EFX_CLEAR_QWORD_BIT EFX_CLEAR_QWORD_BIT64 +#define EFX_TEST_QWORD_BIT EFX_TEST_QWORD_BIT64 #define EFX_OR_OWORD EFX_OR_OWORD64 #define EFX_AND_OWORD EFX_AND_OWORD64 #define EFX_OR_QWORD EFX_OR_QWORD64 -#define EFX_AND_QWORD EFX_OR_QWORD64 +#define EFX_AND_QWORD EFX_AND_QWORD64 #else #define EFX_OWORD_FIELD EFX_OWORD_FIELD32 #define EFX_QWORD_FIELD EFX_QWORD_FIELD32 @@ -1586,18 +1628,18 @@ extern int fix_lint; #define EFX_QWORD_IS_SET EFX_QWORD_IS_SET32 #define EFX_POPULATE_OWORD EFX_POPULATE_OWORD32 #define EFX_POPULATE_QWORD EFX_POPULATE_QWORD32 -#define EFX_SET_OWORD EFX_SET_OWORD32 -#define EFX_SET_QWORD EFX_SET_QWORD32 #define EFX_SET_OWORD_FIELD EFX_SET_OWORD_FIELD32 #define EFX_SET_QWORD_FIELD EFX_SET_QWORD_FIELD32 #define EFX_SET_OWORD_BIT EFX_SET_OWORD_BIT32 #define EFX_CLEAR_OWORD_BIT EFX_CLEAR_OWORD_BIT32 +#define EFX_TEST_OWORD_BIT EFX_TEST_OWORD_BIT32 #define EFX_SET_QWORD_BIT EFX_SET_QWORD_BIT32 #define EFX_CLEAR_QWORD_BIT EFX_CLEAR_QWORD_BIT32 +#define EFX_TEST_QWORD_BIT EFX_TEST_QWORD_BIT32 #define EFX_OR_OWORD EFX_OR_OWORD32 #define EFX_AND_OWORD EFX_AND_OWORD32 #define EFX_OR_QWORD EFX_OR_QWORD32 -#define EFX_AND_QWORD EFX_OR_QWORD32 +#define EFX_AND_QWORD EFX_AND_QWORD32 #endif #ifdef __cplusplus diff --git a/sys/dev/sfxge/common/efx_vpd.c b/sys/dev/sfxge/common/efx_vpd.c index 399c0567efab..812070a66388 100644 --- a/sys/dev/sfxge/common/efx_vpd.c +++ b/sys/dev/sfxge/common/efx_vpd.c @@ -1,26 +1,31 @@ /*- - * Copyright 2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2009-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -54,7 +59,7 @@ __FBSDID("$FreeBSD$"); #if EFSYS_OPT_FALCON -static efx_vpd_ops_t __cs __efx_vpd_falcon_ops = { +static efx_vpd_ops_t __efx_vpd_falcon_ops = { NULL, /* evpdo_init */ falcon_vpd_size, /* evpdo_size */ falcon_vpd_read, /* evpdo_read */ @@ -71,7 +76,7 @@ static efx_vpd_ops_t __cs __efx_vpd_falcon_ops = { #if EFSYS_OPT_SIENA -static efx_vpd_ops_t __cs __efx_vpd_siena_ops = { +static efx_vpd_ops_t __efx_vpd_siena_ops = { siena_vpd_init, /* evpdo_init */ siena_vpd_size, /* evpdo_size */ siena_vpd_read, /* evpdo_read */ @@ -86,6 +91,23 @@ static efx_vpd_ops_t __cs __efx_vpd_siena_ops = { #endif /* EFSYS_OPT_SIENA */ +#if EFSYS_OPT_HUNTINGTON + +static efx_vpd_ops_t __efx_vpd_hunt_ops = { + hunt_vpd_init, /* evpdo_init */ + hunt_vpd_size, /* evpdo_size */ + hunt_vpd_read, /* evpdo_read */ + hunt_vpd_verify, /* evpdo_verify */ + hunt_vpd_reinit, /* evpdo_reinit */ + hunt_vpd_get, /* evpdo_get */ + hunt_vpd_set, /* evpdo_set */ + hunt_vpd_next, /* evpdo_next */ + hunt_vpd_write, /* evpdo_write */ + hunt_vpd_fini, /* evpdo_fini */ +}; + +#endif /* EFSYS_OPT_HUNTINGTON */ + __checkReturn int efx_vpd_init( __in efx_nic_t *enp) @@ -110,6 +132,12 @@ efx_vpd_init( break; #endif /* EFSYS_OPT_SIENA */ +#if EFSYS_OPT_HUNTINGTON + case EFX_FAMILY_HUNTINGTON: + evpdop = (efx_vpd_ops_t *)&__efx_vpd_hunt_ops; + break; +#endif /* EFSYS_OPT_HUNTINGTON */ + default: EFSYS_ASSERT(0); rc = ENOTSUP; @@ -566,14 +594,14 @@ efx_vpd_hunk_verify( return (rc); } -static uint8_t __cs __efx_vpd_blank_pid[] = { +static uint8_t __efx_vpd_blank_pid[] = { /* Large resource type ID length 1 */ 0x82, 0x01, 0x00, /* Product name ' ' */ 0x32, }; -static uint8_t __cs __efx_vpd_blank_r[] = { +static uint8_t __efx_vpd_blank_r[] = { /* Large resource type VPD-R length 4 */ 0x90, 0x04, 0x00, /* RV keyword length 1 */ @@ -584,7 +612,7 @@ static uint8_t __cs __efx_vpd_blank_r[] = { __checkReturn int efx_vpd_hunk_reinit( - __in caddr_t data, + __in_bcount(size) caddr_t data, __in size_t size, __in boolean_t wantpid) { diff --git a/sys/dev/sfxge/common/efx_wol.c b/sys/dev/sfxge/common/efx_wol.c index 89a80c779f14..2e1b4a169de2 100644 --- a/sys/dev/sfxge/common/efx_wol.c +++ b/sys/dev/sfxge/common/efx_wol.c @@ -1,26 +1,31 @@ /*- - * Copyright 2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2009-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -67,17 +72,19 @@ efx_wol_filter_clear( __in efx_nic_t *enp) { efx_mcdi_req_t req; - uint8_t payload[MC_CMD_WOL_FILTER_RESET_IN_LEN]; + uint8_t payload[MAX(MC_CMD_WOL_FILTER_RESET_IN_LEN, + MC_CMD_WOL_FILTER_RESET_OUT_LEN)]; int rc; EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_WOL); + (void) memset(payload, 0, sizeof (payload)); req.emr_cmd = MC_CMD_WOL_FILTER_RESET; req.emr_in_buf = payload; req.emr_in_length = MC_CMD_WOL_FILTER_RESET_IN_LEN; - req.emr_out_buf = NULL; - req.emr_out_length = 0; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_WOL_FILTER_RESET_OUT_LEN; MCDI_IN_SET_DWORD(req, WOL_FILTER_RESET_IN_MASK, MC_CMD_WOL_FILTER_RESET_IN_WAKE_FILTERS | @@ -114,8 +121,8 @@ efx_wol_filter_add( EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_WOL); + (void) memset(payload, 0, sizeof (payload)); req.emr_cmd = MC_CMD_WOL_FILTER_SET; - (void) memset(payload, '\0', sizeof (payload)); req.emr_in_buf = payload; req.emr_in_length = MC_CMD_WOL_FILTER_SET_IN_LEN; req.emr_out_buf = payload; @@ -226,18 +233,19 @@ efx_wol_filter_remove( __in uint32_t filter_id) { efx_mcdi_req_t req; - uint8_t payload[MC_CMD_WOL_FILTER_REMOVE_IN_LEN]; + uint8_t payload[MAX(MC_CMD_WOL_FILTER_REMOVE_IN_LEN, + MC_CMD_WOL_FILTER_REMOVE_OUT_LEN)]; int rc; EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_WOL); + (void) memset(payload, 0, sizeof (payload)); req.emr_cmd = MC_CMD_WOL_FILTER_REMOVE; req.emr_in_buf = payload; req.emr_in_length = MC_CMD_WOL_FILTER_REMOVE_IN_LEN; - EFX_STATIC_ASSERT(MC_CMD_WOL_FILTER_REMOVE_OUT_LEN == 0); - req.emr_out_buf = NULL; - req.emr_out_length = 0; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_WOL_FILTER_REMOVE_OUT_LEN; MCDI_IN_SET_DWORD(req, WOL_FILTER_REMOVE_IN_FILTER_ID, filter_id); @@ -273,6 +281,7 @@ efx_lightsout_offload_add( EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_WOL); + (void) memset(payload, 0, sizeof (payload)); req.emr_cmd = MC_CMD_ADD_LIGHTSOUT_OFFLOAD; req.emr_in_buf = payload; req.emr_in_length = sizeof (type); @@ -282,6 +291,7 @@ efx_lightsout_offload_add( switch (type) { case EFX_LIGHTSOUT_OFFLOAD_TYPE_ARP: req.emr_in_length = MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_LEN; + MCDI_IN_SET_DWORD(req, ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL, MC_CMD_LIGHTSOUT_OFFLOAD_PROTOCOL_ARP); EFX_MAC_ADDR_COPY(MCDI_IN2(req, uint8_t, @@ -292,6 +302,7 @@ efx_lightsout_offload_add( break; case EFX_LIGHTSOUT_OFFLOAD_TYPE_NS: req.emr_in_length = MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_LEN; + MCDI_IN_SET_DWORD(req, ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL, MC_CMD_LIGHTSOUT_OFFLOAD_PROTOCOL_NS); EFX_MAC_ADDR_COPY(MCDI_IN2(req, uint8_t, @@ -305,25 +316,28 @@ efx_lightsout_offload_add( paramp->elop_ns.ip, sizeof (paramp->elop_ns.ip)); break; default: - EFSYS_ASSERT3U(type, !=, type); + rc = EINVAL; + goto fail1; } efx_mcdi_execute(enp, &req); if (req.emr_rc != 0) { rc = req.emr_rc; - goto fail1; + goto fail2; } if (req.emr_out_length_used < MC_CMD_ADD_LIGHTSOUT_OFFLOAD_OUT_LEN) { rc = EMSGSIZE; - goto fail2; + goto fail3; } *filter_idp = MCDI_OUT_DWORD(req, ADD_LIGHTSOUT_OFFLOAD_OUT_FILTER_ID); return (0); +fail3: + EFSYS_PROBE(fail3); fail2: EFSYS_PROBE(fail2); fail1: @@ -340,18 +354,19 @@ efx_lightsout_offload_remove( __in uint32_t filter_id) { efx_mcdi_req_t req; - uint8_t payload[MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_LEN]; + uint8_t payload[MAX(MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_LEN, + MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_OUT_LEN)]; int rc; EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_WOL); + (void) memset(payload, 0, sizeof (payload)); req.emr_cmd = MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD; req.emr_in_buf = payload; - req.emr_in_length = sizeof (payload); - EFX_STATIC_ASSERT(MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_OUT_LEN == 0); - req.emr_out_buf = NULL; - req.emr_out_length = 0; + req.emr_in_length = MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_OUT_LEN; switch (type) { case EFX_LIGHTSOUT_OFFLOAD_TYPE_ARP: @@ -363,7 +378,8 @@ efx_lightsout_offload_remove( MC_CMD_LIGHTSOUT_OFFLOAD_PROTOCOL_NS); break; default: - EFSYS_ASSERT3U(type, !=, type); + rc = EINVAL; + goto fail1; } MCDI_IN_SET_DWORD(req, REMOVE_LIGHTSOUT_OFFLOAD_IN_FILTER_ID, @@ -373,11 +389,13 @@ efx_lightsout_offload_remove( if (req.emr_rc != 0) { rc = req.emr_rc; - goto fail1; + goto fail2; } return (0); +fail2: + EFSYS_PROBE(fail2); fail1: EFSYS_PROBE1(fail1, int, rc); diff --git a/sys/dev/sfxge/common/hunt_ev.c b/sys/dev/sfxge/common/hunt_ev.c new file mode 100644 index 000000000000..8e5cf89bc215 --- /dev/null +++ b/sys/dev/sfxge/common/hunt_ev.c @@ -0,0 +1,1010 @@ +/*- + * Copyright (c) 2012-2015 Solarflare Communications Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "efsys.h" +#include "efx.h" +#include "efx_types.h" +#include "efx_regs.h" +#include "efx_impl.h" +#if EFSYS_OPT_MON_STATS +#include "mcdi_mon.h" +#endif + +#if EFSYS_OPT_HUNTINGTON + +#if EFSYS_OPT_QSTATS +#define EFX_EV_QSTAT_INCR(_eep, _stat) \ + do { \ + (_eep)->ee_stat[_stat]++; \ + _NOTE(CONSTANTCONDITION) \ + } while (B_FALSE) +#else +#define EFX_EV_QSTAT_INCR(_eep, _stat) +#endif + + +static __checkReturn boolean_t +hunt_ev_rx( + __in efx_evq_t *eep, + __in efx_qword_t *eqp, + __in const efx_ev_callbacks_t *eecp, + __in_opt void *arg); + +static __checkReturn boolean_t +hunt_ev_tx( + __in efx_evq_t *eep, + __in efx_qword_t *eqp, + __in const efx_ev_callbacks_t *eecp, + __in_opt void *arg); + +static __checkReturn boolean_t +hunt_ev_driver( + __in efx_evq_t *eep, + __in efx_qword_t *eqp, + __in const efx_ev_callbacks_t *eecp, + __in_opt void *arg); + +static __checkReturn boolean_t +hunt_ev_drv_gen( + __in efx_evq_t *eep, + __in efx_qword_t *eqp, + __in const efx_ev_callbacks_t *eecp, + __in_opt void *arg); + +static __checkReturn boolean_t +hunt_ev_mcdi( + __in efx_evq_t *eep, + __in efx_qword_t *eqp, + __in const efx_ev_callbacks_t *eecp, + __in_opt void *arg); + + +static __checkReturn int +efx_mcdi_init_evq( + __in efx_nic_t *enp, + __in unsigned int instance, + __in efsys_mem_t *esmp, + __in size_t nevs, + __in uint32_t irq, + __out_opt uint32_t *irqp) +{ + efx_mcdi_req_t req; + uint8_t payload[ + MAX(MC_CMD_INIT_EVQ_IN_LEN(EFX_EVQ_NBUFS(EFX_EVQ_MAXNEVS)), + MC_CMD_INIT_EVQ_OUT_LEN)]; + efx_qword_t *dma_addr; + uint64_t addr; + int npages; + int i; + int supports_rx_batching; + int rc; + + npages = EFX_EVQ_NBUFS(nevs); + if (MC_CMD_INIT_EVQ_IN_LEN(npages) > MC_CMD_INIT_EVQ_IN_LENMAX) { + rc = EINVAL; + goto fail1; + } + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_INIT_EVQ; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_INIT_EVQ_IN_LEN(npages); + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_INIT_EVQ_OUT_LEN; + + MCDI_IN_SET_DWORD(req, INIT_EVQ_IN_SIZE, nevs); + MCDI_IN_SET_DWORD(req, INIT_EVQ_IN_INSTANCE, instance); + MCDI_IN_SET_DWORD(req, INIT_EVQ_IN_IRQ_NUM, irq); + + /* + * On Huntington RX and TX event batching can only be requested + * together (even if the datapath firmware doesn't actually support RX + * batching). + * Cut through is incompatible with RX batching and so enabling cut + * through disables RX batching (but it does not affect TX batching). + * + * So always enable RX and TX event batching, and enable cut through + * if RX event batching isn't supported (i.e. on low latency firmware). + */ + supports_rx_batching = enp->en_nic_cfg.enc_rx_batching_enabled ? 1 : 0; + MCDI_IN_POPULATE_DWORD_6(req, INIT_EVQ_IN_FLAGS, + INIT_EVQ_IN_FLAG_INTERRUPTING, 1, + INIT_EVQ_IN_FLAG_RPTR_DOS, 0, + INIT_EVQ_IN_FLAG_INT_ARMD, 0, + INIT_EVQ_IN_FLAG_CUT_THRU, !supports_rx_batching, + INIT_EVQ_IN_FLAG_RX_MERGE, 1, + INIT_EVQ_IN_FLAG_TX_MERGE, 1); + + MCDI_IN_SET_DWORD(req, INIT_EVQ_IN_TMR_MODE, + MC_CMD_INIT_EVQ_IN_TMR_MODE_DIS); + MCDI_IN_SET_DWORD(req, INIT_EVQ_IN_TMR_LOAD, 0); + MCDI_IN_SET_DWORD(req, INIT_EVQ_IN_TMR_RELOAD, 0); + + MCDI_IN_SET_DWORD(req, INIT_EVQ_IN_COUNT_MODE, + MC_CMD_INIT_EVQ_IN_COUNT_MODE_DIS); + MCDI_IN_SET_DWORD(req, INIT_EVQ_IN_COUNT_THRSHLD, 0); + + dma_addr = MCDI_IN2(req, efx_qword_t, INIT_EVQ_IN_DMA_ADDR); + addr = EFSYS_MEM_ADDR(esmp); + + for (i = 0; i < npages; i++) { + EFX_POPULATE_QWORD_2(*dma_addr, + EFX_DWORD_1, (uint32_t)(addr >> 32), + EFX_DWORD_0, (uint32_t)(addr & 0xffffffff)); + + dma_addr++; + addr += EFX_BUF_SIZE; + } + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail2; + } + + if (req.emr_out_length_used < MC_CMD_INIT_EVQ_OUT_LEN) { + rc = EMSGSIZE; + goto fail3; + } + + if (irqp != NULL) + *irqp = MCDI_OUT_DWORD(req, INIT_EVQ_OUT_IRQ); + + return (0); + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +static __checkReturn int +efx_mcdi_fini_evq( + __in efx_nic_t *enp, + __in uint32_t instance) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_FINI_EVQ_IN_LEN, + MC_CMD_FINI_EVQ_OUT_LEN)]; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_FINI_EVQ; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_FINI_EVQ_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_FINI_EVQ_OUT_LEN; + + MCDI_IN_SET_DWORD(req, FINI_EVQ_IN_INSTANCE, instance); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + + + __checkReturn int +hunt_ev_init( + __in efx_nic_t *enp) +{ + _NOTE(ARGUNUSED(enp)) + return (0); +} + + void +hunt_ev_fini( + __in efx_nic_t *enp) +{ + _NOTE(ARGUNUSED(enp)) +} + + __checkReturn int +hunt_ev_qcreate( + __in efx_nic_t *enp, + __in unsigned int index, + __in efsys_mem_t *esmp, + __in size_t n, + __in uint32_t id, + __in efx_evq_t *eep) +{ + efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + uint32_t irq; + int rc; + + _NOTE(ARGUNUSED(id)) /* buftbl id managed by MC */ + EFX_STATIC_ASSERT(ISP2(EFX_EVQ_MAXNEVS)); + EFX_STATIC_ASSERT(ISP2(EFX_EVQ_MINNEVS)); + + if (!ISP2(n) || (n < EFX_EVQ_MINNEVS) || (n > EFX_EVQ_MAXNEVS)) { + rc = EINVAL; + goto fail1; + } + + if (index >= encp->enc_evq_limit) { + rc = EINVAL; + goto fail2; + } + + /* Set up the handler table */ + eep->ee_rx = hunt_ev_rx; + eep->ee_tx = hunt_ev_tx; + eep->ee_driver = hunt_ev_driver; + eep->ee_drv_gen = hunt_ev_drv_gen; + eep->ee_mcdi = hunt_ev_mcdi; + + /* + * Set up the event queue + * NOTE: ignore the returned IRQ param as firmware does not set it. + */ + irq = index; /* INIT_EVQ expects function-relative vector number */ + if ((rc = efx_mcdi_init_evq(enp, index, esmp, n, irq, NULL)) != 0) + goto fail3; + + return (0); + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + void +hunt_ev_qdestroy( + __in efx_evq_t *eep) +{ + efx_nic_t *enp = eep->ee_enp; + + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON); + + (void) efx_mcdi_fini_evq(eep->ee_enp, eep->ee_index); +} + + __checkReturn int +hunt_ev_qprime( + __in efx_evq_t *eep, + __in unsigned int count) +{ + efx_nic_t *enp = eep->ee_enp; + uint32_t rptr; + efx_dword_t dword; + + rptr = count & eep->ee_mask; + + if (enp->en_nic_cfg.enc_bug35388_workaround) { + EFX_STATIC_ASSERT(EFX_EVQ_MINNEVS > + (1 << ERF_DD_EVQ_IND_RPTR_WIDTH)); + EFX_STATIC_ASSERT(EFX_EVQ_MAXNEVS < + (1 << 2 * ERF_DD_EVQ_IND_RPTR_WIDTH)); + + EFX_POPULATE_DWORD_2(dword, + ERF_DD_EVQ_IND_RPTR_FLAGS, + EFE_DD_EVQ_IND_RPTR_FLAGS_HIGH, + ERF_DD_EVQ_IND_RPTR, + (rptr >> ERF_DD_EVQ_IND_RPTR_WIDTH)); + EFX_BAR_TBL_WRITED(enp, ER_DD_EVQ_INDIRECT, eep->ee_index, + &dword, B_FALSE); + + EFX_POPULATE_DWORD_2(dword, + ERF_DD_EVQ_IND_RPTR_FLAGS, + EFE_DD_EVQ_IND_RPTR_FLAGS_LOW, + ERF_DD_EVQ_IND_RPTR, + rptr & ((1 << ERF_DD_EVQ_IND_RPTR_WIDTH) - 1)); + EFX_BAR_TBL_WRITED(enp, ER_DD_EVQ_INDIRECT, eep->ee_index, + &dword, B_FALSE); + } else { + EFX_POPULATE_DWORD_1(dword, ERF_DZ_EVQ_RPTR, rptr); + EFX_BAR_TBL_WRITED(enp, ER_DZ_EVQ_RPTR_REG, eep->ee_index, + &dword, B_FALSE); + } + + return (0); +} + +static __checkReturn int +efx_mcdi_driver_event( + __in efx_nic_t *enp, + __in uint32_t evq, + __in efx_qword_t data) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_DRIVER_EVENT_IN_LEN, + MC_CMD_DRIVER_EVENT_OUT_LEN)]; + int rc; + + req.emr_cmd = MC_CMD_DRIVER_EVENT; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_DRIVER_EVENT_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_DRIVER_EVENT_OUT_LEN; + + MCDI_IN_SET_DWORD(req, DRIVER_EVENT_IN_EVQ, evq); + + MCDI_IN_SET_DWORD(req, DRIVER_EVENT_IN_DATA_LO, + EFX_QWORD_FIELD(data, EFX_DWORD_0)); + MCDI_IN_SET_DWORD(req, DRIVER_EVENT_IN_DATA_HI, + EFX_QWORD_FIELD(data, EFX_DWORD_1)); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + void +hunt_ev_qpost( + __in efx_evq_t *eep, + __in uint16_t data) +{ + efx_nic_t *enp = eep->ee_enp; + efx_qword_t event; + + EFX_POPULATE_QWORD_3(event, + ESF_DZ_DRV_CODE, ESE_DZ_EV_CODE_DRV_GEN_EV, + ESF_DZ_DRV_SUB_CODE, 0, + ESF_DZ_DRV_SUB_DATA_DW0, (uint32_t)data); + + (void) efx_mcdi_driver_event(enp, eep->ee_index, event); +} + + __checkReturn int +hunt_ev_qmoderate( + __in efx_evq_t *eep, + __in unsigned int us) +{ + efx_nic_t *enp = eep->ee_enp; + efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + efx_dword_t dword; + uint32_t timer_val, mode; + int rc; + + if (us > encp->enc_evq_timer_max_us) { + rc = EINVAL; + goto fail1; + } + + /* If the value is zero then disable the timer */ + if (us == 0) { + timer_val = 0; + mode = FFE_CZ_TIMER_MODE_DIS; + } else { + /* Calculate the timer value in quanta */ + timer_val = us * 1000 / encp->enc_evq_timer_quantum_ns; + + /* Moderation value is base 0 so we need to deduct 1 */ + if (timer_val > 0) + timer_val--; + + mode = FFE_CZ_TIMER_MODE_INT_HLDOFF; + } + + if (encp->enc_bug35388_workaround) { + EFX_POPULATE_DWORD_3(dword, + ERF_DD_EVQ_IND_TIMER_FLAGS, + EFE_DD_EVQ_IND_TIMER_FLAGS, + ERF_DD_EVQ_IND_TIMER_MODE, mode, + ERF_DD_EVQ_IND_TIMER_VAL, timer_val); + EFX_BAR_TBL_WRITED(enp, ER_DD_EVQ_INDIRECT, + eep->ee_index, &dword, 0); + } else { + EFX_POPULATE_DWORD_2(dword, + FRF_CZ_TC_TIMER_MODE, mode, + FRF_CZ_TC_TIMER_VAL, timer_val); + EFX_BAR_TBL_WRITED(enp, FR_BZ_TIMER_COMMAND_REGP0, + eep->ee_index, &dword, 0); + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + +#if EFSYS_OPT_QSTATS + void +hunt_ev_qstats_update( + __in efx_evq_t *eep, + __inout_ecount(EV_NQSTATS) efsys_stat_t *stat) +{ + /* + * TBD: Consider a common Siena/Huntington function. The code is + * essentially identical. + */ + unsigned int id; + + for (id = 0; id < EV_NQSTATS; id++) { + efsys_stat_t *essp = &stat[id]; + + EFSYS_STAT_INCR(essp, eep->ee_stat[id]); + eep->ee_stat[id] = 0; + } +} +#endif /* EFSYS_OPT_QSTATS */ + + +static __checkReturn boolean_t +hunt_ev_rx( + __in efx_evq_t *eep, + __in efx_qword_t *eqp, + __in const efx_ev_callbacks_t *eecp, + __in_opt void *arg) +{ + efx_nic_t *enp = eep->ee_enp; + uint32_t size; + boolean_t parse_err; + uint32_t label; + uint32_t mcast; + uint32_t eth_base_class; + uint32_t eth_tag_class; + uint32_t l3_class; + uint32_t l4_class; + uint32_t next_read_lbits; + boolean_t soft1, soft2; + uint16_t flags; + boolean_t should_abort; + efx_evq_rxq_state_t *eersp; + unsigned int desc_count; + unsigned int last_used_id; + + EFX_EV_QSTAT_INCR(eep, EV_RX); + + /* Discard events after RXQ/TXQ errors */ + if (enp->en_reset_flags & (EFX_RESET_RXQ_ERR | EFX_RESET_TXQ_ERR)) + return (B_FALSE); + + /* + * FIXME: likely to be incomplete, incorrect and inefficient. + * Improvements in all three areas are required. + */ + + if (EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_DROP_EVENT) != 0) { + /* Drop this event */ + return (B_FALSE); + } + flags = 0; + + size = EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_BYTES); + + if (EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_CONT) != 0) { + /* + * FIXME: There is not yet any driver that supports scatter on + * Huntington. Scatter support is required for OSX. + */ + EFSYS_ASSERT(0); + flags |= EFX_PKT_CONT; + } + + parse_err = (EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_PARSE_INCOMPLETE) != 0); + label = EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_QLABEL); + + if (EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_ECRC_ERR) != 0) { + /* Ethernet frame CRC bad */ + flags |= EFX_DISCARD; + } + if (EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_CRC0_ERR) != 0) { + /* IP+TCP, bad CRC in iSCSI header */ + flags |= EFX_DISCARD; + } + if (EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_CRC1_ERR) != 0) { + /* IP+TCP, bad CRC in iSCSI payload or FCoE or FCoIP */ + flags |= EFX_DISCARD; + } + if (EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_ECC_ERR) != 0) { + /* ECC memory error */ + flags |= EFX_DISCARD; + } + + /* FIXME: do we need soft bits from RXDP firmware ? */ + soft1 = (EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_EV_SOFT1) != 0); + soft2 = (EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_EV_SOFT2) != 0); + + mcast = EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_MAC_CLASS); + if (mcast == ESE_DZ_MAC_CLASS_UCAST) + flags |= EFX_PKT_UNICAST; + + eth_base_class = EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_ETH_BASE_CLASS); + eth_tag_class = EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_ETH_TAG_CLASS); + l3_class = EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_L3_CLASS); + l4_class = EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_L4_CLASS); + + /* bottom 4 bits of incremented index (not last desc consumed) */ + next_read_lbits = EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_DSC_PTR_LBITS); + + /* Increment the count of descriptors read */ + eersp = &eep->ee_rxq_state[label]; + desc_count = (next_read_lbits - eersp->eers_rx_read_ptr) & + EFX_MASK32(ESF_DZ_RX_DSC_PTR_LBITS); + eersp->eers_rx_read_ptr += desc_count; + + /* + * FIXME: add error checking to make sure this a batched event. + * This could also be an aborted scatter, see Bug36629. + */ + if (desc_count > 1) { + EFX_EV_QSTAT_INCR(eep, EV_RX_BATCH); + flags |= EFX_PKT_PREFIX_LEN; + } + + /* Calculate the index of the the last descriptor consumed */ + last_used_id = (eersp->eers_rx_read_ptr - 1) & eersp->eers_rx_mask; + + /* EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_OVERRIDE_HOLDOFF); */ + + switch (eth_base_class) { + case ESE_DZ_ETH_BASE_CLASS_LLC_SNAP: + case ESE_DZ_ETH_BASE_CLASS_LLC: + case ESE_DZ_ETH_BASE_CLASS_ETH2: + default: + break; + } + + switch (eth_tag_class) { + case ESE_DZ_ETH_TAG_CLASS_RSVD7: + case ESE_DZ_ETH_TAG_CLASS_RSVD6: + case ESE_DZ_ETH_TAG_CLASS_RSVD5: + case ESE_DZ_ETH_TAG_CLASS_RSVD4: + break; + + case ESE_DZ_ETH_TAG_CLASS_RSVD3: /* Triple tagged */ + case ESE_DZ_ETH_TAG_CLASS_VLAN2: /* Double tagged */ + case ESE_DZ_ETH_TAG_CLASS_VLAN1: /* VLAN tagged */ + flags |= EFX_PKT_VLAN_TAGGED; + break; + + case ESE_DZ_ETH_TAG_CLASS_NONE: + default: + break; + } + + switch (l3_class) { + case ESE_DZ_L3_CLASS_RSVD7: /* Used by firmware for packet overrun */ + parse_err = B_TRUE; + flags |= EFX_DISCARD; + break; + + case ESE_DZ_L3_CLASS_ARP: + case ESE_DZ_L3_CLASS_FCOE: + break; + + case ESE_DZ_L3_CLASS_IP6_FRAG: + case ESE_DZ_L3_CLASS_IP6: + flags |= EFX_PKT_IPV6; + break; + + case ESE_DZ_L3_CLASS_IP4_FRAG: + case ESE_DZ_L3_CLASS_IP4: + flags |= EFX_PKT_IPV4; + if (EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_IPCKSUM_ERR) == 0) + flags |= EFX_CKSUM_IPV4; + break; + + case ESE_DZ_L3_CLASS_UNKNOWN: + default: + break; + } + + switch (l4_class) { + case ESE_DZ_L4_CLASS_RSVD7: + case ESE_DZ_L4_CLASS_RSVD6: + case ESE_DZ_L4_CLASS_RSVD5: + case ESE_DZ_L4_CLASS_RSVD4: + case ESE_DZ_L4_CLASS_RSVD3: + break; + + case ESE_DZ_L4_CLASS_UDP: + flags |= EFX_PKT_UDP; + if (EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_TCPUDP_CKSUM_ERR) == 0) + flags |= EFX_CKSUM_TCPUDP; + break; + + case ESE_DZ_L4_CLASS_TCP: + flags |= EFX_PKT_TCP; + if (EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_TCPUDP_CKSUM_ERR) == 0) + flags |= EFX_CKSUM_TCPUDP; + break; + + case ESE_DZ_L4_CLASS_UNKNOWN: + default: + break; + } + + /* If we're not discarding the packet then it is ok */ + if (~flags & EFX_DISCARD) + EFX_EV_QSTAT_INCR(eep, EV_RX_OK); + + EFSYS_ASSERT(eecp->eec_rx != NULL); + should_abort = eecp->eec_rx(arg, label, last_used_id, size, flags); + + return (should_abort); +} + +static __checkReturn boolean_t +hunt_ev_tx( + __in efx_evq_t *eep, + __in efx_qword_t *eqp, + __in const efx_ev_callbacks_t *eecp, + __in_opt void *arg) +{ + efx_nic_t *enp = eep->ee_enp; + uint32_t id; + uint32_t label; + boolean_t should_abort; + + EFX_EV_QSTAT_INCR(eep, EV_TX); + + /* Discard events after RXQ/TXQ errors */ + if (enp->en_reset_flags & (EFX_RESET_RXQ_ERR | EFX_RESET_TXQ_ERR)) + return (B_FALSE); + + if (EFX_QWORD_FIELD(*eqp, ESF_DZ_TX_DROP_EVENT) != 0) { + /* Drop this event */ + return (B_FALSE); + } + + /* Per-packet TX completion (was per-descriptor for Falcon/Siena) */ + id = EFX_QWORD_FIELD(*eqp, ESF_DZ_TX_DESCR_INDX); + label = EFX_QWORD_FIELD(*eqp, ESF_DZ_TX_QLABEL); + + EFSYS_PROBE2(tx_complete, uint32_t, label, uint32_t, id); + + EFSYS_ASSERT(eecp->eec_tx != NULL); + should_abort = eecp->eec_tx(arg, label, id); + + return (should_abort); +} + +static __checkReturn boolean_t +hunt_ev_driver( + __in efx_evq_t *eep, + __in efx_qword_t *eqp, + __in const efx_ev_callbacks_t *eecp, + __in_opt void *arg) +{ + unsigned int code; + boolean_t should_abort; + + EFX_EV_QSTAT_INCR(eep, EV_DRIVER); + should_abort = B_FALSE; + + code = EFX_QWORD_FIELD(*eqp, ESF_DZ_DRV_SUB_CODE); + switch (code) { + case ESE_DZ_DRV_TIMER_EV: { + uint32_t id; + + id = EFX_QWORD_FIELD(*eqp, ESF_DZ_DRV_TMR_ID); + + EFSYS_ASSERT(eecp->eec_timer != NULL); + should_abort = eecp->eec_timer(arg, id); + break; + } + + case ESE_DZ_DRV_WAKE_UP_EV: { + uint32_t id; + + id = EFX_QWORD_FIELD(*eqp, ESF_DZ_DRV_EVQ_ID); + + EFSYS_ASSERT(eecp->eec_wake_up != NULL); + should_abort = eecp->eec_wake_up(arg, id); + break; + } + + case ESE_DZ_DRV_START_UP_EV: + EFSYS_ASSERT(eecp->eec_initialized != NULL); + should_abort = eecp->eec_initialized(arg); + break; + + default: + EFSYS_PROBE3(bad_event, unsigned int, eep->ee_index, + uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_1), + uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_0)); + break; + } + + return (should_abort); +} + +static __checkReturn boolean_t +hunt_ev_drv_gen( + __in efx_evq_t *eep, + __in efx_qword_t *eqp, + __in const efx_ev_callbacks_t *eecp, + __in_opt void *arg) +{ + uint32_t data; + boolean_t should_abort; + + EFX_EV_QSTAT_INCR(eep, EV_DRV_GEN); + should_abort = B_FALSE; + + data = EFX_QWORD_FIELD(*eqp, ESF_DZ_DRV_SUB_DATA_DW0); + if (data >= ((uint32_t)1 << 16)) { + EFSYS_PROBE3(bad_event, unsigned int, eep->ee_index, + uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_1), + uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_0)); + + return (B_TRUE); + } + + EFSYS_ASSERT(eecp->eec_software != NULL); + should_abort = eecp->eec_software(arg, (uint16_t)data); + + return (should_abort); +} + +static __checkReturn boolean_t +hunt_ev_mcdi( + __in efx_evq_t *eep, + __in efx_qword_t *eqp, + __in const efx_ev_callbacks_t *eecp, + __in_opt void *arg) +{ + efx_nic_t *enp = eep->ee_enp; + unsigned code; + boolean_t should_abort = B_FALSE; + + EFX_EV_QSTAT_INCR(eep, EV_MCDI_RESPONSE); + + code = EFX_QWORD_FIELD(*eqp, MCDI_EVENT_CODE); + switch (code) { + case MCDI_EVENT_CODE_BADSSERT: + efx_mcdi_ev_death(enp, EINTR); + break; + + case MCDI_EVENT_CODE_CMDDONE: + efx_mcdi_ev_cpl(enp, + MCDI_EV_FIELD(eqp, CMDDONE_SEQ), + MCDI_EV_FIELD(eqp, CMDDONE_DATALEN), + MCDI_EV_FIELD(eqp, CMDDONE_ERRNO)); + break; + + case MCDI_EVENT_CODE_LINKCHANGE: { + efx_link_mode_t link_mode; + + hunt_phy_link_ev(enp, eqp, &link_mode); + should_abort = eecp->eec_link_change(arg, link_mode); + break; + } + + case MCDI_EVENT_CODE_SENSOREVT: { +#if EFSYS_OPT_MON_STATS + efx_mon_stat_t id; + efx_mon_stat_value_t value; + int rc; + + /* Decode monitor stat for MCDI sensor (if supported) */ + if ((rc = mcdi_mon_ev(enp, eqp, &id, &value)) == 0) { + /* Report monitor stat change */ + should_abort = eecp->eec_monitor(arg, id, value); + } else if (rc == ENOTSUP) { + should_abort = eecp->eec_exception(arg, + EFX_EXCEPTION_UNKNOWN_SENSOREVT, + MCDI_EV_FIELD(eqp, DATA)); + } else { + EFSYS_ASSERT(rc == ENODEV); /* Wrong port */ + } +#endif + break; + } + + case MCDI_EVENT_CODE_SCHEDERR: + /* Informational only */ + break; + + case MCDI_EVENT_CODE_REBOOT: + /* Falcon/Siena only (should not been seen with Huntington). */ + efx_mcdi_ev_death(enp, EIO); + break; + + case MCDI_EVENT_CODE_MC_REBOOT: + /* MC_REBOOT event is used for Huntington (EF10) and later. */ + efx_mcdi_ev_death(enp, EIO); + break; + + case MCDI_EVENT_CODE_MAC_STATS_DMA: +#if EFSYS_OPT_MAC_STATS + if (eecp->eec_mac_stats != NULL) { + eecp->eec_mac_stats(arg, + MCDI_EV_FIELD(eqp, MAC_STATS_DMA_GENERATION)); + } +#endif + break; + + case MCDI_EVENT_CODE_FWALERT: { + uint32_t reason = MCDI_EV_FIELD(eqp, FWALERT_REASON); + + if (reason == MCDI_EVENT_FWALERT_REASON_SRAM_ACCESS) + should_abort = eecp->eec_exception(arg, + EFX_EXCEPTION_FWALERT_SRAM, + MCDI_EV_FIELD(eqp, FWALERT_DATA)); + else + should_abort = eecp->eec_exception(arg, + EFX_EXCEPTION_UNKNOWN_FWALERT, + MCDI_EV_FIELD(eqp, DATA)); + break; + } + + case MCDI_EVENT_CODE_TX_ERR: { + /* + * After a TXQ error is detected, firmware sends a TX_ERR event. + * This may be followed by TX completions (which we discard), + * and then finally by a TX_FLUSH event. Firmware destroys the + * TXQ automatically after sending the TX_FLUSH event. + */ + enp->en_reset_flags |= EFX_RESET_TXQ_ERR; + + EFSYS_PROBE1(tx_descq_err, uint32_t, MCDI_EV_FIELD(eqp, DATA)); + + /* Inform the driver that a reset is required. */ + eecp->eec_exception(arg, EFX_EXCEPTION_TX_ERROR, + MCDI_EV_FIELD(eqp, TX_ERR_DATA)); + break; + } + + case MCDI_EVENT_CODE_TX_FLUSH: { + uint32_t txq_index = MCDI_EV_FIELD(eqp, TX_FLUSH_TXQ); + + /* + * EF10 firmware sends two TX_FLUSH events: one to the txq's + * event queue, and one to evq 0 (with TX_FLUSH_TO_DRIVER set). + * We want to wait for all completions, so ignore the events + * with TX_FLUSH_TO_DRIVER. + */ + if (MCDI_EV_FIELD(eqp, TX_FLUSH_TO_DRIVER) != 0) { + should_abort = B_FALSE; + break; + } + + EFX_EV_QSTAT_INCR(eep, EV_DRIVER_TX_DESCQ_FLS_DONE); + + EFSYS_PROBE1(tx_descq_fls_done, uint32_t, txq_index); + + EFSYS_ASSERT(eecp->eec_txq_flush_done != NULL); + should_abort = eecp->eec_txq_flush_done(arg, txq_index); + break; + } + + case MCDI_EVENT_CODE_RX_ERR: { + /* + * After an RXQ error is detected, firmware sends an RX_ERR + * event. This may be followed by RX events (which we discard), + * and then finally by an RX_FLUSH event. Firmware destroys the + * RXQ automatically after sending the RX_FLUSH event. + */ + enp->en_reset_flags |= EFX_RESET_RXQ_ERR; + + EFSYS_PROBE1(rx_descq_err, uint32_t, MCDI_EV_FIELD(eqp, DATA)); + + /* Inform the driver that a reset is required. */ + eecp->eec_exception(arg, EFX_EXCEPTION_RX_ERROR, + MCDI_EV_FIELD(eqp, RX_ERR_DATA)); + break; + } + + case MCDI_EVENT_CODE_RX_FLUSH: { + uint32_t rxq_index = MCDI_EV_FIELD(eqp, RX_FLUSH_RXQ); + + /* + * EF10 firmware sends two RX_FLUSH events: one to the rxq's + * event queue, and one to evq 0 (with RX_FLUSH_TO_DRIVER set). + * We want to wait for all completions, so ignore the events + * with RX_FLUSH_TO_DRIVER. + */ + if (MCDI_EV_FIELD(eqp, RX_FLUSH_TO_DRIVER) != 0) { + should_abort = B_FALSE; + break; + } + + EFX_EV_QSTAT_INCR(eep, EV_DRIVER_RX_DESCQ_FLS_DONE); + + EFSYS_PROBE1(rx_descq_fls_done, uint32_t, rxq_index); + + EFSYS_ASSERT(eecp->eec_rxq_flush_done != NULL); + should_abort = eecp->eec_rxq_flush_done(arg, rxq_index); + break; + } + + default: + EFSYS_PROBE3(bad_event, unsigned int, eep->ee_index, + uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_1), + uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_0)); + break; + } + + return (should_abort); +} + + void +hunt_ev_rxlabel_init( + __in efx_evq_t *eep, + __in efx_rxq_t *erp, + __in unsigned int label) +{ + efx_evq_rxq_state_t *eersp; + + EFSYS_ASSERT3U(label, <, EFX_ARRAY_SIZE(eep->ee_rxq_state)); + eersp = &eep->ee_rxq_state[label]; + + EFSYS_ASSERT3U(eersp->eers_rx_mask, ==, 0); + + eersp->eers_rx_read_ptr = 0; + eersp->eers_rx_mask = erp->er_mask; +} + + void +hunt_ev_rxlabel_fini( + __in efx_evq_t *eep, + __in unsigned int label) +{ + efx_evq_rxq_state_t *eersp; + + EFSYS_ASSERT3U(label, <, EFX_ARRAY_SIZE(eep->ee_rxq_state)); + eersp = &eep->ee_rxq_state[label]; + + EFSYS_ASSERT3U(eersp->eers_rx_mask, !=, 0); + + eersp->eers_rx_read_ptr = 0; + eersp->eers_rx_mask = 0; +} + +#endif /* EFSYS_OPT_HUNTINGTON */ diff --git a/sys/dev/sfxge/common/hunt_filter.c b/sys/dev/sfxge/common/hunt_filter.c new file mode 100644 index 000000000000..27af7c343f2d --- /dev/null +++ b/sys/dev/sfxge/common/hunt_filter.c @@ -0,0 +1,1376 @@ +/*- + * Copyright (c) 2007-2015 Solarflare Communications Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "efsys.h" +#include "efx.h" +#include "efx_types.h" +#include "efx_regs_mcdi.h" +#include "efx_impl.h" + +#if EFSYS_OPT_HUNTINGTON + +#if EFSYS_OPT_FILTER + +#define HFE_SPEC(hftp, index) ((hftp)->hft_entry[(index)].hfe_spec) + +static efx_filter_spec_t * +hunt_filter_entry_spec( + __in const hunt_filter_table_t *hftp, + __in unsigned int index) +{ + return ((efx_filter_spec_t *)(HFE_SPEC(hftp, index) & + ~(uintptr_t)EFX_HUNT_FILTER_FLAGS)); +} + +static boolean_t +hunt_filter_entry_is_busy( + __in const hunt_filter_table_t *hftp, + __in unsigned int index) +{ + if (HFE_SPEC(hftp, index) & EFX_HUNT_FILTER_FLAG_BUSY) + return (B_TRUE); + else + return (B_FALSE); +} + +static boolean_t +hunt_filter_entry_is_auto_old( + __in const hunt_filter_table_t *hftp, + __in unsigned int index) +{ + if (HFE_SPEC(hftp, index) & EFX_HUNT_FILTER_FLAG_AUTO_OLD) + return (B_TRUE); + else + return (B_FALSE); +} + +static void +hunt_filter_set_entry( + __inout hunt_filter_table_t *hftp, + __in unsigned int index, + __in_opt const efx_filter_spec_t *efsp) +{ + HFE_SPEC(hftp, index) = (uintptr_t)efsp; +} + +static void +hunt_filter_set_entry_busy( + __inout hunt_filter_table_t *hftp, + __in unsigned int index) +{ + HFE_SPEC(hftp, index) |= (uintptr_t)EFX_HUNT_FILTER_FLAG_BUSY; +} + +static void +hunt_filter_set_entry_not_busy( + __inout hunt_filter_table_t *hftp, + __in unsigned int index) +{ + HFE_SPEC(hftp, index) &= ~(uintptr_t)EFX_HUNT_FILTER_FLAG_BUSY; +} + +static void +hunt_filter_set_entry_auto_old( + __inout hunt_filter_table_t *hftp, + __in unsigned int index) +{ + EFSYS_ASSERT(hunt_filter_entry_spec(hftp, index) != NULL); + HFE_SPEC(hftp, index) |= (uintptr_t)EFX_HUNT_FILTER_FLAG_AUTO_OLD; +} + +static void +hunt_filter_set_entry_not_auto_old( + __inout hunt_filter_table_t *hftp, + __in unsigned int index) +{ + HFE_SPEC(hftp, index) &= ~(uintptr_t)EFX_HUNT_FILTER_FLAG_AUTO_OLD; + EFSYS_ASSERT(hunt_filter_entry_spec(hftp, index) != NULL); +} + + __checkReturn int +hunt_filter_init( + __in efx_nic_t *enp) +{ + int rc; + hunt_filter_table_t *hftp; + + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON); + +#define MATCH_MASK(match) (EFX_MASK32(match) << EFX_LOW_BIT(match)) + EFX_STATIC_ASSERT(EFX_FILTER_MATCH_REM_HOST == + MATCH_MASK(MC_CMD_FILTER_OP_IN_MATCH_SRC_IP)); + EFX_STATIC_ASSERT(EFX_FILTER_MATCH_LOC_HOST == + MATCH_MASK(MC_CMD_FILTER_OP_IN_MATCH_DST_IP)); + EFX_STATIC_ASSERT(EFX_FILTER_MATCH_REM_MAC == + MATCH_MASK(MC_CMD_FILTER_OP_IN_MATCH_SRC_MAC)); + EFX_STATIC_ASSERT(EFX_FILTER_MATCH_REM_PORT == + MATCH_MASK(MC_CMD_FILTER_OP_IN_MATCH_SRC_PORT)); + EFX_STATIC_ASSERT(EFX_FILTER_MATCH_LOC_MAC == + MATCH_MASK(MC_CMD_FILTER_OP_IN_MATCH_DST_MAC)); + EFX_STATIC_ASSERT(EFX_FILTER_MATCH_LOC_PORT == + MATCH_MASK(MC_CMD_FILTER_OP_IN_MATCH_DST_PORT)); + EFX_STATIC_ASSERT(EFX_FILTER_MATCH_ETHER_TYPE == + MATCH_MASK(MC_CMD_FILTER_OP_IN_MATCH_ETHER_TYPE)); + EFX_STATIC_ASSERT(EFX_FILTER_MATCH_INNER_VID == + MATCH_MASK(MC_CMD_FILTER_OP_IN_MATCH_INNER_VLAN)); + EFX_STATIC_ASSERT(EFX_FILTER_MATCH_OUTER_VID == + MATCH_MASK(MC_CMD_FILTER_OP_IN_MATCH_OUTER_VLAN)); + EFX_STATIC_ASSERT(EFX_FILTER_MATCH_IP_PROTO == + MATCH_MASK(MC_CMD_FILTER_OP_IN_MATCH_IP_PROTO)); +#undef MATCH_MASK + + EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (hunt_filter_table_t), hftp); + + if (!hftp) { + rc = ENOMEM; + goto fail1; + } + + enp->en_filter.ef_hunt_filter_table = hftp; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + void +hunt_filter_fini( + __in efx_nic_t *enp) +{ + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON); + + if (enp->en_filter.ef_hunt_filter_table != NULL) { + EFSYS_KMEM_FREE(enp->en_esip, sizeof (hunt_filter_table_t), + enp->en_filter.ef_hunt_filter_table); + } +} + +static __checkReturn int +efx_mcdi_filter_op_add( + __in efx_nic_t *enp, + __in efx_filter_spec_t *spec, + __in unsigned int filter_op, + __inout hunt_filter_handle_t *handle) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_FILTER_OP_IN_LEN, + MC_CMD_FILTER_OP_OUT_LEN)]; + uint32_t match_fields = 0; + int rc; + + memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_FILTER_OP; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_FILTER_OP_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_FILTER_OP_OUT_LEN; + + switch (filter_op) { + case MC_CMD_FILTER_OP_IN_OP_REPLACE: + MCDI_IN_SET_DWORD(req, FILTER_OP_IN_HANDLE_LO, + handle->hfh_lo); + MCDI_IN_SET_DWORD(req, FILTER_OP_IN_HANDLE_HI, + handle->hfh_hi); + /* Fall through */ + case MC_CMD_FILTER_OP_IN_OP_INSERT: + case MC_CMD_FILTER_OP_IN_OP_SUBSCRIBE: + MCDI_IN_SET_DWORD(req, FILTER_OP_IN_OP, filter_op); + break; + default: + EFSYS_ASSERT(0); + rc = EINVAL; + goto fail1; + } + + if (spec->efs_match_flags & EFX_FILTER_MATCH_LOC_MAC_IG) { + /* + * The LOC_MAC_IG match flag can represent unknown unicast + * or multicast filters - use the MAC address to distinguish + * them. + */ + if (EFX_MAC_ADDR_IS_MULTICAST(spec->efs_loc_mac)) + match_fields |= 1U << + MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_MCAST_DST_LBN; + else + match_fields |= 1U << + MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_UCAST_DST_LBN; + } + + match_fields |= spec->efs_match_flags & (~EFX_FILTER_MATCH_LOC_MAC_IG); + + MCDI_IN_SET_DWORD(req, FILTER_OP_IN_PORT_ID, + EVB_PORT_ID_ASSIGNED); + MCDI_IN_SET_DWORD(req, FILTER_OP_IN_MATCH_FIELDS, + match_fields); + MCDI_IN_SET_DWORD(req, FILTER_OP_IN_RX_DEST, + MC_CMD_FILTER_OP_IN_RX_DEST_HOST); + MCDI_IN_SET_DWORD(req, FILTER_OP_IN_RX_QUEUE, + spec->efs_dmaq_id); + if (spec->efs_flags & EFX_FILTER_FLAG_RX_RSS) { + MCDI_IN_SET_DWORD(req, FILTER_OP_IN_RX_CONTEXT, + spec->efs_rss_context); + } + MCDI_IN_SET_DWORD(req, FILTER_OP_IN_RX_MODE, + spec->efs_flags & EFX_FILTER_FLAG_RX_RSS ? + MC_CMD_FILTER_OP_IN_RX_MODE_RSS : + MC_CMD_FILTER_OP_IN_RX_MODE_SIMPLE); + MCDI_IN_SET_DWORD(req, FILTER_OP_IN_TX_DEST, + MC_CMD_FILTER_OP_IN_TX_DEST_DEFAULT); + + if (filter_op != MC_CMD_FILTER_OP_IN_OP_REPLACE) { + /* + * NOTE: Unlike most MCDI requests, the filter fields + * are presented in network (big endian) byte order. + */ + memcpy(MCDI_IN2(req, uint8_t, FILTER_OP_IN_SRC_MAC), + spec->efs_rem_mac, EFX_MAC_ADDR_LEN); + memcpy(MCDI_IN2(req, uint8_t, FILTER_OP_IN_DST_MAC), + spec->efs_loc_mac, EFX_MAC_ADDR_LEN); + + MCDI_IN_SET_WORD(req, FILTER_OP_IN_SRC_PORT, + __CPU_TO_BE_16(spec->efs_rem_port)); + MCDI_IN_SET_WORD(req, FILTER_OP_IN_DST_PORT, + __CPU_TO_BE_16(spec->efs_loc_port)); + + MCDI_IN_SET_WORD(req, FILTER_OP_IN_ETHER_TYPE, + __CPU_TO_BE_16(spec->efs_ether_type)); + + MCDI_IN_SET_WORD(req, FILTER_OP_IN_INNER_VLAN, + __CPU_TO_BE_16(spec->efs_inner_vid)); + MCDI_IN_SET_WORD(req, FILTER_OP_IN_OUTER_VLAN, + __CPU_TO_BE_16(spec->efs_outer_vid)); + + /* IP protocol (in low byte, high byte is zero) */ + MCDI_IN_SET_BYTE(req, FILTER_OP_IN_IP_PROTO, + spec->efs_ip_proto); + + EFX_STATIC_ASSERT(sizeof (spec->efs_rem_host) == + MC_CMD_FILTER_OP_IN_SRC_IP_LEN); + EFX_STATIC_ASSERT(sizeof (spec->efs_loc_host) == + MC_CMD_FILTER_OP_IN_DST_IP_LEN); + + memcpy(MCDI_IN2(req, uint8_t, FILTER_OP_IN_SRC_IP), + &spec->efs_rem_host.eo_byte[0], + MC_CMD_FILTER_OP_IN_SRC_IP_LEN); + memcpy(MCDI_IN2(req, uint8_t, FILTER_OP_IN_DST_IP), + &spec->efs_loc_host.eo_byte[0], + MC_CMD_FILTER_OP_IN_DST_IP_LEN); + } + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail2; + } + + if (req.emr_out_length_used < MC_CMD_FILTER_OP_OUT_LEN) { + rc = EMSGSIZE; + goto fail3; + } + + handle->hfh_lo = MCDI_OUT_DWORD(req, FILTER_OP_OUT_HANDLE_LO); + handle->hfh_hi = MCDI_OUT_DWORD(req, FILTER_OP_OUT_HANDLE_HI); + + return (0); + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); + +} + +static __checkReturn int +efx_mcdi_filter_op_delete( + __in efx_nic_t *enp, + __in unsigned int filter_op, + __inout hunt_filter_handle_t *handle) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_FILTER_OP_IN_LEN, + MC_CMD_FILTER_OP_OUT_LEN)]; + int rc; + + memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_FILTER_OP; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_FILTER_OP_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_FILTER_OP_OUT_LEN; + + switch (filter_op) { + case MC_CMD_FILTER_OP_IN_OP_REMOVE: + MCDI_IN_SET_DWORD(req, FILTER_OP_IN_OP, + MC_CMD_FILTER_OP_IN_OP_REMOVE); + break; + case MC_CMD_FILTER_OP_IN_OP_UNSUBSCRIBE: + MCDI_IN_SET_DWORD(req, FILTER_OP_IN_OP, + MC_CMD_FILTER_OP_IN_OP_UNSUBSCRIBE); + break; + default: + EFSYS_ASSERT(0); + rc = EINVAL; + goto fail1; + } + + MCDI_IN_SET_DWORD(req, FILTER_OP_IN_HANDLE_LO, handle->hfh_lo); + MCDI_IN_SET_DWORD(req, FILTER_OP_IN_HANDLE_HI, handle->hfh_hi); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail2; + } + + if (req.emr_out_length_used < MC_CMD_FILTER_OP_OUT_LEN) { + rc = EMSGSIZE; + goto fail3; + } + + return (0); + +fail3: + EFSYS_PROBE(fail3); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +static __checkReturn boolean_t +hunt_filter_equal( + __in const efx_filter_spec_t *left, + __in const efx_filter_spec_t *right) +{ + /* FIXME: Consider rx vs tx filters (look at efs_flags) */ + if (left->efs_match_flags != right->efs_match_flags) + return (B_FALSE); + if (!EFX_OWORD_IS_EQUAL(left->efs_rem_host, right->efs_rem_host)) + return (B_FALSE); + if (!EFX_OWORD_IS_EQUAL(left->efs_loc_host, right->efs_loc_host)) + return (B_FALSE); + if (memcmp(left->efs_rem_mac, right->efs_rem_mac, EFX_MAC_ADDR_LEN)) + return (B_FALSE); + if (memcmp(left->efs_loc_mac, right->efs_loc_mac, EFX_MAC_ADDR_LEN)) + return (B_FALSE); + if (left->efs_rem_port != right->efs_rem_port) + return (B_FALSE); + if (left->efs_loc_port != right->efs_loc_port) + return (B_FALSE); + if (left->efs_inner_vid != right->efs_inner_vid) + return (B_FALSE); + if (left->efs_outer_vid != right->efs_outer_vid) + return (B_FALSE); + if (left->efs_ether_type != right->efs_ether_type) + return (B_FALSE); + if (left->efs_ip_proto != right->efs_ip_proto) + return (B_FALSE); + + return (B_TRUE); + +} + +static __checkReturn boolean_t +hunt_filter_same_dest( + __in const efx_filter_spec_t *left, + __in const efx_filter_spec_t *right) +{ + if ((left->efs_flags & EFX_FILTER_FLAG_RX_RSS) && + (right->efs_flags & EFX_FILTER_FLAG_RX_RSS)) { + if (left->efs_rss_context == right->efs_rss_context) + return (B_TRUE); + } else if ((~(left->efs_flags) & EFX_FILTER_FLAG_RX_RSS) && + (~(right->efs_flags) & EFX_FILTER_FLAG_RX_RSS)) { + if (left->efs_dmaq_id == right->efs_dmaq_id) + return (B_TRUE); + } + return (B_FALSE); +} + +static __checkReturn uint32_t +hunt_filter_hash( + __in efx_filter_spec_t *spec) +{ + EFX_STATIC_ASSERT((sizeof (efx_filter_spec_t) % sizeof (uint32_t)) + == 0); + EFX_STATIC_ASSERT((EFX_FIELD_OFFSET(efx_filter_spec_t, efs_outer_vid) % + sizeof (uint32_t)) == 0); + + /* + * As the area of the efx_filter_spec_t we need to hash is DWORD + * aligned and an exact number of DWORDs in size we can use the + * optimised efx_hash_dwords() rather than efx_hash_bytes() + */ + return (efx_hash_dwords((const uint32_t *)&spec->efs_outer_vid, + (sizeof (efx_filter_spec_t) - + EFX_FIELD_OFFSET(efx_filter_spec_t, efs_outer_vid)) / + sizeof (uint32_t), 0)); +} + +/* + * Decide whether a filter should be exclusive or else should allow + * delivery to additional recipients. Currently we decide that + * filters for specific local unicast MAC and IP addresses are + * exclusive. + */ +static __checkReturn boolean_t +hunt_filter_is_exclusive( + __in efx_filter_spec_t *spec) +{ + if ((spec->efs_match_flags & EFX_FILTER_MATCH_LOC_MAC) && + !EFX_MAC_ADDR_IS_MULTICAST(spec->efs_loc_mac)) + return (B_TRUE); + + if ((spec->efs_match_flags & + (EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_LOC_HOST)) == + (EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_LOC_HOST)) { + if ((spec->efs_ether_type == EFX_ETHER_TYPE_IPV4) && + ((spec->efs_loc_host.eo_u8[0] & 0xf) != 0xe)) + return (B_TRUE); + if ((spec->efs_ether_type == EFX_ETHER_TYPE_IPV6) && + (spec->efs_loc_host.eo_u8[0] != 0xff)) + return (B_TRUE); + } + + return (B_FALSE); +} + + __checkReturn int +hunt_filter_restore( + __in efx_nic_t *enp) +{ + int tbl_id; + efx_filter_spec_t *spec; + hunt_filter_table_t *hftp = enp->en_filter.ef_hunt_filter_table; + boolean_t restoring; + int state; + int rc; + + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON); + + for (tbl_id = 0; tbl_id < EFX_HUNT_FILTER_TBL_ROWS; tbl_id++) { + + EFSYS_LOCK(enp->en_eslp, state); + + spec = hunt_filter_entry_spec(hftp, tbl_id); + if (spec == NULL) { + restoring = B_FALSE; + } else if (hunt_filter_entry_is_busy(hftp, tbl_id)) { + /* Ignore busy entries. */ + restoring = B_FALSE; + } else { + hunt_filter_set_entry_busy(hftp, tbl_id); + restoring = B_TRUE; + } + + EFSYS_UNLOCK(enp->en_eslp, state); + + if (restoring == B_FALSE) + continue; + + if (hunt_filter_is_exclusive(spec)) { + rc = efx_mcdi_filter_op_add(enp, spec, + MC_CMD_FILTER_OP_IN_OP_INSERT, + &hftp->hft_entry[tbl_id].hfe_handle); + } else { + rc = efx_mcdi_filter_op_add(enp, spec, + MC_CMD_FILTER_OP_IN_OP_SUBSCRIBE, + &hftp->hft_entry[tbl_id].hfe_handle); + } + + if (rc != 0) + goto fail1; + + EFSYS_LOCK(enp->en_eslp, state); + + hunt_filter_set_entry_not_busy(hftp, tbl_id); + + EFSYS_UNLOCK(enp->en_eslp, state); + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +/* + * An arbitrary search limit for the software hash table. As per the linux net + * driver. + */ +#define EFX_HUNT_FILTER_SEARCH_LIMIT 200 + +static __checkReturn int +hunt_filter_add_internal( + __in efx_nic_t *enp, + __inout efx_filter_spec_t *spec, + __in boolean_t may_replace, + __out_opt uint32_t *filter_id) +{ + int rc; + hunt_filter_table_t *hftp = enp->en_filter.ef_hunt_filter_table; + efx_filter_spec_t *saved_spec; + uint32_t hash; + unsigned int depth; + int ins_index; + boolean_t replacing = B_FALSE; + unsigned int i; + int state; + boolean_t locked = B_FALSE; + + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON); + +#if EFSYS_OPT_RX_SCALE + spec->efs_rss_context = enp->en_rss_context; +#endif + + hash = hunt_filter_hash(spec); + + /* + * FIXME: Add support for inserting filters of different priorities + * and removing lower priority multicast filters (bug 42378) + */ + + /* + * Find any existing filters with the same match tuple or + * else a free slot to insert at. If any of them are busy, + * we have to wait and retry. + */ + for (;;) { + ins_index = -1; + depth = 1; + EFSYS_LOCK(enp->en_eslp, state); + locked = B_TRUE; + + for (;;) { + i = (hash + depth) & (EFX_HUNT_FILTER_TBL_ROWS - 1); + saved_spec = hunt_filter_entry_spec(hftp, i); + + if (!saved_spec) { + if (ins_index < 0) { + ins_index = i; + } + } else if (hunt_filter_equal(spec, saved_spec)) { + if (hunt_filter_entry_is_busy(hftp, i)) + break; + if (saved_spec->efs_priority + == EFX_FILTER_PRI_AUTO) { + ins_index = i; + goto found; + } else if (hunt_filter_is_exclusive(spec)) { + if (may_replace) { + ins_index = i; + goto found; + } else { + rc = EEXIST; + goto fail1; + } + } + + /* Leave existing */ + } + + /* + * Once we reach the maximum search depth, use + * the first suitable slot or return EBUSY if + * there was none. + */ + if (depth == EFX_HUNT_FILTER_SEARCH_LIMIT) { + if (ins_index < 0) { + rc = EBUSY; + goto fail2; + } + goto found; + } + depth++; + } + EFSYS_UNLOCK(enp->en_eslp, state); + locked = B_FALSE; + } + +found: + /* + * Create a software table entry if necessary, and mark it + * busy. We might yet fail to insert, but any attempt to + * insert a conflicting filter while we're waiting for the + * firmware must find the busy entry. + */ + saved_spec = hunt_filter_entry_spec(hftp, ins_index); + if (saved_spec) { + if (saved_spec->efs_priority == EFX_FILTER_PRI_AUTO) { + /* This is a filter we are refreshing */ + hunt_filter_set_entry_not_auto_old(hftp, ins_index); + goto out_unlock; + + } + replacing = B_TRUE; + } else { + EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (*spec), saved_spec); + if (!saved_spec) { + rc = ENOMEM; + goto fail3; + } + *saved_spec = *spec; + hunt_filter_set_entry(hftp, ins_index, saved_spec); + } + hunt_filter_set_entry_busy(hftp, ins_index); + + EFSYS_UNLOCK(enp->en_eslp, state); + locked = B_FALSE; + + /* + * On replacing the filter handle may change after after a successful + * replace operation. + */ + if (replacing) { + rc = efx_mcdi_filter_op_add(enp, spec, + MC_CMD_FILTER_OP_IN_OP_REPLACE, + &hftp->hft_entry[ins_index].hfe_handle); + } else if (hunt_filter_is_exclusive(spec)) { + rc = efx_mcdi_filter_op_add(enp, spec, + MC_CMD_FILTER_OP_IN_OP_INSERT, + &hftp->hft_entry[ins_index].hfe_handle); + } else { + rc = efx_mcdi_filter_op_add(enp, spec, + MC_CMD_FILTER_OP_IN_OP_SUBSCRIBE, + &hftp->hft_entry[ins_index].hfe_handle); + } + + if (rc != 0) + goto fail4; + + EFSYS_LOCK(enp->en_eslp, state); + locked = B_TRUE; + + if (replacing) { + /* Update the fields that may differ */ + saved_spec->efs_priority = spec->efs_priority; + saved_spec->efs_flags = spec->efs_flags; + saved_spec->efs_rss_context = spec->efs_rss_context; + saved_spec->efs_dmaq_id = spec->efs_dmaq_id; + } + + hunt_filter_set_entry_not_busy(hftp, ins_index); + +out_unlock: + + EFSYS_UNLOCK(enp->en_eslp, state); + locked = B_FALSE; + + if (filter_id) + *filter_id = ins_index; + + return (0); + +fail4: + EFSYS_PROBE(fail4); + + if (!replacing) { + EFSYS_KMEM_FREE(enp->en_esip, sizeof (*spec), saved_spec); + saved_spec = NULL; + } + hunt_filter_set_entry_not_busy(hftp, ins_index); + hunt_filter_set_entry(hftp, ins_index, NULL); + +fail3: + EFSYS_PROBE(fail3); + +fail2: + EFSYS_PROBE(fail2); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + if (locked) + EFSYS_UNLOCK(enp->en_eslp, state); + + return (rc); +} + + __checkReturn int +hunt_filter_add( + __in efx_nic_t *enp, + __inout efx_filter_spec_t *spec, + __in boolean_t may_replace) +{ + int rc; + + rc = hunt_filter_add_internal(enp, spec, may_replace, NULL); + if (rc != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + +static __checkReturn int +hunt_filter_delete_internal( + __in efx_nic_t *enp, + __in uint32_t filter_id) +{ + int rc; + hunt_filter_table_t *table = enp->en_filter.ef_hunt_filter_table; + efx_filter_spec_t *spec; + int state; + uint32_t filter_idx = filter_id % EFX_HUNT_FILTER_TBL_ROWS; + + /* + * Find the software table entry and mark it busy. Don't + * remove it yet; any attempt to update while we're waiting + * for the firmware must find the busy entry. + * + * FIXME: What if the busy flag is never cleared? + */ + EFSYS_LOCK(enp->en_eslp, state); + while (hunt_filter_entry_is_busy(table, filter_idx)) { + EFSYS_UNLOCK(enp->en_eslp, state); + EFSYS_SPIN(1); + EFSYS_LOCK(enp->en_eslp, state); + } + if ((spec = hunt_filter_entry_spec(table, filter_idx)) != NULL) { + hunt_filter_set_entry_busy(table, filter_idx); + } + EFSYS_UNLOCK(enp->en_eslp, state); + + if (spec == NULL) { + rc = ENOENT; + goto fail1; + } + + /* + * Try to remove the hardware filter. This may fail if the MC has + * rebooted (which frees all hardware filter resources). + */ + if (hunt_filter_is_exclusive(spec)) { + rc = efx_mcdi_filter_op_delete(enp, + MC_CMD_FILTER_OP_IN_OP_REMOVE, + &table->hft_entry[filter_idx].hfe_handle); + } else { + rc = efx_mcdi_filter_op_delete(enp, + MC_CMD_FILTER_OP_IN_OP_UNSUBSCRIBE, + &table->hft_entry[filter_idx].hfe_handle); + } + + /* Free the software table entry */ + EFSYS_LOCK(enp->en_eslp, state); + hunt_filter_set_entry_not_busy(table, filter_idx); + hunt_filter_set_entry(table, filter_idx, NULL); + EFSYS_UNLOCK(enp->en_eslp, state); + + EFSYS_KMEM_FREE(enp->en_esip, sizeof (*spec), spec); + + /* Check result of hardware filter removal */ + if (rc != 0) + goto fail2; + + return (0); + +fail2: + EFSYS_PROBE(fail2); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_filter_delete( + __in efx_nic_t *enp, + __inout efx_filter_spec_t *spec) +{ + int rc; + hunt_filter_table_t *table = enp->en_filter.ef_hunt_filter_table; + efx_filter_spec_t *saved_spec; + unsigned int hash; + unsigned int depth; + unsigned int i; + int state; + boolean_t locked = B_FALSE; + + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON); + + hash = hunt_filter_hash(spec); + + EFSYS_LOCK(enp->en_eslp, state); + locked = B_TRUE; + + depth = 1; + for (;;) { + i = (hash + depth) & (EFX_HUNT_FILTER_TBL_ROWS - 1); + saved_spec = hunt_filter_entry_spec(table, i); + if (saved_spec && hunt_filter_equal(spec, saved_spec) && + hunt_filter_same_dest(spec, saved_spec)) { + break; + } + if (depth == EFX_HUNT_FILTER_SEARCH_LIMIT) { + rc = ENOENT; + goto fail1; + } + depth++; + } + + EFSYS_UNLOCK(enp->en_eslp, state); + locked = B_FALSE; + + rc = hunt_filter_delete_internal(enp, i); + if (rc != 0) + goto fail2; + + return (0); + +fail2: + EFSYS_PROBE(fail2); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + if (locked) + EFSYS_UNLOCK(enp->en_eslp, state); + + return (rc); +} + +static __checkReturn int +efx_mcdi_get_parser_disp_info( + __in efx_nic_t *enp, + __out uint32_t *list, + __out size_t *length) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_GET_PARSER_DISP_INFO_IN_LEN, + MC_CMD_GET_PARSER_DISP_INFO_OUT_LENMAX)]; + int rc; + uint32_t i; + boolean_t support_unknown_ucast = B_FALSE; + boolean_t support_unknown_mcast = B_FALSE; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_GET_PARSER_DISP_INFO; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_GET_PARSER_DISP_INFO_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_GET_PARSER_DISP_INFO_OUT_LENMAX; + + MCDI_IN_SET_DWORD(req, GET_PARSER_DISP_INFO_OUT_OP, + MC_CMD_GET_PARSER_DISP_INFO_IN_OP_GET_SUPPORTED_RX_MATCHES); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + *length = MCDI_OUT_DWORD(req, + GET_PARSER_DISP_INFO_OUT_NUM_SUPPORTED_MATCHES); + + if (req.emr_out_length_used < + MC_CMD_GET_PARSER_DISP_INFO_OUT_LEN(*length)) { + rc = EMSGSIZE; + goto fail2; + } + + memcpy(list, + MCDI_OUT2(req, + uint32_t, + GET_PARSER_DISP_INFO_OUT_SUPPORTED_MATCHES), + (*length) * sizeof (uint32_t)); + EFX_STATIC_ASSERT(sizeof (uint32_t) == + MC_CMD_GET_PARSER_DISP_INFO_OUT_SUPPORTED_MATCHES_LEN); + + /* + * Remove UNKNOWN UCAST and MCAST flags, and if both are present, change + * the lower priority one to LOC_MAC_IG. + */ + for (i = 0; i < *length; i++) { + if (list[i] & MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_UCAST_DST_LBN) { + list[i] &= + (~MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_UCAST_DST_LBN); + support_unknown_ucast = B_TRUE; + } + if (list[i] & MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_MCAST_DST_LBN) { + list[i] &= + (~MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_MCAST_DST_LBN); + support_unknown_mcast = B_TRUE; + } + + if (support_unknown_ucast && support_unknown_mcast) { + list[i] &= EFX_FILTER_MATCH_LOC_MAC_IG; + break; + } + } + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_filter_supported_filters( + __in efx_nic_t *enp, + __out uint32_t *list, + __out size_t *length) +{ + int rc; + + if ((rc = efx_mcdi_get_parser_disp_info(enp, list, length) != 0)) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +static __checkReturn int +hunt_filter_unicast_refresh( + __in efx_nic_t *enp, + __in_ecount(6) uint8_t const *addr, + __in boolean_t all_unicst, + __in efx_filter_flag_t filter_flags) +{ + hunt_filter_table_t *hftp = enp->en_filter.ef_hunt_filter_table; + efx_filter_spec_t spec; + int rc; + + if (all_unicst == B_TRUE) + goto use_uc_def; + + /* Insert the filter for the local station address */ + efx_filter_spec_init_rx(&spec, EFX_FILTER_PRI_AUTO, + filter_flags, + hftp->hft_default_rxq); + efx_filter_spec_set_eth_local(&spec, EFX_FILTER_SPEC_VID_UNSPEC, addr); + + rc = hunt_filter_add_internal(enp, &spec, B_TRUE, + &hftp->hft_unicst_filter_index); + if (rc != 0) { + /* + * Fall back to an unknown filter. We may be able to subscribe + * to it even if we couldn't insert the unicast filter. + */ + goto use_uc_def; + } + hftp->hft_unicst_filter_set = B_TRUE; + + return (0); + +use_uc_def: + /* Insert the unknown unicast filter */ + efx_filter_spec_init_rx(&spec, EFX_FILTER_PRI_AUTO, + filter_flags, + hftp->hft_default_rxq); + efx_filter_spec_set_uc_def(&spec); + rc = hunt_filter_add_internal(enp, &spec, B_TRUE, + &hftp->hft_unicst_filter_index); + if (rc != 0) + goto fail1; + + hftp->hft_unicst_filter_set = B_TRUE; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + if (hftp->hft_unicst_filter_set != B_FALSE) { + (void) hunt_filter_delete_internal(enp, + hftp->hft_unicst_filter_index); + + hftp->hft_unicst_filter_set = B_FALSE; + } + + return (rc); +} + +static __checkReturn int +hunt_filter_multicast_refresh( + __in efx_nic_t *enp, + __in boolean_t mulcst, + __in boolean_t all_mulcst, + __in boolean_t brdcst, + __in_ecount(6*count) uint8_t const *addrs, + __in int count, + __in efx_filter_flag_t filter_flags) +{ + hunt_filter_table_t *hftp = enp->en_filter.ef_hunt_filter_table; + efx_filter_spec_t spec; + uint8_t addr[6]; + unsigned i; + int rc; + + if (all_mulcst == B_TRUE) + goto use_mc_def; + + if (mulcst == B_FALSE) + count = 0; + + if (count + (brdcst ? 1 : 0) > + EFX_ARRAY_SIZE(hftp->hft_mulcst_filter_indexes)) { + /* Too many MAC addresses; use unknown multicast filter */ + goto use_mc_def; + } + + /* Insert/renew multicast address list filters */ + hftp->hft_mulcst_filter_count = count; + for (i = 0; i < hftp->hft_mulcst_filter_count; i++) { + efx_filter_spec_init_rx(&spec, + EFX_FILTER_PRI_AUTO, + filter_flags, + hftp->hft_default_rxq); + + efx_filter_spec_set_eth_local(&spec, + EFX_FILTER_SPEC_VID_UNSPEC, + &addrs[i * EFX_MAC_ADDR_LEN]); + + rc = hunt_filter_add_internal(enp, &spec, B_TRUE, + &hftp->hft_mulcst_filter_indexes[i]); + if (rc != 0) { + /* Rollback, then use unknown multicast filter */ + goto rollback; + } + } + + if (brdcst == B_TRUE) { + /* Insert/renew broadcast address filter */ + hftp->hft_mulcst_filter_count++; + efx_filter_spec_init_rx(&spec, EFX_FILTER_PRI_AUTO, + filter_flags, + hftp->hft_default_rxq); + + EFX_MAC_BROADCAST_ADDR_SET(addr); + efx_filter_spec_set_eth_local(&spec, EFX_FILTER_SPEC_VID_UNSPEC, + addr); + + rc = hunt_filter_add_internal(enp, &spec, B_TRUE, + &hftp->hft_mulcst_filter_indexes[ + hftp->hft_mulcst_filter_count - 1]); + if (rc != 0) { + /* Rollback, then use unknown multicast filter */ + goto rollback; + } + } + + return (0); + +rollback: + /* + * Rollback by removing any filters we have inserted + * before inserting the unknown multicast filter. + */ + while (i--) { + (void) hunt_filter_delete_internal(enp, + hftp->hft_mulcst_filter_indexes[i]); + } + hftp->hft_mulcst_filter_count = 0; + +use_mc_def: + /* Insert the unknown multicast filter */ + efx_filter_spec_init_rx(&spec, EFX_FILTER_PRI_AUTO, + filter_flags, + hftp->hft_default_rxq); + efx_filter_spec_set_mc_def(&spec); + + rc = hunt_filter_add_internal(enp, &spec, B_TRUE, + &hftp->hft_mulcst_filter_indexes[0]); + if (rc != 0) + goto fail1; + + hftp->hft_mulcst_filter_count = 1; + + /* + * FIXME: If brdcst == B_FALSE, add a filter to drop broadcast traffic. + */ + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); + +} + + +static __checkReturn int +hunt_filter_get_workarounds( + __in efx_nic_t *enp) +{ + efx_nic_cfg_t *encp = &enp->en_nic_cfg; + uint32_t implemented = 0; + uint32_t enabled = 0; + int rc; + + rc = efx_mcdi_get_workarounds(enp, &implemented, &enabled); + if (rc == 0) { + /* Check if chained multicast filter support is enabled */ + if (implemented & enabled & MC_CMD_GET_WORKAROUNDS_OUT_BUG26807) + encp->enc_bug26807_workaround = B_TRUE; + else + encp->enc_bug26807_workaround = B_FALSE; + } else if (rc == ENOTSUP) { + /* + * Firmware is too old to support GET_WORKAROUNDS, and support + * for this workaround was implemented later. + */ + encp->enc_bug26807_workaround = B_FALSE; + } else { + goto fail1; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); + +} + + +/* + * Reconfigure all filters. + * If all_unicst and/or all mulcst filters cannot be applied then + * return ENOTSUP (Note the filters for the specified addresses are + * still applied in this case). + */ + __checkReturn int +hunt_filter_reconfigure( + __in efx_nic_t *enp, + __in_ecount(6) uint8_t const *mac_addr, + __in boolean_t all_unicst, + __in boolean_t mulcst, + __in boolean_t all_mulcst, + __in boolean_t brdcst, + __in_ecount(6*count) uint8_t const *addrs, + __in int count) +{ + hunt_filter_table_t *table = enp->en_filter.ef_hunt_filter_table; + efx_filter_flag_t filter_flags; + unsigned i; + int all_unicst_rc; + int all_mulcst_rc; + int rc; + + if (table->hft_default_rxq == NULL) { + /* + * Filters direct traffic to the default RXQ, and so cannot be + * inserted until it is available. Any currently configured + * filters must be removed (ignore errors in case the MC + * has rebooted, which removes hardware filters). + */ + if (table->hft_unicst_filter_set != B_FALSE) { + (void) hunt_filter_delete_internal(enp, + table->hft_unicst_filter_index); + table->hft_unicst_filter_set = B_FALSE; + } + for (i = 0; i < table->hft_mulcst_filter_count; i++) { + (void) hunt_filter_delete_internal(enp, + table->hft_mulcst_filter_indexes[i]); + } + table->hft_mulcst_filter_count = 0; + + return (0); + } + + if (table->hft_using_rss) + filter_flags = EFX_FILTER_FLAG_RX_RSS; + else + filter_flags = 0; + + /* Mark old filters which may need to be removed */ + if (table->hft_unicst_filter_set != B_FALSE) { + hunt_filter_set_entry_auto_old(table, + table->hft_unicst_filter_index); + } + for (i = 0; i < table->hft_mulcst_filter_count; i++) { + hunt_filter_set_entry_auto_old(table, + table->hft_mulcst_filter_indexes[i]); + } + + /* Insert or renew unicast filters */ + if ((all_unicst_rc = hunt_filter_unicast_refresh(enp, mac_addr, + all_unicst, filter_flags)) != 0) { + if (all_unicst == B_FALSE) { + rc = all_unicst_rc; + goto fail1; + } + /* Retry without all_unicast flag */ + rc = hunt_filter_unicast_refresh(enp, mac_addr, + B_FALSE, filter_flags); + if (rc != 0) + goto fail2; + } + + /* + * WORKAROUND_BUG26807 controls firmware support for chained multicast + * filters, and can only be enabled or disabled when the hardware filter + * table is empty. + * + * Firmware will reset (FLR) functions which have inserted filters in + * the hardware filter table when the workaround is enabled/disabled. + * Functions without any hardware filters are not reset. + * + * Re-check if the workaround is enabled after adding unicast hardware + * filters. This ensures that encp->enc_workaround_bug26807 matches the + * firmware state, and that later changes to enable/disable the + * workaround will result in this function seeing a reset (FLR). + */ + if ((rc = hunt_filter_get_workarounds(enp)) != 0) + goto fail3; + + /* Insert or renew multicast filters */ + if ((all_mulcst_rc = hunt_filter_multicast_refresh(enp, mulcst, + all_mulcst, brdcst, + addrs, count, filter_flags)) != 0) { + if (all_mulcst == B_FALSE) { + rc = all_mulcst_rc; + goto fail4; + } + /* Retry without all_mulcast flag */ + rc = hunt_filter_multicast_refresh(enp, mulcst, + B_FALSE, brdcst, + addrs, count, filter_flags); + if (rc != 0) + goto fail5; + } + + /* Remove old filters which were not renewed */ + for (i = 0; i < EFX_ARRAY_SIZE(table->hft_entry); i++) { + if (hunt_filter_entry_is_auto_old(table, i)) { + (void) hunt_filter_delete_internal(enp, i); + } + } + + /* report if any optional flags were rejected */ + if (((all_unicst != B_FALSE) && (all_unicst_rc != 0)) || + ((all_mulcst != B_FALSE) && (all_mulcst_rc != 0))) { + rc = ENOTSUP; + } + + return (rc); + +fail5: + EFSYS_PROBE(fail5); +fail4: + EFSYS_PROBE(fail4); +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + /* Clear auto old flags */ + for (i = 0; i < EFX_ARRAY_SIZE(table->hft_entry); i++) { + if (hunt_filter_entry_is_auto_old(table, i)) { + hunt_filter_set_entry_not_auto_old(table, i); + } + } + + return (rc); +} + + void +hunt_filter_get_default_rxq( + __in efx_nic_t *enp, + __out efx_rxq_t **erpp, + __out boolean_t *using_rss) +{ + hunt_filter_table_t *table = enp->en_filter.ef_hunt_filter_table; + + *erpp = table->hft_default_rxq; + *using_rss = table->hft_using_rss; +} + + + void +hunt_filter_default_rxq_set( + __in efx_nic_t *enp, + __in efx_rxq_t *erp, + __in boolean_t using_rss) +{ + hunt_filter_table_t *table = enp->en_filter.ef_hunt_filter_table; + +#if EFSYS_OPT_RX_SCALE + EFSYS_ASSERT((using_rss == B_FALSE) || + (enp->en_rss_context != HUNTINGTON_RSS_CONTEXT_INVALID)); + table->hft_using_rss = using_rss; +#else + EFSYS_ASSERT(using_rss == B_FALSE); + table->hft_using_rss = B_FALSE; +#endif + table->hft_default_rxq = erp; +} + + void +hunt_filter_default_rxq_clear( + __in efx_nic_t *enp) +{ + hunt_filter_table_t *table = enp->en_filter.ef_hunt_filter_table; + + table->hft_default_rxq = NULL; + table->hft_using_rss = B_FALSE; +} + + +#endif /* EFSYS_OPT_FILTER */ + +#endif /* EFSYS_OPT_HUNTINGTON */ diff --git a/sys/dev/sfxge/common/hunt_impl.h b/sys/dev/sfxge/common/hunt_impl.h new file mode 100644 index 000000000000..d1a4c9401124 --- /dev/null +++ b/sys/dev/sfxge/common/hunt_impl.h @@ -0,0 +1,1015 @@ +/*- + * Copyright (c) 2012-2015 Solarflare Communications Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. + * + * $FreeBSD$ + */ + +#ifndef _SYS_HUNT_IMPL_H +#define _SYS_HUNT_IMPL_H + +#include "efx.h" +#include "efx_regs.h" +#include "efx_regs_ef10.h" +#include "efx_mcdi.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define HUNTINGTON_NVRAM_CHUNK 0x80 + +/* Alignment requirement for value written to RX WPTR: + * the WPTR must be aligned to an 8 descriptor boundary + */ +#define HUNTINGTON_RX_WPTR_ALIGN 8 + +/* Invalid RSS context handle */ +#define HUNTINGTON_RSS_CONTEXT_INVALID (0xffffffff) + + +/* EV */ + + __checkReturn int +hunt_ev_init( + __in efx_nic_t *enp); + + void +hunt_ev_fini( + __in efx_nic_t *enp); + + __checkReturn int +hunt_ev_qcreate( + __in efx_nic_t *enp, + __in unsigned int index, + __in efsys_mem_t *esmp, + __in size_t n, + __in uint32_t id, + __in efx_evq_t *eep); + + void +hunt_ev_qdestroy( + __in efx_evq_t *eep); + + __checkReturn int +hunt_ev_qprime( + __in efx_evq_t *eep, + __in unsigned int count); + + void +hunt_ev_qpost( + __in efx_evq_t *eep, + __in uint16_t data); + + __checkReturn int +hunt_ev_qmoderate( + __in efx_evq_t *eep, + __in unsigned int us); + +#if EFSYS_OPT_QSTATS + void +hunt_ev_qstats_update( + __in efx_evq_t *eep, + __inout_ecount(EV_NQSTATS) efsys_stat_t *stat); +#endif /* EFSYS_OPT_QSTATS */ + + void +hunt_ev_rxlabel_init( + __in efx_evq_t *eep, + __in efx_rxq_t *erp, + __in unsigned int label); + + void +hunt_ev_rxlabel_fini( + __in efx_evq_t *eep, + __in unsigned int label); + +/* INTR */ + + __checkReturn int +hunt_intr_init( + __in efx_nic_t *enp, + __in efx_intr_type_t type, + __in efsys_mem_t *esmp); + + void +hunt_intr_enable( + __in efx_nic_t *enp); + + void +hunt_intr_disable( + __in efx_nic_t *enp); + + void +hunt_intr_disable_unlocked( + __in efx_nic_t *enp); + + __checkReturn int +hunt_intr_trigger( + __in efx_nic_t *enp, + __in unsigned int level); + + void +hunt_intr_fini( + __in efx_nic_t *enp); + +/* NIC */ + +extern __checkReturn int +hunt_nic_probe( + __in efx_nic_t *enp); + +extern __checkReturn int +hunt_nic_set_drv_limits( + __inout efx_nic_t *enp, + __in efx_drv_limits_t *edlp); + +extern __checkReturn int +hunt_nic_get_vi_pool( + __in efx_nic_t *enp, + __out uint32_t *vi_countp); + +extern __checkReturn int +hunt_nic_get_bar_region( + __in efx_nic_t *enp, + __in efx_nic_region_t region, + __out uint32_t *offsetp, + __out size_t *sizep); + +extern __checkReturn int +hunt_nic_reset( + __in efx_nic_t *enp); + +extern __checkReturn int +hunt_nic_init( + __in efx_nic_t *enp); + +#if EFSYS_OPT_DIAG + +extern __checkReturn int +hunt_nic_register_test( + __in efx_nic_t *enp); + +#endif /* EFSYS_OPT_DIAG */ + +extern void +hunt_nic_fini( + __in efx_nic_t *enp); + +extern void +hunt_nic_unprobe( + __in efx_nic_t *enp); + + +/* MAC */ + +extern __checkReturn int +hunt_mac_poll( + __in efx_nic_t *enp, + __out efx_link_mode_t *link_modep); + +extern __checkReturn int +hunt_mac_up( + __in efx_nic_t *enp, + __out boolean_t *mac_upp); + +extern __checkReturn int +hunt_mac_addr_set( + __in efx_nic_t *enp); + +extern __checkReturn int +hunt_mac_reconfigure( + __in efx_nic_t *enp); + +extern __checkReturn int +hunt_mac_multicast_list_set( + __in efx_nic_t *enp); + +extern __checkReturn int +hunt_mac_filter_default_rxq_set( + __in efx_nic_t *enp, + __in efx_rxq_t *erp, + __in boolean_t using_rss); + +extern void +hunt_mac_filter_default_rxq_clear( + __in efx_nic_t *enp); + +#if EFSYS_OPT_LOOPBACK + +extern __checkReturn int +hunt_mac_loopback_set( + __in efx_nic_t *enp, + __in efx_link_mode_t link_mode, + __in efx_loopback_type_t loopback_type); + +#endif /* EFSYS_OPT_LOOPBACK */ + +#if EFSYS_OPT_MAC_STATS + +extern __checkReturn int +hunt_mac_stats_update( + __in efx_nic_t *enp, + __in efsys_mem_t *esmp, + __out_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat, + __out_opt uint32_t *generationp); + +#endif /* EFSYS_OPT_MAC_STATS */ + + +/* MCDI */ + +#if EFSYS_OPT_MCDI + +extern __checkReturn int +hunt_mcdi_init( + __in efx_nic_t *enp, + __in const efx_mcdi_transport_t *mtp); + +extern void +hunt_mcdi_fini( + __in efx_nic_t *enp); + +extern void +hunt_mcdi_request_copyin( + __in efx_nic_t *enp, + __in efx_mcdi_req_t *emrp, + __in unsigned int seq, + __in boolean_t ev_cpl, + __in boolean_t new_epoch); + +extern __checkReturn boolean_t +hunt_mcdi_request_poll( + __in efx_nic_t *enp); + +extern void +hunt_mcdi_request_copyout( + __in efx_nic_t *enp, + __in efx_mcdi_req_t *emrp); + +extern int +hunt_mcdi_poll_reboot( + __in efx_nic_t *enp); + +extern __checkReturn int +hunt_mcdi_fw_update_supported( + __in efx_nic_t *enp, + __out boolean_t *supportedp); + +extern __checkReturn int +hunt_mcdi_macaddr_change_supported( + __in efx_nic_t *enp, + __out boolean_t *supportedp); + +#endif /* EFSYS_OPT_MCDI */ + +/* NVRAM */ + +#if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD + +extern __checkReturn int +hunt_nvram_buf_read_tlv( + __in efx_nic_t *enp, + __in_bcount(partn_size) caddr_t partn_data, + __in size_t partn_size, + __in uint32_t tag, + __deref_out_bcount_opt(*sizep) caddr_t *datap, + __out size_t *sizep); + +extern __checkReturn int +hunt_nvram_buf_write_tlv( + __inout_bcount(partn_size) caddr_t partn_data, + __in size_t partn_size, + __in uint32_t tag, + __in_bcount(tag_size) caddr_t tag_data, + __in size_t tag_size, + __out size_t *total_lengthp); + +extern __checkReturn int +hunt_nvram_partn_read_tlv( + __in efx_nic_t *enp, + __in uint32_t partn, + __in uint32_t tag, + __deref_out_bcount_opt(*sizep) caddr_t *datap, + __out size_t *sizep); + +extern __checkReturn int +hunt_nvram_partn_write_tlv( + __in efx_nic_t *enp, + __in uint32_t partn, + __in uint32_t tag, + __in_bcount(size) caddr_t data, + __in size_t size); + +extern __checkReturn int +hunt_nvram_partn_size( + __in efx_nic_t *enp, + __in unsigned int partn, + __out size_t *sizep); + +extern __checkReturn int +hunt_nvram_partn_lock( + __in efx_nic_t *enp, + __in unsigned int partn); + +extern __checkReturn int +hunt_nvram_partn_read( + __in efx_nic_t *enp, + __in unsigned int partn, + __in unsigned int offset, + __out_bcount(size) caddr_t data, + __in size_t size); + +extern __checkReturn int +hunt_nvram_partn_erase( + __in efx_nic_t *enp, + __in unsigned int partn, + __in unsigned int offset, + __in size_t size); + +extern __checkReturn int +hunt_nvram_partn_write( + __in efx_nic_t *enp, + __in unsigned int partn, + __in unsigned int offset, + __out_bcount(size) caddr_t data, + __in size_t size); + +extern void +hunt_nvram_partn_unlock( + __in efx_nic_t *enp, + __in unsigned int partn); + +#endif /* EFSYS_OPT_NVRAM || EFSYS_OPT_VPD */ + +#if EFSYS_OPT_NVRAM + +#if EFSYS_OPT_DIAG + +extern __checkReturn int +hunt_nvram_test( + __in efx_nic_t *enp); + +#endif /* EFSYS_OPT_DIAG */ + +extern __checkReturn int +hunt_nvram_size( + __in efx_nic_t *enp, + __in efx_nvram_type_t type, + __out size_t *sizep); + +extern __checkReturn int +hunt_nvram_get_version( + __in efx_nic_t *enp, + __in efx_nvram_type_t type, + __out uint32_t *subtypep, + __out_ecount(4) uint16_t version[4]); + +extern __checkReturn int +hunt_nvram_rw_start( + __in efx_nic_t *enp, + __in efx_nvram_type_t type, + __out size_t *pref_chunkp); + +extern __checkReturn int +hunt_nvram_read_chunk( + __in efx_nic_t *enp, + __in efx_nvram_type_t type, + __in unsigned int offset, + __out_bcount(size) caddr_t data, + __in size_t size); + +extern __checkReturn int +hunt_nvram_erase( + __in efx_nic_t *enp, + __in efx_nvram_type_t type); + +extern __checkReturn int +hunt_nvram_write_chunk( + __in efx_nic_t *enp, + __in efx_nvram_type_t type, + __in unsigned int offset, + __in_bcount(size) caddr_t data, + __in size_t size); + +extern void +hunt_nvram_rw_finish( + __in efx_nic_t *enp, + __in efx_nvram_type_t type); + +extern __checkReturn int +hunt_nvram_partn_set_version( + __in efx_nic_t *enp, + __in unsigned int partn, + __in_ecount(4) uint16_t version[4]); + +extern __checkReturn int +hunt_nvram_set_version( + __in efx_nic_t *enp, + __in efx_nvram_type_t type, + __in_ecount(4) uint16_t version[4]); + +#endif /* EFSYS_OPT_NVRAM */ + + +/* PHY */ + +typedef struct hunt_link_state_s { + uint32_t hls_adv_cap_mask; + uint32_t hls_lp_cap_mask; + unsigned int hls_fcntl; + efx_link_mode_t hls_link_mode; +#if EFSYS_OPT_LOOPBACK + efx_loopback_type_t hls_loopback; +#endif + boolean_t hls_mac_up; +} hunt_link_state_t; + +extern void +hunt_phy_link_ev( + __in efx_nic_t *enp, + __in efx_qword_t *eqp, + __out efx_link_mode_t *link_modep); + +extern __checkReturn int +hunt_phy_get_link( + __in efx_nic_t *enp, + __out hunt_link_state_t *hlsp); + +extern __checkReturn int +hunt_phy_power( + __in efx_nic_t *enp, + __in boolean_t on); + +extern __checkReturn int +hunt_phy_reconfigure( + __in efx_nic_t *enp); + +extern __checkReturn int +hunt_phy_verify( + __in efx_nic_t *enp); + +extern __checkReturn int +hunt_phy_oui_get( + __in efx_nic_t *enp, + __out uint32_t *ouip); + +#if EFSYS_OPT_PHY_STATS + +extern __checkReturn int +hunt_phy_stats_update( + __in efx_nic_t *enp, + __in efsys_mem_t *esmp, + __out_ecount(EFX_PHY_NSTATS) uint32_t *stat); + +#endif /* EFSYS_OPT_PHY_STATS */ + +#if EFSYS_OPT_PHY_PROPS + +#if EFSYS_OPT_NAMES + +extern const char * +hunt_phy_prop_name( + __in efx_nic_t *enp, + __in unsigned int id); + +#endif /* EFSYS_OPT_NAMES */ + +extern __checkReturn int +hunt_phy_prop_get( + __in efx_nic_t *enp, + __in unsigned int id, + __in uint32_t flags, + __out uint32_t *valp); + +extern __checkReturn int +hunt_phy_prop_set( + __in efx_nic_t *enp, + __in unsigned int id, + __in uint32_t val); + +#endif /* EFSYS_OPT_PHY_PROPS */ + +#if EFSYS_OPT_BIST + +extern __checkReturn int +hunt_bist_enable_offline( + __in efx_nic_t *enp); + +extern __checkReturn int +hunt_bist_start( + __in efx_nic_t *enp, + __in efx_bist_type_t type); + +extern __checkReturn int +hunt_bist_poll( + __in efx_nic_t *enp, + __in efx_bist_type_t type, + __out efx_bist_result_t *resultp, + __out_opt __drv_when(count > 0, __notnull) + uint32_t *value_maskp, + __out_ecount_opt(count) __drv_when(count > 0, __notnull) + unsigned long *valuesp, + __in size_t count); + +extern void +hunt_bist_stop( + __in efx_nic_t *enp, + __in efx_bist_type_t type); + +#endif /* EFSYS_OPT_BIST */ + + +/* SRAM */ + +#if EFSYS_OPT_DIAG + +extern __checkReturn int +hunt_sram_test( + __in efx_nic_t *enp, + __in efx_sram_pattern_fn_t func); + +#endif /* EFSYS_OPT_DIAG */ + + +/* TX */ + +extern __checkReturn int +hunt_tx_init( + __in efx_nic_t *enp); + +extern void +hunt_tx_fini( + __in efx_nic_t *enp); + +extern __checkReturn int +hunt_tx_qcreate( + __in efx_nic_t *enp, + __in unsigned int index, + __in unsigned int label, + __in efsys_mem_t *esmp, + __in size_t n, + __in uint32_t id, + __in uint16_t flags, + __in efx_evq_t *eep, + __in efx_txq_t *etp, + __out unsigned int *addedp); + +extern void +hunt_tx_qdestroy( + __in efx_txq_t *etp); + +extern __checkReturn int +hunt_tx_qpost( + __in efx_txq_t *etp, + __in_ecount(n) efx_buffer_t *eb, + __in unsigned int n, + __in unsigned int completed, + __inout unsigned int *addedp); + +extern void +hunt_tx_qpush( + __in efx_txq_t *etp, + __in unsigned int added, + __in unsigned int pushed); + +extern __checkReturn int +hunt_tx_qpace( + __in efx_txq_t *etp, + __in unsigned int ns); + +extern __checkReturn int +hunt_tx_qflush( + __in efx_txq_t *etp); + +extern void +hunt_tx_qenable( + __in efx_txq_t *etp); + +extern __checkReturn int +hunt_tx_qpio_enable( + __in efx_txq_t *etp); + +extern void +hunt_tx_qpio_disable( + __in efx_txq_t *etp); + +extern __checkReturn int +hunt_tx_qpio_write( + __in efx_txq_t *etp, + __in_ecount(buf_length) uint8_t *buffer, + __in size_t buf_length, + __in size_t pio_buf_offset); + +extern __checkReturn int +hunt_tx_qpio_post( + __in efx_txq_t *etp, + __in size_t pkt_length, + __in unsigned int completed, + __inout unsigned int *addedp); + +extern __checkReturn int +hunt_tx_qdesc_post( + __in efx_txq_t *etp, + __in_ecount(n) efx_desc_t *ed, + __in unsigned int n, + __in unsigned int completed, + __inout unsigned int *addedp); + +extern void +hunt_tx_qdesc_dma_create( + __in efx_txq_t *etp, + __in efsys_dma_addr_t addr, + __in size_t size, + __in boolean_t eop, + __out efx_desc_t *edp); + +extern void +hunt_tx_qdesc_tso_create( + __in efx_txq_t *etp, + __in uint16_t ipv4_id, + __in uint32_t tcp_seq, + __in uint8_t tcp_flags, + __out efx_desc_t *edp); + +extern void +hunt_tx_qdesc_vlantci_create( + __in efx_txq_t *etp, + __in uint16_t vlan_tci, + __out efx_desc_t *edp); + + +#if EFSYS_OPT_QSTATS + +extern void +hunt_tx_qstats_update( + __in efx_txq_t *etp, + __inout_ecount(TX_NQSTATS) efsys_stat_t *stat); + +#endif /* EFSYS_OPT_QSTATS */ + +/* PIO */ + +/* Missing register definitions */ +#ifndef ER_DZ_TX_PIOBUF_OFST +#define ER_DZ_TX_PIOBUF_OFST 0x00001000 +#endif +#ifndef ER_DZ_TX_PIOBUF_STEP +#define ER_DZ_TX_PIOBUF_STEP 8192 +#endif +#ifndef ER_DZ_TX_PIOBUF_ROWS +#define ER_DZ_TX_PIOBUF_ROWS 2048 +#endif + +#ifndef ER_DZ_TX_PIOBUF_SIZE +#define ER_DZ_TX_PIOBUF_SIZE 2048 +#endif + +#define HUNT_PIOBUF_NBUFS (16) +#define HUNT_PIOBUF_SIZE (ER_DZ_TX_PIOBUF_SIZE) + +#define HUNT_MIN_PIO_ALLOC_SIZE (HUNT_PIOBUF_SIZE / 32) + +typedef uint32_t efx_piobuf_handle_t; + +#define EFX_PIOBUF_HANDLE_INVALID ((efx_piobuf_handle_t) -1) + +extern __checkReturn int +hunt_nic_pio_alloc( + __inout efx_nic_t *enp, + __out uint32_t *bufnump, + __out efx_piobuf_handle_t *handlep, + __out uint32_t *blknump, + __out uint32_t *offsetp, + __out size_t *sizep); + +extern __checkReturn int +hunt_nic_pio_free( + __inout efx_nic_t *enp, + __in uint32_t bufnum, + __in uint32_t blknum); + +extern __checkReturn int +hunt_nic_pio_link( + __inout efx_nic_t *enp, + __in uint32_t vi_index, + __in efx_piobuf_handle_t handle); + +extern __checkReturn int +hunt_nic_pio_unlink( + __inout efx_nic_t *enp, + __in uint32_t vi_index); + + +/* VPD */ + +#if EFSYS_OPT_VPD + +extern __checkReturn int +hunt_vpd_init( + __in efx_nic_t *enp); + +extern __checkReturn int +hunt_vpd_size( + __in efx_nic_t *enp, + __out size_t *sizep); + +extern __checkReturn int +hunt_vpd_read( + __in efx_nic_t *enp, + __out_bcount(size) caddr_t data, + __in size_t size); + +extern __checkReturn int +hunt_vpd_verify( + __in efx_nic_t *enp, + __in_bcount(size) caddr_t data, + __in size_t size); + +extern __checkReturn int +hunt_vpd_reinit( + __in efx_nic_t *enp, + __in_bcount(size) caddr_t data, + __in size_t size); + +extern __checkReturn int +hunt_vpd_get( + __in efx_nic_t *enp, + __in_bcount(size) caddr_t data, + __in size_t size, + __inout efx_vpd_value_t *evvp); + +extern __checkReturn int +hunt_vpd_set( + __in efx_nic_t *enp, + __in_bcount(size) caddr_t data, + __in size_t size, + __in efx_vpd_value_t *evvp); + +extern __checkReturn int +hunt_vpd_next( + __in efx_nic_t *enp, + __in_bcount(size) caddr_t data, + __in size_t size, + __out efx_vpd_value_t *evvp, + __inout unsigned int *contp); + +extern __checkReturn int +hunt_vpd_write( + __in efx_nic_t *enp, + __in_bcount(size) caddr_t data, + __in size_t size); + +extern void +hunt_vpd_fini( + __in efx_nic_t *enp); + +#endif /* EFSYS_OPT_VPD */ + + +/* RX */ + +extern __checkReturn int +hunt_rx_init( + __in efx_nic_t *enp); + +#if EFSYS_OPT_RX_HDR_SPLIT +extern __checkReturn int +hunt_rx_hdr_split_enable( + __in efx_nic_t *enp, + __in unsigned int hdr_buf_size, + __in unsigned int pld_buf_size); +#endif /* EFSYS_OPT_RX_HDR_SPLIT */ + +#if EFSYS_OPT_RX_SCATTER +extern __checkReturn int +hunt_rx_scatter_enable( + __in efx_nic_t *enp, + __in unsigned int buf_size); +#endif /* EFSYS_OPT_RX_SCATTER */ + + +#if EFSYS_OPT_RX_SCALE + +extern __checkReturn int +hunt_rx_scale_mode_set( + __in efx_nic_t *enp, + __in efx_rx_hash_alg_t alg, + __in efx_rx_hash_type_t type, + __in boolean_t insert); + +extern __checkReturn int +hunt_rx_scale_key_set( + __in efx_nic_t *enp, + __in_ecount(n) uint8_t *key, + __in size_t n); + +extern __checkReturn int +hunt_rx_scale_tbl_set( + __in efx_nic_t *enp, + __in_ecount(n) unsigned int *table, + __in size_t n); + +#endif /* EFSYS_OPT_RX_SCALE */ + +extern void +hunt_rx_qpost( + __in efx_rxq_t *erp, + __in_ecount(n) efsys_dma_addr_t *addrp, + __in size_t size, + __in unsigned int n, + __in unsigned int completed, + __in unsigned int added); + +extern void +hunt_rx_qpush( + __in efx_rxq_t *erp, + __in unsigned int added, + __inout unsigned int *pushedp); + +extern __checkReturn int +hunt_rx_qflush( + __in efx_rxq_t *erp); + +extern void +hunt_rx_qenable( + __in efx_rxq_t *erp); + +extern __checkReturn int +hunt_rx_qcreate( + __in efx_nic_t *enp, + __in unsigned int index, + __in unsigned int label, + __in efx_rxq_type_t type, + __in efsys_mem_t *esmp, + __in size_t n, + __in uint32_t id, + __in efx_evq_t *eep, + __in efx_rxq_t *erp); + +extern void +hunt_rx_qdestroy( + __in efx_rxq_t *erp); + +extern void +hunt_rx_fini( + __in efx_nic_t *enp); + +#if EFSYS_OPT_FILTER + +typedef struct hunt_filter_handle_s { + uint32_t hfh_lo; + uint32_t hfh_hi; +} hunt_filter_handle_t; + +typedef struct hunt_filter_entry_s { + uintptr_t hfe_spec; /* pointer to filter spec plus busy bit */ + hunt_filter_handle_t hfe_handle; +} hunt_filter_entry_t; + +/* + * BUSY flag indicates that an update is in progress. + * AUTO_OLD flag is used to mark and sweep MAC packet filters. + */ +#define EFX_HUNT_FILTER_FLAG_BUSY 1U +#define EFX_HUNT_FILTER_FLAG_AUTO_OLD 2U +#define EFX_HUNT_FILTER_FLAGS 3U + +#define EFX_HUNT_FILTER_TBL_ROWS 8192 + +/* Allow for the broadcast address to be added to the multicast list */ +#define EFX_HUNT_FILTER_MULTICAST_FILTERS_MAX (EFX_MAC_MULTICAST_LIST_MAX + 1) + +typedef struct hunt_filter_table_s { + hunt_filter_entry_t hft_entry[EFX_HUNT_FILTER_TBL_ROWS]; + efx_rxq_t * hft_default_rxq; + boolean_t hft_using_rss; + uint32_t hft_unicst_filter_index; + boolean_t hft_unicst_filter_set; + uint32_t hft_mulcst_filter_indexes[ + EFX_HUNT_FILTER_MULTICAST_FILTERS_MAX]; + uint32_t hft_mulcst_filter_count; +} hunt_filter_table_t; + + __checkReturn int +hunt_filter_init( + __in efx_nic_t *enp); + + void +hunt_filter_fini( + __in efx_nic_t *enp); + + __checkReturn int +hunt_filter_restore( + __in efx_nic_t *enp); + + __checkReturn int +hunt_filter_add( + __in efx_nic_t *enp, + __inout efx_filter_spec_t *spec, + __in boolean_t may_replace); + + __checkReturn int +hunt_filter_delete( + __in efx_nic_t *enp, + __inout efx_filter_spec_t *spec); + +extern __checkReturn int +hunt_filter_supported_filters( + __in efx_nic_t *enp, + __out uint32_t *list, + __out size_t *length); + +extern __checkReturn int +hunt_filter_reconfigure( + __in efx_nic_t *enp, + __in_ecount(6) uint8_t const *mac_addr, + __in boolean_t all_unicst, + __in boolean_t mulcst, + __in boolean_t all_mulcst, + __in boolean_t brdcst, + __in_ecount(6*count) uint8_t const *addrs, + __in int count); + +extern void +hunt_filter_get_default_rxq( + __in efx_nic_t *enp, + __out efx_rxq_t **erpp, + __out boolean_t *using_rss); + +extern void +hunt_filter_default_rxq_set( + __in efx_nic_t *enp, + __in efx_rxq_t *erp, + __in boolean_t using_rss); + +extern void +hunt_filter_default_rxq_clear( + __in efx_nic_t *enp); + + +#endif /* EFSYS_OPT_FILTER */ + +extern __checkReturn int +hunt_pktfilter_set( + __in efx_nic_t *enp, + __in boolean_t unicst, + __in boolean_t brdcst); + +#if EFSYS_OPT_MCAST_FILTER_LIST + +extern __checkReturn int +hunt_pktfilter_mcast_set( + __in efx_nic_t *enp, + __in uint8_t const *addrs, + __in int count); + +#endif /* EFSYS_OPT_MCAST_FILTER_LIST */ + +extern __checkReturn int +hunt_pktfilter_mcast_all( + __in efx_nic_t *enp); + +extern __checkReturn int +efx_mcdi_get_function_info( + __in efx_nic_t *enp, + __out uint32_t *pfp, + __out_opt uint32_t *vfp); + +extern __checkReturn int +efx_mcdi_privilege_mask( + __in efx_nic_t *enp, + __in uint32_t pf, + __in uint32_t vf, + __out uint32_t *maskp); + +#ifdef __cplusplus +} +#endif + +#endif /* _SYS_HUNT_IMPL_H */ diff --git a/sys/dev/sfxge/common/hunt_intr.c b/sys/dev/sfxge/common/hunt_intr.c new file mode 100644 index 000000000000..b68135cfd947 --- /dev/null +++ b/sys/dev/sfxge/common/hunt_intr.c @@ -0,0 +1,155 @@ +/*- + * Copyright (c) 2012-2015 Solarflare Communications Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "efsys.h" +#include "efx.h" +#include "efx_impl.h" + + +#if EFSYS_OPT_HUNTINGTON + + __checkReturn int +hunt_intr_init( + __in efx_nic_t *enp, + __in efx_intr_type_t type, + __in efsys_mem_t *esmp) +{ + _NOTE(ARGUNUSED(enp, type, esmp)) + return (0); +} + + + void +hunt_intr_enable( + __in efx_nic_t *enp) +{ + _NOTE(ARGUNUSED(enp)) +} + + + void +hunt_intr_disable( + __in efx_nic_t *enp) +{ + _NOTE(ARGUNUSED(enp)) +} + + + void +hunt_intr_disable_unlocked( + __in efx_nic_t *enp) +{ + _NOTE(ARGUNUSED(enp)) +} + + +static __checkReturn int +efx_mcdi_trigger_interrupt( + __in efx_nic_t *enp, + __in unsigned int level) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_TRIGGER_INTERRUPT_IN_LEN, + MC_CMD_TRIGGER_INTERRUPT_OUT_LEN)]; + int rc; + + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON); + + if (level >= enp->en_nic_cfg.enc_intr_limit) { + rc = EINVAL; + goto fail1; + } + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_TRIGGER_INTERRUPT; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_TRIGGER_INTERRUPT_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_TRIGGER_INTERRUPT_OUT_LEN; + + MCDI_IN_SET_DWORD(req, TRIGGER_INTERRUPT_IN_INTR_LEVEL, level); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail2; + } + + return (0); + +fail2: + EFSYS_PROBE(fail2); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_intr_trigger( + __in efx_nic_t *enp, + __in unsigned int level) +{ + efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + int rc; + + if (encp->enc_bug41750_workaround) { + /* bug 41750: Test interrupts don't work on Greenport */ + rc = ENOTSUP; + goto fail1; + } + + if ((rc = efx_mcdi_trigger_interrupt(enp, level)) != 0) + goto fail2; + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + + void +hunt_intr_fini( + __in efx_nic_t *enp) +{ + _NOTE(ARGUNUSED(enp)) +} + +#endif /* EFSYS_OPT_HUNTINGTON */ diff --git a/sys/dev/sfxge/common/hunt_mac.c b/sys/dev/sfxge/common/hunt_mac.c new file mode 100644 index 000000000000..b9f7ca4a2073 --- /dev/null +++ b/sys/dev/sfxge/common/hunt_mac.c @@ -0,0 +1,685 @@ +/*- + * Copyright (c) 2012-2015 Solarflare Communications Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "efsys.h" +#include "efx.h" +#include "efx_impl.h" + + +#if EFSYS_OPT_HUNTINGTON + + __checkReturn int +hunt_mac_poll( + __in efx_nic_t *enp, + __out efx_link_mode_t *link_modep) +{ + /* + * TBD: Consider a common Siena/Huntington function. The code is + * essentially identical. + */ + + efx_port_t *epp = &(enp->en_port); + hunt_link_state_t hls; + int rc; + + if ((rc = hunt_phy_get_link(enp, &hls)) != 0) + goto fail1; + + epp->ep_adv_cap_mask = hls.hls_adv_cap_mask; + epp->ep_fcntl = hls.hls_fcntl; + + *link_modep = hls.hls_link_mode; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + *link_modep = EFX_LINK_UNKNOWN; + + return (rc); +} + + __checkReturn int +hunt_mac_up( + __in efx_nic_t *enp, + __out boolean_t *mac_upp) +{ + /* + * TBD: Consider a common Siena/Huntington function. The code is + * essentially identical. + */ + + hunt_link_state_t hls; + int rc; + + /* + * Because Huntington doesn't *require* polling, we can't rely on + * hunt_mac_poll() being executed to populate epp->ep_mac_up. + */ + if ((rc = hunt_phy_get_link(enp, &hls)) != 0) + goto fail1; + + *mac_upp = hls.hls_mac_up; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +/* + * Huntington uses MC_CMD_VADAPTOR_SET_MAC to set the + * MAC address; the address field in MC_CMD_SET_MAC has no + * effect. + * MC_CMD_VADAPTOR_SET_MAC requires mac-spoofing privilege and + * the port to have no filters or queues active. + */ +static __checkReturn int +efx_mcdi_vadapter_set_mac( + __in efx_nic_t *enp) +{ + efx_port_t *epp = &(enp->en_port); + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_VADAPTOR_SET_MAC_IN_LEN, + MC_CMD_VADAPTOR_SET_MAC_OUT_LEN)]; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_VADAPTOR_SET_MAC; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_VADAPTOR_SET_MAC_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_VADAPTOR_SET_MAC_OUT_LEN; + + MCDI_IN_SET_DWORD(req, VADAPTOR_SET_MAC_IN_UPSTREAM_PORT_ID, + enp->en_vport_id); + EFX_MAC_ADDR_COPY(MCDI_IN2(req, uint8_t, VADAPTOR_SET_MAC_IN_MACADDR), + epp->ep_mac_addr); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_mac_addr_set( + __in efx_nic_t *enp) +{ + int rc; + + if ((rc = efx_mcdi_vadapter_set_mac(enp)) != 0) + goto fail1; + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +__checkReturn int +hunt_mac_reconfigure( + __in efx_nic_t *enp) +{ + efx_port_t *epp = &(enp->en_port); + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_SET_MAC_IN_LEN, + MC_CMD_SET_MAC_OUT_LEN)]; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_SET_MAC; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_SET_MAC_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_SET_MAC_OUT_LEN; + + MCDI_IN_SET_DWORD(req, SET_MAC_IN_MTU, epp->ep_mac_pdu); + MCDI_IN_SET_DWORD(req, SET_MAC_IN_DRAIN, epp->ep_mac_drain ? 1 : 0); + EFX_MAC_ADDR_COPY(MCDI_IN2(req, uint8_t, SET_MAC_IN_ADDR), + epp->ep_mac_addr); + + /* + * Note: The Huntington MAC does not support REJECT_BRDCST. + * The REJECT_UNCST flag will also prevent multicast traffic + * from reaching the filters. As Huntington filters drop any + * traffic that does not match a filter it is ok to leave the + * MAC running in promiscuous mode. See bug41141. + */ + MCDI_IN_POPULATE_DWORD_2(req, SET_MAC_IN_REJECT, + SET_MAC_IN_REJECT_UNCST, 0, + SET_MAC_IN_REJECT_BRDCST, 0); + + /* + * Flow control, whether it is auto-negotiated or not, + * is set via the PHY advertised capabilities. When set to + * automatic the MAC will use the PHY settings to determine + * the flow control settings. + */ + MCDI_IN_SET_DWORD(req, SET_MAC_IN_FCNTL, MC_CMD_FCNTL_AUTO); + + /* Do not include the Ethernet frame checksum in RX packets */ + MCDI_IN_POPULATE_DWORD_1(req, SET_MAC_IN_FLAGS, + SET_MAC_IN_FLAG_INCLUDE_FCS, 0); + + efx_mcdi_execute_quiet(enp, &req); + + if (req.emr_rc != 0) { + /* + * Unprivileged functions cannot control link state, + * but still need to configure filters. + */ + if (req.emr_rc != EACCES) { + rc = req.emr_rc; + goto fail1; + } + } + + /* + * Apply the filters for the MAC configuration. + * If the NIC isn't ready to accept filters this may + * return success without setting anything. + */ + rc = efx_filter_reconfigure(enp, epp->ep_mac_addr, + epp->ep_all_unicst, epp->ep_mulcst, + epp->ep_all_mulcst, epp->ep_brdcst, + epp->ep_mulcst_addr_list, + epp->ep_mulcst_addr_count); + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_mac_multicast_list_set( + __in efx_nic_t *enp) +{ + efx_port_t *epp = &(enp->en_port); + efx_mac_ops_t *emop = epp->ep_emop; + int rc; + + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON); + + /* FIXME: Insert filters for multicast list */ + + if ((rc = emop->emo_reconfigure(enp)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_mac_filter_default_rxq_set( + __in efx_nic_t *enp, + __in efx_rxq_t *erp, + __in boolean_t using_rss) +{ + efx_port_t *epp = &(enp->en_port); + efx_rxq_t *old_rxq; + boolean_t old_using_rss; + int rc; + + hunt_filter_get_default_rxq(enp, &old_rxq, &old_using_rss); + + hunt_filter_default_rxq_set(enp, erp, using_rss); + + rc = efx_filter_reconfigure(enp, epp->ep_mac_addr, + epp->ep_all_unicst, epp->ep_mulcst, + epp->ep_all_mulcst, epp->ep_brdcst, + epp->ep_mulcst_addr_list, + epp->ep_mulcst_addr_count); + + if (rc != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + hunt_filter_default_rxq_set(enp, old_rxq, old_using_rss); + + return (rc); +} + + void +hunt_mac_filter_default_rxq_clear( + __in efx_nic_t *enp) +{ + efx_port_t *epp = &(enp->en_port); + + hunt_filter_default_rxq_clear(enp); + + efx_filter_reconfigure(enp, epp->ep_mac_addr, + epp->ep_all_unicst, epp->ep_mulcst, + epp->ep_all_mulcst, epp->ep_brdcst, + epp->ep_mulcst_addr_list, + epp->ep_mulcst_addr_count); +} + + +#if EFSYS_OPT_LOOPBACK + + __checkReturn int +hunt_mac_loopback_set( + __in efx_nic_t *enp, + __in efx_link_mode_t link_mode, + __in efx_loopback_type_t loopback_type) +{ + /* + * TBD: Consider a common Siena/Huntington function. The code is + * essentially identical. + */ + + efx_port_t *epp = &(enp->en_port); + efx_phy_ops_t *epop = epp->ep_epop; + efx_loopback_type_t old_loopback_type; + efx_link_mode_t old_loopback_link_mode; + int rc; + + /* The PHY object handles this on Huntington */ + old_loopback_type = epp->ep_loopback_type; + old_loopback_link_mode = epp->ep_loopback_link_mode; + epp->ep_loopback_type = loopback_type; + epp->ep_loopback_link_mode = link_mode; + + if ((rc = epop->epo_reconfigure(enp)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE(fail2); + + epp->ep_loopback_type = old_loopback_type; + epp->ep_loopback_link_mode = old_loopback_link_mode; + + return (rc); +} + +#endif /* EFSYS_OPT_LOOPBACK */ + +#if EFSYS_OPT_MAC_STATS + +#define HUNT_MAC_STAT_READ(_esmp, _field, _eqp) \ + EFSYS_MEM_READQ((_esmp), (_field) * sizeof (efx_qword_t), _eqp) + + + __checkReturn int +hunt_mac_stats_update( + __in efx_nic_t *enp, + __in efsys_mem_t *esmp, + __out_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat, + __out_opt uint32_t *generationp) +{ + efx_qword_t value; + efx_qword_t generation_start; + efx_qword_t generation_end; + + _NOTE(ARGUNUSED(enp)) + + /* Read END first so we don't race with the MC */ + EFSYS_DMA_SYNC_FOR_KERNEL(esmp, 0, EFX_MAC_STATS_SIZE); + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_GENERATION_END, + &generation_end); + EFSYS_MEM_READ_BARRIER(); + + /* TX */ + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_CONTROL_PKTS, &value); + EFSYS_STAT_SUBR_QWORD(&(stat[EFX_MAC_TX_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_PAUSE_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_PAUSE_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_UNICAST_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_UNICST_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_MULTICAST_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_MULTICST_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_BROADCAST_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_BRDCST_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_BYTES, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_OCTETS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_LT64_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_LE_64_PKTS]), &value); + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_64_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_LE_64_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_65_TO_127_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_65_TO_127_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_128_TO_255_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_128_TO_255_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_256_TO_511_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_256_TO_511_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_512_TO_1023_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_512_TO_1023_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_1024_TO_15XX_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_1024_TO_15XX_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_15XX_TO_JUMBO_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_GE_15XX_PKTS]), &value); + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_GTJUMBO_PKTS, &value); + EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_TX_GE_15XX_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_BAD_FCS_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_ERRORS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_SINGLE_COLLISION_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_SGL_COL_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_MULTIPLE_COLLISION_PKTS, + &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_MULT_COL_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_EXCESSIVE_COLLISION_PKTS, + &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_EX_COL_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_LATE_COLLISION_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_LATE_COL_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_DEFERRED_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_DEF_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_EXCESSIVE_DEFERRED_PKTS, + &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_EX_DEF_PKTS]), &value); + + /* RX */ + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_BYTES, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_OCTETS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_UNICAST_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_UNICST_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_MULTICAST_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_MULTICST_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_BROADCAST_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_BRDCST_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_PAUSE_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_PAUSE_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_UNDERSIZE_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_LE_64_PKTS]), &value); + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_64_PKTS, &value); + EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_RX_LE_64_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_65_TO_127_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_65_TO_127_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_128_TO_255_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_128_TO_255_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_256_TO_511_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_256_TO_511_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_512_TO_1023_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_512_TO_1023_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_1024_TO_15XX_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_1024_TO_15XX_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_15XX_TO_JUMBO_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_GE_15XX_PKTS]), &value); + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_GTJUMBO_PKTS, &value); + EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_RX_GE_15XX_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_BAD_FCS_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_FCS_ERRORS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_OVERFLOW_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_DROP_EVENTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_FALSE_CARRIER_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_FALSE_CARRIER_ERRORS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_SYMBOL_ERROR_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_SYMBOL_ERRORS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_ALIGN_ERROR_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_ALIGN_ERRORS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_INTERNAL_ERROR_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_INTERNAL_ERRORS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_JABBER_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_JABBER_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES01_CHAR_ERR, &value); + EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE0_CHAR_ERR]), + &(value.eq_dword[0])); + EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE1_CHAR_ERR]), + &(value.eq_dword[1])); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES23_CHAR_ERR, &value); + EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE2_CHAR_ERR]), + &(value.eq_dword[0])); + EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE3_CHAR_ERR]), + &(value.eq_dword[1])); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES01_DISP_ERR, &value); + EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE0_DISP_ERR]), + &(value.eq_dword[0])); + EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE1_DISP_ERR]), + &(value.eq_dword[1])); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES23_DISP_ERR, &value); + EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE2_DISP_ERR]), + &(value.eq_dword[0])); + EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE3_DISP_ERR]), + &(value.eq_dword[1])); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_MATCH_FAULT, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_MATCH_FAULT]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_NODESC_DROPS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_NODESC_DROP_CNT]), &value); + + /* Packet memory (EF10 only) */ + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_TRUNC_BB_OVERFLOW, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_TRUNC_BB_OVERFLOW]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_DISCARD_BB_OVERFLOW, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_DISCARD_BB_OVERFLOW]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_TRUNC_VFIFO_FULL, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_TRUNC_VFIFO_FULL]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_DISCARD_VFIFO_FULL, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_DISCARD_VFIFO_FULL]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_TRUNC_QBB, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_TRUNC_QBB]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_DISCARD_QBB, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_DISCARD_QBB]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_DISCARD_MAPPING, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_DISCARD_MAPPING]), &value); + + /* RX datapath */ + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RXDP_Q_DISABLED_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RXDP_Q_DISABLED_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RXDP_DI_DROPPED_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RXDP_DI_DROPPED_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RXDP_STREAMING_PKTS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RXDP_STREAMING_PKTS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RXDP_HLB_FETCH_CONDITIONS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RXDP_HLB_FETCH]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_RXDP_HLB_WAIT_CONDITIONS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RXDP_HLB_WAIT]), &value); + + + /* VADAPTER RX */ + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_UNICAST_PACKETS, + &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS]), + &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_UNICAST_BYTES, + &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_UNICAST_BYTES]), + &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_MULTICAST_PACKETS, + &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS]), + &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_MULTICAST_BYTES, + &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES]), + &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_BROADCAST_PACKETS, + &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS]), + &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_BROADCAST_BYTES, + &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES]), + &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_BAD_PACKETS, + &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_BAD_PACKETS]), + &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_BAD_BYTES, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_BAD_BYTES]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_OVERFLOW, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_OVERFLOW]), &value); + + /* VADAPTER TX */ + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_UNICAST_PACKETS, + &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS]), + &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_UNICAST_BYTES, + &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_UNICAST_BYTES]), + &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_MULTICAST_PACKETS, + &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS]), + &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_MULTICAST_BYTES, + &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES]), + &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_BROADCAST_PACKETS, + &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS]), + &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_BROADCAST_BYTES, + &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES]), + &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_BAD_PACKETS, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_BAD_PACKETS]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_BAD_BYTES, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_BAD_BYTES]), &value); + + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_OVERFLOW, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_OVERFLOW]), &value); + + + EFSYS_DMA_SYNC_FOR_KERNEL(esmp, 0, EFX_MAC_STATS_SIZE); + EFSYS_MEM_READ_BARRIER(); + HUNT_MAC_STAT_READ(esmp, MC_CMD_MAC_GENERATION_START, + &generation_start); + + /* Check that we didn't read the stats in the middle of a DMA */ + /* Not a good enough check ? */ + if (memcmp(&generation_start, &generation_end, + sizeof (generation_start))) + return (EAGAIN); + + if (generationp) + *generationp = EFX_QWORD_FIELD(generation_start, EFX_DWORD_0); + + return (0); +} + +#endif /* EFSYS_OPT_MAC_STATS */ + +#endif /* EFSYS_OPT_HUNTINGTON */ diff --git a/sys/dev/sfxge/common/hunt_mcdi.c b/sys/dev/sfxge/common/hunt_mcdi.c new file mode 100644 index 000000000000..8782bcce5a30 --- /dev/null +++ b/sys/dev/sfxge/common/hunt_mcdi.c @@ -0,0 +1,465 @@ +/*- + * Copyright (c) 2012-2015 Solarflare Communications Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "efsys.h" +#include "efx.h" +#include "efx_impl.h" + + +#if EFSYS_OPT_HUNTINGTON + +#if EFSYS_OPT_MCDI + +#ifndef WITH_MCDI_V2 +#error "WITH_MCDI_V2 required for Huntington MCDIv2 commands." +#endif + +typedef enum efx_mcdi_header_type_e { + EFX_MCDI_HEADER_TYPE_V1, /* MCDIv0 (BootROM), MCDIv1 commands */ + EFX_MCDI_HEADER_TYPE_V2, /* MCDIv2 commands */ +} efx_mcdi_header_type_t; + +/* + * Return the header format to use for sending an MCDI request. + * + * An MCDIv1 (Siena compatible) command should use MCDIv2 encapsulation if the + * request input buffer or response output buffer are too large for the MCDIv1 + * format. An MCDIv2 command must always be sent using MCDIv2 encapsulation. + */ +#define EFX_MCDI_HEADER_TYPE(_cmd, _length) \ + ((((_cmd) & ~EFX_MASK32(MCDI_HEADER_CODE)) || \ + ((_length) & ~EFX_MASK32(MCDI_HEADER_DATALEN))) ? \ + EFX_MCDI_HEADER_TYPE_V2 : EFX_MCDI_HEADER_TYPE_V1) + + +/* + * MCDI Header NOT_EPOCH flag + * ========================== + * A new epoch begins at initial startup or after an MC reboot, and defines when + * the MC should reject stale MCDI requests. + * + * The first MCDI request sent by the host should contain NOT_EPOCH=0, and all + * subsequent requests (until the next MC reboot) should contain NOT_EPOCH=1. + * + * After rebooting the MC will fail all requests with NOT_EPOCH=1 by writing a + * response with ERROR=1 and DATALEN=0 until a request is seen with NOT_EPOCH=0. + */ + + + __checkReturn int +hunt_mcdi_init( + __in efx_nic_t *enp, + __in const efx_mcdi_transport_t *emtp) +{ + efsys_mem_t *esmp = emtp->emt_dma_mem; + efx_dword_t dword; + int rc; + + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON); + EFSYS_ASSERT(enp->en_features & EFX_FEATURE_MCDI_DMA); + + /* A host DMA buffer is required for Huntington MCDI */ + if (esmp == NULL) { + rc = EINVAL; + goto fail1; + } + + /* + * Ensure that the MC doorbell is in a known state before issuing MCDI + * commands. The recovery algorithm requires that the MC command buffer + * must be 256 byte aligned. See bug24769. + */ + if ((EFSYS_MEM_ADDR(esmp) & 0xFF) != 0) { + rc = EINVAL; + goto fail2; + } + EFX_POPULATE_DWORD_1(dword, EFX_DWORD_0, 1); + EFX_BAR_WRITED(enp, ER_DZ_MC_DB_HWRD_REG, &dword, B_FALSE); + + /* Save initial MC reboot status */ + (void) hunt_mcdi_poll_reboot(enp); + + /* Start a new epoch (allow fresh MCDI requests to succeed) */ + efx_mcdi_new_epoch(enp); + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + void +hunt_mcdi_fini( + __in efx_nic_t *enp) +{ + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); + + emip->emi_new_epoch = B_FALSE; +} + + void +hunt_mcdi_request_copyin( + __in efx_nic_t *enp, + __in efx_mcdi_req_t *emrp, + __in unsigned int seq, + __in boolean_t ev_cpl, + __in boolean_t new_epoch) +{ + const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp; + efsys_mem_t *esmp = emtp->emt_dma_mem; + efx_mcdi_header_type_t hdr_type; + efx_dword_t dword; + unsigned int xflags; + unsigned int pos; + size_t offset; + + EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_HUNTINGTON); + + xflags = 0; + if (ev_cpl) + xflags |= MCDI_HEADER_XFLAGS_EVREQ; + + offset = 0; + + hdr_type = EFX_MCDI_HEADER_TYPE(emrp->emr_cmd, + MAX(emrp->emr_in_length, emrp->emr_out_length)); + + if (hdr_type == EFX_MCDI_HEADER_TYPE_V2) { + /* Construct MCDI v2 header */ + EFX_POPULATE_DWORD_8(dword, + MCDI_HEADER_CODE, MC_CMD_V2_EXTN, + MCDI_HEADER_RESYNC, 1, + MCDI_HEADER_DATALEN, 0, + MCDI_HEADER_SEQ, seq, + MCDI_HEADER_NOT_EPOCH, new_epoch ? 0 : 1, + MCDI_HEADER_ERROR, 0, + MCDI_HEADER_RESPONSE, 0, + MCDI_HEADER_XFLAGS, xflags); + EFSYS_MEM_WRITED(esmp, offset, &dword); + offset += sizeof (dword); + + EFX_POPULATE_DWORD_2(dword, + MC_CMD_V2_EXTN_IN_EXTENDED_CMD, emrp->emr_cmd, + MC_CMD_V2_EXTN_IN_ACTUAL_LEN, emrp->emr_in_length); + EFSYS_MEM_WRITED(esmp, offset, &dword); + offset += sizeof (dword); + } else { + /* Construct MCDI v1 header */ + EFX_POPULATE_DWORD_8(dword, + MCDI_HEADER_CODE, emrp->emr_cmd, + MCDI_HEADER_RESYNC, 1, + MCDI_HEADER_DATALEN, emrp->emr_in_length, + MCDI_HEADER_SEQ, seq, + MCDI_HEADER_NOT_EPOCH, new_epoch ? 0 : 1, + MCDI_HEADER_ERROR, 0, + MCDI_HEADER_RESPONSE, 0, + MCDI_HEADER_XFLAGS, xflags); + EFSYS_MEM_WRITED(esmp, offset, &dword); + offset += sizeof (dword); + } + + /* Construct the payload */ + for (pos = 0; pos < emrp->emr_in_length; pos += sizeof (efx_dword_t)) { + memcpy(&dword, MCDI_IN(*emrp, efx_dword_t, pos), + MIN(sizeof (dword), emrp->emr_in_length - pos)); + EFSYS_MEM_WRITED(esmp, offset + pos, &dword); + } + + /* Ring the doorbell to post the command DMA address to the MC */ + EFSYS_ASSERT((EFSYS_MEM_ADDR(esmp) & 0xFF) == 0); + + /* Guarantee ordering of memory (MCDI request) and PIO (MC doorbell) */ + EFSYS_DMA_SYNC_FOR_DEVICE(esmp, 0, offset + emrp->emr_in_length); + EFSYS_PIO_WRITE_BARRIER(); + + EFX_POPULATE_DWORD_1(dword, + EFX_DWORD_0, EFSYS_MEM_ADDR(esmp) >> 32); + EFX_BAR_WRITED(enp, ER_DZ_MC_DB_LWRD_REG, &dword, B_FALSE); + + EFX_POPULATE_DWORD_1(dword, + EFX_DWORD_0, EFSYS_MEM_ADDR(esmp) & 0xffffffff); + EFX_BAR_WRITED(enp, ER_DZ_MC_DB_HWRD_REG, &dword, B_FALSE); +} + + void +hunt_mcdi_request_copyout( + __in efx_nic_t *enp, + __in efx_mcdi_req_t *emrp) +{ + const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp; + efsys_mem_t *esmp = emtp->emt_dma_mem; + unsigned int pos; + unsigned int offset; + efx_dword_t hdr; + efx_dword_t hdr2; + efx_dword_t data; + size_t bytes; + + if (emrp->emr_out_buf == NULL) + return; + + /* Read the command header to detect MCDI response format */ + EFSYS_MEM_READD(esmp, 0, &hdr); + if (EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE) == MC_CMD_V2_EXTN) { + offset = 2 * sizeof (efx_dword_t); + + /* + * Read the actual payload length. The length given in the event + * is only correct for responses with the V1 format. + */ + EFSYS_MEM_READD(esmp, sizeof (efx_dword_t), &hdr2); + emrp->emr_out_length_used = EFX_DWORD_FIELD(hdr2, + MC_CMD_V2_EXTN_IN_ACTUAL_LEN); + } else { + offset = sizeof (efx_dword_t); + } + + /* Copy payload out into caller supplied buffer */ + bytes = MIN(emrp->emr_out_length_used, emrp->emr_out_length); + for (pos = 0; pos < bytes; pos += sizeof (efx_dword_t)) { + EFSYS_MEM_READD(esmp, offset + pos, &data); + memcpy(MCDI_OUT(*emrp, efx_dword_t, pos), &data, + MIN(sizeof (data), bytes - pos)); + } +} + + __checkReturn boolean_t +hunt_mcdi_request_poll( + __in efx_nic_t *enp) +{ + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); + const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp; + efsys_mem_t *esmp = emtp->emt_dma_mem; + efx_mcdi_req_t *emrp; + efx_dword_t dword; + unsigned int seq; + unsigned int cmd; + unsigned int length; + size_t offset; + int state; + int rc; + + EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_HUNTINGTON); + + /* Serialise against post-watchdog efx_mcdi_ev* */ + EFSYS_LOCK(enp->en_eslp, state); + + EFSYS_ASSERT(emip->emi_pending_req != NULL); + EFSYS_ASSERT(!emip->emi_ev_cpl); + emrp = emip->emi_pending_req; + + offset = 0; + + /* Read the command header */ + EFSYS_MEM_READD(esmp, offset, &dword); + offset += sizeof (efx_dword_t); + if (EFX_DWORD_FIELD(dword, MCDI_HEADER_RESPONSE) == 0) { + EFSYS_UNLOCK(enp->en_eslp, state); + return (B_FALSE); + } + if (EFX_DWORD_FIELD(dword, MCDI_HEADER_CODE) == MC_CMD_V2_EXTN) { + efx_dword_t dword2; + + EFSYS_MEM_READD(esmp, offset, &dword2); + offset += sizeof (efx_dword_t); + + cmd = EFX_DWORD_FIELD(dword2, MC_CMD_V2_EXTN_IN_EXTENDED_CMD); + length = EFX_DWORD_FIELD(dword2, MC_CMD_V2_EXTN_IN_ACTUAL_LEN); + } else { + cmd = EFX_DWORD_FIELD(dword, MCDI_HEADER_CODE); + length = EFX_DWORD_FIELD(dword, MCDI_HEADER_DATALEN); + } + + /* Request complete */ + emip->emi_pending_req = NULL; + seq = (emip->emi_seq - 1) & EFX_MASK32(MCDI_HEADER_SEQ); + + /* Check for synchronous reboot */ + if (EFX_DWORD_FIELD(dword, MCDI_HEADER_ERROR) != 0 && length == 0) { + /* The MC has rebooted since the request was sent. */ + EFSYS_SPIN(EFX_MCDI_STATUS_SLEEP_US); + hunt_mcdi_poll_reboot(enp); + + EFSYS_UNLOCK(enp->en_eslp, state); + rc = EIO; + goto fail1; + } + + /* Ensure stale MCDI requests fail after an MC reboot. */ + emip->emi_new_epoch = B_FALSE; + + EFSYS_UNLOCK(enp->en_eslp, state); + + /* Check that the returned data is consistent */ + if (cmd != emrp->emr_cmd || + EFX_DWORD_FIELD(dword, MCDI_HEADER_SEQ) != seq) { + /* Response is for a different request */ + rc = EIO; + goto fail2; + } + if (EFX_DWORD_FIELD(dword, MCDI_HEADER_ERROR)) { + efx_dword_t errdword; + int errcode; + int argnum; + + /* Read error code (and arg num for MCDI v2 commands) */ + EFSYS_MEM_READD(esmp, offset + MC_CMD_ERR_CODE_OFST, &errdword); + errcode = EFX_DWORD_FIELD(errdword, EFX_DWORD_0); + + EFSYS_MEM_READD(esmp, offset + MC_CMD_ERR_ARG_OFST, &errdword); + argnum = EFX_DWORD_FIELD(errdword, EFX_DWORD_0); + + rc = efx_mcdi_request_errcode(errcode); + if (!emrp->emr_quiet) { + EFSYS_PROBE3(mcdi_err_arg, int, emrp->emr_cmd, + int, errcode, int, argnum); + } + goto fail3; + + } else { + emrp->emr_out_length_used = length; + emrp->emr_rc = 0; + hunt_mcdi_request_copyout(enp, emrp); + } + + goto out; + +fail3: + if (!emrp->emr_quiet) + EFSYS_PROBE(fail3); +fail2: + if (!emrp->emr_quiet) + EFSYS_PROBE(fail2); +fail1: + if (!emrp->emr_quiet) + EFSYS_PROBE1(fail1, int, rc); + + /* Fill out error state */ + emrp->emr_rc = rc; + emrp->emr_out_length_used = 0; + + /* Reboot/Assertion */ + if (rc == EIO || rc == EINTR) + efx_mcdi_raise_exception(enp, emrp, rc); + +out: + return (B_TRUE); +} + + int +hunt_mcdi_poll_reboot( + __in efx_nic_t *enp) +{ + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); + efx_dword_t dword; + uint32_t old_status; + uint32_t new_status; + int rc; + + old_status = emip->emi_mc_reboot_status; + + /* Update MC reboot status word */ + EFX_BAR_TBL_READD(enp, ER_DZ_BIU_MC_SFT_STATUS_REG, 0, &dword, B_FALSE); + new_status = dword.ed_u32[0]; + + /* MC has rebooted if the value has changed */ + if (new_status != old_status) { + emip->emi_mc_reboot_status = new_status; + + /* + * FIXME: Ignore detected MC REBOOT for now. + * + * The Siena support for checking for MC reboot from status + * flags is broken - see comments in siena_mcdi_poll_reboot(). + * As the generic MCDI code is shared the Huntington reboot + * detection suffers similar problems. + * + * Do not report an error when the boot status changes until + * this can be handled by common code drivers (and reworked to + * support Siena too). + */ + if (B_FALSE) { + rc = EIO; + goto fail1; + } + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_mcdi_fw_update_supported( + __in efx_nic_t *enp, + __out boolean_t *supportedp) +{ + efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + + EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_HUNTINGTON); + + /* use privilege mask state at MCDI attach */ + *supportedp = (encp->enc_privilege_mask & + MC_CMD_PRIVILEGE_MASK_IN_GRP_ADMIN) + == MC_CMD_PRIVILEGE_MASK_IN_GRP_ADMIN; + + return (0); +} + + __checkReturn int +hunt_mcdi_macaddr_change_supported( + __in efx_nic_t *enp, + __out boolean_t *supportedp) +{ + efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + + EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_HUNTINGTON); + + /* use privilege mask state at MCDI attach */ + *supportedp = (encp->enc_privilege_mask & + MC_CMD_PRIVILEGE_MASK_IN_GRP_MAC_SPOOFING) + == MC_CMD_PRIVILEGE_MASK_IN_GRP_MAC_SPOOFING; + + return (0); +} + +#endif /* EFSYS_OPT_MCDI */ + +#endif /* EFSYS_OPT_HUNTINGTON */ diff --git a/sys/dev/sfxge/common/hunt_nic.c b/sys/dev/sfxge/common/hunt_nic.c new file mode 100644 index 000000000000..a4babc39eab6 --- /dev/null +++ b/sys/dev/sfxge/common/hunt_nic.c @@ -0,0 +1,1741 @@ +/*- + * Copyright (c) 2012-2015 Solarflare Communications Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "efsys.h" +#include "efx.h" +#include "efx_impl.h" +#include "mcdi_mon.h" + +#if EFSYS_OPT_HUNTINGTON + +#include "ef10_tlv_layout.h" + +static __checkReturn int +efx_mcdi_get_port_assignment( + __in efx_nic_t *enp, + __out uint32_t *portp) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_GET_PORT_ASSIGNMENT_IN_LEN, + MC_CMD_GET_PORT_ASSIGNMENT_OUT_LEN)]; + int rc; + + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON); + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_GET_PORT_ASSIGNMENT; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_GET_PORT_ASSIGNMENT_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_GET_PORT_ASSIGNMENT_OUT_LEN; + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (req.emr_out_length_used < MC_CMD_GET_PORT_ASSIGNMENT_OUT_LEN) { + rc = EMSGSIZE; + goto fail2; + } + + *portp = MCDI_OUT_DWORD(req, GET_PORT_ASSIGNMENT_OUT_PORT); + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +static __checkReturn int +efx_mcdi_get_port_modes( + __in efx_nic_t *enp, + __out uint32_t *modesp) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_GET_PORT_MODES_IN_LEN, + MC_CMD_GET_PORT_MODES_OUT_LEN)]; + int rc; + + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON); + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_GET_PORT_MODES; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_GET_PORT_MODES_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_GET_PORT_MODES_OUT_LEN; + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + /* Accept pre-Medford size (8 bytes - no CurrentMode field) */ + if (req.emr_out_length_used < + MC_CMD_GET_PORT_MODES_OUT_CURRENT_MODE_OFST) { + rc = EMSGSIZE; + goto fail2; + } + + *modesp = MCDI_OUT_DWORD(req, GET_PORT_MODES_OUT_MODES); + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + +static __checkReturn int +efx_mcdi_vadaptor_alloc( + __in efx_nic_t *enp, + __in uint32_t port_id) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_VADAPTOR_ALLOC_IN_LEN, + MC_CMD_VADAPTOR_ALLOC_OUT_LEN)]; + int rc; + + EFSYS_ASSERT3U(enp->en_vport_id, ==, EVB_PORT_ID_NULL); + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_VADAPTOR_ALLOC; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_VADAPTOR_ALLOC_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_VADAPTOR_ALLOC_OUT_LEN; + + MCDI_IN_SET_DWORD(req, VADAPTOR_ALLOC_IN_UPSTREAM_PORT_ID, port_id); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +static __checkReturn int +efx_mcdi_vadaptor_free( + __in efx_nic_t *enp, + __in uint32_t port_id) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_VADAPTOR_FREE_IN_LEN, + MC_CMD_VADAPTOR_FREE_OUT_LEN)]; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_VADAPTOR_FREE; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_VADAPTOR_FREE_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_VADAPTOR_FREE_OUT_LEN; + + MCDI_IN_SET_DWORD(req, VADAPTOR_FREE_IN_UPSTREAM_PORT_ID, port_id); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +static __checkReturn int +efx_mcdi_get_mac_address_pf( + __in efx_nic_t *enp, + __out_ecount_opt(6) uint8_t mac_addrp[6]) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_GET_MAC_ADDRESSES_IN_LEN, + MC_CMD_GET_MAC_ADDRESSES_OUT_LEN)]; + int rc; + + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON); + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_GET_MAC_ADDRESSES; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_GET_MAC_ADDRESSES_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_GET_MAC_ADDRESSES_OUT_LEN; + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (req.emr_out_length_used < MC_CMD_GET_MAC_ADDRESSES_OUT_LEN) { + rc = EMSGSIZE; + goto fail2; + } + + if (MCDI_OUT_DWORD(req, GET_MAC_ADDRESSES_OUT_MAC_COUNT) < 1) { + rc = ENOENT; + goto fail3; + } + + if (mac_addrp != NULL) { + uint8_t *addrp; + + addrp = MCDI_OUT2(req, uint8_t, + GET_MAC_ADDRESSES_OUT_MAC_ADDR_BASE); + + EFX_MAC_ADDR_COPY(mac_addrp, addrp); + } + + return (0); + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +static __checkReturn int +efx_mcdi_get_mac_address_vf( + __in efx_nic_t *enp, + __out_ecount_opt(6) uint8_t mac_addrp[6]) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_VPORT_GET_MAC_ADDRESSES_IN_LEN, + MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_LENMAX)]; + int rc; + + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON); + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_VPORT_GET_MAC_ADDRESSES; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_VPORT_GET_MAC_ADDRESSES_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_LENMAX; + + MCDI_IN_SET_DWORD(req, VPORT_GET_MAC_ADDRESSES_IN_VPORT_ID, + EVB_PORT_ID_ASSIGNED); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (req.emr_out_length_used < + MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_LENMIN) { + rc = EMSGSIZE; + goto fail2; + } + + if (MCDI_OUT_DWORD(req, + VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_COUNT) < 1) { + rc = ENOENT; + goto fail3; + } + + if (mac_addrp != NULL) { + uint8_t *addrp; + + addrp = MCDI_OUT2(req, uint8_t, + VPORT_GET_MAC_ADDRESSES_OUT_MACADDR); + + EFX_MAC_ADDR_COPY(mac_addrp, addrp); + } + + return (0); + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +static __checkReturn int +efx_mcdi_get_clock( + __in efx_nic_t *enp, + __out uint32_t *sys_freqp) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_GET_CLOCK_IN_LEN, + MC_CMD_GET_CLOCK_OUT_LEN)]; + int rc; + + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON); + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_GET_CLOCK; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_GET_CLOCK_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_GET_CLOCK_OUT_LEN; + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (req.emr_out_length_used < MC_CMD_GET_CLOCK_OUT_LEN) { + rc = EMSGSIZE; + goto fail2; + } + + *sys_freqp = MCDI_OUT_DWORD(req, GET_CLOCK_OUT_SYS_FREQ); + if (*sys_freqp == 0) { + rc = EINVAL; + goto fail3; + } + + return (0); + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +static __checkReturn int +efx_mcdi_get_vector_cfg( + __in efx_nic_t *enp, + __out_opt uint32_t *vec_basep, + __out_opt uint32_t *pf_nvecp, + __out_opt uint32_t *vf_nvecp) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_GET_VECTOR_CFG_IN_LEN, + MC_CMD_GET_VECTOR_CFG_OUT_LEN)]; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_GET_VECTOR_CFG; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_GET_VECTOR_CFG_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_GET_VECTOR_CFG_OUT_LEN; + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (req.emr_out_length_used < MC_CMD_GET_VECTOR_CFG_OUT_LEN) { + rc = EMSGSIZE; + goto fail2; + } + + if (vec_basep != NULL) + *vec_basep = MCDI_OUT_DWORD(req, GET_VECTOR_CFG_OUT_VEC_BASE); + if (pf_nvecp != NULL) + *pf_nvecp = MCDI_OUT_DWORD(req, GET_VECTOR_CFG_OUT_VECS_PER_PF); + if (vf_nvecp != NULL) + *vf_nvecp = MCDI_OUT_DWORD(req, GET_VECTOR_CFG_OUT_VECS_PER_VF); + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +static __checkReturn int +efx_mcdi_get_capabilities( + __in efx_nic_t *enp, + __out efx_dword_t *flagsp) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_GET_CAPABILITIES_IN_LEN, + MC_CMD_GET_CAPABILITIES_OUT_LEN)]; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_GET_CAPABILITIES; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_GET_CAPABILITIES_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_GET_CAPABILITIES_OUT_LEN; + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (req.emr_out_length_used < MC_CMD_GET_CAPABILITIES_OUT_LEN) { + rc = EMSGSIZE; + goto fail2; + } + + *flagsp = *MCDI_OUT2(req, efx_dword_t, GET_CAPABILITIES_OUT_FLAGS1); + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + +static __checkReturn int +efx_mcdi_alloc_vis( + __in efx_nic_t *enp, + __in uint32_t min_vi_count, + __in uint32_t max_vi_count, + __out_opt uint32_t *vi_basep, + __out uint32_t *vi_countp) + +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_ALLOC_VIS_IN_LEN, + MC_CMD_ALLOC_VIS_OUT_LEN)]; + int rc; + + if (vi_countp == NULL) { + rc = EINVAL; + goto fail1; + } + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_ALLOC_VIS; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_ALLOC_VIS_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_ALLOC_VIS_OUT_LEN; + + MCDI_IN_SET_DWORD(req, ALLOC_VIS_IN_MIN_VI_COUNT, min_vi_count); + MCDI_IN_SET_DWORD(req, ALLOC_VIS_IN_MAX_VI_COUNT, max_vi_count); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail2; + } + + if (req.emr_out_length_used < MC_CMD_ALLOC_VIS_OUT_LEN) { + rc = EMSGSIZE; + goto fail3; + } + + if (vi_basep != NULL) + *vi_basep = MCDI_OUT_DWORD(req, ALLOC_VIS_OUT_VI_BASE); + + if (vi_countp != NULL) + *vi_countp = MCDI_OUT_DWORD(req, ALLOC_VIS_OUT_VI_COUNT); + + return (0); + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + +static __checkReturn int +efx_mcdi_free_vis( + __in efx_nic_t *enp) +{ + efx_mcdi_req_t req; + int rc; + + EFX_STATIC_ASSERT(MC_CMD_FREE_VIS_IN_LEN == 0); + EFX_STATIC_ASSERT(MC_CMD_FREE_VIS_OUT_LEN == 0); + + req.emr_cmd = MC_CMD_FREE_VIS; + req.emr_in_buf = NULL; + req.emr_in_length = 0; + req.emr_out_buf = NULL; + req.emr_out_length = 0; + + efx_mcdi_execute_quiet(enp, &req); + + /* Ignore ELREADY (no allocated VIs, so nothing to free) */ + if ((req.emr_rc != 0) && (req.emr_rc != EALREADY)) { + rc = req.emr_rc; + goto fail1; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + +static __checkReturn int +efx_mcdi_alloc_piobuf( + __in efx_nic_t *enp, + __out efx_piobuf_handle_t *handlep) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_ALLOC_PIOBUF_IN_LEN, + MC_CMD_ALLOC_PIOBUF_OUT_LEN)]; + int rc; + + if (handlep == NULL) { + rc = EINVAL; + goto fail1; + } + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_ALLOC_PIOBUF; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_ALLOC_PIOBUF_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_ALLOC_PIOBUF_OUT_LEN; + + efx_mcdi_execute_quiet(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail2; + } + + if (req.emr_out_length_used < MC_CMD_ALLOC_PIOBUF_OUT_LEN) { + rc = EMSGSIZE; + goto fail3; + } + + *handlep = MCDI_OUT_DWORD(req, ALLOC_PIOBUF_OUT_PIOBUF_HANDLE); + + return (0); + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +static __checkReturn int +efx_mcdi_free_piobuf( + __in efx_nic_t *enp, + __out efx_piobuf_handle_t handle) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_FREE_PIOBUF_IN_LEN, + MC_CMD_FREE_PIOBUF_OUT_LEN)]; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_FREE_PIOBUF; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_FREE_PIOBUF_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_FREE_PIOBUF_OUT_LEN; + + MCDI_IN_SET_DWORD(req, FREE_PIOBUF_IN_PIOBUF_HANDLE, handle); + + efx_mcdi_execute_quiet(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +static __checkReturn int +efx_mcdi_link_piobuf( + __in efx_nic_t *enp, + __in uint32_t vi_index, + __in efx_piobuf_handle_t handle) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_LINK_PIOBUF_IN_LEN, + MC_CMD_LINK_PIOBUF_OUT_LEN)]; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_LINK_PIOBUF; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_LINK_PIOBUF_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_LINK_PIOBUF_OUT_LEN; + + MCDI_IN_SET_DWORD(req, LINK_PIOBUF_IN_PIOBUF_HANDLE, handle); + MCDI_IN_SET_DWORD(req, LINK_PIOBUF_IN_TXQ_INSTANCE, vi_index); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +static __checkReturn int +efx_mcdi_unlink_piobuf( + __in efx_nic_t *enp, + __in uint32_t vi_index) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_UNLINK_PIOBUF_IN_LEN, + MC_CMD_UNLINK_PIOBUF_OUT_LEN)]; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_UNLINK_PIOBUF; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_UNLINK_PIOBUF_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_UNLINK_PIOBUF_OUT_LEN; + + MCDI_IN_SET_DWORD(req, UNLINK_PIOBUF_IN_TXQ_INSTANCE, vi_index); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +static void +hunt_nic_alloc_piobufs( + __in efx_nic_t *enp, + __in uint32_t max_piobuf_count) +{ + efx_piobuf_handle_t *handlep; + unsigned int i; + int rc; + + EFSYS_ASSERT3U(max_piobuf_count, <=, + EFX_ARRAY_SIZE(enp->en_u.hunt.enu_piobuf_handle)); + + enp->en_u.hunt.enu_piobuf_count = 0; + + for (i = 0; i < max_piobuf_count; i++) { + handlep = &enp->en_u.hunt.enu_piobuf_handle[i]; + + if ((rc = efx_mcdi_alloc_piobuf(enp, handlep)) != 0) + goto fail1; + + enp->en_u.hunt.enu_pio_alloc_map[i] = 0; + enp->en_u.hunt.enu_piobuf_count++; + } + + return; + +fail1: + for (i = 0; i < enp->en_u.hunt.enu_piobuf_count; i++) { + handlep = &enp->en_u.hunt.enu_piobuf_handle[i]; + + efx_mcdi_free_piobuf(enp, *handlep); + *handlep = EFX_PIOBUF_HANDLE_INVALID; + } + enp->en_u.hunt.enu_piobuf_count = 0; +} + + +static void +hunt_nic_free_piobufs( + __in efx_nic_t *enp) +{ + efx_piobuf_handle_t *handlep; + unsigned int i; + + for (i = 0; i < enp->en_u.hunt.enu_piobuf_count; i++) { + handlep = &enp->en_u.hunt.enu_piobuf_handle[i]; + + efx_mcdi_free_piobuf(enp, *handlep); + *handlep = EFX_PIOBUF_HANDLE_INVALID; + } + enp->en_u.hunt.enu_piobuf_count = 0; +} + +/* Sub-allocate a block from a piobuf */ + __checkReturn int +hunt_nic_pio_alloc( + __inout efx_nic_t *enp, + __out uint32_t *bufnump, + __out efx_piobuf_handle_t *handlep, + __out uint32_t *blknump, + __out uint32_t *offsetp, + __out size_t *sizep) +{ + efx_drv_cfg_t *edcp = &enp->en_drv_cfg; + uint32_t blk_per_buf; + uint32_t buf, blk; + int rc; + + EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_HUNTINGTON); + EFSYS_ASSERT(bufnump); + EFSYS_ASSERT(handlep); + EFSYS_ASSERT(blknump); + EFSYS_ASSERT(offsetp); + EFSYS_ASSERT(sizep); + + if ((edcp->edc_pio_alloc_size == 0) || + (enp->en_u.hunt.enu_piobuf_count == 0)) { + rc = ENOMEM; + goto fail1; + } + blk_per_buf = HUNT_PIOBUF_SIZE / edcp->edc_pio_alloc_size; + + for (buf = 0; buf < enp->en_u.hunt.enu_piobuf_count; buf++) { + uint32_t *map = &enp->en_u.hunt.enu_pio_alloc_map[buf]; + + if (~(*map) == 0) + continue; + + EFSYS_ASSERT3U(blk_per_buf, <=, (8 * sizeof (*map))); + for (blk = 0; blk < blk_per_buf; blk++) { + if ((*map & (1u << blk)) == 0) { + *map |= (1u << blk); + goto done; + } + } + } + rc = ENOMEM; + goto fail2; + +done: + *handlep = enp->en_u.hunt.enu_piobuf_handle[buf]; + *bufnump = buf; + *blknump = blk; + *sizep = edcp->edc_pio_alloc_size; + *offsetp = blk * (*sizep); + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +/* Free a piobuf sub-allocated block */ + __checkReturn int +hunt_nic_pio_free( + __inout efx_nic_t *enp, + __in uint32_t bufnum, + __in uint32_t blknum) +{ + uint32_t *map; + int rc; + + if ((bufnum >= enp->en_u.hunt.enu_piobuf_count) || + (blknum >= (8 * sizeof (*map)))) { + rc = EINVAL; + goto fail1; + } + + map = &enp->en_u.hunt.enu_pio_alloc_map[bufnum]; + if ((*map & (1u << blknum)) == 0) { + rc = ENOENT; + goto fail2; + } + *map &= ~(1u << blknum); + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_nic_pio_link( + __inout efx_nic_t *enp, + __in uint32_t vi_index, + __in efx_piobuf_handle_t handle) +{ + return (efx_mcdi_link_piobuf(enp, vi_index, handle)); +} + + __checkReturn int +hunt_nic_pio_unlink( + __inout efx_nic_t *enp, + __in uint32_t vi_index) +{ + return (efx_mcdi_unlink_piobuf(enp, vi_index)); +} + +static __checkReturn int +hunt_get_datapath_caps( + __in efx_nic_t *enp) +{ + efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + efx_dword_t datapath_capabilities; + int rc; + + if ((rc = efx_mcdi_get_capabilities(enp, &datapath_capabilities)) != 0) + goto fail1; + + /* + * Huntington RXDP firmware inserts a 0 or 14 byte prefix. + * We only support the 14 byte prefix here. + */ + if (MCDI_CMD_DWORD_FIELD(&datapath_capabilities, + GET_CAPABILITIES_OUT_RX_PREFIX_LEN_14) != 1) { + rc = ENOTSUP; + goto fail2; + } + encp->enc_rx_prefix_size = 14; + + /* Check if the firmware supports TSO */ + if (MCDI_CMD_DWORD_FIELD(&datapath_capabilities, + GET_CAPABILITIES_OUT_TX_TSO) == 1) + encp->enc_fw_assisted_tso_enabled = B_TRUE; + else + encp->enc_fw_assisted_tso_enabled = B_FALSE; + + /* Check if the firmware has vadapter/vport/vswitch support */ + if (MCDI_CMD_DWORD_FIELD(&datapath_capabilities, + GET_CAPABILITIES_OUT_EVB) == 1) + encp->enc_datapath_cap_evb = B_TRUE; + else + encp->enc_datapath_cap_evb = B_FALSE; + + /* Check if the firmware supports VLAN insertion */ + if (MCDI_CMD_DWORD_FIELD(&datapath_capabilities, + GET_CAPABILITIES_OUT_TX_VLAN_INSERTION) == 1) + encp->enc_hw_tx_insert_vlan_enabled = B_TRUE; + else + encp->enc_hw_tx_insert_vlan_enabled = B_FALSE; + + /* Check if the firmware supports RX event batching */ + if (MCDI_CMD_DWORD_FIELD(&datapath_capabilities, + GET_CAPABILITIES_OUT_RX_BATCHING) == 1) { + encp->enc_rx_batching_enabled = B_TRUE; + encp->enc_rx_batch_max = 16; + } else { + encp->enc_rx_batching_enabled = B_FALSE; + } + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +/* + * The external port mapping is a one-based numbering of the external + * connectors on the board. It does not distinguish off-board separated + * outputs such as multi-headed cables. + * The number of ports that map to each external port connector + * on the board is determined by the chip family and the port modes to + * which the NIC can be configured. The mapping table lists modes with + * port numbering requirements in increasing order. + */ +static struct { + efx_family_t family; + uint32_t modes_mask; + uint32_t stride; +} __hunt_external_port_mappings[] = { + /* Supported modes requiring 1 output per port */ + { + EFX_FAMILY_HUNTINGTON, + (1 << TLV_PORT_MODE_10G) | + (1 << TLV_PORT_MODE_40G) | + (1 << TLV_PORT_MODE_10G_10G) | + (1 << TLV_PORT_MODE_40G_40G), + 1 + }, + /* Supported modes requiring 2 outputs per port */ + { + EFX_FAMILY_HUNTINGTON, + (1 << TLV_PORT_MODE_10G_10G_10G_10G) | + (1 << TLV_PORT_MODE_40G_10G_10G) | + (1 << TLV_PORT_MODE_10G_10G_40G), + 2 + } +}; + +static __checkReturn int +hunt_external_port_mapping( + __in efx_nic_t *enp, + __in uint32_t port, + __out uint8_t *external_portp) +{ + int rc; + int i; + uint32_t port_modes; + uint32_t matches; + uint32_t stride = 1; /* default 1-1 mapping */ + + if ((rc = efx_mcdi_get_port_modes(enp, &port_modes)) != 0) { + /* No port mode information available - use default mapping */ + goto out; + } + + /* + * Infer the internal port -> external port mapping from + * the possible port modes for this NIC. + */ + for (i = 0; i < EFX_ARRAY_SIZE(__hunt_external_port_mappings); ++i) { + if (__hunt_external_port_mappings[i].family != + enp->en_family) + continue; + matches = (__hunt_external_port_mappings[i].modes_mask & + port_modes); + if (matches != 0) { + stride = __hunt_external_port_mappings[i].stride; + port_modes &= ~matches; + } + } + + if (port_modes != 0) { + /* Some advertised modes are not supported */ + rc = ENOTSUP; + goto fail1; + } + +out: + /* + * Scale as required by last matched mode and then convert to + * one-based numbering + */ + *external_portp = (uint8_t)(port / stride) + 1; + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +static __checkReturn int +hunt_board_cfg( + __in efx_nic_t *enp) +{ + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); + efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + uint8_t mac_addr[6]; + uint32_t board_type = 0; + hunt_link_state_t hls; + efx_port_t *epp = &(enp->en_port); + uint32_t port; + uint32_t pf; + uint32_t vf; + uint32_t mask; + uint32_t flags; + uint32_t sysclk; + uint32_t base, nvec; + int rc; + + if ((rc = efx_mcdi_get_port_assignment(enp, &port)) != 0) + goto fail1; + + /* + * NOTE: The MCDI protocol numbers ports from zero. + * The common code MCDI interface numbers ports from one. + */ + emip->emi_port = port + 1; + + if ((rc = hunt_external_port_mapping(enp, port, + &encp->enc_external_port)) != 0) + goto fail2; + + /* + * Get PCIe function number from firmware (used for + * per-function privilege and dynamic config info). + * - PCIe PF: pf = PF number, vf = 0xffff. + * - PCIe VF: pf = parent PF, vf = VF number. + */ + if ((rc = efx_mcdi_get_function_info(enp, &pf, &vf)) != 0) + goto fail3; + + encp->enc_pf = pf; + encp->enc_vf = vf; + + /* MAC address for this function */ + if (EFX_PCI_FUNCTION_IS_PF(encp)) { + rc = efx_mcdi_get_mac_address_pf(enp, mac_addr); + } else { + rc = efx_mcdi_get_mac_address_vf(enp, mac_addr); + } + if ((rc == 0) && (mac_addr[0] & 0x02)) { + /* + * If the static config does not include a global MAC address + * pool then the board may return a locally administered MAC + * address (this should only happen on incorrectly programmed + * boards). + */ + rc = EINVAL; + } + if (rc != 0) + goto fail4; + + EFX_MAC_ADDR_COPY(encp->enc_mac_addr, mac_addr); + + /* Board configuration */ + rc = efx_mcdi_get_board_cfg(enp, &board_type, NULL, NULL); + if (rc != 0) { + /* Unprivileged functions may not be able to read board cfg */ + if (rc == EACCES) + board_type = 0; + else + goto fail5; + } + + encp->enc_board_type = board_type; + encp->enc_clk_mult = 1; /* not used for Huntington */ + + /* Fill out fields in enp->en_port and enp->en_nic_cfg from MCDI */ + if ((rc = efx_mcdi_get_phy_cfg(enp)) != 0) + goto fail6; + + /* Obtain the default PHY advertised capabilities */ + if ((rc = hunt_phy_get_link(enp, &hls)) != 0) + goto fail7; + epp->ep_default_adv_cap_mask = hls.hls_adv_cap_mask; + epp->ep_adv_cap_mask = hls.hls_adv_cap_mask; + + /* + * Enable firmware workarounds for hardware errata. + * Expected responses are: + * - 0 (zero): + * Success: workaround enabled or disabled as requested. + * - MC_CMD_ERR_ENOSYS (reported as ENOTSUP): + * Firmware does not support the MC_CMD_WORKAROUND request. + * (assume that the workaround is not supported). + * - MC_CMD_ERR_ENOENT (reported as ENOENT): + * Firmware does not support the requested workaround. + * - MC_CMD_ERR_EPERM (reported as EACCES): + * Unprivileged function cannot enable/disable workarounds. + * + * See efx_mcdi_request_errcode() for MCDI error translations. + */ + + /* + * If the bug35388 workaround is enabled, then use an indirect access + * method to avoid unsafe EVQ writes. + */ + rc = efx_mcdi_set_workaround(enp, MC_CMD_WORKAROUND_BUG35388, B_TRUE, + NULL); + if ((rc == 0) || (rc == EACCES)) + encp->enc_bug35388_workaround = B_TRUE; + else if ((rc == ENOTSUP) || (rc == ENOENT)) + encp->enc_bug35388_workaround = B_FALSE; + else + goto fail8; + + /* + * If the bug41750 workaround is enabled, then do not test interrupts, + * as the test will fail (seen with Greenport controllers). + */ + rc = efx_mcdi_set_workaround(enp, MC_CMD_WORKAROUND_BUG41750, B_TRUE, + NULL); + if (rc == 0) { + encp->enc_bug41750_workaround = B_TRUE; + } else if (rc == EACCES) { + /* Assume a controller with 40G ports needs the workaround. */ + if (epp->ep_default_adv_cap_mask & EFX_PHY_CAP_40000FDX) + encp->enc_bug41750_workaround = B_TRUE; + else + encp->enc_bug41750_workaround = B_FALSE; + } else if ((rc == ENOTSUP) || (rc == ENOENT)) { + encp->enc_bug41750_workaround = B_FALSE; + } else { + goto fail9; + } + if (EFX_PCI_FUNCTION_IS_VF(encp)) { + /* Interrupt testing does not work for VFs. See bug50084. */ + encp->enc_bug41750_workaround = B_TRUE; + } + + /* + * If the bug26807 workaround is enabled, then firmware has enabled + * support for chained multicast filters. Firmware will reset (FLR) + * functions which have filters in the hardware filter table when the + * workaround is enabled/disabled. + * + * We must recheck if the workaround is enabled after inserting the + * first hardware filter, in case it has been changed since this check. + */ + rc = efx_mcdi_set_workaround(enp, MC_CMD_WORKAROUND_BUG26807, + B_TRUE, &flags); + if (rc == 0) { + encp->enc_bug26807_workaround = B_TRUE; + if (flags & (1 << MC_CMD_WORKAROUND_EXT_OUT_FLR_DONE_LBN)) { + /* + * Other functions had installed filters before the + * workaround was enabled, and they have been reset + * by firmware. + */ + EFSYS_PROBE(bug26807_workaround_flr_done); + /* FIXME: bump MC warm boot count ? */ + } + } else if (rc == EACCES) { + /* + * Unprivileged functions cannot enable the workaround in older + * firmware. + */ + encp->enc_bug26807_workaround = B_FALSE; + } else if ((rc == ENOTSUP) || (rc == ENOENT)) { + encp->enc_bug26807_workaround = B_FALSE; + } else { + goto fail10; + } + + /* Get sysclk frequency (in MHz). */ + if ((rc = efx_mcdi_get_clock(enp, &sysclk)) != 0) + goto fail11; + + /* + * The timer quantum is 1536 sysclk cycles, documented for the + * EV_TMR_VAL field of EV_TIMER_TBL. Scale for MHz and ns units. + */ + encp->enc_evq_timer_quantum_ns = 1536000UL / sysclk; /* 1536 cycles */ + if (encp->enc_bug35388_workaround) { + encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns << + ERF_DD_EVQ_IND_TIMER_VAL_WIDTH) / 1000; + } else { + encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns << + FRF_CZ_TC_TIMER_VAL_WIDTH) / 1000; + } + + /* Check capabilities of running datapath firmware */ + if ((rc = hunt_get_datapath_caps(enp)) != 0) + goto fail12; + + /* Alignment for receive packet DMA buffers */ + encp->enc_rx_buf_align_start = 1; + encp->enc_rx_buf_align_end = 64; /* RX DMA end padding */ + + /* Alignment for WPTR updates */ + encp->enc_rx_push_align = HUNTINGTON_RX_WPTR_ALIGN; + + /* + * Set resource limits for MC_CMD_ALLOC_VIS. Note that we cannot use + * MC_CMD_GET_RESOURCE_LIMITS here as that reports the available + * resources (allocated to this PCIe function), which is zero until + * after we have allocated VIs. + */ + encp->enc_evq_limit = 1024; + encp->enc_rxq_limit = EFX_RXQ_LIMIT_TARGET; + encp->enc_txq_limit = EFX_TXQ_LIMIT_TARGET; + + encp->enc_buftbl_limit = 0xFFFFFFFF; + + encp->enc_piobuf_limit = HUNT_PIOBUF_NBUFS; + encp->enc_piobuf_size = HUNT_PIOBUF_SIZE; + + /* + * Get the current privilege mask. Note that this may be modified + * dynamically, so this value is informational only. DO NOT use + * the privilege mask to check for sufficient privileges, as that + * can result in time-of-check/time-of-use bugs. + */ + if ((rc = efx_mcdi_privilege_mask(enp, pf, vf, &mask)) != 0) + goto fail13; + + encp->enc_privilege_mask = mask; + + /* Get interrupt vector limits */ + if ((rc = efx_mcdi_get_vector_cfg(enp, &base, &nvec, NULL)) != 0) { + if (EFX_PCI_FUNCTION_IS_PF(encp)) + goto fail14; + + /* Ignore error (cannot query vector limits from a VF). */ + base = 0; + nvec = 1024; + } + encp->enc_intr_vec_base = base; + encp->enc_intr_limit = nvec; + + /* + * Maximum number of bytes into the frame the TCP header can start for + * firmware assisted TSO to work. + */ + encp->enc_tx_tso_tcp_header_offset_limit = 208; + + return (0); + +fail14: + EFSYS_PROBE(fail14); +fail13: + EFSYS_PROBE(fail13); +fail12: + EFSYS_PROBE(fail12); +fail11: + EFSYS_PROBE(fail11); +fail10: + EFSYS_PROBE(fail10); +fail9: + EFSYS_PROBE(fail9); +fail8: + EFSYS_PROBE(fail8); +fail7: + EFSYS_PROBE(fail7); +fail6: + EFSYS_PROBE(fail6); +fail5: + EFSYS_PROBE(fail5); +fail4: + EFSYS_PROBE(fail4); +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + + __checkReturn int +hunt_nic_probe( + __in efx_nic_t *enp) +{ + efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + efx_drv_cfg_t *edcp = &(enp->en_drv_cfg); + int rc; + + EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_HUNTINGTON); + + /* Read and clear any assertion state */ + if ((rc = efx_mcdi_read_assertion(enp)) != 0) + goto fail1; + + /* Exit the assertion handler */ + if ((rc = efx_mcdi_exit_assertion_handler(enp)) != 0) + if (rc != EACCES) + goto fail2; + + if ((rc = efx_mcdi_drv_attach(enp, B_TRUE)) != 0) + goto fail3; + + if ((rc = hunt_board_cfg(enp)) != 0) + if (rc != EACCES) + goto fail4; + + /* + * Set default driver config limits (based on board config). + * + * FIXME: For now allocate a fixed number of VIs which is likely to be + * sufficient and small enough to allow multiple functions on the same + * port. + */ + edcp->edc_min_vi_count = edcp->edc_max_vi_count = + MIN(128, MAX(encp->enc_rxq_limit, encp->enc_txq_limit)); + + /* The client driver must configure and enable PIO buffer support */ + edcp->edc_max_piobuf_count = 0; + edcp->edc_pio_alloc_size = 0; + +#if EFSYS_OPT_MAC_STATS + /* Wipe the MAC statistics */ + if ((rc = efx_mcdi_mac_stats_clear(enp)) != 0) + goto fail5; +#endif + +#if EFSYS_OPT_LOOPBACK + if ((rc = efx_mcdi_get_loopback_modes(enp)) != 0) + goto fail6; +#endif + +#if EFSYS_OPT_MON_STATS + if ((rc = mcdi_mon_cfg_build(enp)) != 0) { + /* Unprivileged functions do not have access to sensors */ + if (rc != EACCES) + goto fail7; + } +#endif + + encp->enc_features = enp->en_features; + + return (0); + +#if EFSYS_OPT_MON_STATS +fail7: + EFSYS_PROBE(fail7); +#endif +#if EFSYS_OPT_LOOPBACK +fail6: + EFSYS_PROBE(fail6); +#endif +#if EFSYS_OPT_MAC_STATS +fail5: + EFSYS_PROBE(fail5); +#endif +fail4: + EFSYS_PROBE(fail4); +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_nic_set_drv_limits( + __inout efx_nic_t *enp, + __in efx_drv_limits_t *edlp) +{ + efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + efx_drv_cfg_t *edcp = &(enp->en_drv_cfg); + uint32_t min_evq_count, max_evq_count; + uint32_t min_rxq_count, max_rxq_count; + uint32_t min_txq_count, max_txq_count; + int rc; + + if (edlp == NULL) { + rc = EINVAL; + goto fail1; + } + + /* Get minimum required and maximum usable VI limits */ + min_evq_count = MIN(edlp->edl_min_evq_count, encp->enc_evq_limit); + min_rxq_count = MIN(edlp->edl_min_rxq_count, encp->enc_rxq_limit); + min_txq_count = MIN(edlp->edl_min_txq_count, encp->enc_txq_limit); + + edcp->edc_min_vi_count = + MAX(min_evq_count, MAX(min_rxq_count, min_txq_count)); + + max_evq_count = MIN(edlp->edl_max_evq_count, encp->enc_evq_limit); + max_rxq_count = MIN(edlp->edl_max_rxq_count, encp->enc_rxq_limit); + max_txq_count = MIN(edlp->edl_max_txq_count, encp->enc_txq_limit); + + edcp->edc_max_vi_count = + MAX(max_evq_count, MAX(max_rxq_count, max_txq_count)); + + /* + * Check limits for sub-allocated piobuf blocks. + * PIO is optional, so don't fail if the limits are incorrect. + */ + if ((encp->enc_piobuf_size == 0) || + (encp->enc_piobuf_limit == 0) || + (edlp->edl_min_pio_alloc_size == 0) || + (edlp->edl_min_pio_alloc_size > encp->enc_piobuf_size)) { + /* Disable PIO */ + edcp->edc_max_piobuf_count = 0; + edcp->edc_pio_alloc_size = 0; + } else { + uint32_t blk_size, blk_count, blks_per_piobuf; + + blk_size = + MAX(edlp->edl_min_pio_alloc_size, HUNT_MIN_PIO_ALLOC_SIZE); + + blks_per_piobuf = encp->enc_piobuf_size / blk_size; + EFSYS_ASSERT3U(blks_per_piobuf, <=, 32); + + blk_count = (encp->enc_piobuf_limit * blks_per_piobuf); + + /* A zero max pio alloc count means unlimited */ + if ((edlp->edl_max_pio_alloc_count > 0) && + (edlp->edl_max_pio_alloc_count < blk_count)) { + blk_count = edlp->edl_max_pio_alloc_count; + } + + edcp->edc_pio_alloc_size = blk_size; + edcp->edc_max_piobuf_count = + (blk_count + (blks_per_piobuf - 1)) / blks_per_piobuf; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + + __checkReturn int +hunt_nic_reset( + __in efx_nic_t *enp) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_ENTITY_RESET_IN_LEN, + MC_CMD_ENTITY_RESET_OUT_LEN)]; + int rc; + + /* hunt_nic_reset() is called to recover from BADASSERT failures. */ + if ((rc = efx_mcdi_read_assertion(enp)) != 0) + goto fail1; + if ((rc = efx_mcdi_exit_assertion_handler(enp)) != 0) + goto fail2; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_ENTITY_RESET; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_ENTITY_RESET_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_ENTITY_RESET_OUT_LEN; + + MCDI_IN_POPULATE_DWORD_1(req, ENTITY_RESET_IN_FLAG, + ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET, 1); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail3; + } + + /* Clear RX/TX DMA queue errors */ + enp->en_reset_flags &= ~(EFX_RESET_RXQ_ERR | EFX_RESET_TXQ_ERR); + + return (0); + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_nic_init( + __in efx_nic_t *enp) +{ + efx_drv_cfg_t *edcp = &(enp->en_drv_cfg); + uint32_t min_vi_count, max_vi_count; + uint32_t vi_count, vi_base; + uint32_t i; + int rc; + + EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_HUNTINGTON); + + /* Enable reporting of some events (e.g. link change) */ + if ((rc = efx_mcdi_log_ctrl(enp)) != 0) + goto fail1; + + /* Allocate (optional) on-chip PIO buffers */ + hunt_nic_alloc_piobufs(enp, edcp->edc_max_piobuf_count); + + /* + * For best performance, PIO writes should use a write-combined + * (WC) memory mapping. Using a separate WC mapping for the PIO + * aperture of each VI would be a burden to drivers (and not + * possible if the host page size is >4Kbyte). + * + * To avoid this we use a single uncached (UC) mapping for VI + * register access, and a single WC mapping for extra VIs used + * for PIO writes. + * + * Each piobuf must be linked to a VI in the WC mapping, and to + * each VI that is using a sub-allocated block from the piobuf. + */ + min_vi_count = edcp->edc_min_vi_count; + max_vi_count = edcp->edc_max_vi_count + enp->en_u.hunt.enu_piobuf_count; + + /* Ensure that the previously attached driver's VIs are freed */ + if ((rc = efx_mcdi_free_vis(enp)) != 0) + goto fail2; + + /* + * Reserve VI resources (EVQ+RXQ+TXQ) for this PCIe function. If this + * fails then retrying the request for fewer VI resources may succeed. + */ + vi_count = 0; + if ((rc = efx_mcdi_alloc_vis(enp, min_vi_count, max_vi_count, + &vi_base, &vi_count)) != 0) + goto fail3; + + EFSYS_PROBE2(vi_alloc, uint32_t, vi_base, uint32_t, vi_count); + + if (vi_count < min_vi_count) { + rc = ENOMEM; + goto fail4; + } + + enp->en_u.hunt.enu_vi_base = vi_base; + enp->en_u.hunt.enu_vi_count = vi_count; + + if (vi_count < min_vi_count + enp->en_u.hunt.enu_piobuf_count) { + /* Not enough extra VIs to map piobufs */ + hunt_nic_free_piobufs(enp); + } + + enp->en_u.hunt.enu_pio_write_vi_base = + vi_count - enp->en_u.hunt.enu_piobuf_count; + + /* Save UC memory mapping details */ + enp->en_u.hunt.enu_uc_mem_map_offset = 0; + if (enp->en_u.hunt.enu_piobuf_count > 0) { + enp->en_u.hunt.enu_uc_mem_map_size = + (ER_DZ_TX_PIOBUF_STEP * + enp->en_u.hunt.enu_pio_write_vi_base); + } else { + enp->en_u.hunt.enu_uc_mem_map_size = + (ER_DZ_TX_PIOBUF_STEP * + enp->en_u.hunt.enu_vi_count); + } + + /* Save WC memory mapping details */ + enp->en_u.hunt.enu_wc_mem_map_offset = + enp->en_u.hunt.enu_uc_mem_map_offset + + enp->en_u.hunt.enu_uc_mem_map_size; + + enp->en_u.hunt.enu_wc_mem_map_size = + (ER_DZ_TX_PIOBUF_STEP * + enp->en_u.hunt.enu_piobuf_count); + + /* Link piobufs to extra VIs in WC mapping */ + if (enp->en_u.hunt.enu_piobuf_count > 0) { + for (i = 0; i < enp->en_u.hunt.enu_piobuf_count; i++) { + rc = efx_mcdi_link_piobuf(enp, + enp->en_u.hunt.enu_pio_write_vi_base + i, + enp->en_u.hunt.enu_piobuf_handle[i]); + if (rc != 0) + break; + } + } + + /* Allocate a vAdapter attached to our upstream vPort/pPort */ + if ((rc = efx_mcdi_vadaptor_alloc(enp, EVB_PORT_ID_ASSIGNED)) != 0) + goto fail5; + + enp->en_vport_id = EVB_PORT_ID_ASSIGNED; + + return (0); + +fail5: + EFSYS_PROBE(fail5); +fail4: + EFSYS_PROBE(fail4); +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); + + hunt_nic_free_piobufs(enp); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_nic_get_vi_pool( + __in efx_nic_t *enp, + __out uint32_t *vi_countp) +{ + EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_HUNTINGTON); + + /* + * Report VIs that the client driver can use. + * Do not include VIs used for PIO buffer writes. + */ + *vi_countp = enp->en_u.hunt.enu_pio_write_vi_base; + + return (0); +} + + __checkReturn int +hunt_nic_get_bar_region( + __in efx_nic_t *enp, + __in efx_nic_region_t region, + __out uint32_t *offsetp, + __out size_t *sizep) +{ + int rc; + + EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_HUNTINGTON); + + /* + * TODO: Specify host memory mapping alignment and granularity + * in efx_drv_limits_t so that they can be taken into account + * when allocating extra VIs for PIO writes. + */ + switch (region) { + case EFX_REGION_VI: + /* UC mapped memory BAR region for VI registers */ + *offsetp = enp->en_u.hunt.enu_uc_mem_map_offset; + *sizep = enp->en_u.hunt.enu_uc_mem_map_size; + break; + + case EFX_REGION_PIO_WRITE_VI: + /* WC mapped memory BAR region for piobuf writes */ + *offsetp = enp->en_u.hunt.enu_wc_mem_map_offset; + *sizep = enp->en_u.hunt.enu_wc_mem_map_size; + break; + + default: + rc = EINVAL; + goto fail1; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + void +hunt_nic_fini( + __in efx_nic_t *enp) +{ + (void) efx_mcdi_vadaptor_free(enp, enp->en_vport_id); + enp->en_vport_id = 0; + + /* FIXME: do we need to unlink piobufs ? */ + hunt_nic_free_piobufs(enp); + + (void) efx_mcdi_free_vis(enp); + enp->en_u.hunt.enu_vi_count = 0; +} + + void +hunt_nic_unprobe( + __in efx_nic_t *enp) +{ +#if EFSYS_OPT_MON_STATS + mcdi_mon_cfg_free(enp); +#endif /* EFSYS_OPT_MON_STATS */ + (void) efx_mcdi_drv_attach(enp, B_FALSE); +} + +#if EFSYS_OPT_DIAG + + __checkReturn int +hunt_nic_register_test( + __in efx_nic_t *enp) +{ + int rc; + + /* FIXME */ + _NOTE(ARGUNUSED(enp)) + if (B_FALSE) { + rc = ENOTSUP; + goto fail1; + } + /* FIXME */ + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +#endif /* EFSYS_OPT_DIAG */ + + + +#endif /* EFSYS_OPT_HUNTINGTON */ diff --git a/sys/dev/sfxge/common/hunt_nvram.c b/sys/dev/sfxge/common/hunt_nvram.c new file mode 100644 index 000000000000..3e130f4a51b0 --- /dev/null +++ b/sys/dev/sfxge/common/hunt_nvram.c @@ -0,0 +1,1538 @@ +/*- + * Copyright (c) 2012-2015 Solarflare Communications Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "efsys.h" +#include "efx.h" +#include "efx_types.h" +#include "efx_regs.h" +#include "efx_impl.h" + +#if EFSYS_OPT_HUNTINGTON + +#if EFSYS_OPT_VPD || EFSYS_OPT_NVRAM + +#include "ef10_tlv_layout.h" + +/* Cursor for TLV partition format */ +typedef struct tlv_cursor_s { + uint32_t *block; /* Base of data block */ + uint32_t *current; /* Cursor position */ + uint32_t *end; /* End tag position */ + uint32_t *limit; /* Last dword of data block */ +} tlv_cursor_t; + +static __checkReturn int +tlv_validate_state( + __in tlv_cursor_t *cursor); + + +/* + * Operations on TLV formatted partition data. + */ +static uint32_t +tlv_tag( + __in tlv_cursor_t *cursor) +{ + uint32_t dword, tag; + + dword = cursor->current[0]; + tag = __LE_TO_CPU_32(dword); + + return (tag); +} + +static size_t +tlv_length( + __in tlv_cursor_t *cursor) +{ + uint32_t dword, length; + + if (tlv_tag(cursor) == TLV_TAG_END) + return (0); + + dword = cursor->current[1]; + length = __LE_TO_CPU_32(dword); + + return ((size_t)length); +} + +static uint8_t * +tlv_value( + __in tlv_cursor_t *cursor) +{ + if (tlv_tag(cursor) == TLV_TAG_END) + return (NULL); + + return ((uint8_t *)(&cursor->current[2])); +} + +static uint8_t * +tlv_item( + __in tlv_cursor_t *cursor) +{ + if (tlv_tag(cursor) == TLV_TAG_END) + return (NULL); + + return ((uint8_t *)cursor->current); +} + +/* + * TLV item DWORD length is tag + length + value (rounded up to DWORD) + * equivalent to tlv_n_words_for_len in mc-comms tlv.c + */ +#define TLV_DWORD_COUNT(length) \ + (1 + 1 + (((length) + sizeof (uint32_t) - 1) / sizeof (uint32_t))) + + +static uint32_t * +tlv_next_item_ptr( + __in tlv_cursor_t *cursor) +{ + uint32_t length; + + length = tlv_length(cursor); + + return (cursor->current + TLV_DWORD_COUNT(length)); +} + +static int +tlv_advance( + __in tlv_cursor_t *cursor) +{ + int rc; + + if ((rc = tlv_validate_state(cursor)) != 0) + goto fail1; + + if (cursor->current == cursor->end) { + /* No more tags after END tag */ + cursor->current = NULL; + rc = ENOENT; + goto fail2; + } + + /* Advance to next item and validate */ + cursor->current = tlv_next_item_ptr(cursor); + + if ((rc = tlv_validate_state(cursor)) != 0) + goto fail3; + + return (0); + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +static int +tlv_rewind( + __in tlv_cursor_t *cursor) +{ + int rc; + + cursor->current = cursor->block; + + if ((rc = tlv_validate_state(cursor)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +static int +tlv_find( + __in tlv_cursor_t *cursor, + __in uint32_t tag) +{ + int rc; + + rc = tlv_rewind(cursor); + while (rc == 0) { + if (tlv_tag(cursor) == tag) + break; + + rc = tlv_advance(cursor); + } + return (rc); +} + +static __checkReturn int +tlv_validate_state( + __in tlv_cursor_t *cursor) +{ + int rc; + + /* Check cursor position */ + if (cursor->current < cursor->block) { + rc = EINVAL; + goto fail1; + } + if (cursor->current > cursor->limit) { + rc = EINVAL; + goto fail2; + } + + if (tlv_tag(cursor) != TLV_TAG_END) { + /* Check current item has space for tag and length */ + if (cursor->current > (cursor->limit - 2)) { + cursor->current = NULL; + rc = EFAULT; + goto fail3; + } + + /* Check we have value data for current item and another tag */ + if (tlv_next_item_ptr(cursor) > (cursor->limit - 1)) { + cursor->current = NULL; + rc = EFAULT; + goto fail4; + } + } + + return (0); + +fail4: + EFSYS_PROBE(fail4); +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +static int +tlv_init_cursor( + __in tlv_cursor_t *cursor, + __in uint32_t *block, + __in uint32_t *limit) +{ + cursor->block = block; + cursor->limit = limit; + + cursor->current = cursor->block; + cursor->end = NULL; + + return (tlv_validate_state(cursor)); +} + +static int +tlv_init_cursor_from_size( + __in tlv_cursor_t *cursor, + __in uint8_t *block, + __in size_t size) +{ + uint32_t *limit; + limit = (uint32_t *)(block + size - sizeof (uint32_t)); + return (tlv_init_cursor(cursor, (uint32_t *)block, limit)); +} + +static int +tlv_require_end( + __in tlv_cursor_t *cursor) +{ + uint32_t *pos; + int rc; + + if (cursor->end == NULL) { + pos = cursor->current; + if ((rc = tlv_find(cursor, TLV_TAG_END)) != 0) + goto fail1; + + cursor->end = cursor->current; + cursor->current = pos; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +static size_t +tlv_block_length_used( + __in tlv_cursor_t *cursor) +{ + int rc; + + if ((rc = tlv_validate_state(cursor)) != 0) + goto fail1; + + if ((rc = tlv_require_end(cursor)) != 0) + goto fail2; + + /* Return space used (including the END tag) */ + return (cursor->end + 1 - cursor->block) * sizeof (uint32_t); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (0); +} + + +static __checkReturn uint32_t * +tlv_write( + __in tlv_cursor_t *cursor, + __in uint32_t tag, + __in_bcount(size) uint8_t *data, + __in size_t size) +{ + uint32_t len = size; + uint32_t *ptr; + + ptr = cursor->current; + + *ptr++ = __CPU_TO_LE_32(tag); + *ptr++ = __CPU_TO_LE_32(len); + + if (len > 0) { + ptr[(len - 1) / sizeof (uint32_t)] = 0; + memcpy(ptr, data, len); + ptr += P2ROUNDUP(len, sizeof (uint32_t)) / sizeof (*ptr); + } + + return (ptr); +} + +static __checkReturn int +tlv_insert( + __in tlv_cursor_t *cursor, + __in uint32_t tag, + __in uint8_t *data, + __in size_t size) +{ + unsigned int delta; + int rc; + + if ((rc = tlv_validate_state(cursor)) != 0) + goto fail1; + + if ((rc = tlv_require_end(cursor)) != 0) + goto fail2; + + if (tag == TLV_TAG_END) { + rc = EINVAL; + goto fail3; + } + + delta = TLV_DWORD_COUNT(size); + if (cursor->end + 1 + delta > cursor->limit) { + rc = ENOSPC; + goto fail4; + } + + /* Move data up: new space at cursor->current */ + memmove(cursor->current + delta, cursor->current, + (cursor->end + 1 - cursor->current) * sizeof (uint32_t)); + + /* Adjust the end pointer */ + cursor->end += delta; + + /* Write new TLV item */ + tlv_write(cursor, tag, data, size); + + return (0); + +fail4: + EFSYS_PROBE(fail4); +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +static __checkReturn int +tlv_modify( + __in tlv_cursor_t *cursor, + __in uint32_t tag, + __in uint8_t *data, + __in size_t size) +{ + uint32_t *pos; + unsigned int old_ndwords; + unsigned int new_ndwords; + unsigned int delta; + int rc; + + if ((rc = tlv_validate_state(cursor)) != 0) + goto fail1; + + if (tlv_tag(cursor) == TLV_TAG_END) { + rc = EINVAL; + goto fail2; + } + if (tlv_tag(cursor) != tag) { + rc = EINVAL; + goto fail3; + } + + old_ndwords = TLV_DWORD_COUNT(tlv_length(cursor)); + new_ndwords = TLV_DWORD_COUNT(size); + + if ((rc = tlv_require_end(cursor)) != 0) + goto fail4; + + if (new_ndwords > old_ndwords) { + /* Expand space used for TLV item */ + delta = new_ndwords - old_ndwords; + pos = cursor->current + old_ndwords; + + if (cursor->end + 1 + delta > cursor->limit) { + rc = ENOSPC; + goto fail5; + } + + /* Move up: new space at (cursor->current + old_ndwords) */ + memmove(pos + delta, pos, + (cursor->end + 1 - pos) * sizeof (uint32_t)); + + /* Adjust the end pointer */ + cursor->end += delta; + + } else if (new_ndwords < old_ndwords) { + /* Shrink space used for TLV item */ + delta = old_ndwords - new_ndwords; + pos = cursor->current + new_ndwords; + + /* Move down: remove words at (cursor->current + new_ndwords) */ + memmove(pos, pos + delta, + (cursor->end + 1 - pos) * sizeof (uint32_t)); + + /* Zero the new space at the end of the TLV chain */ + memset(cursor->end + 1 - delta, 0, delta * sizeof (uint32_t)); + + /* Adjust the end pointer */ + cursor->end -= delta; + } + + /* Write new data */ + tlv_write(cursor, tag, data, size); + + return (0); + +fail5: + EFSYS_PROBE(fail5); +fail4: + EFSYS_PROBE(fail4); +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +/* Validate TLV formatted partition contents (before writing to flash) */ + __checkReturn int +efx_nvram_tlv_validate( + __in efx_nic_t *enp, + __in uint32_t partn, + __in_bcount(partn_size) caddr_t partn_data, + __in size_t partn_size) +{ + tlv_cursor_t cursor; + struct tlv_partition_header *header; + struct tlv_partition_trailer *trailer; + size_t total_length; + uint32_t cksum; + int pos; + int rc; + + EFX_STATIC_ASSERT(sizeof (*header) <= HUNTINGTON_NVRAM_CHUNK); + + if ((partn_data == NULL) || (partn_size == 0)) { + rc = EINVAL; + goto fail1; + } + + /* The partition header must be the first item (at offset zero) */ + if ((rc = tlv_init_cursor_from_size(&cursor, partn_data, + partn_size)) != 0) { + rc = EFAULT; + goto fail2; + } + if (tlv_tag(&cursor) != TLV_TAG_PARTITION_HEADER) { + rc = EINVAL; + goto fail3; + } + header = (struct tlv_partition_header *)tlv_item(&cursor); + + /* Check TLV partition length (includes the END tag) */ + total_length = __LE_TO_CPU_32(header->total_length); + if (total_length > partn_size) { + rc = EFBIG; + goto fail4; + } + + /* Check partition ends with PARTITION_TRAILER and END tags */ + if ((rc = tlv_find(&cursor, TLV_TAG_PARTITION_TRAILER)) != 0) { + rc = EINVAL; + goto fail5; + } + trailer = (struct tlv_partition_trailer *)tlv_item(&cursor); + + if ((rc = tlv_advance(&cursor)) != 0) { + rc = EINVAL; + goto fail6; + } + if (tlv_tag(&cursor) != TLV_TAG_END) { + rc = EINVAL; + goto fail7; + } + + /* Check generation counts are consistent */ + if (trailer->generation != header->generation) { + rc = EINVAL; + goto fail8; + } + + /* Verify partition checksum */ + cksum = 0; + for (pos = 0; (size_t)pos < total_length; pos += sizeof (uint32_t)) { + cksum += *((uint32_t *)(partn_data + pos)); + } + if (cksum != 0) { + rc = EINVAL; + goto fail9; + } + + return (0); + +fail9: + EFSYS_PROBE(fail9); +fail8: + EFSYS_PROBE(fail8); +fail7: + EFSYS_PROBE(fail7); +fail6: + EFSYS_PROBE(fail6); +fail5: + EFSYS_PROBE(fail5); +fail4: + EFSYS_PROBE(fail4); +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +/* Read and validate an entire TLV formatted partition */ +static __checkReturn int +hunt_nvram_read_tlv_partition( + __in efx_nic_t *enp, + __in uint32_t partn, + __in_bcount(partn_size) caddr_t partn_data, + __in size_t partn_size) +{ + tlv_cursor_t cursor; + struct tlv_partition_header *header; + struct tlv_partition_trailer *trailer; + size_t total_length; + uint32_t cksum; + int pos; + int rc; + + EFX_STATIC_ASSERT(sizeof (*header) <= HUNTINGTON_NVRAM_CHUNK); + + if ((partn_data == NULL) || (partn_size == 0)) { + rc = EINVAL; + goto fail1; + } + + /* Read initial chunk of partition */ + if ((rc = hunt_nvram_partn_read(enp, partn, 0, partn_data, + HUNTINGTON_NVRAM_CHUNK)) != 0) { + goto fail2; + } + + /* The partition header must be the first item (at offset zero) */ + if ((rc = tlv_init_cursor_from_size(&cursor, partn_data, + partn_size)) != 0) { + rc = EFAULT; + goto fail3; + } + if (tlv_tag(&cursor) != TLV_TAG_PARTITION_HEADER) { + rc = EINVAL; + goto fail4; + } + header = (struct tlv_partition_header *)tlv_item(&cursor); + + /* Check TLV partition length (includes the END tag) */ + total_length = __LE_TO_CPU_32(header->total_length); + if (total_length > partn_size) { + rc = EFBIG; + goto fail5; + } + + /* Read the remaining partition content */ + if (total_length > HUNTINGTON_NVRAM_CHUNK) { + if ((rc = hunt_nvram_partn_read(enp, partn, + HUNTINGTON_NVRAM_CHUNK, + partn_data + HUNTINGTON_NVRAM_CHUNK, + total_length - HUNTINGTON_NVRAM_CHUNK)) != 0) + goto fail6; + } + + /* Check partition ends with PARTITION_TRAILER and END tags */ + if ((rc = tlv_find(&cursor, TLV_TAG_PARTITION_TRAILER)) != 0) { + rc = EINVAL; + goto fail7; + } + trailer = (struct tlv_partition_trailer *)tlv_item(&cursor); + + if ((rc = tlv_advance(&cursor)) != 0) { + rc = EINVAL; + goto fail8; + } + if (tlv_tag(&cursor) != TLV_TAG_END) { + rc = EINVAL; + goto fail9; + } + + /* Check data read from partition is consistent */ + if (trailer->generation != header->generation) { + /* + * The partition data may have been modified between successive + * MCDI NVRAM_READ requests by the MC or another PCI function. + * + * The caller must retry to obtain consistent partition data. + */ + rc = EAGAIN; + goto fail10; + } + + /* Verify partition checksum */ + cksum = 0; + for (pos = 0; (size_t)pos < total_length; pos += sizeof (uint32_t)) { + cksum += *((uint32_t *)(partn_data + pos)); + } + if (cksum != 0) { + rc = EINVAL; + goto fail11; + } + + return (0); + +fail11: + EFSYS_PROBE(fail11); +fail10: + EFSYS_PROBE(fail10); +fail9: + EFSYS_PROBE(fail9); +fail8: + EFSYS_PROBE(fail8); +fail7: + EFSYS_PROBE(fail7); +fail6: + EFSYS_PROBE(fail6); +fail5: + EFSYS_PROBE(fail5); +fail4: + EFSYS_PROBE(fail4); +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +/* + * Read a single TLV item from a host memory + * buffer containing a TLV formatted partition. + */ + __checkReturn int +hunt_nvram_buf_read_tlv( + __in efx_nic_t *enp, + __in_bcount(partn_size) caddr_t partn_data, + __in size_t partn_size, + __in uint32_t tag, + __deref_out_bcount_opt(*sizep) caddr_t *datap, + __out size_t *sizep) +{ + tlv_cursor_t cursor; + caddr_t data; + size_t length; + caddr_t value; + int rc; + + if ((partn_data == NULL) || (partn_size == 0)) { + rc = EINVAL; + goto fail1; + } + + /* Find requested TLV tag in partition data */ + if ((rc = tlv_init_cursor_from_size(&cursor, partn_data, + partn_size)) != 0) { + rc = EFAULT; + goto fail2; + } + if ((rc = tlv_find(&cursor, tag)) != 0) { + rc = ENOENT; + goto fail3; + } + value = tlv_value(&cursor); + length = tlv_length(&cursor); + + if (length == 0) + data = NULL; + else { + /* Copy out data from TLV item */ + EFSYS_KMEM_ALLOC(enp->en_esip, length, data); + if (data == NULL) { + rc = ENOMEM; + goto fail4; + } + memcpy(data, value, length); + } + + *datap = data; + *sizep = length; + + return (0); + +fail4: + EFSYS_PROBE(fail4); +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + + +/* Read a single TLV item from a TLV formatted partition */ + __checkReturn int +hunt_nvram_partn_read_tlv( + __in efx_nic_t *enp, + __in uint32_t partn, + __in uint32_t tag, + __deref_out_bcount_opt(*sizep) caddr_t *datap, + __out size_t *sizep) +{ + caddr_t partn_data = NULL; + size_t partn_size = 0; + size_t length; + caddr_t data; + int retry; + int rc; + + /* Allocate sufficient memory for the entire partition */ + if ((rc = hunt_nvram_partn_size(enp, partn, &partn_size)) != 0) + goto fail1; + + if (partn_size == 0) { + rc = ENOENT; + goto fail2; + } + + EFSYS_KMEM_ALLOC(enp->en_esip, partn_size, partn_data); + if (partn_data == NULL) { + rc = ENOMEM; + goto fail3; + } + + /* + * Read the entire TLV partition. Retry until consistent partition + * contents are returned. Inconsistent data may be read if: + * a) the partition contents are invalid + * b) the MC has rebooted while we were reading the partition + * c) the partition has been modified while we were reading it + * Limit retry attempts to ensure forward progress. + */ + retry = 10; + do { + rc = hunt_nvram_read_tlv_partition(enp, partn, + partn_data, partn_size); + } while ((rc == EAGAIN) && (--retry > 0)); + + if (rc != 0) { + /* Failed to obtain consistent partition data */ + goto fail4; + } + + if ((rc = hunt_nvram_buf_read_tlv(enp, partn_data, partn_size, + tag, &data, &length)) != 0) + goto fail5; + + EFSYS_KMEM_FREE(enp->en_esip, partn_size, partn_data); + + *datap = data; + *sizep = length; + + return (0); + +fail5: + EFSYS_PROBE(fail5); +fail4: + EFSYS_PROBE(fail4); + + EFSYS_KMEM_FREE(enp->en_esip, partn_size, partn_data); +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +/* + * Add or update a single TLV item in a host memory buffer containing a TLV + * formatted partition. + */ + __checkReturn int +hunt_nvram_buf_write_tlv( + __inout_bcount(partn_size) caddr_t partn_data, + __in size_t partn_size, + __in uint32_t tag, + __in_bcount(tag_size) caddr_t tag_data, + __in size_t tag_size, + __out size_t *total_lengthp) +{ + tlv_cursor_t cursor; + struct tlv_partition_header *header; + struct tlv_partition_trailer *trailer; + uint32_t generation; + uint32_t cksum; + int pos; + int rc; + + /* The partition header must be the first item (at offset zero) */ + if ((rc = tlv_init_cursor_from_size(&cursor, partn_data, + partn_size)) != 0) { + rc = EFAULT; + goto fail1; + } + if (tlv_tag(&cursor) != TLV_TAG_PARTITION_HEADER) { + rc = EINVAL; + goto fail2; + } + header = (struct tlv_partition_header *)tlv_item(&cursor); + + /* Update the TLV chain to contain the new data */ + if ((rc = tlv_find(&cursor, tag)) == 0) { + /* Modify existing TLV item */ + if ((rc = tlv_modify(&cursor, tag, + tag_data, tag_size)) != 0) + goto fail3; + } else { + /* Insert a new TLV item before the PARTITION_TRAILER */ + rc = tlv_find(&cursor, TLV_TAG_PARTITION_TRAILER); + if (rc != 0) { + rc = EINVAL; + goto fail4; + } + if ((rc = tlv_insert(&cursor, tag, + tag_data, tag_size)) != 0) { + rc = EINVAL; + goto fail5; + } + } + + /* Find the trailer tag */ + if ((rc = tlv_find(&cursor, TLV_TAG_PARTITION_TRAILER)) != 0) { + rc = EINVAL; + goto fail6; + } + trailer = (struct tlv_partition_trailer *)tlv_item(&cursor); + + /* Update PARTITION_HEADER and PARTITION_TRAILER fields */ + *total_lengthp = tlv_block_length_used(&cursor); + EFSYS_ASSERT3U(*total_lengthp, <=, partn_size); + generation = __LE_TO_CPU_32(header->generation) + 1; + + header->total_length = __CPU_TO_LE_32(*total_lengthp); + header->generation = __CPU_TO_LE_32(generation); + trailer->generation = __CPU_TO_LE_32(generation); + + /* Recompute PARTITION_TRAILER checksum */ + trailer->checksum = 0; + cksum = 0; + for (pos = 0; (size_t)pos < *total_lengthp; pos += sizeof (uint32_t)) { + cksum += *((uint32_t *)(partn_data + pos)); + } + trailer->checksum = ~cksum + 1; + + return (0); + +fail6: + EFSYS_PROBE(fail6); +fail5: + EFSYS_PROBE(fail5); +fail4: + EFSYS_PROBE(fail4); +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +/* Add or update a single TLV item in a TLV formatted partition */ + __checkReturn int +hunt_nvram_partn_write_tlv( + __in efx_nic_t *enp, + __in uint32_t partn, + __in uint32_t tag, + __in_bcount(size) caddr_t data, + __in size_t size) +{ + size_t partn_size; + caddr_t partn_data; + size_t total_length; + int rc; + + EFSYS_ASSERT3U(partn, ==, NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG); + + /* Allocate sufficient memory for the entire partition */ + if ((rc = hunt_nvram_partn_size(enp, partn, &partn_size)) != 0) + goto fail1; + + EFSYS_KMEM_ALLOC(enp->en_esip, partn_size, partn_data); + if (partn_data == NULL) { + rc = ENOMEM; + goto fail2; + } + + /* Lock the partition */ + if ((rc = hunt_nvram_partn_lock(enp, partn)) != 0) + goto fail3; + + /* Read the partition contents (no need to retry when locked). */ + if ((rc = hunt_nvram_read_tlv_partition(enp, partn, + partn_data, partn_size)) != 0) { + /* Failed to obtain consistent partition data */ + goto fail4; + } + + /* Update the contents in memory */ + if ((rc = hunt_nvram_buf_write_tlv(partn_data, partn_size, + tag, data, size, &total_length)) != 0) + goto fail5; + + /* Erase the whole partition */ + if ((rc = hunt_nvram_partn_erase(enp, partn, 0, partn_size)) != 0) + goto fail6; + + /* Write new partition contents to NVRAM */ + if ((rc = hunt_nvram_partn_write(enp, partn, 0, partn_data, + total_length)) != 0) + goto fail7; + + /* Unlock the partition */ + hunt_nvram_partn_unlock(enp, partn); + + EFSYS_KMEM_FREE(enp->en_esip, partn_size, partn_data); + + return (0); + +fail7: + EFSYS_PROBE(fail7); +fail6: + EFSYS_PROBE(fail6); +fail5: + EFSYS_PROBE(fail5); +fail4: + EFSYS_PROBE(fail4); + + hunt_nvram_partn_unlock(enp, partn); +fail3: + EFSYS_PROBE(fail3); + + EFSYS_KMEM_FREE(enp->en_esip, partn_size, partn_data); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_nvram_partn_size( + __in efx_nic_t *enp, + __in unsigned int partn, + __out size_t *sizep) +{ + int rc; + + if ((rc = efx_mcdi_nvram_info(enp, partn, sizep, NULL, NULL)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_nvram_partn_lock( + __in efx_nic_t *enp, + __in unsigned int partn) +{ + int rc; + + if ((rc = efx_mcdi_nvram_update_start(enp, partn)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_nvram_partn_read( + __in efx_nic_t *enp, + __in unsigned int partn, + __in unsigned int offset, + __out_bcount(size) caddr_t data, + __in size_t size) +{ + size_t chunk; + int rc; + + while (size > 0) { + chunk = MIN(size, HUNTINGTON_NVRAM_CHUNK); + + if ((rc = efx_mcdi_nvram_read(enp, partn, offset, + data, chunk)) != 0) { + goto fail1; + } + + size -= chunk; + data += chunk; + offset += chunk; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_nvram_partn_erase( + __in efx_nic_t *enp, + __in unsigned int partn, + __in unsigned int offset, + __in size_t size) +{ + int rc; + + if ((rc = efx_mcdi_nvram_erase(enp, partn, offset, size)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_nvram_partn_write( + __in efx_nic_t *enp, + __in unsigned int partn, + __in unsigned int offset, + __out_bcount(size) caddr_t data, + __in size_t size) +{ + size_t chunk; + int rc; + + while (size > 0) { + chunk = MIN(size, HUNTINGTON_NVRAM_CHUNK); + + if ((rc = efx_mcdi_nvram_write(enp, partn, offset, + data, chunk)) != 0) { + goto fail1; + } + + size -= chunk; + data += chunk; + offset += chunk; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + void +hunt_nvram_partn_unlock( + __in efx_nic_t *enp, + __in unsigned int partn) +{ + boolean_t reboot; + int rc; + + reboot = B_FALSE; + if ((rc = efx_mcdi_nvram_update_finish(enp, partn, reboot)) != 0) + goto fail1; + + return; + +fail1: + EFSYS_PROBE1(fail1, int, rc); +} + + __checkReturn int +hunt_nvram_partn_set_version( + __in efx_nic_t *enp, + __in unsigned int partn, + __in_ecount(4) uint16_t version[4]) +{ + struct tlv_partition_version partn_version; + size_t size; + int rc; + + /* Add or modify partition version TLV item */ + partn_version.version_w = __CPU_TO_LE_16(version[0]); + partn_version.version_x = __CPU_TO_LE_16(version[1]); + partn_version.version_y = __CPU_TO_LE_16(version[2]); + partn_version.version_z = __CPU_TO_LE_16(version[3]); + + size = sizeof (partn_version) - (2 * sizeof (uint32_t)); + + if ((rc = hunt_nvram_partn_write_tlv(enp, + NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG, + TLV_TAG_PARTITION_VERSION(partn), + (caddr_t)&partn_version.version_w, size)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +#endif /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */ + +#if EFSYS_OPT_NVRAM + +typedef struct hunt_parttbl_entry_s { + unsigned int partn; + unsigned int port; + efx_nvram_type_t nvtype; +} hunt_parttbl_entry_t; + +/* Translate EFX NVRAM types to firmware partition types */ +static hunt_parttbl_entry_t hunt_parttbl[] = { + {NVRAM_PARTITION_TYPE_MC_FIRMWARE, 1, EFX_NVRAM_MC_FIRMWARE}, + {NVRAM_PARTITION_TYPE_MC_FIRMWARE, 2, EFX_NVRAM_MC_FIRMWARE}, + {NVRAM_PARTITION_TYPE_MC_FIRMWARE, 3, EFX_NVRAM_MC_FIRMWARE}, + {NVRAM_PARTITION_TYPE_MC_FIRMWARE, 4, EFX_NVRAM_MC_FIRMWARE}, + {NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP, 1, EFX_NVRAM_MC_GOLDEN}, + {NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP, 2, EFX_NVRAM_MC_GOLDEN}, + {NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP, 3, EFX_NVRAM_MC_GOLDEN}, + {NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP, 4, EFX_NVRAM_MC_GOLDEN}, + {NVRAM_PARTITION_TYPE_EXPANSION_ROM, 1, EFX_NVRAM_BOOTROM}, + {NVRAM_PARTITION_TYPE_EXPANSION_ROM, 2, EFX_NVRAM_BOOTROM}, + {NVRAM_PARTITION_TYPE_EXPANSION_ROM, 3, EFX_NVRAM_BOOTROM}, + {NVRAM_PARTITION_TYPE_EXPANSION_ROM, 4, EFX_NVRAM_BOOTROM}, + {NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT0, 1, EFX_NVRAM_BOOTROM_CFG}, + {NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT1, 2, EFX_NVRAM_BOOTROM_CFG}, + {NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT2, 3, EFX_NVRAM_BOOTROM_CFG}, + {NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT3, 4, EFX_NVRAM_BOOTROM_CFG}, + {NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG, 1, EFX_NVRAM_DYNAMIC_CFG}, + {NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG, 2, EFX_NVRAM_DYNAMIC_CFG}, + {NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG, 3, EFX_NVRAM_DYNAMIC_CFG}, + {NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG, 4, EFX_NVRAM_DYNAMIC_CFG} +}; + +static __checkReturn hunt_parttbl_entry_t * +hunt_parttbl_entry( + __in efx_nic_t *enp, + __in efx_nvram_type_t type) +{ + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); + hunt_parttbl_entry_t *entry; + int i; + + EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES); + + for (i = 0; i < EFX_ARRAY_SIZE(hunt_parttbl); i++) { + entry = &hunt_parttbl[i]; + + if (entry->port == emip->emi_port && entry->nvtype == type) + return (entry); + } + + return (NULL); +} + + +#if EFSYS_OPT_DIAG + + __checkReturn int +hunt_nvram_test( + __in efx_nic_t *enp) +{ + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); + hunt_parttbl_entry_t *entry; + unsigned int npartns = 0; + uint32_t *partns = NULL; + size_t size; + int i; + unsigned int j; + int rc; + + /* Find supported partitions */ + size = MC_CMD_NVRAM_PARTITIONS_OUT_TYPE_ID_MAXNUM * sizeof (uint32_t); + EFSYS_KMEM_ALLOC(enp->en_esip, size, partns); + if (partns == NULL) { + rc = ENOMEM; + goto fail1; + } + + if ((rc = efx_mcdi_nvram_partitions(enp, (caddr_t)partns, size, + &npartns)) != 0) { + goto fail2; + } + + /* + * Iterate over the list of supported partition types + * applicable to *this* port + */ + for (i = 0; i < EFX_ARRAY_SIZE(hunt_parttbl); i++) { + entry = &hunt_parttbl[i]; + + if (entry->port != emip->emi_port) + continue; + + for (j = 0; j < npartns; j++) { + if (entry->partn == partns[j]) { + rc = efx_mcdi_nvram_test(enp, entry->partn); + if (rc != 0) + goto fail3; + } + } + } + + EFSYS_KMEM_FREE(enp->en_esip, size, partns); + return (0); + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); + EFSYS_KMEM_FREE(enp->en_esip, size, partns); +fail1: + EFSYS_PROBE1(fail1, int, rc); + return (rc); +} + +#endif /* EFSYS_OPT_DIAG */ + + __checkReturn int +hunt_nvram_size( + __in efx_nic_t *enp, + __in efx_nvram_type_t type, + __out size_t *sizep) +{ + hunt_parttbl_entry_t *entry; + uint32_t partn; + int rc; + + if ((entry = hunt_parttbl_entry(enp, type)) == NULL) { + rc = ENOTSUP; + goto fail1; + } + partn = entry->partn; + + if ((rc = hunt_nvram_partn_size(enp, partn, sizep)) != 0) + goto fail2; + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + *sizep = 0; + + return (rc); +} + + __checkReturn int +hunt_nvram_get_version( + __in efx_nic_t *enp, + __in efx_nvram_type_t type, + __out uint32_t *subtypep, + __out_ecount(4) uint16_t version[4]) +{ + hunt_parttbl_entry_t *entry; + uint32_t partn; + int rc; + + if ((entry = hunt_parttbl_entry(enp, type)) == NULL) { + rc = ENOTSUP; + goto fail1; + } + partn = entry->partn; + + /* FIXME: get highest partn version from all ports */ + /* FIXME: return partn description if available */ + + if ((rc = efx_mcdi_nvram_metadata(enp, partn, subtypep, + version, NULL, 0)) != 0) + goto fail2; + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_nvram_rw_start( + __in efx_nic_t *enp, + __in efx_nvram_type_t type, + __out size_t *chunk_sizep) +{ + hunt_parttbl_entry_t *entry; + uint32_t partn; + int rc; + + if ((entry = hunt_parttbl_entry(enp, type)) == NULL) { + rc = ENOTSUP; + goto fail1; + } + partn = entry->partn; + + if ((rc = hunt_nvram_partn_lock(enp, partn)) != 0) + goto fail2; + + if (chunk_sizep != NULL) + *chunk_sizep = HUNTINGTON_NVRAM_CHUNK; + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_nvram_read_chunk( + __in efx_nic_t *enp, + __in efx_nvram_type_t type, + __in unsigned int offset, + __out_bcount(size) caddr_t data, + __in size_t size) +{ + hunt_parttbl_entry_t *entry; + int rc; + + if ((entry = hunt_parttbl_entry(enp, type)) == NULL) { + rc = ENOTSUP; + goto fail1; + } + + if ((rc = hunt_nvram_partn_read(enp, entry->partn, + offset, data, size)) != 0) + goto fail2; + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_nvram_erase( + __in efx_nic_t *enp, + __in efx_nvram_type_t type) +{ + hunt_parttbl_entry_t *entry; + size_t size; + int rc; + + if ((entry = hunt_parttbl_entry(enp, type)) == NULL) { + rc = ENOTSUP; + goto fail1; + } + + if ((rc = hunt_nvram_partn_size(enp, entry->partn, &size)) != 0) + goto fail2; + + if ((rc = hunt_nvram_partn_erase(enp, entry->partn, 0, size)) != 0) + goto fail3; + + return (0); + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_nvram_write_chunk( + __in efx_nic_t *enp, + __in efx_nvram_type_t type, + __in unsigned int offset, + __in_bcount(size) caddr_t data, + __in size_t size) +{ + hunt_parttbl_entry_t *entry; + int rc; + + if ((entry = hunt_parttbl_entry(enp, type)) == NULL) { + rc = ENOTSUP; + goto fail1; + } + + if ((rc = hunt_nvram_partn_write(enp, entry->partn, + offset, data, size)) != 0) + goto fail2; + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + void +hunt_nvram_rw_finish( + __in efx_nic_t *enp, + __in efx_nvram_type_t type) +{ + hunt_parttbl_entry_t *entry; + + if ((entry = hunt_parttbl_entry(enp, type)) != NULL) + hunt_nvram_partn_unlock(enp, entry->partn); +} + + __checkReturn int +hunt_nvram_set_version( + __in efx_nic_t *enp, + __in efx_nvram_type_t type, + __in_ecount(4) uint16_t version[4]) +{ + hunt_parttbl_entry_t *entry; + unsigned int partn; + int rc; + + if ((entry = hunt_parttbl_entry(enp, type)) == NULL) { + rc = ENOTSUP; + goto fail1; + } + partn = entry->partn; + + if ((rc = hunt_nvram_partn_set_version(enp, partn, version)) != 0) + goto fail2; + + return (0); + +fail2: + EFSYS_PROBE(fail2); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +#endif /* EFSYS_OPT_NVRAM */ + +#endif /* EFSYS_OPT_HUNTINGTON */ diff --git a/sys/dev/sfxge/common/hunt_phy.c b/sys/dev/sfxge/common/hunt_phy.c new file mode 100644 index 000000000000..1cffea21d9ff --- /dev/null +++ b/sys/dev/sfxge/common/hunt_phy.c @@ -0,0 +1,701 @@ +/*- + * Copyright (c) 2012-2015 Solarflare Communications Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "efsys.h" +#include "efx.h" +#include "efx_impl.h" + +#if EFSYS_OPT_HUNTINGTON + +static void +hunt_phy_decode_cap( + __in uint32_t mcdi_cap, + __out uint32_t *maskp) +{ + /* + * TBD: consider common Siena/Hunt function: Hunt is a superset of + * Siena here (adds 40G) + */ + + uint32_t mask; + + mask = 0; + if (mcdi_cap & (1 << MC_CMD_PHY_CAP_10HDX_LBN)) + mask |= (1 << EFX_PHY_CAP_10HDX); + if (mcdi_cap & (1 << MC_CMD_PHY_CAP_10FDX_LBN)) + mask |= (1 << EFX_PHY_CAP_10FDX); + if (mcdi_cap & (1 << MC_CMD_PHY_CAP_100HDX_LBN)) + mask |= (1 << EFX_PHY_CAP_100HDX); + if (mcdi_cap & (1 << MC_CMD_PHY_CAP_100FDX_LBN)) + mask |= (1 << EFX_PHY_CAP_100FDX); + if (mcdi_cap & (1 << MC_CMD_PHY_CAP_1000HDX_LBN)) + mask |= (1 << EFX_PHY_CAP_1000HDX); + if (mcdi_cap & (1 << MC_CMD_PHY_CAP_1000FDX_LBN)) + mask |= (1 << EFX_PHY_CAP_1000FDX); + if (mcdi_cap & (1 << MC_CMD_PHY_CAP_10000FDX_LBN)) + mask |= (1 << EFX_PHY_CAP_10000FDX); + if (mcdi_cap & (1 << MC_CMD_PHY_CAP_40000FDX_LBN)) + mask |= (1 << EFX_PHY_CAP_40000FDX); + if (mcdi_cap & (1 << MC_CMD_PHY_CAP_PAUSE_LBN)) + mask |= (1 << EFX_PHY_CAP_PAUSE); + if (mcdi_cap & (1 << MC_CMD_PHY_CAP_ASYM_LBN)) + mask |= (1 << EFX_PHY_CAP_ASYM); + if (mcdi_cap & (1 << MC_CMD_PHY_CAP_AN_LBN)) + mask |= (1 << EFX_PHY_CAP_AN); + + *maskp = mask; +} + +static void +hunt_phy_decode_link_mode( + __in efx_nic_t *enp, + __in uint32_t link_flags, + __in unsigned int speed, + __in unsigned int fcntl, + __out efx_link_mode_t *link_modep, + __out unsigned int *fcntlp) +{ + /* + * TBD: consider common Siena/Hunt function: Hunt is a superset of + * Siena here (adds 40G and generate-only flow control) + */ + + boolean_t fd = !!(link_flags & + (1 << MC_CMD_GET_LINK_OUT_FULL_DUPLEX_LBN)); + boolean_t up = !!(link_flags & + (1 << MC_CMD_GET_LINK_OUT_LINK_UP_LBN)); + + _NOTE(ARGUNUSED(enp)) + + if (!up) + *link_modep = EFX_LINK_DOWN; + else if (speed == 40000 && fd) + *link_modep = EFX_LINK_40000FDX; + else if (speed == 10000 && fd) + *link_modep = EFX_LINK_10000FDX; + else if (speed == 1000) + *link_modep = fd ? EFX_LINK_1000FDX : EFX_LINK_1000HDX; + else if (speed == 100) + *link_modep = fd ? EFX_LINK_100FDX : EFX_LINK_100HDX; + else if (speed == 10) + *link_modep = fd ? EFX_LINK_10FDX : EFX_LINK_10HDX; + else + *link_modep = EFX_LINK_UNKNOWN; + + if (fcntl == MC_CMD_FCNTL_OFF) + *fcntlp = 0; + else if (fcntl == MC_CMD_FCNTL_RESPOND) + *fcntlp = EFX_FCNTL_RESPOND; + else if (fcntl == MC_CMD_FCNTL_GENERATE) + *fcntlp = EFX_FCNTL_GENERATE; + else if (fcntl == MC_CMD_FCNTL_BIDIR) + *fcntlp = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE; + else { + EFSYS_PROBE1(mc_pcol_error, int, fcntl); + *fcntlp = 0; + } +} + + + void +hunt_phy_link_ev( + __in efx_nic_t *enp, + __in efx_qword_t *eqp, + __out efx_link_mode_t *link_modep) +{ + /* + * TBD: consider common Siena/Hunt function: Hunt is a superset of + * Siena here (adds 40G) + */ + + efx_port_t *epp = &(enp->en_port); + unsigned int link_flags; + unsigned int speed; + unsigned int fcntl; + efx_link_mode_t link_mode; + uint32_t lp_cap_mask; + + /* + * Convert the LINKCHANGE speed enumeration into mbit/s, in the + * same way as GET_LINK encodes the speed + */ + switch (MCDI_EV_FIELD(eqp, LINKCHANGE_SPEED)) { + case MCDI_EVENT_LINKCHANGE_SPEED_100M: + speed = 100; + break; + case MCDI_EVENT_LINKCHANGE_SPEED_1G: + speed = 1000; + break; + case MCDI_EVENT_LINKCHANGE_SPEED_10G: + speed = 10000; + break; + case MCDI_EVENT_LINKCHANGE_SPEED_40G: + speed = 40000; + break; + default: + speed = 0; + break; + } + + link_flags = MCDI_EV_FIELD(eqp, LINKCHANGE_LINK_FLAGS); + hunt_phy_decode_link_mode(enp, link_flags, speed, + MCDI_EV_FIELD(eqp, LINKCHANGE_FCNTL), + &link_mode, &fcntl); + hunt_phy_decode_cap(MCDI_EV_FIELD(eqp, LINKCHANGE_LP_CAP), + &lp_cap_mask); + + /* + * It's safe to update ep_lp_cap_mask without the driver's port lock + * because presumably any concurrently running efx_port_poll() is + * only going to arrive at the same value. + * + * ep_fcntl has two meanings. It's either the link common fcntl + * (if the PHY supports AN), or it's the forced link state. If + * the former, it's safe to update the value for the same reason as + * for ep_lp_cap_mask. If the latter, then just ignore the value, + * because we can race with efx_mac_fcntl_set(). + */ + epp->ep_lp_cap_mask = lp_cap_mask; + epp->ep_fcntl = fcntl; + + *link_modep = link_mode; +} + + __checkReturn int +hunt_phy_power( + __in efx_nic_t *enp, + __in boolean_t power) +{ + /* TBD: consider common Siena/Hunt function: essentially identical */ + + int rc; + + if (!power) + return (0); + + /* Check if the PHY is a zombie */ + if ((rc = hunt_phy_verify(enp)) != 0) + goto fail1; + + enp->en_reset_flags |= EFX_RESET_PHY; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_phy_get_link( + __in efx_nic_t *enp, + __out hunt_link_state_t *hlsp) +{ + /* + * TBD: consider common Siena/Hunt function: Hunt is very similar + * (at least for now; not clear that the loopbacks should necessarily + * be quite the same...) + */ + + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_GET_LINK_IN_LEN, + MC_CMD_GET_LINK_OUT_LEN)]; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_GET_LINK; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_GET_LINK_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_GET_LINK_OUT_LEN; + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (req.emr_out_length_used < MC_CMD_GET_LINK_OUT_LEN) { + rc = EMSGSIZE; + goto fail2; + } + + hunt_phy_decode_cap(MCDI_OUT_DWORD(req, GET_LINK_OUT_CAP), + &hlsp->hls_adv_cap_mask); + hunt_phy_decode_cap(MCDI_OUT_DWORD(req, GET_LINK_OUT_LP_CAP), + &hlsp->hls_lp_cap_mask); + + hunt_phy_decode_link_mode(enp, MCDI_OUT_DWORD(req, GET_LINK_OUT_FLAGS), + MCDI_OUT_DWORD(req, GET_LINK_OUT_LINK_SPEED), + MCDI_OUT_DWORD(req, GET_LINK_OUT_FCNTL), + &hlsp->hls_link_mode, &hlsp->hls_fcntl); + +#if EFSYS_OPT_LOOPBACK + /* Assert the MC_CMD_LOOPBACK and EFX_LOOPBACK namespace agree */ + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_NONE == EFX_LOOPBACK_OFF); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_DATA == EFX_LOOPBACK_DATA); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GMAC == EFX_LOOPBACK_GMAC); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XGMII == EFX_LOOPBACK_XGMII); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XGXS == EFX_LOOPBACK_XGXS); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XAUI == EFX_LOOPBACK_XAUI); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GMII == EFX_LOOPBACK_GMII); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_SGMII == EFX_LOOPBACK_SGMII); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XGBR == EFX_LOOPBACK_XGBR); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XFI == EFX_LOOPBACK_XFI); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XAUI_FAR == EFX_LOOPBACK_XAUI_FAR); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GMII_FAR == EFX_LOOPBACK_GMII_FAR); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_SGMII_FAR == EFX_LOOPBACK_SGMII_FAR); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XFI_FAR == EFX_LOOPBACK_XFI_FAR); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GPHY == EFX_LOOPBACK_GPHY); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_PHYXS == EFX_LOOPBACK_PHY_XS); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_PCS == EFX_LOOPBACK_PCS); + EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_PMAPMD == EFX_LOOPBACK_PMA_PMD); + + hlsp->hls_loopback = MCDI_OUT_DWORD(req, GET_LINK_OUT_LOOPBACK_MODE); +#endif /* EFSYS_OPT_LOOPBACK */ + + hlsp->hls_mac_up = MCDI_OUT_DWORD(req, GET_LINK_OUT_MAC_FAULT) == 0; + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_phy_reconfigure( + __in efx_nic_t *enp) +{ + /* + * TBD: this is a little different for now (no LED support for Hunt + * yet), but ultimately should consider common Siena/Hunt function: + * Hunt should be a superset of Siena here (adds 40G) + */ + + efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + efx_port_t *epp = &(enp->en_port); + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_SET_LINK_IN_LEN, + MC_CMD_SET_LINK_OUT_LEN)]; + uint32_t cap_mask; + unsigned int led_mode; + unsigned int speed; + int rc; + + if (~encp->enc_func_flags & EFX_NIC_FUNC_LINKCTRL) + goto out; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_SET_LINK; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_SET_LINK_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_SET_LINK_OUT_LEN; + + cap_mask = epp->ep_adv_cap_mask; + MCDI_IN_POPULATE_DWORD_10(req, SET_LINK_IN_CAP, + PHY_CAP_10HDX, (cap_mask >> EFX_PHY_CAP_10HDX) & 0x1, + PHY_CAP_10FDX, (cap_mask >> EFX_PHY_CAP_10FDX) & 0x1, + PHY_CAP_100HDX, (cap_mask >> EFX_PHY_CAP_100HDX) & 0x1, + PHY_CAP_100FDX, (cap_mask >> EFX_PHY_CAP_100FDX) & 0x1, + PHY_CAP_1000HDX, (cap_mask >> EFX_PHY_CAP_1000HDX) & 0x1, + PHY_CAP_1000FDX, (cap_mask >> EFX_PHY_CAP_1000FDX) & 0x1, + PHY_CAP_10000FDX, (cap_mask >> EFX_PHY_CAP_10000FDX) & 0x1, + PHY_CAP_PAUSE, (cap_mask >> EFX_PHY_CAP_PAUSE) & 0x1, + PHY_CAP_ASYM, (cap_mask >> EFX_PHY_CAP_ASYM) & 0x1, + PHY_CAP_AN, (cap_mask >> EFX_PHY_CAP_AN) & 0x1); + /* Too many fields for for POPULATE macros, so insert this afterwards */ + MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP, + PHY_CAP_40000FDX, (cap_mask >> EFX_PHY_CAP_40000FDX) & 0x1); + +#if EFSYS_OPT_LOOPBACK + MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_MODE, + epp->ep_loopback_type); + switch (epp->ep_loopback_link_mode) { + case EFX_LINK_100FDX: + speed = 100; + break; + case EFX_LINK_1000FDX: + speed = 1000; + break; + case EFX_LINK_10000FDX: + speed = 10000; + break; + case EFX_LINK_40000FDX: + speed = 40000; + break; + default: + speed = 0; + } +#else + MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_MODE, MC_CMD_LOOPBACK_NONE); + speed = 0; +#endif /* EFSYS_OPT_LOOPBACK */ + MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_SPEED, speed); + +#if EFSYS_OPT_PHY_FLAGS + MCDI_IN_SET_DWORD(req, SET_LINK_IN_FLAGS, epp->ep_phy_flags); +#else + MCDI_IN_SET_DWORD(req, SET_LINK_IN_FLAGS, 0); +#endif /* EFSYS_OPT_PHY_FLAGS */ + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + /* And set the blink mode */ + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_SET_ID_LED; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_SET_ID_LED_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_SET_ID_LED_OUT_LEN; + +#if EFSYS_OPT_PHY_LED_CONTROL + switch (epp->ep_phy_led_mode) { + case EFX_PHY_LED_DEFAULT: + led_mode = MC_CMD_LED_DEFAULT; + break; + case EFX_PHY_LED_OFF: + led_mode = MC_CMD_LED_OFF; + break; + case EFX_PHY_LED_ON: + led_mode = MC_CMD_LED_ON; + break; + default: + EFSYS_ASSERT(0); + led_mode = MC_CMD_LED_DEFAULT; + } + + MCDI_IN_SET_DWORD(req, SET_ID_LED_IN_STATE, led_mode); +#else + MCDI_IN_SET_DWORD(req, SET_ID_LED_IN_STATE, MC_CMD_LED_DEFAULT); +#endif /* EFSYS_OPT_PHY_LED_CONTROL */ + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail2; + } +out: + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_phy_verify( + __in efx_nic_t *enp) +{ + /* TBD: consider common Siena/Hunt function: essentially identical */ + + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_GET_PHY_STATE_IN_LEN, + MC_CMD_GET_PHY_STATE_OUT_LEN)]; + uint32_t state; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_GET_PHY_STATE; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_GET_PHY_STATE_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_GET_PHY_STATE_OUT_LEN; + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (req.emr_out_length_used < MC_CMD_GET_PHY_STATE_OUT_LEN) { + rc = EMSGSIZE; + goto fail2; + } + + state = MCDI_OUT_DWORD(req, GET_PHY_STATE_OUT_STATE); + if (state != MC_CMD_PHY_STATE_OK) { + if (state != MC_CMD_PHY_STATE_ZOMBIE) + EFSYS_PROBE1(mc_pcol_error, int, state); + rc = ENOTACTIVE; + goto fail3; + } + + return (0); + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_phy_oui_get( + __in efx_nic_t *enp, + __out uint32_t *ouip) +{ + _NOTE(ARGUNUSED(enp, ouip)) + + return (ENOTSUP); +} + +#if EFSYS_OPT_PHY_STATS + + __checkReturn int +hunt_phy_stats_update( + __in efx_nic_t *enp, + __in efsys_mem_t *esmp, + __out_ecount(EFX_PHY_NSTATS) uint32_t *stat) +{ + /* TBD: no stats support in firmware yet */ + _NOTE(ARGUNUSED(enp, esmp)) + memset(stat, 0, EFX_PHY_NSTATS * sizeof (*stat)); + + return (0); +} + +#endif /* EFSYS_OPT_PHY_STATS */ + +#if EFSYS_OPT_PHY_PROPS + +#if EFSYS_OPT_NAMES + +extern const char * +hunt_phy_prop_name( + __in efx_nic_t *enp, + __in unsigned int id) +{ + _NOTE(ARGUNUSED(enp, id)) + + return (NULL); +} + +#endif /* EFSYS_OPT_NAMES */ + +extern __checkReturn int +hunt_phy_prop_get( + __in efx_nic_t *enp, + __in unsigned int id, + __in uint32_t flags, + __out uint32_t *valp) +{ + _NOTE(ARGUNUSED(enp, id, flags, valp)) + + return (ENOTSUP); +} + +extern __checkReturn int +hunt_phy_prop_set( + __in efx_nic_t *enp, + __in unsigned int id, + __in uint32_t val) +{ + _NOTE(ARGUNUSED(enp, id, val)) + + return (ENOTSUP); +} + +#endif /* EFSYS_OPT_PHY_PROPS */ + +#if EFSYS_OPT_BIST + + __checkReturn int +hunt_bist_enable_offline( + __in efx_nic_t *enp) +{ + int rc; + + if ((rc = efx_mcdi_bist_enable_offline(enp)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_bist_start( + __in efx_nic_t *enp, + __in efx_bist_type_t type) +{ + int rc; + + if ((rc = efx_mcdi_bist_start(enp, type)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_bist_poll( + __in efx_nic_t *enp, + __in efx_bist_type_t type, + __out efx_bist_result_t *resultp, + __out_opt __drv_when(count > 0, __notnull) + uint32_t *value_maskp, + __out_ecount_opt(count) __drv_when(count > 0, __notnull) + unsigned long *valuesp, + __in size_t count) +{ + efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_POLL_BIST_IN_LEN, + MCDI_CTL_SDU_LEN_MAX)]; + uint32_t value_mask = 0; + uint32_t result; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_POLL_BIST; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_POLL_BIST_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MCDI_CTL_SDU_LEN_MAX; + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (req.emr_out_length_used < MC_CMD_POLL_BIST_OUT_RESULT_OFST + 4) { + rc = EMSGSIZE; + goto fail2; + } + + if (count > 0) + (void) memset(valuesp, '\0', count * sizeof (unsigned long)); + + result = MCDI_OUT_DWORD(req, POLL_BIST_OUT_RESULT); + + if (result == MC_CMD_POLL_BIST_FAILED && + req.emr_out_length >= MC_CMD_POLL_BIST_OUT_MEM_LEN && + count > EFX_BIST_MEM_ECC_FATAL) { + if (valuesp != NULL) { + valuesp[EFX_BIST_MEM_TEST] = + MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_TEST); + valuesp[EFX_BIST_MEM_ADDR] = + MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ADDR); + valuesp[EFX_BIST_MEM_BUS] = + MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_BUS); + valuesp[EFX_BIST_MEM_EXPECT] = + MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_EXPECT); + valuesp[EFX_BIST_MEM_ACTUAL] = + MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ACTUAL); + valuesp[EFX_BIST_MEM_ECC] = + MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ECC); + valuesp[EFX_BIST_MEM_ECC_PARITY] = + MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ECC_PARITY); + valuesp[EFX_BIST_MEM_ECC_FATAL] = + MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ECC_FATAL); + } + value_mask |= (1 << EFX_BIST_MEM_TEST) | + (1 << EFX_BIST_MEM_ADDR) | + (1 << EFX_BIST_MEM_BUS) | + (1 << EFX_BIST_MEM_EXPECT) | + (1 << EFX_BIST_MEM_ACTUAL) | + (1 << EFX_BIST_MEM_ECC) | + (1 << EFX_BIST_MEM_ECC_PARITY) | + (1 << EFX_BIST_MEM_ECC_FATAL); + } else if (result == MC_CMD_POLL_BIST_FAILED && + encp->enc_phy_type == EFX_PHY_XFI_FARMI && + req.emr_out_length >= MC_CMD_POLL_BIST_OUT_MRSFP_LEN && + count > EFX_BIST_FAULT_CODE) { + if (valuesp != NULL) + valuesp[EFX_BIST_FAULT_CODE] = + MCDI_OUT_DWORD(req, POLL_BIST_OUT_MRSFP_TEST); + value_mask |= 1 << EFX_BIST_FAULT_CODE; + } + + if (value_maskp != NULL) + *value_maskp = value_mask; + + EFSYS_ASSERT(resultp != NULL); + if (result == MC_CMD_POLL_BIST_RUNNING) + *resultp = EFX_BIST_RESULT_RUNNING; + else if (result == MC_CMD_POLL_BIST_PASSED) + *resultp = EFX_BIST_RESULT_PASSED; + else + *resultp = EFX_BIST_RESULT_FAILED; + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + void +hunt_bist_stop( + __in efx_nic_t *enp, + __in efx_bist_type_t type) +{ + /* There is no way to stop BIST on Huntinton. */ + _NOTE(ARGUNUSED(enp, type)) +} + +#endif /* EFSYS_OPT_BIST */ + +#endif /* EFSYS_OPT_HUNTINGTON */ diff --git a/sys/dev/sfxge/common/hunt_rx.c b/sys/dev/sfxge/common/hunt_rx.c new file mode 100644 index 000000000000..991f29300b06 --- /dev/null +++ b/sys/dev/sfxge/common/hunt_rx.c @@ -0,0 +1,765 @@ +/*- + * Copyright (c) 2012-2015 Solarflare Communications Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "efsys.h" +#include "efx.h" +#include "efx_impl.h" + + +#if EFSYS_OPT_HUNTINGTON + + +static __checkReturn int +efx_mcdi_init_rxq( + __in efx_nic_t *enp, + __in uint32_t size, + __in uint32_t target_evq, + __in uint32_t label, + __in uint32_t instance, + __in efsys_mem_t *esmp) +{ + efx_mcdi_req_t req; + uint8_t payload[ + MAX(MC_CMD_INIT_RXQ_IN_LEN(EFX_RXQ_NBUFS(EFX_RXQ_MAXNDESCS)), + MC_CMD_INIT_RXQ_OUT_LEN)]; + int npages = EFX_RXQ_NBUFS(size); + int i; + efx_qword_t *dma_addr; + uint64_t addr; + int rc; + + EFSYS_ASSERT3U(size, <=, EFX_RXQ_MAXNDESCS); + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_INIT_RXQ; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_INIT_RXQ_IN_LEN(npages); + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_INIT_RXQ_OUT_LEN; + + MCDI_IN_SET_DWORD(req, INIT_RXQ_IN_SIZE, size); + MCDI_IN_SET_DWORD(req, INIT_RXQ_IN_TARGET_EVQ, target_evq); + MCDI_IN_SET_DWORD(req, INIT_RXQ_IN_LABEL, label); + MCDI_IN_SET_DWORD(req, INIT_RXQ_IN_INSTANCE, instance); + MCDI_IN_POPULATE_DWORD_5(req, INIT_RXQ_IN_FLAGS, + INIT_RXQ_IN_FLAG_BUFF_MODE, 0, + INIT_RXQ_IN_FLAG_HDR_SPLIT, 0, + INIT_RXQ_IN_FLAG_TIMESTAMP, 0, + INIT_RXQ_IN_CRC_MODE, 0, + INIT_RXQ_IN_FLAG_PREFIX, 1); + MCDI_IN_SET_DWORD(req, INIT_RXQ_IN_OWNER_ID, 0); + MCDI_IN_SET_DWORD(req, INIT_RXQ_IN_PORT_ID, EVB_PORT_ID_ASSIGNED); + + dma_addr = MCDI_IN2(req, efx_qword_t, INIT_RXQ_IN_DMA_ADDR); + addr = EFSYS_MEM_ADDR(esmp); + + for (i = 0; i < npages; i++) { + EFX_POPULATE_QWORD_2(*dma_addr, + EFX_DWORD_1, (uint32_t)(addr >> 32), + EFX_DWORD_0, (uint32_t)(addr & 0xffffffff)); + + dma_addr++; + addr += EFX_BUF_SIZE; + } + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +static __checkReturn int +efx_mcdi_fini_rxq( + __in efx_nic_t *enp, + __in uint32_t instance) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_FINI_RXQ_IN_LEN, + MC_CMD_FINI_RXQ_OUT_LEN)]; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_FINI_RXQ; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_FINI_RXQ_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_FINI_RXQ_OUT_LEN; + + MCDI_IN_SET_DWORD(req, FINI_RXQ_IN_INSTANCE, instance); + + efx_mcdi_execute(enp, &req); + + if ((req.emr_rc != 0) && (req.emr_rc != MC_CMD_ERR_EALREADY)) { + rc = req.emr_rc; + goto fail1; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +#if EFSYS_OPT_RX_SCALE +static __checkReturn int +efx_mcdi_rss_context_alloc( + __in efx_nic_t *enp, + __out uint32_t *rss_contextp) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_ALLOC_IN_LEN, + MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN)]; + uint32_t rss_context; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_RSS_CONTEXT_ALLOC; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_RSS_CONTEXT_ALLOC_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN; + + MCDI_IN_SET_DWORD(req, RSS_CONTEXT_ALLOC_IN_UPSTREAM_PORT_ID, + EVB_PORT_ID_ASSIGNED); + MCDI_IN_SET_DWORD(req, RSS_CONTEXT_ALLOC_IN_TYPE, + MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_EXCLUSIVE); + /* NUM_QUEUES is only used to validate indirection table offsets */ + MCDI_IN_SET_DWORD(req, RSS_CONTEXT_ALLOC_IN_NUM_QUEUES, 64); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (req.emr_out_length_used < MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN) { + rc = EMSGSIZE; + goto fail2; + } + + rss_context = MCDI_OUT_DWORD(req, RSS_CONTEXT_ALLOC_OUT_RSS_CONTEXT_ID); + if (rss_context == HUNTINGTON_RSS_CONTEXT_INVALID) { + rc = ENOENT; + goto fail3; + } + + *rss_contextp = rss_context; + + return (0); + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} +#endif /* EFSYS_OPT_RX_SCALE */ + +#if EFSYS_OPT_RX_SCALE +static int +efx_mcdi_rss_context_free( + __in efx_nic_t *enp, + __in uint32_t rss_context) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_FREE_IN_LEN, + MC_CMD_RSS_CONTEXT_FREE_OUT_LEN)]; + int rc; + + if (rss_context == HUNTINGTON_RSS_CONTEXT_INVALID) { + rc = EINVAL; + goto fail1; + } + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_RSS_CONTEXT_FREE; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_RSS_CONTEXT_FREE_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_RSS_CONTEXT_FREE_OUT_LEN; + + MCDI_IN_SET_DWORD(req, RSS_CONTEXT_FREE_IN_RSS_CONTEXT_ID, rss_context); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail2; + } + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} +#endif /* EFSYS_OPT_RX_SCALE */ + +#if EFSYS_OPT_RX_SCALE +static int +efx_mcdi_rss_context_set_flags( + __in efx_nic_t *enp, + __in uint32_t rss_context, + __in efx_rx_hash_type_t type) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_LEN, + MC_CMD_RSS_CONTEXT_SET_FLAGS_OUT_LEN)]; + int rc; + + if (rss_context == HUNTINGTON_RSS_CONTEXT_INVALID) { + rc = EINVAL; + goto fail1; + } + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_RSS_CONTEXT_SET_FLAGS; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_RSS_CONTEXT_SET_FLAGS_OUT_LEN; + + MCDI_IN_SET_DWORD(req, RSS_CONTEXT_SET_FLAGS_IN_RSS_CONTEXT_ID, + rss_context); + + MCDI_IN_POPULATE_DWORD_4(req, RSS_CONTEXT_SET_FLAGS_IN_FLAGS, + RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV4_EN, + (type & (1U << EFX_RX_HASH_IPV4)) ? 1 : 0, + RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV4_EN, + (type & (1U << EFX_RX_HASH_TCPIPV4)) ? 1 : 0, + RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV6_EN, + (type & (1U << EFX_RX_HASH_IPV6)) ? 1 : 0, + RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV6_EN, + (type & (1U << EFX_RX_HASH_TCPIPV6)) ? 1 : 0); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail2; + } + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} +#endif /* EFSYS_OPT_RX_SCALE */ + +#if EFSYS_OPT_RX_SCALE +static int +efx_mcdi_rss_context_set_key( + __in efx_nic_t *enp, + __in uint32_t rss_context, + __in_ecount(n) uint8_t *key, + __in size_t n) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_SET_KEY_IN_LEN, + MC_CMD_RSS_CONTEXT_SET_KEY_OUT_LEN)]; + int rc; + + if (rss_context == HUNTINGTON_RSS_CONTEXT_INVALID) { + rc = EINVAL; + goto fail1; + } + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_RSS_CONTEXT_SET_KEY; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_RSS_CONTEXT_SET_KEY_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_RSS_CONTEXT_SET_KEY_OUT_LEN; + + MCDI_IN_SET_DWORD(req, RSS_CONTEXT_SET_KEY_IN_RSS_CONTEXT_ID, + rss_context); + + EFSYS_ASSERT3U(n, ==, MC_CMD_RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY_LEN); + if (n != MC_CMD_RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY_LEN) { + rc = EINVAL; + goto fail2; + } + + memcpy(MCDI_IN2(req, uint8_t, RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY), + key, n); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail3; + } + + return (0); + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} +#endif /* EFSYS_OPT_RX_SCALE */ + +#if EFSYS_OPT_RX_SCALE +static int +efx_mcdi_rss_context_set_table( + __in efx_nic_t *enp, + __in uint32_t rss_context, + __in_ecount(n) unsigned int *table, + __in size_t n) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_SET_TABLE_IN_LEN, + MC_CMD_RSS_CONTEXT_SET_TABLE_OUT_LEN)]; + uint8_t *req_table; + int i, rc; + + if (rss_context == HUNTINGTON_RSS_CONTEXT_INVALID) { + rc = EINVAL; + goto fail1; + } + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_RSS_CONTEXT_SET_TABLE; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_RSS_CONTEXT_SET_TABLE_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_RSS_CONTEXT_SET_TABLE_OUT_LEN; + + MCDI_IN_SET_DWORD(req, RSS_CONTEXT_SET_TABLE_IN_RSS_CONTEXT_ID, + rss_context); + + req_table = + MCDI_IN2(req, uint8_t, RSS_CONTEXT_SET_TABLE_IN_INDIRECTION_TABLE); + + for (i = 0; + i < MC_CMD_RSS_CONTEXT_SET_TABLE_IN_INDIRECTION_TABLE_LEN; + i++) { + req_table[i] = (n > 0) ? (uint8_t)table[i % n] : 0; + } + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail2; + } + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} +#endif /* EFSYS_OPT_RX_SCALE */ + + + __checkReturn int +hunt_rx_init( + __in efx_nic_t *enp) +{ +#if EFSYS_OPT_RX_SCALE + + if (efx_mcdi_rss_context_alloc(enp, &enp->en_rss_context) == 0) { + /* + * Allocated an exclusive RSS context, which allows both the + * indirection table and key to be modified. + */ + enp->en_rss_support = EFX_RX_SCALE_EXCLUSIVE; + enp->en_hash_support = EFX_RX_HASH_AVAILABLE; + } else { + /* + * Failed to allocate an exclusive RSS context. Continue + * operation without support for RSS. The pseudo-header in + * received packets will not contain a Toeplitz hash value. + */ + enp->en_rss_support = EFX_RX_SCALE_UNAVAILABLE; + enp->en_hash_support = EFX_RX_HASH_UNAVAILABLE; + } + +#endif /* EFSYS_OPT_RX_SCALE */ + + return (0); +} + +#if EFSYS_OPT_RX_HDR_SPLIT + __checkReturn int +hunt_rx_hdr_split_enable( + __in efx_nic_t *enp, + __in unsigned int hdr_buf_size, + __in unsigned int pld_buf_size) +{ + int rc; + + /* FIXME */ + _NOTE(ARGUNUSED(enp, hdr_buf_size, pld_buf_size)) + if (B_FALSE) { + rc = ENOTSUP; + goto fail1; + } + /* FIXME */ + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} +#endif /* EFSYS_OPT_RX_HDR_SPLIT */ + +#if EFSYS_OPT_RX_SCATTER + __checkReturn int +hunt_rx_scatter_enable( + __in efx_nic_t *enp, + __in unsigned int buf_size) +{ + _NOTE(ARGUNUSED(enp, buf_size)) + return (0); +} +#endif /* EFSYS_OPT_RX_SCATTER */ + +#if EFSYS_OPT_RX_SCALE + __checkReturn int +hunt_rx_scale_mode_set( + __in efx_nic_t *enp, + __in efx_rx_hash_alg_t alg, + __in efx_rx_hash_type_t type, + __in boolean_t insert) +{ + int rc; + + EFSYS_ASSERT3U(alg, ==, EFX_RX_HASHALG_TOEPLITZ); + EFSYS_ASSERT3U(insert, ==, B_TRUE); + + if ((alg != EFX_RX_HASHALG_TOEPLITZ) || (insert == B_FALSE)) { + rc = EINVAL; + goto fail1; + } + + if (enp->en_rss_support == EFX_RX_SCALE_UNAVAILABLE) { + rc = ENOTSUP; + goto fail2; + } + + if ((rc = efx_mcdi_rss_context_set_flags(enp, + enp->en_rss_context, type)) != 0) + goto fail3; + + return (0); + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} +#endif /* EFSYS_OPT_RX_SCALE */ + +#if EFSYS_OPT_RX_SCALE + __checkReturn int +hunt_rx_scale_key_set( + __in efx_nic_t *enp, + __in_ecount(n) uint8_t *key, + __in size_t n) +{ + int rc; + + if (enp->en_rss_support == EFX_RX_SCALE_UNAVAILABLE) { + rc = ENOTSUP; + goto fail1; + } + + if ((rc = efx_mcdi_rss_context_set_key(enp, + enp->en_rss_context, key, n)) != 0) + goto fail2; + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} +#endif /* EFSYS_OPT_RX_SCALE */ + +#if EFSYS_OPT_RX_SCALE + __checkReturn int +hunt_rx_scale_tbl_set( + __in efx_nic_t *enp, + __in_ecount(n) unsigned int *table, + __in size_t n) +{ + int rc; + + if (enp->en_rss_support == EFX_RX_SCALE_UNAVAILABLE) { + rc = ENOTSUP; + goto fail1; + } + + if ((rc = efx_mcdi_rss_context_set_table(enp, + enp->en_rss_context, table, n)) != 0) + goto fail2; + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} +#endif /* EFSYS_OPT_RX_SCALE */ + + void +hunt_rx_qpost( + __in efx_rxq_t *erp, + __in_ecount(n) efsys_dma_addr_t *addrp, + __in size_t size, + __in unsigned int n, + __in unsigned int completed, + __in unsigned int added) +{ + efx_qword_t qword; + unsigned int i; + unsigned int offset; + unsigned int id; + + /* The client driver must not overfill the queue */ + EFSYS_ASSERT3U(added - completed + n, <=, + EFX_RXQ_LIMIT(erp->er_mask + 1)); + + id = added & (erp->er_mask); + for (i = 0; i < n; i++) { + EFSYS_PROBE4(rx_post, unsigned int, erp->er_index, + unsigned int, id, efsys_dma_addr_t, addrp[i], + size_t, size); + + EFX_POPULATE_QWORD_3(qword, + ESF_DZ_RX_KER_BYTE_CNT, (uint32_t)(size), + ESF_DZ_RX_KER_BUF_ADDR_DW0, + (uint32_t)(addrp[i] & 0xffffffff), + ESF_DZ_RX_KER_BUF_ADDR_DW1, + (uint32_t)(addrp[i] >> 32)); + + offset = id * sizeof (efx_qword_t); + EFSYS_MEM_WRITEQ(erp->er_esmp, offset, &qword); + + id = (id + 1) & (erp->er_mask); + } +} + + void +hunt_rx_qpush( + __in efx_rxq_t *erp, + __in unsigned int added, + __inout unsigned int *pushedp) +{ + efx_nic_t *enp = erp->er_enp; + unsigned int pushed = *pushedp; + uint32_t wptr; + efx_dword_t dword; + + /* Hardware has alignment restriction for WPTR */ + wptr = P2ALIGN(added, HUNTINGTON_RX_WPTR_ALIGN); + if (pushed == wptr) + return; + + *pushedp = wptr; + + /* Push the populated descriptors out */ + wptr &= erp->er_mask; + + EFX_POPULATE_DWORD_1(dword, ERF_DZ_RX_DESC_WPTR, wptr); + + /* Guarantee ordering of memory (descriptors) and PIO (doorbell) */ + EFX_DMA_SYNC_QUEUE_FOR_DEVICE(erp->er_esmp, erp->er_mask + 1, + wptr, pushed & erp->er_mask); + EFSYS_PIO_WRITE_BARRIER(); + EFX_BAR_TBL_WRITED(enp, ER_DZ_RX_DESC_UPD_REG, + erp->er_index, &dword, B_FALSE); +} + + __checkReturn int +hunt_rx_qflush( + __in efx_rxq_t *erp) +{ + efx_nic_t *enp = erp->er_enp; + int rc; + + if ((rc = efx_mcdi_fini_rxq(enp, erp->er_index)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + void +hunt_rx_qenable( + __in efx_rxq_t *erp) +{ + /* FIXME */ + _NOTE(ARGUNUSED(erp)) + /* FIXME */ +} + + __checkReturn int +hunt_rx_qcreate( + __in efx_nic_t *enp, + __in unsigned int index, + __in unsigned int label, + __in efx_rxq_type_t type, + __in efsys_mem_t *esmp, + __in size_t n, + __in uint32_t id, + __in efx_evq_t *eep, + __in efx_rxq_t *erp) +{ + efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + int rc; + + _NOTE(ARGUNUSED(erp)) + + EFX_STATIC_ASSERT(EFX_EV_RX_NLABELS == (1 << ESF_DZ_RX_QLABEL_WIDTH)); + EFSYS_ASSERT3U(label, <, EFX_EV_RX_NLABELS); + EFSYS_ASSERT3U(enp->en_rx_qcount + 1, <, encp->enc_rxq_limit); + + EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MAXNDESCS)); + EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MINNDESCS)); + + if (!ISP2(n) || (n < EFX_RXQ_MINNDESCS) || (n > EFX_RXQ_MAXNDESCS)) { + rc = EINVAL; + goto fail1; + } + if (index >= encp->enc_rxq_limit) { + rc = EINVAL; + goto fail2; + } + + /* + * FIXME: Siena code handles different queue types (default, header + * split, scatter); we'll need to do something more here later, but + * all that stuff is TBD for now. + */ + + if ((rc = efx_mcdi_init_rxq(enp, n, eep->ee_index, label, index, + esmp)) != 0) + goto fail3; + + erp->er_eep = eep; + erp->er_label = label; + + hunt_ev_rxlabel_init(eep, erp, label); + + return (0); + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + void +hunt_rx_qdestroy( + __in efx_rxq_t *erp) +{ + efx_nic_t *enp = erp->er_enp; + efx_evq_t *eep = erp->er_eep; + unsigned int label = erp->er_label; + + hunt_ev_rxlabel_fini(eep, label); + + EFSYS_ASSERT(enp->en_rx_qcount != 0); + --enp->en_rx_qcount; + + EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_rxq_t), erp); +} + + void +hunt_rx_fini( + __in efx_nic_t *enp) +{ +#if EFSYS_OPT_RX_SCALE + if (enp->en_rss_support != EFX_RX_SCALE_UNAVAILABLE) { + (void) efx_mcdi_rss_context_free(enp, enp->en_rss_context); + } + enp->en_rss_context = 0; + enp->en_rss_support = EFX_RX_SCALE_UNAVAILABLE; +#else + _NOTE(ARGUNUSED(enp)) +#endif /* EFSYS_OPT_RX_SCALE */ +} + +#endif /* EFSYS_OPT_HUNTINGTON */ diff --git a/sys/dev/sfxge/common/hunt_sram.c b/sys/dev/sfxge/common/hunt_sram.c new file mode 100644 index 000000000000..947e033ef7e6 --- /dev/null +++ b/sys/dev/sfxge/common/hunt_sram.c @@ -0,0 +1,69 @@ +/*- + * Copyright (c) 2012-2015 Solarflare Communications Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "efsys.h" +#include "efx.h" +#include "efx_impl.h" + +#if EFSYS_OPT_HUNTINGTON + + +#if EFSYS_OPT_DIAG + + __checkReturn int +hunt_sram_test( + __in efx_nic_t *enp, + __in efx_sram_pattern_fn_t func) +{ + int rc; + + /* FIXME */ + _NOTE(ARGUNUSED(enp)) + _NOTE(ARGUNUSED(func)) + if (B_FALSE) { + rc = ENOTSUP; + goto fail1; + } + /* FIXME */ + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +#endif /* EFSYS_OPT_DIAG */ + +#endif /* EFSYS_OPT_HUNTINGTON */ diff --git a/sys/dev/sfxge/common/hunt_tx.c b/sys/dev/sfxge/common/hunt_tx.c new file mode 100755 index 000000000000..ee5691ac49db --- /dev/null +++ b/sys/dev/sfxge/common/hunt_tx.c @@ -0,0 +1,679 @@ +/*- + * Copyright (c) 2012-2015 Solarflare Communications Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "efsys.h" +#include "efx.h" +#include "efx_impl.h" + + +#if EFSYS_OPT_HUNTINGTON + +#if EFSYS_OPT_QSTATS +#define EFX_TX_QSTAT_INCR(_etp, _stat) \ + do { \ + (_etp)->et_stat[_stat]++; \ + _NOTE(CONSTANTCONDITION) \ + } while (B_FALSE) +#else +#define EFX_TX_QSTAT_INCR(_etp, _stat) +#endif + +static __checkReturn int +efx_mcdi_init_txq( + __in efx_nic_t *enp, + __in uint32_t size, + __in uint32_t target_evq, + __in uint32_t label, + __in uint32_t instance, + __in uint16_t flags, + __in efsys_mem_t *esmp) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_INIT_TXQ_IN_LEN(EFX_TXQ_MAX_BUFS), + MC_CMD_INIT_TXQ_OUT_LEN)]; + efx_qword_t *dma_addr; + uint64_t addr; + int npages; + int i; + int rc; + + EFSYS_ASSERT(EFX_TXQ_MAX_BUFS >= + EFX_TXQ_NBUFS(EFX_TXQ_MAXNDESCS(&enp->en_nic_cfg))); + + npages = EFX_TXQ_NBUFS(size); + if (npages > MC_CMD_INIT_TXQ_IN_DMA_ADDR_MAXNUM) { + rc = EINVAL; + goto fail1; + } + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_INIT_TXQ; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_INIT_TXQ_IN_LEN(npages); + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_INIT_TXQ_OUT_LEN; + + MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_SIZE, size); + MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_TARGET_EVQ, target_evq); + MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_LABEL, label); + MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_INSTANCE, instance); + + MCDI_IN_POPULATE_DWORD_6(req, INIT_TXQ_IN_FLAGS, + INIT_TXQ_IN_FLAG_BUFF_MODE, 0, + INIT_TXQ_IN_FLAG_IP_CSUM_DIS, (flags & EFX_CKSUM_IPV4) ? 0 : 1, + INIT_TXQ_IN_FLAG_TCP_CSUM_DIS, (flags & EFX_CKSUM_TCPUDP) ? 0 : 1, + INIT_TXQ_IN_FLAG_TCP_UDP_ONLY, 0, + INIT_TXQ_IN_CRC_MODE, 0, + INIT_TXQ_IN_FLAG_TIMESTAMP, 0); + + MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_OWNER_ID, 0); + MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_PORT_ID, EVB_PORT_ID_ASSIGNED); + + dma_addr = MCDI_IN2(req, efx_qword_t, INIT_TXQ_IN_DMA_ADDR); + addr = EFSYS_MEM_ADDR(esmp); + + for (i = 0; i < npages; i++) { + EFX_POPULATE_QWORD_2(*dma_addr, + EFX_DWORD_1, (uint32_t)(addr >> 32), + EFX_DWORD_0, (uint32_t)(addr & 0xffffffff)); + + dma_addr++; + addr += EFX_BUF_SIZE; + } + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail2; + } + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +static __checkReturn int +efx_mcdi_fini_txq( + __in efx_nic_t *enp, + __in uint32_t instance) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_FINI_TXQ_IN_LEN, + MC_CMD_FINI_TXQ_OUT_LEN)]; + int rc; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_FINI_TXQ; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_FINI_TXQ_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_FINI_TXQ_OUT_LEN; + + MCDI_IN_SET_DWORD(req, FINI_TXQ_IN_INSTANCE, instance); + + efx_mcdi_execute(enp, &req); + + if ((req.emr_rc != 0) && (req.emr_rc != MC_CMD_ERR_EALREADY)) { + rc = req.emr_rc; + goto fail1; + } + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_tx_init( + __in efx_nic_t *enp) +{ + _NOTE(ARGUNUSED(enp)) + return (0); +} + + void +hunt_tx_fini( + __in efx_nic_t *enp) +{ + _NOTE(ARGUNUSED(enp)) +} + + __checkReturn int +hunt_tx_qcreate( + __in efx_nic_t *enp, + __in unsigned int index, + __in unsigned int label, + __in efsys_mem_t *esmp, + __in size_t n, + __in uint32_t id, + __in uint16_t flags, + __in efx_evq_t *eep, + __in efx_txq_t *etp, + __out unsigned int *addedp) +{ + efx_qword_t desc; + int rc; + + + if ((rc = efx_mcdi_init_txq(enp, n, eep->ee_index, label, index, flags, + esmp)) != 0) + goto fail1; + + /* + * A previous user of this TX queue may have written a descriptor to the + * TX push collector, but not pushed the doorbell (e.g. after a crash). + * The next doorbell write would then push the stale descriptor. + * + * Ensure the (per network port) TX push collector is cleared by writing + * a no-op TX option descriptor. See bug29981 for details. + */ + *addedp = 1; + EFX_POPULATE_QWORD_4(desc, + ESF_DZ_TX_DESC_IS_OPT, 1, + ESF_DZ_TX_OPTION_TYPE, ESE_DZ_TX_OPTION_DESC_CRC_CSUM, + ESF_DZ_TX_OPTION_UDP_TCP_CSUM, (flags & EFX_CKSUM_TCPUDP) ? 1 : 0, + ESF_DZ_TX_OPTION_IP_CSUM, (flags & EFX_CKSUM_IPV4) ? 1 : 0); + + EFSYS_MEM_WRITEQ(etp->et_esmp, 0, &desc); + hunt_tx_qpush(etp, *addedp, 0); + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + void +hunt_tx_qdestroy( + __in efx_txq_t *etp) +{ + /* FIXME */ + _NOTE(ARGUNUSED(etp)) + /* FIXME */ +} + + __checkReturn int +hunt_tx_qpio_enable( + __in efx_txq_t *etp) +{ + efx_nic_t *enp = etp->et_enp; + efx_piobuf_handle_t handle; + int rc; + + if (etp->et_pio_size != 0) { + rc = EALREADY; + goto fail1; + } + + /* Sub-allocate a PIO block from a piobuf */ + if ((rc = hunt_nic_pio_alloc(enp, + &etp->et_pio_bufnum, + &handle, + &etp->et_pio_blknum, + &etp->et_pio_offset, + &etp->et_pio_size)) != 0) { + goto fail2; + } + EFSYS_ASSERT3U(etp->et_pio_size, !=, 0); + + /* Link the piobuf to this TXQ */ + if ((rc = hunt_nic_pio_link(enp, etp->et_index, handle)) != 0) { + goto fail3; + } + + /* + * et_pio_offset is the offset of the sub-allocated block within the + * hardware PIO buffer. It is used as the buffer address in the PIO + * option descriptor. + * + * et_pio_write_offset is the offset of the sub-allocated block from the + * start of the write-combined memory mapping, and is used for writing + * data into the PIO buffer. + */ + etp->et_pio_write_offset = + (etp->et_pio_bufnum * ER_DZ_TX_PIOBUF_STEP) + + ER_DZ_TX_PIOBUF_OFST + etp->et_pio_offset; + + return (0); + +fail3: + EFSYS_PROBE(fail3); + hunt_nic_pio_free(enp, etp->et_pio_bufnum, etp->et_pio_blknum); + etp->et_pio_size = 0; +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + void +hunt_tx_qpio_disable( + __in efx_txq_t *etp) +{ + efx_nic_t *enp = etp->et_enp; + + if (etp->et_pio_size != 0) { + /* Unlink the piobuf from this TXQ */ + hunt_nic_pio_unlink(enp, etp->et_index); + + /* Free the sub-allocated PIO block */ + hunt_nic_pio_free(enp, etp->et_pio_bufnum, etp->et_pio_blknum); + etp->et_pio_size = 0; + etp->et_pio_write_offset = 0; + } +} + + __checkReturn int +hunt_tx_qpio_write( + __in efx_txq_t *etp, + __in_ecount(length) uint8_t *buffer, + __in size_t length, + __in size_t offset) +{ + efx_nic_t *enp = etp->et_enp; + efsys_bar_t *esbp = enp->en_esbp; + uint32_t write_offset; + uint32_t write_offset_limit; + efx_qword_t *eqp; + int rc; + + EFSYS_ASSERT(length % sizeof (efx_qword_t) == 0); + + if (etp->et_pio_size == 0) { + rc = ENOENT; + goto fail1; + } + if (offset + length > etp->et_pio_size) { + rc = ENOSPC; + goto fail2; + } + + /* + * Writes to PIO buffers must be 64 bit aligned, and multiples of + * 64 bits. + */ + write_offset = etp->et_pio_write_offset + offset; + write_offset_limit = write_offset + length; + eqp = (efx_qword_t *)buffer; + while (write_offset < write_offset_limit) { + EFSYS_BAR_WC_WRITEQ(esbp, write_offset, eqp); + eqp++; + write_offset += sizeof (efx_qword_t); + } + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_tx_qpio_post( + __in efx_txq_t *etp, + __in size_t pkt_length, + __in unsigned int completed, + __inout unsigned int *addedp) +{ + efx_qword_t pio_desc; + unsigned int id; + size_t offset; + unsigned int added = *addedp; + int rc; + + + if (added - completed + 1 > EFX_TXQ_LIMIT(etp->et_mask + 1)) { + rc = ENOSPC; + goto fail1; + } + + if (etp->et_pio_size == 0) { + rc = ENOENT; + goto fail2; + } + + id = added++ & etp->et_mask; + offset = id * sizeof (efx_qword_t); + + EFSYS_PROBE4(tx_pio_post, unsigned int, etp->et_index, + unsigned int, id, uint32_t, etp->et_pio_offset, + size_t, pkt_length); + + EFX_POPULATE_QWORD_5(pio_desc, + ESF_DZ_TX_DESC_IS_OPT, 1, + ESF_DZ_TX_OPTION_TYPE, 1, + ESF_DZ_TX_PIO_CONT, 0, + ESF_DZ_TX_PIO_BYTE_CNT, pkt_length, + ESF_DZ_TX_PIO_BUF_ADDR, etp->et_pio_offset); + + EFSYS_MEM_WRITEQ(etp->et_esmp, offset, &pio_desc); + + EFX_TX_QSTAT_INCR(etp, TX_POST_PIO); + + *addedp = added; + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_tx_qpost( + __in efx_txq_t *etp, + __in_ecount(n) efx_buffer_t *eb, + __in unsigned int n, + __in unsigned int completed, + __inout unsigned int *addedp) +{ + unsigned int added = *addedp; + unsigned int i; + int rc; + + if (added - completed + n > EFX_TXQ_LIMIT(etp->et_mask + 1)) { + rc = ENOSPC; + goto fail1; + } + + for (i = 0; i < n; i++) { + efx_buffer_t *ebp = &eb[i]; + efsys_dma_addr_t addr = ebp->eb_addr; + size_t size = ebp->eb_size; + boolean_t eop = ebp->eb_eop; + unsigned int id; + size_t offset; + efx_qword_t qword; + + /* Fragments must not span 4k boundaries. */ + EFSYS_ASSERT(P2ROUNDUP(addr + 1, 4096) >= (addr + size)); + + id = added++ & etp->et_mask; + offset = id * sizeof (efx_qword_t); + + EFSYS_PROBE5(tx_post, unsigned int, etp->et_index, + unsigned int, id, efsys_dma_addr_t, addr, + size_t, size, boolean_t, eop); + + EFX_POPULATE_QWORD_5(qword, + ESF_DZ_TX_KER_TYPE, 0, + ESF_DZ_TX_KER_CONT, (eop) ? 0 : 1, + ESF_DZ_TX_KER_BYTE_CNT, (uint32_t)(size), + ESF_DZ_TX_KER_BUF_ADDR_DW0, (uint32_t)(addr & 0xffffffff), + ESF_DZ_TX_KER_BUF_ADDR_DW1, (uint32_t)(addr >> 32)); + + EFSYS_MEM_WRITEQ(etp->et_esmp, offset, &qword); + } + + EFX_TX_QSTAT_INCR(etp, TX_POST); + + *addedp = added; + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +/* + * This improves performance by pushing a TX descriptor at the same time as the + * doorbell. The descriptor must be added to the TXQ, so that can be used if the + * hardware decides not to use the pushed descriptor. + */ + void +hunt_tx_qpush( + __in efx_txq_t *etp, + __in unsigned int added, + __in unsigned int pushed) +{ + efx_nic_t *enp = etp->et_enp; + unsigned int wptr; + unsigned int id; + size_t offset; + efx_qword_t desc; + efx_oword_t oword; + + wptr = added & etp->et_mask; + id = pushed & etp->et_mask; + offset = id * sizeof (efx_qword_t); + + EFSYS_MEM_READQ(etp->et_esmp, offset, &desc); + EFX_POPULATE_OWORD_3(oword, + ERF_DZ_TX_DESC_WPTR, wptr, + ERF_DZ_TX_DESC_HWORD, EFX_QWORD_FIELD(desc, EFX_DWORD_1), + ERF_DZ_TX_DESC_LWORD, EFX_QWORD_FIELD(desc, EFX_DWORD_0)); + + /* Guarantee ordering of memory (descriptors) and PIO (doorbell) */ + EFX_DMA_SYNC_QUEUE_FOR_DEVICE(etp->et_esmp, etp->et_mask + 1, wptr, id); + EFSYS_PIO_WRITE_BARRIER(); + EFX_BAR_TBL_DOORBELL_WRITEO(enp, ER_DZ_TX_DESC_UPD_REG, etp->et_index, + &oword); +} + + __checkReturn int +hunt_tx_qdesc_post( + __in efx_txq_t *etp, + __in_ecount(n) efx_desc_t *ed, + __in unsigned int n, + __in unsigned int completed, + __inout unsigned int *addedp) +{ + unsigned int added = *addedp; + unsigned int i; + int rc; + + if (added - completed + n > EFX_TXQ_LIMIT(etp->et_mask + 1)) { + rc = ENOSPC; + goto fail1; + } + + for (i = 0; i < n; i++) { + efx_desc_t *edp = &ed[i]; + unsigned int id; + size_t offset; + + id = added++ & etp->et_mask; + offset = id * sizeof (efx_desc_t); + + EFSYS_MEM_WRITEQ(etp->et_esmp, offset, &edp->ed_eq); + } + + EFSYS_PROBE3(tx_desc_post, unsigned int, etp->et_index, + unsigned int, added, unsigned int, n); + + EFX_TX_QSTAT_INCR(etp, TX_POST); + + *addedp = added; + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + void +hunt_tx_qdesc_dma_create( + __in efx_txq_t *etp, + __in efsys_dma_addr_t addr, + __in size_t size, + __in boolean_t eop, + __out efx_desc_t *edp) +{ + /* Fragments must not span 4k boundaries. */ + EFSYS_ASSERT(P2ROUNDUP(addr + 1, 4096) >= addr + size); + + EFSYS_PROBE4(tx_desc_dma_create, unsigned int, etp->et_index, + efsys_dma_addr_t, addr, + size_t, size, boolean_t, eop); + + EFX_POPULATE_QWORD_5(edp->ed_eq, + ESF_DZ_TX_KER_TYPE, 0, + ESF_DZ_TX_KER_CONT, (eop) ? 0 : 1, + ESF_DZ_TX_KER_BYTE_CNT, (uint32_t)(size), + ESF_DZ_TX_KER_BUF_ADDR_DW0, (uint32_t)(addr & 0xffffffff), + ESF_DZ_TX_KER_BUF_ADDR_DW1, (uint32_t)(addr >> 32)); +} + + void +hunt_tx_qdesc_tso_create( + __in efx_txq_t *etp, + __in uint16_t ipv4_id, + __in uint32_t tcp_seq, + __in uint8_t tcp_flags, + __out efx_desc_t *edp) +{ + EFSYS_PROBE4(tx_desc_tso_create, unsigned int, etp->et_index, + uint16_t, ipv4_id, uint32_t, tcp_seq, + uint8_t, tcp_flags); + + EFX_POPULATE_QWORD_5(edp->ed_eq, + ESF_DZ_TX_DESC_IS_OPT, 1, + ESF_DZ_TX_OPTION_TYPE, + ESE_DZ_TX_OPTION_DESC_TSO, + ESF_DZ_TX_TSO_TCP_FLAGS, tcp_flags, + ESF_DZ_TX_TSO_IP_ID, ipv4_id, + ESF_DZ_TX_TSO_TCP_SEQNO, tcp_seq); +} + + void +hunt_tx_qdesc_vlantci_create( + __in efx_txq_t *etp, + __in uint16_t tci, + __out efx_desc_t *edp) +{ + EFSYS_PROBE2(tx_desc_vlantci_create, unsigned int, etp->et_index, + uint16_t, tci); + + EFX_POPULATE_QWORD_4(edp->ed_eq, + ESF_DZ_TX_DESC_IS_OPT, 1, + ESF_DZ_TX_OPTION_TYPE, + ESE_DZ_TX_OPTION_DESC_VLAN, + ESF_DZ_TX_VLAN_OP, tci ? 1 : 0, + ESF_DZ_TX_VLAN_TAG1, tci); +} + + + __checkReturn int +hunt_tx_qpace( + __in efx_txq_t *etp, + __in unsigned int ns) +{ + int rc; + + /* FIXME */ + _NOTE(ARGUNUSED(etp, ns)) + if (B_FALSE) { + rc = ENOTSUP; + goto fail1; + } + /* FIXME */ + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_tx_qflush( + __in efx_txq_t *etp) +{ + efx_nic_t *enp = etp->et_enp; + int rc; + + if ((rc = efx_mcdi_fini_txq(enp, etp->et_index)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + void +hunt_tx_qenable( + __in efx_txq_t *etp) +{ + /* FIXME */ + _NOTE(ARGUNUSED(etp)) + /* FIXME */ +} + +#if EFSYS_OPT_QSTATS + void +hunt_tx_qstats_update( + __in efx_txq_t *etp, + __inout_ecount(TX_NQSTATS) efsys_stat_t *stat) +{ + /* + * TBD: Consider a common Siena/Huntington function. The code is + * essentially identical. + */ + + unsigned int id; + + for (id = 0; id < TX_NQSTATS; id++) { + efsys_stat_t *essp = &stat[id]; + + EFSYS_STAT_INCR(essp, etp->et_stat[id]); + etp->et_stat[id] = 0; + } +} + +#endif /* EFSYS_OPT_QSTATS */ + +#endif /* EFSYS_OPT_HUNTINGTON */ diff --git a/sys/dev/sfxge/common/hunt_vpd.c b/sys/dev/sfxge/common/hunt_vpd.c new file mode 100644 index 000000000000..536ebbcf06f3 --- /dev/null +++ b/sys/dev/sfxge/common/hunt_vpd.c @@ -0,0 +1,435 @@ +/*- + * Copyright (c) 2009-2015 Solarflare Communications Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "efsys.h" +#include "efx.h" +#include "efx_types.h" +#include "efx_regs.h" +#include "efx_impl.h" + + +#if EFSYS_OPT_VPD + +#if EFSYS_OPT_HUNTINGTON + +#include "ef10_tlv_layout.h" + + __checkReturn int +hunt_vpd_init( + __in efx_nic_t *enp) +{ + caddr_t svpd; + size_t svpd_size; + uint32_t pci_pf; + int rc; + + EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE); + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON); + + pci_pf = enp->en_nic_cfg.enc_pf; + /* + * The VPD interface exposes VPD resources from the combined static and + * dynamic VPD storage. As the static VPD configuration should *never* + * change, we can cache it. + */ + svpd = NULL; + svpd_size = 0; + rc = hunt_nvram_partn_read_tlv(enp, + NVRAM_PARTITION_TYPE_STATIC_CONFIG, + TLV_TAG_PF_STATIC_VPD(pci_pf), + &svpd, &svpd_size); + if (rc != 0) { + if (rc == EACCES) { + /* Unpriviledged functions cannot access VPD */ + goto out; + } + goto fail1; + } + + if (svpd != NULL && svpd_size > 0) { + if ((rc = efx_vpd_hunk_verify(svpd, svpd_size, NULL)) != 0) + goto fail2; + } + + enp->en_u.hunt.enu_svpd = svpd; + enp->en_u.hunt.enu_svpd_length = svpd_size; + +out: + return (0); + +fail2: + EFSYS_PROBE(fail2); + + EFSYS_KMEM_FREE(enp->en_esip, svpd_size, svpd); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_vpd_size( + __in efx_nic_t *enp, + __out size_t *sizep) +{ + int rc; + + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON); + + /* + * This function returns the total size the user should allocate + * for all VPD operations. We've already cached the static vpd, + * so we just need to return an upper bound on the dynamic vpd, + * which is the size of the DYNAMIC_CONFIG partition. + */ + if ((rc = efx_mcdi_nvram_info(enp, NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG, + sizep, NULL, NULL)) != 0) + goto fail1; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_vpd_read( + __in efx_nic_t *enp, + __out_bcount(size) caddr_t data, + __in size_t size) +{ + caddr_t dvpd; + size_t dvpd_size; + uint32_t pci_pf; + int rc; + + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON); + + pci_pf = enp->en_nic_cfg.enc_pf; + + if ((rc = hunt_nvram_partn_read_tlv(enp, + NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG, + TLV_TAG_PF_DYNAMIC_VPD(pci_pf), + &dvpd, &dvpd_size)) != 0) + goto fail1; + + if (dvpd_size > size) { + rc = ENOSPC; + goto fail2; + } + memcpy(data, dvpd, dvpd_size); + + /* Pad data with all-1s, consistent with update operations */ + memset(data + dvpd_size, 0xff, size - dvpd_size); + + EFSYS_KMEM_FREE(enp->en_esip, dvpd_size, dvpd); + + return (0); + +fail2: + EFSYS_PROBE(fail2); + + EFSYS_KMEM_FREE(enp->en_esip, dvpd_size, dvpd); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_vpd_verify( + __in efx_nic_t *enp, + __in_bcount(size) caddr_t data, + __in size_t size) +{ + efx_vpd_tag_t stag; + efx_vpd_tag_t dtag; + efx_vpd_keyword_t skey; + efx_vpd_keyword_t dkey; + unsigned int scont; + unsigned int dcont; + int rc; + + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON); + + /* + * Strictly you could take the view that dynamic vpd is optional. + * Instead, to conform more closely to the read/verify/reinit() + * paradigm, we require dynamic vpd. hunt_vpd_reinit() will + * reinitialize it as required. + */ + if ((rc = efx_vpd_hunk_verify(data, size, NULL)) != 0) + goto fail1; + + /* + * Verify that there is no duplication between the static and + * dynamic cfg sectors. + */ + if (enp->en_u.hunt.enu_svpd_length == 0) + goto done; + + dcont = 0; + _NOTE(CONSTANTCONDITION) + while (1) { + if ((rc = efx_vpd_hunk_next(data, size, &dtag, + &dkey, NULL, NULL, &dcont)) != 0) + goto fail2; + if (dcont == 0) + break; + + scont = 0; + _NOTE(CONSTANTCONDITION) + while (1) { + if ((rc = efx_vpd_hunk_next( + enp->en_u.hunt.enu_svpd, + enp->en_u.hunt.enu_svpd_length, &stag, &skey, + NULL, NULL, &scont)) != 0) + goto fail3; + if (scont == 0) + break; + + if (stag == dtag && skey == dkey) { + rc = EEXIST; + goto fail4; + } + } + } + +done: + return (0); + +fail4: + EFSYS_PROBE(fail4); +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_vpd_reinit( + __in efx_nic_t *enp, + __in_bcount(size) caddr_t data, + __in size_t size) +{ + boolean_t wantpid; + int rc; + + /* + * Only create an ID string if the dynamic cfg doesn't have one + */ + if (enp->en_u.hunt.enu_svpd_length == 0) + wantpid = B_TRUE; + else { + unsigned int offset; + uint8_t length; + + rc = efx_vpd_hunk_get(enp->en_u.hunt.enu_svpd, + enp->en_u.hunt.enu_svpd_length, + EFX_VPD_ID, 0, &offset, &length); + if (rc == 0) + wantpid = B_FALSE; + else if (rc == ENOENT) + wantpid = B_TRUE; + else + goto fail1; + } + + if ((rc = efx_vpd_hunk_reinit(data, size, wantpid)) != 0) + goto fail2; + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_vpd_get( + __in efx_nic_t *enp, + __in_bcount(size) caddr_t data, + __in size_t size, + __inout efx_vpd_value_t *evvp) +{ + unsigned int offset; + uint8_t length; + int rc; + + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON); + + /* Attempt to satisfy the request from svpd first */ + if (enp->en_u.hunt.enu_svpd_length > 0) { + if ((rc = efx_vpd_hunk_get(enp->en_u.hunt.enu_svpd, + enp->en_u.hunt.enu_svpd_length, evvp->evv_tag, + evvp->evv_keyword, &offset, &length)) == 0) { + evvp->evv_length = length; + memcpy(evvp->evv_value, + enp->en_u.hunt.enu_svpd + offset, length); + return (0); + } else if (rc != ENOENT) + goto fail1; + } + + /* And then from the provided data buffer */ + if ((rc = efx_vpd_hunk_get(data, size, evvp->evv_tag, + evvp->evv_keyword, &offset, &length)) != 0) + goto fail2; + + evvp->evv_length = length; + memcpy(evvp->evv_value, data + offset, length); + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_vpd_set( + __in efx_nic_t *enp, + __in_bcount(size) caddr_t data, + __in size_t size, + __in efx_vpd_value_t *evvp) +{ + int rc; + + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON); + + /* If the provided (tag,keyword) exists in svpd, then it is readonly */ + if (enp->en_u.hunt.enu_svpd_length > 0) { + unsigned int offset; + uint8_t length; + + if ((rc = efx_vpd_hunk_get(enp->en_u.hunt.enu_svpd, + enp->en_u.hunt.enu_svpd_length, evvp->evv_tag, + evvp->evv_keyword, &offset, &length)) == 0) { + rc = EACCES; + goto fail1; + } + } + + if ((rc = efx_vpd_hunk_set(data, size, evvp)) != 0) + goto fail2; + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +hunt_vpd_next( + __in efx_nic_t *enp, + __in_bcount(size) caddr_t data, + __in size_t size, + __out efx_vpd_value_t *evvp, + __inout unsigned int *contp) +{ + _NOTE(ARGUNUSED(enp, data, size, evvp, contp)) + + return (ENOTSUP); +} + + __checkReturn int +hunt_vpd_write( + __in efx_nic_t *enp, + __in_bcount(size) caddr_t data, + __in size_t size) +{ + size_t vpd_length; + uint32_t pci_pf; + int rc; + + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON); + + pci_pf = enp->en_nic_cfg.enc_pf; + + /* Determine total length of new dynamic VPD */ + if ((rc = efx_vpd_hunk_length(data, size, &vpd_length)) != 0) + goto fail1; + + /* Store new dynamic VPD in DYNAMIC_CONFIG partition */ + if ((rc = hunt_nvram_partn_write_tlv(enp, + NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG, + TLV_TAG_PF_DYNAMIC_VPD(pci_pf), + data, vpd_length)) != 0) { + goto fail2; + } + + return (0); + +fail2: + EFSYS_PROBE(fail2); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + void +hunt_vpd_fini( + __in efx_nic_t *enp) +{ + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON); + + if (enp->en_u.hunt.enu_svpd_length > 0) { + EFSYS_KMEM_FREE(enp->en_esip, enp->en_u.hunt.enu_svpd_length, + enp->en_u.hunt.enu_svpd); + + enp->en_u.hunt.enu_svpd = NULL; + enp->en_u.hunt.enu_svpd_length = 0; + } +} + +#endif /* EFSYS_OPT_HUNTINGTON */ + +#endif /* EFSYS_OPT_VPD */ diff --git a/sys/dev/sfxge/common/mcdi_mon.c b/sys/dev/sfxge/common/mcdi_mon.c new file mode 100644 index 000000000000..ec692be1e6c1 --- /dev/null +++ b/sys/dev/sfxge/common/mcdi_mon.c @@ -0,0 +1,552 @@ +/*- + * Copyright (c) 2009-2015 Solarflare Communications Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "efsys.h" +#include "efx.h" +#include "efx_impl.h" + +#if EFSYS_OPT_MON_MCDI + +#if EFSYS_OPT_MON_STATS + +#define MCDI_MON_NEXT_PAGE (uint16_t)0xfffe +#define MCDI_MON_INVALID_SENSOR (uint16_t)0xfffd +#define MCDI_MON_PAGE_SIZE 0x20 + +/* Bitmasks of valid port(s) for each sensor */ +#define MCDI_MON_PORT_NONE (0x00) +#define MCDI_MON_PORT_P1 (0x01) +#define MCDI_MON_PORT_P2 (0x02) +#define MCDI_MON_PORT_P3 (0x04) +#define MCDI_MON_PORT_P4 (0x08) +#define MCDI_MON_PORT_Px (0xFFFF) + +/* Entry for MCDI sensor in sensor map */ +#define STAT(portmask, stat) \ + { (MCDI_MON_PORT_##portmask), (EFX_MON_STAT_##stat) } + +/* Entry for sensor next page flag in sensor map */ +#define STAT_NEXT_PAGE() \ + { MCDI_MON_PORT_NONE, MCDI_MON_NEXT_PAGE } + +/* Placeholder for gaps in the array */ +#define STAT_NO_SENSOR() \ + { MCDI_MON_PORT_NONE, MCDI_MON_INVALID_SENSOR } + +/* Map from MC sensors to monitor statistics */ +static const struct mcdi_sensor_map_s { + uint16_t msm_port_mask; + uint16_t msm_stat; +} mcdi_sensor_map[] = { + /* Sensor page 0 MC_CMD_SENSOR_xxx */ + STAT(Px, INT_TEMP), /* 0x00 CONTROLLER_TEMP */ + STAT(Px, EXT_TEMP), /* 0x01 PHY_COMMON_TEMP */ + STAT(Px, INT_COOLING), /* 0x02 CONTROLLER_COOLING */ + STAT(P1, EXT_TEMP), /* 0x03 PHY0_TEMP */ + STAT(P1, EXT_COOLING), /* 0x04 PHY0_COOLING */ + STAT(P2, EXT_TEMP), /* 0x05 PHY1_TEMP */ + STAT(P2, EXT_COOLING), /* 0x06 PHY1_COOLING */ + STAT(Px, 1V), /* 0x07 IN_1V0 */ + STAT(Px, 1_2V), /* 0x08 IN_1V2 */ + STAT(Px, 1_8V), /* 0x09 IN_1V8 */ + STAT(Px, 2_5V), /* 0x0a IN_2V5 */ + STAT(Px, 3_3V), /* 0x0b IN_3V3 */ + STAT(Px, 12V), /* 0x0c IN_12V0 */ + STAT(Px, 1_2VA), /* 0x0d IN_1V2A */ + STAT(Px, VREF), /* 0x0e IN_VREF */ + STAT(Px, VAOE), /* 0x0f OUT_VAOE */ + STAT(Px, AOE_TEMP), /* 0x10 AOE_TEMP */ + STAT(Px, PSU_AOE_TEMP), /* 0x11 PSU_AOE_TEMP */ + STAT(Px, PSU_TEMP), /* 0x12 PSU_TEMP */ + STAT(Px, FAN0), /* 0x13 FAN_0 */ + STAT(Px, FAN1), /* 0x14 FAN_1 */ + STAT(Px, FAN2), /* 0x15 FAN_2 */ + STAT(Px, FAN3), /* 0x16 FAN_3 */ + STAT(Px, FAN4), /* 0x17 FAN_4 */ + STAT(Px, VAOE_IN), /* 0x18 IN_VAOE */ + STAT(Px, IAOE), /* 0x19 OUT_IAOE */ + STAT(Px, IAOE_IN), /* 0x1a IN_IAOE */ + STAT(Px, NIC_POWER), /* 0x1b NIC_POWER */ + STAT(Px, 0_9V), /* 0x1c IN_0V9 */ + STAT(Px, I0_9V), /* 0x1d IN_I0V9 */ + STAT(Px, I1_2V), /* 0x1e IN_I1V2 */ + STAT_NEXT_PAGE(), /* 0x1f Next page flag (not a sensor) */ + + /* Sensor page 1 MC_CMD_SENSOR_xxx */ + STAT(Px, 0_9V_ADC), /* 0x20 IN_0V9_ADC */ + STAT(Px, INT_TEMP2), /* 0x21 CONTROLLER_2_TEMP */ + STAT(Px, VREG_TEMP), /* 0x22 VREG_INTERNAL_TEMP */ + STAT(Px, VREG_0_9V_TEMP), /* 0x23 VREG_0V9_TEMP */ + STAT(Px, VREG_1_2V_TEMP), /* 0x24 VREG_1V2_TEMP */ + STAT(Px, INT_VPTAT), /* 0x25 CTRLR. VPTAT */ + STAT(Px, INT_ADC_TEMP), /* 0x26 CTRLR. INTERNAL_TEMP */ + STAT(Px, EXT_VPTAT), /* 0x27 CTRLR. VPTAT_EXTADC */ + STAT(Px, EXT_ADC_TEMP), /* 0x28 CTRLR. INTERNAL_TEMP_EXTADC */ + STAT(Px, AMBIENT_TEMP), /* 0x29 AMBIENT_TEMP */ + STAT(Px, AIRFLOW), /* 0x2a AIRFLOW */ + STAT(Px, VDD08D_VSS08D_CSR), /* 0x2b VDD08D_VSS08D_CSR */ + STAT(Px, VDD08D_VSS08D_CSR_EXTADC), /* 0x2c VDD08D_VSS08D_CSR_EXTADC */ + STAT(Px, HOTPOINT_TEMP), /* 0x2d HOTPOINT_TEMP */ + STAT(P1, PHY_POWER_SWITCH_PORT0), /* 0x2e PHY_POWER_SWITCH_PORT0 */ + STAT(P2, PHY_POWER_SWITCH_PORT1), /* 0x2f PHY_POWER_SWITCH_PORT1 */ + STAT(Px, MUM_VCC), /* 0x30 MUM_VCC */ + STAT(Px, 0V9_A), /* 0x31 0V9_A */ + STAT(Px, I0V9_A), /* 0x32 I0V9_A */ + STAT(Px, 0V9_A_TEMP), /* 0x33 0V9_A_TEMP */ + STAT(Px, 0V9_B), /* 0x34 0V9_B */ + STAT(Px, I0V9_B), /* 0x35 I0V9_B */ + STAT(Px, 0V9_B_TEMP), /* 0x36 0V9_B_TEMP */ + STAT(Px, CCOM_AVREG_1V2_SUPPLY), /* 0x37 CCOM_AVREG_1V2_SUPPLY */ + STAT(Px, CCOM_AVREG_1V2_SUPPLY_EXT_ADC), + /* 0x38 CCOM_AVREG_1V2_SUPPLY_EXT_ADC */ + STAT(Px, CCOM_AVREG_1V8_SUPPLY), /* 0x39 CCOM_AVREG_1V8_SUPPLY */ + STAT(Px, CCOM_AVREG_1V8_SUPPLY_EXT_ADC), + /* 0x3a CCOM_AVREG_1V8_SUPPLY_EXT_ADC */ + STAT_NO_SENSOR(), /* 0x3b (no sensor) */ + STAT_NO_SENSOR(), /* 0x3c (no sensor) */ + STAT_NO_SENSOR(), /* 0x3d (no sensor) */ + STAT_NO_SENSOR(), /* 0x3e (no sensor) */ + STAT_NEXT_PAGE(), /* 0x3f Next page flag (not a sensor) */ + + /* Sensor page 2 MC_CMD_SENSOR_xxx */ + STAT(Px, CONTROLLER_MASTER_VPTAT), /* 0x40 MASTER_VPTAT */ + STAT(Px, CONTROLLER_MASTER_INTERNAL_TEMP), /* 0x41 MASTER_INT_TEMP */ + STAT(Px, CONTROLLER_MASTER_VPTAT_EXT_ADC), /* 0x42 MAST_VPTAT_EXT_ADC */ + STAT(Px, CONTROLLER_MASTER_INTERNAL_TEMP_EXT_ADC), + /* 0x43 MASTER_INTERNAL_TEMP_EXT_ADC */ + STAT(Px, CONTROLLER_SLAVE_VPTAT), /* 0x44 SLAVE_VPTAT */ + STAT(Px, CONTROLLER_SLAVE_INTERNAL_TEMP), /* 0x45 SLAVE_INTERNAL_TEMP */ + STAT(Px, CONTROLLER_SLAVE_VPTAT_EXT_ADC), /* 0x46 SLAVE_VPTAT_EXT_ADC */ + STAT(Px, CONTROLLER_SLAVE_INTERNAL_TEMP_EXT_ADC), + /* 0x47 SLAVE_INTERNAL_TEMP_EXT_ADC */ +}; + +#define MCDI_STATIC_SENSOR_ASSERT(_field) \ + EFX_STATIC_ASSERT(MC_CMD_SENSOR_STATE_ ## _field \ + == EFX_MON_STAT_STATE_ ## _field) + +static void +mcdi_mon_decode_stats( + __in efx_nic_t *enp, + __in_ecount(sensor_mask_size) uint32_t *sensor_mask, + __in size_t sensor_mask_size, + __in_opt efsys_mem_t *esmp, + __out_ecount_opt(sensor_mask_size) uint32_t *stat_maskp, + __out_ecount_opt(EFX_MON_NSTATS) efx_mon_stat_value_t *stat) +{ + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); + uint16_t port_mask; + uint16_t sensor; + size_t sensor_max; + uint32_t stat_mask[(EFX_ARRAY_SIZE(mcdi_sensor_map) + 31) / 32]; + uint32_t idx = 0; + uint32_t page = 0; + + /* Assert the MC_CMD_SENSOR and EFX_MON_STATE namespaces agree */ + MCDI_STATIC_SENSOR_ASSERT(OK); + MCDI_STATIC_SENSOR_ASSERT(WARNING); + MCDI_STATIC_SENSOR_ASSERT(FATAL); + MCDI_STATIC_SENSOR_ASSERT(BROKEN); + MCDI_STATIC_SENSOR_ASSERT(NO_READING); + + EFX_STATIC_ASSERT(sizeof (stat_mask[0]) * 8 == + EFX_MON_MASK_ELEMENT_SIZE); + sensor_max = + MIN((8 * sensor_mask_size), EFX_ARRAY_SIZE(mcdi_sensor_map)); + + port_mask = 1U << emip->emi_port; + + memset(stat_mask, 0, sizeof (stat_mask)); + + /* + * The MCDI sensor readings in the DMA buffer are a packed array of + * MC_CMD_SENSOR_VALUE_ENTRY structures, which only includes entries for + * supported sensors (bit set in sensor_mask). The sensor_mask and + * sensor readings do not include entries for the per-page NEXT_PAGE + * flag. + * + * sensor_mask may legitimately contain MCDI sensors that the driver + * does not understand. + */ + for (sensor = 0; sensor < sensor_max; ++sensor) { + efx_mon_stat_t id = mcdi_sensor_map[sensor].msm_stat; + + if ((sensor % MCDI_MON_PAGE_SIZE) == MC_CMD_SENSOR_PAGE0_NEXT) { + EFSYS_ASSERT3U(id, ==, MCDI_MON_NEXT_PAGE); + page++; + continue; + } + if (~(sensor_mask[page]) & (1U << sensor)) + continue; + idx++; + + if ((port_mask & mcdi_sensor_map[sensor].msm_port_mask) == 0) + continue; + EFSYS_ASSERT(id < EFX_MON_NSTATS); + + /* + * stat_mask is a bitmask indexed by EFX_MON_* monitor statistic + * identifiers from efx_mon_stat_t (without NEXT_PAGE bits). + * + * If there is an entry in the MCDI sensor to monitor statistic + * map then the sensor reading is used for the value of the + * monitor statistic. + */ + stat_mask[id / EFX_MON_MASK_ELEMENT_SIZE] |= + (1U << (id % EFX_MON_MASK_ELEMENT_SIZE)); + + if (stat != NULL && esmp != NULL && !EFSYS_MEM_IS_NULL(esmp)) { + efx_dword_t dword; + + /* Get MCDI sensor reading from DMA buffer */ + EFSYS_MEM_READD(esmp, 4 * (idx - 1), &dword); + + /* Update EFX monitor stat from MCDI sensor reading */ + stat[id].emsv_value = (uint16_t)EFX_DWORD_FIELD(dword, + MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_VALUE); + + stat[id].emsv_state = (uint16_t)EFX_DWORD_FIELD(dword, + MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_STATE); + } + } + + if (stat_maskp != NULL) { + memcpy(stat_maskp, stat_mask, sizeof (stat_mask)); + } +} + + __checkReturn int +mcdi_mon_ev( + __in efx_nic_t *enp, + __in efx_qword_t *eqp, + __out efx_mon_stat_t *idp, + __out efx_mon_stat_value_t *valuep) +{ + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); + efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + uint16_t port_mask; + uint16_t sensor; + uint16_t state; + uint16_t value; + efx_mon_stat_t id; + int rc; + + port_mask = (emip->emi_port == 1) + ? MCDI_MON_PORT_P1 + : MCDI_MON_PORT_P2; + + sensor = (uint16_t)MCDI_EV_FIELD(eqp, SENSOREVT_MONITOR); + state = (uint16_t)MCDI_EV_FIELD(eqp, SENSOREVT_STATE); + value = (uint16_t)MCDI_EV_FIELD(eqp, SENSOREVT_VALUE); + + /* Hardware must support this MCDI sensor */ + EFSYS_ASSERT3U(sensor, <, (8 * encp->enc_mcdi_sensor_mask_size)); + EFSYS_ASSERT((sensor % MCDI_MON_PAGE_SIZE) != MC_CMD_SENSOR_PAGE0_NEXT); + EFSYS_ASSERT(encp->enc_mcdi_sensor_maskp != NULL); + EFSYS_ASSERT((encp->enc_mcdi_sensor_maskp[sensor / MCDI_MON_PAGE_SIZE] & + (1U << (sensor % MCDI_MON_PAGE_SIZE))) != 0); + + /* But we don't have to understand it */ + if (sensor >= EFX_ARRAY_SIZE(mcdi_sensor_map)) { + rc = ENOTSUP; + goto fail1; + } + id = mcdi_sensor_map[sensor].msm_stat; + if ((port_mask & mcdi_sensor_map[sensor].msm_port_mask) == 0) + return (ENODEV); + EFSYS_ASSERT(id < EFX_MON_NSTATS); + + *idp = id; + valuep->emsv_value = value; + valuep->emsv_state = state; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + +static __checkReturn int +efx_mcdi_read_sensors( + __in efx_nic_t *enp, + __in efsys_mem_t *esmp, + __in uint32_t size) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_READ_SENSORS_EXT_IN_LEN, + MC_CMD_READ_SENSORS_EXT_OUT_LEN)]; + uint32_t addr_lo, addr_hi; + + req.emr_cmd = MC_CMD_READ_SENSORS; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_READ_SENSORS_EXT_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_READ_SENSORS_EXT_OUT_LEN; + + addr_lo = (uint32_t)(EFSYS_MEM_ADDR(esmp) & 0xffffffff); + addr_hi = (uint32_t)(EFSYS_MEM_ADDR(esmp) >> 32); + + MCDI_IN_SET_DWORD(req, READ_SENSORS_EXT_IN_DMA_ADDR_LO, addr_lo); + MCDI_IN_SET_DWORD(req, READ_SENSORS_EXT_IN_DMA_ADDR_HI, addr_hi); + MCDI_IN_SET_DWORD(req, READ_SENSORS_EXT_IN_LENGTH, size); + + efx_mcdi_execute(enp, &req); + + return (req.emr_rc); +} + +static __checkReturn int +efx_mcdi_sensor_info_npages( + __in efx_nic_t *enp, + __out uint32_t *npagesp) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_SENSOR_INFO_EXT_IN_LEN, + MC_CMD_SENSOR_INFO_OUT_LENMAX)]; + int page; + int rc; + + EFSYS_ASSERT(npagesp != NULL); + + page = 0; + do { + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_SENSOR_INFO; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_SENSOR_INFO_EXT_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_SENSOR_INFO_OUT_LENMAX; + + MCDI_IN_SET_DWORD(req, SENSOR_INFO_EXT_IN_PAGE, page++); + + efx_mcdi_execute_quiet(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + } while (MCDI_OUT_DWORD(req, SENSOR_INFO_OUT_MASK) & + (1 << MC_CMD_SENSOR_PAGE0_NEXT)); + + *npagesp = page; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + +static __checkReturn int +efx_mcdi_sensor_info( + __in efx_nic_t *enp, + __out_ecount(npages) uint32_t *sensor_maskp, + __in size_t npages) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_SENSOR_INFO_EXT_IN_LEN, + MC_CMD_SENSOR_INFO_OUT_LENMAX)]; + uint32_t page; + int rc; + + EFSYS_ASSERT(sensor_maskp != NULL); + + for (page = 0; page < npages; page++) { + uint32_t mask; + + (void) memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_SENSOR_INFO; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_SENSOR_INFO_EXT_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_SENSOR_INFO_OUT_LENMAX; + + MCDI_IN_SET_DWORD(req, SENSOR_INFO_EXT_IN_PAGE, page); + + efx_mcdi_execute(enp, &req); + + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + mask = MCDI_OUT_DWORD(req, SENSOR_INFO_OUT_MASK); + + if ((page != (npages - 1)) && + ((mask & (1U << MC_CMD_SENSOR_PAGE0_NEXT)) == 0)) { + rc = EINVAL; + goto fail2; + } + sensor_maskp[page] = mask; + } + + if (sensor_maskp[npages - 1] & (1U << MC_CMD_SENSOR_PAGE0_NEXT)) { + rc = EINVAL; + goto fail3; + } + + return (0); + +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +mcdi_mon_stats_update( + __in efx_nic_t *enp, + __in efsys_mem_t *esmp, + __out_ecount(EFX_MON_NSTATS) efx_mon_stat_value_t *values) +{ + efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + uint32_t size = encp->enc_mon_stat_dma_buf_size; + int rc; + + if ((rc = efx_mcdi_read_sensors(enp, esmp, size)) != 0) + goto fail1; + + EFSYS_DMA_SYNC_FOR_KERNEL(esmp, 0, size); + + mcdi_mon_decode_stats(enp, + encp->enc_mcdi_sensor_maskp, + encp->enc_mcdi_sensor_mask_size, + esmp, NULL, values); + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + __checkReturn int +mcdi_mon_cfg_build( + __in efx_nic_t *enp) +{ + efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + uint32_t npages; + int rc; + + switch (enp->en_family) { +#if EFSYS_OPT_SIENA + case EFX_FAMILY_SIENA: + encp->enc_mon_type = EFX_MON_SFC90X0; + break; +#endif +#if EFSYS_OPT_HUNTINGTON + case EFX_FAMILY_HUNTINGTON: + encp->enc_mon_type = EFX_MON_SFC91X0; + break; +#endif + default: + rc = EINVAL; + goto fail1; + } + + /* Get mc sensor mask size */ + npages = 0; + if ((rc = efx_mcdi_sensor_info_npages(enp, &npages)) != 0) + goto fail2; + + encp->enc_mon_stat_dma_buf_size = npages * EFX_MON_STATS_PAGE_SIZE; + encp->enc_mcdi_sensor_mask_size = npages * sizeof (uint32_t); + + /* Allocate mc sensor mask */ + EFSYS_KMEM_ALLOC(enp->en_esip, + encp->enc_mcdi_sensor_mask_size, + encp->enc_mcdi_sensor_maskp); + + if (encp->enc_mcdi_sensor_maskp == NULL) { + rc = ENOMEM; + goto fail3; + } + + /* Read mc sensor mask */ + if ((rc = efx_mcdi_sensor_info(enp, + encp->enc_mcdi_sensor_maskp, + npages)) != 0) + goto fail4; + + /* Build monitor statistics mask */ + mcdi_mon_decode_stats(enp, + encp->enc_mcdi_sensor_maskp, + encp->enc_mcdi_sensor_mask_size, + NULL, encp->enc_mon_stat_mask, NULL); + + return (0); + +fail4: + EFSYS_PROBE(fail4); + EFSYS_KMEM_FREE(enp->en_esip, + encp->enc_mcdi_sensor_mask_size, + encp->enc_mcdi_sensor_maskp); + +fail3: + EFSYS_PROBE(fail3); + +fail2: + EFSYS_PROBE(fail2); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + void +mcdi_mon_cfg_free( + __in efx_nic_t *enp) +{ + efx_nic_cfg_t *encp = &(enp->en_nic_cfg); + + if (encp->enc_mcdi_sensor_maskp != NULL) { + EFSYS_KMEM_FREE(enp->en_esip, + encp->enc_mcdi_sensor_mask_size, + encp->enc_mcdi_sensor_maskp); + } +} + + +#endif /* EFSYS_OPT_MON_STATS */ + +#endif /* EFSYS_OPT_MON_MCDI */ diff --git a/sys/dev/sfxge/common/mcdi_mon.h b/sys/dev/sfxge/common/mcdi_mon.h new file mode 100644 index 000000000000..30bb15022581 --- /dev/null +++ b/sys/dev/sfxge/common/mcdi_mon.h @@ -0,0 +1,76 @@ +/*- + * Copyright (c) 2009-2015 Solarflare Communications Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. + * + * $FreeBSD$ + */ + +#ifndef _SYS_MCDI_MON_H +#define _SYS_MCDI_MON_H + +#include "efx.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#if EFSYS_OPT_MON_MCDI + +#if EFSYS_OPT_MON_STATS + + __checkReturn int +mcdi_mon_cfg_build( + __in efx_nic_t *enp); + + void +mcdi_mon_cfg_free( + __in efx_nic_t *enp); + + +extern __checkReturn int +mcdi_mon_ev( + __in efx_nic_t *enp, + __in efx_qword_t *eqp, + __out efx_mon_stat_t *idp, + __out efx_mon_stat_value_t *valuep); + +extern __checkReturn int +mcdi_mon_stats_update( + __in efx_nic_t *enp, + __in efsys_mem_t *esmp, + __out_ecount(EFX_MON_NSTATS) efx_mon_stat_value_t *values); + +#endif /* EFSYS_OPT_MON_STATS */ + +#endif /* EFSYS_OPT_MON_MCDI */ + +#ifdef __cplusplus +} +#endif + +#endif /* _SYS_MCDI_MON_H */ diff --git a/sys/dev/sfxge/common/siena_flash.h b/sys/dev/sfxge/common/siena_flash.h index aed688b774e9..c1ee1c5df920 100644 --- a/sys/dev/sfxge/common/siena_flash.h +++ b/sys/dev/sfxge/common/siena_flash.h @@ -1,26 +1,31 @@ /*- - * Copyright 2007-2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2007-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. * * $FreeBSD$ */ @@ -48,6 +53,45 @@ #define SIENA_MC_BOOT_MAGIC (0x51E4A001) #define SIENA_MC_BOOT_VERSION (1) + +/*Structures supporting an arbitrary number of binary blobs in the flash image + intended to house code and tables for the satellite cpus*/ +/*thanks to random.org for:*/ +#define BLOBS_HEADER_MAGIC (0xBDA3BBD4) +#define BLOB_HEADER_MAGIC (0xA1478A91) + +typedef struct blobs_hdr_s { /* GENERATED BY scripts/genfwdef */ + efx_dword_t magic; + efx_dword_t no_of_blobs; +} blobs_hdr_t; + +typedef struct blob_hdr_s { /* GENERATED BY scripts/genfwdef */ + efx_dword_t magic; + efx_dword_t cpu_type; + efx_dword_t build_variant; + efx_dword_t offset; + efx_dword_t length; + efx_dword_t checksum; +} blob_hdr_t; + +#define BLOB_CPU_TYPE_TXDI_TEXT (0) +#define BLOB_CPU_TYPE_RXDI_TEXT (1) +#define BLOB_CPU_TYPE_TXDP_TEXT (2) +#define BLOB_CPU_TYPE_RXDP_TEXT (3) +#define BLOB_CPU_TYPE_RXHRSL_HR_LUT (4) +#define BLOB_CPU_TYPE_RXHRSL_HR_LUT_CFG (5) +#define BLOB_CPU_TYPE_TXHRSL_HR_LUT (6) +#define BLOB_CPU_TYPE_TXHRSL_HR_LUT_CFG (7) +#define BLOB_CPU_TYPE_RXHRSL_HR_PGM (8) +#define BLOB_CPU_TYPE_RXHRSL_SL_PGM (9) +#define BLOB_CPU_TYPE_TXHRSL_HR_PGM (10) +#define BLOB_CPU_TYPE_TXHRSL_SL_PGM (11) +#define BLOB_CPU_TYPE_RXDI_VTBL0 (12) +#define BLOB_CPU_TYPE_TXDI_VTBL0 (13) +#define BLOB_CPU_TYPE_RXDI_VTBL1 (14) +#define BLOB_CPU_TYPE_TXDI_VTBL1 (15) +#define BLOB_CPU_TYPE_DUMPSPEC (32) + typedef struct siena_mc_boot_hdr_s { /* GENERATED BY scripts/genfwdef */ efx_dword_t magic; /* = SIENA_MC_BOOT_MAGIC */ efx_word_t hdr_version; /* this structure definition is version 1 */ @@ -57,14 +101,21 @@ typedef struct siena_mc_boot_hdr_s { /* GENERATED BY scripts/genfwdef */ efx_byte_t firmware_version_c; efx_word_t checksum; /* of whole header area + firmware image */ efx_word_t firmware_version_d; - efx_word_t reserved_a[1]; /* (set to 0) */ + efx_byte_t mcfw_subtype; + efx_byte_t reserved_a[1]; /* (set to 0) */ efx_dword_t firmware_text_offset; /* offset to firmware .text */ efx_dword_t firmware_text_size; /* length of firmware .text, in bytes */ efx_dword_t firmware_data_offset; /* offset to firmware .data */ efx_dword_t firmware_data_size; /* length of firmware .data, in bytes */ - efx_dword_t reserved_b[8]; /* (set to 0) */ + efx_byte_t spi_rate; /* SPI rate for reading image, 0 is BootROM default */ + efx_byte_t spi_phase_adj; /* SPI SDO/SCL phase adjustment, 0 is default (no adj) */ + efx_word_t reserved_b[1]; /* (set to 0) */ + efx_dword_t reserved_c[7]; /* (set to 0) */ } siena_mc_boot_hdr_t; +#define SIENA_MC_BOOT_HDR_PADDING \ + (SIENA_MC_BOOT_HDR_LEN - sizeof(siena_mc_boot_hdr_t)) + #define SIENA_MC_STATIC_CONFIG_MAGIC (0xBDCF5555) #define SIENA_MC_STATIC_CONFIG_VERSION (0) @@ -81,8 +132,8 @@ typedef struct siena_mc_static_config_hdr_s { /* GENERATED BY scripts/genfwdef * efx_byte_t green_mode_valid; /* Whether cal holds a valid value */ efx_word_t mac_addr_count; efx_word_t mac_addr_stride; - efx_word_t calibrated_vref; - efx_word_t adc_vref; + efx_word_t calibrated_vref; /* Vref as measured during production */ + efx_word_t adc_vref; /* Vref as read by ADC */ efx_dword_t reserved2[1]; /* (write as zero) */ efx_dword_t num_dbi_items; struct { @@ -117,17 +168,32 @@ typedef struct siena_mc_dynamic_config_hdr_s { /* GENERATED BY scripts/genfwdef #define SIENA_MC_EXPROM_SINGLE_MAGIC (0xAA55) /* little-endian uint16_t */ #define SIENA_MC_EXPROM_COMBO_MAGIC (0xB0070102) /* little-endian uint32_t */ +#define SIENA_MC_EXPROM_COMBO_V2_MAGIC (0xB0070103) /* little-endian uint32_t */ typedef struct siena_mc_combo_rom_hdr_s { /* GENERATED BY scripts/genfwdef */ - efx_dword_t magic; /* = SIENA_MC_EXPROM_COMBO_MAGIC */ - efx_dword_t len1; /* length of first image */ - efx_dword_t len2; /* length of second image */ - efx_dword_t off1; /* offset of first byte to edit to combine images */ - efx_dword_t off2; /* offset of second byte to edit to combine images */ - efx_word_t infoblk0_off; /* infoblk offset */ - efx_word_t infoblk1_off; /* infoblk offset */ - efx_byte_t infoblk_len; /* length of space reserved for infoblk structures */ - efx_byte_t reserved[7]; /* (set to 0) */ + efx_dword_t magic; /* = SIENA_MC_EXPROM_COMBO_MAGIC or SIENA_MC_EXPROM_COMBO_V2_MAGIC */ + union { + struct { + efx_dword_t len1; /* length of first image */ + efx_dword_t len2; /* length of second image */ + efx_dword_t off1; /* offset of first byte to edit to combine images */ + efx_dword_t off2; /* offset of second byte to edit to combine images */ + efx_word_t infoblk0_off;/* infoblk offset */ + efx_word_t infoblk1_off;/* infoblk offset */ + efx_byte_t infoblk_len;/* length of space reserved for one infoblk structure */ + efx_byte_t reserved[7];/* (set to 0) */ + } v1; + struct { + efx_dword_t len1; /* length of first image */ + efx_dword_t len2; /* length of second image */ + efx_dword_t off1; /* offset of first byte to edit to combine images */ + efx_dword_t off2; /* offset of second byte to edit to combine images */ + efx_word_t infoblk_off;/* infoblk start offset */ + efx_word_t infoblk_count;/* infoblk count */ + efx_byte_t infoblk_len;/* length of space reserved for one infoblk structure */ + efx_byte_t reserved[7];/* (set to 0) */ + } v2; + }; } siena_mc_combo_rom_hdr_t; #pragma pack() diff --git a/sys/dev/sfxge/common/siena_impl.h b/sys/dev/sfxge/common/siena_impl.h index 9d0280853b5f..b65e39986ddf 100644 --- a/sys/dev/sfxge/common/siena_impl.h +++ b/sys/dev/sfxge/common/siena_impl.h @@ -1,26 +1,31 @@ /*- - * Copyright 2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2009-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. * * $FreeBSD$ */ @@ -101,6 +106,49 @@ siena_sram_test( #endif /* EFSYS_OPT_DIAG */ +#if EFSYS_OPT_MCDI + +extern __checkReturn int +siena_mcdi_init( + __in efx_nic_t *enp, + __in const efx_mcdi_transport_t *mtp); + +extern void +siena_mcdi_request_copyin( + __in efx_nic_t *enp, + __in efx_mcdi_req_t *emrp, + __in unsigned int seq, + __in boolean_t ev_cpl, + __in boolean_t new_epoch); + +extern __checkReturn boolean_t +siena_mcdi_request_poll( + __in efx_nic_t *enp); + +extern void +siena_mcdi_request_copyout( + __in efx_nic_t *enp, + __in efx_mcdi_req_t *emrp); + +extern int +siena_mcdi_poll_reboot( + __in efx_nic_t *enp); + +extern void +siena_mcdi_fini( + __in efx_nic_t *enp); + +extern __checkReturn int +siena_mcdi_fw_update_supported( + __in efx_nic_t *enp, + __out boolean_t *supportedp); + +extern __checkReturn int +siena_mcdi_macaddr_change_supported( + __in efx_nic_t *enp, + __out boolean_t *supportedp); + +#endif /* EFSYS_OPT_MCDI */ #if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD @@ -169,6 +217,12 @@ siena_nvram_size( __in efx_nvram_type_t type, __out size_t *sizep); +extern __checkReturn int +siena_nvram_get_subtype( + __in efx_nic_t *enp, + __in unsigned int partn, + __out uint32_t *subtypep); + extern __checkReturn int siena_nvram_get_version( __in efx_nic_t *enp, @@ -212,7 +266,7 @@ extern __checkReturn int siena_nvram_set_version( __in efx_nic_t *enp, __in efx_nvram_type_t type, - __out uint16_t version[4]); + __in_ecount(4) uint16_t version[4]); #endif /* EFSYS_OPT_NVRAM */ @@ -341,7 +395,7 @@ siena_phy_stats_update( #if EFSYS_OPT_NAMES -extern const char __cs * +extern const char * siena_phy_prop_name( __in efx_nic_t *enp, __in unsigned int id); @@ -363,18 +417,18 @@ siena_phy_prop_set( #endif /* EFSYS_OPT_PHY_PROPS */ -#if EFSYS_OPT_PHY_BIST +#if EFSYS_OPT_BIST extern __checkReturn int siena_phy_bist_start( __in efx_nic_t *enp, - __in efx_phy_bist_type_t type); + __in efx_bist_type_t type); extern __checkReturn int siena_phy_bist_poll( __in efx_nic_t *enp, - __in efx_phy_bist_type_t type, - __out efx_phy_bist_result_t *resultp, + __in efx_bist_type_t type, + __out efx_bist_result_t *resultp, __out_opt __drv_when(count > 0, __notnull) uint32_t *value_maskp, __out_ecount_opt(count) __drv_when(count > 0, __notnull) @@ -384,9 +438,9 @@ siena_phy_bist_poll( extern void siena_phy_bist_stop( __in efx_nic_t *enp, - __in efx_phy_bist_type_t type); + __in efx_bist_type_t type); -#endif /* EFSYS_OPT_PHY_BIST */ +#endif /* EFSYS_OPT_BIST */ extern __checkReturn int siena_mac_poll( @@ -414,22 +468,6 @@ siena_mac_loopback_set( #if EFSYS_OPT_MAC_STATS -extern __checkReturn int -siena_mac_stats_clear( - __in efx_nic_t *enp); - -extern __checkReturn int -siena_mac_stats_upload( - __in efx_nic_t *enp, - __in efsys_mem_t *esmp); - -extern __checkReturn int -siena_mac_stats_periodic( - __in efx_nic_t *enp, - __in efsys_mem_t *esmp, - __in uint16_t period_ms, - __in boolean_t events); - extern __checkReturn int siena_mac_stats_update( __in efx_nic_t *enp, @@ -439,39 +477,6 @@ siena_mac_stats_update( #endif /* EFSYS_OPT_MAC_STATS */ -extern __checkReturn int -siena_mon_reset( - __in efx_nic_t *enp); - -extern __checkReturn int -siena_mon_reconfigure( - __in efx_nic_t *enp); - -#if EFSYS_OPT_MON_STATS - -extern void -siena_mon_decode_stats( - __in efx_nic_t *enp, - __in uint32_t dmask, - __in_opt efsys_mem_t *esmp, - __out_opt uint32_t *vmaskp, - __out_ecount_opt(EFX_MON_NSTATS) efx_mon_stat_value_t *value); - -extern __checkReturn int -siena_mon_ev( - __in efx_nic_t *enp, - __in efx_qword_t *eqp, - __out efx_mon_stat_t *idp, - __out efx_mon_stat_value_t *valuep); - -extern __checkReturn int -siena_mon_stats_update( - __in efx_nic_t *enp, - __in efsys_mem_t *esmp, - __out_ecount(EFX_MON_NSTATS) efx_mon_stat_value_t *values); - -#endif /* EFSYS_OPT_MON_STATS */ - #ifdef __cplusplus } #endif diff --git a/sys/dev/sfxge/common/siena_mac.c b/sys/dev/sfxge/common/siena_mac.c index 38f5bc5c9353..beeaea1a1c3e 100644 --- a/sys/dev/sfxge/common/siena_mac.c +++ b/sys/dev/sfxge/common/siena_mac.c @@ -1,26 +1,31 @@ /*- - * Copyright 2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2009-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -89,26 +94,29 @@ siena_mac_reconfigure( __in efx_nic_t *enp) { efx_port_t *epp = &(enp->en_port); - uint8_t payload[MAX(MC_CMD_SET_MAC_IN_LEN, - MC_CMD_SET_MCAST_HASH_IN_LEN)]; + efx_oword_t multicast_hash[2]; efx_mcdi_req_t req; + uint8_t payload[MAX(MAX(MC_CMD_SET_MAC_IN_LEN, + MC_CMD_SET_MAC_OUT_LEN), + MAX(MC_CMD_SET_MCAST_HASH_IN_LEN, + MC_CMD_SET_MCAST_HASH_OUT_LEN))]; unsigned int fcntl; int rc; + (void) memset(payload, 0, sizeof (payload)); req.emr_cmd = MC_CMD_SET_MAC; req.emr_in_buf = payload; req.emr_in_length = MC_CMD_SET_MAC_IN_LEN; - EFX_STATIC_ASSERT(MC_CMD_SET_MAC_OUT_LEN == 0); - req.emr_out_buf = NULL; - req.emr_out_length = 0; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_SET_MAC_OUT_LEN; MCDI_IN_SET_DWORD(req, SET_MAC_IN_MTU, epp->ep_mac_pdu); MCDI_IN_SET_DWORD(req, SET_MAC_IN_DRAIN, epp->ep_mac_drain ? 1 : 0); EFX_MAC_ADDR_COPY(MCDI_IN2(req, uint8_t, SET_MAC_IN_ADDR), epp->ep_mac_addr); MCDI_IN_POPULATE_DWORD_2(req, SET_MAC_IN_REJECT, - SET_MAC_IN_REJECT_UNCST, !epp->ep_unicst, - SET_MAC_IN_REJECT_BRDCST, !epp->ep_brdcst); + SET_MAC_IN_REJECT_UNCST, !epp->ep_all_unicst, + SET_MAC_IN_REJECT_BRDCST, !epp->ep_brdcst); if (epp->ep_fcntl_autoneg) /* efx_fcntl_set() has already set the phy capabilities */ @@ -129,19 +137,40 @@ siena_mac_reconfigure( goto fail1; } - /* Push multicast hash. Set the broadcast bit (0xff) appropriately */ + /* Push multicast hash */ + + if (epp->ep_all_mulcst) { + /* A hash matching all multicast is all 1s */ + EFX_SET_OWORD(multicast_hash[0]); + EFX_SET_OWORD(multicast_hash[1]); + } else if (epp->ep_mulcst) { + /* Use the hash set by the multicast list */ + multicast_hash[0] = epp->ep_multicst_hash[0]; + multicast_hash[1] = epp->ep_multicst_hash[1]; + } else { + /* A hash matching no traffic is simply 0 */ + EFX_ZERO_OWORD(multicast_hash[0]); + EFX_ZERO_OWORD(multicast_hash[1]); + } + + /* + * Broadcast packets go through the multicast hash filter. + * The IEEE 802.3 CRC32 of the broadcast address is 0xbe2612ff + * so we always add bit 0xff to the mask (bit 0x7f in the + * second octword). + */ + if (epp->ep_brdcst) + EFX_SET_OWORD_BIT(multicast_hash[1], 0x7f); + + (void) memset(payload, 0, sizeof (payload)); req.emr_cmd = MC_CMD_SET_MCAST_HASH; req.emr_in_buf = payload; req.emr_in_length = MC_CMD_SET_MCAST_HASH_IN_LEN; - EFX_STATIC_ASSERT(MC_CMD_SET_MCAST_HASH_OUT_LEN == 0); - req.emr_out_buf = NULL; - req.emr_out_length = 0; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_SET_MCAST_HASH_OUT_LEN; memcpy(MCDI_IN2(req, uint8_t, SET_MCAST_HASH_IN_HASH0), - epp->ep_multicst_hash, sizeof (epp->ep_multicst_hash)); - if (epp->ep_brdcst) - EFX_SET_OWORD_BIT(*MCDI_IN2(req, efx_oword_t, - SET_MCAST_HASH_IN_HASH1), 0x7f); + multicast_hash, sizeof (multicast_hash)); efx_mcdi_execute(enp, &req); @@ -198,150 +227,6 @@ siena_mac_loopback_set( #if EFSYS_OPT_MAC_STATS - __checkReturn int -siena_mac_stats_clear( - __in efx_nic_t *enp) -{ - uint8_t payload[MC_CMD_MAC_STATS_IN_LEN]; - efx_mcdi_req_t req; - int rc; - - req.emr_cmd = MC_CMD_MAC_STATS; - req.emr_in_buf = payload; - req.emr_in_length = sizeof (payload); - EFX_STATIC_ASSERT(MC_CMD_MAC_STATS_OUT_DMA_LEN == 0); - req.emr_out_buf = NULL; - req.emr_out_length = 0; - - MCDI_IN_POPULATE_DWORD_3(req, MAC_STATS_IN_CMD, - MAC_STATS_IN_DMA, 0, - MAC_STATS_IN_CLEAR, 1, - MAC_STATS_IN_PERIODIC_CHANGE, 0); - - efx_mcdi_execute(enp, &req); - - if (req.emr_rc != 0) { - rc = req.emr_rc; - goto fail1; - } - - return (0); - -fail1: - EFSYS_PROBE1(fail1, int, rc); - - return (rc); -} - - __checkReturn int -siena_mac_stats_upload( - __in efx_nic_t *enp, - __in efsys_mem_t *esmp) -{ - uint8_t payload[MC_CMD_MAC_STATS_IN_LEN]; - efx_mcdi_req_t req; - size_t bytes; - int rc; - - EFX_STATIC_ASSERT(MC_CMD_MAC_NSTATS * sizeof (uint64_t) <= - EFX_MAC_STATS_SIZE); - - bytes = MC_CMD_MAC_NSTATS * sizeof (uint64_t); - - req.emr_cmd = MC_CMD_MAC_STATS; - req.emr_in_buf = payload; - req.emr_in_length = sizeof (payload); - EFX_STATIC_ASSERT(MC_CMD_MAC_STATS_OUT_DMA_LEN == 0); - req.emr_out_buf = NULL; - req.emr_out_length = 0; - - MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_ADDR_LO, - EFSYS_MEM_ADDR(esmp) & 0xffffffff); - MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_ADDR_HI, - EFSYS_MEM_ADDR(esmp) >> 32); - MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_LEN, bytes); - - /* - * The MC DMAs aggregate statistics for our convinience, so we can - * avoid having to pull the statistics buffer into the cache to - * maintain cumulative statistics. - */ - MCDI_IN_POPULATE_DWORD_3(req, MAC_STATS_IN_CMD, - MAC_STATS_IN_DMA, 1, - MAC_STATS_IN_CLEAR, 0, - MAC_STATS_IN_PERIODIC_CHANGE, 0); - - efx_mcdi_execute(enp, &req); - - if (req.emr_rc != 0) { - rc = req.emr_rc; - goto fail1; - } - - return (0); - -fail1: - EFSYS_PROBE1(fail1, int, rc); - - return (rc); -} - - __checkReturn int -siena_mac_stats_periodic( - __in efx_nic_t *enp, - __in efsys_mem_t *esmp, - __in uint16_t period, - __in boolean_t events) -{ - uint8_t payload[MC_CMD_MAC_STATS_IN_LEN]; - efx_mcdi_req_t req; - size_t bytes; - int rc; - - bytes = MC_CMD_MAC_NSTATS * sizeof (uint64_t); - - req.emr_cmd = MC_CMD_MAC_STATS; - req.emr_in_buf = payload; - req.emr_in_length = sizeof (payload); - EFX_STATIC_ASSERT(MC_CMD_MAC_STATS_OUT_DMA_LEN == 0); - req.emr_out_buf = NULL; - req.emr_out_length = 0; - - MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_ADDR_LO, - EFSYS_MEM_ADDR(esmp) & 0xffffffff); - MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_ADDR_HI, - EFSYS_MEM_ADDR(esmp) >> 32); - MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_LEN, bytes); - - /* - * The MC DMAs aggregate statistics for our convinience, so we can - * avoid having to pull the statistics buffer into the cache to - * maintain cumulative statistics. - */ - MCDI_IN_POPULATE_DWORD_6(req, MAC_STATS_IN_CMD, - MAC_STATS_IN_DMA, 0, - MAC_STATS_IN_CLEAR, 0, - MAC_STATS_IN_PERIODIC_CHANGE, 1, - MAC_STATS_IN_PERIODIC_ENABLE, period ? 1 : 0, - MAC_STATS_IN_PERIODIC_NOEVENT, events ? 0 : 1, - MAC_STATS_IN_PERIOD_MS, period); - - efx_mcdi_execute(enp, &req); - - if (req.emr_rc != 0) { - rc = req.emr_rc; - goto fail1; - } - - return (0); - -fail1: - EFSYS_PROBE1(fail1, int, rc); - - return (rc); -} - - #define SIENA_MAC_STAT_READ(_esmp, _field, _eqp) \ EFSYS_MEM_READQ((_esmp), (_field) * sizeof (efx_qword_t), _eqp) @@ -352,7 +237,6 @@ siena_mac_stats_update( __out_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat, __out_opt uint32_t *generationp) { - efx_qword_t rx_pkts; efx_qword_t value; efx_qword_t generation_start; efx_qword_t generation_end; @@ -360,6 +244,7 @@ siena_mac_stats_update( _NOTE(ARGUNUSED(enp)) /* Read END first so we don't race with the MC */ + EFSYS_DMA_SYNC_FOR_KERNEL(esmp, 0, EFX_MAC_STATS_SIZE); SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_GENERATION_END, &generation_end); EFSYS_MEM_READ_BARRIER(); @@ -388,7 +273,7 @@ siena_mac_stats_update( SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_LT64_PKTS, &value); EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_LE_64_PKTS]), &value); SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_64_PKTS, &value); - EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_LE_64_PKTS]), &value); + EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_TX_LE_64_PKTS]), &value); SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_65_TO_127_PKTS, &value); EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_65_TO_127_PKTS]), &value); @@ -435,8 +320,8 @@ siena_mac_stats_update( EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_EX_DEF_PKTS]), &value); /* RX */ - SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_BYTES, &rx_pkts); - EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_OCTETS]), &rx_pkts); + SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_BYTES, &value); + EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_OCTETS]), &value); SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_PKTS, &value); EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_PKTS]), &value); @@ -529,6 +414,7 @@ siena_mac_stats_update( SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_NODESC_DROPS, &value); EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_NODESC_DROP_CNT]), &value); + EFSYS_DMA_SYNC_FOR_KERNEL(esmp, 0, EFX_MAC_STATS_SIZE); EFSYS_MEM_READ_BARRIER(); SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_GENERATION_START, &generation_start); diff --git a/sys/dev/sfxge/common/siena_mcdi.c b/sys/dev/sfxge/common/siena_mcdi.c new file mode 100644 index 000000000000..b2224acdef70 --- /dev/null +++ b/sys/dev/sfxge/common/siena_mcdi.c @@ -0,0 +1,354 @@ +/*- + * Copyright (c) 2012-2015 Solarflare Communications Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "efsys.h" +#include "efx.h" +#include "efx_impl.h" + +#if EFSYS_OPT_SIENA && EFSYS_OPT_MCDI + +#define SIENA_MCDI_PDU(_emip) \ + (((emip)->emi_port == 1) \ + ? MC_SMEM_P0_PDU_OFST >> 2 \ + : MC_SMEM_P1_PDU_OFST >> 2) + +#define SIENA_MCDI_DOORBELL(_emip) \ + (((emip)->emi_port == 1) \ + ? MC_SMEM_P0_DOORBELL_OFST >> 2 \ + : MC_SMEM_P1_DOORBELL_OFST >> 2) + +#define SIENA_MCDI_STATUS(_emip) \ + (((emip)->emi_port == 1) \ + ? MC_SMEM_P0_STATUS_OFST >> 2 \ + : MC_SMEM_P1_STATUS_OFST >> 2) + + + void +siena_mcdi_request_copyin( + __in efx_nic_t *enp, + __in efx_mcdi_req_t *emrp, + __in unsigned int seq, + __in boolean_t ev_cpl, + __in boolean_t new_epoch) +{ + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); + efx_dword_t dword; + unsigned int xflags; + unsigned int pdur; + unsigned int dbr; + unsigned int pos; + + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA); + _NOTE(ARGUNUSED(new_epoch)) + + EFSYS_ASSERT(emip->emi_port == 1 || emip->emi_port == 2); + pdur = SIENA_MCDI_PDU(emip); + dbr = SIENA_MCDI_DOORBELL(emip); + + xflags = 0; + if (ev_cpl) + xflags |= MCDI_HEADER_XFLAGS_EVREQ; + + /* Construct the header in shared memory */ + EFX_POPULATE_DWORD_6(dword, + MCDI_HEADER_CODE, emrp->emr_cmd, + MCDI_HEADER_RESYNC, 1, + MCDI_HEADER_DATALEN, emrp->emr_in_length, + MCDI_HEADER_SEQ, seq, + MCDI_HEADER_RESPONSE, 0, + MCDI_HEADER_XFLAGS, xflags); + EFX_BAR_TBL_WRITED(enp, FR_CZ_MC_TREG_SMEM, pdur, &dword, B_TRUE); + + for (pos = 0; pos < emrp->emr_in_length; pos += sizeof (efx_dword_t)) { + memcpy(&dword, MCDI_IN(*emrp, efx_dword_t, pos), + MIN(sizeof (dword), emrp->emr_in_length - pos)); + EFX_BAR_TBL_WRITED(enp, FR_CZ_MC_TREG_SMEM, + pdur + 1 + (pos >> 2), &dword, B_FALSE); + } + + /* Ring the doorbell */ + EFX_POPULATE_DWORD_1(dword, EFX_DWORD_0, 0xd004be11); + EFX_BAR_TBL_WRITED(enp, FR_CZ_MC_TREG_SMEM, dbr, &dword, B_FALSE); +} + + void +siena_mcdi_request_copyout( + __in efx_nic_t *enp, + __in efx_mcdi_req_t *emrp) +{ + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); + unsigned int pos; + unsigned int pdur; + efx_dword_t data; + + pdur = SIENA_MCDI_PDU(emip); + + /* Copy payload out if caller supplied buffer */ + if (emrp->emr_out_buf != NULL) { + size_t bytes = MIN(emrp->emr_out_length_used, + emrp->emr_out_length); + for (pos = 0; pos < bytes; pos += sizeof (efx_dword_t)) { + EFX_BAR_TBL_READD(enp, FR_CZ_MC_TREG_SMEM, + pdur + 1 + (pos >> 2), &data, B_FALSE); + memcpy(MCDI_OUT(*emrp, efx_dword_t, pos), &data, + MIN(sizeof (data), bytes - pos)); + } + } +} + + int +siena_mcdi_poll_reboot( + __in efx_nic_t *enp) +{ +#ifndef EFX_GRACEFUL_MC_REBOOT + /* + * This function is not being used properly. + * Until its callers are fixed, it should always return 0. + */ + _NOTE(ARGUNUSED(enp)) + return (0); +#else + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); + unsigned int rebootr; + efx_dword_t dword; + uint32_t value; + + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA); + EFSYS_ASSERT(emip->emi_port == 1 || emip->emi_port == 2); + rebootr = SIENA_MCDI_STATUS(emip); + + EFX_BAR_TBL_READD(enp, FR_CZ_MC_TREG_SMEM, rebootr, &dword, B_FALSE); + value = EFX_DWORD_FIELD(dword, EFX_DWORD_0); + + if (value == 0) + return (0); + + EFX_ZERO_DWORD(dword); + EFX_BAR_TBL_WRITED(enp, FR_CZ_MC_TREG_SMEM, rebootr, &dword, B_FALSE); + + if (value == MC_STATUS_DWORD_ASSERT) + return (EINTR); + else + return (EIO); +#endif +} + + __checkReturn boolean_t +siena_mcdi_request_poll( + __in efx_nic_t *enp) +{ + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); + efx_mcdi_req_t *emrp; + efx_dword_t dword; + unsigned int pdur; + unsigned int seq; + unsigned int length; + int state; + int rc; + + EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_SIENA); + + /* Serialise against post-watchdog efx_mcdi_ev* */ + EFSYS_LOCK(enp->en_eslp, state); + + EFSYS_ASSERT(emip->emi_pending_req != NULL); + EFSYS_ASSERT(!emip->emi_ev_cpl); + emrp = emip->emi_pending_req; + + /* Check for reboot atomically w.r.t efx_mcdi_request_start */ + if (emip->emi_poll_cnt++ == 0) { + if ((rc = siena_mcdi_poll_reboot(enp)) != 0) { + emip->emi_pending_req = NULL; + EFSYS_UNLOCK(enp->en_eslp, state); + + goto fail1; + } + } + + EFSYS_ASSERT(emip->emi_port == 1 || emip->emi_port == 2); + pdur = SIENA_MCDI_PDU(emip); + + /* Read the command header */ + EFX_BAR_TBL_READD(enp, FR_CZ_MC_TREG_SMEM, pdur, &dword, B_FALSE); + if (EFX_DWORD_FIELD(dword, MCDI_HEADER_RESPONSE) == 0) { + EFSYS_UNLOCK(enp->en_eslp, state); + return (B_FALSE); + } + + /* Request complete */ + emip->emi_pending_req = NULL; + seq = (emip->emi_seq - 1) & EFX_MASK32(MCDI_HEADER_SEQ); + + /* Check for synchronous reboot */ + if (EFX_DWORD_FIELD(dword, MCDI_HEADER_ERROR) != 0 && + EFX_DWORD_FIELD(dword, MCDI_HEADER_DATALEN) == 0) { + /* Consume status word */ + EFSYS_SPIN(EFX_MCDI_STATUS_SLEEP_US); + siena_mcdi_poll_reboot(enp); + EFSYS_UNLOCK(enp->en_eslp, state); + rc = EIO; + goto fail2; + } + + EFSYS_UNLOCK(enp->en_eslp, state); + + /* Check that the returned data is consistent */ + if (EFX_DWORD_FIELD(dword, MCDI_HEADER_CODE) != emrp->emr_cmd || + EFX_DWORD_FIELD(dword, MCDI_HEADER_SEQ) != seq) { + /* Response is for a different request */ + rc = EIO; + goto fail3; + } + + length = EFX_DWORD_FIELD(dword, MCDI_HEADER_DATALEN); + if (EFX_DWORD_FIELD(dword, MCDI_HEADER_ERROR)) { + efx_dword_t errdword; + int errcode; + + EFSYS_ASSERT3U(length, ==, 4); + EFX_BAR_TBL_READD(enp, FR_CZ_MC_TREG_SMEM, + pdur + 1 + (MC_CMD_ERR_CODE_OFST >> 2), + &errdword, B_FALSE); + errcode = EFX_DWORD_FIELD(errdword, EFX_DWORD_0); + rc = efx_mcdi_request_errcode(errcode); + if (!emrp->emr_quiet) { + EFSYS_PROBE2(mcdi_err, int, emrp->emr_cmd, + int, errcode); + } + goto fail4; + + } else { + emrp->emr_out_length_used = length; + emrp->emr_rc = 0; + siena_mcdi_request_copyout(enp, emrp); + } + + goto out; + +fail4: + if (!emrp->emr_quiet) + EFSYS_PROBE(fail4); +fail3: + if (!emrp->emr_quiet) + EFSYS_PROBE(fail3); +fail2: + if (!emrp->emr_quiet) + EFSYS_PROBE(fail2); +fail1: + if (!emrp->emr_quiet) + EFSYS_PROBE1(fail1, int, rc); + + /* Fill out error state */ + emrp->emr_rc = rc; + emrp->emr_out_length_used = 0; + + /* Reboot/Assertion */ + if (rc == EIO || rc == EINTR) + efx_mcdi_raise_exception(enp, emrp, rc); + +out: + return (B_TRUE); +} + + __checkReturn int +siena_mcdi_init( + __in efx_nic_t *enp, + __in const efx_mcdi_transport_t *mtp) +{ + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); + efx_oword_t oword; + unsigned int portnum; + int rc; + + EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA); + + /* Determine the port number to use for MCDI */ + EFX_BAR_READO(enp, FR_AZ_CS_DEBUG_REG, &oword); + portnum = EFX_OWORD_FIELD(oword, FRF_CZ_CS_PORT_NUM); + + if (portnum == 0) { + /* Presumably booted from ROM; only MCDI port 1 will work */ + emip->emi_port = 1; + } else if (portnum <= 2) { + emip->emi_port = portnum; + } else { + rc = EINVAL; + goto fail1; + } + + /* + * Wipe the atomic reboot status so subsequent MCDI requests succeed. + * BOOT_STATUS is preserved so eno_nic_probe() can boot out of the + * assertion handler. + */ + (void) siena_mcdi_poll_reboot(enp); + + return (0); + +fail1: + EFSYS_PROBE1(fail1, int, rc); + + return (rc); +} + + void +siena_mcdi_fini( + __in efx_nic_t *enp) +{ +} + + __checkReturn int +siena_mcdi_fw_update_supported( + __in efx_nic_t *enp, + __out boolean_t *supportedp) +{ + EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_SIENA); + + *supportedp = B_TRUE; + + return (0); +} + + __checkReturn int +siena_mcdi_macaddr_change_supported( + __in efx_nic_t *enp, + __out boolean_t *supportedp) +{ + EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_SIENA); + + *supportedp = B_TRUE; + + return (0); +} + +#endif /* EFSYS_OPT_SIENA && EFSYS_OPT_MCDI */ diff --git a/sys/dev/sfxge/common/siena_mon.c b/sys/dev/sfxge/common/siena_mon.c deleted file mode 100644 index 227ff155e8cc..000000000000 --- a/sys/dev/sfxge/common/siena_mon.c +++ /dev/null @@ -1,284 +0,0 @@ -/*- - * Copyright 2009 Solarflare Communications Inc. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -__FBSDID("$FreeBSD$"); - -#include "efsys.h" -#include "efx.h" -#include "efx_impl.h" - -#if EFSYS_OPT_MON_SIENA - - __checkReturn int -siena_mon_reset( - __in efx_nic_t *enp) -{ - _NOTE(ARGUNUSED(enp)) - EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA); - - return (0); -} - - __checkReturn int -siena_mon_reconfigure( - __in efx_nic_t *enp) -{ - _NOTE(ARGUNUSED(enp)) - EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA); - - return (0); -} - -#if EFSYS_OPT_MON_STATS - -#define SIENA_MON_WRONG_PORT (uint16_t)0xffff - -static __cs uint16_t __siena_mon_port0_map[] = { - EFX_MON_STAT_INT_TEMP, /* MC_CMD_SENSOR_CONTROLLER_TEMP */ - EFX_MON_STAT_EXT_TEMP, /* MC_CMD_SENSOR_PHY_COMMON_TEMP */ - EFX_MON_STAT_INT_COOLING, /* MC_CMD_SENSOR_CONTROLLER_COOLING */ - EFX_MON_STAT_EXT_TEMP, /* MC_CMD_SENSOR_PHY0_TEMP */ - EFX_MON_STAT_EXT_COOLING, /* MC_CMD_SENSOR_PHY0_COOLING */ - SIENA_MON_WRONG_PORT, /* MC_CMD_SENSOR_PHY1_TEMP */ - SIENA_MON_WRONG_PORT, /* MC_CMD_SENSOR_PHY1_COOLING */ - EFX_MON_STAT_1V, /* MC_CMD_SENSOR_IN_1V0 */ - EFX_MON_STAT_1_2V, /* MC_CMD_SENSOR_IN_1V2 */ - EFX_MON_STAT_1_8V, /* MC_CMD_SENSOR_IN_1V8 */ - EFX_MON_STAT_2_5V, /* MC_CMD_SENSOR_IN_2V5 */ - EFX_MON_STAT_3_3V, /* MC_CMD_SENSOR_IN_3V3 */ - EFX_MON_STAT_12V, /* MC_CMD_SENSOR_IN_12V0 */ - EFX_MON_STAT_1_2VA, /* MC_CMD_SENSOR_IN_1V2A */ - EFX_MON_STAT_VREF, /* MC_CMD_SENSOR_IN_VREF */ - EFX_MON_STAT_VAOE, /* MC_CMD_SENSOR_OUT_VAOE */ - EFX_MON_STAT_AOE_TEMP, /* MC_CMD_SENSOR_AOE_TEMP */ - EFX_MON_STAT_PSU_AOE_TEMP, /* MC_CMD_SENSOR_PSU_AOE_TEMP */ - EFX_MON_STAT_PSU_TEMP, /* MC_CMD_SENSOR_PSE_TEMP */ - EFX_MON_STAT_FAN0, /* MC_CMD_SENSOR_FAN_0 */ - EFX_MON_STAT_FAN1, /* MC_CMD_SENSOR_FAN_1 */ - EFX_MON_STAT_FAN2, /* MC_CMD_SENSOR_FAN_2 */ - EFX_MON_STAT_FAN3, /* MC_CMD_SENSOR_FAN_3 */ - EFX_MON_STAT_FAN4, /* MC_CMD_SENSOR_FAN_4 */ - EFX_MON_STAT_VAOE_IN, /* MC_CMD_SENSOR_IN_VAOE */ - EFX_MON_STAT_IAOE, /* MC_CMD_SENSOR_OUT_IAOE */ - EFX_MON_STAT_IAOE_IN, /* MC_CMD_SENSOR_IN_IAOE */ - -}; - -static __cs uint16_t __siena_mon_port1_map[] = { - EFX_MON_STAT_INT_TEMP, /* MC_CMD_SENSOR_CONTROLLER_TEMP */ - EFX_MON_STAT_EXT_TEMP, /* MC_CMD_SENSOR_PHY_COMMON_TEMP */ - EFX_MON_STAT_INT_COOLING, /* MC_CMD_SENSOR_CONTROLLER_COOLING */ - SIENA_MON_WRONG_PORT, /* MC_CMD_SENSOR_PHY0_TEMP */ - SIENA_MON_WRONG_PORT, /* MC_CMD_SENSOR_PHY0_COOLING */ - EFX_MON_STAT_EXT_TEMP, /* MC_CMD_SENSOR_PHY1_TEMP */ - EFX_MON_STAT_EXT_COOLING, /* MC_CMD_SENSOR_PHY1_COOLING */ - EFX_MON_STAT_1V, /* MC_CMD_SENSOR_IN_1V0 */ - EFX_MON_STAT_1_2V, /* MC_CMD_SENSOR_IN_1V2 */ - EFX_MON_STAT_1_8V, /* MC_CMD_SENSOR_IN_1V8 */ - EFX_MON_STAT_2_5V, /* MC_CMD_SENSOR_IN_2V5 */ - EFX_MON_STAT_3_3V, /* MC_CMD_SENSOR_IN_3V3 */ - EFX_MON_STAT_12V, /* MC_CMD_SENSOR_IN_12V0 */ - EFX_MON_STAT_1_2VA, /* MC_CMD_SENSOR_IN_1V2A */ - EFX_MON_STAT_VREF, /* MC_CMD_SENSOR_IN_VREF */ - EFX_MON_STAT_VAOE, /* MC_CMD_SENSOR_OUT_VAOE */ - EFX_MON_STAT_AOE_TEMP, /* MC_CMD_SENSOR_AOE_TEMP */ - EFX_MON_STAT_PSU_AOE_TEMP, /* MC_CMD_SENSOR_PSU_AOE_TEMP */ - EFX_MON_STAT_PSU_TEMP, /* MC_CMD_SENSOR_PSE_TEMP */ - EFX_MON_STAT_FAN0, /* MC_CMD_SENSOR_FAN_0 */ - EFX_MON_STAT_FAN1, /* MC_CMD_SENSOR_FAN_1 */ - EFX_MON_STAT_FAN2, /* MC_CMD_SENSOR_FAN_2 */ - EFX_MON_STAT_FAN3, /* MC_CMD_SENSOR_FAN_3 */ - EFX_MON_STAT_FAN4, /* MC_CMD_SENSOR_FAN_4 */ - EFX_MON_STAT_VAOE_IN, /* MC_CMD_SENSOR_IN_VAOE */ - EFX_MON_STAT_IAOE, /* MC_CMD_SENSOR_OUT_IAOE */ - EFX_MON_STAT_IAOE_IN, /* MC_CMD_SENSOR_IN_IAOE */ - -}; - -#define SIENA_STATIC_SENSOR_ASSERT(_field) \ - EFX_STATIC_ASSERT(MC_CMD_SENSOR_STATE_ ## _field \ - == EFX_MON_STAT_STATE_ ## _field) - - void -siena_mon_decode_stats( - __in efx_nic_t *enp, - __in uint32_t dmask, - __in_opt efsys_mem_t *esmp, - __out_opt uint32_t *vmaskp, - __out_ecount_opt(EFX_MON_NSTATS) efx_mon_stat_value_t *value) -{ - efx_mcdi_iface_t *emip = &(enp->en_u.siena.enu_mip); - uint16_t *sensor_map; - uint16_t mc_sensor; - size_t mc_sensor_max; - uint32_t vmask = 0; - uint32_t idx = 0; - - /* Assert the MC_CMD_SENSOR and EFX_MON_STATE namespaces agree */ - SIENA_STATIC_SENSOR_ASSERT(OK); - SIENA_STATIC_SENSOR_ASSERT(WARNING); - SIENA_STATIC_SENSOR_ASSERT(FATAL); - SIENA_STATIC_SENSOR_ASSERT(BROKEN); - - EFX_STATIC_ASSERT(sizeof (__siena_mon_port1_map) - == sizeof (__siena_mon_port0_map)); - mc_sensor_max = EFX_ARRAY_SIZE(__siena_mon_port0_map); - sensor_map = (emip->emi_port == 1) - ? __siena_mon_port0_map - : __siena_mon_port1_map; - - /* - * dmask may legitimately contain sensors not understood by the driver - */ - for (mc_sensor = 0; mc_sensor < mc_sensor_max; ++mc_sensor) { - uint16_t efx_sensor = sensor_map[mc_sensor]; - - if (~dmask & (1 << mc_sensor)) - continue; - idx++; - - if (efx_sensor == SIENA_MON_WRONG_PORT) - continue; - EFSYS_ASSERT(efx_sensor < EFX_MON_NSTATS); - - vmask |= (1 << efx_sensor); - if (value != NULL && esmp != NULL && !EFSYS_MEM_IS_NULL(esmp)) { - efx_mon_stat_value_t *emsvp = value + efx_sensor; - efx_dword_t dword; - EFSYS_MEM_READD(esmp, 4 * (idx - 1), &dword); - emsvp->emsv_value = - (uint16_t)EFX_DWORD_FIELD( - dword, - MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_VALUE); - emsvp->emsv_state = - (uint16_t)EFX_DWORD_FIELD( - dword, - MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_STATE); - } - } - - if (vmaskp != NULL) - *vmaskp = vmask; -} - - __checkReturn int -siena_mon_ev( - __in efx_nic_t *enp, - __in efx_qword_t *eqp, - __out efx_mon_stat_t *idp, - __out efx_mon_stat_value_t *valuep) -{ - efx_mcdi_iface_t *emip = &(enp->en_u.siena.enu_mip); - efx_nic_cfg_t *encp = &(enp->en_nic_cfg); - uint16_t ev_monitor; - uint16_t ev_state; - uint16_t ev_value; - uint16_t *sensor_map; - efx_mon_stat_t id; - int rc; - - sensor_map = (emip->emi_port == 1) - ? __siena_mon_port0_map - : __siena_mon_port1_map; - - ev_monitor = (uint16_t)MCDI_EV_FIELD(eqp, SENSOREVT_MONITOR); - ev_state = (uint16_t)MCDI_EV_FIELD(eqp, SENSOREVT_STATE); - ev_value = (uint16_t)MCDI_EV_FIELD(eqp, SENSOREVT_VALUE); - - /* Hardware must support this statistic */ - EFSYS_ASSERT((1 << ev_monitor) & encp->enc_siena_mon_stat_mask); - - /* But we don't have to understand it */ - if (ev_monitor >= EFX_ARRAY_SIZE(__siena_mon_port0_map)) { - rc = ENOTSUP; - goto fail1; - } - - id = sensor_map[ev_monitor]; - if (id == SIENA_MON_WRONG_PORT) - return (ENODEV); - EFSYS_ASSERT(id < EFX_MON_NSTATS); - - *idp = id; - valuep->emsv_value = ev_value; - valuep->emsv_state = ev_state; - - return (0); - -fail1: - EFSYS_PROBE1(fail1, int, rc); - - return (rc); -} - - __checkReturn int -siena_mon_stats_update( - __in efx_nic_t *enp, - __in efsys_mem_t *esmp, - __out_ecount(EFX_MON_NSTATS) efx_mon_stat_value_t *values) -{ - efx_nic_cfg_t *encp = &(enp->en_nic_cfg); - uint32_t dmask = encp->enc_siena_mon_stat_mask; - uint32_t vmask; - uint8_t payload[MC_CMD_READ_SENSORS_IN_LEN]; - efx_mcdi_req_t req; - int rc; - - EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA); - - req.emr_cmd = MC_CMD_READ_SENSORS; - req.emr_in_buf = payload; - req.emr_in_length = sizeof (payload); - EFX_STATIC_ASSERT(MC_CMD_READ_SENSORS_OUT_LEN == 0); - req.emr_out_buf = NULL; - req.emr_out_length = 0; - - MCDI_IN_SET_DWORD(req, READ_SENSORS_IN_DMA_ADDR_LO, - EFSYS_MEM_ADDR(esmp) & 0xffffffff); - MCDI_IN_SET_DWORD(req, READ_SENSORS_IN_DMA_ADDR_HI, - EFSYS_MEM_ADDR(esmp) >> 32); - - efx_mcdi_execute(enp, &req); - - if (req.emr_rc != 0) { - rc = req.emr_rc; - goto fail1; - } - - siena_mon_decode_stats(enp, dmask, esmp, &vmask, values); - EFSYS_ASSERT(vmask == encp->enc_mon_stat_mask); - - return (0); - -fail1: - EFSYS_PROBE1(fail1, int, rc); - - return (rc); -} - -#endif /* EFSYS_OPT_MON_STATS */ - -#endif /* EFSYS_OPT_MON_SIENA */ diff --git a/sys/dev/sfxge/common/siena_nic.c b/sys/dev/sfxge/common/siena_nic.c index 1276c9374582..3dcf48ec6cdb 100644 --- a/sys/dev/sfxge/common/siena_nic.c +++ b/sys/dev/sfxge/common/siena_nic.c @@ -1,26 +1,31 @@ /*- - * Copyright 2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2009-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -29,6 +34,7 @@ __FBSDID("$FreeBSD$"); #include "efsys.h" #include "efx.h" #include "efx_impl.h" +#include "mcdi_mon.h" #if EFSYS_OPT_SIENA @@ -38,15 +44,16 @@ siena_nic_get_partn_mask( __out unsigned int *maskp) { efx_mcdi_req_t req; - uint8_t outbuf[MC_CMD_NVRAM_TYPES_OUT_LEN]; + uint8_t payload[MAX(MC_CMD_NVRAM_TYPES_IN_LEN, + MC_CMD_NVRAM_TYPES_OUT_LEN)]; int rc; + (void) memset(payload, 0, sizeof (payload)); req.emr_cmd = MC_CMD_NVRAM_TYPES; - EFX_STATIC_ASSERT(MC_CMD_NVRAM_TYPES_IN_LEN == 0); - req.emr_in_buf = NULL; - req.emr_in_length = 0; - req.emr_out_buf = outbuf; - req.emr_out_length = sizeof (outbuf); + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_NVRAM_TYPES_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_NVRAM_TYPES_OUT_LEN; efx_mcdi_execute(enp, &req); @@ -72,193 +79,17 @@ siena_nic_get_partn_mask( return (rc); } -static __checkReturn int -siena_nic_exit_assertion_handler( - __in efx_nic_t *enp) -{ - efx_mcdi_req_t req; - uint8_t payload[MC_CMD_REBOOT_IN_LEN]; - int rc; - - req.emr_cmd = MC_CMD_REBOOT; - req.emr_in_buf = payload; - req.emr_in_length = MC_CMD_REBOOT_IN_LEN; - EFX_STATIC_ASSERT(MC_CMD_REBOOT_OUT_LEN == 0); - req.emr_out_buf = NULL; - req.emr_out_length = 0; - - MCDI_IN_SET_DWORD(req, REBOOT_IN_FLAGS, - MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION); - - efx_mcdi_execute(enp, &req); - - if (req.emr_rc != 0 && req.emr_rc != EIO) { - rc = req.emr_rc; - goto fail1; - } - - return (0); - -fail1: - EFSYS_PROBE1(fail1, int, rc); - - return (rc); -} - -static __checkReturn int -siena_nic_read_assertion( - __in efx_nic_t *enp) -{ - efx_mcdi_req_t req; - uint8_t payload[MAX(MC_CMD_GET_ASSERTS_IN_LEN, - MC_CMD_GET_ASSERTS_OUT_LEN)]; - const char *reason; - unsigned int flags; - unsigned int index; - unsigned int ofst; - int retry; - int rc; - - /* - * Before we attempt to chat to the MC, we should verify that the MC - * isn't in it's assertion handler, either due to a previous reboot, - * or because we're reinitializing due to an eec_exception(). - * - * Use GET_ASSERTS to read any assertion state that may be present. - * Retry this command twice. Once because a boot-time assertion failure - * might cause the 1st MCDI request to fail. And once again because - * we might race with siena_nic_exit_assertion_handler() running on the - * other port. - */ - retry = 2; - do { - req.emr_cmd = MC_CMD_GET_ASSERTS; - req.emr_in_buf = payload; - req.emr_in_length = MC_CMD_GET_ASSERTS_IN_LEN; - req.emr_out_buf = payload; - req.emr_out_length = MC_CMD_GET_ASSERTS_OUT_LEN; - - MCDI_IN_SET_DWORD(req, GET_ASSERTS_IN_CLEAR, 1); - efx_mcdi_execute(enp, &req); - - } while ((req.emr_rc == EINTR || req.emr_rc == EIO) && retry-- > 0); - - if (req.emr_rc != 0) { - rc = req.emr_rc; - goto fail1; - } - - if (req.emr_out_length_used < MC_CMD_GET_ASSERTS_OUT_LEN) { - rc = EMSGSIZE; - goto fail2; - } - - /* Print out any assertion state recorded */ - flags = MCDI_OUT_DWORD(req, GET_ASSERTS_OUT_GLOBAL_FLAGS); - if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS) - return (0); - - reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL) - ? "system-level assertion" - : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL) - ? "thread-level assertion" - : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED) - ? "watchdog reset" - : "unknown assertion"; - EFSYS_PROBE3(mcpu_assertion, - const char *, reason, unsigned int, - MCDI_OUT_DWORD(req, GET_ASSERTS_OUT_SAVED_PC_OFFS), - unsigned int, - MCDI_OUT_DWORD(req, GET_ASSERTS_OUT_THREAD_OFFS)); - - /* Print out the registers */ - ofst = MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_OFST; - for (index = 1; index < 32; index++) { - EFSYS_PROBE2(mcpu_register, unsigned int, index, unsigned int, - EFX_DWORD_FIELD(*MCDI_OUT(req, efx_dword_t, ofst), - EFX_DWORD_0)); - ofst += sizeof (efx_dword_t); - } - EFSYS_ASSERT(ofst <= MC_CMD_GET_ASSERTS_OUT_LEN); - - return (0); - -fail2: - EFSYS_PROBE(fail2); -fail1: - EFSYS_PROBE1(fail1, int, rc); - - return (rc); -} - -static __checkReturn int -siena_nic_attach( - __in efx_nic_t *enp, - __in boolean_t attach) -{ - efx_mcdi_req_t req; - uint8_t payload[MC_CMD_DRV_ATTACH_IN_LEN]; - int rc; - - req.emr_cmd = MC_CMD_DRV_ATTACH; - req.emr_in_buf = payload; - req.emr_in_length = MC_CMD_DRV_ATTACH_IN_LEN; - req.emr_out_buf = NULL; - req.emr_out_length = 0; - - MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_NEW_STATE, attach ? 1 : 0); - MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_UPDATE, 1); - - efx_mcdi_execute(enp, &req); - - if (req.emr_rc != 0) { - rc = req.emr_rc; - goto fail1; - } - - if (req.emr_out_length_used < MC_CMD_DRV_ATTACH_OUT_LEN) { - rc = EMSGSIZE; - goto fail2; - } - - return (0); - -fail2: - EFSYS_PROBE(fail2); -fail1: - EFSYS_PROBE1(fail1, int, rc); - - return (rc); -} - #if EFSYS_OPT_PCIE_TUNE __checkReturn int siena_nic_pcie_extended_sync( __in efx_nic_t *enp) { - uint8_t inbuf[MC_CMD_WORKAROUND_IN_LEN]; - efx_mcdi_req_t req; int rc; - EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_SIENA); - - req.emr_cmd = MC_CMD_WORKAROUND; - req.emr_in_buf = inbuf; - req.emr_in_length = sizeof (inbuf); - EFX_STATIC_ASSERT(MC_CMD_WORKAROUND_OUT_LEN == 0); - req.emr_out_buf = NULL; - req.emr_out_length = 0; - - MCDI_IN_SET_DWORD(req, WORKAROUND_IN_TYPE, MC_CMD_WORKAROUND_BUG17230); - MCDI_IN_SET_DWORD(req, WORKAROUND_IN_ENABLED, 1); - - efx_mcdi_execute(enp, &req); - - if (req.emr_rc != 0) { - rc = req.emr_rc; + if ((rc = efx_mcdi_set_workaround(enp, MC_CMD_WORKAROUND_BUG17230, + B_TRUE, NULL) != 0)) goto fail1; - } return (0); @@ -275,58 +106,33 @@ siena_board_cfg( __in efx_nic_t *enp) { efx_nic_cfg_t *encp = &(enp->en_nic_cfg); - efx_mcdi_iface_t *emip = &(enp->en_u.siena.enu_mip); - uint8_t outbuf[MAX(MC_CMD_GET_BOARD_CFG_OUT_LENMIN, - MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN)]; - efx_mcdi_req_t req; - uint8_t *mac_addr; - efx_dword_t *capabilities; + uint8_t mac_addr[6]; + efx_dword_t capabilities; + uint32_t board_type; + uint32_t nevq, nrxq, ntxq; int rc; + /* External port identifier using one-based port numbering */ + encp->enc_external_port = (uint8_t)enp->en_mcdi.em_emip.emi_port; + /* Board configuration */ - req.emr_cmd = MC_CMD_GET_BOARD_CFG; - EFX_STATIC_ASSERT(MC_CMD_GET_BOARD_CFG_IN_LEN == 0); - req.emr_in_buf = NULL; - req.emr_in_length = 0; - req.emr_out_buf = outbuf; - req.emr_out_length = MC_CMD_GET_BOARD_CFG_OUT_LENMIN; - - efx_mcdi_execute(enp, &req); - - if (req.emr_rc != 0) { - rc = req.emr_rc; + if ((rc = efx_mcdi_get_board_cfg(enp, &board_type, + &capabilities, mac_addr)) != 0) goto fail1; - } - if (req.emr_out_length_used < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) { - rc = EMSGSIZE; - goto fail2; - } - - if (emip->emi_port == 1) { - mac_addr = MCDI_OUT2(req, uint8_t, - GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0); - capabilities = MCDI_OUT2(req, efx_dword_t, - GET_BOARD_CFG_OUT_CAPABILITIES_PORT0); - } else { - mac_addr = MCDI_OUT2(req, uint8_t, - GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1); - capabilities = MCDI_OUT2(req, efx_dword_t, - GET_BOARD_CFG_OUT_CAPABILITIES_PORT1); - } EFX_MAC_ADDR_COPY(encp->enc_mac_addr, mac_addr); - encp->enc_board_type = MCDI_OUT_DWORD(req, - GET_BOARD_CFG_OUT_BOARD_TYPE); + encp->enc_board_type = board_type; /* Additional capabilities */ encp->enc_clk_mult = 1; - if (MCDI_CMD_DWORD_FIELD(capabilities, CAPABILITIES_TURBO)) { + if (EFX_DWORD_FIELD(capabilities, MC_CMD_CAPABILITIES_TURBO)) { enp->en_features |= EFX_FEATURE_TURBO; - if (MCDI_CMD_DWORD_FIELD(capabilities, - CAPABILITIES_TURBO_ACTIVE)) + if (EFX_DWORD_FIELD(capabilities, + MC_CMD_CAPABILITIES_TURBO_ACTIVE)) { encp->enc_clk_mult = 2; + } } encp->enc_evq_timer_quantum_ns = @@ -334,48 +140,39 @@ siena_board_cfg( encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns << FRF_CZ_TC_TIMER_VAL_WIDTH) / 1000; + /* When hash header insertion is enabled, Siena inserts 16 bytes */ + encp->enc_rx_prefix_size = 16; + + /* Alignment for receive packet DMA buffers */ + encp->enc_rx_buf_align_start = 1; + encp->enc_rx_buf_align_end = 1; + + /* Alignment for WPTR updates */ + encp->enc_rx_push_align = 1; + /* Resource limits */ - req.emr_cmd = MC_CMD_GET_RESOURCE_LIMITS; - EFX_STATIC_ASSERT(MC_CMD_GET_RESOURCE_LIMITS_IN_LEN == 0); - req.emr_in_buf = NULL; - req.emr_in_length = 0; - req.emr_out_buf = outbuf; - req.emr_out_length = MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN; + rc = efx_mcdi_get_resource_limits(enp, &nevq, &nrxq, &ntxq); + if (rc != 0) { + if (rc != ENOTSUP) + goto fail2; - efx_mcdi_execute(enp, &req); - - if (req.emr_rc == 0) { - if (req.emr_out_length_used < - MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN) { - rc = EMSGSIZE; - goto fail3; - } - - encp->enc_evq_limit = MCDI_OUT_DWORD(req, - GET_RESOURCE_LIMITS_OUT_EVQ); - encp->enc_txq_limit = MIN(EFX_TXQ_LIMIT_TARGET, - MCDI_OUT_DWORD(req, GET_RESOURCE_LIMITS_OUT_TXQ)); - encp->enc_rxq_limit = MIN(EFX_RXQ_LIMIT_TARGET, - MCDI_OUT_DWORD(req, GET_RESOURCE_LIMITS_OUT_RXQ)); - } else if (req.emr_rc == ENOTSUP) { - encp->enc_evq_limit = 1024; - encp->enc_txq_limit = EFX_TXQ_LIMIT_TARGET; - encp->enc_rxq_limit = EFX_RXQ_LIMIT_TARGET; - } else { - rc = req.emr_rc; - goto fail4; + nevq = 1024; + nrxq = EFX_RXQ_LIMIT_TARGET; + ntxq = EFX_TXQ_LIMIT_TARGET; } + encp->enc_evq_limit = nevq; + encp->enc_rxq_limit = MIN(EFX_RXQ_LIMIT_TARGET, nrxq); + encp->enc_txq_limit = MIN(EFX_TXQ_LIMIT_TARGET, ntxq); encp->enc_buftbl_limit = SIENA_SRAM_ROWS - (encp->enc_txq_limit * EFX_TXQ_DC_NDESCS(EFX_TXQ_DC_SIZE)) - (encp->enc_rxq_limit * EFX_RXQ_DC_NDESCS(EFX_RXQ_DC_SIZE)); + encp->enc_hw_tx_insert_vlan_enabled = B_FALSE; + encp->enc_fw_assisted_tso_enabled = B_FALSE; + return (0); -fail4: - EFSYS_PROBE(fail4); -fail3: - EFSYS_PROBE(fail3); fail2: EFSYS_PROBE(fail2); fail1: @@ -388,220 +185,27 @@ static __checkReturn int siena_phy_cfg( __in efx_nic_t *enp) { - efx_port_t *epp = &(enp->en_port); efx_nic_cfg_t *encp = &(enp->en_nic_cfg); - efx_mcdi_req_t req; - uint8_t outbuf[MC_CMD_GET_PHY_CFG_OUT_LEN]; int rc; - req.emr_cmd = MC_CMD_GET_PHY_CFG; - EFX_STATIC_ASSERT(MC_CMD_GET_PHY_CFG_IN_LEN == 0); - req.emr_in_buf = NULL; - req.emr_in_length = 0; - req.emr_out_buf = outbuf; - req.emr_out_length = sizeof (outbuf); - - efx_mcdi_execute(enp, &req); - - if (req.emr_rc != 0) { - rc = req.emr_rc; + /* Fill out fields in enp->en_port and enp->en_nic_cfg from MCDI */ + if ((rc = efx_mcdi_get_phy_cfg(enp)) != 0) goto fail1; - } - - if (req.emr_out_length_used < MC_CMD_GET_PHY_CFG_OUT_LEN) { - rc = EMSGSIZE; - goto fail2; - } - - encp->enc_phy_type = MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_TYPE); -#if EFSYS_OPT_NAMES - (void) strncpy(encp->enc_phy_name, - MCDI_OUT2(req, char, GET_PHY_CFG_OUT_NAME), - MIN(sizeof (encp->enc_phy_name) - 1, - MC_CMD_GET_PHY_CFG_OUT_NAME_LEN)); -#endif /* EFSYS_OPT_NAMES */ - (void) memset(encp->enc_phy_revision, 0, - sizeof (encp->enc_phy_revision)); - memcpy(encp->enc_phy_revision, - MCDI_OUT2(req, char, GET_PHY_CFG_OUT_REVISION), - MIN(sizeof (encp->enc_phy_revision) - 1, - MC_CMD_GET_PHY_CFG_OUT_REVISION_LEN)); -#if EFSYS_OPT_PHY_LED_CONTROL - encp->enc_led_mask = ((1 << EFX_PHY_LED_DEFAULT) | - (1 << EFX_PHY_LED_OFF) | - (1 << EFX_PHY_LED_ON)); -#endif /* EFSYS_OPT_PHY_LED_CONTROL */ - -#if EFSYS_OPT_PHY_PROPS - encp->enc_phy_nprops = 0; -#endif /* EFSYS_OPT_PHY_PROPS */ - - /* Get the media type of the fixed port, if recognised. */ - EFX_STATIC_ASSERT(MC_CMD_MEDIA_XAUI == EFX_PHY_MEDIA_XAUI); - EFX_STATIC_ASSERT(MC_CMD_MEDIA_CX4 == EFX_PHY_MEDIA_CX4); - EFX_STATIC_ASSERT(MC_CMD_MEDIA_KX4 == EFX_PHY_MEDIA_KX4); - EFX_STATIC_ASSERT(MC_CMD_MEDIA_XFP == EFX_PHY_MEDIA_XFP); - EFX_STATIC_ASSERT(MC_CMD_MEDIA_SFP_PLUS == EFX_PHY_MEDIA_SFP_PLUS); - EFX_STATIC_ASSERT(MC_CMD_MEDIA_BASE_T == EFX_PHY_MEDIA_BASE_T); - epp->ep_fixed_port_type = - MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_MEDIA_TYPE); - if (epp->ep_fixed_port_type >= EFX_PHY_MEDIA_NTYPES) - epp->ep_fixed_port_type = EFX_PHY_MEDIA_INVALID; - - epp->ep_phy_cap_mask = - MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_SUPPORTED_CAP); -#if EFSYS_OPT_PHY_FLAGS - encp->enc_phy_flags_mask = MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_FLAGS); -#endif /* EFSYS_OPT_PHY_FLAGS */ - - encp->enc_port = (uint8_t)MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_PRT); - - /* Populate internal state */ - encp->enc_siena_channel = - (uint8_t)MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_CHANNEL); #if EFSYS_OPT_PHY_STATS - encp->enc_siena_phy_stat_mask = - MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_STATS_MASK); - /* Convert the MCDI statistic mask into the EFX_PHY_STAT mask */ - siena_phy_decode_stats(enp, encp->enc_siena_phy_stat_mask, + siena_phy_decode_stats(enp, encp->enc_mcdi_phy_stat_mask, NULL, &encp->enc_phy_stat_mask, NULL); #endif /* EFSYS_OPT_PHY_STATS */ -#if EFSYS_OPT_PHY_BIST - encp->enc_bist_mask = 0; - if (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS, - GET_PHY_CFG_OUT_BIST_CABLE_SHORT)) - encp->enc_bist_mask |= (1 << EFX_PHY_BIST_TYPE_CABLE_SHORT); - if (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS, - GET_PHY_CFG_OUT_BIST_CABLE_LONG)) - encp->enc_bist_mask |= (1 << EFX_PHY_BIST_TYPE_CABLE_LONG); - if (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS, - GET_PHY_CFG_OUT_BIST)) - encp->enc_bist_mask |= (1 << EFX_PHY_BIST_TYPE_NORMAL); -#endif /* EFSYS_OPT_PHY_BIST */ - return (0); -fail2: - EFSYS_PROBE(fail2); fail1: EFSYS_PROBE1(fail1, int, rc); return (rc); } -#if EFSYS_OPT_LOOPBACK - -static __checkReturn int -siena_loopback_cfg( - __in efx_nic_t *enp) -{ - efx_nic_cfg_t *encp = &(enp->en_nic_cfg); - efx_mcdi_req_t req; - uint8_t outbuf[MC_CMD_GET_LOOPBACK_MODES_OUT_LEN]; - int rc; - - req.emr_cmd = MC_CMD_GET_LOOPBACK_MODES; - EFX_STATIC_ASSERT(MC_CMD_GET_LOOPBACK_MODES_IN_LEN == 0); - req.emr_in_buf = NULL; - req.emr_in_length = 0; - req.emr_out_buf = outbuf; - req.emr_out_length = sizeof (outbuf); - - efx_mcdi_execute(enp, &req); - - if (req.emr_rc != 0) { - rc = req.emr_rc; - goto fail1; - } - - if (req.emr_out_length_used < MC_CMD_GET_LOOPBACK_MODES_OUT_LEN) { - rc = EMSGSIZE; - goto fail2; - } - - /* - * We assert the MC_CMD_LOOPBACK and EFX_LOOPBACK namespaces agree - * in siena_phy.c:siena_phy_get_link() - */ - encp->enc_loopback_types[EFX_LINK_100FDX] = EFX_LOOPBACK_MASK & - MCDI_OUT_DWORD(req, GET_LOOPBACK_MODES_OUT_100M) & - MCDI_OUT_DWORD(req, GET_LOOPBACK_MODES_OUT_SUGGESTED); - encp->enc_loopback_types[EFX_LINK_1000FDX] = EFX_LOOPBACK_MASK & - MCDI_OUT_DWORD(req, GET_LOOPBACK_MODES_OUT_1G) & - MCDI_OUT_DWORD(req, GET_LOOPBACK_MODES_OUT_SUGGESTED); - encp->enc_loopback_types[EFX_LINK_10000FDX] = EFX_LOOPBACK_MASK & - MCDI_OUT_DWORD(req, GET_LOOPBACK_MODES_OUT_10G) & - MCDI_OUT_DWORD(req, GET_LOOPBACK_MODES_OUT_SUGGESTED); - encp->enc_loopback_types[EFX_LINK_UNKNOWN] = - (1 << EFX_LOOPBACK_OFF) | - encp->enc_loopback_types[EFX_LINK_100FDX] | - encp->enc_loopback_types[EFX_LINK_1000FDX] | - encp->enc_loopback_types[EFX_LINK_10000FDX]; - - return (0); - -fail2: - EFSYS_PROBE(fail2); -fail1: - EFSYS_PROBE1(fail1, int, rc); - - return (rc); -} - -#endif /* EFSYS_OPT_LOOPBACK */ - -#if EFSYS_OPT_MON_STATS - -static __checkReturn int -siena_monitor_cfg( - __in efx_nic_t *enp) -{ - efx_nic_cfg_t *encp = &(enp->en_nic_cfg); - efx_mcdi_req_t req; - uint8_t outbuf[MCDI_CTL_SDU_LEN_MAX]; - int rc; - - req.emr_cmd = MC_CMD_SENSOR_INFO; - EFX_STATIC_ASSERT(MC_CMD_SENSOR_INFO_IN_LEN == 0); - req.emr_in_buf = NULL; - req.emr_in_length = 0; - req.emr_out_buf = outbuf; - req.emr_out_length = sizeof (outbuf); - - efx_mcdi_execute(enp, &req); - - if (req.emr_rc != 0) { - rc = req.emr_rc; - goto fail1; - } - - if (req.emr_out_length_used < MC_CMD_SENSOR_INFO_OUT_MASK_OFST + 4) { - rc = EMSGSIZE; - goto fail2; - } - - encp->enc_siena_mon_stat_mask = - MCDI_OUT_DWORD(req, SENSOR_INFO_OUT_MASK); - encp->enc_mon_type = EFX_MON_SFC90X0; - - siena_mon_decode_stats(enp, encp->enc_siena_mon_stat_mask, - NULL, &(encp->enc_mon_stat_mask), NULL); - - return (0); - -fail2: - EFSYS_PROBE(fail2); -fail1: - EFSYS_PROBE1(fail1, int, rc); - - return (rc); -} - -#endif /* EFSYS_OPT_MON_STATS */ - __checkReturn int siena_nic_probe( __in efx_nic_t *enp) @@ -610,78 +214,93 @@ siena_nic_probe( efx_nic_cfg_t *encp = &(enp->en_nic_cfg); siena_link_state_t sls; unsigned int mask; + efx_oword_t oword; int rc; EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_SIENA); - /* Read clear any assertion state */ - if ((rc = siena_nic_read_assertion(enp)) != 0) + /* Test BIU */ + if ((rc = efx_nic_biu_test(enp)) != 0) goto fail1; - /* Exit the assertion handler */ - if ((rc = siena_nic_exit_assertion_handler(enp)) != 0) + /* Clear the region register */ + EFX_POPULATE_OWORD_4(oword, + FRF_AZ_ADR_REGION0, 0, + FRF_AZ_ADR_REGION1, (1 << 16), + FRF_AZ_ADR_REGION2, (2 << 16), + FRF_AZ_ADR_REGION3, (3 << 16)); + EFX_BAR_WRITEO(enp, FR_AZ_ADR_REGION_REG, &oword); + + /* Read clear any assertion state */ + if ((rc = efx_mcdi_read_assertion(enp)) != 0) goto fail2; - /* Wrestle control from the BMC */ - if ((rc = siena_nic_attach(enp, B_TRUE)) != 0) + /* Exit the assertion handler */ + if ((rc = efx_mcdi_exit_assertion_handler(enp)) != 0) goto fail3; - if ((rc = siena_board_cfg(enp)) != 0) + /* Wrestle control from the BMC */ + if ((rc = efx_mcdi_drv_attach(enp, B_TRUE)) != 0) goto fail4; - if ((rc = siena_phy_cfg(enp)) != 0) + if ((rc = siena_board_cfg(enp)) != 0) goto fail5; + if ((rc = siena_phy_cfg(enp)) != 0) + goto fail6; + /* Obtain the default PHY advertised capabilities */ if ((rc = siena_nic_reset(enp)) != 0) - goto fail6; - if ((rc = siena_phy_get_link(enp, &sls)) != 0) goto fail7; + if ((rc = siena_phy_get_link(enp, &sls)) != 0) + goto fail8; epp->ep_default_adv_cap_mask = sls.sls_adv_cap_mask; epp->ep_adv_cap_mask = sls.sls_adv_cap_mask; #if EFSYS_OPT_VPD || EFSYS_OPT_NVRAM if ((rc = siena_nic_get_partn_mask(enp, &mask)) != 0) - goto fail8; + goto fail9; enp->en_u.siena.enu_partn_mask = mask; #endif #if EFSYS_OPT_MAC_STATS /* Wipe the MAC statistics */ - if ((rc = siena_mac_stats_clear(enp)) != 0) - goto fail9; -#endif - -#if EFSYS_OPT_LOOPBACK - if ((rc = siena_loopback_cfg(enp)) != 0) + if ((rc = efx_mcdi_mac_stats_clear(enp)) != 0) goto fail10; #endif -#if EFSYS_OPT_MON_STATS - if ((rc = siena_monitor_cfg(enp)) != 0) +#if EFSYS_OPT_LOOPBACK + if ((rc = efx_mcdi_get_loopback_modes(enp)) != 0) goto fail11; #endif +#if EFSYS_OPT_MON_STATS + if ((rc = mcdi_mon_cfg_build(enp)) != 0) + goto fail12; +#endif + encp->enc_features = enp->en_features; return (0); #if EFSYS_OPT_MON_STATS +fail12: + EFSYS_PROBE(fail12); +#endif +#if EFSYS_OPT_LOOPBACK fail11: EFSYS_PROBE(fail11); #endif -#if EFSYS_OPT_LOOPBACK +#if EFSYS_OPT_MAC_STATS fail10: EFSYS_PROBE(fail10); #endif -#if EFSYS_OPT_MAC_STATS +#if EFSYS_OPT_VPD || EFSYS_OPT_NVRAM fail9: EFSYS_PROBE(fail9); #endif -#if EFSYS_OPT_VPD || EFSYS_OPT_NVRAM fail8: EFSYS_PROBE(fail8); -#endif fail7: EFSYS_PROBE(fail7); fail6: @@ -710,16 +329,20 @@ siena_nic_reset( EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_SIENA); /* siena_nic_reset() is called to recover from BADASSERT failures. */ - if ((rc = siena_nic_read_assertion(enp)) != 0) + if ((rc = efx_mcdi_read_assertion(enp)) != 0) goto fail1; - if ((rc = siena_nic_exit_assertion_handler(enp)) != 0) + if ((rc = efx_mcdi_exit_assertion_handler(enp)) != 0) goto fail2; - req.emr_cmd = MC_CMD_PORT_RESET; - EFX_STATIC_ASSERT(MC_CMD_PORT_RESET_IN_LEN == 0); + /* + * Bug24908: ENTITY_RESET_IN_LEN is non zero but zero may be supplied + * for backwards compatibility with PORT_RESET_IN_LEN. + */ + EFX_STATIC_ASSERT(MC_CMD_ENTITY_RESET_OUT_LEN == 0); + + req.emr_cmd = MC_CMD_ENTITY_RESET; req.emr_in_buf = NULL; req.emr_in_length = 0; - EFX_STATIC_ASSERT(MC_CMD_PORT_RESET_OUT_LEN == 0); req.emr_out_buf = NULL; req.emr_out_length = 0; @@ -742,40 +365,6 @@ siena_nic_reset( return (0); } -static __checkReturn int -siena_nic_logging( - __in efx_nic_t *enp) -{ - efx_mcdi_req_t req; - uint8_t payload[MC_CMD_LOG_CTRL_IN_LEN]; - int rc; - - req.emr_cmd = MC_CMD_LOG_CTRL; - req.emr_in_buf = payload; - req.emr_in_length = MC_CMD_LOG_CTRL_IN_LEN; - EFX_STATIC_ASSERT(MC_CMD_LOG_CTRL_OUT_LEN == 0); - req.emr_out_buf = NULL; - req.emr_out_length = 0; - - MCDI_IN_SET_DWORD(req, LOG_CTRL_IN_LOG_DEST, - MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ); - MCDI_IN_SET_DWORD(req, LOG_CTRL_IN_LOG_DEST_EVQ, 0); - - efx_mcdi_execute(enp, &req); - - if (req.emr_rc != 0) { - rc = req.emr_rc; - goto fail1; - } - - return (0); - -fail1: - EFSYS_PROBE1(fail1, int, rc); - - return (rc); -} - static void siena_nic_rx_cfg( __in efx_nic_t *enp) @@ -814,7 +403,8 @@ siena_nic_init( EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_SIENA); - if ((rc = siena_nic_logging(enp)) != 0) + /* Enable reporting of some events (e.g. link change) */ + if ((rc = efx_mcdi_log_ctrl(enp)) != 0) goto fail1; siena_sram_init(enp); @@ -850,12 +440,15 @@ siena_nic_fini( siena_nic_unprobe( __in efx_nic_t *enp) { - (void) siena_nic_attach(enp, B_FALSE); +#if EFSYS_OPT_MON_STATS + mcdi_mon_cfg_free(enp); +#endif /* EFSYS_OPT_MON_STATS */ + (void) efx_mcdi_drv_attach(enp, B_FALSE); } #if EFSYS_OPT_DIAG -static efx_register_set_t __cs __siena_registers[] = { +static efx_register_set_t __siena_registers[] = { { FR_AZ_ADR_REGION_REG_OFST, 0, 1 }, { FR_CZ_USR_EV_CFG_OFST, 0, 1 }, { FR_AZ_RX_CFG_REG_OFST, 0, 1 }, @@ -871,7 +464,7 @@ static efx_register_set_t __cs __siena_registers[] = { { FR_CZ_RX_RSS_IPV6_REG3_OFST, 0, 1} }; -static const uint32_t __cs __siena_register_masks[] = { +static const uint32_t __siena_register_masks[] = { 0x0003FFFF, 0x0003FFFF, 0x0003FFFF, 0x0003FFFF, 0x000103FF, 0x00000000, 0x00000000, 0x00000000, 0xFFFFFFFE, 0xFFFFFFFF, 0x0003FFFF, 0x00000000, @@ -887,7 +480,7 @@ static const uint32_t __cs __siena_register_masks[] = { 0xFFFFFFFF, 0xFFFFFFFF, 0x00000007, 0x00000000 }; -static efx_register_set_t __cs __siena_tables[] = { +static efx_register_set_t __siena_tables[] = { { FR_AZ_RX_FILTER_TBL0_OFST, FR_AZ_RX_FILTER_TBL0_STEP, FR_AZ_RX_FILTER_TBL0_ROWS }, { FR_CZ_RX_MAC_FILTER_TBL0_OFST, FR_CZ_RX_MAC_FILTER_TBL0_STEP, @@ -903,7 +496,7 @@ static efx_register_set_t __cs __siena_tables[] = { FR_CZ_TX_MAC_FILTER_TBL0_STEP, FR_CZ_TX_MAC_FILTER_TBL0_ROWS } }; -static const uint32_t __cs __siena_table_masks[] = { +static const uint32_t __siena_table_masks[] = { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x000003FF, 0xFFFF0FFF, 0xFFFFFFFF, 0x00000E7F, 0x00000000, 0xFFFFFFFE, 0x0FFFFFFF, 0x01800000, 0x00000000, diff --git a/sys/dev/sfxge/common/siena_nvram.c b/sys/dev/sfxge/common/siena_nvram.c index fa746ab269db..7d20ec0f36e1 100644 --- a/sys/dev/sfxge/common/siena_nvram.c +++ b/sys/dev/sfxge/common/siena_nvram.c @@ -1,26 +1,31 @@ /*- - * Copyright 2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2009-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -42,9 +47,6 @@ siena_nvram_partn_size( __in unsigned int partn, __out size_t *sizep) { - efx_mcdi_req_t req; - uint8_t payload[MAX(MC_CMD_NVRAM_INFO_IN_LEN, - MC_CMD_NVRAM_INFO_OUT_LEN)]; int rc; if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) { @@ -52,32 +54,12 @@ siena_nvram_partn_size( goto fail1; } - req.emr_cmd = MC_CMD_NVRAM_INFO; - req.emr_in_buf = payload; - req.emr_in_length = MC_CMD_NVRAM_INFO_IN_LEN; - req.emr_out_buf = payload; - req.emr_out_length = MC_CMD_NVRAM_INFO_OUT_LEN; - - MCDI_IN_SET_DWORD(req, NVRAM_INFO_IN_TYPE, partn); - - efx_mcdi_execute(enp, &req); - - if (req.emr_rc != 0) { - rc = req.emr_rc; + if ((rc = efx_mcdi_nvram_info(enp, partn, sizep, NULL, NULL)) != 0) { goto fail2; } - if (req.emr_out_length_used < MC_CMD_NVRAM_INFO_OUT_LEN) { - rc = EMSGSIZE; - goto fail3; - } - - *sizep = MCDI_OUT_DWORD(req, NVRAM_INFO_OUT_SIZE); - return (0); -fail3: - EFSYS_PROBE(fail3); fail2: EFSYS_PROBE(fail2); fail1: @@ -91,23 +73,9 @@ siena_nvram_partn_lock( __in efx_nic_t *enp, __in unsigned int partn) { - efx_mcdi_req_t req; - uint8_t payload[MC_CMD_NVRAM_UPDATE_START_IN_LEN]; int rc; - req.emr_cmd = MC_CMD_NVRAM_UPDATE_START; - req.emr_in_buf = payload; - req.emr_in_length = MC_CMD_NVRAM_UPDATE_START_IN_LEN; - EFX_STATIC_ASSERT(MC_CMD_NVRAM_UPDATE_START_OUT_LEN == 0); - req.emr_out_buf = NULL; - req.emr_out_length = 0; - - MCDI_IN_SET_DWORD(req, NVRAM_UPDATE_START_IN_TYPE, partn); - - efx_mcdi_execute(enp, &req); - - if (req.emr_rc != 0) { - rc = req.emr_rc; + if ((rc = efx_mcdi_nvram_update_start(enp, partn)) != 0) { goto fail1; } @@ -127,43 +95,17 @@ siena_nvram_partn_read( __out_bcount(size) caddr_t data, __in size_t size) { - efx_mcdi_req_t req; - uint8_t payload[MAX(MC_CMD_NVRAM_READ_IN_LEN, - MC_CMD_NVRAM_READ_OUT_LEN(SIENA_NVRAM_CHUNK))]; size_t chunk; int rc; while (size > 0) { chunk = MIN(size, SIENA_NVRAM_CHUNK); - req.emr_cmd = MC_CMD_NVRAM_READ; - req.emr_in_buf = payload; - req.emr_in_length = MC_CMD_NVRAM_READ_IN_LEN; - req.emr_out_buf = payload; - req.emr_out_length = - MC_CMD_NVRAM_READ_OUT_LEN(SIENA_NVRAM_CHUNK); - - MCDI_IN_SET_DWORD(req, NVRAM_READ_IN_TYPE, partn); - MCDI_IN_SET_DWORD(req, NVRAM_READ_IN_OFFSET, offset); - MCDI_IN_SET_DWORD(req, NVRAM_READ_IN_LENGTH, chunk); - - efx_mcdi_execute(enp, &req); - - if (req.emr_rc != 0) { - rc = req.emr_rc; + if ((rc = efx_mcdi_nvram_read(enp, partn, offset, + data, chunk)) != 0) { goto fail1; } - if (req.emr_out_length_used < - MC_CMD_NVRAM_READ_OUT_LEN(chunk)) { - rc = EMSGSIZE; - goto fail2; - } - - memcpy(data, - MCDI_OUT2(req, uint8_t, NVRAM_READ_OUT_READ_BUFFER), - chunk); - size -= chunk; data += chunk; offset += chunk; @@ -171,8 +113,6 @@ siena_nvram_partn_read( return (0); -fail2: - EFSYS_PROBE(fail2); fail1: EFSYS_PROBE1(fail1, int, rc); @@ -186,25 +126,9 @@ siena_nvram_partn_erase( __in unsigned int offset, __in size_t size) { - efx_mcdi_req_t req; - uint8_t payload[MC_CMD_NVRAM_ERASE_IN_LEN]; int rc; - req.emr_cmd = MC_CMD_NVRAM_ERASE; - req.emr_in_buf = payload; - req.emr_in_length = MC_CMD_NVRAM_ERASE_IN_LEN; - EFX_STATIC_ASSERT(MC_CMD_NVRAM_ERASE_OUT_LEN == 0); - req.emr_out_buf = NULL; - req.emr_out_length = 0; - - MCDI_IN_SET_DWORD(req, NVRAM_ERASE_IN_TYPE, partn); - MCDI_IN_SET_DWORD(req, NVRAM_ERASE_IN_OFFSET, offset); - MCDI_IN_SET_DWORD(req, NVRAM_ERASE_IN_LENGTH, size); - - efx_mcdi_execute(enp, &req); - - if (req.emr_rc != 0) { - rc = req.emr_rc; + if ((rc = efx_mcdi_nvram_erase(enp, partn, offset, size)) != 0) { goto fail1; } @@ -224,32 +148,14 @@ siena_nvram_partn_write( __out_bcount(size) caddr_t data, __in size_t size) { - efx_mcdi_req_t req; - uint8_t payload[MC_CMD_NVRAM_WRITE_IN_LEN(SIENA_NVRAM_CHUNK)]; size_t chunk; int rc; while (size > 0) { chunk = MIN(size, SIENA_NVRAM_CHUNK); - req.emr_cmd = MC_CMD_NVRAM_WRITE; - req.emr_in_buf = payload; - req.emr_in_length = MC_CMD_NVRAM_WRITE_IN_LEN(chunk); - EFX_STATIC_ASSERT(MC_CMD_NVRAM_WRITE_OUT_LEN == 0); - req.emr_out_buf = NULL; - req.emr_out_length = 0; - - MCDI_IN_SET_DWORD(req, NVRAM_WRITE_IN_TYPE, partn); - MCDI_IN_SET_DWORD(req, NVRAM_WRITE_IN_OFFSET, offset); - MCDI_IN_SET_DWORD(req, NVRAM_WRITE_IN_LENGTH, chunk); - - memcpy(MCDI_IN2(req, uint8_t, NVRAM_WRITE_IN_WRITE_BUFFER), - data, chunk); - - efx_mcdi_execute(enp, &req); - - if (req.emr_rc != 0) { - rc = req.emr_rc; + if ((rc = efx_mcdi_nvram_write(enp, partn, offset, + data, chunk)) != 0) { goto fail1; } @@ -271,18 +177,9 @@ siena_nvram_partn_unlock( __in efx_nic_t *enp, __in unsigned int partn) { - efx_mcdi_req_t req; - uint8_t payload[MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN]; - uint32_t reboot; + boolean_t reboot; int rc; - req.emr_cmd = MC_CMD_NVRAM_UPDATE_FINISH; - req.emr_in_buf = payload; - req.emr_in_length = MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN; - EFX_STATIC_ASSERT(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN == 0); - req.emr_out_buf = NULL; - req.emr_out_length = 0; - /* * Reboot into the new image only for PHYs. The driver has to * explicitly cope with an MC reboot after a firmware update. @@ -291,13 +188,7 @@ siena_nvram_partn_unlock( partn == MC_CMD_NVRAM_TYPE_PHY_PORT1 || partn == MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO); - MCDI_IN_SET_DWORD(req, NVRAM_UPDATE_FINISH_IN_TYPE, partn); - MCDI_IN_SET_DWORD(req, NVRAM_UPDATE_FINISH_IN_REBOOT, reboot); - - efx_mcdi_execute(enp, &req); - - if (req.emr_rc != 0) { - rc = req.emr_rc; + if ((rc = efx_mcdi_nvram_update_finish(enp, partn, reboot)) != 0) { goto fail1; } @@ -338,7 +229,6 @@ static siena_parttbl_entry_t siena_parttbl[] = { {MC_CMD_NVRAM_TYPE_FC_FW, 2, EFX_NVRAM_FCFW}, {MC_CMD_NVRAM_TYPE_CPLD, 1, EFX_NVRAM_CPLD}, {MC_CMD_NVRAM_TYPE_CPLD, 2, EFX_NVRAM_CPLD}, - {0, 0, 0}, }; static __checkReturn siena_parttbl_entry_t * @@ -346,12 +236,15 @@ siena_parttbl_entry( __in efx_nic_t *enp, __in efx_nvram_type_t type) { - efx_mcdi_iface_t *emip = &(enp->en_u.siena.enu_mip); + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); siena_parttbl_entry_t *entry; + unsigned int i; EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES); - for (entry = siena_parttbl; entry->port > 0; ++entry) { + for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) { + entry = &siena_parttbl[i]; + if (entry->port == emip->emi_port && entry->nvtype == type) return (entry); } @@ -365,59 +258,29 @@ siena_parttbl_entry( siena_nvram_test( __in efx_nic_t *enp) { - efx_mcdi_iface_t *emip = &(enp->en_u.siena.enu_mip); + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); siena_parttbl_entry_t *entry; - efx_mcdi_req_t req; - uint8_t payload[MAX(MC_CMD_NVRAM_TEST_IN_LEN, - MC_CMD_NVRAM_TEST_OUT_LEN)]; - int result; + unsigned int i; int rc; - req.emr_cmd = MC_CMD_NVRAM_TEST; - req.emr_in_buf = payload; - req.emr_in_length = MC_CMD_NVRAM_TEST_IN_LEN; - req.emr_out_buf = payload; - req.emr_out_length = MC_CMD_NVRAM_TEST_OUT_LEN; - /* * Iterate over the list of supported partition types * applicable to *this* port */ - for (entry = siena_parttbl; entry->port > 0; ++entry) { + for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) { + entry = &siena_parttbl[i]; + if (entry->port != emip->emi_port || !(enp->en_u.siena.enu_partn_mask & (1 << entry->partn))) continue; - MCDI_IN_SET_DWORD(req, NVRAM_TEST_IN_TYPE, entry->partn); - - efx_mcdi_execute(enp, &req); - - if (req.emr_rc != 0) { - rc = req.emr_rc; + if ((rc = efx_mcdi_nvram_test(enp, entry->partn)) != 0) { goto fail1; } - - if (req.emr_out_length_used < MC_CMD_NVRAM_TEST_OUT_LEN) { - rc = EMSGSIZE; - goto fail2; - } - - result = MCDI_OUT_DWORD(req, NVRAM_TEST_OUT_RESULT); - if (result == MC_CMD_NVRAM_TEST_FAIL) { - - EFSYS_PROBE1(nvram_test_failure, int, entry->partn); - - rc = (EINVAL); - goto fail3; - } } return (0); -fail3: - EFSYS_PROBE(fail3); -fail2: - EFSYS_PROBE(fail2); fail1: EFSYS_PROBE1(fail1, int, rc); @@ -467,7 +330,7 @@ siena_nvram_get_dynamic_cfg( __out siena_mc_dynamic_config_hdr_t **dcfgp, __out size_t *sizep) { - siena_mc_dynamic_config_hdr_t *dcfg; + siena_mc_dynamic_config_hdr_t *dcfg = NULL; size_t size; uint8_t cksum; unsigned int vpd_offset; @@ -577,34 +440,35 @@ siena_nvram_get_dynamic_cfg( EFSYS_PROBE(fail4); fail3: EFSYS_PROBE(fail3); -fail2: - EFSYS_PROBE(fail2); EFSYS_KMEM_FREE(enp->en_esip, size, dcfg); +fail2: + EFSYS_PROBE(fail2); fail1: EFSYS_PROBE1(fail1, int, rc); return (rc); } -static __checkReturn int + __checkReturn int siena_nvram_get_subtype( __in efx_nic_t *enp, __in unsigned int partn, __out uint32_t *subtypep) { efx_mcdi_req_t req; - uint8_t outbuf[MC_CMD_GET_BOARD_CFG_OUT_LENMAX]; + uint8_t payload[MAX(MC_CMD_GET_BOARD_CFG_IN_LEN, + MC_CMD_GET_BOARD_CFG_OUT_LENMAX)]; efx_word_t *fw_list; int rc; + (void) memset(payload, 0, sizeof (payload)); req.emr_cmd = MC_CMD_GET_BOARD_CFG; - EFX_STATIC_ASSERT(MC_CMD_GET_BOARD_CFG_IN_LEN == 0); - req.emr_in_buf = NULL; - req.emr_in_length = 0; - req.emr_out_buf = outbuf; - req.emr_out_length = sizeof (outbuf); + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_GET_BOARD_CFG_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_GET_BOARD_CFG_OUT_LENMAX; efx_mcdi_execute(enp, &req); @@ -652,6 +516,7 @@ siena_nvram_get_version( siena_parttbl_entry_t *entry; unsigned int dcfg_partn; unsigned int partn; + unsigned int i; int rc; if ((entry = siena_parttbl_entry(enp, type)) == NULL) { @@ -674,11 +539,12 @@ siena_nvram_get_version( * that have access to this partition. */ version[0] = version[1] = version[2] = version[3] = 0; - for (entry = siena_parttbl; entry->port > 0; ++entry) { + for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) { unsigned int nitems; uint16_t temp[4]; size_t length; + entry = &siena_parttbl[i]; if (entry->partn != partn) continue; @@ -869,7 +735,7 @@ siena_nvram_rw_finish( siena_nvram_set_version( __in efx_nic_t *enp, __in efx_nvram_type_t type, - __out uint16_t version[4]) + __in_ecount(4) uint16_t version[4]) { siena_mc_dynamic_config_hdr_t *dcfg = NULL; siena_parttbl_entry_t *entry; diff --git a/sys/dev/sfxge/common/siena_phy.c b/sys/dev/sfxge/common/siena_phy.c index 31b5c4637f83..fd0871dd98c8 100644 --- a/sys/dev/sfxge/common/siena_phy.c +++ b/sys/dev/sfxge/common/siena_phy.c @@ -1,26 +1,31 @@ /*- - * Copyright 2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2009-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -192,15 +197,16 @@ siena_phy_get_link( __out siena_link_state_t *slsp) { efx_mcdi_req_t req; - uint8_t outbuf[MC_CMD_GET_LINK_OUT_LEN]; + uint8_t payload[MAX(MC_CMD_GET_LINK_IN_LEN, + MC_CMD_GET_LINK_OUT_LEN)]; int rc; + (void) memset(payload, 0, sizeof (payload)); req.emr_cmd = MC_CMD_GET_LINK; - EFX_STATIC_ASSERT(MC_CMD_GET_LINK_IN_LEN == 0); - req.emr_in_buf = NULL; - req.emr_in_length = 0; - req.emr_out_buf = outbuf; - req.emr_out_length = sizeof (outbuf); + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_GET_LINK_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_GET_LINK_OUT_LEN; efx_mcdi_execute(enp, &req); @@ -266,19 +272,21 @@ siena_phy_reconfigure( { efx_port_t *epp = &(enp->en_port); efx_mcdi_req_t req; - uint8_t payload[MAX(MC_CMD_SET_ID_LED_IN_LEN, - MC_CMD_SET_LINK_IN_LEN)]; + uint8_t payload[MAX(MAX(MC_CMD_SET_ID_LED_IN_LEN, + MC_CMD_SET_ID_LED_OUT_LEN), + MAX(MC_CMD_SET_LINK_IN_LEN, + MC_CMD_SET_LINK_OUT_LEN))]; uint32_t cap_mask; unsigned int led_mode; unsigned int speed; int rc; + (void) memset(payload, 0, sizeof (payload)); req.emr_cmd = MC_CMD_SET_LINK; req.emr_in_buf = payload; req.emr_in_length = MC_CMD_SET_LINK_IN_LEN; - EFX_STATIC_ASSERT(MC_CMD_SET_LINK_OUT_LEN == 0); - req.emr_out_buf = NULL; - req.emr_out_length = 0; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_SET_LINK_OUT_LEN; cap_mask = epp->ep_adv_cap_mask; MCDI_IN_POPULATE_DWORD_10(req, SET_LINK_IN_CAP, @@ -329,12 +337,12 @@ siena_phy_reconfigure( } /* And set the blink mode */ + (void) memset(payload, 0, sizeof (payload)); req.emr_cmd = MC_CMD_SET_ID_LED; req.emr_in_buf = payload; req.emr_in_length = MC_CMD_SET_ID_LED_IN_LEN; - EFX_STATIC_ASSERT(MC_CMD_SET_ID_LED_OUT_LEN == 0); - req.emr_out_buf = NULL; - req.emr_out_length = 0; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_SET_ID_LED_OUT_LEN; #if EFSYS_OPT_PHY_LED_CONTROL switch (epp->ep_phy_led_mode) { @@ -379,16 +387,17 @@ siena_phy_verify( __in efx_nic_t *enp) { efx_mcdi_req_t req; - uint8_t outbuf[MC_CMD_GET_PHY_STATE_OUT_LEN]; + uint8_t payload[MAX(MC_CMD_GET_PHY_STATE_IN_LEN, + MC_CMD_GET_PHY_STATE_OUT_LEN)]; uint32_t state; int rc; + (void) memset(payload, 0, sizeof (payload)); req.emr_cmd = MC_CMD_GET_PHY_STATE; - EFX_STATIC_ASSERT(MC_CMD_GET_PHY_STATE_IN_LEN == 0); - req.emr_in_buf = NULL; - req.emr_in_length = 0; - req.emr_out_buf = outbuf; - req.emr_out_length = sizeof (outbuf); + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_GET_PHY_STATE_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_GET_PHY_STATE_OUT_LEN; efx_mcdi_execute(enp, &req); @@ -544,18 +553,19 @@ siena_phy_stats_update( __out_ecount(EFX_PHY_NSTATS) uint32_t *stat) { efx_nic_cfg_t *encp = &(enp->en_nic_cfg); - uint32_t vmask = encp->enc_siena_phy_stat_mask; - uint8_t payload[MC_CMD_PHY_STATS_IN_LEN]; + uint32_t vmask = encp->enc_mcdi_phy_stat_mask; uint64_t smask; efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_PHY_STATS_IN_LEN, + MC_CMD_PHY_STATS_OUT_DMA_LEN)]; int rc; + (void) memset(payload, 0, sizeof (payload)); req.emr_cmd = MC_CMD_PHY_STATS; req.emr_in_buf = payload; - req.emr_in_length = sizeof (payload); - EFX_STATIC_ASSERT(MC_CMD_PHY_STATS_OUT_DMA_LEN == 0); - req.emr_out_buf = NULL; - req.emr_out_length = 0; + req.emr_in_length = MC_CMD_PHY_STATS_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_PHY_STATS_OUT_DMA_LEN; MCDI_IN_SET_DWORD(req, PHY_STATS_IN_DMA_ADDR_LO, EFSYS_MEM_ADDR(esmp) & 0xffffffff); @@ -587,7 +597,7 @@ siena_phy_stats_update( #if EFSYS_OPT_NAMES -extern const char __cs * +extern const char * siena_phy_prop_name( __in efx_nic_t *enp, __in unsigned int id) @@ -624,46 +634,17 @@ siena_phy_prop_set( #endif /* EFSYS_OPT_PHY_PROPS */ -#if EFSYS_OPT_PHY_BIST +#if EFSYS_OPT_BIST __checkReturn int siena_phy_bist_start( __in efx_nic_t *enp, - __in efx_phy_bist_type_t type) + __in efx_bist_type_t type) { - uint8_t payload[MC_CMD_START_BIST_IN_LEN]; - efx_mcdi_req_t req; int rc; - req.emr_cmd = MC_CMD_START_BIST; - req.emr_in_buf = payload; - req.emr_in_length = sizeof (payload); - EFX_STATIC_ASSERT(MC_CMD_START_BIST_OUT_LEN == 0); - req.emr_out_buf = NULL; - req.emr_out_length = 0; - - switch (type) { - case EFX_PHY_BIST_TYPE_NORMAL: - MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE, MC_CMD_PHY_BIST); - break; - case EFX_PHY_BIST_TYPE_CABLE_SHORT: - MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE, - MC_CMD_PHY_BIST_CABLE_SHORT); - break; - case EFX_PHY_BIST_TYPE_CABLE_LONG: - MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE, - MC_CMD_PHY_BIST_CABLE_LONG); - break; - default: - EFSYS_ASSERT(0); - } - - efx_mcdi_execute(enp, &req); - - if (req.emr_rc != 0) { - rc = req.emr_rc; + if ((rc = efx_mcdi_bist_start(enp, type)) != 0) goto fail1; - } return (0); @@ -696,8 +677,8 @@ siena_phy_sft9001_bist_status( __checkReturn int siena_phy_bist_poll( __in efx_nic_t *enp, - __in efx_phy_bist_type_t type, - __out efx_phy_bist_result_t *resultp, + __in efx_bist_type_t type, + __out efx_bist_result_t *resultp, __out_opt __drv_when(count > 0, __notnull) uint32_t *value_maskp, __out_ecount_opt(count) __drv_when(count > 0, __notnull) @@ -705,19 +686,19 @@ siena_phy_bist_poll( __in size_t count) { efx_nic_cfg_t *encp = &(enp->en_nic_cfg); - uint8_t payload[MCDI_CTL_SDU_LEN_MAX]; + uint8_t payload[MAX(MC_CMD_POLL_BIST_IN_LEN, + MCDI_CTL_SDU_LEN_MAX)]; uint32_t value_mask = 0; efx_mcdi_req_t req; uint32_t result; int rc; + (void) memset(payload, 0, sizeof (payload)); req.emr_cmd = MC_CMD_POLL_BIST; - _NOTE(CONSTANTCONDITION) - EFSYS_ASSERT(MC_CMD_POLL_BIST_IN_LEN == 0); - req.emr_in_buf = NULL; - req.emr_in_length = 0; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_POLL_BIST_IN_LEN; req.emr_out_buf = payload; - req.emr_out_length = sizeof (payload); + req.emr_out_length = MCDI_CTL_SDU_LEN_MAX; efx_mcdi_execute(enp, &req); @@ -740,90 +721,90 @@ siena_phy_bist_poll( if (result == MC_CMD_POLL_BIST_PASSED && encp->enc_phy_type == EFX_PHY_SFT9001B && req.emr_out_length_used >= MC_CMD_POLL_BIST_OUT_SFT9001_LEN && - (type == EFX_PHY_BIST_TYPE_CABLE_SHORT || - type == EFX_PHY_BIST_TYPE_CABLE_LONG)) { + (type == EFX_BIST_TYPE_PHY_CABLE_SHORT || + type == EFX_BIST_TYPE_PHY_CABLE_LONG)) { uint16_t word; - if (count > EFX_PHY_BIST_CABLE_LENGTH_A) { + if (count > EFX_BIST_PHY_CABLE_LENGTH_A) { if (valuesp != NULL) - valuesp[EFX_PHY_BIST_CABLE_LENGTH_A] = + valuesp[EFX_BIST_PHY_CABLE_LENGTH_A] = MCDI_OUT_DWORD(req, POLL_BIST_OUT_SFT9001_CABLE_LENGTH_A); - value_mask |= (1 << EFX_PHY_BIST_CABLE_LENGTH_A); + value_mask |= (1 << EFX_BIST_PHY_CABLE_LENGTH_A); } - if (count > EFX_PHY_BIST_CABLE_LENGTH_B) { + if (count > EFX_BIST_PHY_CABLE_LENGTH_B) { if (valuesp != NULL) - valuesp[EFX_PHY_BIST_CABLE_LENGTH_B] = + valuesp[EFX_BIST_PHY_CABLE_LENGTH_B] = MCDI_OUT_DWORD(req, POLL_BIST_OUT_SFT9001_CABLE_LENGTH_B); - value_mask |= (1 << EFX_PHY_BIST_CABLE_LENGTH_B); + value_mask |= (1 << EFX_BIST_PHY_CABLE_LENGTH_B); } - if (count > EFX_PHY_BIST_CABLE_LENGTH_C) { + if (count > EFX_BIST_PHY_CABLE_LENGTH_C) { if (valuesp != NULL) - valuesp[EFX_PHY_BIST_CABLE_LENGTH_C] = + valuesp[EFX_BIST_PHY_CABLE_LENGTH_C] = MCDI_OUT_DWORD(req, POLL_BIST_OUT_SFT9001_CABLE_LENGTH_C); - value_mask |= (1 << EFX_PHY_BIST_CABLE_LENGTH_C); + value_mask |= (1 << EFX_BIST_PHY_CABLE_LENGTH_C); } - if (count > EFX_PHY_BIST_CABLE_LENGTH_D) { + if (count > EFX_BIST_PHY_CABLE_LENGTH_D) { if (valuesp != NULL) - valuesp[EFX_PHY_BIST_CABLE_LENGTH_D] = + valuesp[EFX_BIST_PHY_CABLE_LENGTH_D] = MCDI_OUT_DWORD(req, POLL_BIST_OUT_SFT9001_CABLE_LENGTH_D); - value_mask |= (1 << EFX_PHY_BIST_CABLE_LENGTH_D); + value_mask |= (1 << EFX_BIST_PHY_CABLE_LENGTH_D); } - if (count > EFX_PHY_BIST_CABLE_STATUS_A) { + if (count > EFX_BIST_PHY_CABLE_STATUS_A) { if (valuesp != NULL) { word = MCDI_OUT_WORD(req, POLL_BIST_OUT_SFT9001_CABLE_STATUS_A); - valuesp[EFX_PHY_BIST_CABLE_STATUS_A] = + valuesp[EFX_BIST_PHY_CABLE_STATUS_A] = siena_phy_sft9001_bist_status(word); } - value_mask |= (1 << EFX_PHY_BIST_CABLE_STATUS_A); + value_mask |= (1 << EFX_BIST_PHY_CABLE_STATUS_A); } - if (count > EFX_PHY_BIST_CABLE_STATUS_B) { + if (count > EFX_BIST_PHY_CABLE_STATUS_B) { if (valuesp != NULL) { word = MCDI_OUT_WORD(req, POLL_BIST_OUT_SFT9001_CABLE_STATUS_B); - valuesp[EFX_PHY_BIST_CABLE_STATUS_B] = + valuesp[EFX_BIST_PHY_CABLE_STATUS_B] = siena_phy_sft9001_bist_status(word); } - value_mask |= (1 << EFX_PHY_BIST_CABLE_STATUS_B); + value_mask |= (1 << EFX_BIST_PHY_CABLE_STATUS_B); } - if (count > EFX_PHY_BIST_CABLE_STATUS_C) { + if (count > EFX_BIST_PHY_CABLE_STATUS_C) { if (valuesp != NULL) { word = MCDI_OUT_WORD(req, POLL_BIST_OUT_SFT9001_CABLE_STATUS_C); - valuesp[EFX_PHY_BIST_CABLE_STATUS_C] = + valuesp[EFX_BIST_PHY_CABLE_STATUS_C] = siena_phy_sft9001_bist_status(word); } - value_mask |= (1 << EFX_PHY_BIST_CABLE_STATUS_C); + value_mask |= (1 << EFX_BIST_PHY_CABLE_STATUS_C); } - if (count > EFX_PHY_BIST_CABLE_STATUS_D) { + if (count > EFX_BIST_PHY_CABLE_STATUS_D) { if (valuesp != NULL) { word = MCDI_OUT_WORD(req, POLL_BIST_OUT_SFT9001_CABLE_STATUS_D); - valuesp[EFX_PHY_BIST_CABLE_STATUS_D] = + valuesp[EFX_BIST_PHY_CABLE_STATUS_D] = siena_phy_sft9001_bist_status(word); } - value_mask |= (1 << EFX_PHY_BIST_CABLE_STATUS_D); + value_mask |= (1 << EFX_BIST_PHY_CABLE_STATUS_D); } } else if (result == MC_CMD_POLL_BIST_FAILED && encp->enc_phy_type == EFX_PHY_QLX111V && req.emr_out_length >= MC_CMD_POLL_BIST_OUT_MRSFP_LEN && - count > EFX_PHY_BIST_FAULT_CODE) { + count > EFX_BIST_FAULT_CODE) { if (valuesp != NULL) - valuesp[EFX_PHY_BIST_FAULT_CODE] = + valuesp[EFX_BIST_FAULT_CODE] = MCDI_OUT_DWORD(req, POLL_BIST_OUT_MRSFP_TEST); - value_mask |= 1 << EFX_PHY_BIST_FAULT_CODE; + value_mask |= 1 << EFX_BIST_FAULT_CODE; } if (value_maskp != NULL) @@ -831,11 +812,11 @@ siena_phy_bist_poll( EFSYS_ASSERT(resultp != NULL); if (result == MC_CMD_POLL_BIST_RUNNING) - *resultp = EFX_PHY_BIST_RESULT_RUNNING; + *resultp = EFX_BIST_RESULT_RUNNING; else if (result == MC_CMD_POLL_BIST_PASSED) - *resultp = EFX_PHY_BIST_RESULT_PASSED; + *resultp = EFX_BIST_RESULT_PASSED; else - *resultp = EFX_PHY_BIST_RESULT_FAILED; + *resultp = EFX_BIST_RESULT_FAILED; return (0); @@ -850,12 +831,12 @@ siena_phy_bist_poll( void siena_phy_bist_stop( __in efx_nic_t *enp, - __in efx_phy_bist_type_t type) + __in efx_bist_type_t type) { /* There is no way to stop BIST on Siena */ _NOTE(ARGUNUSED(enp, type)) } -#endif /* EFSYS_OPT_PHY_BIST */ +#endif /* EFSYS_OPT_BIST */ #endif /* EFSYS_OPT_SIENA */ diff --git a/sys/dev/sfxge/common/siena_sram.c b/sys/dev/sfxge/common/siena_sram.c index 3137e5b79826..cf360673726d 100644 --- a/sys/dev/sfxge/common/siena_sram.c +++ b/sys/dev/sfxge/common/siena_sram.c @@ -1,26 +1,31 @@ /*- - * Copyright 2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2009-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include diff --git a/sys/dev/sfxge/common/siena_vpd.c b/sys/dev/sfxge/common/siena_vpd.c index 3f1008bcf528..4d4b825efc10 100644 --- a/sys/dev/sfxge/common/siena_vpd.c +++ b/sys/dev/sfxge/common/siena_vpd.c @@ -1,26 +1,31 @@ /*- - * Copyright 2009 Solarflare Communications Inc. All rights reserved. + * Copyright (c) 2009-2015 Solarflare Communications Inc. + * All rights reserved. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -141,11 +146,11 @@ siena_vpd_get_static( EFSYS_PROBE(fail4); fail3: EFSYS_PROBE(fail3); -fail2: - EFSYS_PROBE(fail2); EFSYS_KMEM_FREE(enp->en_esip, size, scfg); +fail2: + EFSYS_PROBE(fail2); fail1: EFSYS_PROBE1(fail1, int, rc); @@ -156,7 +161,7 @@ siena_vpd_get_static( siena_vpd_init( __in efx_nic_t *enp) { - efx_mcdi_iface_t *emip = &(enp->en_u.siena.enu_mip); + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); caddr_t svpd = NULL; unsigned partn; size_t size = 0; @@ -201,7 +206,7 @@ siena_vpd_size( __in efx_nic_t *enp, __out size_t *sizep) { - efx_mcdi_iface_t *emip = &(enp->en_u.siena.enu_mip); + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); unsigned int partn; int rc; @@ -236,8 +241,8 @@ siena_vpd_read( __out_bcount(size) caddr_t data, __in size_t size) { - efx_mcdi_iface_t *emip = &(enp->en_u.siena.enu_mip); - siena_mc_dynamic_config_hdr_t *dcfg; + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); + siena_mc_dynamic_config_hdr_t *dcfg = NULL; unsigned int vpd_length; unsigned int vpd_offset; unsigned int dcfg_partn; @@ -499,8 +504,8 @@ siena_vpd_write( __in_bcount(size) caddr_t data, __in size_t size) { - efx_mcdi_iface_t *emip = &(enp->en_u.siena.enu_mip); - siena_mc_dynamic_config_hdr_t *dcfg; + efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip); + siena_mc_dynamic_config_hdr_t *dcfg = NULL; unsigned int vpd_offset; unsigned int dcfg_partn; unsigned int hdr_length; @@ -525,18 +530,18 @@ siena_vpd_write( goto fail2; if ((rc = siena_nvram_partn_lock(enp, dcfg_partn)) != 0) - goto fail2; + goto fail3; if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn, B_FALSE, &dcfg, &dcfg_size)) != 0) - goto fail3; + goto fail4; hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0); /* Allocated memory should have room for the new VPD */ if (hdr_length + vpd_length > dcfg_size) { rc = ENOSPC; - goto fail3; + goto fail5; } /* Copy in new vpd and update header */ @@ -553,12 +558,12 @@ siena_vpd_write( /* Erase and write the new sector */ if ((rc = siena_nvram_partn_erase(enp, dcfg_partn, 0, partn_size)) != 0) - goto fail4; + goto fail6; /* Write out the new structure to nvram */ if ((rc = siena_nvram_partn_write(enp, dcfg_partn, 0, (caddr_t)dcfg, vpd_offset + vpd_length)) != 0) - goto fail5; + goto fail7; EFSYS_KMEM_FREE(enp->en_esip, dcfg_size, dcfg); @@ -566,18 +571,22 @@ siena_vpd_write( return (0); +fail7: + EFSYS_PROBE(fail7); +fail6: + EFSYS_PROBE(fail6); fail5: EFSYS_PROBE(fail5); -fail4: - EFSYS_PROBE(fail4); -fail3: - EFSYS_PROBE(fail3); EFSYS_KMEM_FREE(enp->en_esip, dcfg_size, dcfg); -fail2: - EFSYS_PROBE(fail2); +fail4: + EFSYS_PROBE(fail4); siena_nvram_partn_unlock(enp, dcfg_partn); +fail3: + EFSYS_PROBE(fail3); +fail2: + EFSYS_PROBE(fail2); fail1: EFSYS_PROBE1(fail1, int, rc); diff --git a/sys/dev/sfxge/sfxge.c b/sys/dev/sfxge/sfxge.c index fc01d1dba906..f484b743b310 100644 --- a/sys/dev/sfxge/sfxge.c +++ b/sys/dev/sfxge/sfxge.c @@ -1,30 +1,34 @@ /*- - * Copyright (c) 2010-2011 Solarflare Communications, Inc. + * Copyright (c) 2010-2015 Solarflare Communications Inc. * All rights reserved. * * This software was developed in part by Philip Paeps under contract for * Solarflare Communications, Inc. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -42,6 +46,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include #include @@ -57,14 +62,17 @@ __FBSDID("$FreeBSD$"); #include "sfxge.h" #include "sfxge_rx.h" +#include "sfxge_ioc.h" #include "sfxge_version.h" -#define SFXGE_CAP (IFCAP_VLAN_MTU | \ - IFCAP_HWCSUM | IFCAP_VLAN_HWCSUM | IFCAP_TSO | \ - IFCAP_JUMBO_MTU | IFCAP_LRO | \ +#define SFXGE_CAP (IFCAP_VLAN_MTU | IFCAP_VLAN_HWCSUM | \ + IFCAP_RXCSUM | IFCAP_TXCSUM | \ + IFCAP_RXCSUM_IPV6 | IFCAP_TXCSUM_IPV6 | \ + IFCAP_TSO4 | IFCAP_TSO6 | \ + IFCAP_JUMBO_MTU | \ IFCAP_VLAN_HWTSO | IFCAP_LINKSTATE | IFCAP_HWSTATS) #define SFXGE_CAP_ENABLE SFXGE_CAP -#define SFXGE_CAP_FIXED (IFCAP_VLAN_MTU | IFCAP_HWCSUM | IFCAP_VLAN_HWCSUM | \ +#define SFXGE_CAP_FIXED (IFCAP_VLAN_MTU | \ IFCAP_JUMBO_MTU | IFCAP_LINKSTATE | IFCAP_HWSTATS) MALLOC_DEFINE(M_SFXGE, "sfxge", "Solarflare 10GigE driver"); @@ -87,10 +95,86 @@ SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_ring, CTLFLAG_RDTUN, &sfxge_tx_ring_entries, 0, "Maximum number of descriptors in a transmit ring"); - static void sfxge_reset(void *arg, int npending); +static int +sfxge_estimate_rsrc_limits(struct sfxge_softc *sc) +{ + efx_drv_limits_t limits; + int rc; + unsigned int evq_max; + uint32_t evq_allocated; + uint32_t rxq_allocated; + uint32_t txq_allocated; + + /* + * Limit the number of event queues to: + * - number of CPUs + * - hardwire maximum RSS channels + * - administratively specified maximum RSS channels + */ + evq_max = MIN(mp_ncpus, EFX_MAXRSS); + if (sc->max_rss_channels > 0) + evq_max = MIN(evq_max, sc->max_rss_channels); + + memset(&limits, 0, sizeof(limits)); + + limits.edl_min_evq_count = 1; + limits.edl_max_evq_count = evq_max; + limits.edl_min_txq_count = SFXGE_TXQ_NTYPES; + limits.edl_max_txq_count = evq_max + SFXGE_TXQ_NTYPES - 1; + limits.edl_min_rxq_count = 1; + limits.edl_max_rxq_count = evq_max; + + efx_nic_set_drv_limits(sc->enp, &limits); + + if ((rc = efx_nic_init(sc->enp)) != 0) + return (rc); + + rc = efx_nic_get_vi_pool(sc->enp, &evq_allocated, &rxq_allocated, + &txq_allocated); + if (rc != 0) { + efx_nic_fini(sc->enp); + return (rc); + } + + KASSERT(txq_allocated >= SFXGE_TXQ_NTYPES, + ("txq_allocated < SFXGE_TXQ_NTYPES")); + + sc->evq_max = MIN(evq_allocated, evq_max); + sc->evq_max = MIN(rxq_allocated, sc->evq_max); + sc->evq_max = MIN(txq_allocated - (SFXGE_TXQ_NTYPES - 1), + sc->evq_max); + + KASSERT(sc->evq_max <= evq_max, + ("allocated more than maximum requested")); + + /* + * NIC is kept initialized in the case of success to be able to + * initialize port to find out media types. + */ + return (0); +} + +static int +sfxge_set_drv_limits(struct sfxge_softc *sc) +{ + efx_drv_limits_t limits; + + memset(&limits, 0, sizeof(limits)); + + /* Limits are strict since take into account initial estimation */ + limits.edl_min_evq_count = limits.edl_max_evq_count = + sc->intr.n_alloc; + limits.edl_min_txq_count = limits.edl_max_txq_count = + sc->intr.n_alloc + SFXGE_TXQ_NTYPES - 1; + limits.edl_min_rxq_count = limits.edl_max_rxq_count = + sc->intr.n_alloc; + + return (efx_nic_set_drv_limits(sc->enp, &limits)); +} + static int sfxge_start(struct sfxge_softc *sc) { @@ -106,6 +190,10 @@ sfxge_start(struct sfxge_softc *sc) goto fail; } + /* Set required resource limits */ + if ((rc = sfxge_set_drv_limits(sc)) != 0) + goto fail; + if ((rc = efx_nic_init(sc->enp)) != 0) goto fail; @@ -117,16 +205,16 @@ sfxge_start(struct sfxge_softc *sc) if ((rc = sfxge_ev_start(sc)) != 0) goto fail3; + /* Fire up the port. */ + if ((rc = sfxge_port_start(sc)) != 0) + goto fail4; + /* Start the receiver side. */ if ((rc = sfxge_rx_start(sc)) != 0) - goto fail4; + goto fail5; /* Start the transmitter side. */ if ((rc = sfxge_tx_start(sc)) != 0) - goto fail5; - - /* Fire up the port. */ - if ((rc = sfxge_port_start(sc)) != 0) goto fail6; sc->init_state = SFXGE_STARTED; @@ -138,10 +226,10 @@ sfxge_start(struct sfxge_softc *sc) return (0); fail6: - sfxge_tx_stop(sc); + sfxge_rx_stop(sc); fail5: - sfxge_rx_stop(sc); + sfxge_port_stop(sc); fail4: sfxge_ev_stop(sc); @@ -180,15 +268,15 @@ sfxge_stop(struct sfxge_softc *sc) sc->init_state = SFXGE_REGISTERED; - /* Stop the port. */ - sfxge_port_stop(sc); - /* Stop the transmitter. */ sfxge_tx_stop(sc); /* Stop the receiver. */ sfxge_rx_stop(sc); + /* Stop the port. */ + sfxge_port_stop(sc); + /* Stop processing events. */ sfxge_ev_stop(sc); @@ -200,11 +288,73 @@ sfxge_stop(struct sfxge_softc *sc) sc->ifnet->if_drv_flags &= ~IFF_DRV_RUNNING; } + +static int +sfxge_vpd_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ioc) +{ + efx_vpd_value_t value; + int rc = 0; + + switch (ioc->u.vpd.op) { + case SFXGE_VPD_OP_GET_KEYWORD: + value.evv_tag = ioc->u.vpd.tag; + value.evv_keyword = ioc->u.vpd.keyword; + rc = efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value); + if (rc != 0) + break; + ioc->u.vpd.len = MIN(ioc->u.vpd.len, value.evv_length); + if (ioc->u.vpd.payload != 0) { + rc = copyout(value.evv_value, ioc->u.vpd.payload, + ioc->u.vpd.len); + } + break; + case SFXGE_VPD_OP_SET_KEYWORD: + if (ioc->u.vpd.len > sizeof(value.evv_value)) + return (EINVAL); + value.evv_tag = ioc->u.vpd.tag; + value.evv_keyword = ioc->u.vpd.keyword; + value.evv_length = ioc->u.vpd.len; + rc = copyin(ioc->u.vpd.payload, value.evv_value, value.evv_length); + if (rc != 0) + break; + rc = efx_vpd_set(sc->enp, sc->vpd_data, sc->vpd_size, &value); + if (rc != 0) + break; + rc = efx_vpd_verify(sc->enp, sc->vpd_data, sc->vpd_size); + if (rc != 0) + break; + rc = efx_vpd_write(sc->enp, sc->vpd_data, sc->vpd_size); + break; + default: + rc = EOPNOTSUPP; + break; + } + + return (rc); +} + +static int +sfxge_private_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ioc) +{ + switch (ioc->op) { + case SFXGE_MCDI_IOC: + return (sfxge_mcdi_ioctl(sc, ioc)); + case SFXGE_NVRAM_IOC: + return (sfxge_nvram_ioctl(sc, ioc)); + case SFXGE_VPD_IOC: + return (sfxge_vpd_ioctl(sc, ioc)); + default: + return (EOPNOTSUPP); + } +} + + static int sfxge_if_ioctl(struct ifnet *ifp, unsigned long command, caddr_t data) { struct sfxge_softc *sc; struct ifreq *ifr; + sfxge_ioc_t ioc; int error; ifr = (struct ifreq *)data; @@ -257,36 +407,98 @@ sfxge_if_ioctl(struct ifnet *ifp, unsigned long command, caddr_t data) sfxge_mac_filter_set(sc); break; case SIOCSIFCAP: + { + int reqcap = ifr->ifr_reqcap; + int capchg_mask; + SFXGE_ADAPTER_LOCK(sc); + /* Capabilities to be changed in accordance with request */ + capchg_mask = ifp->if_capenable ^ reqcap; + /* * The networking core already rejects attempts to * enable capabilities we don't have. We still have * to reject attempts to disable capabilities that we * can't (yet) disable. */ - if (~ifr->ifr_reqcap & SFXGE_CAP_FIXED) { + KASSERT((reqcap & ~ifp->if_capabilities) == 0, + ("Unsupported capabilities 0x%x requested 0x%x vs " + "supported 0x%x", + reqcap & ~ifp->if_capabilities, + reqcap , ifp->if_capabilities)); + if (capchg_mask & SFXGE_CAP_FIXED) { error = EINVAL; SFXGE_ADAPTER_UNLOCK(sc); break; } - ifp->if_capenable = ifr->ifr_reqcap; - if (ifp->if_capenable & IFCAP_TXCSUM) + /* Check request before any changes */ + if ((capchg_mask & IFCAP_TSO4) && + (reqcap & (IFCAP_TSO4 | IFCAP_TXCSUM)) == IFCAP_TSO4) { + error = EAGAIN; + SFXGE_ADAPTER_UNLOCK(sc); + if_printf(ifp, "enable txcsum before tso4\n"); + break; + } + if ((capchg_mask & IFCAP_TSO6) && + (reqcap & (IFCAP_TSO6 | IFCAP_TXCSUM_IPV6)) == IFCAP_TSO6) { + error = EAGAIN; + SFXGE_ADAPTER_UNLOCK(sc); + if_printf(ifp, "enable txcsum6 before tso6\n"); + break; + } + + if (reqcap & IFCAP_TXCSUM) { ifp->if_hwassist |= (CSUM_IP | CSUM_TCP | CSUM_UDP); - else + } else { ifp->if_hwassist &= ~(CSUM_IP | CSUM_TCP | CSUM_UDP); - if (ifp->if_capenable & IFCAP_TSO) - ifp->if_hwassist |= CSUM_TSO; - else - ifp->if_hwassist &= ~CSUM_TSO; + if (reqcap & IFCAP_TSO4) { + reqcap &= ~IFCAP_TSO4; + if_printf(ifp, + "tso4 disabled due to -txcsum\n"); + } + } + if (reqcap & IFCAP_TXCSUM_IPV6) { + ifp->if_hwassist |= (CSUM_TCP_IPV6 | CSUM_UDP_IPV6); + } else { + ifp->if_hwassist &= ~(CSUM_TCP_IPV6 | CSUM_UDP_IPV6); + if (reqcap & IFCAP_TSO6) { + reqcap &= ~IFCAP_TSO6; + if_printf(ifp, + "tso6 disabled due to -txcsum6\n"); + } + } + + /* + * The kernel takes both IFCAP_TSOx and CSUM_TSO into + * account before using TSO. So, we do not touch + * checksum flags when IFCAP_TSOx is modified. + * Note that CSUM_TSO is (CSUM_IP_TSO|CSUM_IP6_TSO), + * but both bits are set in IPv4 and IPv6 mbufs. + */ + + ifp->if_capenable = reqcap; SFXGE_ADAPTER_UNLOCK(sc); break; + } case SIOCSIFMEDIA: case SIOCGIFMEDIA: error = ifmedia_ioctl(ifp, ifr, &sc->media, command); break; + case SIOCGPRIVATE_0: + error = priv_check(curthread, PRIV_DRIVER); + if (error != 0) + break; + error = copyin(ifr->ifr_data, &ioc, sizeof(ioc)); + if (error != 0) + return (error); + error = sfxge_private_ioctl(sc, &ioc); + if (error == 0) { + error = copyout(&ioc, ifr->ifr_data, sizeof(ioc)); + } + break; default: error = ether_ioctl(ifp, command, data); } @@ -326,7 +538,18 @@ sfxge_ifnet_init(struct ifnet *ifp, struct sfxge_softc *sc) ifp->if_capabilities = SFXGE_CAP; ifp->if_capenable = SFXGE_CAP_ENABLE; - ifp->if_hwassist = CSUM_TCP | CSUM_UDP | CSUM_IP | CSUM_TSO; + +#ifdef SFXGE_LRO + ifp->if_capabilities |= IFCAP_LRO; + ifp->if_capenable |= IFCAP_LRO; +#endif + + if (encp->enc_hw_tx_insert_vlan_enabled) { + ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING; + ifp->if_capenable |= IFCAP_VLAN_HWTAGGING; + } + ifp->if_hwassist = CSUM_TCP | CSUM_UDP | CSUM_IP | CSUM_TSO | + CSUM_TCP_IPV6 | CSUM_UDP_IPV6; ether_ifattach(ifp, encp->enc_mac_addr); @@ -335,6 +558,7 @@ sfxge_ifnet_init(struct ifnet *ifp, struct sfxge_softc *sc) ifp->if_get_counter = sfxge_get_counter; + DBGPRINT(sc->dev, "ifmedia_init"); if ((rc = sfxge_port_ifmedia_init(sc)) != 0) goto fail; @@ -418,10 +642,12 @@ sfxge_create(struct sfxge_softc *sc) (void) pci_enable_busmaster(dev); /* Initialize DMA mappings. */ + DBGPRINT(sc->dev, "dma_init..."); if ((error = sfxge_dma_init(sc)) != 0) goto fail; /* Map the device registers. */ + DBGPRINT(sc->dev, "bar_init..."); if ((error = sfxge_bar_init(sc)) != 0) goto fail; @@ -429,6 +655,8 @@ sfxge_create(struct sfxge_softc *sc) &sc->family); KASSERT(error == 0, ("Family should be filtered by sfxge_probe()")); + DBGPRINT(sc->dev, "nic_create..."); + /* Create the common code nic object. */ SFXGE_EFSYS_LOCK_INIT(&sc->enp_lock, device_get_nameunit(sc->dev), "nic"); @@ -438,7 +666,8 @@ sfxge_create(struct sfxge_softc *sc) sc->enp = enp; if (!ISP2(sfxge_rx_ring_entries) || - !(sfxge_rx_ring_entries & EFX_RXQ_NDESCS_MASK)) { + (sfxge_rx_ring_entries < EFX_RXQ_MINNDESCS) || + (sfxge_rx_ring_entries > EFX_RXQ_MAXNDESCS)) { log(LOG_ERR, "%s=%d must be power of 2 from %u to %u", SFXGE_PARAM_RX_RING, sfxge_rx_ring_entries, EFX_RXQ_MINNDESCS, EFX_RXQ_MAXNDESCS); @@ -448,20 +677,23 @@ sfxge_create(struct sfxge_softc *sc) sc->rxq_entries = sfxge_rx_ring_entries; if (!ISP2(sfxge_tx_ring_entries) || - !(sfxge_tx_ring_entries & EFX_TXQ_NDESCS_MASK)) { + (sfxge_tx_ring_entries < EFX_TXQ_MINNDESCS) || + (sfxge_tx_ring_entries > EFX_TXQ_MAXNDESCS(efx_nic_cfg_get(enp)))) { log(LOG_ERR, "%s=%d must be power of 2 from %u to %u", SFXGE_PARAM_TX_RING, sfxge_tx_ring_entries, - EFX_TXQ_MINNDESCS, EFX_TXQ_MAXNDESCS); + EFX_TXQ_MINNDESCS, EFX_TXQ_MAXNDESCS(efx_nic_cfg_get(enp))); error = EINVAL; goto fail_tx_ring_entries; } sc->txq_entries = sfxge_tx_ring_entries; /* Initialize MCDI to talk to the microcontroller. */ + DBGPRINT(sc->dev, "mcdi_init..."); if ((error = sfxge_mcdi_init(sc)) != 0) goto fail4; /* Probe the NIC and build the configuration data area. */ + DBGPRINT(sc->dev, "nic_probe..."); if ((error = efx_nic_probe(enp)) != 0) goto fail5; @@ -471,50 +703,75 @@ sfxge_create(struct sfxge_softc *sc) SFXGE_VERSION_STRING, 0, "Driver version"); + SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), + OID_AUTO, "phy_type", CTLFLAG_RD, + NULL, efx_nic_cfg_get(enp)->enc_phy_type, + "PHY type"); + /* Initialize the NVRAM. */ + DBGPRINT(sc->dev, "nvram_init..."); if ((error = efx_nvram_init(enp)) != 0) goto fail6; /* Initialize the VPD. */ + DBGPRINT(sc->dev, "vpd_init..."); if ((error = efx_vpd_init(enp)) != 0) goto fail7; + efx_mcdi_new_epoch(enp); + /* Reset the NIC. */ + DBGPRINT(sc->dev, "nic_reset..."); if ((error = efx_nic_reset(enp)) != 0) goto fail8; /* Initialize buffer table allocation. */ sc->buffer_table_next = 0; - /* Set up interrupts. */ - if ((error = sfxge_intr_init(sc)) != 0) + /* + * Guarantee minimum and estimate maximum number of event queues + * to take it into account when MSI-X interrupts are allocated. + * It initializes NIC and keeps it initialized on success. + */ + if ((error = sfxge_estimate_rsrc_limits(sc)) != 0) goto fail8; + /* Set up interrupts. */ + DBGPRINT(sc->dev, "intr_init..."); + if ((error = sfxge_intr_init(sc)) != 0) + goto fail9; + /* Initialize event processing state. */ + DBGPRINT(sc->dev, "ev_init..."); if ((error = sfxge_ev_init(sc)) != 0) goto fail11; - /* Initialize receive state. */ - if ((error = sfxge_rx_init(sc)) != 0) + /* Initialize port state. */ + DBGPRINT(sc->dev, "port_init..."); + if ((error = sfxge_port_init(sc)) != 0) goto fail12; - /* Initialize transmit state. */ - if ((error = sfxge_tx_init(sc)) != 0) + /* Initialize receive state. */ + DBGPRINT(sc->dev, "rx_init..."); + if ((error = sfxge_rx_init(sc)) != 0) goto fail13; - /* Initialize port state. */ - if ((error = sfxge_port_init(sc)) != 0) + /* Initialize transmit state. */ + DBGPRINT(sc->dev, "tx_init..."); + if ((error = sfxge_tx_init(sc)) != 0) goto fail14; sc->init_state = SFXGE_INITIALIZED; + DBGPRINT(sc->dev, "success"); return (0); fail14: - sfxge_tx_fini(sc); + sfxge_rx_fini(sc); fail13: - sfxge_rx_fini(sc); + sfxge_port_fini(sc); fail12: sfxge_ev_fini(sc); @@ -522,6 +779,9 @@ sfxge_create(struct sfxge_softc *sc) fail11: sfxge_intr_fini(sc); +fail9: + efx_nic_fini(sc->enp); + fail8: efx_vpd_fini(enp); @@ -546,6 +806,7 @@ sfxge_create(struct sfxge_softc *sc) (void) pci_disable_busmaster(sc->dev); fail: + DBGPRINT(sc->dev, "failed %d", error); sc->dev = NULL; SFXGE_ADAPTER_LOCK_DESTROY(sc); return (error); @@ -556,15 +817,15 @@ sfxge_destroy(struct sfxge_softc *sc) { efx_nic_t *enp; - /* Clean up port state. */ - sfxge_port_fini(sc); - /* Clean up transmit state. */ sfxge_tx_fini(sc); /* Clean up receive state. */ sfxge_rx_fini(sc); + /* Clean up port state. */ + sfxge_port_fini(sc); + /* Clean up event processing state. */ sfxge_ev_fini(sc); @@ -693,6 +954,7 @@ sfxge_reset(void *arg, int npending) { struct sfxge_softc *sc; int rc; + unsigned attempt; (void)npending; @@ -705,10 +967,15 @@ sfxge_reset(void *arg, int npending) sfxge_stop(sc); efx_nic_reset(sc->enp); - if ((rc = sfxge_start(sc)) != 0) - device_printf(sc->dev, - "reset failed (%d); interface is now stopped\n", - rc); + for (attempt = 0; attempt < 3; ++attempt) { + if ((rc = sfxge_start(sc)) == 0) + goto done; + + device_printf(sc->dev, "start on reset failed (%d)\n", rc); + DELAY(100000); + } + + device_printf(sc->dev, "reset failed; interface is now stopped\n"); done: SFXGE_ADAPTER_UNLOCK(sc); @@ -740,29 +1007,42 @@ sfxge_attach(device_t dev) sc->ifnet = ifp; /* Initialize hardware. */ + DBGPRINT(sc->dev, "create nic"); if ((error = sfxge_create(sc)) != 0) goto fail2; /* Create the ifnet for the port. */ + DBGPRINT(sc->dev, "init ifnet"); if ((error = sfxge_ifnet_init(ifp, sc)) != 0) goto fail3; + DBGPRINT(sc->dev, "init vpd"); if ((error = sfxge_vpd_init(sc)) != 0) goto fail4; + /* + * NIC is initialized inside sfxge_create() and kept inialized + * to be able to initialize port to discover media types in + * sfxge_ifnet_init(). + */ + efx_nic_fini(sc->enp); + sc->init_state = SFXGE_REGISTERED; + DBGPRINT(sc->dev, "success"); return (0); fail4: sfxge_ifnet_fini(ifp); fail3: + efx_nic_fini(sc->enp); sfxge_destroy(sc); fail2: if_free(sc->ifnet); fail: + DBGPRINT(sc->dev, "failed %d", error); return (error); } @@ -795,13 +1075,25 @@ sfxge_probe(device_t dev) pci_vendor_id = pci_get_vendor(dev); pci_device_id = pci_get_device(dev); + DBGPRINT(dev, "PCI ID %04x:%04x", pci_vendor_id, pci_device_id); rc = efx_family(pci_vendor_id, pci_device_id, &family); - if (rc != 0) + if (rc != 0) { + DBGPRINT(dev, "efx_family fail %d", rc); return (ENXIO); + } - KASSERT(family == EFX_FAMILY_SIENA, ("impossible controller family")); - device_set_desc(dev, "Solarflare SFC9000 family"); - return (0); + if (family == EFX_FAMILY_SIENA) { + device_set_desc(dev, "Solarflare SFC9000 family"); + return (0); + } + + if (family == EFX_FAMILY_HUNTINGTON) { + device_set_desc(dev, "Solarflare SFC9100 family"); + return (0); + } + + DBGPRINT(dev, "impossible controller family %d", family); + return (ENXIO); } static device_method_t sfxge_methods[] = { diff --git a/sys/dev/sfxge/sfxge.h b/sys/dev/sfxge/sfxge.h index 20a30d053d8f..6e6c0af67de6 100644 --- a/sys/dev/sfxge/sfxge.h +++ b/sys/dev/sfxge/sfxge.h @@ -1,30 +1,34 @@ /*- - * Copyright (c) 2010-2011 Solarflare Communications, Inc. + * Copyright (c) 2010-2015 Solarflare Communications Inc. * All rights reserved. * * This software was developed in part by Philip Paeps under contract for * Solarflare Communications, Inc. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. * * $FreeBSD$ */ @@ -34,7 +38,6 @@ #include #include -#include #include #include #include @@ -46,6 +49,18 @@ #include #include +#include "sfxge_ioc.h" + +/* + * Debugging + */ +#if 0 +#define DBGPRINT(dev, fmt, args...) \ + device_printf(dev, "%s: " fmt "\n", __func__, ## args) +#else +#define DBGPRINT(dev, fmt, args...) +#endif + /* * Backward-compatibility */ @@ -72,6 +87,10 @@ #define IFM_10G_KX4 IFM_10G_CX4 #endif +#ifndef IFM_40G_CR4 +#define IFM_40G_CR4 IFM_UNKNOWN +#endif + #if (__FreeBSD_version >= 800501 && __FreeBSD_version < 900000) || \ __FreeBSD_version >= 900003 #define SFXGE_HAVE_DESCRIBE_INTR @@ -161,7 +180,7 @@ enum sfxge_mcdi_state { struct sfxge_mcdi { struct mtx lock; - struct cv cv; + efsys_mem_t mem; enum sfxge_mcdi_state state; efx_mcdi_transport_t transport; @@ -191,6 +210,9 @@ struct sfxge_port { struct sfxge_hw_stats phy_stats; struct sfxge_hw_stats mac_stats; efx_link_mode_t link_mode; + uint8_t mcast_addrs[EFX_MAC_MULTICAST_LIST_MAX * + EFX_MAC_ADDR_LEN]; + unsigned int mcast_count; /* Only used in debugging output */ char lock_name[SFXGE_LOCK_NAME_MAX]; @@ -250,11 +272,15 @@ struct sfxge_softc { size_t rx_prefix_size; size_t rx_buffer_size; + size_t rx_buffer_align; uma_zone_t rx_buffer_zone; + unsigned int evq_max; unsigned int evq_count; unsigned int rxq_count; unsigned int txq_count; + + int tso_fw_assisted; }; #define SFXGE_LINK_UP(sc) ((sc)->port.link_mode != EFX_LINK_DOWN) @@ -277,10 +303,12 @@ extern void sfxge_sram_buf_tbl_alloc(struct sfxge_softc *sc, size_t n, extern int sfxge_dma_init(struct sfxge_softc *sc); extern void sfxge_dma_fini(struct sfxge_softc *sc); extern int sfxge_dma_alloc(struct sfxge_softc *sc, bus_size_t len, - efsys_mem_t *esmp); + efsys_mem_t *esmp); extern void sfxge_dma_free(efsys_mem_t *esmp); extern int sfxge_dma_map_sg_collapse(bus_dma_tag_t tag, bus_dmamap_t map, - struct mbuf **mp, bus_dma_segment_t *segs, int *nsegs, int maxsegs); + struct mbuf **mp, + bus_dma_segment_t *segs, + int *nsegs, int maxsegs); /* * From sfxge_ev.c. @@ -304,6 +332,12 @@ extern void sfxge_intr_stop(struct sfxge_softc *sc); */ extern int sfxge_mcdi_init(struct sfxge_softc *sc); extern void sfxge_mcdi_fini(struct sfxge_softc *sc); +extern int sfxge_mcdi_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ip); + +/* + * From sfxge_nvram.c. + */ +extern int sfxge_nvram_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ip); /* * From sfxge_port.c. @@ -313,7 +347,7 @@ extern void sfxge_port_fini(struct sfxge_softc *sc); extern int sfxge_port_start(struct sfxge_softc *sc); extern void sfxge_port_stop(struct sfxge_softc *sc); extern void sfxge_mac_link_update(struct sfxge_softc *sc, - efx_link_mode_t mode); + efx_link_mode_t mode); extern int sfxge_mac_filter_set(struct sfxge_softc *sc); extern int sfxge_port_ifmedia_init(struct sfxge_softc *sc); extern uint64_t sfxge_get_counter(struct ifnet *ifp, ift_counter c); diff --git a/sys/dev/sfxge/sfxge_dma.c b/sys/dev/sfxge/sfxge_dma.c index d1831ac68bb5..b4347c057749 100644 --- a/sys/dev/sfxge/sfxge_dma.c +++ b/sys/dev/sfxge/sfxge_dma.c @@ -1,30 +1,34 @@ /*- - * Copyright (c) 2010-2011 Solarflare Communications, Inc. + * Copyright (c) 2010-2015 Solarflare Communications Inc. * All rights reserved. * * This software was developed in part by Philip Paeps under contract for * Solarflare Communications, Inc. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -60,7 +64,8 @@ sfxge_dma_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error) int sfxge_dma_map_sg_collapse(bus_dma_tag_t tag, bus_dmamap_t map, - struct mbuf **mp, bus_dma_segment_t *segs, int *nsegs, int maxsegs) + struct mbuf **mp, bus_dma_segment_t *segs, + int *nsegs, int maxsegs) { bus_dma_segment_t *psegs; struct mbuf *m; diff --git a/sys/dev/sfxge/sfxge_ev.c b/sys/dev/sfxge/sfxge_ev.c index 83bdf26eea0d..4536e0af5178 100644 --- a/sys/dev/sfxge/sfxge_ev.c +++ b/sys/dev/sfxge/sfxge_ev.c @@ -1,30 +1,34 @@ /*- - * Copyright (c) 2010-2011 Solarflare Communications, Inc. + * Copyright (c) 2010-2015 Solarflare Communications Inc. * All rights reserved. * * This software was developed in part by Philip Paeps under contract for * Solarflare Communications, Inc. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -82,12 +86,13 @@ sfxge_ev_qcomplete(struct sfxge_evq *evq, boolean_t eop) static boolean_t sfxge_ev_rx(void *arg, uint32_t label, uint32_t id, uint32_t size, - uint16_t flags) + uint16_t flags) { struct sfxge_evq *evq; struct sfxge_softc *sc; struct sfxge_rxq *rxq; - unsigned int expected; + unsigned int stop; + unsigned int delta; struct sfxge_rx_sw_desc *rx_desc; evq = arg; @@ -106,28 +111,40 @@ sfxge_ev_rx(void *arg, uint32_t label, uint32_t id, uint32_t size, if (__predict_false(rxq->init_state != SFXGE_RXQ_STARTED)) goto done; - expected = rxq->pending++ & rxq->ptr_mask; - if (id != expected) { - evq->exception = B_TRUE; + stop = (id + 1) & rxq->ptr_mask; + id = rxq->pending & rxq->ptr_mask; + delta = (stop >= id) ? (stop - id) : (rxq->entries - id + stop); + rxq->pending += delta; - device_printf(sc->dev, "RX completion out of order" - " (id=%#x expected=%#x flags=%#x); resetting\n", - id, expected, flags); - sfxge_schedule_reset(sc); + if (delta != 1) { + if ((!efx_nic_cfg_get(sc->enp)->enc_rx_batching_enabled) || + (delta <= 0) || + (delta > efx_nic_cfg_get(sc->enp)->enc_rx_batch_max)) { + evq->exception = B_TRUE; - goto done; + device_printf(sc->dev, "RX completion out of order" + " (id=%#x delta=%u flags=%#x); resetting\n", + id, delta, flags); + sfxge_schedule_reset(sc); + + goto done; + } } rx_desc = &rxq->queue[id]; - KASSERT(rx_desc->flags == EFX_DISCARD, - ("rx_desc->flags != EFX_DISCARD")); - rx_desc->flags = flags; - - KASSERT(size < (1 << 16), ("size > (1 << 16)")); - rx_desc->size = (uint16_t)size; prefetch_read_many(rx_desc->mbuf); + for (; id != stop; id = (id + 1) & rxq->ptr_mask) { + rx_desc = &rxq->queue[id]; + KASSERT(rx_desc->flags == EFX_DISCARD, + ("rx_desc->flags != EFX_DISCARD")); + rx_desc->flags = flags; + + KASSERT(size < (1 << 16), ("size > (1 << 16)")); + rx_desc->size = (uint16_t)size; + } + evq->rx_done++; if (rxq->pending - rxq->completed >= SFXGE_RX_BATCH) @@ -148,6 +165,18 @@ sfxge_ev_exception(void *arg, uint32_t code, uint32_t data) sc = evq->sc; + DBGPRINT(sc->dev, "[%d] %s", evq->index, + (code == EFX_EXCEPTION_RX_RECOVERY) ? "RX_RECOVERY" : + (code == EFX_EXCEPTION_RX_DSC_ERROR) ? "RX_DSC_ERROR" : + (code == EFX_EXCEPTION_TX_DSC_ERROR) ? "TX_DSC_ERROR" : + (code == EFX_EXCEPTION_UNKNOWN_SENSOREVT) ? "UNKNOWN_SENSOREVT" : + (code == EFX_EXCEPTION_FWALERT_SRAM) ? "FWALERT_SRAM" : + (code == EFX_EXCEPTION_UNKNOWN_FWALERT) ? "UNKNOWN_FWALERT" : + (code == EFX_EXCEPTION_RX_ERROR) ? "RX_ERROR" : + (code == EFX_EXCEPTION_TX_ERROR) ? "TX_ERROR" : + (code == EFX_EXCEPTION_EV_ERROR) ? "EV_ERROR" : + "UNKNOWN"); + evq->exception = B_TRUE; if (code != EFX_EXCEPTION_UNKNOWN_SENSOREVT) { @@ -180,6 +209,11 @@ sfxge_ev_rxq_flush_done(void *arg, uint32_t rxq_index) /* Resend a software event on the correct queue */ index = rxq->index; + if (index == evq->index) { + sfxge_rx_qflush_done(rxq); + return (B_FALSE); + } + evq = sc->evq[index]; label = rxq_index; @@ -299,6 +333,11 @@ sfxge_ev_txq_flush_done(void *arg, uint32_t txq_index) KASSERT(txq->init_state == SFXGE_TXQ_INITIALIZED, ("txq not initialized")); + if (txq->evq_index == evq->index) { + sfxge_tx_qflush_done(txq); + return (B_FALSE); + } + /* Resend a software event on the correct queue */ evq = sc->evq[txq->evq_index]; @@ -551,7 +590,9 @@ sfxge_ev_initialized(void *arg) evq = (struct sfxge_evq *)arg; SFXGE_EVQ_LOCK_ASSERT_OWNED(evq); - KASSERT(evq->init_state == SFXGE_EVQ_STARTING, + /* Init done events may be duplicated on 7xxx */ + KASSERT(evq->init_state == SFXGE_EVQ_STARTING || + evq->init_state == SFXGE_EVQ_STARTED, ("evq not starting")); evq->init_state = SFXGE_EVQ_STARTED; diff --git a/sys/dev/sfxge/sfxge_intr.c b/sys/dev/sfxge/sfxge_intr.c index 240a33f02b86..09538ccb8e3d 100644 --- a/sys/dev/sfxge/sfxge_intr.c +++ b/sys/dev/sfxge/sfxge_intr.c @@ -1,30 +1,34 @@ /*- - * Copyright (c) 2010-2011 Solarflare Communications, Inc. + * Copyright (c) 2010-2015 Solarflare Communications Inc. * All rights reserved. * * This software was developed in part by Philip Paeps under contract for * Solarflare Communications, Inc. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -36,7 +40,6 @@ __FBSDID("$FreeBSD$"); #include #include #include -#include #include #include @@ -294,16 +297,9 @@ sfxge_intr_setup_msix(struct sfxge_softc *sc) if (count == 0) return (EINVAL); - /* Limit the number of interrupts to the number of CPUs. */ - if (count > mp_ncpus) - count = mp_ncpus; - - /* Not very likely these days... */ - if (count > EFX_MAXRSS) - count = EFX_MAXRSS; - - if (sc->max_rss_channels > 0 && count > sc->max_rss_channels) - count = sc->max_rss_channels; + /* Do not try to allocate more than already estimated EVQ maximum */ + KASSERT(sc->evq_max > 0, ("evq_max is zero")); + count = MIN(count, sc->evq_max); rid = PCIR_BAR(4); resp = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); @@ -412,7 +408,7 @@ static const char *const __sfxge_err[] = { void sfxge_err(efsys_identifier_t *arg, unsigned int code, uint32_t dword0, - uint32_t dword1) + uint32_t dword1) { struct sfxge_softc *sc = (struct sfxge_softc *)arg; device_t dev = sc->dev; diff --git a/sys/dev/sfxge/sfxge_ioc.h b/sys/dev/sfxge/sfxge_ioc.h new file mode 100644 index 000000000000..bf079c87e0c9 --- /dev/null +++ b/sys/dev/sfxge/sfxge_ioc.h @@ -0,0 +1,112 @@ +/*- + * Copyright (c) 2014-2015 Solarflare Communications Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. + * + * $FreeBSD$ + */ + +#ifndef _SYS_SFXGE_IOC_H +#define _SYS_SFXGE_IOC_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +/* More codes may be added if necessary */ +enum sfxge_ioc_codes { + SFXGE_MCDI_IOC, + SFXGE_NVRAM_IOC, + SFXGE_VPD_IOC +}; + +enum sfxge_nvram_ops { + SFXGE_NVRAM_OP_SIZE, + SFXGE_NVRAM_OP_READ, + SFXGE_NVRAM_OP_WRITE, + SFXGE_NVRAM_OP_ERASE, + SFXGE_NVRAM_OP_GET_VER, + SFXGE_NVRAM_OP_SET_VER +}; + +enum sfxge_nvram_types { + SFXGE_NVRAM_TYPE_BOOTROM, + SFXGE_NVRAM_TYPE_BOOTROM_CFG, + SFXGE_NVRAM_TYPE_MC, + SFXGE_NVRAM_TYPE_MC_GOLDEN, + SFXGE_NVRAM_TYPE_PHY, + SFXGE_NVRAM_TYPE_NULL_PHY, + SFXGE_NVRAM_TYPE_FPGA, + SFXGE_NVRAM_TYPE_FCFW, + SFXGE_NVRAM_TYPE_CPLD, + SFXGE_NVRAM_TYPE_FPGA_BACKUP, + SFXGE_NVRAM_TYPE_DYNAMIC_CFG +}; + +enum sfxge_vpd_ops { + SFXGE_VPD_OP_GET_KEYWORD, + SFXGE_VPD_OP_SET_KEYWORD +}; + +#define SFXGE_MCDI_MAX_PAYLOAD 0x400 +#define SFXGE_VPD_MAX_PAYLOAD 0x100 + +typedef struct sfxge_ioc_s { + uint32_t op; + union { + struct { + caddr_t payload; + uint32_t cmd; + size_t len; /* In and out */ + uint32_t rc; + } mcdi; + struct { + uint32_t op; + uint32_t type; + uint32_t offset; + uint32_t size; + uint32_t subtype; + uint16_t version[4]; /* get/set_ver */ + caddr_t data; + } nvram; + struct { + uint8_t op; + uint8_t tag; + uint16_t keyword; + uint16_t len; /* In or out */ + caddr_t payload; + } vpd; + } u; +} __packed sfxge_ioc_t; + +#ifdef __cplusplus +} +#endif + +#endif /* _SYS_SFXGE_IOC_H */ diff --git a/sys/dev/sfxge/sfxge_mcdi.c b/sys/dev/sfxge/sfxge_mcdi.c index a1bc85701bd0..fb9f6500f0ad 100644 --- a/sys/dev/sfxge/sfxge_mcdi.c +++ b/sys/dev/sfxge/sfxge_mcdi.c @@ -1,30 +1,34 @@ /*- - * Copyright (c) 2010-2011 Solarflare Communications, Inc. + * Copyright (c) 2010-2015 Solarflare Communications Inc. * All rights reserved. * * This software was developed in part by Philip Paeps under contract for * Solarflare Communications, Inc. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -37,6 +41,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include "common/efx.h" #include "common/efx_mcdi.h" @@ -48,36 +53,6 @@ __FBSDID("$FreeBSD$"); #define SFXGE_MCDI_POLL_INTERVAL_MAX 100000 /* 100ms in 1us units */ #define SFXGE_MCDI_WATCHDOG_INTERVAL 10000000 /* 10s in 1us units */ -/* Acquire exclusive access to MCDI for the duration of a request. */ -static void -sfxge_mcdi_acquire(struct sfxge_mcdi *mcdi) -{ - SFXGE_MCDI_LOCK(mcdi); - KASSERT(mcdi->state != SFXGE_MCDI_UNINITIALIZED, - ("MCDI not initialized")); - - while (mcdi->state != SFXGE_MCDI_INITIALIZED) - (void)cv_wait_sig(&mcdi->cv, &mcdi->lock); - mcdi->state = SFXGE_MCDI_BUSY; - - SFXGE_MCDI_UNLOCK(mcdi); -} - -/* Release ownership of MCDI on request completion. */ -static void -sfxge_mcdi_release(struct sfxge_mcdi *mcdi) -{ - SFXGE_MCDI_LOCK(mcdi); - KASSERT((mcdi->state == SFXGE_MCDI_BUSY || - mcdi->state == SFXGE_MCDI_COMPLETED), - ("MCDI not busy or task not completed")); - - mcdi->state = SFXGE_MCDI_INITIALIZED; - cv_broadcast(&mcdi->cv); - - SFXGE_MCDI_UNLOCK(mcdi); -} - static void sfxge_mcdi_timeout(struct sfxge_softc *sc) { @@ -140,13 +115,16 @@ sfxge_mcdi_execute(void *arg, efx_mcdi_req_t *emrp) sc = (struct sfxge_softc *)arg; mcdi = &sc->mcdi; - sfxge_mcdi_acquire(mcdi); + SFXGE_MCDI_LOCK(mcdi); + + KASSERT(mcdi->state == SFXGE_MCDI_INITIALIZED, + ("MCDI not initialized")); /* Issue request and poll for completion. */ efx_mcdi_request_start(sc->enp, emrp, B_FALSE); sfxge_mcdi_poll(sc); - sfxge_mcdi_release(mcdi); + SFXGE_MCDI_UNLOCK(mcdi); } static void @@ -158,11 +136,10 @@ sfxge_mcdi_ev_cpl(void *arg) sc = (struct sfxge_softc *)arg; mcdi = &sc->mcdi; - SFXGE_MCDI_LOCK(mcdi); - KASSERT(mcdi->state == SFXGE_MCDI_BUSY, ("MCDI not busy")); - mcdi->state = SFXGE_MCDI_COMPLETED; - cv_broadcast(&mcdi->cv); - SFXGE_MCDI_UNLOCK(mcdi); + KASSERT(mcdi->state == SFXGE_MCDI_INITIALIZED, + ("MCDI not initialized")); + + /* We do not use MCDI completion, MCDI is simply polled */ } static void @@ -186,17 +163,96 @@ sfxge_mcdi_exception(void *arg, efx_mcdi_exception_t eme) sfxge_schedule_reset(sc); } +int +sfxge_mcdi_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ip) +{ + const efx_nic_cfg_t *encp = efx_nic_cfg_get(sc->enp); + struct sfxge_mcdi *mp = &(sc->mcdi); + efx_mcdi_req_t emr; + uint8_t *mcdibuf; + int rc; + + if (mp->state == SFXGE_MCDI_UNINITIALIZED) { + rc = ENODEV; + goto fail1; + } + + if (!(encp->enc_features & EFX_FEATURE_MCDI)) { + rc = ENOTSUP; + goto fail2; + } + + if (ip->u.mcdi.len > SFXGE_MCDI_MAX_PAYLOAD) { + rc = EINVAL; + goto fail3; + } + + mcdibuf = malloc(SFXGE_MCDI_MAX_PAYLOAD, M_TEMP, M_WAITOK | M_ZERO); + if (mcdibuf == NULL) { + rc = ENOMEM; + goto fail4; + } + if ((rc = copyin(ip->u.mcdi.payload, mcdibuf, ip->u.mcdi.len)) != 0) { + goto fail5; + } + + emr.emr_cmd = ip->u.mcdi.cmd; + emr.emr_in_buf = mcdibuf; + emr.emr_in_length = ip->u.mcdi.len; + + emr.emr_out_buf = mcdibuf; + emr.emr_out_length = SFXGE_MCDI_MAX_PAYLOAD; + + sfxge_mcdi_execute(sc, &emr); + + ip->u.mcdi.rc = emr.emr_rc; + ip->u.mcdi.cmd = emr.emr_cmd; + ip->u.mcdi.len = emr.emr_out_length_used; + if ((rc = copyout(mcdibuf, ip->u.mcdi.payload, ip->u.mcdi.len)) != 0) { + goto fail6; + } + + /* + * Helpfully trigger a device reset in response to an MCDI_CMD_REBOOT + * Both ports will see ->emt_exception callbacks on the next MCDI poll + */ + if (ip->u.mcdi.cmd == MC_CMD_REBOOT) { + + EFSYS_PROBE(mcdi_ioctl_mc_reboot); + /* sfxge_t->s_state_lock held */ + (void) sfxge_schedule_reset(sc); + } + + free(mcdibuf, M_TEMP); + + return (0); + +fail6: +fail5: + free(mcdibuf, M_TEMP); +fail4: +fail3: +fail2: +fail1: + return (rc); +} + + int sfxge_mcdi_init(struct sfxge_softc *sc) { efx_nic_t *enp; struct sfxge_mcdi *mcdi; efx_mcdi_transport_t *emtp; + efsys_mem_t *esmp; + int max_msg_size; int rc; enp = sc->enp; mcdi = &sc->mcdi; emtp = &mcdi->transport; + esmp = &mcdi->mem; + max_msg_size = sizeof (uint32_t) + MCDI_CTL_SDU_LEN_MAX_V2; KASSERT(mcdi->state == SFXGE_MCDI_UNINITIALIZED, ("MCDI already initialized")); @@ -205,13 +261,15 @@ sfxge_mcdi_init(struct sfxge_softc *sc) mcdi->state = SFXGE_MCDI_INITIALIZED; + if ((rc = sfxge_dma_alloc(sc, max_msg_size, esmp)) != 0) + goto fail; + emtp->emt_context = sc; + emtp->emt_dma_mem = esmp; emtp->emt_execute = sfxge_mcdi_execute; emtp->emt_ev_cpl = sfxge_mcdi_ev_cpl; emtp->emt_exception = sfxge_mcdi_exception; - cv_init(&mcdi->cv, "sfxge_mcdi"); - if ((rc = efx_mcdi_init(enp, emtp)) != 0) goto fail; @@ -229,10 +287,12 @@ sfxge_mcdi_fini(struct sfxge_softc *sc) struct sfxge_mcdi *mcdi; efx_nic_t *enp; efx_mcdi_transport_t *emtp; + efsys_mem_t *esmp; enp = sc->enp; mcdi = &sc->mcdi; emtp = &mcdi->transport; + esmp = &mcdi->mem; SFXGE_MCDI_LOCK(mcdi); KASSERT(mcdi->state == SFXGE_MCDI_INITIALIZED, @@ -241,8 +301,9 @@ sfxge_mcdi_fini(struct sfxge_softc *sc) efx_mcdi_fini(enp); bzero(emtp, sizeof(*emtp)); - cv_destroy(&mcdi->cv); SFXGE_MCDI_UNLOCK(mcdi); + sfxge_dma_free(esmp); + SFXGE_MCDI_LOCK_DESTROY(mcdi); } diff --git a/sys/dev/sfxge/sfxge_nvram.c b/sys/dev/sfxge/sfxge_nvram.c new file mode 100644 index 000000000000..c4fa224c53ba --- /dev/null +++ b/sys/dev/sfxge/sfxge_nvram.c @@ -0,0 +1,203 @@ +/*- + * Copyright (c) 2010-2015 Solarflare Communications, Inc. + * All rights reserved. + * + * This software was developed in part by OKTET Labs Ltd. under contract for + * Solarflare Communications, Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + + +#include +#include + +#include "common/efx.h" +#include "sfxge.h" + +/* These data make no real sense, they are here just to make sfupdate happy. + * Any code that would rely on it is broken. + */ +static const uint8_t fake_dynamic_cfg_nvram[] = { + 0x7a, 0xda, 0x10, 0xef, 0x0c, 0x00, 0x00, 0x00, + 0x00, 0x05, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x48, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x10, + 0x08, 0x00, 0x00, 0x00, 0x90, 0x04, 0x00, 0x52, + 0x56, 0x01, 0xc3, 0x78, 0x01, 0x00, 0x03, 0x10, + 0x08, 0x00, 0x00, 0x00, 0x90, 0x04, 0x00, 0x52, + 0x56, 0x01, 0xc3, 0x78, 0x57, 0x1a, 0x10, 0xef, + 0x08, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x02, 0x0b, 0x64, 0x7d, 0xee, 0xee, 0xee, 0xee +}; + +static int +sfxge_nvram_rw(struct sfxge_softc *sc, sfxge_ioc_t *ip, efx_nvram_type_t type, + boolean_t write) +{ + efx_nic_t *enp = sc->enp; + size_t total_size = ip->u.nvram.size; + size_t chunk_size; + off_t off; + int rc = 0; + uint8_t *buf; + + if (type == EFX_NVRAM_DYNAMIC_CFG && sc->family == EFX_FAMILY_SIENA) { + if (write) + return (0); + rc = copyout(fake_dynamic_cfg_nvram, ip->u.nvram.data, + MIN(total_size, sizeof(fake_dynamic_cfg_nvram))); + return (rc); + } + + if ((rc = efx_nvram_rw_start(enp, type, &chunk_size)) != 0) + goto fail1; + + buf = malloc(chunk_size, M_TEMP, M_WAITOK); + if (buf == NULL) { + rc = ENOMEM; + goto fail2; + } + + off = 0; + while (total_size) { + size_t len = MIN(chunk_size, total_size); + + if (write) { + rc = copyin(ip->u.nvram.data + off, buf, len); + if (rc != 0) + goto fail3; + rc = efx_nvram_write_chunk(enp, type, + ip->u.nvram.offset + off, buf, len); + if (rc != 0) + goto fail3; + } else { + rc = efx_nvram_read_chunk(enp, type, + ip->u.nvram.offset + off, buf, len); + if (rc != 0) + goto fail3; + rc = copyout(buf, ip->u.nvram.data + off, len); + if (rc != 0) + goto fail3; + } + + total_size -= len; + off += len; + } + +fail3: + free(buf, M_TEMP); +fail2: + efx_nvram_rw_finish(enp, type); +fail1: + return (rc); +} + + +static int +sfxge_nvram_erase(struct sfxge_softc *sc, efx_nvram_type_t type) +{ + efx_nic_t *enp = sc->enp; + size_t chunk_size; + int rc = 0; + + if (type == EFX_NVRAM_DYNAMIC_CFG && sc->family == EFX_FAMILY_SIENA) + return (0); + + if ((rc = efx_nvram_rw_start(enp, type, &chunk_size)) != 0) + return (rc); + + rc = efx_nvram_erase(enp, type); + + efx_nvram_rw_finish(enp, type); + return (rc); +} + +int +sfxge_nvram_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ip) +{ + static const efx_nvram_type_t nvram_types[] = { + [SFXGE_NVRAM_TYPE_BOOTROM] = EFX_NVRAM_BOOTROM, + [SFXGE_NVRAM_TYPE_BOOTROM_CFG] = EFX_NVRAM_BOOTROM_CFG, + [SFXGE_NVRAM_TYPE_MC] = EFX_NVRAM_MC_FIRMWARE, + [SFXGE_NVRAM_TYPE_MC_GOLDEN] = EFX_NVRAM_MC_GOLDEN, + [SFXGE_NVRAM_TYPE_PHY] = EFX_NVRAM_PHY, + [SFXGE_NVRAM_TYPE_NULL_PHY] = EFX_NVRAM_NULLPHY, + [SFXGE_NVRAM_TYPE_FPGA] = EFX_NVRAM_FPGA, + [SFXGE_NVRAM_TYPE_FCFW] = EFX_NVRAM_FCFW, + [SFXGE_NVRAM_TYPE_CPLD] = EFX_NVRAM_CPLD, + [SFXGE_NVRAM_TYPE_FPGA_BACKUP] = EFX_NVRAM_FPGA_BACKUP, + [SFXGE_NVRAM_TYPE_DYNAMIC_CFG] = EFX_NVRAM_DYNAMIC_CFG, + }; + + efx_nic_t *enp = sc->enp; + efx_nvram_type_t type; + int rc = 0; + + if (ip->u.nvram.type > SFXGE_NVRAM_TYPE_DYNAMIC_CFG) + return (EINVAL); + type = nvram_types[ip->u.nvram.type]; + if (type == EFX_NVRAM_MC_GOLDEN && + (ip->u.nvram.op == SFXGE_NVRAM_OP_WRITE || + ip->u.nvram.op == SFXGE_NVRAM_OP_ERASE || + ip->u.nvram.op == SFXGE_NVRAM_OP_SET_VER)) + return (EOPNOTSUPP); + + switch (ip->u.nvram.op) { + case SFXGE_NVRAM_OP_SIZE: + { + size_t size; + + if (type == EFX_NVRAM_DYNAMIC_CFG && sc->family == EFX_FAMILY_SIENA) { + ip->u.nvram.size = sizeof(fake_dynamic_cfg_nvram); + } else { + if ((rc = efx_nvram_size(enp, type, &size)) != 0) + return (rc); + ip->u.nvram.size = size; + } + break; + } + case SFXGE_NVRAM_OP_READ: + rc = sfxge_nvram_rw(sc, ip, type, B_FALSE); + break; + case SFXGE_NVRAM_OP_WRITE: + rc = sfxge_nvram_rw(sc, ip, type, B_TRUE); + break; + case SFXGE_NVRAM_OP_ERASE: + rc = sfxge_nvram_erase(sc, type); + break; + case SFXGE_NVRAM_OP_GET_VER: + rc = efx_nvram_get_version(enp, type, &ip->u.nvram.subtype, + &ip->u.nvram.version[0]); + break; + case SFXGE_NVRAM_OP_SET_VER: + rc = efx_nvram_set_version(enp, type, &ip->u.nvram.version[0]); + break; + default: + rc = EOPNOTSUPP; + break; + } + + return (rc); +} diff --git a/sys/dev/sfxge/sfxge_port.c b/sys/dev/sfxge/sfxge_port.c index ccedd4fdb6cb..412f477254fd 100644 --- a/sys/dev/sfxge/sfxge_port.c +++ b/sys/dev/sfxge/sfxge_port.c @@ -1,30 +1,34 @@ /*- - * Copyright (c) 2010-2011 Solarflare Communications, Inc. + * Copyright (c) 2010-2015 Solarflare Communications Inc. * All rights reserved. * * This software was developed in part by Philip Paeps under contract for * Solarflare Communications, Inc. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -39,6 +43,8 @@ __FBSDID("$FreeBSD$"); #include "sfxge.h" +static int sfxge_phy_cap_mask(struct sfxge_softc *, int, uint32_t *); + static int sfxge_mac_stat_update(struct sfxge_softc *sc) { @@ -68,10 +74,6 @@ sfxge_mac_stat_update(struct sfxge_softc *sc) for (count = 0; count < 100; ++count) { EFSYS_PROBE1(wait, unsigned int, count); - /* Synchronize the DMA memory for reading */ - bus_dmamap_sync(esmp->esm_tag, esmp->esm_map, - BUS_DMASYNC_POSTREAD); - /* Try to update the cached counters */ if ((rc = efx_mac_stats_update(sc->enp, esmp, port->mac_stats.decode_buf, NULL)) != EAGAIN) @@ -292,6 +294,7 @@ static const uint64_t sfxge_link_baudrate[EFX_LINK_NMODES] = { [EFX_LINK_1000HDX] = IF_Gbps(1), [EFX_LINK_1000FDX] = IF_Gbps(1), [EFX_LINK_10000FDX] = IF_Gbps(10), + [EFX_LINK_40000FDX] = IF_Gbps(40), }; void @@ -340,42 +343,68 @@ sfxge_mac_poll_work(void *arg, int npending) } static int -sfxge_mac_filter_set_locked(struct sfxge_softc *sc) +sfxge_mac_multicast_list_set(struct sfxge_softc *sc) { - unsigned int bucket[EFX_MAC_HASH_BITS]; struct ifnet *ifp = sc->ifnet; + struct sfxge_port *port = &sc->port; + uint8_t *mcast_addr = port->mcast_addrs; struct ifmultiaddr *ifma; struct sockaddr_dl *sa; - efx_nic_t *enp = sc->enp; - unsigned int index; + int rc = 0; + + mtx_assert(&port->lock, MA_OWNED); + + port->mcast_count = 0; + if_maddr_rlock(ifp); + TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { + if (ifma->ifma_addr->sa_family == AF_LINK) { + if (port->mcast_count == EFX_MAC_MULTICAST_LIST_MAX) { + device_printf(sc->dev, + "Too many multicast addresses\n"); + rc = EINVAL; + break; + } + + sa = (struct sockaddr_dl *)ifma->ifma_addr; + memcpy(mcast_addr, LLADDR(sa), EFX_MAC_ADDR_LEN); + mcast_addr += EFX_MAC_ADDR_LEN; + ++port->mcast_count; + } + } + if_maddr_runlock(ifp); + + if (rc == 0) { + rc = efx_mac_multicast_list_set(sc->enp, port->mcast_addrs, + port->mcast_count); + if (rc != 0) + device_printf(sc->dev, + "Cannot set multicast address list\n"); + } + + return (rc); +} + +static int +sfxge_mac_filter_set_locked(struct sfxge_softc *sc) +{ + struct ifnet *ifp = sc->ifnet; + struct sfxge_port *port = &sc->port; + boolean_t all_mulcst; int rc; - /* Set promisc-unicast and broadcast filter bits */ - if ((rc = efx_mac_filter_set(enp, !!(ifp->if_flags & IFF_PROMISC), - B_TRUE)) != 0) - return (rc); + mtx_assert(&port->lock, MA_OWNED); - /* Set multicast hash filter */ - if (ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI)) { - for (index = 0; index < EFX_MAC_HASH_BITS; index++) - bucket[index] = 1; - } else { - /* Broadcast frames also go through the multicast - * filter, and the broadcast address hashes to - * 0xff. */ - bucket[0xff] = 1; + all_mulcst = !!(ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI)); - if_maddr_rlock(ifp); - TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { - if (ifma->ifma_addr->sa_family == AF_LINK) { - sa = (struct sockaddr_dl *)ifma->ifma_addr; - index = ether_crc32_le(LLADDR(sa), 6) & 0xff; - bucket[index] = 1; - } - } - if_maddr_runlock(ifp); - } - return (efx_mac_hash_set(enp, bucket)); + rc = sfxge_mac_multicast_list_set(sc); + /* Fallback to all multicast if cannot set multicast list */ + if (rc != 0) + all_mulcst = B_TRUE; + + rc = efx_mac_filter_set(sc->enp, !!(ifp->if_flags & IFF_PROMISC), + (port->mcast_count > 0), all_mulcst, B_TRUE); + + return (rc); } int @@ -429,7 +458,9 @@ sfxge_port_stop(struct sfxge_softc *sc) port->link_mode = EFX_LINK_UNKNOWN; /* Destroy the common code port object. */ - efx_port_fini(sc->enp); + efx_port_fini(enp); + + efx_filter_fini(enp); SFXGE_PORT_UNLOCK(port); } @@ -443,6 +474,7 @@ sfxge_port_start(struct sfxge_softc *sc) efx_nic_t *enp; size_t pdu; int rc; + uint32_t phy_cap_mask; port = &sc->port; enp = sc->enp; @@ -452,6 +484,10 @@ sfxge_port_start(struct sfxge_softc *sc) KASSERT(port->init_state == SFXGE_PORT_INITIALIZED, ("port not initialized")); + /* Initialise the required filtering */ + if ((rc = efx_filter_init(enp)) != 0) + goto fail_filter_init; + /* Initialize the port object in the common code. */ if ((rc = efx_port_init(sc->enp)) != 0) goto fail; @@ -463,7 +499,7 @@ sfxge_port_start(struct sfxge_softc *sc) if ((rc = efx_mac_fcntl_set(enp, sfxge_port_wanted_fc(sc), B_TRUE)) != 0) - goto fail2; + goto fail3; /* Set the unicast address */ if_addr_rlock(ifp); @@ -471,21 +507,24 @@ sfxge_port_start(struct sfxge_softc *sc) mac_addr, sizeof(mac_addr)); if_addr_runlock(ifp); if ((rc = efx_mac_addr_set(enp, mac_addr)) != 0) - goto fail; + goto fail4; sfxge_mac_filter_set_locked(sc); /* Update MAC stats by DMA every second */ if ((rc = efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, - 1000, B_FALSE)) != 0) - goto fail2; + 1000, B_FALSE)) != 0) + goto fail6; if ((rc = efx_mac_drain(enp, B_FALSE)) != 0) - goto fail3; + goto fail8; - if ((rc = efx_phy_adv_cap_set(sc->enp, sc->media.ifm_cur->ifm_data)) - != 0) - goto fail4; + if ((rc = sfxge_phy_cap_mask(sc, sc->media.ifm_cur->ifm_media, + &phy_cap_mask)) != 0) + goto fail9; + + if ((rc = efx_phy_adv_cap_set(sc->enp, phy_cap_mask)) != 0) + goto fail10; port->init_state = SFXGE_PORT_STARTED; @@ -495,14 +534,20 @@ sfxge_port_start(struct sfxge_softc *sc) return (0); -fail4: +fail10: +fail9: (void)efx_mac_drain(enp, B_TRUE); +fail8: + (void)efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, 0, B_FALSE); +fail6: +fail4: fail3: - (void)efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, - 0, B_FALSE); + fail2: - efx_port_fini(sc->enp); + efx_port_fini(enp); fail: + efx_filter_fini(enp); +fail_filter_init: SFXGE_PORT_UNLOCK(port); return (rc); @@ -645,12 +690,14 @@ sfxge_port_init(struct sfxge_softc *sc) SFXGE_PORT_LOCK_INIT(port, device_get_nameunit(sc->dev)); + DBGPRINT(sc->dev, "alloc PHY stats"); port->phy_stats.decode_buf = malloc(EFX_PHY_NSTATS * sizeof(uint32_t), M_SFXGE, M_WAITOK | M_ZERO); if ((rc = sfxge_dma_alloc(sc, EFX_PHY_STATS_SIZE, phy_stats_buf)) != 0) goto fail; sfxge_phy_stat_init(sc); + DBGPRINT(sc->dev, "init sysctl"); sysctl_ctx = device_get_sysctl_ctx(sc->dev); sysctl_tree = device_get_sysctl_tree(sc->dev); @@ -666,6 +713,7 @@ sfxge_port_init(struct sfxge_softc *sc) sfxge_port_link_fc_handler, "IU", "link flow control mode"); #endif + DBGPRINT(sc->dev, "alloc MAC stats"); port->mac_stats.decode_buf = malloc(EFX_MAC_NSTATS * sizeof(uint64_t), M_SFXGE, M_WAITOK | M_ZERO); if ((rc = sfxge_dma_alloc(sc, EFX_MAC_STATS_SIZE, mac_stats_buf)) != 0) @@ -674,6 +722,7 @@ sfxge_port_init(struct sfxge_softc *sc) port->init_state = SFXGE_PORT_INITIALIZED; + DBGPRINT(sc->dev, "success"); return (0); fail2: @@ -683,10 +732,11 @@ sfxge_port_init(struct sfxge_softc *sc) free(port->phy_stats.decode_buf, M_SFXGE); SFXGE_PORT_LOCK_DESTROY(port); port->sc = NULL; + DBGPRINT(sc->dev, "failed %d", rc); return (rc); } -static int sfxge_link_mode[EFX_PHY_MEDIA_NTYPES][EFX_LINK_NMODES] = { +static const int sfxge_link_mode[EFX_PHY_MEDIA_NTYPES][EFX_LINK_NMODES] = { [EFX_PHY_MEDIA_CX4] = { [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_CX4, }, @@ -697,6 +747,11 @@ static int sfxge_link_mode[EFX_PHY_MEDIA_NTYPES][EFX_LINK_NMODES] = { /* Don't know the module type, but assume SR for now. */ [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR, }, + [EFX_PHY_MEDIA_QSFP_PLUS] = { + /* Don't know the module type, but assume SR for now. */ + [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR, + [EFX_LINK_40000FDX] = IFM_ETHER | IFM_FDX | IFM_40G_CR4, + }, [EFX_PHY_MEDIA_SFP_PLUS] = { /* Don't know the module type, but assume SX/SR for now. */ [EFX_LINK_1000FDX] = IFM_ETHER | IFM_FDX | IFM_1000_SX, @@ -738,12 +793,99 @@ sfxge_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) SFXGE_ADAPTER_UNLOCK(sc); } +static efx_phy_cap_type_t +sfxge_link_mode_to_phy_cap(efx_link_mode_t mode) +{ + switch (mode) { + case EFX_LINK_10HDX: + return (EFX_PHY_CAP_10HDX); + case EFX_LINK_10FDX: + return (EFX_PHY_CAP_10FDX); + case EFX_LINK_100HDX: + return (EFX_PHY_CAP_100HDX); + case EFX_LINK_100FDX: + return (EFX_PHY_CAP_100FDX); + case EFX_LINK_1000HDX: + return (EFX_PHY_CAP_1000HDX); + case EFX_LINK_1000FDX: + return (EFX_PHY_CAP_1000FDX); + case EFX_LINK_10000FDX: + return (EFX_PHY_CAP_10000FDX); + case EFX_LINK_40000FDX: + return (EFX_PHY_CAP_40000FDX); + default: + EFSYS_ASSERT(B_FALSE); + return (EFX_PHY_CAP_INVALID); + } +} + +static int +sfxge_phy_cap_mask(struct sfxge_softc *sc, int ifmedia, uint32_t *phy_cap_mask) +{ + /* Get global options (duplex), type and subtype bits */ + int ifmedia_masked = ifmedia & (IFM_GMASK | IFM_NMASK | IFM_TMASK); + efx_phy_media_type_t medium_type; + boolean_t mode_found = B_FALSE; + uint32_t cap_mask, mode_cap_mask; + efx_link_mode_t mode; + efx_phy_cap_type_t phy_cap; + + efx_phy_media_type_get(sc->enp, &medium_type); + if (medium_type >= nitems(sfxge_link_mode)) { + if_printf(sc->ifnet, "unexpected media type %d\n", medium_type); + return (EINVAL); + } + + efx_phy_adv_cap_get(sc->enp, EFX_PHY_CAP_PERM, &cap_mask); + + for (mode = EFX_LINK_10HDX; mode < EFX_LINK_NMODES; mode++) { + if (ifmedia_masked == sfxge_link_mode[medium_type][mode]) { + mode_found = B_TRUE; + break; + } + } + + if (!mode_found) { + /* + * If media is not in the table, it must be IFM_AUTO. + */ + KASSERT((cap_mask & (1 << EFX_PHY_CAP_AN)) && + ifmedia_masked == (IFM_ETHER | IFM_AUTO), + ("%s: no mode for media %#x", __func__, ifmedia)); + *phy_cap_mask = (cap_mask & ~(1 << EFX_PHY_CAP_ASYM)); + return (0); + } + + phy_cap = sfxge_link_mode_to_phy_cap(mode); + if (phy_cap == EFX_PHY_CAP_INVALID) { + if_printf(sc->ifnet, + "cannot map link mode %d to phy capability\n", + mode); + return (EINVAL); + } + + mode_cap_mask = (1 << phy_cap); + mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_AN); +#ifdef SFXGE_HAVE_PAUSE_MEDIAOPTS + if (ifmedia & IFM_ETH_RXPAUSE) + mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_PAUSE); + if (!(ifmedia & IFM_ETH_TXPAUSE)) + mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_ASYM); +#else + mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_PAUSE); +#endif + + *phy_cap_mask = mode_cap_mask; + return (0); +} + static int sfxge_media_change(struct ifnet *ifp) { struct sfxge_softc *sc; struct ifmedia_entry *ifm; int rc; + uint32_t phy_cap_mask; sc = ifp->if_softc; ifm = sc->media.ifm_cur; @@ -759,7 +901,10 @@ sfxge_media_change(struct ifnet *ifp) if (rc != 0) goto out; - rc = efx_phy_adv_cap_set(sc->enp, ifm->ifm_data); + if ((rc = sfxge_phy_cap_mask(sc, ifm->ifm_media, &phy_cap_mask)) != 0) + goto out; + + rc = efx_phy_adv_cap_set(sc->enp, phy_cap_mask); out: SFXGE_ADAPTER_UNLOCK(sc); @@ -771,12 +916,17 @@ int sfxge_port_ifmedia_init(struct sfxge_softc *sc) efx_phy_media_type_t medium_type; uint32_t cap_mask, mode_cap_mask; efx_link_mode_t mode; + efx_phy_cap_type_t phy_cap; int mode_ifm, best_mode_ifm = 0; int rc; - /* We need port state to initialise the ifmedia list. */ - if ((rc = efx_nic_init(sc->enp)) != 0) - goto out; + /* + * We need port state to initialise the ifmedia list. + * It requires initialized NIC what is already done in + * sfxge_create() when resources are estimated. + */ + if ((rc = efx_filter_init(sc->enp)) != 0) + goto out1; if ((rc = efx_port_init(sc->enp)) != 0) goto out2; @@ -801,41 +951,30 @@ int sfxge_port_ifmedia_init(struct sfxge_softc *sc) efx_phy_media_type_get(sc->enp, &medium_type); efx_phy_adv_cap_get(sc->enp, EFX_PHY_CAP_PERM, &cap_mask); - EFX_STATIC_ASSERT(EFX_LINK_10HDX == EFX_PHY_CAP_10HDX + 1); - EFX_STATIC_ASSERT(EFX_LINK_10FDX == EFX_PHY_CAP_10FDX + 1); - EFX_STATIC_ASSERT(EFX_LINK_100HDX == EFX_PHY_CAP_100HDX + 1); - EFX_STATIC_ASSERT(EFX_LINK_100FDX == EFX_PHY_CAP_100FDX + 1); - EFX_STATIC_ASSERT(EFX_LINK_1000HDX == EFX_PHY_CAP_1000HDX + 1); - EFX_STATIC_ASSERT(EFX_LINK_1000FDX == EFX_PHY_CAP_1000FDX + 1); - EFX_STATIC_ASSERT(EFX_LINK_10000FDX == EFX_PHY_CAP_10000FDX + 1); + for (mode = EFX_LINK_10HDX; mode < EFX_LINK_NMODES; mode++) { + phy_cap = sfxge_link_mode_to_phy_cap(mode); + if (phy_cap == EFX_PHY_CAP_INVALID) + continue; - for (mode = EFX_LINK_10HDX; mode <= EFX_LINK_10000FDX; mode++) { - mode_cap_mask = 1 << (mode - 1); + mode_cap_mask = (1 << phy_cap); mode_ifm = sfxge_link_mode[medium_type][mode]; if ((cap_mask & mode_cap_mask) && mode_ifm) { - mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_AN); + /* No flow-control */ + ifmedia_add(&sc->media, mode_ifm, 0, NULL); #ifdef SFXGE_HAVE_PAUSE_MEDIAOPTS - /* No flow-control */ - ifmedia_add(&sc->media, mode_ifm, mode_cap_mask, NULL); - /* Respond-only. If using AN, we implicitly * offer symmetric as well, but that doesn't * mean we *have* to generate pause frames. */ - mode_cap_mask |= cap_mask & ((1 << EFX_PHY_CAP_PAUSE) | - (1 << EFX_PHY_CAP_ASYM)); mode_ifm |= IFM_ETH_RXPAUSE; - ifmedia_add(&sc->media, mode_ifm, mode_cap_mask, NULL); + ifmedia_add(&sc->media, mode_ifm, 0, NULL); /* Symmetric */ - mode_cap_mask &= ~(1 << EFX_PHY_CAP_ASYM); mode_ifm |= IFM_ETH_TXPAUSE; -#else /* !SFXGE_HAVE_PAUSE_MEDIAOPTS */ - mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_PAUSE); + ifmedia_add(&sc->media, mode_ifm, 0, NULL); #endif - ifmedia_add(&sc->media, mode_ifm, mode_cap_mask, NULL); /* Link modes are numbered in order of speed, * so assume the last one available is the best. @@ -847,8 +986,7 @@ int sfxge_port_ifmedia_init(struct sfxge_softc *sc) if (cap_mask & (1 << EFX_PHY_CAP_AN)) { /* Add autoselect mode. */ mode_ifm = IFM_ETHER | IFM_AUTO; - ifmedia_add(&sc->media, mode_ifm, - cap_mask & ~(1 << EFX_PHY_CAP_ASYM), NULL); + ifmedia_add(&sc->media, mode_ifm, 0, NULL); best_mode_ifm = mode_ifm; } @@ -858,7 +996,7 @@ int sfxge_port_ifmedia_init(struct sfxge_softc *sc) /* Now discard port state until interface is started. */ efx_port_fini(sc->enp); out2: - efx_nic_fini(sc->enp); -out: + efx_filter_fini(sc->enp); +out1: return (rc); } diff --git a/sys/dev/sfxge/sfxge_rx.c b/sys/dev/sfxge/sfxge_rx.c index 9216ac93b815..3782c3496674 100644 --- a/sys/dev/sfxge/sfxge_rx.c +++ b/sys/dev/sfxge/sfxge_rx.c @@ -1,30 +1,34 @@ /*- - * Copyright (c) 2010-2011 Solarflare Communications, Inc. + * Copyright (c) 2010-2015 Solarflare Communications Inc. * All rights reserved. * * This software was developed in part by Philip Paeps under contract for * Solarflare Communications, Inc. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ #include @@ -35,6 +39,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include #include @@ -256,7 +261,7 @@ sfxge_rx_qfill(struct sfxge_rxq *rxq, unsigned int target, boolean_t retrying) return; batch = 0; - mblksize = sc->rx_buffer_size; + mblksize = sc->rx_buffer_size - sc->rx_buffer_align; while (ntodo-- > 0) { unsigned int id; struct sfxge_rx_sw_desc *rx_desc; @@ -271,6 +276,12 @@ sfxge_rx_qfill(struct sfxge_rxq *rxq, unsigned int target, boolean_t retrying) m = rx_desc->mbuf = sfxge_rx_alloc_mbuf(sc); if (m == NULL) break; + + /* m_len specifies length of area to be mapped for DMA */ + m->m_len = mblksize; + m->m_data = (caddr_t)P2ROUNDUP((uintptr_t)m->m_data, CACHE_LINE_SIZE); + m->m_data += sc->rx_buffer_align; + sfxge_map_mbuf_fast(rxq->mem.esm_tag, rxq->mem.esm_map, m, &seg); addr[batch++] = seg.ds_addr; @@ -295,7 +306,15 @@ sfxge_rx_qfill(struct sfxge_rxq *rxq, unsigned int target, boolean_t retrying) bus_dmamap_sync(rxq->mem.esm_tag, rxq->mem.esm_map, BUS_DMASYNC_PREWRITE); - efx_rx_qpush(rxq->common, rxq->added); + efx_rx_qpush(rxq->common, rxq->added, &rxq->pushed); + + /* The queue could still be empty if no descriptors were actually + * pushed, in which case there will be no event to cause the next + * refill, so we must schedule a refill ourselves. + */ + if(rxq->pushed == rxq->completed) { + sfxge_rx_schedule_refill(rxq, retrying); + } } void @@ -322,23 +341,26 @@ static void sfxge_rx_deliver(struct sfxge_softc *sc, struct sfxge_rx_sw_desc *rx_desc) { struct mbuf *m = rx_desc->mbuf; + int flags = rx_desc->flags; int csum_flags; /* Convert checksum flags */ - csum_flags = (rx_desc->flags & EFX_CKSUM_IPV4) ? + csum_flags = (flags & EFX_CKSUM_IPV4) ? (CSUM_IP_CHECKED | CSUM_IP_VALID) : 0; - if (rx_desc->flags & EFX_CKSUM_TCPUDP) + if (flags & EFX_CKSUM_TCPUDP) csum_flags |= CSUM_DATA_VALID | CSUM_PSEUDO_HDR; - if (rx_desc->flags & (EFX_PKT_IPV4 | EFX_PKT_IPV6)) { - m->m_pkthdr.flowid = EFX_RX_HASH_VALUE(EFX_RX_HASHALG_TOEPLITZ, - mtod(m, uint8_t *)); + if (flags & (EFX_PKT_IPV4 | EFX_PKT_IPV6)) { + m->m_pkthdr.flowid = + efx_psuedo_hdr_hash_get(sc->enp, + EFX_RX_HASHALG_TOEPLITZ, + mtod(m, uint8_t *)); /* The hash covers a 4-tuple for TCP only */ M_HASHTYPE_SET(m, - (rx_desc->flags & EFX_PKT_IPV4) ? - ((rx_desc->flags & EFX_PKT_TCP) ? + (flags & EFX_PKT_IPV4) ? + ((flags & EFX_PKT_TCP) ? M_HASHTYPE_RSS_TCP_IPV4 : M_HASHTYPE_RSS_IPV4) : - ((rx_desc->flags & EFX_PKT_TCP) ? + ((flags & EFX_PKT_TCP) ? M_HASHTYPE_RSS_TCP_IPV6 : M_HASHTYPE_RSS_IPV6)); } m->m_data += sc->rx_prefix_size; @@ -665,8 +687,9 @@ sfxge_lro(struct sfxge_rxq *rxq, struct sfxge_rx_sw_desc *rx_buf) unsigned bucket; /* Get the hardware hash */ - conn_hash = EFX_RX_HASH_VALUE(EFX_RX_HASHALG_TOEPLITZ, - mtod(m, uint8_t *)); + conn_hash = efx_psuedo_hdr_hash_get(sc->enp, + EFX_RX_HASHALG_TOEPLITZ, + mtod(m, uint8_t *)); eh = (struct ether_header *)(m->m_data + sc->rx_prefix_size); if (eh->ether_type == htons(ETHERTYPE_VLAN)) { @@ -687,15 +710,18 @@ sfxge_lro(struct sfxge_rxq *rxq, struct sfxge_rx_sw_desc *rx_buf) */ if (l3_proto == htons(ETHERTYPE_IP)) { struct ip *iph = nh; - if ((iph->ip_p - IPPROTO_TCP) | - (iph->ip_hl - (sizeof(*iph) >> 2u)) | + + KASSERT(iph->ip_p == IPPROTO_TCP, + ("IPv4 protocol is not TCP, but packet marker is set")); + if ((iph->ip_hl - (sizeof(*iph) >> 2u)) | (iph->ip_off & htons(IP_MF | IP_OFFMASK))) goto deliver_now; th = (struct tcphdr *)(iph + 1); } else if (l3_proto == htons(ETHERTYPE_IPV6)) { struct ip6_hdr *iph = nh; - if (iph->ip6_nxt != IPPROTO_TCP) - goto deliver_now; + + KASSERT(iph->ip6_nxt == IPPROTO_TCP, + ("IPv6 next header is not TCP, but packet marker is set")); l2_id |= SFXGE_LRO_L2_ID_IPV6; th = (struct tcphdr *)(iph + 1); } else { @@ -791,7 +817,8 @@ void sfxge_rx_qcomplete(struct sfxge_rxq *rxq, boolean_t eop) { struct sfxge_softc *sc = rxq->sc; - int lro_enabled = sc->ifnet->if_capenable & IFCAP_LRO; + int if_capenable = sc->ifnet->if_capenable; + int lro_enabled = if_capenable & IFCAP_LRO; unsigned int index; struct sfxge_evq *evq; unsigned int completed; @@ -819,28 +846,57 @@ sfxge_rx_qcomplete(struct sfxge_rxq *rxq, boolean_t eop) if (rx_desc->flags & (EFX_ADDR_MISMATCH | EFX_DISCARD)) goto discard; + /* Read the length from the psuedo header if required */ + if (rx_desc->flags & EFX_PKT_PREFIX_LEN) { + uint16_t tmp_size; + int rc; + rc = efx_psuedo_hdr_pkt_length_get(sc->enp, + mtod(m, uint8_t *), + &tmp_size); + KASSERT(rc == 0, ("cannot get packet length: %d", rc)); + rx_desc->size = (int)tmp_size + sc->rx_prefix_size; + } + prefetch_read_many(mtod(m, caddr_t)); - /* Check for loopback packets */ - if (!(rx_desc->flags & EFX_PKT_IPV4) && - !(rx_desc->flags & EFX_PKT_IPV6)) { - struct ether_header *etherhp; + switch (rx_desc->flags & (EFX_PKT_IPV4 | EFX_PKT_IPV6)) { + case EFX_PKT_IPV4: + if (~if_capenable & IFCAP_RXCSUM) + rx_desc->flags &= + ~(EFX_CKSUM_IPV4 | EFX_CKSUM_TCPUDP); + break; + case EFX_PKT_IPV6: + if (~if_capenable & IFCAP_RXCSUM_IPV6) + rx_desc->flags &= ~EFX_CKSUM_TCPUDP; + break; + case 0: + /* Check for loopback packets */ + { + struct ether_header *etherhp; - /*LINTED*/ - etherhp = mtod(m, struct ether_header *); + /*LINTED*/ + etherhp = mtod(m, struct ether_header *); - if (etherhp->ether_type == - htons(SFXGE_ETHERTYPE_LOOPBACK)) { - EFSYS_PROBE(loopback); + if (etherhp->ether_type == + htons(SFXGE_ETHERTYPE_LOOPBACK)) { + EFSYS_PROBE(loopback); - rxq->loopback++; - goto discard; + rxq->loopback++; + goto discard; + } } + break; + default: + KASSERT(B_FALSE, + ("Rx descriptor with both IPv4 and IPv6 flags")); + goto discard; } /* Pass packet up the stack or into LRO (pipelined) */ if (prev != NULL) { - if (lro_enabled) + if (lro_enabled && + ((prev->flags & (EFX_PKT_TCP | EFX_CKSUM_TCPUDP)) == + (EFX_PKT_TCP | EFX_CKSUM_TCPUDP))) sfxge_lro(rxq, prev); else sfxge_rx_deliver(sc, prev); @@ -859,7 +915,9 @@ sfxge_rx_qcomplete(struct sfxge_rxq *rxq, boolean_t eop) /* Pass last packet up the stack or into LRO */ if (prev != NULL) { - if (lro_enabled) + if (lro_enabled && + ((prev->flags & (EFX_PKT_TCP | EFX_CKSUM_TCPUDP)) == + (EFX_PKT_TCP | EFX_CKSUM_TCPUDP))) sfxge_lro(rxq, prev); else sfxge_rx_deliver(sc, prev); @@ -883,6 +941,9 @@ sfxge_rx_qstop(struct sfxge_softc *sc, unsigned int index) struct sfxge_rxq *rxq; struct sfxge_evq *evq; unsigned int count; + unsigned int retry = 3; + + SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc); rxq = sc->rxq[index]; evq = sc->evq[index]; @@ -896,30 +957,43 @@ sfxge_rx_qstop(struct sfxge_softc *sc, unsigned int index) callout_stop(&rxq->refill_callout); -again: - rxq->flush_state = SFXGE_FLUSH_PENDING; + while (rxq->flush_state != SFXGE_FLUSH_DONE && retry != 0) { + rxq->flush_state = SFXGE_FLUSH_PENDING; - /* Flush the receive queue */ - efx_rx_qflush(rxq->common); + SFXGE_EVQ_UNLOCK(evq); - SFXGE_EVQ_UNLOCK(evq); - - count = 0; - do { - /* Spin for 100 ms */ - DELAY(100000); - - if (rxq->flush_state != SFXGE_FLUSH_PENDING) + /* Flush the receive queue */ + if (efx_rx_qflush(rxq->common) != 0) { + SFXGE_EVQ_LOCK(evq); + rxq->flush_state = SFXGE_FLUSH_FAILED; break; + } - } while (++count < 20); + count = 0; + do { + /* Spin for 100 ms */ + DELAY(100000); - SFXGE_EVQ_LOCK(evq); + if (rxq->flush_state != SFXGE_FLUSH_PENDING) + break; - if (rxq->flush_state == SFXGE_FLUSH_FAILED) - goto again; + } while (++count < 20); - rxq->flush_state = SFXGE_FLUSH_DONE; + SFXGE_EVQ_LOCK(evq); + + if (rxq->flush_state == SFXGE_FLUSH_PENDING) { + /* Flush timeout - neither done nor failed */ + log(LOG_ERR, "%s: Cannot flush Rx queue %u\n", + device_get_nameunit(sc->dev), index); + rxq->flush_state = SFXGE_FLUSH_DONE; + } + retry--; + } + if (rxq->flush_state == SFXGE_FLUSH_FAILED) { + log(LOG_ERR, "%s: Flushing Rx queue %u failed\n", + device_get_nameunit(sc->dev), index); + rxq->flush_state = SFXGE_FLUSH_DONE; + } rxq->pending = rxq->added; sfxge_rx_qcomplete(rxq, B_TRUE); @@ -928,6 +1002,7 @@ sfxge_rx_qstop(struct sfxge_softc *sc, unsigned int index) ("rxq->completed != rxq->pending")); rxq->added = 0; + rxq->pushed = 0; rxq->pending = 0; rxq->completed = 0; rxq->loopback = 0; @@ -949,6 +1024,8 @@ sfxge_rx_qstart(struct sfxge_softc *sc, unsigned int index) struct sfxge_evq *evq; int rc; + SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc); + rxq = sc->rxq[index]; esmp = &rxq->mem; evq = sc->evq[index]; @@ -975,6 +1052,7 @@ sfxge_rx_qstart(struct sfxge_softc *sc, unsigned int index) efx_rx_qenable(rxq->common); rxq->init_state = SFXGE_RXQ_STARTED; + rxq->flush_state = SFXGE_FLUSH_REQUIRED; /* Try to fill the queue from the pool. */ sfxge_rx_qfill(rxq, EFX_RXQ_LIMIT(sc->rxq_entries), B_FALSE); @@ -994,6 +1072,8 @@ sfxge_rx_stop(struct sfxge_softc *sc) { int index; + efx_mac_filter_default_rxq_clear(sc->enp); + /* Stop the receive queue(s) */ index = sc->rxq_count; while (--index >= 0) @@ -1009,6 +1089,8 @@ int sfxge_rx_start(struct sfxge_softc *sc) { struct sfxge_intr *intr; + const efx_nic_cfg_t *encp; + size_t hdrlen, align, reserved; int index; int rc; @@ -1018,17 +1100,35 @@ sfxge_rx_start(struct sfxge_softc *sc) if ((rc = efx_rx_init(sc->enp)) != 0) return (rc); - /* Calculate the receive packet buffer size. */ - sc->rx_prefix_size = EFX_RX_PREFIX_SIZE; - sc->rx_buffer_size = (EFX_MAC_PDU(sc->ifnet->if_mtu) + - sc->rx_prefix_size); + encp = efx_nic_cfg_get(sc->enp); + sc->rx_buffer_size = EFX_MAC_PDU(sc->ifnet->if_mtu); + + /* Calculate the receive packet buffer size. */ + sc->rx_prefix_size = encp->enc_rx_prefix_size; + + /* Ensure IP headers are 32bit aligned */ + hdrlen = sc->rx_prefix_size + sizeof (struct ether_header); + sc->rx_buffer_align = P2ROUNDUP(hdrlen, 4) - hdrlen; + + sc->rx_buffer_size += sc->rx_buffer_align; + + /* Align end of packet buffer for RX DMA end padding */ + align = MAX(1, encp->enc_rx_buf_align_end); + EFSYS_ASSERT(ISP2(align)); + sc->rx_buffer_size = P2ROUNDUP(sc->rx_buffer_size, align); + + /* + * Standard mbuf zones only guarantee pointer-size alignment; + * we need extra space to align to the cache line + */ + reserved = sc->rx_buffer_size + CACHE_LINE_SIZE; /* Select zone for packet buffers */ - if (sc->rx_buffer_size <= MCLBYTES) + if (reserved <= MCLBYTES) sc->rx_buffer_zone = zone_clust; - else if (sc->rx_buffer_size <= MJUMPAGESIZE) + else if (reserved <= MJUMPAGESIZE) sc->rx_buffer_zone = zone_jumbop; - else if (sc->rx_buffer_size <= MJUM9BYTES) + else if (reserved <= MJUM9BYTES) sc->rx_buffer_zone = zone_jumbo9; else sc->rx_buffer_zone = zone_jumbo16; @@ -1045,8 +1145,8 @@ sfxge_rx_start(struct sfxge_softc *sc) (1 << EFX_RX_HASH_IPV4) | (1 << EFX_RX_HASH_TCPIPV4) | (1 << EFX_RX_HASH_IPV6) | (1 << EFX_RX_HASH_TCPIPV6), B_TRUE); - if ((rc = efx_rx_scale_toeplitz_ipv4_key_set(sc->enp, toep_key, - sizeof(toep_key))) != 0) + if ((rc = efx_rx_scale_key_set(sc->enp, toep_key, + sizeof(toep_key))) != 0) goto fail; /* Start the receive queue(s). */ @@ -1055,8 +1155,14 @@ sfxge_rx_start(struct sfxge_softc *sc) goto fail2; } + rc = efx_mac_filter_default_rxq_set(sc->enp, sc->rxq[0]->common, + sc->intr.n_alloc > 1); + if (rc != 0) + goto fail3; + return (0); +fail3: fail2: while (--index >= 0) sfxge_rx_qstop(sc, index); @@ -1192,7 +1298,7 @@ sfxge_rx_qinit(struct sfxge_softc *sc, unsigned int index) M_SFXGE, M_WAITOK | M_ZERO); sfxge_lro_init(rxq); - callout_init(&rxq->refill_callout, B_TRUE); + callout_init(&rxq->refill_callout, 1); rxq->init_state = SFXGE_RXQ_INITIALIZED; diff --git a/sys/dev/sfxge/sfxge_rx.h b/sys/dev/sfxge/sfxge_rx.h index dae7e0893c6d..e870ed5bfdd4 100644 --- a/sys/dev/sfxge/sfxge_rx.h +++ b/sys/dev/sfxge/sfxge_rx.h @@ -1,30 +1,34 @@ /*- - * Copyright (c) 2010-2011 Solarflare Communications, Inc. + * Copyright (c) 2010-2015 Solarflare Communications Inc. * All rights reserved. * * This software was developed in part by Philip Paeps under contract for * Solarflare Communications, Inc. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. * * $FreeBSD$ */ @@ -39,22 +43,22 @@ #define SFXGE_LRO 1 #endif -#define SFXGE_MAGIC_RESERVED 0x8000 +#define SFXGE_MAGIC_RESERVED 0x8000 #define SFXGE_MAGIC_DMAQ_LABEL_WIDTH 6 -#define SFXGE_MAGIC_DMAQ_LABEL_MASK \ +#define SFXGE_MAGIC_DMAQ_LABEL_MASK \ ((1 << SFXGE_MAGIC_DMAQ_LABEL_WIDTH) - 1) -#define SFXGE_MAGIC_RX_QFLUSH_DONE \ +#define SFXGE_MAGIC_RX_QFLUSH_DONE \ (SFXGE_MAGIC_RESERVED | (1 << SFXGE_MAGIC_DMAQ_LABEL_WIDTH)) -#define SFXGE_MAGIC_RX_QFLUSH_FAILED \ +#define SFXGE_MAGIC_RX_QFLUSH_FAILED \ (SFXGE_MAGIC_RESERVED | (2 << SFXGE_MAGIC_DMAQ_LABEL_WIDTH)) -#define SFXGE_MAGIC_RX_QREFILL \ +#define SFXGE_MAGIC_RX_QREFILL \ (SFXGE_MAGIC_RESERVED | (3 << SFXGE_MAGIC_DMAQ_LABEL_WIDTH)) -#define SFXGE_MAGIC_TX_QFLUSH_DONE \ +#define SFXGE_MAGIC_TX_QFLUSH_DONE \ (SFXGE_MAGIC_RESERVED | (4 << SFXGE_MAGIC_DMAQ_LABEL_WIDTH)) #define SFXGE_RX_SCALE_MAX EFX_MAXRSS @@ -152,6 +156,7 @@ struct sfxge_lro_state { enum sfxge_flush_state { SFXGE_FLUSH_DONE = 0, + SFXGE_FLUSH_REQUIRED, SFXGE_FLUSH_PENDING, SFXGE_FLUSH_FAILED }; @@ -175,6 +180,7 @@ struct sfxge_rxq { struct sfxge_rx_sw_desc *queue __aligned(CACHE_LINE_SIZE); unsigned int added; + unsigned int pushed; unsigned int pending; unsigned int completed; unsigned int loopback; diff --git a/sys/dev/sfxge/sfxge_tx.c b/sys/dev/sfxge/sfxge_tx.c index d00f9eb45410..af8efc26be46 100644 --- a/sys/dev/sfxge/sfxge_tx.c +++ b/sys/dev/sfxge/sfxge_tx.c @@ -1,30 +1,34 @@ /*- - * Copyright (c) 2010-2011 Solarflare Communications, Inc. + * Copyright (c) 2010-2015 Solarflare Communications Inc. * All rights reserved. * * This software was developed in part by Philip Paeps under contract for * Solarflare Communications, Inc. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. */ /* Theory of operation: @@ -67,23 +71,6 @@ __FBSDID("$FreeBSD$"); #include "sfxge.h" #include "sfxge_tx.h" -/* - * Estimate maximum number of Tx descriptors required for TSO packet. - * With minimum MSS and maximum mbuf length we might need more (even - * than a ring-ful of descriptors), but this should not happen in - * practice except due to deliberate attack. In that case we will - * truncate the output at a packet boundary. - */ -#define SFXGE_TSO_MAX_DESC \ - (SFXGE_TSO_MAX_SEGS * 2 + SFXGE_TX_MAPPING_MAX_SEG - 1) - -/* - * Set the block level to ensure there is space to generate a - * large number of descriptors for TSO. - */ -#define SFXGE_TXQ_BLOCK_LEVEL(_entries) \ - (EFX_TXQ_LIMIT(_entries) - SFXGE_TSO_MAX_DESC) - #define SFXGE_PARAM_TX_DPL_GET_MAX SFXGE_PARAM(tx_dpl_get_max) static int sfxge_tx_dpl_get_max = SFXGE_TX_DPL_GET_PKT_LIMIT_DEFAULT; @@ -108,6 +95,13 @@ SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_dpl_put_max, CTLFLAG_RDTUN, &sfxge_tx_dpl_put_max, 0, "Maximum number of any packets in deferred packet put-list"); +#define SFXGE_PARAM_TSO_FW_ASSISTED SFXGE_PARAM(tso_fw_assisted) +static int sfxge_tso_fw_assisted = 1; +TUNABLE_INT(SFXGE_PARAM_TSO_FW_ASSISTED, &sfxge_tso_fw_assisted); +SYSCTL_INT(_hw_sfxge, OID_AUTO, tso_fw_assisted, CTLFLAG_RDTUN, + &sfxge_tso_fw_assisted, 0, + "Use FW-assisted TSO if supported by NIC firmware"); + static const struct { const char *name; @@ -134,7 +128,38 @@ static void sfxge_tx_qdpl_service(struct sfxge_txq *txq); static void sfxge_tx_qlist_post(struct sfxge_txq *txq); static void sfxge_tx_qunblock(struct sfxge_txq *txq); static int sfxge_tx_queue_tso(struct sfxge_txq *txq, struct mbuf *mbuf, - const bus_dma_segment_t *dma_seg, int n_dma_seg); + const bus_dma_segment_t *dma_seg, int n_dma_seg, + int vlan_tagged); + +static int +sfxge_tx_maybe_insert_tag(struct sfxge_txq *txq, struct mbuf *mbuf) +{ + uint16_t this_tag = ((mbuf->m_flags & M_VLANTAG) ? + mbuf->m_pkthdr.ether_vtag : + 0); + + if (this_tag == txq->hw_vlan_tci) + return (0); + + efx_tx_qdesc_vlantci_create(txq->common, + bswap16(this_tag), + &txq->pend_desc[0]); + txq->n_pend_desc = 1; + txq->hw_vlan_tci = this_tag; + return (1); +} + +static inline void +sfxge_next_stmp(struct sfxge_txq *txq, struct sfxge_tx_mapping **pstmp) +{ + KASSERT((*pstmp)->flags == 0, ("stmp flags are not 0")); + if (__predict_false(*pstmp == + &txq->stmp[txq->ptr_mask])) + *pstmp = &txq->stmp[0]; + else + (*pstmp)++; +} + void sfxge_tx_qcomplete(struct sfxge_txq *txq, struct sfxge_evq *evq) @@ -252,29 +277,30 @@ static void sfxge_tx_qlist_post(struct sfxge_txq *txq) { unsigned int old_added; + unsigned int block_level; unsigned int level; int rc; SFXGE_TXQ_LOCK_ASSERT_OWNED(txq); KASSERT(txq->n_pend_desc != 0, ("txq->n_pend_desc == 0")); - KASSERT(txq->n_pend_desc <= SFXGE_TSO_MAX_DESC, + KASSERT(txq->n_pend_desc <= txq->max_pkt_desc, ("txq->n_pend_desc too large")); KASSERT(!txq->blocked, ("txq->blocked")); old_added = txq->added; /* Post the fragment list. */ - rc = efx_tx_qpost(txq->common, txq->pend_desc, txq->n_pend_desc, + rc = efx_tx_qdesc_post(txq->common, txq->pend_desc, txq->n_pend_desc, txq->reaped, &txq->added); - KASSERT(rc == 0, ("efx_tx_qpost() failed")); + KASSERT(rc == 0, ("efx_tx_qdesc_post() failed")); - /* If efx_tx_qpost() had to refragment, our information about + /* If efx_tx_qdesc_post() had to refragment, our information about * buffers to free may be associated with the wrong * descriptors. */ KASSERT(txq->added - old_added == txq->n_pend_desc, - ("efx_tx_qpost() refragmented descriptors")); + ("efx_tx_qdesc_post() refragmented descriptors")); level = txq->added - txq->reaped; KASSERT(level <= txq->entries, ("overfilled TX queue")); @@ -282,14 +308,20 @@ sfxge_tx_qlist_post(struct sfxge_txq *txq) /* Clear the fragment list. */ txq->n_pend_desc = 0; + /* + * Set the block level to ensure there is space to generate a + * large number of descriptors for TSO. + */ + block_level = EFX_TXQ_LIMIT(txq->entries) - txq->max_pkt_desc; + /* Have we reached the block level? */ - if (level < SFXGE_TXQ_BLOCK_LEVEL(txq->entries)) + if (level < block_level) return; /* Reap, and check again */ sfxge_tx_qreap(txq); level = txq->added - txq->reaped; - if (level < SFXGE_TXQ_BLOCK_LEVEL(txq->entries)) + if (level < block_level) return; txq->blocked = 1; @@ -301,7 +333,7 @@ sfxge_tx_qlist_post(struct sfxge_txq *txq) mb(); sfxge_tx_qreap(txq); level = txq->added - txq->reaped; - if (level < SFXGE_TXQ_BLOCK_LEVEL(txq->entries)) { + if (level < block_level) { mb(); txq->blocked = 0; } @@ -314,10 +346,12 @@ static int sfxge_tx_queue_mbuf(struct sfxge_txq *txq, struct mbuf *mbuf) bus_dma_segment_t dma_seg[SFXGE_TX_MAPPING_MAX_SEG]; unsigned int id; struct sfxge_tx_mapping *stmp; - efx_buffer_t *desc; + efx_desc_t *desc; int n_dma_seg; int rc; int i; + int eop; + int vlan_tagged; KASSERT(!txq->blocked, ("txq->blocked")); @@ -354,35 +388,35 @@ static int sfxge_tx_queue_mbuf(struct sfxge_txq *txq, struct mbuf *mbuf) used_map = &stmp->map; + vlan_tagged = sfxge_tx_maybe_insert_tag(txq, mbuf); + if (vlan_tagged) { + sfxge_next_stmp(txq, &stmp); + } if (mbuf->m_pkthdr.csum_flags & CSUM_TSO) { - rc = sfxge_tx_queue_tso(txq, mbuf, dma_seg, n_dma_seg); + rc = sfxge_tx_queue_tso(txq, mbuf, dma_seg, n_dma_seg, vlan_tagged); if (rc < 0) goto reject_mapped; - stmp = &txq->stmp[rc]; + stmp = &txq->stmp[(rc - 1) & txq->ptr_mask]; } else { /* Add the mapping to the fragment list, and set flags * for the buffer. */ + i = 0; for (;;) { - desc = &txq->pend_desc[i]; - desc->eb_addr = dma_seg[i].ds_addr; - desc->eb_size = dma_seg[i].ds_len; - if (i == n_dma_seg - 1) { - desc->eb_eop = 1; + desc = &txq->pend_desc[i + vlan_tagged]; + eop = (i == n_dma_seg - 1); + efx_tx_qdesc_dma_create(txq->common, + dma_seg[i].ds_addr, + dma_seg[i].ds_len, + eop, + desc); + if (eop) break; - } - desc->eb_eop = 0; i++; - - stmp->flags = 0; - if (__predict_false(stmp == - &txq->stmp[txq->ptr_mask])) - stmp = &txq->stmp[0]; - else - stmp++; + sfxge_next_stmp(txq, &stmp); } - txq->n_pend_desc = n_dma_seg; + txq->n_pend_desc = n_dma_seg + vlan_tagged; } /* @@ -469,7 +503,7 @@ sfxge_tx_qdpl_drain(struct sfxge_txq *txq) /* Push the fragments to the hardware in batches. */ if (txq->added - pushed >= SFXGE_TX_BATCH) { - efx_tx_qpush(txq->common, txq->added); + efx_tx_qpush(txq->common, txq->added, pushed); pushed = txq->added; } } @@ -489,14 +523,13 @@ sfxge_tx_qdpl_drain(struct sfxge_txq *txq) } if (txq->added != pushed) - efx_tx_qpush(txq->common, txq->added); + efx_tx_qpush(txq->common, txq->added, pushed); KASSERT(txq->blocked || stdp->std_get_count == 0, ("queue unblocked but count is non-zero")); } -#define SFXGE_TX_QDPL_PENDING(_txq) \ - ((_txq)->dpl.std_put != 0) +#define SFXGE_TX_QDPL_PENDING(_txq) ((_txq)->dpl.std_put != 0) /* * Service the deferred packet list. @@ -521,18 +554,10 @@ sfxge_tx_qdpl_service(struct sfxge_txq *txq) } /* - * Put a packet on the deferred packet list. - * - * If we are called with the txq lock held, we put the packet on the "get - * list", otherwise we atomically push it on the "put list". The swizzle - * function takes care of ordering. - * - * The length of the put list is bounded by SFXGE_TX_MAX_DEFERRED. We - * overload the csum_data field in the mbuf to keep track of this length - * because there is no cheap alternative to avoid races. + * Put a packet on the deferred packet get-list. */ static int -sfxge_tx_qdpl_put(struct sfxge_txq *txq, struct mbuf *mbuf, int locked) +sfxge_tx_qdpl_put_locked(struct sfxge_txq *txq, struct mbuf *mbuf) { struct sfxge_tx_dpl *stdp; @@ -540,52 +565,66 @@ sfxge_tx_qdpl_put(struct sfxge_txq *txq, struct mbuf *mbuf, int locked) KASSERT(mbuf->m_nextpkt == NULL, ("mbuf->m_nextpkt != NULL")); - if (locked) { - SFXGE_TXQ_LOCK_ASSERT_OWNED(txq); + SFXGE_TXQ_LOCK_ASSERT_OWNED(txq); - sfxge_tx_qdpl_swizzle(txq); - - if (stdp->std_get_count >= stdp->std_get_max) { - txq->get_overflow++; + if (stdp->std_get_count >= stdp->std_get_max) { + txq->get_overflow++; + return (ENOBUFS); + } + if (sfxge_is_mbuf_non_tcp(mbuf)) { + if (stdp->std_get_non_tcp_count >= + stdp->std_get_non_tcp_max) { + txq->get_non_tcp_overflow++; return (ENOBUFS); } - if (sfxge_is_mbuf_non_tcp(mbuf)) { - if (stdp->std_get_non_tcp_count >= - stdp->std_get_non_tcp_max) { - txq->get_non_tcp_overflow++; - return (ENOBUFS); - } - stdp->std_get_non_tcp_count++; - } - - *(stdp->std_getp) = mbuf; - stdp->std_getp = &mbuf->m_nextpkt; - stdp->std_get_count++; - } else { - volatile uintptr_t *putp; - uintptr_t old; - uintptr_t new; - unsigned old_len; - - putp = &stdp->std_put; - new = (uintptr_t)mbuf; - - do { - old = *putp; - if (old != 0) { - struct mbuf *mp = (struct mbuf *)old; - old_len = mp->m_pkthdr.csum_data; - } else - old_len = 0; - if (old_len >= stdp->std_put_max) { - atomic_add_long(&txq->put_overflow, 1); - return (ENOBUFS); - } - mbuf->m_pkthdr.csum_data = old_len + 1; - mbuf->m_nextpkt = (void *)old; - } while (atomic_cmpset_ptr(putp, old, new) == 0); + stdp->std_get_non_tcp_count++; } + *(stdp->std_getp) = mbuf; + stdp->std_getp = &mbuf->m_nextpkt; + stdp->std_get_count++; + + return (0); +} + +/* + * Put a packet on the deferred packet put-list. + * + * We overload the csum_data field in the mbuf to keep track of this length + * because there is no cheap alternative to avoid races. + */ +static int +sfxge_tx_qdpl_put_unlocked(struct sfxge_txq *txq, struct mbuf *mbuf) +{ + struct sfxge_tx_dpl *stdp; + volatile uintptr_t *putp; + uintptr_t old; + uintptr_t new; + unsigned old_len; + + KASSERT(mbuf->m_nextpkt == NULL, ("mbuf->m_nextpkt != NULL")); + + SFXGE_TXQ_LOCK_ASSERT_NOTOWNED(txq); + + stdp = &txq->dpl; + putp = &stdp->std_put; + new = (uintptr_t)mbuf; + + do { + old = *putp; + if (old != 0) { + struct mbuf *mp = (struct mbuf *)old; + old_len = mp->m_pkthdr.csum_data; + } else + old_len = 0; + if (old_len >= stdp->std_put_max) { + atomic_add_long(&txq->put_overflow, 1); + return (ENOBUFS); + } + mbuf->m_pkthdr.csum_data = old_len + 1; + mbuf->m_nextpkt = (void *)old; + } while (atomic_cmpset_ptr(putp, old, new) == 0); + return (0); } @@ -593,16 +632,14 @@ sfxge_tx_qdpl_put(struct sfxge_txq *txq, struct mbuf *mbuf, int locked) * Called from if_transmit - will try to grab the txq lock and enqueue to the * put list if it succeeds, otherwise try to push onto the defer list if space. */ -int +static int sfxge_tx_packet_add(struct sfxge_txq *txq, struct mbuf *m) { - int locked; int rc; if (!SFXGE_LINK_UP(txq->sc)) { - rc = ENETDOWN; atomic_add_long(&txq->netdown_drops, 1); - goto fail; + return (ENETDOWN); } /* @@ -610,35 +647,33 @@ sfxge_tx_packet_add(struct sfxge_txq *txq, struct mbuf *m) * the packet will be appended to the "get list" of the deferred * packet list. Otherwise, it will be pushed on the "put list". */ - locked = SFXGE_TXQ_TRYLOCK(txq); + if (SFXGE_TXQ_TRYLOCK(txq)) { + /* First swizzle put-list to get-list to keep order */ + sfxge_tx_qdpl_swizzle(txq); - if (sfxge_tx_qdpl_put(txq, m, locked) != 0) { - if (locked) - SFXGE_TXQ_UNLOCK(txq); - rc = ENOBUFS; - goto fail; - } + rc = sfxge_tx_qdpl_put_locked(txq, m); - /* - * Try to grab the lock again. - * - * If we are able to get the lock, we need to process the deferred - * packet list. If we are not able to get the lock, another thread - * is processing the list. - */ - if (!locked) - locked = SFXGE_TXQ_TRYLOCK(txq); - - if (locked) { /* Try to service the list. */ sfxge_tx_qdpl_service(txq); /* Lock has been dropped. */ + } else { + rc = sfxge_tx_qdpl_put_unlocked(txq, m); + + /* + * Try to grab the lock again. + * + * If we are able to get the lock, we need to process + * the deferred packet list. If we are not able to get + * the lock, another thread is processing the list. + */ + if ((rc == 0) && SFXGE_TXQ_TRYLOCK(txq)) { + sfxge_tx_qdpl_service(txq); + /* Lock has been dropped. */ + } } - return (0); + SFXGE_TXQ_LOCK_ASSERT_NOTOWNED(txq); -fail: - m_freem(m); return (rc); } @@ -699,7 +734,8 @@ sfxge_if_transmit(struct ifnet *ifp, struct mbuf *m) ("interface not up")); /* Pick the desired transmit queue. */ - if (m->m_pkthdr.csum_flags & (CSUM_DELAY_DATA | CSUM_TSO)) { + if (m->m_pkthdr.csum_flags & + (CSUM_DELAY_DATA | CSUM_TCP_IPV6 | CSUM_UDP_IPV6 | CSUM_TSO)) { int index = 0; /* check if flowid is set */ @@ -716,6 +752,8 @@ sfxge_if_transmit(struct ifnet *ifp, struct mbuf *m) } rc = sfxge_tx_packet_add(txq, m); + if (rc != 0) + m_freem(m); return (rc); } @@ -741,6 +779,10 @@ struct sfxge_tso_state { ssize_t tcph_off; /* Offset of TCP header */ unsigned header_len; /* Number of bytes of header */ unsigned seg_size; /* TCP segment size */ + int fw_assisted; /* Use FW-assisted TSO */ + u_short packet_id; /* IPv4 packet ID from the original packet */ + efx_desc_t header_desc; /* Precomputed header descriptor for + * FW-assisted TSO */ }; static const struct ip *tso_iph(const struct sfxge_tso_state *tso) @@ -811,12 +853,16 @@ static void tso_fini(struct sfxge_txq *txq) } } -static void tso_start(struct sfxge_tso_state *tso, struct mbuf *mbuf) +static void tso_start(struct sfxge_txq *txq, struct sfxge_tso_state *tso, + const bus_dma_segment_t *hdr_dma_seg, + struct mbuf *mbuf) { struct ether_header *eh = mtod(mbuf, struct ether_header *); + const efx_nic_cfg_t *encp = efx_nic_cfg_get(txq->sc->enp); const struct tcphdr *th; struct tcphdr th_copy; + tso->fw_assisted = txq->sc->tso_fw_assisted; tso->mbuf = mbuf; /* Find network protocol and header */ @@ -835,12 +881,19 @@ static void tso_start(struct sfxge_tso_state *tso, struct mbuf *mbuf) KASSERT(tso_iph(tso)->ip_p == IPPROTO_TCP, ("TSO required on non-TCP packet")); tso->tcph_off = tso->nh_off + 4 * tso_iph(tso)->ip_hl; + tso->packet_id = tso_iph(tso)->ip_id; } else { KASSERT(tso->protocol == htons(ETHERTYPE_IPV6), ("TSO required on non-IP packet")); KASSERT(tso_ip6h(tso)->ip6_nxt == IPPROTO_TCP, ("TSO required on non-TCP packet")); tso->tcph_off = tso->nh_off + sizeof(struct ip6_hdr); + tso->packet_id = 0; + } + if (tso->fw_assisted && + __predict_false(tso->tcph_off > + encp->enc_tx_tso_tcp_header_offset_limit)) { + tso->fw_assisted = 0; } KASSERT(mbuf->m_len >= tso->tcph_off, @@ -860,10 +913,27 @@ static void tso_start(struct sfxge_tso_state *tso, struct mbuf *mbuf) tso->seqnum = ntohl(th->th_seq); /* These flags must not be duplicated */ - KASSERT(!(th->th_flags & (TH_URG | TH_SYN | TH_RST)), - ("incompatible TCP flag on TSO packet")); + /* + * RST should not be duplicated as well, but FreeBSD kernel + * generates TSO packets with RST flag. So, do not assert + * its absence. + */ + KASSERT(!(th->th_flags & (TH_URG | TH_SYN)), + ("incompatible TCP flag 0x%x on TSO packet", + th->th_flags & (TH_URG | TH_SYN))); tso->out_len = mbuf->m_pkthdr.len - tso->header_len; + + if (tso->fw_assisted) { + if (hdr_dma_seg->ds_len >= tso->header_len) + efx_tx_qdesc_dma_create(txq->common, + hdr_dma_seg->ds_addr, + tso->header_len, + B_FALSE, + &tso->header_desc); + else + tso->fw_assisted = 0; + } } /* @@ -876,7 +946,7 @@ static void tso_start(struct sfxge_tso_state *tso, struct mbuf *mbuf) static void tso_fill_packet_with_fragment(struct sfxge_txq *txq, struct sfxge_tso_state *tso) { - efx_buffer_t *desc; + efx_desc_t *desc; int n; if (tso->in_len == 0 || tso->packet_space == 0) @@ -892,9 +962,11 @@ static void tso_fill_packet_with_fragment(struct sfxge_txq *txq, tso->in_len -= n; desc = &txq->pend_desc[txq->n_pend_desc++]; - desc->eb_addr = tso->dma_addr; - desc->eb_size = n; - desc->eb_eop = tso->out_len == 0 || tso->packet_space == 0; + efx_tx_qdesc_dma_create(txq->common, + tso->dma_addr, + n, + tso->out_len == 0 || tso->packet_space == 0, + desc); tso->dma_addr += n; } @@ -917,107 +989,139 @@ static void tso_map_long_header(void *dma_addr_ret, */ static int tso_start_new_packet(struct sfxge_txq *txq, struct sfxge_tso_state *tso, - unsigned int id) + unsigned int *idp) { - struct sfxge_tx_mapping *stmp = &txq->stmp[id]; + unsigned int id = *idp; struct tcphdr *tsoh_th; unsigned ip_length; caddr_t header; uint64_t dma_addr; bus_dmamap_t map; - efx_buffer_t *desc; + efx_desc_t *desc; int rc; - /* Allocate a DMA-mapped header buffer. */ - if (__predict_true(tso->header_len <= TSOH_STD_SIZE)) { - unsigned int page_index = (id / 2) / TSOH_PER_PAGE; - unsigned int buf_index = (id / 2) % TSOH_PER_PAGE; + if (tso->fw_assisted) { + uint8_t tcp_flags = tso_tcph(tso)->th_flags; - header = (txq->tsoh_buffer[page_index].esm_base + - buf_index * TSOH_STD_SIZE); - dma_addr = (txq->tsoh_buffer[page_index].esm_addr + - buf_index * TSOH_STD_SIZE); - map = txq->tsoh_buffer[page_index].esm_map; + if (tso->out_len > tso->seg_size) + tcp_flags &= ~(TH_FIN | TH_PUSH); - stmp->flags = 0; + /* TSO option descriptor */ + desc = &txq->pend_desc[txq->n_pend_desc++]; + efx_tx_qdesc_tso_create(txq->common, + tso->packet_id, + tso->seqnum, + tcp_flags, + desc++); + KASSERT(txq->stmp[id].flags == 0, ("stmp flags are not 0")); + id = (id + 1) & txq->ptr_mask; + + /* Header DMA descriptor */ + *desc = tso->header_desc; + txq->n_pend_desc++; + KASSERT(txq->stmp[id].flags == 0, ("stmp flags are not 0")); + id = (id + 1) & txq->ptr_mask; + + tso->seqnum += tso->seg_size; } else { - /* We cannot use bus_dmamem_alloc() as that may sleep */ - header = malloc(tso->header_len, M_SFXGE, M_NOWAIT); - if (__predict_false(!header)) - return (ENOMEM); - rc = bus_dmamap_load(txq->packet_dma_tag, stmp->map, - header, tso->header_len, - tso_map_long_header, &dma_addr, - BUS_DMA_NOWAIT); - if (__predict_false(dma_addr == 0)) { - if (rc == 0) { - /* Succeeded but got >1 segment */ - bus_dmamap_unload(txq->packet_dma_tag, - stmp->map); - rc = EINVAL; + /* Allocate a DMA-mapped header buffer. */ + if (__predict_true(tso->header_len <= TSOH_STD_SIZE)) { + unsigned int page_index = (id / 2) / TSOH_PER_PAGE; + unsigned int buf_index = (id / 2) % TSOH_PER_PAGE; + + header = (txq->tsoh_buffer[page_index].esm_base + + buf_index * TSOH_STD_SIZE); + dma_addr = (txq->tsoh_buffer[page_index].esm_addr + + buf_index * TSOH_STD_SIZE); + map = txq->tsoh_buffer[page_index].esm_map; + + KASSERT(txq->stmp[id].flags == 0, + ("stmp flags are not 0")); + } else { + struct sfxge_tx_mapping *stmp = &txq->stmp[id]; + + /* We cannot use bus_dmamem_alloc() as that may sleep */ + header = malloc(tso->header_len, M_SFXGE, M_NOWAIT); + if (__predict_false(!header)) + return (ENOMEM); + rc = bus_dmamap_load(txq->packet_dma_tag, stmp->map, + header, tso->header_len, + tso_map_long_header, &dma_addr, + BUS_DMA_NOWAIT); + if (__predict_false(dma_addr == 0)) { + if (rc == 0) { + /* Succeeded but got >1 segment */ + bus_dmamap_unload(txq->packet_dma_tag, + stmp->map); + rc = EINVAL; + } + free(header, M_SFXGE); + return (rc); } - free(header, M_SFXGE); - return (rc); + map = stmp->map; + + txq->tso_long_headers++; + stmp->u.heap_buf = header; + stmp->flags = TX_BUF_UNMAP; } - map = stmp->map; - txq->tso_long_headers++; - stmp->u.heap_buf = header; - stmp->flags = TX_BUF_UNMAP; + tsoh_th = (struct tcphdr *)(header + tso->tcph_off); + + /* Copy and update the headers. */ + m_copydata(tso->mbuf, 0, tso->header_len, header); + + tsoh_th->th_seq = htonl(tso->seqnum); + tso->seqnum += tso->seg_size; + if (tso->out_len > tso->seg_size) { + /* This packet will not finish the TSO burst. */ + ip_length = tso->header_len - tso->nh_off + tso->seg_size; + tsoh_th->th_flags &= ~(TH_FIN | TH_PUSH); + } else { + /* This packet will be the last in the TSO burst. */ + ip_length = tso->header_len - tso->nh_off + tso->out_len; + } + + if (tso->protocol == htons(ETHERTYPE_IP)) { + struct ip *tsoh_iph = (struct ip *)(header + tso->nh_off); + tsoh_iph->ip_len = htons(ip_length); + /* XXX We should increment ip_id, but FreeBSD doesn't + * currently allocate extra IDs for multiple segments. + */ + } else { + struct ip6_hdr *tsoh_iph = + (struct ip6_hdr *)(header + tso->nh_off); + tsoh_iph->ip6_plen = htons(ip_length - sizeof(*tsoh_iph)); + } + + /* Make the header visible to the hardware. */ + bus_dmamap_sync(txq->packet_dma_tag, map, BUS_DMASYNC_PREWRITE); + + /* Form a descriptor for this header. */ + desc = &txq->pend_desc[txq->n_pend_desc++]; + efx_tx_qdesc_dma_create(txq->common, + dma_addr, + tso->header_len, + 0, + desc); + id = (id + 1) & txq->ptr_mask; } - - tsoh_th = (struct tcphdr *)(header + tso->tcph_off); - - /* Copy and update the headers. */ - m_copydata(tso->mbuf, 0, tso->header_len, header); - - tsoh_th->th_seq = htonl(tso->seqnum); - tso->seqnum += tso->seg_size; - if (tso->out_len > tso->seg_size) { - /* This packet will not finish the TSO burst. */ - ip_length = tso->header_len - tso->nh_off + tso->seg_size; - tsoh_th->th_flags &= ~(TH_FIN | TH_PUSH); - } else { - /* This packet will be the last in the TSO burst. */ - ip_length = tso->header_len - tso->nh_off + tso->out_len; - } - - if (tso->protocol == htons(ETHERTYPE_IP)) { - struct ip *tsoh_iph = (struct ip *)(header + tso->nh_off); - tsoh_iph->ip_len = htons(ip_length); - /* XXX We should increment ip_id, but FreeBSD doesn't - * currently allocate extra IDs for multiple segments. - */ - } else { - struct ip6_hdr *tsoh_iph = - (struct ip6_hdr *)(header + tso->nh_off); - tsoh_iph->ip6_plen = htons(ip_length - sizeof(*tsoh_iph)); - } - - /* Make the header visible to the hardware. */ - bus_dmamap_sync(txq->packet_dma_tag, map, BUS_DMASYNC_PREWRITE); - tso->packet_space = tso->seg_size; txq->tso_packets++; - - /* Form a descriptor for this header. */ - desc = &txq->pend_desc[txq->n_pend_desc++]; - desc->eb_addr = dma_addr; - desc->eb_size = tso->header_len; - desc->eb_eop = 0; + *idp = id; return (0); } static int sfxge_tx_queue_tso(struct sfxge_txq *txq, struct mbuf *mbuf, - const bus_dma_segment_t *dma_seg, int n_dma_seg) + const bus_dma_segment_t *dma_seg, int n_dma_seg, + int vlan_tagged) { struct sfxge_tso_state tso; - unsigned int id, next_id; + unsigned int id; unsigned skipped = 0; - tso_start(&tso, mbuf); + tso_start(txq, &tso, dma_seg, mbuf); while (dma_seg->ds_len + skipped <= tso.header_len) { skipped += dma_seg->ds_len; @@ -1028,13 +1132,15 @@ sfxge_tx_queue_tso(struct sfxge_txq *txq, struct mbuf *mbuf, tso.in_len = dma_seg->ds_len - (tso.header_len - skipped); tso.dma_addr = dma_seg->ds_addr + (tso.header_len - skipped); - id = txq->added & txq->ptr_mask; - if (__predict_false(tso_start_new_packet(txq, &tso, id))) + id = (txq->added + vlan_tagged) & txq->ptr_mask; + if (__predict_false(tso_start_new_packet(txq, &tso, &id))) return (-1); while (1) { - id = (id + 1) & txq->ptr_mask; tso_fill_packet_with_fragment(txq, &tso); + /* Exactly one DMA descriptor is added */ + KASSERT(txq->stmp[id].flags == 0, ("stmp flags are not 0")); + id = (id + 1) & txq->ptr_mask; /* Move onto the next fragment? */ if (tso.in_len == 0) { @@ -1053,18 +1159,17 @@ sfxge_tx_queue_tso(struct sfxge_txq *txq, struct mbuf *mbuf, * the remainder of the input mbuf but do not * roll back the work we have done. */ - if (txq->n_pend_desc + 1 /* header */ + n_dma_seg > - SFXGE_TSO_MAX_DESC) { + if (txq->n_pend_desc + tso.fw_assisted + + 1 /* header */ + n_dma_seg > + txq->max_pkt_desc) { txq->tso_pdrop_too_many++; break; } - next_id = (id + 1) & txq->ptr_mask; if (__predict_false(tso_start_new_packet(txq, &tso, - next_id))) { + &id))) { txq->tso_pdrop_no_rsrc++; break; } - id = next_id; } } @@ -1117,38 +1222,52 @@ sfxge_tx_qstop(struct sfxge_softc *sc, unsigned int index) struct sfxge_evq *evq; unsigned int count; + SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc); + txq = sc->txq[index]; evq = sc->evq[txq->evq_index]; + SFXGE_EVQ_LOCK(evq); SFXGE_TXQ_LOCK(txq); KASSERT(txq->init_state == SFXGE_TXQ_STARTED, ("txq->init_state != SFXGE_TXQ_STARTED")); txq->init_state = SFXGE_TXQ_INITIALIZED; - txq->flush_state = SFXGE_FLUSH_PENDING; - /* Flush the transmit queue. */ - efx_tx_qflush(txq->common); + if (txq->flush_state != SFXGE_FLUSH_DONE) { + txq->flush_state = SFXGE_FLUSH_PENDING; - SFXGE_TXQ_UNLOCK(txq); + SFXGE_EVQ_UNLOCK(evq); + SFXGE_TXQ_UNLOCK(txq); - count = 0; - do { - /* Spin for 100ms. */ - DELAY(100000); + /* Flush the transmit queue. */ + if (efx_tx_qflush(txq->common) != 0) { + log(LOG_ERR, "%s: Flushing Tx queue %u failed\n", + device_get_nameunit(sc->dev), index); + txq->flush_state = SFXGE_FLUSH_DONE; + } else { + count = 0; + do { + /* Spin for 100ms. */ + DELAY(100000); + if (txq->flush_state != SFXGE_FLUSH_PENDING) + break; + } while (++count < 20); + } + SFXGE_EVQ_LOCK(evq); + SFXGE_TXQ_LOCK(txq); - if (txq->flush_state != SFXGE_FLUSH_PENDING) - break; - } while (++count < 20); + KASSERT(txq->flush_state != SFXGE_FLUSH_FAILED, + ("txq->flush_state == SFXGE_FLUSH_FAILED")); - SFXGE_EVQ_LOCK(evq); - SFXGE_TXQ_LOCK(txq); - - KASSERT(txq->flush_state != SFXGE_FLUSH_FAILED, - ("txq->flush_state == SFXGE_FLUSH_FAILED")); - - txq->flush_state = SFXGE_FLUSH_DONE; + if (txq->flush_state != SFXGE_FLUSH_DONE) { + /* Flush timeout */ + log(LOG_ERR, "%s: Cannot flush Tx queue %u\n", + device_get_nameunit(sc->dev), index); + txq->flush_state = SFXGE_FLUSH_DONE; + } + } txq->blocked = 0; txq->pending = txq->added; @@ -1184,8 +1303,11 @@ sfxge_tx_qstart(struct sfxge_softc *sc, unsigned int index) efsys_mem_t *esmp; uint16_t flags; struct sfxge_evq *evq; + unsigned int desc_index; int rc; + SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc); + txq = sc->txq[index]; esmp = &txq->mem; evq = sc->evq[txq->evq_index]; @@ -1220,15 +1342,19 @@ sfxge_tx_qstart(struct sfxge_softc *sc, unsigned int index) /* Create the common code transmit queue. */ if ((rc = efx_tx_qcreate(sc->enp, index, txq->type, esmp, sc->txq_entries, txq->buf_base_id, flags, evq->common, - &txq->common)) != 0) + &txq->common, &desc_index)) != 0) goto fail; + /* Initialise queue descriptor indexes */ + txq->added = txq->pending = txq->completed = txq->reaped = desc_index; + SFXGE_TXQ_LOCK(txq); /* Enable the transmit queue. */ efx_tx_qenable(txq->common); txq->init_state = SFXGE_TXQ_STARTED; + txq->flush_state = SFXGE_FLUSH_REQUIRED; SFXGE_TXQ_UNLOCK(txq); @@ -1337,9 +1463,41 @@ sfxge_tx_qfini(struct sfxge_softc *sc, unsigned int index) free(txq, M_SFXGE); } +/* + * Estimate maximum number of Tx descriptors required for TSO packet. + * With minimum MSS and maximum mbuf length we might need more (even + * than a ring-ful of descriptors), but this should not happen in + * practice except due to deliberate attack. In that case we will + * truncate the output at a packet boundary. + */ +static unsigned int +sfxge_tx_max_pkt_desc(const struct sfxge_softc *sc, enum sfxge_txq_type type) +{ + /* One descriptor for every input fragment */ + unsigned int max_descs = SFXGE_TX_MAPPING_MAX_SEG; + + /* VLAN tagging Tx option descriptor may be required */ + if (efx_nic_cfg_get(sc->enp)->enc_hw_tx_insert_vlan_enabled) + max_descs++; + + if (type == SFXGE_TXQ_IP_TCP_UDP_CKSUM) { + /* + * Plus header and payload descriptor for each output segment. + * Minus one since header fragment is already counted. + */ + max_descs += SFXGE_TSO_MAX_SEGS * 2 - 1; + + /* FW assisted TSO requires one more descriptor per segment */ + if (sc->tso_fw_assisted) + max_descs += SFXGE_TSO_MAX_SEGS; + } + + return (max_descs); +} + static int sfxge_tx_qinit(struct sfxge_softc *sc, unsigned int txq_index, - enum sfxge_txq_type type, unsigned int evq_index) + enum sfxge_txq_type type, unsigned int evq_index) { char name[16]; struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); @@ -1381,7 +1539,7 @@ sfxge_tx_qinit(struct sfxge_softc *sc, unsigned int txq_index, } /* Allocate pending descriptor array for batching writes. */ - txq->pend_desc = malloc(sizeof(efx_buffer_t) * sc->txq_entries, + txq->pend_desc = malloc(sizeof(efx_desc_t) * sc->txq_entries, M_SFXGE, M_ZERO | M_WAITOK); /* Allocate and initialise mbuf DMA mapping array. */ @@ -1464,6 +1622,9 @@ sfxge_tx_qinit(struct sfxge_softc *sc, unsigned int txq_index, txq->evq_index = evq_index; txq->txq_index = txq_index; txq->init_state = SFXGE_TXQ_INITIALIZED; + txq->hw_vlan_tci = 0; + + txq->max_pkt_desc = sfxge_tx_max_pkt_desc(sc, type); return (0); @@ -1561,6 +1722,7 @@ sfxge_tx_fini(struct sfxge_softc *sc) int sfxge_tx_init(struct sfxge_softc *sc) { + const efx_nic_cfg_t *encp = efx_nic_cfg_get(sc->enp); struct sfxge_intr *intr; int index; int rc; @@ -1572,6 +1734,12 @@ sfxge_tx_init(struct sfxge_softc *sc) sc->txq_count = SFXGE_TXQ_NTYPES - 1 + sc->intr.n_alloc; + sc->tso_fw_assisted = sfxge_tso_fw_assisted; + if (sc->tso_fw_assisted) + sc->tso_fw_assisted = + (encp->enc_features & EFX_FEATURE_FW_ASSISTED_TSO) && + (encp->enc_fw_assisted_tso_enabled); + sc->txqs_node = SYSCTL_ADD_NODE( device_get_sysctl_ctx(sc->dev), SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), diff --git a/sys/dev/sfxge/sfxge_tx.h b/sys/dev/sfxge/sfxge_tx.h index a2848e05d19d..3a1dd5b0114c 100644 --- a/sys/dev/sfxge/sfxge_tx.h +++ b/sys/dev/sfxge/sfxge_tx.h @@ -1,30 +1,34 @@ /*- - * Copyright (c) 2010-2011 Solarflare Communications, Inc. + * Copyright (c) 2010-2015 Solarflare Communications Inc. * All rights reserved. * * This software was developed in part by Philip Paeps under contract for * Solarflare Communications, Inc. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. * * $FreeBSD$ */ @@ -148,6 +152,8 @@ enum sfxge_txq_type { mtx_unlock(&(_txq)->lock) #define SFXGE_TXQ_LOCK_ASSERT_OWNED(_txq) \ mtx_assert(&(_txq)->lock, MA_OWNED) +#define SFXGE_TXQ_LOCK_ASSERT_NOTOWNED(_txq) \ + mtx_assert(&(_txq)->lock, MA_NOTOWNED) struct sfxge_txq { @@ -162,10 +168,11 @@ struct sfxge_txq { unsigned int buf_base_id; unsigned int entries; unsigned int ptr_mask; + unsigned int max_pkt_desc; struct sfxge_tx_mapping *stmp; /* Packets in flight. */ bus_dma_tag_t packet_dma_tag; - efx_buffer_t *pend_desc; + efx_desc_t *pend_desc; efx_txq_t *common; efsys_mem_t *tsoh_buffer; @@ -185,6 +192,11 @@ struct sfxge_txq { unsigned int n_pend_desc; unsigned int added; unsigned int reaped; + + /* The last VLAN TCI seen on the queue if FW-assisted tagging is + used */ + uint16_t hw_vlan_tci; + /* Statistics */ unsigned long tso_bursts; unsigned long tso_packets; @@ -208,7 +220,6 @@ struct sfxge_txq { struct sfxge_evq; -extern int sfxge_tx_packet_add(struct sfxge_txq *, struct mbuf *); extern uint64_t sfxge_tx_get_drops(struct sfxge_softc *sc); extern int sfxge_tx_init(struct sfxge_softc *sc); diff --git a/sys/dev/sfxge/sfxge_version.h b/sys/dev/sfxge/sfxge_version.h index d2634518cd57..5228fff0e5ec 100644 --- a/sys/dev/sfxge/sfxge_version.h +++ b/sys/dev/sfxge/sfxge_version.h @@ -1,30 +1,34 @@ /*- - * Copyright (c) 2015 Solarflare Communications, Inc. + * Copyright (c) 2015 Solarflare Communications Inc. * All rights reserved. * * This software was developed in part by OKTET Labs under contract for * Solarflare Communications, Inc. * * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. + * modification, are permitted provided that the following conditions are met: * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * The views and conclusions contained in the software and documentation are + * those of the authors and should not be interpreted as representing official + * policies, either expressed or implied, of the FreeBSD Project. * * $FreeBSD$ */ @@ -32,6 +36,6 @@ #ifndef _SFXGE_VERSION_H #define _SFXGE_VERSION_H -#define SFXGE_VERSION_STRING "v3.3.4.6365" +#define SFXGE_VERSION_STRING "v4.5.1.1018" #endif /* _SFXGE_DRIVER_VERSION_H */ diff --git a/sys/dev/sound/midi/mpu401.c b/sys/dev/sound/midi/mpu401.c index 3e061a7850a5..5ce6648b207c 100644 --- a/sys/dev/sound/midi/mpu401.c +++ b/sys/dev/sound/midi/mpu401.c @@ -185,7 +185,7 @@ mpu401_init(kobj_class_t cls, void *cookie, driver_intr_t softintr, kobj_init((kobj_t)m, cls); - callout_init(&m->timer, CALLOUT_MPSAFE); + callout_init(&m->timer, 1); m->si = softintr; m->cookie = cookie; diff --git a/sys/dev/sound/pci/atiixp.c b/sys/dev/sound/pci/atiixp.c index 9b8c55e9a846..8df67aad4874 100644 --- a/sys/dev/sound/pci/atiixp.c +++ b/sys/dev/sound/pci/atiixp.c @@ -1194,7 +1194,7 @@ atiixp_pci_attach(device_t dev) sc->lock = snd_mtxcreate(device_get_nameunit(dev), "snd_atiixp softc"); sc->dev = dev; - callout_init(&sc->poll_timer, CALLOUT_MPSAFE); + callout_init(&sc->poll_timer, 1); sc->poll_ticks = 1; if (resource_int_value(device_get_name(sc->dev), diff --git a/sys/dev/sound/pci/es137x.c b/sys/dev/sound/pci/es137x.c index 42d0450d4348..0dd88a82e84b 100644 --- a/sys/dev/sound/pci/es137x.c +++ b/sys/dev/sound/pci/es137x.c @@ -1741,7 +1741,7 @@ es_pci_attach(device_t dev) es->st = rman_get_bustag(es->reg); es->sh = rman_get_bushandle(es->reg); - callout_init(&es->poll_timer, CALLOUT_MPSAFE); + callout_init(&es->poll_timer, 1); es->poll_ticks = 1; if (resource_int_value(device_get_name(dev), diff --git a/sys/dev/sound/pci/hda/hdaa.c b/sys/dev/sound/pci/hda/hdaa.c index 0d2ae4735b1d..a1b9f7c2dc43 100644 --- a/sys/dev/sound/pci/hda/hdaa.c +++ b/sys/dev/sound/pci/hda/hdaa.c @@ -3203,7 +3203,7 @@ hdaa_audio_as_parse(struct hdaa_devinfo *devinfo) /* Scan associations skipping as=0. */ cnt = 0; - for (j = 1; j < 16; j++) { + for (j = 1; j < 16 && cnt < max; j++) { first = 16; hpredir = 0; for (i = devinfo->startnode; i < devinfo->endnode; i++) { @@ -6592,7 +6592,7 @@ hdaa_attach(device_t dev) devinfo->newquirks = -1; devinfo->newgpio = -1; devinfo->newgpo = -1; - callout_init(&devinfo->poll_jack, CALLOUT_MPSAFE); + callout_init(&devinfo->poll_jack, 1); devinfo->poll_ival = hz; hdaa_lock(devinfo); diff --git a/sys/dev/sound/pci/hda/hdac.c b/sys/dev/sound/pci/hda/hdac.c index 1e173c64542c..b0f250ce1550 100644 --- a/sys/dev/sound/pci/hda/hdac.c +++ b/sys/dev/sound/pci/hda/hdac.c @@ -1110,7 +1110,7 @@ hdac_attach(device_t dev) sc->lock = snd_mtxcreate(device_get_nameunit(dev), "HDA driver mutex"); sc->dev = dev; TASK_INIT(&sc->unsolq_task, 0, hdac_unsolq_task, sc); - callout_init(&sc->poll_callout, CALLOUT_MPSAFE); + callout_init(&sc->poll_callout, 1); for (i = 0; i < HDAC_CODEC_MAX; i++) sc->codecs[i].dev = NULL; if (devid >= 0) { diff --git a/sys/dev/sound/pci/via8233.c b/sys/dev/sound/pci/via8233.c index 171278c4539a..0694cefdce50 100644 --- a/sys/dev/sound/pci/via8233.c +++ b/sys/dev/sound/pci/via8233.c @@ -1175,7 +1175,7 @@ via_attach(device_t dev) "snd_via8233 softc"); via->dev = dev; - callout_init(&via->poll_timer, CALLOUT_MPSAFE); + callout_init(&via->poll_timer, 1); via->poll_ticks = 1; if (resource_int_value(device_get_name(dev), diff --git a/sys/dev/sound/pcm/channel.c b/sys/dev/sound/pcm/channel.c index fbf49f61850c..83ec6c1e729c 100644 --- a/sys/dev/sound/pcm/channel.c +++ b/sys/dev/sound/pcm/channel.c @@ -1020,32 +1020,17 @@ static const struct { { NULL, NULL, NULL, 0 } }; -static const struct { - char *name, *alias1, *alias2; - int matrix_id; -} matrix_id_tab[] = { - { "1.0", "1", "mono", SND_CHN_MATRIX_1_0 }, - { "2.0", "2", "stereo", SND_CHN_MATRIX_2_0 }, - { "2.1", NULL, NULL, SND_CHN_MATRIX_2_1 }, - { "3.0", "3", NULL, SND_CHN_MATRIX_3_0 }, - { "3.1", NULL, NULL, SND_CHN_MATRIX_3_1 }, - { "4.0", "4", "quad", SND_CHN_MATRIX_4_0 }, - { "4.1", NULL, NULL, SND_CHN_MATRIX_4_1 }, - { "5.0", "5", NULL, SND_CHN_MATRIX_5_0 }, - { "5.1", "6", NULL, SND_CHN_MATRIX_5_1 }, - { "6.0", NULL, NULL, SND_CHN_MATRIX_6_0 }, - { "6.1", "7", NULL, SND_CHN_MATRIX_6_1 }, - { "7.0", NULL, NULL, SND_CHN_MATRIX_7_0 }, - { "7.1", "8", NULL, SND_CHN_MATRIX_7_1 }, - { NULL, NULL, NULL, SND_CHN_MATRIX_UNKNOWN } -}; - uint32_t snd_str2afmt(const char *req) { - uint32_t i, afmt; - int matrix_id; - char b1[8], b2[8]; + int ext; + int ch; + int i; + char b1[8]; + char b2[8]; + + memset(b1, 0, sizeof(b1)); + memset(b2, 0, sizeof(b2)); i = sscanf(req, "%5[^:]:%6s", b1, b2); @@ -1059,88 +1044,78 @@ snd_str2afmt(const char *req) } else return (0); - afmt = 0; - matrix_id = SND_CHN_MATRIX_UNKNOWN; + i = sscanf(b2, "%d.%d", &ch, &ext); - for (i = 0; afmt == 0 && afmt_tab[i].name != NULL; i++) { - if (strcasecmp(afmt_tab[i].name, b1) == 0 || - (afmt_tab[i].alias1 != NULL && - strcasecmp(afmt_tab[i].alias1, b1) == 0) || - (afmt_tab[i].alias2 != NULL && - strcasecmp(afmt_tab[i].alias2, b1) == 0)) { - afmt = afmt_tab[i].afmt; - strlcpy(b1, afmt_tab[i].name, sizeof(b1)); - } - } - - if (afmt == 0) + if (i == 0) { + if (strcasecmp(b2, "mono") == 0) { + ch = 1; + ext = 0; + } else if (strcasecmp(b2, "stereo") == 0) { + ch = 2; + ext = 0; + } else if (strcasecmp(b2, "quad") == 0) { + ch = 4; + ext = 0; + } else + return (0); + } else if (i == 1) { + if (ch < 1 || ch > AFMT_CHANNEL_MAX) + return (0); + ext = 0; + } else if (i == 2) { + if (ext < 0 || ext > AFMT_EXTCHANNEL_MAX) + return (0); + if (ch < 1 || (ch + ext) > AFMT_CHANNEL_MAX) + return (0); + } else return (0); - for (i = 0; matrix_id == SND_CHN_MATRIX_UNKNOWN && - matrix_id_tab[i].name != NULL; i++) { - if (strcmp(matrix_id_tab[i].name, b2) == 0 || - (matrix_id_tab[i].alias1 != NULL && - strcmp(matrix_id_tab[i].alias1, b2) == 0) || - (matrix_id_tab[i].alias2 != NULL && - strcasecmp(matrix_id_tab[i].alias2, b2) == 0)) { - matrix_id = matrix_id_tab[i].matrix_id; - strlcpy(b2, matrix_id_tab[i].name, sizeof(b2)); + for (i = 0; afmt_tab[i].name != NULL; i++) { + if (strcasecmp(afmt_tab[i].name, b1) != 0) { + if (afmt_tab[i].alias1 == NULL) + continue; + if (strcasecmp(afmt_tab[i].alias1, b1) != 0) { + if (afmt_tab[i].alias2 == NULL) + continue; + if (strcasecmp(afmt_tab[i].alias2, b1) != 0) + continue; + } } + /* found a match */ + return (SND_FORMAT(afmt_tab[i].afmt, ch + ext, ext)); } - - if (matrix_id == SND_CHN_MATRIX_UNKNOWN) - return (0); - -#ifndef _KERNEL - printf("Parse OK: '%s' -> '%s:%s' %d\n", req, b1, b2, - (int)(b2[0]) - '0' + (int)(b2[2]) - '0'); -#endif - - return (SND_FORMAT(afmt, b2[0] - '0' + b2[2] - '0', b2[2] - '0')); + /* not a valid format */ + return (0); } uint32_t snd_afmt2str(uint32_t afmt, char *buf, size_t len) { - uint32_t i, enc, ch, ext; - char tmp[AFMTSTR_LEN]; + uint32_t enc; + uint32_t ext; + uint32_t ch; + int i; if (buf == NULL || len < AFMTSTR_LEN) return (0); - - bzero(tmp, sizeof(tmp)); + memset(buf, 0, len); enc = AFMT_ENCODING(afmt); ch = AFMT_CHANNEL(afmt); ext = AFMT_EXTCHANNEL(afmt); - + /* check there is at least one channel */ + if (ch <= ext) + return (0); for (i = 0; afmt_tab[i].name != NULL; i++) { - if (enc == afmt_tab[i].afmt) { - strlcpy(tmp, afmt_tab[i].name, sizeof(tmp)); - strlcat(tmp, ":", sizeof(tmp)); - break; - } + if (enc != afmt_tab[i].afmt) + continue; + /* found a match */ + snprintf(buf, len, "%s:%d.%d", + afmt_tab[i].name, ch - ext, ext); + return (SND_FORMAT(enc, ch, ext)); } - - if (strlen(tmp) == 0) - return (0); - - for (i = 0; matrix_id_tab[i].name != NULL; i++) { - if (ch == (matrix_id_tab[i].name[0] - '0' + - matrix_id_tab[i].name[2] - '0') && - ext == (matrix_id_tab[i].name[2] - '0')) { - strlcat(tmp, matrix_id_tab[i].name, sizeof(tmp)); - break; - } - } - - if (strlen(tmp) == 0) - return (0); - - strlcpy(buf, tmp, len); - - return (snd_str2afmt(buf)); + return (0); } int diff --git a/sys/dev/sound/pcm/channel.h b/sys/dev/sound/pcm/channel.h index 6601b546a353..45f43b55498b 100644 --- a/sys/dev/sound/pcm/channel.h +++ b/sys/dev/sound/pcm/channel.h @@ -162,6 +162,7 @@ struct pcm_channel { } channels; struct pcmchan_matrix matrix; + struct pcmchan_matrix matrix_scratch; int volume[SND_VOL_C_MAX][SND_CHN_T_VOL_MAX]; diff --git a/sys/dev/sound/pcm/feeder_chain.c b/sys/dev/sound/pcm/feeder_chain.c index a647269dba6d..308d5f2e8b61 100644 --- a/sys/dev/sound/pcm/feeder_chain.c +++ b/sys/dev/sound/pcm/feeder_chain.c @@ -561,6 +561,20 @@ feeder_build_mixer(struct pcm_channel *c, struct feeder_chain_desc *cdesc) ((c)->mode == FEEDER_CHAIN_LEAN && \ !((c)->current.afmt & (AFMT_S16_NE | AFMT_S32_NE))))) +static void +feeder_default_matrix(struct pcmchan_matrix *m, uint32_t fmt, int id) +{ + int x; + + memset(m, 0, sizeof(*m)); + + m->id = id; + m->channels = AFMT_CHANNEL(fmt); + m->ext = AFMT_EXTCHANNEL(fmt); + for (x = 0; x != SND_CHN_T_MAX; x++) + m->offset[x] = -1; +} + int feeder_chain(struct pcm_channel *c) { @@ -641,10 +655,10 @@ feeder_chain(struct pcm_channel *c) */ hwmatrix = CHANNEL_GETMATRIX(c->methods, c->devinfo, hwfmt); if (hwmatrix == NULL) { - device_printf(c->dev, - "%s(): failed to acquire hw matrix [0x%08x]\n", - __func__, hwfmt); - return (ENODEV); + /* setup a default matrix */ + hwmatrix = &c->matrix_scratch; + feeder_default_matrix(hwmatrix, hwfmt, + SND_CHN_MATRIX_UNKNOWN); } /* ..... and rebuild hwfmt. */ hwfmt = SND_FORMAT(hwfmt, hwmatrix->channels, hwmatrix->ext); @@ -656,13 +670,14 @@ feeder_chain(struct pcm_channel *c) softmatrix->ext != AFMT_EXTCHANNEL(softfmt)) { softmatrix = feeder_matrix_format_map(softfmt); if (softmatrix == NULL) { - device_printf(c->dev, - "%s(): failed to acquire soft matrix [0x%08x]\n", - __func__, softfmt); - return (ENODEV); + /* setup a default matrix */ + softmatrix = &c->matrix; + feeder_default_matrix(softmatrix, softfmt, + SND_CHN_MATRIX_PCMCHANNEL); + } else { + c->matrix = *softmatrix; + c->matrix.id = SND_CHN_MATRIX_PCMCHANNEL; } - c->matrix = *softmatrix; - c->matrix.id = SND_CHN_MATRIX_PCMCHANNEL; } softfmt = SND_FORMAT(softfmt, softmatrix->channels, softmatrix->ext); if (softfmt != c->format) diff --git a/sys/dev/sound/pcm/sound.h b/sys/dev/sound/pcm/sound.h index 3565ca530e13..32e034330f74 100644 --- a/sys/dev/sound/pcm/sound.h +++ b/sys/dev/sound/pcm/sound.h @@ -213,10 +213,12 @@ struct snd_mixer; * ~(0xb00ff7ff) */ #define AFMT_ENCODING_MASK 0xf00fffff -#define AFMT_CHANNEL_MASK 0x01f00000 +#define AFMT_CHANNEL_MASK 0x07f00000 #define AFMT_CHANNEL_SHIFT 20 -#define AFMT_EXTCHANNEL_MASK 0x0e000000 -#define AFMT_EXTCHANNEL_SHIFT 25 +#define AFMT_CHANNEL_MAX 0x7f +#define AFMT_EXTCHANNEL_MASK 0x08000000 +#define AFMT_EXTCHANNEL_SHIFT 27 +#define AFMT_EXTCHANNEL_MAX 1 #define AFMT_ENCODING(v) ((v) & AFMT_ENCODING_MASK) diff --git a/sys/dev/sound/usb/uaudio.c b/sys/dev/sound/usb/uaudio.c index 8822bf0403ce..063d8ce48dba 100644 --- a/sys/dev/sound/usb/uaudio.c +++ b/sys/dev/sound/usb/uaudio.c @@ -115,6 +115,8 @@ SYSCTL_INT(_hw_usb_uaudio, OID_AUTO, default_channels, CTLFLAG_RWTUN, #define UAUDIO_NFRAMES 64 /* must be factor of 8 due HS-USB */ #define UAUDIO_NCHANBUFS 2 /* number of outstanding request */ #define UAUDIO_RECURSE_LIMIT 255 /* rounds */ +#define UAUDIO_CHANNELS_MAX MIN(64, AFMT_CHANNEL_MAX) +#define UAUDIO_MATRIX_MAX 8 /* channels */ #define MAKE_WORD(h,l) (((h) << 8) | (l)) #define BIT_TEST(bm,bno) (((bm)[(bno) / 8] >> (7 - ((bno) % 8))) & 1) @@ -346,6 +348,7 @@ struct uaudio_softc { uint8_t sc_uq_au_no_xu:1; uint8_t sc_uq_bad_adc:1; uint8_t sc_uq_au_vendor_class:1; + uint8_t sc_pcm_bitperfect:1; }; struct uaudio_terminal_node { @@ -1062,6 +1065,10 @@ uaudio_attach_sub(device_t dev, kobj_class_t mixer_class, kobj_class_t chan_clas */ uaudio_pcm_setflags(dev, SD_F_SOFTPCMVOL); } + if (sc->sc_pcm_bitperfect) { + DPRINTF("device needs bitperfect by default\n"); + uaudio_pcm_setflags(dev, SD_F_BITPERFECT); + } if (mixer_init(dev, mixer_class, sc)) goto detach; sc->sc_mixer_init = 1; @@ -1568,6 +1575,19 @@ uaudio_chan_fill_info_sub(struct uaudio_softc *sc, struct usb_device *udev, asf1d.v1 = NULL; ed1 = NULL; sed.v1 = NULL; + + /* + * There can only be one USB audio instance + * per USB device. Grab all USB audio + * interfaces on this USB device so that we + * don't attach USB audio twice: + */ + if (alt_index == 0 && curidx != sc->sc_mixer_iface_index && + (id->bInterfaceClass == UICLASS_AUDIO || audio_if != 0 || + midi_if != 0)) { + usbd_set_parent_iface(sc->sc_udev, curidx, + sc->sc_mixer_iface_index); + } } if (audio_if == 0) { @@ -1803,9 +1823,6 @@ uaudio_chan_fill_info_sub(struct uaudio_softc *sc, struct usb_device *udev, chan_alt->iface_index = curidx; chan_alt->iface_alt_index = alt_index; - usbd_set_parent_iface(sc->sc_udev, curidx, - sc->sc_mixer_iface_index); - if (ep_dir == UE_DIR_IN) chan_alt->usb_cfg = uaudio_cfg_record; else @@ -1826,19 +1843,21 @@ uaudio_chan_fill_info_sub(struct uaudio_softc *sc, struct usb_device *udev, format = chan_alt->p_fmt->freebsd_fmt; + /* get default SND_FORMAT() */ + format = SND_FORMAT(format, chan_alt->channels, 0); + switch (chan_alt->channels) { - case 2: - /* stereo */ - format = SND_FORMAT(format, 2, 0); - break; + uint32_t temp_fmt; case 1: - /* mono */ - format = SND_FORMAT(format, 1, 0); + case 2: + /* mono and stereo */ break; default: /* surround and more */ - format = feeder_matrix_default_format( - SND_FORMAT(format, chan_alt->channels, 0)); + temp_fmt = feeder_matrix_default_format(format); + /* if multichannel, then format can be zero */ + if (temp_fmt != 0) + format = temp_fmt; break; } @@ -1865,6 +1884,10 @@ uaudio_chan_fill_info_sub(struct uaudio_softc *sc, struct usb_device *udev, chan->pcm_cap.fmtlist = chan->pcm_format; chan->pcm_cap.fmtlist[0] = format; + /* check if device needs bitperfect */ + if (chan_alt->channels > UAUDIO_MATRIX_MAX) + sc->sc_pcm_bitperfect = 1; + if (rate < chan->pcm_cap.minspeed || chan->pcm_cap.minspeed == 0) chan->pcm_cap.minspeed = rate; if (rate > chan->pcm_cap.maxspeed || chan->pcm_cap.maxspeed == 0) @@ -1939,15 +1962,15 @@ uaudio_chan_fill_info(struct uaudio_softc *sc, struct usb_device *udev) channels = 4; break; default: - channels = 16; + channels = UAUDIO_CHANNELS_MAX; break; } - } else if (channels > 16) { - channels = 16; - } - if (sbuf_new(&sc->sc_sndstat, NULL, 4096, SBUF_AUTOEXTEND)) { + } else if (channels > UAUDIO_CHANNELS_MAX) + channels = UAUDIO_CHANNELS_MAX; + + if (sbuf_new(&sc->sc_sndstat, NULL, 4096, SBUF_AUTOEXTEND)) sc->sc_sndstat_valid = 1; - } + /* try to search for a valid config */ for (x = channels; x; x--) { diff --git a/sys/dev/twa/tw_osl_freebsd.c b/sys/dev/twa/tw_osl_freebsd.c index 8b5626723f22..dbd249a8d7a9 100644 --- a/sys/dev/twa/tw_osl_freebsd.c +++ b/sys/dev/twa/tw_osl_freebsd.c @@ -423,8 +423,8 @@ twa_attach(device_t dev) } sc->watchdog_index = 0; - callout_init(&(sc->watchdog_callout[0]), CALLOUT_MPSAFE); - callout_init(&(sc->watchdog_callout[1]), CALLOUT_MPSAFE); + callout_init(&(sc->watchdog_callout[0]), 1); + callout_init(&(sc->watchdog_callout[1]), 1); callout_reset(&(sc->watchdog_callout[0]), 5*hz, twa_watchdog, &sc->ctlr_handle); return(0); diff --git a/sys/dev/tws/tws.c b/sys/dev/tws/tws.c index 9c70db3bb5a7..4c3529ed8c67 100644 --- a/sys/dev/tws/tws.c +++ b/sys/dev/tws/tws.c @@ -198,7 +198,7 @@ tws_attach(device_t dev) mtx_init( &sc->sim_lock, "tws_sim_lock", NULL, MTX_DEF); mtx_init( &sc->gen_lock, "tws_gen_lock", NULL, MTX_DEF); mtx_init( &sc->io_lock, "tws_io_lock", NULL, MTX_DEF | MTX_RECURSE); - callout_init(&sc->stats_timer, CALLOUT_MPSAFE); + callout_init(&sc->stats_timer, 1); if ( tws_init_trace_q(sc) == FAILURE ) printf("trace init failure\n"); @@ -719,7 +719,7 @@ tws_init_reqs(struct tws_softc *sc, u_int32_t dma_mem_size) sc->reqs[i].cmd_pkt->hdr.header_desc.size_header = 128; - callout_init(&sc->reqs[i].timeout, CALLOUT_MPSAFE); + callout_init(&sc->reqs[i].timeout, 1); sc->reqs[i].state = TWS_REQ_STATE_FREE; if ( i >= TWS_RESERVED_REQS ) tws_q_insert_tail(sc, &sc->reqs[i], TWS_FREE_Q); diff --git a/sys/dev/uart/uart_dev_ti8250.c b/sys/dev/uart/uart_dev_ti8250.c index 373dc743dc0e..e82dbb7e2904 100644 --- a/sys/dev/uart/uart_dev_ti8250.c +++ b/sys/dev/uart/uart_dev_ti8250.c @@ -38,6 +38,7 @@ __FBSDID("$FreeBSD$"); #include #include +#include #include #include @@ -71,29 +72,15 @@ static int ti8250_bus_probe(struct uart_softc *sc) { int status; - int devid; clk_ident_t clkid; - pcell_t prop; - phandle_t node; - - /* - * Get the device id from FDT. If it's not there we can't turn on the - * right clocks, so bail, unless we're doing unit 0. We assume that's - * the serial console, whose clock isn't controllable anyway, and we - * sure don't want to break the console because of a config error. - */ - node = ofw_bus_get_node(sc->sc_dev); - if ((OF_getprop(node, "uart-device-id", &prop, sizeof(prop))) <= 0) { - device_printf(sc->sc_dev, - "missing uart-device-id attribute in FDT\n"); - if (device_get_unit(sc->sc_dev) != 0) - return (ENXIO); - devid = 0; - } else - devid = fdt32_to_cpu(prop); /* Enable clocks for this device. We can't continue if that fails. */ - clkid = UART0_CLK + devid; + clkid = ti_hwmods_get_clock(sc->sc_dev); + if (clkid == INVALID_CLK_IDENT) { + device_printf(sc->sc_dev, + "failed to get clock based on hwmods\n"); + clkid = UART1_CLK + device_get_unit(sc->sc_dev); + } if ((status = ti_prcm_clk_enable(clkid)) != 0) return (status); @@ -138,10 +125,12 @@ static struct uart_class uart_ti8250_class = { .uc_ops = &uart_ns8250_ops, .uc_range = 0x88, .uc_rclk = 48000000, - .uc_rshift = 0 + .uc_rshift = 2 }; static struct ofw_compat_data compat_data[] = { {"ti,ns16550", (uintptr_t)&uart_ti8250_class}, + {"ti,omap3-uart", (uintptr_t)&uart_ti8250_class}, + {"ti,omap4-uart", (uintptr_t)&uart_ti8250_class}, {NULL, (uintptr_t)NULL}, }; UART_FDT_CLASS_AND_DEVICE(compat_data); diff --git a/sys/dev/ubsec/ubsec.c b/sys/dev/ubsec/ubsec.c index a79886cff205..27bb591db7e4 100644 --- a/sys/dev/ubsec/ubsec.c +++ b/sys/dev/ubsec/ubsec.c @@ -456,7 +456,7 @@ ubsec_attach(device_t dev) sc->sc_rnghz = hz / 100; else sc->sc_rnghz = 1; - callout_init(&sc->sc_rngto, CALLOUT_MPSAFE); + callout_init(&sc->sc_rngto, 1); callout_reset(&sc->sc_rngto, sc->sc_rnghz, ubsec_rng, sc); skip_rng: ; diff --git a/sys/dev/usb/controller/dwc_otg.c b/sys/dev/usb/controller/dwc_otg.c index 37b533325fd9..50ead5c290a7 100644 --- a/sys/dev/usb/controller/dwc_otg.c +++ b/sys/dev/usb/controller/dwc_otg.c @@ -297,32 +297,29 @@ dwc_otg_init_fifo(struct dwc_otg_softc *sc, uint8_t mode) if (x < sc->sc_dev_in_ep_max) { uint32_t limit; - limit = (x == 1) ? DWC_OTG_MAX_TXN : - (DWC_OTG_MAX_TXN / 2); + limit = (x == 1) ? MIN(DWC_OTG_TX_MAX_FIFO_SIZE, + DWC_OTG_MAX_TXN) : MIN(DWC_OTG_MAX_TXN / 2, + DWC_OTG_TX_MAX_FIFO_SIZE); - if (fifo_size >= limit) { - DWC_OTG_WRITE_4(sc, DOTG_DIEPTXF(x), - ((limit / 4) << 16) | - (tx_start / 4)); - tx_start += limit; - fifo_size -= limit; - pf->usb.max_in_frame_size = 0x200; - pf->usb.support_in = 1; + /* see if there is enough FIFO space */ + if (limit <= fifo_size) { pf->max_buffer = limit; - - } else if (fifo_size >= 0x80) { - DWC_OTG_WRITE_4(sc, DOTG_DIEPTXF(x), - ((0x80 / 4) << 16) | (tx_start / 4)); - tx_start += 0x80; - fifo_size -= 0x80; - pf->usb.max_in_frame_size = 0x40; pf->usb.support_in = 1; - } else { - pf->usb.is_simplex = 1; - DWC_OTG_WRITE_4(sc, DOTG_DIEPTXF(x), - (0x0 << 16) | (tx_start / 4)); + limit = MIN(DWC_OTG_TX_MAX_FIFO_SIZE, 0x40); + if (limit <= fifo_size) { + pf->usb.support_in = 1; + } else { + pf->usb.is_simplex = 1; + limit = 0; + } } + /* set FIFO size */ + DWC_OTG_WRITE_4(sc, DOTG_DIEPTXF(x), + ((limit / 4) << 16) | (tx_start / 4)); + tx_start += limit; + fifo_size -= limit; + pf->usb.max_in_frame_size = limit; } else { pf->usb.is_simplex = 1; } @@ -1560,6 +1557,22 @@ dwc_otg_data_rx(struct dwc_otg_softc *sc, struct dwc_otg_td *td) /* release FIFO */ dwc_otg_common_rx_ack(sc); + temp = sc->sc_out_ctl[td->ep_no]; + + /* check for isochronous mode */ + if ((temp & DIEPCTL_EPTYPE_MASK) == + (DIEPCTL_EPTYPE_ISOC << DIEPCTL_EPTYPE_SHIFT)) { + /* toggle odd or even frame bit */ + if (temp & DIEPCTL_SETD1PID) { + temp &= ~DIEPCTL_SETD1PID; + temp |= DIEPCTL_SETD0PID; + } else { + temp &= ~DIEPCTL_SETD0PID; + temp |= DIEPCTL_SETD1PID; + } + sc->sc_out_ctl[td->ep_no] = temp; + } + /* check if we are complete */ if ((td->remainder == 0) || got_short) { if (td->short_pkt) { @@ -2135,10 +2148,23 @@ dwc_otg_data_tx(struct dwc_otg_softc *sc, struct dwc_otg_td *td) temp = sc->sc_in_ctl[td->ep_no]; + /* check for isochronous mode */ + if ((temp & DIEPCTL_EPTYPE_MASK) == + (DIEPCTL_EPTYPE_ISOC << DIEPCTL_EPTYPE_SHIFT)) { + /* toggle odd or even frame bit */ + if (temp & DIEPCTL_SETD1PID) { + temp &= ~DIEPCTL_SETD1PID; + temp |= DIEPCTL_SETD0PID; + } else { + temp &= ~DIEPCTL_SETD0PID; + temp |= DIEPCTL_SETD1PID; + } + sc->sc_in_ctl[td->ep_no] = temp; + } + /* must enable before writing data to FIFO */ DWC_OTG_WRITE_4(sc, DOTG_DIEPCTL(td->ep_no), temp | - DIEPCTL_EPENA | - DIEPCTL_CNAK); + DIEPCTL_EPENA | DIEPCTL_CNAK); td->tx_bytes = count; diff --git a/sys/dev/usb/controller/dwc_otg.h b/sys/dev/usb/controller/dwc_otg.h index 1fa1bbf67051..52b3b914a0db 100644 --- a/sys/dev/usb/controller/dwc_otg.h +++ b/sys/dev/usb/controller/dwc_otg.h @@ -38,6 +38,9 @@ #define DWC_OTG_SLOT_IDLE_MAX 3 #define DWC_OTG_SLOT_IDLE_MIN 2 #define DWC_OTG_NAK_MAX 8 /* 1 ms */ +#ifndef DWC_OTG_TX_MAX_FIFO_SIZE +#define DWC_OTG_TX_MAX_FIFO_SIZE DWC_OTG_MAX_TXN +#endif #define DWC_OTG_READ_4(sc, reg) \ bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg) diff --git a/sys/dev/usb/video/udl.c b/sys/dev/usb/video/udl.c index 69e2429794db..0d7c504a6b00 100644 --- a/sys/dev/usb/video/udl.c +++ b/sys/dev/usb/video/udl.c @@ -203,12 +203,14 @@ udl_buffer_alloc(uint32_t size) } mtx_unlock(&udl_buffer_mtx); if (buf != NULL) { + uint8_t *ptr = ((uint8_t *)buf) - size; /* wipe and recycle buffer */ - memset(buf, 0, size); - return (buf); + memset(ptr, 0, size); + /* return buffer pointer */ + return (ptr); } /* allocate new buffer */ - return (malloc(size, M_USB_DL, M_WAITOK | M_ZERO)); + return (malloc(size + sizeof(*buf), M_USB_DL, M_WAITOK | M_ZERO)); } static void @@ -216,9 +218,11 @@ udl_buffer_free(void *_buf, uint32_t size) { struct udl_buffer *buf; - buf = (struct udl_buffer *)_buf; - if (buf == NULL) + /* check for NULL pointer */ + if (_buf == NULL) return; + /* compute pointer to recycle list */ + buf = (struct udl_buffer *)(((uint8_t *)_buf) + size); /* * Memory mapped buffers should never be freed. diff --git a/sys/dev/usb/wlan/if_rsu.c b/sys/dev/usb/wlan/if_rsu.c index 677775c1442a..89b8c0007723 100644 --- a/sys/dev/usb/wlan/if_rsu.c +++ b/sys/dev/usb/wlan/if_rsu.c @@ -142,7 +142,7 @@ static void rsu_vap_delete(struct ieee80211vap *); static void rsu_scan_start(struct ieee80211com *); static void rsu_scan_end(struct ieee80211com *); static void rsu_set_channel(struct ieee80211com *); -static void rsu_update_mcast(struct ifnet *); +static void rsu_update_mcast(struct ieee80211com *); static int rsu_alloc_rx_list(struct rsu_softc *); static void rsu_free_rx_list(struct rsu_softc *); static int rsu_alloc_tx_list(struct rsu_softc *); @@ -355,6 +355,8 @@ rsu_attach(device_t self) ifp->if_hwassist = CSUM_TCP; ic->ic_ifp = ifp; + ic->ic_softc = sc; + ic->ic_name = device_get_nameunit(self); ic->ic_phytype = IEEE80211_T_OFDM; /* Not only, but not used. */ ic->ic_opmode = IEEE80211_M_STA; /* Default to BSS mode. */ @@ -532,7 +534,7 @@ rsu_set_channel(struct ieee80211com *ic __unused) } static void -rsu_update_mcast(struct ifnet *ifp) +rsu_update_mcast(struct ieee80211com *ic) { /* XXX do nothing? */ } diff --git a/sys/dev/usb/wlan/if_rum.c b/sys/dev/usb/wlan/if_rum.c index a3dc5627e6fd..d5142ea8315e 100644 --- a/sys/dev/usb/wlan/if_rum.c +++ b/sys/dev/usb/wlan/if_rum.c @@ -201,8 +201,8 @@ static void rum_enable_tsf(struct rum_softc *); static void rum_update_slot(struct ifnet *); static void rum_set_bssid(struct rum_softc *, const uint8_t *); static void rum_set_macaddr(struct rum_softc *, const uint8_t *); -static void rum_update_mcast(struct ifnet *); -static void rum_update_promisc(struct ifnet *); +static void rum_update_mcast(struct ieee80211com *); +static void rum_update_promisc(struct ieee80211com *); static void rum_setpromisc(struct rum_softc *); static const char *rum_get_rf(int); static void rum_read_eeprom(struct rum_softc *); @@ -488,6 +488,8 @@ rum_attach(device_t self) IFQ_SET_READY(&ifp->if_snd); ic->ic_ifp = ifp; + ic->ic_softc = sc; + ic->ic_name = device_get_nameunit(self); ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ /* set device capabilities */ @@ -1841,11 +1843,11 @@ rum_setpromisc(struct rum_softc *sc) } static void -rum_update_promisc(struct ifnet *ifp) +rum_update_promisc(struct ieee80211com *ic) { - struct rum_softc *sc = ifp->if_softc; + struct rum_softc *sc = ic->ic_softc; - if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) + if ((ic->ic_ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) return; RUM_LOCK(sc); @@ -1854,12 +1856,12 @@ rum_update_promisc(struct ifnet *ifp) } static void -rum_update_mcast(struct ifnet *ifp) +rum_update_mcast(struct ieee80211com *ic) { static int warning_printed; if (warning_printed == 0) { - if_printf(ifp, "need to implement %s\n", __func__); + ic_printf(ic, "need to implement %s\n", __func__); warning_printed = 1; } } diff --git a/sys/dev/usb/wlan/if_run.c b/sys/dev/usb/wlan/if_run.c index 22cc180f3cbb..ac14178a3c7e 100644 --- a/sys/dev/usb/wlan/if_run.c +++ b/sys/dev/usb/wlan/if_run.c @@ -439,12 +439,12 @@ static void run_set_basicrates(struct run_softc *); static void run_set_leds(struct run_softc *, uint16_t); static void run_set_bssid(struct run_softc *, const uint8_t *); static void run_set_macaddr(struct run_softc *, const uint8_t *); -static void run_updateslot(struct ifnet *); +static void run_updateslot(struct ieee80211com *); static void run_updateslot_cb(void *); -static void run_update_mcast(struct ifnet *); +static void run_update_mcast(struct ieee80211com *); static int8_t run_rssi2dbm(struct run_softc *, uint8_t, uint8_t); -static void run_update_promisc_locked(struct ifnet *); -static void run_update_promisc(struct ifnet *); +static void run_update_promisc_locked(struct run_softc *); +static void run_update_promisc(struct ieee80211com *); static void run_rt5390_bbp_init(struct run_softc *); static int run_bbp_init(struct run_softc *); static int run_rt3070_rf_init(struct run_softc *); @@ -776,6 +776,8 @@ run_attach(device_t self) IFQ_SET_READY(&ifp->if_snd); ic->ic_ifp = ifp; + ic->ic_softc = sc; + ic->ic_name = device_get_nameunit(self); ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ @@ -2137,7 +2139,7 @@ run_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) IEEE80211_LOCK(ic); return (-1); } - run_updateslot(ic->ic_ifp); + run_updateslot(ic); run_enable_mrr(sc); run_set_txpreamble(sc); run_set_basicrates(sc); @@ -3785,7 +3787,7 @@ run_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) startall = 1; run_init_locked(sc); } else - run_update_promisc_locked(ifp); + run_update_promisc_locked(sc); } else { if (ifp->if_drv_flags & IFF_DRV_RUNNING && (ic->ic_nrunning == 0 || sc->rvp_cnt <= 1)) { @@ -4901,7 +4903,7 @@ run_update_beacon(struct ieee80211vap *vap, int item) switch (item) { case IEEE80211_BEACON_ERP: - run_updateslot(ic->ic_ifp); + run_updateslot(ic); break; case IEEE80211_BEACON_HTINFO: run_updateprot(ic); @@ -5062,33 +5064,32 @@ run_reset_livelock(struct run_softc *sc) } static void -run_update_promisc_locked(struct ifnet *ifp) +run_update_promisc_locked(struct run_softc *sc) { - struct run_softc *sc = ifp->if_softc; uint32_t tmp; run_read(sc, RT2860_RX_FILTR_CFG, &tmp); tmp |= RT2860_DROP_UC_NOME; - if (ifp->if_flags & IFF_PROMISC) + if (sc->sc_ifp->if_flags & IFF_PROMISC) tmp &= ~RT2860_DROP_UC_NOME; run_write(sc, RT2860_RX_FILTR_CFG, tmp); - DPRINTF("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? + DPRINTF("%s promiscuous mode\n", (sc->sc_ifp->if_flags & IFF_PROMISC) ? "entering" : "leaving"); } static void -run_update_promisc(struct ifnet *ifp) +run_update_promisc(struct ieee80211com *ic) { - struct run_softc *sc = ifp->if_softc; + struct run_softc *sc = ic->ic_softc; - if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) + if ((ic->ic_ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) return; RUN_LOCK(sc); - run_update_promisc_locked(ifp); + run_update_promisc_locked(sc); RUN_UNLOCK(sc); } @@ -5211,16 +5212,15 @@ run_set_macaddr(struct run_softc *sc, const uint8_t *addr) } static void -run_updateslot(struct ifnet *ifp) +run_updateslot(struct ieee80211com *ic) { - struct run_softc *sc = ifp->if_softc; - struct ieee80211com *ic = ifp->if_l2com; + struct run_softc *sc = ic->ic_softc; uint32_t i; i = RUN_CMDQ_GET(&sc->cmdq_store); DPRINTF("cmdq_store=%d\n", i); sc->cmdq[i].func = run_updateslot_cb; - sc->cmdq[i].arg0 = ifp; + sc->cmdq[i].arg0 = ic->ic_ifp; ieee80211_runtask(ic, &sc->cmdq_task); return; @@ -5242,10 +5242,11 @@ run_updateslot_cb(void *arg) } static void -run_update_mcast(struct ifnet *ifp) +run_update_mcast(struct ieee80211com *ic) { + /* h/w filter supports getting everything or nothing */ - ifp->if_flags |= IFF_ALLMULTI; + ic->ic_ifp->if_flags |= IFF_ALLMULTI; } static int8_t diff --git a/sys/dev/usb/wlan/if_uath.c b/sys/dev/usb/wlan/if_uath.c index 0796fbe76316..fca9e39a6a27 100644 --- a/sys/dev/usb/wlan/if_uath.c +++ b/sys/dev/usb/wlan/if_uath.c @@ -290,8 +290,8 @@ static int uath_raw_xmit(struct ieee80211_node *, struct mbuf *, static void uath_scan_start(struct ieee80211com *); static void uath_scan_end(struct ieee80211com *); static void uath_set_channel(struct ieee80211com *); -static void uath_update_mcast(struct ifnet *); -static void uath_update_promisc(struct ifnet *); +static void uath_update_mcast(struct ieee80211com *); +static void uath_update_promisc(struct ieee80211com *); static int uath_config(struct uath_softc *, uint32_t, uint32_t); static int uath_config_multi(struct uath_softc *, uint32_t, const void *, int); @@ -442,6 +442,8 @@ uath_attach(device_t dev) ic = ifp->if_l2com; ic->ic_ifp = ifp; + ic->ic_softc = sc; + ic->ic_name = device_get_nameunit(dev); ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ @@ -1925,13 +1927,13 @@ uath_set_rxmulti_filter(struct uath_softc *sc) return (0); } static void -uath_update_mcast(struct ifnet *ifp) +uath_update_mcast(struct ieee80211com *ic) { - struct uath_softc *sc = ifp->if_softc; + struct uath_softc *sc = ic->ic_softc; UATH_LOCK(sc); if ((sc->sc_flags & UATH_FLAG_INVALID) || - (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { + (ic->ic_ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { UATH_UNLOCK(sc); return; } @@ -1945,13 +1947,13 @@ uath_update_mcast(struct ifnet *ifp) } static void -uath_update_promisc(struct ifnet *ifp) +uath_update_promisc(struct ieee80211com *ic) { - struct uath_softc *sc = ifp->if_softc; + struct uath_softc *sc = ic->ic_softc; UATH_LOCK(sc); if ((sc->sc_flags & UATH_FLAG_INVALID) || - (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { + (ic->ic_ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { UATH_UNLOCK(sc); return; } diff --git a/sys/dev/usb/wlan/if_upgt.c b/sys/dev/usb/wlan/if_upgt.c index 242eb6723909..a2e493ed64fa 100644 --- a/sys/dev/usb/wlan/if_upgt.c +++ b/sys/dev/usb/wlan/if_upgt.c @@ -142,7 +142,7 @@ static struct ieee80211vap *upgt_vap_create(struct ieee80211com *, const uint8_t [IEEE80211_ADDR_LEN], const uint8_t [IEEE80211_ADDR_LEN]); static void upgt_vap_delete(struct ieee80211vap *); -static void upgt_update_mcast(struct ifnet *); +static void upgt_update_mcast(struct ieee80211com *); static uint8_t upgt_rx_rate(struct upgt_softc *, const int); static void upgt_set_multi(void *); static void upgt_stop(struct upgt_softc *); @@ -341,6 +341,8 @@ upgt_attach(device_t dev) ic = ifp->if_l2com; ic->ic_ifp = ifp; + ic->ic_softc = sc; + ic->ic_name = device_get_nameunit(dev); ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ ic->ic_opmode = IEEE80211_M_STA; /* set device capabilities */ @@ -1113,9 +1115,9 @@ upgt_vap_delete(struct ieee80211vap *vap) } static void -upgt_update_mcast(struct ifnet *ifp) +upgt_update_mcast(struct ieee80211com *ic) { - struct upgt_softc *sc = ifp->if_softc; + struct upgt_softc *sc = ic->ic_softc; upgt_set_multi(sc); } diff --git a/sys/dev/usb/wlan/if_ural.c b/sys/dev/usb/wlan/if_ural.c index c81b708be2ae..79a5be0a63f7 100644 --- a/sys/dev/usb/wlan/if_ural.c +++ b/sys/dev/usb/wlan/if_ural.c @@ -177,7 +177,7 @@ static void ural_set_basicrates(struct ural_softc *, const struct ieee80211_channel *); static void ural_set_bssid(struct ural_softc *, const uint8_t *); static void ural_set_macaddr(struct ural_softc *, uint8_t *); -static void ural_update_promisc(struct ifnet *); +static void ural_update_promisc(struct ieee80211com *); static void ural_setpromisc(struct ural_softc *); static const char *ural_get_rf(int); static void ural_read_eeprom(struct ural_softc *); @@ -473,6 +473,8 @@ ural_attach(device_t self) IFQ_SET_READY(&ifp->if_snd); ic->ic_ifp = ifp; + ic->ic_softc = sc; + ic->ic_name = device_get_nameunit(self); ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ /* set device capabilities */ @@ -1926,11 +1928,11 @@ ural_setpromisc(struct ural_softc *sc) } static void -ural_update_promisc(struct ifnet *ifp) +ural_update_promisc(struct ieee80211com *ic) { - struct ural_softc *sc = ifp->if_softc; + struct ural_softc *sc = ic->ic_softc; - if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) + if ((ic->ic_ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) return; RAL_LOCK(sc); diff --git a/sys/dev/usb/wlan/if_urtw.c b/sys/dev/usb/wlan/if_urtw.c index d2c6ef975a9f..f8b77d427521 100644 --- a/sys/dev/usb/wlan/if_urtw.c +++ b/sys/dev/usb/wlan/if_urtw.c @@ -663,7 +663,7 @@ static int urtw_raw_xmit(struct ieee80211_node *, struct mbuf *, static void urtw_scan_start(struct ieee80211com *); static void urtw_scan_end(struct ieee80211com *); static void urtw_set_channel(struct ieee80211com *); -static void urtw_update_mcast(struct ifnet *); +static void urtw_update_mcast(struct ieee80211com *); static int urtw_tx_start(struct urtw_softc *, struct ieee80211_node *, struct mbuf *, struct urtw_data *, int); @@ -758,7 +758,7 @@ static struct urtw_data * urtw_getbuf(struct urtw_softc *sc); static int urtw_compute_txtime(uint16_t, uint16_t, uint8_t, uint8_t); -static void urtw_updateslot(struct ifnet *); +static void urtw_updateslot(struct ieee80211com *); static void urtw_updateslottask(void *, int); static void urtw_sysctl_node(struct urtw_softc *); @@ -881,6 +881,8 @@ urtw_attach(device_t dev) ic = ifp->if_l2com; ic->ic_ifp = ifp; + ic->ic_softc = sc; + ic->ic_name = device_get_nameunit(dev); ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ @@ -1661,7 +1663,7 @@ urtw_set_channel(struct ieee80211com *ic) } static void -urtw_update_mcast(struct ifnet *ifp) +urtw_update_mcast(struct ieee80211com *ic) { /* XXX do nothing? */ @@ -4365,10 +4367,9 @@ urtw_compute_txtime(uint16_t framelen, uint16_t rate, * slot time based on the current setting. */ static void -urtw_updateslot(struct ifnet *ifp) +urtw_updateslot(struct ieee80211com *ic) { - struct urtw_softc *sc = ifp->if_softc; - struct ieee80211com *ic = ifp->if_l2com; + struct urtw_softc *sc = ic->ic_softc; ieee80211_runtask(ic, &sc->sc_updateslot_task); } diff --git a/sys/dev/usb/wlan/if_urtwn.c b/sys/dev/usb/wlan/if_urtwn.c index 72004d9f50de..6b712b3dbcb6 100644 --- a/sys/dev/usb/wlan/if_urtwn.c +++ b/sys/dev/usb/wlan/if_urtwn.c @@ -266,7 +266,7 @@ static void urtwn_set_channel(struct ieee80211com *); static void urtwn_set_chan(struct urtwn_softc *, struct ieee80211_channel *, struct ieee80211_channel *); -static void urtwn_update_mcast(struct ifnet *); +static void urtwn_update_mcast(struct ieee80211com *); static void urtwn_iq_calib(struct urtwn_softc *); static void urtwn_lc_calib(struct urtwn_softc *); static void urtwn_init(void *); @@ -442,6 +442,8 @@ urtwn_attach(device_t self) IFQ_SET_READY(&ifp->if_snd); ic->ic_ifp = ifp; + ic->ic_softc = sc; + ic->ic_name = device_get_nameunit(self); ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ @@ -1195,7 +1197,7 @@ urtwn_efuse_read(struct urtwn_softc *sc) uint8_t *rom = (uint8_t *)&sc->rom; uint16_t addr = 0; uint32_t reg; - uint8_t off, msk, vol; + uint8_t off, msk; int i; urtwn_efuse_switch_power(sc); @@ -1228,18 +1230,15 @@ urtwn_efuse_read(struct urtwn_softc *sc) printf("\n"); } #endif - /* Disable LDO 2.5V. */ - vol = urtwn_read_1(sc, R92C_EFUSE_TEST + 3); - urtwn_write_1(sc, R92C_EFUSE_TEST + 3, vol & ~(0x80)); - + urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_OFF); } + static void urtwn_efuse_switch_power(struct urtwn_softc *sc) { uint32_t reg; - if (sc->chip & URTWN_CHIP_88E) - urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_ON); + urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_ON); reg = urtwn_read_2(sc, R92C_SYS_ISO_CTRL); if (!(reg & R92C_SYS_ISO_CTRL_PWC_EV12V)) { @@ -1257,16 +1256,6 @@ urtwn_efuse_switch_power(struct urtwn_softc *sc) urtwn_write_2(sc, R92C_SYS_CLKR, reg | R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M); } - - if (!(sc->chip & URTWN_CHIP_88E)) { - uint8_t vol; - - /* Enable LDO 2.5V. */ - vol = urtwn_read_1(sc, R92C_EFUSE_TEST + 3); - vol &= 0x0f; - vol |= 0x30; - urtwn_write_1(sc, R92C_EFUSE_TEST + 3, (vol | 0x80)); - } } static int @@ -1905,10 +1894,7 @@ urtwn_tx_start(struct urtwn_softc *sc, struct ieee80211_node *ni, txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, 8)); txd->txdw5 |= htole32(0x0001ff00); /* Send data at OFDM54. */ - if (sc->chip & URTWN_CHIP_88E) - txd->txdw5 |= htole32(0x13 & 0x3f); - else - txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, 11)); + txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, 11)); } else { txd->txdw1 |= htole32( SM(R92C_TXDW1_MACID, 0) | @@ -3161,7 +3147,7 @@ urtwn_set_channel(struct ieee80211com *ic) } static void -urtwn_update_mcast(struct ifnet *ifp) +urtwn_update_mcast(struct ieee80211com *ic) { /* XXX do nothing? */ } @@ -3364,6 +3350,7 @@ urtwn_init_locked(void *arg) urtwn_rxfilter_init(sc); + /* Set response rate. */ reg = urtwn_read_4(sc, R92C_RRSR); reg = RW(reg, R92C_RRSR_RATE_BITMAP, R92C_RRSR_RATE_CCK_ONLY_1M); urtwn_write_4(sc, R92C_RRSR, reg); diff --git a/sys/dev/usb/wlan/if_urtwnreg.h b/sys/dev/usb/wlan/if_urtwnreg.h index 4eef0293380c..2bbec7a10647 100644 --- a/sys/dev/usb/wlan/if_urtwnreg.h +++ b/sys/dev/usb/wlan/if_urtwnreg.h @@ -177,13 +177,13 @@ #define R92C_RD_NAV_NXT 0x544 #define R92C_NAV_PROT_LEN 0x546 #define R92C_BCN_CTRL 0x550 -#define R92C_USTIME_TSF 0x551 #define R92C_MBID_NUM 0x552 #define R92C_DUAL_TSF_RST 0x553 #define R92C_BCN_INTERVAL 0x554 #define R92C_DRVERLYINT 0x558 #define R92C_BCNDMATIM 0x559 #define R92C_ATIMWND 0x55a +#define R92C_USTIME_TSF 0x55c #define R92C_BCN_MAX_ERR 0x55d #define R92C_RXTSF_OFFSET_CCK 0x55e #define R92C_RXTSF_OFFSET_OFDM 0x55f diff --git a/sys/dev/usb/wlan/if_zyd.c b/sys/dev/usb/wlan/if_zyd.c index ca1fb06edb8a..8f9035eaeb0e 100644 --- a/sys/dev/usb/wlan/if_zyd.c +++ b/sys/dev/usb/wlan/if_zyd.c @@ -147,7 +147,7 @@ static int zyd_set_bssid(struct zyd_softc *, const uint8_t *); static int zyd_switch_radio(struct zyd_softc *, int); static int zyd_set_led(struct zyd_softc *, int, int); static void zyd_set_multi(struct zyd_softc *); -static void zyd_update_mcast(struct ifnet *); +static void zyd_update_mcast(struct ieee80211com *); static int zyd_set_rxfilter(struct zyd_softc *); static void zyd_set_chan(struct zyd_softc *, struct ieee80211_channel *); static int zyd_set_beacon_interval(struct zyd_softc *, int); @@ -388,6 +388,8 @@ zyd_attach(device_t dev) ic = ifp->if_l2com; ic->ic_ifp = ifp; + ic->ic_softc = sc; + ic->ic_name = device_get_nameunit(dev); ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ ic->ic_opmode = IEEE80211_M_STA; @@ -2044,11 +2046,11 @@ zyd_set_multi(struct zyd_softc *sc) } static void -zyd_update_mcast(struct ifnet *ifp) +zyd_update_mcast(struct ieee80211com *ic) { - struct zyd_softc *sc = ifp->if_softc; + struct zyd_softc *sc = ic->ic_softc; - if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) + if ((ic->ic_ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) return; ZYD_LOCK(sc); diff --git a/sys/dev/virtio/random/virtio_random.c b/sys/dev/virtio/random/virtio_random.c index bd1f0dfce725..caa4288e84c0 100644 --- a/sys/dev/virtio/random/virtio_random.c +++ b/sys/dev/virtio/random/virtio_random.c @@ -129,7 +129,7 @@ vtrnd_attach(device_t dev) sc = device_get_softc(dev); sc->vtrnd_dev = dev; - callout_init(&sc->vtrnd_callout, CALLOUT_MPSAFE); + callout_init(&sc->vtrnd_callout, 1); virtio_set_feature_desc(dev, vtrnd_feature_desc); vtrnd_negotiate_features(sc); diff --git a/sys/dev/vt/vt.h b/sys/dev/vt/vt.h index 85c034524c40..bdfcf46808cf 100644 --- a/sys/dev/vt/vt.h +++ b/sys/dev/vt/vt.h @@ -83,9 +83,8 @@ #define ISSIGVALID(sig) ((sig) > 0 && (sig) < NSIG) #define VT_SYSCTL_INT(_name, _default, _descr) \ -static int vt_##_name = _default; \ -SYSCTL_INT(_kern_vt, OID_AUTO, _name, CTLFLAG_RWTUN, &vt_##_name, _default,\ - _descr); +static int vt_##_name = (_default); \ +SYSCTL_INT(_kern_vt, OID_AUTO, _name, CTLFLAG_RWTUN, &vt_##_name, 0, _descr) struct vt_driver; diff --git a/sys/dev/vt/vt_core.c b/sys/dev/vt/vt_core.c index a637055e3a61..ecd5267ee6e3 100644 --- a/sys/dev/vt/vt_core.c +++ b/sys/dev/vt/vt_core.c @@ -451,12 +451,35 @@ vt_proc_window_switch(struct vt_window *vw) struct vt_device *vd; int ret; + /* Prevent switching to NULL */ + if (vw == NULL) { + DPRINTF(30, "%s: Cannot switch: vw is NULL.", __func__); + return (EINVAL); + } vd = vw->vw_device; curvw = vd->vd_curwindow; + /* Check if virtual terminal is locked */ if (curvw->vw_flags & VWF_VTYLOCK) return (EBUSY); + /* Check if switch already in progress */ + if (curvw->vw_flags & VWF_SWWAIT_REL) { + /* Check if switching to same window */ + if (curvw->vw_switch_to == vw) { + DPRINTF(30, "%s: Switch in progress to same vw.", __func__); + return (0); /* success */ + } + DPRINTF(30, "%s: Switch in progress to different vw.", __func__); + return (EBUSY); + } + + /* Avoid switching to already selected window */ + if (vw == curvw) { + DPRINTF(30, "%s: Cannot switch: vw == curvw.", __func__); + return (0); /* success */ + } + /* Ask current process permission to switch away. */ if (curvw->vw_smode.mode == VT_PROCESS) { DPRINTF(30, "%s: VT_PROCESS ", __func__); @@ -664,8 +687,7 @@ vt_scrollmode_kbdevent(struct vt_window *vw, int c, int console) if (console == 0) { if (c >= F_SCR && c <= MIN(L_SCR, F_SCR + VT_MAXWINDOWS - 1)) { vw = vd->vd_windows[c - F_SCR]; - if (vw != NULL) - vt_proc_window_switch(vw); + vt_proc_window_switch(vw); return; } VT_LOCK(vd); @@ -750,8 +772,7 @@ vt_processkey(keyboard_t *kbd, struct vt_device *vd, int c) if (c >= F_SCR && c <= MIN(L_SCR, F_SCR + VT_MAXWINDOWS - 1)) { vw = vd->vd_windows[c - F_SCR]; - if (vw != NULL) - vt_proc_window_switch(vw); + vt_proc_window_switch(vw); return (0); } @@ -760,15 +781,13 @@ vt_processkey(keyboard_t *kbd, struct vt_device *vd, int c) /* Switch to next VT. */ c = (vw->vw_number + 1) % VT_MAXWINDOWS; vw = vd->vd_windows[c]; - if (vw != NULL) - vt_proc_window_switch(vw); + vt_proc_window_switch(vw); return (0); case PREV: /* Switch to previous VT. */ - c = (vw->vw_number - 1) % VT_MAXWINDOWS; + c = (vw->vw_number + VT_MAXWINDOWS - 1) % VT_MAXWINDOWS; vw = vd->vd_windows[c]; - if (vw != NULL) - vt_proc_window_switch(vw); + vt_proc_window_switch(vw); return (0); case SLK: { vt_save_kbd_state(vw, kbd); @@ -2774,8 +2793,7 @@ vt_resume(struct vt_device *vd) if (vt_suspendswitch == 0) return; - /* Switch back to saved window */ - if (vd->vd_savedwindow != NULL) - vt_proc_window_switch(vd->vd_savedwindow); + /* Switch back to saved window, if any */ + vt_proc_window_switch(vd->vd_savedwindow); vd->vd_savedwindow = NULL; } diff --git a/sys/dev/watchdog/watchdog.c b/sys/dev/watchdog/watchdog.c index 5c9c6a114071..9d8732770f00 100644 --- a/sys/dev/watchdog/watchdog.c +++ b/sys/dev/watchdog/watchdog.c @@ -389,8 +389,8 @@ watchdog_modevent(module_t mod __unused, int type, void *data __unused) { switch(type) { case MOD_LOAD: - callout_init(&wd_pretimeo_handle, true); - callout_init(&wd_softtimeo_handle, true); + callout_init(&wd_pretimeo_handle, 1); + callout_init(&wd_softtimeo_handle, 1); wd_dev = make_dev(&wd_cdevsw, 0, UID_ROOT, GID_WHEEL, 0600, _PATH_WATCHDOG); return 0; diff --git a/sys/dev/wi/if_wi.c b/sys/dev/wi/if_wi.c index 68018239d736..b316d46dae74 100644 --- a/sys/dev/wi/if_wi.c +++ b/sys/dev/wi/if_wi.c @@ -127,7 +127,8 @@ static int wi_newstate_sta(struct ieee80211vap *, enum ieee80211_state, int); static int wi_newstate_hostap(struct ieee80211vap *, enum ieee80211_state, int); static void wi_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m, - int subtype, int rssi, int nf); + int subtype, const struct ieee80211_rx_stats *rxs, + int rssi, int nf); static int wi_reset(struct wi_softc *); static void wi_watchdog(void *); static int wi_ioctl(struct ifnet *, u_long, caddr_t); @@ -143,8 +144,8 @@ static void wi_info_intr(struct wi_softc *); static int wi_write_txrate(struct wi_softc *, struct ieee80211vap *); static int wi_write_wep(struct wi_softc *, struct ieee80211vap *); static int wi_write_multi(struct wi_softc *); -static void wi_update_mcast(struct ifnet *); -static void wi_update_promisc(struct ifnet *); +static void wi_update_mcast(struct ieee80211com *); +static void wi_update_promisc(struct ieee80211com *); static int wi_alloc_fid(struct wi_softc *, int, int *); static void wi_read_nicid(struct wi_softc *); static int wi_write_ssid(struct wi_softc *, int, u_int8_t *, int); @@ -344,6 +345,8 @@ wi_attach(device_t dev) IFQ_SET_READY(&ifp->if_snd); ic->ic_ifp = ifp; + ic->ic_softc = sc; + ic->ic_name = device_get_nameunit(dev); ic->ic_phytype = IEEE80211_T_DS; ic->ic_opmode = IEEE80211_M_STA; ic->ic_caps = IEEE80211_C_STA @@ -803,7 +806,7 @@ wi_scan_end(struct ieee80211com *ic) static void wi_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m, - int subtype, int rssi, int nf) + int subtype, const struct ieee80211_rx_stats *rxs, int rssi, int nf) { struct ieee80211vap *vap = ni->ni_vap; @@ -814,7 +817,7 @@ wi_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m, /* NB: filter frames that trigger state changes */ return; } - WI_VAP(vap)->wv_recv_mgmt(ni, m, subtype, rssi, nf); + WI_VAP(vap)->wv_recv_mgmt(ni, m, subtype, rxs, rssi, nf); } static int @@ -1620,22 +1623,22 @@ wi_write_multi(struct wi_softc *sc) } static void -wi_update_mcast(struct ifnet *ifp) +wi_update_mcast(struct ieee80211com *ic) { - wi_write_multi(ifp->if_softc); + + wi_write_multi(ic->ic_softc); } static void -wi_update_promisc(struct ifnet *ifp) +wi_update_promisc(struct ieee80211com *ic) { - struct wi_softc *sc = ifp->if_softc; - struct ieee80211com *ic = ifp->if_l2com; + struct wi_softc *sc = ic->ic_softc; WI_LOCK(sc); /* XXX handle WEP special case handling? */ wi_write_val(sc, WI_RID_PROMISC, (ic->ic_opmode == IEEE80211_M_MONITOR || - (ifp->if_flags & IFF_PROMISC))); + (ic->ic_ifp->if_flags & IFF_PROMISC))); WI_UNLOCK(sc); } diff --git a/sys/dev/wi/if_wivar.h b/sys/dev/wi/if_wivar.h index 99b866daf10f..f163744ef834 100644 --- a/sys/dev/wi/if_wivar.h +++ b/sys/dev/wi/if_wivar.h @@ -61,7 +61,7 @@ struct wi_vap { struct ieee80211_beacon_offsets wv_bo; void (*wv_recv_mgmt)(struct ieee80211_node *, struct mbuf *, - int, int, int); + int, const struct ieee80211_rx_stats *rxs, int, int); int (*wv_newstate)(struct ieee80211vap *, enum ieee80211_state, int); }; diff --git a/sys/dev/wpi/if_wpi.c b/sys/dev/wpi/if_wpi.c index 7b438c7024b9..34406059b437 100644 --- a/sys/dev/wpi/if_wpi.c +++ b/sys/dev/wpi/if_wpi.c @@ -177,8 +177,9 @@ static int wpi_add_node_entry_adhoc(struct wpi_softc *); static struct ieee80211_node *wpi_node_alloc(struct ieee80211vap *, const uint8_t mac[IEEE80211_ADDR_LEN]); static void wpi_node_free(struct ieee80211_node *); -static void wpi_recv_mgmt(struct ieee80211_node *, struct mbuf *, int, int, - int); +static void wpi_recv_mgmt(struct ieee80211_node *, struct mbuf *, int, + const struct ieee80211_rx_stats *, + int, int); static void wpi_restore_node(void *, struct ieee80211_node *); static void wpi_restore_node_table(struct wpi_softc *, struct wpi_vap *); static int wpi_newstate(struct ieee80211vap *, enum ieee80211_state, int); @@ -218,8 +219,8 @@ static int wpi_add_ibss_node(struct wpi_softc *, struct ieee80211_node *); static void wpi_del_node(struct wpi_softc *, struct ieee80211_node *); static int wpi_updateedca(struct ieee80211com *); static void wpi_set_promisc(struct wpi_softc *); -static void wpi_update_promisc(struct ifnet *); -static void wpi_update_mcast(struct ifnet *); +static void wpi_update_promisc(struct ieee80211com *); +static void wpi_update_mcast(struct ieee80211com *); static void wpi_set_led(struct wpi_softc *, uint8_t, uint8_t, uint8_t); static int wpi_set_timing(struct wpi_softc *, struct ieee80211_node *); static void wpi_power_calibration(struct wpi_softc *); @@ -452,6 +453,8 @@ wpi_attach(device_t dev) ic = ifp->if_l2com; ic->ic_ifp = ifp; + ic->ic_softc = sc; + ic->ic_name = device_get_nameunit(dev); ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ @@ -1692,15 +1695,16 @@ wpi_check_bss_filter(struct wpi_softc *sc) } static void -wpi_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m, int subtype, int rssi, - int nf) +wpi_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m, int subtype, + const struct ieee80211_rx_stats *rxs, + int rssi, int nf) { struct ieee80211vap *vap = ni->ni_vap; struct wpi_softc *sc = vap->iv_ic->ic_ifp->if_softc; struct wpi_vap *wvp = WPI_VAP(vap); uint64_t ni_tstamp, rx_tstamp; - wvp->wv_recv_mgmt(ni, m, subtype, rssi, nf); + wvp->wv_recv_mgmt(ni, m, subtype, rxs, rssi, nf); if (vap->iv_opmode == IEEE80211_M_IBSS && vap->iv_state == IEEE80211_S_RUN && @@ -3538,9 +3542,9 @@ wpi_set_promisc(struct wpi_softc *sc) } static void -wpi_update_promisc(struct ifnet *ifp) +wpi_update_promisc(struct ieee80211com *ic) { - struct wpi_softc *sc = ifp->if_softc; + struct wpi_softc *sc = ic->ic_softc; WPI_RXON_LOCK(sc); wpi_set_promisc(sc); @@ -3553,7 +3557,7 @@ wpi_update_promisc(struct ifnet *ifp) } static void -wpi_update_mcast(struct ifnet *ifp) +wpi_update_mcast(struct ieee80211com *ic) { /* Ignore */ } diff --git a/sys/dev/wpi/if_wpivar.h b/sys/dev/wpi/if_wpivar.h index 7a65b721f6c4..b7835281fb39 100644 --- a/sys/dev/wpi/if_wpivar.h +++ b/sys/dev/wpi/if_wpivar.h @@ -133,7 +133,9 @@ struct wpi_vap { int (*wv_newstate)(struct ieee80211vap *, enum ieee80211_state, int); void (*wv_recv_mgmt)(struct ieee80211_node *, - struct mbuf *, int, int, int); + struct mbuf *, int, + const struct ieee80211_rx_stats *, + int, int); }; #define WPI_VAP(vap) ((struct wpi_vap *)(vap)) diff --git a/sys/dev/wtap/if_wtap.c b/sys/dev/wtap/if_wtap.c index 3c6408543364..7e2eca783e97 100644 --- a/sys/dev/wtap/if_wtap.c +++ b/sys/dev/wtap/if_wtap.c @@ -702,14 +702,14 @@ wtap_wme_update(struct ieee80211com *ic) } static void -wtap_update_mcast(struct ifnet *ifp) +wtap_update_mcast(struct ieee80211com *ic) { DWTAP_PRINTF("%s\n", __func__); } static void -wtap_update_promisc(struct ifnet *ifp) +wtap_update_promisc(struct ieee80211com *ic) { DWTAP_PRINTF("%s\n", __func__); @@ -797,6 +797,8 @@ wtap_attach(struct wtap_softc *sc, const uint8_t *macaddr) IFQ_SET_READY(&ifp->if_snd); ic->ic_ifp = ifp; + ic->ic_softc = sc; + ic->ic_name = sc->name; ic->ic_phytype = IEEE80211_T_DS; ic->ic_opmode = IEEE80211_M_MBSS; ic->ic_caps = IEEE80211_C_MBSS; @@ -827,9 +829,6 @@ wtap_attach(struct wtap_softc *sc, const uint8_t *macaddr) /* override default methods */ ic->ic_newassoc = wtap_newassoc; -#if 0 - ic->ic_updateslot = myath_updateslot; -#endif ic->ic_wme.wme_update = wtap_wme_update; ic->ic_vap_create = wtap_vap_create; ic->ic_vap_delete = wtap_vap_delete; diff --git a/sys/dev/wtap/if_wtapvar.h b/sys/dev/wtap/if_wtapvar.h index bb165b4b203d..3bdc8980b387 100644 --- a/sys/dev/wtap/if_wtapvar.h +++ b/sys/dev/wtap/if_wtapvar.h @@ -130,6 +130,7 @@ struct wtap_vap { struct taskqueue; struct wtap_softc { + char name[7]; /* wtapXX\0 */ int32_t id; int32_t up; struct ifnet *sc_ifp; /* interface common */ diff --git a/sys/dev/wtap/wtap_hal/hal.c b/sys/dev/wtap/wtap_hal/hal.c index 9ec1ca89df7d..6014e3963a6d 100644 --- a/sys/dev/wtap/wtap_hal/hal.c +++ b/sys/dev/wtap/wtap_hal/hal.c @@ -182,6 +182,8 @@ new_wtap(struct wtap_hal *hal, int32_t id) bzero(hal->hal_devs[id], sizeof(struct wtap_softc)); hal->hal_devs[id]->sc_md = hal->hal_md; hal->hal_devs[id]->id = id; + snprintf(hal->hal_devs[id]->name, sizeof(hal->hal_devs[id]->name), + "wlan%d", id); mtx_init(&hal->hal_devs[id]->sc_mtx, "wtap_softc mtx", NULL, MTX_DEF | MTX_RECURSE); diff --git a/sys/dev/xen/blkback/blkback.c b/sys/dev/xen/blkback/blkback.c index b647fec8b5c2..d352242d33ed 100644 --- a/sys/dev/xen/blkback/blkback.c +++ b/sys/dev/xen/blkback/blkback.c @@ -2817,9 +2817,8 @@ xbb_free_communication_mem(struct xbb_softc *xbb) { if (xbb->kva != 0) { if (xbb->pseudo_phys_res != NULL) { - bus_release_resource(xbb->dev, SYS_RES_MEMORY, - xbb->pseudo_phys_res_id, - xbb->pseudo_phys_res); + xenmem_free(xbb->dev, xbb->pseudo_phys_res_id, + xbb->pseudo_phys_res); xbb->pseudo_phys_res = NULL; } } @@ -3056,10 +3055,8 @@ xbb_alloc_communication_mem(struct xbb_softc *xbb) * via grant table operations. */ xbb->pseudo_phys_res_id = 0; - xbb->pseudo_phys_res = bus_alloc_resource(xbb->dev, SYS_RES_MEMORY, - &xbb->pseudo_phys_res_id, - 0, ~0, xbb->kva_size, - RF_ACTIVE); + xbb->pseudo_phys_res = xenmem_alloc(xbb->dev, &xbb->pseudo_phys_res_id, + xbb->kva_size); if (xbb->pseudo_phys_res == NULL) { xbb->kva = 0; return (ENOMEM); diff --git a/sys/dev/xen/grant_table/grant_table.c b/sys/dev/xen/grant_table/grant_table.c index ad65fe0113f0..728d64df70b1 100644 --- a/sys/dev/xen/grant_table/grant_table.c +++ b/sys/dev/xen/grant_table/grant_table.c @@ -559,9 +559,8 @@ gnttab_resume(device_t dev) KASSERT(dev != NULL, ("No resume frames and no device provided")); - gnttab_pseudo_phys_res = bus_alloc_resource(dev, - SYS_RES_MEMORY, &gnttab_pseudo_phys_res_id, 0, ~0, - PAGE_SIZE * max_nr_gframes, RF_ACTIVE); + gnttab_pseudo_phys_res = xenmem_alloc(dev, + &gnttab_pseudo_phys_res_id, PAGE_SIZE * max_nr_gframes); if (gnttab_pseudo_phys_res == NULL) panic("Unable to reserve physical memory for gnttab"); resume_frames = rman_get_start(gnttab_pseudo_phys_res); diff --git a/sys/dev/xen/netback/netback.c b/sys/dev/xen/netback/netback.c index b5c1c1362821..2233084edb42 100644 --- a/sys/dev/xen/netback/netback.c +++ b/sys/dev/xen/netback/netback.c @@ -625,8 +625,7 @@ xnb_free_communication_mem(struct xnb_softc *xnb) { if (xnb->kva != 0) { if (xnb->pseudo_phys_res != NULL) { - bus_release_resource(xnb->dev, SYS_RES_MEMORY, - xnb->pseudo_phys_res_id, + xenmem_free(xnb->dev, xnb->pseudo_phys_res_id, xnb->pseudo_phys_res); xnb->pseudo_phys_res = NULL; } @@ -819,10 +818,8 @@ xnb_alloc_communication_mem(struct xnb_softc *xnb) * into this space. */ xnb->pseudo_phys_res_id = 0; - xnb->pseudo_phys_res = bus_alloc_resource(xnb->dev, SYS_RES_MEMORY, - &xnb->pseudo_phys_res_id, - 0, ~0, xnb->kva_size, - RF_ACTIVE); + xnb->pseudo_phys_res = xenmem_alloc(xnb->dev, &xnb->pseudo_phys_res_id, + xnb->kva_size); if (xnb->pseudo_phys_res == NULL) { xnb->kva = 0; return (ENOMEM); diff --git a/sys/dev/xen/netfront/netfront.c b/sys/dev/xen/netfront/netfront.c index 3c1f9527d65c..317a339a4a33 100644 --- a/sys/dev/xen/netfront/netfront.c +++ b/sys/dev/xen/netfront/netfront.c @@ -682,7 +682,6 @@ netfront_backend_changed(device_t dev, XenbusState newstate) switch (newstate) { case XenbusStateInitialising: case XenbusStateInitialised: - case XenbusStateConnected: case XenbusStateUnknown: case XenbusStateClosed: case XenbusStateReconfigured: @@ -694,13 +693,15 @@ netfront_backend_changed(device_t dev, XenbusState newstate) if (network_connect(sc) != 0) break; xenbus_set_state(dev, XenbusStateConnected); -#ifdef INET - netfront_send_fake_arp(dev, sc); -#endif break; case XenbusStateClosing: xenbus_set_state(dev, XenbusStateClosed); break; + case XenbusStateConnected: +#ifdef INET + netfront_send_fake_arp(dev, sc); +#endif + break; } } @@ -2091,7 +2092,7 @@ create_netdev(device_t dev) ifp->if_hw_tsomaxsegsize = PAGE_SIZE; ether_ifattach(ifp, np->mac); - callout_init(&np->xn_stat_ch, CALLOUT_MPSAFE); + callout_init(&np->xn_stat_ch, 1); netfront_carrier_off(np); return (0); diff --git a/sys/dev/xen/privcmd/privcmd.c b/sys/dev/xen/privcmd/privcmd.c index 761fb037b163..0bf9585751a8 100644 --- a/sys/dev/xen/privcmd/privcmd.c +++ b/sys/dev/xen/privcmd/privcmd.c @@ -141,11 +141,8 @@ privcmd_pg_dtor(void *handle) free(map->errs, M_PRIVCMD); } - vm_phys_fictitious_unreg_range(map->phys_base_addr, - map->phys_base_addr + map->size * PAGE_SIZE); - - error = bus_release_resource(privcmd_dev, SYS_RES_MEMORY, - map->pseudo_phys_res_id, map->pseudo_phys_res); + error = xenmem_free(privcmd_dev, map->pseudo_phys_res_id, + map->pseudo_phys_res); KASSERT(error == 0, ("Unable to release memory resource: %d", error)); free(map, M_PRIVCMD); @@ -196,36 +193,25 @@ privcmd_mmap_single(struct cdev *cdev, vm_ooffset_t *offset, vm_size_t size, vm_object_t *object, int nprot) { struct privcmd_map *map; - int error; map = malloc(sizeof(*map), M_PRIVCMD, M_WAITOK | M_ZERO); map->size = OFF_TO_IDX(size); map->pseudo_phys_res_id = 0; - map->pseudo_phys_res = bus_alloc_resource(privcmd_dev, SYS_RES_MEMORY, - &map->pseudo_phys_res_id, 0, ~0, size, RF_ACTIVE); + map->pseudo_phys_res = xenmem_alloc(privcmd_dev, + &map->pseudo_phys_res_id, size); if (map->pseudo_phys_res == NULL) { free(map, M_PRIVCMD); return (ENOMEM); } map->phys_base_addr = rman_get_start(map->pseudo_phys_res); - - error = vm_phys_fictitious_reg_range(map->phys_base_addr, - map->phys_base_addr + size, VM_MEMATTR_DEFAULT); - if (error) { - bus_release_resource(privcmd_dev, SYS_RES_MEMORY, - map->pseudo_phys_res_id, map->pseudo_phys_res); - free(map, M_PRIVCMD); - return (error); - } - map->mem = cdev_pager_allocate(map, OBJT_MGTDEVICE, &privcmd_pg_ops, size, nprot, *offset, NULL); if (map->mem == NULL) { - bus_release_resource(privcmd_dev, SYS_RES_MEMORY, - map->pseudo_phys_res_id, map->pseudo_phys_res); + xenmem_free(privcmd_dev, map->pseudo_phys_res_id, + map->pseudo_phys_res); free(map, M_PRIVCMD); return (ENOMEM); } diff --git a/sys/fs/nfs/nfs.h b/sys/fs/nfs/nfs.h index 2ee91457b5a1..be60c1ca7753 100644 --- a/sys/fs/nfs/nfs.h +++ b/sys/fs/nfs/nfs.h @@ -138,11 +138,11 @@ /* * This macro defines the high water mark for issuing V4 delegations. - * (It is currently set at a conservative 20% of NFSRV_V4STATELIMIT. This + * (It is currently set at a conservative 20% of nfsrv_v4statelimit. This * may want to increase when clients can make more effective use of * delegations.) */ -#define NFSRV_V4DELEGLIMIT(c) (((c) * 5) > NFSRV_V4STATELIMIT) +#define NFSRV_V4DELEGLIMIT(c) (((c) * 5) > nfsrv_v4statelimit) #define NFS_READDIRBLKSIZ DIRBLKSIZ /* Minimal nm_readdirsize */ diff --git a/sys/fs/nfs/nfs_commonport.c b/sys/fs/nfs/nfs_commonport.c index eea146ac1802..bc5d9de9bd5c 100644 --- a/sys/fs/nfs/nfs_commonport.c +++ b/sys/fs/nfs/nfs_commonport.c @@ -589,7 +589,7 @@ nfscommon_modevent(module_t mod, int type, void *data) mtx_init(&nfs_req_mutex, "nfs_req_mutex", NULL, MTX_DEF); mtx_init(&nfsrv_nfsuserdsock.nr_mtx, "nfsuserd", NULL, MTX_DEF); - callout_init(&newnfsd_callout, CALLOUT_MPSAFE); + callout_init(&newnfsd_callout, 1); newnfs_init(); nfsd_call_nfscommon = nfssvc_nfscommon; loaded = 1; diff --git a/sys/fs/nfs/nfsdport.h b/sys/fs/nfs/nfsdport.h index efa4b12500ca..a20b55469a71 100644 --- a/sys/fs/nfs/nfsdport.h +++ b/sys/fs/nfs/nfsdport.h @@ -88,7 +88,7 @@ struct nfsexstuff { bcmp(&(f1)->fh_fid, &(f2)->fh_fid, sizeof(struct fid)) == 0) #define NFSLOCKHASH(f) \ - (&nfslockhash[nfsrv_hashfh(f) % NFSLOCKHASHSIZE]) + (&nfslockhash[nfsrv_hashfh(f) % nfsrv_lockhashsize]) #define NFSFPVNODE(f) ((struct vnode *)((f)->f_data)) #define NFSFPCRED(f) ((f)->f_cred) diff --git a/sys/fs/nfs/nfsrvstate.h b/sys/fs/nfs/nfsrvstate.h index 59a0542c1c9c..972fffe15eb9 100644 --- a/sys/fs/nfs/nfsrvstate.h +++ b/sys/fs/nfs/nfsrvstate.h @@ -52,9 +52,9 @@ LIST_HEAD(nfsuserhashhead, nfsusrgrp); TAILQ_HEAD(nfsuserlruhead, nfsusrgrp); #define NFSCLIENTHASH(id) \ - (&nfsclienthash[(id).lval[1] % NFSCLIENTHASHSIZE]) + (&nfsclienthash[(id).lval[1] % nfsrv_clienthashsize]) #define NFSSTATEHASH(clp, id) \ - (&((clp)->lc_stateid[(id).other[2] % NFSSTATEHASHSIZE])) + (&((clp)->lc_stateid[(id).other[2] % nfsrv_statehashsize])) #define NFSUSERHASH(id) \ (&nfsuserhash[(id) % NFSUSERHASHSIZE]) #define NFSUSERNAMEHASH(p, l) \ @@ -71,7 +71,7 @@ struct nfssessionhash { struct nfssessionhashhead list; }; #define NFSSESSIONHASH(f) \ - (&nfssessionhash[nfsrv_hashsessionid(f) % NFSSESSIONHASHSIZE]) + (&nfssessionhash[nfsrv_hashsessionid(f) % nfsrv_sessionhashsize]) /* * Client server structure for V4. It is doubly linked into two lists. @@ -81,7 +81,7 @@ struct nfssessionhash { */ struct nfsclient { LIST_ENTRY(nfsclient) lc_hash; /* Clientid hash list */ - struct nfsstatehead lc_stateid[NFSSTATEHASHSIZE]; /* stateid hash */ + struct nfsstatehead *lc_stateid; /* Stateid hash */ struct nfsstatehead lc_open; /* Open owner list */ struct nfsstatehead lc_deleg; /* Delegations */ struct nfsstatehead lc_olddeleg; /* and old delegations */ @@ -97,10 +97,10 @@ struct nfsclient { u_int32_t lc_cbref; /* Cnt of callbacks */ uid_t lc_uid; /* User credential */ gid_t lc_gid; - u_int16_t lc_namelen; + u_int16_t lc_idlen; /* Client ID and len */ + u_int16_t lc_namelen; /* plus GSS principal and len */ u_char *lc_name; struct nfssockreq lc_req; /* Callback info */ - u_short lc_idlen; /* Length of id string */ u_int32_t lc_flags; /* LCL_ flag bits */ u_char lc_verf[NFSX_VERF]; /* client verifier */ u_char lc_id[1]; /* Malloc'd correct size */ diff --git a/sys/fs/nfsclient/nfs_clbio.c b/sys/fs/nfsclient/nfs_clbio.c index ea42537f92f9..e8de4a54c2fe 100644 --- a/sys/fs/nfsclient/nfs_clbio.c +++ b/sys/fs/nfsclient/nfs_clbio.c @@ -864,7 +864,7 @@ ncl_write(struct vop_write_args *ap) struct nfsmount *nmp = VFSTONFS(vp->v_mount); daddr_t lbn; int bcount, noncontig_write, obcount; - int bp_cached, n, on, error = 0, error1; + int bp_cached, n, on, error = 0, error1, wouldcommit; size_t orig_resid, local_resid; off_t orig_size, tmp_off; @@ -908,7 +908,6 @@ ncl_write(struct vop_write_args *ap) if (ioflag & IO_NDELAY) return (EAGAIN); #endif -flush_and_restart: np->n_attrstamp = 0; KDTRACE_NFS_ATTRCACHE_FLUSH_DONE(vp); error = ncl_vinvalbuf(vp, V_SAVE, td, 1); @@ -965,27 +964,14 @@ ncl_write(struct vop_write_args *ap) * IO_UNIT -- we just make all writes atomic anyway, as there's * no point optimizing for something that really won't ever happen. */ + wouldcommit = 0; if (!(ioflag & IO_SYNC)) { int nflag; mtx_lock(&np->n_mtx); nflag = np->n_flag; mtx_unlock(&np->n_mtx); - int needrestart = 0; - if (nmp->nm_wcommitsize < uio->uio_resid) { - /* - * If this request could not possibly be completed - * without exceeding the maximum outstanding write - * commit size, see if we can convert it into a - * synchronous write operation. - */ - if (ioflag & IO_NDELAY) - return (EAGAIN); - ioflag |= IO_SYNC; - if (nflag & NMODIFIED) - needrestart = 1; - } else if (nflag & NMODIFIED) { - int wouldcommit = 0; + if (nflag & NMODIFIED) { BO_LOCK(&vp->v_bufobj); if (vp->v_bufobj.bo_dirty.bv_cnt != 0) { TAILQ_FOREACH(bp, &vp->v_bufobj.bo_dirty.bv_hd, @@ -995,27 +981,22 @@ ncl_write(struct vop_write_args *ap) } } BO_UNLOCK(&vp->v_bufobj); - /* - * Since we're not operating synchronously and - * bypassing the buffer cache, we are in a commit - * and holding all of these buffers whether - * transmitted or not. If not limited, this - * will lead to the buffer cache deadlocking, - * as no one else can flush our uncommitted buffers. - */ - wouldcommit += uio->uio_resid; - /* - * If we would initially exceed the maximum - * outstanding write commit size, flush and restart. - */ - if (wouldcommit > nmp->nm_wcommitsize) - needrestart = 1; } - if (needrestart) - goto flush_and_restart; } do { + if (!(ioflag & IO_SYNC)) { + wouldcommit += biosize; + if (wouldcommit > nmp->nm_wcommitsize) { + np->n_attrstamp = 0; + KDTRACE_NFS_ATTRCACHE_FLUSH_DONE(vp); + error = ncl_vinvalbuf(vp, V_SAVE, td, 1); + if (error) + return (error); + wouldcommit = biosize; + } + } + NFSINCRGLOBAL(newnfsstats.biocache_writes); lbn = uio->uio_offset / biosize; on = uio->uio_offset - (lbn * biosize); diff --git a/sys/fs/nfsclient/nfs_clrpcops.c b/sys/fs/nfsclient/nfs_clrpcops.c index 7968353bde40..55eb983982fe 100644 --- a/sys/fs/nfsclient/nfs_clrpcops.c +++ b/sys/fs/nfsclient/nfs_clrpcops.c @@ -3072,25 +3072,6 @@ nfsrpc_readdir(vnode_t vp, struct uio *uiop, nfsuint64 *cookiep, *eofp = eof; } - /* - * Add extra empty records to any remaining DIRBLKSIZ chunks. - */ - while (uio_uio_resid(uiop) > 0 && ((size_t)(uio_uio_resid(uiop))) != tresid) { - dp = (struct dirent *) CAST_DOWN(caddr_t, uio_iov_base(uiop)); - dp->d_type = DT_UNKNOWN; - dp->d_fileno = 0; - dp->d_namlen = 0; - dp->d_name[0] = '\0'; - tl = (u_int32_t *)&dp->d_name[4]; - *tl++ = cookie.lval[0]; - *tl = cookie.lval[1]; - dp->d_reclen = DIRBLKSIZ; - uio_iov_base_add(uiop, DIRBLKSIZ); - uio_iov_len_add(uiop, -(DIRBLKSIZ)); - uio_uio_resid_add(uiop, -(DIRBLKSIZ)); - uiop->uio_offset += DIRBLKSIZ; - } - nfsmout: if (nd->nd_mrep != NULL) mbuf_freem(nd->nd_mrep); @@ -3565,25 +3546,6 @@ nfsrpc_readdirplus(vnode_t vp, struct uio *uiop, nfsuint64 *cookiep, *eofp = eof; } - /* - * Add extra empty records to any remaining DIRBLKSIZ chunks. - */ - while (uio_uio_resid(uiop) > 0 && uio_uio_resid(uiop) != tresid) { - dp = (struct dirent *)uio_iov_base(uiop); - dp->d_type = DT_UNKNOWN; - dp->d_fileno = 0; - dp->d_namlen = 0; - dp->d_name[0] = '\0'; - tl = (u_int32_t *)&dp->d_name[4]; - *tl++ = cookie.lval[0]; - *tl = cookie.lval[1]; - dp->d_reclen = DIRBLKSIZ; - uio_iov_base_add(uiop, DIRBLKSIZ); - uio_iov_len_add(uiop, -(DIRBLKSIZ)); - uio_uio_resid_add(uiop, -(DIRBLKSIZ)); - uiop->uio_offset += DIRBLKSIZ; - } - nfsmout: if (nd->nd_mrep != NULL) mbuf_freem(nd->nd_mrep); diff --git a/sys/fs/nfsclient/nfs_clvnops.c b/sys/fs/nfsclient/nfs_clvnops.c index 513abf4d70c4..6aee675041fe 100644 --- a/sys/fs/nfsclient/nfs_clvnops.c +++ b/sys/fs/nfsclient/nfs_clvnops.c @@ -2210,7 +2210,7 @@ nfs_readdir(struct vop_readdir_args *ap) struct vnode *vp = ap->a_vp; struct nfsnode *np = VTONFS(vp); struct uio *uio = ap->a_uio; - ssize_t tresid; + ssize_t tresid, left; int error = 0; struct vattr vattr; @@ -2238,6 +2238,17 @@ nfs_readdir(struct vop_readdir_args *ap) } } + /* + * NFS always guarantees that directory entries don't straddle + * DIRBLKSIZ boundaries. As such, we need to limit the size + * to an exact multiple of DIRBLKSIZ, to avoid copying a partial + * directory entry. + */ + left = uio->uio_resid % DIRBLKSIZ; + if (left == uio->uio_resid) + return (EINVAL); + uio->uio_resid -= left; + /* * Call ncl_bioread() to do the real work. */ @@ -2249,6 +2260,9 @@ nfs_readdir(struct vop_readdir_args *ap) if (ap->a_eofflag != NULL) *ap->a_eofflag = 1; } + + /* Add the partial DIRBLKSIZ (left) back in. */ + uio->uio_resid += left; return (error); } diff --git a/sys/fs/nfsserver/nfs_nfsdkrpc.c b/sys/fs/nfsserver/nfs_nfsdkrpc.c index f9b8eb8e92e1..0f60686703f7 100644 --- a/sys/fs/nfsserver/nfs_nfsdkrpc.c +++ b/sys/fs/nfsserver/nfs_nfsdkrpc.c @@ -294,6 +294,8 @@ nfssvc_program(struct svc_req *rqst, SVCXPRT *xprt) svc_freereq(rqst); out: + if (softdep_ast_cleanup != NULL) + softdep_ast_cleanup(); NFSEXITCODE(0); } @@ -464,6 +466,7 @@ int nfsrvd_nfsd(struct thread *td, struct nfsd_nfsd_args *args) { char principal[MAXHOSTNAMELEN + 5]; + struct proc *p; int error = 0; bool_t ret2, ret3, ret4; @@ -481,6 +484,10 @@ nfsrvd_nfsd(struct thread *td, struct nfsd_nfsd_args *args) */ NFSD_LOCK(); if (newnfs_numnfsd == 0) { + p = td->td_proc; + PROC_LOCK(p); + p->p_flag2 |= P2_AST_SU; + PROC_UNLOCK(p); newnfs_numnfsd++; NFSD_UNLOCK(); @@ -512,6 +519,9 @@ nfsrvd_nfsd(struct thread *td, struct nfsd_nfsd_args *args) NFSD_LOCK(); newnfs_numnfsd--; nfsrvd_init(1); + PROC_LOCK(p); + p->p_flag2 &= ~P2_AST_SU; + PROC_UNLOCK(p); } NFSD_UNLOCK(); diff --git a/sys/fs/nfsserver/nfs_nfsdport.c b/sys/fs/nfsserver/nfs_nfsdport.c index 94475d93c66a..85b4466575af 100644 --- a/sys/fs/nfsserver/nfs_nfsdport.c +++ b/sys/fs/nfsserver/nfs_nfsdport.c @@ -58,7 +58,10 @@ extern struct nfsrv_stablefirst nfsrv_stablefirst; extern void (*nfsd_call_servertimer)(void); extern SVCPOOL *nfsrvd_pool; extern struct nfsv4lock nfsd_suspend_lock; -extern struct nfssessionhash nfssessionhash[NFSSESSIONHASHSIZE]; +extern struct nfsclienthashhead *nfsclienthash; +extern struct nfslockhashhead *nfslockhash; +extern struct nfssessionhash *nfssessionhash; +extern int nfsrv_sessionhashsize; struct vfsoptlist nfsv4root_opt, nfsv4root_newopt; NFSDLOCKMUTEX; struct nfsrchash_bucket nfsrchash_table[NFSRVCACHE_HASHSIZE]; @@ -3330,9 +3333,6 @@ nfsd_modevent(module_t mod, int type, void *data) mtx_init(&nfsrc_udpmtx, "nfsuc", NULL, MTX_DEF); mtx_init(&nfs_v4root_mutex, "nfs4rt", NULL, MTX_DEF); mtx_init(&nfsv4root_mnt.mnt_mtx, "nfs4mnt", NULL, MTX_DEF); - for (i = 0; i < NFSSESSIONHASHSIZE; i++) - mtx_init(&nfssessionhash[i].mtx, "nfssm", - NULL, MTX_DEF); lockinit(&nfsv4root_mnt.mnt_explock, PVFS, "explock", 0, 0); nfsrvd_initcache(); nfsd_init(); @@ -3380,9 +3380,12 @@ nfsd_modevent(module_t mod, int type, void *data) mtx_destroy(&nfsrc_udpmtx); mtx_destroy(&nfs_v4root_mutex); mtx_destroy(&nfsv4root_mnt.mnt_mtx); - for (i = 0; i < NFSSESSIONHASHSIZE; i++) + for (i = 0; i < nfsrv_sessionhashsize; i++) mtx_destroy(&nfssessionhash[i].mtx); lockdestroy(&nfsv4root_mnt.mnt_explock); + free(nfsclienthash, M_NFSDCLIENT); + free(nfslockhash, M_NFSDLOCKFILE); + free(nfssessionhash, M_NFSDSESSION); loaded = 0; break; default: diff --git a/sys/fs/nfsserver/nfs_nfsdserv.c b/sys/fs/nfsserver/nfs_nfsdserv.c index bd0c2dad73ad..bd054c47718d 100644 --- a/sys/fs/nfsserver/nfs_nfsdserv.c +++ b/sys/fs/nfsserver/nfs_nfsdserv.c @@ -53,6 +53,7 @@ extern enum vtype nv34tov_type[8]; extern struct timeval nfsboottime; extern int nfs_rootfhset; extern int nfsrv_enable_crossmntpt; +extern int nfsrv_statehashsize; #endif /* !APPLEKEXT */ static int nfs_async = 0; @@ -3468,9 +3469,10 @@ nfsrvd_setclientid(struct nfsrv_descript *nd, __unused int isdgram, idlen = i; if (nd->nd_flag & ND_GSS) i += nd->nd_princlen; - MALLOC(clp, struct nfsclient *, sizeof (struct nfsclient) + i, - M_NFSDCLIENT, M_WAITOK); - NFSBZERO((caddr_t)clp, sizeof (struct nfsclient) + i); + clp = malloc(sizeof(struct nfsclient) + i, M_NFSDCLIENT, M_WAITOK | + M_ZERO); + clp->lc_stateid = malloc(sizeof(struct nfsstatehead) * + nfsrv_statehashsize, M_NFSDCLIENT, M_WAITOK); NFSINITSOCKMUTEX(&clp->lc_req.nr_mtx); NFSSOCKADDRALLOC(clp->lc_req.nr_nam); NFSSOCKADDRSIZE(clp->lc_req.nr_nam, sizeof (struct sockaddr_in)); @@ -3530,7 +3532,8 @@ nfsrvd_setclientid(struct nfsrv_descript *nd, __unused int isdgram, if (clp) { NFSSOCKADDRFREE(clp->lc_req.nr_nam); NFSFREEMUTEX(&clp->lc_req.nr_mtx); - free((caddr_t)clp, M_NFSDCLIENT); + free(clp->lc_stateid, M_NFSDCLIENT); + free(clp, M_NFSDCLIENT); } if (!nd->nd_repstat) { NFSM_BUILD(tl, u_int32_t *, 2 * NFSX_HYPER); @@ -3547,7 +3550,8 @@ nfsrvd_setclientid(struct nfsrv_descript *nd, __unused int isdgram, if (clp) { NFSSOCKADDRFREE(clp->lc_req.nr_nam); NFSFREEMUTEX(&clp->lc_req.nr_mtx); - free((caddr_t)clp, M_NFSDCLIENT); + free(clp->lc_stateid, M_NFSDCLIENT); + free(clp, M_NFSDCLIENT); } NFSEXITCODE2(error, nd); return (error); @@ -3738,8 +3742,10 @@ nfsrvd_exchangeid(struct nfsrv_descript *nd, __unused int isdgram, idlen = i; if (nd->nd_flag & ND_GSS) i += nd->nd_princlen; - clp = (struct nfsclient *)malloc(sizeof(struct nfsclient) + i, - M_NFSDCLIENT, M_WAITOK | M_ZERO); + clp = malloc(sizeof(struct nfsclient) + i, M_NFSDCLIENT, M_WAITOK | + M_ZERO); + clp->lc_stateid = malloc(sizeof(struct nfsstatehead) * + nfsrv_statehashsize, M_NFSDCLIENT, M_WAITOK); NFSINITSOCKMUTEX(&clp->lc_req.nr_mtx); NFSSOCKADDRALLOC(clp->lc_req.nr_nam); NFSSOCKADDRSIZE(clp->lc_req.nr_nam, sizeof (struct sockaddr_in)); @@ -3796,6 +3802,7 @@ nfsrvd_exchangeid(struct nfsrv_descript *nd, __unused int isdgram, if (clp != NULL) { NFSSOCKADDRFREE(clp->lc_req.nr_nam); NFSFREEMUTEX(&clp->lc_req.nr_mtx); + free(clp->lc_stateid, M_NFSDCLIENT); free(clp, M_NFSDCLIENT); } if (nd->nd_repstat == 0) { @@ -3828,6 +3835,7 @@ nfsrvd_exchangeid(struct nfsrv_descript *nd, __unused int isdgram, if (clp != NULL) { NFSSOCKADDRFREE(clp->lc_req.nr_nam); NFSFREEMUTEX(&clp->lc_req.nr_mtx); + free(clp->lc_stateid, M_NFSDCLIENT); free(clp, M_NFSDCLIENT); } NFSEXITCODE2(error, nd); diff --git a/sys/fs/nfsserver/nfs_nfsdsocket.c b/sys/fs/nfsserver/nfs_nfsdsocket.c index b15dfec4b648..9c00a0c09b31 100644 --- a/sys/fs/nfsserver/nfs_nfsdsocket.c +++ b/sys/fs/nfsserver/nfs_nfsdsocket.c @@ -46,7 +46,8 @@ extern struct nfsrvfh nfs_pubfh, nfs_rootfh; extern int nfs_pubfhset, nfs_rootfhset; extern struct nfsv4lock nfsv4rootfs_lock; extern struct nfsrv_stablefirst nfsrv_stablefirst; -extern struct nfsclienthashhead nfsclienthash[NFSCLIENTHASHSIZE]; +extern struct nfsclienthashhead *nfsclienthash; +extern int nfsrv_clienthashsize; extern int nfsrc_floodlevel, nfsrc_tcpsavedreplies; extern int nfsd_debuglevel; NFSV4ROOTLOCKMUTEX; @@ -610,7 +611,7 @@ nfsrvd_compound(struct nfsrv_descript *nd, int isdgram, u_char *tag, */ if (nfsrv_stablefirst.nsf_flags & NFSNSF_EXPIREDCLIENT) { nfsrv_stablefirst.nsf_flags &= ~NFSNSF_EXPIREDCLIENT; - for (i = 0; i < NFSCLIENTHASHSIZE; i++) { + for (i = 0; i < nfsrv_clienthashsize; i++) { LIST_FOREACH_SAFE(clp, &nfsclienthash[i], lc_hash, nclp) { if (clp->lc_flags & LCL_EXPIREIT) { diff --git a/sys/fs/nfsserver/nfs_nfsdstate.c b/sys/fs/nfsserver/nfs_nfsdstate.c index 5e9beebf0875..15f5243717cf 100644 --- a/sys/fs/nfsserver/nfs_nfsdstate.c +++ b/sys/fs/nfsserver/nfs_nfsdstate.c @@ -44,14 +44,38 @@ extern u_int32_t newnfs_true, newnfs_false; NFSV4ROOTLOCKMUTEX; NFSSTATESPINLOCK; +SYSCTL_DECL(_vfs_nfsd); +int nfsrv_statehashsize = NFSSTATEHASHSIZE; +SYSCTL_INT(_vfs_nfsd, OID_AUTO, statehashsize, CTLFLAG_RDTUN, + &nfsrv_statehashsize, 0, + "Size of state hash table set via loader.conf"); + +int nfsrv_clienthashsize = NFSCLIENTHASHSIZE; +SYSCTL_INT(_vfs_nfsd, OID_AUTO, clienthashsize, CTLFLAG_RDTUN, + &nfsrv_clienthashsize, 0, + "Size of client hash table set via loader.conf"); + +int nfsrv_lockhashsize = NFSLOCKHASHSIZE; +SYSCTL_INT(_vfs_nfsd, OID_AUTO, fhhashsize, CTLFLAG_RDTUN, + &nfsrv_lockhashsize, 0, + "Size of file handle hash table set via loader.conf"); + +int nfsrv_sessionhashsize = NFSSESSIONHASHSIZE; +SYSCTL_INT(_vfs_nfsd, OID_AUTO, sessionhashsize, CTLFLAG_RDTUN, + &nfsrv_sessionhashsize, 0, + "Size of session hash table set via loader.conf"); + +static int nfsrv_v4statelimit = NFSRV_V4STATELIMIT; +SYSCTL_INT(_vfs_nfsd, OID_AUTO, v4statelimit, CTLFLAG_RWTUN, + &nfsrv_v4statelimit, 0, + "High water limit for NFSv4 opens+locks+delegations"); + /* * Hash lists for nfs V4. - * (Some would put them in the .h file, but I don't like declaring storage - * in a .h) */ -struct nfsclienthashhead nfsclienthash[NFSCLIENTHASHSIZE]; -struct nfslockhashhead nfslockhash[NFSLOCKHASHSIZE]; -struct nfssessionhash nfssessionhash[NFSSESSIONHASHSIZE]; +struct nfsclienthashhead *nfsclienthash; +struct nfslockhashhead *nfslockhash; +struct nfssessionhash *nfssessionhash; #endif /* !APPLEKEXT */ static u_int32_t nfsrv_openpluslock = 0, nfsrv_delegatecnt = 0; @@ -153,7 +177,7 @@ nfsrv_setclient(struct nfsrv_descript *nd, struct nfsclient **new_clpp, /* * Check for state resource limit exceeded. */ - if (nfsrv_openpluslock > NFSRV_V4STATELIMIT) { + if (nfsrv_openpluslock > nfsrv_v4statelimit) { error = NFSERR_RESOURCE; goto out; } @@ -188,7 +212,7 @@ nfsrv_setclient(struct nfsrv_descript *nd, struct nfsclient **new_clpp, * Search for a match in the client list. */ gotit = i = 0; - while (i < NFSCLIENTHASHSIZE && !gotit) { + while (i < nfsrv_clienthashsize && !gotit) { LIST_FOREACH(clp, &nfsclienthash[i], lc_hash) { if (new_clp->lc_idlen == clp->lc_idlen && !NFSBCMP(new_clp->lc_id, clp->lc_id, clp->lc_idlen)) { @@ -215,7 +239,7 @@ nfsrv_setclient(struct nfsrv_descript *nd, struct nfsclient **new_clpp, /* * Get rid of the old one. */ - if (i != NFSCLIENTHASHSIZE) { + if (i != nfsrv_clienthashsize) { LIST_REMOVE(clp, lc_hash); nfsrv_cleanclient(clp, p); nfsrv_freedeleglist(&clp->lc_deleg); @@ -244,7 +268,7 @@ nfsrv_setclient(struct nfsrv_descript *nd, struct nfsclient **new_clpp, LIST_INIT(&new_clp->lc_deleg); LIST_INIT(&new_clp->lc_olddeleg); LIST_INIT(&new_clp->lc_session); - for (i = 0; i < NFSSTATEHASHSIZE; i++) + for (i = 0; i < nfsrv_statehashsize; i++) LIST_INIT(&new_clp->lc_stateid[i]); LIST_INSERT_HEAD(NFSCLIENTHASH(new_clp->lc_clientid), new_clp, lc_hash); @@ -344,7 +368,7 @@ nfsrv_setclient(struct nfsrv_descript *nd, struct nfsclient **new_clpp, ls_list); LIST_FOREACH(tstp, &new_clp->lc_olddeleg, ls_list) tstp->ls_clp = new_clp; - for (i = 0; i < NFSSTATEHASHSIZE; i++) { + for (i = 0; i < nfsrv_statehashsize; i++) { LIST_NEWHEAD(&new_clp->lc_stateid[i], &clp->lc_stateid[i], ls_hash); LIST_FOREACH(tstp, &new_clp->lc_stateid[i], ls_hash) @@ -405,7 +429,7 @@ nfsrv_setclient(struct nfsrv_descript *nd, struct nfsclient **new_clpp, LIST_NEWHEAD(&new_clp->lc_olddeleg, &clp->lc_olddeleg, ls_list); LIST_FOREACH(tstp, &new_clp->lc_olddeleg, ls_list) tstp->ls_clp = new_clp; - for (i = 0; i < NFSSTATEHASHSIZE; i++) { + for (i = 0; i < nfsrv_statehashsize; i++) { LIST_NEWHEAD(&new_clp->lc_stateid[i], &clp->lc_stateid[i], ls_hash); LIST_FOREACH(tstp, &new_clp->lc_stateid[i], ls_hash) @@ -615,7 +639,7 @@ nfsrv_getclient(nfsquad_t clientid, int opflags, struct nfsclient **clpp, if (!error && (opflags & CLOPS_RENEWOP)) { if (nfsrv_notsamecredname(nd, clp)) { doneok = 0; - for (i = 0; i < NFSSTATEHASHSIZE && doneok == 0; i++) { + for (i = 0; i < nfsrv_statehashsize && doneok == 0; i++) { LIST_FOREACH(stp, &clp->lc_stateid[i], ls_hash) { if ((stp->ls_flags & NFSLCK_OPEN) && stp->ls_uid == nd->nd_cred->cr_uid) { @@ -687,7 +711,7 @@ nfsrv_destroyclient(nfsquad_t clientid, NFSPROC_T *p) } /* Scan for state on the clientid. */ - for (i = 0; i < NFSSTATEHASHSIZE; i++) + for (i = 0; i < nfsrv_statehashsize; i++) if (!LIST_EMPTY(&clp->lc_stateid[i])) { NFSLOCKV4ROOTMUTEX(); nfsv4_unlock(&nfsv4rootfs_lock, 1); @@ -744,7 +768,7 @@ nfsrv_adminrevoke(struct nfsd_clid *revokep, NFSPROC_T *p) * Search for a match in the client list. */ gotit = i = 0; - while (i < NFSCLIENTHASHSIZE && !gotit) { + while (i < nfsrv_clienthashsize && !gotit) { LIST_FOREACH(clp, &nfsclienthash[i], lc_hash) { if (revokep->nclid_idlen == clp->lc_idlen && !NFSBCMP(revokep->nclid_id, clp->lc_id, clp->lc_idlen)) { @@ -806,7 +830,7 @@ nfsrv_dumpclients(struct nfsd_dumpclients *dumpp, int maxcnt) /* * Rattle through the client lists until done. */ - while (i < NFSCLIENTHASHSIZE && cnt < maxcnt) { + while (i < nfsrv_clienthashsize && cnt < maxcnt) { clp = LIST_FIRST(&nfsclienthash[i]); while (clp != LIST_END(&nfsclienthash[i]) && cnt < maxcnt) { nfsrv_dumpaclient(clp, &dumpp[cnt]); @@ -1074,7 +1098,7 @@ nfsrv_servertimer(void) /* * For each client... */ - for (i = 0; i < NFSCLIENTHASHSIZE; i++) { + for (i = 0; i < nfsrv_clienthashsize; i++) { clp = LIST_FIRST(&nfsclienthash[i]); while (clp != LIST_END(&nfsclienthash[i])) { nclp = LIST_NEXT(clp, lc_hash); @@ -1085,7 +1109,7 @@ nfsrv_servertimer(void) nfsrv_clients > nfsrv_clienthighwater)) || (clp->lc_expiry + NFSRV_MOULDYLEASE) < NFSD_MONOSEC || (clp->lc_expiry < NFSD_MONOSEC && - (nfsrv_openpluslock * 10 / 9) > NFSRV_V4STATELIMIT)) { + (nfsrv_openpluslock * 10 / 9) > nfsrv_v4statelimit)) { /* * Lease has expired several nfsrv_lease times ago: * PLUS @@ -1124,7 +1148,7 @@ nfsrv_servertimer(void) stp->ls_noopens++; if (stp->ls_noopens > NFSNOOPEN || (nfsrv_openpluslock * 2) > - NFSRV_V4STATELIMIT) + nfsrv_v4statelimit) nfsrv_stablefirst.nsf_flags |= NFSNSF_NOOPENS; } else { @@ -1188,7 +1212,8 @@ nfsrv_zapclient(struct nfsclient *clp, NFSPROC_T *p) newnfs_disconnect(&clp->lc_req); NFSSOCKADDRFREE(clp->lc_req.nr_nam); NFSFREEMUTEX(&clp->lc_req.nr_mtx); - free((caddr_t)clp, M_NFSDCLIENT); + free(clp->lc_stateid, M_NFSDCLIENT); + free(clp, M_NFSDCLIENT); NFSLOCKSTATE(); newnfsstats.srvclients--; nfsrv_openpluslock--; @@ -1534,7 +1559,7 @@ nfsrv_lockctrl(vnode_t vp, struct nfsstate **new_stpp, * Check for state resource limit exceeded. */ if ((new_stp->ls_flags & NFSLCK_LOCK) && - nfsrv_openpluslock > NFSRV_V4STATELIMIT) { + nfsrv_openpluslock > nfsrv_v4statelimit) { error = NFSERR_RESOURCE; goto out; } @@ -2232,7 +2257,7 @@ nfsrv_opencheck(nfsquad_t clientid, nfsv4stateid_t *stateidp, * returns NFSERR_RESOURCE and the limit is just a rather * arbitrary high water mark, so no harm is done. */ - if (nfsrv_openpluslock > NFSRV_V4STATELIMIT) { + if (nfsrv_openpluslock > nfsrv_v4statelimit) { error = NFSERR_RESOURCE; goto out; } @@ -4298,7 +4323,7 @@ nfsrv_nextstateindex(struct nfsclient *clp) */ min_index = 0; max_index = 0xffffffff; - for (i = 0; i < NFSSTATEHASHSIZE; i++) { + for (i = 0; i < nfsrv_statehashsize; i++) { LIST_FOREACH(stp, &clp->lc_stateid[i], ls_hash) { if (stp->ls_stateid.other[2] > 0x80000000) { if (stp->ls_stateid.other[2] < max_index) @@ -4322,7 +4347,7 @@ nfsrv_nextstateindex(struct nfsclient *clp) * cleanest way to code the loop.) */ tryagain: - for (i = 0; i < NFSSTATEHASHSIZE; i++) { + for (i = 0; i < nfsrv_statehashsize; i++) { LIST_FOREACH(stp, &clp->lc_stateid[i], ls_hash) { if (stp->ls_stateid.other[2] == canuse) { canuse++; @@ -5319,13 +5344,13 @@ nfsrv_throwawayopens(NFSPROC_T *p) /* * For each client... */ - for (i = 0; i < NFSCLIENTHASHSIZE; i++) { + for (i = 0; i < nfsrv_clienthashsize; i++) { LIST_FOREACH_SAFE(clp, &nfsclienthash[i], lc_hash, nclp) { LIST_FOREACH_SAFE(stp, &clp->lc_open, ls_list, nstp) { if (LIST_EMPTY(&stp->ls_open) && (stp->ls_noopens > NFSNOOPEN || (nfsrv_openpluslock * 2) > - NFSRV_V4STATELIMIT)) + nfsrv_v4statelimit)) nfsrv_freeopenowner(stp, 0, p); } } @@ -5696,11 +5721,12 @@ nfsrv_throwawayallstate(NFSPROC_T *p) /* * For each client, clean out the state and then free the structure. */ - for (i = 0; i < NFSCLIENTHASHSIZE; i++) { + for (i = 0; i < nfsrv_clienthashsize; i++) { LIST_FOREACH_SAFE(clp, &nfsclienthash[i], lc_hash, nclp) { nfsrv_cleanclient(clp, p); nfsrv_freedeleglist(&clp->lc_deleg); nfsrv_freedeleglist(&clp->lc_olddeleg); + free(clp->lc_stateid, M_NFSDCLIENT); free(clp, M_NFSDCLIENT); } } @@ -5708,7 +5734,7 @@ nfsrv_throwawayallstate(NFSPROC_T *p) /* * Also, free up any remaining lock file structures. */ - for (i = 0; i < NFSLOCKHASHSIZE; i++) { + for (i = 0; i < nfsrv_lockhashsize; i++) { LIST_FOREACH_SAFE(lfp, &nfslockhash[i], lf_hash, nlfp) { printf("nfsd unload: fnd a lock file struct\n"); nfsrv_freenfslockfile(lfp); diff --git a/sys/fs/nfsserver/nfs_nfsdsubs.c b/sys/fs/nfsserver/nfs_nfsdsubs.c index 6bd141250784..c0421e34ce1f 100644 --- a/sys/fs/nfsserver/nfs_nfsdsubs.c +++ b/sys/fs/nfsserver/nfs_nfsdsubs.c @@ -44,9 +44,12 @@ __FBSDID("$FreeBSD$"); extern u_int32_t newnfs_true, newnfs_false; extern int nfs_pubfhset; -extern struct nfsclienthashhead nfsclienthash[NFSCLIENTHASHSIZE]; -extern struct nfslockhashhead nfslockhash[NFSLOCKHASHSIZE]; -extern struct nfssessionhash nfssessionhash[NFSSESSIONHASHSIZE]; +extern struct nfsclienthashhead *nfsclienthash; +extern int nfsrv_clienthashsize; +extern struct nfslockhashhead *nfslockhash; +extern int nfsrv_lockhashsize; +extern struct nfssessionhash *nfssessionhash; +extern int nfsrv_sessionhashsize; extern int nfsrv_useacl; extern uid_t nfsrv_defaultuid; extern gid_t nfsrv_defaultgid; @@ -2036,12 +2039,20 @@ nfsd_init(void) * Initialize client queues. Don't free/reinitialize * them when nfsds are restarted. */ - for (i = 0; i < NFSCLIENTHASHSIZE; i++) + nfsclienthash = malloc(sizeof(struct nfsclienthashhead) * + nfsrv_clienthashsize, M_NFSDCLIENT, M_WAITOK | M_ZERO); + for (i = 0; i < nfsrv_clienthashsize; i++) LIST_INIT(&nfsclienthash[i]); - for (i = 0; i < NFSLOCKHASHSIZE; i++) + nfslockhash = malloc(sizeof(struct nfslockhashhead) * + nfsrv_lockhashsize, M_NFSDLOCKFILE, M_WAITOK | M_ZERO); + for (i = 0; i < nfsrv_lockhashsize; i++) LIST_INIT(&nfslockhash[i]); - for (i = 0; i < NFSSESSIONHASHSIZE; i++) + nfssessionhash = malloc(sizeof(struct nfssessionhash) * + nfsrv_sessionhashsize, M_NFSDSESSION, M_WAITOK | M_ZERO); + for (i = 0; i < nfsrv_sessionhashsize; i++) { + mtx_init(&nfssessionhash[i].mtx, "nfssm", NULL, MTX_DEF); LIST_INIT(&nfssessionhash[i].list); + } /* and the v2 pubfh should be all zeros */ NFSBZERO(nfs_v2pubfh, NFSX_V2FH); diff --git a/sys/fs/procfs/procfs_ctl.c b/sys/fs/procfs/procfs_ctl.c index dc267f64073e..1437644d5fa3 100644 --- a/sys/fs/procfs/procfs_ctl.c +++ b/sys/fs/procfs/procfs_ctl.c @@ -143,8 +143,8 @@ procfs_control(struct thread *td, struct proc *p, int op) p->p_flag |= P_TRACED; faultin(p); p->p_xstat = 0; /* XXX ? */ + p->p_oppid = p->p_pptr->p_pid; if (p->p_pptr != td->td_proc) { - p->p_oppid = p->p_pptr->p_pid; proc_reparent(p, td->td_proc); } kern_psignal(p, SIGSTOP); diff --git a/sys/fs/pseudofs/pseudofs.c b/sys/fs/pseudofs/pseudofs.c index d7894af61a99..1824d0b005e2 100644 --- a/sys/fs/pseudofs/pseudofs.c +++ b/sys/fs/pseudofs/pseudofs.c @@ -52,9 +52,11 @@ static MALLOC_DEFINE(M_PFSNODES, "pfs_nodes", "pseudofs nodes"); SYSCTL_NODE(_vfs, OID_AUTO, pfs, CTLFLAG_RW, 0, "pseudofs"); +#ifdef PSEUDOFS_TRACE int pfs_trace; SYSCTL_INT(_vfs_pfs, OID_AUTO, trace, CTLFLAG_RW, &pfs_trace, 0, "enable tracing of pseudofs vnode operations"); +#endif #if PFS_FSNAMELEN != MFSNAMELEN #error "PFS_FSNAMELEN is not equal to MFSNAMELEN" diff --git a/sys/gdb/gdb_cons.c b/sys/gdb/gdb_cons.c index 47f453fc3eea..6bf2f9b02b05 100644 --- a/sys/gdb/gdb_cons.c +++ b/sys/gdb/gdb_cons.c @@ -76,7 +76,7 @@ gdb_cninit(struct consdev *cp) /* setup tx buffer and callout */ if (c->npending == -1) { c->npending = 0; - callout_init(&c->flush, CALLOUT_MPSAFE); + callout_init(&c->flush, 1); cp->cn_arg = c; } } diff --git a/sys/geom/gate/g_gate.c b/sys/geom/gate/g_gate.c index ae0d7b094a5f..3453eef9b783 100644 --- a/sys/geom/gate/g_gate.c +++ b/sys/geom/gate/g_gate.c @@ -486,7 +486,7 @@ g_gate_create(struct g_gate_ctl_create *ggio) if (sc->sc_queue_size > G_GATE_MAX_QUEUE_SIZE) sc->sc_queue_size = G_GATE_MAX_QUEUE_SIZE; sc->sc_timeout = ggio->gctl_timeout; - callout_init(&sc->sc_callout, CALLOUT_MPSAFE); + callout_init(&sc->sc_callout, 1); mtx_lock(&g_gate_units_lock); sc->sc_unit = g_gate_getunit(ggio->gctl_unit, &error); diff --git a/sys/geom/journal/g_journal.c b/sys/geom/journal/g_journal.c index 9cc324c32a2c..f0eb10347769 100644 --- a/sys/geom/journal/g_journal.c +++ b/sys/geom/journal/g_journal.c @@ -2314,7 +2314,7 @@ g_journal_create(struct g_class *mp, struct g_provider *pp, sc->sc_rootmount = root_mount_hold("GJOURNAL"); GJ_DEBUG(1, "root_mount_hold %p", sc->sc_rootmount); - callout_init(&sc->sc_callout, CALLOUT_MPSAFE); + callout_init(&sc->sc_callout, 1); if (md->md_type != GJ_TYPE_COMPLETE) { /* * Journal and data are on separate providers. diff --git a/sys/geom/mirror/g_mirror.c b/sys/geom/mirror/g_mirror.c index 191227110e9a..cb2e41b26f42 100644 --- a/sys/geom/mirror/g_mirror.c +++ b/sys/geom/mirror/g_mirror.c @@ -2935,7 +2935,7 @@ g_mirror_create(struct g_class *mp, const struct g_mirror_metadata *md) LIST_INIT(&sc->sc_disks); TAILQ_INIT(&sc->sc_events); mtx_init(&sc->sc_events_mtx, "gmirror:events", NULL, MTX_DEF); - callout_init(&sc->sc_callout, CALLOUT_MPSAFE); + callout_init(&sc->sc_callout, 1); mtx_init(&sc->sc_done_mtx, "gmirror:done", NULL, MTX_DEF); sc->sc_state = G_MIRROR_DEVICE_STATE_STARTING; gp->softc = sc; diff --git a/sys/geom/raid3/g_raid3.c b/sys/geom/raid3/g_raid3.c index f935f788a937..132ef84c05a1 100644 --- a/sys/geom/raid3/g_raid3.c +++ b/sys/geom/raid3/g_raid3.c @@ -3156,7 +3156,7 @@ g_raid3_create(struct g_class *mp, const struct g_raid3_metadata *md) bioq_init(&sc->sc_sync_delayed); TAILQ_INIT(&sc->sc_events); mtx_init(&sc->sc_events_mtx, "graid3:events", NULL, MTX_DEF); - callout_init(&sc->sc_callout, CALLOUT_MPSAFE); + callout_init(&sc->sc_callout, 1); sc->sc_state = G_RAID3_DEVICE_STATE_STARTING; gp->softc = sc; sc->sc_geom = gp; diff --git a/sys/geom/sched/gs_rr.c b/sys/geom/sched/gs_rr.c index b9d5d1b4e22e..7742ef67321f 100644 --- a/sys/geom/sched/gs_rr.c +++ b/sys/geom/sched/gs_rr.c @@ -602,7 +602,7 @@ g_rr_init(struct g_geom *geom) sc = malloc(sizeof *sc, M_GEOM_SCHED, M_NOWAIT | M_ZERO); sc->sc_geom = geom; TAILQ_INIT(&sc->sc_rr_tailq); - callout_init(&sc->sc_wait, CALLOUT_MPSAFE); + callout_init(&sc->sc_wait, 1); LIST_INSERT_HEAD(&me.sc_head, sc, sc_next); me.units++; diff --git a/sys/geom/uncompress/g_uncompress.c b/sys/geom/uncompress/g_uncompress.c index 8c2d5cb6c929..62a677de25a7 100644 --- a/sys/geom/uncompress/g_uncompress.c +++ b/sys/geom/uncompress/g_uncompress.c @@ -464,7 +464,8 @@ g_uncompress_taste(struct g_class *mp, struct g_provider *pp, int flags) struct g_provider *pp2; struct g_consumer *cp; struct g_geom *gp; - uint32_t i, total_offsets, type; + uint64_t *offsets; + uint32_t i, r, total, total_offsets, type; uint8_t *buf; int error; @@ -499,8 +500,8 @@ g_uncompress_taste(struct g_class *mp, struct g_provider *pp, int flags) */ DPRINTF(("%s: media sectorsize %u, mediasize %jd\n", gp->name, pp->sectorsize, (intmax_t)pp->mediasize)); - i = roundup(sizeof(struct cloop_header), pp->sectorsize); - buf = g_read_data(cp, 0, i, NULL); + total = roundup(sizeof(struct cloop_header), pp->sectorsize); + buf = g_read_data(cp, 0, total, NULL); if (buf == NULL) goto err; header = (struct cloop_header *) buf; @@ -557,20 +558,29 @@ g_uncompress_taste(struct g_class *mp, struct g_provider *pp, int flags) gp->name, sc->nblocks); goto err; } - free(buf, M_GEOM); + g_free(buf); - i = roundup((sizeof(struct cloop_header) + - total_offsets * sizeof(uint64_t)), pp->sectorsize); - buf = g_read_data(cp, 0, i, NULL); - if (buf == NULL) - goto err; sc->offsets = malloc(total_offsets * sizeof(uint64_t), - M_GEOM_UNCOMPRESS, M_WAITOK); - for (i = 0; i <= total_offsets; i++) { - sc->offsets[i] = be64toh(((uint64_t *) - (buf+sizeof(struct cloop_header)))[i]); + M_GEOM_UNCOMPRESS, M_WAITOK | M_ZERO); + total = roundup((sizeof(struct cloop_header) + + total_offsets * sizeof(uint64_t)), pp->sectorsize); +#define RSZ ((total - r) > MAXPHYS ? MAXPHYS: (total - r)) + for (r = 0, i = 0; r < total; r += MAXPHYS) { + buf = g_read_data(cp, r, RSZ, &error); + if (buf == NULL) { + free(sc->offsets, M_GEOM_UNCOMPRESS); + goto err; + } + offsets = (uint64_t *)buf; + if (r == 0) + offsets += + sizeof(struct cloop_header) / sizeof(uint64_t); + for (; i < total_offsets && offsets < (uint64_t *)(buf + RSZ); + i++, offsets++) + sc->offsets[i] = be64toh(*offsets); + g_free(buf); } - free(buf, M_GEOM); +#undef RSZ buf = NULL; DPRINTF(("%s: done reading offsets\n", gp->name)); mtx_init(&sc->last_mtx, "geom_uncompress cache", NULL, MTX_DEF); @@ -619,7 +629,7 @@ g_uncompress_taste(struct g_class *mp, struct g_provider *pp, int flags) g_topology_lock(); g_access(cp, -1, 0, 0); if (buf != NULL) - free(buf, M_GEOM); + g_free(buf); if (gp->softc != NULL) { g_uncompress_softc_free(gp->softc, NULL); gp->softc = NULL; diff --git a/sys/i386/acpica/acpi_machdep.c b/sys/i386/acpica/acpi_machdep.c index 049354b0c213..4c79691dbeee 100644 --- a/sys/i386/acpica/acpi_machdep.c +++ b/sys/i386/acpica/acpi_machdep.c @@ -106,13 +106,6 @@ acpi_machdep_quirks(int *quirks) return (0); } -void -acpi_cpu_c1() -{ - - __asm __volatile("sti; hlt"); -} - /* * Support for mapping ACPI tables during early boot. This abuses the * crashdump map because the kernel cannot allocate KVA in diff --git a/sys/i386/conf/GENERIC b/sys/i386/conf/GENERIC index b1740f32efc2..d1d2a2f457b3 100644 --- a/sys/i386/conf/GENERIC +++ b/sys/i386/conf/GENERIC @@ -73,6 +73,9 @@ options MAC # TrustedBSD MAC Framework options KDTRACE_HOOKS # Kernel DTrace hooks options DDB_CTF # Kernel ELF linker loads CTF data options INCLUDE_CONFIG_FILE # Include this file in kernel +options RACCT # Resource accounting framework +options RACCT_DEFAULT_TO_DISABLED # Set kern.racct.enable=0 by default +options RCTL # Resource limits # Debugging support. Always need this: options KDB # Enable kernel debugger support. @@ -174,6 +177,10 @@ device mrsas # LSI/Avago MegaRAID SAS/SATA, 6Gb/s and 12Gb/s device pst # Promise Supertrak SX6000 device twe # 3ware ATA RAID +# NVM Express (NVMe) support +device nvme # base NVMe driver +device nvd # expose NVMe namespace as disks, depends on nvme + # atkbdc0 controls both the keyboard and the PS/2 mouse device atkbdc # AT keyboard controller device atkbd # AT keyboard diff --git a/sys/i386/i386/db_disasm.c b/sys/i386/i386/db_disasm.c index 901cff1dd5da..4f771dc3e62c 100644 --- a/sys/i386/i386/db_disasm.c +++ b/sys/i386/i386/db_disasm.c @@ -1148,9 +1148,7 @@ db_disasm_esc(loc, inst, short_addr, size, seg) * next instruction. */ db_addr_t -db_disasm(loc, altfmt) - db_addr_t loc; - boolean_t altfmt; +db_disasm(db_addr_t loc, bool altfmt) { int inst; int size; diff --git a/sys/i386/i386/elf_machdep.c b/sys/i386/i386/elf_machdep.c index 8cd4440cabf6..03ab10f17dc7 100644 --- a/sys/i386/i386/elf_machdep.c +++ b/sys/i386/i386/elf_machdep.c @@ -88,6 +88,7 @@ struct sysentvec elf32_freebsd_sysvec = { .sv_shared_page_base = SHAREDPAGE, .sv_shared_page_len = PAGE_SIZE, .sv_schedtail = NULL, + .sv_thread_detach = NULL, }; INIT_SYSENTVEC(elf32_sysvec, &elf32_freebsd_sysvec); diff --git a/sys/i386/i386/machdep.c b/sys/i386/i386/machdep.c index a5867c43057a..2763ef781ddc 100644 --- a/sys/i386/i386/machdep.c +++ b/sys/i386/i386/machdep.c @@ -383,10 +383,6 @@ osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) } else fp = (struct osigframe *)regs->tf_esp - 1; - /* Translate the signal if appropriate. */ - if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) - sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; - /* Build the argument list for the signal handler. */ sf.sf_signum = sig; sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc; @@ -534,10 +530,6 @@ freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) } else sfp = (struct sigframe4 *)regs->tf_esp - 1; - /* Translate the signal if appropriate. */ - if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) - sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; - /* Build the argument list for the signal handler. */ sf.sf_signum = sig; sf.sf_ucontext = (register_t)&sfp->sf_uc; diff --git a/sys/i386/i386/mp_watchdog.c b/sys/i386/i386/mp_watchdog.c index b03d2614d9b5..f6b853a22352 100644 --- a/sys/i386/i386/mp_watchdog.c +++ b/sys/i386/i386/mp_watchdog.c @@ -85,7 +85,7 @@ static void watchdog_init(void *arg) { - callout_init(&watchdog_callout, CALLOUT_MPSAFE); + callout_init(&watchdog_callout, 1); if (watchdog_cpu != -1) watchdog_change(watchdog_cpu); } diff --git a/sys/i386/ibcs2/ibcs2_misc.c b/sys/i386/ibcs2/ibcs2_misc.c index d81cfeeb97f9..2c2cae416c50 100644 --- a/sys/i386/ibcs2/ibcs2_misc.c +++ b/sys/i386/ibcs2/ibcs2_misc.c @@ -200,15 +200,22 @@ ibcs2_execv(td, uap) struct ibcs2_execv_args *uap; { struct image_args eargs; + struct vmspace *oldvmspace; char *path; int error; CHECKALTEXIST(td, uap->path, &path); + error = pre_execve(td, &oldvmspace); + if (error != 0) { + free(path, M_TEMP); + return (error); + } error = exec_copyin_args(&eargs, path, UIO_SYSSPACE, uap->argp, NULL); free(path, M_TEMP); if (error == 0) error = kern_execve(td, &eargs, NULL); + post_execve(td, error, oldvmspace); return (error); } @@ -218,16 +225,23 @@ ibcs2_execve(td, uap) struct ibcs2_execve_args *uap; { struct image_args eargs; + struct vmspace *oldvmspace; char *path; int error; CHECKALTEXIST(td, uap->path, &path); + error = pre_execve(td, &oldvmspace); + if (error != 0) { + free(path, M_TEMP); + return (error); + } error = exec_copyin_args(&eargs, path, UIO_SYSSPACE, uap->argp, uap->envp); free(path, M_TEMP); if (error == 0) error = kern_execve(td, &eargs, NULL); + post_execve(td, error, oldvmspace); return (error); } diff --git a/sys/i386/ibcs2/ibcs2_sysvec.c b/sys/i386/ibcs2/ibcs2_sysvec.c index 5d007c7958dd..16507ee2afa3 100644 --- a/sys/i386/ibcs2/ibcs2_sysvec.c +++ b/sys/i386/ibcs2/ibcs2_sysvec.c @@ -89,6 +89,7 @@ struct sysentvec ibcs2_svr3_sysvec = { .sv_fetch_syscall_args = cpu_fetch_syscall_args, .sv_syscallnames = NULL, .sv_schedtail = NULL, + .sv_thread_detach = NULL, }; static int diff --git a/sys/i386/include/md_var.h b/sys/i386/include/md_var.h index bffdd5751d66..b5bd35ef524d 100644 --- a/sys/i386/include/md_var.h +++ b/sys/i386/include/md_var.h @@ -97,6 +97,7 @@ struct dumperinfo; void *alloc_fpusave(int flags); void bcopyb(const void *from, void *to, size_t len); void busdma_swi(void); +bool cpu_mwait_usable(void); void cpu_probe_amdc1e(void); void cpu_setregs(void); void cpu_switch_load_gs(void) __asm(__STRING(cpu_switch_load_gs)); diff --git a/sys/i386/linux/linux.h b/sys/i386/linux/linux.h index 27eff3255c15..36b2084cd9f9 100644 --- a/sys/i386/linux/linux.h +++ b/sys/i386/linux/linux.h @@ -33,6 +33,7 @@ #include /* for sigval union */ +#include #include /* @@ -40,14 +41,12 @@ */ extern u_char linux_debug_map[]; #define ldebug(name) isclr(linux_debug_map, LINUX_SYS_linux_ ## name) -#define ARGS(nm, fmt) "linux(%ld): "#nm"("fmt")\n", (long)td->td_proc->p_pid -#define LMSG(fmt) "linux(%ld): "fmt"\n", (long)td->td_proc->p_pid +#define ARGS(nm, fmt) "linux(%ld/%ld): "#nm"("fmt")\n", \ + (long)td->td_proc->p_pid, (long)td->td_tid +#define LMSG(fmt) "linux(%ld/%ld): "fmt"\n", \ + (long)td->td_proc->p_pid, (long)td->td_tid #define LINUX_DTRACE linuxulator -#ifdef MALLOC_DECLARE -MALLOC_DECLARE(M_LINUX); -#endif - #define LINUX_SHAREDPAGE (VM_MAXUSER_ADDRESS - PAGE_SIZE) #define LINUX_USRSTACK LINUX_SHAREDPAGE @@ -91,6 +90,7 @@ typedef l_uint l_uid_t; typedef l_ushort l_uid16_t; typedef l_int l_timer_t; typedef l_int l_mqd_t; +typedef l_ulong l_fd_mask; typedef struct { l_int val[2]; @@ -106,7 +106,7 @@ typedef struct { /* * Miscellaneous */ -#define LINUX_AT_COUNT 16 /* Count of used aux entry types. +#define LINUX_AT_COUNT 20 /* Count of used aux entry types. * Keep this synchronized with * elf_linux_fixup() code. */ @@ -235,48 +235,7 @@ struct l_statfs64 { l_int f_spare[6]; }; -/* - * Signalling - */ -#define LINUX_SIGHUP 1 -#define LINUX_SIGINT 2 -#define LINUX_SIGQUIT 3 -#define LINUX_SIGILL 4 -#define LINUX_SIGTRAP 5 -#define LINUX_SIGABRT 6 -#define LINUX_SIGIOT LINUX_SIGABRT -#define LINUX_SIGBUS 7 -#define LINUX_SIGFPE 8 -#define LINUX_SIGKILL 9 -#define LINUX_SIGUSR1 10 -#define LINUX_SIGSEGV 11 -#define LINUX_SIGUSR2 12 -#define LINUX_SIGPIPE 13 -#define LINUX_SIGALRM 14 -#define LINUX_SIGTERM 15 -#define LINUX_SIGSTKFLT 16 -#define LINUX_SIGCHLD 17 -#define LINUX_SIGCONT 18 -#define LINUX_SIGSTOP 19 -#define LINUX_SIGTSTP 20 -#define LINUX_SIGTTIN 21 -#define LINUX_SIGTTOU 22 -#define LINUX_SIGURG 23 -#define LINUX_SIGXCPU 24 -#define LINUX_SIGXFSZ 25 -#define LINUX_SIGVTALRM 26 -#define LINUX_SIGPROF 27 -#define LINUX_SIGWINCH 28 -#define LINUX_SIGIO 29 -#define LINUX_SIGPOLL LINUX_SIGIO -#define LINUX_SIGPWR 30 -#define LINUX_SIGSYS 31 -#define LINUX_SIGRTMIN 32 - -#define LINUX_SIGTBLSZ 31 #define LINUX_NSIG_WORDS 2 -#define LINUX_NBPW 32 -#define LINUX_NSIG (LINUX_NBPW * LINUX_NSIG_WORDS) /* sigaction flags */ #define LINUX_SA_NOCLDSTOP 0x00000001 @@ -294,26 +253,12 @@ struct l_statfs64 { #define LINUX_SIG_UNBLOCK 1 #define LINUX_SIG_SETMASK 2 -/* sigset_t macros */ -#define LINUX_SIGEMPTYSET(set) (set).__bits[0] = (set).__bits[1] = 0 -#define LINUX_SIGISMEMBER(set, sig) SIGISMEMBER(set, sig) -#define LINUX_SIGADDSET(set, sig) SIGADDSET(set, sig) - /* sigaltstack */ #define LINUX_MINSIGSTKSZ 2048 -#define LINUX_SS_ONSTACK 1 -#define LINUX_SS_DISABLE 2 - -int linux_to_bsd_sigaltstack(int lsa); -int bsd_to_linux_sigaltstack(int bsa); typedef void (*l_handler_t)(l_int); typedef l_ulong l_osigset_t; -typedef struct { - l_uint __bits[LINUX_NSIG_WORDS]; -} l_sigset_t; - typedef struct { l_handler_t lsa_handler; l_osigset_t lsa_mask; @@ -497,50 +442,14 @@ struct l_rt_sigframe { }; extern struct sysentvec linux_sysvec; -extern struct sysentvec elf_linux_sysvec; /* - * open/fcntl flags + * arch specific open/fcntl flags */ -#define LINUX_O_RDONLY 00000000 -#define LINUX_O_WRONLY 00000001 -#define LINUX_O_RDWR 00000002 -#define LINUX_O_ACCMODE 00000003 -#define LINUX_O_CREAT 00000100 -#define LINUX_O_EXCL 00000200 -#define LINUX_O_NOCTTY 00000400 -#define LINUX_O_TRUNC 00001000 -#define LINUX_O_APPEND 00002000 -#define LINUX_O_NONBLOCK 00004000 -#define LINUX_O_NDELAY LINUX_O_NONBLOCK -#define LINUX_O_SYNC 00010000 -#define LINUX_FASYNC 00020000 -#define LINUX_O_DIRECT 00040000 /* Direct disk access hint */ -#define LINUX_O_LARGEFILE 00100000 -#define LINUX_O_DIRECTORY 00200000 /* Must be a directory */ -#define LINUX_O_NOFOLLOW 00400000 /* Do not follow links */ -#define LINUX_O_NOATIME 01000000 -#define LINUX_O_CLOEXEC 02000000 - -#define LINUX_F_DUPFD 0 -#define LINUX_F_GETFD 1 -#define LINUX_F_SETFD 2 -#define LINUX_F_GETFL 3 -#define LINUX_F_SETFL 4 -#define LINUX_F_GETLK 5 -#define LINUX_F_SETLK 6 -#define LINUX_F_SETLKW 7 -#define LINUX_F_SETOWN 8 -#define LINUX_F_GETOWN 9 - #define LINUX_F_GETLK64 12 #define LINUX_F_SETLK64 13 #define LINUX_F_SETLKW64 14 -#define LINUX_F_RDLCK 0 -#define LINUX_F_WRLCK 1 -#define LINUX_F_UNLCK 2 - union l_semun { l_int val; struct l_semid_ds *buf; @@ -549,6 +458,16 @@ union l_semun { void *__pad; }; +struct l_ipc_perm { + l_key_t key; + l_uid16_t uid; + l_gid16_t gid; + l_uid16_t cuid; + l_gid16_t cgid; + l_ushort mode; + l_ushort seq; +}; + /* * Socket defines */ @@ -585,22 +504,6 @@ struct l_sockaddr { char sa_data[14]; }; -struct l_msghdr { - l_uintptr_t msg_name; - l_int msg_namelen; - l_uintptr_t msg_iov; - l_size_t msg_iovlen; - l_uintptr_t msg_control; - l_size_t msg_controllen; - l_uint msg_flags; -}; - -struct l_cmsghdr { - l_size_t cmsg_len; - l_int cmsg_level; - l_int cmsg_type; -}; - struct l_ifmap { l_ulong mem_start; l_ulong mem_end; @@ -739,6 +642,8 @@ struct l_desc_struct { #define LINUX_GET_USEABLE(desc) \ (((desc)->b >> LINUX_ENTRY_B_USEABLE) & 1) +#define linux_copyout_rusage(r, u) copyout(r, u, sizeof(*r)) + /* robust futexes */ struct linux_robust_list { struct linux_robust_list *next; diff --git a/sys/i386/linux/linux_dummy.c b/sys/i386/linux/linux_dummy.c index 85d40f0e0911..4c0cad058057 100644 --- a/sys/i386/linux/linux_dummy.c +++ b/sys/i386/linux/linux_dummy.c @@ -64,23 +64,18 @@ DUMMY(sysfs); DUMMY(vm86); DUMMY(query_module); DUMMY(nfsservctl); -DUMMY(rt_sigqueueinfo); DUMMY(sendfile); /* different semantics */ DUMMY(setfsuid); DUMMY(setfsgid); DUMMY(pivot_root); DUMMY(mincore); DUMMY(lookup_dcookie); -DUMMY(epoll_create); -DUMMY(epoll_ctl); -DUMMY(epoll_wait); DUMMY(remap_file_pages); DUMMY(fstatfs64); DUMMY(mbind); DUMMY(get_mempolicy); DUMMY(set_mempolicy); DUMMY(kexec_load); -DUMMY(waitid); /* linux 2.6.11: */ DUMMY(add_key); DUMMY(request_key); @@ -93,8 +88,6 @@ DUMMY(inotify_add_watch); DUMMY(inotify_rm_watch); /* linux 2.6.16: */ DUMMY(migrate_pages); -DUMMY(pselect6); -DUMMY(ppoll); DUMMY(unshare); /* linux 2.6.17: */ DUMMY(splice); @@ -105,22 +98,14 @@ DUMMY(vmsplice); DUMMY(move_pages); /* linux 2.6.19: */ DUMMY(getcpu); -DUMMY(epoll_pwait); /* linux 2.6.22: */ -DUMMY(utimensat); DUMMY(signalfd); DUMMY(timerfd_create); -DUMMY(eventfd); -/* linux 2.6.23: */ -DUMMY(fallocate); /* linux 2.6.25: */ DUMMY(timerfd_settime); DUMMY(timerfd_gettime); /* linux 2.6.27: */ DUMMY(signalfd4); -DUMMY(eventfd2); -DUMMY(epoll_create1); -DUMMY(dup3); DUMMY(inotify_init1); /* linux 2.6.30: */ DUMMY(preadv); @@ -129,17 +114,12 @@ DUMMY(pwritev); DUMMY(rt_tsigqueueinfo); DUMMY(perf_event_open); /* linux 2.6.33: */ -DUMMY(recvmmsg); DUMMY(fanotify_init); DUMMY(fanotify_mark); -/* linux 2.6.36: */ -DUMMY(prlimit64); /* later: */ DUMMY(name_to_handle_at); DUMMY(open_by_handle_at); DUMMY(clock_adjtime); -DUMMY(syncfs); -DUMMY(sendmmsg); DUMMY(setns); DUMMY(process_vm_readv); DUMMY(process_vm_writev); diff --git a/sys/i386/linux/linux_genassym.c b/sys/i386/linux/linux_genassym.c index 1e845724cfdc..9735110b0472 100644 --- a/sys/i386/linux/linux_genassym.c +++ b/sys/i386/linux/linux_genassym.c @@ -6,6 +6,7 @@ __FBSDID("$FreeBSD$"); #include #include +#include ASSYM(LINUX_SIGF_HANDLER, offsetof(struct l_sigframe, sf_handler)); ASSYM(LINUX_SIGF_SC, offsetof(struct l_sigframe, sf_sc)); @@ -14,3 +15,5 @@ ASSYM(LINUX_SC_EFLAGS, offsetof(struct l_sigcontext, sc_eflags)); ASSYM(LINUX_RT_SIGF_HANDLER, offsetof(struct l_rt_sigframe, sf_handler)); ASSYM(LINUX_RT_SIGF_UC, offsetof(struct l_rt_sigframe, sf_sc)); ASSYM(LINUX_RT_SIGF_SC, offsetof(struct l_ucontext, uc_mcontext)); +ASSYM(LINUX_SC_ESP, offsetof(struct l_sigcontext, sc_esp)); +ASSYM(LINUX_VERSION_CODE, LINUX_VERSION_CODE); diff --git a/sys/i386/linux/linux_locore.s b/sys/i386/linux/linux_locore.s index a3e0e7dced07..6c4d19c89313 100644 --- a/sys/i386/linux/linux_locore.s +++ b/sys/i386/linux/linux_locore.s @@ -5,33 +5,145 @@ #include /* system call numbers */ +#include "assym.s" + +/* + * To avoid excess stack frame the signal trampoline code emulates + * the 'call' instruction. + */ NON_GPROF_ENTRY(linux_sigcode) - call *LINUX_SIGF_HANDLER(%esp) - leal LINUX_SIGF_SC(%esp),%ebx /* linux scp */ - mov LINUX_SC_GS(%ebx),%gs - movl %esp, %ebx /* pass sigframe */ - push %eax /* fake ret addr */ + movl %esp, %ebx /* preserve sigframe */ + call .getip0 +.getip0: + popl %eax + add $.startsigcode-.getip0, %eax /* ret address */ + push %eax + jmp *LINUX_SIGF_HANDLER(%ebx) +.startsigcode: + popl %eax /* gcc unwind code need this */ movl $LINUX_SYS_linux_sigreturn,%eax /* linux_sigreturn() */ int $0x80 /* enter kernel with args */ +.endsigcode: 0: jmp 0b - ALIGN_TEXT -/* XXXXX */ -linux_rt_sigcode: - call *LINUX_RT_SIGF_HANDLER(%esp) + +NON_GPROF_ENTRY(linux_rt_sigcode) leal LINUX_RT_SIGF_UC(%esp),%ebx /* linux ucp */ leal LINUX_RT_SIGF_SC(%ebx),%ecx /* linux sigcontext */ - mov LINUX_SC_GS(%ecx),%gs - push %eax /* fake ret addr */ + movl %esp, %edi + call .getip1 +.getip1: + popl %eax + add $.startrtsigcode-.getip1, %eax /* ret address */ + push %eax + jmp *LINUX_RT_SIGF_HANDLER(%edi) +.startrtsigcode: movl $LINUX_SYS_linux_rt_sigreturn,%eax /* linux_rt_sigreturn() */ int $0x80 /* enter kernel with args */ +.endrtsigcode: 0: jmp 0b - ALIGN_TEXT -/* XXXXX */ -linux_esigcode: - .data - .globl linux_szsigcode, linux_sznonrtsigcode -linux_szsigcode: - .long linux_esigcode-linux_sigcode -linux_sznonrtsigcode: - .long linux_rt_sigcode-linux_sigcode +NON_GPROF_ENTRY(linux_vsyscall) +.startvsyscall: + int $0x80 + ret +.endvsyscall: + +#if 0 + .section .note.Linux, "a",@note + .long 2f - 1f /* namesz */ + .balign 4 + .long 4f - 3f /* descsz */ + .long 0 +1: + .asciz "Linux" +2: + .balign 4 +3: + .long LINUX_VERSION_CODE +4: + .balign 4 + .previous +#endif + +#define do_cfa_expr(offset) \ + .byte 0x0f; /* DW_CFA_def_cfa_expression */ \ + .uleb128 11f-10f; /* length */ \ +10: .byte 0x74; /* DW_OP_breg4 */ \ + .sleb128 offset; /* offset */ \ + .byte 0x06; /* DW_OP_deref */ \ +11: + + + /* CIE */ + .section .eh_frame,"a",@progbits +.LSTARTFRAMEDLSI1: + .long .LENDCIEDLSI1-.LSTARTCIEDLSI1 +.LSTARTCIEDLSI1: + .long 0 /* CIE ID */ + .byte 1 /* Version number */ + .string "zRS" /* NULL-terminated + * augmentation string + */ + .uleb128 1 /* Code alignment factor */ + .sleb128 -4 /* Data alignment factor */ + .byte 8 /* Return address + * register column + */ + .uleb128 1 /* Augmentation value length */ + .byte 0x1b /* DW_EH_PE_pcrel|DW_EH_PE_sdata4. */ + .byte 0 /* DW_CFA_nop */ + .align 4 +.LENDCIEDLSI1: + + /* FDE */ + .long .LENDFDEDLSI1-.LSTARTFDEDLSI1 /* Length FDE */ +.LSTARTFDEDLSI1: + .long .LSTARTFDEDLSI1-.LSTARTFRAMEDLSI1 /* CIE pointer */ + .long .startsigcode-. /* PC-relative start address */ + .long .endsigcode-.startsigcode + .uleb128 0 /* Augmentation */ + do_cfa_expr(LINUX_SIGF_SC-8) + .align 4 +.LENDFDEDLSI1: + + .long .LENDFDEDLSI2-.LSTARTFDEDLSI2 /* Length FDE */ +.LSTARTFDEDLSI2: + .long .LSTARTFDEDLSI2-.LSTARTFRAMEDLSI1 /* CIE pointer */ + .long .startrtsigcode-. /* PC-relative start address */ + .long .endrtsigcode-.startrtsigcode + .uleb128 0 /* Augmentation */ + do_cfa_expr(LINUX_RT_SIGF_SC-4+LINUX_SC_ESP) + .align 4 +.LENDFDEDLSI2: + .previous + + .section .eh_frame,"a",@progbits +.LSTARTFRAMEDLSI2: + .long .LENDCIEDLSI2-.LSTARTCIEDLSI2 +.LSTARTCIEDLSI2: + .long 0 /* CIE ID */ + .byte 1 /* Version number */ + .string "zR" /* NULL-terminated + * augmentation string + */ + .uleb128 1 /* Code alignment factor */ + .sleb128 -4 /* Data alignment factor */ + .byte 8 /* Return address register column */ + .uleb128 1 /* Augmentation value length */ + .byte 0x1b /* DW_EH_PE_pcrel|DW_EH_PE_sdata4. */ + .byte 0x0c /* DW_CFA_def_cfa */ + .uleb128 4 + .uleb128 4 + .byte 0x88 /* DW_CFA_offset, column 0x8 */ + .uleb128 1 + .align 4 +.LENDCIEDLSI2: + .long .LENDFDEDLSI3-.LSTARTFDEDLSI3 /* Length FDE */ +.LSTARTFDEDLSI3: + .long .LSTARTFDEDLSI3-.LSTARTFRAMEDLSI2 /* CIE pointer */ + .long .startvsyscall-. /* PC-relative start address */ + .long .endvsyscall-.startvsyscall + .uleb128 0 + .align 4 +.LENDFDEDLSI3: + .previous diff --git a/sys/i386/linux/linux_machdep.c b/sys/i386/linux/linux_machdep.c index d9c28d9483da..c9f969bed7f1 100644 --- a/sys/i386/linux/linux_machdep.c +++ b/sys/i386/linux/linux_machdep.c @@ -99,36 +99,13 @@ static int linux_mmap_common(struct thread *td, l_uintptr_t addr, l_size_t len, l_int prot, l_int flags, l_int fd, l_loff_t pos); -int -linux_to_bsd_sigaltstack(int lsa) -{ - int bsa = 0; - - if (lsa & LINUX_SS_DISABLE) - bsa |= SS_DISABLE; - if (lsa & LINUX_SS_ONSTACK) - bsa |= SS_ONSTACK; - return (bsa); -} - -int -bsd_to_linux_sigaltstack(int bsa) -{ - int lsa = 0; - - if (bsa & SS_DISABLE) - lsa |= LINUX_SS_DISABLE; - if (bsa & SS_ONSTACK) - lsa |= LINUX_SS_ONSTACK; - return (lsa); -} int linux_execve(struct thread *td, struct linux_execve_args *args) { - int error; - char *newpath; struct image_args eargs; + char *newpath; + int error; LCONVPATHEXIST(td, args->path, &newpath); @@ -141,15 +118,7 @@ linux_execve(struct thread *td, struct linux_execve_args *args) args->argp, args->envp); free(newpath, M_TEMP); if (error == 0) - error = kern_execve(td, &eargs, NULL); - if (error == 0) - /* linux process can exec fbsd one, dont attempt - * to create emuldata for such process using - * linux_proc_init, this leads to a panic on KASSERT - * because such process has p->p_emuldata == NULL - */ - if (SV_PROC_ABI(td->td_proc) == SV_ABI_LINUX) - error = linux_proc_init(td, 0, 0); + error = linux_common_execve(td, &eargs); return (error); } @@ -360,8 +329,14 @@ int linux_set_upcall_kse(struct thread *td, register_t stack) { - td->td_frame->tf_esp = stack; + if (stack) + td->td_frame->tf_esp = stack; + /* + * The newly created Linux thread returns + * to the user space by the same path that a parent do. + */ + td->td_frame->tf_eax = 0; return (0); } @@ -702,7 +677,7 @@ linux_sigaction(struct thread *td, struct linux_sigaction_args *args) act.lsa_flags = osa.lsa_flags; act.lsa_restorer = osa.lsa_restorer; LINUX_SIGEMPTYSET(act.lsa_mask); - act.lsa_mask.__bits[0] = osa.lsa_mask; + act.lsa_mask.__mask = osa.lsa_mask; } error = linux_do_sigaction(td, args->sig, args->nsa ? &act : NULL, @@ -712,7 +687,7 @@ linux_sigaction(struct thread *td, struct linux_sigaction_args *args) osa.lsa_handler = oact.lsa_handler; osa.lsa_flags = oact.lsa_flags; osa.lsa_restorer = oact.lsa_restorer; - osa.lsa_mask = oact.lsa_mask.__bits[0]; + osa.lsa_mask = oact.lsa_mask.__mask; error = copyout(&osa, args->osa, sizeof(l_osigaction_t)); } @@ -736,7 +711,7 @@ linux_sigsuspend(struct thread *td, struct linux_sigsuspend_args *args) #endif LINUX_SIGEMPTYSET(mask); - mask.__bits[0] = args->mask; + mask.__mask = args->mask; linux_to_bsd_sigset(&mask, &sigmask); return (kern_sigsuspend(td, sigmask)); } @@ -1040,34 +1015,3 @@ linux_mq_getsetattr(struct thread *td, struct linux_mq_getsetattr_args *args) return (ENOSYS); #endif } - -int -linux_wait4(struct thread *td, struct linux_wait4_args *args) -{ - int error, options; - struct rusage ru, *rup; - -#ifdef DEBUG - if (ldebug(wait4)) - printf(ARGS(wait4, "%d, %p, %d, %p"), - args->pid, (void *)args->status, args->options, - (void *)args->rusage); -#endif - - options = (args->options & (WNOHANG | WUNTRACED)); - /* WLINUXCLONE should be equal to __WCLONE, but we make sure */ - if (args->options & __WCLONE) - options |= WLINUXCLONE; - - if (args->rusage != NULL) - rup = &ru; - else - rup = NULL; - error = linux_common_wait(td, args->pid, args->status, options, rup); - if (error) - return (error); - if (args->rusage != NULL) - error = copyout(&ru, args->rusage, sizeof(ru)); - - return (error); -} diff --git a/sys/i386/linux/linux_proto.h b/sys/i386/linux/linux_proto.h index c542c1de0cab..a5d6ed2e158c 100644 --- a/sys/i386/linux/linux_proto.h +++ b/sys/i386/linux/linux_proto.h @@ -3,7 +3,7 @@ * * DO NOT EDIT-- this file is automatically generated. * $FreeBSD$ - * created from FreeBSD: head/sys/i386/linux/syscalls.master 276509 2015-01-01 18:41:34Z dchagin + * created from FreeBSD: head/sys/i386/linux/syscalls.master 283492 2015-05-24 18:08:01Z dchagin */ #ifndef _LINUX_SYSPROTO_H_ @@ -35,6 +35,9 @@ struct thread; #endif #define nosys linux_nosys +struct linux_exit_args { + char rval_l_[PADL_(int)]; int rval; char rval_r_[PADR_(int)]; +}; struct linux_fork_args { register_t dummy; }; @@ -357,7 +360,7 @@ struct linux_wait4_args { char pid_l_[PADL_(l_pid_t)]; l_pid_t pid; char pid_r_[PADR_(l_pid_t)]; char status_l_[PADL_(l_int *)]; l_int * status; char status_r_[PADR_(l_int *)]; char options_l_[PADL_(l_int)]; l_int options; char options_r_[PADR_(l_int)]; - char rusage_l_[PADL_(struct l_rusage *)]; struct l_rusage * rusage; char rusage_r_[PADR_(struct l_rusage *)]; + char rusage_l_[PADL_(void *)]; void * rusage; char rusage_r_[PADR_(void *)]; }; struct linux_swapoff_args { register_t dummy; @@ -473,6 +476,14 @@ struct linux_fdatasync_args { struct linux_sysctl_args { char args_l_[PADL_(struct l___sysctl_args *)]; struct l___sysctl_args * args; char args_r_[PADR_(struct l___sysctl_args *)]; }; +struct linux_sched_setparam_args { + char pid_l_[PADL_(l_pid_t)]; l_pid_t pid; char pid_r_[PADR_(l_pid_t)]; + char param_l_[PADL_(struct l_sched_param *)]; struct l_sched_param * param; char param_r_[PADR_(struct l_sched_param *)]; +}; +struct linux_sched_getparam_args { + char pid_l_[PADL_(l_pid_t)]; l_pid_t pid; char pid_r_[PADR_(l_pid_t)]; + char param_l_[PADL_(struct l_sched_param *)]; struct l_sched_param * param; char param_r_[PADR_(struct l_sched_param *)]; +}; struct linux_sched_setscheduler_args { char pid_l_[PADL_(l_pid_t)]; l_pid_t pid; char pid_r_[PADR_(l_pid_t)]; char policy_l_[PADL_(l_int)]; l_int policy; char policy_r_[PADR_(l_int)]; @@ -487,6 +498,10 @@ struct linux_sched_get_priority_max_args { struct linux_sched_get_priority_min_args { char policy_l_[PADL_(l_int)]; l_int policy; char policy_r_[PADR_(l_int)]; }; +struct linux_sched_rr_get_interval_args { + char pid_l_[PADL_(l_pid_t)]; l_pid_t pid; char pid_r_[PADR_(l_pid_t)]; + char interval_l_[PADL_(struct l_timespec *)]; struct l_timespec * interval; char interval_r_[PADR_(struct l_timespec *)]; +}; struct linux_nanosleep_args { char rqtp_l_[PADL_(const struct l_timespec *)]; const struct l_timespec * rqtp; char rqtp_r_[PADR_(const struct l_timespec *)]; char rmtp_l_[PADL_(struct l_timespec *)]; struct l_timespec * rmtp; char rmtp_r_[PADR_(struct l_timespec *)]; @@ -560,7 +575,9 @@ struct linux_rt_sigtimedwait_args { char sigsetsize_l_[PADL_(l_size_t)]; l_size_t sigsetsize; char sigsetsize_r_[PADR_(l_size_t)]; }; struct linux_rt_sigqueueinfo_args { - register_t dummy; + char pid_l_[PADL_(l_pid_t)]; l_pid_t pid; char pid_r_[PADR_(l_pid_t)]; + char sig_l_[PADL_(l_int)]; l_int sig; char sig_r_[PADR_(l_int)]; + char info_l_[PADL_(l_siginfo_t *)]; l_siginfo_t * info; char info_r_[PADR_(l_siginfo_t *)]; }; struct linux_rt_sigsuspend_args { char newset_l_[PADL_(l_sigset_t *)]; l_sigset_t * newset; char newset_r_[PADR_(l_sigset_t *)]; @@ -766,13 +783,19 @@ struct linux_lookup_dcookie_args { register_t dummy; }; struct linux_epoll_create_args { - register_t dummy; + char size_l_[PADL_(l_int)]; l_int size; char size_r_[PADR_(l_int)]; }; struct linux_epoll_ctl_args { - register_t dummy; + char epfd_l_[PADL_(l_int)]; l_int epfd; char epfd_r_[PADR_(l_int)]; + char op_l_[PADL_(l_int)]; l_int op; char op_r_[PADR_(l_int)]; + char fd_l_[PADL_(l_int)]; l_int fd; char fd_r_[PADR_(l_int)]; + char event_l_[PADL_(struct epoll_event *)]; struct epoll_event * event; char event_r_[PADR_(struct epoll_event *)]; }; struct linux_epoll_wait_args { - register_t dummy; + char epfd_l_[PADL_(l_int)]; l_int epfd; char epfd_r_[PADR_(l_int)]; + char events_l_[PADL_(struct epoll_event *)]; struct epoll_event * events; char events_r_[PADR_(struct epoll_event *)]; + char maxevents_l_[PADL_(l_int)]; l_int maxevents; char maxevents_r_[PADR_(l_int)]; + char timeout_l_[PADL_(l_int)]; l_int timeout; char timeout_r_[PADR_(l_int)]; }; struct linux_remap_file_pages_args { register_t dummy; @@ -887,7 +910,11 @@ struct linux_kexec_load_args { register_t dummy; }; struct linux_waitid_args { - register_t dummy; + char idtype_l_[PADL_(int)]; int idtype; char idtype_r_[PADR_(int)]; + char id_l_[PADL_(l_pid_t)]; l_pid_t id; char id_r_[PADR_(l_pid_t)]; + char info_l_[PADL_(l_siginfo_t *)]; l_siginfo_t * info; char info_r_[PADR_(l_siginfo_t *)]; + char options_l_[PADL_(int)]; int options; char options_r_[PADR_(int)]; + char rusage_l_[PADL_(void *)]; void * rusage; char rusage_r_[PADR_(void *)]; }; struct linux_add_key_args { register_t dummy; @@ -989,13 +1016,21 @@ struct linux_faccessat_args { char dfd_l_[PADL_(l_int)]; l_int dfd; char dfd_r_[PADR_(l_int)]; char filename_l_[PADL_(const char *)]; const char * filename; char filename_r_[PADR_(const char *)]; char amode_l_[PADL_(l_int)]; l_int amode; char amode_r_[PADR_(l_int)]; - char flag_l_[PADL_(l_int)]; l_int flag; char flag_r_[PADR_(l_int)]; }; struct linux_pselect6_args { - register_t dummy; + char nfds_l_[PADL_(l_int)]; l_int nfds; char nfds_r_[PADR_(l_int)]; + char readfds_l_[PADL_(l_fd_set *)]; l_fd_set * readfds; char readfds_r_[PADR_(l_fd_set *)]; + char writefds_l_[PADL_(l_fd_set *)]; l_fd_set * writefds; char writefds_r_[PADR_(l_fd_set *)]; + char exceptfds_l_[PADL_(l_fd_set *)]; l_fd_set * exceptfds; char exceptfds_r_[PADR_(l_fd_set *)]; + char tsp_l_[PADL_(struct l_timespec *)]; struct l_timespec * tsp; char tsp_r_[PADR_(struct l_timespec *)]; + char sig_l_[PADL_(l_uintptr_t *)]; l_uintptr_t * sig; char sig_r_[PADR_(l_uintptr_t *)]; }; struct linux_ppoll_args { - register_t dummy; + char fds_l_[PADL_(struct pollfd *)]; struct pollfd * fds; char fds_r_[PADR_(struct pollfd *)]; + char nfds_l_[PADL_(uint32_t)]; uint32_t nfds; char nfds_r_[PADR_(uint32_t)]; + char tsp_l_[PADL_(struct l_timespec *)]; struct l_timespec * tsp; char tsp_r_[PADR_(struct l_timespec *)]; + char sset_l_[PADL_(l_sigset_t *)]; l_sigset_t * sset; char sset_r_[PADR_(l_sigset_t *)]; + char ssize_l_[PADL_(l_size_t)]; l_size_t ssize; char ssize_r_[PADR_(l_size_t)]; }; struct linux_unshare_args { register_t dummy; @@ -1028,10 +1063,17 @@ struct linux_getcpu_args { register_t dummy; }; struct linux_epoll_pwait_args { - register_t dummy; + char epfd_l_[PADL_(l_int)]; l_int epfd; char epfd_r_[PADR_(l_int)]; + char events_l_[PADL_(struct epoll_event *)]; struct epoll_event * events; char events_r_[PADR_(struct epoll_event *)]; + char maxevents_l_[PADL_(l_int)]; l_int maxevents; char maxevents_r_[PADR_(l_int)]; + char timeout_l_[PADL_(l_int)]; l_int timeout; char timeout_r_[PADR_(l_int)]; + char mask_l_[PADL_(l_sigset_t *)]; l_sigset_t * mask; char mask_r_[PADR_(l_sigset_t *)]; }; struct linux_utimensat_args { - register_t dummy; + char dfd_l_[PADL_(l_int)]; l_int dfd; char dfd_r_[PADR_(l_int)]; + char pathname_l_[PADL_(const char *)]; const char * pathname; char pathname_r_[PADR_(const char *)]; + char times_l_[PADL_(const struct l_timespec *)]; const struct l_timespec * times; char times_r_[PADR_(const struct l_timespec *)]; + char flags_l_[PADL_(l_int)]; l_int flags; char flags_r_[PADR_(l_int)]; }; struct linux_signalfd_args { register_t dummy; @@ -1040,10 +1082,13 @@ struct linux_timerfd_create_args { register_t dummy; }; struct linux_eventfd_args { - register_t dummy; + char initval_l_[PADL_(l_uint)]; l_uint initval; char initval_r_[PADR_(l_uint)]; }; struct linux_fallocate_args { - register_t dummy; + char fd_l_[PADL_(l_int)]; l_int fd; char fd_r_[PADR_(l_int)]; + char mode_l_[PADL_(l_int)]; l_int mode; char mode_r_[PADR_(l_int)]; + char offset_l_[PADL_(l_loff_t)]; l_loff_t offset; char offset_r_[PADR_(l_loff_t)]; + char len_l_[PADL_(l_loff_t)]; l_loff_t len; char len_r_[PADR_(l_loff_t)]; }; struct linux_timerfd_settime_args { register_t dummy; @@ -1055,13 +1100,16 @@ struct linux_signalfd4_args { register_t dummy; }; struct linux_eventfd2_args { - register_t dummy; + char initval_l_[PADL_(l_uint)]; l_uint initval; char initval_r_[PADR_(l_uint)]; + char flags_l_[PADL_(l_int)]; l_int flags; char flags_r_[PADR_(l_int)]; }; struct linux_epoll_create1_args { - register_t dummy; + char flags_l_[PADL_(l_int)]; l_int flags; char flags_r_[PADR_(l_int)]; }; struct linux_dup3_args { - register_t dummy; + char oldfd_l_[PADL_(l_int)]; l_int oldfd; char oldfd_r_[PADR_(l_int)]; + char newfd_l_[PADL_(l_int)]; l_int newfd; char newfd_r_[PADR_(l_int)]; + char flags_l_[PADL_(l_int)]; l_int flags; char flags_r_[PADR_(l_int)]; }; struct linux_pipe2_args { char pipefds_l_[PADL_(l_int *)]; l_int * pipefds; char pipefds_r_[PADR_(l_int *)]; @@ -1083,7 +1131,11 @@ struct linux_perf_event_open_args { register_t dummy; }; struct linux_recvmmsg_args { - register_t dummy; + char s_l_[PADL_(l_int)]; l_int s; char s_r_[PADR_(l_int)]; + char msg_l_[PADL_(struct l_mmsghdr *)]; struct l_mmsghdr * msg; char msg_r_[PADR_(struct l_mmsghdr *)]; + char vlen_l_[PADL_(l_uint)]; l_uint vlen; char vlen_r_[PADR_(l_uint)]; + char flags_l_[PADL_(l_uint)]; l_uint flags; char flags_r_[PADR_(l_uint)]; + char timeout_l_[PADL_(struct l_timespec *)]; struct l_timespec * timeout; char timeout_r_[PADR_(struct l_timespec *)]; }; struct linux_fanotify_init_args { register_t dummy; @@ -1092,7 +1144,10 @@ struct linux_fanotify_mark_args { register_t dummy; }; struct linux_prlimit64_args { - register_t dummy; + char pid_l_[PADL_(l_pid_t)]; l_pid_t pid; char pid_r_[PADR_(l_pid_t)]; + char resource_l_[PADL_(l_uint)]; l_uint resource; char resource_r_[PADR_(l_uint)]; + char new_l_[PADL_(struct rlimit *)]; struct rlimit * new; char new_r_[PADR_(struct rlimit *)]; + char old_l_[PADL_(struct rlimit *)]; struct rlimit * old; char old_r_[PADR_(struct rlimit *)]; }; struct linux_name_to_handle_at_args { register_t dummy; @@ -1104,10 +1159,13 @@ struct linux_clock_adjtime_args { register_t dummy; }; struct linux_syncfs_args { - register_t dummy; + char fd_l_[PADL_(l_int)]; l_int fd; char fd_r_[PADR_(l_int)]; }; struct linux_sendmmsg_args { - register_t dummy; + char s_l_[PADL_(l_int)]; l_int s; char s_r_[PADR_(l_int)]; + char msg_l_[PADL_(struct l_mmsghdr *)]; struct l_mmsghdr * msg; char msg_r_[PADR_(struct l_mmsghdr *)]; + char vlen_l_[PADL_(l_uint)]; l_uint vlen; char vlen_r_[PADR_(l_uint)]; + char flags_l_[PADL_(l_uint)]; l_uint flags; char flags_r_[PADR_(l_uint)]; }; struct linux_setns_args { register_t dummy; @@ -1119,6 +1177,7 @@ struct linux_process_vm_writev_args { register_t dummy; }; #define nosys linux_nosys +int linux_exit(struct thread *, struct linux_exit_args *); int linux_fork(struct thread *, struct linux_fork_args *); int linux_open(struct thread *, struct linux_open_args *); int linux_waitpid(struct thread *, struct linux_waitpid_args *); @@ -1230,10 +1289,13 @@ int linux_msync(struct thread *, struct linux_msync_args *); int linux_getsid(struct thread *, struct linux_getsid_args *); int linux_fdatasync(struct thread *, struct linux_fdatasync_args *); int linux_sysctl(struct thread *, struct linux_sysctl_args *); +int linux_sched_setparam(struct thread *, struct linux_sched_setparam_args *); +int linux_sched_getparam(struct thread *, struct linux_sched_getparam_args *); int linux_sched_setscheduler(struct thread *, struct linux_sched_setscheduler_args *); int linux_sched_getscheduler(struct thread *, struct linux_sched_getscheduler_args *); int linux_sched_get_priority_max(struct thread *, struct linux_sched_get_priority_max_args *); int linux_sched_get_priority_min(struct thread *, struct linux_sched_get_priority_min_args *); +int linux_sched_rr_get_interval(struct thread *, struct linux_sched_rr_get_interval_args *); int linux_nanosleep(struct thread *, struct linux_nanosleep_args *); int linux_mremap(struct thread *, struct linux_mremap_args *); int linux_setresuid16(struct thread *, struct linux_setresuid16_args *); @@ -1422,6 +1484,7 @@ int linux_process_vm_writev(struct thread *, struct linux_process_vm_writev_args #endif /* COMPAT_FREEBSD7 */ +#define LINUX_SYS_AUE_linux_exit AUE_EXIT #define LINUX_SYS_AUE_linux_fork AUE_FORK #define LINUX_SYS_AUE_linux_open AUE_OPEN_RWTC #define LINUX_SYS_AUE_linux_waitpid AUE_WAIT4 @@ -1533,10 +1596,13 @@ int linux_process_vm_writev(struct thread *, struct linux_process_vm_writev_args #define LINUX_SYS_AUE_linux_getsid AUE_GETSID #define LINUX_SYS_AUE_linux_fdatasync AUE_NULL #define LINUX_SYS_AUE_linux_sysctl AUE_SYSCTL +#define LINUX_SYS_AUE_linux_sched_setparam AUE_SCHED_SETPARAM +#define LINUX_SYS_AUE_linux_sched_getparam AUE_SCHED_GETPARAM #define LINUX_SYS_AUE_linux_sched_setscheduler AUE_SCHED_SETSCHEDULER #define LINUX_SYS_AUE_linux_sched_getscheduler AUE_SCHED_GETSCHEDULER #define LINUX_SYS_AUE_linux_sched_get_priority_max AUE_SCHED_GET_PRIORITY_MAX #define LINUX_SYS_AUE_linux_sched_get_priority_min AUE_SCHED_GET_PRIORITY_MIN +#define LINUX_SYS_AUE_linux_sched_rr_get_interval AUE_SCHED_RR_GET_INTERVAL #define LINUX_SYS_AUE_linux_nanosleep AUE_NULL #define LINUX_SYS_AUE_linux_mremap AUE_NULL #define LINUX_SYS_AUE_linux_setresuid16 AUE_SETRESUID @@ -1633,7 +1699,7 @@ int linux_process_vm_writev(struct thread *, struct linux_process_vm_writev_args #define LINUX_SYS_AUE_linux_mq_notify AUE_NULL #define LINUX_SYS_AUE_linux_mq_getsetattr AUE_NULL #define LINUX_SYS_AUE_linux_kexec_load AUE_NULL -#define LINUX_SYS_AUE_linux_waitid AUE_NULL +#define LINUX_SYS_AUE_linux_waitid AUE_WAIT6 #define LINUX_SYS_AUE_linux_add_key AUE_NULL #define LINUX_SYS_AUE_linux_request_key AUE_NULL #define LINUX_SYS_AUE_linux_keyctl AUE_NULL @@ -1656,8 +1722,8 @@ int linux_process_vm_writev(struct thread *, struct linux_process_vm_writev_args #define LINUX_SYS_AUE_linux_readlinkat AUE_READLINKAT #define LINUX_SYS_AUE_linux_fchmodat AUE_FCHMODAT #define LINUX_SYS_AUE_linux_faccessat AUE_FACCESSAT -#define LINUX_SYS_AUE_linux_pselect6 AUE_NULL -#define LINUX_SYS_AUE_linux_ppoll AUE_NULL +#define LINUX_SYS_AUE_linux_pselect6 AUE_SELECT +#define LINUX_SYS_AUE_linux_ppoll AUE_POLL #define LINUX_SYS_AUE_linux_unshare AUE_NULL #define LINUX_SYS_AUE_linux_set_robust_list AUE_NULL #define LINUX_SYS_AUE_linux_get_robust_list AUE_NULL @@ -1668,7 +1734,7 @@ int linux_process_vm_writev(struct thread *, struct linux_process_vm_writev_args #define LINUX_SYS_AUE_linux_move_pages AUE_NULL #define LINUX_SYS_AUE_linux_getcpu AUE_NULL #define LINUX_SYS_AUE_linux_epoll_pwait AUE_NULL -#define LINUX_SYS_AUE_linux_utimensat AUE_NULL +#define LINUX_SYS_AUE_linux_utimensat AUE_FUTIMESAT #define LINUX_SYS_AUE_linux_signalfd AUE_NULL #define LINUX_SYS_AUE_linux_timerfd_create AUE_NULL #define LINUX_SYS_AUE_linux_eventfd AUE_NULL @@ -1692,7 +1758,7 @@ int linux_process_vm_writev(struct thread *, struct linux_process_vm_writev_args #define LINUX_SYS_AUE_linux_name_to_handle_at AUE_NULL #define LINUX_SYS_AUE_linux_open_by_handle_at AUE_NULL #define LINUX_SYS_AUE_linux_clock_adjtime AUE_NULL -#define LINUX_SYS_AUE_linux_syncfs AUE_NULL +#define LINUX_SYS_AUE_linux_syncfs AUE_SYNC #define LINUX_SYS_AUE_linux_sendmmsg AUE_NULL #define LINUX_SYS_AUE_linux_setns AUE_NULL #define LINUX_SYS_AUE_linux_process_vm_readv AUE_NULL diff --git a/sys/i386/linux/linux_ptrace.c b/sys/i386/linux/linux_ptrace.c index 46a1169d7025..2925e6bc0107 100644 --- a/sys/i386/linux/linux_ptrace.c +++ b/sys/i386/linux/linux_ptrace.c @@ -91,8 +91,7 @@ static __inline int map_signum(int signum) { - if (signum > 0 && signum <= LINUX_SIGTBLSZ) - signum = linux_to_bsd_signal[_SIG_IDX(signum)]; + signum = linux_to_bsd_signal(signum); return ((signum == SIGSTOP)? 0 : signum); } diff --git a/sys/i386/linux/linux_syscall.h b/sys/i386/linux/linux_syscall.h index 178e97c56c13..60c284a656b8 100644 --- a/sys/i386/linux/linux_syscall.h +++ b/sys/i386/linux/linux_syscall.h @@ -3,10 +3,10 @@ * * DO NOT EDIT-- this file is automatically generated. * $FreeBSD$ - * created from FreeBSD: head/sys/i386/linux/syscalls.master 276509 2015-01-01 18:41:34Z dchagin + * created from FreeBSD: head/sys/i386/linux/syscalls.master 283492 2015-05-24 18:08:01Z dchagin */ -#define LINUX_SYS_exit 1 +#define LINUX_SYS_linux_exit 1 #define LINUX_SYS_linux_fork 2 #define LINUX_SYS_read 3 #define LINUX_SYS_write 4 @@ -148,14 +148,14 @@ #define LINUX_SYS_munlock 151 #define LINUX_SYS_mlockall 152 #define LINUX_SYS_munlockall 153 -#define LINUX_SYS_sched_setparam 154 -#define LINUX_SYS_sched_getparam 155 +#define LINUX_SYS_linux_sched_setparam 154 +#define LINUX_SYS_linux_sched_getparam 155 #define LINUX_SYS_linux_sched_setscheduler 156 #define LINUX_SYS_linux_sched_getscheduler 157 #define LINUX_SYS_sched_yield 158 #define LINUX_SYS_linux_sched_get_priority_max 159 #define LINUX_SYS_linux_sched_get_priority_min 160 -#define LINUX_SYS_sched_rr_get_interval 161 +#define LINUX_SYS_linux_sched_rr_get_interval 161 #define LINUX_SYS_linux_nanosleep 162 #define LINUX_SYS_linux_mremap 163 #define LINUX_SYS_linux_setresuid16 164 @@ -328,4 +328,4 @@ #define LINUX_SYS_linux_setns 346 #define LINUX_SYS_linux_process_vm_readv 347 #define LINUX_SYS_linux_process_vm_writev 348 -#define LINUX_SYS_MAXSYSCALL 349 +#define LINUX_SYS_MAXSYSCALL 350 diff --git a/sys/i386/linux/linux_syscalls.c b/sys/i386/linux/linux_syscalls.c index ea05c03b5bf9..64556a9b6cd7 100644 --- a/sys/i386/linux/linux_syscalls.c +++ b/sys/i386/linux/linux_syscalls.c @@ -3,13 +3,13 @@ * * DO NOT EDIT-- this file is automatically generated. * $FreeBSD$ - * created from FreeBSD: head/sys/i386/linux/syscalls.master 276509 2015-01-01 18:41:34Z dchagin + * created from FreeBSD: head/sys/i386/linux/syscalls.master 283492 2015-05-24 18:08:01Z dchagin */ const char *linux_syscallnames[] = { #define nosys linux_nosys "#0", /* 0 = setup */ - "exit", /* 1 = exit */ + "linux_exit", /* 1 = linux_exit */ "linux_fork", /* 2 = linux_fork */ "read", /* 3 = read */ "write", /* 4 = write */ @@ -162,14 +162,14 @@ const char *linux_syscallnames[] = { "munlock", /* 151 = munlock */ "mlockall", /* 152 = mlockall */ "munlockall", /* 153 = munlockall */ - "sched_setparam", /* 154 = sched_setparam */ - "sched_getparam", /* 155 = sched_getparam */ + "linux_sched_setparam", /* 154 = linux_sched_setparam */ + "linux_sched_getparam", /* 155 = linux_sched_getparam */ "linux_sched_setscheduler", /* 156 = linux_sched_setscheduler */ "linux_sched_getscheduler", /* 157 = linux_sched_getscheduler */ "sched_yield", /* 158 = sched_yield */ "linux_sched_get_priority_max", /* 159 = linux_sched_get_priority_max */ "linux_sched_get_priority_min", /* 160 = linux_sched_get_priority_min */ - "sched_rr_get_interval", /* 161 = sched_rr_get_interval */ + "linux_sched_rr_get_interval", /* 161 = linux_sched_rr_get_interval */ "linux_nanosleep", /* 162 = linux_nanosleep */ "linux_mremap", /* 163 = linux_mremap */ "linux_setresuid16", /* 164 = linux_setresuid16 */ @@ -357,4 +357,5 @@ const char *linux_syscallnames[] = { "linux_setns", /* 346 = linux_setns */ "linux_process_vm_readv", /* 347 = linux_process_vm_readv */ "linux_process_vm_writev", /* 348 = linux_process_vm_writev */ + "#349", /* 349 = nosys */ }; diff --git a/sys/i386/linux/linux_sysent.c b/sys/i386/linux/linux_sysent.c index 5e42a0d4252b..922ddbb19aed 100644 --- a/sys/i386/linux/linux_sysent.c +++ b/sys/i386/linux/linux_sysent.c @@ -3,7 +3,7 @@ * * DO NOT EDIT-- this file is automatically generated. * $FreeBSD$ - * created from FreeBSD: head/sys/i386/linux/syscalls.master 276509 2015-01-01 18:41:34Z dchagin + * created from FreeBSD: head/sys/i386/linux/syscalls.master 283492 2015-05-24 18:08:01Z dchagin */ #include @@ -19,7 +19,7 @@ struct sysent linux_sysent[] = { #define nosys linux_nosys { 0, (sy_call_t *)nosys, AUE_NULL, NULL, 0, 0, 0, SY_THR_ABSENT }, /* 0 = setup */ - { AS(sys_exit_args), (sy_call_t *)sys_sys_exit, AUE_EXIT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 1 = exit */ + { AS(linux_exit_args), (sy_call_t *)linux_exit, AUE_EXIT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 1 = linux_exit */ { 0, (sy_call_t *)linux_fork, AUE_FORK, NULL, 0, 0, 0, SY_THR_STATIC }, /* 2 = linux_fork */ { AS(read_args), (sy_call_t *)sys_read, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 3 = read */ { AS(write_args), (sy_call_t *)sys_write, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 4 = write */ @@ -172,14 +172,14 @@ struct sysent linux_sysent[] = { { AS(munlock_args), (sy_call_t *)sys_munlock, AUE_MUNLOCK, NULL, 0, 0, 0, SY_THR_STATIC }, /* 151 = munlock */ { AS(mlockall_args), (sy_call_t *)sys_mlockall, AUE_MLOCKALL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 152 = mlockall */ { 0, (sy_call_t *)sys_munlockall, AUE_MUNLOCKALL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 153 = munlockall */ - { AS(sched_setparam_args), (sy_call_t *)sys_sched_setparam, AUE_SCHED_SETPARAM, NULL, 0, 0, 0, SY_THR_STATIC }, /* 154 = sched_setparam */ - { AS(sched_getparam_args), (sy_call_t *)sys_sched_getparam, AUE_SCHED_GETPARAM, NULL, 0, 0, 0, SY_THR_STATIC }, /* 155 = sched_getparam */ + { AS(linux_sched_setparam_args), (sy_call_t *)linux_sched_setparam, AUE_SCHED_SETPARAM, NULL, 0, 0, 0, SY_THR_STATIC }, /* 154 = linux_sched_setparam */ + { AS(linux_sched_getparam_args), (sy_call_t *)linux_sched_getparam, AUE_SCHED_GETPARAM, NULL, 0, 0, 0, SY_THR_STATIC }, /* 155 = linux_sched_getparam */ { AS(linux_sched_setscheduler_args), (sy_call_t *)linux_sched_setscheduler, AUE_SCHED_SETSCHEDULER, NULL, 0, 0, 0, SY_THR_STATIC }, /* 156 = linux_sched_setscheduler */ { AS(linux_sched_getscheduler_args), (sy_call_t *)linux_sched_getscheduler, AUE_SCHED_GETSCHEDULER, NULL, 0, 0, 0, SY_THR_STATIC }, /* 157 = linux_sched_getscheduler */ { 0, (sy_call_t *)sys_sched_yield, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 158 = sched_yield */ { AS(linux_sched_get_priority_max_args), (sy_call_t *)linux_sched_get_priority_max, AUE_SCHED_GET_PRIORITY_MAX, NULL, 0, 0, 0, SY_THR_STATIC }, /* 159 = linux_sched_get_priority_max */ { AS(linux_sched_get_priority_min_args), (sy_call_t *)linux_sched_get_priority_min, AUE_SCHED_GET_PRIORITY_MIN, NULL, 0, 0, 0, SY_THR_STATIC }, /* 160 = linux_sched_get_priority_min */ - { AS(sched_rr_get_interval_args), (sy_call_t *)sys_sched_rr_get_interval, AUE_SCHED_RR_GET_INTERVAL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 161 = sched_rr_get_interval */ + { AS(linux_sched_rr_get_interval_args), (sy_call_t *)linux_sched_rr_get_interval, AUE_SCHED_RR_GET_INTERVAL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 161 = linux_sched_rr_get_interval */ { AS(linux_nanosleep_args), (sy_call_t *)linux_nanosleep, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 162 = linux_nanosleep */ { AS(linux_mremap_args), (sy_call_t *)linux_mremap, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 163 = linux_mremap */ { AS(linux_setresuid16_args), (sy_call_t *)linux_setresuid16, AUE_SETRESUID, NULL, 0, 0, 0, SY_THR_STATIC }, /* 164 = linux_setresuid16 */ @@ -196,7 +196,7 @@ struct sysent linux_sysent[] = { { AS(linux_rt_sigprocmask_args), (sy_call_t *)linux_rt_sigprocmask, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 175 = linux_rt_sigprocmask */ { AS(linux_rt_sigpending_args), (sy_call_t *)linux_rt_sigpending, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 176 = linux_rt_sigpending */ { AS(linux_rt_sigtimedwait_args), (sy_call_t *)linux_rt_sigtimedwait, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 177 = linux_rt_sigtimedwait */ - { 0, (sy_call_t *)linux_rt_sigqueueinfo, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 178 = linux_rt_sigqueueinfo */ + { AS(linux_rt_sigqueueinfo_args), (sy_call_t *)linux_rt_sigqueueinfo, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 178 = linux_rt_sigqueueinfo */ { AS(linux_rt_sigsuspend_args), (sy_call_t *)linux_rt_sigsuspend, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 179 = linux_rt_sigsuspend */ { AS(linux_pread_args), (sy_call_t *)linux_pread, AUE_PREAD, NULL, 0, 0, 0, SY_THR_STATIC }, /* 180 = linux_pread */ { AS(linux_pwrite_args), (sy_call_t *)linux_pwrite, AUE_PWRITE, NULL, 0, 0, 0, SY_THR_STATIC }, /* 181 = linux_pwrite */ @@ -272,9 +272,9 @@ struct sysent linux_sysent[] = { { 0, (sy_call_t *)nosys, AUE_NULL, NULL, 0, 0, 0, SY_THR_ABSENT }, /* 251 = */ { AS(linux_exit_group_args), (sy_call_t *)linux_exit_group, AUE_EXIT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 252 = linux_exit_group */ { 0, (sy_call_t *)linux_lookup_dcookie, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 253 = linux_lookup_dcookie */ - { 0, (sy_call_t *)linux_epoll_create, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 254 = linux_epoll_create */ - { 0, (sy_call_t *)linux_epoll_ctl, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 255 = linux_epoll_ctl */ - { 0, (sy_call_t *)linux_epoll_wait, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 256 = linux_epoll_wait */ + { AS(linux_epoll_create_args), (sy_call_t *)linux_epoll_create, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 254 = linux_epoll_create */ + { AS(linux_epoll_ctl_args), (sy_call_t *)linux_epoll_ctl, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 255 = linux_epoll_ctl */ + { AS(linux_epoll_wait_args), (sy_call_t *)linux_epoll_wait, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 256 = linux_epoll_wait */ { 0, (sy_call_t *)linux_remap_file_pages, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 257 = linux_remap_file_pages */ { AS(linux_set_tid_address_args), (sy_call_t *)linux_set_tid_address, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 258 = linux_set_tid_address */ { AS(linux_timer_create_args), (sy_call_t *)linux_timer_create, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 259 = linux_timer_create */ @@ -302,7 +302,7 @@ struct sysent linux_sysent[] = { { AS(linux_mq_notify_args), (sy_call_t *)linux_mq_notify, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 281 = linux_mq_notify */ { AS(linux_mq_getsetattr_args), (sy_call_t *)linux_mq_getsetattr, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 282 = linux_mq_getsetattr */ { 0, (sy_call_t *)linux_kexec_load, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 283 = linux_kexec_load */ - { 0, (sy_call_t *)linux_waitid, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 284 = linux_waitid */ + { AS(linux_waitid_args), (sy_call_t *)linux_waitid, AUE_WAIT6, NULL, 0, 0, 0, SY_THR_STATIC }, /* 284 = linux_waitid */ { 0, (sy_call_t *)nosys, AUE_NULL, NULL, 0, 0, 0, SY_THR_ABSENT }, /* 285 = */ { 0, (sy_call_t *)linux_add_key, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 286 = linux_add_key */ { 0, (sy_call_t *)linux_request_key, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 287 = linux_request_key */ @@ -326,8 +326,8 @@ struct sysent linux_sysent[] = { { AS(linux_readlinkat_args), (sy_call_t *)linux_readlinkat, AUE_READLINKAT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 305 = linux_readlinkat */ { AS(linux_fchmodat_args), (sy_call_t *)linux_fchmodat, AUE_FCHMODAT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 306 = linux_fchmodat */ { AS(linux_faccessat_args), (sy_call_t *)linux_faccessat, AUE_FACCESSAT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 307 = linux_faccessat */ - { 0, (sy_call_t *)linux_pselect6, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 308 = linux_pselect6 */ - { 0, (sy_call_t *)linux_ppoll, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 309 = linux_ppoll */ + { AS(linux_pselect6_args), (sy_call_t *)linux_pselect6, AUE_SELECT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 308 = linux_pselect6 */ + { AS(linux_ppoll_args), (sy_call_t *)linux_ppoll, AUE_POLL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 309 = linux_ppoll */ { 0, (sy_call_t *)linux_unshare, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 310 = linux_unshare */ { AS(linux_set_robust_list_args), (sy_call_t *)linux_set_robust_list, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 311 = linux_set_robust_list */ { AS(linux_get_robust_list_args), (sy_call_t *)linux_get_robust_list, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 312 = linux_get_robust_list */ @@ -337,34 +337,35 @@ struct sysent linux_sysent[] = { { 0, (sy_call_t *)linux_vmsplice, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 316 = linux_vmsplice */ { 0, (sy_call_t *)linux_move_pages, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 317 = linux_move_pages */ { 0, (sy_call_t *)linux_getcpu, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 318 = linux_getcpu */ - { 0, (sy_call_t *)linux_epoll_pwait, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 319 = linux_epoll_pwait */ - { 0, (sy_call_t *)linux_utimensat, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 320 = linux_utimensat */ + { AS(linux_epoll_pwait_args), (sy_call_t *)linux_epoll_pwait, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 319 = linux_epoll_pwait */ + { AS(linux_utimensat_args), (sy_call_t *)linux_utimensat, AUE_FUTIMESAT, NULL, 0, 0, 0, SY_THR_STATIC }, /* 320 = linux_utimensat */ { 0, (sy_call_t *)linux_signalfd, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 321 = linux_signalfd */ { 0, (sy_call_t *)linux_timerfd_create, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 322 = linux_timerfd_create */ - { 0, (sy_call_t *)linux_eventfd, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 323 = linux_eventfd */ - { 0, (sy_call_t *)linux_fallocate, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 324 = linux_fallocate */ + { AS(linux_eventfd_args), (sy_call_t *)linux_eventfd, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 323 = linux_eventfd */ + { AS(linux_fallocate_args), (sy_call_t *)linux_fallocate, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 324 = linux_fallocate */ { 0, (sy_call_t *)linux_timerfd_settime, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 325 = linux_timerfd_settime */ { 0, (sy_call_t *)linux_timerfd_gettime, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 326 = linux_timerfd_gettime */ { 0, (sy_call_t *)linux_signalfd4, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 327 = linux_signalfd4 */ - { 0, (sy_call_t *)linux_eventfd2, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 328 = linux_eventfd2 */ - { 0, (sy_call_t *)linux_epoll_create1, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 329 = linux_epoll_create1 */ - { 0, (sy_call_t *)linux_dup3, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 330 = linux_dup3 */ + { AS(linux_eventfd2_args), (sy_call_t *)linux_eventfd2, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 328 = linux_eventfd2 */ + { AS(linux_epoll_create1_args), (sy_call_t *)linux_epoll_create1, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 329 = linux_epoll_create1 */ + { AS(linux_dup3_args), (sy_call_t *)linux_dup3, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 330 = linux_dup3 */ { AS(linux_pipe2_args), (sy_call_t *)linux_pipe2, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 331 = linux_pipe2 */ { 0, (sy_call_t *)linux_inotify_init1, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 332 = linux_inotify_init1 */ { 0, (sy_call_t *)linux_preadv, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 333 = linux_preadv */ { 0, (sy_call_t *)linux_pwritev, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 334 = linux_pwritev */ { 0, (sy_call_t *)linux_rt_tsigqueueinfo, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 335 = linux_rt_tsigqueueinfo */ { 0, (sy_call_t *)linux_perf_event_open, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 336 = linux_perf_event_open */ - { 0, (sy_call_t *)linux_recvmmsg, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 337 = linux_recvmmsg */ + { AS(linux_recvmmsg_args), (sy_call_t *)linux_recvmmsg, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 337 = linux_recvmmsg */ { 0, (sy_call_t *)linux_fanotify_init, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 338 = linux_fanotify_init */ { 0, (sy_call_t *)linux_fanotify_mark, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 339 = linux_fanotify_mark */ - { 0, (sy_call_t *)linux_prlimit64, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 340 = linux_prlimit64 */ + { AS(linux_prlimit64_args), (sy_call_t *)linux_prlimit64, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 340 = linux_prlimit64 */ { 0, (sy_call_t *)linux_name_to_handle_at, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 341 = linux_name_to_handle_at */ { 0, (sy_call_t *)linux_open_by_handle_at, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 342 = linux_open_by_handle_at */ { 0, (sy_call_t *)linux_clock_adjtime, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 343 = linux_clock_adjtime */ - { 0, (sy_call_t *)linux_syncfs, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 344 = linux_syncfs */ - { 0, (sy_call_t *)linux_sendmmsg, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 345 = linux_sendmmsg */ + { AS(linux_syncfs_args), (sy_call_t *)linux_syncfs, AUE_SYNC, NULL, 0, 0, 0, SY_THR_STATIC }, /* 344 = linux_syncfs */ + { AS(linux_sendmmsg_args), (sy_call_t *)linux_sendmmsg, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 345 = linux_sendmmsg */ { 0, (sy_call_t *)linux_setns, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 346 = linux_setns */ { 0, (sy_call_t *)linux_process_vm_readv, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 347 = linux_process_vm_readv */ { 0, (sy_call_t *)linux_process_vm_writev, AUE_NULL, NULL, 0, 0, 0, SY_THR_STATIC }, /* 348 = linux_process_vm_writev */ + { 0, (sy_call_t *)nosys, AUE_NULL, NULL, 0, 0, 0, SY_THR_ABSENT }, /* 349 = nosys */ }; diff --git a/sys/i386/linux/linux_systrace_args.c b/sys/i386/linux/linux_systrace_args.c index 3564fda7e7c6..85fc9caca4eb 100644 --- a/sys/i386/linux/linux_systrace_args.c +++ b/sys/i386/linux/linux_systrace_args.c @@ -12,9 +12,9 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) int64_t *iarg = (int64_t *) uarg; switch (sysnum) { #define nosys linux_nosys - /* sys_exit */ + /* linux_exit */ case 1: { - struct sys_exit_args *p = params; + struct linux_exit_args *p = params; iarg[0] = p->rval; /* int */ *n_args = 1; break; @@ -792,7 +792,7 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) iarg[0] = p->pid; /* l_pid_t */ uarg[1] = (intptr_t) p->status; /* l_int * */ iarg[2] = p->options; /* l_int */ - uarg[3] = (intptr_t) p->rusage; /* struct l_rusage * */ + uarg[3] = (intptr_t) p->rusage; /* void * */ *n_args = 4; break; } @@ -1081,19 +1081,19 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) *n_args = 0; break; } - /* sched_setparam */ + /* linux_sched_setparam */ case 154: { - struct sched_setparam_args *p = params; - iarg[0] = p->pid; /* pid_t */ - uarg[1] = (intptr_t) p->param; /* const struct sched_param * */ + struct linux_sched_setparam_args *p = params; + iarg[0] = p->pid; /* l_pid_t */ + uarg[1] = (intptr_t) p->param; /* struct l_sched_param * */ *n_args = 2; break; } - /* sched_getparam */ + /* linux_sched_getparam */ case 155: { - struct sched_getparam_args *p = params; - iarg[0] = p->pid; /* pid_t */ - uarg[1] = (intptr_t) p->param; /* struct sched_param * */ + struct linux_sched_getparam_args *p = params; + iarg[0] = p->pid; /* l_pid_t */ + uarg[1] = (intptr_t) p->param; /* struct l_sched_param * */ *n_args = 2; break; } @@ -1132,9 +1132,9 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) *n_args = 1; break; } - /* sched_rr_get_interval */ + /* linux_sched_rr_get_interval */ case 161: { - struct sched_rr_get_interval_args *p = params; + struct linux_sched_rr_get_interval_args *p = params; iarg[0] = p->pid; /* l_pid_t */ uarg[1] = (intptr_t) p->interval; /* struct l_timespec * */ *n_args = 2; @@ -1277,7 +1277,11 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) } /* linux_rt_sigqueueinfo */ case 178: { - *n_args = 0; + struct linux_rt_sigqueueinfo_args *p = params; + iarg[0] = p->pid; /* l_pid_t */ + iarg[1] = p->sig; /* l_int */ + uarg[2] = (intptr_t) p->info; /* l_siginfo_t * */ + *n_args = 3; break; } /* linux_rt_sigsuspend */ @@ -1743,17 +1747,29 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) } /* linux_epoll_create */ case 254: { - *n_args = 0; + struct linux_epoll_create_args *p = params; + iarg[0] = p->size; /* l_int */ + *n_args = 1; break; } /* linux_epoll_ctl */ case 255: { - *n_args = 0; + struct linux_epoll_ctl_args *p = params; + iarg[0] = p->epfd; /* l_int */ + iarg[1] = p->op; /* l_int */ + iarg[2] = p->fd; /* l_int */ + uarg[3] = (intptr_t) p->event; /* struct epoll_event * */ + *n_args = 4; break; } /* linux_epoll_wait */ case 256: { - *n_args = 0; + struct linux_epoll_wait_args *p = params; + iarg[0] = p->epfd; /* l_int */ + uarg[1] = (intptr_t) p->events; /* struct epoll_event * */ + iarg[2] = p->maxevents; /* l_int */ + iarg[3] = p->timeout; /* l_int */ + *n_args = 4; break; } /* linux_remap_file_pages */ @@ -1962,7 +1978,13 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) } /* linux_waitid */ case 284: { - *n_args = 0; + struct linux_waitid_args *p = params; + iarg[0] = p->idtype; /* int */ + iarg[1] = p->id; /* l_pid_t */ + uarg[2] = (intptr_t) p->info; /* l_siginfo_t * */ + iarg[3] = p->options; /* int */ + uarg[4] = (intptr_t) p->rusage; /* void * */ + *n_args = 5; break; } /* linux_add_key */ @@ -2133,18 +2155,30 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) iarg[0] = p->dfd; /* l_int */ uarg[1] = (intptr_t) p->filename; /* const char * */ iarg[2] = p->amode; /* l_int */ - iarg[3] = p->flag; /* l_int */ - *n_args = 4; + *n_args = 3; break; } /* linux_pselect6 */ case 308: { - *n_args = 0; + struct linux_pselect6_args *p = params; + iarg[0] = p->nfds; /* l_int */ + uarg[1] = (intptr_t) p->readfds; /* l_fd_set * */ + uarg[2] = (intptr_t) p->writefds; /* l_fd_set * */ + uarg[3] = (intptr_t) p->exceptfds; /* l_fd_set * */ + uarg[4] = (intptr_t) p->tsp; /* struct l_timespec * */ + uarg[5] = (intptr_t) p->sig; /* l_uintptr_t * */ + *n_args = 6; break; } /* linux_ppoll */ case 309: { - *n_args = 0; + struct linux_ppoll_args *p = params; + uarg[0] = (intptr_t) p->fds; /* struct pollfd * */ + uarg[1] = p->nfds; /* uint32_t */ + uarg[2] = (intptr_t) p->tsp; /* struct l_timespec * */ + uarg[3] = (intptr_t) p->sset; /* l_sigset_t * */ + iarg[4] = p->ssize; /* l_size_t */ + *n_args = 5; break; } /* linux_unshare */ @@ -2201,12 +2235,23 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) } /* linux_epoll_pwait */ case 319: { - *n_args = 0; + struct linux_epoll_pwait_args *p = params; + iarg[0] = p->epfd; /* l_int */ + uarg[1] = (intptr_t) p->events; /* struct epoll_event * */ + iarg[2] = p->maxevents; /* l_int */ + iarg[3] = p->timeout; /* l_int */ + uarg[4] = (intptr_t) p->mask; /* l_sigset_t * */ + *n_args = 5; break; } /* linux_utimensat */ case 320: { - *n_args = 0; + struct linux_utimensat_args *p = params; + iarg[0] = p->dfd; /* l_int */ + uarg[1] = (intptr_t) p->pathname; /* const char * */ + uarg[2] = (intptr_t) p->times; /* const struct l_timespec * */ + iarg[3] = p->flags; /* l_int */ + *n_args = 4; break; } /* linux_signalfd */ @@ -2221,12 +2266,19 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) } /* linux_eventfd */ case 323: { - *n_args = 0; + struct linux_eventfd_args *p = params; + iarg[0] = p->initval; /* l_uint */ + *n_args = 1; break; } /* linux_fallocate */ case 324: { - *n_args = 0; + struct linux_fallocate_args *p = params; + iarg[0] = p->fd; /* l_int */ + iarg[1] = p->mode; /* l_int */ + iarg[2] = p->offset; /* l_loff_t */ + iarg[3] = p->len; /* l_loff_t */ + *n_args = 4; break; } /* linux_timerfd_settime */ @@ -2246,17 +2298,26 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) } /* linux_eventfd2 */ case 328: { - *n_args = 0; + struct linux_eventfd2_args *p = params; + iarg[0] = p->initval; /* l_uint */ + iarg[1] = p->flags; /* l_int */ + *n_args = 2; break; } /* linux_epoll_create1 */ case 329: { - *n_args = 0; + struct linux_epoll_create1_args *p = params; + iarg[0] = p->flags; /* l_int */ + *n_args = 1; break; } /* linux_dup3 */ case 330: { - *n_args = 0; + struct linux_dup3_args *p = params; + iarg[0] = p->oldfd; /* l_int */ + iarg[1] = p->newfd; /* l_int */ + iarg[2] = p->flags; /* l_int */ + *n_args = 3; break; } /* linux_pipe2 */ @@ -2294,7 +2355,13 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) } /* linux_recvmmsg */ case 337: { - *n_args = 0; + struct linux_recvmmsg_args *p = params; + iarg[0] = p->s; /* l_int */ + uarg[1] = (intptr_t) p->msg; /* struct l_mmsghdr * */ + iarg[2] = p->vlen; /* l_uint */ + iarg[3] = p->flags; /* l_uint */ + uarg[4] = (intptr_t) p->timeout; /* struct l_timespec * */ + *n_args = 5; break; } /* linux_fanotify_init */ @@ -2309,7 +2376,12 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) } /* linux_prlimit64 */ case 340: { - *n_args = 0; + struct linux_prlimit64_args *p = params; + iarg[0] = p->pid; /* l_pid_t */ + iarg[1] = p->resource; /* l_uint */ + uarg[2] = (intptr_t) p->new; /* struct rlimit * */ + uarg[3] = (intptr_t) p->old; /* struct rlimit * */ + *n_args = 4; break; } /* linux_name_to_handle_at */ @@ -2329,12 +2401,19 @@ systrace_args(int sysnum, void *params, uint64_t *uarg, int *n_args) } /* linux_syncfs */ case 344: { - *n_args = 0; + struct linux_syncfs_args *p = params; + iarg[0] = p->fd; /* l_int */ + *n_args = 1; break; } /* linux_sendmmsg */ case 345: { - *n_args = 0; + struct linux_sendmmsg_args *p = params; + iarg[0] = p->s; /* l_int */ + uarg[1] = (intptr_t) p->msg; /* struct l_mmsghdr * */ + iarg[2] = p->vlen; /* l_uint */ + iarg[3] = p->flags; /* l_uint */ + *n_args = 4; break; } /* linux_setns */ @@ -2363,7 +2442,7 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) const char *p = NULL; switch (sysnum) { #define nosys linux_nosys - /* sys_exit */ + /* linux_exit */ case 1: switch(ndx) { case 0: @@ -3548,7 +3627,7 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) p = "l_int"; break; case 3: - p = "struct l_rusage *"; + p = "void *"; break; default: break; @@ -3982,27 +4061,27 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) /* munlockall */ case 153: break; - /* sched_setparam */ + /* linux_sched_setparam */ case 154: switch(ndx) { case 0: - p = "pid_t"; + p = "l_pid_t"; break; case 1: - p = "const struct sched_param *"; + p = "struct l_sched_param *"; break; default: break; }; break; - /* sched_getparam */ + /* linux_sched_getparam */ case 155: switch(ndx) { case 0: - p = "pid_t"; + p = "l_pid_t"; break; case 1: - p = "struct sched_param *"; + p = "struct l_sched_param *"; break; default: break; @@ -4057,7 +4136,7 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; }; break; - /* sched_rr_get_interval */ + /* linux_sched_rr_get_interval */ case 161: switch(ndx) { case 0: @@ -4298,6 +4377,19 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; /* linux_rt_sigqueueinfo */ case 178: + switch(ndx) { + case 0: + p = "l_pid_t"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "l_siginfo_t *"; + break; + default: + break; + }; break; /* linux_rt_sigsuspend */ case 179: @@ -4970,12 +5062,51 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; /* linux_epoll_create */ case 254: + switch(ndx) { + case 0: + p = "l_int"; + break; + default: + break; + }; break; /* linux_epoll_ctl */ case 255: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "l_int"; + break; + case 3: + p = "struct epoll_event *"; + break; + default: + break; + }; break; /* linux_epoll_wait */ case 256: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "struct epoll_event *"; + break; + case 2: + p = "l_int"; + break; + case 3: + p = "l_int"; + break; + default: + break; + }; break; /* linux_remap_file_pages */ case 257: @@ -5299,6 +5430,25 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; /* linux_waitid */ case 284: + switch(ndx) { + case 0: + p = "int"; + break; + case 1: + p = "l_pid_t"; + break; + case 2: + p = "l_siginfo_t *"; + break; + case 3: + p = "int"; + break; + case 4: + p = "void *"; + break; + default: + break; + }; break; /* linux_add_key */ case 286: @@ -5558,18 +5708,56 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) case 2: p = "l_int"; break; - case 3: - p = "l_int"; - break; default: break; }; break; /* linux_pselect6 */ case 308: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_fd_set *"; + break; + case 2: + p = "l_fd_set *"; + break; + case 3: + p = "l_fd_set *"; + break; + case 4: + p = "struct l_timespec *"; + break; + case 5: + p = "l_uintptr_t *"; + break; + default: + break; + }; break; /* linux_ppoll */ case 309: + switch(ndx) { + case 0: + p = "struct pollfd *"; + break; + case 1: + p = "uint32_t"; + break; + case 2: + p = "struct l_timespec *"; + break; + case 3: + p = "l_sigset_t *"; + break; + case 4: + p = "l_size_t"; + break; + default: + break; + }; break; /* linux_unshare */ case 310: @@ -5623,9 +5811,44 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; /* linux_epoll_pwait */ case 319: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "struct epoll_event *"; + break; + case 2: + p = "l_int"; + break; + case 3: + p = "l_int"; + break; + case 4: + p = "l_sigset_t *"; + break; + default: + break; + }; break; /* linux_utimensat */ case 320: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "const char *"; + break; + case 2: + p = "const struct l_timespec *"; + break; + case 3: + p = "l_int"; + break; + default: + break; + }; break; /* linux_signalfd */ case 321: @@ -5635,9 +5858,32 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; /* linux_eventfd */ case 323: + switch(ndx) { + case 0: + p = "l_uint"; + break; + default: + break; + }; break; /* linux_fallocate */ case 324: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "l_loff_t"; + break; + case 3: + p = "l_loff_t"; + break; + default: + break; + }; break; /* linux_timerfd_settime */ case 325: @@ -5650,12 +5896,42 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; /* linux_eventfd2 */ case 328: + switch(ndx) { + case 0: + p = "l_uint"; + break; + case 1: + p = "l_int"; + break; + default: + break; + }; break; /* linux_epoll_create1 */ case 329: + switch(ndx) { + case 0: + p = "l_int"; + break; + default: + break; + }; break; /* linux_dup3 */ case 330: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "l_int"; + break; + case 2: + p = "l_int"; + break; + default: + break; + }; break; /* linux_pipe2 */ case 331: @@ -5687,6 +5963,25 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; /* linux_recvmmsg */ case 337: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "struct l_mmsghdr *"; + break; + case 2: + p = "l_uint"; + break; + case 3: + p = "l_uint"; + break; + case 4: + p = "struct l_timespec *"; + break; + default: + break; + }; break; /* linux_fanotify_init */ case 338: @@ -5696,6 +5991,22 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; /* linux_prlimit64 */ case 340: + switch(ndx) { + case 0: + p = "l_pid_t"; + break; + case 1: + p = "l_uint"; + break; + case 2: + p = "struct rlimit *"; + break; + case 3: + p = "struct rlimit *"; + break; + default: + break; + }; break; /* linux_name_to_handle_at */ case 341: @@ -5708,9 +6019,32 @@ systrace_entry_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; /* linux_syncfs */ case 344: + switch(ndx) { + case 0: + p = "l_int"; + break; + default: + break; + }; break; /* linux_sendmmsg */ case 345: + switch(ndx) { + case 0: + p = "l_int"; + break; + case 1: + p = "struct l_mmsghdr *"; + break; + case 2: + p = "l_uint"; + break; + case 3: + p = "l_uint"; + break; + default: + break; + }; break; /* linux_setns */ case 346: @@ -5733,7 +6067,7 @@ systrace_return_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) const char *p = NULL; switch (sysnum) { #define nosys linux_nosys - /* sys_exit */ + /* linux_exit */ case 1: if (ndx == 0 || ndx == 1) p = "void"; @@ -6365,12 +6699,12 @@ systrace_return_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; /* munlockall */ case 153: - /* sched_setparam */ + /* linux_sched_setparam */ case 154: if (ndx == 0 || ndx == 1) p = "int"; break; - /* sched_getparam */ + /* linux_sched_getparam */ case 155: if (ndx == 0 || ndx == 1) p = "int"; @@ -6397,7 +6731,7 @@ systrace_return_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) if (ndx == 0 || ndx == 1) p = "int"; break; - /* sched_rr_get_interval */ + /* linux_sched_rr_get_interval */ case 161: if (ndx == 0 || ndx == 1) p = "int"; @@ -6475,6 +6809,9 @@ systrace_return_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; /* linux_rt_sigqueueinfo */ case 178: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_rt_sigsuspend */ case 179: if (ndx == 0 || ndx == 1) @@ -6729,10 +7066,19 @@ systrace_return_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) case 253: /* linux_epoll_create */ case 254: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_epoll_ctl */ case 255: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_epoll_wait */ case 256: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_remap_file_pages */ case 257: /* linux_set_tid_address */ @@ -6847,6 +7193,9 @@ systrace_return_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) case 283: /* linux_waitid */ case 284: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_add_key */ case 286: /* linux_request_key */ @@ -6932,8 +7281,14 @@ systrace_return_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) break; /* linux_pselect6 */ case 308: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_ppoll */ case 309: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_unshare */ case 310: /* linux_set_robust_list */ @@ -6960,16 +7315,28 @@ systrace_return_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) case 318: /* linux_epoll_pwait */ case 319: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_utimensat */ case 320: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_signalfd */ case 321: /* linux_timerfd_create */ case 322: /* linux_eventfd */ case 323: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_fallocate */ case 324: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_timerfd_settime */ case 325: /* linux_timerfd_gettime */ @@ -6978,10 +7345,19 @@ systrace_return_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) case 327: /* linux_eventfd2 */ case 328: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_epoll_create1 */ case 329: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_dup3 */ case 330: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_pipe2 */ case 331: if (ndx == 0 || ndx == 1) @@ -6999,12 +7375,18 @@ systrace_return_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) case 336: /* linux_recvmmsg */ case 337: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_fanotify_init */ case 338: /* linux_fanotify_mark */ case 339: /* linux_prlimit64 */ case 340: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_name_to_handle_at */ case 341: /* linux_open_by_handle_at */ @@ -7013,8 +7395,14 @@ systrace_return_setargdesc(int sysnum, int ndx, char *desc, size_t descsz) case 343: /* linux_syncfs */ case 344: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_sendmmsg */ case 345: + if (ndx == 0 || ndx == 1) + p = "int"; + break; /* linux_setns */ case 346: /* linux_process_vm_readv */ diff --git a/sys/i386/linux/linux_sysvec.c b/sys/i386/linux/linux_sysvec.c index 67d5056d7398..acf23acd7b48 100644 --- a/sys/i386/linux/linux_sysvec.c +++ b/sys/i386/linux/linux_sysvec.c @@ -44,6 +44,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include #include #include @@ -71,17 +72,23 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include MODULE_VERSION(linux, 1); -MALLOC_DEFINE(M_LINUX, "linux", "Linux mode structures"); - #if BYTE_ORDER == LITTLE_ENDIAN #define SHELLMAGIC 0x2123 /* #! */ #else #define SHELLMAGIC 0x2321 #endif +#if defined(DEBUG) +SYSCTL_PROC(_compat_linux, OID_AUTO, debug, + CTLTYPE_STRING | CTLFLAG_RW, + 0, 0, linux_sysctl_debug, "A", + "Linux debugging control"); +#endif + /* * Allow the sendsig functions to use the ldebug() facility * even though they are not syscalls themselves. Map them @@ -93,13 +100,15 @@ MALLOC_DEFINE(M_LINUX, "linux", "Linux mode structures"); #define LINUX_PS_STRINGS (LINUX_USRSTACK - sizeof(struct ps_strings)) -extern char linux_sigcode[]; -extern int linux_szsigcode; +static int linux_szsigcode; +static vm_object_t linux_shared_page_obj; +static char *linux_shared_page_mapping; +extern char _binary_linux_locore_o_start; +extern char _binary_linux_locore_o_end; extern struct sysent linux_sysent[LINUX_SYS_MAXSYSCALL]; SET_DECLARE(linux_ioctl_handler_set, struct linux_ioctl_handler); -SET_DECLARE(linux_device_handler_set, struct linux_device_handler); static int linux_fixup(register_t **stack_base, struct image_params *iparams); @@ -110,12 +119,15 @@ static void exec_linux_setregs(struct thread *td, struct image_params *imgp, u_long stack); static register_t *linux_copyout_strings(struct image_params *imgp); static boolean_t linux_trans_osrel(const Elf_Note *note, int32_t *osrel); +static void linux_vdso_install(void *param); +static void linux_vdso_deinstall(void *param); static int linux_szplatform; -const char *linux_platform; +const char *linux_kplatform; static eventhandler_tag linux_exit_tag; static eventhandler_tag linux_exec_tag; +static eventhandler_tag linux_thread_dtor_tag; /* * Linux syscalls return negative errno's, we do positive and map them @@ -137,28 +149,6 @@ static int bsd_to_linux_errno[ELAST + 1] = { -72, -67, -71 }; -int bsd_to_linux_signal[LINUX_SIGTBLSZ] = { - LINUX_SIGHUP, LINUX_SIGINT, LINUX_SIGQUIT, LINUX_SIGILL, - LINUX_SIGTRAP, LINUX_SIGABRT, 0, LINUX_SIGFPE, - LINUX_SIGKILL, LINUX_SIGBUS, LINUX_SIGSEGV, LINUX_SIGSYS, - LINUX_SIGPIPE, LINUX_SIGALRM, LINUX_SIGTERM, LINUX_SIGURG, - LINUX_SIGSTOP, LINUX_SIGTSTP, LINUX_SIGCONT, LINUX_SIGCHLD, - LINUX_SIGTTIN, LINUX_SIGTTOU, LINUX_SIGIO, LINUX_SIGXCPU, - LINUX_SIGXFSZ, LINUX_SIGVTALRM, LINUX_SIGPROF, LINUX_SIGWINCH, - 0, LINUX_SIGUSR1, LINUX_SIGUSR2 -}; - -int linux_to_bsd_signal[LINUX_SIGTBLSZ] = { - SIGHUP, SIGINT, SIGQUIT, SIGILL, - SIGTRAP, SIGABRT, SIGBUS, SIGFPE, - SIGKILL, SIGUSR1, SIGSEGV, SIGUSR2, - SIGPIPE, SIGALRM, SIGTERM, SIGBUS, - SIGCHLD, SIGCONT, SIGSTOP, SIGTSTP, - SIGTTIN, SIGTTOU, SIGURG, SIGXCPU, - SIGXFSZ, SIGVTALRM, SIGPROF, SIGWINCH, - SIGIO, SIGURG, SIGSYS -}; - #define LINUX_T_UNKNOWN 255 static int _bsd_to_linux_trapcode[] = { LINUX_T_UNKNOWN, /* 0 */ @@ -198,6 +188,10 @@ static int _bsd_to_linux_trapcode[] = { _bsd_to_linux_trapcode[(code)]: \ LINUX_T_UNKNOWN) +LINUX_VDSO_SYM_INTPTR(linux_sigcode); +LINUX_VDSO_SYM_INTPTR(linux_rt_sigcode); +LINUX_VDSO_SYM_INTPTR(linux_vsyscall); + /* * If FreeBSD & Linux have a difference of opinion about what a trap * means, deal with it here. @@ -208,15 +202,15 @@ static int translate_traps(int signal, int trap_code) { if (signal != SIGBUS) - return signal; + return (signal); switch (trap_code) { case T_PROTFLT: case T_TSSFLT: case T_DOUBLEFLT: case T_PAGEFLT: - return SIGSEGV; + return (SIGSEGV); default: - return signal; + return (signal); } } @@ -254,6 +248,9 @@ elf_linux_fixup(register_t **stack_base, struct image_params *imgp) args = (Elf32_Auxargs *)imgp->auxargs; pos = *stack_base + (imgp->args->argc + imgp->args->envc + 2); + AUXARGS_ENTRY(pos, LINUX_AT_SYSINFO_EHDR, + imgp->proc->p_sysent->sv_shared_page_base); + AUXARGS_ENTRY(pos, LINUX_AT_SYSINFO, linux_vsyscall); AUXARGS_ENTRY(pos, LINUX_AT_HWCAP, cpu_feature); /* @@ -279,6 +276,9 @@ elf_linux_fixup(register_t **stack_base, struct image_params *imgp) AUXARGS_ENTRY(pos, AT_GID, imgp->proc->p_ucred->cr_rgid); AUXARGS_ENTRY(pos, AT_EGID, imgp->proc->p_ucred->cr_svgid); AUXARGS_ENTRY(pos, LINUX_AT_PLATFORM, PTROUT(uplatform)); + AUXARGS_ENTRY(pos, LINUX_AT_RANDOM, imgp->canary); + if (imgp->execpathp != 0) + AUXARGS_ENTRY(pos, LINUX_AT_EXECFN, imgp->execpathp); if (args->execfd != -1) AUXARGS_ENTRY(pos, AT_EXECFD, args->execfd); AUXARGS_ENTRY(pos, AT_NULL, 0); @@ -302,23 +302,45 @@ linux_copyout_strings(struct image_params *imgp) char *stringp, *destp; register_t *stack_base; struct ps_strings *arginfo; + char canary[LINUX_AT_RANDOM_LEN]; + size_t execpath_len; struct proc *p; /* * Calculate string base and vector table pointers. - * Also deal with signal trampoline code for this exec type. */ p = imgp->proc; + if (imgp->execpath != NULL && imgp->auxargs != NULL) + execpath_len = strlen(imgp->execpath) + 1; + else + execpath_len = 0; arginfo = (struct ps_strings *)p->p_sysent->sv_psstrings; destp = (caddr_t)arginfo - SPARE_USRSPACE - linux_szplatform - + roundup(sizeof(canary), sizeof(char *)) - + roundup(execpath_len, sizeof(char *)) - roundup((ARG_MAX - imgp->args->stringspace), sizeof(char *)); /* * install LINUX_PLATFORM */ - copyout(linux_platform, ((caddr_t)arginfo - linux_szplatform), + copyout(linux_kplatform, ((caddr_t)arginfo - linux_szplatform), linux_szplatform); + if (execpath_len != 0) { + imgp->execpathp = (uintptr_t)arginfo - + linux_szplatform - execpath_len; + copyout(imgp->execpath, (void *)imgp->execpathp, execpath_len); + } + + /* + * Prepare the canary for SSP. + */ + arc4rand(canary, sizeof(canary), 0); + imgp->canary = (uintptr_t)arginfo - linux_szplatform - + roundup(execpath_len, sizeof(char *)) - + roundup(sizeof(canary), sizeof(char *)); + copyout(canary, (void *)imgp->canary, sizeof(canary)); + /* * If we have a valid auxargs ptr, prepare some room * on the stack. @@ -398,10 +420,6 @@ linux_copyout_strings(struct image_params *imgp) return (stack_base); } - - -extern unsigned long linux_sznonrtsigcode; - static void linux_rt_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) { @@ -440,9 +458,7 @@ linux_rt_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) /* * Build the argument list for the signal handler. */ - if (p->p_sysent->sv_sigtbl) - if (sig <= p->p_sysent->sv_sigsize) - sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; + sig = bsd_to_linux_signal(sig); bzero(&frame, sizeof(frame)); @@ -468,7 +484,7 @@ linux_rt_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) bsd_to_linux_sigset(mask, &frame.sf_sc.uc_sigmask); - frame.sf_sc.uc_mcontext.sc_mask = frame.sf_sc.uc_sigmask.__bits[0]; + frame.sf_sc.uc_mcontext.sc_mask = frame.sf_sc.uc_sigmask.__mask; frame.sf_sc.uc_mcontext.sc_gs = rgs(); frame.sf_sc.uc_mcontext.sc_fs = regs->tf_fs; frame.sf_sc.uc_mcontext.sc_es = regs->tf_es; @@ -477,6 +493,7 @@ linux_rt_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) frame.sf_sc.uc_mcontext.sc_esi = regs->tf_esi; frame.sf_sc.uc_mcontext.sc_ebp = regs->tf_ebp; frame.sf_sc.uc_mcontext.sc_ebx = regs->tf_ebx; + frame.sf_sc.uc_mcontext.sc_esp = regs->tf_esp; frame.sf_sc.uc_mcontext.sc_edx = regs->tf_edx; frame.sf_sc.uc_mcontext.sc_ecx = regs->tf_ecx; frame.sf_sc.uc_mcontext.sc_eax = regs->tf_eax; @@ -514,7 +531,7 @@ linux_rt_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) * Build context to run handler in. */ regs->tf_esp = (int)fp; - regs->tf_eip = p->p_sysent->sv_sigcode_base + linux_sznonrtsigcode; + regs->tf_eip = linux_rt_sigcode; regs->tf_eflags &= ~(PSL_T | PSL_VM | PSL_D); regs->tf_cs = _ucodesel; regs->tf_ds = _udatasel; @@ -546,7 +563,7 @@ linux_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) struct l_sigframe *fp, frame; l_sigset_t lmask; int sig, code; - int oonstack, i; + int oonstack; PROC_LOCK_ASSERT(p, MA_OWNED); psp = p->p_sigacts; @@ -582,9 +599,7 @@ linux_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) /* * Build the argument list for the signal handler. */ - if (p->p_sysent->sv_sigtbl) - if (sig <= p->p_sysent->sv_sigsize) - sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; + sig = bsd_to_linux_signal(sig); bzero(&frame, sizeof(frame)); @@ -596,7 +611,7 @@ linux_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) /* * Build the signal context to be used by sigreturn. */ - frame.sf_sc.sc_mask = lmask.__bits[0]; + frame.sf_sc.sc_mask = lmask.__mask; frame.sf_sc.sc_gs = rgs(); frame.sf_sc.sc_fs = regs->tf_fs; frame.sf_sc.sc_es = regs->tf_es; @@ -605,6 +620,7 @@ linux_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) frame.sf_sc.sc_esi = regs->tf_esi; frame.sf_sc.sc_ebp = regs->tf_ebp; frame.sf_sc.sc_ebx = regs->tf_ebx; + frame.sf_sc.sc_esp = regs->tf_esp; frame.sf_sc.sc_edx = regs->tf_edx; frame.sf_sc.sc_ecx = regs->tf_ecx; frame.sf_sc.sc_eax = regs->tf_eax; @@ -617,8 +633,7 @@ linux_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) frame.sf_sc.sc_cr2 = (register_t)ksi->ksi_addr; frame.sf_sc.sc_trapno = bsd_to_linux_trapcode(ksi->ksi_trapno); - for (i = 0; i < (LINUX_NSIG_WORDS-1); i++) - frame.sf_extramask[i] = lmask.__bits[i+1]; + frame.sf_extramask[0] = lmask.__mask; if (copyout(&frame, fp, sizeof(frame)) != 0) { /* @@ -633,7 +648,7 @@ linux_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) * Build context to run handler in. */ regs->tf_esp = (int)fp; - regs->tf_eip = p->p_sysent->sv_sigcode_base; + regs->tf_eip = linux_sigcode; regs->tf_eflags &= ~(PSL_T | PSL_VM | PSL_D); regs->tf_cs = _ucodesel; regs->tf_ds = _udatasel; @@ -661,7 +676,7 @@ linux_sigreturn(struct thread *td, struct linux_sigreturn_args *args) struct trapframe *regs; l_sigset_t lmask; sigset_t bmask; - int eflags, i; + int eflags; ksiginfo_t ksi; regs = td->td_frame; @@ -684,7 +699,7 @@ linux_sigreturn(struct thread *td, struct linux_sigreturn_args *args) #define EFLAGS_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) eflags = frame.sf_sc.sc_eflags; if (!EFLAGS_SECURE(eflags, regs->tf_eflags)) - return(EINVAL); + return (EINVAL); /* * Don't allow users to load a valid privileged %cs. Let the @@ -699,12 +714,10 @@ linux_sigreturn(struct thread *td, struct linux_sigreturn_args *args) ksi.ksi_trapno = T_PROTFLT; ksi.ksi_addr = (void *)regs->tf_eip; trapsignal(td, &ksi); - return(EINVAL); + return (EINVAL); } - lmask.__bits[0] = frame.sf_sc.sc_mask; - for (i = 0; i < (LINUX_NSIG_WORDS-1); i++) - lmask.__bits[i+1] = frame.sf_extramask[i]; + lmask.__mask = frame.sf_sc.sc_mask; linux_to_bsd_sigset(&lmask, &bmask); kern_sigprocmask(td, SIG_SETMASK, &bmask, NULL, 0); @@ -775,7 +788,7 @@ linux_rt_sigreturn(struct thread *td, struct linux_rt_sigreturn_args *args) #define EFLAGS_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) eflags = context->sc_eflags; if (!EFLAGS_SECURE(eflags, regs->tf_eflags)) - return(EINVAL); + return (EINVAL); /* * Don't allow users to load a valid privileged %cs. Let the @@ -790,7 +803,7 @@ linux_rt_sigreturn(struct thread *td, struct linux_rt_sigreturn_args *args) ksi.ksi_trapno = T_PROTFLT; ksi.ksi_addr = (void *)regs->tf_eip; trapsignal(td, &ksi); - return(EINVAL); + return (EINVAL); } linux_to_bsd_sigset(&uc.uc_sigmask, &bmask); @@ -852,7 +865,8 @@ linux_fetch_syscall_args(struct thread *td, struct syscall_args *sa) sa->args[5] = frame->tf_ebp; /* Unconfirmed */ if (sa->code >= p->p_sysent->sv_size) - sa->callp = &p->p_sysent->sv_table[0]; + /* nosys */ + sa->callp = &p->p_sysent->sv_table[LINUX_SYS_MAXSYSCALL]; else sa->callp = &p->p_sysent->sv_table[sa->code]; sa->narg = sa->callp->sy_narg; @@ -942,14 +956,14 @@ struct sysentvec linux_sysvec = { .sv_size = LINUX_SYS_MAXSYSCALL, .sv_table = linux_sysent, .sv_mask = 0, - .sv_sigsize = LINUX_SIGTBLSZ, - .sv_sigtbl = bsd_to_linux_signal, + .sv_sigsize = 0, + .sv_sigtbl = NULL, .sv_errsize = ELAST + 1, .sv_errtbl = bsd_to_linux_errno, .sv_transtrap = translate_traps, .sv_fixup = linux_fixup, .sv_sendsig = linux_sendsig, - .sv_sigcode = linux_sigcode, + .sv_sigcode = &_binary_linux_locore_o_start, .sv_szsigcode = &linux_szsigcode, .sv_prepsyscall = NULL, .sv_name = "Linux a.out", @@ -973,6 +987,7 @@ struct sysentvec linux_sysvec = { .sv_shared_page_base = LINUX_SHAREDPAGE, .sv_shared_page_len = PAGE_SIZE, .sv_schedtail = linux_schedtail, + .sv_thread_detach = linux_thread_detach, }; INIT_SYSENTVEC(aout_sysvec, &linux_sysvec); @@ -980,14 +995,14 @@ struct sysentvec elf_linux_sysvec = { .sv_size = LINUX_SYS_MAXSYSCALL, .sv_table = linux_sysent, .sv_mask = 0, - .sv_sigsize = LINUX_SIGTBLSZ, - .sv_sigtbl = bsd_to_linux_signal, + .sv_sigsize = 0, + .sv_sigtbl = NULL, .sv_errsize = ELAST + 1, .sv_errtbl = bsd_to_linux_errno, .sv_transtrap = translate_traps, .sv_fixup = elf_linux_fixup, .sv_sendsig = linux_sendsig, - .sv_sigcode = linux_sigcode, + .sv_sigcode = &_binary_linux_locore_o_start, .sv_szsigcode = &linux_szsigcode, .sv_prepsyscall = NULL, .sv_name = "Linux ELF", @@ -1011,8 +1026,41 @@ struct sysentvec elf_linux_sysvec = { .sv_shared_page_base = LINUX_SHAREDPAGE, .sv_shared_page_len = PAGE_SIZE, .sv_schedtail = linux_schedtail, + .sv_thread_detach = linux_thread_detach, }; -INIT_SYSENTVEC(elf_sysvec, &elf_linux_sysvec); + +static void +linux_vdso_install(void *param) +{ + + linux_szsigcode = (&_binary_linux_locore_o_end - + &_binary_linux_locore_o_start); + + if (linux_szsigcode > elf_linux_sysvec.sv_shared_page_len) + panic("Linux invalid vdso size\n"); + + __elfN(linux_vdso_fixup)(&elf_linux_sysvec); + + linux_shared_page_obj = __elfN(linux_shared_page_init) + (&linux_shared_page_mapping); + + __elfN(linux_vdso_reloc)(&elf_linux_sysvec, LINUX_SHAREDPAGE); + + bcopy(elf_linux_sysvec.sv_sigcode, linux_shared_page_mapping, + linux_szsigcode); + elf_linux_sysvec.sv_shared_page_obj = linux_shared_page_obj; +} +SYSINIT(elf_linux_vdso_init, SI_SUB_EXEC, SI_ORDER_ANY, + (sysinit_cfunc_t)linux_vdso_install, NULL); + +static void +linux_vdso_deinstall(void *param) +{ + + __elfN(linux_shared_page_fini)(linux_shared_page_obj); +}; +SYSUNINIT(elf_linux_vdso_uninit, SI_SUB_EXEC, SI_ORDER_FIRST, + (sysinit_cfunc_t)linux_vdso_deinstall, NULL); static char GNU_ABI_VENDOR[] = "GNU"; static int GNULINUX_ABI_DESC = 0; @@ -1084,7 +1132,6 @@ linux_elf_modevent(module_t mod, int type, void *data) Elf32_Brandinfo **brandinfo; int error; struct linux_ioctl_handler **lihp; - struct linux_device_handler **ldhp; error = 0; @@ -1097,18 +1144,16 @@ linux_elf_modevent(module_t mod, int type, void *data) if (error == 0) { SET_FOREACH(lihp, linux_ioctl_handler_set) linux_ioctl_register_handler(*lihp); - SET_FOREACH(ldhp, linux_device_handler_set) - linux_device_register_handler(*ldhp); - mtx_init(&emul_lock, "emuldata lock", NULL, MTX_DEF); - sx_init(&emul_shared_lock, "emuldata->shared lock"); LIST_INIT(&futex_list); mtx_init(&futex_mtx, "ftllk", NULL, MTX_DEF); linux_exit_tag = EVENTHANDLER_REGISTER(process_exit, linux_proc_exit, NULL, 1000); linux_exec_tag = EVENTHANDLER_REGISTER(process_exec, linux_proc_exec, NULL, 1000); - linux_get_machine(&linux_platform); - linux_szplatform = roundup(strlen(linux_platform) + 1, + linux_thread_dtor_tag = EVENTHANDLER_REGISTER(thread_dtor, + linux_thread_dtor, NULL, EVENTHANDLER_PRI_ANY); + linux_get_machine(&linux_kplatform); + linux_szplatform = roundup(strlen(linux_kplatform) + 1, sizeof(char *)); linux_osd_jail_register(); stclohz = (stathz ? stathz : hz); @@ -1131,13 +1176,10 @@ linux_elf_modevent(module_t mod, int type, void *data) if (error == 0) { SET_FOREACH(lihp, linux_ioctl_handler_set) linux_ioctl_unregister_handler(*lihp); - SET_FOREACH(ldhp, linux_device_handler_set) - linux_device_unregister_handler(*ldhp); - mtx_destroy(&emul_lock); - sx_destroy(&emul_shared_lock); mtx_destroy(&futex_mtx); EVENTHANDLER_DEREGISTER(process_exit, linux_exit_tag); EVENTHANDLER_DEREGISTER(process_exec, linux_exec_tag); + EVENTHANDLER_DEREGISTER(thread_dtor, linux_thread_dtor_tag); linux_osd_jail_deregister(); if (bootverbose) printf("Linux ELF exec handler removed\n"); @@ -1145,9 +1187,9 @@ linux_elf_modevent(module_t mod, int type, void *data) printf("Could not deinstall ELF interpreter entry\n"); break; default: - return EOPNOTSUPP; + return (EOPNOTSUPP); } - return error; + return (error); } static moduledata_t linux_elf_mod = { diff --git a/sys/i386/linux/linux_vdso.lds.s b/sys/i386/linux/linux_vdso.lds.s new file mode 100644 index 000000000000..dcb61cf5e06f --- /dev/null +++ b/sys/i386/linux/linux_vdso.lds.s @@ -0,0 +1,65 @@ +/* + * Linker script for 32-bit vDSO. + * Copied from Linux kernel arch/x86/vdso/vdso-layout.lds.S + * and arch/x86/vdso/vdso32/vdso32.lds.S + * + * $FreeBSD$ + */ + +SECTIONS +{ + . = . + SIZEOF_HEADERS; + + .hash : { *(.hash) } :text + .gnu.hash : { *(.gnu.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + + .note : { *(.note.*) } :text :note + + .eh_frame_hdr : { *(.eh_frame_hdr) } :text :eh_frame_hdr + .eh_frame : { KEEP (*(.eh_frame)) } :text + + .dynamic : { *(.dynamic) } :text :dynamic + + .rodata : { *(.rodata*) } :text + .data : { + *(.data*) + *(.sdata*) + *(.got.plt) *(.got) + *(.gnu.linkonce.d.*) + *(.bss*) + *(.dynbss*) + *(.gnu.linkonce.b.*) + } + + .altinstructions : { *(.altinstructions) } + .altinstr_replacement : { *(.altinstr_replacement) } + + . = ALIGN(0x100); + .text : { *(.text*) } :text =0x90909090 +} + +PHDRS +{ + text PT_LOAD FLAGS(5) FILEHDR PHDRS; /* PF_R|PF_X */ + dynamic PT_DYNAMIC FLAGS(4); /* PF_R */ + note PT_NOTE FLAGS(4); /* PF_R */ + eh_frame_hdr PT_GNU_EH_FRAME; +} + +ENTRY(linux_vsyscall); + +VERSION +{ + LINUX_2.5 { + global: + linux_vsyscall; + linux_sigcode; + linux_rt_sigcode; + local: *; + }; +} diff --git a/sys/i386/linux/syscalls.master b/sys/i386/linux/syscalls.master index 5b4f3a6340fe..e6609a9c4b08 100644 --- a/sys/i386/linux/syscalls.master +++ b/sys/i386/linux/syscalls.master @@ -37,8 +37,7 @@ ; #ifdef's, etc. may be included, and are copied to the output files. 0 AUE_NULL UNIMPL setup -1 AUE_EXIT NOPROTO { void sys_exit(int rval); } exit \ - sys_exit_args void +1 AUE_EXIT STD { void linux_exit(int rval); } 2 AUE_FORK STD { int linux_fork(void); } 3 AUE_NULL NOPROTO { int read(int fd, char *buf, \ u_int nbyte); } @@ -209,7 +208,7 @@ 113 AUE_NULL STD { int linux_vm86old(void); } 114 AUE_WAIT4 STD { int linux_wait4(l_pid_t pid, \ l_int *status, l_int options, \ - struct l_rusage *rusage); } + void *rusage); } 115 AUE_SWAPOFF STD { int linux_swapoff(void); } 116 AUE_NULL STD { int linux_sysinfo(struct l_sysinfo *info); } 117 AUE_NULL STD { int linux_ipc(l_uint what, l_int arg1, \ @@ -270,10 +269,10 @@ 151 AUE_MUNLOCK NOPROTO { int munlock(const void *addr, size_t len); } 152 AUE_MLOCKALL NOPROTO { int mlockall(int how); } 153 AUE_MUNLOCKALL NOPROTO { int munlockall(void); } -154 AUE_SCHED_SETPARAM NOPROTO { int sched_setparam(pid_t pid, \ - const struct sched_param *param); } -155 AUE_SCHED_GETPARAM NOPROTO { int sched_getparam(pid_t pid, \ - struct sched_param *param); } +154 AUE_SCHED_SETPARAM STD { int linux_sched_setparam(l_pid_t pid, \ + struct l_sched_param *param); } +155 AUE_SCHED_GETPARAM STD { int linux_sched_getparam(l_pid_t pid, \ + struct l_sched_param *param); } 156 AUE_SCHED_SETSCHEDULER STD { int linux_sched_setscheduler( \ l_pid_t pid, l_int policy, \ struct l_sched_param *param); } @@ -284,8 +283,8 @@ l_int policy); } 160 AUE_SCHED_GET_PRIORITY_MIN STD { int linux_sched_get_priority_min( \ l_int policy); } -161 AUE_SCHED_RR_GET_INTERVAL NOPROTO { int sched_rr_get_interval(l_pid_t pid, \ - struct l_timespec *interval); } +161 AUE_SCHED_RR_GET_INTERVAL STD { int linux_sched_rr_get_interval( \ + l_pid_t pid, struct l_timespec *interval); } 162 AUE_NULL STD { int linux_nanosleep( \ const struct l_timespec *rqtp, \ struct l_timespec *rmtp); } @@ -321,7 +320,8 @@ l_siginfo_t *ptr, \ struct l_timeval *timeout, \ l_size_t sigsetsize); } -178 AUE_NULL STD { int linux_rt_sigqueueinfo(void); } +178 AUE_NULL STD { int linux_rt_sigqueueinfo(l_pid_t pid, l_int sig, \ + l_siginfo_t *info); } 179 AUE_NULL STD { int linux_rt_sigsuspend( \ l_sigset_t *newset, \ l_size_t sigsetsize); } @@ -432,9 +432,11 @@ 251 AUE_NULL UNIMPL 252 AUE_EXIT STD { int linux_exit_group(int error_code); } 253 AUE_NULL STD { int linux_lookup_dcookie(void); } -254 AUE_NULL STD { int linux_epoll_create(void); } -255 AUE_NULL STD { int linux_epoll_ctl(void); } -256 AUE_NULL STD { int linux_epoll_wait(void); } +254 AUE_NULL STD { int linux_epoll_create(l_int size); } +255 AUE_NULL STD { int linux_epoll_ctl(l_int epfd, l_int op, l_int fd, \ + struct epoll_event *event); } +256 AUE_NULL STD { int linux_epoll_wait(l_int epfd, struct epoll_event *events, \ + l_int maxevents, l_int timeout); } 257 AUE_NULL STD { int linux_remap_file_pages(void); } 258 AUE_NULL STD { int linux_set_tid_address(int *tidptr); } 259 AUE_NULL STD { int linux_timer_create(clockid_t clock_id, \ @@ -475,7 +477,9 @@ 282 AUE_NULL STD { int linux_mq_getsetattr(l_mqd_t mqd, const struct mq_attr *attr, \ struct mq_attr *oattr); } 283 AUE_NULL STD { int linux_kexec_load(void); } -284 AUE_NULL STD { int linux_waitid(void); } +284 AUE_WAIT6 STD { int linux_waitid(int idtype, l_pid_t id, \ + l_siginfo_t *info, int options, \ + void *rusage); } 285 AUE_NULL UNIMPL ; linux 2.6.11: 286 AUE_NULL STD { int linux_add_key(void); } @@ -513,9 +517,13 @@ char *buf, l_int bufsiz); } 306 AUE_FCHMODAT STD { int linux_fchmodat(l_int dfd, const char *filename, \ l_mode_t mode); } -307 AUE_FACCESSAT STD { int linux_faccessat(l_int dfd, const char *filename, l_int amode, l_int flag); } -308 AUE_NULL STD { int linux_pselect6(void); } -309 AUE_NULL STD { int linux_ppoll(void); } +307 AUE_FACCESSAT STD { int linux_faccessat(l_int dfd, const char *filename, \ + l_int amode); } +308 AUE_SELECT STD { int linux_pselect6(l_int nfds, l_fd_set *readfds, \ + l_fd_set *writefds, l_fd_set *exceptfds, \ + struct l_timespec *tsp, l_uintptr_t *sig); } +309 AUE_POLL STD { int linux_ppoll(struct pollfd *fds, uint32_t nfds, \ + struct l_timespec *tsp, l_sigset_t *sset, l_size_t ssize); } 310 AUE_NULL STD { int linux_unshare(void); } ; linux 2.6.17: 311 AUE_NULL STD { int linux_set_robust_list(struct linux_robust_list_head *head, \ @@ -530,22 +538,26 @@ 317 AUE_NULL STD { int linux_move_pages(void); } ; linux 2.6.19: 318 AUE_NULL STD { int linux_getcpu(void); } -319 AUE_NULL STD { int linux_epoll_pwait(void); } +319 AUE_NULL STD { int linux_epoll_pwait(l_int epfd, struct epoll_event *events, \ + l_int maxevents, l_int timeout, l_sigset_t *mask); } ; linux 2.6.22: -320 AUE_NULL STD { int linux_utimensat(void); } +320 AUE_FUTIMESAT STD { int linux_utimensat(l_int dfd, const char *pathname, \ + const struct l_timespec *times, l_int flags); } 321 AUE_NULL STD { int linux_signalfd(void); } 322 AUE_NULL STD { int linux_timerfd_create(void); } -323 AUE_NULL STD { int linux_eventfd(void); } +323 AUE_NULL STD { int linux_eventfd(l_uint initval); } ; linux 2.6.23: -324 AUE_NULL STD { int linux_fallocate(void); } +324 AUE_NULL STD { int linux_fallocate(l_int fd, l_int mode, \ + l_loff_t offset, l_loff_t len); } ; linux 2.6.25: 325 AUE_NULL STD { int linux_timerfd_settime(void); } 326 AUE_NULL STD { int linux_timerfd_gettime(void); } ; linux 2.6.27: 327 AUE_NULL STD { int linux_signalfd4(void); } -328 AUE_NULL STD { int linux_eventfd2(void); } -329 AUE_NULL STD { int linux_epoll_create1(void); } -330 AUE_NULL STD { int linux_dup3(void); } +328 AUE_NULL STD { int linux_eventfd2(l_uint initval, l_int flags); } +329 AUE_NULL STD { int linux_epoll_create1(l_int flags); } +330 AUE_NULL STD { int linux_dup3(l_int oldfd, \ + l_int newfd, l_int flags); } 331 AUE_NULL STD { int linux_pipe2(l_int *pipefds, l_int flags); } 332 AUE_NULL STD { int linux_inotify_init1(void); } ; linux 2.6.30: @@ -555,17 +567,26 @@ 335 AUE_NULL STD { int linux_rt_tsigqueueinfo(void); } 336 AUE_NULL STD { int linux_perf_event_open(void); } ; linux 2.6.33: -337 AUE_NULL STD { int linux_recvmmsg(void); } +337 AUE_NULL STD { int linux_recvmmsg(l_int s, \ + struct l_mmsghdr *msg, l_uint vlen, \ + l_uint flags, struct l_timespec *timeout); } 338 AUE_NULL STD { int linux_fanotify_init(void); } 339 AUE_NULL STD { int linux_fanotify_mark(void); } ; linux 2.6.36: -340 AUE_NULL STD { int linux_prlimit64(void); } +340 AUE_NULL STD { int linux_prlimit64(l_pid_t pid, \ + l_uint resource, \ + struct rlimit *new, \ + struct rlimit *old); } ; later: 341 AUE_NULL STD { int linux_name_to_handle_at(void); } 342 AUE_NULL STD { int linux_open_by_handle_at(void); } 343 AUE_NULL STD { int linux_clock_adjtime(void); } -344 AUE_NULL STD { int linux_syncfs(void); } -345 AUE_NULL STD { int linux_sendmmsg(void); } +344 AUE_SYNC STD { int linux_syncfs(l_int fd); } +345 AUE_NULL STD { int linux_sendmmsg(l_int s, \ + struct l_mmsghdr *msg, l_uint vlen, \ + l_uint flags); } 346 AUE_NULL STD { int linux_setns(void); } 347 AUE_NULL STD { int linux_process_vm_readv(void); } 348 AUE_NULL STD { int linux_process_vm_writev(void); } +; please, keep this line at the end. +349 AUE_NULL UNIMPL nosys diff --git a/sys/kern/imgact_aout.c b/sys/kern/imgact_aout.c index 3ae78de42f0c..edd5f5f8854b 100644 --- a/sys/kern/imgact_aout.c +++ b/sys/kern/imgact_aout.c @@ -99,6 +99,7 @@ struct sysentvec aout_sysvec = { .sv_fetch_syscall_args = cpu_fetch_syscall_args, .sv_syscallnames = syscallnames, .sv_schedtail = NULL, + .sv_thread_detach = NULL, }; #elif defined(__amd64__) diff --git a/sys/kern/imgact_elf.c b/sys/kern/imgact_elf.c index 3ff3440f2dba..a98a15d146d1 100644 --- a/sys/kern/imgact_elf.c +++ b/sys/kern/imgact_elf.c @@ -972,6 +972,7 @@ __CONCAT(exec_, __elfN(imgact))(struct image_params *imgp) elf_auxargs->base = addr; elf_auxargs->flags = 0; elf_auxargs->entry = entry; + elf_auxargs->hdr_eflags = hdr->e_flags; imgp->auxargs = elf_auxargs; imgp->interpreted = 0; @@ -1002,6 +1003,9 @@ __elfN(freebsd_fixup)(register_t **stack_base, struct image_params *imgp) AUXARGS_ENTRY(pos, AT_FLAGS, args->flags); AUXARGS_ENTRY(pos, AT_ENTRY, args->entry); AUXARGS_ENTRY(pos, AT_BASE, args->base); +#ifdef AT_EHDRFLAGS + AUXARGS_ENTRY(pos, AT_EHDRFLAGS, args->hdr_eflags); +#endif if (imgp->execpathp != 0) AUXARGS_ENTRY(pos, AT_EXECPATH, imgp->execpathp); AUXARGS_ENTRY(pos, AT_OSRELDATE, diff --git a/sys/kern/init_main.c b/sys/kern/init_main.c index b77b78826fb1..cf4eed1ef4dc 100644 --- a/sys/kern/init_main.c +++ b/sys/kern/init_main.c @@ -411,6 +411,7 @@ struct sysentvec null_sysvec = { .sv_fetch_syscall_args = null_fetch_syscall_args, .sv_syscallnames = NULL, .sv_schedtail = NULL, + .sv_thread_detach = NULL, }; /* @@ -506,7 +507,7 @@ proc0_init(void *dummy __unused) callout_init_mtx(&p->p_itcallout, &p->p_mtx, 0); callout_init_mtx(&p->p_limco, &p->p_mtx, 0); - callout_init(&td->td_slpcallout, CALLOUT_MPSAFE); + callout_init(&td->td_slpcallout, 1); /* Create credentials. */ newcred = crget(); @@ -561,9 +562,9 @@ proc0_init(void *dummy __unused) p->p_stats = pstats_alloc(); /* Allocate a prototype map so we have something to fork. */ - pmap_pinit0(vmspace_pmap(&vmspace0)); p->p_vmspace = &vmspace0; vmspace0.vm_refcnt = 1; + pmap_pinit0(vmspace_pmap(&vmspace0)); /* * proc0 is not expected to enter usermode, so there is no special diff --git a/sys/kern/kern_cons.c b/sys/kern/kern_cons.c index 75f8b9cd6ec9..d219c81f7dc7 100644 --- a/sys/kern/kern_cons.c +++ b/sys/kern/kern_cons.c @@ -654,7 +654,7 @@ static void sysbeep_init(void *unused) { - callout_init(&beeping_timer, CALLOUT_MPSAFE); + callout_init(&beeping_timer, 1); } SYSINIT(sysbeep, SI_SUB_SOFTINTR, SI_ORDER_ANY, sysbeep_init, NULL); #else diff --git a/sys/kern/kern_cpuset.c b/sys/kern/kern_cpuset.c index 47845efb54c0..71481fe7503f 100644 --- a/sys/kern/kern_cpuset.c +++ b/sys/kern/kern_cpuset.c @@ -113,7 +113,7 @@ static struct unrhdr *cpuset_unr; static struct cpuset *cpuset_zero, *cpuset_default; /* Return the size of cpuset_t at the kernel level */ -SYSCTL_INT(_kern_sched, OID_AUTO, cpusetsize, CTLFLAG_RD, +SYSCTL_INT(_kern_sched, OID_AUTO, cpusetsize, CTLFLAG_RD | CTLFLAG_CAPRD, SYSCTL_NULL_INT_PTR, sizeof(cpuset_t), "sizeof(cpuset_t)"); cpuset_t *cpuset_root; diff --git a/sys/kern/kern_descrip.c b/sys/kern/kern_descrip.c index 329f418a1dae..78483962eccc 100644 --- a/sys/kern/kern_descrip.c +++ b/sys/kern/kern_descrip.c @@ -617,7 +617,6 @@ kern_fcntl(struct thread *td, int fd, int cmd, intptr_t arg) if (foffset < 0 || (flp->l_start > 0 && foffset > OFF_MAX - flp->l_start)) { - FILEDESC_SUNLOCK(fdp); error = EOVERFLOW; fdrop(fp, td); break; @@ -731,7 +730,6 @@ kern_fcntl(struct thread *td, int fd, int cmd, intptr_t arg) foffset > OFF_MAX - flp->l_start) || (flp->l_start < 0 && foffset < OFF_MIN - flp->l_start)) { - FILEDESC_SUNLOCK(fdp); error = EOVERFLOW; fdrop(fp, td); break; diff --git a/sys/kern/kern_event.c b/sys/kern/kern_event.c index e01f12c7d1b2..9000addbc29b 100644 --- a/sys/kern/kern_event.c +++ b/sys/kern/kern_event.c @@ -615,7 +615,7 @@ filt_timerattach(struct knote *kn) kn->kn_status &= ~KN_DETACHED; /* knlist_add clears it */ kn->kn_ptr.p_nexttime = malloc(sizeof(sbintime_t), M_KQUEUE, M_WAITOK); calloutp = malloc(sizeof(*calloutp), M_KQUEUE, M_WAITOK); - callout_init(calloutp, CALLOUT_MPSAFE); + callout_init(calloutp, 1); kn->kn_hook = calloutp; *kn->kn_ptr.p_nexttime = to + sbinuptime(); callout_reset_sbt_on(calloutp, *kn->kn_ptr.p_nexttime, 0, @@ -736,6 +736,13 @@ filt_usertouch(struct knote *kn, struct kevent *kev, u_long type) int sys_kqueue(struct thread *td, struct kqueue_args *uap) +{ + + return (kern_kqueue(td, 0)); +} + +int +kern_kqueue(struct thread *td, int flags) { struct filedesc *fdp; struct kqueue *kq; @@ -757,7 +764,7 @@ sys_kqueue(struct thread *td, struct kqueue_args *uap) PROC_UNLOCK(p); fdp = p->p_fd; - error = falloc(td, &fp, &fd, 0); + error = falloc(td, &fp, &fd, flags); if (error) goto done2; @@ -888,12 +895,9 @@ int kern_kevent(struct thread *td, int fd, int nchanges, int nevents, struct kevent_copyops *k_ops, const struct timespec *timeout) { - struct kevent keva[KQ_NEVENTS]; - struct kevent *kevp, *changes; - struct kqueue *kq; - struct file *fp; cap_rights_t rights; - int i, n, nerrors, error; + struct file *fp; + int error; cap_rights_init(&rights); if (nchanges > 0) @@ -904,9 +908,24 @@ kern_kevent(struct thread *td, int fd, int nchanges, int nevents, if (error != 0) return (error); + error = kern_kevent_fp(td, fp, nchanges, nevents, k_ops, timeout); + fdrop(fp, td); + + return (error); +} + +int +kern_kevent_fp(struct thread *td, struct file *fp, int nchanges, int nevents, + struct kevent_copyops *k_ops, const struct timespec *timeout) +{ + struct kevent keva[KQ_NEVENTS]; + struct kevent *kevp, *changes; + struct kqueue *kq; + int i, n, nerrors, error; + error = kqueue_acquire(fp, &kq); if (error != 0) - goto done_norel; + return (error); nerrors = 0; @@ -946,8 +965,6 @@ kern_kevent(struct thread *td, int fd, int nchanges, int nevents, error = kqueue_scan(kq, nevents, k_ops, timeout, keva, td); done: kqueue_release(kq, 0); -done_norel: - fdrop(fp, td); return (error); } diff --git a/sys/kern/kern_exec.c b/sys/kern/kern_exec.c index 9d893f8e445f..8668f0d0d030 100644 --- a/sys/kern/kern_exec.c +++ b/sys/kern/kern_exec.c @@ -193,21 +193,20 @@ struct execve_args { #endif int -sys_execve(td, uap) - struct thread *td; - struct execve_args /* { - char *fname; - char **argv; - char **envv; - } */ *uap; +sys_execve(struct thread *td, struct execve_args *uap) { - int error; struct image_args args; + struct vmspace *oldvmspace; + int error; + error = pre_execve(td, &oldvmspace); + if (error != 0) + return (error); error = exec_copyin_args(&args, uap->fname, UIO_USERSPACE, uap->argv, uap->envv); if (error == 0) error = kern_execve(td, &args, NULL); + post_execve(td, error, oldvmspace); return (error); } @@ -221,15 +220,20 @@ struct fexecve_args { int sys_fexecve(struct thread *td, struct fexecve_args *uap) { - int error; struct image_args args; + struct vmspace *oldvmspace; + int error; + error = pre_execve(td, &oldvmspace); + if (error != 0) + return (error); error = exec_copyin_args(&args, NULL, UIO_SYSSPACE, uap->argv, uap->envv); if (error == 0) { args.fd = uap->fd; error = kern_execve(td, &args, NULL); } + post_execve(td, error, oldvmspace); return (error); } @@ -243,65 +247,56 @@ struct __mac_execve_args { #endif int -sys___mac_execve(td, uap) - struct thread *td; - struct __mac_execve_args /* { - char *fname; - char **argv; - char **envv; - struct mac *mac_p; - } */ *uap; +sys___mac_execve(struct thread *td, struct __mac_execve_args *uap) { #ifdef MAC - int error; struct image_args args; + struct vmspace *oldvmspace; + int error; + error = pre_execve(td, &oldvmspace); + if (error != 0) + return (error); error = exec_copyin_args(&args, uap->fname, UIO_USERSPACE, uap->argv, uap->envv); if (error == 0) error = kern_execve(td, &args, uap->mac_p); + post_execve(td, error, oldvmspace); return (error); #else return (ENOSYS); #endif } -/* - * XXX: kern_execve has the astonishing property of not always returning to - * the caller. If sufficiently bad things happen during the call to - * do_execve(), it can end up calling exit1(); as a result, callers must - * avoid doing anything which they might need to undo (e.g., allocating - * memory). - */ int -kern_execve(td, args, mac_p) - struct thread *td; - struct image_args *args; - struct mac *mac_p; +pre_execve(struct thread *td, struct vmspace **oldvmspace) { - struct proc *p = td->td_proc; - struct vmspace *oldvmspace; + struct proc *p; int error; - AUDIT_ARG_ARGV(args->begin_argv, args->argc, - args->begin_envv - args->begin_argv); - AUDIT_ARG_ENVV(args->begin_envv, args->envc, - args->endp - args->begin_envv); - if (p->p_flag & P_HADTHREADS) { + KASSERT(td == curthread, ("non-current thread %p", td)); + error = 0; + p = td->td_proc; + if ((p->p_flag & P_HADTHREADS) != 0) { PROC_LOCK(p); - if (thread_single(p, SINGLE_BOUNDARY)) { - PROC_UNLOCK(p); - exec_free_args(args); - return (ERESTART); /* Try again later. */ - } + if (thread_single(p, SINGLE_BOUNDARY) != 0) + error = ERESTART; PROC_UNLOCK(p); } + KASSERT(error != 0 || (td->td_pflags & TDP_EXECVMSPC) == 0, + ("nested execve")); + *oldvmspace = p->p_vmspace; + return (error); +} - KASSERT((td->td_pflags & TDP_EXECVMSPC) == 0, ("nested execve")); - oldvmspace = td->td_proc->p_vmspace; - error = do_execve(td, args, mac_p); +void +post_execve(struct thread *td, int error, struct vmspace *oldvmspace) +{ + struct proc *p; - if (p->p_flag & P_HADTHREADS) { + KASSERT(td == curthread, ("non-current thread %p", td)); + p = td->td_proc; + if ((p->p_flag & P_HADTHREADS) != 0) { PROC_LOCK(p); /* * If success, we upgrade to SINGLE_EXIT state to @@ -314,13 +309,29 @@ kern_execve(td, args, mac_p) PROC_UNLOCK(p); } if ((td->td_pflags & TDP_EXECVMSPC) != 0) { - KASSERT(td->td_proc->p_vmspace != oldvmspace, + KASSERT(p->p_vmspace != oldvmspace, ("oldvmspace still used")); vmspace_free(oldvmspace); td->td_pflags &= ~TDP_EXECVMSPC; } +} - return (error); +/* + * XXX: kern_execve has the astonishing property of not always returning to + * the caller. If sufficiently bad things happen during the call to + * do_execve(), it can end up calling exit1(); as a result, callers must + * avoid doing anything which they might need to undo (e.g., allocating + * memory). + */ +int +kern_execve(struct thread *td, struct image_args *args, struct mac *mac_p) +{ + + AUDIT_ARG_ARGV(args->begin_argv, args->argc, + args->begin_envv - args->begin_argv); + AUDIT_ARG_ENVV(args->begin_envv, args->envc, + args->endp - args->begin_envv); + return (do_execve(td, args, mac_p)); } /* diff --git a/sys/kern/kern_exit.c b/sys/kern/kern_exit.c index 0a601a1b5d21..a2742c2cb8e3 100644 --- a/sys/kern/kern_exit.c +++ b/sys/kern/kern_exit.c @@ -204,6 +204,12 @@ exit1(struct thread *td, int rv) panic("Going nowhere without my init!"); } + /* + * Deref SU mp, since the thread does not return to userspace. + */ + if (softdep_ast_cleanup != NULL) + softdep_ast_cleanup(); + /* * MUST abort all other threads before proceeding past here. */ @@ -525,6 +531,8 @@ exit1(struct thread *td, int rv) */ while ((q = LIST_FIRST(&p->p_orphans)) != NULL) { PROC_LOCK(q); + CTR2(KTR_PTRACE, "exit: pid %d, clearing orphan %d", p->p_pid, + q->p_pid); clear_orphan(q); PROC_UNLOCK(q); } @@ -847,16 +855,19 @@ proc_reap(struct thread *td, struct proc *p, int *status, int options) PROC_LOCK(q); sigqueue_take(p->p_ksi); PROC_UNLOCK(q); - PROC_UNLOCK(p); /* * If we got the child via a ptrace 'attach', we need to give it back * to the old parent. */ - if (p->p_oppid != 0) { + if (p->p_oppid != 0 && p->p_oppid != p->p_pptr->p_pid) { + PROC_UNLOCK(p); t = proc_realparent(p); PROC_LOCK(t); PROC_LOCK(p); + CTR2(KTR_PTRACE, + "wait: traced child %d moved back to parent %d", p->p_pid, + t->p_pid); proc_reparent(p, t); p->p_oppid = 0; PROC_UNLOCK(p); @@ -867,6 +878,8 @@ proc_reap(struct thread *td, struct proc *p, int *status, int options) sx_xunlock(&proctree_lock); return; } + p->p_oppid = 0; + PROC_UNLOCK(p); /* * Remove other references to this process to ensure we have an @@ -948,7 +961,8 @@ proc_reap(struct thread *td, struct proc *p, int *status, int options) static int proc_to_reap(struct thread *td, struct proc *p, idtype_t idtype, id_t id, - int *status, int options, struct __wrusage *wrusage, siginfo_t *siginfo) + int *status, int options, struct __wrusage *wrusage, siginfo_t *siginfo, + int check_only) { struct proc *q; struct rusage *rup; @@ -1086,7 +1100,7 @@ proc_to_reap(struct thread *td, struct proc *p, idtype_t idtype, id_t id, calccru(p, &rup->ru_utime, &rup->ru_stime); } - if (p->p_state == PRS_ZOMBIE) { + if (p->p_state == PRS_ZOMBIE && !check_only) { PROC_SLOCK(p); proc_reap(td, p, status, options); return (-1); @@ -1180,7 +1194,7 @@ kern_wait6(struct thread *td, idtype_t idtype, id_t id, int *status, sx_xlock(&proctree_lock); LIST_FOREACH(p, &q->p_children, p_sibling) { ret = proc_to_reap(td, p, idtype, id, status, options, - wrusage, siginfo); + wrusage, siginfo, 0); if (ret == 0) continue; else if (ret == 1) @@ -1214,6 +1228,10 @@ kern_wait6(struct thread *td, idtype_t idtype, id_t id, int *status, PROC_UNLOCK(q); } + CTR4(KTR_PTRACE, + "wait: returning trapped pid %d status %#x (xstat %d) xthread %d", + p->p_pid, W_STOPCODE(p->p_xstat), p->p_xstat, + p->p_xthread != NULL ? p->p_xthread->td_tid : -1); PROC_UNLOCK(p); return (0); } @@ -1278,15 +1296,17 @@ kern_wait6(struct thread *td, idtype_t idtype, id_t id, int *status, * for. By maintaining a list of orphans we allow the parent * to successfully wait until the child becomes a zombie. */ - LIST_FOREACH(p, &q->p_orphans, p_orphan) { - ret = proc_to_reap(td, p, idtype, id, status, options, - wrusage, siginfo); - if (ret == 0) - continue; - else if (ret == 1) - nfound++; - else - return (0); + if (nfound == 0) { + LIST_FOREACH(p, &q->p_orphans, p_orphan) { + ret = proc_to_reap(td, p, idtype, id, NULL, options, + NULL, NULL, 1); + if (ret != 0) { + KASSERT(ret != -1, ("reaped an orphan (pid %d)", + (int)td->td_retval[0])); + nfound++; + break; + } + } } if (nfound == 0) { sx_xunlock(&proctree_lock); diff --git a/sys/kern/kern_fork.c b/sys/kern/kern_fork.c index 2c7fe2e1764a..a3fde184ed7b 100644 --- a/sys/kern/kern_fork.c +++ b/sys/kern/kern_fork.c @@ -1035,6 +1035,9 @@ fork_return(struct thread *td, struct trapframe *frame) dbg = p->p_pptr->p_pptr; p->p_flag |= P_TRACED; p->p_oppid = p->p_pptr->p_pid; + CTR2(KTR_PTRACE, + "fork_return: attaching to new child pid %d: oppid %d", + p->p_pid, p->p_oppid); proc_reparent(p, dbg); sx_xunlock(&proctree_lock); td->td_dbgflags |= TDB_CHILD; diff --git a/sys/kern/kern_ktr.c b/sys/kern/kern_ktr.c index 2a405936320d..32ded48465a9 100644 --- a/sys/kern/kern_ktr.c +++ b/sys/kern/kern_ktr.c @@ -96,8 +96,8 @@ static MALLOC_DEFINE(M_KTR, "KTR", "KTR"); FEATURE(ktr, "Kernel support for KTR kernel tracing facility"); volatile int ktr_idx = 0; -int ktr_mask = KTR_MASK; -int ktr_compile = KTR_COMPILE; +uint64_t ktr_mask = KTR_MASK; +uint64_t ktr_compile = KTR_COMPILE; int ktr_entries = KTR_BOOT_ENTRIES; int ktr_version = KTR_VERSION; struct ktr_entry ktr_buf_init[KTR_BOOT_ENTRIES]; @@ -109,7 +109,7 @@ static SYSCTL_NODE(_debug, OID_AUTO, ktr, CTLFLAG_RD, 0, "KTR options"); SYSCTL_INT(_debug_ktr, OID_AUTO, version, CTLFLAG_RD, &ktr_version, 0, "Version of the KTR interface"); -SYSCTL_UINT(_debug_ktr, OID_AUTO, compile, CTLFLAG_RD, +SYSCTL_UQUAD(_debug_ktr, OID_AUTO, compile, CTLFLAG_RD, &ktr_compile, 0, "Bitmask of KTR event classes compiled into the kernel"); static int @@ -162,18 +162,19 @@ SYSCTL_PROC(_debug_ktr, OID_AUTO, clear, CTLTYPE_INT|CTLFLAG_RW, 0, 0, static int sysctl_debug_ktr_mask(SYSCTL_HANDLER_ARGS) { - int mask, error; + uint64_t mask; + int error; mask = ktr_mask; - error = sysctl_handle_int(oidp, &mask, 0, req); + error = sysctl_handle_64(oidp, &mask, 0, req); if (error || !req->newptr) return (error); ktr_mask = mask; return (error); } -SYSCTL_PROC(_debug_ktr, OID_AUTO, mask, CTLTYPE_UINT|CTLFLAG_RWTUN, 0, 0, - sysctl_debug_ktr_mask, "IU", +SYSCTL_PROC(_debug_ktr, OID_AUTO, mask, CTLTYPE_U64 | CTLFLAG_RWTUN, 0, 0, + sysctl_debug_ktr_mask, "QU", "Bitmask of KTR event classes for which logging is enabled"); #if KTR_ENTRIES > KTR_BOOT_ENTRIES @@ -184,7 +185,7 @@ SYSCTL_PROC(_debug_ktr, OID_AUTO, mask, CTLTYPE_UINT|CTLFLAG_RWTUN, 0, 0, static void ktr_entries_initializer(void *dummy __unused) { - int mask; + uint64_t mask; /* Temporarily disable ktr in case malloc() is being traced. */ mask = ktr_mask; @@ -208,7 +209,8 @@ SYSINIT(ktr_entries_initializer, SI_SUB_KMEM, SI_ORDER_ANY, static int sysctl_debug_ktr_entries(SYSCTL_HANDLER_ARGS) { - int entries, error, mask; + uint64_t mask; + int entries, error; struct ktr_entry *buf, *oldbuf; entries = ktr_entries; @@ -219,7 +221,7 @@ sysctl_debug_ktr_entries(SYSCTL_HANDLER_ARGS) return (ERANGE); /* Disable ktr temporarily. */ mask = ktr_mask; - atomic_store_rel_int(&ktr_mask, 0); + ktr_mask = 0; /* Wait for threads to go idle. */ if ((error = quiesce_all_cpus("ktrent", PCATCH)) != 0) { ktr_mask = mask; @@ -235,7 +237,7 @@ sysctl_debug_ktr_entries(SYSCTL_HANDLER_ARGS) ktr_buf = buf; ktr_entries = entries; ktr_idx = 0; - atomic_store_rel_int(&ktr_mask, mask); + ktr_mask = mask; if (oldbuf != NULL) free(oldbuf, M_KTR); @@ -310,7 +312,7 @@ SYSCTL_PROC(_debug_ktr, OID_AUTO, alq_enable, #endif void -ktr_tracepoint(u_int mask, const char *file, int line, const char *format, +ktr_tracepoint(uint64_t mask, const char *file, int line, const char *format, u_long arg1, u_long arg2, u_long arg3, u_long arg4, u_long arg5, u_long arg6) { diff --git a/sys/kern/kern_malloc.c b/sys/kern/kern_malloc.c index aef1e4e23d31..ff5b106e385e 100644 --- a/sys/kern/kern_malloc.c +++ b/sys/kern/kern_malloc.c @@ -665,13 +665,15 @@ reallocf(void *addr, unsigned long size, struct malloc_type *mtp, int flags) } /* - * Wake the page daemon when we exhaust KVA. It will call the lowmem handler - * and uma_reclaim() callbacks in a context that is safe. + * Wake the uma reclamation pagedaemon thread when we exhaust KVA. It + * will call the lowmem handler and uma_reclaim() callbacks in a + * context that is safe. */ static void kmem_reclaim(vmem_t *vm, int flags) { + uma_reclaim_wakeup(); pagedaemon_wakeup(); } diff --git a/sys/kern/kern_racct.c b/sys/kern/kern_racct.c index 5cee140cc1e0..e8ae9fef7646 100644 --- a/sys/kern/kern_racct.c +++ b/sys/kern/kern_racct.c @@ -70,7 +70,7 @@ FEATURE(racct, "Resource Accounting"); * Do not block processes that have their %cpu usage <= pcpu_threshold. */ static int pcpu_threshold = 1; -#ifdef RACCT_DISABLED +#ifdef RACCT_DEFAULT_TO_DISABLED int racct_enable = 0; #else int racct_enable = 1; diff --git a/sys/kern/kern_shutdown.c b/sys/kern/kern_shutdown.c index 5125480a04ea..4d57fd3f3fcf 100644 --- a/sys/kern/kern_shutdown.c +++ b/sys/kern/kern_shutdown.c @@ -873,16 +873,16 @@ mkdumpheader(struct kerneldumpheader *kdh, char *magic, uint32_t archver, { bzero(kdh, sizeof(*kdh)); - strncpy(kdh->magic, magic, sizeof(kdh->magic)); - strncpy(kdh->architecture, MACHINE_ARCH, sizeof(kdh->architecture)); + strlcpy(kdh->magic, magic, sizeof(kdh->magic)); + strlcpy(kdh->architecture, MACHINE_ARCH, sizeof(kdh->architecture)); kdh->version = htod32(KERNELDUMPVERSION); kdh->architectureversion = htod32(archver); kdh->dumplength = htod64(dumplen); kdh->dumptime = htod64(time_second); kdh->blocksize = htod32(blksz); - strncpy(kdh->hostname, prison0.pr_hostname, sizeof(kdh->hostname)); - strncpy(kdh->versionstring, version, sizeof(kdh->versionstring)); + strlcpy(kdh->hostname, prison0.pr_hostname, sizeof(kdh->hostname)); + strlcpy(kdh->versionstring, version, sizeof(kdh->versionstring)); if (panicstr != NULL) - strncpy(kdh->panicstring, panicstr, sizeof(kdh->panicstring)); + strlcpy(kdh->panicstring, panicstr, sizeof(kdh->panicstring)); kdh->parity = kerneldump_parity(kdh); } diff --git a/sys/kern/kern_sig.c b/sys/kern/kern_sig.c index 154c250b4b91..b30e1ed75461 100644 --- a/sys/kern/kern_sig.c +++ b/sys/kern/kern_sig.c @@ -2478,6 +2478,8 @@ ptracestop(struct thread *td, int sig) td->td_dbgflags |= TDB_XSIG; td->td_xsig = sig; + CTR4(KTR_PTRACE, "ptracestop: tid %d (pid %d) flags %#x sig %d", + td->td_tid, p->p_pid, td->td_dbgflags, sig); PROC_SLOCK(p); while ((p->p_flag & P_TRACED) && (td->td_dbgflags & TDB_XSIG)) { if (p->p_flag & P_SINGLE_EXIT) { diff --git a/sys/kern/kern_synch.c b/sys/kern/kern_synch.c index a238a0944fbc..e0ee2dc0dc86 100644 --- a/sys/kern/kern_synch.c +++ b/sys/kern/kern_synch.c @@ -556,7 +556,7 @@ loadav(void *arg) static void synch_setup(void *dummy) { - callout_init(&loadav_callout, CALLOUT_MPSAFE); + callout_init(&loadav_callout, 1); /* Kick off timeout driven events by calling first time. */ loadav(NULL); diff --git a/sys/kern/kern_thr.c b/sys/kern/kern_thr.c index 6911bb97b3df..6cd215e5d2e3 100644 --- a/sys/kern/kern_thr.c +++ b/sys/kern/kern_thr.c @@ -162,12 +162,6 @@ create_thread(struct thread *td, mcontext_t *ctx, p = td->td_proc; - /* Have race condition but it is cheap. */ - if (p->p_numthreads >= max_threads_per_proc) { - ++max_threads_hits; - return (EPROCLIM); - } - if (rtp != NULL) { switch(rtp->type) { case RTP_PRIO_REALTIME: @@ -197,11 +191,9 @@ create_thread(struct thread *td, mcontext_t *ctx, #endif /* Initialize our td */ - newtd = thread_alloc(0); - if (newtd == NULL) { - error = ENOMEM; + error = kern_thr_alloc(p, 0, &newtd); + if (error) goto fail; - } cpu_set_upcall(newtd, td); @@ -307,9 +299,6 @@ int sys_thr_exit(struct thread *td, struct thr_exit_args *uap) /* long *state */ { - struct proc *p; - - p = td->td_proc; /* Signal userland that it can free the stack. */ if ((void *)uap->state != NULL) { @@ -317,8 +306,17 @@ sys_thr_exit(struct thread *td, struct thr_exit_args *uap) kern_umtx_wake(td, uap->state, INT_MAX, 0); } - rw_wlock(&tidhash_lock); + return (kern_thr_exit(td)); +} +int +kern_thr_exit(struct thread *td) +{ + struct proc *p; + + p = td->td_proc; + + rw_wlock(&tidhash_lock); PROC_LOCK(p); if (p->p_numthreads != 1) { @@ -560,3 +558,20 @@ sys_thr_set_name(struct thread *td, struct thr_set_name_args *uap) PROC_UNLOCK(p); return (error); } + +int +kern_thr_alloc(struct proc *p, int pages, struct thread **ntd) +{ + + /* Have race condition but it is cheap. */ + if (p->p_numthreads >= max_threads_per_proc) { + ++max_threads_hits; + return (EPROCLIM); + } + + *ntd = thread_alloc(pages); + if (*ntd == NULL) + return (ENOMEM); + + return (0); +} diff --git a/sys/kern/kern_thread.c b/sys/kern/kern_thread.c index 0a93dbded5c1..dce760c8ae6a 100644 --- a/sys/kern/kern_thread.c +++ b/sys/kern/kern_thread.c @@ -45,6 +45,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include #include #include @@ -74,6 +75,8 @@ static struct mtx zombie_lock; MTX_SYSINIT(zombie_lock, &zombie_lock, "zombie lock", MTX_SPIN); static void thread_zombie(struct thread *); +static int thread_unsuspend_one(struct thread *td, struct proc *p, + bool boundary); #define TID_BUFFER_SIZE 1024 @@ -445,7 +448,7 @@ thread_exit(void) if (p->p_numthreads == p->p_suspcount) { thread_lock(p->p_singlethread); wakeup_swapper = thread_unsuspend_one( - p->p_singlethread, p); + p->p_singlethread, p, false); thread_unlock(p->p_singlethread); if (wakeup_swapper) kick_proc0(); @@ -544,7 +547,7 @@ thread_link(struct thread *td, struct proc *p) LIST_INIT(&td->td_lprof[0]); LIST_INIT(&td->td_lprof[1]); sigqueue_init(&td->td_sigqueue, p); - callout_init(&td->td_slpcallout, CALLOUT_MPSAFE); + callout_init(&td->td_slpcallout, 1); TAILQ_INSERT_TAIL(&p->p_threads, td, td_plist); p->p_numthreads++; } @@ -603,19 +606,19 @@ weed_inhib(int mode, struct thread *td2, struct proc *p) switch (mode) { case SINGLE_EXIT: if (TD_IS_SUSPENDED(td2)) - wakeup_swapper |= thread_unsuspend_one(td2, p); + wakeup_swapper |= thread_unsuspend_one(td2, p, true); if (TD_ON_SLEEPQ(td2) && (td2->td_flags & TDF_SINTR) != 0) wakeup_swapper |= sleepq_abort(td2, EINTR); break; case SINGLE_BOUNDARY: if (TD_IS_SUSPENDED(td2) && (td2->td_flags & TDF_BOUNDARY) == 0) - wakeup_swapper |= thread_unsuspend_one(td2, p); + wakeup_swapper |= thread_unsuspend_one(td2, p, false); if (TD_ON_SLEEPQ(td2) && (td2->td_flags & TDF_SINTR) != 0) wakeup_swapper |= sleepq_abort(td2, ERESTART); break; case SINGLE_NO_EXIT: if (TD_IS_SUSPENDED(td2) && (td2->td_flags & TDF_BOUNDARY) == 0) - wakeup_swapper |= thread_unsuspend_one(td2, p); + wakeup_swapper |= thread_unsuspend_one(td2, p, false); if (TD_ON_SLEEPQ(td2) && (td2->td_flags & TDF_SINTR) != 0) wakeup_swapper |= sleepq_abort(td2, ERESTART); break; @@ -630,7 +633,7 @@ weed_inhib(int mode, struct thread *td2, struct proc *p) */ if (TD_IS_SUSPENDED(td2) && (td2->td_flags & (TDF_BOUNDARY | TDF_ALLPROCSUSP)) == 0) - wakeup_swapper |= thread_unsuspend_one(td2, p); + wakeup_swapper |= thread_unsuspend_one(td2, p, false); if (TD_ON_SLEEPQ(td2) && (td2->td_flags & TDF_SINTR) != 0) { if ((td2->td_flags & TDF_SBDRY) == 0) { thread_suspend_one(td2); @@ -759,6 +762,29 @@ thread_single(struct proc *p, int mode) PROC_LOCK(p); PROC_SLOCK(p); } + } else if (mode == SINGLE_BOUNDARY) { + /* + * Wait until all suspended threads are removed from + * the processors. The thread_suspend_check() + * increments p_boundary_count while it is still + * running, which makes it possible for the execve() + * to destroy vmspace while our other threads are + * still using the address space. + * + * We lock the thread, which is only allowed to + * succeed after context switch code finished using + * the address space. + */ + FOREACH_THREAD_IN_PROC(p, td2) { + if (td2 == td) + continue; + thread_lock(td2); + KASSERT((td2->td_flags & TDF_BOUNDARY) != 0, + ("td %p not on boundary", td2)); + KASSERT(TD_IS_SUSPENDED(td2), + ("td %p is not suspended", td2)); + thread_unlock(td2); + } } PROC_SUNLOCK(p); return (0); @@ -843,12 +869,9 @@ thread_suspend_check(int return_instead) return (ERESTART); /* - * Ignore suspend requests for stop signals if they - * are deferred. + * Ignore suspend requests if they are deferred. */ - if ((P_SHOULDSTOP(p) == P_STOPPED_SIG || - (p->p_flag & P_TOTAL_STOP) != 0) && - (td->td_flags & TDF_SBDRY) != 0) { + if ((td->td_flags & TDF_SBDRY) != 0) { KASSERT(return_instead, ("TDF_SBDRY set for unsafe thread_suspend_check")); return (0); @@ -862,6 +885,14 @@ thread_suspend_check(int return_instead) if ((p->p_flag & P_SINGLE_EXIT) && (p->p_singlethread != td)) { PROC_UNLOCK(p); tidhash_remove(td); + + /* + * Allow Linux emulation layer to do some work + * before thread suicide. + */ + if (__predict_false(p->p_sysent->sv_thread_detach != NULL)) + (p->p_sysent->sv_thread_detach)(td); + PROC_LOCK(p); tdsigcleanup(td); umtx_thread_exit(td); @@ -875,8 +906,8 @@ thread_suspend_check(int return_instead) if (P_SHOULDSTOP(p) == P_STOPPED_SINGLE) { if (p->p_numthreads == p->p_suspcount + 1) { thread_lock(p->p_singlethread); - wakeup_swapper = - thread_unsuspend_one(p->p_singlethread, p); + wakeup_swapper = thread_unsuspend_one( + p->p_singlethread, p, false); thread_unlock(p->p_singlethread); if (wakeup_swapper) kick_proc0(); @@ -895,15 +926,8 @@ thread_suspend_check(int return_instead) } PROC_SUNLOCK(p); mi_switch(SW_INVOL | SWT_SUSPEND, NULL); - if (return_instead == 0) - td->td_flags &= ~TDF_BOUNDARY; thread_unlock(td); PROC_LOCK(p); - if (return_instead == 0) { - PROC_SLOCK(p); - p->p_boundary_count--; - PROC_SUNLOCK(p); - } } return (0); } @@ -952,8 +976,8 @@ thread_suspend_one(struct thread *td) sched_sleep(td, 0); } -int -thread_unsuspend_one(struct thread *td, struct proc *p) +static int +thread_unsuspend_one(struct thread *td, struct proc *p, bool boundary) { THREAD_LOCK_ASSERT(td, MA_OWNED); @@ -963,6 +987,10 @@ thread_unsuspend_one(struct thread *td, struct proc *p) if (td->td_proc == p) { PROC_SLOCK_ASSERT(p, MA_OWNED); p->p_suspcount--; + if (boundary && (td->td_flags & TDF_BOUNDARY) != 0) { + td->td_flags &= ~TDF_BOUNDARY; + p->p_boundary_count--; + } } return (setrunnable(td)); } @@ -983,12 +1011,13 @@ thread_unsuspend(struct proc *p) FOREACH_THREAD_IN_PROC(p, td) { thread_lock(td); if (TD_IS_SUSPENDED(td)) { - wakeup_swapper |= thread_unsuspend_one(td, p); + wakeup_swapper |= thread_unsuspend_one(td, p, + true); } thread_unlock(td); } - } else if ((P_SHOULDSTOP(p) == P_STOPPED_SINGLE) && - (p->p_numthreads == p->p_suspcount)) { + } else if (P_SHOULDSTOP(p) == P_STOPPED_SINGLE && + p->p_numthreads == p->p_suspcount) { /* * Stopping everything also did the job for the single * threading request. Now we've downgraded to single-threaded, @@ -997,7 +1026,7 @@ thread_unsuspend(struct proc *p) if (p->p_singlethread->td_proc == p) { thread_lock(p->p_singlethread); wakeup_swapper = thread_unsuspend_one( - p->p_singlethread, p); + p->p_singlethread, p, false); thread_unlock(p->p_singlethread); } } @@ -1021,6 +1050,12 @@ thread_single_end(struct proc *p, int mode) KASSERT((mode == SINGLE_ALLPROC && (p->p_flag & P_TOTAL_STOP) != 0) || (mode != SINGLE_ALLPROC && (p->p_flag & P_TOTAL_STOP) == 0), ("mode %d does not match P_TOTAL_STOP", mode)); + KASSERT(mode == SINGLE_ALLPROC || p->p_singlethread == curthread, + ("thread_single_end from other thread %p %p", + curthread, p->p_singlethread)); + KASSERT(mode != SINGLE_BOUNDARY || + (p->p_flag & P_SINGLE_BOUNDARY) != 0, + ("mis-matched SINGLE_BOUNDARY flags %x", p->p_flag)); p->p_flag &= ~(P_STOPPED_SINGLE | P_SINGLE_EXIT | P_SINGLE_BOUNDARY | P_TOTAL_STOP); PROC_SLOCK(p); @@ -1036,11 +1071,14 @@ thread_single_end(struct proc *p, int mode) FOREACH_THREAD_IN_PROC(p, td) { thread_lock(td); if (TD_IS_SUSPENDED(td)) { - wakeup_swapper |= thread_unsuspend_one(td, p); + wakeup_swapper |= thread_unsuspend_one(td, p, + mode == SINGLE_BOUNDARY); } thread_unlock(td); } } + KASSERT(mode != SINGLE_BOUNDARY || p->p_boundary_count == 0, + ("inconsistent boundary count %d", p->p_boundary_count)); PROC_SUNLOCK(p); if (wakeup_swapper) kick_proc0(); diff --git a/sys/kern/p1003_1b.c b/sys/kern/p1003_1b.c index fb89efc5e00f..ac6cd60a5d6e 100644 --- a/sys/kern/p1003_1b.c +++ b/sys/kern/p1003_1b.c @@ -130,15 +130,28 @@ sys_sched_setparam(struct thread *td, struct sched_setparam_args *uap) targettd = FIRST_THREAD_IN_PROC(targetp); } - e = p_cansched(td, targetp); - if (e == 0) { - e = ksched_setparam(ksched, targettd, - (const struct sched_param *)&sched_param); - } + e = kern_sched_setparam(td, targettd, &sched_param); PROC_UNLOCK(targetp); return (e); } +int +kern_sched_setparam(struct thread *td, struct thread *targettd, + struct sched_param *param) +{ + struct proc *targetp; + int error; + + targetp = targettd->td_proc; + PROC_LOCK_ASSERT(targetp, MA_OWNED); + + error = p_cansched(td, targetp); + if (error == 0) + error = ksched_setparam(ksched, targettd, + (const struct sched_param *)param); + return (error); +} + int sys_sched_getparam(struct thread *td, struct sched_getparam_args *uap) { @@ -159,16 +172,29 @@ sys_sched_getparam(struct thread *td, struct sched_getparam_args *uap) targettd = FIRST_THREAD_IN_PROC(targetp); } - e = p_cansee(td, targetp); - if (e == 0) { - e = ksched_getparam(ksched, targettd, &sched_param); - } + e = kern_sched_getparam(td, targettd, &sched_param); PROC_UNLOCK(targetp); if (e == 0) e = copyout(&sched_param, uap->param, sizeof(sched_param)); return (e); } +int +kern_sched_getparam(struct thread *td, struct thread *targettd, + struct sched_param *param) +{ + struct proc *targetp; + int error; + + targetp = targettd->td_proc; + PROC_LOCK_ASSERT(targetp, MA_OWNED); + + error = p_cansee(td, targetp); + if (error == 0) + error = ksched_getparam(ksched, targettd, param); + return (error); +} + int sys_sched_setscheduler(struct thread *td, struct sched_setscheduler_args *uap) { @@ -177,11 +203,6 @@ sys_sched_setscheduler(struct thread *td, struct sched_setscheduler_args *uap) struct thread *targettd; struct proc *targetp; - /* Don't allow non root user to set a scheduler policy. */ - e = priv_check(td, PRIV_SCHED_SET); - if (e) - return (e); - e = copyin(uap->param, &sched_param, sizeof(sched_param)); if (e) return (e); @@ -197,15 +218,34 @@ sys_sched_setscheduler(struct thread *td, struct sched_setscheduler_args *uap) targettd = FIRST_THREAD_IN_PROC(targetp); } - e = p_cansched(td, targetp); - if (e == 0) { - e = ksched_setscheduler(ksched, targettd, - uap->policy, (const struct sched_param *)&sched_param); - } + e = kern_sched_setscheduler(td, targettd, uap->policy, + &sched_param); PROC_UNLOCK(targetp); return (e); } +int +kern_sched_setscheduler(struct thread *td, struct thread *targettd, + int policy, struct sched_param *param) +{ + struct proc *targetp; + int error; + + targetp = targettd->td_proc; + PROC_LOCK_ASSERT(targetp, MA_OWNED); + + /* Don't allow non root user to set a scheduler policy. */ + error = priv_check(td, PRIV_SCHED_SET); + if (error) + return (error); + + error = p_cansched(td, targetp); + if (error == 0) + error = ksched_setscheduler(ksched, targettd, policy, + (const struct sched_param *)param); + return (error); +} + int sys_sched_getscheduler(struct thread *td, struct sched_getscheduler_args *uap) { @@ -224,16 +264,30 @@ sys_sched_getscheduler(struct thread *td, struct sched_getscheduler_args *uap) targettd = FIRST_THREAD_IN_PROC(targetp); } - e = p_cansee(td, targetp); - if (e == 0) { - e = ksched_getscheduler(ksched, targettd, &policy); - td->td_retval[0] = policy; - } + e = kern_sched_getscheduler(td, targettd, &policy); PROC_UNLOCK(targetp); + if (e == 0) + td->td_retval[0] = policy; return (e); } +int +kern_sched_getscheduler(struct thread *td, struct thread *targettd, + int *policy) +{ + struct proc *targetp; + int error; + + targetp = targettd->td_proc; + PROC_LOCK_ASSERT(targetp, MA_OWNED); + + error = p_cansee(td, targetp); + if (error == 0) + error = ksched_getscheduler(ksched, targettd, policy); + return (error); +} + int sys_sched_yield(struct thread *td, struct sched_yield_args *uap) { @@ -296,13 +350,26 @@ kern_sched_rr_get_interval(struct thread *td, pid_t pid, targettd = FIRST_THREAD_IN_PROC(targetp); } - e = p_cansee(td, targetp); - if (e == 0) - e = ksched_rr_get_interval(ksched, targettd, ts); + e = kern_sched_rr_get_interval_td(td, targettd, ts); PROC_UNLOCK(targetp); return (e); } +int +kern_sched_rr_get_interval_td(struct thread *td, struct thread *targettd, + struct timespec *ts) +{ + struct proc *p; + int error; + + p = targettd->td_proc; + PROC_LOCK_ASSERT(p, MA_OWNED); + + error = p_cansee(td, p); + if (error == 0) + error = ksched_rr_get_interval(ksched, targettd, ts); + return (error); +} #endif static void diff --git a/sys/kern/subr_nvlist.c b/sys/kern/subr_nvlist.c index 40e49ffa9954..de1972e42c59 100644 --- a/sys/kern/subr_nvlist.c +++ b/sys/kern/subr_nvlist.c @@ -838,6 +838,7 @@ nvlist_xunpack(const void *buf, size_t size, const int *fds, size_t nfds, if (nvl->nvl_parent == NULL) goto failed; nvl = nvpair_nvlist(nvl->nvl_parent); + nvpair_free_structure(nvp); continue; default: PJDLOG_ABORT("Invalid type (%d).", nvpair_type(nvp)); @@ -902,8 +903,8 @@ nvlist_send(int sock, const nvlist_t *nvl) ret = 0; out: ERRNO_SAVE(); - free(fds); - free(data); + nv_free(fds); + nv_free(data); ERRNO_RESTORE(); return (ret); } @@ -958,8 +959,8 @@ nvlist_recv(int sock, int flags) ret = nvl; out: ERRNO_SAVE(); - free(buf); - free(fds); + nv_free(buf); + nv_free(fds); ERRNO_RESTORE(); return (ret); diff --git a/sys/kern/subr_nvpair.c b/sys/kern/subr_nvpair.c index cde08e6004c9..44b0ab89674d 100644 --- a/sys/kern/subr_nvpair.c +++ b/sys/kern/subr_nvpair.c @@ -742,7 +742,7 @@ nvpair_allocv(const char *name, int type, uint64_t data, size_t datasize) } return (nvp); -}; +} nvpair_t * nvpair_create_stringf(const char *name, const char *valuefmt, ...) diff --git a/sys/kern/subr_taskqueue.c b/sys/kern/subr_taskqueue.c index 2cf1f63d9a21..f0a5a1ba85e4 100644 --- a/sys/kern/subr_taskqueue.c +++ b/sys/kern/subr_taskqueue.c @@ -323,17 +323,16 @@ taskqueue_drain_tq_queue(struct taskqueue *queue) return; /* - * Enqueue our barrier with the lowest possible priority - * so we are inserted after all current tasks. + * Enqueue our barrier after all current tasks, but with + * the highest priority so that newly queued tasks cannot + * pass it. Because of the high priority, we can not use + * taskqueue_enqueue_locked directly (which drops the lock + * anyway) so just insert it at tail while we have the + * queue lock. */ - TASK_INIT(&t_barrier, 0, taskqueue_task_nop_fn, &t_barrier); - taskqueue_enqueue_locked(queue, &t_barrier); - - /* - * Raise the barrier's priority so newly queued tasks cannot - * pass it. - */ - t_barrier.ta_priority = USHRT_MAX; + TASK_INIT(&t_barrier, USHRT_MAX, taskqueue_task_nop_fn, &t_barrier); + STAILQ_INSERT_TAIL(&queue->tq_queue, &t_barrier, ta_link); + t_barrier.ta_pending = 1; /* * Once the barrier has executed, all previously queued tasks diff --git a/sys/kern/subr_trap.c b/sys/kern/subr_trap.c index 93f7557aef63..82387c2d2d1e 100644 --- a/sys/kern/subr_trap.c +++ b/sys/kern/subr_trap.c @@ -86,6 +86,8 @@ __FBSDID("$FreeBSD$"); #include +void (*softdep_ast_cleanup)(void); + /* * Define the code needed before returning to user mode, for trap and * syscall. @@ -114,6 +116,9 @@ userret(struct thread *td, struct trapframe *frame) #ifdef KTRACE KTRUSERRET(td); #endif + if (softdep_ast_cleanup != NULL) + softdep_ast_cleanup(); + /* * If this thread tickled GEOM, we need to wait for the giggling to * stop before we return to userland @@ -157,6 +162,8 @@ userret(struct thread *td, struct trapframe *frame) ("userret: Returning while holding vnode reservation")); KASSERT((td->td_flags & TDF_SBDRY) == 0, ("userret: Returning with stop signals deferred")); + KASSERT(td->td_su == NULL, + ("userret: Returning with SU cleanup request not handled")); #ifdef VIMAGE /* Unfortunately td_vnet_lpush needs VNET_DEBUG. */ VNET_ASSERT(curvnet == NULL, diff --git a/sys/kern/subr_turnstile.c b/sys/kern/subr_turnstile.c index 367297a6a415..7765cbf68c64 100644 --- a/sys/kern/subr_turnstile.c +++ b/sys/kern/subr_turnstile.c @@ -1151,7 +1151,7 @@ DB_SHOW_COMMAND(lockchain, db_show_lockchain) /* Figure out which thread to start with. */ if (have_addr) - td = db_lookup_thread(addr, TRUE); + td = db_lookup_thread(addr, true); else td = kdb_thread; @@ -1236,7 +1236,7 @@ DB_SHOW_COMMAND(sleepchain, db_show_sleepchain) /* Figure out which thread to start with. */ if (have_addr) - td = db_lookup_thread(addr, TRUE); + td = db_lookup_thread(addr, true); else td = kdb_thread; diff --git a/sys/kern/subr_vmem.c b/sys/kern/subr_vmem.c index 80940be4410f..4e08113d4c49 100644 --- a/sys/kern/subr_vmem.c +++ b/sys/kern/subr_vmem.c @@ -766,7 +766,7 @@ vmem_start_callout(void *unused) TASK_INIT(&vmem_periodic_wk, 0, vmem_periodic, NULL); vmem_periodic_interval = hz * 10; - callout_init(&vmem_periodic_ch, CALLOUT_MPSAFE); + callout_init(&vmem_periodic_ch, 1); callout_reset(&vmem_periodic_ch, vmem_periodic_interval, vmem_periodic_kick, NULL); } diff --git a/sys/kern/subr_witness.c b/sys/kern/subr_witness.c index f80026a32d43..dc343d0162c6 100644 --- a/sys/kern/subr_witness.c +++ b/sys/kern/subr_witness.c @@ -2440,7 +2440,7 @@ DB_SHOW_COMMAND(locks, db_witness_list) struct thread *td; if (have_addr) - td = db_lookup_thread(addr, TRUE); + td = db_lookup_thread(addr, true); else td = kdb_thread; witness_ddb_list(td); diff --git a/sys/kern/sys_process.c b/sys/kern/sys_process.c index 7dd3d1754361..3bf2db80871f 100644 --- a/sys/kern/sys_process.c +++ b/sys/kern/sys_process.c @@ -432,6 +432,9 @@ ptrace_vm_entry(struct thread *td, struct proc *p, struct ptrace_vm_entry *pve) free(freepath, M_TEMP); } } + if (error == 0) + CTR3(KTR_PTRACE, "PT_VM_ENTRY: pid %d, entry %d, start %p", + p->p_pid, pve->pve_entry, pve->pve_start); return (error); } @@ -826,6 +829,7 @@ kern_ptrace(struct thread *td, int req, pid_t pid, void *addr, int data) if (p->p_flag & P_PPWAIT) p->p_flag |= P_PPTRACE; p->p_oppid = p->p_pptr->p_pid; + CTR1(KTR_PTRACE, "PT_TRACE_ME: pid %d", p->p_pid); break; case PT_ATTACH: @@ -845,17 +849,25 @@ kern_ptrace(struct thread *td, int req, pid_t pid, void *addr, int data) proc_reparent(p, td->td_proc); } data = SIGSTOP; + CTR2(KTR_PTRACE, "PT_ATTACH: pid %d, oppid %d", p->p_pid, + p->p_oppid); goto sendsig; /* in PT_CONTINUE below */ case PT_CLEARSTEP: + CTR2(KTR_PTRACE, "PT_CLEARSTEP: tid %d (pid %d)", td2->td_tid, + p->p_pid); error = ptrace_clear_single_step(td2); break; case PT_SETSTEP: + CTR2(KTR_PTRACE, "PT_SETSTEP: tid %d (pid %d)", td2->td_tid, + p->p_pid); error = ptrace_single_step(td2); break; case PT_SUSPEND: + CTR2(KTR_PTRACE, "PT_SUSPEND: tid %d (pid %d)", td2->td_tid, + p->p_pid); td2->td_dbgflags |= TDB_SUSPEND; thread_lock(td2); td2->td_flags |= TDF_NEEDSUSPCHK; @@ -863,10 +875,15 @@ kern_ptrace(struct thread *td, int req, pid_t pid, void *addr, int data) break; case PT_RESUME: + CTR2(KTR_PTRACE, "PT_RESUME: tid %d (pid %d)", td2->td_tid, + p->p_pid); td2->td_dbgflags &= ~TDB_SUSPEND; break; case PT_FOLLOW_FORK: + CTR3(KTR_PTRACE, "PT_FOLLOW_FORK: pid %d %s -> %s", p->p_pid, + p->p_flag & P_FOLLOWFORK ? "enabled" : "disabled", + data ? "enabled" : "disabled"); if (data) p->p_flag |= P_FOLLOWFORK; else @@ -887,6 +904,8 @@ kern_ptrace(struct thread *td, int req, pid_t pid, void *addr, int data) switch (req) { case PT_STEP: + CTR2(KTR_PTRACE, "PT_STEP: tid %d (pid %d)", + td2->td_tid, p->p_pid); error = ptrace_single_step(td2); if (error) goto out; @@ -904,12 +923,25 @@ kern_ptrace(struct thread *td, int req, pid_t pid, void *addr, int data) switch (req) { case PT_TO_SCE: p->p_stops |= S_PT_SCE; + CTR2(KTR_PTRACE, + "PT_TO_SCE: pid %d, stops = %#x", p->p_pid, + p->p_stops); break; case PT_TO_SCX: p->p_stops |= S_PT_SCX; + CTR2(KTR_PTRACE, + "PT_TO_SCX: pid %d, stops = %#x", p->p_pid, + p->p_stops); break; case PT_SYSCALL: p->p_stops |= S_PT_SCE | S_PT_SCX; + CTR2(KTR_PTRACE, + "PT_SYSCALL: pid %d, stops = %#x", p->p_pid, + p->p_stops); + break; + case PT_CONTINUE: + CTR1(KTR_PTRACE, + "PT_CONTINUE: pid %d", p->p_pid); break; } break; @@ -924,7 +956,11 @@ kern_ptrace(struct thread *td, int req, pid_t pid, void *addr, int data) proc_reparent(p, pp); if (pp == initproc) p->p_sigparent = SIGCHLD; - } + CTR2(KTR_PTRACE, + "PT_DETACH: pid %d reparented to pid %d", + p->p_pid, pp->p_pid); + } else + CTR1(KTR_PTRACE, "PT_DETACH: pid %d", p->p_pid); p->p_oppid = 0; p->p_flag &= ~(P_TRACED | P_WAITED | P_FOLLOWFORK); @@ -1001,6 +1037,14 @@ kern_ptrace(struct thread *td, int req, pid_t pid, void *addr, int data) } if (!write) td->td_retval[0] = tmp; + if (error == 0) { + if (write) + CTR3(KTR_PTRACE, "PT_WRITE: pid %d: %p <= %#x", + p->p_pid, addr, data); + else + CTR3(KTR_PTRACE, "PT_READ: pid %d: %p >= %#x", + p->p_pid, addr, tmp); + } PROC_LOCK(p); break; @@ -1033,10 +1077,14 @@ kern_ptrace(struct thread *td, int req, pid_t pid, void *addr, int data) switch (tmp) { case PIOD_READ_D: case PIOD_READ_I: + CTR3(KTR_PTRACE, "PT_IO: pid %d: READ (%p, %#x)", + p->p_pid, (uintptr_t)uio.uio_offset, uio.uio_resid); uio.uio_rw = UIO_READ; break; case PIOD_WRITE_D: case PIOD_WRITE_I: + CTR3(KTR_PTRACE, "PT_IO: pid %d: WRITE (%p, %#x)", + p->p_pid, (uintptr_t)uio.uio_offset, uio.uio_resid); td2->td_dbgflags |= TDB_USERWR; uio.uio_rw = UIO_WRITE; break; @@ -1056,33 +1104,46 @@ kern_ptrace(struct thread *td, int req, pid_t pid, void *addr, int data) break; case PT_KILL: + CTR1(KTR_PTRACE, "PT_KILL: pid %d", p->p_pid); data = SIGKILL; goto sendsig; /* in PT_CONTINUE above */ case PT_SETREGS: + CTR2(KTR_PTRACE, "PT_SETREGS: tid %d (pid %d)", td2->td_tid, + p->p_pid); td2->td_dbgflags |= TDB_USERWR; error = PROC_WRITE(regs, td2, addr); break; case PT_GETREGS: + CTR2(KTR_PTRACE, "PT_GETREGS: tid %d (pid %d)", td2->td_tid, + p->p_pid); error = PROC_READ(regs, td2, addr); break; case PT_SETFPREGS: + CTR2(KTR_PTRACE, "PT_SETFPREGS: tid %d (pid %d)", td2->td_tid, + p->p_pid); td2->td_dbgflags |= TDB_USERWR; error = PROC_WRITE(fpregs, td2, addr); break; case PT_GETFPREGS: + CTR2(KTR_PTRACE, "PT_GETFPREGS: tid %d (pid %d)", td2->td_tid, + p->p_pid); error = PROC_READ(fpregs, td2, addr); break; case PT_SETDBREGS: + CTR2(KTR_PTRACE, "PT_SETDBREGS: tid %d (pid %d)", td2->td_tid, + p->p_pid); td2->td_dbgflags |= TDB_USERWR; error = PROC_WRITE(dbregs, td2, addr); break; case PT_GETDBREGS: + CTR2(KTR_PTRACE, "PT_GETDBREGS: tid %d (pid %d)", td2->td_tid, + p->p_pid); error = PROC_READ(dbregs, td2, addr); break; @@ -1145,13 +1206,21 @@ kern_ptrace(struct thread *td, int req, pid_t pid, void *addr, int data) if (wrap32) ptrace_lwpinfo_to32(pl, pl32); #endif + CTR5(KTR_PTRACE, + "PT_LWPINFO: tid %d (pid %d) event %d flags %#x child pid %d", + td2->td_tid, p->p_pid, pl->pl_event, pl->pl_flags, + pl->pl_child_pid); break; case PT_GETNUMLWPS: + CTR2(KTR_PTRACE, "PT_GETNUMLWPS: pid %d: %d threads", p->p_pid, + p->p_numthreads); td->td_retval[0] = p->p_numthreads; break; case PT_GETLWPLIST: + CTR3(KTR_PTRACE, "PT_GETLWPLIST: pid %d: data %d, actual %d", + p->p_pid, data, p->p_numthreads); if (data <= 0) { error = EINVAL; break; @@ -1175,6 +1244,8 @@ kern_ptrace(struct thread *td, int req, pid_t pid, void *addr, int data) break; case PT_VM_TIMESTAMP: + CTR2(KTR_PTRACE, "PT_VM_TIMESTAMP: pid %d: timestamp %d", + p->p_pid, p->p_vmspace->vm_map.timestamp); td->td_retval[0] = p->p_vmspace->vm_map.timestamp; break; @@ -1225,6 +1296,8 @@ stopevent(struct proc *p, unsigned int event, unsigned int val) PROC_LOCK_ASSERT(p, MA_OWNED); p->p_step = 1; + CTR3(KTR_PTRACE, "stopevent: pid %d event %u val %u", p->p_pid, event, + val); do { p->p_xstat = val; p->p_xthread = NULL; diff --git a/sys/kern/uipc_domain.c b/sys/kern/uipc_domain.c index 9eda77c0f2d8..6dc24f9b25bb 100644 --- a/sys/kern/uipc_domain.c +++ b/sys/kern/uipc_domain.c @@ -248,8 +248,8 @@ domaininit(void *dummy) if (max_linkhdr < 16) /* XXX */ max_linkhdr = 16; - callout_init(&pffast_callout, CALLOUT_MPSAFE); - callout_init(&pfslow_callout, CALLOUT_MPSAFE); + callout_init(&pffast_callout, 1); + callout_init(&pfslow_callout, 1); mtx_lock(&dom_mtx); KASSERT(domain_init_status == 0, ("domaininit called too late!")); diff --git a/sys/kern/vfs_mount.c b/sys/kern/vfs_mount.c index 09fa7ed071bf..c86259b11637 100644 --- a/sys/kern/vfs_mount.c +++ b/sys/kern/vfs_mount.c @@ -1128,12 +1128,7 @@ struct unmount_args { #endif /* ARGSUSED */ int -sys_unmount(td, uap) - struct thread *td; - register struct unmount_args /* { - char *path; - int flags; - } */ *uap; +sys_unmount(struct thread *td, struct unmount_args *uap) { struct nameidata nd; struct mount *mp; @@ -1164,8 +1159,10 @@ sys_unmount(td, uap) mtx_lock(&mountlist_mtx); TAILQ_FOREACH_REVERSE(mp, &mountlist, mntlist, mnt_list) { if (mp->mnt_stat.f_fsid.val[0] == id0 && - mp->mnt_stat.f_fsid.val[1] == id1) + mp->mnt_stat.f_fsid.val[1] == id1) { + vfs_ref(mp); break; + } } mtx_unlock(&mountlist_mtx); } else { @@ -1183,8 +1180,10 @@ sys_unmount(td, uap) } mtx_lock(&mountlist_mtx); TAILQ_FOREACH_REVERSE(mp, &mountlist, mntlist, mnt_list) { - if (strcmp(mp->mnt_stat.f_mntonname, pathbuf) == 0) + if (strcmp(mp->mnt_stat.f_mntonname, pathbuf) == 0) { + vfs_ref(mp); break; + } } mtx_unlock(&mountlist_mtx); } @@ -1202,8 +1201,10 @@ sys_unmount(td, uap) /* * Don't allow unmounting the root filesystem. */ - if (mp->mnt_flag & MNT_ROOTFS) + if (mp->mnt_flag & MNT_ROOTFS) { + vfs_rel(mp); return (EINVAL); + } error = dounmount(mp, uap->flags, td); return (error); } @@ -1212,10 +1213,7 @@ sys_unmount(td, uap) * Do the actual filesystem unmount. */ int -dounmount(mp, flags, td) - struct mount *mp; - int flags; - struct thread *td; +dounmount(struct mount *mp, int flags, struct thread *td) { struct vnode *coveredvp, *fsrootvp; int error; @@ -1235,6 +1233,7 @@ dounmount(mp, flags, td) if (coveredvp->v_mountedhere != mp || coveredvp->v_mountedhere->mnt_gen != mnt_gen_r) { VOP_UNLOCK(coveredvp, 0); + vfs_rel(mp); return (EBUSY); } } @@ -1243,13 +1242,14 @@ dounmount(mp, flags, td) * original mount is permitted to unmount this filesystem. */ error = vfs_suser(mp, td); - if (error) { + if (error != 0) { if (coveredvp) VOP_UNLOCK(coveredvp, 0); + vfs_rel(mp); return (error); } - vn_start_write(NULL, &mp, V_WAIT); + vn_start_write(NULL, &mp, V_WAIT | V_MNTREF); MNT_ILOCK(mp); if ((mp->mnt_kern_flag & MNTK_UNMOUNT) != 0 || !TAILQ_EMPTY(&mp->mnt_uppers)) { diff --git a/sys/kern/vfs_subr.c b/sys/kern/vfs_subr.c index 8e34456621ca..625d193b2c1b 100644 --- a/sys/kern/vfs_subr.c +++ b/sys/kern/vfs_subr.c @@ -3502,8 +3502,9 @@ vfs_unmountall(void) */ while(!TAILQ_EMPTY(&mountlist)) { mp = TAILQ_LAST(&mountlist, mntlist); + vfs_ref(mp); error = dounmount(mp, MNT_FORCE, td); - if (error) { + if (error != 0) { TAILQ_REMOVE(&mountlist, mp, mnt_list); /* * XXX: Due to the way in which we mount the root diff --git a/sys/kern/vfs_syscalls.c b/sys/kern/vfs_syscalls.c index c5c479dcf270..d2f0df13fdb3 100644 --- a/sys/kern/vfs_syscalls.c +++ b/sys/kern/vfs_syscalls.c @@ -4158,13 +4158,13 @@ sys_umask(td, uap) int newmask; } */ *uap; { - register struct filedesc *fdp; + struct filedesc *fdp; - FILEDESC_XLOCK(td->td_proc->p_fd); fdp = td->td_proc->p_fd; + FILEDESC_XLOCK(fdp); td->td_retval[0] = fdp->fd_cmask; fdp->fd_cmask = uap->newmask & ALLPERMS; - FILEDESC_XUNLOCK(td->td_proc->p_fd); + FILEDESC_XUNLOCK(fdp); return (0); } diff --git a/sys/kern/vfs_vnops.c b/sys/kern/vfs_vnops.c index 01d448edf698..a00da5151b48 100644 --- a/sys/kern/vfs_vnops.c +++ b/sys/kern/vfs_vnops.c @@ -1646,16 +1646,18 @@ vn_start_write_locked(struct mount *mp, int flags) } int -vn_start_write(vp, mpp, flags) - struct vnode *vp; - struct mount **mpp; - int flags; +vn_start_write(struct vnode *vp, struct mount **mpp, int flags) { struct mount *mp; int error; - if (!vn_suspendable(vp, mpp)) + KASSERT((flags & V_MNTREF) == 0 || (*mpp != NULL && vp == NULL), + ("V_MNTREF requires mp")); + if (!vn_suspendable(vp, mpp)) { + if ((flags & V_MNTREF) != 0) + vfs_rel(*mpp); return (0); + } error = 0; /* @@ -1681,7 +1683,7 @@ vn_start_write(vp, mpp, flags) * emulate a vfs_ref(). */ MNT_ILOCK(mp); - if (vp == NULL) + if (vp == NULL && (flags & V_MNTREF) == 0) MNT_REF(mp); return (vn_start_write_locked(mp, flags)); @@ -1695,16 +1697,18 @@ vn_start_write(vp, mpp, flags) * time, these operations are halted until the suspension is over. */ int -vn_start_secondary_write(vp, mpp, flags) - struct vnode *vp; - struct mount **mpp; - int flags; +vn_start_secondary_write(struct vnode *vp, struct mount **mpp, int flags) { struct mount *mp; int error; - if (!vn_suspendable(vp, mpp)) + KASSERT((flags & V_MNTREF) == 0 || (*mpp != NULL && vp == NULL), + ("V_MNTREF requires mp")); + if (!vn_suspendable(vp, mpp)) { + if ((flags & V_MNTREF) != 0) + vfs_rel(*mpp); return (0); + } retry: if (vp != NULL) { @@ -1730,7 +1734,7 @@ vn_start_secondary_write(vp, mpp, flags) * emulate a vfs_ref(). */ MNT_ILOCK(mp); - if (vp == NULL) + if (vp == NULL && (flags & V_MNTREF) == 0) MNT_REF(mp); if ((mp->mnt_kern_flag & (MNTK_SUSPENDED | MNTK_SUSPEND2)) == 0) { mp->mnt_secondary_writes++; diff --git a/sys/mips/atheros/files.ar71xx b/sys/mips/atheros/files.ar71xx index 5356f043a7b2..712d03398d97 100644 --- a/sys/mips/atheros/files.ar71xx +++ b/sys/mips/atheros/files.ar71xx @@ -30,5 +30,6 @@ mips/atheros/ar934x_chip.c standard mips/atheros/qca955x_chip.c standard mips/atheros/ar71xx_fixup.c optional ar71xx_ath_eeprom mips/atheros/qca955x_apb.c optional qca955x_apb +mips/atheros/qca955x_pci.c optional qca955x_pci pci dev/hwpmc/hwpmc_mips24k.c optional hwpmc_mips24k diff --git a/sys/mips/atheros/qca955x_pci.c b/sys/mips/atheros/qca955x_pci.c new file mode 100644 index 000000000000..c50ab6759172 --- /dev/null +++ b/sys/mips/atheros/qca955x_pci.c @@ -0,0 +1,606 @@ +/*- + * Copyright (c) 2009, Oleksandr Tymoshenko + * Copyright (c) 2011, Luiz Otavio O Souza. + * Copyright (c) 2015, Adrian Chadd + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice unmodified, this list of conditions, and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "opt_ar71xx.h" + +#include +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include +#include + +#include +#include + +#include +#include "pcib_if.h" + +#include /* XXX aim to eliminate this! */ +#include +#include +#include + +#include + +#undef AR724X_PCI_DEBUG +//#define AR724X_PCI_DEBUG +#ifdef AR724X_PCI_DEBUG +#define dprintf printf +#else +#define dprintf(x, arg...) +#endif + +/* + * This is a PCI controller for the QCA955x and later SoCs. + * It needs to be aware of >1 PCIe host endpoints. + * + * XXX TODO; it may be nice to merge this with ar724x_pci.c; + * they're very similar. + */ +struct ar71xx_pci_irq { + struct ar71xx_pci_softc *sc; + int irq; +}; + +struct ar71xx_pci_softc { + device_t sc_dev; + + int sc_busno; + struct rman sc_mem_rman; + struct rman sc_irq_rman; + + uint32_t sc_pci_reg_base; /* XXX until bus stuff is done */ + uint32_t sc_pci_crp_base; /* XXX until bus stuff is done */ + uint32_t sc_pci_ctrl_base; /* XXX until bus stuff is done */ + uint32_t sc_pci_mem_base; /* XXX until bus stuff is done */ + uint32_t sc_pci_membase_limit; + + struct intr_event *sc_eventstab[AR71XX_PCI_NIRQS]; + mips_intrcnt_t sc_intr_counter[AR71XX_PCI_NIRQS]; + struct ar71xx_pci_irq sc_pci_irq[AR71XX_PCI_NIRQS]; + struct resource *sc_irq; + void *sc_ih; +}; + +static int qca955x_pci_setup_intr(device_t, device_t, struct resource *, int, + driver_filter_t *, driver_intr_t *, void *, void **); +static int qca955x_pci_teardown_intr(device_t, device_t, struct resource *, + void *); +static int qca955x_pci_intr(void *); + +static void +qca955x_pci_write(uint32_t reg, uint32_t offset, uint32_t data, int bytes) +{ + uint32_t val, mask, shift; + + /* Register access is 32-bit aligned */ + shift = (offset & 3) * 8; + if (bytes % 4) + mask = (1 << (bytes * 8)) - 1; + else + mask = 0xffffffff; + + val = ATH_READ_REG(reg + (offset & ~3)); + val &= ~(mask << shift); + val |= ((data & mask) << shift); + ATH_WRITE_REG(reg + (offset & ~3), val); + + dprintf("%s: %#x/%#x addr=%#x, data=%#x(%#x), bytes=%d\n", __func__, + reg, reg + (offset & ~3), offset, data, val, bytes); +} + +static uint32_t +qca955x_pci_read_config(device_t dev, u_int bus, u_int slot, u_int func, + u_int reg, int bytes) +{ + struct ar71xx_pci_softc *sc = device_get_softc(dev); + uint32_t data, shift, mask; + + /* Register access is 32-bit aligned */ + shift = (reg & 3) * 8; + + /* Create a mask based on the width, post-shift */ + if (bytes == 2) + mask = 0xffff; + else if (bytes == 1) + mask = 0xff; + else + mask = 0xffffffff; + + dprintf("%s: tag (%x, %x, %x) reg %d(%d)\n", __func__, bus, slot, + func, reg, bytes); + + if ((bus == 0) && (slot == 0) && (func == 0)) + data = ATH_READ_REG(sc->sc_pci_reg_base + (reg & ~3)); + else + data = -1; + + /* Get request bytes from 32-bit word */ + data = (data >> shift) & mask; + + dprintf("%s: read 0x%x\n", __func__, data); + + return (data); +} + +static void +qca955x_pci_write_config(device_t dev, u_int bus, u_int slot, u_int func, + u_int reg, uint32_t data, int bytes) +{ + struct ar71xx_pci_softc *sc = device_get_softc(dev); + + dprintf("%s: tag (%x, %x, %x) reg %d(%d): %x\n", __func__, bus, slot, + func, reg, bytes, data); + + if ((bus != 0) || (slot != 0) || (func != 0)) + return; + + qca955x_pci_write(sc->sc_pci_reg_base, reg, data, bytes); +} + +static void +qca955x_pci_mask_irq(void *source) +{ + uint32_t reg; + struct ar71xx_pci_irq *pirq = source; + struct ar71xx_pci_softc *sc = pirq->sc; + + /* XXX - Only one interrupt ? Only one device ? */ + if (pirq->irq != AR71XX_PCI_IRQ_START) + return; + + /* Update the interrupt mask reg */ + reg = ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_MASK); + ATH_WRITE_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_MASK, + reg & ~QCA955X_PCI_INTR_DEV0); + + /* Clear any pending interrupt */ + reg = ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_STATUS); + ATH_WRITE_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_STATUS, + reg | QCA955X_PCI_INTR_DEV0); +} + +static void +qca955x_pci_unmask_irq(void *source) +{ + uint32_t reg; + struct ar71xx_pci_irq *pirq = source; + struct ar71xx_pci_softc *sc = pirq->sc; + + if (pirq->irq != AR71XX_PCI_IRQ_START) + return; + + /* Update the interrupt mask reg */ + reg = ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_MASK); + ATH_WRITE_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_MASK, + reg | QCA955X_PCI_INTR_DEV0); +} + +static int +qca955x_pci_setup(device_t dev) +{ + struct ar71xx_pci_softc *sc = device_get_softc(dev); + uint32_t reg; + + /* setup COMMAND register */ + reg = PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN | PCIM_CMD_SERRESPEN | + PCIM_CMD_BACKTOBACK | PCIM_CMD_PERRESPEN | PCIM_CMD_MWRICEN; + + qca955x_pci_write(sc->sc_pci_crp_base, PCIR_COMMAND, reg, 2); + + /* These are the memory/prefetch base/limit parameters */ + qca955x_pci_write(sc->sc_pci_crp_base, 0x20, sc->sc_pci_membase_limit, 4); + qca955x_pci_write(sc->sc_pci_crp_base, 0x24, sc->sc_pci_membase_limit, 4); + + reg = ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_RESET); + if (reg != 0x7) { + DELAY(100000); + ATH_WRITE_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_RESET, 0); + ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_RESET); + DELAY(100); + ATH_WRITE_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_RESET, 4); + ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_RESET); + DELAY(100000); + } + + ATH_WRITE_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_APP, 0x1ffc1); + /* Flush write */ + (void) ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_APP); + + DELAY(1000); + + reg = ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_RESET); + if ((reg & QCA955X_PCI_RESET_LINK_UP) == 0) { + device_printf(dev, "no PCIe controller found\n"); + return (ENXIO); + } + + return (0); +} + +static int +qca955x_pci_probe(device_t dev) +{ + + return (BUS_PROBE_NOWILDCARD); +} + +static int +qca955x_pci_attach(device_t dev) +{ + struct ar71xx_pci_softc *sc = device_get_softc(dev); + int unit = device_get_unit(dev); + int busno = 0; + int rid = 0; + + /* Dirty; maybe these could all just be hints */ + if (unit == 0) { + sc->sc_pci_reg_base = QCA955X_PCI_CFG_BASE0; + sc->sc_pci_crp_base = QCA955X_PCI_CRP_BASE0; + sc->sc_pci_ctrl_base = QCA955X_PCI_CTRL_BASE0; + sc->sc_pci_mem_base = QCA955X_PCI_MEM_BASE0; + /* XXX verify */ + sc->sc_pci_membase_limit = 0x11f01000; + } else if (unit == 1) { + sc->sc_pci_reg_base = QCA955X_PCI_CFG_BASE1; + sc->sc_pci_crp_base = QCA955X_PCI_CRP_BASE1; + sc->sc_pci_ctrl_base = QCA955X_PCI_CTRL_BASE1; + sc->sc_pci_mem_base = QCA955X_PCI_MEM_BASE1; + /* XXX verify */ + sc->sc_pci_membase_limit = 0x12f01200; + } else { + device_printf(dev, "%s: invalid unit (%d)\n", __func__, unit); + return (ENXIO); + } + + sc->sc_mem_rman.rm_type = RMAN_ARRAY; + sc->sc_mem_rman.rm_descr = "qca955x PCI memory window"; + if (rman_init(&sc->sc_mem_rman) != 0 || + rman_manage_region(&sc->sc_mem_rman, + sc->sc_pci_mem_base, + sc->sc_pci_mem_base + QCA955X_PCI_MEM_SIZE - 1) != 0) { + panic("qca955x_pci_attach: failed to set up I/O rman"); + } + + sc->sc_irq_rman.rm_type = RMAN_ARRAY; + sc->sc_irq_rman.rm_descr = "qca955x PCI IRQs"; + if (rman_init(&sc->sc_irq_rman) != 0 || + rman_manage_region(&sc->sc_irq_rman, AR71XX_PCI_IRQ_START, + AR71XX_PCI_IRQ_END) != 0) + panic("qca955x_pci_attach: failed to set up IRQ rman"); + + /* Disable interrupts */ + ATH_WRITE_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_STATUS, 0); + ATH_WRITE_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_MASK, 0); + + /* Hook up our interrupt handler. */ + if ((sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, + RF_SHAREABLE | RF_ACTIVE)) == NULL) { + device_printf(dev, "unable to allocate IRQ resource\n"); + return (ENXIO); + } + + if ((bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_MISC, + qca955x_pci_intr, NULL, sc, &sc->sc_ih))) { + device_printf(dev, + "WARNING: unable to register interrupt handler\n"); + return (ENXIO); + } + + /* Reset PCIe core and PCIe PHY */ + ar71xx_device_stop(QCA955X_RESET_PCIE); + ar71xx_device_stop(QCA955X_RESET_PCIE_PHY); + DELAY(100); + ar71xx_device_start(QCA955X_RESET_PCIE_PHY); + ar71xx_device_start(QCA955X_RESET_PCIE); + + if (qca955x_pci_setup(dev)) + return (ENXIO); + + /* + * Write initial base address. + * + * I'm not yet sure why this is required and/or why it isn't + * initialised like this. The AR71xx PCI code initialises + * the PCI windows for each device, but neither it or the + * 724x PCI bridge modules explicitly initialise the BAR. + * + * So before this gets committed, have a chat with jhb@ or + * someone else who knows PCI well and figure out whether + * the initial BAR is supposed to be determined by /other/ + * means. + */ + qca955x_pci_write_config(dev, 0, 0, 0, PCIR_BAR(0), + sc->sc_pci_mem_base, + 4); + + /* Fixup internal PCI bridge */ + qca955x_pci_write_config(dev, 0, 0, 0, PCIR_COMMAND, + PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN + | PCIM_CMD_SERRESPEN | PCIM_CMD_BACKTOBACK + | PCIM_CMD_PERRESPEN | PCIM_CMD_MWRICEN, 2); + + device_add_child(dev, "pci", busno); + return (bus_generic_attach(dev)); +} + +static int +qca955x_pci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) +{ + struct ar71xx_pci_softc *sc = device_get_softc(dev); + + switch (which) { + case PCIB_IVAR_DOMAIN: + *result = 0; + return (0); + case PCIB_IVAR_BUS: + *result = sc->sc_busno; + return (0); + } + + return (ENOENT); +} + +static int +qca955x_pci_write_ivar(device_t dev, device_t child, int which, uintptr_t result) +{ + struct ar71xx_pci_softc * sc = device_get_softc(dev); + + switch (which) { + case PCIB_IVAR_BUS: + sc->sc_busno = result; + return (0); + } + + return (ENOENT); +} + +static struct resource * +qca955x_pci_alloc_resource(device_t bus, device_t child, int type, int *rid, + u_long start, u_long end, u_long count, u_int flags) +{ + struct ar71xx_pci_softc *sc = device_get_softc(bus); + struct resource *rv; + struct rman *rm; + + switch (type) { + case SYS_RES_IRQ: + rm = &sc->sc_irq_rman; + break; + case SYS_RES_MEMORY: + rm = &sc->sc_mem_rman; + break; + default: + return (NULL); + } + + rv = rman_reserve_resource(rm, start, end, count, flags, child); + + if (rv == NULL) + return (NULL); + + rman_set_rid(rv, *rid); + + if (flags & RF_ACTIVE) { + if (bus_activate_resource(child, type, *rid, rv)) { + rman_release_resource(rv); + return (NULL); + } + } + + return (rv); +} + +static int +qca955x_pci_activate_resource(device_t bus, device_t child, int type, int rid, + struct resource *r) +{ + int res = (BUS_ACTIVATE_RESOURCE(device_get_parent(bus), + child, type, rid, r)); + + if (!res) { + switch(type) { + case SYS_RES_MEMORY: + case SYS_RES_IOPORT: + + rman_set_bustag(r, ar71xx_bus_space_pcimem); + break; + } + } + + return (res); +} + +static int +qca955x_pci_setup_intr(device_t bus, device_t child, struct resource *ires, + int flags, driver_filter_t *filt, driver_intr_t *handler, + void *arg, void **cookiep) +{ + struct ar71xx_pci_softc *sc = device_get_softc(bus); + struct intr_event *event; + int irq, error; + + irq = rman_get_start(ires); + if (irq > AR71XX_PCI_IRQ_END) + panic("%s: bad irq %d", __func__, irq); + + event = sc->sc_eventstab[irq]; + if (event == NULL) { + sc->sc_pci_irq[irq].sc = sc; + sc->sc_pci_irq[irq].irq = irq; + error = intr_event_create(&event, (void *)&sc->sc_pci_irq[irq], + 0, irq, + qca955x_pci_mask_irq, + qca955x_pci_unmask_irq, + NULL, NULL, + "pci intr%d:", irq); + + if (error == 0) { + sc->sc_eventstab[irq] = event; + sc->sc_intr_counter[irq] = + mips_intrcnt_create(event->ie_name); + } + else + return error; + } + + intr_event_add_handler(event, device_get_nameunit(child), filt, + handler, arg, intr_priority(flags), flags, cookiep); + mips_intrcnt_setname(sc->sc_intr_counter[irq], event->ie_fullname); + + qca955x_pci_unmask_irq(&sc->sc_pci_irq[irq]); + + return (0); +} + +static int +qca955x_pci_teardown_intr(device_t dev, device_t child, struct resource *ires, + void *cookie) +{ + struct ar71xx_pci_softc *sc = device_get_softc(dev); + int irq, result; + + irq = rman_get_start(ires); + if (irq > AR71XX_PCI_IRQ_END) + panic("%s: bad irq %d", __func__, irq); + + if (sc->sc_eventstab[irq] == NULL) + panic("Trying to teardown unoccupied IRQ"); + + qca955x_pci_mask_irq(&sc->sc_pci_irq[irq]); + + result = intr_event_remove_handler(cookie); + if (!result) + sc->sc_eventstab[irq] = NULL; + + return (result); +} + +static int +qca955x_pci_intr(void *arg) +{ + struct ar71xx_pci_softc *sc = arg; + struct intr_event *event; + uint32_t reg, irq, mask; + + /* XXX TODO - may need to flush a different handler? */ + ar71xx_device_ddr_flush_ip2(); + + reg = ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_STATUS); + mask = ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_MASK); + /* + * Handle only unmasked interrupts + */ + reg &= mask; + /* + * XXX TODO: handle >1 PCIe end point! + */ + if (reg & QCA955X_PCI_INTR_DEV0) { + irq = AR71XX_PCI_IRQ_START; + event = sc->sc_eventstab[irq]; + if (!event || TAILQ_EMPTY(&event->ie_handlers)) { + printf("Stray IRQ %d\n", irq); + return (FILTER_STRAY); + } + + /* TODO: frame instead of NULL? */ + intr_event_handle(event, NULL); + mips_intrcnt_inc(sc->sc_intr_counter[irq]); + } + + return (FILTER_HANDLED); +} + +static int +qca955x_pci_maxslots(device_t dev) +{ + + return (PCI_SLOTMAX); +} + +static int +qca955x_pci_route_interrupt(device_t pcib, device_t device, int pin) +{ + + return (pci_get_slot(device)); +} + +static device_method_t qca955x_pci_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, qca955x_pci_probe), + DEVMETHOD(device_attach, qca955x_pci_attach), + DEVMETHOD(device_shutdown, bus_generic_shutdown), + DEVMETHOD(device_suspend, bus_generic_suspend), + DEVMETHOD(device_resume, bus_generic_resume), + + /* Bus interface */ + DEVMETHOD(bus_read_ivar, qca955x_pci_read_ivar), + DEVMETHOD(bus_write_ivar, qca955x_pci_write_ivar), + DEVMETHOD(bus_alloc_resource, qca955x_pci_alloc_resource), + DEVMETHOD(bus_release_resource, bus_generic_release_resource), + DEVMETHOD(bus_activate_resource, qca955x_pci_activate_resource), + DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), + DEVMETHOD(bus_setup_intr, qca955x_pci_setup_intr), + DEVMETHOD(bus_teardown_intr, qca955x_pci_teardown_intr), + + /* pcib interface */ + DEVMETHOD(pcib_maxslots, qca955x_pci_maxslots), + DEVMETHOD(pcib_read_config, qca955x_pci_read_config), + DEVMETHOD(pcib_write_config, qca955x_pci_write_config), + DEVMETHOD(pcib_route_interrupt, qca955x_pci_route_interrupt), + + DEVMETHOD_END +}; + +static driver_t qca955x_pci_driver = { + "pcib", + qca955x_pci_methods, + sizeof(struct ar71xx_pci_softc), +}; + +static devclass_t qca955x_pci_devclass; + +DRIVER_MODULE(qca955x_pci, nexus, qca955x_pci_driver, qca955x_pci_devclass, 0, 0); +DRIVER_MODULE(qca955x_pci, apb, qca955x_pci_driver, qca955x_pci_devclass, 0, 0); diff --git a/sys/mips/beri/beri_simplebus.c b/sys/mips/beri/beri_simplebus.c index 87ad3beb1f15..54f654a52ac1 100644 --- a/sys/mips/beri/beri_simplebus.c +++ b/sys/mips/beri/beri_simplebus.c @@ -198,7 +198,7 @@ simplebus_attach(device_t dev) continue; } - if (ofw_bus_intr_to_rl(dev, dt_child, &di->di_res)) { + if (ofw_bus_intr_to_rl(dev, dt_child, &di->di_res, NULL)) { device_printf(dev, "%s: could not process " "'interrupts' property\n", di->di_ofw.obd_name); resource_list_free(&di->di_res); diff --git a/sys/mips/cavium/octe/ethernet.c b/sys/mips/cavium/octe/ethernet.c index b2a5ddf8de28..d473d822eb43 100644 --- a/sys/mips/cavium/octe/ethernet.c +++ b/sys/mips/cavium/octe/ethernet.c @@ -455,7 +455,7 @@ int cvm_oct_init_module(device_t bus) cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group), 0x1001); } - callout_init(&cvm_oct_poll_timer, CALLOUT_MPSAFE); + callout_init(&cvm_oct_poll_timer, 1); callout_reset(&cvm_oct_poll_timer, hz, cvm_do_timer, NULL); return 0; diff --git a/sys/mips/cavium/octeon_rnd.c b/sys/mips/cavium/octeon_rnd.c index 94193142647b..844de45835d9 100644 --- a/sys/mips/cavium/octeon_rnd.c +++ b/sys/mips/cavium/octeon_rnd.c @@ -95,7 +95,7 @@ octeon_rnd_attach(device_t dev) struct octeon_rnd_softc *sc; sc = device_get_softc(dev); - callout_init(&sc->sc_callout, CALLOUT_MPSAFE); + callout_init(&sc->sc_callout, 1); callout_reset(&sc->sc_callout, hz * 5, octeon_rnd_harvest, sc); cvmx_rng_enable(); diff --git a/sys/mips/conf/AP135 b/sys/mips/conf/AP135 index 2271948925d5..39d2b6c94016 100644 --- a/sys/mips/conf/AP135 +++ b/sys/mips/conf/AP135 @@ -50,7 +50,12 @@ options GEOM_UNCOMPRESS # Used for the static uboot partition map device geom_map -# yes, this board has a PCI connected atheros device +# yes, this board has a PCIe connected atheros device +# add ath_pci so it can at least attach things when there's a +# ath(4) in there, rather than the 11ac chip we don't support. +device pci +device qca955x_pci + device ath_pci options AR71XX_ATH_EEPROM device firmware # Used by the above @@ -58,3 +63,6 @@ options ATH_EEPROM_FIRMWARE # Boot off of the rootfs, as defined in the geom_map setup. options ROOTDEVNAME=\"ufs:map/rootfs.uncompress\" + +# Default to accept +options IPFIREWALL_DEFAULT_TO_ACCEPT diff --git a/sys/mips/conf/AP135.hints b/sys/mips/conf/AP135.hints index 1778b917357a..3db44d019358 100644 --- a/sys/mips/conf/AP135.hints +++ b/sys/mips/conf/AP135.hints @@ -117,11 +117,11 @@ hint.ath.0.eepromsize=16384 # to find it. # ath1 hint - pcie slot 0 -hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff4000 -hint.pcib.0.bus.0.0.0.ath_fixup_size=16384 +# hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff4000 +# hint.pcib.0.bus.0.0.0.ath_fixup_size=16384 # ath0 - eeprom comes from here -hint.ath.1.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware" +# hint.ath.1.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware" # flash layout: # diff --git a/sys/mips/conf/QCA955X_BASE b/sys/mips/conf/QCA955X_BASE index 93211c10b61d..9785f0e04499 100644 --- a/sys/mips/conf/QCA955X_BASE +++ b/sys/mips/conf/QCA955X_BASE @@ -27,7 +27,7 @@ hints "QCA955X_BASE.hints" makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols # makeoptions MODULES_OVERRIDE="random gpio ar71xx if_gif if_gre if_bridge bridgestp usb wlan wlan_xauth wlan_acl wlan_wep wlan_tkip wlan_ccmp wlan_rssadapt wlan_amrr ath ath_ahb hwpmc" -makeoptions MODULES_OVERRIDE="if_vlan ipfw if_gre if_gif if_bridge bridgestp hwpmc" +makeoptions MODULES_OVERRIDE="if_vlan ipfw if_gre if_gif if_bridge bridgestp" options DDB options KDB @@ -53,10 +53,10 @@ options NBUF=128 # Limit UMTX hash size # options UMTX_NUM_CHAINS=64 -# PMC +# PMC - fow now there's no hwpmc module for mips74k #options HWPMC_HOOKS #device hwpmc -#device hwpmc_mips24k +#device hwpmc_mips74k # options NFS_LEGACYRPC # Debugging for use in -current @@ -109,12 +109,6 @@ options USB_DEBUG options USB_HOST_ALIGN=32 # AR71XX (MIPS in general?) requires this device ehci -device pci -# XXX TODO: need to write a qca955x_pci bridge -# .. since it now handles >1 PCIe bus and the reset -# registers may have changed a bit. -# device ar724x_pci - device scbus device umass device da diff --git a/sys/mips/conf/ROUTERSTATION b/sys/mips/conf/ROUTERSTATION index a680c26bfa5e..6b46cf74246e 100644 --- a/sys/mips/conf/ROUTERSTATION +++ b/sys/mips/conf/ROUTERSTATION @@ -12,8 +12,8 @@ hints "ROUTERSTATION.hints" # GEOM modules device geom_redboot # to get access to the SPI flash partitions -device geom_uzip # compressed in-memory filesystem support -options GEOM_UZIP +device geom_uncompress # compressed in-memory filesystem support +options GEOM_UNCOMPRESS # For DOS options MSDOSFS @@ -25,4 +25,4 @@ device etherswitch device ukswitch # Boot path - redboot MFS -options ROOTDEVNAME=\"ufs:redboot/rootfs.uzip\" +options ROOTDEVNAME=\"ufs:redboot/rootfs.uncompress\" diff --git a/sys/mips/conf/RSPRO b/sys/mips/conf/RSPRO index d5a540574295..5936767bdbae 100644 --- a/sys/mips/conf/RSPRO +++ b/sys/mips/conf/RSPRO @@ -13,8 +13,8 @@ device pcf2123_rtc # GEOM modules device geom_redboot # to get access to the SPI flash partitions -device geom_uzip # compressed in-memory filesystem support -options GEOM_UZIP +device geom_uncompress # compressed in-memory filesystem support +options GEOM_UNCOMPRESS # For DOS options MSDOSFS @@ -26,5 +26,5 @@ device etherswitch device arswitch # Boot off of flash -options ROOTDEVNAME=\"ufs:redboot/rootfs.uzip\" +options ROOTDEVNAME=\"ufs:redboot/rootfs.uncompress\" diff --git a/sys/mips/include/intr_machdep.h b/sys/mips/include/intr_machdep.h index 547e75aacf43..186533cc60df 100644 --- a/sys/mips/include/intr_machdep.h +++ b/sys/mips/include/intr_machdep.h @@ -70,5 +70,6 @@ mips_intrcnt_inc(mips_intrcnt_t counter) { if (counter) atomic_add_long(counter, 1); + PCPU_INC(cnt.v_intr); } #endif /* !_MACHINE_INTR_MACHDEP_H_ */ diff --git a/sys/mips/include/pcpu.h b/sys/mips/include/pcpu.h index 89b65257cefd..f4be33dd8aa9 100644 --- a/sys/mips/include/pcpu.h +++ b/sys/mips/include/pcpu.h @@ -31,6 +31,7 @@ #ifndef _MACHINE_PCPU_H_ #define _MACHINE_PCPU_H_ +#include #include #define PCPU_MD_COMMON_FIELDS \ diff --git a/sys/mips/mips/db_disasm.c b/sys/mips/mips/db_disasm.c index c7e5223b4eff..14788ed186fa 100644 --- a/sys/mips/mips/db_disasm.c +++ b/sys/mips/mips/db_disasm.c @@ -130,7 +130,7 @@ static char *c0_reg[32] = { static int md_printins(int ins, int mdbdot); db_addr_t -db_disasm(db_addr_t loc, boolean_t altfmt) +db_disasm(db_addr_t loc, bool altfmt) { int ins; diff --git a/sys/mips/mips/elf_machdep.c b/sys/mips/mips/elf_machdep.c index d37471388ae5..8cbe8d3df6cc 100644 --- a/sys/mips/mips/elf_machdep.c +++ b/sys/mips/mips/elf_machdep.c @@ -83,6 +83,7 @@ struct sysentvec elf64_freebsd_sysvec = { .sv_fetch_syscall_args = cpu_fetch_syscall_args, .sv_syscallnames = syscallnames, .sv_schedtail = NULL, + .sv_thread_detach = NULL, }; static Elf64_Brandinfo freebsd_brand_info = { @@ -139,6 +140,7 @@ struct sysentvec elf32_freebsd_sysvec = { .sv_fetch_syscall_args = cpu_fetch_syscall_args, .sv_syscallnames = syscallnames, .sv_schedtail = NULL, + .sv_thread_detach = NULL, }; static Elf32_Brandinfo freebsd_brand_info = { diff --git a/sys/mips/mips/freebsd32_machdep.c b/sys/mips/mips/freebsd32_machdep.c index 9de4685bac8b..530342003d61 100644 --- a/sys/mips/mips/freebsd32_machdep.c +++ b/sys/mips/mips/freebsd32_machdep.c @@ -106,6 +106,7 @@ struct sysentvec elf32_freebsd_sysvec = { .sv_fetch_syscall_args = cpu_fetch_syscall_args, .sv_syscallnames = freebsd32_syscallnames, .sv_schedtail = NULL, + .sv_thread_detach = NULL, }; INIT_SYSENTVEC(elf32_sysvec, &elf32_freebsd_sysvec); @@ -418,12 +419,6 @@ freebsd32_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) sfp = (struct sigframe32 *)((vm_offset_t)(td->td_frame->sp - sizeof(struct sigframe32)) & ~(sizeof(__int64_t) - 1)); - /* Translate the signal if appropriate */ - if (p->p_sysent->sv_sigtbl) { - if (sig <= p->p_sysent->sv_sigsize) - sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; - } - /* Build the argument list for the signal handler. */ td->td_frame->a0 = sig; td->td_frame->a2 = (register_t)(intptr_t)&sfp->sf_uc; diff --git a/sys/mips/mips/pm_machdep.c b/sys/mips/mips/pm_machdep.c index 8f55280f2b73..d5f6df0641f4 100644 --- a/sys/mips/mips/pm_machdep.c +++ b/sys/mips/mips/pm_machdep.c @@ -133,12 +133,6 @@ sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) sfp = (struct sigframe *)((vm_offset_t)(regs->sp - sizeof(struct sigframe)) & ~(sizeof(__int64_t) - 1)); - /* Translate the signal if appropriate */ - if (p->p_sysent->sv_sigtbl) { - if (sig <= p->p_sysent->sv_sigsize) - sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; - } - /* Build the argument list for the signal handler. */ regs->a0 = sig; regs->a2 = (register_t)(intptr_t)&sfp->sf_uc; diff --git a/sys/mips/mips/pmap.c b/sys/mips/mips/pmap.c index 2ca8ed57ff30..7ab4244d9685 100644 --- a/sys/mips/mips/pmap.c +++ b/sys/mips/mips/pmap.c @@ -1036,7 +1036,7 @@ pmap_grow_direct_page_cache() { #ifdef __mips_n64 - vm_pageout_grow_cache(3, 0, MIPS_XKPHYS_LARGEST_PHYS); + VM_WAIT; #else vm_pageout_grow_cache(3, 0, MIPS_KSEG0_LARGEST_PHYS); #endif @@ -3243,7 +3243,7 @@ DB_SHOW_COMMAND(ptable, ddb_pid_dump) vm_offset_t va; if (have_addr) { - td = db_lookup_thread(addr, TRUE); + td = db_lookup_thread(addr, true); if (td == NULL) { db_printf("Invalid pid or tid"); return; diff --git a/sys/mips/mips/vm_machdep.c b/sys/mips/mips/vm_machdep.c index 26cdbff2fc31..42f3f687ba7f 100644 --- a/sys/mips/mips/vm_machdep.c +++ b/sys/mips/mips/vm_machdep.c @@ -571,7 +571,7 @@ DB_SHOW_COMMAND(pcb, ddb_dump_pcb) /* Determine which thread to examine. */ if (have_addr) - td = db_lookup_thread(addr, TRUE); + td = db_lookup_thread(addr, true); else td = curthread; diff --git a/sys/mips/nlm/dev/net/xlpge.c b/sys/mips/nlm/dev/net/xlpge.c index e9bb86ea5b93..aaa637990f53 100644 --- a/sys/mips/nlm/dev/net/xlpge.c +++ b/sys/mips/nlm/dev/net/xlpge.c @@ -1240,7 +1240,7 @@ nlm_xlpge_attach(device_t dev) sc->prepad_en = sc->network_sc->prepad_en; sc->prepad_size = sc->network_sc->prepad_size; - callout_init(&sc->xlpge_callout, CALLOUT_MPSAFE); + callout_init(&sc->xlpge_callout, 1); XLPGE_LOCK_INIT(sc, device_get_nameunit(dev)); diff --git a/sys/mips/rmi/dev/xlr/rge.c b/sys/mips/rmi/dev/xlr/rge.c index 6fd2bc68b1e4..248dd42e4282 100644 --- a/sys/mips/rmi/dev/xlr/rge.c +++ b/sys/mips/rmi/dev/xlr/rge.c @@ -1894,9 +1894,9 @@ rge_attach(device_t dev) if (!gmac_common_init_done) { mac_common_init(); gmac_common_init_done = 1; - callout_init(&xlr_tx_stop_bkp, CALLOUT_MPSAFE); + callout_init(&xlr_tx_stop_bkp, 1); callout_reset(&xlr_tx_stop_bkp, hz, xlr_tx_q_wakeup, NULL); - callout_init(&rge_dbg_count, CALLOUT_MPSAFE); + callout_init(&rge_dbg_count, 1); //callout_reset(&rge_dbg_count, hz, xlr_debug_count, NULL); } if ((ret = rmi_xlr_mac_open(sc)) == -1) { diff --git a/sys/modules/Makefile b/sys/modules/Makefile index 14d166ff4a3a..c0217cc8c598 100644 --- a/sys/modules/Makefile +++ b/sys/modules/Makefile @@ -196,6 +196,8 @@ SUBDIR= \ ${_linprocfs} \ ${_linsysfs} \ ${_linux} \ + ${_linux_common} \ + ${_linux64} \ ${_linuxapi} \ lmc \ lpt \ @@ -456,6 +458,7 @@ _txp= txp .endif .if ${MK_SOURCELESS_UCODE} != "no" && ${MACHINE_CPUARCH} != "arm" && \ + ${MACHINE_ARCH:C/mips(el)?/mips/} != "mips" && \ ${MACHINE_ARCH} != "powerpc" _cxgbe= cxgbe .endif @@ -626,6 +629,8 @@ _sfxge= sfxge .if ${MK_BHYVE} != "no" || defined(ALL_MODULES) _vmm= vmm +_linux_common= linux_common +_linux64= linux64 .endif .endif diff --git a/sys/modules/linprocfs/Makefile b/sys/modules/linprocfs/Makefile index 4b1b37543031..979429fd2ae1 100644 --- a/sys/modules/linprocfs/Makefile +++ b/sys/modules/linprocfs/Makefile @@ -5,11 +5,6 @@ KMOD= linprocfs SRCS= vnode_if.h \ device_if.h bus_if.h \ - linprocfs.c \ - opt_compat.h - -.if ${MACHINE_CPUARCH} == "amd64" -CFLAGS+=-DCOMPAT_LINUX32 -.endif + linprocfs.c .include diff --git a/sys/modules/linsysfs/Makefile b/sys/modules/linsysfs/Makefile index 401796779205..13230ff5e8ea 100644 --- a/sys/modules/linsysfs/Makefile +++ b/sys/modules/linsysfs/Makefile @@ -5,11 +5,6 @@ KMOD= linsysfs SRCS= vnode_if.h \ device_if.h bus_if.h pci_if.h \ - linsysfs.c \ - opt_compat.h - -.if ${MACHINE_CPUARCH} == "amd64" -CFLAGS+=-DCOMPAT_LINUX32 -.endif + linsysfs.c .include diff --git a/sys/modules/linux/Makefile b/sys/modules/linux/Makefile index a671a3377853..e887290260e5 100644 --- a/sys/modules/linux/Makefile +++ b/sys/modules/linux/Makefile @@ -7,16 +7,18 @@ CFLAGS+=-DCOMPAT_FREEBSD32 -DCOMPAT_LINUX32 .PATH: ${.CURDIR}/../../compat/linux ${.CURDIR}/../../${MACHINE_CPUARCH}/linux${SFX} +VDSO= linux${SFX}_vdso + KMOD= linux -SRCS= linux_fork.c linux${SFX}_dummy.c linux_emul.c linux_file.c \ +SRCS= linux_fork.c linux${SFX}_dummy.c linux_file.c linux_event.c \ linux_futex.c linux_getcwd.c linux_ioctl.c linux_ipc.c \ - linux${SFX}_machdep.c linux_mib.c linux_misc.c linux_signal.c \ + linux${SFX}_machdep.c linux_misc.c linux_signal.c \ linux_socket.c linux_stats.c linux_sysctl.c linux${SFX}_sysent.c \ - linux${SFX}_sysvec.c linux_uid16.c linux_util.c linux_time.c \ - linux_timer.c \ + linux${SFX}_sysvec.c linux_uid16.c linux_time.c \ + linux_timer.c linux_vdso.c \ opt_inet6.h opt_compat.h opt_posix.h opt_usb.h vnode_if.h \ device_if.h bus_if.h assym.s \ - linux${SFX}_locore.s linux${SFX}_support.s + linux${SFX}_support.s DPSRCS= linux${SFX}_genassym.c # XXX: for assym.s @@ -25,31 +27,49 @@ SRCS+= opt_kstack_pages.h opt_nfs.h opt_compat.h opt_hwpmc_hooks.h SRCS+= opt_apic.h .endif +OBJS= ${VDSO}.so + .if ${MACHINE_CPUARCH} == "i386" -SRCS+= linux_ptrace.c imgact_linux.c opt_cpu.h +SRCS+= linux_ptrace.c imgact_linux.c linux_util.c linux_mib.c \ + linux_emul.c opt_cpu.h linux.c .endif +.if ${MACHINE_CPUARCH} == "i386" EXPORT_SYMS= EXPORT_SYMS+= linux_emul_path EXPORT_SYMS+= linux_get_osname EXPORT_SYMS+= linux_get_osrelease -EXPORT_SYMS+= linux_ifname EXPORT_SYMS+= linux_ioctl_register_handler EXPORT_SYMS+= linux_ioctl_unregister_handler +.endif -CLEANFILES= linux${SFX}_assym.h linux${SFX}_genassym.o +CLEANFILES= linux${SFX}_assym.h linux${SFX}_genassym.o linux${SFX}_locore.o linux${SFX}_assym.h: linux${SFX}_genassym.o sh ${SYSDIR}/kern/genassym.sh linux${SFX}_genassym.o > ${.TARGET} linux${SFX}_locore.o: linux${SFX}_assym.h assym.s - ${CC} -c -x assembler-with-cpp -DLOCORE ${CFLAGS} \ + ${CC} -x assembler-with-cpp -DLOCORE -m32 -shared -s \ + -pipe -I. -I${SYSDIR} -Werror -Wall -fno-common -nostdinc -nostdlib \ + -fno-omit-frame-pointer \ + -Wl,-T${.CURDIR}/../../${MACHINE_CPUARCH}/linux${SFX}/${VDSO}.lds.s \ + -Wl,-soname=${VDSO}.so.1,--eh-frame-hdr,-fPIC,-warn-common \ ${.IMPSRC} -o ${.TARGET} linux${SFX}_support.o: linux${SFX}_assym.h assym.s ${CC} -c -x assembler-with-cpp -DLOCORE ${CFLAGS} \ ${.IMPSRC} -o ${.TARGET} +.if ${MACHINE_CPUARCH} == "amd64" +${VDSO}.so: linux${SFX}_locore.o + ${OBJCOPY} --input-target binary --output-target elf64-x86-64-freebsd \ + --binary-architecture i386 linux${SFX}_locore.o ${.TARGET} +.else +${VDSO}.so: linux${SFX}_locore.o + ${OBJCOPY} --input-target binary --output-target elf32-i386-freebsd \ + --binary-architecture i386 linux${SFX}_locore.o ${.TARGET} +.endif + linux${SFX}_genassym.o: ${CC} -c ${CFLAGS:N-fno-common} ${.IMPSRC} @@ -57,6 +77,9 @@ linux${SFX}_genassym.o: .if defined(KTR) CFLAGS+= -DKTR .endif +.if defined(DEBUG) +CFLAGS+= -DDEBUG +.endif .endif .include diff --git a/sys/modules/linux64/Makefile b/sys/modules/linux64/Makefile new file mode 100644 index 000000000000..165632350d42 --- /dev/null +++ b/sys/modules/linux64/Makefile @@ -0,0 +1,55 @@ +# $FreeBSD$ + +.PATH: ${.CURDIR}/../../compat/linux ${.CURDIR}/../../${MACHINE_ARCH}/linux + +VDSO= linux_vdso + +KMOD= linux64 +SRCS= linux_fork.c linux_dummy.c linux_file.c linux_event.c \ + linux_futex.c linux_getcwd.c linux_ioctl.c linux_ipc.c \ + linux_machdep.c linux_misc.c linux_signal.c \ + linux_socket.c linux_stats.c linux_sysctl.c linux_sysent.c \ + linux_sysvec.c linux_time.c linux_vdso.c linux_timer.c \ + opt_inet6.h opt_compat.h opt_kdtrace.h opt_posix.h opt_usb.h \ + vnode_if.h device_if.h bus_if.h assym.s \ + linux_support.s +DPSRCS= linux_genassym.c + +# XXX: for assym.s +SRCS+= opt_kstack_pages.h opt_nfs.h opt_apic.h opt_hwpmc_hooks.h + +CLEANFILES= linux_assym.h linux_genassym.o linux_locore.o + +OBJS= ${VDSO}.so + +linux_assym.h: linux_genassym.o + sh ${SYSDIR}/kern/genassym.sh linux_genassym.o > ${.TARGET} + +linux_locore.o: linux_locore.s linux_assym.h + ${CC} -x assembler-with-cpp -DLOCORE -shared -mcmodel=small \ + -pipe -I. -I${SYSDIR} -Werror -Wall -fno-common -nostdinc \ + -Wl,-T${.CURDIR}/../../${MACHINE_CPUARCH}/linux/${VDSO}.lds.s \ + -Wl,-soname=${VDSO}.so.1,-fPIC,-warn-common -nostdlib \ + ${.IMPSRC} -o ${.TARGET} + +${VDSO}.so: linux_locore.o + ${OBJCOPY} --input-target binary --output-target elf64-x86-64-freebsd \ + -S -g --binary-architecture i386:x86-64 linux_locore.o ${.TARGET} + +linux_support.o: assym.s linux_assym.h + ${CC} -c -x assembler-with-cpp -DLOCORE ${CFLAGS} \ + ${.IMPSRC} -o ${.TARGET} + +linux_genassym.o: + ${CC} -c ${CFLAGS:N-fno-common} ${.IMPSRC} + +.if !defined(KERNBUILDDIR) +.if defined(DEBUG) +CFLAGS+=-DDEBUG +.endif +.if defined(KTR) +CFLAGS+=-DKTR +.endif +.endif + +.include diff --git a/sys/modules/linux_common/Makefile b/sys/modules/linux_common/Makefile new file mode 100644 index 000000000000..91449f774ef5 --- /dev/null +++ b/sys/modules/linux_common/Makefile @@ -0,0 +1,25 @@ +# $FreeBSD$ + +.PATH: ${.CURDIR}/../../compat/linux + +KMOD= linux_common +SRCS= linux_common.c linux_mib.c linux_util.c linux_emul.c \ + linux.c opt_compat.h device_if.h vnode_if.h bus_if.h + +EXPORT_SYMS= +EXPORT_SYMS+= linux_emul_path +EXPORT_SYMS+= linux_ioctl_register_handler +EXPORT_SYMS+= linux_ioctl_unregister_handler +EXPORT_SYMS+= linux_get_osname +EXPORT_SYMS+= linux_get_osrelease + +.if !defined(KERNBUILDDIR) +.if defined(DEBUG) +CFLAGS+=-DDEBUG +.endif +.if defined(KTR) +CFLAGS+=-DKTR +.endif +.endif + +.include diff --git a/sys/modules/pseudofs/Makefile b/sys/modules/pseudofs/Makefile index d5696c5c4795..6ddb74929f94 100644 --- a/sys/modules/pseudofs/Makefile +++ b/sys/modules/pseudofs/Makefile @@ -23,4 +23,10 @@ EXPORT_SYMS= pfs_mount \ pfs_enable \ pfs_destroy +.if !defined(KERNBUILDDIR) +.if defined(PSEUDOFS_TRACE) +CFLAGS+=-DPSEUDOFS_TRACE +.endif +.endif + .include diff --git a/sys/modules/sfxge/Makefile b/sys/modules/sfxge/Makefile index 48a2983d4b34..31d91be9ec9f 100644 --- a/sys/modules/sfxge/Makefile +++ b/sys/modules/sfxge/Makefile @@ -9,22 +9,31 @@ SRCS+= opt_inet.h opt_inet6.h opt_sched.h .PATH: ${.CURDIR}/../../dev/sfxge SRCS+= sfxge.c sfxge_dma.c sfxge_ev.c -SRCS+= sfxge_intr.c sfxge_mcdi.c +SRCS+= sfxge_intr.c sfxge_mcdi.c sfxge_nvram.c SRCS+= sfxge_port.c sfxge_rx.c sfxge_tx.c SRCS+= sfxge.h sfxge_rx.h sfxge_tx.h sfxge_version.h .PATH: ${.CURDIR}/../../dev/sfxge/common -SRCS+= efx_ev.c efx_intr.c efx_mac.c efx_mcdi.c efx_nic.c +SRCS+= efx_bootcfg.c efx_crc32.c efx_ev.c efx_intr.c efx_mac.c +SRCS+= efx_mcdi.c efx_mon.c efx_nic.c SRCS+= efx_nvram.c efx_phy.c efx_port.c efx_rx.c efx_sram.c efx_tx.c -SRCS+= efx_vpd.c efx_wol.c +SRCS+= efx_vpd.c efx_wol.c efx_filter.c efx_hash.c SRCS+= efsys.h -SRCS+= efx.h efx_impl.h efx_mcdi.h efx_regs.h efx_regs_ef10.h -SRCS+= efx_regs_mcdi.h efx_regs_pci.h efx_types.h +SRCS+= efx.h efx_check.h efx_impl.h efx_mcdi.h efx_regs.h efx_regs_ef10.h +SRCS+= efx_regs_mcdi.h efx_regs_pci.h efx_types.h efx_phy_ids.h +SRCS+= ef10_tlv_layout.h -SRCS+= siena_mac.c siena_nic.c siena_nvram.c siena_phy.c +SRCS+= mcdi_mon.c mcdi_mon.h + +SRCS+= siena_mac.c siena_mcdi.c siena_nic.c siena_nvram.c siena_phy.c SRCS+= siena_sram.c siena_vpd.c SRCS+= siena_flash.h siena_impl.h +SRCS+= hunt_ev.c hunt_intr.c hunt_mac.c hunt_mcdi.c hunt_nic.c +SRCS+= hunt_nvram.c hunt_rx.c hunt_phy.c hunt_sram.c hunt_tx.c hunt_vpd.c +SRCS+= hunt_filter.c +SRCS+= hunt_impl.h + DEBUG_FLAGS= -DDEBUG=1 .include diff --git a/sys/net/if_bridge.c b/sys/net/if_bridge.c index 753854d069f7..faa7681d8878 100644 --- a/sys/net/if_bridge.c +++ b/sys/net/if_bridge.c @@ -3065,9 +3065,11 @@ bridge_state_change(struct ifnet *ifp, int state) "discarding" }; + CURVNET_SET(ifp->if_vnet); if (V_log_stp) log(LOG_NOTICE, "%s: state changed to %s on %s\n", sc->sc_ifp->if_xname, stpstates[state], ifp->if_xname); + CURVNET_RESTORE(); } /* diff --git a/sys/net/if_gif.c b/sys/net/if_gif.c index cbcb50f7c61b..48a842a9dd93 100644 --- a/sys/net/if_gif.c +++ b/sys/net/if_gif.c @@ -920,6 +920,17 @@ gif_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) #endif } break; + case SIOCGTUNFIB: + ifr->ifr_fib = sc->gif_fibnum; + break; + case SIOCSTUNFIB: + if ((error = priv_check(curthread, PRIV_NET_GIF)) != 0) + break; + if (ifr->ifr_fib >= rt_numfibs) + error = EINVAL; + else + sc->gif_fibnum = ifr->ifr_fib; + break; case GIFGOPTS: options = sc->gif_options; error = copyout(&options, ifr->ifr_data, sizeof(options)); @@ -935,7 +946,6 @@ gif_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) else sc->gif_options = options; break; - default: error = EINVAL; break; diff --git a/sys/net/if_gif.h b/sys/net/if_gif.h index c1fe83b800d4..ed143e87c706 100644 --- a/sys/net/if_gif.h +++ b/sys/net/if_gif.h @@ -127,7 +127,9 @@ int in6_gif_attach(struct gif_softc *); #define GIFSOPTS _IOW('i', 151, struct ifreq) #define GIF_ACCEPT_REVETHIP 0x0001 +#define GIF_IGNORE_SOURCE 0x0002 #define GIF_SEND_REVETHIP 0x0010 -#define GIF_OPTMASK (GIF_ACCEPT_REVETHIP|GIF_SEND_REVETHIP) +#define GIF_OPTMASK (GIF_ACCEPT_REVETHIP|GIF_SEND_REVETHIP| \ + GIF_IGNORE_SOURCE) #endif /* _NET_IF_GIF_H_ */ diff --git a/sys/net/if_gre.c b/sys/net/if_gre.c index 3162c6f61008..c38ec3ad4038 100644 --- a/sys/net/if_gre.c +++ b/sys/net/if_gre.c @@ -64,6 +64,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include #ifdef INET @@ -441,6 +442,17 @@ gre_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) #endif } break; + case SIOCGTUNFIB: + ifr->ifr_fib = sc->gre_fibnum; + break; + case SIOCSTUNFIB: + if ((error = priv_check(curthread, PRIV_NET_GRE)) != 0) + break; + if (ifr->ifr_fib >= rt_numfibs) + error = EINVAL; + else + sc->gre_fibnum = ifr->ifr_fib; + break; case GRESKEY: if ((error = priv_check(curthread, PRIV_NET_GRE)) != 0) break; @@ -454,7 +466,8 @@ gre_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) } break; case GREGKEY: - error = copyout(&sc->gre_key, ifr->ifr_data, sizeof(sc->gre_key)); + error = copyout(&sc->gre_key, ifr->ifr_data, + sizeof(sc->gre_key)); break; case GRESOPTS: if ((error = priv_check(curthread, PRIV_NET_GRE)) != 0) @@ -725,7 +738,7 @@ gre_input(struct mbuf **mp, int *offp, int proto) m_adj(m, *offp + hlen); m_clrprotoflags(m); m->m_pkthdr.rcvif = ifp; - M_SETFIB(m, sc->gre_fibnum); + M_SETFIB(m, ifp->if_fib); #ifdef MAC mac_ifnet_create_mbuf(ifp, m); #endif diff --git a/sys/net/if_me.c b/sys/net/if_me.c index 56fe4d55a192..ff79713b2568 100644 --- a/sys/net/if_me.c +++ b/sys/net/if_me.c @@ -54,6 +54,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include #include @@ -297,6 +298,17 @@ me_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) if (error != 0) memset(src, 0, sizeof(*src)); break; + case SIOCGTUNFIB: + ifr->ifr_fib = sc->me_fibnum; + break; + case SIOCSTUNFIB: + if ((error = priv_check(curthread, PRIV_NET_GRE)) != 0) + break; + if (ifr->ifr_fib >= rt_numfibs) + error = EINVAL; + else + sc->me_fibnum = ifr->ifr_fib; + break; default: error = EINVAL; break; @@ -453,7 +465,7 @@ me_input(struct mbuf **mp, int *offp, int proto) m_clrprotoflags(m); m->m_pkthdr.rcvif = ifp; m->m_pkthdr.csum_flags |= (CSUM_IP_CHECKED | CSUM_IP_VALID); - M_SETFIB(m, sc->me_fibnum); + M_SETFIB(m, ifp->if_fib); hlen = AF_INET; BPF_MTAP2(ifp, &hlen, sizeof(hlen), m); if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1); diff --git a/sys/net/if_spppsubr.c b/sys/net/if_spppsubr.c index c0f8e39c3963..6743981c9009 100644 --- a/sys/net/if_spppsubr.c +++ b/sys/net/if_spppsubr.c @@ -1005,7 +1005,7 @@ sppp_attach(struct ifnet *ifp) mtx_init(&sp->mtx, "sppp", MTX_NETWORK_LOCK, MTX_DEF | MTX_RECURSE); /* Initialize keepalive handler. */ - callout_init(&sp->keepalive_callout, CALLOUT_MPSAFE); + callout_init(&sp->keepalive_callout, 1); callout_reset(&sp->keepalive_callout, hz * 10, sppp_keepalive, (void *)sp); @@ -1037,7 +1037,7 @@ sppp_attach(struct ifnet *ifp) #ifdef INET6 sp->confflags |= CONF_ENABLE_IPV6; #endif - callout_init(&sp->ifstart_callout, CALLOUT_MPSAFE); + callout_init(&sp->ifstart_callout, 1); sp->if_start = ifp->if_start; ifp->if_start = sppp_ifstart; sp->pp_comp = malloc(sizeof(struct slcompress), M_TEMP, M_WAITOK); @@ -2145,7 +2145,7 @@ sppp_lcp_init(struct sppp *sp) sp->lcp.max_terminate = 2; sp->lcp.max_configure = 10; sp->lcp.max_failure = 10; - callout_init(&sp->ch[IDX_LCP], CALLOUT_MPSAFE); + callout_init(&sp->ch[IDX_LCP], 1); } static void @@ -2836,7 +2836,7 @@ sppp_ipcp_init(struct sppp *sp) sp->fail_counter[IDX_IPCP] = 0; sp->pp_seq[IDX_IPCP] = 0; sp->pp_rseq[IDX_IPCP] = 0; - callout_init(&sp->ch[IDX_IPCP], CALLOUT_MPSAFE); + callout_init(&sp->ch[IDX_IPCP], 1); } static void @@ -3395,7 +3395,7 @@ sppp_ipv6cp_init(struct sppp *sp) sp->fail_counter[IDX_IPV6CP] = 0; sp->pp_seq[IDX_IPV6CP] = 0; sp->pp_rseq[IDX_IPV6CP] = 0; - callout_init(&sp->ch[IDX_IPV6CP], CALLOUT_MPSAFE); + callout_init(&sp->ch[IDX_IPV6CP], 1); } static void @@ -4200,7 +4200,7 @@ sppp_chap_init(struct sppp *sp) sp->fail_counter[IDX_CHAP] = 0; sp->pp_seq[IDX_CHAP] = 0; sp->pp_rseq[IDX_CHAP] = 0; - callout_init(&sp->ch[IDX_CHAP], CALLOUT_MPSAFE); + callout_init(&sp->ch[IDX_CHAP], 1); } static void @@ -4522,8 +4522,8 @@ sppp_pap_init(struct sppp *sp) sp->fail_counter[IDX_PAP] = 0; sp->pp_seq[IDX_PAP] = 0; sp->pp_rseq[IDX_PAP] = 0; - callout_init(&sp->ch[IDX_PAP], CALLOUT_MPSAFE); - callout_init(&sp->pap_my_to_ch, CALLOUT_MPSAFE); + callout_init(&sp->ch[IDX_PAP], 1); + callout_init(&sp->pap_my_to_ch, 1); } static void diff --git a/sys/net/sff8436.h b/sys/net/sff8436.h index 7d705b8447a9..97abe104d076 100644 --- a/sys/net/sff8436.h +++ b/sys/net/sff8436.h @@ -202,7 +202,9 @@ enum { * optional features are implemented * (if any) in the transceiver * (see Table 42) */ - SFF_8436_CC_EXT = 222, /* Check code for the Extended ID + SFF_8636_BITRATE = 222, /* Nominal bit rate per channel, units + * of 250 Mbps */ + SFF_8436_CC_EXT = 223, /* Check code for the Extended ID * Fields (bytes 192-222 incl) */ SFF_8436_VENDOR_RSRVD_START = 224, SFF_8436_VENDOR_RSRVD_END = 255, diff --git a/sys/net/sff8472.h b/sys/net/sff8472.h index 08b37cabe3f2..fdeb2e9a0c2f 100644 --- a/sys/net/sff8472.h +++ b/sys/net/sff8472.h @@ -377,7 +377,7 @@ enum { /* * Table 3.2 Identifier values. - * Identifier constants has taken from SFF-8024 rev 2.2 table 4.1 + * Identifier constants has taken from SFF-8024 rev 2.9 table 4.1 * (as referenced by table 3.2 footer) * */ enum { @@ -400,28 +400,36 @@ enum { SFF_8024_ID_HD8X = 0x10, /* Shielded Mini Multilane HD 8X */ SFF_8024_ID_QSFP28 = 0x11, /* QSFP28 */ SFF_8024_ID_CXP2 = 0x12, /* CXP2 (aka CXP28) */ - SFF_8024_ID_LAST = SFF_8024_ID_CXP2 + SFF_8024_ID_CDFP = 0x13, /* CDFP (Style 1/Style 2) */ + SFF_8024_ID_SMM4 = 0x14, /* Shielded Mini Multilate HD 4X Fanout */ + SFF_8024_ID_SMM8 = 0x15, /* Shielded Mini Multilate HD 8X Fanout */ + SFF_8024_ID_CDFP3 = 0x16, /* CDFP (Style3) */ + SFF_8024_ID_LAST = SFF_8024_ID_CDFP3 }; static const char *sff_8024_id[SFF_8024_ID_LAST + 1] = {"Unknown", "GBIC", "SFF", - "SFP/SFP+", + "SFP/SFP+/SFP28", "XBI", "Xenpak", "XFP", "XFF", "XFP-E", - "XPAk", + "XPAK", "X2", - "DWDM-SFP", + "DWDM-SFP/SFP+", "QSFP", "QSFP+", "CXP", "HD4X", "HD8X", "QSFP28", - "CXP2"}; + "CXP2", + "CDFP", + "SMM4", + "SMM8", + "CDFP3"}; /* Keep compability with old definitions */ #define SFF_8472_ID_UNKNOWN SFF_8024_ID_UNKNOWN diff --git a/sys/net80211/ieee80211.c b/sys/net80211/ieee80211.c index 2fa7e9affb8e..53f2debedcfe 100644 --- a/sys/net80211/ieee80211.c +++ b/sys/net80211/ieee80211.c @@ -35,9 +35,10 @@ __FBSDID("$FreeBSD$"); #include #include #include - #include +#include + #include #include #include @@ -81,7 +82,7 @@ const int ieee80211_opcap[IEEE80211_OPMODE_MAX] = { #endif }; -static const uint8_t ieee80211broadcastaddr[IEEE80211_ADDR_LEN] = +const uint8_t ieee80211broadcastaddr[IEEE80211_ADDR_LEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; static void ieee80211_syncflag_locked(struct ieee80211com *ic, int flag); @@ -94,6 +95,7 @@ static void ieee80211com_media_status(struct ifnet *, struct ifmediareq *); static int ieee80211com_media_change(struct ifnet *); static int media_status(enum ieee80211_opmode, const struct ieee80211_channel *); +static uint64_t ieee80211_get_counter(struct ifnet *, ift_counter); MALLOC_DEFINE(M_80211_VAP, "80211vap", "802.11 vap state"); @@ -223,15 +225,17 @@ ieee80211_chan_init(struct ieee80211com *ic) } static void -null_update_mcast(struct ifnet *ifp) +null_update_mcast(struct ieee80211com *ic) { - if_printf(ifp, "need multicast update callback\n"); + + ic_printf(ic, "need multicast update callback\n"); } static void -null_update_promisc(struct ifnet *ifp) +null_update_promisc(struct ieee80211com *ic) { - if_printf(ifp, "need promiscuous mode update callback\n"); + + ic_printf(ic, "need promiscuous mode update callback\n"); } static int @@ -242,15 +246,9 @@ null_transmit(struct ifnet *ifp, struct mbuf *m) return EACCES; /* XXX EIO/EPERM? */ } -#if __FreeBSD_version >= 1000031 static int null_output(struct ifnet *ifp, struct mbuf *m, const struct sockaddr *dst, struct route *ro) -#else -static int -null_output(struct ifnet *ifp, struct mbuf *m, - struct sockaddr *dst, struct route *ro) -#endif { if_printf(ifp, "discard raw packet\n"); return null_transmit(ifp, m); @@ -267,7 +265,20 @@ static void null_update_chw(struct ieee80211com *ic) { - if_printf(ic->ic_ifp, "%s: need callback\n", __func__); + ic_printf(ic, "%s: need callback\n", __func__); +} + +int +ic_printf(struct ieee80211com *ic, const char * fmt, ...) +{ + va_list ap; + int retval; + + retval = printf("%s: ", ic->ic_name); + va_start(ap, fmt); + retval += vprintf(fmt, ap); + va_end(ap); + return (retval); } /* @@ -284,15 +295,17 @@ ieee80211_ifattach(struct ieee80211com *ic, KASSERT(ifp->if_type == IFT_IEEE80211, ("if_type %d", ifp->if_type)); - IEEE80211_LOCK_INIT(ic, ifp->if_xname); - IEEE80211_TX_LOCK_INIT(ic, ifp->if_xname); + IEEE80211_LOCK_INIT(ic, ic->ic_name); + IEEE80211_TX_LOCK_INIT(ic, ic->ic_name); TAILQ_INIT(&ic->ic_vaps); /* Create a taskqueue for all state changes */ ic->ic_tq = taskqueue_create("ic_taskq", M_WAITOK | M_ZERO, taskqueue_thread_enqueue, &ic->ic_tq); taskqueue_start_threads(&ic->ic_tq, 1, PI_NET, "%s net80211 taskq", - ifp->if_xname); + ic->ic_name); + ic->ic_ierrors = counter_u64_alloc(M_WAITOK); + ic->ic_oerrors = counter_u64_alloc(M_WAITOK); /* * Fill in 802.11 available channel set, mark all * available channels as active, and pick a default @@ -391,6 +404,8 @@ ieee80211_ifdetach(struct ieee80211com *ic) /* XXX VNET needed? */ ifmedia_removeall(&ic->ic_media); + counter_u64_free(ic->ic_ierrors); + counter_u64_free(ic->ic_oerrors); taskqueue_free(ic->ic_tq); IEEE80211_TX_LOCK_DESTROY(ic); @@ -412,6 +427,31 @@ default_reset(struct ieee80211vap *vap, u_long cmd) return ENETRESET; } +/* + * Add underlying device errors to vap errors. + */ +static uint64_t +ieee80211_get_counter(struct ifnet *ifp, ift_counter cnt) +{ + struct ieee80211vap *vap = ifp->if_softc; + struct ieee80211com *ic = vap->iv_ic; + uint64_t rv; + + rv = if_get_counter_default(ifp, cnt); + switch (cnt) { + case IFCOUNTER_OERRORS: + rv += counter_u64_fetch(ic->ic_oerrors); + break; + case IFCOUNTER_IERRORS: + rv += counter_u64_fetch(ic->ic_ierrors); + break; + default: + break; + } + + return (rv); +} + /* * Prepare a vap for use. Drivers use this call to * setup net80211 state in new vap's prior attaching @@ -427,7 +467,7 @@ ieee80211_vap_setup(struct ieee80211com *ic, struct ieee80211vap *vap, ifp = if_alloc(IFT_ETHER); if (ifp == NULL) { - if_printf(ic->ic_ifp, "%s: unable to allocate ifnet\n", + ic_printf(ic, "%s: unable to allocate ifnet\n", __func__); return ENOMEM; } @@ -438,6 +478,7 @@ ieee80211_vap_setup(struct ieee80211com *ic, struct ieee80211vap *vap, ifp->if_qflush = ieee80211_vap_qflush; ifp->if_ioctl = ieee80211_ioctl; ifp->if_init = ieee80211_init; + ifp->if_get_counter = ieee80211_get_counter; vap->iv_ifp = ifp; vap->iv_ic = ic; @@ -551,7 +592,7 @@ ieee80211_vap_attach(struct ieee80211vap *vap, IEEE80211_DPRINTF(vap, IEEE80211_MSG_STATE, "%s: %s parent %s flags 0x%x flags_ext 0x%x\n", __func__, ieee80211_opmode_name[vap->iv_opmode], - ic->ic_ifp->if_xname, vap->iv_flags, vap->iv_flags_ext); + ic->ic_name, vap->iv_flags, vap->iv_flags_ext); /* * Do late attach work that cannot happen until after @@ -607,8 +648,7 @@ ieee80211_vap_detach(struct ieee80211vap *vap) CURVNET_SET(ifp->if_vnet); IEEE80211_DPRINTF(vap, IEEE80211_MSG_STATE, "%s: %s parent %s\n", - __func__, ieee80211_opmode_name[vap->iv_opmode], - ic->ic_ifp->if_xname); + __func__, ieee80211_opmode_name[vap->iv_opmode], ic->ic_name); /* NB: bpfdetach is called by ether_ifdetach and claims all taps */ ether_ifdetach(ifp); @@ -900,7 +940,7 @@ int ieee80211_chan2ieee(struct ieee80211com *ic, const struct ieee80211_channel *c) { if (c == NULL) { - if_printf(ic->ic_ifp, "invalid channel (NULL)\n"); + ic_printf(ic, "invalid channel (NULL)\n"); return 0; /* XXX */ } return (c == IEEE80211_CHAN_ANYC ? IEEE80211_CHAN_ANY : c->ic_ieee); @@ -991,6 +1031,75 @@ ieee80211_find_channel_byieee(struct ieee80211com *ic, int ieee, int flags) return NULL; } +/* + * Lookup a channel suitable for the given rx status. + * + * This is used to find a channel for a frame (eg beacon, probe + * response) based purely on the received PHY information. + * + * For now it tries to do it based on R_FREQ / R_IEEE. + * This is enough for 11bg and 11a (and thus 11ng/11na) + * but it will not be enough for GSM, PSB channels and the + * like. It also doesn't know about legacy-turbog and + * legacy-turbo modes, which some offload NICs actually + * support in weird ways. + * + * Takes the ic and rxstatus; returns the channel or NULL + * if not found. + * + * XXX TODO: Add support for that when the need arises. + */ +struct ieee80211_channel * +ieee80211_lookup_channel_rxstatus(struct ieee80211vap *vap, + const struct ieee80211_rx_stats *rxs) +{ + struct ieee80211com *ic = vap->iv_ic; + uint32_t flags; + struct ieee80211_channel *c; + + if (rxs == NULL) + return (NULL); + + /* + * Strictly speaking we only use freq for now, + * however later on we may wish to just store + * the ieee for verification. + */ + if ((rxs->r_flags & IEEE80211_R_FREQ) == 0) + return (NULL); + if ((rxs->r_flags & IEEE80211_R_IEEE) == 0) + return (NULL); + + /* + * If the rx status contains a valid ieee/freq, then + * ensure we populate the correct channel information + * in rxchan before passing it up to the scan infrastructure. + * Offload NICs will pass up beacons from all channels + * during background scans. + */ + + /* Determine a band */ + /* XXX should be done by the driver? */ + if (rxs->c_freq < 3000) { + flags = IEEE80211_CHAN_B; + } else { + flags = IEEE80211_CHAN_A; + } + + /* Channel lookup */ + c = ieee80211_find_channel(ic, rxs->c_freq, flags); + + IEEE80211_DPRINTF(vap, IEEE80211_MSG_INPUT, + "%s: freq=%d, ieee=%d, flags=0x%08x; c=%p\n", + __func__, + (int) rxs->c_freq, + (int) rxs->c_ieee, + flags, + c); + + return (c); +} + static void addmedia(struct ifmedia *media, int caps, int addsta, int mode, int mword) { @@ -1169,7 +1278,6 @@ ieee80211_get_suprates(struct ieee80211com *ic, const struct ieee80211_channel * void ieee80211_announce(struct ieee80211com *ic) { - struct ifnet *ifp = ic->ic_ifp; int i, rate, mword; enum ieee80211_phymode mode; const struct ieee80211_rateset *rs; @@ -1178,7 +1286,7 @@ ieee80211_announce(struct ieee80211com *ic) for (mode = IEEE80211_MODE_AUTO+1; mode < IEEE80211_MODE_11NA; mode++) { if (isclr(ic->ic_modecaps, mode)) continue; - if_printf(ifp, "%s rates: ", ieee80211_phymode_name[mode]); + ic_printf(ic, "%s rates: ", ieee80211_phymode_name[mode]); rs = &ic->ic_sup_rates[mode]; for (i = 0; i < rs->rs_nrates; i++) { mword = ieee80211_rate2media(ic, rs->rs_rates[i], mode); diff --git a/sys/net80211/ieee80211.h b/sys/net80211/ieee80211.h index 9b005f3d6b89..64d0754f358d 100644 --- a/sys/net80211/ieee80211.h +++ b/sys/net80211/ieee80211.h @@ -36,6 +36,10 @@ /* is 802.11 address multicast/broadcast? */ #define IEEE80211_IS_MULTICAST(_a) (*(_a) & 0x01) +#ifdef _KERNEL +extern const uint8_t ieee80211broadcastaddr[]; +#endif + typedef uint16_t ieee80211_seq; /* IEEE 802.11 PLCP header */ @@ -169,6 +173,11 @@ struct ieee80211_qosframe_addr4 { #define IEEE80211_FC1_PROTECTED 0x40 #define IEEE80211_FC1_ORDER 0x80 +#define IEEE80211_HAS_SEQ(type, subtype) \ + ((type) != IEEE80211_FC0_TYPE_CTL && \ + !((type) == IEEE80211_FC0_TYPE_DATA && \ + ((subtype) & IEEE80211_FC0_SUBTYPE_QOS_NULL) == \ + IEEE80211_FC0_SUBTYPE_QOS_NULL)) #define IEEE80211_SEQ_FRAG_MASK 0x000f #define IEEE80211_SEQ_FRAG_SHIFT 0 #define IEEE80211_SEQ_SEQ_MASK 0xfff0 @@ -807,7 +816,7 @@ struct ieee80211_csa_ie { #define IEEE80211_RATE_BASIC 0x80 #define IEEE80211_RATE_VAL 0x7f -/* EPR information element flags */ +/* ERP information element flags */ #define IEEE80211_ERP_NON_ERP_PRESENT 0x01 #define IEEE80211_ERP_USE_PROTECTION 0x02 #define IEEE80211_ERP_LONG_PREAMBLE 0x04 diff --git a/sys/net80211/ieee80211_acl.c b/sys/net80211/ieee80211_acl.c index ac604fb09206..eeb7f0bc68da 100644 --- a/sys/net80211/ieee80211_acl.c +++ b/sys/net80211/ieee80211_acl.c @@ -99,8 +99,8 @@ acl_attach(struct ieee80211vap *vap) { struct aclstate *as; - as = (struct aclstate *) malloc(sizeof(struct aclstate), - M_80211_ACL, M_NOWAIT | M_ZERO); + as = (struct aclstate *) IEEE80211_MALLOC(sizeof(struct aclstate), + M_80211_ACL, IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (as == NULL) return 0; ACL_LOCK_INIT(as, "acl"); @@ -123,7 +123,7 @@ acl_detach(struct ieee80211vap *vap) acl_free_all(vap); vap->iv_as = NULL; ACL_LOCK_DESTROY(as); - free(as, M_80211_ACL); + IEEE80211_FREE(as, M_80211_ACL); } static __inline struct acl * @@ -147,7 +147,7 @@ _acl_free(struct aclstate *as, struct acl *acl) TAILQ_REMOVE(&as->as_list, acl, acl_list); LIST_REMOVE(acl, acl_hash); - free(acl, M_80211_ACL); + IEEE80211_FREE(acl, M_80211_ACL); as->as_nacls--; } @@ -175,7 +175,8 @@ acl_add(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN]) struct acl *acl, *new; int hash; - new = (struct acl *) malloc(sizeof(struct acl), M_80211_ACL, M_NOWAIT | M_ZERO); + new = (struct acl *) IEEE80211_MALLOC(sizeof(struct acl), + M_80211_ACL, IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (new == NULL) { IEEE80211_DPRINTF(vap, IEEE80211_MSG_ACL, "ACL: add %s failed, no memory\n", ether_sprintf(mac)); @@ -188,7 +189,7 @@ acl_add(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN]) LIST_FOREACH(acl, &as->as_hash[hash], acl_hash) { if (IEEE80211_ADDR_EQ(acl->acl_macaddr, mac)) { ACL_UNLOCK(as); - free(new, M_80211_ACL); + IEEE80211_FREE(new, M_80211_ACL); IEEE80211_DPRINTF(vap, IEEE80211_MSG_ACL, "ACL: add %s failed, already present\n", ether_sprintf(mac)); @@ -302,8 +303,8 @@ acl_getioctl(struct ieee80211vap *vap, struct ieee80211req *ireq) ireq->i_len = space; /* return required space */ return 0; /* NB: must not error */ } - ap = (struct ieee80211req_maclist *) malloc(space, - M_TEMP, M_NOWAIT); + ap = (struct ieee80211req_maclist *) IEEE80211_MALLOC(space, + M_TEMP, IEEE80211_M_NOWAIT); if (ap == NULL) return ENOMEM; i = 0; @@ -318,7 +319,7 @@ acl_getioctl(struct ieee80211vap *vap, struct ieee80211req *ireq) ireq->i_len = space; } else error = copyout(ap, ireq->i_data, ireq->i_len); - free(ap, M_TEMP); + IEEE80211_FREE(ap, M_TEMP); return error; } return EINVAL; diff --git a/sys/net80211/ieee80211_adhoc.c b/sys/net80211/ieee80211_adhoc.c index 049d952970fa..d31ad9be0de6 100644 --- a/sys/net80211/ieee80211_adhoc.c +++ b/sys/net80211/ieee80211_adhoc.c @@ -70,11 +70,12 @@ __FBSDID("$FreeBSD$"); static void adhoc_vattach(struct ieee80211vap *); static int adhoc_newstate(struct ieee80211vap *, enum ieee80211_state, int); -static int adhoc_input(struct ieee80211_node *, struct mbuf *, int, int); +static int adhoc_input(struct ieee80211_node *, struct mbuf *, + const struct ieee80211_rx_stats *, int, int); static void adhoc_recv_mgmt(struct ieee80211_node *, struct mbuf *, - int subtype, int, int); + int subtype, const struct ieee80211_rx_stats *, int, int); static void ahdemo_recv_mgmt(struct ieee80211_node *, struct mbuf *, - int subtype, int, int); + int subtype, const struct ieee80211_rx_stats *rxs, int, int); static void adhoc_recv_ctl(struct ieee80211_node *, struct mbuf *, int subtype); void @@ -289,9 +290,9 @@ doprint(struct ieee80211vap *vap, int subtype) * by the 802.11 layer. */ static int -adhoc_input(struct ieee80211_node *ni, struct mbuf *m, int rssi, int nf) +adhoc_input(struct ieee80211_node *ni, struct mbuf *m, + const struct ieee80211_rx_stats *rxs, int rssi, int nf) { -#define HAS_SEQ(type) ((type & 0x4) == 0) struct ieee80211vap *vap = ni->ni_vap; struct ieee80211com *ic = ni->ni_ic; struct ifnet *ifp = vap->iv_ifp; @@ -373,7 +374,7 @@ adhoc_input(struct ieee80211_node *ni, struct mbuf *m, int rssi, int nf) */ if (!(type == IEEE80211_FC0_TYPE_MGT && (subtype == IEEE80211_FC0_SUBTYPE_BEACON || - subtype == IEEE80211_FC0_SUBTYPE_PROBE_REQ)) && + subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)) && !IEEE80211_ADDR_EQ(bssid, vap->iv_bss->ni_bssid) && !IEEE80211_ADDR_EQ(bssid, ifp->if_broadcastaddr)) { /* not interested in */ @@ -414,7 +415,8 @@ adhoc_input(struct ieee80211_node *ni, struct mbuf *m, int rssi, int nf) } IEEE80211_RSSI_LPF(ni->ni_avgrssi, rssi); ni->ni_noise = nf; - if (HAS_SEQ(type) && IEEE80211_ADDR_EQ(wh->i_addr2, ni->ni_macaddr)) { + if (IEEE80211_HAS_SEQ(type, subtype) && + IEEE80211_ADDR_EQ(wh->i_addr2, ni->ni_macaddr)) { uint8_t tid = ieee80211_gettid(wh); if (IEEE80211_QOS_HAS_SEQ(wh) && TID_TO_WME_AC(tid) >= WME_AC_VI) @@ -642,7 +644,7 @@ adhoc_input(struct ieee80211_node *ni, struct mbuf *m, int rssi, int nf) vap->iv_stats.is_rx_mgtdiscard++; /* XXX */ goto out; } - vap->iv_recv_mgmt(ni, m, subtype, rssi, nf); + vap->iv_recv_mgmt(ni, m, subtype, rxs, rssi, nf); goto out; case IEEE80211_FC0_TYPE_CTL: @@ -687,10 +689,11 @@ is11bclient(const uint8_t *rates, const uint8_t *xrates) static void adhoc_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m0, - int subtype, int rssi, int nf) + int subtype, const struct ieee80211_rx_stats *rxs, int rssi, int nf) { struct ieee80211vap *vap = ni->ni_vap; struct ieee80211com *ic = ni->ni_ic; + struct ieee80211_channel *rxchan = ic->ic_curchan; struct ieee80211_frame *wh; uint8_t *frm, *efrm, *sfrm; uint8_t *ssid, *rates, *xrates; @@ -705,11 +708,17 @@ adhoc_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m0, case IEEE80211_FC0_SUBTYPE_PROBE_RESP: case IEEE80211_FC0_SUBTYPE_BEACON: { struct ieee80211_scanparams scan; + struct ieee80211_channel *c; /* * We process beacon/probe response * frames to discover neighbors. */ - if (ieee80211_parse_beacon(ni, m0, &scan) != 0) + if (rxs != NULL) { + c = ieee80211_lookup_channel_rxstatus(vap, rxs); + if (c != NULL) + rxchan = c; + } + if (ieee80211_parse_beacon(ni, m0, rxchan, &scan) != 0) return; /* * Count frame now that we know it's to be processed. @@ -735,7 +744,8 @@ adhoc_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m0, ieee80211_probe_curchan(vap, 1); ic->ic_flags_ext &= ~IEEE80211_FEXT_PROBECHAN; } - ieee80211_add_scan(vap, &scan, wh, subtype, rssi, nf); + ieee80211_add_scan(vap, rxchan, &scan, wh, + subtype, rssi, nf); return; } if (scan.capinfo & IEEE80211_CAPINFO_IBSS) { @@ -910,7 +920,7 @@ adhoc_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m0, static void ahdemo_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m0, - int subtype, int rssi, int nf) + int subtype, const struct ieee80211_rx_stats *rxs, int rssi, int nf) { struct ieee80211vap *vap = ni->ni_vap; struct ieee80211com *ic = ni->ni_ic; @@ -921,7 +931,7 @@ ahdemo_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m0, * a site-survey. */ if (ic->ic_flags & IEEE80211_F_SCAN) - adhoc_recv_mgmt(ni, m0, subtype, rssi, nf); + adhoc_recv_mgmt(ni, m0, subtype, rxs, rssi, nf); else { wh = mtod(m0, struct ieee80211_frame *); switch (subtype) { diff --git a/sys/net80211/ieee80211_amrr.c b/sys/net80211/ieee80211_amrr.c index b1d92c880fc0..b7c11fd2417b 100644 --- a/sys/net80211/ieee80211_amrr.c +++ b/sys/net80211/ieee80211_amrr.c @@ -113,8 +113,8 @@ amrr_init(struct ieee80211vap *vap) KASSERT(vap->iv_rs == NULL, ("%s called multiple times", __func__)); - amrr = vap->iv_rs = malloc(sizeof(struct ieee80211_amrr), - M_80211_RATECTL, M_NOWAIT|M_ZERO); + amrr = vap->iv_rs = IEEE80211_MALLOC(sizeof(struct ieee80211_amrr), + M_80211_RATECTL, IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (amrr == NULL) { if_printf(vap->iv_ifp, "couldn't alloc ratectl structure\n"); return; @@ -128,7 +128,7 @@ amrr_init(struct ieee80211vap *vap) static void amrr_deinit(struct ieee80211vap *vap) { - free(vap->iv_rs, M_80211_RATECTL); + IEEE80211_FREE(vap->iv_rs, M_80211_RATECTL); } /* @@ -160,8 +160,8 @@ amrr_node_init(struct ieee80211_node *ni) uint8_t rate; if (ni->ni_rctls == NULL) { - ni->ni_rctls = amn = malloc(sizeof(struct ieee80211_amrr_node), - M_80211_RATECTL, M_NOWAIT|M_ZERO); + ni->ni_rctls = amn = IEEE80211_MALLOC(sizeof(struct ieee80211_amrr_node), + M_80211_RATECTL, IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (amn == NULL) { if_printf(vap->iv_ifp, "couldn't alloc per-node ratectl " "structure\n"); @@ -225,7 +225,7 @@ amrr_node_init(struct ieee80211_node *ni) static void amrr_node_deinit(struct ieee80211_node *ni) { - free(ni->ni_rctls, M_80211_RATECTL); + IEEE80211_FREE(ni->ni_rctls, M_80211_RATECTL); } static int diff --git a/sys/net80211/ieee80211_crypto_ccmp.c b/sys/net80211/ieee80211_crypto_ccmp.c index cb9ed0af0149..89ca6d07e8e7 100644 --- a/sys/net80211/ieee80211_crypto_ccmp.c +++ b/sys/net80211/ieee80211_crypto_ccmp.c @@ -96,8 +96,8 @@ ccmp_attach(struct ieee80211vap *vap, struct ieee80211_key *k) { struct ccmp_ctx *ctx; - ctx = (struct ccmp_ctx *) malloc(sizeof(struct ccmp_ctx), - M_80211_CRYPTO, M_NOWAIT | M_ZERO); + ctx = (struct ccmp_ctx *) IEEE80211_MALLOC(sizeof(struct ccmp_ctx), + M_80211_CRYPTO, IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (ctx == NULL) { vap->iv_stats.is_crypto_nomem++; return NULL; @@ -113,7 +113,7 @@ ccmp_detach(struct ieee80211_key *k) { struct ccmp_ctx *ctx = k->wk_private; - free(ctx, M_80211_CRYPTO); + IEEE80211_FREE(ctx, M_80211_CRYPTO); KASSERT(nrefs > 0, ("imbalanced attach/detach")); nrefs--; /* NB: we assume caller locking */ } diff --git a/sys/net80211/ieee80211_crypto_tkip.c b/sys/net80211/ieee80211_crypto_tkip.c index 05d9c74bdf28..c6d2f541c87a 100644 --- a/sys/net80211/ieee80211_crypto_tkip.c +++ b/sys/net80211/ieee80211_crypto_tkip.c @@ -109,8 +109,8 @@ tkip_attach(struct ieee80211vap *vap, struct ieee80211_key *k) { struct tkip_ctx *ctx; - ctx = (struct tkip_ctx *) malloc(sizeof(struct tkip_ctx), - M_80211_CRYPTO, M_NOWAIT | M_ZERO); + ctx = (struct tkip_ctx *) IEEE80211_MALLOC(sizeof(struct tkip_ctx), + M_80211_CRYPTO, IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (ctx == NULL) { vap->iv_stats.is_crypto_nomem++; return NULL; @@ -126,7 +126,7 @@ tkip_detach(struct ieee80211_key *k) { struct tkip_ctx *ctx = k->wk_private; - free(ctx, M_80211_CRYPTO); + IEEE80211_FREE(ctx, M_80211_CRYPTO); KASSERT(nrefs > 0, ("imbalanced attach/detach")); nrefs--; /* NB: we assume caller locking */ } diff --git a/sys/net80211/ieee80211_crypto_wep.c b/sys/net80211/ieee80211_crypto_wep.c index 07c1797571a2..587cf39ce35d 100644 --- a/sys/net80211/ieee80211_crypto_wep.c +++ b/sys/net80211/ieee80211_crypto_wep.c @@ -87,8 +87,8 @@ wep_attach(struct ieee80211vap *vap, struct ieee80211_key *k) { struct wep_ctx *ctx; - ctx = (struct wep_ctx *) malloc(sizeof(struct wep_ctx), - M_80211_CRYPTO, M_NOWAIT | M_ZERO); + ctx = (struct wep_ctx *) IEEE80211_MALLOC(sizeof(struct wep_ctx), + M_80211_CRYPTO, IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (ctx == NULL) { vap->iv_stats.is_crypto_nomem++; return NULL; @@ -106,7 +106,7 @@ wep_detach(struct ieee80211_key *k) { struct wep_ctx *ctx = k->wk_private; - free(ctx, M_80211_CRYPTO); + IEEE80211_FREE(ctx, M_80211_CRYPTO); KASSERT(nrefs > 0, ("imbalanced attach/detach")); nrefs--; /* NB: we assume caller locking */ } diff --git a/sys/net80211/ieee80211_ddb.c b/sys/net80211/ieee80211_ddb.c index 74e82e545135..e646cf2b7417 100644 --- a/sys/net80211/ieee80211_ddb.c +++ b/sys/net80211/ieee80211_ddb.c @@ -521,6 +521,7 @@ _db_show_com(const struct ieee80211com *ic, int showvaps, int showsta, db_printf(" %s(%p)", vap->iv_ifp->if_xname, vap); db_printf("\n"); db_printf("\tifp %p(%s)", ic->ic_ifp, ic->ic_ifp->if_xname); + db_printf("\tname %s", ic->ic_name); db_printf(" comlock %p", &ic->ic_comlock); db_printf("\n"); db_printf("\theadroom %d", ic->ic_headroom); diff --git a/sys/net80211/ieee80211_dfs.c b/sys/net80211/ieee80211_dfs.c index 5fa9ba4b5c3a..232ceb7c6c0e 100644 --- a/sys/net80211/ieee80211_dfs.c +++ b/sys/net80211/ieee80211_dfs.c @@ -253,8 +253,8 @@ dfs_timeout(void *arg) * msg instead of one for every channel * table entry. */ - if_printf(ic->ic_ifp, "radar on channel" - " %u (%u MHz) cleared after timeout\n", + ic_printf(ic, "radar on channel %u " + "(%u MHz) cleared after timeout\n", c->ic_ieee, c->ic_freq); /* notify user space */ c->ic_state &= @@ -272,14 +272,14 @@ dfs_timeout(void *arg) } static void -announce_radar(struct ifnet *ifp, const struct ieee80211_channel *curchan, +announce_radar(struct ieee80211com *ic, const struct ieee80211_channel *curchan, const struct ieee80211_channel *newchan) { if (newchan == NULL) - if_printf(ifp, "radar detected on channel %u (%u MHz)\n", + ic_printf(ic, "radar detected on channel %u (%u MHz)\n", curchan->ic_ieee, curchan->ic_freq); else - if_printf(ifp, "radar detected on channel %u (%u MHz), " + ic_printf(ic, "radar detected on channel %u (%u MHz), " "moving to channel %u (%u MHz)\n", curchan->ic_ieee, curchan->ic_freq, newchan->ic_ieee, newchan->ic_freq); @@ -309,7 +309,7 @@ ieee80211_dfs_notify_radar(struct ieee80211com *ic, struct ieee80211_channel *ch * along merrily. */ if (ieee80211_dfs_debug == DFS_DBG_NOCSANOL) { - announce_radar(ic->ic_ifp, chan, chan); + announce_radar(ic, chan, chan); ieee80211_notify_radar(ic, chan); return; } @@ -364,7 +364,7 @@ ieee80211_dfs_notify_radar(struct ieee80211com *ic, struct ieee80211_channel *ch else dfs->newchan = chan; - announce_radar(ic->ic_ifp, chan, dfs->newchan); + announce_radar(ic, chan, dfs->newchan); if (callout_pending(&dfs->cac_timer)) callout_schedule(&dfs->cac_timer, 0); @@ -380,7 +380,7 @@ ieee80211_dfs_notify_radar(struct ieee80211com *ic, struct ieee80211_channel *ch * on the NOL to expire. */ /*XXX*/ - if_printf(ic->ic_ifp, "%s: No free channels; waiting for entry " + ic_printf(ic, "%s: No free channels; waiting for entry " "on NOL to expire\n", __func__); } } else { @@ -390,9 +390,9 @@ ieee80211_dfs_notify_radar(struct ieee80211com *ic, struct ieee80211_channel *ch if (dfs->lastchan != chan) { dfs->lastchan = chan; dfs->cureps = 0; - announce_radar(ic->ic_ifp, chan, NULL); + announce_radar(ic, chan, NULL); } else if (ppsratecheck(&dfs->lastevent, &dfs->cureps, 1)) { - announce_radar(ic->ic_ifp, chan, NULL); + announce_radar(ic, chan, NULL); } } } @@ -434,6 +434,6 @@ ieee80211_dfs_pickchannel(struct ieee80211com *ic) (c->ic_flags & flags) == flags) return c; } - if_printf(ic->ic_ifp, "HELP, no channel located to switch to!\n"); + ic_printf(ic, "HELP, no channel located to switch to!\n"); return NULL; } diff --git a/sys/net80211/ieee80211_freebsd.c b/sys/net80211/ieee80211_freebsd.c index a292619780f9..91907551abc0 100644 --- a/sys/net80211/ieee80211_freebsd.c +++ b/sys/net80211/ieee80211_freebsd.c @@ -66,10 +66,8 @@ SYSCTL_INT(_net_wlan, OID_AUTO, debug, CTLFLAG_RW, &ieee80211_debug, static MALLOC_DEFINE(M_80211_COM, "80211com", "802.11 com state"); -#if __FreeBSD_version >= 1000020 static const char wlanname[] = "wlan"; static struct if_clone *wlan_cloner; -#endif /* * Allocate/free com structure in conjunction with ifnet; @@ -82,7 +80,8 @@ wlan_alloc(u_char type, struct ifnet *ifp) { struct ieee80211com *ic; - ic = malloc(sizeof(struct ieee80211com), M_80211_COM, M_WAITOK|M_ZERO); + ic = IEEE80211_MALLOC(sizeof(struct ieee80211com), M_80211_COM, + IEEE80211_M_WAITOK | IEEE80211_M_ZERO); ic->ic_ifp = ifp; return (ic); @@ -91,7 +90,7 @@ wlan_alloc(u_char type, struct ifnet *ifp) static void wlan_free(void *ic, u_char type) { - free(ic, M_80211_COM); + IEEE80211_FREE(ic, M_80211_COM); } static int @@ -135,18 +134,10 @@ wlan_clone_create(struct if_clone *ifc, int unit, caddr_t params) if_printf(ifp, "TDMA not supported\n"); return EOPNOTSUPP; } -#if __FreeBSD_version >= 1000020 vap = ic->ic_vap_create(ic, wlanname, unit, cp.icp_opmode, cp.icp_flags, cp.icp_bssid, cp.icp_flags & IEEE80211_CLONE_MACADDR ? cp.icp_macaddr : (const uint8_t *)IF_LLADDR(ifp)); -#else - vap = ic->ic_vap_create(ic, ifc->ifc_name, unit, - cp.icp_opmode, cp.icp_flags, cp.icp_bssid, - cp.icp_flags & IEEE80211_CLONE_MACADDR ? - cp.icp_macaddr : (const uint8_t *)IF_LLADDR(ifp)); - -#endif return (vap == NULL ? EIO : 0); } @@ -160,19 +151,11 @@ wlan_clone_destroy(struct ifnet *ifp) ic->ic_vap_delete(vap); } -#if __FreeBSD_version < 1000020 -IFC_SIMPLE_DECLARE(wlan, 0); -#endif - void ieee80211_vap_destroy(struct ieee80211vap *vap) { CURVNET_SET(vap->iv_ifp->if_vnet); -#if __FreeBSD_version >= 1000020 if_clone_destroyif(wlan_cloner, vap->iv_ifp); -#else - if_clone_destroyif(&wlan_cloner, vap->iv_ifp); -#endif CURVNET_RESTORE(); } @@ -207,9 +190,8 @@ static int ieee80211_sysctl_parent(SYSCTL_HANDLER_ARGS) { struct ieee80211com *ic = arg1; - const char *name = ic->ic_ifp->if_xname; - return SYSCTL_OUT_STR(req, name); + return SYSCTL_OUT_STR(req, ic->ic_name); } static int @@ -245,8 +227,8 @@ ieee80211_sysctl_vattach(struct ieee80211vap *vap) struct sysctl_oid *oid; char num[14]; /* sufficient for 32 bits */ - ctx = (struct sysctl_ctx_list *) malloc(sizeof(struct sysctl_ctx_list), - M_DEVBUF, M_NOWAIT | M_ZERO); + ctx = (struct sysctl_ctx_list *) IEEE80211_MALLOC(sizeof(struct sysctl_ctx_list), + M_DEVBUF, IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (ctx == NULL) { if_printf(ifp, "%s: cannot allocate sysctl context!\n", __func__); @@ -321,7 +303,7 @@ ieee80211_sysctl_vdetach(struct ieee80211vap *vap) if (vap->iv_sysctl != NULL) { sysctl_ctx_free(vap->iv_sysctl); - free(vap->iv_sysctl, M_DEVBUF); + IEEE80211_FREE(vap->iv_sysctl, M_DEVBUF); vap->iv_sysctl = NULL; } } @@ -694,8 +676,9 @@ void ieee80211_notify_csa(struct ieee80211com *ic, const struct ieee80211_channel *c, int mode, int count) { - struct ifnet *ifp = ic->ic_ifp; struct ieee80211_csa_event iev; + struct ieee80211vap *vap; + struct ifnet *ifp; memset(&iev, 0, sizeof(iev)); iev.iev_flags = c->ic_flags; @@ -703,42 +686,53 @@ ieee80211_notify_csa(struct ieee80211com *ic, iev.iev_ieee = c->ic_ieee; iev.iev_mode = mode; iev.iev_count = count; - CURVNET_SET(ifp->if_vnet); - rt_ieee80211msg(ifp, RTM_IEEE80211_CSA, &iev, sizeof(iev)); - CURVNET_RESTORE(); + TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next) { + ifp = vap->iv_ifp; + CURVNET_SET(ifp->if_vnet); + rt_ieee80211msg(ifp, RTM_IEEE80211_CSA, &iev, sizeof(iev)); + CURVNET_RESTORE(); + } } void ieee80211_notify_radar(struct ieee80211com *ic, const struct ieee80211_channel *c) { - struct ifnet *ifp = ic->ic_ifp; struct ieee80211_radar_event iev; + struct ieee80211vap *vap; + struct ifnet *ifp; memset(&iev, 0, sizeof(iev)); iev.iev_flags = c->ic_flags; iev.iev_freq = c->ic_freq; iev.iev_ieee = c->ic_ieee; - CURVNET_SET(ifp->if_vnet); - rt_ieee80211msg(ifp, RTM_IEEE80211_RADAR, &iev, sizeof(iev)); - CURVNET_RESTORE(); + TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next) { + ifp = vap->iv_ifp; + CURVNET_SET(ifp->if_vnet); + rt_ieee80211msg(ifp, RTM_IEEE80211_RADAR, &iev, sizeof(iev)); + CURVNET_RESTORE(); + } } void ieee80211_notify_cac(struct ieee80211com *ic, const struct ieee80211_channel *c, enum ieee80211_notify_cac_event type) { - struct ifnet *ifp = ic->ic_ifp; struct ieee80211_cac_event iev; + struct ieee80211vap *vap; + struct ifnet *ifp; memset(&iev, 0, sizeof(iev)); iev.iev_flags = c->ic_flags; iev.iev_freq = c->ic_freq; iev.iev_ieee = c->ic_ieee; iev.iev_type = type; - CURVNET_SET(ifp->if_vnet); - rt_ieee80211msg(ifp, RTM_IEEE80211_CAC, &iev, sizeof(iev)); - CURVNET_RESTORE(); + TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next) { + ifp = vap->iv_ifp; + CURVNET_SET(ifp->if_vnet); + rt_ieee80211msg(ifp, RTM_IEEE80211_CAC, &iev, sizeof(iev)); + CURVNET_RESTORE(); + } } void @@ -782,14 +776,18 @@ ieee80211_notify_country(struct ieee80211vap *vap, void ieee80211_notify_radio(struct ieee80211com *ic, int state) { - struct ifnet *ifp = ic->ic_ifp; struct ieee80211_radio_event iev; + struct ieee80211vap *vap; + struct ifnet *ifp; memset(&iev, 0, sizeof(iev)); iev.iev_state = state; - CURVNET_SET(ifp->if_vnet); - rt_ieee80211msg(ifp, RTM_IEEE80211_RADIO, &iev, sizeof(iev)); - CURVNET_RESTORE(); + TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next) { + ifp = vap->iv_ifp; + CURVNET_SET(ifp->if_vnet); + rt_ieee80211msg(ifp, RTM_IEEE80211_RADIO, &iev, sizeof(iev)); + CURVNET_RESTORE(); + } } void @@ -873,29 +871,15 @@ wlan_modevent(module_t mod, int type, void *unused) printf("wlan: <802.11 Link Layer>\n"); wlan_bpfevent = EVENTHANDLER_REGISTER(bpf_track, bpf_track, 0, EVENTHANDLER_PRI_ANY); - if (wlan_bpfevent == NULL) - return ENOMEM; wlan_ifllevent = EVENTHANDLER_REGISTER(iflladdr_event, wlan_iflladdr, NULL, EVENTHANDLER_PRI_ANY); - if (wlan_ifllevent == NULL) { - EVENTHANDLER_DEREGISTER(bpf_track, wlan_bpfevent); - return ENOMEM; - } -#if __FreeBSD_version >= 1000020 wlan_cloner = if_clone_simple(wlanname, wlan_clone_create, wlan_clone_destroy, 0); -#else - if_clone_attach(&wlan_cloner); -#endif if_register_com_alloc(IFT_IEEE80211, wlan_alloc, wlan_free); return 0; case MOD_UNLOAD: if_deregister_com_alloc(IFT_IEEE80211); -#if __FreeBSD_version >= 1000020 if_clone_detach(wlan_cloner); -#else - if_clone_detach(&wlan_cloner); -#endif EVENTHANDLER_DEREGISTER(bpf_track, wlan_bpfevent); EVENTHANDLER_DEREGISTER(iflladdr_event, wlan_ifllevent); return 0; @@ -904,11 +888,7 @@ wlan_modevent(module_t mod, int type, void *unused) } static moduledata_t wlan_mod = { -#if __FreeBSD_version >= 1000020 wlanname, -#else - "wlan", -#endif wlan_modevent, 0 }; diff --git a/sys/net80211/ieee80211_freebsd.h b/sys/net80211/ieee80211_freebsd.h index aa21f3b9e218..0241720f7916 100644 --- a/sys/net80211/ieee80211_freebsd.h +++ b/sys/net80211/ieee80211_freebsd.h @@ -28,7 +28,9 @@ #define _NET80211_IEEE80211_FREEBSD_H_ #ifdef _KERNEL -#include +#include +#include +#include #include #include #include @@ -183,6 +185,34 @@ typedef struct mtx ieee80211_scan_table_lock_t; #define IEEE80211_SCAN_TABLE_LOCK(_st) mtx_lock(&(_st)->st_lock) #define IEEE80211_SCAN_TABLE_UNLOCK(_st) mtx_unlock(&(_st)->st_lock) +typedef struct mtx ieee80211_scan_iter_lock_t; +#define IEEE80211_SCAN_ITER_LOCK_INIT(_st, _name) \ + mtx_init(&(_st)->st_scanlock, _name, "802.11 scangen", MTX_DEF) +#define IEEE80211_SCAN_ITER_LOCK_DESTROY(_st) mtx_destroy(&(_st)->st_scanlock) +#define IEEE80211_SCAN_ITER_LOCK(_st) mtx_lock(&(_st)->st_scanlock) +#define IEEE80211_SCAN_ITER_UNLOCK(_st) mtx_unlock(&(_st)->st_scanlock) + +/* + * Mesh node/routing definitions. + */ +typedef struct mtx ieee80211_rte_lock_t; +#define MESH_RT_ENTRY_LOCK_INIT(_rt, _name) \ + mtx_init(&(rt)->rt_lock, _name, "802.11s route entry", MTX_DEF) +#define MESH_RT_ENTRY_LOCK_DESTROY(_rt) \ + mtx_destroy(&(_rt)->rt_lock) +#define MESH_RT_ENTRY_LOCK(rt) mtx_lock(&(rt)->rt_lock) +#define MESH_RT_ENTRY_LOCK_ASSERT(rt) mtx_assert(&(rt)->rt_lock, MA_OWNED) +#define MESH_RT_ENTRY_UNLOCK(rt) mtx_unlock(&(rt)->rt_lock) + +typedef struct mtx ieee80211_rt_lock_t; +#define MESH_RT_LOCK(ms) mtx_lock(&(ms)->ms_rt_lock) +#define MESH_RT_LOCK_ASSERT(ms) mtx_assert(&(ms)->ms_rt_lock, MA_OWNED) +#define MESH_RT_UNLOCK(ms) mtx_unlock(&(ms)->ms_rt_lock) +#define MESH_RT_LOCK_INIT(ms, name) \ + mtx_init(&(ms)->ms_rt_lock, name, "802.11s routing table", MTX_DEF) +#define MESH_RT_LOCK_DESTROY(ms) \ + mtx_destroy(&(ms)->ms_rt_lock) + /* * Node reference counting definitions. * @@ -234,21 +264,9 @@ struct mbuf *ieee80211_getmgtframe(uint8_t **frm, int headroom, int pktlen); #define M_FF M_PROTO6 /* fast frame */ #define M_TXCB M_PROTO7 /* do tx complete callback */ #define M_AMPDU_MPDU M_PROTO8 /* ok for A-MPDU aggregation */ - -/* - * FreeBSD-HEAD from 1000046 retired M_*FRAG* flags and turned them - * into header flags instead. So, we use the new protocol-specific - * flags. - * - * Earlier FreeBSD versions overload M_FRAG, M_FIRSTFRAG and M_LASTFRAG. - * - * XXX TODO: rename these fields so there are no namespace clashes! - */ -#if __FreeBSD_version >= 1000046 #define M_FRAG M_PROTO9 /* frame fragmentation */ #define M_FIRSTFRAG M_PROTO10 /* first frame fragment */ #define M_LASTFRAG M_PROTO11 /* last frame fragment */ -#endif #define M_80211_TX \ (M_ENCAP|M_EAPOL|M_PWR_SAV|M_MORE_DATA|M_FF|M_TXCB| \ @@ -262,18 +280,10 @@ struct mbuf *ieee80211_getmgtframe(uint8_t **frm, int headroom, int pktlen); #endif #define M_80211_RX (M_AMPDU|M_WEP|M_AMPDU_MPDU) -#if __FreeBSD_version >= 1000046 #define IEEE80211_MBUF_TX_FLAG_BITS \ M_FLAG_BITS \ "\15M_ENCAP\17M_EAPOL\20M_PWR_SAV\21M_MORE_DATA\22M_FF\23M_TXCB" \ "\24M_AMPDU_MPDU\25M_FRAG\26M_FIRSTFRAG\27M_LASTFRAG" -#else -/* There aren't any flag bits available for versions before this */ -/* XXX TODO: implement M_FLAG_BITS for this! */ -#define IEEE80211_MBUF_TX_FLAG_BITS \ - "\15M_ENCAP\17M_EAPOL\20M_PWR_SAV\21M_MORE_DATA\22M_FF\23M_TXCB" \ - "\24M_AMPDU_MPDU" -#endif #define IEEE80211_MBUF_RX_FLAG_BITS \ M_FLAG_BITS \ @@ -596,4 +606,19 @@ struct ieee80211_bpf_params { uint8_t ibp_try3; /* series 4 try count */ uint8_t ibp_rate3; /* series 4 IEEE tx rate */ }; + +/* + * Malloc API. Other BSD operating systems have slightly + * different malloc/free namings (eg DragonflyBSD.) + */ +#define IEEE80211_MALLOC malloc +#define IEEE80211_FREE free + +/* XXX TODO: get rid of WAITOK, fix all the users of it? */ +#define IEEE80211_M_NOWAIT M_NOWAIT +#define IEEE80211_M_WAITOK M_WAITOK +#define IEEE80211_M_ZERO M_ZERO + +/* XXX TODO: the type fields */ + #endif /* _NET80211_IEEE80211_FREEBSD_H_ */ diff --git a/sys/net80211/ieee80211_hostap.c b/sys/net80211/ieee80211_hostap.c index 32eec45975c2..ccb31abc6666 100644 --- a/sys/net80211/ieee80211_hostap.c +++ b/sys/net80211/ieee80211_hostap.c @@ -68,11 +68,12 @@ __FBSDID("$FreeBSD$"); static void hostap_vattach(struct ieee80211vap *); static int hostap_newstate(struct ieee80211vap *, enum ieee80211_state, int); static int hostap_input(struct ieee80211_node *ni, struct mbuf *m, + const struct ieee80211_rx_stats *, int rssi, int nf); static void hostap_deliver_data(struct ieee80211vap *, struct ieee80211_node *, struct mbuf *); static void hostap_recv_mgmt(struct ieee80211_node *, struct mbuf *, - int subtype, int rssi, int nf); + int subtype, const struct ieee80211_rx_stats *rxs, int rssi, int nf); static void hostap_recv_ctl(struct ieee80211_node *, struct mbuf *, int); void @@ -356,12 +357,8 @@ hostap_deliver_data(struct ieee80211vap *vap, struct ifnet *ifp = vap->iv_ifp; /* clear driver/net80211 flags before passing up */ -#if __FreeBSD_version >= 1000046 m->m_flags &= ~(M_MCAST | M_BCAST); m_clrprotoflags(m); -#else - m->m_flags &= ~(M_80211_RX | M_MCAST | M_BCAST); -#endif KASSERT(vap->iv_opmode == IEEE80211_M_HOSTAP, ("gack, opmode %d", vap->iv_opmode)); @@ -476,9 +473,9 @@ doprint(struct ieee80211vap *vap, int subtype) * by the 802.11 layer. */ static int -hostap_input(struct ieee80211_node *ni, struct mbuf *m, int rssi, int nf) +hostap_input(struct ieee80211_node *ni, struct mbuf *m, + const struct ieee80211_rx_stats *rxs, int rssi, int nf) { -#define HAS_SEQ(type) ((type & 0x4) == 0) struct ieee80211vap *vap = ni->ni_vap; struct ieee80211com *ic = ni->ni_ic; struct ifnet *ifp = vap->iv_ifp; @@ -571,7 +568,7 @@ hostap_input(struct ieee80211_node *ni, struct mbuf *m, int rssi, int nf) IEEE80211_RSSI_LPF(ni->ni_avgrssi, rssi); ni->ni_noise = nf; - if (HAS_SEQ(type)) { + if (IEEE80211_HAS_SEQ(type, subtype)) { uint8_t tid = ieee80211_gettid(wh); if (IEEE80211_QOS_HAS_SEQ(wh) && TID_TO_WME_AC(tid) >= WME_AC_VI) @@ -894,7 +891,7 @@ hostap_input(struct ieee80211_node *ni, struct mbuf *m, int rssi, int nf) if (ieee80211_radiotap_active_vap(vap)) ieee80211_radiotap_rx(vap, m); need_tap = 0; - vap->iv_recv_mgmt(ni, m, subtype, rssi, nf); + vap->iv_recv_mgmt(ni, m, subtype, rxs, rssi, nf); goto out; case IEEE80211_FC0_TYPE_CTL: @@ -938,7 +935,7 @@ hostap_auth_open(struct ieee80211_node *ni, struct ieee80211_frame *wh, * open auth is attempted. */ if (ni->ni_challenge != NULL) { - free(ni->ni_challenge, M_80211_NODE); + IEEE80211_FREE(ni->ni_challenge, M_80211_NODE); ni->ni_challenge = NULL; } /* XXX hack to workaround calling convention */ @@ -1682,7 +1679,7 @@ is11bclient(const uint8_t *rates, const uint8_t *xrates) static void hostap_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m0, - int subtype, int rssi, int nf) + int subtype, const struct ieee80211_rx_stats *rxs, int rssi, int nf) { struct ieee80211vap *vap = ni->ni_vap; struct ieee80211com *ic = ni->ni_ic; @@ -1710,7 +1707,8 @@ hostap_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m0, return; } /* NB: accept off-channel frames */ - if (ieee80211_parse_beacon(ni, m0, &scan) &~ IEEE80211_BPARSE_OFFCHAN) + /* XXX TODO: use rxstatus to determine off-channel details */ + if (ieee80211_parse_beacon(ni, m0, ic->ic_curchan, &scan) &~ IEEE80211_BPARSE_OFFCHAN) return; /* * Count frame now that we know it's to be processed. @@ -1737,7 +1735,8 @@ hostap_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m0, ieee80211_probe_curchan(vap, 1); ic->ic_flags_ext &= ~IEEE80211_FEXT_PROBECHAN; } - ieee80211_add_scan(vap, &scan, wh, subtype, rssi, nf); + ieee80211_add_scan(vap, ic->ic_curchan, &scan, wh, + subtype, rssi, nf); return; } /* @@ -2039,7 +2038,7 @@ hostap_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m0, return; /* discard challenge after association */ if (ni->ni_challenge != NULL) { - free(ni->ni_challenge, M_80211_NODE); + IEEE80211_FREE(ni->ni_challenge, M_80211_NODE); ni->ni_challenge = NULL; } /* NB: 802.11 spec says to ignore station's privacy bit */ diff --git a/sys/net80211/ieee80211_ht.c b/sys/net80211/ieee80211_ht.c index 5fe2e80f9725..d83cf6511f2f 100644 --- a/sys/net80211/ieee80211_ht.c +++ b/sys/net80211/ieee80211_ht.c @@ -354,7 +354,6 @@ static struct printranges { static void ht_rateprint(struct ieee80211com *ic, enum ieee80211_phymode mode, int ratetype) { - struct ifnet *ifp = ic->ic_ifp; int minrate, maxrate; struct printranges *range; @@ -369,12 +368,12 @@ ht_rateprint(struct ieee80211com *ic, enum ieee80211_phymode mode, int ratetype) minrate = ht_getrate(ic, range->minmcs, mode, ratetype); maxrate = ht_getrate(ic, range->maxmcs, mode, ratetype); if (range->maxmcs) { - if_printf(ifp, "MCS %d-%d: %d%sMbps - %d%sMbps\n", + ic_printf(ic, "MCS %d-%d: %d%sMbps - %d%sMbps\n", range->minmcs, range->maxmcs, minrate/2, ((minrate & 0x1) != 0 ? ".5" : ""), maxrate/2, ((maxrate & 0x1) != 0 ? ".5" : "")); } else { - if_printf(ifp, "MCS %d: %d%sMbps\n", range->minmcs, + ic_printf(ic, "MCS %d: %d%sMbps\n", range->minmcs, minrate/2, ((minrate & 0x1) != 0 ? ".5" : "")); } } @@ -383,22 +382,21 @@ ht_rateprint(struct ieee80211com *ic, enum ieee80211_phymode mode, int ratetype) static void ht_announce(struct ieee80211com *ic, enum ieee80211_phymode mode) { - struct ifnet *ifp = ic->ic_ifp; const char *modestr = ieee80211_phymode_name[mode]; - if_printf(ifp, "%s MCS 20MHz\n", modestr); + ic_printf(ic, "%s MCS 20MHz\n", modestr); ht_rateprint(ic, mode, 0); if (ic->ic_htcaps & IEEE80211_HTCAP_SHORTGI20) { - if_printf(ifp, "%s MCS 20MHz SGI\n", modestr); + ic_printf(ic, "%s MCS 20MHz SGI\n", modestr); ht_rateprint(ic, mode, 1); } if (ic->ic_htcaps & IEEE80211_HTCAP_CHWIDTH40) { - if_printf(ifp, "%s MCS 40MHz:\n", modestr); + ic_printf(ic, "%s MCS 40MHz:\n", modestr); ht_rateprint(ic, mode, 2); } if ((ic->ic_htcaps & IEEE80211_HTCAP_CHWIDTH40) && (ic->ic_htcaps & IEEE80211_HTCAP_SHORTGI40)) { - if_printf(ifp, "%s MCS 40MHz SGI:\n", modestr); + ic_printf(ic, "%s MCS 40MHz SGI:\n", modestr); ht_rateprint(ic, mode, 3); } } @@ -406,11 +404,10 @@ ht_announce(struct ieee80211com *ic, enum ieee80211_phymode mode) void ieee80211_ht_announce(struct ieee80211com *ic) { - struct ifnet *ifp = ic->ic_ifp; if (isset(ic->ic_modecaps, IEEE80211_MODE_11NA) || isset(ic->ic_modecaps, IEEE80211_MODE_11NG)) - if_printf(ifp, "%dT%dR\n", ic->ic_txstream, ic->ic_rxstream); + ic_printf(ic, "%dT%dR\n", ic->ic_txstream, ic->ic_rxstream); if (isset(ic->ic_modecaps, IEEE80211_MODE_11NA)) ht_announce(ic, IEEE80211_MODE_11NA); if (isset(ic->ic_modecaps, IEEE80211_MODE_11NG)) @@ -1691,7 +1688,7 @@ ieee80211_setup_basic_htrates(struct ieee80211_node *ni, const uint8_t *ie) static void ampdu_tx_setup(struct ieee80211_tx_ampdu *tap) { - callout_init(&tap->txa_timer, CALLOUT_MPSAFE); + callout_init(&tap->txa_timer, 1); tap->txa_flags |= IEEE80211_AGGR_SETUP; tap->txa_lastsample = ticks; } @@ -2662,10 +2659,24 @@ ieee80211_add_htcap_body(uint8_t *frm, struct ieee80211_node *ni) caps |= IEEE80211_HTCAP_CHWIDTH40; else caps &= ~IEEE80211_HTCAP_CHWIDTH40; - /* use advertised setting (XXX locally constraint) */ + + /* Start by using the advertised settings */ rxmax = MS(ni->ni_htparam, IEEE80211_HTCAP_MAXRXAMPDU); density = MS(ni->ni_htparam, IEEE80211_HTCAP_MPDUDENSITY); + /* Cap at VAP rxmax */ + if (rxmax > vap->iv_ampdu_rxmax) + rxmax = vap->iv_ampdu_rxmax; + + /* + * If the VAP ampdu density value greater, use that. + * + * (Larger density value == larger minimum gap between A-MPDU + * subframes.) + */ + if (vap->iv_ampdu_density > density) + density = vap->iv_ampdu_density; + /* * NB: Hardware might support HT40 on some but not all * channels. We can't determine this earlier because only @@ -2682,9 +2693,12 @@ ieee80211_add_htcap_body(uint8_t *frm, struct ieee80211_node *ni) caps |= IEEE80211_HTCAP_CHWIDTH40; else caps &= ~IEEE80211_HTCAP_CHWIDTH40; + + /* XXX TODO should it start by using advertised settings? */ rxmax = vap->iv_ampdu_rxmax; density = vap->iv_ampdu_density; } + /* adjust short GI based on channel and config */ if ((vap->iv_flags_ht & IEEE80211_FHT_SHORTGI20) == 0) caps &= ~IEEE80211_HTCAP_SHORTGI20; diff --git a/sys/net80211/ieee80211_hwmp.c b/sys/net80211/ieee80211_hwmp.c index 8d5730205f6b..6bbc32c634dc 100644 --- a/sys/net80211/ieee80211_hwmp.c +++ b/sys/net80211/ieee80211_hwmp.c @@ -268,14 +268,14 @@ hwmp_vattach(struct ieee80211vap *vap) KASSERT(vap->iv_opmode == IEEE80211_M_MBSS, ("not a mesh vap, opmode %d", vap->iv_opmode)); - hs = malloc(sizeof(struct ieee80211_hwmp_state), M_80211_VAP, - M_NOWAIT | M_ZERO); + hs = IEEE80211_MALLOC(sizeof(struct ieee80211_hwmp_state), M_80211_VAP, + IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (hs == NULL) { printf("%s: couldn't alloc HWMP state\n", __func__); return; } hs->hs_maxhops = IEEE80211_HWMP_DEFAULT_MAXHOPS; - callout_init(&hs->hs_roottimer, CALLOUT_MPSAFE); + callout_init(&hs->hs_roottimer, 1); vap->iv_hwmp = hs; } @@ -285,7 +285,7 @@ hwmp_vdetach(struct ieee80211vap *vap) struct ieee80211_hwmp_state *hs = vap->iv_hwmp; callout_drain(&hs->hs_roottimer); - free(vap->iv_hwmp, M_80211_VAP); + IEEE80211_FREE(vap->iv_hwmp, M_80211_VAP); vap->iv_hwmp = NULL; } @@ -429,9 +429,10 @@ hwmp_recv_action_meshpath(struct ieee80211_node *ni, vap->iv_stats.is_rx_mgtdiscard++; break; } - preq = malloc(sizeof(*preq) + + preq = IEEE80211_MALLOC(sizeof(*preq) + (ndest - 1) * sizeof(*preq->preq_targets), - M_80211_MESH_PREQ, M_NOWAIT | M_ZERO); + M_80211_MESH_PREQ, + IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); KASSERT(preq != NULL, ("preq == NULL")); preq->preq_ie = *iefrm_t++; @@ -464,7 +465,7 @@ hwmp_recv_action_meshpath(struct ieee80211_node *ni, } hwmp_recv_preq(vap, ni, wh, preq); - free(preq, M_80211_MESH_PREQ); + IEEE80211_FREE(preq, M_80211_MESH_PREQ); found++; break; } @@ -476,8 +477,9 @@ hwmp_recv_action_meshpath(struct ieee80211_node *ni, vap->iv_stats.is_rx_mgtdiscard++; break; } - prep = malloc(sizeof(*prep), - M_80211_MESH_PREP, M_NOWAIT | M_ZERO); + prep = IEEE80211_MALLOC(sizeof(*prep), + M_80211_MESH_PREP, + IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); KASSERT(prep != NULL, ("prep == NULL")); prep->prep_ie = *iefrm_t++; @@ -501,7 +503,7 @@ hwmp_recv_action_meshpath(struct ieee80211_node *ni, prep->prep_origseq = LE_READ_4(iefrm_t); iefrm_t += 4; hwmp_recv_prep(vap, ni, wh, prep); - free(prep, M_80211_MESH_PREP); + IEEE80211_FREE(prep, M_80211_MESH_PREP); found++; break; } @@ -515,9 +517,10 @@ hwmp_recv_action_meshpath(struct ieee80211_node *ni, vap->iv_stats.is_rx_mgtdiscard++; break; } - perr = malloc(sizeof(*perr) + + perr = IEEE80211_MALLOC(sizeof(*perr) + (ndest - 1) * sizeof(*perr->perr_dests), - M_80211_MESH_PERR, M_NOWAIT | M_ZERO); + M_80211_MESH_PERR, + IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); KASSERT(perr != NULL, ("perr == NULL")); perr->perr_ie = *iefrm_t++; @@ -546,7 +549,7 @@ hwmp_recv_action_meshpath(struct ieee80211_node *ni, } hwmp_recv_perr(vap, ni, wh, perr); - free(perr, M_80211_MESH_PERR); + IEEE80211_FREE(perr, M_80211_MESH_PERR); found++; break; } @@ -1556,8 +1559,8 @@ hwmp_recv_perr(struct ieee80211vap *vap, struct ieee80211_node *ni, */ if (ms->ms_flags & IEEE80211_MESHFLAGS_FWD) { forward = 1; - pperr = malloc(sizeof(*perr) + 31*sizeof(*perr->perr_dests), - M_80211_MESH_PERR, M_NOWAIT); /* XXX: magic number, 32 err dests */ + pperr = IEEE80211_MALLOC(sizeof(*perr) + 31*sizeof(*perr->perr_dests), + M_80211_MESH_PERR, IEEE80211_M_NOWAIT); /* XXX: magic number, 32 err dests */ } /* @@ -1632,7 +1635,7 @@ hwmp_recv_perr(struct ieee80211vap *vap, struct ieee80211_node *ni, } done: if (pperr != NULL) - free(pperr, M_80211_MESH_PERR); + IEEE80211_FREE(pperr, M_80211_MESH_PERR); } #undef PERR_DFLAGS #undef PERR_DADDR diff --git a/sys/net80211/ieee80211_input.c b/sys/net80211/ieee80211_input.c index a0f737dc2036..b757ae635f9f 100644 --- a/sys/net80211/ieee80211_input.c +++ b/sys/net80211/ieee80211_input.c @@ -88,7 +88,8 @@ ieee80211_input_mimo(struct ieee80211_node *ni, struct mbuf *m, { /* XXX should assert IEEE80211_R_NF and IEEE80211_R_RSSI are set */ ieee80211_process_mimo(ni, rx); - return ieee80211_input(ni, m, rx->rssi, rx->nf); + //return ieee80211_input(ni, m, rx->rssi, rx->nf); + return ni->ni_vap->iv_input(ni, m, rx, rx->rssi, rx->nf); } int @@ -252,9 +253,7 @@ ieee80211_deliver_data(struct ieee80211vap *vap, /* clear driver/net80211 flags before passing up */ m->m_flags &= ~(M_MCAST | M_BCAST); -#if __FreeBSD_version >= 1000046 m_clrprotoflags(m); -#endif /* NB: see hostap_deliver_data, this path doesn't handle hostap */ KASSERT(vap->iv_opmode != IEEE80211_M_HOSTAP, ("gack, hostap")); @@ -448,8 +447,9 @@ int ieee80211_alloc_challenge(struct ieee80211_node *ni) { if (ni->ni_challenge == NULL) - ni->ni_challenge = (uint32_t *) malloc(IEEE80211_CHALLENGE_LEN, - M_80211_NODE, M_NOWAIT); + ni->ni_challenge = (uint32_t *) + IEEE80211_MALLOC(IEEE80211_CHALLENGE_LEN, + M_80211_NODE, IEEE80211_M_NOWAIT); if (ni->ni_challenge == NULL) { IEEE80211_NOTE(ni->ni_vap, IEEE80211_MSG_DEBUG | IEEE80211_MSG_AUTH, ni, @@ -468,7 +468,7 @@ ieee80211_alloc_challenge(struct ieee80211_node *ni) */ int ieee80211_parse_beacon(struct ieee80211_node *ni, struct mbuf *m, - struct ieee80211_scanparams *scan) + struct ieee80211_channel *rxchan, struct ieee80211_scanparams *scan) { struct ieee80211vap *vap = ni->ni_vap; struct ieee80211com *ic = ni->ni_ic; @@ -505,7 +505,7 @@ ieee80211_parse_beacon(struct ieee80211_node *ni, struct mbuf *m, scan->tstamp = frm; frm += 8; scan->bintval = le16toh(*(uint16_t *)frm); frm += 2; scan->capinfo = le16toh(*(uint16_t *)frm); frm += 2; - scan->bchan = ieee80211_chan2ieee(ic, ic->ic_curchan); + scan->bchan = ieee80211_chan2ieee(ic, rxchan); scan->chan = scan->bchan; scan->ies = frm; scan->ies_len = efrm - frm; @@ -648,7 +648,8 @@ ieee80211_parse_beacon(struct ieee80211_node *ni, struct mbuf *m, */ IEEE80211_DISCARD(vap, IEEE80211_MSG_ELEMID | IEEE80211_MSG_INPUT, - wh, NULL, "for off-channel %u", scan->chan); + wh, NULL, "for off-channel %u (bchan=%u)", + scan->chan, scan->bchan); vap->iv_stats.is_rx_chanmismatch++; scan->status |= IEEE80211_BPARSE_OFFCHAN; } diff --git a/sys/net80211/ieee80211_input.h b/sys/net80211/ieee80211_input.h index b90f46a14a12..72fd25b4ffc9 100644 --- a/sys/net80211/ieee80211_input.h +++ b/sys/net80211/ieee80211_input.h @@ -168,19 +168,22 @@ ieee80211_check_rxseq(struct ieee80211_node *ni, struct ieee80211_frame *wh) { #define SEQ_LEQ(a,b) ((int)((a)-(b)) <= 0) #define SEQ_EQ(a,b) ((int)((a)-(b)) == 0) -#define HAS_SEQ(type) ((type & 0x4) == 0) #define SEQNO(a) ((a) >> IEEE80211_SEQ_SEQ_SHIFT) #define FRAGNO(a) ((a) & IEEE80211_SEQ_FRAG_MASK) uint16_t rxseq; - uint8_t type; + uint8_t type, subtype; uint8_t tid; struct ieee80211_rx_ampdu *rap; rxseq = le16toh(*(uint16_t *)wh->i_seq); type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; + subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; - /* Types with no sequence number are always treated valid */ - if (! HAS_SEQ(type)) + /* + * Types with no sequence number (or QoS (+)Null frames) + * are always treated valid. + */ + if (! IEEE80211_HAS_SEQ(type, subtype)) return 1; tid = ieee80211_gettid(wh); @@ -235,7 +238,6 @@ ieee80211_check_rxseq(struct ieee80211_node *ni, struct ieee80211_frame *wh) return 1; #undef SEQ_LEQ #undef SEQ_EQ -#undef HAS_SEQ #undef SEQNO #undef FRAGNO } @@ -253,6 +255,7 @@ void ieee80211_send_error(struct ieee80211_node *, const uint8_t mac[IEEE80211_ADDR_LEN], int subtype, int arg); int ieee80211_alloc_challenge(struct ieee80211_node *); int ieee80211_parse_beacon(struct ieee80211_node *, struct mbuf *, + struct ieee80211_channel *, struct ieee80211_scanparams *); int ieee80211_parse_action(struct ieee80211_node *, struct mbuf *); #endif /* _NET80211_IEEE80211_INPUT_H_ */ diff --git a/sys/net80211/ieee80211_ioctl.c b/sys/net80211/ieee80211_ioctl.c index 2798d8089b89..54ab39072ecc 100644 --- a/sys/net80211/ieee80211_ioctl.c +++ b/sys/net80211/ieee80211_ioctl.c @@ -323,14 +323,15 @@ ieee80211_ioctl_getscanresults(struct ieee80211vap *vap, space = req.space; /* XXX M_WAITOK after driver lock released */ - p = malloc(space, M_TEMP, M_NOWAIT | M_ZERO); + p = IEEE80211_MALLOC(space, M_TEMP, + IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (p == NULL) return ENOMEM; req.sr = p; ieee80211_scan_iterate(vap, get_scan_result, &req); ireq->i_len = space - req.space; error = copyout(p, ireq->i_data, ireq->i_len); - free(p, M_TEMP); + IEEE80211_FREE(p, M_TEMP); } else ireq->i_len = 0; @@ -473,7 +474,8 @@ getstainfo_common(struct ieee80211vap *vap, struct ieee80211req *ireq, if (req.space > 0) { space = req.space; /* XXX M_WAITOK after driver lock released */ - p = malloc(space, M_TEMP, M_NOWAIT | M_ZERO); + p = IEEE80211_MALLOC(space, M_TEMP, + IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (p == NULL) { error = ENOMEM; goto bad; @@ -485,7 +487,7 @@ getstainfo_common(struct ieee80211vap *vap, struct ieee80211req *ireq, get_sta_info(&req, ni); ireq->i_len = space - req.space; error = copyout(p, (uint8_t *) ireq->i_data+off, ireq->i_len); - free(p, M_TEMP); + IEEE80211_FREE(p, M_TEMP); } else ireq->i_len = 0; bad: @@ -697,7 +699,8 @@ ieee80211_ioctl_getdevcaps(struct ieee80211com *ic, if (maxchans > 2048) maxchans = 2048; dc = (struct ieee80211_devcaps_req *) - malloc(IEEE80211_DEVCAPS_SIZE(maxchans), M_TEMP, M_NOWAIT | M_ZERO); + IEEE80211_MALLOC(IEEE80211_DEVCAPS_SIZE(maxchans), M_TEMP, + IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (dc == NULL) return ENOMEM; dc->dc_drivercaps = ic->ic_caps; @@ -709,7 +712,7 @@ ieee80211_ioctl_getdevcaps(struct ieee80211com *ic, ("nchans %d maxchans %d", ci->ic_nchans, maxchans)); ieee80211_sort_channels(ci->ic_chans, ci->ic_nchans); error = copyout(dc, ireq->i_data, IEEE80211_DEVCAPS_SPACE(dc)); - free(dc, M_TEMP); + IEEE80211_FREE(dc, M_TEMP); return error; } @@ -1666,13 +1669,13 @@ ieee80211_ioctl_setchanlist(struct ieee80211vap *vap, struct ieee80211req *ireq) if (ireq->i_len > sizeof(ic->ic_chan_active)) ireq->i_len = sizeof(ic->ic_chan_active); - list = malloc(ireq->i_len + IEEE80211_CHAN_BYTES, M_TEMP, - M_NOWAIT | M_ZERO); + list = IEEE80211_MALLOC(ireq->i_len + IEEE80211_CHAN_BYTES, M_TEMP, + IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (list == NULL) return ENOMEM; error = copyin(ireq->i_data, list, ireq->i_len); if (error) { - free(list, M_TEMP); + IEEE80211_FREE(list, M_TEMP); return error; } nchan = 0; @@ -1691,7 +1694,7 @@ ieee80211_ioctl_setchanlist(struct ieee80211vap *vap, struct ieee80211req *ireq) } } if (nchan == 0) { - free(list, M_TEMP); + IEEE80211_FREE(list, M_TEMP); return EINVAL; } if (ic->ic_bsschan != IEEE80211_CHAN_ANYC && /* XXX */ @@ -1699,7 +1702,7 @@ ieee80211_ioctl_setchanlist(struct ieee80211vap *vap, struct ieee80211req *ireq) ic->ic_bsschan = IEEE80211_CHAN_ANYC; memcpy(ic->ic_chan_active, chanlist, IEEE80211_CHAN_BYTES); ieee80211_scan_flush(vap); - free(list, M_TEMP); + IEEE80211_FREE(list, M_TEMP); return ENETRESET; } @@ -2112,7 +2115,8 @@ ieee80211_ioctl_setregdomain(struct ieee80211vap *vap, return EINVAL; } reg = (struct ieee80211_regdomain_req *) - malloc(IEEE80211_REGDOMAIN_SIZE(nchans), M_TEMP, M_NOWAIT); + IEEE80211_MALLOC(IEEE80211_REGDOMAIN_SIZE(nchans), M_TEMP, + IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (reg == NULL) { IEEE80211_DPRINTF(vap, IEEE80211_MSG_IOCTL, "%s: no memory, nchans %d\n", __func__, nchans); @@ -2129,7 +2133,7 @@ ieee80211_ioctl_setregdomain(struct ieee80211vap *vap, } else error = ieee80211_setregdomain(vap, reg); } - free(reg, M_TEMP); + IEEE80211_FREE(reg, M_TEMP); return (error == 0 ? ENETRESET : error); } @@ -2246,7 +2250,7 @@ setappie(struct ieee80211_appie **aie, const struct ieee80211req *ireq) if (ireq->i_len == 0) { /* delete any existing ie */ if (app != NULL) { *aie = NULL; /* XXX racey */ - free(app, M_80211_NODE_IE); + IEEE80211_FREE(app, M_80211_NODE_IE); } return 0; } @@ -2260,20 +2264,21 @@ setappie(struct ieee80211_appie **aie, const struct ieee80211req *ireq) * * XXX bad bad bad */ - napp = (struct ieee80211_appie *) malloc( - sizeof(struct ieee80211_appie) + ireq->i_len, M_80211_NODE_IE, M_NOWAIT); + napp = (struct ieee80211_appie *) IEEE80211_MALLOC( + sizeof(struct ieee80211_appie) + ireq->i_len, M_80211_NODE_IE, + IEEE80211_M_NOWAIT); if (napp == NULL) return ENOMEM; /* XXX holding ic lock */ error = copyin(ireq->i_data, napp->ie_data, ireq->i_len); if (error) { - free(napp, M_80211_NODE_IE); + IEEE80211_FREE(napp, M_80211_NODE_IE); return error; } napp->ie_len = ireq->i_len; *aie = napp; if (app != NULL) - free(app, M_80211_NODE_IE); + IEEE80211_FREE(app, M_80211_NODE_IE); return 0; } diff --git a/sys/net80211/ieee80211_mesh.c b/sys/net80211/ieee80211_mesh.c index de9d60b74859..ef811845fc91 100644 --- a/sys/net80211/ieee80211_mesh.c +++ b/sys/net80211/ieee80211_mesh.c @@ -85,9 +85,10 @@ static void mesh_transmit_to_gate(struct ieee80211vap *, struct mbuf *, struct ieee80211_mesh_route *); static void mesh_forward(struct ieee80211vap *, struct mbuf *, const struct ieee80211_meshcntl *); -static int mesh_input(struct ieee80211_node *, struct mbuf *, int, int); +static int mesh_input(struct ieee80211_node *, struct mbuf *, + const struct ieee80211_rx_stats *rxs, int, int); static void mesh_recv_mgmt(struct ieee80211_node *, struct mbuf *, int, - int, int); + const struct ieee80211_rx_stats *rxs, int, int); static void mesh_recv_ctl(struct ieee80211_node *, struct mbuf *, int); static void mesh_peer_timeout_setup(struct ieee80211_node *); static void mesh_peer_timeout_backoff(struct ieee80211_node *); @@ -161,14 +162,6 @@ static const struct ieee80211_mesh_proto_metric mesh_metric_airtime = { static struct ieee80211_mesh_proto_path mesh_proto_paths[4]; static struct ieee80211_mesh_proto_metric mesh_proto_metrics[4]; -#define RT_ENTRY_LOCK(rt) mtx_lock(&(rt)->rt_lock) -#define RT_ENTRY_LOCK_ASSERT(rt) mtx_assert(&(rt)->rt_lock, MA_OWNED) -#define RT_ENTRY_UNLOCK(rt) mtx_unlock(&(rt)->rt_lock) - -#define MESH_RT_LOCK(ms) mtx_lock(&(ms)->ms_rt_lock) -#define MESH_RT_LOCK_ASSERT(ms) mtx_assert(&(ms)->ms_rt_lock, MA_OWNED) -#define MESH_RT_UNLOCK(ms) mtx_unlock(&(ms)->ms_rt_lock) - MALLOC_DEFINE(M_80211_MESH_PREQ, "80211preq", "802.11 MESH Path Request frame"); MALLOC_DEFINE(M_80211_MESH_PREP, "80211prep", "802.11 MESH Path Reply frame"); MALLOC_DEFINE(M_80211_MESH_PERR, "80211perr", "802.11 MESH Path Error frame"); @@ -210,14 +203,15 @@ mesh_rt_add_locked(struct ieee80211vap *vap, MESH_RT_LOCK_ASSERT(ms); - rt = malloc(ALIGN(sizeof(struct ieee80211_mesh_route)) + - ms->ms_ppath->mpp_privlen, M_80211_MESH_RT, M_NOWAIT | M_ZERO); + rt = IEEE80211_MALLOC(ALIGN(sizeof(struct ieee80211_mesh_route)) + + ms->ms_ppath->mpp_privlen, M_80211_MESH_RT, + IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (rt != NULL) { rt->rt_vap = vap; IEEE80211_ADDR_COPY(rt->rt_dest, dest); rt->rt_priv = (void *)ALIGN(&rt[1]); - mtx_init(&rt->rt_lock, "MBSS_RT", "802.11s route entry", MTX_DEF); - callout_init(&rt->rt_discovery, CALLOUT_MPSAFE); + MESH_RT_ENTRY_LOCK_INIT(rt, "MBSS_RT"); + callout_init(&rt->rt_discovery, 1); rt->rt_updtime = ticks; /* create time */ TAILQ_INSERT_TAIL(&ms->ms_routes, rt, rt_next); } @@ -269,11 +263,11 @@ ieee80211_mesh_rt_update(struct ieee80211_mesh_route *rt, int new_lifetime) KASSERT(rt != NULL, ("route is NULL")); now = ticks; - RT_ENTRY_LOCK(rt); + MESH_RT_ENTRY_LOCK(rt); /* dont clobber a proxy entry gated by us */ if (rt->rt_flags & IEEE80211_MESHRT_FLAGS_PROXY && rt->rt_nhops == 0) { - RT_ENTRY_UNLOCK(rt); + MESH_RT_ENTRY_UNLOCK(rt); return rt->rt_lifetime; } @@ -294,7 +288,7 @@ ieee80211_mesh_rt_update(struct ieee80211_mesh_route *rt, int new_lifetime) new_lifetime, rt->rt_lifetime); } lifetime = rt->rt_lifetime; - RT_ENTRY_UNLOCK(rt); + MESH_RT_ENTRY_UNLOCK(rt); return lifetime; } @@ -356,10 +350,10 @@ mesh_rt_del(struct ieee80211_mesh_state *ms, struct ieee80211_mesh_route *rt) * Grab the lock before destroying it, to be sure no one else * is holding the route. */ - RT_ENTRY_LOCK(rt); + MESH_RT_ENTRY_LOCK(rt); callout_drain(&rt->rt_discovery); - mtx_destroy(&rt->rt_lock); - free(rt, M_80211_MESH_RT); + MESH_RT_ENTRY_LOCK_DESTROY(rt); + IEEE80211_FREE(rt, M_80211_MESH_RT); } void @@ -651,9 +645,9 @@ mesh_vdetach(struct ieee80211vap *vap) ieee80211_iterate_nodes(&vap->iv_ic->ic_sta, mesh_vdetach_peers, NULL); ieee80211_mesh_rt_flush(vap); - mtx_destroy(&ms->ms_rt_lock); + MESH_RT_LOCK_DESTROY(ms); ms->ms_ppath->mpp_vdetach(vap); - free(vap->iv_mesh, M_80211_VAP); + IEEE80211_FREE(vap->iv_mesh, M_80211_VAP); vap->iv_mesh = NULL; } @@ -666,8 +660,8 @@ mesh_vattach(struct ieee80211vap *vap) vap->iv_opdetach = mesh_vdetach; vap->iv_recv_mgmt = mesh_recv_mgmt; vap->iv_recv_ctl = mesh_recv_ctl; - ms = malloc(sizeof(struct ieee80211_mesh_state), M_80211_VAP, - M_NOWAIT | M_ZERO); + ms = IEEE80211_MALLOC(sizeof(struct ieee80211_mesh_state), M_80211_VAP, + IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (ms == NULL) { printf("%s: couldn't alloc MBSS state\n", __func__); return; @@ -678,9 +672,9 @@ mesh_vattach(struct ieee80211vap *vap) ms->ms_ttl = IEEE80211_MESH_DEFAULT_TTL; TAILQ_INIT(&ms->ms_known_gates); TAILQ_INIT(&ms->ms_routes); - mtx_init(&ms->ms_rt_lock, "MBSS", "802.11s routing table", MTX_DEF); - callout_init(&ms->ms_cleantimer, CALLOUT_MPSAFE); - callout_init(&ms->ms_gatetimer, CALLOUT_MPSAFE); + MESH_RT_LOCK_INIT(ms, "MBSS"); + callout_init(&ms->ms_cleantimer, 1); + callout_init(&ms->ms_gatetimer, 1); ms->ms_gateseq = 0; mesh_select_proto_metric(vap, "AIRTIME"); KASSERT(ms->ms_pmetric, ("ms_pmetric == NULL")); @@ -884,8 +878,9 @@ ieee80211_mesh_mark_gate(struct ieee80211vap *vap, const uint8_t *addr, /* New mesh gate add it to known table. */ IEEE80211_NOTE_MAC(vap, IEEE80211_MSG_MESH, addr, "%s", "stored new gate information from pro-PREQ."); - gr = malloc(ALIGN(sizeof(struct ieee80211_mesh_gate_route)), - M_80211_MESH_GT_RT, M_NOWAIT | M_ZERO); + gr = IEEE80211_MALLOC(ALIGN(sizeof(struct ieee80211_mesh_gate_route)), + M_80211_MESH_GT_RT, + IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); IEEE80211_ADDR_COPY(gr->gr_addr, addr); TAILQ_INSERT_TAIL(&ms->ms_known_gates, gr, gr_next); } @@ -1532,7 +1527,8 @@ mesh_recv_group_data(struct ieee80211vap *vap, struct mbuf *m, } static int -mesh_input(struct ieee80211_node *ni, struct mbuf *m, int rssi, int nf) +mesh_input(struct ieee80211_node *ni, struct mbuf *m, + const struct ieee80211_rx_stats *rxs, int rssi, int nf) { #define HAS_SEQ(type) ((type & 0x4) == 0) #define MC01(mc) ((const struct ieee80211_meshcntl_ae01 *)mc) @@ -1831,7 +1827,7 @@ mesh_input(struct ieee80211_node *ni, struct mbuf *m, int rssi, int nf) vap->iv_stats.is_rx_mgtdiscard++; /* XXX */ goto out; } - vap->iv_recv_mgmt(ni, m, subtype, rssi, nf); + vap->iv_recv_mgmt(ni, m, subtype, rxs, rssi, nf); goto out; case IEEE80211_FC0_TYPE_CTL: vap->iv_stats.is_rx_ctl++; @@ -1859,11 +1855,12 @@ mesh_input(struct ieee80211_node *ni, struct mbuf *m, int rssi, int nf) static void mesh_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m0, int subtype, - int rssi, int nf) + const struct ieee80211_rx_stats *rxs, int rssi, int nf) { struct ieee80211vap *vap = ni->ni_vap; struct ieee80211_mesh_state *ms = vap->iv_mesh; struct ieee80211com *ic = ni->ni_ic; + struct ieee80211_channel *rxchan = ic->ic_curchan; struct ieee80211_frame *wh; struct ieee80211_mesh_route *rt; uint8_t *frm, *efrm; @@ -1876,11 +1873,17 @@ mesh_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m0, int subtype, case IEEE80211_FC0_SUBTYPE_BEACON: { struct ieee80211_scanparams scan; + struct ieee80211_channel *c; /* * We process beacon/probe response * frames to discover neighbors. */ - if (ieee80211_parse_beacon(ni, m0, &scan) != 0) + if (rxs != NULL) { + c = ieee80211_lookup_channel_rxstatus(vap, rxs); + if (c != NULL) + rxchan = c; + } + if (ieee80211_parse_beacon(ni, m0, rxchan, &scan) != 0) return; /* * Count frame now that we know it's to be processed. @@ -1906,7 +1909,7 @@ mesh_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m0, int subtype, ieee80211_probe_curchan(vap, 1); ic->ic_flags_ext &= ~IEEE80211_FEXT_PROBECHAN; } - ieee80211_add_scan(vap, &scan, wh, + ieee80211_add_scan(vap, rxchan, &scan, wh, subtype, rssi, nf); return; } @@ -2634,8 +2637,9 @@ mesh_recv_action_meshgate(struct ieee80211_node *ni, /* this GANN is from a new mesh Gate add it to known table. */ IEEE80211_NOTE_MAC(vap, IEEE80211_MSG_MESH, ie.gann_addr, "stored new GANN information, seq %u.", ie.gann_seq); - gr = malloc(ALIGN(sizeof(struct ieee80211_mesh_gate_route)), - M_80211_MESH_GT_RT, M_NOWAIT | M_ZERO); + gr = IEEE80211_MALLOC(ALIGN(sizeof(struct ieee80211_mesh_gate_route)), + M_80211_MESH_GT_RT, + IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); IEEE80211_ADDR_COPY(gr->gr_addr, ie.gann_addr); TAILQ_INSERT_TAIL(&ms->ms_known_gates, gr, gr_next); } @@ -3384,8 +3388,8 @@ void ieee80211_mesh_node_init(struct ieee80211vap *vap, struct ieee80211_node *ni) { ni->ni_flags |= IEEE80211_NODE_QOS; - callout_init(&ni->ni_mltimer, CALLOUT_MPSAFE); - callout_init(&ni->ni_mlhtimer, CALLOUT_MPSAFE); + callout_init(&ni->ni_mltimer, 1); + callout_init(&ni->ni_mlhtimer, 1); } /* @@ -3482,7 +3486,8 @@ mesh_ioctl_get80211(struct ieee80211vap *vap, struct ieee80211req *ireq) } ireq->i_len = len; /* XXX M_WAIT? */ - p = malloc(len, M_TEMP, M_NOWAIT | M_ZERO); + p = IEEE80211_MALLOC(len, M_TEMP, + IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (p == NULL) return ENOMEM; off = 0; @@ -3507,7 +3512,7 @@ mesh_ioctl_get80211(struct ieee80211vap *vap, struct ieee80211req *ireq) MESH_RT_UNLOCK(ms); error = copyout(p, (uint8_t *)ireq->i_data, ireq->i_len); - free(p, M_TEMP); + IEEE80211_FREE(p, M_TEMP); break; case IEEE80211_MESH_RTCMD_FLUSH: case IEEE80211_MESH_RTCMD_ADD: diff --git a/sys/net80211/ieee80211_mesh.h b/sys/net80211/ieee80211_mesh.h index 5dc2b2c12b17..2253af0060a4 100644 --- a/sys/net80211/ieee80211_mesh.h +++ b/sys/net80211/ieee80211_mesh.h @@ -418,7 +418,7 @@ MALLOC_DECLARE(M_80211_MESH_GT_RT); struct ieee80211_mesh_route { TAILQ_ENTRY(ieee80211_mesh_route) rt_next; struct ieee80211vap *rt_vap; - struct mtx rt_lock; /* fine grained route lock */ + ieee80211_rte_lock_t rt_lock; /* fine grained route lock */ struct callout rt_discovery; /* discovery timeout */ int rt_updtime; /* last update time */ uint8_t rt_dest[IEEE80211_ADDR_LEN]; @@ -515,7 +515,7 @@ struct ieee80211_mesh_state { #define IEEE80211_MESHFLAGS_FWD 0x04 /* forward packets */ #define IEEE80211_MESHFLAGS_ROOT 0x08 /* configured as root */ uint8_t ms_flags; - struct mtx ms_rt_lock; + ieee80211_rt_lock_t ms_rt_lock; struct callout ms_cleantimer; struct callout ms_gatetimer; ieee80211_mesh_seq ms_gateseq; diff --git a/sys/net80211/ieee80211_monitor.c b/sys/net80211/ieee80211_monitor.c index 8909339bde29..e0778461fd42 100644 --- a/sys/net80211/ieee80211_monitor.c +++ b/sys/net80211/ieee80211_monitor.c @@ -61,7 +61,7 @@ __FBSDID("$FreeBSD$"); static void monitor_vattach(struct ieee80211vap *); static int monitor_newstate(struct ieee80211vap *, enum ieee80211_state, int); static int monitor_input(struct ieee80211_node *ni, struct mbuf *m, - int rssi, int nf); + const struct ieee80211_rx_stats *rxs, int rssi, int nf); void ieee80211_monitor_attach(struct ieee80211com *ic) @@ -125,7 +125,8 @@ monitor_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) * Process a received frame in monitor mode. */ static int -monitor_input(struct ieee80211_node *ni, struct mbuf *m, int rssi, int nf) +monitor_input(struct ieee80211_node *ni, struct mbuf *m, + const struct ieee80211_rx_stats *rxs, int rssi, int nf) { struct ieee80211vap *vap = ni->ni_vap; struct ifnet *ifp = vap->iv_ifp; diff --git a/sys/net80211/ieee80211_node.c b/sys/net80211/ieee80211_node.c index c84f9a8e5685..82cfccfaee79 100644 --- a/sys/net80211/ieee80211_node.c +++ b/sys/net80211/ieee80211_node.c @@ -114,7 +114,7 @@ ieee80211_node_attach(struct ieee80211com *ic) "802.11 staging q"); ieee80211_node_table_init(ic, &ic->ic_sta, "station", IEEE80211_INACT_INIT, ic->ic_max_keyix); - callout_init(&ic->ic_inact, CALLOUT_MPSAFE); + callout_init(&ic->ic_inact, 1); callout_reset(&ic->ic_inact, IEEE80211_INACT_WAIT*hz, ieee80211_node_timeout, ic); @@ -172,9 +172,10 @@ ieee80211_node_latevattach(struct ieee80211vap *vap) "WARNING: max aid too small, changed to %d\n", vap->iv_max_aid); } - vap->iv_aid_bitmap = (uint32_t *) malloc( + vap->iv_aid_bitmap = (uint32_t *) IEEE80211_MALLOC( howmany(vap->iv_max_aid, 32) * sizeof(uint32_t), - M_80211_NODE, M_NOWAIT | M_ZERO); + M_80211_NODE, + IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (vap->iv_aid_bitmap == NULL) { /* XXX no way to recover */ printf("%s: no memory for AID bitmap, max aid %d!\n", @@ -199,7 +200,7 @@ ieee80211_node_vdetach(struct ieee80211vap *vap) vap->iv_bss = NULL; } if (vap->iv_aid_bitmap != NULL) { - free(vap->iv_aid_bitmap, M_80211_NODE); + IEEE80211_FREE(vap->iv_aid_bitmap, M_80211_NODE); vap->iv_aid_bitmap = NULL; } } @@ -892,8 +893,8 @@ node_alloc(struct ieee80211vap *vap, const uint8_t macaddr[IEEE80211_ADDR_LEN]) { struct ieee80211_node *ni; - ni = (struct ieee80211_node *) malloc(sizeof(struct ieee80211_node), - M_80211_NODE, M_NOWAIT | M_ZERO); + ni = (struct ieee80211_node *) IEEE80211_MALLOC(sizeof(struct ieee80211_node), + M_80211_NODE, IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); return ni; } @@ -910,11 +911,12 @@ ieee80211_ies_init(struct ieee80211_ies *ies, const uint8_t *data, int len) memset(ies, 0, offsetof(struct ieee80211_ies, data)); if (ies->data != NULL && ies->len != len) { /* data size changed */ - free(ies->data, M_80211_NODE_IE); + IEEE80211_FREE(ies->data, M_80211_NODE_IE); ies->data = NULL; } if (ies->data == NULL) { - ies->data = (uint8_t *) malloc(len, M_80211_NODE_IE, M_NOWAIT); + ies->data = (uint8_t *) IEEE80211_MALLOC(len, M_80211_NODE_IE, + IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (ies->data == NULL) { ies->len = 0; /* NB: pointers have already been zero'd above */ @@ -933,7 +935,7 @@ void ieee80211_ies_cleanup(struct ieee80211_ies *ies) { if (ies->data != NULL) - free(ies->data, M_80211_NODE_IE); + IEEE80211_FREE(ies->data, M_80211_NODE_IE); } /* @@ -1045,7 +1047,7 @@ node_cleanup(struct ieee80211_node *ni) ni->ni_associd = 0; if (ni->ni_challenge != NULL) { - free(ni->ni_challenge, M_80211_NODE); + IEEE80211_FREE(ni->ni_challenge, M_80211_NODE); ni->ni_challenge = NULL; } /* @@ -1080,7 +1082,7 @@ node_free(struct ieee80211_node *ni) ic->ic_node_cleanup(ni); ieee80211_ies_cleanup(&ni->ni_ies); ieee80211_psq_cleanup(&ni->ni_psq); - free(ni, M_80211_NODE); + IEEE80211_FREE(ni, M_80211_NODE); } static void @@ -1908,22 +1910,22 @@ ieee80211_node_table_init(struct ieee80211com *ic, struct ieee80211_node_table *nt, const char *name, int inact, int keyixmax) { - struct ifnet *ifp = ic->ic_ifp; nt->nt_ic = ic; - IEEE80211_NODE_LOCK_INIT(nt, ifp->if_xname); - IEEE80211_NODE_ITERATE_LOCK_INIT(nt, ifp->if_xname); + IEEE80211_NODE_LOCK_INIT(nt, ic->ic_name); + IEEE80211_NODE_ITERATE_LOCK_INIT(nt, ic->ic_name); TAILQ_INIT(&nt->nt_node); nt->nt_name = name; nt->nt_scangen = 1; nt->nt_inact_init = inact; nt->nt_keyixmax = keyixmax; if (nt->nt_keyixmax > 0) { - nt->nt_keyixmap = (struct ieee80211_node **) malloc( + nt->nt_keyixmap = (struct ieee80211_node **) IEEE80211_MALLOC( keyixmax * sizeof(struct ieee80211_node *), - M_80211_NODE, M_NOWAIT | M_ZERO); + M_80211_NODE, + IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (nt->nt_keyixmap == NULL) - if_printf(ic->ic_ifp, + ic_printf(ic, "Cannot allocate key index map with %u entries\n", keyixmax); } else @@ -1980,7 +1982,7 @@ ieee80211_node_table_cleanup(struct ieee80211_node_table *nt) printf("%s: %s[%u] still active\n", __func__, nt->nt_name, i); #endif - free(nt->nt_keyixmap, M_80211_NODE); + IEEE80211_FREE(nt->nt_keyixmap, M_80211_NODE); nt->nt_keyixmap = NULL; } IEEE80211_NODE_ITERATE_LOCK_DESTROY(nt); @@ -2256,8 +2258,8 @@ ieee80211_iterate_nt(struct ieee80211_node_table *nt, TAILQ_FOREACH(ni, &nt->nt_node, ni_list) { if (i >= max_aid) { ret = E2BIG; - if_printf(nt->nt_ic->ic_ifp, - "Node array overflow: max=%u", max_aid); + ic_printf(nt->nt_ic, "Node array overflow: max=%u", + max_aid); break; } ni_arr[i] = ieee80211_ref_node(ni); @@ -2319,8 +2321,8 @@ ieee80211_iterate_nodes(struct ieee80211_node_table *nt, max_aid = vap->iv_max_aid; size = max_aid * sizeof(struct ieee80211_node *); - ni_arr = (struct ieee80211_node **) malloc(size, M_80211_NODE, - M_NOWAIT | M_ZERO); + ni_arr = (struct ieee80211_node **) IEEE80211_MALLOC(size, M_80211_NODE, + IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (ni_arr == NULL) return; @@ -2343,7 +2345,7 @@ ieee80211_iterate_nodes(struct ieee80211_node_table *nt, } done: - free(ni_arr, M_80211_NODE); + IEEE80211_FREE(ni_arr, M_80211_NODE); } void diff --git a/sys/net80211/ieee80211_output.c b/sys/net80211/ieee80211_output.c index 5647c03636b5..e1652ea74158 100644 --- a/sys/net80211/ieee80211_output.c +++ b/sys/net80211/ieee80211_output.c @@ -132,7 +132,7 @@ ieee80211_vap_pkt_send_dest(struct ieee80211vap *vap, struct mbuf *m, { struct ieee80211com *ic = vap->iv_ic; struct ifnet *ifp = vap->iv_ifp; - int error; + int error, len, mcast; if ((ni->ni_flags & IEEE80211_NODE_PWR_MGT) && (m->m_flags & M_PWR_SAV) == 0) { @@ -142,7 +142,8 @@ ieee80211_vap_pkt_send_dest(struct ieee80211vap *vap, struct mbuf *m, * the frame back when the time is right. * XXX lose WDS vap linkage? */ - (void) ieee80211_pwrsave(ni, m); + if (ieee80211_pwrsave(ni, m) != 0) + if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); ieee80211_free_node(ni); /* @@ -171,6 +172,8 @@ ieee80211_vap_pkt_send_dest(struct ieee80211vap *vap, struct mbuf *m, * interface it (might have been) received on. */ m->m_pkthdr.rcvif = (void *)ni; + mcast = (m->m_flags & (M_MCAST | M_BCAST)) ? 1: 0; + len = m->m_pkthdr.len; BPF_MTAP(ifp, m); /* 802.3 tx */ @@ -236,7 +239,7 @@ ieee80211_vap_pkt_send_dest(struct ieee80211vap *vap, struct mbuf *m, /* NB: stat+msg handled in ieee80211_encap */ IEEE80211_TX_UNLOCK(ic); ieee80211_free_node(ni); - /* XXX better status? */ + if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); return (ENOBUFS); } } @@ -250,8 +253,11 @@ ieee80211_vap_pkt_send_dest(struct ieee80211vap *vap, struct mbuf *m, if (error != 0) { /* NB: IFQ_HANDOFF reclaims mbuf */ ieee80211_free_node(ni); + if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); } else { if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); + if_inc_counter(ifp, IFCOUNTER_OMCASTS, mcast); + if_inc_counter(ifp, IFCOUNTER_OBYTES, len); } ic->ic_lastdata = ticks; @@ -315,6 +321,7 @@ ieee80211_start_pkt(struct ieee80211vap *vap, struct mbuf *m) eh->ether_dhost, "mcast", "%s", "on DWDS"); vap->iv_stats.is_dwds_mcast++; m_freem(m); + if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); /* XXX better status? */ return (ENOBUFS); } @@ -397,7 +404,8 @@ ieee80211_start_pkt(struct ieee80211vap *vap, struct mbuf *m) * for transmit. */ ic->ic_lastdata = ticks; - (void) ieee80211_pwrsave(ni, m); + if (ieee80211_pwrsave(ni, m) != 0) + if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); ieee80211_free_node(ni); ieee80211_new_state(vap, IEEE80211_S_RUN, 0); return (0); @@ -429,9 +437,9 @@ ieee80211_vap_transmit(struct ifnet *ifp, struct mbuf *m) IEEE80211_DPRINTF(vap, IEEE80211_MSG_OUTPUT, "%s: ignore queue, parent %s not up+running\n", __func__, parent->if_xname); - /* XXX stat */ m_freem(m); - return (EINVAL); + if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); + return (ENETDOWN); } /* @@ -453,7 +461,8 @@ ieee80211_vap_transmit(struct ifnet *ifp, struct mbuf *m) IEEE80211_UNLOCK(ic); ifp->if_drv_flags |= IFF_DRV_OACTIVE; m_freem(m); - return (EINVAL); + if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); + return (ENETDOWN); } IEEE80211_UNLOCK(ic); } @@ -507,15 +516,9 @@ ieee80211_raw_output(struct ieee80211vap *vap, struct ieee80211_node *ni, * connect bpf write calls to the 802.11 layer for injecting * raw 802.11 frames. */ -#if __FreeBSD_version >= 1000031 int ieee80211_output(struct ifnet *ifp, struct mbuf *m, const struct sockaddr *dst, struct route *ro) -#else -int -ieee80211_output(struct ifnet *ifp, struct mbuf *m, - struct sockaddr *dst, struct route *ro) -#endif { #define senderr(e) do { error = (e); goto bad;} while (0) struct ieee80211_node *ni = NULL; @@ -730,7 +733,12 @@ ieee80211_send_setup( if (tid != IEEE80211_NONQOS_TID && IEEE80211_AMPDU_RUNNING(tap)) m->m_flags |= M_AMPDU_MPDU; else { - seqno = ni->ni_txseqs[tid]++; + if (IEEE80211_HAS_SEQ(type & IEEE80211_FC0_TYPE_MASK, + type & IEEE80211_FC0_SUBTYPE_MASK)) + seqno = ni->ni_txseqs[tid]++; + else + seqno = 0; + *(uint16_t *)&wh->i_seq[0] = htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT); M_SEQNO_SET(m, seqno); @@ -1936,7 +1944,7 @@ ieee80211_add_countryie(uint8_t *frm, struct ieee80211com *ic) * re-calculation. */ if (ic->ic_countryie != NULL) - free(ic->ic_countryie, M_80211_NODE_IE); + IEEE80211_FREE(ic->ic_countryie, M_80211_NODE_IE); ic->ic_countryie = ieee80211_alloc_countryie(ic); if (ic->ic_countryie == NULL) return frm; diff --git a/sys/net80211/ieee80211_power.c b/sys/net80211/ieee80211_power.c index 812cd7053ce9..91668cc7c0d2 100644 --- a/sys/net80211/ieee80211_power.c +++ b/sys/net80211/ieee80211_power.c @@ -83,8 +83,9 @@ ieee80211_power_latevattach(struct ieee80211vap *vap) */ if (vap->iv_opmode == IEEE80211_M_HOSTAP) { vap->iv_tim_len = howmany(vap->iv_max_aid,8) * sizeof(uint8_t); - vap->iv_tim_bitmap = (uint8_t *) malloc(vap->iv_tim_len, - M_80211_POWER, M_NOWAIT | M_ZERO); + vap->iv_tim_bitmap = (uint8_t *) IEEE80211_MALLOC(vap->iv_tim_len, + M_80211_POWER, + IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (vap->iv_tim_bitmap == NULL) { printf("%s: no memory for TIM bitmap!\n", __func__); /* XXX good enough to keep from crashing? */ @@ -97,7 +98,7 @@ void ieee80211_power_vdetach(struct ieee80211vap *vap) { if (vap->iv_tim_bitmap != NULL) { - free(vap->iv_tim_bitmap, M_80211_POWER); + IEEE80211_FREE(vap->iv_tim_bitmap, M_80211_POWER); vap->iv_tim_bitmap = NULL; } } diff --git a/sys/net80211/ieee80211_proto.c b/sys/net80211/ieee80211_proto.c index 2f84769f9907..01c60e1614e5 100644 --- a/sys/net80211/ieee80211_proto.c +++ b/sys/net80211/ieee80211_proto.c @@ -113,9 +113,8 @@ static int null_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, const struct ieee80211_bpf_params *params) { - struct ifnet *ifp = ni->ni_ic->ic_ifp; - if_printf(ifp, "missing ic_raw_xmit callback, drop frame\n"); + ic_printf(ni->ni_ic, "missing ic_raw_xmit callback, drop frame\n"); m_freem(m); return ENETDOWN; } @@ -195,7 +194,7 @@ ieee80211_proto_vattach(struct ieee80211vap *vap) vap->iv_fragthreshold = IEEE80211_FRAG_DEFAULT; vap->iv_bmiss_max = IEEE80211_BMISS_MAX; callout_init_mtx(&vap->iv_swbmiss, IEEE80211_LOCK_OBJ(ic), 0); - callout_init(&vap->iv_mgtsend, CALLOUT_MPSAFE); + callout_init(&vap->iv_mgtsend, 1); TASK_INIT(&vap->iv_nstate_task, 0, ieee80211_newstate_cb, vap); TASK_INIT(&vap->iv_swbmiss_task, 0, beacon_swmiss, vap); /* @@ -251,7 +250,7 @@ ieee80211_proto_vdetach(struct ieee80211vap *vap) { #define FREEAPPIE(ie) do { \ if (ie != NULL) \ - free(ie, M_80211_NODE_IE); \ + IEEE80211_FREE(ie, M_80211_NODE_IE); \ } while (0) /* * Detach operating mode module. @@ -651,7 +650,7 @@ ieee80211_set_shortslottime(struct ieee80211com *ic, int onoff) ic->ic_flags &= ~IEEE80211_F_SHSLOT; /* notify driver */ if (ic->ic_updateslot != NULL) - ic->ic_updateslot(ic->ic_ifp); + ic->ic_updateslot(ic); } /* @@ -1165,18 +1164,16 @@ static void update_mcast(void *arg, int npending) { struct ieee80211com *ic = arg; - struct ifnet *parent = ic->ic_ifp; - ic->ic_update_mcast(parent); + ic->ic_update_mcast(ic); } static void update_promisc(void *arg, int npending) { struct ieee80211com *ic = arg; - struct ifnet *parent = ic->ic_ifp; - ic->ic_update_promisc(parent); + ic->ic_update_promisc(ic); } static void diff --git a/sys/net80211/ieee80211_proto.h b/sys/net80211/ieee80211_proto.h index 3b46ac4b1ecd..a8123931588f 100644 --- a/sys/net80211/ieee80211_proto.h +++ b/sys/net80211/ieee80211_proto.h @@ -68,6 +68,9 @@ void ieee80211_syncflag_ext(struct ieee80211vap *, int flag); #define IEEE80211_R_C_RSSI 0x0000010 /* per-chain RSSI value valid */ #define IEEE80211_R_C_EVM 0x0000020 /* per-chain EVM valid */ #define IEEE80211_R_C_HT40 0x0000040 /* RX'ed packet is 40mhz, pilots 4,5 valid */ +#define IEEE80211_R_FREQ 0x0000080 /* Freq value populated, MHz */ +#define IEEE80211_R_IEEE 0x0000100 /* IEEE value populated */ +#define IEEE80211_R_BAND 0x0000200 /* Frequency band populated */ struct ieee80211_rx_stats { uint32_t r_flags; /* IEEE80211_R_* flags */ @@ -80,10 +83,12 @@ struct ieee80211_rx_stats { uint8_t rssi; /* global RSSI */ uint8_t evm[IEEE80211_MAX_CHAINS][IEEE80211_MAX_EVM_PILOTS]; /* per-chain, per-pilot EVM values */ + uint16_t c_freq; + uint8_t c_ieee; }; #define ieee80211_input(ni, m, rssi, nf) \ - ((ni)->ni_vap->iv_input(ni, m, rssi, nf)) + ((ni)->ni_vap->iv_input(ni, m, NULL, rssi, nf)) int ieee80211_input_all(struct ieee80211com *, struct mbuf *, int, int); int ieee80211_input_mimo(struct ieee80211_node *, struct mbuf *, @@ -96,13 +101,8 @@ int ieee80211_mgmt_output(struct ieee80211_node *, struct mbuf *, int, struct ieee80211_bpf_params *); int ieee80211_raw_xmit(struct ieee80211_node *, struct mbuf *, const struct ieee80211_bpf_params *); -#if __FreeBSD_version >= 1000031 int ieee80211_output(struct ifnet *, struct mbuf *, const struct sockaddr *, struct route *ro); -#else -int ieee80211_output(struct ifnet *, struct mbuf *, - struct sockaddr *, struct route *ro); -#endif int ieee80211_vap_pkt_send_dest(struct ieee80211vap *, struct mbuf *, struct ieee80211_node *); int ieee80211_raw_output(struct ieee80211vap *, struct ieee80211_node *, diff --git a/sys/net80211/ieee80211_radiotap.c b/sys/net80211/ieee80211_radiotap.c index 5638f52c2ca9..eb218dd4ffba 100644 --- a/sys/net80211/ieee80211_radiotap.c +++ b/sys/net80211/ieee80211_radiotap.c @@ -43,7 +43,6 @@ __FBSDID("$FreeBSD$"); #include #include #include -#include #include #include @@ -80,8 +79,8 @@ ieee80211_radiotap_attachv(struct ieee80211com *ic, else if (tx_radiotap & B(IEEE80211_RADIOTAP_XCHANNEL)) off = radiotap_offset(th, n_tx_v, IEEE80211_RADIOTAP_XCHANNEL); if (off == -1) { - if_printf(ic->ic_ifp, "%s: no tx channel, radiotap 0x%x\n", - __func__, tx_radiotap); + ic_printf(ic, "%s: no tx channel, radiotap 0x%x\n", __func__, + tx_radiotap); /* NB: we handle this case but data will have no chan spec */ } else ic->ic_txchan = ((uint8_t *) th) + off; @@ -96,8 +95,8 @@ ieee80211_radiotap_attachv(struct ieee80211com *ic, else if (rx_radiotap & B(IEEE80211_RADIOTAP_XCHANNEL)) off = radiotap_offset(rh, n_rx_v, IEEE80211_RADIOTAP_XCHANNEL); if (off == -1) { - if_printf(ic->ic_ifp, "%s: no rx channel, radiotap 0x%x\n", - __func__, rx_radiotap); + ic_printf(ic, "%s: no rx channel, radiotap 0x%x\n", __func__, + rx_radiotap); /* NB: we handle this case but data will have no chan spec */ } else ic->ic_rxchan = ((uint8_t *) rh) + off; diff --git a/sys/net80211/ieee80211_ratectl_none.c b/sys/net80211/ieee80211_ratectl_none.c index a0056f3f5355..5a45a74ea7a3 100644 --- a/sys/net80211/ieee80211_ratectl_none.c +++ b/sys/net80211/ieee80211_ratectl_none.c @@ -56,7 +56,7 @@ none_init(struct ieee80211vap *vap) static void none_deinit(struct ieee80211vap *vap) { - free(vap->iv_rs, M_80211_RATECTL); + IEEE80211_FREE(vap->iv_rs, M_80211_RATECTL); } static void diff --git a/sys/net80211/ieee80211_regdomain.c b/sys/net80211/ieee80211_regdomain.c index ed7f4227ef53..9dfef2c5f168 100644 --- a/sys/net80211/ieee80211_regdomain.c +++ b/sys/net80211/ieee80211_regdomain.c @@ -84,7 +84,7 @@ void ieee80211_regdomain_detach(struct ieee80211com *ic) { if (ic->ic_countryie != NULL) { - free(ic->ic_countryie, M_80211_NODE_IE); + IEEE80211_FREE(ic->ic_countryie, M_80211_NODE_IE); ic->ic_countryie = NULL; } } @@ -301,19 +301,19 @@ ieee80211_alloc_countryie(struct ieee80211com *ic) struct ieee80211_country_ie *ie; int i, skip, nruns; - aie = malloc(IEEE80211_COUNTRY_MAX_SIZE, M_80211_NODE_IE, - M_NOWAIT | M_ZERO); + aie = IEEE80211_MALLOC(IEEE80211_COUNTRY_MAX_SIZE, M_80211_NODE_IE, + IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (aie == NULL) { - if_printf(ic->ic_ifp, - "%s: unable to allocate memory for country ie\n", __func__); + ic_printf(ic, "%s: unable to allocate memory for country ie\n", + __func__); /* XXX stat */ return NULL; } ie = (struct ieee80211_country_ie *) aie->ie_data; ie->ie = IEEE80211_ELEMID_COUNTRY; if (rd->isocc[0] == '\0') { - if_printf(ic->ic_ifp, "no ISO country string for cc %d; " - "using blanks\n", rd->country); + ic_printf(ic, "no ISO country string for cc %d; using blanks\n", + rd->country); ie->cc[0] = ie->cc[1] = ' '; } else { ie->cc[0] = rd->isocc[0]; @@ -350,7 +350,7 @@ ieee80211_alloc_countryie(struct ieee80211com *ic) if (c->ic_ieee != nextchan || c->ic_maxregpower != frm[-1]) { /* new run */ if (nruns == IEEE80211_COUNTRY_MAX_BANDS) { - if_printf(ic->ic_ifp, "%s: country ie too big, " + ic_printf(ic, "%s: country ie too big, " "runs > max %d, truncating\n", __func__, IEEE80211_COUNTRY_MAX_BANDS); /* XXX stat? fail? */ @@ -493,7 +493,7 @@ ieee80211_setregdomain(struct ieee80211vap *vap, * Invalidate channel-related state. */ if (ic->ic_countryie != NULL) { - free(ic->ic_countryie, M_80211_NODE_IE); + IEEE80211_FREE(ic->ic_countryie, M_80211_NODE_IE); ic->ic_countryie = NULL; } ieee80211_scan_flush(vap); diff --git a/sys/net80211/ieee80211_rssadapt.c b/sys/net80211/ieee80211_rssadapt.c index f230f60d8f4f..b5fdb86b69b4 100644 --- a/sys/net80211/ieee80211_rssadapt.c +++ b/sys/net80211/ieee80211_rssadapt.c @@ -132,8 +132,8 @@ rssadapt_init(struct ieee80211vap *vap) KASSERT(vap->iv_rs == NULL, ("%s: iv_rs already initialized", __func__)); - vap->iv_rs = rs = malloc(sizeof(struct ieee80211_rssadapt), - M_80211_RATECTL, M_NOWAIT|M_ZERO); + vap->iv_rs = rs = IEEE80211_MALLOC(sizeof(struct ieee80211_rssadapt), + M_80211_RATECTL, IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (rs == NULL) { if_printf(vap->iv_ifp, "couldn't alloc ratectl structure\n"); return; @@ -146,7 +146,7 @@ rssadapt_init(struct ieee80211vap *vap) static void rssadapt_deinit(struct ieee80211vap *vap) { - free(vap->iv_rs, M_80211_RATECTL); + IEEE80211_FREE(vap->iv_rs, M_80211_RATECTL); } static void @@ -175,8 +175,8 @@ rssadapt_node_init(struct ieee80211_node *ni) if (ni->ni_rctls == NULL) { ni->ni_rctls = ra = - malloc(sizeof(struct ieee80211_rssadapt_node), - M_80211_RATECTL, M_NOWAIT|M_ZERO); + IEEE80211_MALLOC(sizeof(struct ieee80211_rssadapt_node), + M_80211_RATECTL, IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (ra == NULL) { if_printf(vap->iv_ifp, "couldn't alloc per-node ratectl " "structure\n"); @@ -204,7 +204,7 @@ static void rssadapt_node_deinit(struct ieee80211_node *ni) { - free(ni->ni_rctls, M_80211_RATECTL); + IEEE80211_FREE(ni->ni_rctls, M_80211_RATECTL); } static __inline int diff --git a/sys/net80211/ieee80211_scan.c b/sys/net80211/ieee80211_scan.c index f42ddc074882..6c950d6bc88d 100644 --- a/sys/net80211/ieee80211_scan.c +++ b/sys/net80211/ieee80211_scan.c @@ -305,80 +305,6 @@ ieee80211_scan_copy_ssid(struct ieee80211vap *vap, struct ieee80211_scan_state * ss->ss_nssid = nssid; } -/* - * Start a scan unless one is already going. - */ -int -ieee80211_start_scan_locked(const struct ieee80211_scanner *scan, - struct ieee80211vap *vap, int flags, u_int duration, - u_int mindwell, u_int maxdwell, - u_int nssid, const struct ieee80211_scan_ssid ssids[]) -{ - struct ieee80211com *ic = vap->iv_ic; - struct ieee80211_scan_state *ss = ic->ic_scan; - - IEEE80211_LOCK_ASSERT(ic); - - if (ic->ic_flags & IEEE80211_F_CSAPENDING) { - IEEE80211_DPRINTF(vap, IEEE80211_MSG_SCAN, - "%s: scan inhibited by pending channel change\n", __func__); - } else if ((ic->ic_flags & IEEE80211_F_SCAN) == 0) { - IEEE80211_DPRINTF(vap, IEEE80211_MSG_SCAN, - "%s: %s scan, duration %u mindwell %u maxdwell %u, desired mode %s, %s%s%s%s%s%s\n" - , __func__ - , flags & IEEE80211_SCAN_ACTIVE ? "active" : "passive" - , duration, mindwell, maxdwell - , ieee80211_phymode_name[vap->iv_des_mode] - , flags & IEEE80211_SCAN_FLUSH ? "flush" : "append" - , flags & IEEE80211_SCAN_NOPICK ? ", nopick" : "" - , flags & IEEE80211_SCAN_NOJOIN ? ", nojoin" : "" - , flags & IEEE80211_SCAN_NOBCAST ? ", nobcast" : "" - , flags & IEEE80211_SCAN_PICK1ST ? ", pick1st" : "" - , flags & IEEE80211_SCAN_ONCE ? ", once" : "" - ); - - ieee80211_scan_update_locked(vap, scan); - if (ss->ss_ops != NULL) { - if ((flags & IEEE80211_SCAN_NOSSID) == 0) - ieee80211_scan_copy_ssid(vap, ss, nssid, ssids); - - /* NB: top 4 bits for internal use */ - ss->ss_flags = flags & 0xfff; - if (ss->ss_flags & IEEE80211_SCAN_ACTIVE) - vap->iv_stats.is_scan_active++; - else - vap->iv_stats.is_scan_passive++; - if (flags & IEEE80211_SCAN_FLUSH) - ss->ss_ops->scan_flush(ss); - if (flags & IEEE80211_SCAN_BGSCAN) - ic->ic_flags_ext |= IEEE80211_FEXT_BGSCAN; - - /* Set duration for this particular scan */ - ieee80211_swscan_set_scan_duration(vap, duration); - - ss->ss_next = 0; - ss->ss_mindwell = mindwell; - ss->ss_maxdwell = maxdwell; - /* NB: scan_start must be before the scan runtask */ - ss->ss_ops->scan_start(ss, vap); -#ifdef IEEE80211_DEBUG - if (ieee80211_msg_scan(vap)) - ieee80211_scan_dump(ss); -#endif /* IEEE80211_DEBUG */ - ic->ic_flags |= IEEE80211_F_SCAN; - - /* Start scan task */ - ieee80211_swscan_run_scan_task(vap); - } - return 1; - } else { - IEEE80211_DPRINTF(vap, IEEE80211_MSG_SCAN, - "%s: %s scan already in progress\n", __func__, - ss->ss_flags & IEEE80211_SCAN_ACTIVE ? "active" : "passive"); - } - return 0; -} - /* * Start a scan unless one is already going. */ @@ -636,12 +562,14 @@ ieee80211_scan_dump_probe_beacon(uint8_t subtype, int isnew, */ void ieee80211_add_scan(struct ieee80211vap *vap, + struct ieee80211_channel *curchan, const struct ieee80211_scanparams *sp, const struct ieee80211_frame *wh, int subtype, int rssi, int noise) { - return (ieee80211_swscan_add_scan(vap, sp, wh, subtype, rssi, noise)); + return (ieee80211_swscan_add_scan(vap, curchan, sp, wh, subtype, + rssi, noise)); } /* diff --git a/sys/net80211/ieee80211_scan.h b/sys/net80211/ieee80211_scan.h index 9c2575adf86c..8b54186af517 100644 --- a/sys/net80211/ieee80211_scan.h +++ b/sys/net80211/ieee80211_scan.h @@ -148,6 +148,7 @@ struct ieee80211_channel *ieee80211_scan_pickchannel(struct ieee80211com *, int) struct ieee80211_scanparams; void ieee80211_add_scan(struct ieee80211vap *, + struct ieee80211_channel *, const struct ieee80211_scanparams *, const struct ieee80211_frame *, int subtype, int rssi, int noise); @@ -273,6 +274,7 @@ struct ieee80211_scanner { struct ieee80211_scan_state *, int); /* add an entry to the cache */ int (*scan_add)(struct ieee80211_scan_state *, + struct ieee80211_channel *, const struct ieee80211_scanparams *, const struct ieee80211_frame *, int subtype, int rssi, int noise); @@ -307,10 +309,6 @@ void ieee80211_scan_copy_ssid(struct ieee80211vap *vap, void ieee80211_scan_dump_probe_beacon(uint8_t subtype, int isnew, const uint8_t mac[IEEE80211_ADDR_LEN], const struct ieee80211_scanparams *sp, int rssi); -int ieee80211_start_scan_locked(const struct ieee80211_scanner *scan, - struct ieee80211vap *vap, int flags, u_int duration, - u_int mindwell, u_int maxdwell, - u_int nssid, const struct ieee80211_scan_ssid ssids[]); void ieee80211_scan_dump(struct ieee80211_scan_state *ss); #endif /* _NET80211_IEEE80211_SCAN_H_ */ diff --git a/sys/net80211/ieee80211_scan_sta.c b/sys/net80211/ieee80211_scan_sta.c index 1e87e35245e2..c0cbb7d2de4f 100644 --- a/sys/net80211/ieee80211_scan_sta.c +++ b/sys/net80211/ieee80211_scan_sta.c @@ -102,7 +102,7 @@ struct sta_table { ieee80211_scan_table_lock_t st_lock; /* on scan table */ TAILQ_HEAD(, sta_entry) st_entry; /* all entries */ LIST_HEAD(, sta_entry) st_hash[STA_HASHSIZE]; - struct mtx st_scanlock; /* on st_scaniter */ + ieee80211_scan_iter_lock_t st_scanlock; /* on st_scaniter */ u_int st_scaniter; /* gen# for iterator */ u_int st_scangen; /* scan generation # */ int st_newscan; @@ -159,12 +159,13 @@ sta_attach(struct ieee80211_scan_state *ss) { struct sta_table *st; - st = (struct sta_table *) malloc(sizeof(struct sta_table), - M_80211_SCAN, M_NOWAIT | M_ZERO); + st = (struct sta_table *) IEEE80211_MALLOC(sizeof(struct sta_table), + M_80211_SCAN, + IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (st == NULL) return 0; IEEE80211_SCAN_TABLE_LOCK_INIT(st, "scantable"); - mtx_init(&st->st_scanlock, "scangen", "802.11 scangen", MTX_DEF); + IEEE80211_SCAN_ITER_LOCK_INIT(st, "scangen"); TAILQ_INIT(&st->st_entry); ss->ss_priv = st; nrefs++; /* NB: we assume caller locking */ @@ -182,8 +183,8 @@ sta_detach(struct ieee80211_scan_state *ss) if (st != NULL) { sta_flush_table(st); IEEE80211_SCAN_TABLE_LOCK_DESTROY(st); - mtx_destroy(&st->st_scanlock); - free(st, M_80211_SCAN); + IEEE80211_SCAN_ITER_LOCK_DESTROY(st); + IEEE80211_FREE(st, M_80211_SCAN); KASSERT(nrefs > 0, ("imbalanced attach/detach")); nrefs--; /* NB: we assume caller locking */ } @@ -217,7 +218,7 @@ sta_flush_table(struct sta_table *st) TAILQ_REMOVE(&st->st_entry, se, se_list); LIST_REMOVE(se, se_hash); ieee80211_ies_cleanup(&se->base.se_ies); - free(se, M_80211_SCAN); + IEEE80211_FREE(se, M_80211_SCAN); } memset(st->st_maxrssi, 0, sizeof(st->st_maxrssi)); } @@ -228,6 +229,7 @@ sta_flush_table(struct sta_table *st) */ static int sta_add(struct ieee80211_scan_state *ss, + struct ieee80211_channel *curchan, const struct ieee80211_scanparams *sp, const struct ieee80211_frame *wh, int subtype, int rssi, int noise) @@ -251,8 +253,8 @@ sta_add(struct ieee80211_scan_state *ss, LIST_FOREACH(se, &st->st_hash[hash], se_hash) if (IEEE80211_ADDR_EQ(se->base.se_macaddr, macaddr)) goto found; - se = (struct sta_entry *) malloc(sizeof(struct sta_entry), - M_80211_SCAN, M_NOWAIT | M_ZERO); + se = (struct sta_entry *) IEEE80211_MALLOC(sizeof(struct sta_entry), + M_80211_SCAN, IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (se == NULL) { IEEE80211_SCAN_TABLE_UNLOCK(st); return 0; @@ -310,15 +312,15 @@ sta_add(struct ieee80211_scan_state *ss, * IEEE80211_BPARSE_OFFCHAN. */ c = ieee80211_find_channel_byieee(ic, sp->chan, - ic->ic_curchan->ic_flags); + curchan->ic_flags); if (c != NULL) { ise->se_chan = c; } else if (ise->se_chan == NULL) { /* should not happen, pick something */ - ise->se_chan = ic->ic_curchan; + ise->se_chan = curchan; } } else - ise->se_chan = ic->ic_curchan; + ise->se_chan = curchan; if (IEEE80211_IS_CHAN_HT(ise->se_chan) && sp->htcap == NULL) { /* Demote legacy networks to a non-HT channel. */ c = ieee80211_find_channel(ic, ise->se_chan->ic_freq, @@ -1401,7 +1403,7 @@ sta_iterate(struct ieee80211_scan_state *ss, struct sta_entry *se; u_int gen; - mtx_lock(&st->st_scanlock); + IEEE80211_SCAN_ITER_LOCK(st); gen = st->st_scaniter++; restart: IEEE80211_SCAN_TABLE_LOCK(st); @@ -1417,7 +1419,7 @@ sta_iterate(struct ieee80211_scan_state *ss, } IEEE80211_SCAN_TABLE_UNLOCK(st); - mtx_unlock(&st->st_scanlock); + IEEE80211_SCAN_ITER_UNLOCK(st); } static void @@ -1679,7 +1681,7 @@ adhoc_age(struct ieee80211_scan_state *ss) TAILQ_REMOVE(&st->st_entry, se, se_list); LIST_REMOVE(se, se_hash); ieee80211_ies_cleanup(&se->base.se_ies); - free(se, M_80211_SCAN); + IEEE80211_FREE(se, M_80211_SCAN); } } IEEE80211_SCAN_TABLE_UNLOCK(st); diff --git a/sys/net80211/ieee80211_scan_sw.c b/sys/net80211/ieee80211_scan_sw.c index bce92a49ce6b..22f1cf9c9572 100644 --- a/sys/net80211/ieee80211_scan_sw.c +++ b/sys/net80211/ieee80211_scan_sw.c @@ -107,8 +107,8 @@ ieee80211_swscan_attach(struct ieee80211com *ic) { struct scan_state *ss; - ss = (struct scan_state *) malloc(sizeof(struct scan_state), - M_80211_SCAN, M_NOWAIT | M_ZERO); + ss = (struct scan_state *) IEEE80211_MALLOC(sizeof(struct scan_state), + M_80211_SCAN, IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (ss == NULL) { ic->ic_scan = NULL; return; @@ -155,7 +155,7 @@ ieee80211_swscan_detach(struct ieee80211com *ic) ss->ss_ops = NULL; } ic->ic_scan = NULL; - free(SCAN_PRIVATE(ss), M_80211_SCAN); + IEEE80211_FREE(SCAN_PRIVATE(ss), M_80211_SCAN); } } @@ -209,6 +209,81 @@ ieee80211_swscan_run_scan_task(struct ieee80211vap *vap) ieee80211_runtask(ic, &SCAN_PRIVATE(ss)->ss_scan_task); } +/* + * Start a scan unless one is already going. + */ +static int +ieee80211_swscan_start_scan_locked(const struct ieee80211_scanner *scan, + struct ieee80211vap *vap, int flags, u_int duration, + u_int mindwell, u_int maxdwell, + u_int nssid, const struct ieee80211_scan_ssid ssids[]) +{ + struct ieee80211com *ic = vap->iv_ic; + struct ieee80211_scan_state *ss = ic->ic_scan; + + IEEE80211_LOCK_ASSERT(ic); + + if (ic->ic_flags & IEEE80211_F_CSAPENDING) { + IEEE80211_DPRINTF(vap, IEEE80211_MSG_SCAN, + "%s: scan inhibited by pending channel change\n", __func__); + } else if ((ic->ic_flags & IEEE80211_F_SCAN) == 0) { + IEEE80211_DPRINTF(vap, IEEE80211_MSG_SCAN, + "%s: %s scan, duration %u mindwell %u maxdwell %u, desired mode %s, %s%s%s%s%s%s\n" + , __func__ + , flags & IEEE80211_SCAN_ACTIVE ? "active" : "passive" + , duration, mindwell, maxdwell + , ieee80211_phymode_name[vap->iv_des_mode] + , flags & IEEE80211_SCAN_FLUSH ? "flush" : "append" + , flags & IEEE80211_SCAN_NOPICK ? ", nopick" : "" + , flags & IEEE80211_SCAN_NOJOIN ? ", nojoin" : "" + , flags & IEEE80211_SCAN_NOBCAST ? ", nobcast" : "" + , flags & IEEE80211_SCAN_PICK1ST ? ", pick1st" : "" + , flags & IEEE80211_SCAN_ONCE ? ", once" : "" + ); + + ieee80211_scan_update_locked(vap, scan); + if (ss->ss_ops != NULL) { + if ((flags & IEEE80211_SCAN_NOSSID) == 0) + ieee80211_scan_copy_ssid(vap, ss, nssid, ssids); + + /* NB: top 4 bits for internal use */ + ss->ss_flags = flags & 0xfff; + if (ss->ss_flags & IEEE80211_SCAN_ACTIVE) + vap->iv_stats.is_scan_active++; + else + vap->iv_stats.is_scan_passive++; + if (flags & IEEE80211_SCAN_FLUSH) + ss->ss_ops->scan_flush(ss); + if (flags & IEEE80211_SCAN_BGSCAN) + ic->ic_flags_ext |= IEEE80211_FEXT_BGSCAN; + + /* Set duration for this particular scan */ + ieee80211_swscan_set_scan_duration(vap, duration); + + ss->ss_next = 0; + ss->ss_mindwell = mindwell; + ss->ss_maxdwell = maxdwell; + /* NB: scan_start must be before the scan runtask */ + ss->ss_ops->scan_start(ss, vap); +#ifdef IEEE80211_DEBUG + if (ieee80211_msg_scan(vap)) + ieee80211_scan_dump(ss); +#endif /* IEEE80211_DEBUG */ + ic->ic_flags |= IEEE80211_F_SCAN; + + /* Start scan task */ + ieee80211_swscan_run_scan_task(vap); + } + return 1; + } else { + IEEE80211_DPRINTF(vap, IEEE80211_MSG_SCAN, + "%s: %s scan already in progress\n", __func__, + ss->ss_flags & IEEE80211_SCAN_ACTIVE ? "active" : "passive"); + } + return 0; +} + + /* * Start a scan unless one is already going. * @@ -226,7 +301,7 @@ ieee80211_swscan_start_scan(const struct ieee80211_scanner *scan, IEEE80211_UNLOCK_ASSERT(ic); IEEE80211_LOCK(ic); - result = ieee80211_start_scan_locked(scan, vap, flags, duration, + result = ieee80211_swscan_start_scan_locked(scan, vap, flags, duration, mindwell, maxdwell, nssid, ssids); IEEE80211_UNLOCK(ic); @@ -289,7 +364,7 @@ ieee80211_swscan_check_scan(const struct ieee80211_scanner *scan, } } } - result = ieee80211_start_scan_locked(scan, vap, flags, duration, + result = ieee80211_swscan_start_scan_locked(scan, vap, flags, duration, mindwell, maxdwell, nssid, ssids); return result; @@ -825,6 +900,7 @@ scan_task(void *arg, int pending) */ void ieee80211_swscan_add_scan(struct ieee80211vap *vap, + struct ieee80211_channel *curchan, const struct ieee80211_scanparams *sp, const struct ieee80211_frame *wh, int subtype, int rssi, int noise) @@ -847,7 +923,7 @@ ieee80211_swscan_add_scan(struct ieee80211vap *vap, ieee80211_scan_dump_probe_beacon(subtype, 1, wh->i_addr2, sp, rssi); #endif if (ss->ss_ops != NULL && - ss->ss_ops->scan_add(ss, sp, wh, subtype, rssi, noise)) { + ss->ss_ops->scan_add(ss, curchan, sp, wh, subtype, rssi, noise)) { /* * If we've reached the min dwell time terminate * the timer so we'll switch to the next channel. diff --git a/sys/net80211/ieee80211_scan_sw.h b/sys/net80211/ieee80211_scan_sw.h index 95fe482986f7..7bb0cc378642 100644 --- a/sys/net80211/ieee80211_scan_sw.h +++ b/sys/net80211/ieee80211_scan_sw.h @@ -53,6 +53,7 @@ extern void ieee80211_swscan_scan_done(struct ieee80211vap *vap); extern void ieee80211_swscan_probe_curchan(struct ieee80211vap *vap, int force); extern void ieee80211_swscan_add_scan(struct ieee80211vap *vap, + struct ieee80211_channel *curchan, const struct ieee80211_scanparams *sp, const struct ieee80211_frame *wh, int subtype, int rssi, int noise); diff --git a/sys/net80211/ieee80211_sta.c b/sys/net80211/ieee80211_sta.c index c3c2bc92b59e..81d75596b81b 100644 --- a/sys/net80211/ieee80211_sta.c +++ b/sys/net80211/ieee80211_sta.c @@ -70,9 +70,10 @@ __FBSDID("$FreeBSD$"); static void sta_vattach(struct ieee80211vap *); static void sta_beacon_miss(struct ieee80211vap *); static int sta_newstate(struct ieee80211vap *, enum ieee80211_state, int); -static int sta_input(struct ieee80211_node *, struct mbuf *, int, int); +static int sta_input(struct ieee80211_node *, struct mbuf *, + const struct ieee80211_rx_stats *, int, int); static void sta_recv_mgmt(struct ieee80211_node *, struct mbuf *, - int subtype, int rssi, int nf); + int subtype, const struct ieee80211_rx_stats *, int rssi, int nf); static void sta_recv_ctl(struct ieee80211_node *, struct mbuf *, int subtype); void @@ -525,9 +526,9 @@ doprint(struct ieee80211vap *vap, int subtype) * by the 802.11 layer. */ static int -sta_input(struct ieee80211_node *ni, struct mbuf *m, int rssi, int nf) +sta_input(struct ieee80211_node *ni, struct mbuf *m, + const struct ieee80211_rx_stats *rxs, int rssi, int nf) { -#define HAS_SEQ(type) ((type & 0x4) == 0) struct ieee80211vap *vap = ni->ni_vap; struct ieee80211com *ic = ni->ni_ic; struct ifnet *ifp = vap->iv_ifp; @@ -623,7 +624,8 @@ sta_input(struct ieee80211_node *ni, struct mbuf *m, int rssi, int nf) IEEE80211_RSSI_LPF(ni->ni_avgrssi, rssi); ni->ni_noise = nf; - if (HAS_SEQ(type) && !IEEE80211_IS_MULTICAST(wh->i_addr1)) { + if ( IEEE80211_HAS_SEQ(type, subtype) && + !IEEE80211_IS_MULTICAST(wh->i_addr1)) { uint8_t tid = ieee80211_gettid(wh); if (IEEE80211_QOS_HAS_SEQ(wh) && TID_TO_WME_AC(tid) >= WME_AC_VI) @@ -922,7 +924,7 @@ sta_input(struct ieee80211_node *ni, struct mbuf *m, int rssi, int nf) wh = mtod(m, struct ieee80211_frame *); wh->i_fc[1] &= ~IEEE80211_FC1_PROTECTED; } - vap->iv_recv_mgmt(ni, m, subtype, rssi, nf); + vap->iv_recv_mgmt(ni, m, subtype, rxs, rssi, nf); goto out; case IEEE80211_FC0_TYPE_CTL: @@ -1058,7 +1060,7 @@ sta_auth_shared(struct ieee80211_node *ni, struct ieee80211_frame *wh, switch (seq) { case IEEE80211_AUTH_SHARED_PASS: if (ni->ni_challenge != NULL) { - free(ni->ni_challenge, M_80211_NODE); + IEEE80211_FREE(ni->ni_challenge, M_80211_NODE); ni->ni_challenge = NULL; } if (status != 0) { @@ -1285,13 +1287,15 @@ startbgscan(struct ieee80211vap *vap) } static void -sta_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m0, - int subtype, int rssi, int nf) +sta_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m0, int subtype, + const struct ieee80211_rx_stats *rxs, + int rssi, int nf) { #define ISPROBE(_st) ((_st) == IEEE80211_FC0_SUBTYPE_PROBE_RESP) #define ISREASSOC(_st) ((_st) == IEEE80211_FC0_SUBTYPE_REASSOC_RESP) struct ieee80211vap *vap = ni->ni_vap; struct ieee80211com *ic = ni->ni_ic; + struct ieee80211_channel *rxchan = ic->ic_curchan; struct ieee80211_frame *wh; uint8_t *frm, *efrm; uint8_t *rates, *xrates, *wme, *htcap, *htinfo; @@ -1305,6 +1309,7 @@ sta_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m0, case IEEE80211_FC0_SUBTYPE_PROBE_RESP: case IEEE80211_FC0_SUBTYPE_BEACON: { struct ieee80211_scanparams scan; + struct ieee80211_channel *c; /* * We process beacon/probe response frames: * o when scanning, or @@ -1316,8 +1321,16 @@ sta_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m0, vap->iv_stats.is_rx_mgtdiscard++; return; } + + /* Override RX channel as appropriate */ + if (rxs != NULL) { + c = ieee80211_lookup_channel_rxstatus(vap, rxs); + if (c != NULL) + rxchan = c; + } + /* XXX probe response in sta mode when !scanning? */ - if (ieee80211_parse_beacon(ni, m0, &scan) != 0) { + if (ieee80211_parse_beacon(ni, m0, rxchan, &scan) != 0) { if (! (ic->ic_flags & IEEE80211_F_SCAN)) vap->iv_stats.is_beacon_bad++; return; @@ -1484,8 +1497,8 @@ sta_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m0, * our ap. */ if (ic->ic_flags & IEEE80211_F_SCAN) { - ieee80211_add_scan(vap, &scan, wh, - subtype, rssi, nf); + ieee80211_add_scan(vap, rxchan, + &scan, wh, subtype, rssi, nf); } else if (contbgscan(vap)) { ieee80211_bg_scan(vap, 0); } else if (startbgscan(vap)) { @@ -1529,7 +1542,8 @@ sta_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m0, ieee80211_probe_curchan(vap, 1); ic->ic_flags_ext &= ~IEEE80211_FEXT_PROBECHAN; } - ieee80211_add_scan(vap, &scan, wh, subtype, rssi, nf); + ieee80211_add_scan(vap, rxchan, &scan, wh, + subtype, rssi, nf); return; } break; diff --git a/sys/net80211/ieee80211_superg.c b/sys/net80211/ieee80211_superg.c index 81a4b43075f3..2e2bbd18be84 100644 --- a/sys/net80211/ieee80211_superg.c +++ b/sys/net80211/ieee80211_superg.c @@ -100,9 +100,9 @@ ieee80211_superg_attach(struct ieee80211com *ic) struct ieee80211_superg *sg; if (ic->ic_caps & IEEE80211_C_FF) { - sg = (struct ieee80211_superg *) malloc( + sg = (struct ieee80211_superg *) IEEE80211_MALLOC( sizeof(struct ieee80211_superg), M_80211_VAP, - M_NOWAIT | M_ZERO); + IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (sg == NULL) { printf("%s: cannot allocate SuperG state block\n", __func__); @@ -117,7 +117,7 @@ void ieee80211_superg_detach(struct ieee80211com *ic) { if (ic->ic_superg != NULL) { - free(ic->ic_superg, M_80211_VAP); + IEEE80211_FREE(ic->ic_superg, M_80211_VAP); ic->ic_superg = NULL; } } diff --git a/sys/net80211/ieee80211_tdma.c b/sys/net80211/ieee80211_tdma.c index 08acc3897c51..278decf97b9a 100644 --- a/sys/net80211/ieee80211_tdma.c +++ b/sys/net80211/ieee80211_tdma.c @@ -115,7 +115,7 @@ static void tdma_vdetach(struct ieee80211vap *vap); static int tdma_newstate(struct ieee80211vap *, enum ieee80211_state, int); static void tdma_beacon_miss(struct ieee80211vap *vap); static void tdma_recv_mgmt(struct ieee80211_node *, struct mbuf *, - int subtype, int rssi, int nf); + int subtype, const struct ieee80211_rx_stats *rxs, int rssi, int nf); static int tdma_update(struct ieee80211vap *vap, const struct ieee80211_tdma_param *tdma, struct ieee80211_node *ni, int pickslot); @@ -149,8 +149,9 @@ ieee80211_tdma_vattach(struct ieee80211vap *vap) KASSERT(vap->iv_caps & IEEE80211_C_TDMA, ("not a tdma vap, caps 0x%x", vap->iv_caps)); - ts = (struct ieee80211_tdma_state *) malloc( - sizeof(struct ieee80211_tdma_state), M_80211_VAP, M_NOWAIT | M_ZERO); + ts = (struct ieee80211_tdma_state *) IEEE80211_MALLOC( + sizeof(struct ieee80211_tdma_state), M_80211_VAP, + IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); if (ts == NULL) { printf("%s: cannot allocate TDMA state block\n", __func__); /* NB: fall back to adhdemo mode */ @@ -199,7 +200,7 @@ tdma_vdetach(struct ieee80211vap *vap) return; } ts->tdma_opdetach(vap); - free(vap->iv_tdma, M_80211_VAP); + IEEE80211_FREE(vap->iv_tdma, M_80211_VAP); vap->iv_tdma = NULL; setackpolicy(vap->iv_ic, 0); /* enable ACK's */ @@ -320,7 +321,7 @@ tdma_beacon_miss(struct ieee80211vap *vap) static void tdma_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m0, - int subtype, int rssi, int nf) + int subtype, const struct ieee80211_rx_stats *rxs, int rssi, int nf) { struct ieee80211com *ic = ni->ni_ic; struct ieee80211vap *vap = ni->ni_vap; @@ -331,7 +332,8 @@ tdma_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m0, struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *); struct ieee80211_scanparams scan; - if (ieee80211_parse_beacon(ni, m0, &scan) != 0) + /* XXX TODO: use rxstatus to determine off-channel beacons */ + if (ieee80211_parse_beacon(ni, m0, ic->ic_curchan, &scan) != 0) return; if (scan.tdma == NULL) { /* @@ -391,7 +393,7 @@ tdma_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m0, * 2x parsing of the frame but should happen infrequently */ } - ts->tdma_recv_mgmt(ni, m0, subtype, rssi, nf); + ts->tdma_recv_mgmt(ni, m0, subtype, rxs, rssi, nf); } /* diff --git a/sys/net80211/ieee80211_tdma.h b/sys/net80211/ieee80211_tdma.h index 2fe591f73e3e..76b9ed1c3b00 100644 --- a/sys/net80211/ieee80211_tdma.h +++ b/sys/net80211/ieee80211_tdma.h @@ -81,7 +81,8 @@ struct ieee80211_tdma_state { int (*tdma_newstate)(struct ieee80211vap *, enum ieee80211_state, int arg); void (*tdma_recv_mgmt)(struct ieee80211_node *, - struct mbuf *, int, int, int); + struct mbuf *, int, + const struct ieee80211_rx_stats *rxs, int, int); void (*tdma_opdetach)(struct ieee80211vap *); }; diff --git a/sys/net80211/ieee80211_var.h b/sys/net80211/ieee80211_var.h index 471069702324..ec21a0c5c573 100644 --- a/sys/net80211/ieee80211_var.h +++ b/sys/net80211/ieee80211_var.h @@ -117,6 +117,8 @@ struct ieee80211_frame; struct ieee80211com { struct ifnet *ic_ifp; /* associated device */ + void *ic_softc; /* driver softc */ + const char *ic_name; /* usually device name */ ieee80211_com_lock_t ic_comlock; /* state update lock */ ieee80211_tx_lock_t ic_txlock; /* ic/vap TX lock */ TAILQ_HEAD(, ieee80211vap) ic_vaps; /* list of vap instances */ @@ -133,6 +135,9 @@ struct ieee80211com { struct task ic_bmiss_task; /* deferred beacon miss hndlr */ struct task ic_chw_task; /* deferred HT CHW update */ + counter_u64_t ic_ierrors; /* input errors */ + counter_u64_t ic_oerrors; /* output errors */ + uint32_t ic_flags; /* state flags */ uint32_t ic_flags_ext; /* extended state flags */ uint32_t ic_flags_ht; /* HT state flags */ @@ -256,11 +261,11 @@ struct ieee80211com { struct mbuf *, const struct ieee80211_bpf_params *); /* update device state for 802.11 slot time change */ - void (*ic_updateslot)(struct ifnet *); + void (*ic_updateslot)(struct ieee80211com *); /* handle multicast state changes */ - void (*ic_update_mcast)(struct ifnet *); + void (*ic_update_mcast)(struct ieee80211com *); /* handle promiscuous mode changes */ - void (*ic_update_promisc)(struct ifnet *); + void (*ic_update_promisc)(struct ieee80211com *); /* new station association callback/notification */ void (*ic_newassoc)(struct ieee80211_node *, int); /* TDMA update notification */ @@ -466,9 +471,13 @@ struct ieee80211vap { void (*iv_opdetach)(struct ieee80211vap *); /* receive processing */ int (*iv_input)(struct ieee80211_node *, - struct mbuf *, int, int); + struct mbuf *, + const struct ieee80211_rx_stats *, + int, int); void (*iv_recv_mgmt)(struct ieee80211_node *, - struct mbuf *, int, int, int); + struct mbuf *, int, + const struct ieee80211_rx_stats *, + int, int); void (*iv_recv_ctl)(struct ieee80211_node *, struct mbuf *, int); void (*iv_deliver_data)(struct ieee80211vap *, @@ -496,13 +505,8 @@ struct ieee80211vap { int (*iv_newstate)(struct ieee80211vap *, enum ieee80211_state, int); /* 802.3 output method for raw frame xmit */ -#if __FreeBSD_version >= 1000031 int (*iv_output)(struct ifnet *, struct mbuf *, const struct sockaddr *, struct route *); -#else - int (*iv_output)(struct ifnet *, struct mbuf *, - struct sockaddr *, struct route *); -#endif uint64_t iv_spare[6]; }; MALLOC_DECLARE(M_80211_VAP); @@ -675,6 +679,7 @@ MALLOC_DECLARE(M_80211_VAP); "\20\1LDPC\2CHWIDTH40\5GREENFIELD\6SHORTGI20\7SHORTGI40\10TXSTBC" \ "\21AMPDU\22AMSDU\23HT\24SMPS\25RIFS" +int ic_printf(struct ieee80211com *, const char *, ...) __printflike(2, 3); void ieee80211_ifattach(struct ieee80211com *, const uint8_t macaddr[IEEE80211_ADDR_LEN]); void ieee80211_ifdetach(struct ieee80211com *); @@ -707,6 +712,8 @@ struct ieee80211_channel *ieee80211_find_channel(struct ieee80211com *, int freq, int flags); struct ieee80211_channel *ieee80211_find_channel_byieee(struct ieee80211com *, int ieee, int flags); +struct ieee80211_channel *ieee80211_lookup_channel_rxstatus(struct ieee80211vap *, + const struct ieee80211_rx_stats *); int ieee80211_setmode(struct ieee80211com *, enum ieee80211_phymode); enum ieee80211_phymode ieee80211_chan2mode(const struct ieee80211_channel *); uint32_t ieee80211_mac_hash(const struct ieee80211com *, diff --git a/sys/net80211/ieee80211_wds.c b/sys/net80211/ieee80211_wds.c index ec1bd856062c..1d3f30a7a48e 100644 --- a/sys/net80211/ieee80211_wds.c +++ b/sys/net80211/ieee80211_wds.c @@ -64,9 +64,10 @@ __FBSDID("$FreeBSD$"); static void wds_vattach(struct ieee80211vap *); static int wds_newstate(struct ieee80211vap *, enum ieee80211_state, int); -static int wds_input(struct ieee80211_node *ni, struct mbuf *m, int, int); -static void wds_recv_mgmt(struct ieee80211_node *, struct mbuf *, - int subtype, int, int); +static int wds_input(struct ieee80211_node *ni, struct mbuf *m, + const struct ieee80211_rx_stats *rxs, int, int); +static void wds_recv_mgmt(struct ieee80211_node *, struct mbuf *, int subtype, + const struct ieee80211_rx_stats *, int, int); void ieee80211_wds_attach(struct ieee80211com *ic) @@ -301,8 +302,12 @@ ieee80211_dwds_mcast(struct ieee80211vap *vap0, struct mbuf *m) /* NB: IFQ_HANDOFF reclaims mbuf */ if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); ieee80211_free_node(ni); - } else + } else { if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); + if_inc_counter(ifp, IFCOUNTER_OMCASTS, 1); + if_inc_counter(ifp, IFCOUNTER_OBYTES, + m->m_pkthdr.len); + } } } @@ -404,9 +409,9 @@ wds_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) * by the 802.11 layer. */ static int -wds_input(struct ieee80211_node *ni, struct mbuf *m, int rssi, int nf) +wds_input(struct ieee80211_node *ni, struct mbuf *m, + const struct ieee80211_rx_stats *rxs, int rssi, int nf) { -#define HAS_SEQ(type) ((type & 0x4) == 0) struct ieee80211vap *vap = ni->ni_vap; struct ieee80211com *ic = ni->ni_ic; struct ifnet *ifp = vap->iv_ifp; @@ -488,7 +493,7 @@ wds_input(struct ieee80211_node *ni, struct mbuf *m, int rssi, int nf) } IEEE80211_RSSI_LPF(ni->ni_avgrssi, rssi); ni->ni_noise = nf; - if (HAS_SEQ(type)) { + if (IEEE80211_HAS_SEQ(type, subtype)) { uint8_t tid = ieee80211_gettid(wh); if (IEEE80211_QOS_HAS_SEQ(wh) && TID_TO_WME_AC(tid) >= WME_AC_VI) @@ -715,7 +720,7 @@ wds_input(struct ieee80211_node *ni, struct mbuf *m, int rssi, int nf) vap->iv_stats.is_rx_mgtdiscard++; /* XXX */ goto out; } - vap->iv_recv_mgmt(ni, m, subtype, rssi, nf); + vap->iv_recv_mgmt(ni, m, subtype, rxs, rssi, nf); goto out; case IEEE80211_FC0_TYPE_CTL: @@ -741,8 +746,8 @@ wds_input(struct ieee80211_node *ni, struct mbuf *m, int rssi, int nf) } static void -wds_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m0, - int subtype, int rssi, int nf) +wds_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m0, int subtype, + const struct ieee80211_rx_stats *rxs, int rssi, int nf) { struct ieee80211vap *vap = ni->ni_vap; struct ieee80211com *ic = ni->ni_ic; diff --git a/sys/netgraph/netflow/ng_netflow.c b/sys/netgraph/netflow/ng_netflow.c index 7b23e6187d09..b5a82a418022 100644 --- a/sys/netgraph/netflow/ng_netflow.c +++ b/sys/netgraph/netflow/ng_netflow.c @@ -259,7 +259,7 @@ ng_netflow_constructor(node_p node) priv->ifaces[i].info.conf = NG_NETFLOW_CONF_INGRESS; /* Initialize callout handle */ - callout_init(&priv->exp_callout, CALLOUT_MPSAFE); + callout_init(&priv->exp_callout, 1); /* Allocate memory and set up flow cache */ ng_netflow_cache_init(priv); diff --git a/sys/netgraph/netgraph.h b/sys/netgraph/netgraph.h index dc008f446df0..9fc8986b2cdb 100644 --- a/sys/netgraph/netgraph.h +++ b/sys/netgraph/netgraph.h @@ -1161,7 +1161,7 @@ int ng_send_fn2(node_p node, hook_p hook, item_p pitem, ng_item_fn2 *fn, int ng_uncallout(struct callout *c, node_p node); int ng_callout(struct callout *c, node_p node, hook_p hook, int ticks, ng_item_fn *fn, void * arg1, int arg2); -#define ng_callout_init(c) callout_init(c, CALLOUT_MPSAFE) +#define ng_callout_init(c) callout_init(c, 1) /* Flags for netgraph functions. */ #define NG_NOFLAGS 0x00000000 /* no special options */ diff --git a/sys/netinet/in_gif.c b/sys/netinet/in_gif.c index cd412adc0c95..e634987cf4c9 100644 --- a/sys/netinet/in_gif.c +++ b/sys/netinet/in_gif.c @@ -168,13 +168,19 @@ in_gif_input(struct mbuf **mp, int *offp, int proto) static int gif_validate4(const struct ip *ip, struct gif_softc *sc, struct ifnet *ifp) { + int ret; GIF_RLOCK_ASSERT(sc); /* check for address match */ - if (sc->gif_iphdr->ip_src.s_addr != ip->ip_dst.s_addr || - sc->gif_iphdr->ip_dst.s_addr != ip->ip_src.s_addr) + if (sc->gif_iphdr->ip_src.s_addr != ip->ip_dst.s_addr) return (0); + ret = 32; + if (sc->gif_iphdr->ip_dst.s_addr != ip->ip_src.s_addr) { + if ((sc->gif_options & GIF_IGNORE_SOURCE) == 0) + return (0); + } else + ret += 32; /* martian filters on outer source - NOT done in ip_input! */ if (IN_MULTICAST(ntohl(ip->ip_src.s_addr))) @@ -205,7 +211,7 @@ gif_validate4(const struct ip *ip, struct gif_softc *sc, struct ifnet *ifp) } RTFREE_LOCKED(rt); } - return (32 * 2); + return (ret); } /* diff --git a/sys/netinet/in_pcb.c b/sys/netinet/in_pcb.c index f8f290558ba6..bc48e105f69b 100644 --- a/sys/netinet/in_pcb.c +++ b/sys/netinet/in_pcb.c @@ -2249,7 +2249,7 @@ ipport_tick_init(const void *unused __unused) { /* Start ipport_tick. */ - callout_init(&ipport_tick_callout, CALLOUT_MPSAFE); + callout_init(&ipport_tick_callout, 1); callout_reset(&ipport_tick_callout, 1, ipport_tick, NULL); EVENTHANDLER_REGISTER(shutdown_pre_sync, ip_fini, NULL, SHUTDOWN_PRI_DEFAULT); diff --git a/sys/netinet/ip_mroute.c b/sys/netinet/ip_mroute.c index a71e91c42b26..ffa88ae43ac0 100644 --- a/sys/netinet/ip_mroute.c +++ b/sys/netinet/ip_mroute.c @@ -2816,9 +2816,9 @@ vnet_mroute_init(const void *unused __unused) MALLOC(V_nexpire, u_char *, mfchashsize, M_MRTABLE, M_WAITOK|M_ZERO); bzero(V_bw_meter_timers, sizeof(V_bw_meter_timers)); - callout_init(&V_expire_upcalls_ch, CALLOUT_MPSAFE); - callout_init(&V_bw_upcalls_ch, CALLOUT_MPSAFE); - callout_init(&V_bw_meter_ch, CALLOUT_MPSAFE); + callout_init(&V_expire_upcalls_ch, 1); + callout_init(&V_bw_upcalls_ch, 1); + callout_init(&V_bw_meter_ch, 1); } VNET_SYSINIT(vnet_mroute_init, SI_SUB_PSEUDO, SI_ORDER_ANY, vnet_mroute_init, diff --git a/sys/netinet/sctp_asconf.c b/sys/netinet/sctp_asconf.c index 456990019c2f..10bb0a26f471 100644 --- a/sys/netinet/sctp_asconf.c +++ b/sys/netinet/sctp_asconf.c @@ -555,7 +555,9 @@ sctp_process_asconf_set_primary(struct sockaddr *src, (stcb->asoc.primary_destination->dest_state & SCTP_ADDR_UNCONFIRMED) == 0) { - sctp_timer_stop(SCTP_TIMER_TYPE_PRIM_DELETED, stcb->sctp_ep, stcb, NULL, SCTP_FROM_SCTP_TIMER + SCTP_LOC_7); + sctp_timer_stop(SCTP_TIMER_TYPE_PRIM_DELETED, + stcb->sctp_ep, stcb, NULL, + SCTP_FROM_SCTP_ASCONF + SCTP_LOC_1); if (sctp_is_mobility_feature_on(stcb->sctp_ep, SCTP_MOBILITY_FASTHANDOFF)) { sctp_assoc_immediate_retrans(stcb, @@ -991,7 +993,7 @@ sctp_assoc_immediate_retrans(struct sctp_tcb *stcb, struct sctp_nets *dstnet) SCTPDBG_ADDR(SCTP_DEBUG_ASCONF1, &stcb->asoc.primary_destination->ro._l_addr.sa); sctp_timer_stop(SCTP_TIMER_TYPE_SEND, stcb->sctp_ep, stcb, stcb->asoc.deleted_primary, - SCTP_FROM_SCTP_TIMER + SCTP_LOC_8); + SCTP_FROM_SCTP_ASCONF + SCTP_LOC_3); stcb->asoc.num_send_timers_up--; if (stcb->asoc.num_send_timers_up < 0) { stcb->asoc.num_send_timers_up = 0; @@ -1030,7 +1032,7 @@ sctp_net_immediate_retrans(struct sctp_tcb *stcb, struct sctp_nets *net) SCTPDBG(SCTP_DEBUG_ASCONF1, "net_immediate_retrans: RTO is %d\n", net->RTO); sctp_timer_stop(SCTP_TIMER_TYPE_SEND, stcb->sctp_ep, stcb, net, - SCTP_FROM_SCTP_TIMER + SCTP_LOC_5); + SCTP_FROM_SCTP_ASCONF + SCTP_LOC_4); stcb->asoc.cc_functions.sctp_set_initial_cc_param(stcb, net); net->error_count = 0; TAILQ_FOREACH(chk, &stcb->asoc.sent_queue, sctp_next) { @@ -1684,7 +1686,7 @@ sctp_handle_asconf_ack(struct mbuf *m, int offset, if (serial_num == asoc->asconf_seq_out - 1) { /* stop our timer */ sctp_timer_stop(SCTP_TIMER_TYPE_ASCONF, stcb->sctp_ep, stcb, net, - SCTP_FROM_SCTP_ASCONF + SCTP_LOC_3); + SCTP_FROM_SCTP_ASCONF + SCTP_LOC_5); } /* process the ASCONF-ACK contents */ ack_length = ntohs(cp->ch.chunk_length) - diff --git a/sys/netinet/sctp_cc_functions.c b/sys/netinet/sctp_cc_functions.c index 17a897b93d45..d616d1949496 100644 --- a/sys/netinet/sctp_cc_functions.c +++ b/sys/netinet/sctp_cc_functions.c @@ -226,7 +226,8 @@ sctp_cwnd_update_after_fr(struct sctp_tcb *stcb, } sctp_timer_stop(SCTP_TIMER_TYPE_SEND, - stcb->sctp_ep, stcb, net, SCTP_FROM_SCTP_INDATA + SCTP_LOC_32); + stcb->sctp_ep, stcb, net, + SCTP_FROM_SCTP_CC_FUNCTIONS + SCTP_LOC_1); sctp_timer_start(SCTP_TIMER_TYPE_SEND, stcb->sctp_ep, stcb, net); } @@ -1732,7 +1733,8 @@ sctp_hs_cwnd_update_after_fr(struct sctp_tcb *stcb, } sctp_timer_stop(SCTP_TIMER_TYPE_SEND, - stcb->sctp_ep, stcb, net, SCTP_FROM_SCTP_INDATA + SCTP_LOC_32); + stcb->sctp_ep, stcb, net, + SCTP_FROM_SCTP_CC_FUNCTIONS + SCTP_LOC_2); sctp_timer_start(SCTP_TIMER_TYPE_SEND, stcb->sctp_ep, stcb, net); } @@ -2264,7 +2266,8 @@ sctp_htcp_cwnd_update_after_fr(struct sctp_tcb *stcb, } sctp_timer_stop(SCTP_TIMER_TYPE_SEND, - stcb->sctp_ep, stcb, net, SCTP_FROM_SCTP_INDATA + SCTP_LOC_32); + stcb->sctp_ep, stcb, net, + SCTP_FROM_SCTP_CC_FUNCTIONS + SCTP_LOC_3); sctp_timer_start(SCTP_TIMER_TYPE_SEND, stcb->sctp_ep, stcb, net); } diff --git a/sys/netinet/sctp_constants.h b/sys/netinet/sctp_constants.h index de451651a6a6..d90bd2502ad4 100644 --- a/sys/netinet/sctp_constants.h +++ b/sys/netinet/sctp_constants.h @@ -765,18 +765,19 @@ __FBSDID("$FreeBSD$"); */ /* File defines */ -#define SCTP_FROM_SCTP_INPUT 0x10000000 -#define SCTP_FROM_SCTP_PCB 0x20000000 -#define SCTP_FROM_SCTP_INDATA 0x30000000 -#define SCTP_FROM_SCTP_TIMER 0x40000000 -#define SCTP_FROM_SCTP_USRREQ 0x50000000 -#define SCTP_FROM_SCTPUTIL 0x60000000 -#define SCTP_FROM_SCTP6_USRREQ 0x70000000 -#define SCTP_FROM_SCTP_ASCONF 0x80000000 -#define SCTP_FROM_SCTP_OUTPUT 0x90000000 -#define SCTP_FROM_SCTP_PEELOFF 0xa0000000 -#define SCTP_FROM_SCTP_PANDA 0xb0000000 -#define SCTP_FROM_SCTP_SYSCTL 0xc0000000 +#define SCTP_FROM_SCTP_INPUT 0x10000000 +#define SCTP_FROM_SCTP_PCB 0x20000000 +#define SCTP_FROM_SCTP_INDATA 0x30000000 +#define SCTP_FROM_SCTP_TIMER 0x40000000 +#define SCTP_FROM_SCTP_USRREQ 0x50000000 +#define SCTP_FROM_SCTPUTIL 0x60000000 +#define SCTP_FROM_SCTP6_USRREQ 0x70000000 +#define SCTP_FROM_SCTP_ASCONF 0x80000000 +#define SCTP_FROM_SCTP_OUTPUT 0x90000000 +#define SCTP_FROM_SCTP_PEELOFF 0xa0000000 +#define SCTP_FROM_SCTP_PANDA 0xb0000000 +#define SCTP_FROM_SCTP_SYSCTL 0xc0000000 +#define SCTP_FROM_SCTP_CC_FUNCTIONS 0xd0000000 /* Location ID's */ #define SCTP_LOC_1 0x00000001 @@ -812,6 +813,8 @@ __FBSDID("$FreeBSD$"); #define SCTP_LOC_31 0x0000001f #define SCTP_LOC_32 0x00000020 #define SCTP_LOC_33 0x00000021 +#define SCTP_LOC_34 0x00000022 +#define SCTP_LOC_35 0x00000023 /* Free assoc codes */ diff --git a/sys/netinet/sctp_indata.c b/sys/netinet/sctp_indata.c index d3b485560305..50a662864a02 100644 --- a/sys/netinet/sctp_indata.c +++ b/sys/netinet/sctp_indata.c @@ -1034,7 +1034,7 @@ sctp_queue_data_for_reasm(struct sctp_tcb *stcb, struct sctp_association *asoc, chk->rec.data.TSN_seq, (chk->rec.data.rcv_flags & SCTP_DATA_UNORDERED) ? 1 : 0); op_err = sctp_generate_cause(SCTP_CAUSE_PROTOCOL_VIOLATION, msg); - stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_7; + stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_8; sctp_abort_an_association(stcb->sctp_ep, stcb, op_err, SCTP_SO_NOT_LOCKED); *abort_flag = 1; return; @@ -1056,7 +1056,7 @@ sctp_queue_data_for_reasm(struct sctp_tcb *stcb, struct sctp_association *asoc, chk->rec.data.stream_number, chk->rec.data.stream_seq); op_err = sctp_generate_cause(SCTP_CAUSE_PROTOCOL_VIOLATION, msg); - stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_8; + stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_9; sctp_abort_an_association(stcb->sctp_ep, stcb, op_err, SCTP_SO_NOT_LOCKED); *abort_flag = 1; return; @@ -1073,7 +1073,7 @@ sctp_queue_data_for_reasm(struct sctp_tcb *stcb, struct sctp_association *asoc, chk->rec.data.stream_number, chk->rec.data.stream_seq); op_err = sctp_generate_cause(SCTP_CAUSE_PROTOCOL_VIOLATION, msg); - stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_9; + stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_10; sctp_abort_an_association(stcb->sctp_ep, stcb, op_err, SCTP_SO_NOT_LOCKED); *abort_flag = 1; return; @@ -1100,7 +1100,7 @@ sctp_queue_data_for_reasm(struct sctp_tcb *stcb, struct sctp_association *asoc, chk->rec.data.stream_number, chk->rec.data.stream_seq); op_err = sctp_generate_cause(SCTP_CAUSE_PROTOCOL_VIOLATION, msg); - stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_10; + stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_11; sctp_abort_an_association(stcb->sctp_ep, stcb, op_err, SCTP_SO_NOT_LOCKED); *abort_flag = 1; return; @@ -1123,7 +1123,7 @@ sctp_queue_data_for_reasm(struct sctp_tcb *stcb, struct sctp_association *asoc, chk->rec.data.stream_number, chk->rec.data.stream_seq); op_err = sctp_generate_cause(SCTP_CAUSE_PROTOCOL_VIOLATION, msg); - stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_11; + stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_12; sctp_abort_an_association(stcb->sctp_ep, stcb, op_err, SCTP_SO_NOT_LOCKED); *abort_flag = 1; return; @@ -1144,7 +1144,7 @@ sctp_queue_data_for_reasm(struct sctp_tcb *stcb, struct sctp_association *asoc, chk->rec.data.stream_number, chk->rec.data.stream_seq); op_err = sctp_generate_cause(SCTP_CAUSE_PROTOCOL_VIOLATION, msg); - stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_12; + stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_13; sctp_abort_an_association(stcb->sctp_ep, stcb, op_err, SCTP_SO_NOT_LOCKED); *abort_flag = 1; return; @@ -1162,7 +1162,7 @@ sctp_queue_data_for_reasm(struct sctp_tcb *stcb, struct sctp_association *asoc, chk->rec.data.TSN_seq, (chk->rec.data.rcv_flags & SCTP_DATA_UNORDERED) ? 1 : 0); op_err = sctp_generate_cause(SCTP_CAUSE_PROTOCOL_VIOLATION, msg); - stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_12; + stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_14; sctp_abort_an_association(stcb->sctp_ep, stcb, op_err, SCTP_SO_NOT_LOCKED); *abort_flag = 1; return; @@ -1184,7 +1184,7 @@ sctp_queue_data_for_reasm(struct sctp_tcb *stcb, struct sctp_association *asoc, chk->rec.data.stream_number, chk->rec.data.stream_seq); op_err = sctp_generate_cause(SCTP_CAUSE_PROTOCOL_VIOLATION, msg); - stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_13; + stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_15; sctp_abort_an_association(stcb->sctp_ep, stcb, op_err, SCTP_SO_NOT_LOCKED); *abort_flag = 1; return; @@ -1476,7 +1476,7 @@ sctp_process_a_data_chunk(struct sctp_tcb *stcb, struct sctp_association *asoc, asoc->strmin[strmno].last_sequence_delivered, tsn, strmno, strmseq); op_err = sctp_generate_cause(SCTP_CAUSE_PROTOCOL_VIOLATION, msg); - stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_14; + stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_16; sctp_abort_an_association(stcb->sctp_ep, stcb, op_err, SCTP_SO_NOT_LOCKED); *abort_flag = 1; return (0); @@ -1713,7 +1713,7 @@ sctp_process_a_data_chunk(struct sctp_tcb *stcb, struct sctp_association *asoc, snprintf(msg, sizeof(msg), "Reas. queue emtpy, got TSN=%8.8x, SID=%4.4x, SSN=%4.4x", tsn, strmno, strmseq); op_err = sctp_generate_cause(SCTP_CAUSE_PROTOCOL_VIOLATION, msg); - stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_15; + stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_17; sctp_abort_an_association(stcb->sctp_ep, stcb, op_err, SCTP_SO_NOT_LOCKED); *abort_flag = 1; if (last_chunk) { @@ -1732,7 +1732,7 @@ sctp_process_a_data_chunk(struct sctp_tcb *stcb, struct sctp_association *asoc, snprintf(msg, sizeof(msg), "PD ongoing, got TSN=%8.8x, SID=%4.4x, SSN=%4.4x", tsn, strmno, strmseq); op_err = sctp_generate_cause(SCTP_CAUSE_PROTOCOL_VIOLATION, msg); - stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_16; + stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_18; sctp_abort_an_association(stcb->sctp_ep, stcb, op_err, SCTP_SO_NOT_LOCKED); *abort_flag = 1; if (last_chunk) { @@ -1761,7 +1761,7 @@ sctp_process_a_data_chunk(struct sctp_tcb *stcb, struct sctp_association *asoc, snprintf(msg, sizeof(msg), "No PD ongoing, got TSN=%8.8x, SID=%4.4x, SSN=%4.4x", tsn, strmno, strmseq); op_err = sctp_generate_cause(SCTP_CAUSE_PROTOCOL_VIOLATION, msg); - stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_17; + stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_19; sctp_abort_an_association(stcb->sctp_ep, stcb, op_err, SCTP_SO_NOT_LOCKED); *abort_flag = 1; if (last_chunk) { @@ -2159,7 +2159,8 @@ sctp_sack_check(struct sctp_tcb *stcb, int was_a_gap) */ if (SCTP_OS_TIMER_PENDING(&stcb->asoc.dack_timer.timer)) { sctp_timer_stop(SCTP_TIMER_TYPE_RECV, - stcb->sctp_ep, stcb, NULL, SCTP_FROM_SCTP_INDATA + SCTP_LOC_18); + stcb->sctp_ep, stcb, NULL, + SCTP_FROM_SCTP_INDATA + SCTP_LOC_20); } sctp_send_shutdown(stcb, ((stcb->asoc.alternate) ? stcb->asoc.alternate : stcb->asoc.primary_destination)); @@ -2382,7 +2383,7 @@ sctp_process_data(struct mbuf **mm, int iphlen, int *offset, int length, snprintf(msg, sizeof(msg), "DATA chunk of length %d", chk_length); op_err = sctp_generate_cause(SCTP_CAUSE_PROTOCOL_VIOLATION, msg); - stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_19; + stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_21; sctp_abort_association(inp, stcb, m, iphlen, src, dst, sh, op_err, mflowtype, mflowid, @@ -2397,7 +2398,7 @@ sctp_process_data(struct mbuf **mm, int iphlen, int *offset, int length, struct mbuf *op_err; op_err = sctp_generate_no_user_data_cause(ch->dp.tsn); - stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_19; + stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_22; sctp_abort_association(inp, stcb, m, iphlen, src, dst, sh, op_err, mflowtype, mflowid, @@ -3462,12 +3463,18 @@ sctp_fs_audit(struct sctp_association *asoc) { struct sctp_tmit_chunk *chk; int inflight = 0, resend = 0, inbetween = 0, acked = 0, above = 0; - int entry_flight, entry_cnt, ret; + int ret; +#ifndef INVARIANTS + int entry_flight, entry_cnt; + +#endif + + ret = 0; +#ifndef INVARIANTS entry_flight = asoc->total_flight; entry_cnt = asoc->total_flight_count; - ret = 0; - +#endif if (asoc->pr_sctp_cnt >= asoc->sent_queue_cnt) return (0); @@ -3622,7 +3629,7 @@ sctp_express_handle_sack(struct sctp_tcb *stcb, uint32_t cumack, snprintf(msg, sizeof(msg), "Cum ack %8.8x greater or equal than TSN %8.8x", cumack, send_s); op_err = sctp_generate_cause(SCTP_CAUSE_PROTOCOL_VIOLATION, msg); - stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_25; + stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_23; sctp_abort_an_association(stcb->sctp_ep, stcb, op_err, SCTP_SO_NOT_LOCKED); return; } @@ -3818,7 +3825,9 @@ sctp_express_handle_sack(struct sctp_tcb *stcb, uint32_t cumack, } if (net->dest_state & SCTP_ADDR_PF) { net->dest_state &= ~SCTP_ADDR_PF; - sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, stcb->sctp_ep, stcb, net, SCTP_FROM_SCTP_INPUT + SCTP_LOC_3); + sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, + stcb->sctp_ep, stcb, net, + SCTP_FROM_SCTP_INDATA + SCTP_LOC_24); sctp_timer_start(SCTP_TIMER_TYPE_HEARTBEAT, stcb->sctp_ep, stcb, net); asoc->cc_functions.sctp_cwnd_update_exit_pf(stcb, net); /* Done with this net */ @@ -3904,7 +3913,7 @@ sctp_express_handle_sack(struct sctp_tcb *stcb, uint32_t cumack, } else if (SCTP_OS_TIMER_PENDING(&net->rxt_timer.timer)) { sctp_timer_stop(SCTP_TIMER_TYPE_SEND, stcb->sctp_ep, stcb, net, - SCTP_FROM_SCTP_INDATA + SCTP_LOC_22); + SCTP_FROM_SCTP_INDATA + SCTP_LOC_25); } } } @@ -3978,7 +3987,7 @@ sctp_express_handle_sack(struct sctp_tcb *stcb, uint32_t cumack, *abort_now = 1; /* XXX */ op_err = sctp_generate_cause(SCTP_CAUSE_USER_INITIATED_ABT, ""); - stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_24; + stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_26; sctp_abort_an_association(stcb->sctp_ep, stcb, op_err, SCTP_SO_NOT_LOCKED); } else { struct sctp_nets *netp; @@ -4191,7 +4200,7 @@ sctp_handle_sack(struct mbuf *m, int offset_seg, int offset_dup, snprintf(msg, sizeof(msg), "Cum ack %8.8x greater or equal than TSN %8.8x", cum_ack, send_s); op_err = sctp_generate_cause(SCTP_CAUSE_PROTOCOL_VIOLATION, msg); - stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_25; + stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_27; sctp_abort_an_association(stcb->sctp_ep, stcb, op_err, SCTP_SO_NOT_LOCKED); return; } @@ -4223,7 +4232,7 @@ sctp_handle_sack(struct mbuf *m, int offset_seg, int offset_dup, /* stop any timers */ TAILQ_FOREACH(net, &asoc->nets, sctp_next) { sctp_timer_stop(SCTP_TIMER_TYPE_SEND, stcb->sctp_ep, - stcb, net, SCTP_FROM_SCTP_INDATA + SCTP_LOC_26); + stcb, net, SCTP_FROM_SCTP_INDATA + SCTP_LOC_28); net->partial_bytes_acked = 0; net->flight_size = 0; } @@ -4428,14 +4437,14 @@ sctp_handle_sack(struct mbuf *m, int offset_seg, int offset_dup, if (net->new_pseudo_cumack) sctp_timer_stop(SCTP_TIMER_TYPE_SEND, stcb->sctp_ep, stcb, net, - SCTP_FROM_SCTP_INDATA + SCTP_LOC_27); + SCTP_FROM_SCTP_INDATA + SCTP_LOC_29); } } else { if (accum_moved) { TAILQ_FOREACH(net, &asoc->nets, sctp_next) { sctp_timer_stop(SCTP_TIMER_TYPE_SEND, stcb->sctp_ep, - stcb, net, SCTP_FROM_SCTP_INDATA + SCTP_LOC_28); + stcb, net, SCTP_FROM_SCTP_INDATA + SCTP_LOC_30); } } } @@ -4608,7 +4617,9 @@ sctp_handle_sack(struct mbuf *m, int offset_seg, int offset_dup, } if (net->dest_state & SCTP_ADDR_PF) { net->dest_state &= ~SCTP_ADDR_PF; - sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, stcb->sctp_ep, stcb, net, SCTP_FROM_SCTP_INPUT + SCTP_LOC_3); + sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, + stcb->sctp_ep, stcb, net, + SCTP_FROM_SCTP_INDATA + SCTP_LOC_31); sctp_timer_start(SCTP_TIMER_TYPE_HEARTBEAT, stcb->sctp_ep, stcb, net); asoc->cc_functions.sctp_cwnd_update_exit_pf(stcb, net); /* Done with this net */ @@ -4631,7 +4642,8 @@ sctp_handle_sack(struct mbuf *m, int offset_seg, int offset_dup, TAILQ_FOREACH(net, &asoc->nets, sctp_next) { /* stop all timers */ sctp_timer_stop(SCTP_TIMER_TYPE_SEND, stcb->sctp_ep, - stcb, net, SCTP_FROM_SCTP_INDATA + SCTP_LOC_30); + stcb, net, + SCTP_FROM_SCTP_INDATA + SCTP_LOC_32); net->flight_size = 0; net->partial_bytes_acked = 0; } @@ -4687,7 +4699,7 @@ sctp_handle_sack(struct mbuf *m, int offset_seg, int offset_dup, *abort_now = 1; /* XXX */ op_err = sctp_generate_cause(SCTP_CAUSE_USER_INITIATED_ABT, ""); - stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_31; + stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_33; sctp_abort_an_association(stcb->sctp_ep, stcb, op_err, SCTP_SO_NOT_LOCKED); return; } else { @@ -4839,7 +4851,7 @@ sctp_handle_sack(struct mbuf *m, int offset_seg, int offset_dup, } else if (SCTP_OS_TIMER_PENDING(&net->rxt_timer.timer)) { sctp_timer_stop(SCTP_TIMER_TYPE_SEND, stcb->sctp_ep, stcb, net, - SCTP_FROM_SCTP_INDATA + SCTP_LOC_22); + SCTP_FROM_SCTP_INDATA + SCTP_LOC_34); } } } @@ -5129,7 +5141,7 @@ sctp_handle_forward_tsn(struct sctp_tcb *stcb, "New cum ack %8.8x too high, highest TSN %8.8x", new_cum_tsn, asoc->highest_tsn_inside_map); op_err = sctp_generate_cause(SCTP_CAUSE_PROTOCOL_VIOLATION, msg); - stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_33; + stcb->sctp_ep->last_abort_code = SCTP_FROM_SCTP_INDATA + SCTP_LOC_35; sctp_abort_an_association(stcb->sctp_ep, stcb, op_err, SCTP_SO_NOT_LOCKED); return; } diff --git a/sys/netinet/sctp_input.c b/sys/netinet/sctp_input.c index 4fab9866486d..89047cbd60c1 100644 --- a/sys/netinet/sctp_input.c +++ b/sys/netinet/sctp_input.c @@ -513,7 +513,7 @@ sctp_process_init_ack(struct mbuf *m, int iphlen, int offset, * primary. */ sctp_timer_stop(SCTP_TIMER_TYPE_INIT, stcb->sctp_ep, stcb, - asoc->primary_destination, SCTP_FROM_SCTP_INPUT + SCTP_LOC_4); + asoc->primary_destination, SCTP_FROM_SCTP_INPUT + SCTP_LOC_3); /* calculate the RTO */ net->RTO = sctp_calculate_rto(stcb, asoc, net, &asoc->time_entered, sctp_align_safe_nocopy, @@ -633,7 +633,8 @@ sctp_handle_heartbeat_ack(struct sctp_heartbeat_chunk *cp, } sctp_ulp_notify(SCTP_NOTIFY_INTERFACE_CONFIRMED, stcb, 0, (void *)r_net, SCTP_SO_NOT_LOCKED); - sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, stcb->sctp_ep, stcb, r_net, SCTP_FROM_SCTP_INPUT + SCTP_LOC_3); + sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, stcb->sctp_ep, stcb, + r_net, SCTP_FROM_SCTP_INPUT + SCTP_LOC_4); sctp_timer_start(SCTP_TIMER_TYPE_HEARTBEAT, stcb->sctp_ep, stcb, r_net); } old_error_counter = r_net->error_count; @@ -654,7 +655,8 @@ sctp_handle_heartbeat_ack(struct sctp_heartbeat_chunk *cp, stcb->asoc.cc_functions.sctp_cwnd_update_exit_pf(stcb, net); } if (old_error_counter > 0) { - sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, stcb->sctp_ep, stcb, r_net, SCTP_FROM_SCTP_INPUT + SCTP_LOC_3); + sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, stcb->sctp_ep, + stcb, r_net, SCTP_FROM_SCTP_INPUT + SCTP_LOC_5); sctp_timer_start(SCTP_TIMER_TYPE_HEARTBEAT, stcb->sctp_ep, stcb, r_net); } if (r_net == stcb->asoc.primary_destination) { @@ -673,7 +675,9 @@ sctp_handle_heartbeat_ack(struct sctp_heartbeat_chunk *cp, sctp_is_mobility_feature_on(stcb->sctp_ep, SCTP_MOBILITY_PRIM_DELETED)) { - sctp_timer_stop(SCTP_TIMER_TYPE_PRIM_DELETED, stcb->sctp_ep, stcb, NULL, SCTP_FROM_SCTP_TIMER + SCTP_LOC_7); + sctp_timer_stop(SCTP_TIMER_TYPE_PRIM_DELETED, + stcb->sctp_ep, stcb, NULL, + SCTP_FROM_SCTP_INPUT + SCTP_LOC_6); if (sctp_is_mobility_feature_on(stcb->sctp_ep, SCTP_MOBILITY_FASTHANDOFF)) { sctp_assoc_immediate_retrans(stcb, @@ -795,7 +799,8 @@ sctp_handle_abort(struct sctp_abort_chunk *abort, error = 0; } /* stop any receive timers */ - sctp_timer_stop(SCTP_TIMER_TYPE_RECV, stcb->sctp_ep, stcb, net, SCTP_FROM_SCTP_INPUT + SCTP_LOC_6); + sctp_timer_stop(SCTP_TIMER_TYPE_RECV, stcb->sctp_ep, stcb, net, + SCTP_FROM_SCTP_INPUT + SCTP_LOC_7); /* notify user of the abort and clean up... */ sctp_abort_notification(stcb, 1, error, abort, SCTP_SO_NOT_LOCKED); /* free the tcb */ @@ -817,7 +822,7 @@ sctp_handle_abort(struct sctp_abort_chunk *abort, #endif stcb->asoc.state |= SCTP_STATE_WAS_ABORTED; (void)sctp_free_assoc(stcb->sctp_ep, stcb, SCTP_NORMAL_PROC, - SCTP_FROM_SCTP_INPUT + SCTP_LOC_6); + SCTP_FROM_SCTP_INPUT + SCTP_LOC_8); #if defined(__APPLE__) || defined(SCTP_SO_LOCK_TESTING) SCTP_SOCKET_UNLOCK(so, 1); #endif @@ -932,7 +937,8 @@ sctp_handle_shutdown(struct sctp_shutdown_chunk *cp, * stop the shutdown timer, since we WILL move to * SHUTDOWN-ACK-SENT. */ - sctp_timer_stop(SCTP_TIMER_TYPE_SHUTDOWN, stcb->sctp_ep, stcb, net, SCTP_FROM_SCTP_INPUT + SCTP_LOC_8); + sctp_timer_stop(SCTP_TIMER_TYPE_SHUTDOWN, stcb->sctp_ep, stcb, + net, SCTP_FROM_SCTP_INPUT + SCTP_LOC_9); } /* Now is there unsent data on a stream somewhere? */ some_on_streamwheel = sctp_is_there_unsent_data(stcb, SCTP_SO_NOT_LOCKED); @@ -1025,7 +1031,8 @@ sctp_handle_shutdown_ack(struct sctp_shutdown_ack_chunk *cp SCTP_UNUSED, } #endif /* stop the timer */ - sctp_timer_stop(SCTP_TIMER_TYPE_SHUTDOWN, stcb->sctp_ep, stcb, net, SCTP_FROM_SCTP_INPUT + SCTP_LOC_9); + sctp_timer_stop(SCTP_TIMER_TYPE_SHUTDOWN, stcb->sctp_ep, stcb, net, + SCTP_FROM_SCTP_INPUT + SCTP_LOC_10); /* send SHUTDOWN-COMPLETE */ sctp_send_shutdown_complete(stcb, net, 0); /* notify upper layer protocol */ @@ -1046,7 +1053,7 @@ sctp_handle_shutdown_ack(struct sctp_shutdown_ack_chunk *cp SCTP_UNUSED, atomic_subtract_int(&stcb->asoc.refcnt, 1); #endif (void)sctp_free_assoc(stcb->sctp_ep, stcb, SCTP_NORMAL_PROC, - SCTP_FROM_SCTP_INPUT + SCTP_LOC_10); + SCTP_FROM_SCTP_INPUT + SCTP_LOC_11); #if defined(__APPLE__) || defined(SCTP_SO_LOCK_TESTING) SCTP_SOCKET_UNLOCK(so, 1); #endif @@ -1206,7 +1213,7 @@ sctp_handle_error(struct sctp_chunkhdr *ch, atomic_subtract_int(&stcb->asoc.refcnt, 1); #endif (void)sctp_free_assoc(stcb->sctp_ep, stcb, SCTP_NORMAL_PROC, - SCTP_FROM_SCTP_INPUT + SCTP_LOC_11); + SCTP_FROM_SCTP_INPUT + SCTP_LOC_12); #if defined(__APPLE__) || defined(SCTP_SO_LOCK_TESTING) SCTP_SOCKET_UNLOCK(so, 1); #endif @@ -1558,9 +1565,12 @@ sctp_process_cookie_existing(struct mbuf *m, int iphlen, int offset, return (NULL); } /* we have already processed the INIT so no problem */ - sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, inp, stcb, - net, SCTP_FROM_SCTP_INPUT + SCTP_LOC_12); - sctp_timer_stop(SCTP_TIMER_TYPE_INIT, inp, stcb, net, SCTP_FROM_SCTP_INPUT + SCTP_LOC_13); + sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, inp, + stcb, net, + SCTP_FROM_SCTP_INPUT + SCTP_LOC_13); + sctp_timer_stop(SCTP_TIMER_TYPE_INIT, inp, + stcb, net, + SCTP_FROM_SCTP_INPUT + SCTP_LOC_14); /* update current state */ if (SCTP_GET_STATE(asoc) == SCTP_STATE_COOKIE_ECHOED) SCTP_STAT_INCR_COUNTER32(sctps_activeestab); @@ -1720,7 +1730,8 @@ sctp_process_cookie_existing(struct mbuf *m, int iphlen, int offset, } if (how_indx < sizeof(asoc->cookie_how)) asoc->cookie_how[how_indx] = 8; - sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, inp, stcb, net, SCTP_FROM_SCTP_INPUT + SCTP_LOC_14); + sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, inp, stcb, net, + SCTP_FROM_SCTP_INPUT + SCTP_LOC_15); sctp_stop_all_cookie_timers(stcb); /* * since we did not send a HB make sure we don't double @@ -1865,8 +1876,10 @@ sctp_process_cookie_existing(struct mbuf *m, int iphlen, int offset, /* temp code */ if (how_indx < sizeof(asoc->cookie_how)) asoc->cookie_how[how_indx] = 12; - sctp_timer_stop(SCTP_TIMER_TYPE_INIT, inp, stcb, net, SCTP_FROM_SCTP_INPUT + SCTP_LOC_15); - sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, inp, stcb, net, SCTP_FROM_SCTP_INPUT + SCTP_LOC_16); + sctp_timer_stop(SCTP_TIMER_TYPE_INIT, inp, stcb, net, + SCTP_FROM_SCTP_INPUT + SCTP_LOC_16); + sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, inp, stcb, net, + SCTP_FROM_SCTP_INPUT + SCTP_LOC_17); /* notify upper layer */ *notification = SCTP_NOTIFY_ASSOC_RESTART; @@ -2134,7 +2147,7 @@ sctp_process_cookie_new(struct mbuf *m, int iphlen, int offset, SCTP_TCB_LOCK(stcb); #endif (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, - SCTP_FROM_SCTP_INPUT + SCTP_LOC_16); + SCTP_FROM_SCTP_INPUT + SCTP_LOC_18); #if defined(__APPLE__) || defined(SCTP_SO_LOCK_TESTING) SCTP_SOCKET_UNLOCK(so, 1); #endif @@ -2165,7 +2178,8 @@ sctp_process_cookie_new(struct mbuf *m, int iphlen, int offset, SCTP_SOCKET_LOCK(so, 1); SCTP_TCB_LOCK(stcb); #endif - (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, SCTP_FROM_SCTP_INPUT + SCTP_LOC_16); + (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, + SCTP_FROM_SCTP_INPUT + SCTP_LOC_19); #if defined(__APPLE__) || defined(SCTP_SO_LOCK_TESTING) SCTP_SOCKET_UNLOCK(so, 1); #endif @@ -2182,7 +2196,8 @@ sctp_process_cookie_new(struct mbuf *m, int iphlen, int offset, SCTP_SOCKET_LOCK(so, 1); SCTP_TCB_LOCK(stcb); #endif - (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, SCTP_FROM_SCTP_INPUT + SCTP_LOC_17); + (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, + SCTP_FROM_SCTP_INPUT + SCTP_LOC_20); #if defined(__APPLE__) || defined(SCTP_SO_LOCK_TESTING) SCTP_SOCKET_UNLOCK(so, 1); #endif @@ -2211,7 +2226,8 @@ sctp_process_cookie_new(struct mbuf *m, int iphlen, int offset, SCTP_SOCKET_LOCK(so, 1); SCTP_TCB_LOCK(stcb); #endif - (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, SCTP_FROM_SCTP_INPUT + SCTP_LOC_18); + (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, + SCTP_FROM_SCTP_INPUT + SCTP_LOC_21); #if defined(__APPLE__) || defined(SCTP_SO_LOCK_TESTING) SCTP_SOCKET_UNLOCK(so, 1); #endif @@ -2271,7 +2287,8 @@ sctp_process_cookie_new(struct mbuf *m, int iphlen, int offset, SCTP_SOCKET_LOCK(so, 1); SCTP_TCB_LOCK(stcb); #endif - (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, SCTP_FROM_SCTP_INPUT + SCTP_LOC_19); + (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, + SCTP_FROM_SCTP_INPUT + SCTP_LOC_22); #if defined(__APPLE__) || defined(SCTP_SO_LOCK_TESTING) SCTP_SOCKET_UNLOCK(so, 1); #endif @@ -2325,12 +2342,13 @@ sctp_process_cookie_new(struct mbuf *m, int iphlen, int offset, sctp_is_feature_on(inp, SCTP_PCB_FLAGS_AUTOCLOSE)) { sctp_timer_start(SCTP_TIMER_TYPE_AUTOCLOSE, inp, stcb, NULL); } - /* calculate the RTT */ (void)SCTP_GETTIME_TIMEVAL(&stcb->asoc.time_entered); if ((netp) && (*netp)) { + /* calculate the RTT and set the encaps port */ (*netp)->RTO = sctp_calculate_rto(stcb, asoc, *netp, &cookie->time_entered, sctp_align_unsafe_makecopy, SCTP_RTT_FROM_NON_DATA); + (*netp)->port = port; } /* respond with a COOKIE-ACK */ sctp_send_cookie_ack(stcb); @@ -2740,7 +2758,8 @@ sctp_handle_cookie_echo(struct mbuf *m, int iphlen, int offset, SCTP_TCB_LOCK((*stcb)); atomic_subtract_int(&(*stcb)->asoc.refcnt, 1); #endif - (void)sctp_free_assoc(*inp_p, *stcb, SCTP_NORMAL_PROC, SCTP_FROM_SCTP_INPUT + SCTP_LOC_20); + (void)sctp_free_assoc(*inp_p, *stcb, SCTP_NORMAL_PROC, + SCTP_FROM_SCTP_INPUT + SCTP_LOC_23); #if defined(__APPLE__) || defined(SCTP_SO_LOCK_TESTING) SCTP_SOCKET_UNLOCK(pcb_so, 1); #endif @@ -3172,7 +3191,8 @@ sctp_handle_shutdown_complete(struct sctp_shutdown_complete_chunk *cp SCTP_UNUSE } #endif /* stop the timer */ - sctp_timer_stop(SCTP_TIMER_TYPE_SHUTDOWNACK, stcb->sctp_ep, stcb, net, SCTP_FROM_SCTP_INPUT + SCTP_LOC_22); + sctp_timer_stop(SCTP_TIMER_TYPE_SHUTDOWNACK, stcb->sctp_ep, stcb, net, + SCTP_FROM_SCTP_INPUT + SCTP_LOC_24); SCTP_STAT_INCR_COUNTER32(sctps_shutdown); /* free the TCB */ SCTPDBG(SCTP_DEBUG_INPUT2, @@ -3185,7 +3205,8 @@ sctp_handle_shutdown_complete(struct sctp_shutdown_complete_chunk *cp SCTP_UNUSE SCTP_TCB_LOCK(stcb); atomic_subtract_int(&stcb->asoc.refcnt, 1); #endif - (void)sctp_free_assoc(stcb->sctp_ep, stcb, SCTP_NORMAL_PROC, SCTP_FROM_SCTP_INPUT + SCTP_LOC_23); + (void)sctp_free_assoc(stcb->sctp_ep, stcb, SCTP_NORMAL_PROC, + SCTP_FROM_SCTP_INPUT + SCTP_LOC_25); #if defined(__APPLE__) || defined(SCTP_SO_LOCK_TESTING) SCTP_SOCKET_UNLOCK(so, 1); #endif @@ -3293,7 +3314,8 @@ process_chunk_drop(struct sctp_tcb *stcb, struct sctp_chunk_desc *desc, /* restart the timer */ sctp_timer_stop(SCTP_TIMER_TYPE_SEND, stcb->sctp_ep, - stcb, tp1->whoTo, SCTP_FROM_SCTP_INPUT + SCTP_LOC_24); + stcb, tp1->whoTo, + SCTP_FROM_SCTP_INPUT + SCTP_LOC_26); sctp_timer_start(SCTP_TIMER_TYPE_SEND, stcb->sctp_ep, stcb, tp1->whoTo); @@ -3361,7 +3383,8 @@ process_chunk_drop(struct sctp_tcb *stcb, struct sctp_chunk_desc *desc, * this, otherwise we let the timer fire. */ sctp_timer_stop(SCTP_TIMER_TYPE_INIT, stcb->sctp_ep, - stcb, net, SCTP_FROM_SCTP_INPUT + SCTP_LOC_25); + stcb, net, + SCTP_FROM_SCTP_INPUT + SCTP_LOC_27); sctp_send_initiate(stcb->sctp_ep, stcb, SCTP_SO_NOT_LOCKED); } break; @@ -3538,7 +3561,8 @@ sctp_clean_up_stream_reset(struct sctp_tcb *stcb) } asoc = &stcb->asoc; - sctp_timer_stop(SCTP_TIMER_TYPE_STRRESET, stcb->sctp_ep, stcb, chk->whoTo, SCTP_FROM_SCTP_INPUT + SCTP_LOC_26); + sctp_timer_stop(SCTP_TIMER_TYPE_STRRESET, stcb->sctp_ep, stcb, + chk->whoTo, SCTP_FROM_SCTP_INPUT + SCTP_LOC_28); TAILQ_REMOVE(&asoc->control_send_queue, chk, sctp_next); @@ -4782,7 +4806,8 @@ __attribute__((noinline)) SCTP_TCB_LOCK(stcb); atomic_subtract_int(&stcb->asoc.refcnt, 1); #endif - (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, SCTP_FROM_SCTP_INPUT + SCTP_LOC_27); + (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, + SCTP_FROM_SCTP_INPUT + SCTP_LOC_29); #if defined(__APPLE__) || defined(SCTP_SO_LOCK_TESTING) SCTP_SOCKET_UNLOCK(so, 1); #endif @@ -5202,7 +5227,8 @@ __attribute__((noinline)) SCTP_TCB_LOCK(stcb); atomic_subtract_int(&stcb->asoc.refcnt, 1); #endif - (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, SCTP_FROM_SCTP_INPUT + SCTP_LOC_27); + (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, + SCTP_FROM_SCTP_INPUT + SCTP_LOC_30); #if defined(__APPLE__) || defined(SCTP_SO_LOCK_TESTING) SCTP_SOCKET_UNLOCK(so, 1); #endif @@ -5380,7 +5406,8 @@ __attribute__((noinline)) SCTP_TCB_LOCK(stcb); atomic_subtract_int(&stcb->asoc.refcnt, 1); #endif - (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, SCTP_FROM_SCTP_INPUT + SCTP_LOC_29); + (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, + SCTP_FROM_SCTP_INPUT + SCTP_LOC_31); #if defined(__APPLE__) || defined(SCTP_SO_LOCK_TESTING) SCTP_SOCKET_UNLOCK(so, 1); #endif diff --git a/sys/netinet/sctp_output.c b/sys/netinet/sctp_output.c index ed3b9ec6818d..ef263a8c583c 100644 --- a/sys/netinet/sctp_output.c +++ b/sys/netinet/sctp_output.c @@ -8327,7 +8327,8 @@ sctp_med_chunk_output(struct sctp_inpcb *inp, /* turn off the timer */ if (SCTP_OS_TIMER_PENDING(&stcb->asoc.dack_timer.timer)) { sctp_timer_stop(SCTP_TIMER_TYPE_RECV, - inp, stcb, net, SCTP_FROM_SCTP_OUTPUT + SCTP_LOC_1); + inp, stcb, net, + SCTP_FROM_SCTP_OUTPUT + SCTP_LOC_1); } } ctl_cnt++; @@ -9780,7 +9781,7 @@ sctp_chunk_retransmission(struct sctp_inpcb *inp, * t3-expiring. */ sctp_timer_stop(SCTP_TIMER_TYPE_SEND, inp, stcb, net, - SCTP_FROM_SCTP_OUTPUT + SCTP_LOC_4); + SCTP_FROM_SCTP_OUTPUT + SCTP_LOC_2); sctp_timer_start(SCTP_TIMER_TYPE_SEND, inp, stcb, net); } } @@ -10387,7 +10388,8 @@ sctp_send_sack(struct sctp_tcb *stcb, int so_locked /* No memory so we drop the idea, and set a timer */ if (stcb->asoc.delayed_ack) { sctp_timer_stop(SCTP_TIMER_TYPE_RECV, - stcb->sctp_ep, stcb, NULL, SCTP_FROM_SCTP_OUTPUT + SCTP_LOC_5); + stcb->sctp_ep, stcb, NULL, + SCTP_FROM_SCTP_OUTPUT + SCTP_LOC_3); sctp_timer_start(SCTP_TIMER_TYPE_RECV, stcb->sctp_ep, stcb, NULL); } else { @@ -10455,7 +10457,8 @@ sctp_send_sack(struct sctp_tcb *stcb, int so_locked /* sa_ignore NO_NULL_CHK */ if (stcb->asoc.delayed_ack) { sctp_timer_stop(SCTP_TIMER_TYPE_RECV, - stcb->sctp_ep, stcb, NULL, SCTP_FROM_SCTP_OUTPUT + SCTP_LOC_6); + stcb->sctp_ep, stcb, NULL, + SCTP_FROM_SCTP_OUTPUT + SCTP_LOC_4); sctp_timer_start(SCTP_TIMER_TYPE_RECV, stcb->sctp_ep, stcb, NULL); } else { @@ -11996,9 +11999,6 @@ sctp_copy_one(struct sctp_stream_queue_pending *sp, struct uio *uio, int resv_upfront) { - int left; - - left = sp->length; sp->data = m_uiotombuf(uio, M_WAITOK, sp->length, resv_upfront, 0); if (sp->data == NULL) { @@ -12427,7 +12427,8 @@ sctp_lower_sosend(struct socket *so, if (control) { if (sctp_process_cmsgs_for_init(stcb, control, &error)) { - sctp_free_assoc(inp, stcb, SCTP_PCBFREE_FORCE, SCTP_FROM_SCTP_OUTPUT + SCTP_LOC_7); + sctp_free_assoc(inp, stcb, SCTP_PCBFREE_FORCE, + SCTP_FROM_SCTP_OUTPUT + SCTP_LOC_5); hold_tcblock = 0; stcb = NULL; goto out_unlocked; diff --git a/sys/netinet/sctp_pcb.c b/sys/netinet/sctp_pcb.c index 6edf33afc986..f6e9e326f8d3 100644 --- a/sys/netinet/sctp_pcb.c +++ b/sys/netinet/sctp_pcb.c @@ -3544,7 +3544,8 @@ sctp_inpcb_free(struct sctp_inpcb *inp, int immediate, int from) (SCTP_GET_STATE(&asoc->asoc) == SCTP_STATE_SHUTDOWN_RECEIVED)) { SCTP_STAT_DECR_GAUGE32(sctps_currestab); } - if (sctp_free_assoc(inp, asoc, SCTP_PCBFREE_FORCE, SCTP_FROM_SCTP_PCB + SCTP_LOC_8) == 0) { + if (sctp_free_assoc(inp, asoc, SCTP_PCBFREE_FORCE, + SCTP_FROM_SCTP_PCB + SCTP_LOC_8) == 0) { cnt++; } } diff --git a/sys/netinet/sctp_timer.c b/sys/netinet/sctp_timer.c index d8422b901747..257d18845b23 100644 --- a/sys/netinet/sctp_timer.c +++ b/sys/netinet/sctp_timer.c @@ -110,7 +110,9 @@ sctp_threshold_management(struct sctp_inpcb *inp, struct sctp_tcb *stcb, net->dest_state |= SCTP_ADDR_PF; net->last_active = sctp_get_tick_count(); sctp_send_hb(stcb, net, SCTP_SO_NOT_LOCKED); - sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, stcb->sctp_ep, stcb, net, SCTP_FROM_SCTP_TIMER + SCTP_LOC_3); + sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, + stcb->sctp_ep, stcb, net, + SCTP_FROM_SCTP_TIMER + SCTP_LOC_1); sctp_timer_start(SCTP_TIMER_TYPE_HEARTBEAT, stcb->sctp_ep, stcb, net); } } @@ -153,7 +155,7 @@ sctp_threshold_management(struct sctp_inpcb *inp, struct sctp_tcb *stcb, op_err = sctp_generate_cause(SCTP_CAUSE_PROTOCOL_VIOLATION, "Association error counter exceeded"); - inp->last_abort_code = SCTP_FROM_SCTP_TIMER + SCTP_LOC_1; + inp->last_abort_code = SCTP_FROM_SCTP_TIMER + SCTP_LOC_2; sctp_abort_an_association(inp, stcb, op_err, SCTP_SO_NOT_LOCKED); return (1); } @@ -1046,7 +1048,7 @@ sctp_cookie_timer(struct sctp_inpcb *inp, op_err = sctp_generate_cause(SCTP_CAUSE_PROTOCOL_VIOLATION, "Cookie timer expired, but no cookie"); - inp->last_abort_code = SCTP_FROM_SCTP_TIMER + SCTP_LOC_4; + inp->last_abort_code = SCTP_FROM_SCTP_TIMER + SCTP_LOC_3; sctp_abort_an_association(inp, stcb, op_err, SCTP_SO_NOT_LOCKED); } else { #ifdef INVARIANTS diff --git a/sys/netinet/sctp_usrreq.c b/sys/netinet/sctp_usrreq.c index d2529695ea33..50059101712d 100644 --- a/sys/netinet/sctp_usrreq.c +++ b/sys/netinet/sctp_usrreq.c @@ -288,7 +288,8 @@ sctp_notify(struct sctp_inpcb *inp, SCTP_TCB_LOCK(stcb); atomic_subtract_int(&stcb->asoc.refcnt, 1); #endif - (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, SCTP_FROM_SCTP_USRREQ + SCTP_LOC_2); + (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, + SCTP_FROM_SCTP_USRREQ + SCTP_LOC_2); #if defined(__APPLE__) || defined(SCTP_SO_LOCK_TESTING) SCTP_SOCKET_UNLOCK(so, 1); /* SCTP_TCB_UNLOCK(stcb); MT: I think this is not needed. */ @@ -777,7 +778,8 @@ sctp_disconnect(struct socket *so) (SCTP_GET_STATE(&stcb->asoc) == SCTP_STATE_SHUTDOWN_RECEIVED)) { SCTP_STAT_DECR_GAUGE32(sctps_currestab); } - (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, SCTP_FROM_SCTP_USRREQ + SCTP_LOC_3); + (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, + SCTP_FROM_SCTP_USRREQ + SCTP_LOC_3); /* No unlock tcb assoc is gone */ return (0); } @@ -862,7 +864,8 @@ sctp_disconnect(struct socket *so) SCTP_STAT_DECR_GAUGE32(sctps_currestab); } SCTP_INP_RUNLOCK(inp); - (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, SCTP_FROM_SCTP_USRREQ + SCTP_LOC_5); + (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, + SCTP_FROM_SCTP_USRREQ + SCTP_LOC_5); return (0); } else { sctp_chunk_output(inp, stcb, SCTP_OUTPUT_FROM_CLOSING, SCTP_SO_LOCKED); @@ -1562,7 +1565,8 @@ sctp_do_connect_x(struct socket *so, struct sctp_inpcb *inp, void *optval, sctp_connectx_helper_add(stcb, sa, (totaddr - 1), &error); /* Fill in the return id */ if (error) { - (void)sctp_free_assoc(inp, stcb, SCTP_PCBFREE_FORCE, SCTP_FROM_SCTP_USRREQ + SCTP_LOC_6); + (void)sctp_free_assoc(inp, stcb, SCTP_PCBFREE_FORCE, + SCTP_FROM_SCTP_USRREQ + SCTP_LOC_7); goto out_now; } a_id = (sctp_assoc_t *) optval; @@ -4785,7 +4789,7 @@ sctp_setopt(struct socket *so, int optname, void *optval, size_t optsize, (void)SCTP_GETTIME_TIMEVAL(&stcb->asoc.time_entered); sctp_timer_stop(SCTP_TIMER_TYPE_INIT, inp, stcb, stcb->asoc.primary_destination, - SCTP_FROM_SCTP_USRREQ + SCTP_LOC_9); + SCTP_FROM_SCTP_USRREQ + SCTP_LOC_8); sctp_send_initiate(inp, stcb, SCTP_SO_LOCKED); } else { /* @@ -5203,7 +5207,7 @@ sctp_setopt(struct socket *so, int optname, void *optval, size_t optsize, if (!(net->dest_state & SCTP_ADDR_UNCONFIRMED) && !(net->dest_state & SCTP_ADDR_NOHB)) { sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, inp, stcb, net, - SCTP_FROM_SCTP_USRREQ + SCTP_LOC_10); + SCTP_FROM_SCTP_USRREQ + SCTP_LOC_9); } net->dest_state |= SCTP_ADDR_NOHB; } @@ -5227,7 +5231,7 @@ sctp_setopt(struct socket *so, int optname, void *optval, size_t optsize, if ((paddrp->spp_flags & SPP_PMTUD_DISABLE) && (paddrp->spp_pathmtu >= SCTP_SMALLEST_PMTU)) { if (SCTP_OS_TIMER_PENDING(&net->pmtu_timer.timer)) { sctp_timer_stop(SCTP_TIMER_TYPE_PATHMTURAISE, inp, stcb, net, - SCTP_FROM_SCTP_USRREQ + SCTP_LOC_10); + SCTP_FROM_SCTP_USRREQ + SCTP_LOC_11); } net->dest_state |= SCTP_ADDR_NO_PMTUD; net->mtu = paddrp->spp_pathmtu + ovh; @@ -5251,7 +5255,9 @@ sctp_setopt(struct socket *so, int optname, void *optval, size_t optsize, (net->error_count > net->pf_threshold)) { net->dest_state |= SCTP_ADDR_PF; sctp_send_hb(stcb, net, SCTP_SO_LOCKED); - sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, stcb->sctp_ep, stcb, net, SCTP_FROM_SCTP_TIMER + SCTP_LOC_3); + sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, + stcb->sctp_ep, stcb, net, + SCTP_FROM_SCTP_USRREQ + SCTP_LOC_12); sctp_timer_start(SCTP_TIMER_TYPE_HEARTBEAT, stcb->sctp_ep, stcb, net); } } @@ -5294,7 +5300,9 @@ sctp_setopt(struct socket *so, int optname, void *optval, size_t optsize, (net->error_count > net->pf_threshold)) { net->dest_state |= SCTP_ADDR_PF; sctp_send_hb(stcb, net, SCTP_SO_LOCKED); - sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, stcb->sctp_ep, stcb, net, SCTP_FROM_SCTP_TIMER + SCTP_LOC_3); + sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, + stcb->sctp_ep, stcb, net, + SCTP_FROM_SCTP_USRREQ + SCTP_LOC_13); sctp_timer_start(SCTP_TIMER_TYPE_HEARTBEAT, stcb->sctp_ep, stcb, net); } } @@ -5329,7 +5337,7 @@ sctp_setopt(struct socket *so, int optname, void *optval, size_t optsize, net->dest_state &= ~SCTP_ADDR_NOHB; } sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, inp, stcb, net, - SCTP_FROM_SCTP_USRREQ + SCTP_LOC_10); + SCTP_FROM_SCTP_USRREQ + SCTP_LOC_14); sctp_timer_start(SCTP_TIMER_TYPE_HEARTBEAT, inp, stcb, net); } sctp_stcb_feature_off(inp, stcb, SCTP_PCB_FLAGS_DONOT_HEARTBEAT); @@ -5339,7 +5347,9 @@ sctp_setopt(struct socket *so, int optname, void *optval, size_t optsize, if (!(net->dest_state & SCTP_ADDR_NOHB)) { net->dest_state |= SCTP_ADDR_NOHB; if (!(net->dest_state & SCTP_ADDR_UNCONFIRMED)) { - sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, inp, stcb, net, SCTP_FROM_SCTP_USRREQ + SCTP_LOC_10); + sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, + inp, stcb, net, + SCTP_FROM_SCTP_USRREQ + SCTP_LOC_15); } } } @@ -5349,7 +5359,7 @@ sctp_setopt(struct socket *so, int optname, void *optval, size_t optsize, TAILQ_FOREACH(net, &stcb->asoc.nets, sctp_next) { if (SCTP_OS_TIMER_PENDING(&net->pmtu_timer.timer)) { sctp_timer_stop(SCTP_TIMER_TYPE_PATHMTURAISE, inp, stcb, net, - SCTP_FROM_SCTP_USRREQ + SCTP_LOC_10); + SCTP_FROM_SCTP_USRREQ + SCTP_LOC_16); } net->dest_state |= SCTP_ADDR_NO_PMTUD; net->mtu = paddrp->spp_pathmtu + ovh; @@ -6199,7 +6209,9 @@ sctp_setopt(struct socket *so, int optname, void *optval, size_t optsize, (net->error_count <= net->failure_threshold)) { net->dest_state |= SCTP_ADDR_PF; sctp_send_hb(stcb, net, SCTP_SO_LOCKED); - sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, stcb->sctp_ep, stcb, net, SCTP_FROM_SCTP_TIMER + SCTP_LOC_3); + sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, + stcb->sctp_ep, stcb, net, + SCTP_FROM_SCTP_USRREQ + SCTP_LOC_17); sctp_timer_start(SCTP_TIMER_TYPE_HEARTBEAT, stcb->sctp_ep, stcb, net); } } @@ -6228,7 +6240,9 @@ sctp_setopt(struct socket *so, int optname, void *optval, size_t optsize, (net->error_count <= net->failure_threshold)) { net->dest_state |= SCTP_ADDR_PF; sctp_send_hb(stcb, net, SCTP_SO_LOCKED); - sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, stcb->sctp_ep, stcb, net, SCTP_FROM_SCTP_TIMER + SCTP_LOC_3); + sctp_timer_stop(SCTP_TIMER_TYPE_HEARTBEAT, + stcb->sctp_ep, stcb, net, + SCTP_FROM_SCTP_USRREQ + SCTP_LOC_18); sctp_timer_start(SCTP_TIMER_TYPE_HEARTBEAT, stcb->sctp_ep, stcb, net); } } @@ -7127,7 +7141,8 @@ sctp_accept(struct socket *so, struct sockaddr **addr) } if (stcb->asoc.state & SCTP_STATE_ABOUT_TO_BE_FREED) { SCTP_TCB_LOCK(stcb); - sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, SCTP_FROM_SCTP_USRREQ + SCTP_LOC_7); + sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, + SCTP_FROM_SCTP_USRREQ + SCTP_LOC_19); } return (0); } diff --git a/sys/netinet/sctputil.c b/sys/netinet/sctputil.c index a30a9425a6a4..24110dd1ce89 100644 --- a/sys/netinet/sctputil.c +++ b/sys/netinet/sctputil.c @@ -1449,7 +1449,7 @@ sctp_timeout_handler(void *t) struct socket *so; #endif - int did_output, type; + int did_output; tmr = (struct sctp_timer *)t; inp = (struct sctp_inpcb *)tmr->ep; @@ -1488,7 +1488,6 @@ sctp_timeout_handler(void *t) } /* if this is an iterator timeout, get the struct and clear inp */ tmr->stopped_from = 0xa003; - type = tmr->type; if (inp) { SCTP_INP_INCR_REF(inp); if ((inp->sctp_socket == NULL) && @@ -1809,7 +1808,8 @@ sctp_timeout_handler(void *t) SCTP_STAT_INCR(sctps_timoassockill); /* Can we free it yet? */ SCTP_INP_DECR_REF(inp); - sctp_timer_stop(SCTP_TIMER_TYPE_ASOCKILL, inp, stcb, NULL, SCTP_FROM_SCTPUTIL + SCTP_LOC_1); + sctp_timer_stop(SCTP_TIMER_TYPE_ASOCKILL, inp, stcb, NULL, + SCTP_FROM_SCTPUTIL + SCTP_LOC_1); #if defined(__APPLE__) || defined(SCTP_SO_LOCK_TESTING) so = SCTP_INP_SO(inp); atomic_add_int(&stcb->asoc.refcnt, 1); @@ -1818,7 +1818,8 @@ sctp_timeout_handler(void *t) SCTP_TCB_LOCK(stcb); atomic_subtract_int(&stcb->asoc.refcnt, 1); #endif - (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, SCTP_FROM_SCTPUTIL + SCTP_LOC_2); + (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, + SCTP_FROM_SCTPUTIL + SCTP_LOC_2); #if defined(__APPLE__) || defined(SCTP_SO_LOCK_TESTING) SCTP_SOCKET_UNLOCK(so, 1); #endif @@ -1838,7 +1839,8 @@ sctp_timeout_handler(void *t) * killer */ SCTP_INP_DECR_REF(inp); - sctp_timer_stop(SCTP_TIMER_TYPE_INPKILL, inp, NULL, NULL, SCTP_FROM_SCTPUTIL + SCTP_LOC_3); + sctp_timer_stop(SCTP_TIMER_TYPE_INPKILL, inp, NULL, NULL, + SCTP_FROM_SCTPUTIL + SCTP_LOC_3); sctp_inpcb_free(inp, SCTP_FREE_SHOULD_USE_ABORT, SCTP_CALLED_FROM_INPKILL_TIMER); inp = NULL; @@ -1873,7 +1875,7 @@ sctp_timeout_handler(void *t) } out_no_decr: SCTPDBG(SCTP_DEBUG_TIMER1, "Timer now complete (type %d)\n", - type); + tmr->type); CURVNET_RESTORE(); } @@ -3910,7 +3912,8 @@ sctp_abort_association(struct sctp_inpcb *inp, struct sctp_tcb *stcb, (SCTP_GET_STATE(&stcb->asoc) == SCTP_STATE_SHUTDOWN_RECEIVED)) { SCTP_STAT_DECR_GAUGE32(sctps_currestab); } - (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, SCTP_FROM_SCTPUTIL + SCTP_LOC_4); + (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, + SCTP_FROM_SCTPUTIL + SCTP_LOC_4); #if defined(__APPLE__) || defined(SCTP_SO_LOCK_TESTING) SCTP_SOCKET_UNLOCK(so, 1); #endif @@ -4034,7 +4037,8 @@ sctp_abort_an_association(struct sctp_inpcb *inp, struct sctp_tcb *stcb, atomic_subtract_int(&stcb->asoc.refcnt, 1); } #endif - (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, SCTP_FROM_SCTPUTIL + SCTP_LOC_5); + (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, + SCTP_FROM_SCTPUTIL + SCTP_LOC_5); #if defined(__APPLE__) || defined(SCTP_SO_LOCK_TESTING) if (!so_locked) { SCTP_SOCKET_UNLOCK(so, 1); @@ -5165,7 +5169,8 @@ sctp_user_rcvd(struct sctp_tcb *stcb, uint32_t * freed_so_far, int hold_rlock, sctp_chunk_output(stcb->sctp_ep, stcb, SCTP_OUTPUT_FROM_USR_RCVD, SCTP_SO_LOCKED); /* make sure no timer is running */ - sctp_timer_stop(SCTP_TIMER_TYPE_RECV, stcb->sctp_ep, stcb, NULL, SCTP_FROM_SCTPUTIL + SCTP_LOC_6); + sctp_timer_stop(SCTP_TIMER_TYPE_RECV, stcb->sctp_ep, stcb, NULL, + SCTP_FROM_SCTPUTIL + SCTP_LOC_6); SCTP_TCB_UNLOCK(stcb); } else { /* Update how much we have pending */ @@ -6323,14 +6328,16 @@ sctp_connectx_helper_add(struct sctp_tcb *stcb, struct sockaddr *addr, (sin->sin_addr.s_addr == INADDR_BROADCAST) || IN_MULTICAST(ntohl(sin->sin_addr.s_addr))) { SCTP_LTRACE_ERR_RET(NULL, stcb, NULL, SCTP_FROM_SCTPUTIL, EINVAL); - (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, SCTP_FROM_SCTP_USRREQ + SCTP_LOC_7); + (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, + SCTP_FROM_SCTPUTIL + SCTP_LOC_7); *error = EINVAL; goto out_now; } if (sctp_add_remote_addr(stcb, sa, NULL, SCTP_DONOT_SETSCOPE, SCTP_ADDR_IS_CONFIRMED)) { /* assoc gone no un-lock */ SCTP_LTRACE_ERR_RET(NULL, stcb, NULL, SCTP_FROM_SCTPUTIL, ENOBUFS); - (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, SCTP_FROM_SCTP_USRREQ + SCTP_LOC_7); + (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, + SCTP_FROM_SCTPUTIL + SCTP_LOC_8); *error = ENOBUFS; goto out_now; } @@ -6344,14 +6351,16 @@ sctp_connectx_helper_add(struct sctp_tcb *stcb, struct sockaddr *addr, if (IN6_IS_ADDR_UNSPECIFIED(&sin6->sin6_addr) || IN6_IS_ADDR_MULTICAST(&sin6->sin6_addr)) { SCTP_LTRACE_ERR_RET(NULL, stcb, NULL, SCTP_FROM_SCTPUTIL, EINVAL); - (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, SCTP_FROM_SCTP_USRREQ + SCTP_LOC_8); + (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, + SCTP_FROM_SCTPUTIL + SCTP_LOC_9); *error = EINVAL; goto out_now; } if (sctp_add_remote_addr(stcb, sa, NULL, SCTP_DONOT_SETSCOPE, SCTP_ADDR_IS_CONFIRMED)) { /* assoc gone no un-lock */ SCTP_LTRACE_ERR_RET(NULL, stcb, NULL, SCTP_FROM_SCTPUTIL, ENOBUFS); - (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, SCTP_FROM_SCTP_USRREQ + SCTP_LOC_8); + (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, + SCTP_FROM_SCTPUTIL + SCTP_LOC_10); *error = ENOBUFS; goto out_now; } diff --git a/sys/netinet/tcp_hostcache.c b/sys/netinet/tcp_hostcache.c index ca13f27edd93..a49254078d3d 100644 --- a/sys/netinet/tcp_hostcache.c +++ b/sys/netinet/tcp_hostcache.c @@ -117,6 +117,7 @@ static VNET_DEFINE(struct callout, tcp_hc_callout); static struct hc_metrics *tcp_hc_lookup(struct in_conninfo *); static struct hc_metrics *tcp_hc_insert(struct in_conninfo *); static int sysctl_tcp_hc_list(SYSCTL_HANDLER_ARGS); +static int sysctl_tcp_hc_purgenow(SYSCTL_HANDLER_ARGS); static void tcp_hc_purge_internal(int); static void tcp_hc_purge(void *); @@ -155,6 +156,9 @@ SYSCTL_PROC(_net_inet_tcp_hostcache, OID_AUTO, list, CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_SKIP, 0, 0, sysctl_tcp_hc_list, "A", "List of all hostcache entries"); +SYSCTL_PROC(_net_inet_tcp_hostcache, OID_AUTO, purgenow, + CTLTYPE_INT | CTLFLAG_RW, NULL, 0, + sysctl_tcp_hc_purgenow, "I", "Immediately purge all entries"); static MALLOC_DEFINE(M_HOSTCACHE, "hostcache", "TCP hostcache"); @@ -234,7 +238,7 @@ tcp_hc_init(void) /* * Set up periodic cache cleanup. */ - callout_init(&V_tcp_hc_callout, CALLOUT_MPSAFE); + callout_init(&V_tcp_hc_callout, 1); callout_reset(&V_tcp_hc_callout, V_tcp_hostcache.prune * hz, tcp_hc_purge, curvnet); } @@ -696,3 +700,24 @@ tcp_hc_purge(void *arg) tcp_hc_purge, arg); CURVNET_RESTORE(); } + +/* + * Expire and purge all entries in hostcache immediately. + */ +static int +sysctl_tcp_hc_purgenow(SYSCTL_HANDLER_ARGS) +{ + int error, val; + + val = 0; + error = sysctl_handle_int(oidp, &val, 0, req); + if (error || !req->newptr) + return (error); + + tcp_hc_purge_internal(1); + + callout_reset(&V_tcp_hc_callout, V_tcp_hostcache.prune * hz, + tcp_hc_purge, curvnet); + + return (0); +} diff --git a/sys/netinet/tcp_input.c b/sys/netinet/tcp_input.c index bd515cefa183..aaf227c50a22 100644 --- a/sys/netinet/tcp_input.c +++ b/sys/netinet/tcp_input.c @@ -1542,7 +1542,7 @@ tcp_do_segment(struct mbuf *m, struct tcphdr *th, struct socket *so, tcp_timer_activate(tp, TT_KEEP, TP_KEEPIDLE(tp)); /* - * Unscale the window into a 32-bit value. + * Scale up the window into a 32-bit value. * For the SYN_SENT state the scale is zero. */ tiwin = th->th_win << tp->snd_scale; diff --git a/sys/netinet/tcp_subr.c b/sys/netinet/tcp_subr.c index d75221c40735..757bcf2e43db 100644 --- a/sys/netinet/tcp_subr.c +++ b/sys/netinet/tcp_subr.c @@ -791,11 +791,11 @@ tcp_newtcpcb(struct inpcb *inp) V_tcp_mssdflt; /* Set up our timeouts. */ - callout_init(&tp->t_timers->tt_rexmt, CALLOUT_MPSAFE); - callout_init(&tp->t_timers->tt_persist, CALLOUT_MPSAFE); - callout_init(&tp->t_timers->tt_keep, CALLOUT_MPSAFE); - callout_init(&tp->t_timers->tt_2msl, CALLOUT_MPSAFE); - callout_init(&tp->t_timers->tt_delack, CALLOUT_MPSAFE); + callout_init(&tp->t_timers->tt_rexmt, 1); + callout_init(&tp->t_timers->tt_persist, 1); + callout_init(&tp->t_timers->tt_keep, 1); + callout_init(&tp->t_timers->tt_2msl, 1); + callout_init(&tp->t_timers->tt_delack, 1); if (V_tcp_do_rfc1323) tp->t_flags = (TF_REQ_SCALE|TF_REQ_TSTMP); diff --git a/sys/netinet6/in6_gif.c b/sys/netinet6/in6_gif.c index 3db4b4f1d584..126890f73077 100644 --- a/sys/netinet6/in6_gif.c +++ b/sys/netinet6/in6_gif.c @@ -180,6 +180,7 @@ static int gif_validate6(const struct ip6_hdr *ip6, struct gif_softc *sc, struct ifnet *ifp) { + int ret; GIF_RLOCK_ASSERT(sc); /* @@ -187,9 +188,14 @@ gif_validate6(const struct ip6_hdr *ip6, struct gif_softc *sc, * packet. We should compare the *source* address in our configuration * and the *destination* address of the packet, and vice versa. */ - if (!IN6_ARE_ADDR_EQUAL(&sc->gif_ip6hdr->ip6_src, &ip6->ip6_dst) || - !IN6_ARE_ADDR_EQUAL(&sc->gif_ip6hdr->ip6_dst, &ip6->ip6_src)) + if (!IN6_ARE_ADDR_EQUAL(&sc->gif_ip6hdr->ip6_src, &ip6->ip6_dst)) return (0); + ret = 128; + if (!IN6_ARE_ADDR_EQUAL(&sc->gif_ip6hdr->ip6_dst, &ip6->ip6_src)) { + if ((sc->gif_options & GIF_IGNORE_SOURCE) == 0) + return (0); + } else + ret += 128; /* martian filters on outer source - done in ip6_input */ @@ -214,7 +220,7 @@ gif_validate6(const struct ip6_hdr *ip6, struct gif_softc *sc, RTFREE_LOCKED(rt); } - return (128 * 2); + return (ret); } /* diff --git a/sys/netinet6/in6_rmx.c b/sys/netinet6/in6_rmx.c index 1403647380b5..9aef3db30fca 100644 --- a/sys/netinet6/in6_rmx.c +++ b/sys/netinet6/in6_rmx.c @@ -263,7 +263,7 @@ in6_inithead(void **head, int off) rnh->rnh_addaddr = in6_addroute; if (V__in6_rt_was_here == 0) { - callout_init(&V_rtq_mtutimer, CALLOUT_MPSAFE); + callout_init(&V_rtq_mtutimer, 1); in6_mtutimo(curvnet); /* kick off timeout first time */ V__in6_rt_was_here = 1; } diff --git a/sys/netinet6/nd6.h b/sys/netinet6/nd6.h index 22509ac946bb..0b061df928da 100644 --- a/sys/netinet6/nd6.h +++ b/sys/netinet6/nd6.h @@ -87,8 +87,7 @@ struct nd_ifinfo { #define ND6_IFF_AUTO_LINKLOCAL 0x20 #define ND6_IFF_NO_RADR 0x40 #define ND6_IFF_NO_PREFER_IFACE 0x80 /* XXX: not related to ND. */ -#define ND6_IFF_IGNORELOOP 0x100 -#define ND6_IFF_NO_DAD 0x200 +#define ND6_IFF_NO_DAD 0x100 #define ND6_CREATE LLE_CREATE #define ND6_EXCLUSIVE LLE_EXCLUSIVE diff --git a/sys/netinet6/nd6_nbr.c b/sys/netinet6/nd6_nbr.c index a4ae618bb37d..9c92cd959c39 100644 --- a/sys/netinet6/nd6_nbr.c +++ b/sys/netinet6/nd6_nbr.c @@ -1445,10 +1445,9 @@ nd6_dad_timer(struct dadq *dp) dp->dad_ns_lcount > 0 && dp->dad_ns_lcount > dp->dad_loopbackprobe) { /* - * A looped back probe is detected, - * Sec. 4.1 in draft-ietf-6man-enhanced-dad-13 - * requires transmission of additional probes until - * the loopback condition becomes clear. + * Sec. 4.1 in RFC 7527 requires transmission of + * additional probes until the loopback condition + * becomes clear when a looped back probe is detected. */ log(LOG_ERR, "%s: a looped back NS message is " "detected during DAD for %s. " @@ -1456,16 +1455,6 @@ nd6_dad_timer(struct dadq *dp) if_name(ifa->ifa_ifp), ip6_sprintf(ip6buf, IFA_IN6(ifa))); dp->dad_loopbackprobe = dp->dad_ns_lcount; - /* - * An interface with IGNORELOOP is one which a - * loopback is permanently expected while regular - * traffic works. In that case, stop DAD after - * MAX_MULTICAST_SOLICIT number of NS messages - * regardless of the number of received loopback NS - * by increasing dad_loopbackprobe in advance. - */ - if (ND_IFINFO(ifa->ifa_ifp)->flags & ND6_IFF_IGNORELOOP) - dp->dad_loopbackprobe += V_nd6_mmaxtries; /* * Send an NS immediately and increase dad_count by * V_nd6_mmaxtries - 1. diff --git a/sys/netinet6/sctp6_usrreq.c b/sys/netinet6/sctp6_usrreq.c index f2b2322ee4bc..54c65b61b9e6 100644 --- a/sys/netinet6/sctp6_usrreq.c +++ b/sys/netinet6/sctp6_usrreq.c @@ -211,7 +211,8 @@ sctp6_notify_mbuf(struct sctp_inpcb *inp, struct icmp6_hdr *icmp6, */ nxtsz = ntohl(icmp6->icmp6_mtu); /* Stop any PMTU timer */ - sctp_timer_stop(SCTP_TIMER_TYPE_PATHMTURAISE, inp, stcb, NULL, SCTP_FROM_SCTP6_USRREQ + SCTP_LOC_1); + sctp_timer_stop(SCTP_TIMER_TYPE_PATHMTURAISE, inp, stcb, NULL, + SCTP_FROM_SCTP6_USRREQ + SCTP_LOC_1); /* Adjust destination size limit */ if (net->mtu > nxtsz) { @@ -333,7 +334,8 @@ sctp6_notify(struct sctp_inpcb *inp, SCTP_TCB_LOCK(stcb); atomic_subtract_int(&stcb->asoc.refcnt, 1); #endif - (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, SCTP_FROM_SCTP_USRREQ + SCTP_LOC_2); + (void)sctp_free_assoc(inp, stcb, SCTP_NORMAL_PROC, + SCTP_FROM_SCTP6_USRREQ + SCTP_LOC_2); #if defined(__APPLE__) || defined(SCTP_SO_LOCK_TESTING) SCTP_SOCKET_UNLOCK(so, 1); /* SCTP_TCB_UNLOCK(stcb); MT: I think this is not needed. */ diff --git a/sys/netipsec/esp.h b/sys/netipsec/esp.h index eb3739701181..8eb096302ca7 100644 --- a/sys/netipsec/esp.h +++ b/sys/netipsec/esp.h @@ -42,8 +42,7 @@ struct esp { /*variable size, 32bit bound*/ /* Initialization Vector */ /*variable size*/ /* Payload data */ /*variable size*/ /* padding */ - /*8bit*/ /* pad size */ - /*8bit*/ /* next header */ + /*8bit*/ /* pad length */ /*8bit*/ /* next header */ /*variable size, 32bit bound*/ /* Authentication data (new IPsec) */ }; @@ -53,8 +52,7 @@ struct newesp { u_int32_t esp_seq; /* Sequence number */ /*variable size*/ /* (IV and) Payload data */ /*variable size*/ /* padding */ - /*8bit*/ /* pad size */ - /*8bit*/ /* next header */ + /*8bit*/ /* pad length */ /*8bit*/ /* next header */ /*variable size, 32bit bound*/ /* Authentication data */ }; diff --git a/sys/netipsec/key.c b/sys/netipsec/key.c index 353dd328c79e..1e70fb274f0b 100644 --- a/sys/netipsec/key.c +++ b/sys/netipsec/key.c @@ -537,7 +537,7 @@ static int key_acquire2(struct socket *, struct mbuf *, const struct sadb_msghdr *); static int key_register(struct socket *, struct mbuf *, const struct sadb_msghdr *); -static int key_expire(struct secasvar *); +static int key_expire(struct secasvar *, int); static int key_flush(struct socket *, struct mbuf *, const struct sadb_msghdr *); static int key_dump(struct socket *, struct mbuf *, @@ -2199,7 +2199,7 @@ key_spddelete2(struct socket *so, struct mbuf *m, } /* - * SADB_X_GET processing + * SADB_X_SPDGET processing * receive * * from the user(?), @@ -2237,7 +2237,8 @@ key_spdget(struct socket *so, struct mbuf *m, const struct sadb_msghdr *mhp) return key_senderror(so, m, ENOENT); } - n = key_setdumpsp(sp, SADB_X_SPDGET, 0, mhp->msg->sadb_msg_pid); + n = key_setdumpsp(sp, SADB_X_SPDGET, mhp->msg->sadb_msg_seq, + mhp->msg->sadb_msg_pid); KEY_FREESP(&sp); if (n != NULL) { m_freem(m); @@ -4242,41 +4243,29 @@ key_flush_sad(time_t now) "time, why?\n", __func__)); continue; } - - /* check SOFT lifetime */ - if (sav->lft_s->addtime != 0 && - now - sav->created > sav->lft_s->addtime) { - key_sa_chgstate(sav, SADB_SASTATE_DYING); - /* - * Actually, only send expire message if - * SA has been used, as it was done before, - * but should we always send such message, - * and let IKE daemon decide if it should be - * renegotiated or not ? - * XXX expire message will actually NOT be - * sent if SA is only used after soft - * lifetime has been reached, see below - * (DYING state) - */ - if (sav->lft_c->usetime != 0) - key_expire(sav); - } - /* check SOFT lifetime by bytes */ /* - * XXX I don't know the way to delete this SA - * when new SA is installed. Caution when it's - * installed too big lifetime by time. + * RFC 2367: + * HARD lifetimes MUST take precedence over SOFT + * lifetimes, meaning if the HARD and SOFT lifetimes + * are the same, the HARD lifetime will appear on the + * EXPIRE message. */ - else if (sav->lft_s->bytes != 0 && - sav->lft_s->bytes < sav->lft_c->bytes) { - + /* check HARD lifetime */ + if ((sav->lft_h->addtime != 0 && + now - sav->created > sav->lft_h->addtime) || + (sav->lft_h->bytes != 0 && + sav->lft_h->bytes < sav->lft_c->bytes)) { + key_sa_chgstate(sav, SADB_SASTATE_DEAD); + key_expire(sav, 1); + KEY_FREESAV(&sav); + } + /* check SOFT lifetime */ + else if ((sav->lft_s->addtime != 0 && + now - sav->created > sav->lft_s->addtime) || + (sav->lft_s->bytes != 0 && + sav->lft_s->bytes < sav->lft_c->bytes)) { key_sa_chgstate(sav, SADB_SASTATE_DYING); - /* - * XXX If we keep to send expire - * message in the status of - * DYING. Do remove below code. - */ - key_expire(sav); + key_expire(sav, 0); } } @@ -4296,6 +4285,7 @@ key_flush_sad(time_t now) if (sav->lft_h->addtime != 0 && now - sav->created > sav->lft_h->addtime) { key_sa_chgstate(sav, SADB_SASTATE_DEAD); + key_expire(sav, 1); KEY_FREESAV(&sav); } #if 0 /* XXX Should we keep to send expire message until HARD lifetime ? */ @@ -4311,13 +4301,14 @@ key_flush_sad(time_t now) * If there is no SA then sending * expire message. */ - key_expire(sav); + key_expire(sav, 0); } #endif /* check HARD lifetime by bytes */ else if (sav->lft_h->bytes != 0 && sav->lft_h->bytes < sav->lft_c->bytes) { key_sa_chgstate(sav, SADB_SASTATE_DEAD); + key_expire(sav, 1); KEY_FREESAV(&sav); } } @@ -6721,7 +6712,7 @@ key_freereg(struct socket *so) * others : error number */ static int -key_expire(struct secasvar *sav) +key_expire(struct secasvar *sav, int hard) { int satype; struct mbuf *result = NULL, *m; @@ -6779,11 +6770,19 @@ key_expire(struct secasvar *sav) lt->sadb_lifetime_usetime = sav->lft_c->usetime; lt = (struct sadb_lifetime *)(mtod(m, caddr_t) + len / 2); lt->sadb_lifetime_len = PFKEY_UNIT64(sizeof(struct sadb_lifetime)); - lt->sadb_lifetime_exttype = SADB_EXT_LIFETIME_SOFT; - lt->sadb_lifetime_allocations = sav->lft_s->allocations; - lt->sadb_lifetime_bytes = sav->lft_s->bytes; - lt->sadb_lifetime_addtime = sav->lft_s->addtime; - lt->sadb_lifetime_usetime = sav->lft_s->usetime; + if (hard) { + lt->sadb_lifetime_exttype = SADB_EXT_LIFETIME_HARD; + lt->sadb_lifetime_allocations = sav->lft_h->allocations; + lt->sadb_lifetime_bytes = sav->lft_h->bytes; + lt->sadb_lifetime_addtime = sav->lft_h->addtime; + lt->sadb_lifetime_usetime = sav->lft_h->usetime; + } else { + lt->sadb_lifetime_exttype = SADB_EXT_LIFETIME_SOFT; + lt->sadb_lifetime_allocations = sav->lft_s->allocations; + lt->sadb_lifetime_bytes = sav->lft_s->bytes; + lt->sadb_lifetime_addtime = sav->lft_s->addtime; + lt->sadb_lifetime_usetime = sav->lft_s->usetime; + } m_cat(result, m); /* set sadb_address for source */ @@ -7561,7 +7560,7 @@ key_init(void) SPACQ_LOCK_INIT(); #ifndef IPSEC_DEBUG2 - callout_init(&key_timer, CALLOUT_MPSAFE); + callout_init(&key_timer, 1); callout_reset(&key_timer, hz, key_timehandler, NULL); #endif /*IPSEC_DEBUG2*/ diff --git a/sys/netipsec/keysock.c b/sys/netipsec/keysock.c index 605d79c49a99..4d1295764b6e 100644 --- a/sys/netipsec/keysock.c +++ b/sys/netipsec/keysock.c @@ -149,8 +149,6 @@ key_sendup0(struct rawcb *rp, struct mbuf *m, int promisc) PFKEYSTAT_INC(in_nomem); return (ENOBUFS); } - m->m_pkthdr.len += sizeof(*pmsg); /* XXX: is this correct? */ - pmsg = mtod(m, struct sadb_msg *); bzero(pmsg, sizeof(*pmsg)); pmsg->sadb_msg_version = PF_KEY_V2; diff --git a/sys/netpfil/ipfw/dn_sched.h b/sys/netpfil/ipfw/dn_sched.h index 0d2845427ab9..4268edf0df2b 100644 --- a/sys/netpfil/ipfw/dn_sched.h +++ b/sys/netpfil/ipfw/dn_sched.h @@ -188,5 +188,5 @@ int dn_sched_modevent(module_t mod, int cmd, void *arg); }; \ DECLARE_MODULE(name, name##_mod, \ SI_SUB_PROTO_IFATTACHDOMAIN, SI_ORDER_ANY); \ - MODULE_DEPEND(name, dummynet, 3, 3, 3); + MODULE_DEPEND(name, dummynet, 3, 3, 3) #endif /* _DN_SCHED_H */ diff --git a/sys/netpfil/ipfw/ip_dn_private.h b/sys/netpfil/ipfw/ip_dn_private.h index 958c8201412c..42aa37885634 100644 --- a/sys/netpfil/ipfw/ip_dn_private.h +++ b/sys/netpfil/ipfw/ip_dn_private.h @@ -92,7 +92,7 @@ set_oid(struct dn_id *o, int type, int len) o->type = type; o->len = len; o->subtype = 0; -}; +} /* * configuration and global data for a dummynet instance diff --git a/sys/netpfil/ipfw/ip_dummynet.c b/sys/netpfil/ipfw/ip_dummynet.c index 06f80df5e4f1..3ba110ed5005 100644 --- a/sys/netpfil/ipfw/ip_dummynet.c +++ b/sys/netpfil/ipfw/ip_dummynet.c @@ -2169,7 +2169,7 @@ ip_dn_init(void) taskqueue_thread_enqueue, &dn_tq); taskqueue_start_threads(&dn_tq, 1, PI_NET, "dummynet"); - callout_init(&dn_timeout, CALLOUT_MPSAFE); + callout_init(&dn_timeout, 1); dn_reschedule(); /* Initialize curr_time adjustment mechanics. */ diff --git a/sys/netpfil/ipfw/ip_fw2.c b/sys/netpfil/ipfw/ip_fw2.c index 4da0ee015663..e5017d621672 100644 --- a/sys/netpfil/ipfw/ip_fw2.c +++ b/sys/netpfil/ipfw/ip_fw2.c @@ -1532,8 +1532,9 @@ do { \ else if (v == 5 /* O_JAIL */) key = ucred_cache.xid; #endif /* !__FreeBSD__ */ - } else + } #endif /* !USERSPACE */ + else break; } match = ipfw_lookup_table(chain, diff --git a/sys/netpfil/ipfw/ip_fw_dynamic.c b/sys/netpfil/ipfw/ip_fw_dynamic.c index 2b4386913974..083244d3590f 100644 --- a/sys/netpfil/ipfw/ip_fw_dynamic.c +++ b/sys/netpfil/ipfw/ip_fw_dynamic.c @@ -1395,7 +1395,7 @@ ipfw_dyn_init(struct ip_fw_chain *chain) /* Enforce limit on dynamic rules */ uma_zone_set_max(V_ipfw_dyn_rule_zone, V_dyn_max); - callout_init(&V_ipfw_timeout, CALLOUT_MPSAFE); + callout_init(&V_ipfw_timeout, 1); /* * This can potentially be done on first dynamic rule diff --git a/sys/netpfil/ipfw/ip_fw_pfil.c b/sys/netpfil/ipfw/ip_fw_pfil.c index 61f182d11be6..3460036279ed 100644 --- a/sys/netpfil/ipfw/ip_fw_pfil.c +++ b/sys/netpfil/ipfw/ip_fw_pfil.c @@ -505,7 +505,7 @@ static int ipfw_hook(int onoff, int pf) { struct pfil_head *pfh; - void *hook_func; + pfil_func_t hook_func; pfh = pfil_head_get(PFIL_TYPE_AF, pf); if (pfh == NULL) diff --git a/sys/netpfil/ipfw/ip_fw_sockopt.c b/sys/netpfil/ipfw/ip_fw_sockopt.c index d618a6c615b3..107c4b889962 100644 --- a/sys/netpfil/ipfw/ip_fw_sockopt.c +++ b/sys/netpfil/ipfw/ip_fw_sockopt.c @@ -2846,7 +2846,7 @@ compare_sh(const void *_a, const void *_b) * Returns pointer to handler or NULL. */ static struct ipfw_sopt_handler * -find_sh(uint16_t code, uint8_t version, void *handler) +find_sh(uint16_t code, uint8_t version, sopt_handler_f *handler) { struct ipfw_sopt_handler *sh, h; diff --git a/sys/netpfil/ipfw/ip_fw_table_value.c b/sys/netpfil/ipfw/ip_fw_table_value.c index c798ac1e43d0..c8c755cc6988 100644 --- a/sys/netpfil/ipfw/ip_fw_table_value.c +++ b/sys/netpfil/ipfw/ip_fw_table_value.c @@ -563,17 +563,6 @@ ipfw_link_table_values(struct ip_fw_chain *ch, struct tableop_state *ts) /* Let's try to link values */ for (i = 0; i < count; i++) { ptei = &tei[i]; - if (ptei->value != 0) { - - /* - * We may be here after several process restarts, - * so we need to update all fields that might - * have changed. - */ - ptv = (struct table_val_link *)ptei->ptv; - ptv->pval = &pval[i]; - continue; - } /* Check if record has appeared */ mask_table_value(ptei->pvalue, &tval, ts->vmask); diff --git a/sys/netpfil/pf/if_pfsync.c b/sys/netpfil/pf/if_pfsync.c index 3d62cf5ef6dd..516a92a01cc1 100644 --- a/sys/netpfil/pf/if_pfsync.c +++ b/sys/netpfil/pf/if_pfsync.c @@ -324,7 +324,7 @@ pfsync_clone_create(struct if_clone *ifc, int unit, caddr_t param) ifp->if_mtu = ETHERMTU; mtx_init(&sc->sc_mtx, pfsyncname, NULL, MTX_DEF); mtx_init(&sc->sc_bulk_mtx, "pfsync bulk", NULL, MTX_DEF); - callout_init(&sc->sc_tmo, CALLOUT_MPSAFE); + callout_init(&sc->sc_tmo, 1); callout_init_mtx(&sc->sc_bulk_tmo, &sc->sc_bulk_mtx, 0); callout_init_mtx(&sc->sc_bulkfail_tmo, &sc->sc_bulk_mtx, 0); diff --git a/sys/netpfil/pf/pf.c b/sys/netpfil/pf/pf.c index 6d24634e3214..5652365a0013 100644 --- a/sys/netpfil/pf/pf.c +++ b/sys/netpfil/pf/pf.c @@ -151,6 +151,7 @@ static VNET_DEFINE(struct pf_send_head, pf_sendqueue); #define V_pf_sendqueue VNET(pf_sendqueue) static struct mtx pf_sendqueue_mtx; +MTX_SYSINIT(pf_sendqueue_mtx, &pf_sendqueue_mtx, "pf send queue", MTX_DEF); #define PF_SENDQ_LOCK() mtx_lock(&pf_sendqueue_mtx) #define PF_SENDQ_UNLOCK() mtx_unlock(&pf_sendqueue_mtx) @@ -172,11 +173,15 @@ static VNET_DEFINE(struct task, pf_overloadtask); #define V_pf_overloadtask VNET(pf_overloadtask) static struct mtx pf_overloadqueue_mtx; +MTX_SYSINIT(pf_overloadqueue_mtx, &pf_overloadqueue_mtx, + "pf overload/flush queue", MTX_DEF); #define PF_OVERLOADQ_LOCK() mtx_lock(&pf_overloadqueue_mtx) #define PF_OVERLOADQ_UNLOCK() mtx_unlock(&pf_overloadqueue_mtx) VNET_DEFINE(struct pf_rulequeue, pf_unlinked_rules); struct mtx pf_unlnkdrules_mtx; +MTX_SYSINIT(pf_unlnkdrules_mtx, &pf_unlnkdrules_mtx, "pf unlinked rules", + MTX_DEF); static VNET_DEFINE(uma_zone_t, pf_sources_z); #define V_pf_sources_z VNET(pf_sources_z) @@ -804,18 +809,13 @@ pf_initialize() V_pf_altqs_active = &V_pf_altqs[0]; V_pf_altqs_inactive = &V_pf_altqs[1]; - /* Send & overload+flush queues. */ STAILQ_INIT(&V_pf_sendqueue); SLIST_INIT(&V_pf_overloadqueue); TASK_INIT(&V_pf_overloadtask, 0, pf_overload_task, curvnet); - mtx_init(&pf_sendqueue_mtx, "pf send queue", NULL, MTX_DEF); - mtx_init(&pf_overloadqueue_mtx, "pf overload/flush queue", NULL, - MTX_DEF); /* Unlinked, but may be referenced rules. */ TAILQ_INIT(&V_pf_unlinked_rules); - mtx_init(&pf_unlnkdrules_mtx, "pf unlinked rules", NULL, MTX_DEF); } void @@ -858,10 +858,6 @@ pf_cleanup() free(pfse, M_PFTEMP); } - mtx_destroy(&pf_sendqueue_mtx); - mtx_destroy(&pf_overloadqueue_mtx); - mtx_destroy(&pf_unlnkdrules_mtx); - uma_zdestroy(V_pf_sources_z); uma_zdestroy(V_pf_state_z); uma_zdestroy(V_pf_state_key_z); @@ -5903,13 +5899,14 @@ pf_test(int dir, struct ifnet *ifp, struct mbuf **m0, struct inpcb *inp) ((pd.pf_mtag = pf_get_mtag(m)) == NULL)) { action = PF_DROP; REASON_SET(&reason, PFRES_MEMORY); + } else { + if (pqid || (pd.tos & IPTOS_LOWDELAY)) + pd.pf_mtag->qid = r->pqid; + else + pd.pf_mtag->qid = r->qid; + /* Add hints for ecn. */ + pd.pf_mtag->hdr = h; } - if (pqid || (pd.tos & IPTOS_LOWDELAY)) - pd.pf_mtag->qid = r->pqid; - else - pd.pf_mtag->qid = r->qid; - /* add hints for ecn */ - pd.pf_mtag->hdr = h; } #endif /* ALTQ */ @@ -5948,9 +5945,11 @@ pf_test(int dir, struct ifnet *ifp, struct mbuf **m0, struct inpcb *inp) log = 1; DPFPRINTF(PF_DEBUG_MISC, ("pf: failed to allocate tag\n")); + } else { + pd.pf_mtag->flags |= + PF_FASTFWD_OURS_PRESENT; + m->m_flags &= ~M_FASTFWD_OURS; } - pd.pf_mtag->flags |= PF_FASTFWD_OURS_PRESENT; - m->m_flags &= ~M_FASTFWD_OURS; } ip_divert_ptr(*m0, dir == PF_IN ? DIR_IN : DIR_OUT); *m0 = NULL; @@ -6332,13 +6331,14 @@ pf_test6(int dir, struct ifnet *ifp, struct mbuf **m0, struct inpcb *inp) ((pd.pf_mtag = pf_get_mtag(m)) == NULL)) { action = PF_DROP; REASON_SET(&reason, PFRES_MEMORY); + } else { + if (pd.tos & IPTOS_LOWDELAY) + pd.pf_mtag->qid = r->pqid; + else + pd.pf_mtag->qid = r->qid; + /* Add hints for ecn. */ + pd.pf_mtag->hdr = h; } - if (pd.tos & IPTOS_LOWDELAY) - pd.pf_mtag->qid = r->pqid; - else - pd.pf_mtag->qid = r->qid; - /* add hints for ecn */ - pd.pf_mtag->hdr = h; } #endif /* ALTQ */ diff --git a/sys/netpfil/pf/pf_if.c b/sys/netpfil/pf/pf_if.c index 41acc7dd477f..2f12518418b1 100644 --- a/sys/netpfil/pf/pf_if.c +++ b/sys/netpfil/pf/pf_if.c @@ -103,6 +103,8 @@ LIST_HEAD(pfi_list, pfi_kif); static VNET_DEFINE(struct pfi_list, pfi_unlinked_kifs); #define V_pfi_unlinked_kifs VNET(pfi_unlinked_kifs) static struct mtx pfi_unlnkdkifs_mtx; +MTX_SYSINIT(pfi_unlnkdkifs_mtx, &pfi_unlnkdkifs_mtx, "pf unlinked interfaces", + MTX_DEF); void pfi_initialize(void) @@ -115,8 +117,6 @@ pfi_initialize(void) V_pfi_buffer = malloc(V_pfi_buffer_max * sizeof(*V_pfi_buffer), PFI_MTYPE, M_WAITOK); - mtx_init(&pfi_unlnkdkifs_mtx, "pf unlinked interfaces", NULL, MTX_DEF); - kif = malloc(sizeof(*kif), PFI_MTYPE, M_WAITOK); PF_RULES_WLOCK(); V_pfi_all = pfi_kif_attach(kif, IFG_ALL); @@ -166,8 +166,6 @@ pfi_cleanup(void) free(p, PFI_MTYPE); } - mtx_destroy(&pfi_unlnkdkifs_mtx); - free(V_pfi_buffer, PFI_MTYPE); } diff --git a/sys/netpfil/pf/pf_ioctl.c b/sys/netpfil/pf/pf_ioctl.c index c20e00acbe54..3c3556f59ae6 100644 --- a/sys/netpfil/pf/pf_ioctl.c +++ b/sys/netpfil/pf/pf_ioctl.c @@ -3756,6 +3756,7 @@ pf_unload(void) wakeup_one(pf_purge_thread); rw_sleep(pf_purge_thread, &pf_rules_lock, 0, "pftmo", 0); } + PF_RULES_WUNLOCK(); pf_normalize_cleanup(); pfi_cleanup(); pfr_cleanup(); @@ -3763,7 +3764,6 @@ pf_unload(void) pf_cleanup(); if (IS_DEFAULT_VNET(curvnet)) pf_mtag_cleanup(); - PF_RULES_WUNLOCK(); destroy_dev(pf_dev); rw_destroy(&pf_rules_lock); sx_destroy(&pf_ioctl_lock); diff --git a/sys/netpfil/pf/pf_norm.c b/sys/netpfil/pf/pf_norm.c index f1697236721c..3f210c29df70 100644 --- a/sys/netpfil/pf/pf_norm.c +++ b/sys/netpfil/pf/pf_norm.c @@ -34,6 +34,7 @@ __FBSDID("$FreeBSD$"); #include "opt_pf.h" #include +#include #include #include #include @@ -108,6 +109,7 @@ struct pf_fragment_tag { }; static struct mtx pf_frag_mtx; +MTX_SYSINIT(pf_frag_mtx, &pf_frag_mtx, "pf fragments", MTX_DEF); #define PF_FRAG_LOCK() mtx_lock(&pf_frag_mtx) #define PF_FRAG_UNLOCK() mtx_unlock(&pf_frag_mtx) #define PF_FRAG_ASSERT() mtx_assert(&pf_frag_mtx, MA_OWNED) @@ -197,8 +199,6 @@ pf_normalize_init(void) uma_zone_set_max(V_pf_frent_z, PFFRAG_FRENT_HIWAT); uma_zone_set_warning(V_pf_frent_z, "PF frag entries limit reached"); - mtx_init(&pf_frag_mtx, "pf fragments", NULL, MTX_DEF); - TAILQ_INIT(&V_pf_fragqueue); TAILQ_INIT(&V_pf_cachequeue); } @@ -210,8 +210,6 @@ pf_normalize_cleanup(void) uma_zdestroy(V_pf_state_scrub_z); uma_zdestroy(V_pf_frent_z); uma_zdestroy(V_pf_frag_z); - - mtx_destroy(&pf_frag_mtx); } static int diff --git a/sys/ofed/drivers/net/mlx4/en_netdev.c b/sys/ofed/drivers/net/mlx4/en_netdev.c index 68ce12574b67..d8b2f4fbdea0 100644 --- a/sys/ofed/drivers/net/mlx4/en_netdev.c +++ b/sys/ofed/drivers/net/mlx4/en_netdev.c @@ -650,6 +650,7 @@ static void mlx4_en_cache_mclist(struct net_device *dev) struct mlx4_en_mc_list *tmp; struct mlx4_en_priv *priv = netdev_priv(dev); + if_maddr_rlock(dev); TAILQ_FOREACH(ifma, &dev->if_multiaddrs, ifma_link) { if (ifma->ifma_addr->sa_family != AF_LINK) continue; @@ -658,10 +659,13 @@ static void mlx4_en_cache_mclist(struct net_device *dev) continue; /* Make sure the list didn't grow. */ tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC); + if (tmp == NULL) + break; memcpy(tmp->addr, LLADDR((struct sockaddr_dl *)ifma->ifma_addr), ETH_ALEN); list_add_tail(&tmp->list, &priv->mc_list); } + if_maddr_runlock(dev); } static void update_mclist_flags(struct mlx4_en_priv *priv, @@ -1963,6 +1967,29 @@ static int mlx4_en_ioctl(struct ifnet *dev, u_long command, caddr_t data) mutex_unlock(&mdev->state_lock); VLAN_CAPABILITIES(dev); break; + case SIOCGI2C: { + struct ifi2creq i2c; + + error = copyin(ifr->ifr_data, &i2c, sizeof(i2c)); + if (error) + break; + if (i2c.len > sizeof(i2c.data)) { + error = EINVAL; + break; + } + /* + * Note that we ignore i2c.addr here. The driver hardcodes + * the address to 0x50, while standard expects it to be 0xA0. + */ + error = mlx4_get_module_info(mdev->dev, priv->port, + i2c.offset, i2c.len, i2c.data); + if (error < 0) { + error = -error; + break; + } + error = copyout(&i2c, ifr->ifr_data, sizeof(i2c)); + break; + } default: error = ether_ioctl(dev, command, data); break; diff --git a/sys/ofed/drivers/net/mlx4/port.c b/sys/ofed/drivers/net/mlx4/port.c index c653d4ba35c2..4d7aa0ba90e5 100644 --- a/sys/ofed/drivers/net/mlx4/port.c +++ b/sys/ofed/drivers/net/mlx4/port.c @@ -1058,3 +1058,160 @@ int mlx4_get_roce_gid_from_slave(struct mlx4_dev *dev, int port, int slave_id, u } EXPORT_SYMBOL(mlx4_get_roce_gid_from_slave); +/* Cable Module Info */ +#define MODULE_INFO_MAX_READ 48 + +#define I2C_ADDR_LOW 0x50 +#define I2C_ADDR_HIGH 0x51 +#define I2C_PAGE_SIZE 256 + +/* Module Info Data */ +struct mlx4_cable_info { + u8 i2c_addr; + u8 page_num; + __be16 dev_mem_address; + __be16 reserved1; + __be16 size; + __be32 reserved2[2]; + u8 data[MODULE_INFO_MAX_READ]; +}; + +enum cable_info_err { + CABLE_INF_INV_PORT = 0x1, + CABLE_INF_OP_NOSUP = 0x2, + CABLE_INF_NOT_CONN = 0x3, + CABLE_INF_NO_EEPRM = 0x4, + CABLE_INF_PAGE_ERR = 0x5, + CABLE_INF_INV_ADDR = 0x6, + CABLE_INF_I2C_ADDR = 0x7, + CABLE_INF_QSFP_VIO = 0x8, + CABLE_INF_I2C_BUSY = 0x9, +}; + +#define MAD_STATUS_2_CABLE_ERR(mad_status) ((mad_status >> 8) & 0xFF) + +#ifdef DEBUG +static inline const char *cable_info_mad_err_str(u16 mad_status) +{ + u8 err = MAD_STATUS_2_CABLE_ERR(mad_status); + + switch (err) { + case CABLE_INF_INV_PORT: + return "invalid port selected"; + case CABLE_INF_OP_NOSUP: + return "operation not supported for this port (the port is of type CX4 or internal)"; + case CABLE_INF_NOT_CONN: + return "cable is not connected"; + case CABLE_INF_NO_EEPRM: + return "the connected cable has no EPROM (passive copper cable)"; + case CABLE_INF_PAGE_ERR: + return "page number is greater than 15"; + case CABLE_INF_INV_ADDR: + return "invalid device_address or size (that is, size equals 0 or address+size is greater than 256)"; + case CABLE_INF_I2C_ADDR: + return "invalid I2C slave address"; + case CABLE_INF_QSFP_VIO: + return "at least one cable violates the QSFP specification and ignores the modsel signal"; + case CABLE_INF_I2C_BUSY: + return "I2C bus is constantly busy"; + } + return "Unknown Error"; +} +#endif /* DEBUG */ + +/** + * mlx4_get_module_info - Read cable module eeprom data + * @dev: mlx4_dev. + * @port: port number. + * @offset: byte offset in eeprom to start reading data from. + * @size: num of bytes to read. + * @data: output buffer to put the requested data into. + * + * Reads cable module eeprom data, puts the outcome data into + * data pointer paramer. + * Returns num of read bytes on success or a negative error + * code. + */ +int mlx4_get_module_info(struct mlx4_dev *dev, u8 port, u16 offset, + u16 size, u8 *data) +{ + struct mlx4_cmd_mailbox *inbox, *outbox; + struct mlx4_mad_ifc *inmad, *outmad; + struct mlx4_cable_info *cable_info; + u16 i2c_addr; + int ret; + + if (size > MODULE_INFO_MAX_READ) + size = MODULE_INFO_MAX_READ; + + inbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(inbox)) + return PTR_ERR(inbox); + + outbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(outbox)) { + mlx4_free_cmd_mailbox(dev, inbox); + return PTR_ERR(outbox); + } + + inmad = (struct mlx4_mad_ifc *)(inbox->buf); + outmad = (struct mlx4_mad_ifc *)(outbox->buf); + + inmad->method = 0x1; /* Get */ + inmad->class_version = 0x1; + inmad->mgmt_class = 0x1; + inmad->base_version = 0x1; + inmad->attr_id = cpu_to_be16(0xFF60); /* Module Info */ + + if (offset < I2C_PAGE_SIZE && offset + size > I2C_PAGE_SIZE) + /* Cross pages reads are not allowed + * read until offset 256 in low page + */ + size -= offset + size - I2C_PAGE_SIZE; + + i2c_addr = I2C_ADDR_LOW; + if (offset >= I2C_PAGE_SIZE) { + /* Reset offset to high page */ + i2c_addr = I2C_ADDR_HIGH; + offset -= I2C_PAGE_SIZE; + } + + cable_info = (struct mlx4_cable_info *)inmad->data; + cable_info->dev_mem_address = cpu_to_be16(offset); + cable_info->page_num = 0; + cable_info->i2c_addr = i2c_addr; + cable_info->size = cpu_to_be16(size); + + ret = mlx4_cmd_box(dev, inbox->dma, outbox->dma, port, 3, + MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C, MLX4_CMD_NATIVE); + if (ret) + goto out; + + if (be16_to_cpu(outmad->status)) { + /* Mad returned with bad status */ + ret = be16_to_cpu(outmad->status); +#ifdef DEBUG + mlx4_warn(dev, "MLX4_CMD_MAD_IFC Get Module info attr(%x) " + "port(%d) i2c_addr(%x) offset(%d) size(%d): Response " + "Mad Status(%x) - %s\n", 0xFF60, port, i2c_addr, offset, + size, ret, cable_info_mad_err_str(ret)); +#endif + if (i2c_addr == I2C_ADDR_HIGH && + MAD_STATUS_2_CABLE_ERR(ret) == CABLE_INF_I2C_ADDR) + /* Some SFP cables do not support i2c slave + * address 0x51 (high page), abort silently. + */ + ret = 0; + else + ret = -ret; + goto out; + } + cable_info = (struct mlx4_cable_info *)outmad->data; + memcpy(data, cable_info->data, size); + ret = size; +out: + mlx4_free_cmd_mailbox(dev, inbox); + mlx4_free_cmd_mailbox(dev, outbox); + return ret; +} +EXPORT_SYMBOL(mlx4_get_module_info); diff --git a/sys/ofed/include/linux/bitops.h b/sys/ofed/include/linux/bitops.h index f225fdc6d9db..d3f82fe0bd42 100644 --- a/sys/ofed/include/linux/bitops.h +++ b/sys/ofed/include/linux/bitops.h @@ -165,6 +165,8 @@ find_next_bit(unsigned long *addr, unsigned long size, unsigned long offset) mask = (*addr) & ~BIT_MASK(offs); if (mask) return (bit + __ffsl(mask)); + if (size - bit <= BITS_PER_LONG) + return (size); bit += BITS_PER_LONG; addr++; } @@ -203,6 +205,8 @@ find_next_zero_bit(unsigned long *addr, unsigned long size, mask = ~(*addr) & ~BIT_MASK(offs); if (mask) return (bit + __ffsl(mask)); + if (size - bit <= BITS_PER_LONG) + return (size); bit += BITS_PER_LONG; addr++; } diff --git a/sys/ofed/include/linux/jiffies.h b/sys/ofed/include/linux/jiffies.h index b8757bbf4ac0..dce2e1544b9e 100644 --- a/sys/ofed/include/linux/jiffies.h +++ b/sys/ofed/include/linux/jiffies.h @@ -42,7 +42,7 @@ msecs_to_jiffies(int msec) tv.tv_sec = msec / 1000; tv.tv_usec = (msec % 1000) * 1000; - return (tvtohz(&tv)); + return (tvtohz(&tv) - 1); } #define jiffies ticks diff --git a/sys/ofed/include/linux/mlx4/device.h b/sys/ofed/include/linux/mlx4/device.h index 8c0db91f49ac..536c421132c7 100644 --- a/sys/ofed/include/linux/mlx4/device.h +++ b/sys/ofed/include/linux/mlx4/device.h @@ -892,6 +892,26 @@ struct mlx4_init_port_param { u64 si_guid; }; +#define MAD_IFC_DATA_SZ 192 +/* MAD IFC Mailbox */ +struct mlx4_mad_ifc { + u8 base_version; + u8 mgmt_class; + u8 class_version; + u8 method; + __be16 status; + __be16 class_specific; + __be64 tid; + __be16 attr_id; + __be16 resv; + __be32 attr_mod; + __be64 mkey; + __be16 dr_slid; + __be16 dr_dlid; + u8 reserved[28]; + u8 data[MAD_IFC_DATA_SZ]; +} __packed; + #define mlx4_foreach_port(port, dev, type) \ for ((port) = 1; (port) <= (dev)->caps.num_ports; (port)++) \ if ((type) == (dev)->caps.port_mask[(port)]) @@ -1294,4 +1314,7 @@ int mlx4_read_clock(struct mlx4_dev *dev); int mlx4_get_internal_clock_params(struct mlx4_dev *dev, struct mlx4_clock_params *params); +int mlx4_get_module_info(struct mlx4_dev *dev, u8 port, + u16 offset, u16 size, u8 *data); + #endif /* MLX4_DEVICE_H */ diff --git a/sys/ofed/include/linux/timer.h b/sys/ofed/include/linux/timer.h index 0bb85b4f8a69..53ee20b4a451 100644 --- a/sys/ofed/include/linux/timer.h +++ b/sys/ofed/include/linux/timer.h @@ -48,14 +48,14 @@ extern unsigned long linux_timer_hz_mask; do { \ (timer)->function = (func); \ (timer)->data = (dat); \ - callout_init(&(timer)->timer_callout, CALLOUT_MPSAFE); \ + callout_init(&(timer)->timer_callout, 1); \ } while (0) #define init_timer(timer) \ do { \ (timer)->function = NULL; \ (timer)->data = 0; \ - callout_init(&(timer)->timer_callout, CALLOUT_MPSAFE); \ + callout_init(&(timer)->timer_callout, 1); \ } while (0) extern void mod_timer(struct timer_list *, unsigned long); diff --git a/sys/ofed/include/linux/workqueue.h b/sys/ofed/include/linux/workqueue.h index 38cd2feddb60..075016ad5a35 100644 --- a/sys/ofed/include/linux/workqueue.h +++ b/sys/ofed/include/linux/workqueue.h @@ -78,7 +78,7 @@ do { \ #define INIT_DELAYED_WORK(_work, func) \ do { \ INIT_WORK(&(_work)->work, func); \ - callout_init(&(_work)->timer, CALLOUT_MPSAFE); \ + callout_init(&(_work)->timer, 1); \ } while (0) #define INIT_DEFERRABLE_WORK INIT_DELAYED_WORK diff --git a/sys/opencrypto/cryptodeflate.c b/sys/opencrypto/cryptodeflate.c index c55210dcbb78..28e284fce932 100644 --- a/sys/opencrypto/cryptodeflate.c +++ b/sys/opencrypto/cryptodeflate.c @@ -105,8 +105,8 @@ deflate_global(data, size, decomp, out) bufh = bufp = malloc(sizeof(*bufp) + (size_t)(size * i), M_CRYPTO_DATA, M_NOWAIT); if (bufp == NULL) { - SDT_PROBE3(opencrypto, deflate, deflate_global, bad, - decomp, 0, __LINE__); + SDT_PROBE5(opencrypto, deflate, deflate_global, bad, + decomp, 0, __LINE__, 0, 0); goto bad2; } bufp->next = NULL; @@ -125,8 +125,8 @@ deflate_global(data, size, decomp, out) deflateInit2(&zbuf, Z_DEFAULT_COMPRESSION, Z_METHOD, window_deflate, Z_MEMLEVEL, Z_DEFAULT_STRATEGY); if (error != Z_OK) { - SDT_PROBE3(opencrypto, deflate, deflate_global, bad, - decomp, error, __LINE__); + SDT_PROBE5(opencrypto, deflate, deflate_global, bad, + decomp, error, __LINE__, 0, 0); goto bad; } @@ -165,8 +165,8 @@ deflate_global(data, size, decomp, out) p = malloc(sizeof(*p) + (size_t)(size * i), M_CRYPTO_DATA, M_NOWAIT); if (p == NULL) { - SDT_PROBE3(opencrypto, deflate, deflate_global, - bad, decomp, 0, __LINE__); + SDT_PROBE5(opencrypto, deflate, deflate_global, + bad, decomp, 0, __LINE__, 0, 0); goto bad; } p->next = NULL; @@ -195,8 +195,8 @@ deflate_global(data, size, decomp, out) *out = malloc(result, M_CRYPTO_DATA, M_NOWAIT); if (*out == NULL) { - SDT_PROBE3(opencrypto, deflate, deflate_global, bad, - decomp, 0, __LINE__); + SDT_PROBE5(opencrypto, deflate, deflate_global, bad, + decomp, 0, __LINE__, 0, 0); goto bad; } if (decomp) diff --git a/sys/pc98/conf/GENERIC b/sys/pc98/conf/GENERIC index 2312658b8916..b826adb14933 100644 --- a/sys/pc98/conf/GENERIC +++ b/sys/pc98/conf/GENERIC @@ -71,6 +71,9 @@ options CAPABILITY_MODE # Capsicum capability mode options CAPABILITIES # Capsicum capabilities options MAC # TrustedBSD MAC Framework options INCLUDE_CONFIG_FILE # Include this file in kernel +options RACCT # Resource accounting framework +options RACCT_DEFAULT_TO_DISABLED # Set kern.racct.enable=0 by default +options RCTL # Resource limits # Debugging support. Always need this: options KDB # Enable kernel debugger support. diff --git a/sys/powerpc/conf/GENERIC b/sys/powerpc/conf/GENERIC index b5bf850263c2..4172d532dc96 100644 --- a/sys/powerpc/conf/GENERIC +++ b/sys/powerpc/conf/GENERIC @@ -77,6 +77,9 @@ options MAC # TrustedBSD MAC Framework options KDTRACE_HOOKS # Kernel DTrace hooks options DDB_CTF # Kernel ELF linker loads CTF data options INCLUDE_CONFIG_FILE # Include this file in kernel +options RACCT # Resource accounting framework +options RACCT_DEFAULT_TO_DISABLED # Set kern.racct.enable=0 by default +options RCTL # Resource limits # Debugging support. Always need this: options KDB # Enable kernel debugger support. diff --git a/sys/powerpc/mambo/mambo_console.c b/sys/powerpc/mambo/mambo_console.c index c8b0ad7f288a..133458114291 100644 --- a/sys/powerpc/mambo/mambo_console.c +++ b/sys/powerpc/mambo/mambo_console.c @@ -89,7 +89,7 @@ cn_drvinit(void *unused) polltime = 1; - callout_init(&mambo_callout, CALLOUT_MPSAFE); + callout_init(&mambo_callout, 1); callout_reset(&mambo_callout, polltime, mambo_timeout, NULL); } } diff --git a/sys/powerpc/mpc85xx/pci_mpc85xx.c b/sys/powerpc/mpc85xx/pci_mpc85xx.c index f1b958f77052..0050a9877f20 100644 --- a/sys/powerpc/mpc85xx/pci_mpc85xx.c +++ b/sys/powerpc/mpc85xx/pci_mpc85xx.c @@ -570,10 +570,19 @@ fsl_pcib_init(struct fsl_pcib_softc *sc, int bus, int maxslot) subclass = fsl_pcib_read_config(sc->sc_dev, bus, slot, func, PCIR_SUBCLASS, 1); + /* + * The PCI Root Complex comes up as a Processor/PowerPC, + * but is a bridge. + */ /* Allow only proper PCI-PCI briges */ - if (class != PCIC_BRIDGE) + if (class != PCIC_BRIDGE && class != PCIC_PROCESSOR) continue; - if (subclass != PCIS_BRIDGE_PCI) + if (subclass != PCIS_BRIDGE_PCI && + subclass != PCIS_PROCESSOR_POWERPC) + continue; + + if (subclass == PCIS_PROCESSOR_POWERPC && + hdrtype != PCIM_HDRTYPE_BRIDGE) continue; secbus++; @@ -825,4 +834,3 @@ fsl_pcib_decode_win(phandle_t node, struct fsl_pcib_softc *sc) return (0); } - diff --git a/sys/powerpc/mpc85xx/pci_mpc85xx_pcib.c b/sys/powerpc/mpc85xx/pci_mpc85xx_pcib.c new file mode 100644 index 000000000000..934f3cc01df8 --- /dev/null +++ b/sys/powerpc/mpc85xx/pci_mpc85xx_pcib.c @@ -0,0 +1,104 @@ +/*- + * Copyright 2015 Justin Hibbits + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * From: FreeBSD: src/sys/powerpc/mpc85xx/pci_ocp.c,v 1.9 2010/03/23 23:46:28 marcel + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include + +#include "pcib_if.h" + +static int +fsl_pcib_rc_probe(device_t dev) +{ + printf("Probe called\n"); + if (pci_get_vendor(dev) != 0x1957) + return (ENXIO); + if (pci_get_progif(dev) != 0) + return (ENXIO); + if (pci_get_class(dev) != PCIC_PROCESSOR) + return (ENXIO); + if (pci_get_subclass(dev) != PCIS_PROCESSOR_POWERPC) + return (ENXIO); + + return (BUS_PROBE_DEFAULT); +} + +static int +fsl_pcib_rc_attach(device_t dev) +{ + struct pcib_softc *sc; + device_t child; + + pcib_bridge_init(dev); + pcib_attach_common(dev); + + sc = device_get_softc(dev); + if (sc->bus.sec != 0) { + child = device_add_child(dev, "pci", -1); + if (child != NULL) + return (bus_generic_attach(dev)); + } + + return (0); +} + +static device_method_t fsl_pcib_rc_methods[] = { + DEVMETHOD(device_probe, fsl_pcib_rc_probe), + DEVMETHOD(device_attach, fsl_pcib_rc_attach), + DEVMETHOD_END +}; + +static devclass_t fsl_pcib_rc_devclass; +DEFINE_CLASS_1(pcib, fsl_pcib_rc_driver, fsl_pcib_rc_methods, + sizeof(struct pcib_softc), pcib_driver); +DRIVER_MODULE(rcpcib, pci, fsl_pcib_rc_driver, fsl_pcib_rc_devclass, 0, 0); + diff --git a/sys/powerpc/ofw/ofw_pcibus.c b/sys/powerpc/ofw/ofw_pcibus.c index 66fa34163b68..246b8868e2bb 100644 --- a/sys/powerpc/ofw/ofw_pcibus.c +++ b/sys/powerpc/ofw/ofw_pcibus.c @@ -201,7 +201,8 @@ ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno) * resource list. */ if (dinfo->opd_dinfo.cfg.intpin == 0) - ofw_bus_intr_to_rl(dev, child, &dinfo->opd_dinfo.resources); + ofw_bus_intr_to_rl(dev, child, + &dinfo->opd_dinfo.resources, NULL); } } diff --git a/sys/powerpc/powerpc/db_disasm.c b/sys/powerpc/powerpc/db_disasm.c index 67f90d254401..6d525b37080f 100644 --- a/sys/powerpc/powerpc/db_disasm.c +++ b/sys/powerpc/powerpc/db_disasm.c @@ -936,7 +936,7 @@ dis_ppc(const struct opcode *opcodeset, instr_t instr, vm_offset_t loc) } db_addr_t -db_disasm(db_addr_t loc, boolean_t extended) +db_disasm(db_addr_t loc, bool extended) { int class; instr_t opcode; diff --git a/sys/powerpc/powerpc/elf32_machdep.c b/sys/powerpc/powerpc/elf32_machdep.c index ea00306787ce..bdcd9babb8c5 100644 --- a/sys/powerpc/powerpc/elf32_machdep.c +++ b/sys/powerpc/powerpc/elf32_machdep.c @@ -108,6 +108,7 @@ struct sysentvec elf32_freebsd_sysvec = { .sv_shared_page_base = FREEBSD32_SHAREDPAGE, .sv_shared_page_len = PAGE_SIZE, .sv_schedtail = NULL, + .sv_thread_detach = NULL, }; INIT_SYSENTVEC(elf32_sysvec, &elf32_freebsd_sysvec); diff --git a/sys/powerpc/powerpc/elf64_machdep.c b/sys/powerpc/powerpc/elf64_machdep.c index 0b15ca3dea86..47fbbff2febd 100644 --- a/sys/powerpc/powerpc/elf64_machdep.c +++ b/sys/powerpc/powerpc/elf64_machdep.c @@ -84,6 +84,7 @@ struct sysentvec elf64_freebsd_sysvec = { .sv_shared_page_base = SHAREDPAGE, .sv_shared_page_len = PAGE_SIZE, .sv_schedtail = NULL, + .sv_thread_detach = NULL, }; INIT_SYSENTVEC(elf64_sysvec, &elf64_freebsd_sysvec); diff --git a/sys/powerpc/powerpc/exec_machdep.c b/sys/powerpc/powerpc/exec_machdep.c index 67ce4bc60c6e..0019faaa93bc 100644 --- a/sys/powerpc/powerpc/exec_machdep.c +++ b/sys/powerpc/powerpc/exec_machdep.c @@ -225,12 +225,6 @@ sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) usfp = (void *)(tf->fixreg[1] - rndfsize); } - /* - * Translate the signal if appropriate (Linux emu ?) - */ - if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) - sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; - /* * Save the floating-point state, if necessary, then copy it. */ diff --git a/sys/powerpc/pseries/phyp_console.c b/sys/powerpc/pseries/phyp_console.c index 79d90940d7d9..261f92b0d89e 100644 --- a/sys/powerpc/pseries/phyp_console.c +++ b/sys/powerpc/pseries/phyp_console.c @@ -256,7 +256,7 @@ uart_phyp_attach(device_t dev) bus_setup_intr(dev, sc->irqres, INTR_TYPE_TTY | INTR_MPSAFE, NULL, uart_phyp_intr, sc, &sc->sc_icookie); } else { - callout_init(&sc->callout, CALLOUT_MPSAFE); + callout_init(&sc->callout, 1); sc->polltime = hz / 20; if (sc->polltime < 1) sc->polltime = 1; diff --git a/sys/powerpc/pseries/vdevice.c b/sys/powerpc/pseries/vdevice.c index 2ec4c3376cc2..2323bc7d464c 100644 --- a/sys/powerpc/pseries/vdevice.c +++ b/sys/powerpc/pseries/vdevice.c @@ -146,7 +146,7 @@ vdevice_attach(device_t dev) } resource_list_init(&dinfo->mdi_resources); - ofw_bus_intr_to_rl(dev, child, &dinfo->mdi_resources); + ofw_bus_intr_to_rl(dev, child, &dinfo->mdi_resources, NULL); cdev = device_add_child(dev, NULL, -1); if (cdev == NULL) { diff --git a/sys/sparc64/conf/GENERIC b/sys/sparc64/conf/GENERIC index 5685185e5b2d..f602eeb712d3 100644 --- a/sys/sparc64/conf/GENERIC +++ b/sys/sparc64/conf/GENERIC @@ -67,6 +67,9 @@ options CAPABILITY_MODE # Capsicum capability mode options CAPABILITIES # Capsicum capabilities options MAC # TrustedBSD MAC Framework options INCLUDE_CONFIG_FILE # Include this file in kernel +options RACCT # Resource accounting framework +options RACCT_DEFAULT_TO_DISABLED # Set kern.racct.enable=0 by default +options RCTL # Resource limits # Debugging support. Always need this: options KDB # Enable kernel debugger support. diff --git a/sys/sparc64/sparc64/db_disasm.c b/sys/sparc64/sparc64/db_disasm.c index a20219eb72b2..55e2109b4bb6 100644 --- a/sys/sparc64/sparc64/db_disasm.c +++ b/sys/sparc64/sparc64/db_disasm.c @@ -803,7 +803,7 @@ static const struct sparc_insn sparc_i[] = { }; db_addr_t -db_disasm(db_addr_t loc, boolean_t altfmt) +db_disasm(db_addr_t loc, bool altfmt) { const struct sparc_insn* i_ptr = (struct sparc_insn *)&sparc_i; unsigned int insn, you_lose, bitmask; diff --git a/sys/sparc64/sparc64/elf_machdep.c b/sys/sparc64/sparc64/elf_machdep.c index 4d5571781d11..93045757e436 100644 --- a/sys/sparc64/sparc64/elf_machdep.c +++ b/sys/sparc64/sparc64/elf_machdep.c @@ -87,6 +87,7 @@ static struct sysentvec elf64_freebsd_sysvec = { .sv_fetch_syscall_args = cpu_fetch_syscall_args, .sv_syscallnames = syscallnames, .sv_schedtail = NULL, + .sv_thread_detach = NULL, }; static Elf64_Brandinfo freebsd_brand_info = { diff --git a/sys/sparc64/sparc64/machdep.c b/sys/sparc64/sparc64/machdep.c index 67f7d643d984..a95bc637761f 100644 --- a/sys/sparc64/sparc64/machdep.c +++ b/sys/sparc64/sparc64/machdep.c @@ -654,10 +654,6 @@ sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) fp = (struct frame *)sfp - 1; - /* Translate the signal if appropriate. */ - if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) - sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; - /* Build the argument list for the signal handler. */ tf->tf_out[0] = sig; tf->tf_out[2] = (register_t)&sfp->sf_uc; diff --git a/sys/sys/callout.h b/sys/sys/callout.h index 6e18ae791a8c..5e211640f9d4 100644 --- a/sys/sys/callout.h +++ b/sys/sys/callout.h @@ -43,7 +43,7 @@ #define CALLOUT_LOCAL_ALLOC 0x0001 /* was allocated from callfree */ #define CALLOUT_ACTIVE 0x0002 /* callout is currently active */ #define CALLOUT_PENDING 0x0004 /* callout is waiting for timeout */ -#define CALLOUT_MPSAFE 0x0008 /* callout handler is mp safe */ +#define CALLOUT_MPSAFE 0x0008 /* deprecated */ #define CALLOUT_RETURNUNLOCKED 0x0010 /* handler returns with mtx unlocked */ #define CALLOUT_SHAREDLOCK 0x0020 /* callout lock held in shared mode */ #define CALLOUT_DFRMIGRATION 0x0040 /* callout in deferred migration mode */ diff --git a/sys/sys/cdefs.h b/sys/sys/cdefs.h index ab7d59d2546a..82cdc6ea4b4d 100644 --- a/sys/sys/cdefs.h +++ b/sys/sys/cdefs.h @@ -375,10 +375,8 @@ #endif #if __GNUC_PREREQ__(4, 1) -#define __gnu_inline __attribute__((__gnu_inline__)) #define __returns_twice __attribute__((__returns_twice__)) #else -#define __gnu_inline #define __returns_twice #endif @@ -388,6 +386,12 @@ #define __alloc_size(x) #endif +#if __has_builtin(__builtin_unreachable) || __GNUC_PREREQ__(4, 6) +#define __unreachable() __builtin_unreachable() +#else +#define __unreachable() ((void)0) +#endif + #if __has_attribute(alloc_align) || __GNUC_PREREQ__(4, 9) #define __alloc_align(x) __attribute__((__alloc_align__(x))) #else @@ -464,7 +468,7 @@ #define __predict_false(exp) (exp) #endif -#if __GNUC_PREREQ__(4, 2) +#if __GNUC_PREREQ__(4, 0) #define __hidden __attribute__((__visibility__("hidden"))) #define __exported __attribute__((__visibility__("default"))) #else @@ -532,6 +536,22 @@ __attribute__((__format__ (__strftime__, fmtarg, firstvararg))) #endif +/* + * FORTIFY_SOURCE, and perhaps other compiler-specific features, require + * the use of non-standard inlining. In general we should try to avoid + * using these but GCC-compatible compilers tend to support the extensions + * well enough to use them in limited cases. + */ +#if __GNUC_PREREQ__(4, 1) +#if __has_attribute(artificial) || __GNUC_PREREQ__(4, 3) +#define __gnu_inline __attribute__((__gnu_inline__, __artificial__)) +#else +#define __gnu_inline __attribute__((__gnu_inline__)) +#endif /* artificial */ +#else +#define __gnu_inline +#endif + /* Compiler-dependent macros that rely on FreeBSD-specific extensions. */ #if defined(__FreeBSD_cc_version) && __FreeBSD_cc_version >= 300001 && \ defined(__GNUC__) && !defined(__INTEL_COMPILER) diff --git a/sys/sys/elf_common.h b/sys/sys/elf_common.h index aa06c7032e25..d429e86676a1 100644 --- a/sys/sys/elf_common.h +++ b/sys/sys/elf_common.h @@ -202,6 +202,7 @@ typedef struct { #define EM_386 3 /* Intel i386. */ #define EM_68K 4 /* Motorola 68000. */ #define EM_88K 5 /* Motorola 88000. */ +#define EM_IAMCU 6 /* Intel MCU. */ #define EM_860 7 /* Intel i860. */ #define EM_MIPS 8 /* MIPS R3000 Big-Endian only. */ #define EM_S370 9 /* IBM System/370. */ @@ -472,6 +473,9 @@ typedef struct { #define SHF_MASKOS 0x0ff00000 /* OS-specific semantics. */ #define SHF_MASKPROC 0xf0000000 /* Processor-specific semantics. */ +/* Flags for section groups. */ +#define GRP_COMDAT 0x1 /* COMDAT semantics. */ + /* Values for p_type. */ #define PT_NULL 0 /* Unused entry. */ #define PT_LOAD 1 /* Loadable segment. */ diff --git a/sys/sys/file.h b/sys/sys/file.h index 153885123704..d2e3c5e0d99c 100644 --- a/sys/sys/file.h +++ b/sys/sys/file.h @@ -66,6 +66,7 @@ struct socket; #define DTYPE_PTS 10 /* pseudo teletype master device */ #define DTYPE_DEV 11 /* Device specific fd type */ #define DTYPE_PROCDESC 12 /* process descriptor */ +#define DTYPE_LINUXEFD 13 /* emulation eventfd type */ #ifdef _KERNEL diff --git a/sys/sys/imgact.h b/sys/sys/imgact.h index ac88a149cb81..4a5ce9c4ac07 100644 --- a/sys/sys/imgact.h +++ b/sys/sys/imgact.h @@ -86,6 +86,7 @@ struct image_params { #ifdef _KERNEL struct sysentvec; struct thread; +struct vmspace; #define IMGACT_CORE_COMPRESS 0x01 @@ -98,6 +99,8 @@ void exec_setregs(struct thread *, struct image_params *, u_long); int exec_shell_imgact(struct image_params *); int exec_copyin_args(struct image_args *, char *, enum uio_seg, char **, char **); +int pre_execve(struct thread *td, struct vmspace **oldvmspace); +void post_execve(struct thread *td, int error, struct vmspace *oldvmspace); #endif #endif /* !_SYS_IMGACT_H_ */ diff --git a/sys/sys/imgact_elf.h b/sys/sys/imgact_elf.h index e8d5567cc273..d1d4f219c297 100644 --- a/sys/sys/imgact_elf.h +++ b/sys/sys/imgact_elf.h @@ -52,6 +52,7 @@ typedef struct { Elf_Size base; Elf_Size flags; Elf_Size entry; + Elf_Word hdr_eflags; /* e_flags field from ehdr */ } __ElfN(Auxargs); typedef struct { diff --git a/sys/sys/ktr.h b/sys/sys/ktr.h index 6135bc05d7ad..07d7c45b5c9f 100644 --- a/sys/sys/ktr.h +++ b/sys/sys/ktr.h @@ -62,7 +62,7 @@ struct ktr_entry { }; extern cpuset_t ktr_cpumask; -extern int ktr_mask; +extern uint64_t ktr_mask; extern int ktr_entries; extern int ktr_verbose; @@ -71,7 +71,7 @@ extern struct ktr_entry *ktr_buf; #ifdef KTR -void ktr_tracepoint(u_int mask, const char *file, int line, +void ktr_tracepoint(uint64_t mask, const char *file, int line, const char *format, u_long arg1, u_long arg2, u_long arg3, u_long arg4, u_long arg5, u_long arg6); diff --git a/sys/sys/ktr_class.h b/sys/sys/ktr_class.h index bdd7c1a1142f..6635cdc8f1cc 100644 --- a/sys/sys/ktr_class.h +++ b/sys/sys/ktr_class.h @@ -71,7 +71,8 @@ #define KTR_INET6 0x10000000 /* IPv6 stack */ #define KTR_SCHED 0x20000000 /* Machine parsed sched info. */ #define KTR_BUF 0x40000000 /* Buffer cache */ -#define KTR_ALL 0x7fffffff +#define KTR_PTRACE 0x80000000 /* Process debugging. */ +#define KTR_ALL 0xffffffff /* KTR trace classes to compile in */ #ifdef KTR diff --git a/sys/sys/malloc.h b/sys/sys/malloc.h index 6b8a9c08eaa7..c09d74996bb4 100644 --- a/sys/sys/malloc.h +++ b/sys/sys/malloc.h @@ -174,7 +174,7 @@ void contigfree(void *addr, unsigned long size, struct malloc_type *type); void *contigmalloc(unsigned long size, struct malloc_type *type, int flags, vm_paddr_t low, vm_paddr_t high, unsigned long alignment, vm_paddr_t boundary) __malloc_like __result_use_check - __alloc_size(1); + __alloc_size(1) __alloc_align(6); void free(void *addr, struct malloc_type *type); void *malloc(unsigned long size, struct malloc_type *type, int flags) __malloc_like __result_use_check __alloc_size(1); diff --git a/sys/sys/module.h b/sys/sys/module.h index 69b74ffab61e..4582bf927cb1 100644 --- a/sys/sys/module.h +++ b/sys/sys/module.h @@ -107,7 +107,8 @@ struct mod_metadata { DATA_SET(modmetadata_set, _mod_metadata##uniquifier) #define MODULE_DEPEND(module, mdepend, vmin, vpref, vmax) \ - static struct mod_depend _##module##_depend_on_##mdepend = { \ + static struct mod_depend _##module##_depend_on_##mdepend \ + __section(".data") = { \ vmin, \ vpref, \ vmax \ @@ -147,7 +148,8 @@ struct mod_metadata { DECLARE_MODULE_WITH_MAXVER(name, data, sub, order, __FreeBSD_version) #define MODULE_VERSION(module, version) \ - static struct mod_version _##module##_version = { \ + static struct mod_version _##module##_version \ + __section(".data") = { \ version \ }; \ MODULE_METADATA(_##module##_version, MDT_VERSION, \ diff --git a/sys/sys/mouse.h b/sys/sys/mouse.h index 5329693a8d7a..24d0ffc7a561 100644 --- a/sys/sys/mouse.h +++ b/sys/sys/mouse.h @@ -128,6 +128,13 @@ typedef struct synapticshw { int verticalScroll; int horizontalScroll; int verticalWheel; + int capEWmode; + int minimumXCoord; + int minimumYCoord; + int maximumXCoord; + int maximumYCoord; + int infoXupmm; + int infoYupmm; } synapticshw_t; /* iftype */ diff --git a/sys/sys/nvpair_impl.h b/sys/sys/nvpair_impl.h index 121c8ab5f95c..61885e6409bb 100644 --- a/sys/sys/nvpair_impl.h +++ b/sys/sys/nvpair_impl.h @@ -85,7 +85,7 @@ const unsigned char *nvpair_unpack_number(bool isbe, nvpair_t *nvp, const unsigned char *nvpair_unpack_string(bool isbe, nvpair_t *nvp, const unsigned char *ptr, size_t *leftp); const unsigned char *nvpair_unpack_nvlist(bool isbe, nvpair_t *nvp, - const unsigned char *ptr, size_t *leftp, size_t nvlist, nvlist_t **child); + const unsigned char *ptr, size_t *leftp, size_t nfds, nvlist_t **child); const unsigned char *nvpair_unpack_descriptor(bool isbe, nvpair_t *nvp, const unsigned char *ptr, size_t *leftp, const int *fds, size_t nfds); const unsigned char *nvpair_unpack_binary(bool isbe, nvpair_t *nvp, diff --git a/sys/sys/param.h b/sys/sys/param.h index bc722df6f25a..9bd1dd7d53f5 100644 --- a/sys/sys/param.h +++ b/sys/sys/param.h @@ -58,7 +58,7 @@ * in the range 5 to 9. */ #undef __FreeBSD_version -#define __FreeBSD_version 1100072 /* Master, propagated to newvers */ +#define __FreeBSD_version 1100075 /* Master, propagated to newvers */ /* * __FreeBSD_kernel__ indicates that this system uses the kernel of FreeBSD, diff --git a/sys/sys/pmc.h b/sys/sys/pmc.h index 34d9c3421991..f4d46b2e950f 100644 --- a/sys/sys/pmc.h +++ b/sys/sys/pmc.h @@ -73,7 +73,6 @@ #define __PMC_CPUS() \ __PMC_CPU(AMD_K7, 0x00, "AMD K7") \ __PMC_CPU(AMD_K8, 0x01, "AMD K8") \ - __PMC_CPU(ARMV7, 0x500, "ARMv7") \ __PMC_CPU(INTEL_P5, 0x80, "Intel Pentium") \ __PMC_CPU(INTEL_P6, 0x81, "Intel Pentium Pro") \ __PMC_CPU(INTEL_CL, 0x82, "Intel Celeron") \ @@ -105,7 +104,10 @@ __PMC_CPU(PPC_E500, 0x340, "PowerPC e500 Core") \ __PMC_CPU(PPC_MPC85XX, 0x340, "Freescale PowerPC MPC85XX") \ __PMC_CPU(PPC_970, 0x380, "IBM PowerPC 970") \ - __PMC_CPU(GENERIC, 0x400, "Generic") + __PMC_CPU(GENERIC, 0x400, "Generic") \ + __PMC_CPU(ARMV7, 0x500, "ARMv7") \ + __PMC_CPU(ARMV8_CORTEX_A53, 0x600, "ARMv8 Cortex A53") \ + __PMC_CPU(ARMV8_CORTEX_A57, 0x601, "ARMv8 Cortex A57") enum pmc_cputype { #undef __PMC_CPU @@ -121,29 +123,30 @@ enum pmc_cputype { */ #define __PMC_CLASSES() \ - __PMC_CLASS(TSC) /* CPU Timestamp counter */ \ - __PMC_CLASS(K7) /* AMD K7 performance counters */ \ - __PMC_CLASS(K8) /* AMD K8 performance counters */ \ - __PMC_CLASS(P5) /* Intel Pentium counters */ \ - __PMC_CLASS(P6) /* Intel Pentium Pro counters */ \ - __PMC_CLASS(P4) /* Intel Pentium-IV counters */ \ - __PMC_CLASS(IAF) /* Intel Core2/Atom, fixed function */ \ - __PMC_CLASS(IAP) /* Intel Core...Atom, programmable */ \ - __PMC_CLASS(UCF) /* Intel Uncore fixed function */ \ - __PMC_CLASS(UCP) /* Intel Uncore programmable */ \ - __PMC_CLASS(XSCALE) /* Intel XScale counters */ \ - __PMC_CLASS(ARMV7) /* ARMv7 */ \ - __PMC_CLASS(MIPS24K) /* MIPS 24K */ \ - __PMC_CLASS(OCTEON) /* Cavium Octeon */ \ - __PMC_CLASS(MIPS74K) /* MIPS 74K */ \ - __PMC_CLASS(PPC7450) /* Motorola MPC7450 class */ \ - __PMC_CLASS(PPC970) /* IBM PowerPC 970 class */ \ - __PMC_CLASS(E500) /* Freescale e500 class */ \ - __PMC_CLASS(SOFT) /* Software events */ + __PMC_CLASS(TSC, 0x000, "CPU Timestamp counter") \ + __PMC_CLASS(K7, 0x100, "AMD K7 performance counters") \ + __PMC_CLASS(K8, 0x101, "AMD K8 performance counters") \ + __PMC_CLASS(P5, 0x102, "Intel Pentium counters") \ + __PMC_CLASS(P6, 0x103, "Intel Pentium Pro counters") \ + __PMC_CLASS(P4, 0x104, "Intel Pentium-IV counters") \ + __PMC_CLASS(IAF, 0x105, "Intel Core2/Atom, fixed function") \ + __PMC_CLASS(IAP, 0x106, "Intel Core...Atom, programmable") \ + __PMC_CLASS(UCF, 0x107, "Intel Uncore fixed function") \ + __PMC_CLASS(UCP, 0x108, "Intel Uncore programmable") \ + __PMC_CLASS(XSCALE, 0x200, "Intel XScale counters") \ + __PMC_CLASS(ARMV7, 0x201, "ARMv7") \ + __PMC_CLASS(ARMV8, 0x202, "ARMv8") \ + __PMC_CLASS(MIPS24K, 0x300, "MIPS 24K") \ + __PMC_CLASS(OCTEON, 0x301, "Cavium Octeon") \ + __PMC_CLASS(MIPS74K, 0x302, "MIPS 74K") \ + __PMC_CLASS(PPC7450, 0x400, "Motorola MPC7450 class") \ + __PMC_CLASS(PPC970, 0x401, "IBM PowerPC 970 class") \ + __PMC_CLASS(E500, 0x402, "Freescale e500 class") \ + __PMC_CLASS(SOFT, 0x8000, "Software events") enum pmc_class { #undef __PMC_CLASS -#define __PMC_CLASS(N) PMC_CLASS_##N , +#define __PMC_CLASS(S,V,D) PMC_CLASS_##S = V, __PMC_CLASSES() }; @@ -998,7 +1001,8 @@ extern struct pmc_cpu **pmc_pcpu; /* driver statistics */ extern struct pmc_op_getdriverstats pmc_stats; -#if defined(DEBUG) +#if defined(HWPMC_DEBUG) +#include /* debug flags, major flag groups */ struct pmc_debugflags { @@ -1015,14 +1019,42 @@ struct pmc_debugflags { extern struct pmc_debugflags pmc_debugflags; +#define KTR_PMC KTR_SUBSYS + #define PMC_DEBUG_STRSIZE 128 #define PMC_DEBUG_DEFAULT_FLAGS { 0, 0, 0, 0, 0, 0, 0, 0 } -#define PMCDBG(M,N,L,F,...) do { \ +#define PMCDBG0(M, N, L, F) do { \ if (pmc_debugflags.pdb_ ## M & (1 << PMC_DEBUG_MIN_ ## N)) \ - printf(#M ":" #N ":" #L ": " F "\n", __VA_ARGS__); \ + CTR0(KTR_PMC, #M ":" #N ":" #L ": " F); \ } while (0) - +#define PMCDBG1(M, N, L, F, p1) do { \ + if (pmc_debugflags.pdb_ ## M & (1 << PMC_DEBUG_MIN_ ## N)) \ + CTR1(KTR_PMC, #M ":" #N ":" #L ": " F, p1); \ +} while (0) +#define PMCDBG2(M, N, L, F, p1, p2) do { \ + if (pmc_debugflags.pdb_ ## M & (1 << PMC_DEBUG_MIN_ ## N)) \ + CTR2(KTR_PMC, #M ":" #N ":" #L ": " F, p1, p2); \ +} while (0) +#define PMCDBG3(M, N, L, F, p1, p2, p3) do { \ + if (pmc_debugflags.pdb_ ## M & (1 << PMC_DEBUG_MIN_ ## N)) \ + CTR3(KTR_PMC, #M ":" #N ":" #L ": " F, p1, p2, p3); \ +} while (0) +#define PMCDBG4(M, N, L, F, p1, p2, p3, p4) do { \ + if (pmc_debugflags.pdb_ ## M & (1 << PMC_DEBUG_MIN_ ## N)) \ + CTR4(KTR_PMC, #M ":" #N ":" #L ": " F, p1, p2, p3, p4);\ +} while (0) +#define PMCDBG5(M, N, L, F, p1, p2, p3, p4, p5) do { \ + if (pmc_debugflags.pdb_ ## M & (1 << PMC_DEBUG_MIN_ ## N)) \ + CTR5(KTR_PMC, #M ":" #N ":" #L ": " F, p1, p2, p3, p4, \ + p5); \ +} while (0) +#define PMCDBG6(M, N, L, F, p1, p2, p3, p4, p5, p6) do { \ + if (pmc_debugflags.pdb_ ## M & (1 << PMC_DEBUG_MIN_ ## N)) \ + CTR6(KTR_PMC, #M ":" #N ":" #L ": " F, p1, p2, p3, p4, \ + p5, p6); \ +} while (0) + /* Major numbers */ #define PMC_DEBUG_MAJ_CPU 0 /* cpu switches */ #define PMC_DEBUG_MAJ_CSW 1 /* context switches */ @@ -1088,7 +1120,13 @@ extern struct pmc_debugflags pmc_debugflags; #define PMC_DEBUG_MIN_CLO 12 /* close */ #else -#define PMCDBG(M,N,L,F,...) /* nothing */ +#define PMCDBG0(M, N, L, F) /* nothing */ +#define PMCDBG1(M, N, L, F, p1) +#define PMCDBG2(M, N, L, F, p1, p2) +#define PMCDBG3(M, N, L, F, p1, p2, p3) +#define PMCDBG4(M, N, L, F, p1, p2, p3, p4) +#define PMCDBG5(M, N, L, F, p1, p2, p3, p4, p5) +#define PMCDBG6(M, N, L, F, p1, p2, p3, p4, p5, p6) #endif /* declare a dedicated memory pool */ diff --git a/sys/sys/proc.h b/sys/sys/proc.h index 64b99fce0918..018b595fa9cc 100644 --- a/sys/sys/proc.h +++ b/sys/sys/proc.h @@ -277,6 +277,7 @@ struct thread { u_int td_vp_reserv; /* (k) Count of reserved vnodes. */ int td_no_sleeping; /* (k) Sleeping disabled count. */ int td_dom_rr_idx; /* (k) RR Numa domain selection. */ + void *td_su; /* (k) FFS SU private */ #define td_endzero td_sigmask /* Copied during fork1() or create_thread(). */ @@ -325,6 +326,7 @@ struct thread { struct proc *td_rfppwait_p; /* (k) The vforked child */ struct vm_page **td_ma; /* (k) uio pages held */ int td_ma_cnt; /* (k) size of *td_ma */ + void *td_emuldata; /* Emulator state data */ }; struct mtx *thread_lock_block(struct thread *); @@ -660,7 +662,7 @@ struct proc { #define P_SINGLE_BOUNDARY 0x400000 /* Threads should suspend at user boundary. */ #define P_HWPMC 0x800000 /* Process is using HWPMCs */ #define P_JAILED 0x1000000 /* Process is in jail. */ -#define P_TOTAL_STOP 0x2000000 /* Stopped in proc_stop_total. */ +#define P_TOTAL_STOP 0x2000000 /* Stopped in stop_all_proc. */ #define P_INEXEC 0x4000000 /* Process is in execve(). */ #define P_STATCHILD 0x8000000 /* Child process stopped or exited. */ #define P_INMEM 0x10000000 /* Loaded into memory. */ @@ -676,6 +678,7 @@ struct proc { #define P2_INHERIT_PROTECTED 0x00000001 /* New children get P_PROTECTED. */ #define P2_NOTRACE 0x00000002 /* No ptrace(2) attach or coredumps. */ #define P2_NOTRACE_EXEC 0x00000004 /* Keep P2_NOPTRACE on exec(2). */ +#define P2_AST_SU 0x00000008 /* Handles SU ast for kthreads. */ /* Flags protected by proctree_lock, kept in p_treeflags. */ #define P_TREE_ORPHANED 0x00000001 /* Reparented, on orphan list */ @@ -991,7 +994,6 @@ void thread_suspend_switch(struct thread *, struct proc *p); void thread_suspend_one(struct thread *td); void thread_unlink(struct thread *td); void thread_unsuspend(struct proc *p); -int thread_unsuspend_one(struct thread *td, struct proc *p); void thread_wait(struct proc *p); struct thread *thread_find(struct proc *p, lwpid_t tid); diff --git a/sys/sys/sockio.h b/sys/sys/sockio.h index f04bb1233749..73ebf5f1c942 100644 --- a/sys/sys/sockio.h +++ b/sys/sys/sockio.h @@ -96,7 +96,7 @@ #define SIOCGIFSTATUS _IOWR('i', 59, struct ifstat) /* get IF status */ #define SIOCSIFLLADDR _IOW('i', 60, struct ifreq) /* set linklevel addr */ -#define SIOCGI2C _IOWR('i', 61, struct ifstat) /* get I2C data */ +#define SIOCGI2C _IOWR('i', 61, struct ifreq) /* get I2C data */ #define SIOCSIFPHYADDR _IOW('i', 70, struct ifaliasreq) /* set gif addres */ #define SIOCGIFPSRCADDR _IOWR('i', 71, struct ifreq) /* get gif psrc addr */ @@ -114,6 +114,9 @@ #define SIOCGIFFIB _IOWR('i', 92, struct ifreq) /* get IF fib */ #define SIOCSIFFIB _IOW('i', 93, struct ifreq) /* set IF fib */ +#define SIOCGTUNFIB _IOWR('i', 94, struct ifreq) /* get tunnel fib */ +#define SIOCSTUNFIB _IOW('i', 95, struct ifreq) /* set tunnel fib */ + #define SIOCSDRVSPEC _IOW('i', 123, struct ifdrv) /* set driver-specific parameters */ #define SIOCGDRVSPEC _IOWR('i', 123, struct ifdrv) /* get driver-specific diff --git a/sys/sys/syscallsubr.h b/sys/sys/syscallsubr.h index 8d8c1736bcac..4ff111ee8a3e 100644 --- a/sys/sys/syscallsubr.h +++ b/sys/sys/syscallsubr.h @@ -55,6 +55,7 @@ struct sendfile_args; struct sockaddr; struct stat; struct thr_param; +struct sched_param; struct __wrusage; int kern___getcwd(struct thread *td, char *buf, enum uio_seg bufseg, @@ -120,6 +121,10 @@ int kern_jail_get(struct thread *td, struct uio *options, int flags); int kern_jail_set(struct thread *td, struct uio *options, int flags); int kern_kevent(struct thread *td, int fd, int nchanges, int nevents, struct kevent_copyops *k_ops, const struct timespec *timeout); +int kern_kevent_fp(struct thread *td, struct file *fp, int nchanges, + int nevents, struct kevent_copyops *k_ops, + const struct timespec *timeout); +int kern_kqueue(struct thread *td, int flags); int kern_kldload(struct thread *td, const char *file, int *fileid); int kern_kldstat(struct thread *td, int fileid, struct kld_file_stat *stat); int kern_kldunload(struct thread *td, int fileid, int flags); @@ -169,8 +174,18 @@ int kern_renameat(struct thread *td, int oldfd, char *old, int newfd, char *new, enum uio_seg pathseg); int kern_rmdirat(struct thread *td, int fd, char *path, enum uio_seg pathseg); +int kern_sched_getparam(struct thread *td, struct thread *targettd, + struct sched_param *param); +int kern_sched_getscheduler(struct thread *td, struct thread *targettd, + int *policy); +int kern_sched_setparam(struct thread *td, struct thread *targettd, + struct sched_param *param); +int kern_sched_setscheduler(struct thread *td, struct thread *targettd, + int policy, struct sched_param *param); int kern_sched_rr_get_interval(struct thread *td, pid_t pid, struct timespec *ts); +int kern_sched_rr_get_interval_td(struct thread *td, struct thread *targettd, + struct timespec *ts); int kern_semctl(struct thread *td, int semid, int semnum, int cmd, union semun *arg, register_t *rval); int kern_select(struct thread *td, int nd, fd_set *fd_in, fd_set *fd_ou, @@ -214,6 +229,8 @@ int kern_ktimer_settime(struct thread *td, int timer_id, int flags, int kern_ktimer_gettime(struct thread *td, int timer_id, struct itimerspec *val); int kern_ktimer_getoverrun(struct thread *td, int timer_id); +int kern_thr_alloc(struct proc *, int pages, struct thread **); +int kern_thr_exit(struct thread *td); int kern_thr_new(struct thread *td, struct thr_param *param); int kern_thr_suspend(struct thread *td, struct timespec *tsp); int kern_truncate(struct thread *td, char *path, enum uio_seg pathseg, diff --git a/sys/sys/sysent.h b/sys/sys/sysent.h index bef27ceeb995..b1f61a9d06cc 100644 --- a/sys/sys/sysent.h +++ b/sys/sys/sysent.h @@ -136,6 +136,7 @@ struct sysentvec { uint32_t sv_timekeep_gen; void *sv_shared_page_obj; void (*sv_schedtail)(struct thread *); + void (*sv_thread_detach)(struct thread *); }; #define SV_ILP32 0x000100 diff --git a/sys/sys/systm.h b/sys/sys/systm.h index 786414fec39b..cb05a00008e7 100644 --- a/sys/sys/systm.h +++ b/sys/sys/systm.h @@ -237,7 +237,7 @@ void hexdump(const void *ptr, int length, const char *hdr, int flags); #define ovbcopy(f, t, l) bcopy((f), (t), (l)) void bcopy(const void *from, void *to, size_t len) __nonnull(1) __nonnull(2); void bzero(void *buf, size_t len) __nonnull(1); -void explicit_bzero(void *, size_t) __nonnull(1);; +void explicit_bzero(void *, size_t) __nonnull(1); void *memcpy(void *to, const void *from, size_t len) __nonnull(1) __nonnull(2); void *memmove(void *dest, const void *src, size_t n) __nonnull(1) __nonnull(2); @@ -431,4 +431,6 @@ void free_unr(struct unrhdr *uh, u_int item); void intr_prof_stack_use(struct thread *td, struct trapframe *frame); +extern void (*softdep_ast_cleanup)(void); + #endif /* !_SYS_SYSTM_H_ */ diff --git a/sys/sys/user.h b/sys/sys/user.h index c3b3bc59b414..e831a37ce541 100644 --- a/sys/sys/user.h +++ b/sys/sys/user.h @@ -485,6 +485,27 @@ struct kinfo_vmentry { char kve_path[PATH_MAX]; /* Path to VM obj, if any. */ }; +/* + * The "vm.objects" sysctl provides a list of all VM objects in the system + * via an array of these entries. + */ +struct kinfo_vmobject { + int kvo_structsize; /* Variable size of record. */ + int kvo_type; /* Object type: KVME_TYPE_*. */ + uint64_t kvo_size; /* Object size in pages. */ + uint64_t kvo_vn_fileid; /* inode number if vnode. */ + uint32_t kvo_vn_fsid; /* dev_t of vnode location. */ + int kvo_ref_count; /* Reference count. */ + int kvo_shadow_count; /* Shadow count. */ + int kvo_memattr; /* Memory attribute. */ + uint64_t kvo_resident; /* Number of resident pages. */ + uint64_t kvo_active; /* Number of active pages. */ + uint64_t kvo_inactive; /* Number of inactive pages. */ + uint64_t _kvo_qspare[8]; + uint32_t _kvo_ispare[8]; + char kvo_path[PATH_MAX]; /* Pathname, if any. */ +}; + /* * The KERN_PROC_KSTACK sysctl allows a process to dump the kernel stacks of * another process as a series of entries. Each stack is represented by a diff --git a/sys/sys/vnode.h b/sys/sys/vnode.h index d70aa579c1b1..a30130fe4b79 100644 --- a/sys/sys/vnode.h +++ b/sys/sys/vnode.h @@ -397,6 +397,7 @@ extern int vttoif_tab[]; #define V_WAIT 0x0001 /* vn_start_write: sleep for suspend */ #define V_NOWAIT 0x0002 /* vn_start_write: don't sleep for suspend */ #define V_XSLEEP 0x0004 /* vn_start_write: just return after sleep */ +#define V_MNTREF 0x0010 /* vn_start_write: mp is already ref-ed */ #define VR_START_WRITE 0x0001 /* vfs_write_resume: start write atomically */ #define VR_NO_SUSPCLR 0x0002 /* vfs_write_resume: do not clear suspension */ diff --git a/sys/ufs/ffs/ffs_softdep.c b/sys/ufs/ffs/ffs_softdep.c index ab2bd413820c..b0005f1d2b2c 100644 --- a/sys/ufs/ffs/ffs_softdep.c +++ b/sys/ufs/ffs/ffs_softdep.c @@ -900,6 +900,8 @@ static int pagedep_find(struct pagedep_hashhead *, ino_t, ufs_lbn_t, struct pagedep **); static void pause_timer(void *); static int request_cleanup(struct mount *, int); +static void schedule_cleanup(struct mount *); +static void softdep_ast_cleanup_proc(void); static int process_worklist_item(struct mount *, int, int); static void process_removes(struct vnode *); static void process_truncates(struct vnode *); @@ -921,6 +923,8 @@ static int journal_unsuspend(struct ufsmount *ump); static void softdep_prelink(struct vnode *, struct vnode *); static void add_to_journal(struct worklist *); static void remove_from_journal(struct worklist *); +static bool softdep_excess_inodes(struct ufsmount *); +static bool softdep_excess_dirrem(struct ufsmount *); static void softdep_process_journal(struct mount *, struct worklist *, int); static struct jremref *newjremref(struct dirrem *, struct inode *, struct inode *ip, off_t, nlink_t); @@ -2059,7 +2063,6 @@ softdep_flushfiles(oldmnt, flags, td) * allocates a new structure if an existing one is not found. */ #define DEPALLOC 0x0001 /* allocate structure if lookup fails */ -#define NODELAY 0x0002 /* cannot do background work */ /* * Structures and routines associated with pagedep caching. @@ -2209,12 +2212,10 @@ inodedep_lookup(mp, inum, flags, inodedeppp) * responsible for more than our share of that usage and * we are not in a rush, request some inodedep cleanup. */ - while (dep_current[D_INODEDEP] > max_softdeps && - (flags & NODELAY) == 0 && - ump->softdep_curdeps[D_INODEDEP] > - max_softdeps / stat_flush_threads) - request_cleanup(mp, FLUSH_INODES); - FREE_LOCK(ump); + if (softdep_excess_inodes(ump)) + schedule_cleanup(mp); + else + FREE_LOCK(ump); inodedep = malloc(sizeof(struct inodedep), M_INODEDEP, M_SOFTDEP_FLAGS); workitem_alloc(&inodedep->id_list, D_INODEDEP, mp); @@ -2412,6 +2413,7 @@ softdep_initialize() bioops.io_complete = softdep_disk_write_complete; bioops.io_deallocate = softdep_deallocate_dependencies; bioops.io_countdeps = softdep_count_dependencies; + softdep_ast_cleanup = softdep_ast_cleanup_proc; /* Initialize the callout with an mtx. */ callout_init_mtx(&softdep_callout, &lk, 0); @@ -2430,6 +2432,7 @@ softdep_uninitialize() bioops.io_complete = NULL; bioops.io_deallocate = NULL; bioops.io_countdeps = NULL; + softdep_ast_cleanup = NULL; callout_drain(&softdep_callout); } @@ -4631,14 +4634,10 @@ inodedep_lookup_ip(ip) struct inode *ip; { struct inodedep *inodedep; - int dflags; KASSERT(ip->i_nlink >= ip->i_effnlink, ("inodedep_lookup_ip: bad delta")); - dflags = DEPALLOC; - if (IS_SNAPSHOT(ip)) - dflags |= NODELAY; - (void) inodedep_lookup(UFSTOVFS(ip->i_ump), ip->i_number, dflags, + (void) inodedep_lookup(UFSTOVFS(ip->i_ump), ip->i_number, DEPALLOC, &inodedep); inodedep->id_nlinkdelta = ip->i_nlink - ip->i_effnlink; KASSERT((inodedep->id_state & UNLINKED) == 0, ("inode unlinked")); @@ -5038,7 +5037,7 @@ softdep_setup_inomapdep(bp, ip, newinum, mode) M_BMSAFEMAP, M_SOFTDEP_FLAGS); workitem_alloc(&bmsafemap->sm_list, D_BMSAFEMAP, mp); ACQUIRE_LOCK(ip->i_ump); - if ((inodedep_lookup(mp, newinum, DEPALLOC | NODELAY, &inodedep))) + if ((inodedep_lookup(mp, newinum, DEPALLOC, &inodedep))) panic("softdep_setup_inomapdep: dependency %p for new" "inode already exists", inodedep); bmsafemap = bmsafemap_lookup(mp, bp, ino_to_cg(fs, newinum), bmsafemap); @@ -5335,7 +5334,7 @@ softdep_setup_allocdirect(ip, off, newblkno, oldblkno, newsize, oldsize, bp) if (freefrag && freefrag->ff_jdep != NULL && freefrag->ff_jdep->wk_type == D_JFREEFRAG) add_to_journal(freefrag->ff_jdep); - inodedep_lookup(mp, ip->i_number, DEPALLOC | NODELAY, &inodedep); + inodedep_lookup(mp, ip->i_number, DEPALLOC, &inodedep); adp->ad_inodedep = inodedep; WORKLIST_INSERT(&bp->b_dep, &newblk->nb_list); @@ -5693,7 +5692,7 @@ softdep_setup_allocext(ip, off, newblkno, oldblkno, newsize, oldsize, bp) if (freefrag && freefrag->ff_jdep != NULL && freefrag->ff_jdep->wk_type == D_JFREEFRAG) add_to_journal(freefrag->ff_jdep); - inodedep_lookup(mp, ip->i_number, DEPALLOC | NODELAY, &inodedep); + inodedep_lookup(mp, ip->i_number, DEPALLOC, &inodedep); adp->ad_inodedep = inodedep; WORKLIST_INSERT(&bp->b_dep, &newblk->nb_list); @@ -5818,7 +5817,6 @@ softdep_setup_allocindir_page(ip, lbn, bp, ptrno, newblkno, oldblkno, nbp) struct allocindir *aip; struct pagedep *pagedep; struct mount *mp; - int dflags; mp = UFSTOVFS(ip->i_ump); KASSERT(MOUNTEDSOFTDEP(mp) != 0, @@ -5831,10 +5829,7 @@ softdep_setup_allocindir_page(ip, lbn, bp, ptrno, newblkno, oldblkno, nbp) "lbn %jd", ip->i_number, newblkno, oldblkno, lbn); ASSERT_VOP_LOCKED(ITOV(ip), "softdep_setup_allocindir_page"); aip = newallocindir(ip, ptrno, newblkno, oldblkno, lbn); - dflags = DEPALLOC; - if (IS_SNAPSHOT(ip)) - dflags |= NODELAY; - (void) inodedep_lookup(mp, ip->i_number, dflags, &inodedep); + (void) inodedep_lookup(mp, ip->i_number, DEPALLOC, &inodedep); /* * If we are allocating a directory page, then we must * allocate an associated pagedep to track additions and @@ -5864,7 +5859,6 @@ softdep_setup_allocindir_meta(nbp, ip, bp, ptrno, newblkno) struct inodedep *inodedep; struct allocindir *aip; ufs_lbn_t lbn; - int dflags; KASSERT(MOUNTEDSOFTDEP(UFSTOVFS(ip->i_ump)) != 0, ("softdep_setup_allocindir_meta called on non-softdep filesystem")); @@ -5874,10 +5868,8 @@ softdep_setup_allocindir_meta(nbp, ip, bp, ptrno, newblkno) lbn = nbp->b_lblkno; ASSERT_VOP_LOCKED(ITOV(ip), "softdep_setup_allocindir_meta"); aip = newallocindir(ip, ptrno, newblkno, 0, lbn); - dflags = DEPALLOC; - if (IS_SNAPSHOT(ip)) - dflags |= NODELAY; - inodedep_lookup(UFSTOVFS(ip->i_ump), ip->i_number, dflags, &inodedep); + inodedep_lookup(UFSTOVFS(ip->i_ump), ip->i_number, DEPALLOC, + &inodedep); WORKLIST_INSERT(&nbp->b_dep, &aip->ai_block.nb_list); if (setup_allocindir_phase2(bp, ip, inodedep, aip, lbn)) panic("softdep_setup_allocindir_meta: Block already existed"); @@ -6490,7 +6482,7 @@ softdep_journal_freeblocks(ip, cred, length, flags) struct mount *mp; ufs2_daddr_t extblocks, datablocks; ufs_lbn_t tmpval, lbn, lastlbn; - int frags, lastoff, iboff, allocblock, needj, dflags, error, i; + int frags, lastoff, iboff, allocblock, needj, error, i; fs = ip->i_fs; ump = ip->i_ump; @@ -6511,10 +6503,7 @@ softdep_journal_freeblocks(ip, cred, length, flags) * we don't need to journal the block frees. The canceled journals * for the allocations will suffice. */ - dflags = DEPALLOC; - if (IS_SNAPSHOT(ip)) - dflags |= NODELAY; - inodedep_lookup(mp, ip->i_number, dflags, &inodedep); + inodedep_lookup(mp, ip->i_number, DEPALLOC, &inodedep); if ((inodedep->id_state & (UNLINKED | DEPCOMPLETE)) == UNLINKED && length == 0) needj = 0; @@ -6644,7 +6633,7 @@ softdep_journal_freeblocks(ip, cred, length, flags) *((struct ufs2_dinode *)bp->b_data + ino_to_fsbo(fs, ip->i_number)) = *ip->i_din2; ACQUIRE_LOCK(ump); - (void) inodedep_lookup(mp, ip->i_number, dflags, &inodedep); + (void) inodedep_lookup(mp, ip->i_number, DEPALLOC, &inodedep); if ((inodedep->id_state & IOSTARTED) != 0) panic("softdep_setup_freeblocks: inode busy"); /* @@ -6737,7 +6726,7 @@ softdep_journal_freeblocks(ip, cred, length, flags) } ACQUIRE_LOCK(ump); - inodedep_lookup(mp, ip->i_number, dflags, &inodedep); + inodedep_lookup(mp, ip->i_number, DEPALLOC, &inodedep); TAILQ_INSERT_TAIL(&inodedep->id_freeblklst, freeblks, fb_next); freeblks->fb_state |= DEPCOMPLETE | ONDEPLIST; /* @@ -6828,7 +6817,7 @@ softdep_setup_freeblocks(ip, length, flags) struct fs *fs; ufs2_daddr_t extblocks, datablocks; struct mount *mp; - int i, delay, error, dflags; + int i, delay, error; ufs_lbn_t tmpval; ufs_lbn_t lbn; @@ -6897,10 +6886,7 @@ softdep_setup_freeblocks(ip, length, flags) * Find and eliminate any inode dependencies. */ ACQUIRE_LOCK(ump); - dflags = DEPALLOC; - if (IS_SNAPSHOT(ip)) - dflags |= NODELAY; - (void) inodedep_lookup(mp, ip->i_number, dflags, &inodedep); + (void) inodedep_lookup(mp, ip->i_number, DEPALLOC, &inodedep); if ((inodedep->id_state & IOSTARTED) != 0) panic("softdep_setup_freeblocks: inode busy"); /* @@ -8506,7 +8492,7 @@ softdep_setup_directory_add(bp, dp, diroffset, newinum, newdirbp, isnewblk) dap->da_pagedep = pagedep; LIST_INSERT_HEAD(&pagedep->pd_diraddhd[DIRADDHASH(offset)], dap, da_pdlist); - inodedep_lookup(mp, newinum, DEPALLOC | NODELAY, &inodedep); + inodedep_lookup(mp, newinum, DEPALLOC, &inodedep); /* * If we're journaling, link the diradd into the jaddref so it * may be completed after the journal entry is written. Otherwise, @@ -9126,13 +9112,12 @@ newdirrem(bp, dp, ip, isrmdir, prevdirremp) * the number of freefile and freeblks structures. */ ACQUIRE_LOCK(ip->i_ump); - while (!IS_SNAPSHOT(ip) && dep_current[D_DIRREM] > max_softdeps / 2 && - ip->i_ump->softdep_curdeps[D_DIRREM] > - (max_softdeps / 2) / stat_flush_threads) - (void) request_cleanup(ITOV(dp)->v_mount, FLUSH_BLOCKS); - FREE_LOCK(ip->i_ump); - dirrem = malloc(sizeof(struct dirrem), - M_DIRREM, M_SOFTDEP_FLAGS|M_ZERO); + if (!IS_SNAPSHOT(ip) && softdep_excess_dirrem(ip->i_ump)) + schedule_cleanup(ITOV(dp)->v_mount); + else + FREE_LOCK(ip->i_ump); + dirrem = malloc(sizeof(struct dirrem), M_DIRREM, M_SOFTDEP_FLAGS | + M_ZERO); workitem_alloc(&dirrem->dm_list, D_DIRREM, dvp->v_mount); LIST_INIT(&dirrem->dm_jremrefhd); LIST_INIT(&dirrem->dm_jwork); @@ -9368,7 +9353,7 @@ softdep_setup_directory_change(bp, dp, ip, newinum, isrmdir) * inode is not yet written. If it is written, do the post-inode * write processing to put it on the id_pendinghd list. */ - inodedep_lookup(mp, newinum, DEPALLOC | NODELAY, &inodedep); + inodedep_lookup(mp, newinum, DEPALLOC, &inodedep); if (MOUNTEDSUJ(mp)) { jaddref = (struct jaddref *)TAILQ_LAST(&inodedep->id_inoreflst, inoreflst); @@ -9410,15 +9395,12 @@ softdep_change_linkcnt(ip) struct inode *ip; /* the inode with the increased link count */ { struct inodedep *inodedep; - int dflags; KASSERT(MOUNTEDSOFTDEP(UFSTOVFS(ip->i_ump)) != 0, ("softdep_change_linkcnt called on non-softdep filesystem")); ACQUIRE_LOCK(ip->i_ump); - dflags = DEPALLOC; - if (IS_SNAPSHOT(ip)) - dflags |= NODELAY; - inodedep_lookup(UFSTOVFS(ip->i_ump), ip->i_number, dflags, &inodedep); + inodedep_lookup(UFSTOVFS(ip->i_ump), ip->i_number, DEPALLOC, + &inodedep); if (ip->i_nlink < ip->i_effnlink) panic("softdep_change_linkcnt: bad delta"); inodedep->id_nlinkdelta = ip->i_nlink - ip->i_effnlink; @@ -13269,6 +13251,92 @@ softdep_request_cleanup(fs, vp, cred, resource) return (1); } +static bool +softdep_excess_inodes(struct ufsmount *ump) +{ + + return (dep_current[D_INODEDEP] > max_softdeps && + ump->softdep_curdeps[D_INODEDEP] > max_softdeps / + stat_flush_threads); +} + +static bool +softdep_excess_dirrem(struct ufsmount *ump) +{ + + return (dep_current[D_DIRREM] > max_softdeps / 2 && + ump->softdep_curdeps[D_DIRREM] > (max_softdeps / 2) / + stat_flush_threads); +} + +static void +schedule_cleanup(struct mount *mp) +{ + struct ufsmount *ump; + struct thread *td; + + ump = VFSTOUFS(mp); + LOCK_OWNED(ump); + FREE_LOCK(ump); + td = curthread; + if ((td->td_pflags & TDP_KTHREAD) != 0 && + (td->td_proc->p_flag2 & P2_AST_SU) == 0) { + /* + * No ast is delivered to kernel threads, so nobody + * would deref the mp. Some kernel threads + * explicitely check for AST, e.g. NFS daemon does + * this in the serving loop. + */ + return; + } + if (td->td_su != NULL) + vfs_rel(td->td_su); + vfs_ref(mp); + td->td_su = mp; + thread_lock(td); + td->td_flags |= TDF_ASTPENDING; + thread_unlock(td); +} + +static void +softdep_ast_cleanup_proc(void) +{ + struct thread *td; + struct mount *mp; + struct ufsmount *ump; + int error; + bool req; + + td = curthread; + mp = td->td_su; + if (mp == NULL) + return; + td->td_su = NULL; + error = vfs_busy(mp, MBF_NOWAIT); + vfs_rel(mp); + if (error != 0) + return; + if (ffs_own_mount(mp) && MOUNTEDSOFTDEP(mp)) { + ump = VFSTOUFS(mp); + for (;;) { + req = false; + ACQUIRE_LOCK(ump); + if (softdep_excess_inodes(ump)) { + req = true; + request_cleanup(mp, FLUSH_INODES); + } + if (softdep_excess_dirrem(ump)) { + req = true; + request_cleanup(mp, FLUSH_BLOCKS); + } + FREE_LOCK(ump); + if ((td->td_pflags & TDP_KTHREAD) != 0 || !req) + break; + } + } + vfs_unbusy(mp); +} + /* * If memory utilization has gotten too high, deliberately slow things * down and speed up the I/O processing. @@ -13355,7 +13423,8 @@ request_cleanup(mp, resource) callout_reset(&softdep_callout, tickdelay > 2 ? tickdelay : 2, pause_timer, 0); - msleep((caddr_t)&proc_waiting, &lk, PPAUSE, "softupdate", 0); + if ((td->td_pflags & TDP_KTHREAD) == 0) + msleep((caddr_t)&proc_waiting, &lk, PPAUSE, "softupdate", 0); proc_waiting -= 1; FREE_GBLLOCK(&lk); ACQUIRE_LOCK(ump); diff --git a/sys/vm/default_pager.c b/sys/vm/default_pager.c index 26326a5c1e4c..98dee45d730a 100644 --- a/sys/vm/default_pager.c +++ b/sys/vm/default_pager.c @@ -113,6 +113,7 @@ default_pager_dealloc(object) /* * OBJT_DEFAULT objects have no special resources allocated to them. */ + object->type = OBJT_DEAD; } /* diff --git a/sys/vm/device_pager.c b/sys/vm/device_pager.c index d05ea333c087..33fba4eb59ac 100644 --- a/sys/vm/device_pager.c +++ b/sys/vm/device_pager.c @@ -254,6 +254,8 @@ dev_pager_dealloc(object) != NULL) dev_pager_free_page(object, m); } + object->handle = NULL; + object->type = OBJT_DEAD; } static int diff --git a/sys/vm/phys_pager.c b/sys/vm/phys_pager.c index 9e9800665dc5..885a4515bb19 100644 --- a/sys/vm/phys_pager.c +++ b/sys/vm/phys_pager.c @@ -131,6 +131,8 @@ phys_pager_dealloc(vm_object_t object) mtx_unlock(&phys_pager_mtx); VM_OBJECT_WLOCK(object); } + object->handle = NULL; + object->type = OBJT_DEAD; } /* diff --git a/sys/vm/sg_pager.c b/sys/vm/sg_pager.c index e35741e49ee4..23ebd3a4a06d 100644 --- a/sys/vm/sg_pager.c +++ b/sys/vm/sg_pager.c @@ -130,6 +130,8 @@ sg_pager_dealloc(vm_object_t object) sg = object->handle; sglist_free(sg); + object->handle = NULL; + object->type = OBJT_DEAD; } static int diff --git a/sys/vm/swap_pager.c b/sys/vm/swap_pager.c index 9a83989a894a..30054910c07a 100644 --- a/sys/vm/swap_pager.c +++ b/sys/vm/swap_pager.c @@ -697,6 +697,8 @@ swap_pager_dealloc(vm_object_t object) * if paging is still in progress on some objects. */ swp_pager_meta_free_all(object); + object->handle = NULL; + object->type = OBJT_DEAD; } /************************************************************************ diff --git a/sys/vm/uma.h b/sys/vm/uma.h index df6cc5c7a118..d3e0658aef15 100644 --- a/sys/vm/uma.h +++ b/sys/vm/uma.h @@ -690,4 +690,7 @@ struct uma_percpu_stat { uint64_t _ups_reserved[5]; /* Reserved. */ }; +void uma_reclaim_wakeup(void); +void uma_reclaim_worker(void *); + #endif /* _VM_UMA_H_ */ diff --git a/sys/vm/uma_core.c b/sys/vm/uma_core.c index 4ff177f8129f..6780bad1ecac 100644 --- a/sys/vm/uma_core.c +++ b/sys/vm/uma_core.c @@ -1891,7 +1891,7 @@ uma_startup3(void) #ifdef UMA_DEBUG printf("Starting callout.\n"); #endif - callout_init(&uma_callout, CALLOUT_MPSAFE); + callout_init(&uma_callout, 1); callout_reset(&uma_callout, UMA_TIMEOUT * hz, uma_timeout, NULL); #ifdef UMA_DEBUG printf("UMA startup3 complete.\n"); @@ -3222,16 +3222,17 @@ uma_find_refcnt(uma_zone_t zone, void *item) } /* See uma.h */ -void -uma_reclaim(void) +static void +uma_reclaim_locked(bool kmem_danger) { + #ifdef UMA_DEBUG printf("UMA: vm asked us to release pages!\n"); #endif - sx_xlock(&uma_drain_lock); + sx_assert(&uma_drain_lock, SA_XLOCKED); bucket_enable(); zone_foreach(zone_drain); - if (vm_page_count_min()) { + if (vm_page_count_min() || kmem_danger) { cache_drain_safe(NULL); zone_foreach(zone_drain); } @@ -3243,9 +3244,42 @@ uma_reclaim(void) zone_drain(slabzone); zone_drain(slabrefzone); bucket_zone_drain(); +} + +void +uma_reclaim(void) +{ + + sx_xlock(&uma_drain_lock); + uma_reclaim_locked(false); sx_xunlock(&uma_drain_lock); } +static int uma_reclaim_needed; + +void +uma_reclaim_wakeup(void) +{ + + uma_reclaim_needed = 1; + wakeup(&uma_reclaim_needed); +} + +void +uma_reclaim_worker(void *arg __unused) +{ + + sx_xlock(&uma_drain_lock); + for (;;) { + sx_sleep(&uma_reclaim_needed, &uma_drain_lock, PVM, + "umarcl", 0); + if (uma_reclaim_needed) { + uma_reclaim_needed = 0; + uma_reclaim_locked(true); + } + } +} + /* See uma.h */ int uma_zone_exhausted(uma_zone_t zone) diff --git a/sys/vm/vm_meter.c b/sys/vm/vm_meter.c index 4ec2613b138f..865be71a96fa 100644 --- a/sys/vm/vm_meter.c +++ b/sys/vm/vm_meter.c @@ -111,14 +111,7 @@ vmtotal(SYSCTL_HANDLER_ARGS) */ mtx_lock(&vm_object_list_mtx); TAILQ_FOREACH(object, &vm_object_list, object_list) { - if (!VM_OBJECT_TRYWLOCK(object)) { - /* - * Avoid a lock-order reversal. Consequently, - * the reported number of active pages may be - * greater than the actual number. - */ - continue; - } + VM_OBJECT_WLOCK(object); vm_object_clear_flag(object, OBJ_ACTIVE); VM_OBJECT_WUNLOCK(object); } @@ -196,10 +189,9 @@ vmtotal(SYSCTL_HANDLER_ARGS) mtx_lock(&vm_object_list_mtx); TAILQ_FOREACH(object, &vm_object_list, object_list) { /* - * Perform unsynchronized reads on the object to avoid - * a lock-order reversal. In this case, the lack of - * synchronization should not impair the accuracy of - * the reported statistics. + * Perform unsynchronized reads on the object. In + * this case, the lack of synchronization should not + * impair the accuracy of the reported statistics. */ if ((object->flags & OBJ_FICTITIOUS) != 0) { /* diff --git a/sys/vm/vm_object.c b/sys/vm/vm_object.c index a1d6701a3f2e..30623b2e50cf 100644 --- a/sys/vm/vm_object.c +++ b/sys/vm/vm_object.c @@ -79,6 +79,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include #include #include @@ -166,6 +167,8 @@ vm_object_zdtor(void *mem, int size, void *arg) vm_object_t object; object = (vm_object_t)mem; + KASSERT(object->ref_count == 0, + ("object %p ref_count = %d", object, object->ref_count)); KASSERT(TAILQ_EMPTY(&object->memq), ("object %p has resident pages in its memq", object)); KASSERT(vm_radix_is_empty(&object->rtree), @@ -187,6 +190,9 @@ vm_object_zdtor(void *mem, int size, void *arg) KASSERT(object->shadow_count == 0, ("object %p shadow_count = %d", object, object->shadow_count)); + KASSERT(object->type == OBJT_DEAD, + ("object %p has non-dead type %d", + object, object->type)); } #endif @@ -199,6 +205,8 @@ vm_object_zinit(void *mem, int size, int flags) rw_init_flags(&object->lock, "vm object", RW_DUPOK | RW_NEW); /* These are true for any object that has been freed */ + object->type = OBJT_DEAD; + object->ref_count = 0; object->rtree.rt_root = 0; object->rtree.rt_flags = 0; object->paging_in_progress = 0; @@ -206,6 +214,10 @@ vm_object_zinit(void *mem, int size, int flags) object->shadow_count = 0; object->cache.rt_root = 0; object->cache.rt_flags = 0; + + mtx_lock(&vm_object_list_mtx); + TAILQ_INSERT_TAIL(&vm_object_list, object, object_list); + mtx_unlock(&vm_object_list_mtx); return (0); } @@ -252,10 +264,6 @@ _vm_object_allocate(objtype_t type, vm_pindex_t size, vm_object_t object) #if VM_NRESERVLEVEL > 0 LIST_INIT(&object->rvq); #endif - - mtx_lock(&vm_object_list_mtx); - TAILQ_INSERT_TAIL(&vm_object_list, object, object_list); - mtx_unlock(&vm_object_list_mtx); } /* @@ -670,20 +678,10 @@ void vm_object_destroy(vm_object_t object) { - /* - * Remove the object from the global object list. - */ - mtx_lock(&vm_object_list_mtx); - TAILQ_REMOVE(&vm_object_list, object, object_list); - mtx_unlock(&vm_object_list_mtx); - /* * Release the allocation charge. */ if (object->cred != NULL) { - KASSERT(object->type == OBJT_DEFAULT || - object->type == OBJT_SWAP, - ("%s: non-swap obj %p has cred", __func__, object)); swap_release_by_cred(object->charge, object->cred); object->charge = 0; crfree(object->cred); @@ -788,6 +786,10 @@ vm_object_terminate(vm_object_t object) if (__predict_false(!vm_object_cache_is_empty(object))) vm_page_cache_free(object, 0, 0); + KASSERT(object->cred == NULL || object->type == OBJT_DEFAULT || + object->type == OBJT_SWAP, + ("%s: non-swap obj %p has cred", __func__, object)); + /* * Let the pager know object is dead. */ @@ -1803,6 +1805,8 @@ vm_object_collapse(vm_object_t object) KASSERT(backing_object->ref_count == 1, ( "backing_object %p was somehow re-referenced during collapse!", backing_object)); + backing_object->type = OBJT_DEAD; + backing_object->ref_count = 0; VM_OBJECT_WUNLOCK(backing_object); vm_object_destroy(backing_object); @@ -2283,6 +2287,142 @@ vm_object_unwire(vm_object_t object, vm_ooffset_t offset, vm_size_t length, } } +static int +sysctl_vm_object_list(SYSCTL_HANDLER_ARGS) +{ + struct kinfo_vmobject kvo; + char *fullpath, *freepath; + struct vnode *vp; + struct vattr va; + vm_object_t obj; + vm_page_t m; + int count, error; + + if (req->oldptr == NULL) { + /* + * If an old buffer has not been provided, generate an + * estimate of the space needed for a subsequent call. + */ + mtx_lock(&vm_object_list_mtx); + count = 0; + TAILQ_FOREACH(obj, &vm_object_list, object_list) { + if (obj->type == OBJT_DEAD) + continue; + count++; + } + mtx_unlock(&vm_object_list_mtx); + return (SYSCTL_OUT(req, NULL, sizeof(struct kinfo_vmobject) * + count * 11 / 10)); + } + + error = 0; + + /* + * VM objects are type stable and are never removed from the + * list once added. This allows us to safely read obj->object_list + * after reacquiring the VM object lock. + */ + mtx_lock(&vm_object_list_mtx); + TAILQ_FOREACH(obj, &vm_object_list, object_list) { + if (obj->type == OBJT_DEAD) + continue; + VM_OBJECT_RLOCK(obj); + if (obj->type == OBJT_DEAD) { + VM_OBJECT_RUNLOCK(obj); + continue; + } + mtx_unlock(&vm_object_list_mtx); + kvo.kvo_size = ptoa(obj->size); + kvo.kvo_resident = obj->resident_page_count; + kvo.kvo_ref_count = obj->ref_count; + kvo.kvo_shadow_count = obj->shadow_count; + kvo.kvo_memattr = obj->memattr; + kvo.kvo_active = 0; + kvo.kvo_inactive = 0; + TAILQ_FOREACH(m, &obj->memq, listq) { + /* + * A page may belong to the object but be + * dequeued and set to PQ_NONE while the + * object lock is not held. This makes the + * reads of m->queue below racy, and we do not + * count pages set to PQ_NONE. However, this + * sysctl is only meant to give an + * approximation of the system anyway. + */ + if (m->queue == PQ_ACTIVE) + kvo.kvo_active++; + else if (m->queue == PQ_INACTIVE) + kvo.kvo_inactive++; + } + + kvo.kvo_vn_fileid = 0; + kvo.kvo_vn_fsid = 0; + freepath = NULL; + fullpath = ""; + vp = NULL; + switch (obj->type) { + case OBJT_DEFAULT: + kvo.kvo_type = KVME_TYPE_DEFAULT; + break; + case OBJT_VNODE: + kvo.kvo_type = KVME_TYPE_VNODE; + vp = obj->handle; + vref(vp); + break; + case OBJT_SWAP: + kvo.kvo_type = KVME_TYPE_SWAP; + break; + case OBJT_DEVICE: + kvo.kvo_type = KVME_TYPE_DEVICE; + break; + case OBJT_PHYS: + kvo.kvo_type = KVME_TYPE_PHYS; + break; + case OBJT_DEAD: + kvo.kvo_type = KVME_TYPE_DEAD; + break; + case OBJT_SG: + kvo.kvo_type = KVME_TYPE_SG; + break; + case OBJT_MGTDEVICE: + kvo.kvo_type = KVME_TYPE_MGTDEVICE; + break; + default: + kvo.kvo_type = KVME_TYPE_UNKNOWN; + break; + } + VM_OBJECT_RUNLOCK(obj); + if (vp != NULL) { + vn_fullpath(curthread, vp, &fullpath, &freepath); + vn_lock(vp, LK_SHARED | LK_RETRY); + if (VOP_GETATTR(vp, &va, curthread->td_ucred) == 0) { + kvo.kvo_vn_fileid = va.va_fileid; + kvo.kvo_vn_fsid = va.va_fsid; + } + vput(vp); + } + + strlcpy(kvo.kvo_path, fullpath, sizeof(kvo.kvo_path)); + if (freepath != NULL) + free(freepath, M_TEMP); + + /* Pack record size down */ + kvo.kvo_structsize = offsetof(struct kinfo_vmobject, kvo_path) + + strlen(kvo.kvo_path) + 1; + kvo.kvo_structsize = roundup(kvo.kvo_structsize, + sizeof(uint64_t)); + error = SYSCTL_OUT(req, &kvo, kvo.kvo_structsize); + mtx_lock(&vm_object_list_mtx); + if (error) + break; + } + mtx_unlock(&vm_object_list_mtx); + return (error); +} +SYSCTL_PROC(_vm, OID_AUTO, objects, CTLTYPE_STRUCT | CTLFLAG_RW | CTLFLAG_SKIP | + CTLFLAG_MPSAFE, NULL, 0, sysctl_vm_object_list, "S,kinfo_vmobject", + "List of VM objects"); + #include "opt_ddb.h" #ifdef DDB #include diff --git a/sys/vm/vm_page.c b/sys/vm/vm_page.c index 0aec01f64bc2..b3b36d66e203 100644 --- a/sys/vm/vm_page.c +++ b/sys/vm/vm_page.c @@ -1756,6 +1756,7 @@ vm_page_alloc(vm_object_t object, vm_pindex_t pindex, int req) m->wire_count = 0; } m->object = NULL; + m->oflags = VPO_UNMANAGED; vm_page_free(m); return (NULL); } @@ -3153,8 +3154,8 @@ vm_page_zero_invalid(vm_page_t m, boolean_t setvalid) VM_OBJECT_ASSERT_WLOCKED(m->object); /* * Scan the valid bits looking for invalid sections that - * must be zerod. Invalid sub-DEV_BSIZE'd areas ( where the - * valid bit may be set ) have already been zerod by + * must be zeroed. Invalid sub-DEV_BSIZE'd areas ( where the + * valid bit may be set ) have already been zeroed by * vm_page_set_validclean(). */ for (b = i = 0; i <= PAGE_SIZE / DEV_BSIZE; ++i) { diff --git a/sys/vm/vm_pageout.c b/sys/vm/vm_pageout.c index 872ffd8f6a07..2f57579da353 100644 --- a/sys/vm/vm_pageout.c +++ b/sys/vm/vm_pageout.c @@ -1724,8 +1724,9 @@ vm_pageout_init(void) static void vm_pageout(void) { + int error; #if MAXMEMDOM > 1 - int error, i; + int i; #endif swap_pager_swap_init(); @@ -1739,6 +1740,10 @@ vm_pageout(void) } } #endif + error = kthread_add(uma_reclaim_worker, NULL, curproc, NULL, + 0, 0, "uma"); + if (error != 0) + panic("starting uma_reclaim helper, error %d\n", error); vm_pageout_worker((void *)(uintptr_t)0); } diff --git a/sys/vm/vm_phys.c b/sys/vm/vm_phys.c index 5c33be43079c..71fadd75893d 100644 --- a/sys/vm/vm_phys.c +++ b/sys/vm/vm_phys.c @@ -71,6 +71,7 @@ _Static_assert(sizeof(long) * NBBY >= VM_PHYSSEG_MAX, "Too many physsegs."); struct mem_affinity *mem_affinity; +int *mem_locality; int vm_ndomains = 1; @@ -140,6 +141,10 @@ static int sysctl_vm_phys_segs(SYSCTL_HANDLER_ARGS); SYSCTL_OID(_vm, OID_AUTO, phys_segs, CTLTYPE_STRING | CTLFLAG_RD, NULL, 0, sysctl_vm_phys_segs, "A", "Phys Seg Info"); +static int sysctl_vm_phys_locality(SYSCTL_HANDLER_ARGS); +SYSCTL_OID(_vm, OID_AUTO, phys_locality, CTLTYPE_STRING | CTLFLAG_RD, + NULL, 0, sysctl_vm_phys_locality, "A", "Phys Locality Info"); + SYSCTL_INT(_vm, OID_AUTO, ndomains, CTLFLAG_RD, &vm_ndomains, 0, "Number of physical memory domains available."); @@ -297,6 +302,48 @@ sysctl_vm_phys_segs(SYSCTL_HANDLER_ARGS) return (error); } +/* + * Return affinity, or -1 if there's no affinity information. + */ +static int +vm_phys_mem_affinity(int f, int t) +{ + + if (mem_locality == NULL) + return (-1); + if (f >= vm_ndomains || t >= vm_ndomains) + return (-1); + return (mem_locality[f * vm_ndomains + t]); +} + +/* + * Outputs the VM locality table. + */ +static int +sysctl_vm_phys_locality(SYSCTL_HANDLER_ARGS) +{ + struct sbuf sbuf; + int error, i, j; + + error = sysctl_wire_old_buffer(req, 0); + if (error != 0) + return (error); + sbuf_new_for_sysctl(&sbuf, NULL, 128, req); + + sbuf_printf(&sbuf, "\n"); + + for (i = 0; i < vm_ndomains; i++) { + sbuf_printf(&sbuf, "%d: ", i); + for (j = 0; j < vm_ndomains; j++) { + sbuf_printf(&sbuf, "%d ", vm_phys_mem_affinity(i, j)); + } + sbuf_printf(&sbuf, "\n"); + } + error = sbuf_finish(&sbuf); + sbuf_delete(&sbuf); + return (error); +} + static void vm_freelist_add(struct vm_freelist *fl, vm_page_t m, int order, int tail) { diff --git a/sys/vm/vm_phys.h b/sys/vm/vm_phys.h index 8f3e847aceb7..575b93cde1a6 100644 --- a/sys/vm/vm_phys.h +++ b/sys/vm/vm_phys.h @@ -61,6 +61,7 @@ struct vm_phys_seg { }; extern struct mem_affinity *mem_affinity; +extern int *mem_locality; extern int vm_ndomains; extern struct vm_phys_seg vm_phys_segs[]; extern int vm_phys_nsegs; diff --git a/sys/vm/vnode_pager.c b/sys/vm/vnode_pager.c index c59f81adae82..b65a2a374caf 100644 --- a/sys/vm/vnode_pager.c +++ b/sys/vm/vnode_pager.c @@ -237,6 +237,12 @@ vnode_pager_alloc(void *handle, vm_ooffset_t size, vm_prot_t prot, * Object has been created while we were sleeping */ VI_UNLOCK(vp); + VM_OBJECT_WLOCK(object); + KASSERT(object->ref_count == 1, + ("leaked ref %p %d", object, object->ref_count)); + object->type = OBJT_DEAD; + object->ref_count = 0; + VM_OBJECT_WUNLOCK(object); vm_object_destroy(object); goto retry; } diff --git a/sys/x86/acpica/srat.c b/sys/x86/acpica/srat.c index 8d2a7417625c..2ec0c329c861 100644 --- a/sys/x86/acpica/srat.c +++ b/sys/x86/acpica/srat.c @@ -64,8 +64,96 @@ static vm_paddr_t srat_physaddr; static int vm_domains[VM_PHYSSEG_MAX]; +static ACPI_TABLE_SLIT *slit; +static vm_paddr_t slit_physaddr; +static int vm_locality_table[MAXMEMDOM * MAXMEMDOM]; + static void srat_walk_table(acpi_subtable_handler *handler, void *arg); +/* + * SLIT parsing. + */ + +static void +slit_parse_table(ACPI_TABLE_SLIT *s) +{ + int i, j; + int i_domain, j_domain; + int offset = 0; + uint8_t e; + + /* + * This maps the SLIT data into the VM-domain centric view. + * There may be sparse entries in the PXM namespace, so + * remap them to a VM-domain ID and if it doesn't exist, + * skip it. + * + * It should result in a packed 2d array of VM-domain + * locality information entries. + */ + + if (bootverbose) + printf("SLIT.Localities: %d\n", (int) s->LocalityCount); + for (i = 0; i < s->LocalityCount; i++) { + i_domain = acpi_map_pxm_to_vm_domainid(i); + if (i_domain < 0) + continue; + + if (bootverbose) + printf("%d: ", i); + for (j = 0; j < s->LocalityCount; j++) { + j_domain = acpi_map_pxm_to_vm_domainid(j); + if (j_domain < 0) + continue; + e = s->Entry[i * s->LocalityCount + j]; + if (bootverbose) + printf("%d ", (int) e); + /* 255 == "no locality information" */ + if (e == 255) + vm_locality_table[offset] = -1; + else + vm_locality_table[offset] = e; + offset++; + } + if (bootverbose) + printf("\n"); + } +} + +/* + * Look for an ACPI System Locality Distance Information Table ("SLIT") + */ +static int +parse_slit(void) +{ + + if (resource_disabled("slit", 0)) { + return (-1); + } + + slit_physaddr = acpi_find_table(ACPI_SIG_SLIT); + if (slit_physaddr == 0) { + return (-1); + } + + /* + * Make a pass over the table to populate the cpus[] and + * mem_info[] tables. + */ + slit = acpi_map_table(slit_physaddr, ACPI_SIG_SLIT); + slit_parse_table(slit); + acpi_unmap_table(slit); + slit = NULL; + + /* Tell the VM about it! */ + mem_locality = vm_locality_table; + return (0); +} + +/* + * SRAT parsing. + */ + /* * Returns true if a memory range overlaps with at least one range in * phys_avail[]. @@ -301,17 +389,17 @@ renumber_domains(void) /* * Look for an ACPI System Resource Affinity Table ("SRAT") */ -static void -parse_srat(void *dummy) +static int +parse_srat(void) { int error; if (resource_disabled("srat", 0)) - return; + return (-1); srat_physaddr = acpi_find_table(ACPI_SIG_SRAT); if (srat_physaddr == 0) - return; + return (-1); /* * Make a pass over the table to populate the cpus[] and @@ -325,13 +413,39 @@ parse_srat(void *dummy) if (error || check_domains() != 0 || check_phys_avail() != 0 || renumber_domains() != 0) { srat_physaddr = 0; - return; + return (-1); } /* Point vm_phys at our memory affinity table. */ mem_affinity = mem_info; + + return (0); } -SYSINIT(parse_srat, SI_SUB_VM - 1, SI_ORDER_FIRST, parse_srat, NULL); + +static void +init_mem_locality(void) +{ + int i; + + /* + * For now, assume -1 == "no locality information for + * this pairing. + */ + for (i = 0; i < MAXMEMDOM * MAXMEMDOM; i++) + vm_locality_table[i] = -1; +} + +static void +parse_acpi_tables(void *dummy) +{ + + if (parse_srat() < 0) + return; + init_mem_locality(); + (void) parse_slit(); +} +SYSINIT(parse_acpi_tables, SI_SUB_VM - 1, SI_ORDER_FIRST, parse_acpi_tables, + NULL); static void srat_walk_table(acpi_subtable_handler *handler, void *arg) diff --git a/sys/x86/include/acpica_machdep.h b/sys/x86/include/acpica_machdep.h index 46080c0e8faf..136285caa699 100644 --- a/sys/x86/include/acpica_machdep.h +++ b/sys/x86/include/acpica_machdep.h @@ -74,6 +74,7 @@ enum intr_polarity; void acpi_SetDefaultIntrModel(int model); void acpi_cpu_c1(void); +void acpi_cpu_idle_mwait(uint32_t mwait_hint); void *acpi_map_table(vm_paddr_t pa, const char *sig); void acpi_unmap_table(void *table); vm_paddr_t acpi_find_table(const char *sig); diff --git a/sys/x86/include/specialreg.h b/sys/x86/include/specialreg.h index a771fffaea57..6c849ffea72f 100644 --- a/sys/x86/include/specialreg.h +++ b/sys/x86/include/specialreg.h @@ -53,6 +53,7 @@ #define CR0_CD 0x40000000 /* Cache Disable */ #define CR3_PCID_SAVE 0x8000000000000000 +#define CR3_PCID_MASK 0xfff /* * Bits in PPro special registers diff --git a/sys/x86/x86/cpu_machdep.c b/sys/x86/x86/cpu_machdep.c index f8d1f083c244..f07b97e79015 100644 --- a/sys/x86/x86/cpu_machdep.c +++ b/sys/x86/x86/cpu_machdep.c @@ -90,6 +90,7 @@ __FBSDID("$FreeBSD$"); #ifdef SMP #include #endif +#include #include #include @@ -100,6 +101,10 @@ __FBSDID("$FreeBSD$"); #include #include +#define STATE_RUNNING 0x0 +#define STATE_MWAIT 0x1 +#define STATE_SLEEPING 0x2 + /* * Machine dependent boot() routine * @@ -121,6 +126,38 @@ cpu_flush_dcache(void *ptr, size_t len) /* Not applicable */ } +void +acpi_cpu_c1(void) +{ + + __asm __volatile("sti; hlt"); +} + +void +acpi_cpu_idle_mwait(uint32_t mwait_hint) +{ + int *state; + + /* + * XXXKIB. Software coordination mode should be supported, + * but all Intel CPUs provide hardware coordination. + */ + + state = (int *)PCPU_PTR(monitorbuf); + KASSERT(*state == STATE_SLEEPING, + ("cpu_mwait_cx: wrong monitorbuf state")); + *state = STATE_MWAIT; + cpu_monitor(state, 0, 0); + if (*state == STATE_MWAIT) + cpu_mwait(MWAIT_INTRBREAK, mwait_hint); + + /* + * We should exit on any event that interrupts mwait, because + * that event might be a wanted interrupt. + */ + *state = STATE_RUNNING; +} + /* Get current clock frequency for the given cpu id. */ int cpu_est_clockrate(int cpu_id, uint64_t *rate) @@ -194,16 +231,21 @@ cpu_halt(void) halt(); } +bool +cpu_mwait_usable(void) +{ + + return ((cpu_feature2 & CPUID2_MON) != 0 && ((cpu_mon_mwait_flags & + (CPUID5_MON_MWAIT_EXT | CPUID5_MWAIT_INTRBREAK)) == + (CPUID5_MON_MWAIT_EXT | CPUID5_MWAIT_INTRBREAK))); +} + void (*cpu_idle_hook)(sbintime_t) = NULL; /* ACPI idle hook. */ static int cpu_ident_amdc1e = 0; /* AMD C1E supported. */ static int idle_mwait = 1; /* Use MONITOR/MWAIT for short idle. */ SYSCTL_INT(_machdep, OID_AUTO, idle_mwait, CTLFLAG_RWTUN, &idle_mwait, 0, "Use MONITOR/MWAIT for short idle"); -#define STATE_RUNNING 0x0 -#define STATE_MWAIT 0x1 -#define STATE_SLEEPING 0x2 - #ifndef PC98 static void cpu_idle_acpi(sbintime_t sbt) @@ -220,7 +262,7 @@ cpu_idle_acpi(sbintime_t sbt) else if (cpu_idle_hook) cpu_idle_hook(sbt); else - __asm __volatile("sti; hlt"); + acpi_cpu_c1(); *state = STATE_RUNNING; } #endif /* !PC98 */ @@ -253,7 +295,7 @@ cpu_idle_hlt(sbintime_t sbt) if (sched_runnable()) enable_intr(); else - __asm __volatile("sti; hlt"); + acpi_cpu_c1(); *state = STATE_RUNNING; } diff --git a/sys/x86/x86/mca.c b/sys/x86/x86/mca.c index 8026b15096c6..b4c764338cad 100644 --- a/sys/x86/x86/mca.c +++ b/sys/x86/x86/mca.c @@ -762,7 +762,7 @@ mca_setup(uint64_t mcg_cap) mtx_init(&mca_lock, "mca", NULL, MTX_SPIN); STAILQ_INIT(&mca_records); TASK_INIT(&mca_scan_task, 0, mca_scan_cpus, NULL); - callout_init(&mca_timer, CALLOUT_MPSAFE); + callout_init(&mca_timer, 1); STAILQ_INIT(&mca_freelist); TASK_INIT(&mca_refill_task, 0, mca_refill, NULL); mca_fill_freelist(); diff --git a/sys/x86/xen/xen_apic.c b/sys/x86/xen/xen_apic.c index c742920d90e1..a65f3b5efb94 100644 --- a/sys/x86/xen/xen_apic.c +++ b/sys/x86/xen/xen_apic.c @@ -422,6 +422,14 @@ xen_invltlb(void *arg) } #ifdef __amd64__ +static int +xen_invltlb_invpcid(void *arg) +{ + + invltlb_invpcid_handler(); + return (FILTER_HANDLED); +} + static int xen_invltlb_pcid(void *arg) { @@ -439,16 +447,6 @@ xen_invlpg(void *arg) return (FILTER_HANDLED); } -#ifdef __amd64__ -static int -xen_invlpg_pcid(void *arg) -{ - - invlpg_pcid_handler(); - return (FILTER_HANDLED); -} -#endif - static int xen_invlrng(void *arg) { @@ -532,8 +530,8 @@ xen_setup_cpus(void) #ifdef __amd64__ if (pmap_pcid_enabled) { - xen_ipis[IPI_TO_IDX(IPI_INVLTLB)].filter = xen_invltlb_pcid; - xen_ipis[IPI_TO_IDX(IPI_INVLPG)].filter = xen_invlpg_pcid; + xen_ipis[IPI_TO_IDX(IPI_INVLTLB)].filter = invpcid_works ? + xen_invltlb_invpcid : xen_invltlb_pcid; } #endif CPU_FOREACH(i) diff --git a/sys/x86/xen/xenpv.c b/sys/x86/xen/xenpv.c index bdda88374f27..50fd9df14912 100644 --- a/sys/x86/xen/xenpv.c +++ b/sys/x86/xen/xenpv.c @@ -33,11 +33,34 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include +#include + +#include +#include +#include +#include #include #include +#include "xenmem_if.h" + +/* + * Allocate unused physical memory above 4GB in order to map memory + * from foreign domains. We use memory starting at 4GB in order to + * prevent clashes with MMIO/ACPI regions. + * + * Since this is not possible on i386 just use any available memory + * chunk and hope we don't clash with anything else. + */ +#ifdef __amd64__ +#define LOW_MEM_LIMIT 0x100000000ul +#else +#define LOW_MEM_LIMIT 0 +#endif + static devclass_t xenpv_devclass; static void @@ -50,7 +73,11 @@ xenpv_identify(driver_t *driver, device_t parent) if (devclass_get_device(xenpv_devclass, 0)) return; - if (BUS_ADD_CHILD(parent, 0, "xenpv", 0) == NULL) + /* + * The xenpv bus should be the last to attach in order + * to properly detect if an ISA bus has already been added. + */ + if (BUS_ADD_CHILD(parent, UINT_MAX, "xenpv", 0) == NULL) panic("Unable to attach xenpv bus."); } @@ -85,6 +112,42 @@ xenpv_attach(device_t dev) return (0); } +static struct resource * +xenpv_alloc_physmem(device_t dev, device_t child, int *res_id, size_t size) +{ + struct resource *res; + vm_paddr_t phys_addr; + int error; + + res = bus_alloc_resource(child, SYS_RES_MEMORY, res_id, LOW_MEM_LIMIT, + ~0ul, size, RF_ACTIVE); + if (res == NULL) + return (NULL); + + phys_addr = rman_get_start(res); + error = vm_phys_fictitious_reg_range(phys_addr, phys_addr + size, + VM_MEMATTR_DEFAULT); + if (error) { + bus_release_resource(child, SYS_RES_MEMORY, *res_id, res); + return (NULL); + } + + return (res); +} + +static int +xenpv_free_physmem(device_t dev, device_t child, int res_id, struct resource *res) +{ + vm_paddr_t phys_addr; + size_t size; + + phys_addr = rman_get_start(res); + size = rman_get_size(res); + + vm_phys_fictitious_unreg_range(phys_addr, phys_addr + size); + return (bus_release_resource(child, SYS_RES_MEMORY, res_id, res)); +} + static device_method_t xenpv_methods[] = { /* Device interface */ DEVMETHOD(device_identify, xenpv_identify), @@ -100,6 +163,10 @@ static device_method_t xenpv_methods[] = { DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), + /* Interface to allocate memory for foreign mappings */ + DEVMETHOD(xenmem_alloc, xenpv_alloc_physmem), + DEVMETHOD(xenmem_free, xenpv_free_physmem), + DEVMETHOD_END }; @@ -110,3 +177,25 @@ static driver_t xenpv_driver = { }; DRIVER_MODULE(xenpv, nexus, xenpv_driver, xenpv_devclass, 0, 0); + +struct resource * +xenmem_alloc(device_t dev, int *res_id, size_t size) +{ + device_t parent; + + parent = device_get_parent(dev); + if (parent == NULL) + return (NULL); + return (XENMEM_ALLOC(parent, dev, res_id, size)); +} + +int +xenmem_free(device_t dev, int res_id, struct resource *res) +{ + device_t parent; + + parent = device_get_parent(dev); + if (parent == NULL) + return (ENXIO); + return (XENMEM_FREE(parent, dev, res_id, res)); +} diff --git a/sys/xen/xen-os.h b/sys/xen/xen-os.h index c982d55dcc9a..7ceef4f1c5ae 100644 --- a/sys/xen/xen-os.h +++ b/sys/xen/xen-os.h @@ -89,6 +89,13 @@ xen_initial_domain(void) (HYPERVISOR_start_info->flags & SIF_INITDOMAIN) != 0); } +/* + * Functions to allocate/free unused memory in order + * to map memory from other domains. + */ +struct resource *xenmem_alloc(device_t dev, int *res_id, size_t size); +int xenmem_free(device_t dev, int res_id, struct resource *res); + /* Debug/emergency function, prints directly to hypervisor console */ void xc_printf(const char *, ...) __printflike(1, 2); diff --git a/sys/xen/xenmem/xenmem_if.m b/sys/xen/xenmem/xenmem_if.m new file mode 100644 index 000000000000..5cc2171c3c2c --- /dev/null +++ b/sys/xen/xenmem/xenmem_if.m @@ -0,0 +1,95 @@ +#- +# Copyright (c) 2015 Roger Pau Monné +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +# SUCH DAMAGE. +# +# $FreeBSD$ +# + +#include + +INTERFACE xenmem; + +# +# Default implementations of some methods. +# +CODE { + static struct resource * + xenmem_generic_alloc(device_t dev, device_t child, int *res_id, + size_t size) + { + device_t parent; + + parent = device_get_parent(dev); + if (parent == NULL) + return (NULL); + return (XENMEM_ALLOC(parent, child, res_id, size)); + } + + static int + xenmem_generic_free(device_t dev, device_t child, int res_id, + struct resource *res) + { + device_t parent; + + parent = device_get_parent(dev); + if (parent == NULL) + return (ENXIO); + return (XENMEM_FREE(parent, child, res_id, res)); + } +}; + +/** + * @brief Request for unused physical memory regions. + * + * @param _dev the device whose child was being probed. + * @param _child the child device which failed to probe. + * @param _res_id a pointer to the resource identifier. + * @param _size size of the required memory region. + * + * @returns the resource which was allocated or @c NULL if no + * resource could be allocated. + */ +METHOD struct resource * alloc { + device_t _dev; + device_t _child; + int *_res_id; + size_t _size; +} DEFAULT xenmem_generic_alloc; + +/** + * @brief Free physical memory regions. + * + * @param _dev the device whose child was being probed. + * @param _child the child device which failed to probe. + * @param _res_id the resource identifier. + * @param _res the resource. + * + * @returns 0 on success, otherwise an error code. + */ +METHOD int free { + device_t _dev; + device_t _child; + int _res_id; + struct resource *_res; +} DEFAULT xenmem_generic_free; diff --git a/tests/Makefile b/tests/Makefile index 89da82d2adf6..12c150973b65 100644 --- a/tests/Makefile +++ b/tests/Makefile @@ -2,6 +2,7 @@ .include +SUBDIR= etc SUBDIR= sys TESTSDIR= ${TESTSBASE} diff --git a/etc/tests/Makefile b/tests/etc/Makefile similarity index 73% rename from etc/tests/Makefile rename to tests/etc/Makefile index 5aacd5b19e57..9aad25c06395 100644 --- a/etc/tests/Makefile +++ b/tests/etc/Makefile @@ -4,7 +4,9 @@ TESTSDIR= ${TESTSBASE}/etc -.PATH: ${.CURDIR:H:H}/tests +.PATH: ${.CURDIR:H} KYUAFILE= yes +SUBDIR+= rc.d + .include diff --git a/etc/rc.d/tests/Makefile b/tests/etc/rc.d/Makefile similarity index 100% rename from etc/rc.d/tests/Makefile rename to tests/etc/rc.d/Makefile diff --git a/etc/rc.d/tests/routing_test.sh b/tests/etc/rc.d/routing_test.sh similarity index 100% rename from etc/rc.d/tests/routing_test.sh rename to tests/etc/rc.d/routing_test.sh diff --git a/tests/sys/kern/Makefile b/tests/sys/kern/Makefile index d366aa1d61ff..bf6aa0de952b 100644 --- a/tests/sys/kern/Makefile +++ b/tests/sys/kern/Makefile @@ -3,6 +3,7 @@ TESTSDIR= ${TESTSBASE}/sys/kern ATF_TESTS_C+= kern_descrip_test +ATF_TESTS_C+= ptrace_test ATF_TESTS_C+= unix_seqpacket_test TEST_METADATA.unix_seqpacket_test+= timeout="15" diff --git a/tests/sys/kern/ptrace_test.c b/tests/sys/kern/ptrace_test.c new file mode 100644 index 000000000000..321dc828545d --- /dev/null +++ b/tests/sys/kern/ptrace_test.c @@ -0,0 +1,389 @@ +/*- + * Copyright (c) 2015 John Baldwin + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Verify that a parent debugger process "sees" the exit of a debugged + * process exactly once when attached via PT_TRACE_ME. + */ +ATF_TC_WITHOUT_HEAD(ptrace__parent_wait_after_trace_me); +ATF_TC_BODY(ptrace__parent_wait_after_trace_me, tc) +{ + pid_t child, wpid; + int status; + + ATF_REQUIRE((child = fork()) != -1); + if (child == 0) { + /* Child process. */ + ATF_REQUIRE(ptrace(PT_TRACE_ME, 0, NULL, 0) != -1); + + /* Trigger a stop. */ + raise(SIGSTOP); + + exit(1); + } + + /* Parent process. */ + + /* The first wait() should report the stop from SIGSTOP. */ + wpid = waitpid(child, &status, 0); + ATF_REQUIRE(wpid == child); + ATF_REQUIRE(WIFSTOPPED(status)); + ATF_REQUIRE(WSTOPSIG(status) == SIGSTOP); + + /* Continue the child ignoring the SIGSTOP. */ + ATF_REQUIRE(ptrace(PT_CONTINUE, child, (caddr_t)1, 0) != -1); + + /* The second wait() should report the exit status. */ + wpid = waitpid(child, &status, 0); + ATF_REQUIRE(wpid == child); + ATF_REQUIRE(WIFEXITED(status)); + ATF_REQUIRE(WEXITSTATUS(status) == 1); + + /* The child should no longer exist. */ + wpid = waitpid(child, &status, 0); + ATF_REQUIRE(wpid == -1); + ATF_REQUIRE(errno == ECHILD); +} + +/* + * Verify that a parent debugger process "sees" the exit of a debugged + * process exactly once when attached via PT_ATTACH. + */ +ATF_TC_WITHOUT_HEAD(ptrace__parent_wait_after_attach); +ATF_TC_BODY(ptrace__parent_wait_after_attach, tc) +{ + pid_t child, wpid; + int cpipe[2], status; + char c; + + ATF_REQUIRE(pipe(cpipe) == 0); + ATF_REQUIRE((child = fork()) != -1); + if (child == 0) { + /* Child process. */ + close(cpipe[0]); + + /* Wait for the parent to attach. */ + ATF_REQUIRE(read(cpipe[1], &c, sizeof(c)) == 0); + + exit(1); + } + close(cpipe[1]); + + /* Parent process. */ + + /* Attach to the child process. */ + ATF_REQUIRE(ptrace(PT_ATTACH, child, NULL, 0) == 0); + + /* The first wait() should report the SIGSTOP from PT_ATTACH. */ + wpid = waitpid(child, &status, 0); + ATF_REQUIRE(wpid == child); + ATF_REQUIRE(WIFSTOPPED(status)); + ATF_REQUIRE(WSTOPSIG(status) == SIGSTOP); + + /* Continue the child ignoring the SIGSTOP. */ + ATF_REQUIRE(ptrace(PT_CONTINUE, child, (caddr_t)1, 0) != -1); + + /* Signal the child to exit. */ + close(cpipe[0]); + + /* The second wait() should report the exit status. */ + wpid = waitpid(child, &status, 0); + ATF_REQUIRE(wpid == child); + ATF_REQUIRE(WIFEXITED(status)); + ATF_REQUIRE(WEXITSTATUS(status) == 1); + + /* The child should no longer exist. */ + wpid = waitpid(child, &status, 0); + ATF_REQUIRE(wpid == -1); + ATF_REQUIRE(errno == ECHILD); +} + +/* + * Verify that a parent process "sees" the exit of a debugged process only + * after the debugger has seen it. + */ +ATF_TC_WITHOUT_HEAD(ptrace__parent_sees_exit_after_child_debugger); +ATF_TC_BODY(ptrace__parent_sees_exit_after_child_debugger, tc) +{ + pid_t child, debugger, wpid; + int cpipe[2], dpipe[2], status; + char c; + + ATF_REQUIRE(pipe(cpipe) == 0); + ATF_REQUIRE((child = fork()) != -1); + + if (child == 0) { + /* Child process. */ + close(cpipe[0]); + + /* Wait for parent to be ready. */ + ATF_REQUIRE(read(cpipe[1], &c, sizeof(c)) == sizeof(c)); + + exit(1); + } + close(cpipe[1]); + + ATF_REQUIRE(pipe(dpipe) == 0); + ATF_REQUIRE((debugger = fork()) != -1); + + if (debugger == 0) { + /* Debugger process. */ + close(dpipe[0]); + + ATF_REQUIRE(ptrace(PT_ATTACH, child, NULL, 0) != -1); + + wpid = waitpid(child, &status, 0); + ATF_REQUIRE(wpid == child); + ATF_REQUIRE(WIFSTOPPED(status)); + ATF_REQUIRE(WSTOPSIG(status) == SIGSTOP); + + ATF_REQUIRE(ptrace(PT_CONTINUE, child, (caddr_t)1, 0) != -1); + + /* Signal parent that debugger is attached. */ + ATF_REQUIRE(write(dpipe[1], &c, sizeof(c)) == sizeof(c)); + + /* Wait for parent's failed wait. */ + ATF_REQUIRE(read(dpipe[1], &c, sizeof(c)) == 0); + + wpid = waitpid(child, &status, 0); + ATF_REQUIRE(wpid == child); + ATF_REQUIRE(WIFEXITED(status)); + ATF_REQUIRE(WEXITSTATUS(status) == 1); + + exit(0); + } + close(dpipe[1]); + + /* Parent process. */ + + /* Wait for the debugger to attach to the child. */ + ATF_REQUIRE(read(dpipe[0], &c, sizeof(c)) == sizeof(c)); + + /* Release the child. */ + ATF_REQUIRE(write(cpipe[0], &c, sizeof(c)) == sizeof(c)); + ATF_REQUIRE(read(cpipe[0], &c, sizeof(c)) == 0); + close(cpipe[0]); + + /* + * Wait for the child to exit. This is kind of gross, but + * there is not a better way. + */ + for (;;) { + struct kinfo_proc kp; + size_t len; + int mib[4]; + + mib[0] = CTL_KERN; + mib[1] = KERN_PROC; + mib[2] = KERN_PROC_PID; + mib[3] = child; + len = sizeof(kp); + if (sysctl(mib, nitems(mib), &kp, &len, NULL, 0) == -1) { + /* The KERN_PROC_PID sysctl fails for zombies. */ + ATF_REQUIRE(errno == ESRCH); + break; + } + usleep(5000); + } + + /* + * This wait should return a pid of 0 to indicate no status to + * report. The parent should see the child as non-exited + * until the debugger sees the exit. + */ + wpid = waitpid(child, &status, WNOHANG); + ATF_REQUIRE(wpid == 0); + + /* Signal the debugger to wait for the child. */ + close(dpipe[0]); + + /* Wait for the debugger. */ + wpid = waitpid(debugger, &status, 0); + ATF_REQUIRE(wpid == debugger); + ATF_REQUIRE(WIFEXITED(status)); + ATF_REQUIRE(WEXITSTATUS(status) == 0); + + /* The child process should now be ready. */ + wpid = waitpid(child, &status, WNOHANG); + ATF_REQUIRE(wpid == child); + ATF_REQUIRE(WIFEXITED(status)); + ATF_REQUIRE(WEXITSTATUS(status) == 1); +} + +/* + * Verify that a parent process "sees" the exit of a debugged process + * only after a non-direct-child debugger has seen it. In particular, + * various wait() calls in the parent must avoid failing with ESRCH by + * checking the parent's orphan list for the debugee. + */ +ATF_TC_WITHOUT_HEAD(ptrace__parent_sees_exit_after_unrelated_debugger); +ATF_TC_BODY(ptrace__parent_sees_exit_after_unrelated_debugger, tc) +{ + pid_t child, debugger, fpid, wpid; + int cpipe[2], dpipe[2], status; + char c; + + ATF_REQUIRE(pipe(cpipe) == 0); + ATF_REQUIRE((child = fork()) != -1); + + if (child == 0) { + /* Child process. */ + close(cpipe[0]); + + /* Wait for parent to be ready. */ + ATF_REQUIRE(read(cpipe[1], &c, sizeof(c)) == sizeof(c)); + + exit(1); + } + close(cpipe[1]); + + ATF_REQUIRE(pipe(dpipe) == 0); + ATF_REQUIRE((debugger = fork()) != -1); + + if (debugger == 0) { + /* Debugger parent. */ + + /* + * Fork again and drop the debugger parent so that the + * debugger is not a child of the main parent. + */ + ATF_REQUIRE((fpid = fork()) != -1); + if (fpid != 0) + exit(2); + + /* Debugger process. */ + close(dpipe[0]); + + ATF_REQUIRE(ptrace(PT_ATTACH, child, NULL, 0) != -1); + + wpid = waitpid(child, &status, 0); + ATF_REQUIRE(wpid == child); + ATF_REQUIRE(WIFSTOPPED(status)); + ATF_REQUIRE(WSTOPSIG(status) == SIGSTOP); + + ATF_REQUIRE(ptrace(PT_CONTINUE, child, (caddr_t)1, 0) != -1); + + /* Signal parent that debugger is attached. */ + ATF_REQUIRE(write(dpipe[1], &c, sizeof(c)) == sizeof(c)); + + /* Wait for parent's failed wait. */ + ATF_REQUIRE(read(dpipe[1], &c, sizeof(c)) == 0); + + wpid = waitpid(child, &status, 0); + ATF_REQUIRE(wpid == child); + ATF_REQUIRE(WIFEXITED(status)); + ATF_REQUIRE(WEXITSTATUS(status) == 1); + + exit(0); + } + + /* Parent process. */ + + /* Wait for the debugger parent process to exit. */ + wpid = waitpid(debugger, &status, 0); + ATF_REQUIRE(wpid == debugger); + ATF_REQUIRE(WIFEXITED(status)); + ATF_REQUIRE(WEXITSTATUS(status) == 2); + + /* A WNOHANG wait here should see the non-exited child. */ + wpid = waitpid(child, &status, WNOHANG); + ATF_REQUIRE(wpid == 0); + + /* Wait for the debugger to attach to the child. */ + ATF_REQUIRE(read(dpipe[0], &c, sizeof(c)) == sizeof(c)); + + /* Release the child. */ + ATF_REQUIRE(write(cpipe[0], &c, sizeof(c)) == sizeof(c)); + ATF_REQUIRE(read(cpipe[0], &c, sizeof(c)) == 0); + close(cpipe[0]); + + /* + * Wait for the child to exit. This is kind of gross, but + * there is not a better way. + */ + for (;;) { + struct kinfo_proc kp; + size_t len; + int mib[4]; + + mib[0] = CTL_KERN; + mib[1] = KERN_PROC; + mib[2] = KERN_PROC_PID; + mib[3] = child; + len = sizeof(kp); + if (sysctl(mib, nitems(mib), &kp, &len, NULL, 0) == -1) { + /* The KERN_PROC_PID sysctl fails for zombies. */ + ATF_REQUIRE(errno == ESRCH); + break; + } + usleep(5000); + } + + /* + * This wait should return a pid of 0 to indicate no status to + * report. The parent should see the child as non-exited + * until the debugger sees the exit. + */ + wpid = waitpid(child, &status, WNOHANG); + ATF_REQUIRE(wpid == 0); + + /* Signal the debugger to wait for the child. */ + close(dpipe[0]); + + /* Wait for the debugger. */ + ATF_REQUIRE(read(dpipe[1], &c, sizeof(c)) == 0); + + /* The child process should now be ready. */ + wpid = waitpid(child, &status, WNOHANG); + ATF_REQUIRE(wpid == child); + ATF_REQUIRE(WIFEXITED(status)); + ATF_REQUIRE(WEXITSTATUS(status) == 1); +} + +ATF_TP_ADD_TCS(tp) +{ + + ATF_TP_ADD_TC(tp, ptrace__parent_wait_after_trace_me); + ATF_TP_ADD_TC(tp, ptrace__parent_wait_after_attach); + ATF_TP_ADD_TC(tp, ptrace__parent_sees_exit_after_child_debugger); + ATF_TP_ADD_TC(tp, ptrace__parent_sees_exit_after_unrelated_debugger); + + return (atf_no_error()); +} diff --git a/tools/bsdbox/Makefile.base b/tools/bsdbox/Makefile.base index 1429b09ce552..4eb70562454b 100644 --- a/tools/bsdbox/Makefile.base +++ b/tools/bsdbox/Makefile.base @@ -6,7 +6,7 @@ # CRUNCH_PROGS_sbin+= dmesg sysctl init reboot CRUNCH_PROGS_bin+= ls cat dd df cp hostname kill mkdir sleep ps -CRUNCH_PROGS_bin+= ln rm hostname kenv +CRUNCH_PROGS_bin+= ln rm hostname kenv mv expr CRUNCH_PROGS_usr.bin+= true false hexdump tail nc w head uname tset CRUNCH_PROGS_usr.sbin+= gpioctl CRUNCH_ALIAS_w= uptime diff --git a/tools/build/Makefile b/tools/build/Makefile index 6aead6337a03..2617d8d4c4d5 100644 --- a/tools/build/Makefile +++ b/tools/build/Makefile @@ -25,6 +25,14 @@ CFLAGS+= -I${.CURDIR}/../../contrib/libc-vis \ -I${.CURDIR}/../../lib/libc/include .endif +_WITH_REALLOCARRAY!= grep -c reallocarray /usr/include/stdlib.h || true +.if ${_WITH_REALLOCARRAY} == 0 +.PATH: ${.CURDIR}/../../lib/libc/stdlib +INCS+= stdlib.h +SRCS+= reallocarray.c +CFLAGS+= -I${.CURDIR}/../../lib/libc/include +.endif + .if empty(SRCS) SRCS= dummy.c .endif diff --git a/tools/build/mk/OptionalObsoleteFiles.inc b/tools/build/mk/OptionalObsoleteFiles.inc index 4a2ba7512728..ae415a99e3af 100644 --- a/tools/build/mk/OptionalObsoleteFiles.inc +++ b/tools/build/mk/OptionalObsoleteFiles.inc @@ -781,6 +781,10 @@ OLD_FILES+=usr/share/dtrace/toolkit/hotkernel OLD_FILES+=usr/share/dtrace/toolkit/hotuser OLD_FILES+=usr/share/dtrace/toolkit/opensnoop OLD_FILES+=usr/share/dtrace/toolkit/procsystime +OLD_FILES+=usr/share/dtrace/tcpconn +OLD_FILES+=usr/share/dtrace/tcpstate +OLD_FILES+=usr/share/dtrace/tcptrack +OLD_FILES+=usr/share/dtrace/udptrack OLD_FILES+=usr/share/man/man1/dtrace.1.gz OLD_DIRS+=usr/lib/dtrace OLD_DIRS+=usr/lib32/dtrace @@ -837,66 +841,66 @@ OLD_FILES+=usr/bin/clang++ OLD_FILES+=usr/bin/clang-cpp OLD_FILES+=usr/bin/clang-tblgen OLD_FILES+=usr/bin/tblgen -OLD_FILES+=usr/lib/clang/3.6.0/include/__stddef_max_align_t.h -OLD_FILES+=usr/lib/clang/3.6.0/include/__wmmintrin_aes.h -OLD_FILES+=usr/lib/clang/3.6.0/include/__wmmintrin_pclmul.h -OLD_FILES+=usr/lib/clang/3.6.0/include/adxintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/altivec.h -OLD_FILES+=usr/lib/clang/3.6.0/include/ammintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/arm_acle.h -OLD_FILES+=usr/lib/clang/3.6.0/include/arm_neon.h -OLD_FILES+=usr/lib/clang/3.6.0/include/avx2intrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/avx512bwintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/avx512erintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/avx512fintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/avx512vlbwintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/avx512vlintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/avxintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/bmi2intrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/bmiintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/cpuid.h -OLD_FILES+=usr/lib/clang/3.6.0/include/emmintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/f16cintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/fma4intrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/fmaintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/ia32intrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/immintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/lzcntintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/mm3dnow.h -OLD_FILES+=usr/lib/clang/3.6.0/include/mm_malloc.h -OLD_FILES+=usr/lib/clang/3.6.0/include/mmintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/module.modulemap -OLD_FILES+=usr/lib/clang/3.6.0/include/nmmintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/pmmintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/popcntintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/prfchwintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/rdseedintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/rtmintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/shaintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/smmintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/tbmintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/tmmintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/wmmintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/x86intrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/xmmintrin.h -OLD_FILES+=usr/lib/clang/3.6.0/include/xopintrin.h -OLD_DIRS+=usr/lib/clang/3.6.0/include -OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.asan-i386.a -OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.asan-x86_64.a -OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.asan_cxx-i386.a -OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.asan_cxx-x86_64.a -OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.profile-arm.a -OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.profile-i386.a -OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.profile-x86_64.a -OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.san-i386.a -OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.san-x86_64.a -OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.ubsan-i386.a -OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.ubsan-x86_64.a -OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.ubsan_cxx-i386.a -OLD_FILES+=usr/lib/clang/3.6.0/lib/freebsd/libclang_rt.ubsan_cxx-x86_64.a -OLD_DIRS+=usr/lib/clang/3.6.0/lib/freebsd -OLD_DIRS+=usr/lib/clang/3.6.0/lib -OLD_DIRS+=usr/lib/clang/3.6.0 +OLD_FILES+=usr/lib/clang/3.6.1/include/__stddef_max_align_t.h +OLD_FILES+=usr/lib/clang/3.6.1/include/__wmmintrin_aes.h +OLD_FILES+=usr/lib/clang/3.6.1/include/__wmmintrin_pclmul.h +OLD_FILES+=usr/lib/clang/3.6.1/include/adxintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/altivec.h +OLD_FILES+=usr/lib/clang/3.6.1/include/ammintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/arm_acle.h +OLD_FILES+=usr/lib/clang/3.6.1/include/arm_neon.h +OLD_FILES+=usr/lib/clang/3.6.1/include/avx2intrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/avx512bwintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/avx512erintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/avx512fintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/avx512vlbwintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/avx512vlintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/avxintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/bmi2intrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/bmiintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/cpuid.h +OLD_FILES+=usr/lib/clang/3.6.1/include/emmintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/f16cintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/fma4intrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/fmaintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/ia32intrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/immintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/lzcntintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/mm3dnow.h +OLD_FILES+=usr/lib/clang/3.6.1/include/mm_malloc.h +OLD_FILES+=usr/lib/clang/3.6.1/include/mmintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/module.modulemap +OLD_FILES+=usr/lib/clang/3.6.1/include/nmmintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/pmmintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/popcntintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/prfchwintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/rdseedintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/rtmintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/shaintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/smmintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/tbmintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/tmmintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/wmmintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/x86intrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/xmmintrin.h +OLD_FILES+=usr/lib/clang/3.6.1/include/xopintrin.h +OLD_DIRS+=usr/lib/clang/3.6.1/include +OLD_FILES+=usr/lib/clang/3.6.1/lib/freebsd/libclang_rt.asan-i386.a +OLD_FILES+=usr/lib/clang/3.6.1/lib/freebsd/libclang_rt.asan-x86_64.a +OLD_FILES+=usr/lib/clang/3.6.1/lib/freebsd/libclang_rt.asan_cxx-i386.a +OLD_FILES+=usr/lib/clang/3.6.1/lib/freebsd/libclang_rt.asan_cxx-x86_64.a +OLD_FILES+=usr/lib/clang/3.6.1/lib/freebsd/libclang_rt.profile-arm.a +OLD_FILES+=usr/lib/clang/3.6.1/lib/freebsd/libclang_rt.profile-i386.a +OLD_FILES+=usr/lib/clang/3.6.1/lib/freebsd/libclang_rt.profile-x86_64.a +OLD_FILES+=usr/lib/clang/3.6.1/lib/freebsd/libclang_rt.san-i386.a +OLD_FILES+=usr/lib/clang/3.6.1/lib/freebsd/libclang_rt.san-x86_64.a +OLD_FILES+=usr/lib/clang/3.6.1/lib/freebsd/libclang_rt.ubsan-i386.a +OLD_FILES+=usr/lib/clang/3.6.1/lib/freebsd/libclang_rt.ubsan-x86_64.a +OLD_FILES+=usr/lib/clang/3.6.1/lib/freebsd/libclang_rt.ubsan_cxx-i386.a +OLD_FILES+=usr/lib/clang/3.6.1/lib/freebsd/libclang_rt.ubsan_cxx-x86_64.a +OLD_DIRS+=usr/lib/clang/3.6.1/lib/freebsd +OLD_DIRS+=usr/lib/clang/3.6.1/lib +OLD_DIRS+=usr/lib/clang/3.6.1 OLD_DIRS+=usr/lib/clang OLD_FILES+=usr/share/doc/llvm/clang/LICENSE.TXT OLD_DIRS+=usr/share/doc/llvm/clang @@ -1743,6 +1747,12 @@ OLD_FILES+=usr/include/gcc/4.2/altivec.h OLD_FILES+=usr/include/gcc/4.2/ppc-asm.h OLD_FILES+=usr/include/gcc/4.2/spe.h .endif +OLD_FILES+=usr/include/omp.h +OLD_FILES+=usr/lib/libgcov.a +OLD_FILES+=usr/lib/libgomp.a +OLD_FILES+=usr/lib/libgomp.so +OLD_LIBS+=usr/lib/libgomp.so.1 +OLD_FILES+=usr/lib/libgomp_p.a OLD_FILES+=usr/libexec/cc1 OLD_FILES+=usr/libexec/cc1plus OLD_FILES+=usr/share/info/cpp.info.gz diff --git a/tools/build/stdlib.h b/tools/build/stdlib.h new file mode 100644 index 000000000000..5f9b90bc3d50 --- /dev/null +++ b/tools/build/stdlib.h @@ -0,0 +1,42 @@ +/*- + * Copyright (c) 2015 Dimitry Andric + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _LEGACY_STDLIB_H_ +#define _LEGACY_STDLIB_H_ + +#include_next + +__BEGIN_DECLS + +#if __BSD_VISIBLE +void *reallocarray(void *, size_t, size_t); +#endif /* __BSD_VISIBLE */ + +__END_DECLS + +#endif /* !_LEGACY_STDLIB_H_ */ diff --git a/tools/regression/file/closefrom/Makefile b/tools/regression/file/closefrom/Makefile deleted file mode 100644 index 4b8829c78484..000000000000 --- a/tools/regression/file/closefrom/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# $FreeBSD$ - -PROG= closefrom -MAN= -WARNS?= 6 -DPADD= ${LIBUTIL} -LDADD= -lutil - -.include diff --git a/tools/regression/file/closefrom/closefrom.c b/tools/regression/file/closefrom/closefrom.c deleted file mode 100644 index b27ec5107c50..000000000000 --- a/tools/regression/file/closefrom/closefrom.c +++ /dev/null @@ -1,274 +0,0 @@ -/*- - * Copyright (c) 2009 Hudson River Trading LLC - * Written by: John H. Baldwin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -__FBSDID("$FreeBSD$"); - -/* - * Regression tests for the closefrom(2) system call. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -struct shared_info { - int failed; - char tag[64]; - char message[0]; -}; - -static int test = 1; - -static void -ok(const char *descr) -{ - - printf("ok %d - %s\n", test, descr); - test++; -} - -static void -fail(const char *descr, const char *fmt, ...) -{ - va_list ap; - - printf("not ok %d - %s", test, descr); - test++; - if (fmt) { - va_start(ap, fmt); - printf(" # "); - vprintf(fmt, ap); - va_end(ap); - } - printf("\n"); - exit(1); -} - -#define fail_err(descr) fail((descr), "%s", strerror(errno)) - -static void -cok(struct shared_info *info, const char *descr) -{ - - info->failed = 0; - strlcpy(info->tag, descr, sizeof(info->tag)); - exit(0); -} - -static void -cfail(struct shared_info *info, const char *descr, const char *fmt, ...) -{ - va_list ap; - - info->failed = 1; - strlcpy(info->tag, descr, sizeof(info->tag)); - if (fmt) { - va_start(ap, fmt); - vsprintf(info->message, fmt, ap); - va_end(ap); - } - exit(0); -} - -#define cfail_err(info, descr) cfail((info), (descr), "%s", strerror(errno)) - -/* - * Use kinfo_getfile() to fetch the list of file descriptors and figure out - * the highest open file descriptor. - */ -static int -highest_fd(void) -{ - struct kinfo_file *kif; - int cnt, i, highest; - - kif = kinfo_getfile(getpid(), &cnt); - if (kif == NULL) - fail_err("kinfo_getfile"); - highest = INT_MIN; - for (i = 0; i < cnt; i++) - if (kif[i].kf_fd > highest) - highest = kif[i].kf_fd; - free(kif); - return (highest); -} - -static int -devnull(void) -{ - int fd; - - fd = open("/dev/null", O_RDONLY); - if (fd < 0) - fail_err("open(\"/dev/null\")"); - return (fd); -} - -int -main(int __unused argc, char __unused *argv[]) -{ - struct shared_info *info; - pid_t pid; - int fd, i; - - printf("1..15\n"); - - /* We better start up with fd's 0, 1, and 2 open. */ - fd = devnull(); - if (fd != 3) - fail("open", "bad descriptor %d", fd); - ok("open"); - - /* Make sure highest_fd() works. */ - fd = highest_fd(); - if (fd != 3) - fail("highest_fd", "bad descriptor %d", fd); - ok("highest_fd"); - - /* Try to use closefrom() for just closing fd 3. */ - closefrom(3); - fd = highest_fd(); - if (fd != 2) - fail("closefrom", "highest fd %d", fd); - ok("closefrom"); - - /* Eat up 16 descriptors. */ - for (i = 0; i < 16; i++) - (void)devnull(); - fd = highest_fd(); - if (fd != 18) - fail("open 16", "highest fd %d", fd); - ok("open 16"); - - /* Close half of them. */ - closefrom(11); - fd = highest_fd(); - if (fd != 10) - fail("closefrom", "highest fd %d", fd); - ok("closefrom"); - - /* Explicitly close descriptors 6 and 8 to create holes. */ - if (close(6) < 0 || close(8) < 0) - fail_err("close2 "); - ok("close 2"); - - /* Verify that close on 6 and 8 fails with EBADF. */ - if (close(6) == 0) - fail("close(6)", "did not fail"); - if (errno != EBADF) - fail_err("close(6)"); - ok("close(6)"); - if (close(8) == 0) - fail("close(8)", "did not fail"); - if (errno != EBADF) - fail_err("close(8)"); - ok("close(8)"); - - /* Close from 4 on. */ - closefrom(4); - fd = highest_fd(); - if (fd != 3) - fail("closefrom", "highest fd %d", fd); - ok("closefrom"); - - /* Allocate a small SHM region for IPC with our child. */ - info = mmap(NULL, getpagesize(), PROT_READ | PROT_WRITE, MAP_ANON | - MAP_SHARED, -1, 0); - if (info == MAP_FAILED) - fail_err("mmap"); - ok("mmap"); - - /* Fork a child process to test closefrom(0). */ - pid = fork(); - if (pid < 0) - fail_err("fork"); - if (pid == 0) { - /* Child. */ - closefrom(0); - fd = highest_fd(); - if (fd >= 0) - cfail(info, "closefrom(0)", "highest fd %d", fd); - cok(info, "closefrom(0)"); - } - if (wait(NULL) < 0) - fail_err("wait"); - if (info->failed) - fail(info->tag, "%s", info->message); - ok(info->tag); - - /* Fork a child process to test closefrom(-1). */ - pid = fork(); - if (pid < 0) - fail_err("fork"); - if (pid == 0) { - /* Child. */ - closefrom(-1); - fd = highest_fd(); - if (fd >= 0) - cfail(info, "closefrom(-1)", "highest fd %d", fd); - cok(info, "closefrom(-1)"); - } - if (wait(NULL) < 0) - fail_err("wait"); - if (info->failed) - fail(info->tag, "%s", info->message); - ok(info->tag); - - /* Dup stdout to 6. */ - if (dup2(1, 6) < 0) - fail_err("dup2"); - fd = highest_fd(); - if (fd != 6) - fail("dup2", "highest fd %d", fd); - ok("dup2"); - - /* Do a closefrom() starting in a hole. */ - closefrom(4); - fd = highest_fd(); - if (fd != 3) - fail("closefrom", "highest fd %d", fd); - ok("closefrom"); - - /* Do a closefrom() beyond our highest open fd. */ - closefrom(32); - fd = highest_fd(); - if (fd != 3) - fail("closefrom", "highest fd %d", fd); - ok("closefrom"); - - return (0); -} diff --git a/tools/regression/file/closefrom/closefrom.t b/tools/regression/file/closefrom/closefrom.t deleted file mode 100644 index 8bdfd03be81b..000000000000 --- a/tools/regression/file/closefrom/closefrom.t +++ /dev/null @@ -1,10 +0,0 @@ -#!/bin/sh -# $FreeBSD$ - -cd `dirname $0` - -executable=`basename $0 .t` - -make $executable 2>&1 > /dev/null - -exec ./$executable diff --git a/tools/regression/p1003_1b/main.c b/tools/regression/p1003_1b/main.c index 0e87c6ca68bf..23c3b02476de 100644 --- a/tools/regression/p1003_1b/main.c +++ b/tools/regression/p1003_1b/main.c @@ -1,5 +1,6 @@ /* $FreeBSD$ */ #include +#include int fifo(int argc, char *argv[]); int memlock(int argc, char *argv[]); diff --git a/tools/regression/p1003_1b/prutil.c b/tools/regression/p1003_1b/prutil.c index e0e3d6f8fa68..2910b7fdd2c3 100644 --- a/tools/regression/p1003_1b/prutil.c +++ b/tools/regression/p1003_1b/prutil.c @@ -1,10 +1,11 @@ +#include #include -#include #include #include - -#include +#include #include +#include + #include "prutil.h" /* @@ -12,7 +13,7 @@ */ void quit(const char *text) { - err(errno, text); + err(errno, "%s", text); } char *sched_text(int scheduler) diff --git a/tools/tools/ath/athaggrstats/Makefile b/tools/tools/ath/athaggrstats/Makefile index b6234b5fab79..2748b6f3ac12 100644 --- a/tools/tools/ath/athaggrstats/Makefile +++ b/tools/tools/ath/athaggrstats/Makefile @@ -12,6 +12,7 @@ CLEANFILES+= opt_ah.h CFLAGS+=-DATH_SUPPORT_ANI CFLAGS+=-DATH_SUPPORT_TDMA +CFLAGS+=-I${.CURDIR}/../../../../lib/libbsdstat/ LIBADD+= bsdstat opt_ah.h: diff --git a/tools/tools/ath/athstats/Makefile b/tools/tools/ath/athstats/Makefile index a7ff43b4c9c2..93f98ae3f24c 100644 --- a/tools/tools/ath/athstats/Makefile +++ b/tools/tools/ath/athstats/Makefile @@ -8,10 +8,6 @@ MAN= PROG= athstats -# Because of a clang preprocessor parser limitation causing this -# to not compile, use gcc for now. -#CC= gcc - SRCS= main.c athstats.c opt_ah.h ah_osdep.h CLEANFILES+= opt_ah.h @@ -21,6 +17,8 @@ CLEANFILES+= opt_ah.h CFLAGS+=-DATH_SUPPORT_ANI CFLAGS+=-DATH_SUPPORT_TDMA +CFLAGS+=-I${.CURDIR}/../../../../lib/libbsdstat/ + CFLAGS.clang+= -fbracket-depth=512 LIBADD= bsdstat diff --git a/tools/tools/mwl/mwlstats/Makefile b/tools/tools/mwl/mwlstats/Makefile index 16decd1a4cd0..69382b8f820a 100644 --- a/tools/tools/mwl/mwlstats/Makefile +++ b/tools/tools/mwl/mwlstats/Makefile @@ -6,6 +6,7 @@ MAN= SRCS= main.c mwlstats.c LIBADD= bsdstat +CFLAGS+=-I${.CURDIR}/../../../../lib/libbsdstat/ .include diff --git a/tools/tools/net80211/wlanstats/Makefile b/tools/tools/net80211/wlanstats/Makefile index dbd53a67e637..2d23932a62a5 100644 --- a/tools/tools/net80211/wlanstats/Makefile +++ b/tools/tools/net80211/wlanstats/Makefile @@ -6,6 +6,7 @@ PROG= wlanstats BINDIR= /usr/local/bin MAN= LIBADD= bsdstat +CFLAGS+=-I${.CURDIR}/../../../../lib/libbsdstat/ SRCS= wlanstats.c main.c diff --git a/tools/tools/npe/npestats/Makefile b/tools/tools/npe/npestats/Makefile index 20f381944776..740d3594cdcf 100644 --- a/tools/tools/npe/npestats/Makefile +++ b/tools/tools/npe/npestats/Makefile @@ -5,5 +5,6 @@ SRCS= main.c npestats.c BINDIR= /usr/local/bin MAN= LIBADD= bsdstat +CFLAGS+=-I${.CURDIR}/../../../../lib/libbsdstat/ .include diff --git a/usr.bin/Makefile b/usr.bin/Makefile index a0c83bb044b5..af9b471d2348 100644 --- a/usr.bin/Makefile +++ b/usr.bin/Makefile @@ -37,7 +37,6 @@ SUBDIR= ${_addr2line} \ ctlstat \ cut \ ${_cxxfilt} \ - demandoc \ dirname \ dpv \ du \ diff --git a/usr.bin/bmake/Makefile b/usr.bin/bmake/Makefile index 93a1d7d96a4f..4abb45feb211 100644 --- a/usr.bin/bmake/Makefile +++ b/usr.bin/bmake/Makefile @@ -14,10 +14,10 @@ CFLAGS+= -I${.CURDIR} CLEANDIRS+= FreeBSD CLEANFILES+= bootstrap -# $Id: Makefile,v 1.36 2015/04/18 19:58:53 sjg Exp $ +# $Id: Makefile,v 1.38 2015/05/05 21:58:05 sjg Exp $ # Base version on src date -MAKE_VERSION= 20150418 +MAKE_VERSION= 20150505 PROG?= ${.CURDIR:T} diff --git a/usr.bin/bmake/unit-tests/Makefile b/usr.bin/bmake/unit-tests/Makefile index ee35dda84902..100b46755918 100644 --- a/usr.bin/bmake/unit-tests/Makefile +++ b/usr.bin/bmake/unit-tests/Makefile @@ -5,9 +5,9 @@ SRCTOP?= ${.CURDIR:H:H:H} -# $Id: Makefile.in,v 1.46 2014/11/06 01:47:57 sjg Exp $ +# $Id: Makefile.in,v 1.47 2015/05/05 21:58:06 sjg Exp $ # -# $NetBSD: Makefile,v 1.51 2014/10/20 23:21:11 sjg Exp $ +# $NetBSD: Makefile,v 1.52 2015/05/05 21:51:09 sjg Exp $ # # Unit tests for make(1) # The main targets are: @@ -34,6 +34,7 @@ UNIT_TESTS:= ${srcdir} TESTNAMES= \ comment \ cond1 \ + cond2 \ error \ export \ export-all \ diff --git a/usr.bin/col/col.1 b/usr.bin/col/col.1 index 9419fe326cb3..fc02ca4b54f7 100644 --- a/usr.bin/col/col.1 +++ b/usr.bin/col/col.1 @@ -31,7 +31,7 @@ .\" @(#)col.1 8.1 (Berkeley) 6/29/93 .\" $FreeBSD$ .\" -.Dd August 4, 2004 +.Dd May 10, 2015 .Dt COL 1 .Os .Sh NAME @@ -82,18 +82,33 @@ recognized and interpreted by itself, which are listed below. Output multiple spaces instead of tabs. .El .Pp -The control sequences for carriage motion that +In the input stream, .Nm -understands and their decimal values are listed in the following -table: +understands both the escape sequences of the form escape-digit +mandated by +.St -susv2 +and the traditional +.Bx +format escape-control-character. +The control sequences for carriage motion and their ASCII values +are as follows: .Pp .Bl -tag -width "carriage return" -compact +.It ESC\-BELL +reverse line feed (escape then bell). .It ESC\-7 -reverse line feed (escape then 7) +reverse line feed (escape then 7). +.It ESC\-BACKSPACE +half reverse line feed (escape then backspace). .It ESC\-8 -half reverse line feed (escape then 8) +half reverse line feed (escape then 8). +.It ESC\-TAB +half forward line feed (escape than tab). .It ESC\-9 -half forward line feed (escape then 9) +half forward line feed (escape then 9). +In +.Fl f +mode, this sequence may also occur in the output stream. .It backspace moves back one column (8); ignored in the first column .It carriage return diff --git a/usr.bin/col/col.c b/usr.bin/col/col.c index 74c59b6a4b89..13df126e00ba 100644 --- a/usr.bin/col/col.c +++ b/usr.bin/col/col.c @@ -96,6 +96,7 @@ struct line_str { int l_max_col; /* max column in the line */ }; +static void addto_lineno(int *, int); static LINE *alloc_line(void); static void dowarn(int); static void flush_line(LINE *); @@ -108,7 +109,7 @@ static CSET last_set; /* char_set of last char printed */ static LINE *lines; static int compress_spaces; /* if doing space -> tab conversion */ static int fine; /* if `fine' resolution (half lines) */ -static int max_bufd_lines; /* max # lines to keep in memory */ +static int max_bufd_lines; /* max # of half lines to keep in memory */ static int nblank_lines; /* # blanks after last flushed line */ static int no_backspaces; /* if not to output any backspaces */ static int pass_unknown_seqs; /* pass unknown control sequences */ @@ -133,6 +134,7 @@ main(int argc, char **argv) int this_line; /* line l points to */ int nflushd_lines; /* number of lines that were flushed */ int adjust, opt, warned, width; + const char *errstr; cap_rights_t rights; unsigned long cmd; @@ -151,7 +153,7 @@ main(int argc, char **argv) if (cap_enter() < 0 && errno != ENOSYS) err(1, "unable to enter capability mode"); - max_bufd_lines = 128; + max_bufd_lines = 256; compress_spaces = 1; /* compress spaces into tabs */ while ((opt = getopt(argc, argv, "bfhl:px")) != -1) switch (opt) { @@ -165,8 +167,11 @@ main(int argc, char **argv) compress_spaces = 1; break; case 'l': /* buffered line count */ - if ((max_bufd_lines = atoi(optarg)) <= 0) - errx(1, "bad -l argument %s", optarg); + max_bufd_lines = strtonum(optarg, 1, + (INT_MAX - BUFFER_MARGIN) / 2, &errstr) * 2; + if (errstr != NULL) + errx(1, "bad -l argument, %s: %s", errstr, + optarg); break; case 'p': /* pass unknown control sequences */ pass_unknown_seqs = 1; @@ -182,9 +187,6 @@ main(int argc, char **argv) if (optind != argc) usage(); - /* this value is in half lines */ - max_bufd_lines *= 2; - adjust = cur_col = extra_lines = warned = 0; cur_line = max_line = nflushd_lines = this_line = 0; cur_set = last_set = CS_NORMAL; @@ -203,20 +205,31 @@ main(int argc, char **argv) continue; case ESC: /* just ignore EOF */ switch(getwchar()) { + /* + * In the input stream, accept both the + * XPG5 sequences ESC-digit and the + * traditional BSD sequences ESC-ctrl. + */ + case '\007': + /* FALLTHROUGH */ case RLF: - cur_line -= 2; + addto_lineno(&cur_line, -2); break; + case '\010': + /* FALLTHROUGH */ case RHLF: - cur_line--; + addto_lineno(&cur_line, -1); break; + case '\011': + /* FALLTHROUGH */ case FHLF: - cur_line++; + addto_lineno(&cur_line, 1); if (cur_line > max_line) max_line = cur_line; } continue; case NL: - cur_line += 2; + addto_lineno(&cur_line, 2); if (cur_line > max_line) max_line = cur_line; cur_col = 0; @@ -235,7 +248,7 @@ main(int argc, char **argv) ++cur_col; continue; case VT: - cur_line -= 2; + addto_lineno(&cur_line, -2); continue; } if (iswspace(ch)) { @@ -248,58 +261,61 @@ main(int argc, char **argv) } /* Must stuff ch in a line - are we at the right one? */ - if (cur_line != this_line - adjust) { + if (cur_line + adjust != this_line) { LINE *lnew; - int nmove; - adjust = 0; - nmove = cur_line - this_line; - if (!fine) { - /* round up to next line */ - if (cur_line & 1) { - adjust = 1; - nmove++; - } - } - if (nmove < 0) { - for (; nmove < 0 && l->l_prev; nmove++) + /* round up to next line */ + adjust = !fine && (cur_line & 1); + + if (cur_line + adjust < this_line) { + while (cur_line + adjust < this_line && + l->l_prev != NULL) { l = l->l_prev; - if (nmove) { + this_line--; + } + if (cur_line + adjust < this_line) { if (nflushd_lines == 0) { /* * Allow backup past first * line if nothing has been * flushed yet. */ - for (; nmove < 0; nmove++) { + while (cur_line + adjust + < this_line) { lnew = alloc_line(); l->l_prev = lnew; lnew->l_next = l; l = lines = lnew; extra_lines++; + this_line--; } } else { if (!warned++) dowarn(cur_line); - cur_line -= nmove; + cur_line = this_line - adjust; } } } else { /* may need to allocate here */ - for (; nmove > 0 && l->l_next; nmove--) + while (cur_line + adjust > this_line) { + if (l->l_next == NULL) { + l->l_next = alloc_line(); + l->l_next->l_prev = l; + } l = l->l_next; - for (; nmove > 0; nmove--) { - lnew = alloc_line(); - lnew->l_prev = l; - l->l_next = lnew; - l = lnew; + this_line++; } } - this_line = cur_line + adjust; - nmove = this_line - nflushd_lines; - if (nmove >= max_bufd_lines + BUFFER_MARGIN) { - nflushd_lines += nmove - max_bufd_lines; - flush_lines(nmove - max_bufd_lines); + if (this_line > nflushd_lines && + this_line - nflushd_lines >= + max_bufd_lines + BUFFER_MARGIN) { + if (extra_lines) { + flush_lines(extra_lines); + extra_lines = 0; + } + flush_lines(this_line - nflushd_lines - + max_bufd_lines); + nflushd_lines = this_line - max_bufd_lines; } } /* grow line's buffer? */ @@ -330,25 +346,23 @@ main(int argc, char **argv) } if (ferror(stdin)) err(1, NULL); - if (max_line == 0) - exit(0); /* no lines, so just exit */ + if (extra_lines) + flush_lines(extra_lines); /* goto the last line that had a character on it */ for (; l->l_next; l = l->l_next) this_line++; - flush_lines(this_line - nflushd_lines + extra_lines + 1); + flush_lines(this_line - nflushd_lines + 1); /* make sure we leave things in a sane state */ if (last_set != CS_NORMAL) PUTC(SI); /* flush out the last few blank lines */ - nblank_lines = max_line - this_line; + if (max_line > this_line) + nblank_lines = max_line - this_line; if (max_line & 1) nblank_lines++; - else if (!nblank_lines) - /* missing a \n on the last line? */ - nblank_lines = 2; flush_blanks(); exit(0); } @@ -365,7 +379,8 @@ flush_lines(int nflush) flush_blanks(); flush_line(l); } - nblank_lines++; + if (l->l_line || l->l_next) + nblank_lines++; if (l->l_line) (void)free(l->l_line); free_line(l); @@ -517,6 +532,23 @@ flush_line(LINE *l) } } +/* + * Increment or decrement a line number, checking for overflow. + * Stop one below INT_MAX such that the adjust variable is safe. + */ +void +addto_lineno(int *lno, int offset) +{ + if (offset > 0) { + if (*lno >= INT_MAX - offset) + errx(1, "too many lines"); + } else { + if (*lno < INT_MIN - offset) + errx(1, "too many reverse line feeds"); + } + *lno += offset; +} + #define NALLOC 64 static LINE *line_freelist; diff --git a/usr.bin/ctlstat/ctlstat.8 b/usr.bin/ctlstat/ctlstat.8 index 8351d9a372b7..500ffb036e9f 100644 --- a/usr.bin/ctlstat/ctlstat.8 +++ b/usr.bin/ctlstat/ctlstat.8 @@ -34,7 +34,7 @@ .\" $Id: //depot/users/kenm/FreeBSD-test2/usr.bin/ctlstat/ctlstat.8#2 $ .\" $FreeBSD$ .\" -.Dd March 8, 2015 +.Dd May 22, 2015 .Dt CTLSTAT 8 .Os .Sh NAME @@ -117,6 +117,7 @@ every 10 seconds. .Xr xpt 4 , .Xr camcontrol 8 , .Xr ctladm 8 , +.Xr ctld 8 , .Xr iostat 8 .Sh AUTHORS .An Ken Merry Aq Mt ken@FreeBSD.org diff --git a/usr.bin/demandoc/Makefile b/usr.bin/demandoc/Makefile deleted file mode 100644 index 03a297bca208..000000000000 --- a/usr.bin/demandoc/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -# $FreeBSD$ - -.PATH: ${.CURDIR}/../../contrib/mdocml - -PROG= demandoc - -WARNS?= 5 - -LIBADD= mandoc - -.include diff --git a/usr.bin/elfdump/elfdump.c b/usr.bin/elfdump/elfdump.c index d58587edfca9..cd10ce3141d3 100644 --- a/usr.bin/elfdump/elfdump.c +++ b/usr.bin/elfdump/elfdump.c @@ -261,6 +261,7 @@ e_machines(u_int mach) case EM_386: return "EM_386"; case EM_68K: return "EM_68K"; case EM_88K: return "EM_88K"; + case EM_IAMCU: return "EM_IAMCU"; case EM_860: return "EM_860"; case EM_MIPS: return "EM_MIPS"; case EM_PPC: return "EM_PPC"; diff --git a/usr.bin/kdump/Makefile b/usr.bin/kdump/Makefile index c2950381756e..78a176302530 100644 --- a/usr.bin/kdump/Makefile +++ b/usr.bin/kdump/Makefile @@ -3,10 +3,6 @@ .include -.if (${MACHINE_ARCH} == "amd64") -SFX= 32 -.endif - .PATH: ${.CURDIR}/../ktrace PROG= kdump @@ -30,6 +26,9 @@ CLEANFILES= ioctl.c kdump_subr.c kdump_subr.h .if (${MACHINE_ARCH} == "amd64" || ${MACHINE_ARCH} == "i386") CLEANFILES+= linux_syscalls.c .endif +.if (${MACHINE_ARCH} == "amd64") +CLEANFILES+= linux32_syscalls.c +.endif ioctl.c: mkioctls env MACHINE=${MACHINE} CPP="${CPP}" \ @@ -43,7 +42,11 @@ kdump_subr.c: mksubr kdump_subr.h sh ${.CURDIR}/mksubr ${DESTDIR}/usr/include >${.TARGET} .if (${MACHINE_ARCH} == "amd64" || ${MACHINE_ARCH} == "i386") sh ${.CURDIR}/../../sys/kern/makesyscalls.sh \ - ${.CURDIR}/../../sys/${MACHINE_ARCH}/linux${SFX}/syscalls.master ${.CURDIR}/linux_syscalls.conf + ${.CURDIR}/../../sys/${MACHINE_ARCH}/linux/syscalls.master ${.CURDIR}/linux_syscalls.conf +.endif +.if (${MACHINE_ARCH} == "amd64") + sh ${.CURDIR}/../../sys/kern/makesyscalls.sh \ + ${.CURDIR}/../../sys/${MACHINE_ARCH}/linux32/syscalls.master ${.CURDIR}/linux32_syscalls.conf .endif .include diff --git a/usr.bin/kdump/kdump.c b/usr.bin/kdump/kdump.c index a46fe65421b5..2f6c1e7cb6ce 100644 --- a/usr.bin/kdump/kdump.c +++ b/usr.bin/kdump/kdump.c @@ -146,13 +146,11 @@ static struct ktr_header ktr_header; #if defined(__amd64__) || defined(__i386__) -void linux_ktrsyscall(struct ktr_syscall *); -void linux_ktrsysret(struct ktr_sysret *); +void linux_ktrsyscall(struct ktr_syscall *, u_int); +void linux_ktrsysret(struct ktr_sysret *, u_int); extern const char *linux_syscallnames[]; #include -static int nlinux_syscalls = sizeof(linux_syscallnames) / \ - sizeof(linux_syscallnames[0]); /* * from linux.h @@ -172,6 +170,12 @@ static int bsd_to_linux_errno[ELAST + 1] = { }; #endif +#if defined(__amd64__) +extern const char *linux32_syscallnames[]; + +#include +#endif + struct proc_info { TAILQ_ENTRY(proc_info) info; @@ -400,7 +404,8 @@ main(int argc, char *argv[]) case KTR_SYSCALL: #if defined(__amd64__) || defined(__i386__) if ((sv_flags & SV_ABI_MASK) == SV_ABI_LINUX) - linux_ktrsyscall((struct ktr_syscall *)m); + linux_ktrsyscall((struct ktr_syscall *)m, + sv_flags); else #endif ktrsyscall((struct ktr_syscall *)m, sv_flags); @@ -408,7 +413,8 @@ main(int argc, char *argv[]) case KTR_SYSRET: #if defined(__amd64__) || defined(__i386__) if ((sv_flags & SV_ABI_MASK) == SV_ABI_LINUX) - linux_ktrsysret((struct ktr_sysret *)m); + linux_ktrsysret((struct ktr_sysret *)m, + sv_flags); else #endif ktrsysret((struct ktr_sysret *)m, sv_flags); @@ -1970,16 +1976,28 @@ ktrfaultend(struct ktr_faultend *ktr) } #if defined(__amd64__) || defined(__i386__) + +#if defined(__amd64__) +#define NLINUX_SYSCALLS(v) ((v) & SV_ILP32 ? \ + nitems(linux32_syscallnames) : nitems(linux_syscallnames)) +#define LINUX_SYSCALLNAMES(v, i) ((v) & SV_ILP32 ? \ + linux32_syscallnames[i] : linux_syscallnames[i]) +#else +#define NLINUX_SYSCALLS(v) (nitems(linux_syscallnames)) +#define LINUX_SYSCALLNAMES(v, i) (linux_syscallnames[i]) +#endif + void -linux_ktrsyscall(struct ktr_syscall *ktr) +linux_ktrsyscall(struct ktr_syscall *ktr, u_int sv_flags) { int narg = ktr->ktr_narg; + unsigned code = ktr->ktr_code; register_t *ip; - if (ktr->ktr_code >= nlinux_syscalls || ktr->ktr_code < 0) + if (ktr->ktr_code < 0 || code >= NLINUX_SYSCALLS(sv_flags)) printf("[%d]", ktr->ktr_code); else { - printf("%s", linux_syscallnames[ktr->ktr_code]); + printf("%s", LINUX_SYSCALLNAMES(sv_flags, ktr->ktr_code)); if (syscallno) printf("[%d]", ktr->ktr_code); } @@ -1994,16 +2012,16 @@ linux_ktrsyscall(struct ktr_syscall *ktr) } void -linux_ktrsysret(struct ktr_sysret *ktr) +linux_ktrsysret(struct ktr_sysret *ktr, u_int sv_flags) { register_t ret = ktr->ktr_retval; + unsigned code = ktr->ktr_code; int error = ktr->ktr_error; - int code = ktr->ktr_code; - if (code >= nlinux_syscalls || code < 0) - printf("[%d] ", code); + if (ktr->ktr_code < 0 || code >= NLINUX_SYSCALLS(sv_flags)) + printf("[%d] ", ktr->ktr_code); else { - printf("%s", linux_syscallnames[code]); + printf("%s ", LINUX_SYSCALLNAMES(sv_flags, code)); if (syscallno) printf("[%d]", code); printf(" "); diff --git a/usr.bin/kdump/linux32_syscalls.conf b/usr.bin/kdump/linux32_syscalls.conf new file mode 100644 index 000000000000..66a67fd8e2f0 --- /dev/null +++ b/usr.bin/kdump/linux32_syscalls.conf @@ -0,0 +1,11 @@ +# $FreeBSD$ +sysnames="linux32_syscalls.c" +sysproto="/dev/null" +sysproto_h=_LINUX32_SYSPROTO_H_ +syshdr="/dev/null" +syssw="/dev/null" +sysmk="/dev/null" +syscallprefix="LINUX32_SYS_" +switchname="/dev/null" +namesname="linux32_syscallnames" +systrace="/dev/null" diff --git a/usr.bin/m4/extern.h b/usr.bin/m4/extern.h index fd2d3ae57099..d10f9aea4f35 100644 --- a/usr.bin/m4/extern.h +++ b/usr.bin/m4/extern.h @@ -43,7 +43,6 @@ extern unsigned long expansion_id; /* expr.c */ extern int expr(const char *); -extern int32_t end_result; /* gnum4.c */ extern void addtoincludepath(const char *); diff --git a/usr.bin/m4/gnum4.c b/usr.bin/m4/gnum4.c index cac01ece6818..dcccf3ba135f 100644 --- a/usr.bin/m4/gnum4.c +++ b/usr.bin/m4/gnum4.c @@ -1,4 +1,4 @@ -/* $OpenBSD: gnum4.c,v 1.46 2014/07/10 14:12:31 espie Exp $ */ +/* $OpenBSD: gnum4.c,v 1.50 2015/04/29 00:13:26 millert Exp $ */ /* * Copyright (c) 1999 Marc Espie @@ -31,7 +31,6 @@ __FBSDID("$FreeBSD$"); * functions needed to support gnu-m4 extensions, including a fake freezing */ -#include #include #include #include @@ -40,10 +39,12 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include #include #include #include +#include #include "mdef.h" #include "stdd.h" #include "extern.h" @@ -76,9 +77,7 @@ new_path_entry(const char *dirname) n = malloc(sizeof(struct path_entry)); if (!n) errx(1, "out of memory"); - n->name = strdup(dirname); - if (!n->name) - errx(1, "out of memory"); + n->name = xstrdup(dirname); n->next = 0; return n; } @@ -113,9 +112,7 @@ ensure_m4path(void) if (!envpath) return; /* for portability: getenv result is read-only */ - envpath = strdup(envpath); - if (!envpath) - errx(1, "out of memory"); + envpath = xstrdup(envpath); for (sweep = envpath; (path = strsep(&sweep, ":")) != NULL;) addtoincludepath(path); @@ -126,7 +123,7 @@ static struct input_file * dopath(struct input_file *i, const char *filename) { - char path[MAXPATHLEN]; + char path[PATH_MAX]; struct path_entry *pe; FILE *f; @@ -214,8 +211,11 @@ addchars(const char *c, size_t n) while (current + n > bufsize) { if (bufsize == 0) bufsize = 1024; - else + else if (bufsize <= SIZE_MAX/2) { bufsize *= 2; + } else { + errx(1, "size overflow"); + } buffer = xrealloc(buffer, bufsize, NULL); } memcpy(buffer+current, c, n); diff --git a/usr.bin/m4/look.c b/usr.bin/m4/look.c index 70497e01e593..383fbc6f7fd2 100644 --- a/usr.bin/m4/look.c +++ b/usr.bin/m4/look.c @@ -1,4 +1,4 @@ -/* $OpenBSD: look.c,v 1.23 2014/05/12 19:11:19 espie Exp $ */ +/* $OpenBSD: look.c,v 1.24 2014/12/21 09:33:12 espie Exp $ */ /* * Copyright (c) 1989, 1993 @@ -56,6 +56,9 @@ static void hash_free(void *, void *); static void *element_alloc(size_t, void *); static void setup_definition(struct macro_definition *, const char *, const char *); +static void free_definition(char *); +static void keep(char *); +static int string_in_use(const char *); static struct ohash_info macro_info = { offsetof(struct ndblock, name), @@ -155,7 +158,7 @@ macro_define(const char *name, const char *defn) ndptr n = create_entry(name); if (n->d != NULL) { if (n->d->defn != null) - free(n->d->defn); + free_definition(n->d->defn); } else { n->d = xalloc(sizeof(struct macro_definition), NULL); n->d->next = NULL; @@ -273,3 +276,64 @@ macro_getbuiltin(const char *name) else return p; } + +/* XXX things are slightly more complicated than they seem. + * a macro may actually be "live" (in the middle of an expansion + * on the stack. + * So we actually may need to place it in an array for later... + */ + +static int kept_capacity = 0; +static int kept_size = 0; +static char **kept = NULL; + +static void +keep(char *ptr) +{ + if (kept_capacity <= kept_size) { + if (kept_capacity) + kept_capacity *= 2; + else + kept_capacity = 50; + kept = xreallocarray(kept, kept_capacity, + sizeof(char *), "Out of memory while saving %d strings\n", + kept_capacity); + } + kept[kept_size++] = ptr; +} + +static int +string_in_use(const char *ptr) +{ + int i; + for (i = 0; i <= sp; i++) { + if (sstack[i] == STORAGE_MACRO && mstack[i].sstr == ptr) + return 1; + } + return 0; +} + + +static void +free_definition(char *ptr) +{ + int i; + + /* first try to free old strings */ + for (i = 0; i < kept_size; i++) { + if (!string_in_use(kept[i])) { + kept_size--; + free(kept[i]); + if (i != kept_size) + kept[i] = kept[kept_size]; + i--; + } + } + + /* then deal with us */ + if (string_in_use(ptr)) + keep(ptr); + else + free(ptr); +} + diff --git a/usr.bin/m4/m4.1 b/usr.bin/m4/m4.1 index 0e1d83a85319..b7dc13153e5c 100644 --- a/usr.bin/m4/m4.1 +++ b/usr.bin/m4/m4.1 @@ -33,7 +33,7 @@ .\" .\" $FreeBSD$ .\" -.Dd January 12, 2014 +.Dd $Mdocdate: April 14 2014 $ .Dt M4 1 .Os .Sh NAME @@ -98,7 +98,9 @@ recognized as special when not followed by an open parenthesis. .Pp The options are as follows: .Bl -tag -width Ds -.It Fl D Ns Ar name Ns Op Pf = Ns Ar value +.It Fl D Ns Ar name Ns Oo +.Pf = Ns Ar value +.Oc Define the symbol .Ar name to have some value (or diff --git a/usr.bin/m4/main.c b/usr.bin/m4/main.c index ced881b2ca91..84ba03ac2782 100644 --- a/usr.bin/m4/main.c +++ b/usr.bin/m4/main.c @@ -1,4 +1,4 @@ -/* $OpenBSD: main.c,v 1.83 2014/05/12 19:11:19 espie Exp $ */ +/* $OpenBSD: main.c,v 1.84 2014/12/21 09:33:12 espie Exp $ */ /* $NetBSD: main.c,v 1.12 1997/02/08 23:54:49 cgd Exp $ */ /*- @@ -144,6 +144,9 @@ static struct keyblk keywrds[] = { /* m4 keywords to be installed */ #define MAXKEYS (sizeof(keywrds)/sizeof(struct keyblk)) +extern int optind; +extern char *optarg; + #define MAXRECORD 50 static struct position { char *name; @@ -396,7 +399,7 @@ macro(void) /* * now push the string arguments: */ - pushs1(macro_getdef(p)->defn); /* defn string */ + pushdef(p); /* defn string */ pushs1((char *)macro_name(p)); /* macro name */ pushs(ep); /* start next..*/ diff --git a/usr.bin/m4/mdef.h b/usr.bin/m4/mdef.h index 0db78ef7b575..49b3f500fbed 100644 --- a/usr.bin/m4/mdef.h +++ b/usr.bin/m4/mdef.h @@ -1,4 +1,4 @@ -/* $OpenBSD: mdef.h,v 1.31 2011/09/27 07:24:02 espie Exp $ */ +/* $OpenBSD: mdef.h,v 1.32 2014/12/21 09:33:12 espie Exp $ */ /* $NetBSD: mdef.h,v 1.7 1996/01/13 23:25:27 pk Exp $ */ /* @@ -164,6 +164,10 @@ struct input_file { int c; }; +#define STORAGE_STRSPACE 0 +#define STORAGE_MACRO 1 +#define STORAGE_OTHER 2 + #define CURRENT_NAME (infile[ilevel].name) #define CURRENT_LINE (infile[ilevel].lineno) /* @@ -179,7 +183,7 @@ struct input_file { if (++sp == (int)STACKMAX) \ enlarge_stack();\ mstack[sp].sfra = (x); \ - sstack[sp] = 0; \ + sstack[sp] = STORAGE_OTHER; \ } while (0) #define pushs(x) \ @@ -187,7 +191,7 @@ struct input_file { if (++sp == (int)STACKMAX) \ enlarge_stack();\ mstack[sp].sstr = (x); \ - sstack[sp] = 1; \ + sstack[sp] = STORAGE_STRSPACE; \ } while (0) #define pushs1(x) \ @@ -195,9 +199,18 @@ struct input_file { if (++sp == (int)STACKMAX) \ enlarge_stack();\ mstack[sp].sstr = (x); \ - sstack[sp] = 0; \ + sstack[sp] = STORAGE_OTHER; \ } while (0) +#define pushdef(p) \ + do { \ + if (++sp == (int)STACKMAX) \ + enlarge_stack();\ + mstack[sp].sstr = macro_getdef(p)->defn;\ + sstack[sp] = STORAGE_MACRO; \ + } while (0) + + /* * . . * | . | <-- sp | . | diff --git a/usr.bin/m4/misc.c b/usr.bin/m4/misc.c index 5223a353151f..eeca68e643c1 100644 --- a/usr.bin/m4/misc.c +++ b/usr.bin/m4/misc.c @@ -1,4 +1,4 @@ -/* $OpenBSD: misc.c,v 1.44 2014/05/12 19:11:19 espie Exp $ */ +/* $OpenBSD: misc.c,v 1.45 2014/12/21 09:33:12 espie Exp $ */ /* $NetBSD: misc.c,v 1.6 1995/09/28 05:37:41 tls Exp $ */ /* @@ -64,6 +64,7 @@ unsigned char *bbase[MAXINP]; /* the base for each ilevel */ unsigned char *bp; /* first available character */ unsigned char *endpbb; /* end of push-back buffer */ + /* * find the index of second str in the first str. */ @@ -186,7 +187,7 @@ enlarge_strspace(void) errx(1, "string space overflow"); memcpy(newstrspace, strspace, strsize/2); for (i = 0; i <= sp; i++) - if (sstack[i]) + if (sstack[i] == STORAGE_STRSPACE) mstack[i].sstr = (mstack[i].sstr - strspace) + newstrspace; ep = (ep-strspace) + newstrspace; @@ -264,7 +265,7 @@ killdiv(void) extern char *__progname; void -m4errx(int exitstatus, const char *fmt, ...) +m4errx(int eval, const char *fmt, ...) { fprintf(stderr, "%s: ", __progname); fprintf(stderr, "%s at line %lu: ", CURRENT_NAME, CURRENT_LINE); @@ -276,7 +277,7 @@ m4errx(int exitstatus, const char *fmt, ...) va_end(ap); } fprintf(stderr, "\n"); - exit(exitstatus); + exit(eval); } /* diff --git a/usr.bin/m4/parser.y b/usr.bin/m4/parser.y index 8e8ad8c5e264..3e4c80512a41 100644 --- a/usr.bin/m4/parser.y +++ b/usr.bin/m4/parser.y @@ -19,15 +19,9 @@ */ #include -#include -#include #include - -#include "mdef.h" -#include "extern.h" - #define YYSTYPE int32_t - +extern int32_t end_result; extern int yylex(void); extern int yyerror(const char *); %} diff --git a/usr.bin/man/man.sh b/usr.bin/man/man.sh index 8541784710dd..5e4d767a3064 100755 --- a/usr.bin/man/man.sh +++ b/usr.bin/man/man.sh @@ -311,8 +311,11 @@ man_display_page() { return fi + if [ -n "$use_width" ]; then + mandoc_args="-O width=${use_width}" + fi testline="mandoc -Tlint -Wunsupp 2>/dev/null" - pipeline="mandoc | $MANPAGER" + pipeline="mandoc $mandoc_args | $MANPAGER" if ! eval "$cattool $manpage | $testline" ;then if which -s groff; then diff --git a/usr.bin/mandoc/Makefile b/usr.bin/mandoc/Makefile index 5368689e5060..cdb512b71071 100644 --- a/usr.bin/mandoc/Makefile +++ b/usr.bin/mandoc/Makefile @@ -9,6 +9,37 @@ FILESDIR= ${SHAREDIR}/mdocml MAN= mandoc.1 eqn.7 mandoc_char.7 tbl.7 man.7 mdoc.7 # roff.7 MLINKS= mandoc.1 mdocml.1 +LIBMAN_SRCS= man.c \ + man_hash.c \ + man_macro.c \ + man_validate.c + +LIBMDOC_SRCS= att.c \ + lib.c \ + mdoc.c \ + mdoc_argv.c \ + mdoc_hash.c \ + mdoc_macro.c \ + mdoc_validate.c \ + st.c \ + +LIBROFF_SRCS= eqn.c \ + roff.c \ + tbl.c \ + tbl_data.c \ + tbl_layout.c \ + tbl_opts.c \ + +LIB_SRCS= ${LIBMAN_SRCS} \ + ${LIBMDOC_SRCS} \ + ${LIBROFF_SRCS} \ + chars.c \ + mandoc.c \ + mandoc_aux.c \ + msec.c \ + preconv.c \ + read.c + HTML_SRCS= eqn_html.c \ html.c \ man_html.c \ @@ -30,7 +61,8 @@ DB_SRCS= mandocdb.c \ mansearch_const.c \ manpath.c -SRCS= ${HTML_SRCS} \ +SRCS= ${LIB_SRCS} \ + ${HTML_SRCS} \ ${MAN_SRCS} \ ${TERM_SRCS} \ main.c \ @@ -43,6 +75,6 @@ WARNS?= 2 CFLAGS+= -DHAVE_CONFIG_H \ -I${.CURDIR}/../../lib/libohash/ \ -I${.CURDIR}/../../contrib/sqlite3 -LIBADD= mandoc ohash sqlite3 +LIBADD= ohash sqlite3 .include diff --git a/usr.bin/netstat/route.c b/usr.bin/netstat/route.c index 676f6164d82c..ab5a3ed1d7d9 100644 --- a/usr.bin/netstat/route.c +++ b/usr.bin/netstat/route.c @@ -236,7 +236,7 @@ pr_rthdr(int af1) xo_emit("{T:/%-8.8s} ","Address"); if (Wflag) { xo_emit("{T:/%-*.*s} {T:/%-*.*s} {T:/%-*.*s} {T:/%*.*s} " - "{T:/%*.*s} {T:/%*.*s} {T:/%*.*s} {T:/%*s}\n", + "{T:/%*.*s} {T:/%*.*s} {T:/%*s}\n", wid_dst, wid_dst, "Destination", wid_gw, wid_gw, "Gateway", wid_flags, wid_flags, "Flags", @@ -245,7 +245,7 @@ pr_rthdr(int af1) wid_if, wid_if, "Netif", wid_expire, "Expire"); } else { - xo_emit("{T:/%-*.*s} {T:/%-*.*s} {T:/%-*.*s} {T:/%*.*s} " + xo_emit("{T:/%-*.*s} {T:/%-*.*s} {T:/%-*.*s} {T:/%*.*s} " "{T:/%*s}\n", wid_dst, wid_dst, "Destination", wid_gw, wid_gw, "Gateway", @@ -389,7 +389,7 @@ p_rtentry_sysctl(const char *name, struct rt_msghdr *rtm) p_sockaddr("destination", &addr.u_sa, &mask.u_sa, rtm->rtm_flags, wid_dst); p_sockaddr("gateway", &gw.u_sa, NULL, RTF_HOST, wid_gw); - snprintf(buffer, sizeof(buffer), "{[:-%d}{:flags/%%s}{]:}", + snprintf(buffer, sizeof(buffer), "{[:-%d}{:flags/%%s}{]:} ", wid_flags); p_flags(rtm->rtm_flags, buffer); if (Wflag) { diff --git a/usr.bin/procstat/procstat.1 b/usr.bin/procstat/procstat.1 index 3ef39ebc0c2b..0fd314f5a701 100644 --- a/usr.bin/procstat/procstat.1 +++ b/usr.bin/procstat/procstat.1 @@ -25,7 +25,7 @@ .\" .\" $FreeBSD$ .\" -.Dd March 10, 2015 +.Dd May 18, 2015 .Dt PROCSTAT 1 .Os .Sh NAME @@ -530,6 +530,7 @@ auxiliary vector value .Xr sockstat 1 , .Xr cap_enter 2 , .Xr cap_rights_limit 2 , +.Xr libprocstat 3 , .Xr ddb 4 , .Xr stack 9 .Sh AUTHORS diff --git a/usr.bin/rctl/rctl.8 b/usr.bin/rctl/rctl.8 index 3f72b9122171..fe147562b7d0 100644 --- a/usr.bin/rctl/rctl.8 +++ b/usr.bin/rctl/rctl.8 @@ -233,6 +233,18 @@ for a list of supported signals Not all actions are supported for all resources. Attempting to add a rule with an action not supported by a given resource will result in error. +.Sh LOADER TUNABLES +Tunables can be set at the +.Xr loader 8 +prompt, or +.Xr loader.conf 5 . +.Bl -tag -width indent +.It Va kern.racct.enable: No 1 +Enable +.Nm . +This defaults to 1, unless +.Cd "options RACCT_DEFAULT_TO_DISABLED" +is set in the kernel configuration file. .Sh EXIT STATUS .Ex -std .Sh EXAMPLES diff --git a/usr.bin/soelim/soelim.1 b/usr.bin/soelim/soelim.1 index b6ec13c1dab8..57e86141c001 100644 --- a/usr.bin/soelim/soelim.1 +++ b/usr.bin/soelim/soelim.1 @@ -29,7 +29,7 @@ .Os .Sh NAME .Nm soelim -.Nd interpret .so directive in manpages +.Nd interpret .so requests in manpages .Sh SYNOPSIS .Nm .Op Fl Crtv @@ -78,5 +78,9 @@ The files are always searched first in the current directory. A file specified with an absolute path will be opened directly without performing a search. .Sh SEE ALSO -.Xr mandoc 1 , -.Xr soelim 1 +.Xr mandoc 1 +.Sh AUTHORS +This version of the +.Nm +utility was written by +.An Baptiste Daroussin Aq Mt bapt@freebsd.org . diff --git a/usr.bin/soelim/soelim.c b/usr.bin/soelim/soelim.c index de6911f3c83c..4d747ee13bf8 100644 --- a/usr.bin/soelim/soelim.c +++ b/usr.bin/soelim/soelim.c @@ -27,17 +27,17 @@ #include __FBSDID("$FreeBSD$"); -#include +#include +#include +#include +#include #define _WITH_GETLINE #include -#include #include -#include #include #include -#include -#include +#include #define C_OPTION 0x1 @@ -56,7 +56,7 @@ static FILE * soelim_fopen(const char *name) { FILE *f; - char path[MAXPATHLEN]; + char path[PATH_MAX]; size_t i; if (strcmp(name, "-") == 0) diff --git a/usr.bin/ssh-copy-id/ssh-copy-id.sh b/usr.bin/ssh-copy-id/ssh-copy-id.sh index 09fb3cca6ed9..f03d5c0a3bab 100755 --- a/usr.bin/ssh-copy-id/ssh-copy-id.sh +++ b/usr.bin/ssh-copy-id/ssh-copy-id.sh @@ -48,7 +48,7 @@ sendkey() { done ; \ if [ -x /sbin/restorecon ]; then \ /sbin/restorecon -F "$HOME/.ssh/" "$keyfile" >/dev/null 2>&1 || true ; \ - fi + fi \ '\' } diff --git a/usr.bin/tar/Makefile b/usr.bin/tar/Makefile index f7e7775a1764..e8a9ad4686a5 100644 --- a/usr.bin/tar/Makefile +++ b/usr.bin/tar/Makefile @@ -31,7 +31,6 @@ CFLAGS+= -I${LIBARCHIVEDIR}/tar -I${LIBARCHIVEDIR}/libarchive CFLAGS+= -I${LIBARCHIVEDIR}/libarchive_fe SYMLINKS= bsdtar ${BINDIR}/tar MLINKS= bsdtar.1 tar.1 -DEBUG_FLAGS=-g .PHONY: check test clean-test check test: $(PROG) bsdtar.1.gz diff --git a/usr.bin/time/time.c b/usr.bin/time/time.c index c2ea522f5ec0..678a2afb37bc 100644 --- a/usr.bin/time/time.c +++ b/usr.bin/time/time.c @@ -65,6 +65,7 @@ static void showtime(FILE *, struct timeval *, struct timeval *, static void siginfo(int); static void usage(void); +static sig_atomic_t siginfo_recvd; static char decimal_point; static struct timeval before_tv; static int hflag, pflag; @@ -130,8 +131,17 @@ main(int argc, char **argv) /* parent */ (void)signal(SIGINT, SIG_IGN); (void)signal(SIGQUIT, SIG_IGN); + siginfo_recvd = 0; (void)signal(SIGINFO, siginfo); - while (wait4(pid, &status, 0, &ru) != pid); + (void)siginterrupt(SIGINFO, 1); + while (wait4(pid, &status, 0, &ru) != pid) { + if (siginfo_recvd) { + siginfo_recvd = 0; + (void)gettimeofday(&after, NULL); + getrusage(RUSAGE_CHILDREN, &ru); + showtime(stdout, &before_tv, &after, &ru); + } + } (void)gettimeofday(&after, NULL); if ( ! WIFEXITED(status)) warnx("command terminated abnormally"); @@ -292,10 +302,6 @@ showtime(FILE *out, struct timeval *before, struct timeval *after, static void siginfo(int sig __unused) { - struct timeval after; - struct rusage ru; - (void)gettimeofday(&after, NULL); - getrusage(RUSAGE_CHILDREN, &ru); - showtime(stdout, &before_tv, &after, &ru); + siginfo_recvd = 1; } diff --git a/usr.bin/vmstat/vmstat.8 b/usr.bin/vmstat/vmstat.8 index 4566ad2a421d..93e75b92470b 100644 --- a/usr.bin/vmstat/vmstat.8 +++ b/usr.bin/vmstat/vmstat.8 @@ -37,7 +37,7 @@ .Sh SYNOPSIS .Nm .\" .Op Fl fimst -.Op Fl afHhimPsz +.Op Fl afHhimoPsz .Op Fl M Ar core Op Fl N Ar system .Op Fl c Ar count .Op Fl n Ar devs @@ -119,6 +119,9 @@ Report on the usage of kernel dynamic memory allocated using by type. .It Fl n Change the maximum number of disks to display from the default of 2. +.It Fl o +Display a list of virtual memory objects in the system and the resident +memory used by each object. .It Fl P Report per-cpu system/user/idle cpu statistics. .It Fl p diff --git a/usr.bin/vmstat/vmstat.c b/usr.bin/vmstat/vmstat.c index 9049e442227f..0a3054ac50e9 100644 --- a/usr.bin/vmstat/vmstat.c +++ b/usr.bin/vmstat/vmstat.c @@ -53,6 +53,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include #include @@ -143,12 +144,14 @@ static kvm_t *kd; #define TIMESTAT 0x10 #define VMSTAT 0x20 #define ZMEMSTAT 0x40 +#define OBJSTAT 0x80 static void cpustats(void); static void pcpustats(int, u_long, int); static void devstats(void); static void doforkst(void); static void dointr(unsigned int, int); +static void doobjstat(void); static void dosum(void); static void dovmstat(unsigned int, int); static void domemstat_malloc(void); @@ -181,7 +184,7 @@ main(int argc, char *argv[]) interval = reps = todo = 0; maxshowdevs = 2; hflag = isatty(1); - while ((c = getopt(argc, argv, "ac:fhHiM:mN:n:Pp:stw:z")) != -1) { + while ((c = getopt(argc, argv, "ac:fhHiM:mN:n:oPp:stw:z")) != -1) { switch (c) { case 'a': aflag++; @@ -220,6 +223,9 @@ main(int argc, char *argv[]) errx(1, "number of devices %d is < 0", maxshowdevs); break; + case 'o': + todo |= OBJSTAT; + break; case 'p': if (devstat_buildmatch(optarg, &matches, &num_matches) != 0) errx(1, "%s", devstat_errbuf); @@ -320,6 +326,8 @@ main(int argc, char *argv[]) domemstat_zone(); if (todo & SUMSTAT) dosum(); + if (todo & OBJSTAT) + doobjstat(); #ifdef notyet if (todo & TIMESTAT) dotimes(); @@ -1396,6 +1404,129 @@ domemstat_zone(void) printf("\n"); } +static void +display_object(struct kinfo_vmobject *kvo) +{ + const char *str; + + printf("%5jd ", (uintmax_t)kvo->kvo_resident); + printf("%5jd ", (uintmax_t)kvo->kvo_active); + printf("%5jd ", (uintmax_t)kvo->kvo_inactive); + printf("%3d ", kvo->kvo_ref_count); + printf("%3d ", kvo->kvo_shadow_count); + switch (kvo->kvo_memattr) { +#ifdef VM_MEMATTR_UNCACHEABLE + case VM_MEMATTR_UNCACHEABLE: + str = "UC"; + break; +#endif +#ifdef VM_MEMATTR_WRITE_COMBINING + case VM_MEMATTR_WRITE_COMBINING: + str = "WC"; + break; +#endif +#ifdef VM_MEMATTR_WRITE_THROUGH + case VM_MEMATTR_WRITE_THROUGH: + str = "WT"; + break; +#endif +#ifdef VM_MEMATTR_WRITE_PROTECTED + case VM_MEMATTR_WRITE_PROTECTED: + str = "WP"; + break; +#endif +#ifdef VM_MEMATTR_WRITE_BACK + case VM_MEMATTR_WRITE_BACK: + str = "WB"; + break; +#endif +#ifdef VM_MEMATTR_WEAK_UNCACHEABLE + case VM_MEMATTR_WEAK_UNCACHEABLE: + str = "UC-"; + break; +#endif +#ifdef VM_MEMATTR_WB_WA + case VM_MEMATTR_WB_WA: + str = "WB"; + break; +#endif +#ifdef VM_MEMATTR_NOCACHE + case VM_MEMATTR_NOCACHE: + str = "NC"; + break; +#endif +#ifdef VM_MEMATTR_DEVICE + case VM_MEMATTR_DEVICE: + str = "DEV"; + break; +#endif +#ifdef VM_MEMATTR_CACHEABLE + case VM_MEMATTR_CACHEABLE: + str = "C"; + break; +#endif +#ifdef VM_MEMATTR_PREFETCHABLE + case VM_MEMATTR_PREFETCHABLE: + str = "PRE"; + break; +#endif + default: + str = "??"; + break; + } + printf("%-3s ", str); + switch (kvo->kvo_type) { + case KVME_TYPE_NONE: + str = "--"; + break; + case KVME_TYPE_DEFAULT: + str = "df"; + break; + case KVME_TYPE_VNODE: + str = "vn"; + break; + case KVME_TYPE_SWAP: + str = "sw"; + break; + case KVME_TYPE_DEVICE: + str = "dv"; + break; + case KVME_TYPE_PHYS: + str = "ph"; + break; + case KVME_TYPE_DEAD: + str = "dd"; + break; + case KVME_TYPE_SG: + str = "sg"; + break; + case KVME_TYPE_UNKNOWN: + default: + str = "??"; + break; + } + printf("%-2s ", str); + printf("%-s\n", kvo->kvo_path); +} + +static void +doobjstat(void) +{ + struct kinfo_vmobject *kvo; + int cnt, i; + + kvo = kinfo_getvmobject(&cnt); + if (kvo == NULL) { + warn("Failed to fetch VM object list"); + return; + } + printf("%5s %5s %5s %3s %3s %3s %2s %s\n", "RES", "ACT", "INACT", + "REF", "SHD", "CM", "TP", "PATH"); + for (i = 0; i < cnt; i++) + display_object(&kvo[i]); + free(kvo); +} + /* * kread reads something from the kernel, given its nlist index. */ @@ -1448,7 +1579,7 @@ static void usage(void) { (void)fprintf(stderr, "%s%s", - "usage: vmstat [-afHhimPsz] [-M core [-N system]] [-c count] [-n devs]\n", + "usage: vmstat [-afHhimoPsz] [-M core [-N system]] [-c count] [-n devs]\n", " [-p type,if,pass] [-w wait] [disks] [wait [count]]\n"); exit(1); } diff --git a/usr.bin/vtfontcvt/vtfontcvt.c b/usr.bin/vtfontcvt/vtfontcvt.c index 21c519b5f65a..07c354768f90 100644 --- a/usr.bin/vtfontcvt/vtfontcvt.c +++ b/usr.bin/vtfontcvt/vtfontcvt.c @@ -473,24 +473,24 @@ print_font_info(void) { printf( "Statistics:\n" -"- glyph_total: %5u\n" -"- glyph_normal: %5u\n" -"- glyph_normal_right: %5u\n" -"- glyph_bold: %5u\n" -"- glyph_bold_right: %5u\n" -"- glyph_unique: %5u\n" -"- glyph_dupe: %5u\n" -"- mapping_total: %5u\n" -"- mapping_normal: %5u\n" -"- mapping_normal_folded: %5u\n" -"- mapping_normal_right: %5u\n" -"- mapping_normal_right_folded: %5u\n" -"- mapping_bold: %5u\n" -"- mapping_bold_folded: %5u\n" -"- mapping_bold_right: %5u\n" -"- mapping_bold_right_folded: %5u\n" -"- mapping_unique: %5u\n" -"- mapping_dupe: %5u\n", +"- glyph_total: %6u\n" +"- glyph_normal: %6u\n" +"- glyph_normal_right: %6u\n" +"- glyph_bold: %6u\n" +"- glyph_bold_right: %6u\n" +"- glyph_unique: %6u\n" +"- glyph_dupe: %6u\n" +"- mapping_total: %6u\n" +"- mapping_normal: %6u\n" +"- mapping_normal_folded: %6u\n" +"- mapping_normal_right: %6u\n" +"- mapping_normal_right_folded: %6u\n" +"- mapping_bold: %6u\n" +"- mapping_bold_folded: %6u\n" +"- mapping_bold_right: %6u\n" +"- mapping_bold_right_folded: %6u\n" +"- mapping_unique: %6u\n" +"- mapping_dupe: %6u\n", glyph_total, glyph_count[0], glyph_count[1], diff --git a/usr.bin/whois/whois.1 b/usr.bin/whois/whois.1 index 0f0f17739937..a9ed50adfd50 100644 --- a/usr.bin/whois/whois.1 +++ b/usr.bin/whois/whois.1 @@ -28,7 +28,7 @@ .\" From: @(#)whois.1 8.1 (Berkeley) 6/6/93 .\" $FreeBSD$ .\" -.Dd October 2, 2009 +.Dd May 14, 2015 .Dt WHOIS 1 .Os .Sh NAME @@ -36,7 +36,7 @@ .Nd "Internet domain name and network number directory service" .Sh SYNOPSIS .Nm -.Op Fl aAbfgiIklmQrR +.Op Fl aAbfgiIklmPQr .Op Fl c Ar country-code | Fl h Ar host .Op Fl p Ar port .Ar name ... @@ -47,6 +47,42 @@ utility looks up records in the databases maintained by several Network Information Centers .Pq Tn NICs . .Pp +By default +.Nm +automatically discovers the name of a whois server to use +from the top-level domain +.Pq Tn TLD +of the supplied (single) argument. +It tries +.Qq Va TLD Ns Li .whois-servers.net +and +.Qq Li whois.nic. Ns Va TLD +and if neither host exists it falls back to its default server. +.Pp +If an IP address is specified, the whois server will default to +the American Registry for Internet Numbers +.Pq Tn ARIN . +If a query to +.Tn ARIN +references +.Tn APNIC , AfriNIC , LACNIC , +or +.Tn RIPE , +that server will be queried also, provided that the +.Fl Q +option is not specified. +.Pp +If +.Nm +cannot automatically discover a server, +it will fall back to +the host specified in the +.Ev WHOIS_SERVER +or +.Ev RA_SERVER +environment variables, or if those are not set, it will use +.Pa whois.crsnic.net . +.Pp The options are as follows: .Bl -tag -width indent .It Fl a @@ -88,66 +124,12 @@ Use the US non-military federal government database, which contains points of contact for subdomains of .Pa .GOV . .It Fl h Ar host -Use the specified host instead of the default variant. +Use the specified host instead of the default. Either a host name or an IP address may be specified. -.Pp -By default -.Nm -constructs the name of a whois server to use from the top-level domain -.Pq Tn TLD -of the supplied (single) argument, and appending -.Qq Li .whois-servers.net . -This effectively allows a suitable whois server to be selected -automatically for a large number of -.Tn TLDs . -.Pp -In the event that an IP -address is specified, the whois server will default to the American -Registry for Internet Numbers -.Pq Tn ARIN . -If a query to -.Tn ARIN -references -.Tn APNIC , AfriNIC , LACNIC , -or -.Tn RIPE , -that server will be queried also, provided that the -.Fl Q -option is not specified. -.Pp -If the query is not a domain name or IP address, -.Nm -will fall back to -.Pa whois.crsnic.net . .It Fl i -Use the Network Solutions Registry for Internet Numbers +Use the obsolete Network Solutions Registry for Internet Numbers .Pq Pa whois.networksolutions.com database. -It contains network numbers and domain contact information for most of -.Pa .COM , .NET , .ORG -and -.Pa .EDU -domains. -.Pp -.Sy NOTE ! -The registration of these domains is now done by a number of -independent and competing registrars and this database holds no information -on the domains registered by organizations other than Network Solutions, Inc. -Also, note that the -.Tn InterNIC -database -.Pq Pa whois.internic.net -is no longer handled by Network Solutions, Inc. -For details, see -.Pa http://www.internic.net/ . -.Pp -(Hint: Contact information, identified by the term -.Em handle , -can be looked up by prefixing -.Qq Li "handle " -to the -.Tn NIC -handle in the query.) .It Fl I Use the Internet Assigned Numbers Authority .Pq Tn IANA @@ -177,6 +159,10 @@ Connect to the whois server on If this option is not specified, .Nm defaults to port 43. +.It Fl P +Use the PeeringDB database of AS numbers. +It contains details about presence at internet peering points +for many network operators. .It Fl Q Do a quick lookup. This means that @@ -190,24 +176,28 @@ Use the R\(aaeseaux IP Europ\(aaeens database. It contains network numbers and domain contact information for Europe. -.It Fl R -Use the Russia Network Information Center -.Pq Tn RIPN -database. -It contains network numbers and domain contact information -for subdomains of -.Pa .RU . -This option is deprecated; use the -.Fl c -option with an argument of -.Qq Li RU -instead. .El .Pp The operands specified to .Nm are treated independently and may be used as queries on different whois servers. +.Sh ENVIRONMENT +.Bl -tag +.It Ev WHOIS_SERVER +The primary default whois server. +If this is unset, +.Nm +uses the +.Ev RA_SERVER +environment variable. +.It Ev RA_SERVER +The secondary default whois server. +If this is unset, +.Nm +will use +.Pa whois.crsnic.net . +.El .Sh EXIT STATUS .Ex -std .Sh EXAMPLES diff --git a/usr.bin/whois/whois.c b/usr.bin/whois/whois.c index 98b022648695..6ad8826ce520 100644 --- a/usr.bin/whois/whois.c +++ b/usr.bin/whois/whois.c @@ -60,22 +60,25 @@ __FBSDID("$FreeBSD$"); #include #define ABUSEHOST "whois.abuse.net" -#define NICHOST "whois.crsnic.net" -#define INICHOST "whois.networksolutions.com" -#define GNICHOST "whois.nic.gov" #define ANICHOST "whois.arin.net" -#define LNICHOST "whois.lacnic.net" -#define KNICHOST "whois.krnic.net" -#define RNICHOST "whois.ripe.net" -#define PNICHOST "whois.apnic.net" -#define MNICHOST "whois.ra.net" -#define QNICHOST_TAIL ".whois-servers.net" #define BNICHOST "whois.registro.br" -#define NORIDHOST "whois.norid.no" +#define FNICHOST "whois.afrinic.net" +#define GERMNICHOST "de.whois-servers.net" +#define GNICHOST "whois.nic.gov" #define IANAHOST "whois.iana.org" -#define GERMNICHOST "de.whois-servers.net" -#define FNICHOST "whois.afrinic.net" +#define INICHOST "whois.networksolutions.com" +#define KNICHOST "whois.krnic.net" +#define LNICHOST "whois.lacnic.net" +#define MNICHOST "whois.ra.net" +#define NICHOST "whois.crsnic.net" +#define PDBHOST "whois.peeringdb.com" +#define PNICHOST "whois.apnic.net" +#define QNICHOST_HEAD "whois.nic." +#define QNICHOST_TAIL ".whois-servers.net" +#define RNICHOST "whois.ripe.net" + #define DEFAULT_PORT "whois" + #define WHOIS_SERVER_ID "Whois Server: " #define WHOIS_ORG_SERVER_ID "Registrant Street1:Whois Server:" @@ -84,12 +87,25 @@ __FBSDID("$FreeBSD$"); #define ishost(h) (isalnum((unsigned char)h) || h == '.' || h == '-') +static struct { + const char *suffix, *server; +} whoiswhere[] = { + /* Various handles */ + { "-ARIN", ANICHOST }, + { "-NICAT", "at" QNICHOST_TAIL }, + { "-NORID", "no" QNICHOST_TAIL }, + { "-RIPE", RNICHOST }, + /* Nominet's whois server doesn't return referrals to JANET */ + { ".ac.uk", "ac.uk" QNICHOST_TAIL }, + { NULL, NULL } +}; + static const char *ip_whois[] = { LNICHOST, RNICHOST, PNICHOST, BNICHOST, FNICHOST, NULL }; static const char *port = DEFAULT_PORT; static char *choose_server(char *); -static struct addrinfo *gethostinfo(char const *host, int exit_on_error); +static struct addrinfo *gethostinfo(char const *host, int exitnoname); static void s_asprintf(char **ret, const char *format, ...) __printflike(2, 3); static void usage(void); static void whois(const char *, const char *, int); @@ -107,7 +123,7 @@ main(int argc, char *argv[]) country = host = qnichost = NULL; flags = use_qnichost = 0; - while ((ch = getopt(argc, argv, "aAbc:fgh:iIklmp:QrR6")) != -1) { + while ((ch = getopt(argc, argv, "aAbc:fgh:iIklmp:PQr")) != -1) { switch (ch) { case 'a': host = ANICHOST; @@ -148,21 +164,15 @@ main(int argc, char *argv[]) case 'p': port = optarg; break; + case 'P': + host = PDBHOST; + break; case 'Q': flags |= WHOIS_QUICK; break; case 'r': host = RNICHOST; break; - case 'R': - warnx("-R is deprecated; use '-c ru' instead"); - country = "ru"; - break; - /* Remove in FreeBSD 10 */ - case '6': - errx(EX_USAGE, - "-6 is deprecated; use -[aAflr] instead"); - break; case '?': default: usage(); @@ -176,13 +186,12 @@ main(int argc, char *argv[]) usage(); /* - * If no host or country is specified determine the top level domain - * from the query. If the TLD is a number, query ARIN. Otherwise, use - * TLD.whois-server.net. If the domain does not contain '.', fall - * back to NICHOST. + * If no host or country is specified, try to determine the top + * level domain from the query, or fall back to NICHOST. */ if (host == NULL && country == NULL) { - if ((host = getenv("RA_SERVER")) == NULL) { + if ((host = getenv("WHOIS_SERVER")) == NULL && + (host = getenv("RA_SERVER")) == NULL) { use_qnichost = 1; host = NICHOST; if (!(flags & WHOIS_QUICK)) @@ -210,39 +219,67 @@ main(int argc, char *argv[]) * returns a pointer to newly allocated memory containing the whois server to * be queried, or a NULL if the correct server couldn't be determined. The * caller must remember to free(3) the allocated memory. + * + * If the domain is an IPv6 address or has a known suffix, that determines + * the server, else if the TLD is a number, query ARIN, else try a couple of + * formulaic server names. Fail if the domain does not contain '.'. */ static char * choose_server(char *domain) { char *pos, *retval; + int i; + struct addrinfo *res; if (strchr(domain, ':')) { s_asprintf(&retval, "%s", ANICHOST); return (retval); } - for (pos = strchr(domain, '\0'); pos > domain && *--pos == '.';) - *pos = '\0'; + for (pos = strchr(domain, '\0'); pos > domain && pos[-1] == '.';) + *--pos = '\0'; if (*domain == '\0') errx(EX_USAGE, "can't search for a null string"); - if (strlen(domain) > sizeof("-NORID")-1 && - strcasecmp(domain + strlen(domain) - sizeof("-NORID") + 1, - "-NORID") == 0) { - s_asprintf(&retval, "%s", NORIDHOST); - return (retval); + for (i = 0; whoiswhere[i].suffix != NULL; i++) { + size_t suffix_len = strlen(whoiswhere[i].suffix); + if (domain + suffix_len < pos && + strcasecmp(pos - suffix_len, whoiswhere[i].suffix) == 0) { + s_asprintf(&retval, "%s", whoiswhere[i].server); + return (retval); + } } while (pos > domain && *pos != '.') --pos; if (pos <= domain) return (NULL); - if (isdigit((unsigned char)*++pos)) + if (isdigit((unsigned char)*++pos)) { s_asprintf(&retval, "%s", ANICHOST); - else - s_asprintf(&retval, "%s%s", pos, QNICHOST_TAIL); - return (retval); + return (retval); + } + /* Try possible alternative whois server name formulae. */ + for (i = 0; ; ++i) { + switch (i) { + case 0: + s_asprintf(&retval, "%s%s", pos, QNICHOST_TAIL); + break; + case 1: + s_asprintf(&retval, "%s%s", QNICHOST_HEAD, pos); + break; + default: + return (NULL); + } + res = gethostinfo(retval, 0); + if (res) { + freeaddrinfo(res); + return (retval); + } else { + free(retval); + continue; + } + } } static struct addrinfo * -gethostinfo(char const *host, int exit_on_error) +gethostinfo(char const *host, int exit_on_noname) { struct addrinfo hints, *res; int error; @@ -251,13 +288,10 @@ gethostinfo(char const *host, int exit_on_error) hints.ai_flags = 0; hints.ai_family = AF_UNSPEC; hints.ai_socktype = SOCK_STREAM; + res = NULL; error = getaddrinfo(host, port, &hints, &res); - if (error) { - warnx("%s: %s", host, gai_strerror(error)); - if (exit_on_error) - exit(EX_NOHOST); - return (NULL); - } + if (error && (exit_on_noname || error != EAI_NONAME)) + err(EX_NOHOST, "%s: %s", host, gai_strerror(error)); return (res); } @@ -283,8 +317,9 @@ whois(const char *query, const char *hostname, int flags) FILE *fp; struct addrinfo *hostres, *res; char *buf, *host, *nhost, *p; - int i, j, s = -1, count; - size_t c, len; + int s = -1, f; + nfds_t i, j; + size_t c, len, count; struct pollfd *fds; int timeout = 180; @@ -402,9 +437,9 @@ whois(const char *query, const char *hostname, int flags) if (s != -1) { /* Restore default blocking behavior. */ - if ((flags = fcntl(s, F_GETFL)) != -1) { - flags &= ~O_NONBLOCK; - if (fcntl(s, F_SETFL, flags) == -1) + if ((f = fcntl(s, F_GETFL)) != -1) { + f &= ~O_NONBLOCK; + if (fcntl(s, F_SETFL, f) == -1) err(EX_OSERR, "fcntl()"); } else err(EX_OSERR, "fcntl()"); @@ -480,7 +515,7 @@ static void usage(void) { fprintf(stderr, - "usage: whois [-aAbfgiIklmQrR6] [-c country-code | -h hostname] " + "usage: whois [-aAbfgiIklmPQr] [-c country-code | -h hostname] " "[-p port] name ...\n"); exit(EX_USAGE); } diff --git a/usr.sbin/acpi/acpidb/acpidb.c b/usr.sbin/acpi/acpidb/acpidb.c index f49420f298d0..b3d0021f56e3 100644 --- a/usr.sbin/acpi/acpidb/acpidb.c +++ b/usr.sbin/acpi/acpidb/acpidb.c @@ -478,7 +478,7 @@ load_dsdt(const char *dsdtfile) return (-1); } - AcpiDbGetTableFromFile(filetmp, NULL); + AcpiDbGetTableFromFile(filetmp, NULL, TRUE); AcpiDbInitialize(); AcpiGbl_DebuggerConfiguration = 0; diff --git a/usr.sbin/acpi/iasl/Makefile b/usr.sbin/acpi/iasl/Makefile index 7f6a1bde2b73..e9faad2b28fd 100644 --- a/usr.sbin/acpi/iasl/Makefile +++ b/usr.sbin/acpi/iasl/Makefile @@ -4,8 +4,8 @@ PROG= iasl # common SRCS= adfile.c adisasm.c adwalk.c ahids.c ahpredef.c \ - ahuuids.c cmfsize.c dmextern.c dmrestag.c dmtable.c \ - dmtbdump.c dmtbinfo.c getopt.c + ahtable.c ahuuids.c cmfsize.c dmextern.c dmrestag.c \ + dmtable.c dmtbdump.c dmtbinfo.c getopt.c # compiler SRCS+= aslanalyze.c aslascii.c aslbtypes.c aslcodegen.c \ diff --git a/usr.sbin/bhyve/bhyve.8 b/usr.sbin/bhyve/bhyve.8 index e3cf36b9e937..ee0f2caf001e 100644 --- a/usr.sbin/bhyve/bhyve.8 +++ b/usr.sbin/bhyve/bhyve.8 @@ -193,8 +193,13 @@ format. .Pp Block storage devices: .Bl -tag -width 10n -.It Pa /filename Ns Oo , Ns Li nocache Oc Ns Oo , Ns Li direct Oc Ns Oo , Ns Li ro Oc -.It Pa /dev/xxx Ns Oo , Ns Ar nocache Oc Ns Oo , Ns Ar direct Oc Ns Oo , Ns Ar ro Oc +.It Pa /filename Ns Oo , Ns Ar block-device-options Oc +.It Pa /dev/xxx Ns Oo , Ns Ar block-device-options Oc +.El +.Pp +The +.Ar block-device-options +are: .Bl -tag -width 8n .It Li nocache Open the file with @@ -204,14 +209,10 @@ Open the file using .Dv O_SYNC . .It Li ro Force the file to be opened read-only. -.El -.Pp -The -.Li nocache , -.Li direct , -and -.Li ro -options are not available for virtio block devices. +.It Li sectorsize= Ns Ar logical Ns Oo / Ns Ar physical Oc +Specify the logical and physical sector sizes of the emulated disk. +The physical sector size is optional and is equal to the logical sector size +if not explicitly specified. .El .Pp TTY devices: diff --git a/usr.sbin/bhyve/block_if.c b/usr.sbin/bhyve/block_if.c index bcb1617d4c09..ef8e11e2755e 100644 --- a/usr.sbin/bhyve/block_if.c +++ b/usr.sbin/bhyve/block_if.c @@ -392,16 +392,18 @@ blockif_open(const char *optstr, const char *ident) { char tname[MAXCOMLEN + 1]; char name[MAXPATHLEN]; - char *nopt, *xopts; + char *nopt, *xopts, *cp; struct blockif_ctxt *bc; struct stat sbuf; struct diocgattr_arg arg; off_t size, psectsz, psectoff; int extra, fd, i, sectsz; - int nocache, sync, ro, candelete, geom; + int nocache, sync, ro, candelete, geom, ssopt, pssopt; pthread_once(&blockif_once, blockif_init); + fd = -1; + ssopt = 0; nocache = 0; sync = 0; ro = 0; @@ -410,16 +412,25 @@ blockif_open(const char *optstr, const char *ident) * The first element in the optstring is always a pathname. * Optional elements follow */ - nopt = strdup(optstr); - for (xopts = strtok(nopt, ","); - xopts != NULL; - xopts = strtok(NULL, ",")) { - if (!strcmp(xopts, "nocache")) + nopt = xopts = strdup(optstr); + while (xopts != NULL) { + cp = strsep(&xopts, ","); + if (cp == nopt) /* file or device pathname */ + continue; + else if (!strcmp(cp, "nocache")) nocache = 1; - else if (!strcmp(xopts, "sync")) + else if (!strcmp(cp, "sync") || !strcmp(cp, "direct")) sync = 1; - else if (!strcmp(xopts, "ro")) + else if (!strcmp(cp, "ro")) ro = 1; + else if (sscanf(cp, "sectorsize=%d/%d", &ssopt, &pssopt) == 2) + ; + else if (sscanf(cp, "sectorsize=%d", &ssopt) == 1) + pssopt = ssopt; + else { + fprintf(stderr, "Invalid device option \"%s\"\n", cp); + goto err; + } } extra = 0; @@ -437,13 +448,12 @@ blockif_open(const char *optstr, const char *ident) if (fd < 0) { perror("Could not open backing file"); - return (NULL); + goto err; } if (fstat(fd, &sbuf) < 0) { perror("Could not stat backing file"); - close(fd); - return (NULL); + goto err; } /* @@ -457,8 +467,7 @@ blockif_open(const char *optstr, const char *ident) if (ioctl(fd, DIOCGMEDIASIZE, &size) < 0 || ioctl(fd, DIOCGSECTORSIZE, §sz)) { perror("Could not fetch dev blk/sector size"); - close(fd); - return (NULL); + goto err; } assert(size != 0); assert(sectsz != 0); @@ -473,10 +482,39 @@ blockif_open(const char *optstr, const char *ident) } else psectsz = sbuf.st_blksize; + if (ssopt != 0) { + if (!powerof2(ssopt) || !powerof2(pssopt) || ssopt < 512 || + ssopt > pssopt) { + fprintf(stderr, "Invalid sector size %d/%d\n", + ssopt, pssopt); + goto err; + } + + /* + * Some backend drivers (e.g. cd0, ada0) require that the I/O + * size be a multiple of the device's sector size. + * + * Validate that the emulated sector size complies with this + * requirement. + */ + if (S_ISCHR(sbuf.st_mode)) { + if (ssopt < sectsz || (ssopt % sectsz) != 0) { + fprintf(stderr, "Sector size %d incompatible " + "with underlying device sector size %d\n", + ssopt, sectsz); + goto err; + } + } + + sectsz = ssopt; + psectsz = pssopt; + psectoff = 0; + } + bc = calloc(1, sizeof(struct blockif_ctxt)); if (bc == NULL) { - close(fd); - return (NULL); + perror("calloc"); + goto err; } bc->bc_magic = BLOCKIF_SIG; @@ -506,6 +544,10 @@ blockif_open(const char *optstr, const char *ident) } return (bc); +err: + if (fd >= 0) + close(fd); + return (NULL); } static int diff --git a/usr.sbin/bhyve/pci_hostbridge.c b/usr.sbin/bhyve/pci_hostbridge.c index 54a25aeac570..5c9ea28191f7 100644 --- a/usr.sbin/bhyve/pci_hostbridge.c +++ b/usr.sbin/bhyve/pci_hostbridge.c @@ -38,7 +38,7 @@ pci_hostbridge_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts) /* config space */ pci_set_cfgdata16(pi, PCIR_VENDOR, 0x1275); /* NetApp */ pci_set_cfgdata16(pi, PCIR_DEVICE, 0x1275); /* NetApp */ - pci_set_cfgdata8(pi, PCIR_HDRTYPE, PCIM_HDRTYPE_BRIDGE); + pci_set_cfgdata8(pi, PCIR_HDRTYPE, PCIM_HDRTYPE_NORMAL); pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_BRIDGE); pci_set_cfgdata8(pi, PCIR_SUBCLASS, PCIS_BRIDGE_HOST); diff --git a/usr.sbin/bhyve/pci_virtio_block.c b/usr.sbin/bhyve/pci_virtio_block.c index 35daa1f3921e..8500be6f7007 100644 --- a/usr.sbin/bhyve/pci_virtio_block.c +++ b/usr.sbin/bhyve/pci_virtio_block.c @@ -370,6 +370,7 @@ pci_vtblk_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts) pci_set_cfgdata16(pi, PCIR_VENDOR, VIRTIO_VENDOR); pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_STORAGE); pci_set_cfgdata16(pi, PCIR_SUBDEV_0, VIRTIO_TYPE_BLOCK); + pci_set_cfgdata16(pi, PCIR_SUBVEND_0, VIRTIO_VENDOR); if (vi_intr_init(&sc->vbsc_vs, 1, fbsdrun_virtio_msix())) { blockif_close(sc->bc); diff --git a/usr.sbin/bhyve/pci_virtio_net.c b/usr.sbin/bhyve/pci_virtio_net.c index 1a029d5631e7..3781ea9f04cd 100644 --- a/usr.sbin/bhyve/pci_virtio_net.c +++ b/usr.sbin/bhyve/pci_virtio_net.c @@ -640,6 +640,7 @@ pci_vtnet_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts) pci_set_cfgdata16(pi, PCIR_VENDOR, VIRTIO_VENDOR); pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_NETWORK); pci_set_cfgdata16(pi, PCIR_SUBDEV_0, VIRTIO_TYPE_NET); + pci_set_cfgdata16(pi, PCIR_SUBVEND_0, VIRTIO_VENDOR); /* Link is up if we managed to open tap device. */ sc->vsc_config.status = (opts == NULL || sc->vsc_tapfd >= 0); diff --git a/usr.sbin/bhyve/pci_virtio_rnd.c b/usr.sbin/bhyve/pci_virtio_rnd.c index 92d1d6fca20d..78448f55b819 100644 --- a/usr.sbin/bhyve/pci_virtio_rnd.c +++ b/usr.sbin/bhyve/pci_virtio_rnd.c @@ -170,6 +170,7 @@ pci_vtrnd_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts) pci_set_cfgdata16(pi, PCIR_VENDOR, VIRTIO_VENDOR); pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_CRYPTO); pci_set_cfgdata16(pi, PCIR_SUBDEV_0, VIRTIO_TYPE_ENTROPY); + pci_set_cfgdata16(pi, PCIR_SUBVEND_0, VIRTIO_VENDOR); if (vi_intr_init(&sc->vrsc_vs, 1, fbsdrun_virtio_msix())) return (1); diff --git a/usr.sbin/bhyve/virtio.c b/usr.sbin/bhyve/virtio.c index 41a9e428980d..11b1e627fd51 100644 --- a/usr.sbin/bhyve/virtio.c +++ b/usr.sbin/bhyve/virtio.c @@ -316,7 +316,7 @@ vq_getchain(struct vqueue_info *vq, uint16_t *pidx, if ((vdir->vd_flags & VRING_DESC_F_INDIRECT) == 0) { _vq_record(i, vdir, ctx, iov, n_iov, flags); i++; - } else if ((vs->vs_negotiated_caps & + } else if ((vs->vs_vc->vc_hv_caps & VIRTIO_RING_F_INDIRECT_DESC) == 0) { fprintf(stderr, "%s: descriptor has forbidden INDIRECT flag, " diff --git a/usr.sbin/bhyvectl/bhyvectl.c b/usr.sbin/bhyvectl/bhyvectl.c index 223ee2503448..7d3017fed31c 100644 --- a/usr.sbin/bhyvectl/bhyvectl.c +++ b/usr.sbin/bhyvectl/bhyvectl.c @@ -293,6 +293,7 @@ static int get_guest_pat, get_host_pat; static int get_guest_sysenter, get_vmcs_link; static int get_exit_reason, get_vmcs_exit_qualification; static int get_vmcs_exit_interruption_info, get_vmcs_exit_interruption_error; +static int get_vmcs_exit_inst_length; static uint64_t desc_base; static uint32_t desc_limit, desc_access; @@ -1145,7 +1146,15 @@ get_misc_vmcs(struct vmctx *ctx, int vcpu) vcpu, u64); } } - + + if (!error && (get_vmcs_exit_inst_length || get_all)) { + error = vm_get_vmcs_field(ctx, vcpu, + VMCS_EXIT_INSTRUCTION_LENGTH, &u64); + if (error == 0) + printf("vmcs_exit_inst_length[%d]\t0x%08x\n", vcpu, + (uint32_t)u64); + } + if (!error && (get_vmcs_exit_qualification || get_all)) { error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_QUALIFICATION, &u64); @@ -1405,6 +1414,8 @@ setup_options(bool cpu_intel) REQ_ARG, 0, SET_VMCS_ENTRY_INTERRUPTION_INFO }, { "get-vmcs-exit-qualification", NO_ARG, &get_vmcs_exit_qualification, 1 }, + { "get-vmcs-exit-inst-length", + NO_ARG, &get_vmcs_exit_inst_length, 1 }, { "get-vmcs-interruptibility", NO_ARG, &get_vmcs_interruptibility, 1 }, { "get-vmcs-exit-interruption-error", diff --git a/usr.sbin/bhyveload/bhyveload.c b/usr.sbin/bhyveload/bhyveload.c index eaf71a819373..8ebf1167be9e 100644 --- a/usr.sbin/bhyveload/bhyveload.c +++ b/usr.sbin/bhyveload/bhyveload.c @@ -609,7 +609,7 @@ disk_open(char *path) { int err, fd; - if (ndisks > NDISKS) + if (ndisks >= NDISKS) return (ERANGE); err = 0; diff --git a/usr.sbin/bluetooth/bthidd/Makefile b/usr.sbin/bluetooth/bthidd/Makefile index 587189bf00ee..f36d216c2e59 100644 --- a/usr.sbin/bluetooth/bthidd/Makefile +++ b/usr.sbin/bluetooth/bthidd/Makefile @@ -8,7 +8,6 @@ SRCS= bthidd.c client.c hid.c kbd.c lexer.l parser.y server.c \ session.c CFLAGS+= -I${.CURDIR} -DEBUG_FLAGS= -g LIBADD+= bluetooth usbhid diff --git a/usr.sbin/bsdinstall/scripts/zfsboot b/usr.sbin/bsdinstall/scripts/zfsboot index 7fa5cd3b7a9f..c759e85f2598 100755 --- a/usr.sbin/bsdinstall/scripts/zfsboot +++ b/usr.sbin/bsdinstall/scripts/zfsboot @@ -953,6 +953,8 @@ zfs_create_diskpart() esac # $ZFSBOOT_PARTITION_SCHEME # Update fstab(5) + local swapsize + f_expand_number "$ZFSBOOT_SWAP_SIZE" swapsize if [ "$isswapmirror" ]; then # This is not the first disk in the mirror, do nothing elif [ "$ZFSBOOT_SWAP_ENCRYPTION" -a "$ZFSBOOT_SWAP_MIRROR" ]; then @@ -972,6 +974,8 @@ zfs_create_diskpart() /dev/$disk${swappart}.eli none swap sw 0 0 \ $BSDINSTALL_TMPETC/fstab || return $FAILURE + elif [ ${swapsize:-0} -eq 0 ]; then + # If swap is 0 sized, don't add it to fstab else f_eval_catch $funcname printf "$PRINTF_FSTAB" \ /dev/$disk$swappart none swap sw 0 0 \ diff --git a/usr.sbin/crunch/crunchide/exec_elf32.c b/usr.sbin/crunch/crunchide/exec_elf32.c index 89080e932e58..fc9a959c0e4e 100644 --- a/usr.sbin/crunch/crunchide/exec_elf32.c +++ b/usr.sbin/crunch/crunchide/exec_elf32.c @@ -35,7 +35,7 @@ __RCSID("$NetBSD: exec_elf32.c,v 1.6 1999/09/20 04:12:16 christos Exp $"); #endif #endif __FBSDID("$FreeBSD$"); - + #ifndef ELFSIZE #define ELFSIZE 32 #endif @@ -142,7 +142,7 @@ static void * xrealloc(void *ptr, size_t size, const char *fn, const char *use) { void *rv; - + rv = realloc(ptr, size); if (rv == NULL) { free(ptr); @@ -150,7 +150,7 @@ xrealloc(void *ptr, size_t size, const char *fn, const char *use) fn, use); } return (rv); -} +} int ELFNAMEEND(check)(int fd, const char *fn) diff --git a/usr.sbin/ctladm/ctladm.8 b/usr.sbin/ctladm/ctladm.8 index 7616c24cd770..c4508cccc64c 100644 --- a/usr.sbin/ctladm/ctladm.8 +++ b/usr.sbin/ctladm/ctladm.8 @@ -34,7 +34,7 @@ .\" $Id: //depot/users/kenm/FreeBSD-test2/usr.sbin/ctladm/ctladm.8#3 $ .\" $FreeBSD$ .\" -.Dd February 1, 2015 +.Dd May 22, 2015 .Dt CTLADM 8 .Os .Sh NAME @@ -1160,7 +1160,8 @@ This will result in a sense key of NOT READY (0x02), and an ASC/ASCQ of .Xr ctl 4 , .Xr xpt 4 , .Xr camcontrol 8 , -.Xr ctld 8 +.Xr ctld 8 , +.Xr ctlstat 8 .Sh HISTORY The .Nm diff --git a/usr.sbin/ctld/ctld.8 b/usr.sbin/ctld/ctld.8 index aa9a414e1381..b3bea16e2dc0 100644 --- a/usr.sbin/ctld/ctld.8 +++ b/usr.sbin/ctld/ctld.8 @@ -27,7 +27,7 @@ .\" .\" $FreeBSD$ .\" -.Dd November 9, 2014 +.Dd May 22, 2015 .Dt CTLD 8 .Os .Sh NAME @@ -104,7 +104,8 @@ utility exits 0 on success, and >0 if an error occurs. .Sh SEE ALSO .Xr ctl 4 , .Xr ctl.conf 5 , -.Xr ctladm 8 +.Xr ctladm 8 , +.Xr ctlstat 8 .Sh HISTORY The .Nm diff --git a/usr.sbin/iostat/iostat.8 b/usr.sbin/iostat/iostat.8 index 5223b72cf5f7..2073679cd36d 100644 --- a/usr.sbin/iostat/iostat.8 +++ b/usr.sbin/iostat/iostat.8 @@ -56,7 +56,7 @@ .\" .\" @(#)iostat.8 8.1 (Berkeley) 6/6/93 .\" -.Dd December 15, 2012 +.Dd May 22, 2015 .Dt IOSTAT 8 .Os .Sh NAME @@ -494,6 +494,7 @@ flags are given, the TTY and CPU displays will be displayed. .Xr ps 1 , .Xr systat 1 , .Xr devstat 3 , +.Xr ctlstat 8 , .Xr gstat 8 , .Xr pstat 8 , .Xr vmstat 8 diff --git a/usr.sbin/kbdmap/kbdmap.c b/usr.sbin/kbdmap/kbdmap.c index bf2aa81d5131..08c0d773c765 100644 --- a/usr.sbin/kbdmap/kbdmap.c +++ b/usr.sbin/kbdmap/kbdmap.c @@ -571,7 +571,7 @@ menu_read(void) char *p; int mark, num_keymaps, items, i; char buffer[256], filename[PATH_MAX]; - char keym[64], lng[64], desc[64]; + char keym[64], lng[64], desc[256]; char dialect[64], lang_abk[64]; struct keymap *km; struct keymap **km_sorted; @@ -616,7 +616,7 @@ menu_read(void) continue; /* Parse input, removing newline */ - matches = sscanf(p, "%64[^:]:%64[^:]:%64[^:\n]", + matches = sscanf(p, "%64[^:]:%64[^:]:%256[^:\n]", keym, lng, desc); if (matches == 3) { if (strcmp(keym, "FONT") diff --git a/usr.sbin/mountd/mountd.c b/usr.sbin/mountd/mountd.c index 3508f5047cd0..d916577b6558 100644 --- a/usr.sbin/mountd/mountd.c +++ b/usr.sbin/mountd/mountd.c @@ -1410,6 +1410,9 @@ get_exportlist_one(void) } if (check_dirpath(cp) && statfs(cp, &fsb) >= 0) { + if ((fsb.f_flags & MNT_AUTOMOUNTED) != 0) + syslog(LOG_ERR, "Warning: exporting of " + "automounted fs %s not supported", cp); if (got_nondir) { syslog(LOG_ERR, "dirs must be first"); getexp_err(ep, tgrp); diff --git a/usr.sbin/ntp/Makefile.inc b/usr.sbin/ntp/Makefile.inc index 755fbee77c84..274ec39e2e2d 100644 --- a/usr.sbin/ntp/Makefile.inc +++ b/usr.sbin/ntp/Makefile.inc @@ -11,7 +11,7 @@ NTPDEFS= -DSYS_FREEBSD CFLAGS+= ${NTPDEFS} ${DEFS_LOCAL} ${CLOCKDEFS} .if ${MK_OPENSSL} != "no" && !defined(RELEASE_CRUNCH) -CFLAGS+= -DOPENSSL +CFLAGS+= -DOPENSSL -DUSE_OPENSSL_CRYPTO_RAND -DAUTOKEY .endif WARNS?= 0 diff --git a/usr.sbin/ntp/config.h b/usr.sbin/ntp/config.h index 8bcf6e65387f..a5b5b4340cba 100644 --- a/usr.sbin/ntp/config.h +++ b/usr.sbin/ntp/config.h @@ -9,7 +9,7 @@ /* #undef ADJTIME_IS_ACCURATE */ /* Support NTP Autokey protocol? */ -#define AUTOKEY 1 +/* #define AUTOKEY 1 */ /* why not HAVE_P_S? */ /* #undef CALL_PTHREAD_SETCONCURRENCY */ @@ -1578,7 +1578,7 @@ typedef unsigned int uintptr_t; #define USE_FSETOWNCTTY 1 /* Use OpenSSL's crypto random functions */ -#define USE_OPENSSL_CRYPTO_RAND 1 +/* #define USE_OPENSSL_CRYPTO_RAND 1 */ /* OK to use snprintb()? */ /* #undef USE_SNPRINTB */ diff --git a/usr.sbin/ntp/ntp-keygen/Makefile b/usr.sbin/ntp/ntp-keygen/Makefile index 3c29f9b2a8c5..d3f10f3922bf 100644 --- a/usr.sbin/ntp/ntp-keygen/Makefile +++ b/usr.sbin/ntp/ntp-keygen/Makefile @@ -23,7 +23,7 @@ CFLAGS+= -I${.CURDIR}/../../../contrib/ntp/include \ LIBADD+= ntp opts pthread .if ${MK_OPENSSL} != "no" -LIBADD+= md crypto +LIBADD+= crypto .endif .include diff --git a/usr.sbin/ntp/ntpd/Makefile b/usr.sbin/ntp/ntpd/Makefile index 8da2c68197cf..9f80b15eaff3 100644 --- a/usr.sbin/ntp/ntpd/Makefile +++ b/usr.sbin/ntp/ntpd/Makefile @@ -35,10 +35,12 @@ CFLAGS+= -I${.CURDIR}/../../../contrib/ntp/ntpd \ -I${.CURDIR}/../ \ -I${.CURDIR} -LIBADD= parse ntp m rt opts md pthread +LIBADD= parse ntp m opts pthread .if ${MK_OPENSSL} != "no" LIBADD+= crypto +.else +LIBADD+= md .endif CLEANFILES+= .version version.c diff --git a/usr.sbin/ntp/ntpdate/Makefile b/usr.sbin/ntp/ntpdate/Makefile index 8fdd8f75e056..10352e80db69 100644 --- a/usr.sbin/ntp/ntpdate/Makefile +++ b/usr.sbin/ntp/ntpdate/Makefile @@ -14,10 +14,12 @@ CFLAGS+= -I${.CURDIR}/../../../contrib/ntp/include \ -I${.CURDIR}/../../../contrib/ntp/lib/isc/pthreads/include \ -I${.CURDIR}/../ -LIBADD= rt ntp m pthread +LIBADD= ntp m pthread .if ${MK_OPENSSL} != "no" -LIBADD+= md ssl crypto +LIBADD+= crypto +.else +LIBADD+= md .endif CLEANFILES+= .version version.c diff --git a/usr.sbin/ntp/ntpdc/Makefile b/usr.sbin/ntp/ntpdc/Makefile index 2129c202fb6d..f19211aed7ab 100644 --- a/usr.sbin/ntp/ntpdc/Makefile +++ b/usr.sbin/ntp/ntpdc/Makefile @@ -18,12 +18,14 @@ CFLAGS+= -I${.CURDIR}/../../../contrib/ntp/include \ -I${.CURDIR}/../../../lib/libc/${MACHINE_ARCH} \ -I${.CURDIR}/../ -I${.CURDIR} -LIBADD= edit md ntp m readline opts ncurses pthread +LIBADD= edit ntp m opts pthread CFLAGS+= -DHAVE_LIBEDIT -DHAVE_READLINE_READLINE_H \ -I${DESTDIR}/${INCLUDEDIR}/edit .if ${MK_OPENSSL} != "no" -LIBADD+= ssl crypto +LIBADD+= crypto +.else +LIBADD+= md .endif CLEANFILES+= .version version.c diff --git a/usr.sbin/ntp/ntpq/Makefile b/usr.sbin/ntp/ntpq/Makefile index d512cffeacac..f9901a029b4d 100644 --- a/usr.sbin/ntp/ntpq/Makefile +++ b/usr.sbin/ntp/ntpq/Makefile @@ -21,10 +21,12 @@ CFLAGS+= -I${.CURDIR}/../../../contrib/ntp/include \ -I${.CURDIR}/../../../contrib/ntp/sntp/libopts \ -I${.CURDIR}/../ -LIBADD+= edit md ntp opts m pthread +LIBADD+= edit ntp opts m pthread .if ${MK_OPENSSL} != "no" -LIBADD+= ssl crypto +LIBADD+= crypto +.else +LIBADD+= md .endif CFLAGS+= -DHAVE_LIBEDIT -DHAVE_READLINE_READLINE_H \ diff --git a/usr.sbin/ntp/sntp/Makefile b/usr.sbin/ntp/sntp/Makefile index eba7b83b84cb..ce5c01ddb469 100644 --- a/usr.sbin/ntp/sntp/Makefile +++ b/usr.sbin/ntp/sntp/Makefile @@ -23,7 +23,9 @@ CFLAGS+= -I${.CURDIR}/../../../contrib/ntp/include \ LIBADD= m opts ntp ntpevent pthread .if ${MK_OPENSSL} != "no" -LIBADD+= md ssl crypto +LIBADD+= crypto +.else +LIBADD+= md .endif .include diff --git a/usr.sbin/pmcstat/pmcstat.8 b/usr.sbin/pmcstat/pmcstat.8 index 9a204a405493..25ff7a6d9ffd 100644 --- a/usr.sbin/pmcstat/pmcstat.8 +++ b/usr.sbin/pmcstat/pmcstat.8 @@ -25,7 +25,7 @@ .\" .\" $FreeBSD$ .\" -.Dd March 27, 2015 +.Dd May 27, 2015 .Dt PMCSTAT 8 .Os .Sh NAME @@ -246,8 +246,8 @@ Argument .Ar cpu-spec is a comma separated list of CPU numbers, or the literal .Sq * -denoting all unhalted CPUs. -The default is to allocate system mode PMCs on all unhalted +denoting all available CPUs. +The default is to allocate system mode PMCs on all available CPUs. .It Fl d Toggle between process mode PMCs measuring events for the target @@ -279,8 +279,9 @@ Set the pathname of the kernel directory to argument This directory specifies where .Nm should look for the kernel and its modules. -The default is -.Pa /boot/kernel . +The default is to use the path of the running kernel obtained from the +.Va kern.bootfile +sysctl. .It Fl l Ar secs Set system-wide performance measurement duration for .Ar secs diff --git a/usr.sbin/pmcstat/pmcstat.c b/usr.sbin/pmcstat/pmcstat.c index 77613b409c75..c51c5fa6daf0 100644 --- a/usr.sbin/pmcstat/pmcstat.c +++ b/usr.sbin/pmcstat/pmcstat.c @@ -116,11 +116,10 @@ struct pmcstat_args args; static void pmcstat_clone_event_descriptor(struct pmcstat_ev *ev, const cpuset_t *cpumask) { - int cpu, mcpu; + int cpu; struct pmcstat_ev *ev_clone; - mcpu = sizeof(*cpumask) * NBBY; - for (cpu = 0; cpu < mcpu; cpu++) { + for (cpu = 0; cpu < CPU_SETSIZE; cpu++) { if (!CPU_ISSET(cpu, cpumask)) continue; @@ -161,6 +160,7 @@ pmcstat_get_cpumask(const char *cpuspec, cpuset_t *cpumask) CPU_SET(cpu, cpumask); s = end + strspn(end, ", \t"); } while (*s); + assert(!CPU_EMPTY(cpumask)); } void @@ -550,14 +550,14 @@ pmcstat_topexit(void) int main(int argc, char **argv) { - cpuset_t cpumask; + cpuset_t cpumask, rootmask; double interval; double duration; - int hcpu, option, npmc, ncpu; + int option, npmc; int c, check_driver_stats, current_sampling_count; int do_callchain, do_descendants, do_logproccsw, do_logprocexit; int do_print, do_read; - size_t dummy; + size_t len; int graphdepth; int pipefd[2], rfd; int use_cumulative_counts; @@ -586,7 +586,6 @@ main(int argc, char **argv) args.pa_verbosity = 1; args.pa_logfd = -1; args.pa_fsroot = ""; - args.pa_kernel = strdup("/boot/kernel"); args.pa_samplesdir = "."; args.pa_printfile = stderr; args.pa_graphdepth = DEFAULT_CALLGRAPH_DEPTH; @@ -610,15 +609,22 @@ main(int argc, char **argv) ev = NULL; CPU_ZERO(&cpumask); + /* Default to using the running system kernel. */ + len = 0; + if (sysctlbyname("kern.bootfile", NULL, &len, NULL, 0) == -1) + err(EX_OSERR, "ERROR: Cannot determine path of running kernel"); + args.pa_kernel = malloc(len + 1); + if (sysctlbyname("kern.bootfile", args.pa_kernel, &len, NULL, 0) == -1) + err(EX_OSERR, "ERROR: Cannot determine path of running kernel"); + /* - * The initial CPU mask specifies all non-halted CPUS in the - * system. + * The initial CPU mask specifies the root mask of this process + * which is usually all CPUs in the system. */ - dummy = sizeof(int); - if (sysctlbyname("hw.ncpu", &ncpu, &dummy, NULL, 0) < 0) - err(EX_OSERR, "ERROR: Cannot determine the number of CPUs"); - for (hcpu = 0; hcpu < ncpu; hcpu++) - CPU_SET(hcpu, &cpumask); + if (cpuset_getaffinity(CPU_LEVEL_ROOT, CPU_WHICH_PID, -1, + sizeof(rootmask), &rootmask) == -1) + err(EX_OSERR, "ERROR: Cannot determine the root set of CPUs"); + CPU_COPY(&rootmask, &cpumask); while ((option = getopt(argc, argv, "CD:EF:G:M:NO:P:R:S:TWa:c:df:gk:l:m:n:o:p:qr:s:t:vw:z:")) != -1) @@ -635,11 +641,9 @@ main(int argc, char **argv) break; case 'c': /* CPU */ - - if (optarg[0] == '*' && optarg[1] == '\0') { - for (hcpu = 0; hcpu < ncpu; hcpu++) - CPU_SET(hcpu, &cpumask); - } else + if (optarg[0] == '*' && optarg[1] == '\0') + CPU_COPY(&rootmask, &cpumask); + else pmcstat_get_cpumask(optarg, &cpumask); args.pa_flags |= FLAGS_HAS_CPUMASK; @@ -764,13 +768,9 @@ main(int argc, char **argv) else ev->ev_count = -1; - if (option == 'S' || option == 's') { - hcpu = sizeof(cpumask) * NBBY; - for (hcpu--; hcpu >= 0; hcpu--) - if (CPU_ISSET(hcpu, &cpumask)) - break; - ev->ev_cpu = hcpu; - } else + if (option == 'S' || option == 's') + ev->ev_cpu = CPU_FFS(&cpumask); + else ev->ev_cpu = PMC_CPU_ANY; ev->ev_flags = 0; @@ -797,11 +797,9 @@ main(int argc, char **argv) STAILQ_INSERT_TAIL(&args.pa_events, ev, ev_next); if (option == 's' || option == 'S') { - hcpu = CPU_ISSET(ev->ev_cpu, &cpumask); CPU_CLR(ev->ev_cpu, &cpumask); pmcstat_clone_event_descriptor(ev, &cpumask); - if (hcpu != 0) - CPU_SET(ev->ev_cpu, &cpumask); + CPU_SET(ev->ev_cpu, &cpumask); } break; @@ -1061,33 +1059,31 @@ main(int argc, char **argv) ); /* - * Check if "-k kerneldir" was specified, and if whether - * 'kerneldir' actually refers to a file. If so, use - * `dirname path` to determine the kernel directory. + * Check if 'kerneldir' refers to a file rather than a + * directory. If so, use `dirname path` to determine the + * kernel directory. */ - if (args.pa_flags & FLAG_HAS_KERNELPATH) { - (void) snprintf(buffer, sizeof(buffer), "%s%s", args.pa_fsroot, - args.pa_kernel); + (void) snprintf(buffer, sizeof(buffer), "%s%s", args.pa_fsroot, + args.pa_kernel); + if (stat(buffer, &sb) < 0) + err(EX_OSERR, "ERROR: Cannot locate kernel \"%s\"", + buffer); + if (!S_ISREG(sb.st_mode) && !S_ISDIR(sb.st_mode)) + errx(EX_USAGE, "ERROR: \"%s\": Unsupported file type.", + buffer); + if (!S_ISDIR(sb.st_mode)) { + tmp = args.pa_kernel; + args.pa_kernel = strdup(dirname(args.pa_kernel)); + free(tmp); + (void) snprintf(buffer, sizeof(buffer), "%s%s", + args.pa_fsroot, args.pa_kernel); if (stat(buffer, &sb) < 0) - err(EX_OSERR, "ERROR: Cannot locate kernel \"%s\"", + err(EX_OSERR, "ERROR: Cannot stat \"%s\"", buffer); - if (!S_ISREG(sb.st_mode) && !S_ISDIR(sb.st_mode)) - errx(EX_USAGE, "ERROR: \"%s\": Unsupported file type.", + if (!S_ISDIR(sb.st_mode)) + errx(EX_USAGE, + "ERROR: \"%s\" is not a directory.", buffer); - if (!S_ISDIR(sb.st_mode)) { - tmp = args.pa_kernel; - args.pa_kernel = strdup(dirname(args.pa_kernel)); - free(tmp); - (void) snprintf(buffer, sizeof(buffer), "%s%s", - args.pa_fsroot, args.pa_kernel); - if (stat(buffer, &sb) < 0) - err(EX_OSERR, "ERROR: Cannot stat \"%s\"", - buffer); - if (!S_ISDIR(sb.st_mode)) - errx(EX_USAGE, - "ERROR: \"%s\" is not a directory.", - buffer); - } } /* diff --git a/usr.sbin/pmcstat/pmcstat_log.c b/usr.sbin/pmcstat/pmcstat_log.c index 40de320f17a1..fbc358d6129d 100644 --- a/usr.sbin/pmcstat/pmcstat_log.c +++ b/usr.sbin/pmcstat/pmcstat_log.c @@ -716,7 +716,8 @@ pmcstat_image_get_elf_params(struct pmcstat_image *image) ph.p_offset); break; case PT_LOAD: - if ((ph.p_offset & (-ph.p_align)) == 0) + if ((ph.p_flags & PF_X) != 0 && + (ph.p_offset & (-ph.p_align)) == 0) image->pi_vaddr = ph.p_vaddr & (-ph.p_align); break; } @@ -1531,7 +1532,9 @@ pmcstat_analyze_log(void) free(ppm); } - /* associate this process image */ + /* + * Associate this process image. + */ image_path = pmcstat_string_intern( ev.pl_u.pl_x.pl_pathname); assert(image_path != NULL); diff --git a/usr.sbin/pw/Makefile b/usr.sbin/pw/Makefile index 269b145ece15..69953da1a6a6 100644 --- a/usr.sbin/pw/Makefile +++ b/usr.sbin/pw/Makefile @@ -8,7 +8,7 @@ SRCS= pw.c pw_conf.c pw_user.c pw_group.c pw_log.c pw_nis.c pw_vpw.c \ WARNS?= 2 -LIBADD= crypt util +LIBADD= crypt util sbuf .include diff --git a/usr.sbin/pw/fileupd.c b/usr.sbin/pw/fileupd.c index 7df4bb190cbb..dc327123a0fd 100644 --- a/usr.sbin/pw/fileupd.c +++ b/usr.sbin/pw/fileupd.c @@ -29,31 +29,10 @@ static const char rcsid[] = "$FreeBSD$"; #endif /* not lint */ -#include -#include #include -#include -#include -#include -#include -#include -#include #include "pwupd.h" -int -extendline(char **buf, int * buflen, int needed) -{ - if (needed > *buflen) { - char *tmp = realloc(*buf, needed); - if (tmp == NULL) - return -1; - *buf = tmp; - *buflen = needed; - } - return *buflen; -} - int extendarray(char ***buf, int * buflen, int needed) { diff --git a/usr.sbin/pw/grupd.c b/usr.sbin/pw/grupd.c index 3f78e95d1691..74cc390ba06a 100644 --- a/usr.sbin/pw/grupd.c +++ b/usr.sbin/pw/grupd.c @@ -35,10 +35,6 @@ static const char rcsid[] = #include #include #include -#include -#include -#include -#include #include #include "pwupd.h" diff --git a/usr.sbin/pw/pw_conf.c b/usr.sbin/pw/pw_conf.c index 1289b3e07647..99d3e8fdbec1 100644 --- a/usr.sbin/pw/pw_conf.c +++ b/usr.sbin/pw/pw_conf.c @@ -29,9 +29,12 @@ static const char rcsid[] = "$FreeBSD$"; #endif /* not lint */ +#include +#include #include #include #include +#include #include "pw.h" @@ -209,20 +212,17 @@ boolean_str(int val) char * newstr(char const * p) { - char *q = NULL; + char *q; - if ((p = unquote(p)) != NULL) { - int l = strlen(p) + 1; + if ((p = unquote(p)) == NULL) + return (NULL); - if ((q = malloc(l)) != NULL) - memcpy(q, p, l); - } - return q; + if ((q = strdup(p)) == NULL) + err(1, "strdup()"); + + return (q); } -#define LNBUFSZ 1024 - - struct userconf * read_userconfig(char const * file) { @@ -234,8 +234,10 @@ read_userconfig(char const * file) buf = NULL; linecap = 0; - extendarray(&config.groups, &config.numgroups, 200); - memset(config.groups, 0, config.numgroups * sizeof(char *)); + config.numgroups = 200; + config.groups = calloc(config.numgroups, sizeof(char *)); + if (config.groups == NULL) + err(1, "calloc()"); if (file == NULL) file = _PATH_PW_CONF; @@ -366,138 +368,132 @@ int write_userconfig(char const * file) { int fd; + int i, j; + struct sbuf *buf; + FILE *fp; if (file == NULL) file = _PATH_PW_CONF; - if ((fd = open(file, O_CREAT | O_RDWR | O_TRUNC | O_EXLOCK, 0644)) != -1) { - FILE *fp; + if ((fd = open(file, O_CREAT|O_RDWR|O_TRUNC|O_EXLOCK, 0644)) == -1) + return (0); - if ((fp = fdopen(fd, "w")) == NULL) - close(fd); - else { - int i, j, k; - int len = LNBUFSZ; - char *buf = malloc(len); + if ((fp = fdopen(fd, "w")) == NULL) { + close(fd); + return (0); + } + + buf = sbuf_new_auto(); + for (i = _UC_NONE; i < _UC_FIELDS; i++) { + int quote = 1; - for (i = _UC_NONE; i < _UC_FIELDS; i++) { - int quote = 1; - char const *val = buf; + sbuf_clear(buf); + switch (i) { + case _UC_DEFAULTPWD: + sbuf_cat(buf, boolean_str(config.default_password)); + break; + case _UC_REUSEUID: + sbuf_cat(buf, boolean_str(config.reuse_uids)); + break; + case _UC_REUSEGID: + sbuf_cat(buf, boolean_str(config.reuse_gids)); + break; + case _UC_NISPASSWD: + sbuf_cat(buf, config.nispasswd ? config.nispasswd : + ""); + quote = 0; + break; + case _UC_DOTDIR: + sbuf_cat(buf, config.dotdir ? config.dotdir : + boolean_str(0)); + break; + case _UC_NEWMAIL: + sbuf_cat(buf, config.newmail ? config.newmail : + boolean_str(0)); + break; + case _UC_LOGFILE: + sbuf_cat(buf, config.logfile ? config.logfile : + boolean_str(0)); + break; + case _UC_HOMEROOT: + sbuf_cat(buf, config.home); + break; + case _UC_HOMEMODE: + sbuf_printf(buf, "%04o", config.homemode); + quote = 0; + break; + case _UC_SHELLPATH: + sbuf_cat(buf, config.shelldir); + break; + case _UC_SHELLS: + for (j = 0; j < _UC_MAXSHELLS && + system_shells[j] != NULL; j++) + sbuf_printf(buf, "%s\"%s\"", j ? + "," : "", system_shells[j]); + quote = 0; + break; + case _UC_DEFAULTSHELL: + sbuf_cat(buf, config.shell_default ? + config.shell_default : bourne_shell); + break; + case _UC_DEFAULTGROUP: + sbuf_cat(buf, config.default_group ? + config.default_group : ""); + break; + case _UC_EXTRAGROUPS: + for (j = 0; j < config.numgroups && + config.groups[j] != NULL; j++) + sbuf_printf(buf, "%s\"%s\"", j ? + "," : "", config.groups[j]); + quote = 0; + break; + case _UC_DEFAULTCLASS: + sbuf_cat(buf, config.default_class ? + config.default_class : ""); + break; + case _UC_MINUID: + sbuf_printf(buf, "%lu", (unsigned long) config.min_uid); + quote = 0; + break; + case _UC_MAXUID: + sbuf_printf(buf, "%lu", (unsigned long) config.max_uid); + quote = 0; + break; + case _UC_MINGID: + sbuf_printf(buf, "%lu", (unsigned long) config.min_gid); + quote = 0; + break; + case _UC_MAXGID: + sbuf_printf(buf, "%lu", (unsigned long) config.max_gid); + quote = 0; + break; + case _UC_EXPIRE: + sbuf_printf(buf, "%d", config.expire_days); + quote = 0; + break; + case _UC_PASSWORD: + sbuf_printf(buf, "%d", config.password_days); + quote = 0; + break; + case _UC_NONE: + break; + } + sbuf_finish(buf); - *buf = '\0'; - switch (i) { - case _UC_DEFAULTPWD: - val = boolean_str(config.default_password); - break; - case _UC_REUSEUID: - val = boolean_str(config.reuse_uids); - break; - case _UC_REUSEGID: - val = boolean_str(config.reuse_gids); - break; - case _UC_NISPASSWD: - val = config.nispasswd ? config.nispasswd : ""; - quote = 0; - break; - case _UC_DOTDIR: - val = config.dotdir ? config.dotdir : boolean_str(0); - break; - case _UC_NEWMAIL: - val = config.newmail ? config.newmail : boolean_str(0); - break; - case _UC_LOGFILE: - val = config.logfile ? config.logfile : boolean_str(0); - break; - case _UC_HOMEROOT: - val = config.home; - break; - case _UC_HOMEMODE: - sprintf(buf, "%04o", config.homemode); - quote = 0; - break; - case _UC_SHELLPATH: - val = config.shelldir; - break; - case _UC_SHELLS: - for (j = k = 0; j < _UC_MAXSHELLS && system_shells[j] != NULL; j++) { - char lbuf[64]; - int l = snprintf(lbuf, sizeof lbuf, "%s\"%s\"", k ? "," : "", system_shells[j]); - if (l < 0) - l = 0; - if (l + k + 1 < len || extendline(&buf, &len, len + LNBUFSZ) != -1) { - strcpy(buf + k, lbuf); - k += l; - } - } - quote = 0; - break; - case _UC_DEFAULTSHELL: - val = config.shell_default ? config.shell_default : bourne_shell; - break; - case _UC_DEFAULTGROUP: - val = config.default_group ? config.default_group : ""; - break; - case _UC_EXTRAGROUPS: - extendarray(&config.groups, &config.numgroups, 200); - for (j = k = 0; j < config.numgroups && config.groups[j] != NULL; j++) { - char lbuf[64]; - int l = snprintf(lbuf, sizeof lbuf, "%s\"%s\"", k ? "," : "", config.groups[j]); - if (l < 0) - l = 0; - if (l + k + 1 < len || extendline(&buf, &len, len + 1024) != -1) { - strcpy(buf + k, lbuf); - k += l; - } - } - quote = 0; - break; - case _UC_DEFAULTCLASS: - val = config.default_class ? config.default_class : ""; - break; - case _UC_MINUID: - sprintf(buf, "%lu", (unsigned long) config.min_uid); - quote = 0; - break; - case _UC_MAXUID: - sprintf(buf, "%lu", (unsigned long) config.max_uid); - quote = 0; - break; - case _UC_MINGID: - sprintf(buf, "%lu", (unsigned long) config.min_gid); - quote = 0; - break; - case _UC_MAXGID: - sprintf(buf, "%lu", (unsigned long) config.max_gid); - quote = 0; - break; - case _UC_EXPIRE: - sprintf(buf, "%d", config.expire_days); - quote = 0; - break; - case _UC_PASSWORD: - sprintf(buf, "%d", config.password_days); - quote = 0; - break; - case _UC_NONE: - break; - } + if (comments[i]) + fputs(comments[i], fp); - if (comments[i]) - fputs(comments[i], fp); - - if (*kwds[i]) { - if (quote) - fprintf(fp, "%s = \"%s\"\n", kwds[i], val); - else - fprintf(fp, "%s = %s\n", kwds[i], val); + if (*kwds[i]) { + if (quote) + fprintf(fp, "%s = \"%s\"\n", kwds[i], + sbuf_data(buf)); + else + fprintf(fp, "%s = %s\n", kwds[i], sbuf_data(buf)); #if debugging - printf("WROTE: %s = %s\n", kwds[i], val); + printf("WROTE: %s = %s\n", kwds[i], sbuf_data(buf)); #endif - } - } - free(buf); - return fclose(fp) != EOF; } } - return 0; + sbuf_delete(buf); + return (fclose(fp) != EOF); } diff --git a/usr.sbin/pw/pw_nis.c b/usr.sbin/pw/pw_nis.c index 918fc306e6c6..c786cc7ba4dc 100644 --- a/usr.sbin/pw/pw_nis.c +++ b/usr.sbin/pw/pw_nis.c @@ -29,9 +29,6 @@ static const char rcsid[] = "$FreeBSD$"; #endif /* not lint */ -#include -#include -#include #include #include #include diff --git a/usr.sbin/pw/pw_user.c b/usr.sbin/pw/pw_user.c index 483148af4909..b058aab6bff2 100644 --- a/usr.sbin/pw/pw_user.c +++ b/usr.sbin/pw/pw_user.c @@ -40,7 +40,6 @@ static const char rcsid[] = #include #include #include -#include #include #include #include @@ -185,8 +184,7 @@ pw_user(struct userconf * cnf, int mode, struct cargs * args) * But we create a symlink from cnf->home -> "/usr" -> cnf->home */ if (strchr(cnf->home+1, '/') == NULL) { - strcpy(dbuf, "/usr"); - strncat(dbuf, cnf->home, MAXPATHLEN-5); + snprintf(dbuf, MAXPATHLEN, "/usr%s", cnf->home); if (mkdir(dbuf, _DEF_DIRMODE) != -1 || errno == EEXIST) { chown(dbuf, 0, 0); /* @@ -364,11 +362,9 @@ pw_user(struct userconf * cnf, int mode, struct cargs * args) if (mode == M_LOCK) { if (strncmp(pwd->pw_passwd, locked_str, sizeof(locked_str)-1) == 0) errx(EX_DATAERR, "user '%s' is already locked", pwd->pw_name); - passtmp = malloc(strlen(pwd->pw_passwd) + sizeof(locked_str)); + asprintf(&passtmp, "%s%s", locked_str, pwd->pw_passwd); if (passtmp == NULL) /* disaster */ errx(EX_UNAVAILABLE, "out of memory"); - strcpy(passtmp, locked_str); - strcat(passtmp, pwd->pw_passwd); pwd->pw_passwd = passtmp; edited = 1; } else if (mode == M_UNLOCK) { @@ -401,7 +397,7 @@ pw_user(struct userconf * cnf, int mode, struct cargs * args) */ snprintf(file, sizeof(file), "/var/cron/tabs/%s", pwd->pw_name); if (access(file, F_OK) == 0) { - sprintf(file, "crontab -u %s -r", pwd->pw_name); + snprintf(file, sizeof(file), "crontab -u %s -r", pwd->pw_name); system(file); } } @@ -409,7 +405,7 @@ pw_user(struct userconf * cnf, int mode, struct cargs * args) * Save these for later, since contents of pwd may be * invalidated by deletion */ - sprintf(file, "%s/%s", _PATH_MAILDIR, pwd->pw_name); + snprintf(file, sizeof(file), "%s/%s", _PATH_MAILDIR, pwd->pw_name); strlcpy(home, pwd->pw_dir, sizeof(home)); gr = GETGRGID(pwd->pw_gid); if (gr != NULL) @@ -815,7 +811,7 @@ pw_user(struct userconf * cnf, int mode, struct cargs * args) */ if (mode == M_ADD) { if (!PWALTDIR()) { - sprintf(line, "%s/%s", _PATH_MAILDIR, pwd->pw_name); + snprintf(line, sizeof(line), "%s/%s", _PATH_MAILDIR, pwd->pw_name); close(open(line, O_RDWR | O_CREAT, 0600)); /* Preserve contents & * mtime */ chown(line, pwd->pw_uid, pwd->pw_gid); @@ -959,7 +955,7 @@ pw_gidpolicy(struct userconf * cnf, struct cargs * args, char *nam, gid_t prefer * function will happily handle that case for us and exit. */ if (GETGRGID(prefer) == NULL) { - sprintf(tmp, "%lu", (unsigned long) prefer); + snprintf(tmp, sizeof(tmp), "%u", prefer); addarg(&grpargs, 'g', tmp); } if (getarg(args, 'N')) @@ -1022,17 +1018,16 @@ static char * pw_homepolicy(struct userconf * cnf, struct cargs * args, char const * user) { struct carg *arg = getarg(args, 'd'); + static char home[128]; if (arg) - return arg->val; - else { - static char home[128]; + return (arg->val); - if (cnf->home == NULL || *cnf->home == '\0') - errx(EX_CONFIG, "no base home directory set"); - sprintf(home, "%s/%s", cnf->home, user); - return home; - } + if (cnf->home == NULL || *cnf->home == '\0') + errx(EX_CONFIG, "no base home directory set"); + snprintf(home, sizeof(home), "%s/%s", cnf->home, user); + + return (home); } static char * @@ -1053,12 +1048,12 @@ shell_path(char const * path, char *shells[], char *sh) static char shellpath[256]; if (sh != NULL) { - sprintf(shellpath, "%s/%s", p, sh); + snprintf(shellpath, sizeof(shellpath), "%s/%s", p, sh); if (access(shellpath, X_OK) == 0) return shellpath; } else for (i = 0; i < _UC_MAXSHELLS && shells[i] != NULL; i++) { - sprintf(shellpath, "%s/%s", p, shells[i]); + snprintf(shellpath, sizeof(shellpath), "%s/%s", p, shells[i]); if (access(shellpath, X_OK) == 0) return shellpath; } @@ -1308,7 +1303,7 @@ rmat(uid_t uid) st.st_uid == uid) { char tmp[MAXPATHLEN]; - sprintf(tmp, "/usr/bin/atrm %s", e->d_name); + snprintf(tmp, sizeof(tmp), "/usr/bin/atrm %s", e->d_name); system(tmp); } } diff --git a/usr.sbin/pw/pwupd.c b/usr.sbin/pw/pwupd.c index c2a9a535ec45..710e901cb061 100644 --- a/usr.sbin/pw/pwupd.c +++ b/usr.sbin/pw/pwupd.c @@ -33,7 +33,6 @@ static const char rcsid[] = #include #include #include -#include #include #include #include @@ -52,12 +51,13 @@ int setpwdir(const char * dir) { if (dir == NULL) - return -1; + return (-1); else pwpath = strdup(dir); if (pwpath == NULL) - return -1; - return 0; + return (-1); + + return (0); } char * @@ -66,23 +66,20 @@ getpwpath(char const * file) static char pathbuf[MAXPATHLEN]; snprintf(pathbuf, sizeof pathbuf, "%s/%s", pwpath, file); - return pathbuf; + + return (pathbuf); } static int -pwdb(char *arg,...) +pwdb_check(void) { int i = 0; pid_t pid; - va_list ap; char *args[10]; args[i++] = _PATH_PWD_MKDB; - va_start(ap, arg); - while (i < 6 && arg != NULL) { - args[i++] = arg; - arg = va_arg(ap, char *); - } + args[i++] = "-C"; + if (pwpath != pathpwd) { args[i++] = "-d"; args[i++] = pwpath; @@ -100,65 +97,66 @@ pwdb(char *arg,...) if (WEXITSTATUS(i)) i = EIO; } - va_end(ap); - return i; + + return (i); } static int pw_update(struct passwd * pwd, char const * user) { - int rc = 0; + struct passwd *pw = NULL; + struct passwd *old_pw = NULL; + int rc, pfd, tfd; - rc = pwdb("-C", (char *)NULL); /* Check only */ - if (rc == 0) { - int pfd, tfd; - struct passwd *pw = NULL; - struct passwd *old_pw = NULL; + if ((rc = pwdb_check()) != 0) + return (rc); - if (pwd != NULL) - pw = pw_dup(pwd); + if (pwd != NULL) + pw = pw_dup(pwd); - if (user != NULL) - old_pw = GETPWNAM(user); + if (user != NULL) + old_pw = GETPWNAM(user); - if (pw_init(pwpath, NULL)) - err(1, "pw_init()"); - if ((pfd = pw_lock()) == -1) { - pw_fini(); - err(1, "pw_lock()"); - } - if ((tfd = pw_tmp(-1)) == -1) { - pw_fini(); - err(1, "pw_tmp()"); - } - if (pw_copy(pfd, tfd, pw, old_pw) == -1) { - pw_fini(); - err(1, "pw_copy()"); - } - /* - * in case of deletion of a user, the whole database - * needs to be regenerated - */ - if (pw_mkdb(pw != NULL ? pw->pw_name : NULL) == -1) { - pw_fini(); - err(1, "pw_mkdb()"); - } - free(pw); + if (pw_init(pwpath, NULL)) + err(1, "pw_init()"); + if ((pfd = pw_lock()) == -1) { pw_fini(); + err(1, "pw_lock()"); } - return 0; + if ((tfd = pw_tmp(-1)) == -1) { + pw_fini(); + err(1, "pw_tmp()"); + } + if (pw_copy(pfd, tfd, pw, old_pw) == -1) { + pw_fini(); + err(1, "pw_copy()"); + } + /* + * in case of deletion of a user, the whole database + * needs to be regenerated + */ + if (pw_mkdb(pw != NULL ? pw->pw_name : NULL) == -1) { + pw_fini(); + err(1, "pw_mkdb()"); + } + free(pw); + pw_fini(); + + return (0); } int addpwent(struct passwd * pwd) { - return pw_update(pwd, NULL); + + return (pw_update(pwd, NULL)); } int chgpwent(char const * login, struct passwd * pwd) { - return pw_update(pwd, login); + + return (pw_update(pwd, login)); } int @@ -167,5 +165,6 @@ delpwent(struct passwd * pwd) char login[MAXLOGNAME]; strlcpy(login, pwd->pw_name, MAXLOGNAME); - return pw_update(NULL, login); + + return (pw_update(NULL, login)); } diff --git a/usr.sbin/pw/pwupd.h b/usr.sbin/pw/pwupd.h index 200ffeec751c..d6e39ce99b0e 100644 --- a/usr.sbin/pw/pwupd.h +++ b/usr.sbin/pw/pwupd.h @@ -112,10 +112,7 @@ void vendgrent(void); void copymkdir(char const * dir, char const * skel, mode_t mode, uid_t uid, gid_t gid); void rm_r(char const * dir, uid_t uid); -int extendline(char **buf, int *buflen, int needed); int extendarray(char ***buf, int *buflen, int needed); __END_DECLS -#define PWBUFSZ 1024 - #endif /* !_PWUPD_H */ diff --git a/usr.sbin/syslogd/pathnames.h b/usr.sbin/syslogd/pathnames.h index 24fbc4cfa0ad..00631e0e4bf2 100644 --- a/usr.sbin/syslogd/pathnames.h +++ b/usr.sbin/syslogd/pathnames.h @@ -30,8 +30,6 @@ * $FreeBSD$ */ -#include - #define _PATH_KLOG "/dev/klog" #define _PATH_LOGCONF "/etc/syslog.conf" #define _PATH_LOGPID "/var/run/syslog.pid" diff --git a/usr.sbin/uefisign/pe.c b/usr.sbin/uefisign/pe.c index 26bb6d51b511..f4695b4a4dc9 100644 --- a/usr.sbin/uefisign/pe.c +++ b/usr.sbin/uefisign/pe.c @@ -346,7 +346,9 @@ static void parse_optional_32_plus(struct executable *x, off_t off, int number_of_sections) { +#if 0 uint32_t computed_checksum; +#endif const struct pe_optional_header_32_plus *po; range_check(x, off, sizeof(*po), "PE Optional Header"); @@ -373,13 +375,13 @@ parse_optional_32_plus(struct executable *x, off_t off, #if 0 printf("checksum 0x%x at offset %zd, len %zd\n", po->po_checksum, x->x_checksum_off, x->x_checksum_len); -#endif computed_checksum = compute_checksum(x); if (computed_checksum != po->po_checksum) { warnx("invalid PE+ checksum; is 0x%x, should be 0x%x", po->po_checksum, computed_checksum); } +#endif if (x->x_len < x->x_headers_len) errx(1, "invalid SizeOfHeaders %d", po->po_size_of_headers); @@ -393,7 +395,9 @@ parse_optional_32_plus(struct executable *x, off_t off, static void parse_optional_32(struct executable *x, off_t off, int number_of_sections) { +#if 0 uint32_t computed_checksum; +#endif const struct pe_optional_header_32 *po; range_check(x, off, sizeof(*po), "PE Optional Header"); @@ -420,13 +424,13 @@ parse_optional_32(struct executable *x, off_t off, int number_of_sections) #if 0 printf("checksum at offset %zd, len %zd\n", x->x_checksum_off, x->x_checksum_len); -#endif computed_checksum = compute_checksum(x); if (computed_checksum != po->po_checksum) { warnx("invalid PE checksum; is 0x%x, should be 0x%x", po->po_checksum, computed_checksum); } +#endif if (x->x_len < x->x_headers_len) errx(1, "invalid SizeOfHeaders %d", po->po_size_of_headers);