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Fix mips build after introduction of MD definitions of atomic_load_64

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and atomic_store_64.

The MD definitions are provided for LP64 only, while mips also uses
them for 32bit and n32.  Only define mips variants for 32bit and n32
and change the syntax to match common definitions.

Note that this commit does not fix 32bit asm implementation to follow
new KBI, this will be fixed later.  The functions are only used for 8
byte ddb accesses so the known bug does not prevent normal kernel
operations.

Sponsored by:	The FreeBSD Foundation
This commit is contained in:
Konstantin Belousov 2017-12-21 23:39:00 +00:00
parent 95c8838c2a
commit 37f48d5aba
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=327074
2 changed files with 15 additions and 14 deletions
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17
sys/mips/include/atomic.h
View File

@ -342,20 +342,21 @@ atomic_store_rel_##WIDTH(__volatile uint##WIDTH##_t *p, uint##WIDTH##_t v)\
ATOMIC_STORE_LOAD(32)
ATOMIC_STORE_LOAD(64)
#if !defined(__mips_n64) && !defined(__mips_n32)
void atomic_store_64(__volatile uint64_t *, uint64_t *);
void atomic_load_64(__volatile uint64_t *, uint64_t *);
#else
void atomic_store_64(__volatile uint64_t *, uint64_t);
uint64_t atomic_load_64(__volatile uint64_t *);
#elif defined (__mips_n32)
static __inline void
atomic_store_64(__volatile uint64_t *p, uint64_t *v)
atomic_store_64(__volatile uint64_t *p, uint64_t v)
{
*p = *v;
*p = v;
}
static __inline void
atomic_load_64(__volatile uint64_t *p, uint64_t *v)
static __inline uint64_t
atomic_load_64(__volatile uint64_t *p)
{
*v = *p;
return (*p);
}
/* #else atomic_common.h definitions of atomic_load/store_64 are used */
#endif
#undef ATOMIC_STORE_LOAD

12
sys/mips/mips/db_interface.c
View File

@ -164,9 +164,9 @@ db_read_bytes(vm_offset_t addr, size_t size, char *data)
*(uint32_t *)data = *(uint32_t *)addr;
break;
case 8:
atomic_load_64((volatile u_int64_t *)addr,
(u_int64_t *)data);
break;
*(uint64_t *)data = atomic_load_64(
(void *)addr);
break;
}
} else {
char *src;
@ -207,9 +207,9 @@ db_write_bytes(vm_offset_t addr, size_t size, char *data)
*(uint32_t *)addr = *(uint32_t *)data;
break;
case 8:
atomic_store_64((volatile u_int64_t *)addr,
(u_int64_t *)data);
break;
atomic_store_64((uint64_t *)addr,
*(uint64_t *)data);
break;
}
} else {
char *dst;