Fix mips build after introduction of MD definitions of atomic_load_64
and atomic_store_64. The MD definitions are provided for LP64 only, while mips also uses them for 32bit and n32. Only define mips variants for 32bit and n32 and change the syntax to match common definitions. Note that this commit does not fix 32bit asm implementation to follow new KBI, this will be fixed later. The functions are only used for 8 byte ddb accesses so the known bug does not prevent normal kernel operations. Sponsored by: The FreeBSD Foundation
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=327074
@ -342,20 +342,21 @@ atomic_store_rel_##WIDTH(__volatile uint##WIDTH##_t *p, uint##WIDTH##_t v)\
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ATOMIC_STORE_LOAD(32)
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ATOMIC_STORE_LOAD(64)
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#if !defined(__mips_n64) && !defined(__mips_n32)
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void atomic_store_64(__volatile uint64_t *, uint64_t *);
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void atomic_load_64(__volatile uint64_t *, uint64_t *);
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#else
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void atomic_store_64(__volatile uint64_t *, uint64_t);
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uint64_t atomic_load_64(__volatile uint64_t *);
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#elif defined (__mips_n32)
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static __inline void
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atomic_store_64(__volatile uint64_t *p, uint64_t *v)
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atomic_store_64(__volatile uint64_t *p, uint64_t v)
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{
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*p = *v;
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*p = v;
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}
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static __inline void
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atomic_load_64(__volatile uint64_t *p, uint64_t *v)
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static __inline uint64_t
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atomic_load_64(__volatile uint64_t *p)
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{
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*v = *p;
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return (*p);
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}
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/* #else atomic_common.h definitions of atomic_load/store_64 are used */
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#endif
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#undef ATOMIC_STORE_LOAD
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@ -164,9 +164,9 @@ db_read_bytes(vm_offset_t addr, size_t size, char *data)
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*(uint32_t *)data = *(uint32_t *)addr;
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break;
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case 8:
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atomic_load_64((volatile u_int64_t *)addr,
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(u_int64_t *)data);
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break;
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*(uint64_t *)data = atomic_load_64(
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(void *)addr);
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break;
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}
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} else {
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char *src;
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@ -207,9 +207,9 @@ db_write_bytes(vm_offset_t addr, size_t size, char *data)
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*(uint32_t *)addr = *(uint32_t *)data;
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break;
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case 8:
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atomic_store_64((volatile u_int64_t *)addr,
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(u_int64_t *)data);
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break;
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atomic_store_64((uint64_t *)addr,
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*(uint64_t *)data);
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break;
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}
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} else {
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char *dst;
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