Made the array vec[] a global.

This allows the APIC code to reorder the vectors at runtime.
This commit is contained in:
Steve Passe 1997-05-25 16:55:26 +00:00
parent 6b35fac151
commit 383243e687
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=26129
6 changed files with 24 additions and 27 deletions

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@ -34,7 +34,7 @@
* SUCH DAMAGE. * SUCH DAMAGE.
* *
* from: @(#)clock.c 7.2 (Berkeley) 5/12/91 * from: @(#)clock.c 7.2 (Berkeley) 5/12/91
* $Id: clock.c,v 1.82 1997/05/04 14:25:00 peter Exp $ * $Id: clock.c,v 1.83 1997/05/05 09:34:32 peter Exp $
*/ */
/* /*
@ -829,7 +829,7 @@ resettodr()
#if defined(APIC_IO) #if defined(APIC_IO)
/* from icu.s: */ /* from icu.s: */
extern u_int hwisrs[]; extern u_int vec[];
extern void vec8254 __P((void)); extern void vec8254 __P((void));
extern void vecRTC __P((void)); extern void vecRTC __P((void));
extern u_int ivectors[]; extern u_int ivectors[];
@ -894,7 +894,7 @@ cpu_initclocks()
} }
} }
hwisrs[x] = (u_int)vec8254; vec[x] = (u_int)vec8254;
Xintr8254 = (u_int)ivectors[x]; /* XXX might need Xfastintr# */ Xintr8254 = (u_int)ivectors[x]; /* XXX might need Xfastintr# */
mask8254 = (1 << x); mask8254 = (1 << x);
register_intr(/* irq */ x, /* XXX id */ 0, /* flags */ 0, register_intr(/* irq */ x, /* XXX id */ 0, /* flags */ 0,
@ -933,7 +933,7 @@ cpu_initclocks()
} }
} }
hwisrs[x] = (u_int)vecRTC; vec[x] = (u_int)vecRTC;
XintrRTC = (u_int)ivectors[x]; /* XXX might need Xfastintr# */ XintrRTC = (u_int)ivectors[x]; /* XXX might need Xfastintr# */
maskRTC = (1 << x); maskRTC = (1 << x);
register_intr(/* irq */ x, /* XXX id */ 1, /* flags */ 0, register_intr(/* irq */ x, /* XXX id */ 1, /* flags */ 0,

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@ -34,7 +34,7 @@
* SUCH DAMAGE. * SUCH DAMAGE.
* *
* from: @(#)clock.c 7.2 (Berkeley) 5/12/91 * from: @(#)clock.c 7.2 (Berkeley) 5/12/91
* $Id: clock.c,v 1.82 1997/05/04 14:25:00 peter Exp $ * $Id: clock.c,v 1.83 1997/05/05 09:34:32 peter Exp $
*/ */
/* /*
@ -829,7 +829,7 @@ resettodr()
#if defined(APIC_IO) #if defined(APIC_IO)
/* from icu.s: */ /* from icu.s: */
extern u_int hwisrs[]; extern u_int vec[];
extern void vec8254 __P((void)); extern void vec8254 __P((void));
extern void vecRTC __P((void)); extern void vecRTC __P((void));
extern u_int ivectors[]; extern u_int ivectors[];
@ -894,7 +894,7 @@ cpu_initclocks()
} }
} }
hwisrs[x] = (u_int)vec8254; vec[x] = (u_int)vec8254;
Xintr8254 = (u_int)ivectors[x]; /* XXX might need Xfastintr# */ Xintr8254 = (u_int)ivectors[x]; /* XXX might need Xfastintr# */
mask8254 = (1 << x); mask8254 = (1 << x);
register_intr(/* irq */ x, /* XXX id */ 0, /* flags */ 0, register_intr(/* irq */ x, /* XXX id */ 0, /* flags */ 0,
@ -933,7 +933,7 @@ cpu_initclocks()
} }
} }
hwisrs[x] = (u_int)vecRTC; vec[x] = (u_int)vecRTC;
XintrRTC = (u_int)ivectors[x]; /* XXX might need Xfastintr# */ XintrRTC = (u_int)ivectors[x]; /* XXX might need Xfastintr# */
maskRTC = (1 << x); maskRTC = (1 << x);
register_intr(/* irq */ x, /* XXX id */ 1, /* flags */ 0, register_intr(/* irq */ x, /* XXX id */ 1, /* flags */ 0,

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@ -34,7 +34,7 @@
* SUCH DAMAGE. * SUCH DAMAGE.
* *
* from: @(#)clock.c 7.2 (Berkeley) 5/12/91 * from: @(#)clock.c 7.2 (Berkeley) 5/12/91
* $Id: clock.c,v 1.82 1997/05/04 14:25:00 peter Exp $ * $Id: clock.c,v 1.83 1997/05/05 09:34:32 peter Exp $
*/ */
/* /*
@ -829,7 +829,7 @@ resettodr()
#if defined(APIC_IO) #if defined(APIC_IO)
/* from icu.s: */ /* from icu.s: */
extern u_int hwisrs[]; extern u_int vec[];
extern void vec8254 __P((void)); extern void vec8254 __P((void));
extern void vecRTC __P((void)); extern void vecRTC __P((void));
extern u_int ivectors[]; extern u_int ivectors[];
@ -894,7 +894,7 @@ cpu_initclocks()
} }
} }
hwisrs[x] = (u_int)vec8254; vec[x] = (u_int)vec8254;
Xintr8254 = (u_int)ivectors[x]; /* XXX might need Xfastintr# */ Xintr8254 = (u_int)ivectors[x]; /* XXX might need Xfastintr# */
mask8254 = (1 << x); mask8254 = (1 << x);
register_intr(/* irq */ x, /* XXX id */ 0, /* flags */ 0, register_intr(/* irq */ x, /* XXX id */ 0, /* flags */ 0,
@ -933,7 +933,7 @@ cpu_initclocks()
} }
} }
hwisrs[x] = (u_int)vecRTC; vec[x] = (u_int)vecRTC;
XintrRTC = (u_int)ivectors[x]; /* XXX might need Xfastintr# */ XintrRTC = (u_int)ivectors[x]; /* XXX might need Xfastintr# */
maskRTC = (1 << x); maskRTC = (1 << x);
register_intr(/* irq */ x, /* XXX id */ 1, /* flags */ 0, register_intr(/* irq */ x, /* XXX id */ 1, /* flags */ 0,

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@ -34,7 +34,7 @@
* SUCH DAMAGE. * SUCH DAMAGE.
* *
* from: @(#)clock.c 7.2 (Berkeley) 5/12/91 * from: @(#)clock.c 7.2 (Berkeley) 5/12/91
* $Id: clock.c,v 1.82 1997/05/04 14:25:00 peter Exp $ * $Id: clock.c,v 1.83 1997/05/05 09:34:32 peter Exp $
*/ */
/* /*
@ -829,7 +829,7 @@ resettodr()
#if defined(APIC_IO) #if defined(APIC_IO)
/* from icu.s: */ /* from icu.s: */
extern u_int hwisrs[]; extern u_int vec[];
extern void vec8254 __P((void)); extern void vec8254 __P((void));
extern void vecRTC __P((void)); extern void vecRTC __P((void));
extern u_int ivectors[]; extern u_int ivectors[];
@ -894,7 +894,7 @@ cpu_initclocks()
} }
} }
hwisrs[x] = (u_int)vec8254; vec[x] = (u_int)vec8254;
Xintr8254 = (u_int)ivectors[x]; /* XXX might need Xfastintr# */ Xintr8254 = (u_int)ivectors[x]; /* XXX might need Xfastintr# */
mask8254 = (1 << x); mask8254 = (1 << x);
register_intr(/* irq */ x, /* XXX id */ 0, /* flags */ 0, register_intr(/* irq */ x, /* XXX id */ 0, /* flags */ 0,
@ -933,7 +933,7 @@ cpu_initclocks()
} }
} }
hwisrs[x] = (u_int)vecRTC; vec[x] = (u_int)vecRTC;
XintrRTC = (u_int)ivectors[x]; /* XXX might need Xfastintr# */ XintrRTC = (u_int)ivectors[x]; /* XXX might need Xfastintr# */
maskRTC = (1 << x); maskRTC = (1 << x);
register_intr(/* irq */ x, /* XXX id */ 1, /* flags */ 0, register_intr(/* irq */ x, /* XXX id */ 1, /* flags */ 0,

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@ -36,7 +36,7 @@
* *
* @(#)icu.s 7.2 (Berkeley) 5/21/91 * @(#)icu.s 7.2 (Berkeley) 5/21/91
* *
* $Id: icu.s,v 1.30 1997/04/26 11:45:54 peter Exp $ * $Id: icu.s,v 1.31 1997/04/28 01:08:41 fsmp Exp $
*/ */
#include "opt_smp.h" #include "opt_smp.h"
@ -100,12 +100,9 @@ _mask8254:
_maskRTC: _maskRTC:
.long 0 .long 0
/* this allows us to change ISA IRQ# vs APIC pin# assignments */
.globl _hwisrs
_hwisrs:
#endif /* APIC_IO */ #endif /* APIC_IO */
vec: .globl _vec
_vec:
.long vec0, vec1, vec2, vec3, vec4, vec5, vec6, vec7 .long vec0, vec1, vec2, vec3, vec4, vec5, vec6, vec7
.long vec8, vec9, vec10, vec11, vec12, vec13, vec14, vec15 .long vec8, vec9, vec10, vec11, vec12, vec13, vec14, vec15
#if defined(APIC_IO) #if defined(APIC_IO)
@ -294,7 +291,7 @@ splz_unpend:
* We should change the interface so that the unit number is not * We should change the interface so that the unit number is not
* determined at config time. * determined at config time.
*/ */
jmp *vec(,%ecx,4) jmp *_vec(,%ecx,4)
ALIGN_TEXT ALIGN_TEXT
splz_swi: splz_swi:

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@ -34,7 +34,7 @@
* SUCH DAMAGE. * SUCH DAMAGE.
* *
* from: @(#)clock.c 7.2 (Berkeley) 5/12/91 * from: @(#)clock.c 7.2 (Berkeley) 5/12/91
* $Id: clock.c,v 1.82 1997/05/04 14:25:00 peter Exp $ * $Id: clock.c,v 1.83 1997/05/05 09:34:32 peter Exp $
*/ */
/* /*
@ -829,7 +829,7 @@ resettodr()
#if defined(APIC_IO) #if defined(APIC_IO)
/* from icu.s: */ /* from icu.s: */
extern u_int hwisrs[]; extern u_int vec[];
extern void vec8254 __P((void)); extern void vec8254 __P((void));
extern void vecRTC __P((void)); extern void vecRTC __P((void));
extern u_int ivectors[]; extern u_int ivectors[];
@ -894,7 +894,7 @@ cpu_initclocks()
} }
} }
hwisrs[x] = (u_int)vec8254; vec[x] = (u_int)vec8254;
Xintr8254 = (u_int)ivectors[x]; /* XXX might need Xfastintr# */ Xintr8254 = (u_int)ivectors[x]; /* XXX might need Xfastintr# */
mask8254 = (1 << x); mask8254 = (1 << x);
register_intr(/* irq */ x, /* XXX id */ 0, /* flags */ 0, register_intr(/* irq */ x, /* XXX id */ 0, /* flags */ 0,
@ -933,7 +933,7 @@ cpu_initclocks()
} }
} }
hwisrs[x] = (u_int)vecRTC; vec[x] = (u_int)vecRTC;
XintrRTC = (u_int)ivectors[x]; /* XXX might need Xfastintr# */ XintrRTC = (u_int)ivectors[x]; /* XXX might need Xfastintr# */
maskRTC = (1 << x); maskRTC = (1 << x);
register_intr(/* irq */ x, /* XXX id */ 1, /* flags */ 0, register_intr(/* irq */ x, /* XXX id */ 1, /* flags */ 0,