d/freebsd-dev
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Export a routine to provide the TSC_AUX MSR value and use this in vmm.

Browse Source 
Also, drop an unnecessary set of braces.

Requested by:	kib
Reviewed by:	kib
MFC after:	3 weeks
This commit is contained in:
Peter Grehan 2020-08-18 11:36:38 +00:00
parent 09f515da61
commit 3a3f1e9dfa
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=364343
4 changed files with 26 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
sys/amd64/amd64/initcpu.c
View File

@ -217,6 +217,15 @@ init_via(void)
wrmsr(0x1107, rdmsr(0x1107) | (1 << 28));
}
/*
* The value for the TSC_AUX MSR and rdtscp/rdpid.
*/
u_int
cpu_auxmsr(void)
{
return (PCPU_GET(cpuid));
}
/*
* Initialize CPU control registers
*/
@ -283,7 +292,7 @@ initializecpu(void)
if ((amd_feature & AMDID_RDTSCP) != 0 ||
(cpu_stdext_feature2 & CPUID_STDEXT2_RDPID) != 0)
wrmsr(MSR_TSC_AUX, PCPU_GET(cpuid));
wrmsr(MSR_TSC_AUX, cpu_auxmsr());
}
void

10
sys/amd64/vmm/intel/vmx_msr.c
View File

@ -365,9 +365,9 @@ void
vmx_msr_guest_enter_tsc_aux(struct vmx *vmx, int vcpuid)
{
uint64_t guest_tsc_aux = vmx->guest_msrs[vcpuid][IDX_MSR_TSC_AUX];
uint32_t cpuid = PCPU_GET(cpuid);
uint32_t host_aux = cpu_auxmsr();
if (vmx_have_msr_tsc_aux(vmx) && (guest_tsc_aux != cpuid))
if (vmx_have_msr_tsc_aux(vmx) && guest_tsc_aux != host_aux)
wrmsr(MSR_TSC_AUX, guest_tsc_aux);
}
@ -396,9 +396,9 @@ void
vmx_msr_guest_exit_tsc_aux(struct vmx *vmx, int vcpuid)
{
uint64_t guest_tsc_aux = vmx->guest_msrs[vcpuid][IDX_MSR_TSC_AUX];
uint32_t cpuid = PCPU_GET(cpuid);
uint32_t host_aux = cpu_auxmsr();
if (vmx_have_msr_tsc_aux(vmx) && (guest_tsc_aux != cpuid))
if (vmx_have_msr_tsc_aux(vmx) && guest_tsc_aux != host_aux)
/*
* Note that it is not necessary to save the guest value
* here; vmx->guest_msrs[vcpuid][IDX_MSR_TSC_AUX] always
@ -406,7 +406,7 @@ vmx_msr_guest_exit_tsc_aux(struct vmx *vmx, int vcpuid)
* the guest writes to it (which is expected to be very
* rare).
*/
wrmsr(MSR_TSC_AUX, cpuid);
wrmsr(MSR_TSC_AUX, host_aux);
}
int

11
sys/i386/i386/initcpu.c
View File

@ -627,6 +627,15 @@ init_transmeta(void)
}
#endif
/*
* The value for the TSC_AUX MSR and rdtscp/rdpid.
*/
u_int
cpu_auxmsr(void)
{
return (PCPU_GET(cpuid));
}
extern int elf32_nxstack;
void
@ -751,7 +760,7 @@ initializecpu(void)
}
if ((amd_feature & AMDID_RDTSCP) != 0 ||
(cpu_stdext_feature2 & CPUID_STDEXT2_RDPID) != 0)
wrmsr(MSR_TSC_AUX, PCPU_GET(cpuid));
wrmsr(MSR_TSC_AUX, cpu_auxmsr());
}
void

1
sys/x86/include/x86_var.h
View File

@ -115,6 +115,7 @@ typedef void alias_for_inthand_t(void);
bool acpi_get_fadt_bootflags(uint16_t *flagsp);
void *alloc_fpusave(int flags);
void busdma_swi(void);
u_int cpu_auxmsr(void);
vm_paddr_t cpu_getmaxphyaddr(void);
bool cpu_mwait_usable(void);
void cpu_probe_amdc1e(void);