Add an unified macro to deny ability from the compiler to reorder
instruction loads/stores at its will. The macro __compiler_membar() is currently supported for both gcc and clang, but kernel compilation will fail otherwise. Reviewed by: bde, kib Discussed with: dim, theraven MFC after: 2 weeks
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parent
6a762eb23e
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3a4730256a
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=241374
@ -226,7 +226,7 @@ atomic_fetchadd_long(volatile u_long *p, u_long v)
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static __inline void \
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atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
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{ \
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__asm __volatile("" : : : "memory"); \
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__compiler_membar(); \
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*p = v; \
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} \
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struct __hack
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@ -240,7 +240,7 @@ atomic_load_acq_##TYPE(volatile u_##TYPE *p) \
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u_##TYPE tmp; \
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\
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tmp = *p; \
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__asm __volatile("" : : : "memory"); \
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__compiler_membar(); \
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return (tmp); \
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} \
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struct __hack
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@ -129,10 +129,6 @@ typedef dev_t os_dev_t;
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#define copy_from_user(dst, src, len) copyin((src), (dst), (len))
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#endif
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#ifndef barrier
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#define barrier() __asm__ __volatile__("": : :"memory")
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#endif
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/*
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* Map simple global vairables to FreeBSD kernel equivalents
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*/
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@ -162,7 +162,7 @@
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*/
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#define EFSCORRUPTED 990 /* Filesystem is corrupted */
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#define SYNCHRONIZE() barrier()
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#define SYNCHRONIZE() __compiler_membar()
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#define __return_address __builtin_return_address(0)
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/*
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@ -296,7 +296,7 @@ atomic_fetchadd_int(volatile u_int *p, u_int v)
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static __inline void \
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atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
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{ \
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__asm __volatile("" : : : "memory"); \
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__compiler_membar(); \
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*p = v; \
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} \
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struct __hack
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@ -310,7 +310,7 @@ atomic_load_acq_##TYPE(volatile u_##TYPE *p) \
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u_##TYPE tmp; \
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\
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tmp = *p; \
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__asm __volatile("" : : : "memory"); \
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__compiler_membar(); \
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return (tmp); \
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} \
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struct __hack
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@ -65,10 +65,6 @@ __FBSDID("$FreeBSD$");
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* does not seem very useful
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*/
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static __inline void compiler_memory_barrier(void) {
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__asm __volatile("":::"memory");
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}
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static void assert_rm(const struct lock_object *lock, int what);
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static void lock_rm(struct lock_object *lock, int how);
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#ifdef KDTRACE_HOOKS
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@ -353,7 +349,7 @@ _rm_rlock(struct rmlock *rm, struct rm_priotracker *tracker, int trylock)
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td->td_critnest++; /* critical_enter(); */
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compiler_memory_barrier();
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__compiler_membar();
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pc = cpuid_to_pcpu[td->td_oncpu]; /* pcpu_find(td->td_oncpu); */
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@ -361,7 +357,7 @@ _rm_rlock(struct rmlock *rm, struct rm_priotracker *tracker, int trylock)
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sched_pin();
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compiler_memory_barrier();
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__compiler_membar();
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td->td_critnest--;
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@ -70,7 +70,7 @@ static __inline void
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mips_barrier(void)
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{
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#if defined(CPU_CNMIPS) || defined(CPU_RMI) || defined(CPU_NLM)
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__asm __volatile("" : : : "memory");
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__compiler_membar();
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#else
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__asm __volatile (".set noreorder\n\t"
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"nop\n\t"
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@ -593,7 +593,7 @@ bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh,
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if (flags & BUS_SPACE_BARRIER_READ)
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__asm __volatile("lock; addl $0,0(%%esp)" : : : "memory");
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else
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__asm __volatile("" : : : "memory");
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__compiler_membar();
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}
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#ifdef BUS_SPACE_NO_LEGACY
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@ -97,7 +97,7 @@
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#define atomic_cas_acq(p, e, s, sz) ({ \
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itype(sz) v; \
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v = atomic_cas((p), (e), (s), sz); \
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__asm __volatile("" : : : "memory"); \
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__compiler_membar(); \
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v; \
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})
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@ -122,7 +122,7 @@
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#define atomic_op_acq(p, op, v, sz) ({ \
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itype(sz) t; \
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t = atomic_op((p), op, (v), sz); \
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__asm __volatile("" : : : "memory"); \
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__compiler_membar(); \
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t; \
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})
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@ -139,7 +139,7 @@
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#define atomic_load_acq(p, sz) ({ \
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itype(sz) v; \
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v = atomic_load((p), sz); \
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__asm __volatile("" : : : "memory"); \
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__compiler_membar(); \
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v; \
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})
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@ -82,6 +82,13 @@
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# define __GNUC_VA_LIST_COMPATIBILITY 1
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#endif
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/*
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* Compiler memory barriers, specific to gcc and clang.
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*/
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#if defined(__GNUC__)
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#define __compiler_membar() __asm __volatile(" " : : : "memory")
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#endif
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#ifndef __INTEL_COMPILER
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# define __GNUCLIKE_BUILTIN_NEXT_ARG 1
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# define __GNUCLIKE_MATH_BUILTIN_RELOPS
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@ -1014,7 +1014,7 @@ bus_space_barrier(bus_space_tag_t tag __unused, bus_space_handle_t bsh __unused,
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__asm __volatile("lock; addl $0,0(%%esp)" : : : "memory");
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#endif
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else
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__asm __volatile("" : : : "memory");
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__compiler_membar();
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#endif
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}
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