iwm: Add a device family definition for 9000 chips.
Convert existing device family checks to avoid assuming that the device family is always one of IWM_DEVICE_FAMILY_7000 or _8000. Submitted by: lwhsu, Guo Wen Jun <blockk2000@gmail.com> MFC after: 2 weeks
This commit is contained in:
parent
381471bc83
commit
3bf2d5dd64
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=354501
@ -1651,7 +1651,7 @@ iwm_trans_pcie_fw_alive(struct iwm_softc *sc, uint32_t scd_base_addr)
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iwm_nic_unlock(sc);
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/* Enable L1-Active */
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if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000) {
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if (sc->cfg->device_family < IWM_DEVICE_FAMILY_8000) {
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iwm_clear_bits_prph(sc, IWM_APMG_PCIDEV_STT_REG,
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IWM_APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
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}
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@ -2069,7 +2069,7 @@ static int
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iwm_get_sku(const struct iwm_softc *sc, const uint16_t *nvm_sw,
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const uint16_t *phy_sku)
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{
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if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000)
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if (sc->cfg->device_family < IWM_DEVICE_FAMILY_8000)
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return le16_to_cpup(nvm_sw + IWM_SKU);
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return le32_to_cpup((const uint32_t *)(phy_sku + IWM_SKU_8000));
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@ -2078,7 +2078,7 @@ iwm_get_sku(const struct iwm_softc *sc, const uint16_t *nvm_sw,
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static int
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iwm_get_nvm_version(const struct iwm_softc *sc, const uint16_t *nvm_sw)
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{
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if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000)
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if (sc->cfg->device_family < IWM_DEVICE_FAMILY_8000)
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return le16_to_cpup(nvm_sw + IWM_NVM_VERSION);
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else
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return le32_to_cpup((const uint32_t *)(nvm_sw +
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@ -2089,7 +2089,7 @@ static int
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iwm_get_radio_cfg(const struct iwm_softc *sc, const uint16_t *nvm_sw,
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const uint16_t *phy_sku)
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{
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if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000)
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if (sc->cfg->device_family < IWM_DEVICE_FAMILY_8000)
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return le16_to_cpup(nvm_sw + IWM_RADIO_CFG);
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return le32_to_cpup((const uint32_t *)(phy_sku + IWM_RADIO_CFG_8000));
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@ -2100,7 +2100,7 @@ iwm_get_n_hw_addrs(const struct iwm_softc *sc, const uint16_t *nvm_sw)
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{
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int n_hw_addr;
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if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000)
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if (sc->cfg->device_family < IWM_DEVICE_FAMILY_8000)
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return le16_to_cpup(nvm_sw + IWM_N_HW_ADDRS);
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n_hw_addr = le32_to_cpup((const uint32_t *)(nvm_sw + IWM_N_HW_ADDRS_8000));
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@ -2112,7 +2112,7 @@ static void
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iwm_set_radio_cfg(const struct iwm_softc *sc, struct iwm_nvm_data *data,
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uint32_t radio_cfg)
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{
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if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000) {
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if (sc->cfg->device_family < IWM_DEVICE_FAMILY_8000) {
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data->radio_cfg_type = IWM_NVM_RF_CFG_TYPE_MSK(radio_cfg);
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data->radio_cfg_step = IWM_NVM_RF_CFG_STEP_MSK(radio_cfg);
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data->radio_cfg_dash = IWM_NVM_RF_CFG_DASH_MSK(radio_cfg);
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@ -2138,7 +2138,7 @@ iwm_set_hw_address(struct iwm_softc *sc, struct iwm_nvm_data *data,
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iwm_set_hw_address_from_csr(sc, data);
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} else
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#endif
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if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000) {
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if (sc->cfg->device_family < IWM_DEVICE_FAMILY_8000) {
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const uint8_t *hw_addr = (const uint8_t *)(nvm_hw + IWM_HW_ADDR);
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/* The byte order is little endian 16 bit, meaning 214365 */
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@ -2170,7 +2170,7 @@ iwm_parse_nvm_data(struct iwm_softc *sc,
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uint32_t sku, radio_cfg;
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uint16_t lar_config;
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if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000) {
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if (sc->cfg->device_family < IWM_DEVICE_FAMILY_8000) {
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data = malloc(sizeof(*data) +
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IWM_NUM_CHANNELS * sizeof(uint16_t),
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M_DEVBUF, M_NOWAIT | M_ZERO);
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@ -2194,7 +2194,8 @@ iwm_parse_nvm_data(struct iwm_softc *sc,
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data->n_hw_addrs = iwm_get_n_hw_addrs(sc, nvm_sw);
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if (sc->cfg->device_family == IWM_DEVICE_FAMILY_8000) {
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if (sc->cfg->device_family >= IWM_DEVICE_FAMILY_8000) {
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/* TODO: use IWL_NVM_EXT */
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uint16_t lar_offset = data->nvm_version < 0xE39 ?
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IWM_NVM_LAR_OFFSET_8000_OLD :
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IWM_NVM_LAR_OFFSET_8000;
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@ -2242,7 +2243,7 @@ iwm_parse_nvm_sections(struct iwm_softc *sc, struct iwm_nvm_section *sections)
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"Can't parse empty OTP/NVM sections\n");
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return NULL;
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}
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} else if (sc->cfg->device_family == IWM_DEVICE_FAMILY_8000) {
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} else if (sc->cfg->device_family >= IWM_DEVICE_FAMILY_8000) {
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/* SW and REGULATORY sections are mandatory */
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if (!sections[IWM_NVM_SECTION_TYPE_SW].data ||
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!sections[IWM_NVM_SECTION_TYPE_REGULATORY].data) {
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@ -2672,7 +2673,7 @@ iwm_start_fw(struct iwm_softc *sc, const struct iwm_fw_img *fw)
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IWM_WRITE(sc, IWM_CSR_UCODE_DRV_GP1_CLR, IWM_CSR_UCODE_SW_BIT_RFKILL);
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/* Load the given image to the HW */
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if (sc->cfg->device_family == IWM_DEVICE_FAMILY_8000)
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if (sc->cfg->device_family >= IWM_DEVICE_FAMILY_8000)
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ret = iwm_pcie_load_given_ucode_8000(sc, fw);
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else
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ret = iwm_pcie_load_given_ucode(sc, fw);
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@ -2823,7 +2824,7 @@ iwm_mvm_load_ucode_wait_alive(struct iwm_softc *sc,
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IWM_MVM_UCODE_ALIVE_TIMEOUT);
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IWM_LOCK(sc);
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if (error) {
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if (sc->cfg->device_family == IWM_DEVICE_FAMILY_8000) {
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if (sc->cfg->device_family >= IWM_DEVICE_FAMILY_8000) {
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uint32_t a = 0x5a5a5a5a, b = 0x5a5a5a5a;
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if (iwm_nic_lock(sc)) {
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a = iwm_read_prph(sc, IWM_SB_CPU_1_STATUS);
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@ -4458,7 +4459,7 @@ iwm_mvm_is_lar_supported(struct iwm_softc *sc)
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* Enable LAR only if it is supported by the FW (TLV) &&
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* enabled in the NVM
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*/
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if (sc->cfg->device_family == IWM_DEVICE_FAMILY_8000)
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if (sc->cfg->device_family >= IWM_DEVICE_FAMILY_8000)
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return nvm_lar && tlv_lar;
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else
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return tlv_lar;
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@ -5802,7 +5803,7 @@ iwm_attach(device_t dev)
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* "dash" value). To keep hw_rev backwards compatible - we'll store it
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* in the old format.
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*/
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if (sc->cfg->device_family == IWM_DEVICE_FAMILY_8000) {
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if (sc->cfg->device_family >= IWM_DEVICE_FAMILY_8000) {
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int ret;
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uint32_t hw_step;
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@ -78,6 +78,7 @@ enum iwm_device_family {
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IWM_DEVICE_FAMILY_UNDEFINED,
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IWM_DEVICE_FAMILY_7000,
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IWM_DEVICE_FAMILY_8000,
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IWM_DEVICE_FAMILY_9000,
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};
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#define IWM_DEFAULT_MAX_TX_POWER 22
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@ -282,7 +282,7 @@ iwm_nic_lock(struct iwm_softc *sc)
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IWM_SETBITS(sc, IWM_CSR_GP_CNTRL,
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IWM_CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
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if (sc->cfg->device_family == IWM_DEVICE_FAMILY_8000)
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if (sc->cfg->device_family >= IWM_DEVICE_FAMILY_8000)
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DELAY(2);
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if (iwm_poll_bit(sc, IWM_CSR_GP_CNTRL,
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@ -475,7 +475,7 @@ iwm_apm_init(struct iwm_softc *sc)
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IWM_DPRINTF(sc, IWM_DEBUG_RESET, "iwm apm start\n");
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/* Disable L0S exit timer (platform NMI Work/Around) */
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if (sc->cfg->device_family != IWM_DEVICE_FAMILY_8000) {
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if (sc->cfg->device_family < IWM_DEVICE_FAMILY_8000) {
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IWM_SETBITS(sc, IWM_CSR_GIO_CHICKEN_BITS,
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IWM_CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
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}
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