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Revert r225875, r225877:

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It is reported that on some chips (e.g. the 970MP) behavior of POW bit set
simultaneously with modifying other bits is undefined and may cause hangs.
The race should be handled in some other way, but for now just get back.

Reported by:	nwitehorn
This commit is contained in:
Alexander Motin 2011-10-03 21:19:15 +00:00
parent b2e855ac7a
commit 3ddd7d96bb
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=225953
1 changed files with 0 additions and 11 deletions
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11
sys/powerpc/powerpc/cpu.c
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@ -65,7 +65,6 @@
#include <sys/cpu.h>
#include <sys/kernel.h>
#include <sys/proc.h>
#include <sys/sched.h>
#include <sys/sysctl.h>
#include <machine/bus.h>
@ -554,11 +553,6 @@ cpu_idle_60x(void)
vers = mfpvr() >> 16;
#ifdef AIM
mtmsr(msr & ~PSL_EE);
if (sched_runnable()) {
mtmsr(msr);
return;
}
switch (vers) {
case IBM970:
case IBM970FX:
@ -589,11 +583,6 @@ cpu_idle_e500(void)
msr = mfmsr();
#ifdef E500
mtmsr(msr & ~PSL_EE);
if (sched_runnable()) {
mtmsr(msr);
return;
}
/* Freescale E500 core RM section 6.4.1. */
__asm __volatile("msync; mtmsr %0; isync" ::
"r" (msr | PSL_WE));