Enable i386 build of the Cavium LiquidIO driver (lio) module.
Submitted by: pkanneganti@cavium.com (Prasad V Kanneganti) MFC after: 1 week Sponsored by: Cavium Networks Differential Revision: https://reviews.freebsd.org/D12415
This commit is contained in:
parent
54cfb29e3a
commit
3de0952fba
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=324994
@ -162,11 +162,11 @@ lio_cn23xx_pf_setup_global_mac_regs(struct octeon_device *oct)
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lio_write_csr64(oct, LIO_CN23XX_SLI_PKT_MAC_RINFO64(mac_no, pf_num),
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reg_val);
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lio_dev_dbg(oct, "SLI_PKT_MAC(%d)_PF(%d)_RINFO : 0x%016lx\n", mac_no,
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lio_dev_dbg(oct, "SLI_PKT_MAC(%d)_PF(%d)_RINFO : 0x%016llx\n", mac_no,
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pf_num,
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lio_read_csr64(oct,
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LIO_CAST64(lio_read_csr64(oct,
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LIO_CN23XX_SLI_PKT_MAC_RINFO64(mac_no,
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pf_num)));
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pf_num))));
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}
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static int
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@ -817,8 +817,8 @@ lio_core_drv_init(struct lio_recv_info *recv_info, void *buf)
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cs = &core_setup[oct->octeon_id];
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if (recv_pkt->buffer_size[0] != (sizeof(*cs) + LIO_DROQ_INFO_SIZE)) {
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lio_dev_dbg(oct, "Core setup bytes expected %lu found %d\n",
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(uint32_t)sizeof(*cs) + LIO_DROQ_INFO_SIZE,
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lio_dev_dbg(oct, "Core setup bytes expected %llu found %d\n",
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LIO_CAST64(sizeof(*cs) + LIO_DROQ_INFO_SIZE),
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recv_pkt->buffer_size[0]);
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}
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@ -873,16 +873,26 @@ static inline uint64_t
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lio_read_csr64(struct octeon_device *oct, uint32_t reg)
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{
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#ifdef __i386__
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return (lio_read_csr32(oct, reg) |
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((uint64_t)lio_read_csr32(oct, reg + 4) << 32));
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#else
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return (bus_space_read_8(oct->mem_bus_space[0].tag,
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oct->mem_bus_space[0].handle, reg));
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#endif
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}
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static inline void
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lio_write_csr64(struct octeon_device *oct, uint32_t reg, uint64_t val)
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{
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#ifdef __i386__
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lio_write_csr32(oct, reg, (uint32_t)val);
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lio_write_csr32(oct, reg + 4, val >> 32);
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#else
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bus_space_write_8(oct->mem_bus_space[0].tag,
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oct->mem_bus_space[0].handle, reg, val);
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#endif
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}
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#endif /* _LIO_DEVICE_H_ */
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@ -294,8 +294,8 @@ lio_init_droq(struct octeon_device *oct, uint32_t q_no,
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return (1);
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}
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lio_dev_dbg(oct, "droq[%d]: desc_ring: virt: 0x%p, dma: %lx\n", q_no,
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droq->desc_ring, droq->desc_ring_dma);
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lio_dev_dbg(oct, "droq[%d]: desc_ring: virt: 0x%p, dma: %llx\n", q_no,
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droq->desc_ring, LIO_CAST64(droq->desc_ring_dma));
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lio_dev_dbg(oct, "droq[%d]: num_desc: %d\n", q_no, droq->max_count);
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size = droq->max_count * LIO_DROQ_RECVBUF_SIZE;
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@ -65,20 +65,48 @@ lio_write_bar1_mem8(struct octeon_device *oct, uint32_t reg, uint64_t val)
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oct->mem_bus_space[1].handle, reg, val);
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}
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#ifdef __i386__
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static inline uint32_t
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lio_read_bar1_mem32(struct octeon_device *oct, uint32_t reg)
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{
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return (bus_space_read_4(oct->mem_bus_space[1].tag,
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oct->mem_bus_space[1].handle, reg));
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}
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static inline void
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lio_write_bar1_mem32(struct octeon_device *oct, uint32_t reg, uint32_t val)
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{
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bus_space_write_4(oct->mem_bus_space[1].tag,
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oct->mem_bus_space[1].handle, reg, val);
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}
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#endif
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static inline uint64_t
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lio_read_bar1_mem64(struct octeon_device *oct, uint32_t reg)
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{
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#ifdef __i386__
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return (lio_read_bar1_mem32(oct, reg) |
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((uint64_t)lio_read_bar1_mem32(oct, reg + 4) << 32));
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#else
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return (bus_space_read_8(oct->mem_bus_space[1].tag,
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oct->mem_bus_space[1].handle, reg));
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#endif
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}
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static inline void
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lio_write_bar1_mem64(struct octeon_device *oct, uint32_t reg, uint64_t val)
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{
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#ifdef __i386__
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lio_write_bar1_mem32(oct, reg, (uint32_t)val);
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lio_write_bar1_mem32(oct, reg + 4, val >> 32);
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#else
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bus_space_write_8(oct->mem_bus_space[1].tag,
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oct->mem_bus_space[1].handle, reg, val);
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#endif
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}
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static void
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@ -97,7 +97,7 @@ lio_init_instr_queue(struct octeon_device *oct, union octeon_txpciq txpciq,
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return (1);
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}
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iq->base_addr = lio_dma_alloc(q_size, &iq->base_addr_dma);
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iq->base_addr = lio_dma_alloc(q_size, (vm_paddr_t *)&iq->base_addr_dma);
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if (!iq->base_addr) {
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lio_dev_err(oct, "Cannot allocate memory for instr queue %d\n",
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iq_no);
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@ -118,8 +118,9 @@ lio_init_instr_queue(struct octeon_device *oct, union octeon_txpciq txpciq,
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return (1);
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}
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lio_dev_dbg(oct, "IQ[%d]: base: %p basedma: %lx count: %d\n",
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iq_no, iq->base_addr, iq->base_addr_dma, iq->max_count);
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lio_dev_dbg(oct, "IQ[%d]: base: %p basedma: %llx count: %d\n",
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iq_no, iq->base_addr, LIO_CAST64(iq->base_addr_dma),
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iq->max_count);
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/* Create the descriptor buffer dma maps */
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request_buf = iq->request_list;
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@ -736,7 +737,7 @@ lio_setup_sc_buffer_pool(struct octeon_device *oct)
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for (i = 0; i < LIO_MAX_SOFT_COMMAND_BUFFERS; i++) {
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sc = (struct lio_soft_command *)
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lio_dma_alloc(LIO_SOFT_COMMAND_BUFFER_SIZE, &dma_addr);
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lio_dma_alloc(LIO_SOFT_COMMAND_BUFFER_SIZE, (vm_paddr_t *)&dma_addr);
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if (sc == NULL) {
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lio_free_sc_buffer_pool(oct);
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return (1);
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@ -1013,7 +1013,7 @@ lio_get_media_subtype(struct octeon_device *oct)
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return (IFM_10G_SR);
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}
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static unsigned long
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static uint64_t
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lio_get_baudrate(struct octeon_device *oct)
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{
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@ -1318,15 +1318,16 @@ lio_setup_nic_devices(struct octeon_device *octeon_dev)
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if (!(num_iqueues) || !(num_oqueues)) {
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lio_dev_err(octeon_dev,
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"Got bad iqueues (%016lX) or oqueues (%016lX) from firmware.\n",
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resp->cfg_info.iqmask,
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resp->cfg_info.oqmask);
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"Got bad iqueues (%016llX) or oqueues (%016llX) from firmware.\n",
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LIO_CAST64(resp->cfg_info.iqmask),
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LIO_CAST64(resp->cfg_info.oqmask));
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goto setup_nic_dev_fail;
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}
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lio_dev_dbg(octeon_dev,
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"interface %d, iqmask %016lx, oqmask %016lx, numiqueues %d, numoqueues %d\n",
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i, resp->cfg_info.iqmask, resp->cfg_info.oqmask,
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"interface %d, iqmask %016llx, oqmask %016llx, numiqueues %d, numoqueues %d\n",
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i, LIO_CAST64(resp->cfg_info.iqmask),
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LIO_CAST64(resp->cfg_info.oqmask),
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num_iqueues, num_oqueues);
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ifp = if_alloc(IFT_ETHER);
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@ -43,11 +43,7 @@
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extern unsigned int lio_hwlro;
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#ifdef __LP64__
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#define LIO_CAST64(v) ((long long)(long)(v))
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#else
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#error "Unknown system architecture"
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#endif
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#define LIO_DRV_NAME "lio"
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@ -107,9 +103,9 @@ lio_map_pci_barx(struct octeon_device *oct, int baridx)
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oct->mem_bus_space[baridx].handle =
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rman_get_bushandle(oct->mem_bus_space[baridx].pci_mem);
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lio_dev_dbg(oct, "BAR%d Tag 0x%lx Handle 0x%lx\n",
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baridx, oct->mem_bus_space[baridx].tag,
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oct->mem_bus_space[baridx].handle);
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lio_dev_dbg(oct, "BAR%d Tag 0x%llx Handle 0x%llx\n",
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baridx, LIO_CAST64(oct->mem_bus_space[baridx].tag),
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LIO_CAST64(oct->mem_bus_space[baridx].handle));
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return (0);
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}
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@ -218,8 +218,8 @@ lio_xmit(struct lio *lio, struct lio_instr_queue *iq,
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drop_packet:
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stats->tx_dropped++;
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lio_dev_err(oct, "IQ%d Transmit dropped: %lu\n", iq_no,
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stats->tx_dropped);
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lio_dev_err(oct, "IQ%d Transmit dropped: %llu\n", iq_no,
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LIO_CAST64(stats->tx_dropped));
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m_freem(*m_headp);
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*m_headp = NULL;
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@ -634,13 +634,15 @@ lio_get_eeprom(SYSCTL_HANDLER_ARGS)
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board_info = (struct lio_board_info *)(&oct_dev->boardinfo);
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if (oct_dev->uboot_len == 0)
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sprintf(buf, "boardname:%s serialnum:%s maj:%ld min:%ld",
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sprintf(buf, "boardname:%s serialnum:%s maj:%lld min:%lld",
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board_info->name, board_info->serial_number,
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board_info->major, board_info->minor);
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LIO_CAST64(board_info->major),
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LIO_CAST64(board_info->minor));
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else {
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sprintf(buf, "boardname:%s serialnum:%s maj:%ld min:%ld\n%s",
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sprintf(buf, "boardname:%s serialnum:%s maj:%lld min:%lld\n%s",
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board_info->name, board_info->serial_number,
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board_info->major, board_info->minor,
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LIO_CAST64(board_info->major),
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LIO_CAST64(board_info->minor),
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&oct_dev->uboot_version[oct_dev->uboot_sidx]);
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}
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@ -777,184 +779,184 @@ lio_cn23xx_pf_read_csr_reg(char *s, struct octeon_device *oct)
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/* 0x29030 or 0x29040 */
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reg = LIO_CN23XX_SLI_PKT_MAC_RINFO64(oct->pcie_port, oct->pf_num);
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len += sprintf(s + len, "[%08x] (SLI_PKT_MAC%d_PF%d_RINFO): %016lx\n",
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len += sprintf(s + len, "[%08x] (SLI_PKT_MAC%d_PF%d_RINFO): %016llx\n",
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reg, oct->pcie_port, oct->pf_num,
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lio_read_csr64(oct, reg));
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LIO_CAST64(lio_read_csr64(oct, reg)));
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/* 0x27080 or 0x27090 */
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reg = LIO_CN23XX_SLI_MAC_PF_INT_ENB64(oct->pcie_port, oct->pf_num);
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len += sprintf(s + len, "[%08x] (SLI_MAC%d_PF%d_INT_ENB): %016lx\n",
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len += sprintf(s + len, "[%08x] (SLI_MAC%d_PF%d_INT_ENB): %016llx\n",
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reg, oct->pcie_port, oct->pf_num,
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lio_read_csr64(oct, reg));
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LIO_CAST64(lio_read_csr64(oct, reg)));
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/* 0x27000 or 0x27010 */
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reg = LIO_CN23XX_SLI_MAC_PF_INT_SUM64(oct->pcie_port, oct->pf_num);
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len += sprintf(s + len, "[%08x] (SLI_MAC%d_PF%d_INT_SUM): %016lx\n",
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len += sprintf(s + len, "[%08x] (SLI_MAC%d_PF%d_INT_SUM): %016llx\n",
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reg, oct->pcie_port, oct->pf_num,
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lio_read_csr64(oct, reg));
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LIO_CAST64(lio_read_csr64(oct, reg)));
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/* 0x29120 */
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reg = 0x29120;
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len += sprintf(s + len, "[%08x] (SLI_PKT_MEM_CTL): %016lx\n", reg,
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lio_read_csr64(oct, reg));
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len += sprintf(s + len, "[%08x] (SLI_PKT_MEM_CTL): %016llx\n", reg,
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LIO_CAST64(lio_read_csr64(oct, reg)));
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/* 0x27300 */
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reg = 0x27300 + oct->pcie_port * LIO_CN23XX_MAC_INT_OFFSET +
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(oct->pf_num) * LIO_CN23XX_PF_INT_OFFSET;
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len += sprintf(s + len, "[%08x] (SLI_MAC%d_PF%d_PKT_VF_INT): %016lx\n",
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len += sprintf(s + len, "[%08x] (SLI_MAC%d_PF%d_PKT_VF_INT): %016llx\n",
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reg, oct->pcie_port, oct->pf_num,
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lio_read_csr64(oct, reg));
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LIO_CAST64(lio_read_csr64(oct, reg)));
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/* 0x27200 */
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reg = 0x27200 + oct->pcie_port * LIO_CN23XX_MAC_INT_OFFSET +
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(oct->pf_num) * LIO_CN23XX_PF_INT_OFFSET;
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len += sprintf(s + len, "[%08x] (SLI_MAC%d_PF%d_PP_VF_INT): %016lx\n",
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len += sprintf(s + len, "[%08x] (SLI_MAC%d_PF%d_PP_VF_INT): %016llx\n",
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reg, oct->pcie_port, oct->pf_num,
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lio_read_csr64(oct, reg));
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LIO_CAST64(lio_read_csr64(oct, reg)));
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/* 29130 */
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reg = LIO_CN23XX_SLI_PKT_CNT_INT;
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len += sprintf(s + len, "[%08x] (SLI_PKT_CNT_INT): %016lx\n", reg,
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lio_read_csr64(oct, reg));
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len += sprintf(s + len, "[%08x] (SLI_PKT_CNT_INT): %016llx\n", reg,
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LIO_CAST64(lio_read_csr64(oct, reg)));
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/* 0x29140 */
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reg = LIO_CN23XX_SLI_PKT_TIME_INT;
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len += sprintf(s + len, "[%08x] (SLI_PKT_TIME_INT): %016lx\n", reg,
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lio_read_csr64(oct, reg));
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len += sprintf(s + len, "[%08x] (SLI_PKT_TIME_INT): %016llx\n", reg,
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LIO_CAST64(lio_read_csr64(oct, reg)));
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/* 0x29160 */
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reg = 0x29160;
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len += sprintf(s + len, "[%08x] (SLI_PKT_INT): %016lx\n", reg,
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lio_read_csr64(oct, reg));
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len += sprintf(s + len, "[%08x] (SLI_PKT_INT): %016llx\n", reg,
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LIO_CAST64(lio_read_csr64(oct, reg)));
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/* 0x29180 */
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reg = LIO_CN23XX_SLI_OQ_WMARK;
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len += sprintf(s + len, "[%08x] (SLI_PKT_OUTPUT_WMARK): %016lx\n",
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reg, lio_read_csr64(oct, reg));
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len += sprintf(s + len, "[%08x] (SLI_PKT_OUTPUT_WMARK): %016llx\n",
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reg, LIO_CAST64(lio_read_csr64(oct, reg)));
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/* 0x291E0 */
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reg = LIO_CN23XX_SLI_PKT_IOQ_RING_RST;
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len += sprintf(s + len, "[%08x] (SLI_PKT_RING_RST): %016lx\n", reg,
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lio_read_csr64(oct, reg));
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len += sprintf(s + len, "[%08x] (SLI_PKT_RING_RST): %016llx\n", reg,
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LIO_CAST64(lio_read_csr64(oct, reg)));
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/* 0x29210 */
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reg = LIO_CN23XX_SLI_GBL_CONTROL;
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len += sprintf(s + len, "[%08x] (SLI_PKT_GBL_CONTROL): %016lx\n", reg,
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lio_read_csr64(oct, reg));
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len += sprintf(s + len, "[%08x] (SLI_PKT_GBL_CONTROL): %016llx\n", reg,
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LIO_CAST64(lio_read_csr64(oct, reg)));
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/* 0x29220 */
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reg = 0x29220;
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len += sprintf(s + len, "[%08x] (SLI_PKT_BIST_STATUS): %016lx\n",
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reg, lio_read_csr64(oct, reg));
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len += sprintf(s + len, "[%08x] (SLI_PKT_BIST_STATUS): %016llx\n",
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reg, LIO_CAST64(lio_read_csr64(oct, reg)));
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/* PF only */
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if (pf_num == 0) {
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/* 0x29260 */
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reg = LIO_CN23XX_SLI_OUT_BP_EN_W1S;
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len += sprintf(s + len, "[%08x] (SLI_PKT_OUT_BP_EN_W1S): %016lx\n",
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reg, lio_read_csr64(oct, reg));
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len += sprintf(s + len, "[%08x] (SLI_PKT_OUT_BP_EN_W1S): %016llx\n",
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reg, LIO_CAST64(lio_read_csr64(oct, reg)));
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} else if (pf_num == 1) {
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/* 0x29270 */
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reg = LIO_CN23XX_SLI_OUT_BP_EN2_W1S;
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len += sprintf(s + len, "[%08x] (SLI_PKT_OUT_BP_EN2_W1S): %016lx\n",
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reg, lio_read_csr64(oct, reg));
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len += sprintf(s + len, "[%08x] (SLI_PKT_OUT_BP_EN2_W1S): %016llx\n",
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reg, LIO_CAST64(lio_read_csr64(oct, reg)));
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}
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|
||||
for (i = 0; i < LIO_CN23XX_PF_MAX_OUTPUT_QUEUES; i++) {
|
||||
reg = LIO_CN23XX_SLI_OQ_BUFF_INFO_SIZE(i);
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT%d_OUT_SIZE): %016lx\n",
|
||||
reg, i, lio_read_csr64(oct, reg));
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT%d_OUT_SIZE): %016llx\n",
|
||||
reg, i, LIO_CAST64(lio_read_csr64(oct, reg)));
|
||||
}
|
||||
|
||||
/* 0x10040 */
|
||||
for (i = 0; i < LIO_CN23XX_PF_MAX_INPUT_QUEUES; i++) {
|
||||
reg = LIO_CN23XX_SLI_IQ_INSTR_COUNT64(i);
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT_IN_DONE%d_CNTS): %016lx\n",
|
||||
reg, i, lio_read_csr64(oct, reg));
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT_IN_DONE%d_CNTS): %016llx\n",
|
||||
reg, i, LIO_CAST64(lio_read_csr64(oct, reg)));
|
||||
}
|
||||
|
||||
/* 0x10080 */
|
||||
for (i = 0; i < LIO_CN23XX_PF_MAX_OUTPUT_QUEUES; i++) {
|
||||
reg = LIO_CN23XX_SLI_OQ_PKTS_CREDIT(i);
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT%d_SLIST_BAOFF_DBELL): %016lx\n",
|
||||
reg, i, lio_read_csr64(oct, reg));
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT%d_SLIST_BAOFF_DBELL): %016llx\n",
|
||||
reg, i, LIO_CAST64(lio_read_csr64(oct, reg)));
|
||||
}
|
||||
|
||||
/* 0x10090 */
|
||||
for (i = 0; i < LIO_CN23XX_PF_MAX_OUTPUT_QUEUES; i++) {
|
||||
reg = LIO_CN23XX_SLI_OQ_SIZE(i);
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT%d_SLIST_FIFO_RSIZE): %016lx\n",
|
||||
reg, i, lio_read_csr64(oct, reg));
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT%d_SLIST_FIFO_RSIZE): %016llx\n",
|
||||
reg, i, LIO_CAST64(lio_read_csr64(oct, reg)));
|
||||
}
|
||||
|
||||
/* 0x10050 */
|
||||
for (i = 0; i < LIO_CN23XX_PF_MAX_OUTPUT_QUEUES; i++) {
|
||||
reg = LIO_CN23XX_SLI_OQ_PKT_CONTROL(i);
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT%d__OUTPUT_CONTROL): %016lx\n",
|
||||
reg, i, lio_read_csr64(oct, reg));
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT%d__OUTPUT_CONTROL): %016llx\n",
|
||||
reg, i, LIO_CAST64(lio_read_csr64(oct, reg)));
|
||||
}
|
||||
|
||||
/* 0x10070 */
|
||||
for (i = 0; i < LIO_CN23XX_PF_MAX_OUTPUT_QUEUES; i++) {
|
||||
reg = LIO_CN23XX_SLI_OQ_BASE_ADDR64(i);
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT%d_SLIST_BADDR): %016lx\n",
|
||||
reg, i, lio_read_csr64(oct, reg));
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT%d_SLIST_BADDR): %016llx\n",
|
||||
reg, i, LIO_CAST64(lio_read_csr64(oct, reg)));
|
||||
}
|
||||
|
||||
/* 0x100a0 */
|
||||
for (i = 0; i < LIO_CN23XX_PF_MAX_OUTPUT_QUEUES; i++) {
|
||||
reg = LIO_CN23XX_SLI_OQ_PKT_INT_LEVELS(i);
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT%d_INT_LEVELS): %016lx\n",
|
||||
reg, i, lio_read_csr64(oct, reg));
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT%d_INT_LEVELS): %016llx\n",
|
||||
reg, i, LIO_CAST64(lio_read_csr64(oct, reg)));
|
||||
}
|
||||
|
||||
/* 0x100b0 */
|
||||
for (i = 0; i < LIO_CN23XX_PF_MAX_OUTPUT_QUEUES; i++) {
|
||||
reg = LIO_CN23XX_SLI_OQ_PKTS_SENT(i);
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT%d_CNTS): %016lx\n",
|
||||
reg, i, lio_read_csr64(oct, reg));
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT%d_CNTS): %016llx\n",
|
||||
reg, i, LIO_CAST64(lio_read_csr64(oct, reg)));
|
||||
}
|
||||
|
||||
/* 0x100c0 */
|
||||
for (i = 0; i < LIO_CN23XX_PF_MAX_OUTPUT_QUEUES; i++) {
|
||||
reg = 0x100c0 + i * LIO_CN23XX_OQ_OFFSET;
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT%d_ERROR_INFO): %016lx\n",
|
||||
reg, i, lio_read_csr64(oct, reg));
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT%d_ERROR_INFO): %016llx\n",
|
||||
reg, i, LIO_CAST64(lio_read_csr64(oct, reg)));
|
||||
}
|
||||
|
||||
/* 0x10000 */
|
||||
for (i = 0; i < LIO_CN23XX_PF_MAX_INPUT_QUEUES; i++) {
|
||||
reg = LIO_CN23XX_SLI_IQ_PKT_CONTROL64(i);
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT%d_INPUT_CONTROL): %016lx\n",
|
||||
reg, i, lio_read_csr64(oct, reg));
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT%d_INPUT_CONTROL): %016llx\n",
|
||||
reg, i, LIO_CAST64(lio_read_csr64(oct, reg)));
|
||||
}
|
||||
|
||||
/* 0x10010 */
|
||||
for (i = 0; i < LIO_CN23XX_PF_MAX_INPUT_QUEUES; i++) {
|
||||
reg = LIO_CN23XX_SLI_IQ_BASE_ADDR64(i);
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT%d_INSTR_BADDR): %016lx\n",
|
||||
reg, i, lio_read_csr64(oct, reg));
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT%d_INSTR_BADDR): %016llx\n",
|
||||
reg, i, LIO_CAST64(lio_read_csr64(oct, reg)));
|
||||
}
|
||||
|
||||
/* 0x10020 */
|
||||
for (i = 0; i < LIO_CN23XX_PF_MAX_INPUT_QUEUES; i++) {
|
||||
reg = LIO_CN23XX_SLI_IQ_DOORBELL(i);
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT%d_INSTR_BAOFF_DBELL): %016lx\n",
|
||||
reg, i, lio_read_csr64(oct, reg));
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT%d_INSTR_BAOFF_DBELL): %016llx\n",
|
||||
reg, i, LIO_CAST64(lio_read_csr64(oct, reg)));
|
||||
}
|
||||
|
||||
/* 0x10030 */
|
||||
for (i = 0; i < LIO_CN23XX_PF_MAX_INPUT_QUEUES; i++) {
|
||||
reg = LIO_CN23XX_SLI_IQ_SIZE(i);
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT%d_INSTR_FIFO_RSIZE): %016lx\n",
|
||||
reg, i, lio_read_csr64(oct, reg));
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT%d_INSTR_FIFO_RSIZE): %016llx\n",
|
||||
reg, i, LIO_CAST64(lio_read_csr64(oct, reg)));
|
||||
}
|
||||
|
||||
/* 0x10040 */
|
||||
for (i = 0; i < LIO_CN23XX_PF_MAX_INPUT_QUEUES; i++)
|
||||
reg = LIO_CN23XX_SLI_IQ_INSTR_COUNT64(i);
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT_IN_DONE%d_CNTS): %016lx\n",
|
||||
reg, i, lio_read_csr64(oct, reg));
|
||||
len += sprintf(s + len, "[%08x] (SLI_PKT_IN_DONE%d_CNTS): %016llx\n",
|
||||
reg, i, LIO_CAST64(lio_read_csr64(oct, reg)));
|
||||
|
||||
return (len);
|
||||
}
|
||||
@ -1574,8 +1576,8 @@ lio_set_intrmod_cfg(struct lio *lio, struct octeon_intrmod_cfg *intr_cfg)
|
||||
lio_dev_err(oct_dev, "intrmod config failed. Status: %llx\n",
|
||||
LIO_CAST64(retval));
|
||||
else
|
||||
lio_dev_info(oct_dev, "Rx-Adaptive Interrupt moderation enabled:%lx\n",
|
||||
intr_cfg->rx_enable);
|
||||
lio_dev_info(oct_dev, "Rx-Adaptive Interrupt moderation enabled:%llx\n",
|
||||
LIO_CAST64(intr_cfg->rx_enable));
|
||||
|
||||
lio_free_soft_command(oct_dev, sc);
|
||||
|
||||
|
@ -603,6 +603,9 @@ _ixv= ixv
|
||||
_linprocfs= linprocfs
|
||||
_linsysfs= linsysfs
|
||||
_linux= linux
|
||||
.if ${MK_SOURCELESS_UCODE} != "no"
|
||||
_lio= lio
|
||||
.endif
|
||||
_nctgpio= nctgpio
|
||||
_ndis= ndis
|
||||
_pccard= pccard
|
||||
@ -711,9 +714,6 @@ _ixl= ixl
|
||||
_ixlv= ixlv
|
||||
_linux64= linux64
|
||||
_linux_common= linux_common
|
||||
.if ${MK_SOURCELESS_UCODE} != "no"
|
||||
_lio= lio
|
||||
.endif
|
||||
_ntb= ntb
|
||||
_pms= pms
|
||||
_qlxge= qlxge
|
||||
|
Loading…
Reference in New Issue
Block a user