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Define the minimum fractional period in terms of hz. We know hz is

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a magnitude smaller than itc_freq. A minimum period of 10*hz is
sufficient precision. As a side-effect, the number of clocks per
second, when the machine is idle, dropped by more than 50%.
Be anal and define the maximum period to be at least 4G seconds.
With a 64-bit counter and an ITC frequency that's expected to be
always less than 4Ghz, it takes longer than that to wrap around.
This commit is contained in:
Marcel Moolenaar 2011-06-25 16:35:43 +00:00
parent 674e7c4cfd
commit 3ebd36e3d0
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=223542
1 changed files with 2 additions and 2 deletions
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sys/ia64/ia64/clock.c
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@ -184,8 +184,8 @@ clock_configure(void *dummy)
et->et_quality = 1000; et->et_quality = 1000;
et->et_frequency = itc_freq; et->et_frequency = itc_freq;
et->et_min_period.sec = 0; et->et_min_period.sec = 0;
et->et_min_period.frac = ((1ul << 32) / itc_freq) << 32; et->et_min_period.frac = (0x8000000000000000ul / (u_long)(10*hz)) << 1;
et->et_max_period.sec = 0xfffffff0 / itc_freq; et->et_max_period.sec = ~0ul; /* XXX unless itc_freq >= (1<<32) */
et->et_max_period.frac = ((0xfffffffeul << 32) / itc_freq) << 32; et->et_max_period.frac = ((0xfffffffeul << 32) / itc_freq) << 32;
et->et_start = ia64_clock_start; et->et_start = ia64_clock_start;
et->et_stop = ia64_clock_stop; et->et_stop = ia64_clock_stop;