Add support for the Intel 82443MX chipset
PR: kern/33032 MFC after: 1 month
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=88323
@ -2389,7 +2389,7 @@ options POWERFAIL_NMI # make it beep instead of panicing
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# Supported SMB interfaces:
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# iicsmb I2C to SMB bridge with any iicbus interface
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# bktr brooktree848 I2C hardware interface
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# intpm Intel PIIX4 Power Management Unit
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# intpm Intel PIIX4 (82371AB, 82443MX) Power Management Unit
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# alpm Acer Aladdin-IV/V/Pro2 Power Management Unit
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# ichsmb Intel ICH SMBus controller chips (82801AA, 82801AB, 82801BA)
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#
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@ -102,7 +102,7 @@ isab_probe(device_t dev)
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case 0x122e8086: /* Intel 82371FB */
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case 0x70008086: /* Intel 82371SB */
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case 0x71108086: /* Intel 82371AB */
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case 0x71988086: /* Intel 82371MX */
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case 0x71988086: /* Intel 82443MX */
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case 0x24108086: /* Intel 82801AA (ICH) */
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case 0x24208086: /* Intel 82801AB (ICH0) */
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case 0x24408086: /* Intel 82801AB (ICH2) */
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@ -175,8 +175,9 @@ struct pci_quirk {
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};
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struct pci_quirk pci_quirks[] = {
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/* The Intel 82371AB has a map register at offset 0x90. */
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/* The Intel 82371AB and 82443MX has a map register at offset 0x90. */
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{ 0x71138086, PCI_QUIRK_MAP_REG, 0x90, 0 },
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{ 0x719b8086, PCI_QUIRK_MAP_REG, 0x90, 0 },
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/* As does the Serverworks OSB4 (the SMBus mapping register) */
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{ 0x02001166, PCI_QUIRK_MAP_REG, 0x90, 0 },
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@ -2389,7 +2389,7 @@ options POWERFAIL_NMI # make it beep instead of panicing
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# Supported SMB interfaces:
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# iicsmb I2C to SMB bridge with any iicbus interface
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# bktr brooktree848 I2C hardware interface
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# intpm Intel PIIX4 Power Management Unit
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# intpm Intel PIIX4 (82371AB, 82443MX) Power Management Unit
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# alpm Acer Aladdin-IV/V/Pro2 Power Management Unit
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# ichsmb Intel ICH SMBus controller chips (82801AA, 82801AB, 82801BA)
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#
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@ -58,6 +58,7 @@ static struct _pcsid
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} pci_ids[] =
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{
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{ 0x71138086,"Intel 82371AB Power management controller"},
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{ 0x719b8086,"Intel 82443MX Power management controller"},
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#if 0
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/* Not a good idea yet, this stops isab0 functioning */
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{ 0x02001166,"ServerWorks OSB4 PCI to ISA Bridge"},
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