Import the binutils-2_15-branch from the sourceware CVS repository,

exactly as it was on Wed, 8 Jun 2005 15:34:48 +0000.

Corresponds to git commit 7e01d69a19a8fd079887f26853c8565da15ff340.

This is currently (and most likely forever :) the last commit on this
branch.
This commit is contained in:
Dimitry Andric 2010-10-18 21:20:10 +00:00
parent ecb78adf80
commit 42f6b9ffef
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/vendor/binutils/dist/; revision=214033
svn path=/vendor/binutils/binutils-2_15-branch-20050608-153448/; revision=214034; tag=vendor/binutils/binutils-2_15-branch-20050608-153448
32 changed files with 590 additions and 327 deletions

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@ -1,3 +1,46 @@
2005-01-05 Eric Botcazou <ebotcazou@libertysurf.fr>
* elf64-sparc.c (sparc64_elf_relocate_section): Ignore overflows
from STABS debugging sections again.
2004-10-16 H.J. Lu <hongjiu.lu@intel.com>
* elflink.c (elf_link_add_object_symbols): Also clear
_cooked_size for warning sections.
2004-09-07 Eric Botcazou <ebotcazou@libertysurf.fr>
Merge from mainline:
2004-08-31 Eric Botcazou <ebotcazou@libertysurf.fr>
* elf.c (special_sections): Add .gnu.linkonce.b modelled on .bss.
2004-06-09 Alexandre Oliva <aoliva@redhat.com>
* elflink.c (elf_sort_symbol): Compare section id, not pointers.
(elf_link_add_object_symbols): Likewise.
2004-08-10 Daniel Jacobowitz <dan@debian.org>
* elf.c (assign_file_positions_except_relocs): Revert unintended
change from 2004-04-08.
2004-05-28 Jason Thorpe <thorpej@wasabisystems.com>
* config.bfd (hppa*-*-netbsd*): Set targ_defvec to
bfd_elf32_hppa_nbsd_vec. Add bfd_elf32_hppa_linux_vec
to targ_selvecs.
* configure.in (bfd_elf32_hppa_nbsd_vec): Add case.
* configure: Regenerate.
* elf32-hppa.c (elf32_hppa_object_p): Add "elf32-hppa-netbsd"
case that accepts OSABI=NetBSD and OSABI=SysV.
(elf32_hppa_set_gp): For "elf32-hppa-netbsd", set the GP to
the base of .got or .data (if .got does not exist).
(elf32_hppa_post_process_headers): For elf32-hppa-netbsd,
set OSABI=NetBSD.
(TARGET_BIG_SYM): Add bfd_elf32_hppa_nbsd_vec case.
(TARGET_BIG_NAME): Add "elf32-hppa-netbsd" case.
* targets.c (bfd_elf32_hppa_nbsd_vec): Add extern declaration.
(_bfd_target_vector): Add bfd_elf32_hppa_nbsd_vec.
2004-05-17 Daniel Jacobowitz <dan@debian.org>
* configure.in: Mark unreleased for post-2.15 snapshots.

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@ -371,10 +371,14 @@ case "${targ}" in
;;
#endif
hppa*-*-linux-gnu* | hppa*-*-netbsd*)
hppa*-*-linux-gnu*)
targ_defvec=bfd_elf32_hppa_linux_vec
targ_selvecs=bfd_elf32_hppa_vec
;;
hppa*-*-netbsd*)
targ_defvec=bfd_elf32_hppa_nbsd_vec
targ_selvecs="bfd_elf32_hppa_vec bfd_elf32_hppa_linux_vec"
;;
hppa*-*-*elf* | hppa*-*-lites* | hppa*-*-sysv4* | hppa*-*-rtems* | hppa*-*-openbsd*)
targ_defvec=bfd_elf32_hppa_vec
targ_selvecs=bfd_elf32_hppa_linux_vec

377
bfd/configure vendored

File diff suppressed because it is too large Load Diff

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@ -603,6 +603,7 @@ do
bfd_elf32_frvfdpic_vec) tb="$tb elf32-frv.lo elf32.lo $elf" ;;
bfd_elf32_h8300_vec) tb="$tb elf32-h8300.lo elf32.lo $elf" ;;
bfd_elf32_hppa_linux_vec) tb="$tb elf32-hppa.lo elf32.lo $elf" ;;
bfd_elf32_hppa_nbsd_vec) tb="$tb elf32-hppa.lo elf32.lo $elf" ;;
bfd_elf32_hppa_vec) tb="$tb elf32-hppa.lo elf32.lo $elf" ;;
bfd_elf32_i370_vec) tb="$tb elf32-i370.lo elf32.lo $elf" ;;
bfd_elf32_i386_freebsd_vec) tb="$tb elf32-i386.lo elf32.lo $elf" ;;

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@ -2022,6 +2022,7 @@ bfd_section_from_elf_index (bfd *abfd, unsigned int index)
static struct bfd_elf_special_section const special_sections[] =
{
{ ".bss", 4, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE },
{ ".gnu.linkonce.b",15, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE },
{ ".comment", 8, 0, SHT_PROGBITS, 0 },
{ ".data", 5, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE },
{ ".data1", 6, 0, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE },
@ -4265,7 +4266,9 @@ assign_file_positions_except_relocs (bfd *abfd,
off = _bfd_elf_assign_file_position_for_section (hdr, off,
FALSE);
}
else if (hdr == i_shdrpp[tdata->symtab_section]
else if (hdr->sh_type == SHT_REL
|| hdr->sh_type == SHT_RELA
|| hdr == i_shdrpp[tdata->symtab_section]
|| hdr == i_shdrpp[tdata->symtab_shndx_section]
|| hdr == i_shdrpp[tdata->strtab_section])
hdr->sh_offset = -1;

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@ -901,6 +901,14 @@ elf32_hppa_object_p (bfd *abfd)
i_ehdrp->e_ident[EI_OSABI] != ELFOSABI_NONE) /* aka SYSV */
return FALSE;
}
else if (strcmp (bfd_get_target (abfd), "elf32-hppa-netbsd") == 0)
{
/* GCC on hppa-netbsd produces binaries with OSABI=NetBSD,
but the kernel produces corefiles with OSABI=SysV. */
if (i_ehdrp->e_ident[EI_OSABI] != ELFOSABI_NETBSD &&
i_ehdrp->e_ident[EI_OSABI] != ELFOSABI_NONE) /* aka SYSV */
return FALSE;
}
else
{
if (i_ehdrp->e_ident[EI_OSABI] != ELFOSABI_HPUX)
@ -2906,7 +2914,8 @@ elf32_hppa_set_gp (bfd *abfd, struct bfd_link_info *info)
if either the .plt or .got is larger than 0x2000. If both
the .plt and .got are smaller than 0x2000, choose the end of
the .plt section. */
sec = splt;
sec = strcmp (bfd_get_target (abfd), "elf32-hppa-netbsd") == 0
? NULL : splt;
if (sec != NULL)
{
gp_val = sec->_raw_size;
@ -2920,10 +2929,13 @@ elf32_hppa_set_gp (bfd *abfd, struct bfd_link_info *info)
sec = sgot;
if (sec != NULL)
{
/* We know we don't have a .plt. If .got is large,
offset our LTP. */
if (sec->_raw_size > 0x2000)
gp_val = 0x2000;
if (strcmp (bfd_get_target (abfd), "elf32-hppa-netbsd") != 0)
{
/* We know we don't have a .plt. If .got is large,
offset our LTP. */
if (sec->_raw_size > 0x2000)
gp_val = 0x2000;
}
}
else
{
@ -4123,6 +4135,10 @@ elf32_hppa_post_process_headers (bfd *abfd,
{
i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_LINUX;
}
else if (strcmp (bfd_get_target (abfd), "elf32-hppa-netbsd") == 0)
{
i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_NETBSD;
}
else
{
i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_HPUX;
@ -4192,3 +4208,10 @@ elf32_hppa_elf_get_symbol_type (Elf_Internal_Sym *elf_sym, int type)
#define INCLUDED_TARGET_FILE 1
#include "elf32-target.h"
#undef TARGET_BIG_SYM
#define TARGET_BIG_SYM bfd_elf32_hppa_nbsd_vec
#undef TARGET_BIG_NAME
#define TARGET_BIG_NAME "elf32-hppa-netbsd"
#include "elf32-target.h"

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@ -2635,10 +2635,14 @@ sparc64_elf_relocate_section (output_bfd, info, input_bfd, input_section,
/* The Solaris native linker silently disregards
overflows. We don't, but this breaks stabs debugging
info, whose relocations are only 32-bits wide. Ignore
overflows for discarded entries. */
overflows in this case and also for discarded entries. */
if ((r_type == R_SPARC_32 || r_type == R_SPARC_DISP32)
&& _bfd_elf_section_offset (output_bfd, info, input_section,
rel->r_offset) == (bfd_vma) -1)
&& (((input_section->flags & SEC_DEBUGGING) != 0
&& strcmp (bfd_section_name (input_bfd, input_section),
".stab") == 0)
|| _bfd_elf_section_offset (output_bfd, info,
input_section,
rel->r_offset) == (bfd_vma)-1))
break;
if (h != NULL)

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@ -2700,7 +2700,7 @@ elf_sort_symbol (const void *arg1, const void *arg2)
return vdiff > 0 ? 1 : -1;
else
{
long sdiff = h1->root.u.def.section - h2->root.u.def.section;
long sdiff = h1->root.u.def.section->id - h2->root.u.def.section->id;
if (sdiff != 0)
return sdiff > 0 ? 1 : -1;
}
@ -2948,6 +2948,7 @@ elf_link_add_object_symbols (bfd *abfd, struct bfd_link_info *info)
the section size so that the warning does not
get copied into the output file. */
s->_raw_size = 0;
s->_cooked_size = 0;
continue;
}
}
@ -2974,6 +2975,7 @@ elf_link_add_object_symbols (bfd *abfd, struct bfd_link_info *info)
/* Clobber the section size so that the warning does
not get copied into the output file. */
s->_raw_size = 0;
s->_cooked_size = 0;
}
}
}
@ -3954,7 +3956,7 @@ elf_link_add_object_symbols (bfd *abfd, struct bfd_link_info *info)
i = idx + 1;
else
{
long sdiff = slook - h->root.u.def.section;
long sdiff = slook->id - h->root.u.def.section->id;
if (sdiff < 0)
j = idx;
else if (sdiff > 0)

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@ -526,6 +526,7 @@ extern const bfd_target bfd_elf32_frv_vec;
extern const bfd_target bfd_elf32_frvfdpic_vec;
extern const bfd_target bfd_elf32_h8300_vec;
extern const bfd_target bfd_elf32_hppa_linux_vec;
extern const bfd_target bfd_elf32_hppa_nbsd_vec;
extern const bfd_target bfd_elf32_hppa_vec;
extern const bfd_target bfd_elf32_i370_vec;
extern const bfd_target bfd_elf32_i386_freebsd_vec;
@ -817,6 +818,7 @@ static const bfd_target * const _bfd_target_vector[] = {
&bfd_elf32_frvfdpic_vec,
&bfd_elf32_h8300_vec,
&bfd_elf32_hppa_linux_vec,
&bfd_elf32_hppa_nbsd_vec,
&bfd_elf32_hppa_vec,
&bfd_elf32_i370_vec,
&bfd_elf32_i386_freebsd_vec,

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@ -1,3 +1,3 @@
#define BFD_VERSION_DATE 20040523
#define BFD_VERSION_DATE 20050317
#define BFD_VERSION @bfd_version@
#define BFD_VERSION_STRING @bfd_version_string@

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@ -1,3 +1,17 @@
2005-06-08 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
* config/tc-m32r.c (use_parallel): Change default value from 1 to 0.
2004-08-18 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
* config/tc-mips.c (append_insn): Handle delay slots in branch likely
correctly.
2004-07-28 Jason Thorpe <thorpej@wasabisystems.com>
* config/tc-hppa.h (TARGET_FORMAT): Set to "elf32-hppa-netbsd"
for TE_NetBSD.
2004-05-23 Alan Modra <amodra@bigpond.net.au>
* expr.c (operand, operator): Don't reject '++' and '--'.

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@ -55,13 +55,17 @@
#endif
#else /* TARGET_ARCH_SIZE == 32 */
#include "bfd/elf32-hppa.h"
#if defined (TE_LINUX) || defined (TE_NetBSD)
#if defined (TE_LINUX)
#define TARGET_FORMAT "elf32-hppa-linux"
#else
#if defined (TE_NetBSD)
#define TARGET_FORMAT "elf32-hppa-netbsd"
#else
#define TARGET_FORMAT "elf32-hppa"
#endif
#endif
#endif
#endif
#ifdef OBJ_SOM
#include "bfd/som.h"

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@ -127,7 +127,7 @@ static int warn_explicit_parallel_conflicts = 1;
static int ignore_parallel_conflicts = 0;
/* Non-zero if insns can be made parallel. */
static int use_parallel = 1;
static int use_parallel = 0;
/* Non-zero if optimizations should be performed. */
static int optimize;

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@ -2708,6 +2708,7 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
prev_insn_reloc_type[1] = BFD_RELOC_UNUSED;
prev_insn_reloc_type[2] = BFD_RELOC_UNUSED;
prev_insn_extended = 0;
prev_insn_is_delay_slot = 1;
}
else
{

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@ -1,3 +1,29 @@
2005-03-10 Aldy Hernandez <aldyh@redhat.com>
* gas/ppc/e500.d: Fix encoding of efscfd.
2004-10-06 Aldy Hernandez <aldyh@redhat.com>
* gas/ppc/e500.s: Add double-precision instructions.
* gas/ppc/e500.d: Same.
2004-09-07 Eric Botcazou <ebotcazou@libertysurf.fr>
Merge from mainline:
2004-04-19 Jakub Jelinek <jakub@redhat.com>
* gas/cfi/cfi-sparc64-1.d: Update.
2004-08-18 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
* gas/mips/branch-swap.s: New testcase.
* gas/mips/branch-swap.d: New testcase.
* gas/mips/mips.exp: Run the testcase.
2004-07-30 Michal Ludvig <mludvig@suse.cz>
* gas/i386/padlock.s, gas/i386/padlock.d: New tests for
VIA PadLock instructions.
2004-05-11 Daniel Jacobowitz <dan@debian.org>
Revert patch for 2.15:

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@ -4,7 +4,7 @@
The section .eh_frame contains:
00000000 00000011 00000000 CIE
00000000 00000014 00000000 CIE
Version: 1
Augmentation: "zR"
Code alignment factor: 4
@ -13,13 +13,13 @@ The section .eh_frame contains:
Augmentation data: 1b
DW_CFA_def_cfa: r14 ofs 2047
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
00000015 00000017 00000019 FDE cie=00000000 pc=0000001d..0000004d
DW_CFA_advance_loc: 4 to 00000021
00000018 00000014 0000001c FDE cie=00000000 pc=00000020..00000050
DW_CFA_advance_loc: 4 to 00000024
DW_CFA_def_cfa_reg: r30
DW_CFA_GNU_window_save
DW_CFA_register: r15 in r31
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop

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@ -18,4 +18,10 @@ Disassembly of section .text:
23:[ ]*f3 0f a7 e8 [ ]*repz xcryptofb
27:[ ]*0f a7 c0 [ ]*xstorerng
2a:[ ]*f3 0f a7 c0 [ ]*repz xstorerng
2e:[ ]*f3 0f a6 c0 [ ]*repz montmul
32:[ ]*f3 0f a6 c0 [ ]*repz montmul
36:[ ]*f3 0f a6 c8 [ ]*repz xsha1
3a:[ ]*f3 0f a6 c8 [ ]*repz xsha1
3e:[ ]*f3 0f a6 d0 [ ]*repz xsha256
42:[ ]*f3 0f a6 d0 [ ]*repz xsha256
[ ]*\.\.\.

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@ -14,5 +14,11 @@ foo:
rep xcryptofb
xstore
rep xstore
montmul
rep montmul
xsha1
rep xsha1
xsha256
rep xsha256
.p2align 4,0

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@ -0,0 +1,20 @@
#as: -march=mips2
#objdump: -dr
#name: MIPS branch-swap
.*: file format .*mips.*
Disassembly of section \.text:
00000000 <foo-0x10>:
0: 5040ffff beqzl v0,0 <foo-0x10>
4: 00000000 nop
8: 1000fffd b 0 <foo-0x10>
c: 00000000 nop
00000010 <foo>:
10: 5040ffff beqzl v0,10 <foo>
14: 00000000 nop
18: 1000fffd b 10 <foo>
1c: 00000000 nop
\.\.\.

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@ -0,0 +1,9 @@
.set push
.set mips2
1: beqzl $2, 1b
b 1b
foo: beqzl $2, foo
b foo
.set pop
.space 8

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@ -429,6 +429,7 @@ if { [istarget mips*-*-*] } then {
run_dump_test_arches "branch-misc-1" [mips_arch_list_matching mips1]
run_list_test_arches "branch-misc-2" "-32 -non_shared" [mips_arch_list_matching mips1]
run_list_test_arches "branch-misc-2pic" "-32 -call_shared" [mips_arch_list_matching mips1]
run_dump_test "branch-swap"
if $ilocks {
run_dump_test "div-ilocks"

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@ -19,3 +19,33 @@ Disassembly of section \.text:
24: 7c 00 04 4c bbelr
28: 7d 00 83 a6 mtspefscr r8
2c: 7d 20 82 a6 mfspefscr r9
30: 10 a0 22 cf efscfd r5,r4
34: 10 a4 02 e4 efdabs r5,r4
38: 10 a4 02 e5 efdnabs r5,r4
3c: 10 a4 02 e6 efdneg r5,r4
40: 10 a4 1a e0 efdadd r5,r4,r3
44: 10 a4 1a e1 efdsub r5,r4,r3
48: 10 a4 1a e8 efdmul r5,r4,r3
4c: 10 a4 1a e9 efddiv r5,r4,r3
50: 12 84 1a ec efdcmpgt cr5,r4,r3
54: 12 84 1a ed efdcmplt cr5,r4,r3
58: 12 84 1a ee efdcmpeq cr5,r4,r3
5c: 12 84 1a fc efdtstgt cr5,r4,r3
60: 12 84 1a fc efdtstgt cr5,r4,r3
64: 12 84 1a fd efdtstlt cr5,r4,r3
68: 12 84 1a fe efdtsteq cr5,r4,r3
6c: 10 a0 22 f1 efdcfsi r5,r4
70: 10 a0 22 e3 efdcfsid r5,r4
74: 10 a0 22 f0 efdcfui r5,r4
78: 10 a0 22 e2 efdcfuid r5,r4
7c: 10 a0 22 f3 efdcfsf r5,r4
80: 10 a0 22 f2 efdcfuf r5,r4
84: 10 a0 22 f5 efdctsi r5,r4
88: 10 a0 22 eb efdctsidz r5,r4
8c: 10 a0 22 fa efdctsiz r5,r4
90: 10 a0 22 f4 efdctui r5,r4
94: 10 a0 22 ea efdctuidz r5,r4
98: 10 a0 22 f8 efdctuiz r5,r4
9c: 10 a0 22 f7 efdctsf r5,r4
a0: 10 a0 22 f6 efdctuf r5,r4
a4: 10 a0 22 ef efdcfs r5,r4

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@ -13,3 +13,35 @@ start:
bbelr
mtspefscr 8
mfspefscr 9
# Double-precision opcodes.
efscfd 5,4
efdabs 5,4
efdnabs 5,4
efdneg 5,4
efdadd 5,4,3
efdsub 5,4,3
efdmul 5,4,3
efddiv 5,4,3
efdcmpgt 5,4,3
efdcmplt 5,4,3
efdcmpeq 5,4,3
efdtstgt 5,4,3
efdtstgt 5,4,3
efdtstlt 5,4,3
efdtsteq 5,4,3
efdcfsi 5,4
efdcfsid 5,4
efdcfui 5,4
efdcfuid 5,4
efdcfsf 5,4
efdcfuf 5,4
efdctsi 5,4
efdctsidz 5,4
efdctsiz 5,4
efdctui 5,4
efdctuidz 5,4
efdctuiz 5,4
efdctsf 5,4
efdctuf 5,4
efdcfs 5,4

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@ -1,3 +1,7 @@
2004-08-30 Michal Ludvig <mludvig@suse.cz>
* i386.h (i386_optab): Added montmul/xsha1/xsha256 insns.
2004-04-08 Alan Modra <amodra@bigpond.net.au>
Apply from mainline.

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@ -1367,7 +1367,10 @@ static const template i386_optab[] = {
{"xcryptcbc", 0, 0xf30fa7d0, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
{"xcryptcfb", 0, 0xf30fa7e0, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
{"xcryptofb", 0, 0xf30fa7e8, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
/* alias for xstorerng */
{"montmul", 0, 0xf30fa6c0, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
{"xsha1", 0, 0xf30fa6c8, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
{"xsha256", 0, 0xf30fa6d0, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
/* Alias for xstorerng. */
{"xstore", 0, 0x0fa7c0, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
/* sentinel */

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@ -1,3 +1,13 @@
2005-01-21 Nick Hudson <skrll@netbsd.org>
PR ld/676
* emultempl/hppaelf.em (hppaelf_create_output_section_statements):
Handle bfd_elf32_hppa_nbsd_vec.
2004-07-28 Jason Thorpe <thorpej@wasabisystems.com>
* emulparams/hppanbsd.sh (OUTPUT_FORMAT): Set to "elf32-hppa-netbsd".
2004-05-13 Joel Sherrill <joel@oarcorp.com>
* configure.tgt (or32-*-rtems*): Switch to elf and

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@ -3,3 +3,4 @@
. ${srcdir}/emulparams/hppalinux.sh
OUTPUT_FORMAT="elf32-hppa-netbsd"

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@ -67,9 +67,11 @@ static void
hppaelf_create_output_section_statements (void)
{
extern const bfd_target bfd_elf32_hppa_linux_vec;
extern const bfd_target bfd_elf32_hppa_nbsd_vec;
extern const bfd_target bfd_elf32_hppa_vec;
if (link_info.hash->creator != &bfd_elf32_hppa_linux_vec
&& link_info.hash->creator != &bfd_elf32_hppa_nbsd_vec
&& link_info.hash->creator != &bfd_elf32_hppa_vec)
return;

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@ -1,3 +1,31 @@
2005-03-07 Aldy Hernandez <aldyh@redhat.com>
* ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
2004-12-11 David O'Brien <obrien@FreeBSD.org>
Merge from mainline:
2004-04-20 Jakub Jelinek <jakub@redhat.com>
* sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
(fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
suffix. Use fmov*x macros, create all 3 fpsize variants in one
macro. Adjust all users.
2004-10-06 Aldy Hernandez <aldyh@redhat.com>
* ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
2004-07-30 Michal Ludvig <mludvig@suse.cz>
* i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
(GRPPADLCK2): New define.
(twobyte_has_modrm): True for 0xA6.
(grps): GRPPADLCK2 for opcode 0xA6.
2004-05-13 Nick Clifton <nickc@redhat.com>
* po/fr.po: Updated French translation.

View File

@ -393,7 +393,8 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
#define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0
#define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0
#define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0
#define GRPPADLCK NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0
#define GRPPADLCK1 NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0
#define GRPPADLCK2 NULL, NULL, USE_GROUPS, NULL, 24, NULL, 0
#define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0
#define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0
@ -952,8 +953,8 @@ static const struct dis386 dis386_twobyte[] = {
{ "btS", Ev, Gv, XX },
{ "shldS", Ev, Gv, Ib },
{ "shldS", Ev, Gv, CL },
{ "(bad)", XX, XX, XX },
{ GRPPADLCK },
{ GRPPADLCK2 },
{ GRPPADLCK1 },
/* a8 */
{ "pushT", gs, XX, XX },
{ "popT", gs, XX, XX },
@ -1091,7 +1092,7 @@ static const unsigned char twobyte_has_modrm[256] = {
/* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,1,1,1,1, /* 7f */
/* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
/* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
/* a0 */ 0,0,0,1,1,1,0,1,0,0,0,1,1,1,1,1, /* af */
/* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
/* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
/* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
/* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
@ -1455,7 +1456,7 @@ static const struct dis386 grps[][8] = {
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
},
/* GRPPADLCK */
/* GRPPADLCK1 */
{
{ "xstorerng", OP_0f07, 0, XX, XX },
{ "xcryptecb", OP_0f07, 0, XX, XX },
@ -1465,6 +1466,17 @@ static const struct dis386 grps[][8] = {
{ "xcryptofb", OP_0f07, 0, XX, XX },
{ "(bad)", OP_0f07, 0, XX, XX },
{ "(bad)", OP_0f07, 0, XX, XX },
},
/* GRPPADLCK2 */
{
{ "montmul", OP_0f07, 0, XX, XX },
{ "xsha1", OP_0f07, 0, XX, XX },
{ "xsha256", OP_0f07, 0, XX, XX },
{ "(bad)", OP_0f07, 0, XX, XX },
{ "(bad)", OP_0f07, 0, XX, XX },
{ "(bad)", OP_0f07, 0, XX, XX },
{ "(bad)", OP_0f07, 0, XX, XX },
{ "(bad)", OP_0f07, 0, XX, XX },
}
};

View File

@ -1940,6 +1940,41 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{ "nmaclhwso.", XO(4,494,1,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } },
{ "mfvscr", VX(4, 1540), VX_MASK, PPCVEC, { VD } },
{ "mtvscr", VX(4, 1604), VX_MASK, PPCVEC, { VB } },
/* Double-precision opcodes. */
/* Some of these conflict with AltiVec, so move them before, since
PPCVEC includes the PPC_OPCODE_PPC set. */
{ "efscfd", VX(4, 719), VX_MASK, PPCEFS, { RS, RB } },
{ "efdabs", VX(4, 740), VX_MASK, PPCEFS, { RS, RA } },
{ "efdnabs", VX(4, 741), VX_MASK, PPCEFS, { RS, RA } },
{ "efdneg", VX(4, 742), VX_MASK, PPCEFS, { RS, RA } },
{ "efdadd", VX(4, 736), VX_MASK, PPCEFS, { RS, RA, RB } },
{ "efdsub", VX(4, 737), VX_MASK, PPCEFS, { RS, RA, RB } },
{ "efdmul", VX(4, 744), VX_MASK, PPCEFS, { RS, RA, RB } },
{ "efddiv", VX(4, 745), VX_MASK, PPCEFS, { RS, RA, RB } },
{ "efdcmpgt", VX(4, 748), VX_MASK, PPCEFS, { CRFD, RA, RB } },
{ "efdcmplt", VX(4, 749), VX_MASK, PPCEFS, { CRFD, RA, RB } },
{ "efdcmpeq", VX(4, 750), VX_MASK, PPCEFS, { CRFD, RA, RB } },
{ "efdtstgt", VX(4, 764), VX_MASK, PPCEFS, { CRFD, RA, RB } },
{ "efdtstlt", VX(4, 765), VX_MASK, PPCEFS, { CRFD, RA, RB } },
{ "efdtsteq", VX(4, 766), VX_MASK, PPCEFS, { CRFD, RA, RB } },
{ "efdcfsi", VX(4, 753), VX_MASK, PPCEFS, { RS, RB } },
{ "efdcfsid", VX(4, 739), VX_MASK, PPCEFS, { RS, RB } },
{ "efdcfui", VX(4, 752), VX_MASK, PPCEFS, { RS, RB } },
{ "efdcfuid", VX(4, 738), VX_MASK, PPCEFS, { RS, RB } },
{ "efdcfsf", VX(4, 755), VX_MASK, PPCEFS, { RS, RB } },
{ "efdcfuf", VX(4, 754), VX_MASK, PPCEFS, { RS, RB } },
{ "efdctsi", VX(4, 757), VX_MASK, PPCEFS, { RS, RB } },
{ "efdctsidz",VX(4, 747), VX_MASK, PPCEFS, { RS, RB } },
{ "efdctsiz", VX(4, 762), VX_MASK, PPCEFS, { RS, RB } },
{ "efdctui", VX(4, 756), VX_MASK, PPCEFS, { RS, RB } },
{ "efdctuidz",VX(4, 746), VX_MASK, PPCEFS, { RS, RB } },
{ "efdctuiz", VX(4, 760), VX_MASK, PPCEFS, { RS, RB } },
{ "efdctsf", VX(4, 759), VX_MASK, PPCEFS, { RS, RB } },
{ "efdctuf", VX(4, 758), VX_MASK, PPCEFS, { RS, RB } },
{ "efdcfs", VX(4, 751), VX_MASK, PPCEFS, { RS, RB } },
/* End of double-precision opcodes. */
{ "vaddcuw", VX(4, 384), VX_MASK, PPCVEC, { VD, VA, VB } },
{ "vaddfp", VX(4, 10), VX_MASK, PPCVEC, { VD, VA, VB } },
{ "vaddsbs", VX(4, 768), VX_MASK, PPCVEC, { VD, VA, VB } },

View File

@ -1273,110 +1273,72 @@ cond ("bz", "tz", CONDZ, F_CONDBR|F_ALIAS), /* for e */
#define FM_DF 2 /* v9 */
#define FM_QF 3 /* v9 */
#define fmovicc(opcode, fpsize, cond, flags) /* v9 */ \
{ opcode, F3F(2, 0x35, 0x100+fpsize)|MCOND(cond,0), F3F(~2, ~0x35, ~(0x100+fpsize))|MCOND(~cond,~0), "z,f,g", flags, v9 }, \
{ opcode, F3F(2, 0x35, 0x180+fpsize)|MCOND(cond,0), F3F(~2, ~0x35, ~(0x180+fpsize))|MCOND(~cond,~0), "Z,f,g", flags, v9 }
#define fmoviccx(opcode, fpsize, args, cond, flags) /* v9 */ \
{ opcode, F3F(2, 0x35, 0x100+fpsize)|MCOND(cond,0), F3F(~2, ~0x35, ~(0x100+fpsize))|MCOND(~cond,~0), "z," args, flags, v9 }, \
{ opcode, F3F(2, 0x35, 0x180+fpsize)|MCOND(cond,0), F3F(~2, ~0x35, ~(0x180+fpsize))|MCOND(~cond,~0), "Z," args, flags, v9 }
#define fmovfcc(opcode, fpsize, fcond, flags) /* v9 */ \
{ opcode, F3F(2, 0x35, 0x000+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x000+fpsize))|MCOND(~fcond,~0), "6,f,g", flags, v9 }, \
{ opcode, F3F(2, 0x35, 0x040+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x040+fpsize))|MCOND(~fcond,~0), "7,f,g", flags, v9 }, \
{ opcode, F3F(2, 0x35, 0x080+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x080+fpsize))|MCOND(~fcond,~0), "8,f,g", flags, v9 }, \
{ opcode, F3F(2, 0x35, 0x0c0+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x0c0+fpsize))|MCOND(~fcond,~0), "9,f,g", flags, v9 }
#define fmovfccx(opcode, fpsize, args, fcond, flags) /* v9 */ \
{ opcode, F3F(2, 0x35, 0x000+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x000+fpsize))|MCOND(~fcond,~0), "6," args, flags, v9 }, \
{ opcode, F3F(2, 0x35, 0x040+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x040+fpsize))|MCOND(~fcond,~0), "7," args, flags, v9 }, \
{ opcode, F3F(2, 0x35, 0x080+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x080+fpsize))|MCOND(~fcond,~0), "8," args, flags, v9 }, \
{ opcode, F3F(2, 0x35, 0x0c0+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x0c0+fpsize))|MCOND(~fcond,~0), "9," args, flags, v9 }
/* FIXME: use fmovicc/fmovfcc? */ /* v9 */
#define fmovcc(opcode, fpsize, cond, fcond, flags) /* v9 */ \
{ opcode, F3F(2, 0x35, 0x100+fpsize)|MCOND(cond,0), F3F(~2, ~0x35, ~(0x100+fpsize))|MCOND(~cond,~0), "z,f,g", flags | F_FLOAT, v9 }, \
{ opcode, F3F(2, 0x35, 0x000+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x000+fpsize))|MCOND(~fcond,~0), "6,f,g", flags | F_FLOAT, v9 }, \
{ opcode, F3F(2, 0x35, 0x180+fpsize)|MCOND(cond,0), F3F(~2, ~0x35, ~(0x180+fpsize))|MCOND(~cond,~0), "Z,f,g", flags | F_FLOAT, v9 }, \
{ opcode, F3F(2, 0x35, 0x040+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x040+fpsize))|MCOND(~fcond,~0), "7,f,g", flags | F_FLOAT, v9 }, \
{ opcode, F3F(2, 0x35, 0x080+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x080+fpsize))|MCOND(~fcond,~0), "8,f,g", flags | F_FLOAT, v9 }, \
{ opcode, F3F(2, 0x35, 0x0c0+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x0c0+fpsize))|MCOND(~fcond,~0), "9,f,g", flags | F_FLOAT, v9 }
#define fmovccx(opcode, fpsize, args, cond, fcond, flags) /* v9 */ \
{ opcode, F3F(2, 0x35, 0x100+fpsize)|MCOND(cond,0), F3F(~2, ~0x35, ~(0x100+fpsize))|MCOND(~cond,~0), "z," args, flags | F_FLOAT, v9 }, \
{ opcode, F3F(2, 0x35, 0x000+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x000+fpsize))|MCOND(~fcond,~0), "6," args, flags | F_FLOAT, v9 }, \
{ opcode, F3F(2, 0x35, 0x180+fpsize)|MCOND(cond,0), F3F(~2, ~0x35, ~(0x180+fpsize))|MCOND(~cond,~0), "Z," args, flags | F_FLOAT, v9 }, \
{ opcode, F3F(2, 0x35, 0x040+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x040+fpsize))|MCOND(~fcond,~0), "7," args, flags | F_FLOAT, v9 }, \
{ opcode, F3F(2, 0x35, 0x080+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x080+fpsize))|MCOND(~fcond,~0), "8," args, flags | F_FLOAT, v9 }, \
{ opcode, F3F(2, 0x35, 0x0c0+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x0c0+fpsize))|MCOND(~fcond,~0), "9," args, flags | F_FLOAT, v9 }
/* v9 */ fmovcc ("fmovda", FM_DF, CONDA, FCONDA, 0),
/* v9 */ fmovcc ("fmovqa", FM_QF, CONDA, FCONDA, 0),
/* v9 */ fmovcc ("fmovsa", FM_SF, CONDA, FCONDA, 0),
/* v9 */ fmovicc ("fmovdcc", FM_DF, CONDCC, 0),
/* v9 */ fmovicc ("fmovqcc", FM_QF, CONDCC, 0),
/* v9 */ fmovicc ("fmovscc", FM_SF, CONDCC, 0),
/* v9 */ fmovicc ("fmovdcs", FM_DF, CONDCS, 0),
/* v9 */ fmovicc ("fmovqcs", FM_QF, CONDCS, 0),
/* v9 */ fmovicc ("fmovscs", FM_SF, CONDCS, 0),
/* v9 */ fmovcc ("fmovde", FM_DF, CONDE, FCONDE, 0),
/* v9 */ fmovcc ("fmovqe", FM_QF, CONDE, FCONDE, 0),
/* v9 */ fmovcc ("fmovse", FM_SF, CONDE, FCONDE, 0),
/* v9 */ fmovcc ("fmovdg", FM_DF, CONDG, FCONDG, 0),
/* v9 */ fmovcc ("fmovqg", FM_QF, CONDG, FCONDG, 0),
/* v9 */ fmovcc ("fmovsg", FM_SF, CONDG, FCONDG, 0),
/* v9 */ fmovcc ("fmovdge", FM_DF, CONDGE, FCONDGE, 0),
/* v9 */ fmovcc ("fmovqge", FM_QF, CONDGE, FCONDGE, 0),
/* v9 */ fmovcc ("fmovsge", FM_SF, CONDGE, FCONDGE, 0),
/* v9 */ fmovicc ("fmovdgeu", FM_DF, CONDGEU, F_ALIAS),
/* v9 */ fmovicc ("fmovqgeu", FM_QF, CONDGEU, F_ALIAS),
/* v9 */ fmovicc ("fmovsgeu", FM_SF, CONDGEU, F_ALIAS),
/* v9 */ fmovicc ("fmovdgu", FM_DF, CONDGU, 0),
/* v9 */ fmovicc ("fmovqgu", FM_QF, CONDGU, 0),
/* v9 */ fmovicc ("fmovsgu", FM_SF, CONDGU, 0),
/* v9 */ fmovcc ("fmovdl", FM_DF, CONDL, FCONDL, 0),
/* v9 */ fmovcc ("fmovql", FM_QF, CONDL, FCONDL, 0),
/* v9 */ fmovcc ("fmovsl", FM_SF, CONDL, FCONDL, 0),
/* v9 */ fmovcc ("fmovdle", FM_DF, CONDLE, FCONDLE, 0),
/* v9 */ fmovcc ("fmovqle", FM_QF, CONDLE, FCONDLE, 0),
/* v9 */ fmovcc ("fmovsle", FM_SF, CONDLE, FCONDLE, 0),
/* v9 */ fmovicc ("fmovdleu", FM_DF, CONDLEU, 0),
/* v9 */ fmovicc ("fmovqleu", FM_QF, CONDLEU, 0),
/* v9 */ fmovicc ("fmovsleu", FM_SF, CONDLEU, 0),
/* v9 */ fmovfcc ("fmovdlg", FM_DF, FCONDLG, 0),
/* v9 */ fmovfcc ("fmovqlg", FM_QF, FCONDLG, 0),
/* v9 */ fmovfcc ("fmovslg", FM_SF, FCONDLG, 0),
/* v9 */ fmovicc ("fmovdlu", FM_DF, CONDLU, F_ALIAS),
/* v9 */ fmovicc ("fmovqlu", FM_QF, CONDLU, F_ALIAS),
/* v9 */ fmovicc ("fmovslu", FM_SF, CONDLU, F_ALIAS),
/* v9 */ fmovcc ("fmovdn", FM_DF, CONDN, FCONDN, 0),
/* v9 */ fmovcc ("fmovqn", FM_QF, CONDN, FCONDN, 0),
/* v9 */ fmovcc ("fmovsn", FM_SF, CONDN, FCONDN, 0),
/* v9 */ fmovcc ("fmovdne", FM_DF, CONDNE, FCONDNE, 0),
/* v9 */ fmovcc ("fmovqne", FM_QF, CONDNE, FCONDNE, 0),
/* v9 */ fmovcc ("fmovsne", FM_SF, CONDNE, FCONDNE, 0),
/* v9 */ fmovicc ("fmovdneg", FM_DF, CONDNEG, 0),
/* v9 */ fmovicc ("fmovqneg", FM_QF, CONDNEG, 0),
/* v9 */ fmovicc ("fmovsneg", FM_SF, CONDNEG, 0),
/* v9 */ fmovcc ("fmovdnz", FM_DF, CONDNZ, FCONDNZ, F_ALIAS),
/* v9 */ fmovcc ("fmovqnz", FM_QF, CONDNZ, FCONDNZ, F_ALIAS),
/* v9 */ fmovcc ("fmovsnz", FM_SF, CONDNZ, FCONDNZ, F_ALIAS),
/* v9 */ fmovfcc ("fmovdo", FM_DF, FCONDO, 0),
/* v9 */ fmovfcc ("fmovqo", FM_QF, FCONDO, 0),
/* v9 */ fmovfcc ("fmovso", FM_SF, FCONDO, 0),
/* v9 */ fmovicc ("fmovdpos", FM_DF, CONDPOS, 0),
/* v9 */ fmovicc ("fmovqpos", FM_QF, CONDPOS, 0),
/* v9 */ fmovicc ("fmovspos", FM_SF, CONDPOS, 0),
/* v9 */ fmovfcc ("fmovdu", FM_DF, FCONDU, 0),
/* v9 */ fmovfcc ("fmovqu", FM_QF, FCONDU, 0),
/* v9 */ fmovfcc ("fmovsu", FM_SF, FCONDU, 0),
/* v9 */ fmovfcc ("fmovdue", FM_DF, FCONDUE, 0),
/* v9 */ fmovfcc ("fmovque", FM_QF, FCONDUE, 0),
/* v9 */ fmovfcc ("fmovsue", FM_SF, FCONDUE, 0),
/* v9 */ fmovfcc ("fmovdug", FM_DF, FCONDUG, 0),
/* v9 */ fmovfcc ("fmovqug", FM_QF, FCONDUG, 0),
/* v9 */ fmovfcc ("fmovsug", FM_SF, FCONDUG, 0),
/* v9 */ fmovfcc ("fmovduge", FM_DF, FCONDUGE, 0),
/* v9 */ fmovfcc ("fmovquge", FM_QF, FCONDUGE, 0),
/* v9 */ fmovfcc ("fmovsuge", FM_SF, FCONDUGE, 0),
/* v9 */ fmovfcc ("fmovdul", FM_DF, FCONDUL, 0),
/* v9 */ fmovfcc ("fmovqul", FM_QF, FCONDUL, 0),
/* v9 */ fmovfcc ("fmovsul", FM_SF, FCONDUL, 0),
/* v9 */ fmovfcc ("fmovdule", FM_DF, FCONDULE, 0),
/* v9 */ fmovfcc ("fmovqule", FM_QF, FCONDULE, 0),
/* v9 */ fmovfcc ("fmovsule", FM_SF, FCONDULE, 0),
/* v9 */ fmovicc ("fmovdvc", FM_DF, CONDVC, 0),
/* v9 */ fmovicc ("fmovqvc", FM_QF, CONDVC, 0),
/* v9 */ fmovicc ("fmovsvc", FM_SF, CONDVC, 0),
/* v9 */ fmovicc ("fmovdvs", FM_DF, CONDVS, 0),
/* v9 */ fmovicc ("fmovqvs", FM_QF, CONDVS, 0),
/* v9 */ fmovicc ("fmovsvs", FM_SF, CONDVS, 0),
/* v9 */ fmovcc ("fmovdz", FM_DF, CONDZ, FCONDZ, F_ALIAS),
/* v9 */ fmovcc ("fmovqz", FM_QF, CONDZ, FCONDZ, F_ALIAS),
/* v9 */ fmovcc ("fmovsz", FM_SF, CONDZ, FCONDZ, F_ALIAS),
#define fmovicc(suffix, cond, flags) /* v9 */ \
fmoviccx("fmovd" suffix, FM_DF, "B,H", cond, flags), \
fmoviccx("fmovq" suffix, FM_QF, "R,J", cond, flags), \
fmoviccx("fmovs" suffix, FM_SF, "f,g", cond, flags)
#define fmovfcc(suffix, fcond, flags) /* v9 */ \
fmovfccx("fmovd" suffix, FM_DF, "B,H", fcond, flags), \
fmovfccx("fmovq" suffix, FM_QF, "R,J", fcond, flags), \
fmovfccx("fmovs" suffix, FM_SF, "f,g", fcond, flags)
#define fmovcc(suffix, cond, fcond, flags) /* v9 */ \
fmovccx("fmovd" suffix, FM_DF, "B,H", cond, fcond, flags), \
fmovccx("fmovq" suffix, FM_QF, "R,J", cond, fcond, flags), \
fmovccx("fmovs" suffix, FM_SF, "f,g", cond, fcond, flags)
/* v9 */ fmovcc ("a", CONDA, FCONDA, 0),
/* v9 */ fmovicc ("cc", CONDCC, 0),
/* v9 */ fmovicc ("cs", CONDCS, 0),
/* v9 */ fmovcc ("e", CONDE, FCONDE, 0),
/* v9 */ fmovcc ("g", CONDG, FCONDG, 0),
/* v9 */ fmovcc ("ge", CONDGE, FCONDGE, 0),
/* v9 */ fmovicc ("geu", CONDGEU, F_ALIAS),
/* v9 */ fmovicc ("gu", CONDGU, 0),
/* v9 */ fmovcc ("l", CONDL, FCONDL, 0),
/* v9 */ fmovcc ("le", CONDLE, FCONDLE, 0),
/* v9 */ fmovicc ("leu", CONDLEU, 0),
/* v9 */ fmovfcc ("lg", FCONDLG, 0),
/* v9 */ fmovicc ("lu", CONDLU, F_ALIAS),
/* v9 */ fmovcc ("n", CONDN, FCONDN, 0),
/* v9 */ fmovcc ("ne", CONDNE, FCONDNE, 0),
/* v9 */ fmovicc ("neg", CONDNEG, 0),
/* v9 */ fmovcc ("nz", CONDNZ, FCONDNZ, F_ALIAS),
/* v9 */ fmovfcc ("o", FCONDO, 0),
/* v9 */ fmovicc ("pos", CONDPOS, 0),
/* v9 */ fmovfcc ("u", FCONDU, 0),
/* v9 */ fmovfcc ("ue", FCONDUE, 0),
/* v9 */ fmovfcc ("ug", FCONDUG, 0),
/* v9 */ fmovfcc ("uge", FCONDUGE, 0),
/* v9 */ fmovfcc ("ul", FCONDUL, 0),
/* v9 */ fmovfcc ("ule", FCONDULE, 0),
/* v9 */ fmovicc ("vc", CONDVC, 0),
/* v9 */ fmovicc ("vs", CONDVS, 0),
/* v9 */ fmovcc ("z", CONDZ, FCONDZ, F_ALIAS),
#undef fmoviccx /* v9 */
#undef fmovfccx /* v9 */
#undef fmovccx /* v9 */
#undef fmovicc /* v9 */
#undef fmovfcc /* v9 */
#undef fmovcc /* v9 */