Fix debug printfs in FPU_EMU to compile on powerpc64 and enable it for
powerpc64. This fixes the LINT64 kernel config. Approved by: nwhitehorn (the idea, not the actual patch)
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parent
f5dfbe2f69
commit
43fdca95b6
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=259010
@ -106,15 +106,15 @@ powerpc/booke/pmap.c optional booke
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powerpc/booke/trap.c optional booke
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powerpc/cpufreq/dfs.c optional cpufreq
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powerpc/cpufreq/pcr.c optional cpufreq aim
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powerpc/fpu/fpu_add.c optional fpu_emu powerpc
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powerpc/fpu/fpu_compare.c optional fpu_emu powerpc
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powerpc/fpu/fpu_div.c optional fpu_emu powerpc
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powerpc/fpu/fpu_emu.c optional fpu_emu powerpc
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powerpc/fpu/fpu_explode.c optional fpu_emu powerpc
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powerpc/fpu/fpu_implode.c optional fpu_emu powerpc
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powerpc/fpu/fpu_mul.c optional fpu_emu powerpc
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powerpc/fpu/fpu_sqrt.c optional fpu_emu powerpc
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powerpc/fpu/fpu_subr.c optional fpu_emu powerpc
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powerpc/fpu/fpu_add.c optional fpu_emu
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powerpc/fpu/fpu_compare.c optional fpu_emu
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powerpc/fpu/fpu_div.c optional fpu_emu
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powerpc/fpu/fpu_emu.c optional fpu_emu
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powerpc/fpu/fpu_explode.c optional fpu_emu
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powerpc/fpu/fpu_implode.c optional fpu_emu
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powerpc/fpu/fpu_mul.c optional fpu_emu
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powerpc/fpu/fpu_sqrt.c optional fpu_emu
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powerpc/fpu/fpu_subr.c optional fpu_emu
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powerpc/mambo/mambocall.S optional mambo
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powerpc/mambo/mambo.c optional mambo
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powerpc/mambo/mambo_console.c optional mambo
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@ -326,8 +326,10 @@ fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn)
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/* Store as integer */
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ra = instr.i_x.i_ra;
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rb = instr.i_x.i_rb;
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DPRINTF(FPE_INSN, ("reg %d has %x reg %d has %x\n",
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ra, tf->fixreg[ra], rb, tf->fixreg[rb]));
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DPRINTF(FPE_INSN,
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("reg %d has %jx reg %d has %jx\n",
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ra, (uintmax_t)tf->fixreg[ra], rb,
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(uintmax_t)tf->fixreg[rb]));
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addr = tf->fixreg[rb];
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if (ra != 0)
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@ -356,8 +358,9 @@ fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn)
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/* calculate EA of load/store */
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ra = instr.i_x.i_ra;
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rb = instr.i_x.i_rb;
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DPRINTF(FPE_INSN, ("reg %d has %x reg %d has %x\n",
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ra, tf->fixreg[ra], rb, tf->fixreg[rb]));
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DPRINTF(FPE_INSN, ("reg %d has %jx reg %d has %jx\n",
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ra, (uintmax_t)tf->fixreg[ra], rb,
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(uintmax_t)tf->fixreg[rb]));
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addr = tf->fixreg[rb];
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if (ra != 0)
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addr += tf->fixreg[ra];
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@ -373,8 +376,9 @@ fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn)
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/* calculate EA of load/store */
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ra = instr.i_d.i_ra;
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addr = instr.i_d.i_d;
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DPRINTF(FPE_INSN, ("reg %d has %x displ %x\n",
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ra, tf->fixreg[ra], addr));
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DPRINTF(FPE_INSN, ("reg %d has %jx displ %jx\n",
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ra, (uintmax_t)tf->fixreg[ra],
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(uintmax_t)addr));
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if (ra != 0)
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addr += tf->fixreg[ra];
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rt = instr.i_d.i_rt;
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@ -420,7 +424,7 @@ fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn)
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return (0);
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#ifdef notyet
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} else if (instr.i_any.i_opcd == OPC_load_st_62) {
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/* These are 64-bit extenstions */
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/* These are 64-bit extensions */
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return (NOTFPU);
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#endif
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} else if (instr.i_any.i_opcd == OPC_sp_fp_59 ||
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@ -784,7 +788,8 @@ fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn)
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/* Move fpu condition codes to cr[1] */
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tf->cr &= ~(0xf0000000>>bf);
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tf->cr |= (cond>>bf);
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DPRINTF(FPE_INSN, ("fpu_execute: cr[%d] (cr=%x) <= %x\n", bf/4, tf->cr, cond));
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DPRINTF(FPE_INSN, ("fpu_execute: cr[%d] (cr=%jx) <= %x\n",
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bf/4, (uintmax_t)tf->cr, cond));
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}
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((int *)&fs->fpscr)[1] = fsr;
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