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Use the stock 3.2.1-prerelease file.

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Approved by:	obrien
This commit is contained in:
kan 2002-09-01 21:13:32 +00:00
parent 291ca47868
commit 4518a2be48
1 changed files with 102 additions and 63 deletions
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165
contrib/gcc/config/i386/i386.md
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@ -2016,7 +2016,7 @@
;; For 64BIT abi we always round up to 8 bytes. ;; For 64BIT abi we always round up to 8 bytes.
(define_insn "*pushqi2_rex64" (define_insn "*pushqi2_rex64"
[(set (match_operand:QI 0 "push_operand" "=X") [(set (match_operand:QI 0 "push_operand" "=X")
(match_operand:QI 1 "nonmemory_no_elim_operand" "ri"))] (match_operand:QI 1 "nonmemory_no_elim_operand" "qi"))]
"TARGET_64BIT" "TARGET_64BIT"
"push{q}\t%q1" "push{q}\t%q1"
[(set_attr "type" "push") [(set_attr "type" "push")
@ -2557,17 +2557,16 @@
;; We fake an second form of instruction to force reload to load address ;; We fake an second form of instruction to force reload to load address
;; into register when rax is not available ;; into register when rax is not available
(define_insn "*movabsdi_1_rex64" (define_insn "*movabsdi_1_rex64"
[(set (mem:DI (match_operand:DI 0 "x86_64_movabs_operand" "i,r,r")) [(set (mem:DI (match_operand:DI 0 "x86_64_movabs_operand" "i,r"))
(match_operand:DI 1 "nonmemory_operand" "a,er,i"))] (match_operand:DI 1 "nonmemory_operand" "a,er"))]
"TARGET_64BIT" "TARGET_64BIT"
"@ "@
movabs{q}\t{%1, %P0|%P0, %1} movabs{q}\t{%1, %P0|%P0, %1}
mov{q}\t{%1, %a0|%a0, %1} mov{q}\t{%1, %a0|%a0, %1}"
movabs{q}\t{%1, %a0|%a0, %1}"
[(set_attr "type" "imov") [(set_attr "type" "imov")
(set_attr "modrm" "0,*,*") (set_attr "modrm" "0,*")
(set_attr "length_address" "8,0,0") (set_attr "length_address" "8,0")
(set_attr "length_immediate" "0,*,*") (set_attr "length_immediate" "0,*")
(set_attr "memory" "store") (set_attr "memory" "store")
(set_attr "mode" "DI")]) (set_attr "mode" "DI")])
@ -10953,7 +10952,7 @@
[(set (reg 17) [(set (reg 17)
(compare (compare
(ashift:SI (match_operand:SI 1 "nonimmediate_operand" "0") (ashift:SI (match_operand:SI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "immediate_operand" "I")) (match_operand:QI 2 "const_int_1_31_operand" "I"))
(const_int 0))) (const_int 0)))
(set (match_operand:SI 0 "nonimmediate_operand" "=rm") (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
(ashift:SI (match_dup 1) (match_dup 2)))] (ashift:SI (match_dup 1) (match_dup 2)))]
@ -10992,7 +10991,7 @@
[(set (reg 17) [(set (reg 17)
(compare (compare
(ashift:SI (match_operand:SI 1 "register_operand" "0") (ashift:SI (match_operand:SI 1 "register_operand" "0")
(match_operand:QI 2 "immediate_operand" "I")) (match_operand:QI 2 "const_int_1_31_operand" "I"))
(const_int 0))) (const_int 0)))
(set (match_operand:DI 0 "register_operand" "=r") (set (match_operand:DI 0 "register_operand" "=r")
(zero_extend:DI (ashift:SI (match_dup 1) (match_dup 2))))] (zero_extend:DI (ashift:SI (match_dup 1) (match_dup 2))))]
@ -11117,7 +11116,7 @@
[(set (reg 17) [(set (reg 17)
(compare (compare
(ashift:HI (match_operand:HI 1 "nonimmediate_operand" "0") (ashift:HI (match_operand:HI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "immediate_operand" "I")) (match_operand:QI 2 "const_int_1_31_operand" "I"))
(const_int 0))) (const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "=rm") (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
(ashift:HI (match_dup 1) (match_dup 2)))] (ashift:HI (match_dup 1) (match_dup 2)))]
@ -11281,7 +11280,7 @@
[(set (reg 17) [(set (reg 17)
(compare (compare
(ashift:QI (match_operand:QI 1 "nonimmediate_operand" "0") (ashift:QI (match_operand:QI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "immediate_operand" "I")) (match_operand:QI 2 "const_int_1_31_operand" "I"))
(const_int 0))) (const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=qm") (set (match_operand:QI 0 "nonimmediate_operand" "=qm")
(ashift:QI (match_dup 1) (match_dup 2)))] (ashift:QI (match_dup 1) (match_dup 2)))]
@ -11631,7 +11630,7 @@
[(set (reg 17) [(set (reg 17)
(compare (compare
(ashiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0") (ashiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "immediate_operand" "I")) (match_operand:QI 2 "const_int_1_31_operand" "I"))
(const_int 0))) (const_int 0)))
(set (match_operand:SI 0 "nonimmediate_operand" "=rm") (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
(ashiftrt:SI (match_dup 1) (match_dup 2)))] (ashiftrt:SI (match_dup 1) (match_dup 2)))]
@ -11645,7 +11644,7 @@
[(set (reg 17) [(set (reg 17)
(compare (compare
(ashiftrt:SI (match_operand:SI 1 "register_operand" "0") (ashiftrt:SI (match_operand:SI 1 "register_operand" "0")
(match_operand:QI 2 "immediate_operand" "I")) (match_operand:QI 2 "const_int_1_31_operand" "I"))
(const_int 0))) (const_int 0)))
(set (match_operand:DI 0 "register_operand" "=r") (set (match_operand:DI 0 "register_operand" "=r")
(zero_extend:DI (ashiftrt:SI (match_dup 1) (match_dup 2))))] (zero_extend:DI (ashiftrt:SI (match_dup 1) (match_dup 2))))]
@ -11717,7 +11716,7 @@
[(set (reg 17) [(set (reg 17)
(compare (compare
(ashiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0") (ashiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "immediate_operand" "I")) (match_operand:QI 2 "const_int_1_31_operand" "I"))
(const_int 0))) (const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "=rm") (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
(ashiftrt:HI (match_dup 1) (match_dup 2)))] (ashiftrt:HI (match_dup 1) (match_dup 2)))]
@ -11770,7 +11769,7 @@
(ashiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0") (ashiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "const_int_1_operand" "I")) (match_operand:QI 2 "const_int_1_operand" "I"))
(const_int 0))) (const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=rm") (set (match_operand:QI 0 "nonimmediate_operand" "=qm")
(ashiftrt:QI (match_dup 1) (match_dup 2)))] (ashiftrt:QI (match_dup 1) (match_dup 2)))]
"ix86_match_ccmode (insn, CCGOCmode) "ix86_match_ccmode (insn, CCGOCmode)
&& (TARGET_PENTIUM || TARGET_PENTIUMPRO) && (TARGET_PENTIUM || TARGET_PENTIUMPRO)
@ -11789,9 +11788,9 @@
[(set (reg 17) [(set (reg 17)
(compare (compare
(ashiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0") (ashiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "immediate_operand" "I")) (match_operand:QI 2 "const_int_1_31_operand" "I"))
(const_int 0))) (const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=rm") (set (match_operand:QI 0 "nonimmediate_operand" "=qm")
(ashiftrt:QI (match_dup 1) (match_dup 2)))] (ashiftrt:QI (match_dup 1) (match_dup 2)))]
"ix86_match_ccmode (insn, CCGOCmode) "ix86_match_ccmode (insn, CCGOCmode)
&& ix86_binary_operator_ok (ASHIFTRT, QImode, operands)" && ix86_binary_operator_ok (ASHIFTRT, QImode, operands)"
@ -12022,7 +12021,7 @@
[(set (reg 17) [(set (reg 17)
(compare (compare
(lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0") (lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "immediate_operand" "I")) (match_operand:QI 2 "const_int_1_31_operand" "I"))
(const_int 0))) (const_int 0)))
(set (match_operand:SI 0 "nonimmediate_operand" "=rm") (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
(lshiftrt:SI (match_dup 1) (match_dup 2)))] (lshiftrt:SI (match_dup 1) (match_dup 2)))]
@ -12036,7 +12035,7 @@
[(set (reg 17) [(set (reg 17)
(compare (compare
(lshiftrt:SI (match_operand:SI 1 "register_operand" "0") (lshiftrt:SI (match_operand:SI 1 "register_operand" "0")
(match_operand:QI 2 "immediate_operand" "I")) (match_operand:QI 2 "const_int_1_31_operand" "I"))
(const_int 0))) (const_int 0)))
(set (match_operand:DI 0 "register_operand" "=r") (set (match_operand:DI 0 "register_operand" "=r")
(lshiftrt:DI (zero_extend:DI (match_dup 1)) (match_dup 2)))] (lshiftrt:DI (zero_extend:DI (match_dup 1)) (match_dup 2)))]
@ -12108,7 +12107,7 @@
[(set (reg 17) [(set (reg 17)
(compare (compare
(lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0") (lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "immediate_operand" "I")) (match_operand:QI 2 "const_int_1_31_operand" "I"))
(const_int 0))) (const_int 0)))
(set (match_operand:HI 0 "nonimmediate_operand" "=rm") (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
(lshiftrt:HI (match_dup 1) (match_dup 2)))] (lshiftrt:HI (match_dup 1) (match_dup 2)))]
@ -12180,7 +12179,7 @@
[(set (reg 17) [(set (reg 17)
(compare (compare
(lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0") (lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
(match_operand:QI 2 "immediate_operand" "I")) (match_operand:QI 2 "const_int_1_31_operand" "I"))
(const_int 0))) (const_int 0)))
(set (match_operand:QI 0 "nonimmediate_operand" "=qm") (set (match_operand:QI 0 "nonimmediate_operand" "=qm")
(lshiftrt:QI (match_dup 1) (match_dup 2)))] (lshiftrt:QI (match_dup 1) (match_dup 2)))]
@ -13818,6 +13817,7 @@
{ {
ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L",
CODE_LABEL_NUMBER (operands[1])); CODE_LABEL_NUMBER (operands[1]));
return "pop{l}\t%0";
} }
RET; RET;
} }
@ -16578,12 +16578,12 @@
"#") "#")
(define_insn "sse_movdfcc" (define_insn "sse_movdfcc"
[(set (match_operand:DF 0 "register_operand" "=&x#rf,x#rf,?f#xr,?f#xr,?f#xr,?f#xr,?r#xf,?r#xf,?r#xf,?r#xf") [(set (match_operand:DF 0 "register_operand" "=&Y#rf,Y#rf,?f#Yr,?f#Yr,?f#Yr,?f#Yr,?r#Yf,?r#Yf,?r#Yf,?r#Yf")
(if_then_else:DF (match_operator 1 "sse_comparison_operator" (if_then_else:DF (match_operator 1 "sse_comparison_operator"
[(match_operand:DF 4 "nonimmediate_operand" "0#fx,x#fx,f#x,f#x,xm#f,xm#f,f#x,f#x,xm#f,xm#f") [(match_operand:DF 4 "nonimmediate_operand" "0#fY,Y#fY,f#Y,f#Y,Ym#f,Ym#f,f#Y,f#Y,Ym#f,Ym#f")
(match_operand:DF 5 "nonimmediate_operand" "xm#f,xm#f,f#x,f#x,x#f,x#f,f#x,f#x,x#f,x#f")]) (match_operand:DF 5 "nonimmediate_operand" "Ym#f,Ym#f,f#Y,f#Y,Y#f,Y#f,f#Y,f#Y,Y#f,Y#f")])
(match_operand:DF 2 "nonimmediate_operand" "x#fr,0#fr,f#fx,0#fx,f#fx,0#fx,rm#rx,0#rx,rm#rx,0#rx") (match_operand:DF 2 "nonimmediate_operand" "Y#fr,0#fr,f#fY,0#fY,f#fY,0#fY,rm#rY,0#rY,rm#rY,0#rY")
(match_operand:DF 3 "nonimmediate_operand" "x#fr,x#fr,0#fx,f#fx,0#fx,f#fx,0#fx,rm#rx,0#rx,rm#rx"))) (match_operand:DF 3 "nonimmediate_operand" "Y#fr,Y#fr,0#fY,f#fY,0#fY,f#fY,0#fY,rm#rY,0#rY,rm#rY")))
(clobber (match_scratch:DF 6 "=2,&4,X,X,X,X,X,X,X,X")) (clobber (match_scratch:DF 6 "=2,&4,X,X,X,X,X,X,X,X"))
(clobber (reg:CC 17))] (clobber (reg:CC 17))]
"TARGET_SSE2 "TARGET_SSE2
@ -16593,11 +16593,11 @@
"#") "#")
(define_insn "sse_movdfcc_eq" (define_insn "sse_movdfcc_eq"
[(set (match_operand:DF 0 "register_operand" "=&x#rf,x#rf,?f#xr,?f#xr,?r#xf,?r#xf") [(set (match_operand:DF 0 "register_operand" "=&Y#rf,Y#rf,?f#Yr,?f#Yr,?r#Yf,?r#Yf")
(if_then_else:DF (eq (match_operand:DF 3 "nonimmediate_operand" "%0#fx,x#fx,f#x,xm#f,f#x,xm#f") (if_then_else:DF (eq (match_operand:DF 3 "nonimmediate_operand" "%0#fY,Y#fY,f#Y,Ym#f,f#Y,Ym#f")
(match_operand:DF 4 "nonimmediate_operand" "xm#f,xm#f,f#x,x#f,f#x,x#f")) (match_operand:DF 4 "nonimmediate_operand" "Ym#f,Ym#f,f#Y,Y#f,f#Y,Y#f"))
(match_operand:DF 1 "nonimmediate_operand" "x#fr,0#fr,0#fx,0#fx,0#rx,0#rx") (match_operand:DF 1 "nonimmediate_operand" "Y#fr,0#fr,0#fY,0#fY,0#rY,0#rY")
(match_operand:DF 2 "nonimmediate_operand" "x#fr,x#fr,f#fx,f#fx,rm#rx,rm#rx"))) (match_operand:DF 2 "nonimmediate_operand" "Y#fr,Y#fr,f#fY,f#fY,rm#rY,rm#rY")))
(clobber (match_scratch:DF 5 "=1,&3,X,X,X,X")) (clobber (match_scratch:DF 5 "=1,&3,X,X,X,X"))
(clobber (reg:CC 17))] (clobber (reg:CC 17))]
"TARGET_SSE "TARGET_SSE
@ -16649,6 +16649,10 @@
(set (subreg:TI (match_dup 0) 0) (ior:TI (subreg:TI (match_dup 6) 0) (set (subreg:TI (match_dup 0) 0) (ior:TI (subreg:TI (match_dup 6) 0)
(subreg:TI (match_dup 7) 0)))] (subreg:TI (match_dup 7) 0)))]
{ {
/* If op2 == op3, op3 will be clobbered before it is used.
This should be optimized out though. */
if (operands_match_p (operands[2], operands[3]))
abort ();
PUT_MODE (operands[1], GET_MODE (operands[0])); PUT_MODE (operands[1], GET_MODE (operands[0]));
if (operands_match_p (operands[0], operands[4])) if (operands_match_p (operands[0], operands[4]))
operands[6] = operands[4], operands[7] = operands[2]; operands[6] = operands[4], operands[7] = operands[2];
@ -16660,7 +16664,7 @@
;; Do not brother with the integer/floating point case, since these are ;; Do not brother with the integer/floating point case, since these are
;; bot considerably slower, unlike in the generic case. ;; bot considerably slower, unlike in the generic case.
(define_insn "*sse_movsfcc_const0_1" (define_insn "*sse_movsfcc_const0_1"
[(set (match_operand:SF 0 "register_operand" "=x") [(set (match_operand:SF 0 "register_operand" "=&x")
(if_then_else:SF (match_operator 1 "sse_comparison_operator" (if_then_else:SF (match_operator 1 "sse_comparison_operator"
[(match_operand:SF 4 "register_operand" "0") [(match_operand:SF 4 "register_operand" "0")
(match_operand:SF 5 "nonimmediate_operand" "xm")]) (match_operand:SF 5 "nonimmediate_operand" "xm")])
@ -16670,7 +16674,7 @@
"#") "#")
(define_insn "*sse_movsfcc_const0_2" (define_insn "*sse_movsfcc_const0_2"
[(set (match_operand:SF 0 "register_operand" "=x") [(set (match_operand:SF 0 "register_operand" "=&x")
(if_then_else:SF (match_operator 1 "sse_comparison_operator" (if_then_else:SF (match_operator 1 "sse_comparison_operator"
[(match_operand:SF 4 "register_operand" "0") [(match_operand:SF 4 "register_operand" "0")
(match_operand:SF 5 "nonimmediate_operand" "xm")]) (match_operand:SF 5 "nonimmediate_operand" "xm")])
@ -16680,7 +16684,7 @@
"#") "#")
(define_insn "*sse_movsfcc_const0_3" (define_insn "*sse_movsfcc_const0_3"
[(set (match_operand:SF 0 "register_operand" "=x") [(set (match_operand:SF 0 "register_operand" "=&x")
(if_then_else:SF (match_operator 1 "fcmov_comparison_operator" (if_then_else:SF (match_operator 1 "fcmov_comparison_operator"
[(match_operand:SF 4 "nonimmediate_operand" "xm") [(match_operand:SF 4 "nonimmediate_operand" "xm")
(match_operand:SF 5 "register_operand" "0")]) (match_operand:SF 5 "register_operand" "0")])
@ -16690,7 +16694,7 @@
"#") "#")
(define_insn "*sse_movsfcc_const0_4" (define_insn "*sse_movsfcc_const0_4"
[(set (match_operand:SF 0 "register_operand" "=x") [(set (match_operand:SF 0 "register_operand" "=&x")
(if_then_else:SF (match_operator 1 "fcmov_comparison_operator" (if_then_else:SF (match_operator 1 "fcmov_comparison_operator"
[(match_operand:SF 4 "nonimmediate_operand" "xm") [(match_operand:SF 4 "nonimmediate_operand" "xm")
(match_operand:SF 5 "register_operand" "0")]) (match_operand:SF 5 "register_operand" "0")])
@ -16700,42 +16704,42 @@
"#") "#")
(define_insn "*sse_movdfcc_const0_1" (define_insn "*sse_movdfcc_const0_1"
[(set (match_operand:SF 0 "register_operand" "=x") [(set (match_operand:DF 0 "register_operand" "=&Y")
(if_then_else:SF (match_operator 1 "sse_comparison_operator" (if_then_else:DF (match_operator 1 "sse_comparison_operator"
[(match_operand:SF 4 "register_operand" "0") [(match_operand:DF 4 "register_operand" "0")
(match_operand:SF 5 "nonimmediate_operand" "xm")]) (match_operand:DF 5 "nonimmediate_operand" "Ym")])
(match_operand:SF 2 "register_operand" "x") (match_operand:DF 2 "register_operand" "Y")
(match_operand:SF 3 "const0_operand" "X")))] (match_operand:DF 3 "const0_operand" "X")))]
"TARGET_SSE2" "TARGET_SSE2"
"#") "#")
(define_insn "*sse_movdfcc_const0_2" (define_insn "*sse_movdfcc_const0_2"
[(set (match_operand:SF 0 "register_operand" "=x") [(set (match_operand:DF 0 "register_operand" "=&Y")
(if_then_else:SF (match_operator 1 "sse_comparison_operator" (if_then_else:DF (match_operator 1 "sse_comparison_operator"
[(match_operand:SF 4 "register_operand" "0") [(match_operand:DF 4 "register_operand" "0")
(match_operand:SF 5 "nonimmediate_operand" "xm")]) (match_operand:DF 5 "nonimmediate_operand" "Ym")])
(match_operand:SF 2 "const0_operand" "X") (match_operand:DF 2 "const0_operand" "X")
(match_operand:SF 3 "register_operand" "x")))] (match_operand:DF 3 "register_operand" "Y")))]
"TARGET_SSE2" "TARGET_SSE2"
"#") "#")
(define_insn "*sse_movdfcc_const0_3" (define_insn "*sse_movdfcc_const0_3"
[(set (match_operand:SF 0 "register_operand" "=x") [(set (match_operand:DF 0 "register_operand" "=&Y")
(if_then_else:SF (match_operator 1 "fcmov_comparison_operator" (if_then_else:DF (match_operator 1 "fcmov_comparison_operator"
[(match_operand:SF 4 "nonimmediate_operand" "xm") [(match_operand:DF 4 "nonimmediate_operand" "Ym")
(match_operand:SF 5 "register_operand" "0")]) (match_operand:DF 5 "register_operand" "0")])
(match_operand:SF 2 "register_operand" "x") (match_operand:DF 2 "register_operand" "Y")
(match_operand:SF 3 "const0_operand" "X")))] (match_operand:DF 3 "const0_operand" "X")))]
"TARGET_SSE2" "TARGET_SSE2"
"#") "#")
(define_insn "*sse_movdfcc_const0_4" (define_insn "*sse_movdfcc_const0_4"
[(set (match_operand:SF 0 "register_operand" "=x") [(set (match_operand:DF 0 "register_operand" "=&Y")
(if_then_else:SF (match_operator 1 "fcmov_comparison_operator" (if_then_else:DF (match_operator 1 "fcmov_comparison_operator"
[(match_operand:SF 4 "nonimmediate_operand" "xm") [(match_operand:DF 4 "nonimmediate_operand" "Ym")
(match_operand:SF 5 "register_operand" "0")]) (match_operand:DF 5 "register_operand" "0")])
(match_operand:SF 2 "const0_operand" "X") (match_operand:DF 2 "const0_operand" "X")
(match_operand:SF 3 "register_operand" "x")))] (match_operand:DF 3 "register_operand" "Y")))]
"TARGET_SSE2" "TARGET_SSE2"
"#") "#")
@ -19781,7 +19785,7 @@
[(set_attr "type" "mmx")]) [(set_attr "type" "mmx")])
(define_expand "prefetch" (define_expand "prefetch"
[(prefetch (match_operand:SI 0 "address_operand" "") [(prefetch (match_operand 0 "address_operand" "")
(match_operand:SI 1 "const_int_operand" "") (match_operand:SI 1 "const_int_operand" "")
(match_operand:SI 2 "const_int_operand" ""))] (match_operand:SI 2 "const_int_operand" ""))]
"TARGET_PREFETCH_SSE || TARGET_3DNOW" "TARGET_PREFETCH_SSE || TARGET_3DNOW"
@ -19793,6 +19797,8 @@
abort (); abort ();
if (locality < 0 || locality > 3) if (locality < 0 || locality > 3)
abort (); abort ();
if (GET_MODE (operands[0]) != Pmode && GET_MODE (operands[0]) != VOIDmode)
abort ();
/* Use 3dNOW prefetch in case we are asking for write prefetch not /* Use 3dNOW prefetch in case we are asking for write prefetch not
suported by SSE counterpart or the SSE prefetch is not available suported by SSE counterpart or the SSE prefetch is not available
@ -19808,7 +19814,26 @@
[(prefetch (match_operand:SI 0 "address_operand" "p") [(prefetch (match_operand:SI 0 "address_operand" "p")
(const_int 0) (const_int 0)
(match_operand:SI 1 "const_int_operand" ""))] (match_operand:SI 1 "const_int_operand" ""))]
"TARGET_PREFETCH_SSE" "TARGET_PREFETCH_SSE && !TARGET_64BIT"
{
static const char * const patterns[4] = {
"prefetchnta\t%a0", "prefetcht2\t%a0", "prefetcht1\t%a0", "prefetcht0\t%a0"
};
int locality = INTVAL (operands[1]);
if (locality < 0 || locality > 3)
abort ();
return patterns[locality];
}
[(set_attr "type" "sse")
(set_attr "memory" "none")])
(define_insn "*prefetch_sse_rex"
[(prefetch (match_operand:DI 0 "address_operand" "p")
(const_int 0)
(match_operand:SI 1 "const_int_operand" ""))]
"TARGET_PREFETCH_SSE && TARGET_64BIT"
{ {
static const char * const patterns[4] = { static const char * const patterns[4] = {
"prefetchnta\t%a0", "prefetcht2\t%a0", "prefetcht1\t%a0", "prefetcht0\t%a0" "prefetchnta\t%a0", "prefetcht2\t%a0", "prefetcht1\t%a0", "prefetcht0\t%a0"
@ -19826,7 +19851,21 @@
[(prefetch (match_operand:SI 0 "address_operand" "p") [(prefetch (match_operand:SI 0 "address_operand" "p")
(match_operand:SI 1 "const_int_operand" "n") (match_operand:SI 1 "const_int_operand" "n")
(const_int 3))] (const_int 3))]
"TARGET_3DNOW" "TARGET_3DNOW && !TARGET_64BIT"
{
if (INTVAL (operands[1]) == 0)
return "prefetch\t%a0";
else
return "prefetchw\t%a0";
}
[(set_attr "type" "mmx")
(set_attr "memory" "none")])
(define_insn "*prefetch_3dnow_rex"
[(prefetch (match_operand:DI 0 "address_operand" "p")
(match_operand:SI 1 "const_int_operand" "n")
(const_int 3))]
"TARGET_3DNOW && TARGET_64BIT"
{ {
if (INTVAL (operands[1]) == 0) if (INTVAL (operands[1]) == 0)
return "prefetch\t%a0"; return "prefetch\t%a0";