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RISC-V: fix kernel CFLAGS with clang

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Use the -march and -mabi flags for both gcc and clang as they are
compatible. Specify the "medium" code model separately as it goes by the
name "medany" under gcc, although they are equivalent.

Reviewed by:	markj
Approved by:	markj (mentor)
MFC after:	3 days
Differential Revision:	https://reviews.freebsd.org/D21436
This commit is contained in:
Mitchell Horne 2019-09-08 19:44:21 +00:00
parent e90bb1adec
commit 45b535facf
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=352034
1 changed files with 11 additions and 1 deletions
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12
sys/conf/kern.mk
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@ -128,8 +128,18 @@ CFLAGS += -ffixed-x18
INLINE_LIMIT?= 8000
.endif
#
# For RISC-V we specify the soft-float ABI (lp64) to avoid the use of floating
# point registers within the kernel. We also specify the "medium" code model,
# which generates code suitable for a 2GiB addressing range located at any
# offset, allowing modules to be located anywhere in the 64-bit address space.
# Note that clang and GCC refer to this code model as "medium" and "medany"
# respectively.
#
.if ${MACHINE_CPUARCH} == "riscv"
CFLAGS.gcc+= -mcmodel=medany -march=rv64imafdc -mabi=lp64
CFLAGS+= -march=rv64imafdc -mabi=lp64
CFLAGS.clang+= -mcmodel=medium
CFLAGS.gcc+= -mcmodel=medany
INLINE_LIMIT?= 8000
.endif