According to Section D5.10.3 "Maintenance requirements on changing System
register values" of the architecture manual, an isb instruction should be executed after updating ttbr0_el1 and before invalidating the TLB. The lack of this instruction in pmap_activate() appears to be the reason why andrew@ and I have observed an unexpected TLB entry for an invalid PTE on entry to pmap_enter_quick_locked(). Thus, we should now be able to revert the workaround committed in r349442. Reviewed by: markj MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D20904
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=349905
@ -239,6 +239,7 @@ efi_arch_enter(void)
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__asm __volatile(
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"msr ttbr0_el1, %0 \n"
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"isb \n"
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"dsb ishst \n"
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"tlbi vmalle1is \n"
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"dsb ish \n"
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@ -266,6 +267,7 @@ efi_arch_leave(void)
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td = curthread;
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__asm __volatile(
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"msr ttbr0_el1, %0 \n"
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"isb \n"
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"dsb ishst \n"
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"tlbi vmalle1is \n"
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"dsb ish \n"
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@ -5484,8 +5484,10 @@ pmap_activate(struct thread *td)
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critical_enter();
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pmap = vmspace_pmap(td->td_proc->p_vmspace);
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td->td_proc->p_md.md_l0addr = vtophys(pmap->pm_l0);
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__asm __volatile("msr ttbr0_el1, %0" : :
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"r"(td->td_proc->p_md.md_l0addr));
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__asm __volatile(
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"msr ttbr0_el1, %0 \n"
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"isb \n"
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: : "r"(td->td_proc->p_md.md_l0addr));
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pmap_invalidate_all(pmap);
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critical_exit();
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}
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