Implement missing MMCBR ivars

All MMCBR bridges have to implement all the MMCBR variables. This
implements them for everybody that currently doesn't.

A common routine for this should be written.
This commit is contained in:
Warner Losh 2019-07-04 14:15:04 +00:00
parent 0c340d7ed9
commit 4924bcd36e
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/head/; revision=349728
4 changed files with 53 additions and 5 deletions

View File

@ -965,15 +965,26 @@ aml8726_mmc_read_ivar(device_t bus, device_t child,
case MMCBR_IVAR_POWER_MODE:
*(int *)result = sc->host.ios.power_mode;
break;
case MMCBR_IVAR_RETUNE_REQ:
*(int *)result = return_req_none;
case MMCBR_IVAR_VDD:
*(int *)result = sc->host.ios.vdd;
break;
case MMCBR_IVAR_VCCQ:
*result = sc->sc_host.ios.vccq;
break;
case MMCBR_IVAR_CAPS:
*(int *)result = sc->host.caps;
break;
case MMCBR_IVAR_TIMING:
*(int *)result = sc->sc_host.ios.timing;
break;
case MMCBR_IVAR_MAX_DATA:
*(int *)result = AML_MMC_MAX_DMA / MMC_SECTOR_SIZE;
break;
case MMCBR_IVAR_MAX_BUSY_TIMEOUT:
*(int *)result = 1000000; /* 1s max */
break;
default:
return (EINVAL);
}
@ -1012,6 +1023,12 @@ aml8726_mmc_write_ivar(device_t bus, device_t child,
case MMCBR_IVAR_VDD:
sc->host.ios.vdd = value;
break;
case MMCBR_IVAR_VCCQ:
sc->sc_host.ios.vccq = value;
break;
case MMCBR_IVAR_TIMING:
sc->sc_host.ios.timing = value;
break;
/* These are read-only */
case MMCBR_IVAR_CAPS:
case MMCBR_IVAR_HOST_OCR:

View File

@ -1245,15 +1245,27 @@ aml8726_sdxc_read_ivar(device_t bus, device_t child,
case MMCBR_IVAR_POWER_MODE:
*(int *)result = sc->host.ios.power_mode;
break;
case MMCBR_IVAR_RETUNE_REQ:
*(int *)result = return_req_none;
break;
case MMCBR_IVAR_VDD:
*(int *)result = sc->host.ios.vdd;
break;
case MMCBR_IVAR_VCCQ:
*result = sc->host.ios.vccq;
break;
case MMCBR_IVAR_CAPS:
*(int *)result = sc->host.caps;
break;
case MMCBR_IVAR_TIMING:
*(int *)result = sc->host.ios.timing;
break;
case MMCBR_IVAR_MAX_DATA:
*(int *)result = AML_SDXC_MAX_DMA / MMC_SECTOR_SIZE;
break;
case MMCBR_IVAR_MAX_BUSY_TIMEOUT:
*(int *)result = 1000000; /* 1s max */
break;
default:
return (EINVAL);
}
@ -1292,6 +1304,12 @@ aml8726_sdxc_write_ivar(device_t bus, device_t child,
case MMCBR_IVAR_VDD:
sc->host.ios.vdd = value;
break;
case MMCBR_IVAR_VCCQ:
sc->host.ios.vccq = value;
break;
case MMCBR_IVAR_TIMING:
sc->host.ios.timing = value;
break;
/* These are read-only */
case MMCBR_IVAR_CAPS:
case MMCBR_IVAR_HOST_OCR:

View File

@ -1091,6 +1091,9 @@ dwmmc_read_ivar(device_t bus, device_t child, int which, uintptr_t *result)
case MMCBR_IVAR_VDD:
*(int *)result = sc->host.ios.vdd;
break;
case MMCBR_IVAR_VCCQ:
*(int *)result = sc->host.ios.vccq;
break;
case MMCBR_IVAR_CAPS:
*(int *)result = sc->host.caps;
break;
@ -1141,10 +1144,8 @@ dwmmc_write_ivar(device_t bus, device_t child, int which, uintptr_t value)
case MMCBR_IVAR_TIMING:
sc->host.ios.timing = value;
break;
/* Not handled */
case MMCBR_IVAR_VCCQ:
return (0);
sc->sc_host.ios.vccq = value;
break;
/* These are read-only */
case MMCBR_IVAR_CAPS:

View File

@ -774,17 +774,26 @@ jz4780_mmc_read_ivar(device_t bus, device_t child, int which,
case MMCBR_IVAR_POWER_MODE:
*(int *)result = sc->sc_host.ios.power_mode;
break;
case MMCBR_IVAR_RETUNE_REQ:
*(int *)result = return_req_none;
break;
case MMCBR_IVAR_VDD:
*(int *)result = sc->sc_host.ios.vdd;
break;
case MMCBR_IVAR_VCCQ:
*result = sc->sc_host.ios.vccq;
break;
case MMCBR_IVAR_CAPS:
*(int *)result = sc->sc_host.caps;
break;
case MMCBR_IVAR_TIMING:
*(int *)result = sc->sc_host.ios.timing;
break;
case MMCBR_IVAR_MAX_DATA:
*(int *)result = 65535;
break;
case MMCBR_IVAR_TIMING:
*(int *)result = sc->sc_host.ios.timing;
case MMCBR_IVAR_MAX_BUSY_TIMEOUT:
*(int *)result = 1000000; /* 1s max */
break;
}
@ -825,6 +834,9 @@ jz4780_mmc_write_ivar(device_t bus, device_t child, int which,
case MMCBR_IVAR_VDD:
sc->sc_host.ios.vdd = value;
break;
case MMCBR_IVAR_VCCQ:
sc->sc_host.ios.vccq = value;
break;
case MMCBR_IVAR_TIMING:
sc->sc_host.ios.timing = value;
break;