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Enable SMP on Ingenic JZ4780.

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It is required to proceed full cache flush before we can use wait
instruction on multicore, so use nop instead for now.

Submitted by:	kan
Sponsored by:	DARPA, AFRL
This commit is contained in:
Ruslan Bukin 2016-11-19 18:03:46 +00:00
parent 6193edf4c5
commit 4943459ce3
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=308859
2 changed files with 5 additions and 1 deletions
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2
sys/mips/conf/JZ4780
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@ -53,7 +53,7 @@ options INVARIANT_SUPPORT #Extra sanity checks of internal structures, required
#options WITNESS_SKIPSPIN #Don't run witness on spinlocks for speed
# Make an SMP-capable kernel by default
# options SMP # Symmetric MultiProcessor Kernel
options SMP # Symmetric MultiProcessor Kernel
device loop
device ether

4
sys/mips/mips/exception.S
View File

@ -590,7 +590,11 @@ GLOBAL(MipsWaitStart) # this is 16 byte aligned
mtc0 t1, MIPS_COP_0_STATUS
bnez v0, MipsWaitEnd
nop
#if defined(CPU_XBURST) && defined(SMP)
nop
#else
wait
#endif
GLOBAL(MipsWaitEnd) # MipsWaitStart + 16
jr ra
PTR_ADDU sp, sp, CALLFRAME_SIZ